185 files changed, 13838 insertions, 2301 deletions

diff --git a/drivers/accessibility/braille/braille_console.c b/drivers/accessibility/braille/braille_console.c
index d672cfe7ca59..cb423f5aef24 100644
--- a/drivers/accessibility/braille/braille_console.c
+++ b/drivers/accessibility/braille/braille_console.c
@@ -21,7 +21,6 @@
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#include <linux/autoconf.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/moduleparam.h>
diff --git a/drivers/hid/hid-lg.h b/drivers/hid/hid-lg.h
index 27ae750ca878..bf31592eaf79 100644
--- a/drivers/hid/hid-lg.h
+++ b/drivers/hid/hid-lg.h
@@ -1,8 +1,6 @@
 #ifndef __HID_LG_H
 #define __HID_LG_H
 
-#include <linux/autoconf.h>
-
 #ifdef CONFIG_LOGITECH_FF
 int lgff_init(struct hid_device *hdev);
 #else
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 95ccbe377f9c..46c3c566307e 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -228,6 +228,18 @@ config SENSORS_K8TEMP
           This driver can also be built as a module.  If so, the module
           will be called k8temp.
 
+config SENSORS_K10TEMP
+        tristate "AMD Phenom/Sempron/Turion/Opteron temperature sensor"
+        depends on X86 && PCI
+        help
+          If you say yes here you get support for the temperature
+          sensor(s) inside your CPU. Supported are later revisions of
+          the AMD Family 10h and all revisions of the AMD Family 11h
+          microarchitectures.
+
+          This driver can also be built as a module.  If so, the module
+          will be called k10temp.
+
 config SENSORS_AMS
         tristate "Apple Motion Sensor driver"
         depends on PPC_PMAC && !PPC64 && INPUT && ((ADB_PMU && I2C = y) || (ADB_PMU && !I2C) || I2C) && EXPERIMENTAL
@@ -810,6 +822,14 @@ config SENSORS_TMP421
           This driver can also be built as a module.  If so, the module
           will be called tmp421.
 
+config SENSORS_VIA_CPUTEMP
+        tristate "VIA CPU temperature sensor"
+        depends on X86
+        help
+          If you say yes here you get support for the temperature
+          sensor inside your CPU. Supported are all known variants of
+          the VIA C7 and Nano.
+
 config SENSORS_VIA686A
         tristate "VIA686A"
         depends on PCI
@@ -998,6 +1018,23 @@ config SENSORS_LIS3_SPI
           will be called lis3lv02d and a specific module for the SPI transport
           is called lis3lv02d_spi.
 
+config SENSORS_LIS3_I2C
+        tristate "STMicroeletronics LIS3LV02Dx three-axis digital accelerometer (I2C)"
+        depends on I2C && INPUT
+        select INPUT_POLLDEV
+        default n
+        help
+          This driver provides support for the LIS3LV02Dx accelerometer connected
+          via I2C. The accelerometer data is readable via
+          /sys/devices/platform/lis3lv02d.
+
+          This driver also provides an absolute input class device, allowing
+          the device to act as a pinball machine-esque joystick.
+
+          This driver can also be built as modules.  If so, the core module
+          will be called lis3lv02d and a specific module for the I2C transport
+          is called lis3lv02d_i2c.
+
 config SENSORS_APPLESMC
         tristate "Apple SMC (Motion sensor, light sensor, keyboard backlight)"
         depends on INPUT && X86
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 33c2ee105284..450c8e894277 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -53,8 +53,10 @@ obj-$(CONFIG_SENSORS_IBMAEM)	+= ibmaem.o
 obj-$(CONFIG_SENSORS_IBMPEX)    += ibmpex.o
 obj-$(CONFIG_SENSORS_IT87)      += it87.o
 obj-$(CONFIG_SENSORS_K8TEMP)    += k8temp.o
+obj-$(CONFIG_SENSORS_K10TEMP)   += k10temp.o
 obj-$(CONFIG_SENSORS_LIS3LV02D) += lis3lv02d.o hp_accel.o
 obj-$(CONFIG_SENSORS_LIS3_SPI)  += lis3lv02d.o lis3lv02d_spi.o
+obj-$(CONFIG_SENSORS_LIS3_I2C)  += lis3lv02d.o lis3lv02d_i2c.o
 obj-$(CONFIG_SENSORS_LM63)      += lm63.o
 obj-$(CONFIG_SENSORS_LM70)      += lm70.o
 obj-$(CONFIG_SENSORS_LM73)      += lm73.o
@@ -87,6 +89,7 @@ obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o
 obj-$(CONFIG_SENSORS_THMC50)    += thmc50.o
 obj-$(CONFIG_SENSORS_TMP401)    += tmp401.o
 obj-$(CONFIG_SENSORS_TMP421)    += tmp421.o
+obj-$(CONFIG_SENSORS_VIA_CPUTEMP)+= via-cputemp.o
 obj-$(CONFIG_SENSORS_VIA686A)   += via686a.o
 obj-$(CONFIG_SENSORS_VT1211)    += vt1211.o
 obj-$(CONFIG_SENSORS_VT8231)    += vt8231.o
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
new file mode 100644
index 000000000000..d8a26d16d948
--- /dev/null
+++ b/drivers/hwmon/k10temp.c
@@ -0,0 +1,197 @@
+/*
+ * k10temp.c - AMD Family 10h/11h processor hardware monitoring
+ *
+ * Copyright (c) 2009 Clemens Ladisch <clemens@ladisch.de>
+ *
+ *
+ * This driver is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This driver is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this driver; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/err.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <asm/processor.h>
+
+MODULE_DESCRIPTION("AMD Family 10h/11h CPU core temperature monitor");
+MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
+MODULE_LICENSE("GPL");
+
+static bool force;
+module_param(force, bool, 0444);
+MODULE_PARM_DESC(force, "force loading on processors with erratum 319");
+
+#define REG_HARDWARE_THERMAL_CONTROL    0x64
+#define  HTC_ENABLE                     0x00000001
+
+#define REG_REPORTED_TEMPERATURE        0xa4
+
+#define REG_NORTHBRIDGE_CAPABILITIES    0xe8
+#define  NB_CAP_HTC                     0x00000400
+
+static ssize_t show_temp(struct device *dev,
+                         struct device_attribute *attr, char *buf)
+{
+        u32 regval;
+
+        pci_read_config_dword(to_pci_dev(dev),
+                              REG_REPORTED_TEMPERATURE, &regval);
+        return sprintf(buf, "%u\n", (regval >> 21) * 125);
+}
+
+static ssize_t show_temp_max(struct device *dev,
+                             struct device_attribute *attr, char *buf)
+{
+        return sprintf(buf, "%d\n", 70 * 1000);
+}
+
+static ssize_t show_temp_crit(struct device *dev,
+                              struct device_attribute *devattr, char *buf)
+{
+        struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+        int show_hyst = attr->index;
+        u32 regval;
+        int value;
+
+        pci_read_config_dword(to_pci_dev(dev),
+                              REG_HARDWARE_THERMAL_CONTROL, &regval);
+        value = ((regval >> 16) & 0x7f) * 500 + 52000;
+        if (show_hyst)
+                value -= ((regval >> 24) & 0xf) * 500;
+        return sprintf(buf, "%d\n", value);
+}
+
+static ssize_t show_name(struct device *dev,
+                         struct device_attribute *attr, char *buf)
+{
+        return sprintf(buf, "k10temp\n");
+}
+
+static DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL);
+static DEVICE_ATTR(temp1_max, S_IRUGO, show_temp_max, NULL);
+static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 0);
+static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, show_temp_crit, NULL, 1);
+static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
+
+static bool __devinit has_erratum_319(void)
+{
+        /*
+         * Erratum 319: The thermal sensor of older Family 10h processors
+         *              (B steppings) may be unreliable.
+         */
+        return boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model <= 2;
+}
+
+static int __devinit k10temp_probe(struct pci_dev *pdev,
+                                   const struct pci_device_id *id)
+{
+        struct device *hwmon_dev;
+        u32 reg_caps, reg_htc;
+        int err;
+
+        if (has_erratum_319() && !force) {
+                dev_err(&pdev->dev,
+                        "unreliable CPU thermal sensor; monitoring disabled\n");
+                err = -ENODEV;
+                goto exit;
+        }
+
+        err = device_create_file(&pdev->dev, &dev_attr_temp1_input);
+        if (err)
+                goto exit;
+        err = device_create_file(&pdev->dev, &dev_attr_temp1_max);
+        if (err)
+                goto exit_remove;
+
+        pci_read_config_dword(pdev, REG_NORTHBRIDGE_CAPABILITIES, &reg_caps);
+        pci_read_config_dword(pdev, REG_HARDWARE_THERMAL_CONTROL, &reg_htc);
+        if ((reg_caps & NB_CAP_HTC) && (reg_htc & HTC_ENABLE)) {
+                err = device_create_file(&pdev->dev,
+                                &sensor_dev_attr_temp1_crit.dev_attr);
+                if (err)
+                        goto exit_remove;
+                err = device_create_file(&pdev->dev,
+                                &sensor_dev_attr_temp1_crit_hyst.dev_attr);
+                if (err)
+                        goto exit_remove;
+        }
+
+        err = device_create_file(&pdev->dev, &dev_attr_name);
+        if (err)
+                goto exit_remove;
+
+        hwmon_dev = hwmon_device_register(&pdev->dev);
+        if (IS_ERR(hwmon_dev)) {
+                err = PTR_ERR(hwmon_dev);
+                goto exit_remove;
+        }
+        dev_set_drvdata(&pdev->dev, hwmon_dev);
+
+        if (has_erratum_319() && force)
+                dev_warn(&pdev->dev,
+                         "unreliable CPU thermal sensor; check erratum 319\n");
+        return 0;
+
+exit_remove:
+        device_remove_file(&pdev->dev, &dev_attr_name);
+        device_remove_file(&pdev->dev, &dev_attr_temp1_input);
+        device_remove_file(&pdev->dev, &dev_attr_temp1_max);
+        device_remove_file(&pdev->dev,
+                           &sensor_dev_attr_temp1_crit.dev_attr);
+        device_remove_file(&pdev->dev,
+                           &sensor_dev_attr_temp1_crit_hyst.dev_attr);
+exit:
+        return err;
+}
+
+static void __devexit k10temp_remove(struct pci_dev *pdev)
+{
+        hwmon_device_unregister(dev_get_drvdata(&pdev->dev));
+        device_remove_file(&pdev->dev, &dev_attr_name);
+        device_remove_file(&pdev->dev, &dev_attr_temp1_input);
+        device_remove_file(&pdev->dev, &dev_attr_temp1_max);
+        device_remove_file(&pdev->dev,
+                           &sensor_dev_attr_temp1_crit.dev_attr);
+        device_remove_file(&pdev->dev,
+                           &sensor_dev_attr_temp1_crit_hyst.dev_attr);
+        dev_set_drvdata(&pdev->dev, NULL);
+}
+
+static struct pci_device_id k10temp_id_table[] = {
+        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
+        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) },
+        {}
+};
+MODULE_DEVICE_TABLE(pci, k10temp_id_table);
+
+static struct pci_driver k10temp_driver = {
+        .name = "k10temp",
+        .id_table = k10temp_id_table,
+        .probe = k10temp_probe,
+        .remove = __devexit_p(k10temp_remove),
+};
+
+static int __init k10temp_init(void)
+{
+        return pci_register_driver(&k10temp_driver);
+}
+
+static void __exit k10temp_exit(void)
+{
+        pci_unregister_driver(&k10temp_driver);
+}
+
+module_init(k10temp_init)
+module_exit(k10temp_exit)
diff --git a/drivers/hwmon/lis3lv02d_i2c.c b/drivers/hwmon/lis3lv02d_i2c.c
new file mode 100644
index 000000000000..dc1f5402c1d7
--- /dev/null
+++ b/drivers/hwmon/lis3lv02d_i2c.c
@@ -0,0 +1,183 @@
+/*
+ * drivers/hwmon/lis3lv02d_i2c.c
+ *
+ * Implements I2C interface for lis3lv02d (STMicroelectronics) accelerometer.
+ * Driver is based on corresponding SPI driver written by Daniel Mack
+ * (lis3lv02d_spi.c (C) 2009 Daniel Mack <daniel@caiaq.de> ).
+ *
+ * Copyright (C) 2009 Nokia Corporation and/or its subsidiary(-ies).
+ *
+ * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include "lis3lv02d.h"
+
+#define DRV_NAME        "lis3lv02d_i2c"
+
+static inline s32 lis3_i2c_write(struct lis3lv02d *lis3, int reg, u8 value)
+{
+        struct i2c_client *c = lis3->bus_priv;
+        return i2c_smbus_write_byte_data(c, reg, value);
+}
+
+static inline s32 lis3_i2c_read(struct lis3lv02d *lis3, int reg, u8 *v)
+{
+        struct i2c_client *c = lis3->bus_priv;
+        *v = i2c_smbus_read_byte_data(c, reg);
+        return 0;
+}
+
+static int lis3_i2c_init(struct lis3lv02d *lis3)
+{
+        u8 reg;
+        int ret;
+
+        /* power up the device */
+        ret = lis3->read(lis3, CTRL_REG1, &reg);
+        if (ret < 0)
+                return ret;
+
+        reg |= CTRL1_PD0;
+        return lis3->write(lis3, CTRL_REG1, reg);
+}
+
+/* Default axis mapping but it can be overwritten by platform data */
+static struct axis_conversion lis3lv02d_axis_map = { LIS3_DEV_X,
+                                                     LIS3_DEV_Y,
+                                                     LIS3_DEV_Z };
+
+static int __devinit lis3lv02d_i2c_probe(struct i2c_client *client,
+                                        const struct i2c_device_id *id)
+{
+        int ret = 0;
+        struct lis3lv02d_platform_data *pdata = client->dev.platform_data;
+
+        if (pdata) {
+                if (pdata->axis_x)
+                        lis3lv02d_axis_map.x = pdata->axis_x;
+
+                if (pdata->axis_y)
+                        lis3lv02d_axis_map.y = pdata->axis_y;
+
+                if (pdata->axis_z)
+                        lis3lv02d_axis_map.z = pdata->axis_z;
+
+                if (pdata->setup_resources)
+                        ret = pdata->setup_resources();
+
+                if (ret)
+                        goto fail;
+        }
+
+        lis3_dev.pdata    = pdata;
+        lis3_dev.bus_priv = client;
+        lis3_dev.init     = lis3_i2c_init;
+        lis3_dev.read     = lis3_i2c_read;
+        lis3_dev.write    = lis3_i2c_write;
+        lis3_dev.irq      = client->irq;
+        lis3_dev.ac       = lis3lv02d_axis_map;
+
+        i2c_set_clientdata(client, &lis3_dev);
+        ret = lis3lv02d_init_device(&lis3_dev);
+fail:
+        return ret;
+}
+
+static int __devexit lis3lv02d_i2c_remove(struct i2c_client *client)
+{
+        struct lis3lv02d *lis3 = i2c_get_clientdata(client);
+        struct lis3lv02d_platform_data *pdata = client->dev.platform_data;
+
+        if (pdata && pdata->release_resources)
+                pdata->release_resources();
+
+        lis3lv02d_joystick_disable();
+        lis3lv02d_poweroff(lis3);
+
+        return lis3lv02d_remove_fs(&lis3_dev);
+}
+
+#ifdef CONFIG_PM
+static int lis3lv02d_i2c_suspend(struct i2c_client *client, pm_message_t mesg)
+{
+        struct lis3lv02d *lis3 = i2c_get_clientdata(client);
+
+        if (!lis3->pdata->wakeup_flags)
+                lis3lv02d_poweroff(lis3);
+        return 0;
+}
+
+static int lis3lv02d_i2c_resume(struct i2c_client *client)
+{
+        struct lis3lv02d *lis3 = i2c_get_clientdata(client);
+
+        if (!lis3->pdata->wakeup_flags)
+                lis3lv02d_poweron(lis3);
+        return 0;
+}
+
+static void lis3lv02d_i2c_shutdown(struct i2c_client *client)
+{
+        lis3lv02d_i2c_suspend(client, PMSG_SUSPEND);
+}
+#else
+#define lis3lv02d_i2c_suspend   NULL
+#define lis3lv02d_i2c_resume    NULL
+#define lis3lv02d_i2c_shutdown  NULL
+#endif
+
+static const struct i2c_device_id lis3lv02d_id[] = {
+        {"lis3lv02d", 0 },
+        {}
+};
+
+MODULE_DEVICE_TABLE(i2c, lis3lv02d_id);
+
+static struct i2c_driver lis3lv02d_i2c_driver = {
+        .driver  = {
+                .name   = DRV_NAME,
+                .owner  = THIS_MODULE,
+        },
+        .suspend = lis3lv02d_i2c_suspend,
+        .shutdown = lis3lv02d_i2c_shutdown,
+        .resume = lis3lv02d_i2c_resume,
+        .probe  = lis3lv02d_i2c_probe,
+        .remove = __devexit_p(lis3lv02d_i2c_remove),
+        .id_table = lis3lv02d_id,
+};
+
+static int __init lis3lv02d_init(void)
+{
+        return i2c_add_driver(&lis3lv02d_i2c_driver);
+}
+
+static void __exit lis3lv02d_exit(void)
+{
+        i2c_del_driver(&lis3lv02d_i2c_driver);
+}
+
+MODULE_AUTHOR("Nokia Corporation");
+MODULE_DESCRIPTION("lis3lv02d I2C interface");
+MODULE_LICENSE("GPL");
+
+module_init(lis3lv02d_init);
+module_exit(lis3lv02d_exit);
diff --git a/drivers/hwmon/sht15.c b/drivers/hwmon/sht15.c
index ebe38b680ee3..864a371f6eb9 100644
--- a/drivers/hwmon/sht15.c
+++ b/drivers/hwmon/sht15.c
@@ -305,7 +305,7 @@ static inline int sht15_calc_temp(struct sht15_data *data)
         int d1 = 0;
         int i;
 
-        for (i = 1; i < ARRAY_SIZE(temppoints) - 1; i++)
+        for (i = 1; i < ARRAY_SIZE(temppoints); i++)
                 /* Find pointer to interpolate */
                 if (data->supply_uV > temppoints[i - 1].vdd) {
                         d1 = (data->supply_uV/1000 - temppoints[i - 1].vdd)
@@ -332,12 +332,12 @@ static inline int sht15_calc_humid(struct sht15_data *data)
 
         const int c1 = -4;
         const int c2 = 40500; /* x 10 ^ -6 */
-        const int c3 = 2800; /* x10 ^ -9 */
+        const int c3 = -2800; /* x10 ^ -9 */
 
         RHlinear = c1*1000
                 + c2 * data->val_humid/1000
                 + (data->val_humid * data->val_humid * c3)/1000000;
-        return (temp - 25000) * (10000 + 800 * data->val_humid)
+        return (temp - 25000) * (10000 + 80 * data->val_humid)
                 / 1000000 + RHlinear;
 }
 
diff --git a/drivers/hwmon/smsc47m1.c b/drivers/hwmon/smsc47m1.c
index 8ad50fdba00d..9ca97818bd4b 100644
--- a/drivers/hwmon/smsc47m1.c
+++ b/drivers/hwmon/smsc47m1.c
@@ -136,11 +136,11 @@ struct smsc47m1_data {
 
 struct smsc47m1_sio_data {
         enum chips type;
+        u8 activate;            /* Remember initial device state */
 };
 
 
-static int smsc47m1_probe(struct platform_device *pdev);
-static int __devexit smsc47m1_remove(struct platform_device *pdev);
+static int __exit smsc47m1_remove(struct platform_device *pdev);
 static struct smsc47m1_data *smsc47m1_update_device(struct device *dev,
                 int init);
 
@@ -160,8 +160,7 @@ static struct platform_driver smsc47m1_driver = {
                 .owner  = THIS_MODULE,
                 .name   = DRVNAME,
         },
-        .probe          = smsc47m1_probe,
-        .remove         = __devexit_p(smsc47m1_remove),
+        .remove         = __exit_p(smsc47m1_remove),
 };
 
 static ssize_t get_fan(struct device *dev, struct device_attribute
@@ -470,24 +469,126 @@ static int __init smsc47m1_find(unsigned short *addr,
         superio_select();
         *addr = (superio_inb(SUPERIO_REG_BASE) << 8)
               |  superio_inb(SUPERIO_REG_BASE + 1);
-        val = superio_inb(SUPERIO_REG_ACT);
-        if (*addr == 0 || (val & 0x01) == 0) {
-                pr_info(DRVNAME ": Device is disabled, will not use\n");
+        if (*addr == 0) {
+                pr_info(DRVNAME ": Device address not set, will not use\n");
                 superio_exit();
                 return -ENODEV;
         }
 
+        /* Enable only if address is set (needed at least on the
+         * Compaq Presario S4000NX) */
+        sio_data->activate = superio_inb(SUPERIO_REG_ACT);
+        if ((sio_data->activate & 0x01) == 0) {
+                pr_info(DRVNAME ": Enabling device\n");
+                superio_outb(SUPERIO_REG_ACT, sio_data->activate | 0x01);
+        }
+
         superio_exit();
         return 0;
 }
 
-static int __devinit smsc47m1_probe(struct platform_device *pdev)
+/* Restore device to its initial state */
+static void __init smsc47m1_restore(const struct smsc47m1_sio_data *sio_data)
+{
+        if ((sio_data->activate & 0x01) == 0) {
+                superio_enter();
+                superio_select();
+
+                pr_info(DRVNAME ": Disabling device\n");
+                superio_outb(SUPERIO_REG_ACT, sio_data->activate);
+
+                superio_exit();
+        }
+}
+
+#define CHECK           1
+#define REQUEST         2
+#define RELEASE         3
+
+/*
+ * This function can be used to:
+ *  - test for resource conflicts with ACPI
+ *  - request the resources
+ *  - release the resources
+ * We only allocate the I/O ports we really need, to minimize the risk of
+ * conflicts with ACPI or with other drivers.
+ */
+static int smsc47m1_handle_resources(unsigned short address, enum chips type,
+                                     int action, struct device *dev)
+{
+        static const u8 ports_m1[] = {
+                /* register, region length */
+                0x04, 1,
+                0x33, 4,
+                0x56, 7,
+        };
+
+        static const u8 ports_m2[] = {
+                /* register, region length */
+                0x04, 1,
+                0x09, 1,
+                0x2c, 2,
+                0x35, 4,
+                0x56, 7,
+                0x69, 4,
+        };
+
+        int i, ports_size, err;
+        const u8 *ports;
+
+        switch (type) {
+        case smsc47m1:
+        default:
+                ports = ports_m1;
+                ports_size = ARRAY_SIZE(ports_m1);
+                break;
+        case smsc47m2:
+                ports = ports_m2;
+                ports_size = ARRAY_SIZE(ports_m2);
+                break;
+        }
+
+        for (i = 0; i + 1 < ports_size; i += 2) {
+                unsigned short start = address + ports[i];
+                unsigned short len = ports[i + 1];
+
+                switch (action) {
+                case CHECK:
+                        /* Only check for conflicts */
+                        err = acpi_check_region(start, len, DRVNAME);
+                        if (err)
+                                return err;
+                        break;
+                case REQUEST:
+                        /* Request the resources */
+                        if (!request_region(start, len, DRVNAME)) {
+                                dev_err(dev, "Region 0x%hx-0x%hx already in "
+                                        "use!\n", start, start + len);
+
+                                /* Undo all requests */
+                                for (i -= 2; i >= 0; i -= 2)
+                                        release_region(address + ports[i],
+                                                       ports[i + 1]);
+                                return -EBUSY;
+                        }
+                        break;
+                case RELEASE:
+                        /* Release the resources */
+                        release_region(start, len);
+                        break;
+                }
+        }
+
+        return 0;
+}
+
+static int __init smsc47m1_probe(struct platform_device *pdev)
 {
         struct device *dev = &pdev->dev;
         struct smsc47m1_sio_data *sio_data = dev->platform_data;
         struct smsc47m1_data *data;
         struct resource *res;
-        int err = 0;
+        int err;
         int fan1, fan2, fan3, pwm1, pwm2, pwm3;
 
         static const char *names[] = {
@@ -496,12 +597,10 @@ static int __devinit smsc47m1_probe(struct platform_device *pdev)
         };
 
         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
-        if (!request_region(res->start, SMSC_EXTENT, DRVNAME)) {
-                dev_err(dev, "Region 0x%lx-0x%lx already in use!\n",
-                        (unsigned long)res->start,
-                        (unsigned long)res->end);
-                return -EBUSY;
-        }
+        err = smsc47m1_handle_resources(res->start, sio_data->type,
+                                        REQUEST, dev);
+        if (err < 0)
+                return err;
 
         if (!(data = kzalloc(sizeof(struct smsc47m1_data), GFP_KERNEL))) {
                 err = -ENOMEM;
@@ -637,11 +736,11 @@ error_free:
         platform_set_drvdata(pdev, NULL);
         kfree(data);
 error_release:
-        release_region(res->start, SMSC_EXTENT);
+        smsc47m1_handle_resources(res->start, sio_data->type, RELEASE, dev);
         return err;
 }
 
-static int __devexit smsc47m1_remove(struct platform_device *pdev)
+static int __exit smsc47m1_remove(struct platform_device *pdev)
 {
         struct smsc47m1_data *data = platform_get_drvdata(pdev);
         struct resource *res;
@@ -650,7 +749,7 @@ static int __devexit smsc47m1_remove(struct platform_device *pdev)
         sysfs_remove_group(&pdev->dev.kobj, &smsc47m1_group);
 
         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
-        release_region(res->start, SMSC_EXTENT);
+        smsc47m1_handle_resources(res->start, data->type, RELEASE, &pdev->dev);
         platform_set_drvdata(pdev, NULL);
         kfree(data);
 
@@ -717,7 +816,7 @@ static int __init smsc47m1_device_add(unsigned short address,
         };
         int err;
 
-        err = acpi_check_resource_conflict(&res);
+        err = smsc47m1_handle_resources(address, sio_data->type, CHECK, NULL);
         if (err)
                 goto exit;
 
@@ -766,27 +865,29 @@ static int __init sm_smsc47m1_init(void)
         if (smsc47m1_find(&address, &sio_data))
                 return -ENODEV;
 
-        err = platform_driver_register(&smsc47m1_driver);
+        /* Sets global pdev as a side effect */
+        err = smsc47m1_device_add(address, &sio_data);
         if (err)
                 goto exit;
 
-        /* Sets global pdev as a side effect */
-        err = smsc47m1_device_add(address, &sio_data);
+        err = platform_driver_probe(&smsc47m1_driver, smsc47m1_probe);
         if (err)
-                goto exit_driver;
+                goto exit_device;
 
         return 0;
 
-exit_driver:
-        platform_driver_unregister(&smsc47m1_driver);
+exit_device:
+        platform_device_unregister(pdev);
+        smsc47m1_restore(&sio_data);
 exit:
         return err;
 }
 
 static void __exit sm_smsc47m1_exit(void)
 {
-        platform_device_unregister(pdev);
         platform_driver_unregister(&smsc47m1_driver);
+        smsc47m1_restore(pdev->dev.platform_data);
+        platform_device_unregister(pdev);
 }
 
 MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>");
diff --git a/drivers/hwmon/via-cputemp.c b/drivers/hwmon/via-cputemp.c
new file mode 100644
index 000000000000..7442cf754856
--- /dev/null
+++ b/drivers/hwmon/via-cputemp.c
@@ -0,0 +1,356 @@
+/*
+ * via-cputemp.c - Driver for VIA CPU core temperature monitoring
+ * Copyright (C) 2009 VIA Technologies, Inc.
+ *
+ * based on existing coretemp.c, which is
+ *
+ * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301 USA.
+ */
+
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/hwmon.h>
+#include <linux/sysfs.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/list.h>
+#include <linux/platform_device.h>
+#include <linux/cpu.h>
+#include <asm/msr.h>
+#include <asm/processor.h>
+
+#define DRVNAME "via_cputemp"
+
+enum { SHOW_TEMP, SHOW_LABEL, SHOW_NAME } SHOW;
+
+/*
+ * Functions declaration
+ */
+
+struct via_cputemp_data {
+        struct device *hwmon_dev;
+        const char *name;
+        u32 id;
+        u32 msr;
+};
+
+/*
+ * Sysfs stuff
+ */
+
+static ssize_t show_name(struct device *dev, struct device_attribute
+                          *devattr, char *buf)
+{
+        int ret;
+        struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+        struct via_cputemp_data *data = dev_get_drvdata(dev);
+
+        if (attr->index == SHOW_NAME)
+                ret = sprintf(buf, "%s\n", data->name);
+        else    /* show label */
+                ret = sprintf(buf, "Core %d\n", data->id);
+        return ret;
+}
+
+static ssize_t show_temp(struct device *dev,
+                         struct device_attribute *devattr, char *buf)
+{
+        struct via_cputemp_data *data = dev_get_drvdata(dev);
+        u32 eax, edx;
+        int err;
+
+        err = rdmsr_safe_on_cpu(data->id, data->msr, &eax, &edx);
+        if (err)
+                return -EAGAIN;
+
+        return sprintf(buf, "%lu\n", ((unsigned long)eax & 0xffffff) * 1000);
+}
+
+static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL,
+                          SHOW_TEMP);
+static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_name, NULL, SHOW_LABEL);
+static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, SHOW_NAME);
+
+static struct attribute *via_cputemp_attributes[] = {
+        &sensor_dev_attr_name.dev_attr.attr,
+        &sensor_dev_attr_temp1_label.dev_attr.attr,
+        &sensor_dev_attr_temp1_input.dev_attr.attr,
+        NULL
+};
+
+static const struct attribute_group via_cputemp_group = {
+        .attrs = via_cputemp_attributes,
+};
+
+static int __devinit via_cputemp_probe(struct platform_device *pdev)
+{
+        struct via_cputemp_data *data;
+        struct cpuinfo_x86 *c = &cpu_data(pdev->id);
+        int err;
+        u32 eax, edx;
+
+        data = kzalloc(sizeof(struct via_cputemp_data), GFP_KERNEL);
+        if (!data) {
+                err = -ENOMEM;
+                dev_err(&pdev->dev, "Out of memory\n");
+                goto exit;
+        }
+
+        data->id = pdev->id;
+        data->name = "via_cputemp";
+
+        switch (c->x86_model) {
+        case 0xA:
+                /* C7 A */
+        case 0xD:
+                /* C7 D */
+                data->msr = 0x1169;
+                break;
+        case 0xF:
+                /* Nano */
+                data->msr = 0x1423;
+                break;
+        default:
+                err = -ENODEV;
+                goto exit_free;
+        }
+
+        /* test if we can access the TEMPERATURE MSR */
+        err = rdmsr_safe_on_cpu(data->id, data->msr, &eax, &edx);
+        if (err) {
+                dev_err(&pdev->dev,
+                        "Unable to access TEMPERATURE MSR, giving up\n");
+                goto exit_free;
+        }
+
+        platform_set_drvdata(pdev, data);
+
+        err = sysfs_create_group(&pdev->dev.kobj, &via_cputemp_group);
+        if (err)
+                goto exit_free;
+
+        data->hwmon_dev = hwmon_device_register(&pdev->dev);
+        if (IS_ERR(data->hwmon_dev)) {
+                err = PTR_ERR(data->hwmon_dev);
+                dev_err(&pdev->dev, "Class registration failed (%d)\n",
+                        err);
+                goto exit_remove;
+        }
+
+        return 0;
+
+exit_remove:
+        sysfs_remove_group(&pdev->dev.kobj, &via_cputemp_group);
+exit_free:
+        platform_set_drvdata(pdev, NULL);
+        kfree(data);
+exit:
+        return err;
+}
+
+static int __devexit via_cputemp_remove(struct platform_device *pdev)
+{
+        struct via_cputemp_data *data = platform_get_drvdata(pdev);
+
+        hwmon_device_unregister(data->hwmon_dev);
+        sysfs_remove_group(&pdev->dev.kobj, &via_cputemp_group);
+        platform_set_drvdata(pdev, NULL);
+        kfree(data);
+        return 0;
+}
+
+static struct platform_driver via_cputemp_driver = {
+        .driver = {
+                .owner = THIS_MODULE,
+                .name = DRVNAME,
+        },
+        .probe = via_cputemp_probe,
+        .remove = __devexit_p(via_cputemp_remove),
+};
+
+struct pdev_entry {
+        struct list_head list;
+        struct platform_device *pdev;
+        unsigned int cpu;
+};
+
+static LIST_HEAD(pdev_list);
+static DEFINE_MUTEX(pdev_list_mutex);
+
+static int __cpuinit via_cputemp_device_add(unsigned int cpu)
+{
+        int err;
+        struct platform_device *pdev;
+        struct pdev_entry *pdev_entry;
+
+        pdev = platform_device_alloc(DRVNAME, cpu);
+        if (!pdev) {
+                err = -ENOMEM;
+                printk(KERN_ERR DRVNAME ": Device allocation failed\n");
+                goto exit;
+        }
+
+        pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
+        if (!pdev_entry) {
+                err = -ENOMEM;
+                goto exit_device_put;
+        }
+
+        err = platform_device_add(pdev);
+        if (err) {
+                printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
+                       err);
+                goto exit_device_free;
+        }
+
+        pdev_entry->pdev = pdev;
+        pdev_entry->cpu = cpu;
+        mutex_lock(&pdev_list_mutex);
+        list_add_tail(&pdev_entry->list, &pdev_list);
+        mutex_unlock(&pdev_list_mutex);
+
+        return 0;
+
+exit_device_free:
+        kfree(pdev_entry);
+exit_device_put:
+        platform_device_put(pdev);
+exit:
+        return err;
+}
+
+#ifdef CONFIG_HOTPLUG_CPU
+static void via_cputemp_device_remove(unsigned int cpu)
+{
+        struct pdev_entry *p, *n;
+        mutex_lock(&pdev_list_mutex);
+        list_for_each_entry_safe(p, n, &pdev_list, list) {
+                if (p->cpu == cpu) {
+                        platform_device_unregister(p->pdev);
+                        list_del(&p->list);
+                        kfree(p);
+                }
+        }
+        mutex_unlock(&pdev_list_mutex);
+}
+
+static int __cpuinit via_cputemp_cpu_callback(struct notifier_block *nfb,
+                                 unsigned long action, void *hcpu)
+{
+        unsigned int cpu = (unsigned long) hcpu;
+
+        switch (action) {
+        case CPU_ONLINE:
+        case CPU_DOWN_FAILED:
+                via_cputemp_device_add(cpu);
+                break;
+        case CPU_DOWN_PREPARE:
+                via_cputemp_device_remove(cpu);
+                break;
+        }
+        return NOTIFY_OK;
+}
+
+static struct notifier_block via_cputemp_cpu_notifier __refdata = {
+        .notifier_call = via_cputemp_cpu_callback,
+};
+#endif                          /* !CONFIG_HOTPLUG_CPU */
+
+static int __init via_cputemp_init(void)
+{
+        int i, err;
+        struct pdev_entry *p, *n;
+
+        if (cpu_data(0).x86_vendor != X86_VENDOR_CENTAUR) {
+                printk(KERN_DEBUG DRVNAME ": Not a VIA CPU\n");
+                err = -ENODEV;
+                goto exit;
+        }
+
+        err = platform_driver_register(&via_cputemp_driver);
+        if (err)
+                goto exit;
+
+        for_each_online_cpu(i) {
+                struct cpuinfo_x86 *c = &cpu_data(i);
+
+                if (c->x86 != 6)
+                        continue;
+
+                if (c->x86_model < 0x0a)
+                        continue;
+
+                if (c->x86_model > 0x0f) {
+                        printk(KERN_WARNING DRVNAME ": Unknown CPU "
+                                "model 0x%x\n", c->x86_model);
+                        continue;
+                }
+
+                err = via_cputemp_device_add(i);
+                if (err)
+                        goto exit_devices_unreg;
+        }
+        if (list_empty(&pdev_list)) {
+                err = -ENODEV;
+                goto exit_driver_unreg;
+        }
+
+#ifdef CONFIG_HOTPLUG_CPU
+        register_hotcpu_notifier(&via_cputemp_cpu_notifier);
+#endif
+        return 0;
+
+exit_devices_unreg:
+        mutex_lock(&pdev_list_mutex);
+        list_for_each_entry_safe(p, n, &pdev_list, list) {
+                platform_device_unregister(p->pdev);
+                list_del(&p->list);
+                kfree(p);
+        }
+        mutex_unlock(&pdev_list_mutex);
+exit_driver_unreg:
+        platform_driver_unregister(&via_cputemp_driver);
+exit:
+        return err;
+}
+
+static void __exit via_cputemp_exit(void)
+{
+        struct pdev_entry *p, *n;
+#ifdef CONFIG_HOTPLUG_CPU
+        unregister_hotcpu_notifier(&via_cputemp_cpu_notifier);
+#endif
+        mutex_lock(&pdev_list_mutex);
+        list_for_each_entry_safe(p, n, &pdev_list, list) {
+                platform_device_unregister(p->pdev);
+                list_del(&p->list);
+                kfree(p);
+        }
+        mutex_unlock(&pdev_list_mutex);
+        platform_driver_unregister(&via_cputemp_driver);
+}
+
+MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>");
+MODULE_DESCRIPTION("VIA CPU temperature monitor");
+MODULE_LICENSE("GPL");
+
+module_init(via_cputemp_init)
+module_exit(via_cputemp_exit)
diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c
index b257c7223733..38e280523071 100644
--- a/drivers/hwmon/w83627hf.c
+++ b/drivers/hwmon/w83627hf.c
@@ -1135,6 +1135,7 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
                 "W83687THF",
         };
 
+        sio_data->sioaddr = sioaddr;
         superio_enter(sio_data);
         val = force_id ? force_id : superio_inb(sio_data, DEVID);
         switch (val) {
@@ -1177,7 +1178,6 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
         }
 
         err = 0;
-        sio_data->sioaddr = sioaddr;
         pr_info(DRVNAME ": Found %s chip at %#x\n",
                 names[sio_data->type], *addr);
 
diff --git a/drivers/idle/i7300_idle.c b/drivers/idle/i7300_idle.c
index 1f20a042a4f5..dd253002cd50 100644
--- a/drivers/idle/i7300_idle.c
+++ b/drivers/idle/i7300_idle.c
@@ -81,7 +81,7 @@ static u8 i7300_idle_thrtctl_saved;
 static u8 i7300_idle_thrtlow_saved;
 static u32 i7300_idle_mc_saved;
 
-static cpumask_t idle_cpumask;
+static cpumask_var_t idle_cpumask;
 static ktime_t start_ktime;
 static unsigned long avg_idle_us;
 
@@ -459,9 +459,9 @@ static int i7300_idle_notifier(struct notifier_block *nb, unsigned long val,
         spin_lock_irqsave(&i7300_idle_lock, flags);
         if (val == IDLE_START) {
 
-                cpu_set(smp_processor_id(), idle_cpumask);
+                cpumask_set_cpu(smp_processor_id(), idle_cpumask);
 
-                if (cpus_weight(idle_cpumask) != num_online_cpus())
+                if (cpumask_weight(idle_cpumask) != num_online_cpus())
                         goto end;
 
                 now_ktime = ktime_get();
@@ -478,8 +478,8 @@ static int i7300_idle_notifier(struct notifier_block *nb, unsigned long val,
                 i7300_idle_ioat_start();
 
         } else if (val == IDLE_END) {
-                cpu_clear(smp_processor_id(), idle_cpumask);
-                if (cpus_weight(idle_cpumask) == (num_online_cpus() - 1)) {
+                cpumask_clear_cpu(smp_processor_id(), idle_cpumask);
+                if (cpumask_weight(idle_cpumask) == (num_online_cpus() - 1)) {
                         /* First CPU coming out of idle */
                         u64 idle_duration_us;
 
@@ -553,7 +553,6 @@ struct debugfs_file_info {
 static int __init i7300_idle_init(void)
 {
         spin_lock_init(&i7300_idle_lock);
-        cpus_clear(idle_cpumask);
         total_us = 0;
 
         if (i7300_idle_platform_probe(&fbd_dev, &ioat_dev, forceload))
@@ -565,6 +564,9 @@ static int __init i7300_idle_init(void)
         if (i7300_idle_ioat_init())
                 return -ENODEV;
 
+        if (!zalloc_cpumask_var(&idle_cpumask, GFP_KERNEL))
+                return -ENOMEM;
+
         debugfs_dir = debugfs_create_dir("i7300_idle", NULL);
         if (debugfs_dir) {
                 int i = 0;
@@ -589,6 +591,7 @@ static int __init i7300_idle_init(void)
 static void __exit i7300_idle_exit(void)
 {
         idle_notifier_unregister(&i7300_idle_nb);
+        free_cpumask_var(idle_cpumask);
 
         if (debugfs_dir) {
                 int i = 0;
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index e4f599f20e38..8a0e1ec95e4a 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -229,6 +229,12 @@ config LEDS_PWM
         help
           This option enables support for pwm driven LEDs
 
+config LEDS_REGULATOR
+        tristate "REGULATOR driven LED support"
+        depends on LEDS_CLASS && REGULATOR
+        help
+          This option enables support for regulator driven LEDs.
+
 config LEDS_BD2802
         tristate "LED driver for BD2802 RGB LED"
         depends on LEDS_CLASS && I2C
@@ -236,6 +242,33 @@ config LEDS_BD2802
           This option enables support for BD2802GU RGB LED driver chips
           accessed via the I2C bus.
 
+config LEDS_INTEL_SS4200
+        tristate "LED driver for Intel NAS SS4200 series"
+        depends on LEDS_CLASS && PCI && DMI
+        help
+          This option enables support for the Intel SS4200 series of
+          Network Attached Storage servers.  You may control the hard
+          drive or power LEDs on the front panel.  Using this driver
+          can stop the front LED from blinking after startup.
+
+config LEDS_LT3593
+        tristate "LED driver for LT3593 controllers"
+        depends on LEDS_CLASS && GENERIC_GPIO
+        help
+          This option enables support for LEDs driven by a Linear Technology
+          LT3593 controller. This controller uses a special one-wire pulse
+          coding protocol to set the brightness.
+
+config LEDS_ADP5520
+        tristate "LED Support for ADP5520/ADP5501 PMIC"
+        depends on LEDS_CLASS && PMIC_ADP5520
+        help
+          This option enables support for on-chip LED drivers found
+          on Analog Devices ADP5520/ADP5501 PMICs.
+
+          To compile this driver as a module, choose M here: the module will
+          be called leds-adp5520.
+
 comment "LED Triggers"
 
 config LEDS_TRIGGERS
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index 46d72704d606..9e63869d7c0d 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -29,6 +29,10 @@ obj-$(CONFIG_LEDS_DA903X)		+= leds-da903x.o
 obj-$(CONFIG_LEDS_WM831X_STATUS)        += leds-wm831x-status.o
 obj-$(CONFIG_LEDS_WM8350)               += leds-wm8350.o
 obj-$(CONFIG_LEDS_PWM)                  += leds-pwm.o
+obj-$(CONFIG_LEDS_REGULATOR)            += leds-regulator.o
+obj-$(CONFIG_LEDS_INTEL_SS4200)         += leds-ss4200.o
+obj-$(CONFIG_LEDS_LT3593)               += leds-lt3593.o
+obj-$(CONFIG_LEDS_ADP5520)              += leds-adp5520.o
 
 # LED SPI Drivers
 obj-$(CONFIG_LEDS_DAC124S085)           += leds-dac124s085.o
diff --git a/drivers/leds/leds-adp5520.c b/drivers/leds/leds-adp5520.c
new file mode 100644
index 000000000000..a8f315902131
--- /dev/null
+++ b/drivers/leds/leds-adp5520.c
@@ -0,0 +1,230 @@
+/*
+ * LEDs driver for Analog Devices ADP5520/ADP5501 MFD PMICs
+ *
+ * Copyright 2009 Analog Devices Inc.
+ *
+ * Loosely derived from leds-da903x:
+ * Copyright (C) 2008 Compulab, Ltd.
+ *      Mike Rapoport <mike@compulab.co.il>
+ *
+ * Copyright (C) 2006-2008 Marvell International Ltd.
+ *      Eric Miao <eric.miao@marvell.com>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/workqueue.h>
+#include <linux/mfd/adp5520.h>
+
+struct adp5520_led {
+        struct led_classdev     cdev;
+        struct work_struct      work;
+        struct device           *master;
+        enum led_brightness     new_brightness;
+        int                     id;
+        int                     flags;
+};
+
+static void adp5520_led_work(struct work_struct *work)
+{
+        struct adp5520_led *led = container_of(work, struct adp5520_led, work);
+        adp5520_write(led->master, ADP5520_LED1_CURRENT + led->id - 1,
+                         led->new_brightness >> 2);
+}
+
+static void adp5520_led_set(struct led_classdev *led_cdev,
+                           enum led_brightness value)
+{
+        struct adp5520_led *led;
+
+        led = container_of(led_cdev, struct adp5520_led, cdev);
+        led->new_brightness = value;
+        schedule_work(&led->work);
+}
+
+static int adp5520_led_setup(struct adp5520_led *led)
+{
+        struct device *dev = led->master;
+        int flags = led->flags;
+        int ret = 0;
+
+        switch (led->id) {
+        case FLAG_ID_ADP5520_LED1_ADP5501_LED0:
+                ret |= adp5520_set_bits(dev, ADP5520_LED_TIME,
+                                        (flags >> ADP5520_FLAG_OFFT_SHIFT) &
+                                        ADP5520_FLAG_OFFT_MASK);
+                ret |= adp5520_set_bits(dev, ADP5520_LED_CONTROL,
+                                        ADP5520_LED1_EN);
+                break;
+        case FLAG_ID_ADP5520_LED2_ADP5501_LED1:
+                ret |= adp5520_set_bits(dev,  ADP5520_LED_TIME,
+                                        ((flags >> ADP5520_FLAG_OFFT_SHIFT) &
+                                        ADP5520_FLAG_OFFT_MASK) << 2);
+                ret |= adp5520_clr_bits(dev, ADP5520_LED_CONTROL,
+                                         ADP5520_R3_MODE);
+                ret |= adp5520_set_bits(dev, ADP5520_LED_CONTROL,
+                                        ADP5520_LED2_EN);
+                break;
+        case FLAG_ID_ADP5520_LED3_ADP5501_LED2:
+                ret |= adp5520_set_bits(dev,  ADP5520_LED_TIME,
+                                        ((flags >> ADP5520_FLAG_OFFT_SHIFT) &
+                                        ADP5520_FLAG_OFFT_MASK) << 4);
+                ret |= adp5520_clr_bits(dev, ADP5520_LED_CONTROL,
+                                        ADP5520_C3_MODE);
+                ret |= adp5520_set_bits(dev, ADP5520_LED_CONTROL,
+                                        ADP5520_LED3_EN);
+                break;
+        }
+
+        return ret;
+}
+
+static int __devinit adp5520_led_prepare(struct platform_device *pdev)
+{
+        struct adp5520_leds_platform_data *pdata = pdev->dev.platform_data;
+        struct device *dev = pdev->dev.parent;
+        int ret = 0;
+
+        ret |= adp5520_write(dev, ADP5520_LED1_CURRENT, 0);
+        ret |= adp5520_write(dev, ADP5520_LED2_CURRENT, 0);
+        ret |= adp5520_write(dev, ADP5520_LED3_CURRENT, 0);
+        ret |= adp5520_write(dev, ADP5520_LED_TIME, pdata->led_on_time << 6);
+        ret |= adp5520_write(dev, ADP5520_LED_FADE, FADE_VAL(pdata->fade_in,
+                 pdata->fade_out));
+
+        return ret;
+}
+
+static int __devinit adp5520_led_probe(struct platform_device *pdev)
+{
+        struct adp5520_leds_platform_data *pdata = pdev->dev.platform_data;
+        struct adp5520_led *led, *led_dat;
+        struct led_info *cur_led;
+        int ret, i;
+
+        if (pdata == NULL) {
+                dev_err(&pdev->dev, "missing platform data\n");
+                return -ENODEV;
+        }
+
+        if (pdata->num_leds > ADP5520_01_MAXLEDS) {
+                dev_err(&pdev->dev, "can't handle more than %d LEDS\n",
+                                 ADP5520_01_MAXLEDS);
+                return -EFAULT;
+        }
+
+        led = kzalloc(sizeof(*led) * pdata->num_leds, GFP_KERNEL);
+        if (led == NULL) {
+                dev_err(&pdev->dev, "failed to alloc memory\n");
+                return -ENOMEM;
+        }
+
+        ret = adp5520_led_prepare(pdev);
+
+        if (ret) {
+                dev_err(&pdev->dev, "failed to write\n");
+                goto err_free;
+        }
+
+        for (i = 0; i < pdata->num_leds; ++i) {
+                cur_led = &pdata->leds[i];
+                led_dat = &led[i];
+
+                led_dat->cdev.name = cur_led->name;
+                led_dat->cdev.default_trigger = cur_led->default_trigger;
+                led_dat->cdev.brightness_set = adp5520_led_set;
+                led_dat->cdev.brightness = LED_OFF;
+
+                if (cur_led->flags & ADP5520_FLAG_LED_MASK)
+                        led_dat->flags = cur_led->flags;
+                else
+                        led_dat->flags = i + 1;
+
+                led_dat->id = led_dat->flags & ADP5520_FLAG_LED_MASK;
+
+                led_dat->master = pdev->dev.parent;
+                led_dat->new_brightness = LED_OFF;
+
+                INIT_WORK(&led_dat->work, adp5520_led_work);
+
+                ret = led_classdev_register(led_dat->master, &led_dat->cdev);
+                if (ret) {
+                        dev_err(&pdev->dev, "failed to register LED %d\n",
+                                led_dat->id);
+                        goto err;
+                }
+
+                ret = adp5520_led_setup(led_dat);
+                if (ret) {
+                        dev_err(&pdev->dev, "failed to write\n");
+                        i++;
+                        goto err;
+                }
+        }
+
+        platform_set_drvdata(pdev, led);
+        return 0;
+
+err:
+        if (i > 0) {
+                for (i = i - 1; i >= 0; i--) {
+                        led_classdev_unregister(&led[i].cdev);
+                        cancel_work_sync(&led[i].work);
+                }
+        }
+
+err_free:
+        kfree(led);
+        return ret;
+}
+
+static int __devexit adp5520_led_remove(struct platform_device *pdev)
+{
+        struct adp5520_leds_platform_data *pdata = pdev->dev.platform_data;
+        struct adp5520_led *led;
+        int i;
+
+        led = platform_get_drvdata(pdev);
+
+        adp5520_clr_bits(led->master, ADP5520_LED_CONTROL,
+                 ADP5520_LED1_EN | ADP5520_LED2_EN | ADP5520_LED3_EN);
+
+        for (i = 0; i < pdata->num_leds; i++) {
+                led_classdev_unregister(&led[i].cdev);
+                cancel_work_sync(&led[i].work);
+        }
+
+        kfree(led);
+        return 0;
+}
+
+static struct platform_driver adp5520_led_driver = {
+        .driver = {
+                .name   = "adp5520-led",
+                .owner  = THIS_MODULE,
+        },
+        .probe          = adp5520_led_probe,
+        .remove         = __devexit_p(adp5520_led_remove),
+};
+
+static int __init adp5520_led_init(void)
+{
+        return platform_driver_register(&adp5520_led_driver);
+}
+module_init(adp5520_led_init);
+
+static void __exit adp5520_led_exit(void)
+{
+        platform_driver_unregister(&adp5520_led_driver);
+}
+module_exit(adp5520_led_exit);
+
+MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
+MODULE_DESCRIPTION("LEDS ADP5520(01) Driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:adp5520-led");
diff --git a/drivers/leds/leds-alix2.c b/drivers/leds/leds-alix2.c
index 731d4eef3425..f59ffadf5125 100644
--- a/drivers/leds/leds-alix2.c
+++ b/drivers/leds/leds-alix2.c
@@ -11,11 +11,24 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/string.h>
+#include <linux/pci.h>
 
 static int force = 0;
 module_param(force, bool, 0444);
 MODULE_PARM_DESC(force, "Assume system has ALIX.2/ALIX.3 style LEDs");
 
+#define MSR_LBAR_GPIO           0x5140000C
+#define CS5535_GPIO_SIZE        256
+
+static u32 gpio_base;
+
+static struct pci_device_id divil_pci[] = {
+        { PCI_DEVICE(PCI_VENDOR_ID_NS,  PCI_DEVICE_ID_NS_CS5535_ISA) },
+        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
+        { } /* NULL entry */
+};
+MODULE_DEVICE_TABLE(pci, divil_pci);
+
 struct alix_led {
         struct led_classdev cdev;
         unsigned short port;
@@ -30,9 +43,9 @@ static void alix_led_set(struct led_classdev *led_cdev,
                 container_of(led_cdev, struct alix_led, cdev);
 
         if (brightness)
-                outl(led_dev->on_value, led_dev->port);
+                outl(led_dev->on_value, gpio_base + led_dev->port);
         else
-                outl(led_dev->off_value, led_dev->port);
+                outl(led_dev->off_value, gpio_base + led_dev->port);
 }
 
 static struct alix_led alix_leds[] = {
@@ -41,7 +54,7 @@ static struct alix_led alix_leds[] = {
                         .name = "alix:1",
                         .brightness_set = alix_led_set,
                 },
-                .port = 0x6100,
+                .port = 0x00,
                 .on_value = 1 << 22,
                 .off_value = 1 << 6,
         },
@@ -50,7 +63,7 @@ static struct alix_led alix_leds[] = {
                         .name = "alix:2",
                         .brightness_set = alix_led_set,
                 },
-                .port = 0x6180,
+                .port = 0x80,
                 .on_value = 1 << 25,
                 .off_value = 1 << 9,
         },
@@ -59,7 +72,7 @@ static struct alix_led alix_leds[] = {
                         .name = "alix:3",
                         .brightness_set = alix_led_set,
                 },
-                .port = 0x6180,
+                .port = 0x80,
                 .on_value = 1 << 27,
                 .off_value = 1 << 11,
         },
@@ -101,64 +114,104 @@ static struct platform_driver alix_led_driver = {
         },
 };
 
-static int __init alix_present(void)
+static int __init alix_present(unsigned long bios_phys,
+                                const char *alix_sig,
+                                size_t alix_sig_len)
 {
-        const unsigned long bios_phys = 0x000f0000;
         const size_t bios_len = 0x00010000;
-        const char alix_sig[] = "PC Engines ALIX.";
-        const size_t alix_sig_len = sizeof(alix_sig) - 1;
-
         const char *bios_virt;
         const char *scan_end;
         const char *p;
-        int ret = 0;
+        char name[64];
 
         if (force) {
                 printk(KERN_NOTICE "%s: forced to skip BIOS test, "
                        "assume system has ALIX.2 style LEDs\n",
                        KBUILD_MODNAME);
-                ret = 1;
-                goto out;
+                return 1;
         }
 
         bios_virt = phys_to_virt(bios_phys);
         scan_end = bios_virt + bios_len - (alix_sig_len + 2);
         for (p = bios_virt; p < scan_end; p++) {
                 const char *tail;
+                char *a;
 
-                if (memcmp(p, alix_sig, alix_sig_len) != 0) {
+                if (memcmp(p, alix_sig, alix_sig_len) != 0)
                         continue;
-                }
+
+                memcpy(name, p, sizeof(name));
+
+                /* remove the first \0 character from string */
+                a = strchr(name, '\0');
+                if (a)
+                        *a = ' ';
+
+                /* cut the string at a newline */
+                a = strchr(name, '\r');
+                if (a)
+                        *a = '\0';
 
                 tail = p + alix_sig_len;
-                if ((tail[0] == '2' || tail[0] == '3') && tail[1] == '\0') {
+                if ((tail[0] == '2' || tail[0] == '3')) {
                         printk(KERN_INFO
                                "%s: system is recognized as \"%s\"\n",
-                               KBUILD_MODNAME, p);
-                        ret = 1;
-                        break;
+                               KBUILD_MODNAME, name);
+                        return 1;
                 }
         }
 
-out:
-        return ret;
+        return 0;
 }
 
 static struct platform_device *pdev;
 
-static int __init alix_led_init(void)
+static int __init alix_pci_led_init(void)
 {
-        int ret;
+        u32 low, hi;
 
-        if (!alix_present()) {
-                ret = -ENODEV;
-                goto out;
+        if (pci_dev_present(divil_pci) == 0) {
+                printk(KERN_WARNING KBUILD_MODNAME": DIVIL not found\n");
+                return -ENODEV;
         }
 
-        /* enable output on GPIO for LED 1,2,3 */
-        outl(1 << 6, 0x6104);
-        outl(1 << 9, 0x6184);
-        outl(1 << 11, 0x6184);
+        /* Grab the GPIO I/O range */
+        rdmsr(MSR_LBAR_GPIO, low, hi);
+
+        /* Check the mask and whether GPIO is enabled (sanity check) */
+        if (hi != 0x0000f001) {
+                printk(KERN_WARNING KBUILD_MODNAME": GPIO not enabled\n");
+                return -ENODEV;
+        }
+
+        /* Mask off the IO base address */
+        gpio_base = low & 0x0000ff00;
+
+        if (!request_region(gpio_base, CS5535_GPIO_SIZE, KBUILD_MODNAME)) {
+                printk(KERN_ERR KBUILD_MODNAME": can't allocate I/O for GPIO\n");
+                return -ENODEV;
+        }
+
+        /* Set GPIO function to output */
+        outl(1 << 6, gpio_base + 0x04);
+        outl(1 << 9, gpio_base + 0x84);
+        outl(1 << 11, gpio_base + 0x84);
+
+        return 0;
+}
+
+static int __init alix_led_init(void)
+{
+        int ret = -ENODEV;
+        const char tinybios_sig[] = "PC Engines ALIX.";
+        const char coreboot_sig[] = "PC Engines\0ALIX.";
+
+        if (alix_present(0xf0000, tinybios_sig, sizeof(tinybios_sig) - 1) ||
+            alix_present(0x500, coreboot_sig, sizeof(coreboot_sig) - 1))
+                ret = alix_pci_led_init();
+
+        if (ret < 0)
+                return ret;
 
         pdev = platform_device_register_simple(KBUILD_MODNAME, -1, NULL, 0);
         if (!IS_ERR(pdev)) {
@@ -168,7 +221,6 @@ static int __init alix_led_init(void)
         } else
                 ret = PTR_ERR(pdev);
 
-out:
         return ret;
 }
 
@@ -176,6 +228,7 @@ static void __exit alix_led_exit(void)
 {
         platform_device_unregister(pdev);
         platform_driver_unregister(&alix_led_driver);
+        release_region(gpio_base, CS5535_GPIO_SIZE);
 }
 
 module_init(alix_led_init);
diff --git a/drivers/leds/leds-cobalt-qube.c b/drivers/leds/leds-cobalt-qube.c
index 8816806accd2..da5fb016b1a5 100644
--- a/drivers/leds/leds-cobalt-qube.c
+++ b/drivers/leds/leds-cobalt-qube.c
@@ -31,7 +31,7 @@ static struct led_classdev qube_front_led = {
         .name                   = "qube::front",
         .brightness             = LED_FULL,
         .brightness_set         = qube_front_led_set,
-        .default_trigger        = "ide-disk",
+        .default_trigger        = "default-on",
 };
 
 static int __devinit cobalt_qube_led_probe(struct platform_device *pdev)
@@ -43,7 +43,7 @@ static int __devinit cobalt_qube_led_probe(struct platform_device *pdev)
         if (!res)
                 return -EBUSY;
 
-        led_port = ioremap(res->start, res->end - res->start + 1);
+        led_port = ioremap(res->start, resource_size(res));
         if (!led_port)
                 return -ENOMEM;
 
diff --git a/drivers/leds/leds-cobalt-raq.c b/drivers/leds/leds-cobalt-raq.c
index defc212105f3..438d48384636 100644
--- a/drivers/leds/leds-cobalt-raq.c
+++ b/drivers/leds/leds-cobalt-raq.c
@@ -84,7 +84,7 @@ static int __devinit cobalt_raq_led_probe(struct platform_device *pdev)
         if (!res)
                 return -EBUSY;
 
-        led_port = ioremap(res->start, res->end - res->start + 1);
+        led_port = ioremap(res->start, resource_size(res));
         if (!led_port)
                 return -ENOMEM;
 
diff --git a/drivers/leds/leds-lt3593.c b/drivers/leds/leds-lt3593.c
new file mode 100644
index 000000000000..fee40a841959
--- /dev/null
+++ b/drivers/leds/leds-lt3593.c
@@ -0,0 +1,217 @@
+/*
+ * LEDs driver for LT3593 controllers
+ *
+ * See the datasheet at http://cds.linear.com/docs/Datasheet/3593f.pdf
+ *
+ * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
+ *
+ * Based on leds-gpio.c,
+ *
+ *   Copyright (C) 2007 8D Technologies inc.
+ *   Raphael Assenat <raph@8d.com>
+ *   Copyright (C) 2008 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/workqueue.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+
+struct lt3593_led_data {
+        struct led_classdev cdev;
+        unsigned gpio;
+        struct work_struct work;
+        u8 new_level;
+};
+
+static void lt3593_led_work(struct work_struct *work)
+{
+        int pulses;
+        struct lt3593_led_data *led_dat =
+                container_of(work, struct lt3593_led_data, work);
+
+        /*
+         * The LT3593 resets its internal current level register to the maximum
+         * level on the first falling edge on the control pin. Each following
+         * falling edge decreases the current level by 625uA. Up to 32 pulses
+         * can be sent, so the maximum power reduction is 20mA.
+         * After a timeout of 128us, the value is taken from the register and
+         * applied is to the output driver.
+         */
+
+        if (led_dat->new_level == 0) {
+                gpio_set_value_cansleep(led_dat->gpio, 0);
+                return;
+        }
+
+        pulses = 32 - (led_dat->new_level * 32) / 255;
+
+        if (pulses == 0) {
+                gpio_set_value_cansleep(led_dat->gpio, 0);
+                mdelay(1);
+                gpio_set_value_cansleep(led_dat->gpio, 1);
+                return;
+        }
+
+        gpio_set_value_cansleep(led_dat->gpio, 1);
+
+        while (pulses--) {
+                gpio_set_value_cansleep(led_dat->gpio, 0);
+                udelay(1);
+                gpio_set_value_cansleep(led_dat->gpio, 1);
+                udelay(1);
+        }
+}
+
+static void lt3593_led_set(struct led_classdev *led_cdev,
+        enum led_brightness value)
+{
+        struct lt3593_led_data *led_dat =
+                container_of(led_cdev, struct lt3593_led_data, cdev);
+
+        led_dat->new_level = value;
+        schedule_work(&led_dat->work);
+}
+
+static int __devinit create_lt3593_led(const struct gpio_led *template,
+        struct lt3593_led_data *led_dat, struct device *parent)
+{
+        int ret, state;
+
+        /* skip leds on GPIOs that aren't available */
+        if (!gpio_is_valid(template->gpio)) {
+                printk(KERN_INFO "%s: skipping unavailable LT3593 LED at gpio %d (%s)\n",
+                                KBUILD_MODNAME, template->gpio, template->name);
+                return 0;
+        }
+
+        ret = gpio_request(template->gpio, template->name);
+        if (ret < 0)
+                return ret;
+
+        led_dat->cdev.name = template->name;
+        led_dat->cdev.default_trigger = template->default_trigger;
+        led_dat->gpio = template->gpio;
+
+        led_dat->cdev.brightness_set = lt3593_led_set;
+
+        state = (template->default_state == LEDS_GPIO_DEFSTATE_ON);
+        led_dat->cdev.brightness = state ? LED_FULL : LED_OFF;
+
+        if (!template->retain_state_suspended)
+                led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME;
+
+        ret = gpio_direction_output(led_dat->gpio, state);
+        if (ret < 0)
+                goto err;
+
+        INIT_WORK(&led_dat->work, lt3593_led_work);
+
+        ret = led_classdev_register(parent, &led_dat->cdev);
+        if (ret < 0)
+                goto err;
+
+        printk(KERN_INFO "%s: registered LT3593 LED '%s' at GPIO %d\n",
+                KBUILD_MODNAME, template->name, template->gpio);
+
+        return 0;
+
+err:
+        gpio_free(led_dat->gpio);
+        return ret;
+}
+
+static void delete_lt3593_led(struct lt3593_led_data *led)
+{
+        if (!gpio_is_valid(led->gpio))
+                return;
+
+        led_classdev_unregister(&led->cdev);
+        cancel_work_sync(&led->work);
+        gpio_free(led->gpio);
+}
+
+static int __devinit lt3593_led_probe(struct platform_device *pdev)
+{
+        struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
+        struct lt3593_led_data *leds_data;
+        int i, ret = 0;
+
+        if (!pdata)
+                return -EBUSY;
+
+        leds_data = kzalloc(sizeof(struct lt3593_led_data) * pdata->num_leds,
+                                GFP_KERNEL);
+        if (!leds_data)
+                return -ENOMEM;
+
+        for (i = 0; i < pdata->num_leds; i++) {
+                ret = create_lt3593_led(&pdata->leds[i], &leds_data[i],
+                                      &pdev->dev);
+                if (ret < 0)
+                        goto err;
+        }
+
+        platform_set_drvdata(pdev, leds_data);
+
+        return 0;
+
+err:
+        for (i = i - 1; i >= 0; i--)
+                delete_lt3593_led(&leds_data[i]);
+
+        kfree(leds_data);
+
+        return ret;
+}
+
+static int __devexit lt3593_led_remove(struct platform_device *pdev)
+{
+        int i;
+        struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
+        struct lt3593_led_data *leds_data;
+
+        leds_data = platform_get_drvdata(pdev);
+
+        for (i = 0; i < pdata->num_leds; i++)
+                delete_lt3593_led(&leds_data[i]);
+
+        kfree(leds_data);
+
+        return 0;
+}
+
+static struct platform_driver lt3593_led_driver = {
+        .probe          = lt3593_led_probe,
+        .remove         = __devexit_p(lt3593_led_remove),
+        .driver         = {
+                .name   = "leds-lt3593",
+                .owner  = THIS_MODULE,
+        },
+};
+
+MODULE_ALIAS("platform:leds-lt3593");
+
+static int __init lt3593_led_init(void)
+{
+        return platform_driver_register(&lt3593_led_driver);
+}
+
+static void __exit lt3593_led_exit(void)
+{
+        platform_driver_unregister(&lt3593_led_driver);
+}
+
+module_init(lt3593_led_init);
+module_exit(lt3593_led_exit);
+
+MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
+MODULE_DESCRIPTION("LED driver for LT3593 controllers");
+MODULE_LICENSE("GPL");
diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c
index cdfdc8714e10..88b1dd091cfb 100644
--- a/drivers/leds/leds-pwm.c
+++ b/drivers/leds/leds-pwm.c
@@ -27,7 +27,6 @@ struct led_pwm_data {
         struct pwm_device       *pwm;
         unsigned int            active_low;
         unsigned int            period;
-        unsigned int            max_brightness;
 };
 
 static void led_pwm_set(struct led_classdev *led_cdev,
@@ -35,7 +34,7 @@ static void led_pwm_set(struct led_classdev *led_cdev,
 {
         struct led_pwm_data *led_dat =
                 container_of(led_cdev, struct led_pwm_data, cdev);
-        unsigned int max = led_dat->max_brightness;
+        unsigned int max = led_dat->cdev.max_brightness;
         unsigned int period =  led_dat->period;
 
         if (brightness == 0) {
@@ -77,10 +76,10 @@ static int led_pwm_probe(struct platform_device *pdev)
                 led_dat->cdev.name = cur_led->name;
                 led_dat->cdev.default_trigger = cur_led->default_trigger;
                 led_dat->active_low = cur_led->active_low;
-                led_dat->max_brightness = cur_led->max_brightness;
                 led_dat->period = cur_led->pwm_period_ns;
                 led_dat->cdev.brightness_set = led_pwm_set;
                 led_dat->cdev.brightness = LED_OFF;
+                led_dat->cdev.max_brightness = cur_led->max_brightness;
                 led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME;
 
                 ret = led_classdev_register(&pdev->dev, &led_dat->cdev);
diff --git a/drivers/leds/leds-regulator.c b/drivers/leds/leds-regulator.c
new file mode 100644
index 000000000000..7f00de3ef922
--- /dev/null
+++ b/drivers/leds/leds-regulator.c
@@ -0,0 +1,242 @@
+/*
+ * leds-regulator.c - LED class driver for regulator driven LEDs.
+ *
+ * Copyright (C) 2009 Antonio Ospite <ospite@studenti.unina.it>
+ *
+ * Inspired by leds-wm8350 driver.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/workqueue.h>
+#include <linux/leds.h>
+#include <linux/leds-regulator.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+
+#define to_regulator_led(led_cdev) \
+        container_of(led_cdev, struct regulator_led, cdev)
+
+struct regulator_led {
+        struct led_classdev cdev;
+        enum led_brightness value;
+        int enabled;
+        struct mutex mutex;
+        struct work_struct work;
+
+        struct regulator *vcc;
+};
+
+static inline int led_regulator_get_max_brightness(struct regulator *supply)
+{
+        int ret;
+        int voltage = regulator_list_voltage(supply, 0);
+
+        if (voltage <= 0)
+                return 1;
+
+        /* even if regulator can't change voltages,
+         * we still assume it can change status
+         * and the LED can be turned on and off.
+         */
+        ret = regulator_set_voltage(supply, voltage, voltage);
+        if (ret < 0)
+                return 1;
+
+        return regulator_count_voltages(supply);
+}
+
+static int led_regulator_get_voltage(struct regulator *supply,
+                enum led_brightness brightness)
+{
+        if (brightness == 0)
+                return -EINVAL;
+
+        return regulator_list_voltage(supply, brightness - 1);
+}
+
+
+static void regulator_led_enable(struct regulator_led *led)
+{
+        int ret;
+
+        if (led->enabled)
+                return;
+
+        ret = regulator_enable(led->vcc);
+        if (ret != 0) {
+                dev_err(led->cdev.dev, "Failed to enable vcc: %d\n", ret);
+                return;
+        }
+
+        led->enabled = 1;
+}
+
+static void regulator_led_disable(struct regulator_led *led)
+{
+        int ret;
+
+        if (!led->enabled)
+                return;
+
+        ret = regulator_disable(led->vcc);
+        if (ret != 0) {
+                dev_err(led->cdev.dev, "Failed to disable vcc: %d\n", ret);
+                return;
+        }
+
+        led->enabled = 0;
+}
+
+static void regulator_led_set_value(struct regulator_led *led)
+{
+        int voltage;
+        int ret;
+
+        mutex_lock(&led->mutex);
+
+        if (led->value == LED_OFF) {
+                regulator_led_disable(led);
+                goto out;
+        }
+
+        if (led->cdev.max_brightness > 1) {
+                voltage = led_regulator_get_voltage(led->vcc, led->value);
+                dev_dbg(led->cdev.dev, "brightness: %d voltage: %d\n",
+                                led->value, voltage);
+
+                ret = regulator_set_voltage(led->vcc, voltage, voltage);
+                if (ret != 0)
+                        dev_err(led->cdev.dev, "Failed to set voltage %d: %d\n",
+                                voltage, ret);
+        }
+
+        regulator_led_enable(led);
+
+out:
+        mutex_unlock(&led->mutex);
+}
+
+static void led_work(struct work_struct *work)
+{
+        struct regulator_led *led;
+
+        led = container_of(work, struct regulator_led, work);
+        regulator_led_set_value(led);
+}
+
+static void regulator_led_brightness_set(struct led_classdev *led_cdev,
+                           enum led_brightness value)
+{
+        struct regulator_led *led = to_regulator_led(led_cdev);
+
+        led->value = value;
+        schedule_work(&led->work);
+}
+
+static int __devinit regulator_led_probe(struct platform_device *pdev)
+{
+        struct led_regulator_platform_data *pdata = pdev->dev.platform_data;
+        struct regulator_led *led;
+        struct regulator *vcc;
+        int ret = 0;
+
+        if (pdata == NULL) {
+                dev_err(&pdev->dev, "no platform data\n");
+                return -ENODEV;
+        }
+
+        vcc = regulator_get_exclusive(&pdev->dev, "vled");
+        if (IS_ERR(vcc)) {
+                dev_err(&pdev->dev, "Cannot get vcc for %s\n", pdata->name);
+                return PTR_ERR(vcc);
+        }
+
+        led = kzalloc(sizeof(*led), GFP_KERNEL);
+        if (led == NULL) {
+                ret = -ENOMEM;
+                goto err_vcc;
+        }
+
+        led->cdev.max_brightness = led_regulator_get_max_brightness(vcc);
+        if (pdata->brightness > led->cdev.max_brightness) {
+                dev_err(&pdev->dev, "Invalid default brightness %d\n",
+                                pdata->brightness);
+                ret = -EINVAL;
+                goto err_led;
+        }
+        led->value = pdata->brightness;
+
+        led->cdev.brightness_set = regulator_led_brightness_set;
+        led->cdev.name = pdata->name;
+        led->cdev.flags |= LED_CORE_SUSPENDRESUME;
+        led->vcc = vcc;
+
+        mutex_init(&led->mutex);
+        INIT_WORK(&led->work, led_work);
+
+        platform_set_drvdata(pdev, led);
+
+        ret = led_classdev_register(&pdev->dev, &led->cdev);
+        if (ret < 0) {
+                cancel_work_sync(&led->work);
+                goto err_led;
+        }
+
+        /* to expose the default value to userspace */
+        led->cdev.brightness = led->value;
+
+        /* Set the default led status */
+        regulator_led_set_value(led);
+
+        return 0;
+
+err_led:
+        kfree(led);
+err_vcc:
+        regulator_put(vcc);
+        return ret;
+}
+
+static int __devexit regulator_led_remove(struct platform_device *pdev)
+{
+        struct regulator_led *led = platform_get_drvdata(pdev);
+
+        led_classdev_unregister(&led->cdev);
+        cancel_work_sync(&led->work);
+        regulator_led_disable(led);
+        regulator_put(led->vcc);
+        kfree(led);
+        return 0;
+}
+
+static struct platform_driver regulator_led_driver = {
+        .driver = {
+                   .name  = "leds-regulator",
+                   .owner = THIS_MODULE,
+                   },
+        .probe  = regulator_led_probe,
+        .remove = __devexit_p(regulator_led_remove),
+};
+
+static int __init regulator_led_init(void)
+{
+        return platform_driver_register(&regulator_led_driver);
+}
+module_init(regulator_led_init);
+
+static void __exit regulator_led_exit(void)
+{
+        platform_driver_unregister(&regulator_led_driver);
+}
+module_exit(regulator_led_exit);
+
+MODULE_AUTHOR("Antonio Ospite <ospite@studenti.unina.it>");
+MODULE_DESCRIPTION("Regulator driven LED driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:leds-regulator");
diff --git a/drivers/leds/leds-ss4200.c b/drivers/leds/leds-ss4200.c
new file mode 100644
index 000000000000..97f04984c1ca
--- /dev/null
+++ b/drivers/leds/leds-ss4200.c
@@ -0,0 +1,556 @@
+/*
+ * SS4200-E Hardware API
+ * Copyright (c) 2009, Intel Corporation.
+ * Copyright IBM Corporation, 2009
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Author: Dave Hansen <dave@sr71.net>
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/dmi.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/leds.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/types.h>
+#include <linux/uaccess.h>
+
+MODULE_AUTHOR("Rodney Girod <rgirod@confocus.com>, Dave Hansen <dave@sr71.net>");
+MODULE_DESCRIPTION("Intel NAS/Home Server ICH7 GPIO Driver");
+MODULE_LICENSE("GPL");
+
+/*
+ * ICH7 LPC/GPIO PCI Config register offsets
+ */
+#define PMBASE          0x040
+#define GPIO_BASE       0x048
+#define GPIO_CTRL       0x04c
+#define GPIO_EN         0x010
+
+/*
+ * The ICH7 GPIO register block is 64 bytes in size.
+ */
+#define ICH7_GPIO_SIZE  64
+
+/*
+ * Define register offsets within the ICH7 register block.
+ */
+#define GPIO_USE_SEL    0x000
+#define GP_IO_SEL       0x004
+#define GP_LVL          0x00c
+#define GPO_BLINK       0x018
+#define GPI_INV         0x030
+#define GPIO_USE_SEL2   0x034
+#define GP_IO_SEL2      0x038
+#define GP_LVL2         0x03c
+
+/*
+ * PCI ID of the Intel ICH7 LPC Device within which the GPIO block lives.
+ */
+static struct pci_device_id ich7_lpc_pci_id[] =
+{
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0) },
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1) },
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_30) },
+        { } /* NULL entry */
+};
+
+MODULE_DEVICE_TABLE(pci, ich7_lpc_pci_id);
+
+static int __init ss4200_led_dmi_callback(const struct dmi_system_id *id)
+{
+        pr_info("detected '%s'\n", id->ident);
+        return 1;
+}
+
+static unsigned int __initdata nodetect;
+module_param_named(nodetect, nodetect, bool, 0);
+MODULE_PARM_DESC(nodetect, "Skip DMI-based hardware detection");
+
+/*
+ * struct nas_led_whitelist - List of known good models
+ *
+ * Contains the known good models this driver is compatible with.
+ * When adding a new model try to be as strict as possible. This
+ * makes it possible to keep the false positives (the model is
+ * detected as working, but in reality it is not) as low as
+ * possible.
+ */
+static struct dmi_system_id __initdata nas_led_whitelist[] = {
+        {
+                .callback = ss4200_led_dmi_callback,
+                .ident = "Intel SS4200-E",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Intel"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "SS4200-E"),
+                        DMI_MATCH(DMI_PRODUCT_VERSION, "1.00.00")
+                }
+        },
+};
+
+/*
+ * Base I/O address assigned to the Power Management register block
+ */
+static u32 g_pm_io_base;
+
+/*
+ * Base I/O address assigned to the ICH7 GPIO register block
+ */
+static u32 nas_gpio_io_base;
+
+/*
+ * When we successfully register a region, we are returned a resource.
+ * We use these to identify which regions we need to release on our way
+ * back out.
+ */
+static struct resource *gp_gpio_resource;
+
+struct nasgpio_led {
+        char *name;
+        u32 gpio_bit;
+        struct led_classdev led_cdev;
+};
+
+/*
+ * gpio_bit(s) are the ICH7 GPIO bit assignments
+ */
+static struct nasgpio_led nasgpio_leds[] = {
+        { .name = "hdd1:blue:sata",     .gpio_bit = 0 },
+        { .name = "hdd1:amber:sata",    .gpio_bit = 1 },
+        { .name = "hdd2:blue:sata",     .gpio_bit = 2 },
+        { .name = "hdd2:amber:sata",    .gpio_bit = 3 },
+        { .name = "hdd3:blue:sata",     .gpio_bit = 4 },
+        { .name = "hdd3:amber:sata",    .gpio_bit = 5 },
+        { .name = "hdd4:blue:sata",     .gpio_bit = 6 },
+        { .name = "hdd4:amber:sata",    .gpio_bit = 7 },
+        { .name = "power:blue:power",   .gpio_bit = 27},
+        { .name = "power:amber:power",  .gpio_bit = 28},
+};
+
+#define NAS_RECOVERY    0x00000400      /* GPIO10 */
+
+static struct nasgpio_led *
+led_classdev_to_nasgpio_led(struct led_classdev *led_cdev)
+{
+        return container_of(led_cdev, struct nasgpio_led, led_cdev);
+}
+
+static struct nasgpio_led *get_led_named(char *name)
+{
+        int i;
+        for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++) {
+                if (strcmp(nasgpio_leds[i].name, name))
+                        continue;
+                return &nasgpio_leds[i];
+        }
+        return NULL;
+}
+
+/*
+ * This protects access to the gpio ports.
+ */
+static DEFINE_SPINLOCK(nasgpio_gpio_lock);
+
+/*
+ * There are two gpio ports, one for blinking and the other
+ * for power.  @port tells us if we're doing blinking or
+ * power control.
+ *
+ * Caller must hold nasgpio_gpio_lock
+ */
+static void __nasgpio_led_set_attr(struct led_classdev *led_cdev,
+                                   u32 port, u32 value)
+{
+        struct nasgpio_led *led = led_classdev_to_nasgpio_led(led_cdev);
+        u32 gpio_out;
+
+        gpio_out = inl(nas_gpio_io_base + port);
+        if (value)
+                gpio_out |= (1<<led->gpio_bit);
+        else
+                gpio_out &= ~(1<<led->gpio_bit);
+
+        outl(gpio_out, nas_gpio_io_base + port);
+}
+
+static void nasgpio_led_set_attr(struct led_classdev *led_cdev,
+                                 u32 port, u32 value)
+{
+        spin_lock(&nasgpio_gpio_lock);
+        __nasgpio_led_set_attr(led_cdev, port, value);
+        spin_unlock(&nasgpio_gpio_lock);
+}
+
+u32 nasgpio_led_get_attr(struct led_classdev *led_cdev, u32 port)
+{
+        struct nasgpio_led *led = led_classdev_to_nasgpio_led(led_cdev);
+        u32 gpio_in;
+
+        spin_lock(&nasgpio_gpio_lock);
+        gpio_in = inl(nas_gpio_io_base + port);
+        spin_unlock(&nasgpio_gpio_lock);
+        if (gpio_in & (1<<led->gpio_bit))
+                return 1;
+        return 0;
+}
+
+/*
+ * There is actual brightness control in the hardware,
+ * but it is via smbus commands and not implemented
+ * in this driver.
+ */
+static void nasgpio_led_set_brightness(struct led_classdev *led_cdev,
+                                       enum led_brightness brightness)
+{
+        u32 setting = 0;
+        if (brightness >= LED_HALF)
+                setting = 1;
+        /*
+         * Hold the lock across both operations.  This ensures
+         * consistency so that both the "turn off blinking"
+         * and "turn light off" operations complete as a set.
+         */
+        spin_lock(&nasgpio_gpio_lock);
+        /*
+         * LED class documentation asks that past blink state
+         * be disabled when brightness is turned to zero.
+         */
+        if (brightness == 0)
+                __nasgpio_led_set_attr(led_cdev, GPO_BLINK, 0);
+        __nasgpio_led_set_attr(led_cdev, GP_LVL, setting);
+        spin_unlock(&nasgpio_gpio_lock);
+}
+
+static int nasgpio_led_set_blink(struct led_classdev *led_cdev,
+                                 unsigned long *delay_on,
+                                 unsigned long *delay_off)
+{
+        u32 setting = 1;
+        if (!(*delay_on == 0 && *delay_off == 0) &&
+            !(*delay_on == 500 && *delay_off == 500))
+                return -EINVAL;
+        /*
+         * These are very approximate.
+         */
+        *delay_on = 500;
+        *delay_off = 500;
+
+        nasgpio_led_set_attr(led_cdev, GPO_BLINK, setting);
+
+        return 0;
+}
+
+
+/*
+ * Initialize the ICH7 GPIO registers for NAS usage.  The BIOS should have
+ * already taken care of this, but we will do so in a non destructive manner
+ * so that we have what we need whether the BIOS did it or not.
+ */
+static int __devinit ich7_gpio_init(struct device *dev)
+{
+        int i;
+        u32 config_data = 0;
+        u32 all_nas_led = 0;
+
+        for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++)
+                all_nas_led |= (1<<nasgpio_leds[i].gpio_bit);
+
+        spin_lock(&nasgpio_gpio_lock);
+        /*
+         * We need to enable all of the GPIO lines used by the NAS box,
+         * so we will read the current Use Selection and add our usage
+         * to it.  This should be benign with regard to the original
+         * BIOS configuration.
+         */
+        config_data = inl(nas_gpio_io_base + GPIO_USE_SEL);
+        dev_dbg(dev, ": Data read from GPIO_USE_SEL = 0x%08x\n", config_data);
+        config_data |= all_nas_led + NAS_RECOVERY;
+        outl(config_data, nas_gpio_io_base + GPIO_USE_SEL);
+        config_data = inl(nas_gpio_io_base + GPIO_USE_SEL);
+        dev_dbg(dev, ": GPIO_USE_SEL = 0x%08x\n\n", config_data);
+
+        /*
+         * The LED GPIO outputs need to be configured for output, so we
+         * will ensure that all LED lines are cleared for output and the
+         * RECOVERY line ready for input.  This too should be benign with
+         * regard to BIOS configuration.
+         */
+        config_data = inl(nas_gpio_io_base + GP_IO_SEL);
+        dev_dbg(dev, ": Data read from GP_IO_SEL = 0x%08x\n",
+                                        config_data);
+        config_data &= ~all_nas_led;
+        config_data |= NAS_RECOVERY;
+        outl(config_data, nas_gpio_io_base + GP_IO_SEL);
+        config_data = inl(nas_gpio_io_base + GP_IO_SEL);
+        dev_dbg(dev, ": GP_IO_SEL = 0x%08x\n", config_data);
+
+        /*
+         * In our final system, the BIOS will initialize the state of all
+         * of the LEDs.  For now, we turn them all off (or Low).
+         */
+        config_data = inl(nas_gpio_io_base + GP_LVL);
+        dev_dbg(dev, ": Data read from GP_LVL = 0x%08x\n", config_data);
+        /*
+         * In our final system, the BIOS will initialize the blink state of all
+         * of the LEDs.  For now, we turn blink off for all of them.
+         */
+        config_data = inl(nas_gpio_io_base + GPO_BLINK);
+        dev_dbg(dev, ": Data read from GPO_BLINK = 0x%08x\n", config_data);
+
+        /*
+         * At this moment, I am unsure if anything needs to happen with GPI_INV
+         */
+        config_data = inl(nas_gpio_io_base + GPI_INV);
+        dev_dbg(dev, ": Data read from GPI_INV = 0x%08x\n", config_data);
+
+        spin_unlock(&nasgpio_gpio_lock);
+        return 0;
+}
+
+static void ich7_lpc_cleanup(struct device *dev)
+{
+        /*
+         * If we were given exclusive use of the GPIO
+         * I/O Address range, we must return it.
+         */
+        if (gp_gpio_resource) {
+                dev_dbg(dev, ": Releasing GPIO I/O addresses\n");
+                release_region(nas_gpio_io_base, ICH7_GPIO_SIZE);
+                gp_gpio_resource = NULL;
+        }
+}
+
+/*
+ * The OS has determined that the LPC of the Intel ICH7 Southbridge is present
+ * so we can retrive the required operational information and prepare the GPIO.
+ */
+static struct pci_dev *nas_gpio_pci_dev;
+static int __devinit ich7_lpc_probe(struct pci_dev *dev,
+                                    const struct pci_device_id *id)
+{
+        int status;
+        u32 gc = 0;
+
+        status = pci_enable_device(dev);
+        if (status) {
+                dev_err(&dev->dev, "pci_enable_device failed\n");
+                return -EIO;
+        }
+
+        nas_gpio_pci_dev = dev;
+        status = pci_read_config_dword(dev, PMBASE, &g_pm_io_base);
+        if (status)
+                goto out;
+        g_pm_io_base &= 0x00000ff80;
+
+        status = pci_read_config_dword(dev, GPIO_CTRL, &gc);
+        if (!(GPIO_EN & gc)) {
+                status = -EEXIST;
+                dev_info(&dev->dev,
+                           "ERROR: The LPC GPIO Block has not been enabled.\n");
+                goto out;
+        }
+
+        status = pci_read_config_dword(dev, GPIO_BASE, &nas_gpio_io_base);
+        if (0 > status) {
+                dev_info(&dev->dev, "Unable to read GPIOBASE.\n");
+                goto out;
+        }
+        dev_dbg(&dev->dev, ": GPIOBASE = 0x%08x\n", nas_gpio_io_base);
+        nas_gpio_io_base &= 0x00000ffc0;
+
+        /*
+         * Insure that we have exclusive access to the GPIO I/O address range.
+         */
+        gp_gpio_resource = request_region(nas_gpio_io_base, ICH7_GPIO_SIZE,
+                                          KBUILD_MODNAME);
+        if (NULL == gp_gpio_resource) {
+                dev_info(&dev->dev,
+                         "ERROR Unable to register GPIO I/O addresses.\n");
+                status = -1;
+                goto out;
+        }
+
+        /*
+         * Initialize the GPIO for NAS/Home Server Use
+         */
+        ich7_gpio_init(&dev->dev);
+
+out:
+        if (status) {
+                ich7_lpc_cleanup(&dev->dev);
+                pci_disable_device(dev);
+        }
+        return status;
+}
+
+static void ich7_lpc_remove(struct pci_dev *dev)
+{
+        ich7_lpc_cleanup(&dev->dev);
+        pci_disable_device(dev);
+}
+
+/*
+ * pci_driver structure passed to the PCI modules
+ */
+static struct pci_driver nas_gpio_pci_driver = {
+        .name = KBUILD_MODNAME,
+        .id_table = ich7_lpc_pci_id,
+        .probe = ich7_lpc_probe,
+        .remove = ich7_lpc_remove,
+};
+
+static struct led_classdev *get_classdev_for_led_nr(int nr)
+{
+        struct nasgpio_led *nas_led = &nasgpio_leds[nr];
+        struct led_classdev *led = &nas_led->led_cdev;
+        return led;
+}
+
+
+static void set_power_light_amber_noblink(void)
+{
+        struct nasgpio_led *amber = get_led_named("power:amber:power");
+        struct nasgpio_led *blue = get_led_named("power:blue:power");
+
+        if (!amber || !blue)
+                return;
+        /*
+         * LED_OFF implies disabling future blinking
+         */
+        pr_debug("setting blue off and amber on\n");
+
+        nasgpio_led_set_brightness(&blue->led_cdev, LED_OFF);
+        nasgpio_led_set_brightness(&amber->led_cdev, LED_FULL);
+}
+
+static ssize_t nas_led_blink_show(struct device *dev,
+                                  struct device_attribute *attr, char *buf)
+{
+        struct led_classdev *led = dev_get_drvdata(dev);
+        int blinking = 0;
+        if (nasgpio_led_get_attr(led, GPO_BLINK))
+                blinking = 1;
+        return sprintf(buf, "%u\n", blinking);
+}
+
+static ssize_t nas_led_blink_store(struct device *dev,
+                                   struct device_attribute *attr,
+                                   const char *buf, size_t size)
+{
+        int ret;
+        struct led_classdev *led = dev_get_drvdata(dev);
+        unsigned long blink_state;
+
+        ret = strict_strtoul(buf, 10, &blink_state);
+        if (ret)
+                return ret;
+
+        nasgpio_led_set_attr(led, GPO_BLINK, blink_state);
+
+        return size;
+}
+
+static DEVICE_ATTR(blink, 0644, nas_led_blink_show, nas_led_blink_store);
+
+static int register_nasgpio_led(int led_nr)
+{
+        int ret;
+        struct nasgpio_led *nas_led = &nasgpio_leds[led_nr];
+        struct led_classdev *led = get_classdev_for_led_nr(led_nr);
+
+        led->name = nas_led->name;
+        led->brightness = LED_OFF;
+        if (nasgpio_led_get_attr(led, GP_LVL))
+                led->brightness = LED_FULL;
+        led->brightness_set = nasgpio_led_set_brightness;
+        led->blink_set = nasgpio_led_set_blink;
+        ret = led_classdev_register(&nas_gpio_pci_dev->dev, led);
+        if (ret)
+                return ret;
+        ret = device_create_file(led->dev, &dev_attr_blink);
+        if (ret)
+                led_classdev_unregister(led);
+        return ret;
+}
+
+static void unregister_nasgpio_led(int led_nr)
+{
+        struct led_classdev *led = get_classdev_for_led_nr(led_nr);
+        led_classdev_unregister(led);
+        device_remove_file(led->dev, &dev_attr_blink);
+}
+/*
+ * module load/initialization
+ */
+static int __init nas_gpio_init(void)
+{
+        int i;
+        int ret = 0;
+        int nr_devices = 0;
+
+        nr_devices = dmi_check_system(nas_led_whitelist);
+        if (nodetect) {
+                pr_info("skipping hardware autodetection\n");
+                pr_info("Please send 'dmidecode' output to dave@sr71.net\n");
+                nr_devices++;
+        }
+
+        if (nr_devices <= 0) {
+                pr_info("no LED devices found\n");
+                return -ENODEV;
+        }
+
+        pr_info("registering PCI driver\n");
+        ret = pci_register_driver(&nas_gpio_pci_driver);
+        if (ret)
+                return ret;
+        for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++) {
+                ret = register_nasgpio_led(i);
+                if (ret)
+                        goto out_err;
+        }
+        /*
+         * When the system powers on, the BIOS leaves the power
+         * light blue and blinking.  This will turn it solid
+         * amber once the driver is loaded.
+         */
+        set_power_light_amber_noblink();
+        return 0;
+out_err:
+        for (; i >= 0; i--)
+                unregister_nasgpio_led(i);
+        pci_unregister_driver(&nas_gpio_pci_driver);
+        return ret;
+}
+
+/*
+ * module unload
+ */
+static void __exit nas_gpio_exit(void)
+{
+        int i;
+        pr_info("Unregistering driver\n");
+        for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++)
+                unregister_nasgpio_led(i);
+        pci_unregister_driver(&nas_gpio_pci_driver);
+}
+
+module_init(nas_gpio_init);
+module_exit(nas_gpio_exit);
diff --git a/drivers/message/fusion/mptbase.c b/drivers/message/fusion/mptbase.c
index 610e914abe6c..85bc6a685e36 100644
--- a/drivers/message/fusion/mptbase.c
+++ b/drivers/message/fusion/mptbase.c
@@ -1587,7 +1587,7 @@ mpt_mapresources(MPT_ADAPTER *ioc)
 {
         u8              __iomem *mem;
         int              ii;
-        unsigned long    mem_phys;
+        resource_size_t  mem_phys;
         unsigned long    port;
         u32              msize;
         u32              psize;
@@ -1677,8 +1677,8 @@ mpt_mapresources(MPT_ADAPTER *ioc)
                 return -EINVAL;
         }
         ioc->memmap = mem;
-        dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %lx\n",
-            ioc->name, mem, mem_phys));
+        dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %llx\n",
+            ioc->name, mem, (unsigned long long)mem_phys));
 
         ioc->mem_phys = mem_phys;
         ioc->chip = (SYSIF_REGS __iomem *)mem;
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 1a7a9fc50ea1..e3551d20464f 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -203,6 +203,7 @@ config CS5535_MFGPT
 
 config CS5535_MFGPT_DEFAULT_IRQ
         int
+        depends on CS5535_MFGPT
         default 7
         help
           MFGPTs on the CS5535 require an interrupt.  The selected IRQ
diff --git a/drivers/misc/enclosure.c b/drivers/misc/enclosure.c
index e9eae4a78402..1eac626e710a 100644
--- a/drivers/misc/enclosure.c
+++ b/drivers/misc/enclosure.c
@@ -391,6 +391,7 @@ static const char *const enclosure_status [] = {
         [ENCLOSURE_STATUS_NOT_INSTALLED] = "not installed",
         [ENCLOSURE_STATUS_UNKNOWN] = "unknown",
         [ENCLOSURE_STATUS_UNAVAILABLE] = "unavailable",
+        [ENCLOSURE_STATUS_MAX] = NULL,
 };
 
 static const char *const enclosure_type [] = {
diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c
index cdb845b68ab5..06b64085a355 100644
--- a/drivers/mmc/core/sdio.c
+++ b/drivers/mmc/core/sdio.c
@@ -516,7 +516,8 @@ int mmc_attach_sdio(struct mmc_host *host, u32 ocr)
          * The number of functions on the card is encoded inside
          * the ocr.
          */
-        card->sdio_funcs = funcs = (ocr & 0x70000000) >> 28;
+        funcs = (ocr & 0x70000000) >> 28;
+        card->sdio_funcs = 0;
 
         /*
          * If needed, disconnect card detection pull-up resistor.
@@ -528,7 +529,7 @@ int mmc_attach_sdio(struct mmc_host *host, u32 ocr)
         /*
          * Initialize (but don't add) all present functions.
          */
-        for (i = 0;i < funcs;i++) {
+        for (i = 0; i < funcs; i++, card->sdio_funcs++) {
                 err = sdio_init_func(host->card, i + 1);
                 if (err)
                         goto remove;
diff --git a/drivers/mmc/core/sdio_bus.c b/drivers/mmc/core/sdio_bus.c
index d37464e296a5..9e060c87e64d 100644
--- a/drivers/mmc/core/sdio_bus.c
+++ b/drivers/mmc/core/sdio_bus.c
@@ -248,12 +248,15 @@ int sdio_add_func(struct sdio_func *func)
 /*
  * Unregister a SDIO function with the driver model, and
  * (eventually) free it.
+ * This function can be called through error paths where sdio_add_func() was
+ * never executed (because a failure occurred at an earlier point).
  */
 void sdio_remove_func(struct sdio_func *func)
 {
-        if (sdio_func_present(func))
-                device_del(&func->dev);
+        if (!sdio_func_present(func))
+                return;
 
+        device_del(&func->dev);
         put_device(&func->dev);
 }
 
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 9d405b181781..ce1d28884e29 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -44,6 +44,19 @@ config MMC_SDHCI_IO_ACCESSORS
           This is silent Kconfig symbol that is selected by the drivers that
           need to overwrite SDHCI IO memory accessors.
 
+config MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
+        bool
+        select MMC_SDHCI_IO_ACCESSORS
+        help
+          This option is selected by drivers running on big endian hosts
+          and performing I/O to a SDHCI controller through a bus that
+          implements a hardware byte swapper using a 32-bit datum.
+          This endian mapping mode is called "data invariance" and
+          has the effect of scrambling the addresses and formats of data
+          accessed in sizes other than the datum size.
+
+          This is the case for the Freescale eSDHC and Nintendo Wii SDHCI.
+
 config MMC_SDHCI_PCI
         tristate "SDHCI support on PCI bus"
         depends on MMC_SDHCI && PCI
@@ -75,11 +88,29 @@ config MMC_RICOH_MMC
 config MMC_SDHCI_OF
         tristate "SDHCI support on OpenFirmware platforms"
         depends on MMC_SDHCI && PPC_OF
-        select MMC_SDHCI_IO_ACCESSORS
         help
           This selects the OF support for Secure Digital Host Controller
-          Interfaces. So far, only the Freescale eSDHC controller is known
-          to exist on OF platforms.
+          Interfaces.
+
+          If unsure, say N.
+
+config MMC_SDHCI_OF_ESDHC
+        bool "SDHCI OF support for the Freescale eSDHC controller"
+        depends on MMC_SDHCI_OF
+        select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
+        help
+          This selects the Freescale eSDHC controller support.
+
+          If unsure, say N.
+
+config MMC_SDHCI_OF_HLWD
+        bool "SDHCI OF support for the Nintendo Wii SDHCI controllers"
+        depends on MMC_SDHCI_OF
+        select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
+        help
+          This selects the Secure Digital Host Controller Interface (SDHCI)
+          found in the "Hollywood" chipset of the Nintendo Wii video game
+          console.
 
           If unsure, say N.
 
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index ded4d8cdd9d7..3d253dd4240f 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_MMC_MXC)		+= mxcmmc.o
 obj-$(CONFIG_MMC_SDHCI)         += sdhci.o
 obj-$(CONFIG_MMC_SDHCI_PCI)     += sdhci-pci.o
 obj-$(CONFIG_MMC_RICOH_MMC)     += ricoh_mmc.o
-obj-$(CONFIG_MMC_SDHCI_OF)      += sdhci-of.o
 obj-$(CONFIG_MMC_SDHCI_PLTFM)   += sdhci-pltfm.o
 obj-$(CONFIG_MMC_SDHCI_S3C)     += sdhci-s3c.o
 obj-$(CONFIG_MMC_WBSD)          += wbsd.o
@@ -37,6 +36,11 @@ obj-$(CONFIG_MMC_CB710)	+= cb710-mmc.o
 obj-$(CONFIG_MMC_VIA_SDMMC)     += via-sdmmc.o
 obj-$(CONFIG_SDH_BFIN)          += bfin_sdh.o
 
+obj-$(CONFIG_MMC_SDHCI_OF)      += sdhci-of.o
+sdhci-of-y                              := sdhci-of-core.o
+sdhci-of-$(CONFIG_MMC_SDHCI_OF_ESDHC)   += sdhci-of-esdhc.o
+sdhci-of-$(CONFIG_MMC_SDHCI_OF_HLWD)    += sdhci-of-hlwd.o
+
 ifeq ($(CONFIG_CB710_DEBUG),y)
         CFLAGS-cb710-mmc        += -DDEBUG
 endif
diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of-core.c
index 01ab916c2802..55e33135edb4 100644
--- a/drivers/mmc/host/sdhci-of.c
+++ b/drivers/mmc/host/sdhci-of-core.c
@@ -22,62 +22,37 @@
 #include <linux/of_platform.h>
 #include <linux/mmc/host.h>
 #include <asm/machdep.h>
+#include "sdhci-of.h"
 #include "sdhci.h"
 
-struct sdhci_of_data {
-        unsigned int quirks;
-        struct sdhci_ops ops;
-};
-
-struct sdhci_of_host {
-        unsigned int clock;
-        u16 xfer_mode_shadow;
-};
+#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
 
 /*
- * Ops and quirks for the Freescale eSDHC controller.
+ * These accessors are designed for big endian hosts doing I/O to
+ * little endian controllers incorporating a 32-bit hardware byte swapper.
  */
 
-#define ESDHC_DMA_SYSCTL        0x40c
-#define ESDHC_DMA_SNOOP         0x00000040
-
-#define ESDHC_SYSTEM_CONTROL    0x2c
-#define ESDHC_CLOCK_MASK        0x0000fff0
-#define ESDHC_PREDIV_SHIFT      8
-#define ESDHC_DIVIDER_SHIFT     4
-#define ESDHC_CLOCK_PEREN       0x00000004
-#define ESDHC_CLOCK_HCKEN       0x00000002
-#define ESDHC_CLOCK_IPGEN       0x00000001
-
-#define ESDHC_HOST_CONTROL_RES  0x05
-
-static u32 esdhc_readl(struct sdhci_host *host, int reg)
+u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
 {
         return in_be32(host->ioaddr + reg);
 }
 
-static u16 esdhc_readw(struct sdhci_host *host, int reg)
+u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
 {
-        u16 ret;
-
-        if (unlikely(reg == SDHCI_HOST_VERSION))
-                ret = in_be16(host->ioaddr + reg);
-        else
-                ret = in_be16(host->ioaddr + (reg ^ 0x2));
-        return ret;
+        return in_be16(host->ioaddr + (reg ^ 0x2));
 }
 
-static u8 esdhc_readb(struct sdhci_host *host, int reg)
+u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
 {
         return in_8(host->ioaddr + (reg ^ 0x3));
 }
 
-static void esdhc_writel(struct sdhci_host *host, u32 val, int reg)
+void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
 {
         out_be32(host->ioaddr + reg, val);
 }
 
-static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
+void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
 {
         struct sdhci_of_host *of_host = sdhci_priv(host);
         int base = reg & ~0x3;
@@ -92,106 +67,21 @@ static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
                 of_host->xfer_mode_shadow = val;
                 return;
         case SDHCI_COMMAND:
-                esdhc_writel(host, val << 16 | of_host->xfer_mode_shadow,
-                             SDHCI_TRANSFER_MODE);
+                sdhci_be32bs_writel(host, val << 16 | of_host->xfer_mode_shadow,
+                                    SDHCI_TRANSFER_MODE);
                 return;
-        case SDHCI_BLOCK_SIZE:
-                /*
-                 * Two last DMA bits are reserved, and first one is used for
-                 * non-standard blksz of 4096 bytes that we don't support
-                 * yet. So clear the DMA boundary bits.
-                 */
-                val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
-                /* fall through */
         }
         clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
 }
 
-static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
+void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
 {
         int base = reg & ~0x3;
         int shift = (reg & 0x3) * 8;
 
-        /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
-        if (reg == SDHCI_HOST_CONTROL)
-                val &= ~ESDHC_HOST_CONTROL_RES;
-
         clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
 }
-
-static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock)
-{
-        int pre_div = 2;
-        int div = 1;
-
-        clrbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
-                  ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK);
-
-        if (clock == 0)
-                goto out;
-
-        while (host->max_clk / pre_div / 16 > clock && pre_div < 256)
-                pre_div *= 2;
-
-        while (host->max_clk / pre_div / div > clock && div < 16)
-                div++;
-
-        dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",
-                clock, host->max_clk / pre_div / div);
-
-        pre_div >>= 1;
-        div--;
-
-        setbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
-                  ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN |
-                  div << ESDHC_DIVIDER_SHIFT | pre_div << ESDHC_PREDIV_SHIFT);
-        mdelay(100);
-out:
-        host->clock = clock;
-}
-
-static int esdhc_enable_dma(struct sdhci_host *host)
-{
-        setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
-        return 0;
-}
-
-static unsigned int esdhc_get_max_clock(struct sdhci_host *host)
-{
-        struct sdhci_of_host *of_host = sdhci_priv(host);
-
-        return of_host->clock;
-}
-
-static unsigned int esdhc_get_min_clock(struct sdhci_host *host)
-{
-        struct sdhci_of_host *of_host = sdhci_priv(host);
-
-        return of_host->clock / 256 / 16;
-}
-
-static struct sdhci_of_data sdhci_esdhc = {
-        .quirks = SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
-                  SDHCI_QUIRK_BROKEN_CARD_DETECTION |
-                  SDHCI_QUIRK_NO_BUSY_IRQ |
-                  SDHCI_QUIRK_NONSTANDARD_CLOCK |
-                  SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
-                  SDHCI_QUIRK_PIO_NEEDS_DELAY |
-                  SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET |
-                  SDHCI_QUIRK_NO_CARD_NO_RESET,
-        .ops = {
-                .readl = esdhc_readl,
-                .readw = esdhc_readw,
-                .readb = esdhc_readb,
-                .writel = esdhc_writel,
-                .writew = esdhc_writew,
-                .writeb = esdhc_writeb,
-                .set_clock = esdhc_set_clock,
-                .enable_dma = esdhc_enable_dma,
-                .get_max_clock = esdhc_get_max_clock,
-                .get_min_clock = esdhc_get_min_clock,
-        },
-};
+#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
 
 #ifdef CONFIG_PM
 
@@ -301,9 +191,14 @@ static int __devexit sdhci_of_remove(struct of_device *ofdev)
 }
 
 static const struct of_device_id sdhci_of_match[] = {
+#ifdef CONFIG_MMC_SDHCI_OF_ESDHC
         { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
         { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
         { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
+#endif
+#ifdef CONFIG_MMC_SDHCI_OF_HLWD
+        { .compatible = "nintendo,hollywood-sdhci", .data = &sdhci_hlwd, },
+#endif
         { .compatible = "generic-sdhci", },
         {},
 };
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
new file mode 100644
index 000000000000..d5b11a17e648
--- /dev/null
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -0,0 +1,143 @@
+/*
+ * Freescale eSDHC controller driver.
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2009 MontaVista Software, Inc.
+ *
+ * Authors: Xiaobo Xie <X.Xie@freescale.com>
+ *          Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/mmc/host.h>
+#include "sdhci-of.h"
+#include "sdhci.h"
+
+/*
+ * Ops and quirks for the Freescale eSDHC controller.
+ */
+
+#define ESDHC_DMA_SYSCTL        0x40c
+#define ESDHC_DMA_SNOOP         0x00000040
+
+#define ESDHC_SYSTEM_CONTROL    0x2c
+#define ESDHC_CLOCK_MASK        0x0000fff0
+#define ESDHC_PREDIV_SHIFT      8
+#define ESDHC_DIVIDER_SHIFT     4
+#define ESDHC_CLOCK_PEREN       0x00000004
+#define ESDHC_CLOCK_HCKEN       0x00000002
+#define ESDHC_CLOCK_IPGEN       0x00000001
+
+#define ESDHC_HOST_CONTROL_RES  0x05
+
+static u16 esdhc_readw(struct sdhci_host *host, int reg)
+{
+        u16 ret;
+
+        if (unlikely(reg == SDHCI_HOST_VERSION))
+                ret = in_be16(host->ioaddr + reg);
+        else
+                ret = sdhci_be32bs_readw(host, reg);
+        return ret;
+}
+
+static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
+{
+        if (reg == SDHCI_BLOCK_SIZE) {
+                /*
+                 * Two last DMA bits are reserved, and first one is used for
+                 * non-standard blksz of 4096 bytes that we don't support
+                 * yet. So clear the DMA boundary bits.
+                 */
+                val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
+        }
+        sdhci_be32bs_writew(host, val, reg);
+}
+
+static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
+{
+        /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
+        if (reg == SDHCI_HOST_CONTROL)
+                val &= ~ESDHC_HOST_CONTROL_RES;
+        sdhci_be32bs_writeb(host, val, reg);
+}
+
+static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+        int pre_div = 2;
+        int div = 1;
+
+        clrbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
+                  ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK);
+
+        if (clock == 0)
+                goto out;
+
+        while (host->max_clk / pre_div / 16 > clock && pre_div < 256)
+                pre_div *= 2;
+
+        while (host->max_clk / pre_div / div > clock && div < 16)
+                div++;
+
+        dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",
+                clock, host->max_clk / pre_div / div);
+
+        pre_div >>= 1;
+        div--;
+
+        setbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
+                  ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN |
+                  div << ESDHC_DIVIDER_SHIFT | pre_div << ESDHC_PREDIV_SHIFT);
+        mdelay(100);
+out:
+        host->clock = clock;
+}
+
+static int esdhc_enable_dma(struct sdhci_host *host)
+{
+        setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
+        return 0;
+}
+
+static unsigned int esdhc_get_max_clock(struct sdhci_host *host)
+{
+        struct sdhci_of_host *of_host = sdhci_priv(host);
+
+        return of_host->clock;
+}
+
+static unsigned int esdhc_get_min_clock(struct sdhci_host *host)
+{
+        struct sdhci_of_host *of_host = sdhci_priv(host);
+
+        return of_host->clock / 256 / 16;
+}
+
+struct sdhci_of_data sdhci_esdhc = {
+        .quirks = SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
+                  SDHCI_QUIRK_BROKEN_CARD_DETECTION |
+                  SDHCI_QUIRK_NO_BUSY_IRQ |
+                  SDHCI_QUIRK_NONSTANDARD_CLOCK |
+                  SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
+                  SDHCI_QUIRK_PIO_NEEDS_DELAY |
+                  SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET |
+                  SDHCI_QUIRK_NO_CARD_NO_RESET,
+        .ops = {
+                .readl = sdhci_be32bs_readl,
+                .readw = esdhc_readw,
+                .readb = sdhci_be32bs_readb,
+                .writel = sdhci_be32bs_writel,
+                .writew = esdhc_writew,
+                .writeb = esdhc_writeb,
+                .set_clock = esdhc_set_clock,
+                .enable_dma = esdhc_enable_dma,
+                .get_max_clock = esdhc_get_max_clock,
+                .get_min_clock = esdhc_get_min_clock,
+        },
+};
diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c
new file mode 100644
index 000000000000..35117f3ed757
--- /dev/null
+++ b/drivers/mmc/host/sdhci-of-hlwd.c
@@ -0,0 +1,65 @@
+/*
+ * drivers/mmc/host/sdhci-of-hlwd.c
+ *
+ * Nintendo Wii Secure Digital Host Controller Interface.
+ * Copyright (C) 2009 The GameCube Linux Team
+ * Copyright (C) 2009 Albert Herranz
+ *
+ * Based on sdhci-of-esdhc.c
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2009 MontaVista Software, Inc.
+ *
+ * Authors: Xiaobo Xie <X.Xie@freescale.com>
+ *          Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#include <linux/delay.h>
+#include <linux/mmc/host.h>
+#include "sdhci-of.h"
+#include "sdhci.h"
+
+/*
+ * Ops and quirks for the Nintendo Wii SDHCI controllers.
+ */
+
+/*
+ * We need a small delay after each write, or things go horribly wrong.
+ */
+#define SDHCI_HLWD_WRITE_DELAY  5 /* usecs */
+
+static void sdhci_hlwd_writel(struct sdhci_host *host, u32 val, int reg)
+{
+        sdhci_be32bs_writel(host, val, reg);
+        udelay(SDHCI_HLWD_WRITE_DELAY);
+}
+
+static void sdhci_hlwd_writew(struct sdhci_host *host, u16 val, int reg)
+{
+        sdhci_be32bs_writew(host, val, reg);
+        udelay(SDHCI_HLWD_WRITE_DELAY);
+}
+
+static void sdhci_hlwd_writeb(struct sdhci_host *host, u8 val, int reg)
+{
+        sdhci_be32bs_writeb(host, val, reg);
+        udelay(SDHCI_HLWD_WRITE_DELAY);
+}
+
+struct sdhci_of_data sdhci_hlwd = {
+        .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
+                  SDHCI_QUIRK_32BIT_DMA_SIZE,
+        .ops = {
+                .readl = sdhci_be32bs_readl,
+                .readw = sdhci_be32bs_readw,
+                .readb = sdhci_be32bs_readb,
+                .writel = sdhci_hlwd_writel,
+                .writew = sdhci_hlwd_writew,
+                .writeb = sdhci_hlwd_writeb,
+        },
+};
diff --git a/drivers/mmc/host/sdhci-of.h b/drivers/mmc/host/sdhci-of.h
new file mode 100644
index 000000000000..ad09ad9915d8
--- /dev/null
+++ b/drivers/mmc/host/sdhci-of.h
@@ -0,0 +1,42 @@
+/*
+ * OpenFirmware bindings for Secure Digital Host Controller Interface.
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2009 MontaVista Software, Inc.
+ *
+ * Authors: Xiaobo Xie <X.Xie@freescale.com>
+ *          Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#ifndef __SDHCI_OF_H
+#define __SDHCI_OF_H
+
+#include <linux/types.h>
+#include "sdhci.h"
+
+struct sdhci_of_data {
+        unsigned int quirks;
+        struct sdhci_ops ops;
+};
+
+struct sdhci_of_host {
+        unsigned int clock;
+        u16 xfer_mode_shadow;
+};
+
+extern u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg);
+extern u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg);
+extern u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg);
+extern void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg);
+extern void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg);
+extern void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg);
+
+extern struct sdhci_of_data sdhci_esdhc;
+extern struct sdhci_of_data sdhci_hlwd;
+
+#endif /* __SDHCI_OF_H */
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index ce5f1d73dc04..842f46f94284 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -8,6 +8,8 @@
  * the Free Software Foundation; either version 2 of the License, or (at
  * your option) any later version.
  */
+#ifndef __SDHCI_H
+#define __SDHCI_H
 
 #include <linux/scatterlist.h>
 #include <linux/compiler.h>
@@ -408,3 +410,5 @@ extern void sdhci_remove_host(struct sdhci_host *host, int dead);
 extern int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state);
 extern int sdhci_resume_host(struct sdhci_host *host);
 #endif
+
+#endif /* __SDHCI_H */
diff --git a/drivers/mtd/maps/pxa2xx-flash.c b/drivers/mtd/maps/pxa2xx-flash.c
index 74fa075c838a..b13f6417b5b2 100644
--- a/drivers/mtd/maps/pxa2xx-flash.c
+++ b/drivers/mtd/maps/pxa2xx-flash.c
@@ -20,14 +20,23 @@
 
 #include <asm/io.h>
 #include <mach/hardware.h>
-#include <asm/cacheflush.h>
 
 #include <asm/mach/flash.h>
 
+#define CACHELINESIZE   32
+
 static void pxa2xx_map_inval_cache(struct map_info *map, unsigned long from,
                                       ssize_t len)
 {
-        flush_ioremap_region(map->phys, map->cached, from, len);
+        unsigned long start = (unsigned long)map->cached + from;
+        unsigned long end = start + len;
+
+        start &= ~(CACHELINESIZE - 1);
+        while (start < end) {
+                /* invalidate D cache line */
+                asm volatile ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start));
+                start += CACHELINESIZE;
+        }
 }
 
 struct pxa2xx_flash_info {
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 7678538344f4..677cd53f18c3 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -291,14 +291,6 @@ config MTD_NAND_SHARPSL
         tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)"
         depends on ARCH_PXA
 
-config MTD_NAND_BASLER_EXCITE
-        tristate  "Support for NAND Flash on Basler eXcite"
-        depends on BASLER_EXCITE
-        help
-          This enables the driver for the NAND flash device found on the
-          Basler eXcite Smart Camera. If built as a module, the driver
-          will be named excite_nandflash.
-
 config MTD_NAND_CAFE
         tristate "NAND support for OLPC CAFÉ chip"
         depends on PCI
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 460a1f39a8d1..1407bd144015 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -27,7 +27,6 @@ obj-$(CONFIG_MTD_NAND_ATMEL)		+= atmel_nand.o
 obj-$(CONFIG_MTD_NAND_GPIO)             += gpio.o
 obj-$(CONFIG_MTD_NAND_OMAP2)            += omap2.o
 obj-$(CONFIG_MTD_NAND_CM_X270)          += cmx270_nand.o
-obj-$(CONFIG_MTD_NAND_BASLER_EXCITE)    += excite_nandflash.o
 obj-$(CONFIG_MTD_NAND_PXA3xx)           += pxa3xx_nand.o
 obj-$(CONFIG_MTD_NAND_TMIO)             += tmio_nand.o
 obj-$(CONFIG_MTD_NAND_PLATFORM)         += plat_nand.o
diff --git a/drivers/mtd/nand/excite_nandflash.c b/drivers/mtd/nand/excite_nandflash.c
deleted file mode 100644
index af6a6a5399e1..000000000000
--- a/drivers/mtd/nand/excite_nandflash.c
+++ /dev/null
@@ -1,248 +0,0 @@
-/*
-*  Copyright (C) 2005 - 2007 by Basler Vision Technologies AG
-*  Author: Thomas Koeller <thomas.koeller.qbaslerweb.com>
-*  Original code by Thies Moeller <thies.moeller@baslerweb.com>
-*
-*  This program is free software; you can redistribute it and/or modify
-*  it under the terms of the GNU General Public License as published by
-*  the Free Software Foundation; either version 2 of the License, or
-*  (at your option) any later version.
-*
-*  This program is distributed in the hope that it will be useful,
-*  but WITHOUT ANY WARRANTY; without even the implied warranty of
-*  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-*  GNU General Public License for more details.
-*
-*  You should have received a copy of the GNU General Public License
-*  along with this program; if not, write to the Free Software
-*  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/ioport.h>
-#include <linux/platform_device.h>
-#include <linux/delay.h>
-#include <linux/err.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/nand_ecc.h>
-#include <linux/mtd/partitions.h>
-
-#include <asm/io.h>
-#include <asm/rm9k-ocd.h>
-
-#include <excite_nandflash.h>
-
-#define EXCITE_NANDFLASH_VERSION "0.1"
-
-/* I/O register offsets */
-#define EXCITE_NANDFLASH_DATA_BYTE   0x00
-#define EXCITE_NANDFLASH_STATUS_BYTE 0x0c
-#define EXCITE_NANDFLASH_ADDR_BYTE   0x10
-#define EXCITE_NANDFLASH_CMD_BYTE    0x14
-
-/* prefix for debug output */
-static const char module_id[] = "excite_nandflash";
-
-/*
- * partition definition
- */
-static const struct mtd_partition partition_info[] = {
-        {
-                .name = "eXcite RootFS",
-                .offset = 0,
-                .size = MTDPART_SIZ_FULL
-        }
-};
-
-static inline const struct resource *
-excite_nand_get_resource(struct platform_device *d, unsigned long flags,
-                         const char *basename)
-{
-        char buf[80];
-
-        if (snprintf(buf, sizeof buf, "%s_%u", basename, d->id) >= sizeof buf)
-                return NULL;
-        return platform_get_resource_byname(d, flags, buf);
-}
-
-static inline void __iomem *
-excite_nand_map_regs(struct platform_device *d, const char *basename)
-{
-        void *result = NULL;
-        const struct resource *const r =
-            excite_nand_get_resource(d, IORESOURCE_MEM, basename);
-
-        if (r)
-                result = ioremap_nocache(r->start, r->end + 1 - r->start);
-        return result;
-}
-
-/* controller and mtd information */
-struct excite_nand_drvdata {
-        struct mtd_info board_mtd;
-        struct nand_chip board_chip;
-        void __iomem *regs;
-        void __iomem *tgt;
-};
-
-/* Control function */
-static void excite_nand_control(struct mtd_info *mtd, int cmd,
-                                       unsigned int ctrl)
-{
-        struct excite_nand_drvdata * const d =
-            container_of(mtd, struct excite_nand_drvdata, board_mtd);
-
-        switch (ctrl) {
-        case NAND_CTRL_CHANGE | NAND_CTRL_CLE:
-                d->tgt = d->regs + EXCITE_NANDFLASH_CMD_BYTE;
-                break;
-        case NAND_CTRL_CHANGE | NAND_CTRL_ALE:
-                d->tgt = d->regs + EXCITE_NANDFLASH_ADDR_BYTE;
-                break;
-        case NAND_CTRL_CHANGE | NAND_NCE:
-                d->tgt = d->regs + EXCITE_NANDFLASH_DATA_BYTE;
-                break;
-        }
-
-        if (cmd != NAND_CMD_NONE)
-                __raw_writeb(cmd, d->tgt);
-}
-
-/* Return 0 if flash is busy, 1 if ready */
-static int excite_nand_devready(struct mtd_info *mtd)
-{
-        struct excite_nand_drvdata * const drvdata =
-            container_of(mtd, struct excite_nand_drvdata, board_mtd);
-
-        return __raw_readb(drvdata->regs + EXCITE_NANDFLASH_STATUS_BYTE);
-}
-
-/*
- * Called by device layer to remove the driver.
- * The binding to the mtd and all allocated
- * resources are released.
- */
-static int __devexit excite_nand_remove(struct platform_device *dev)
-{
-        struct excite_nand_drvdata * const this = platform_get_drvdata(dev);
-
-        platform_set_drvdata(dev, NULL);
-
-        if (unlikely(!this)) {
-                printk(KERN_ERR "%s: called %s without private data!!",
-                       module_id, __func__);
-                return -EINVAL;
-        }
-
-        /* first thing we need to do is release our mtd
-         * then go through freeing the resource used
-         */
-        nand_release(&this->board_mtd);
-
-        /* free the common resources */
-        iounmap(this->regs);
-        kfree(this);
-
-        DEBUG(MTD_DEBUG_LEVEL1, "%s: removed\n", module_id);
-        return 0;
-}
-
-/*
- * Called by device layer when it finds a device matching
- * one our driver can handle. This code checks to see if
- * it can allocate all necessary resources then calls the
- * nand layer to look for devices.
-*/
-static int __init excite_nand_probe(struct platform_device *pdev)
-{
-        struct excite_nand_drvdata *drvdata;    /* private driver data */
-        struct nand_chip *board_chip;   /* private flash chip data */
-        struct mtd_info *board_mtd;     /* mtd info for this board */
-        int scan_res;
-
-        drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
-        if (unlikely(!drvdata)) {
-                printk(KERN_ERR "%s: no memory for drvdata\n",
-                       module_id);
-                return -ENOMEM;
-        }
-
-        /* bind private data into driver */
-        platform_set_drvdata(pdev, drvdata);
-
-        /* allocate and map the resource */
-        drvdata->regs =
-                excite_nand_map_regs(pdev, EXCITE_NANDFLASH_RESOURCE_REGS);
-
-        if (unlikely(!drvdata->regs)) {
-                printk(KERN_ERR "%s: cannot reserve register region\n",
-                       module_id);
-                kfree(drvdata);
-                return -ENXIO;
-        }
-        
-        drvdata->tgt = drvdata->regs + EXCITE_NANDFLASH_DATA_BYTE;
-
-        /* initialise our chip */
-        board_chip = &drvdata->board_chip;
-        board_chip->IO_ADDR_R = board_chip->IO_ADDR_W =
-                drvdata->regs + EXCITE_NANDFLASH_DATA_BYTE;
-        board_chip->cmd_ctrl = excite_nand_control;
-        board_chip->dev_ready = excite_nand_devready;
-        board_chip->chip_delay = 25;
-        board_chip->ecc.mode = NAND_ECC_SOFT;
-
-        /* link chip to mtd */
-        board_mtd = &drvdata->board_mtd;
-        board_mtd->priv = board_chip;
-
-        DEBUG(MTD_DEBUG_LEVEL2, "%s: device scan\n", module_id);
-        scan_res = nand_scan(&drvdata->board_mtd, 1);
-
-        if (likely(!scan_res)) {
-                DEBUG(MTD_DEBUG_LEVEL2, "%s: register partitions\n", module_id);
-                add_mtd_partitions(&drvdata->board_mtd, partition_info,
-                                   ARRAY_SIZE(partition_info));
-        } else {
-                iounmap(drvdata->regs);
-                kfree(drvdata);
-                printk(KERN_ERR "%s: device scan failed\n", module_id);
-                return -EIO;
-        }
-        return 0;
-}
-
-static struct platform_driver excite_nand_driver = {
-        .driver = {
-                .name = "excite_nand",
-                .owner          = THIS_MODULE,
-        },
-        .probe = excite_nand_probe,
-        .remove = __devexit_p(excite_nand_remove)
-};
-
-static int __init excite_nand_init(void)
-{
-        pr_info("Basler eXcite nand flash driver Version "
-                EXCITE_NANDFLASH_VERSION "\n");
-        return platform_driver_register(&excite_nand_driver);
-}
-
-static void __exit excite_nand_exit(void)
-{
-        platform_driver_unregister(&excite_nand_driver);
-}
-
-module_init(excite_nand_init);
-module_exit(excite_nand_exit);
-
-MODULE_AUTHOR("Thomas Koeller <thomas.koeller@baslerweb.com>");
-MODULE_DESCRIPTION("Basler eXcite NAND-Flash driver");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(EXCITE_NANDFLASH_VERSION)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index a5be9ac6405c..e58a65391ad2 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1953,6 +1953,8 @@ config BCM63XX_ENET
 
 source "drivers/net/fs_enet/Kconfig"
 
+source "drivers/net/octeon/Kconfig"
+
 endif # NET_ETHERNET
 
 #
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 246323d7f161..ad1346dd9da9 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -285,3 +285,5 @@ obj-$(CONFIG_VIRTIO_NET) += virtio_net.o
 obj-$(CONFIG_SFC) += sfc/
 
 obj-$(CONFIG_WIMAX) += wimax/
+
+obj-$(CONFIG_OCTEON_MGMT_ETHERNET) += octeon/
diff --git a/drivers/net/octeon/Kconfig b/drivers/net/octeon/Kconfig
new file mode 100644
index 000000000000..1e56bbf3f5c0
--- /dev/null
+++ b/drivers/net/octeon/Kconfig
@@ -0,0 +1,10 @@
+config OCTEON_MGMT_ETHERNET
+        tristate "Octeon Management port ethernet driver (CN5XXX, CN6XXX)"
+        depends on  CPU_CAVIUM_OCTEON
+        select PHYLIB
+        select MDIO_OCTEON
+        default y
+        help
+          This option enables the ethernet driver for the management
+          port on Cavium Networks' Octeon CN57XX, CN56XX, CN55XX,
+          CN54XX, CN52XX, and CN6XXX chips.
diff --git a/drivers/net/octeon/Makefile b/drivers/net/octeon/Makefile
new file mode 100644
index 000000000000..906edecacfd3
--- /dev/null
+++ b/drivers/net/octeon/Makefile
@@ -0,0 +1,2 @@
+
+obj-$(CONFIG_OCTEON_MGMT_ETHERNET)      += octeon_mgmt.o
diff --git a/drivers/net/octeon/octeon_mgmt.c b/drivers/net/octeon/octeon_mgmt.c
new file mode 100644
index 000000000000..050538bf155a
--- /dev/null
+++ b/drivers/net/octeon/octeon_mgmt.c
@@ -0,0 +1,1176 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2009 Cavium Networks
+ */
+
+#include <linux/capability.h>
+#include <linux/dma-mapping.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/if_vlan.h>
+#include <linux/phy.h>
+#include <linux/spinlock.h>
+
+#include <asm/octeon/octeon.h>
+#include <asm/octeon/cvmx-mixx-defs.h>
+#include <asm/octeon/cvmx-agl-defs.h>
+
+#define DRV_NAME "octeon_mgmt"
+#define DRV_VERSION "2.0"
+#define DRV_DESCRIPTION \
+        "Cavium Networks Octeon MII (management) port Network Driver"
+
+#define OCTEON_MGMT_NAPI_WEIGHT 16
+
+/*
+ * Ring sizes that are powers of two allow for more efficient modulo
+ * opertions.
+ */
+#define OCTEON_MGMT_RX_RING_SIZE 512
+#define OCTEON_MGMT_TX_RING_SIZE 128
+
+/* Allow 8 bytes for vlan and FCS. */
+#define OCTEON_MGMT_RX_HEADROOM (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN)
+
+union mgmt_port_ring_entry {
+        u64 d64;
+        struct {
+                u64    reserved_62_63:2;
+                /* Length of the buffer/packet in bytes */
+                u64    len:14;
+                /* For TX, signals that the packet should be timestamped */
+                u64    tstamp:1;
+                /* The RX error code */
+                u64    code:7;
+#define RING_ENTRY_CODE_DONE 0xf
+#define RING_ENTRY_CODE_MORE 0x10
+                /* Physical address of the buffer */
+                u64    addr:40;
+        } s;
+};
+
+struct octeon_mgmt {
+        struct net_device *netdev;
+        int port;
+        int irq;
+        u64 *tx_ring;
+        dma_addr_t tx_ring_handle;
+        unsigned int tx_next;
+        unsigned int tx_next_clean;
+        unsigned int tx_current_fill;
+        /* The tx_list lock also protects the ring related variables */
+        struct sk_buff_head tx_list;
+
+        /* RX variables only touched in napi_poll.  No locking necessary. */
+        u64 *rx_ring;
+        dma_addr_t rx_ring_handle;
+        unsigned int rx_next;
+        unsigned int rx_next_fill;
+        unsigned int rx_current_fill;
+        struct sk_buff_head rx_list;
+
+        spinlock_t lock;
+        unsigned int last_duplex;
+        unsigned int last_link;
+        struct device *dev;
+        struct napi_struct napi;
+        struct tasklet_struct tx_clean_tasklet;
+        struct phy_device *phydev;
+};
+
+static void octeon_mgmt_set_rx_irq(struct octeon_mgmt *p, int enable)
+{
+        int port = p->port;
+        union cvmx_mixx_intena mix_intena;
+        unsigned long flags;
+
+        spin_lock_irqsave(&p->lock, flags);
+        mix_intena.u64 = cvmx_read_csr(CVMX_MIXX_INTENA(port));
+        mix_intena.s.ithena = enable ? 1 : 0;
+        cvmx_write_csr(CVMX_MIXX_INTENA(port), mix_intena.u64);
+        spin_unlock_irqrestore(&p->lock, flags);
+}
+
+static void octeon_mgmt_set_tx_irq(struct octeon_mgmt *p, int enable)
+{
+        int port = p->port;
+        union cvmx_mixx_intena mix_intena;
+        unsigned long flags;
+
+        spin_lock_irqsave(&p->lock, flags);
+        mix_intena.u64 = cvmx_read_csr(CVMX_MIXX_INTENA(port));
+        mix_intena.s.othena = enable ? 1 : 0;
+        cvmx_write_csr(CVMX_MIXX_INTENA(port), mix_intena.u64);
+        spin_unlock_irqrestore(&p->lock, flags);
+}
+
+static inline void octeon_mgmt_enable_rx_irq(struct octeon_mgmt *p)
+{
+        octeon_mgmt_set_rx_irq(p, 1);
+}
+
+static inline void octeon_mgmt_disable_rx_irq(struct octeon_mgmt *p)
+{
+        octeon_mgmt_set_rx_irq(p, 0);
+}
+
+static inline void octeon_mgmt_enable_tx_irq(struct octeon_mgmt *p)
+{
+        octeon_mgmt_set_tx_irq(p, 1);
+}
+
+static inline void octeon_mgmt_disable_tx_irq(struct octeon_mgmt *p)
+{
+        octeon_mgmt_set_tx_irq(p, 0);
+}
+
+static unsigned int ring_max_fill(unsigned int ring_size)
+{
+        return ring_size - 8;
+}
+
+static unsigned int ring_size_to_bytes(unsigned int ring_size)
+{
+        return ring_size * sizeof(union mgmt_port_ring_entry);
+}
+
+static void octeon_mgmt_rx_fill_ring(struct net_device *netdev)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+        int port = p->port;
+
+        while (p->rx_current_fill < ring_max_fill(OCTEON_MGMT_RX_RING_SIZE)) {
+                unsigned int size;
+                union mgmt_port_ring_entry re;
+                struct sk_buff *skb;
+
+                /* CN56XX pass 1 needs 8 bytes of padding.  */
+                size = netdev->mtu + OCTEON_MGMT_RX_HEADROOM + 8 + NET_IP_ALIGN;
+
+                skb = netdev_alloc_skb(netdev, size);
+                if (!skb)
+                        break;
+                skb_reserve(skb, NET_IP_ALIGN);
+                __skb_queue_tail(&p->rx_list, skb);
+
+                re.d64 = 0;
+                re.s.len = size;
+                re.s.addr = dma_map_single(p->dev, skb->data,
+                                           size,
+                                           DMA_FROM_DEVICE);
+
+                /* Put it in the ring.  */
+                p->rx_ring[p->rx_next_fill] = re.d64;
+                dma_sync_single_for_device(p->dev, p->rx_ring_handle,
+                                           ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE),
+                                           DMA_BIDIRECTIONAL);
+                p->rx_next_fill =
+                        (p->rx_next_fill + 1) % OCTEON_MGMT_RX_RING_SIZE;
+                p->rx_current_fill++;
+                /* Ring the bell.  */
+                cvmx_write_csr(CVMX_MIXX_IRING2(port), 1);
+        }
+}
+
+static void octeon_mgmt_clean_tx_buffers(struct octeon_mgmt *p)
+{
+        int port = p->port;
+        union cvmx_mixx_orcnt mix_orcnt;
+        union mgmt_port_ring_entry re;
+        struct sk_buff *skb;
+        int cleaned = 0;
+        unsigned long flags;
+
+        mix_orcnt.u64 = cvmx_read_csr(CVMX_MIXX_ORCNT(port));
+        while (mix_orcnt.s.orcnt) {
+                dma_sync_single_for_cpu(p->dev, p->tx_ring_handle,
+                                        ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE),
+                                        DMA_BIDIRECTIONAL);
+
+                spin_lock_irqsave(&p->tx_list.lock, flags);
+
+                re.d64 = p->tx_ring[p->tx_next_clean];
+                p->tx_next_clean =
+                        (p->tx_next_clean + 1) % OCTEON_MGMT_TX_RING_SIZE;
+                skb = __skb_dequeue(&p->tx_list);
+
+                mix_orcnt.u64 = 0;
+                mix_orcnt.s.orcnt = 1;
+
+                /* Acknowledge to hardware that we have the buffer.  */
+                cvmx_write_csr(CVMX_MIXX_ORCNT(port), mix_orcnt.u64);
+                p->tx_current_fill--;
+
+                spin_unlock_irqrestore(&p->tx_list.lock, flags);
+
+                dma_unmap_single(p->dev, re.s.addr, re.s.len,
+                                 DMA_TO_DEVICE);
+                dev_kfree_skb_any(skb);
+                cleaned++;
+
+                mix_orcnt.u64 = cvmx_read_csr(CVMX_MIXX_ORCNT(port));
+        }
+
+        if (cleaned && netif_queue_stopped(p->netdev))
+                netif_wake_queue(p->netdev);
+}
+
+static void octeon_mgmt_clean_tx_tasklet(unsigned long arg)
+{
+        struct octeon_mgmt *p = (struct octeon_mgmt *)arg;
+        octeon_mgmt_clean_tx_buffers(p);
+        octeon_mgmt_enable_tx_irq(p);
+}
+
+static void octeon_mgmt_update_rx_stats(struct net_device *netdev)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+        int port = p->port;
+        unsigned long flags;
+        u64 drop, bad;
+
+        /* These reads also clear the count registers.  */
+        drop = cvmx_read_csr(CVMX_AGL_GMX_RXX_STATS_PKTS_DRP(port));
+        bad = cvmx_read_csr(CVMX_AGL_GMX_RXX_STATS_PKTS_BAD(port));
+
+        if (drop || bad) {
+                /* Do an atomic update. */
+                spin_lock_irqsave(&p->lock, flags);
+                netdev->stats.rx_errors += bad;
+                netdev->stats.rx_dropped += drop;
+                spin_unlock_irqrestore(&p->lock, flags);
+        }
+}
+
+static void octeon_mgmt_update_tx_stats(struct net_device *netdev)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+        int port = p->port;
+        unsigned long flags;
+
+        union cvmx_agl_gmx_txx_stat0 s0;
+        union cvmx_agl_gmx_txx_stat1 s1;
+
+        /* These reads also clear the count registers.  */
+        s0.u64 = cvmx_read_csr(CVMX_AGL_GMX_TXX_STAT0(port));
+        s1.u64 = cvmx_read_csr(CVMX_AGL_GMX_TXX_STAT1(port));
+
+        if (s0.s.xsdef || s0.s.xscol || s1.s.scol || s1.s.mcol) {
+                /* Do an atomic update. */
+                spin_lock_irqsave(&p->lock, flags);
+                netdev->stats.tx_errors += s0.s.xsdef + s0.s.xscol;
+                netdev->stats.collisions += s1.s.scol + s1.s.mcol;
+                spin_unlock_irqrestore(&p->lock, flags);
+        }
+}
+
+/*
+ * Dequeue a receive skb and its corresponding ring entry.  The ring
+ * entry is returned, *pskb is updated to point to the skb.
+ */
+static u64 octeon_mgmt_dequeue_rx_buffer(struct octeon_mgmt *p,
+                                         struct sk_buff **pskb)
+{
+        union mgmt_port_ring_entry re;
+
+        dma_sync_single_for_cpu(p->dev, p->rx_ring_handle,
+                                ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE),
+                                DMA_BIDIRECTIONAL);
+
+        re.d64 = p->rx_ring[p->rx_next];
+        p->rx_next = (p->rx_next + 1) % OCTEON_MGMT_RX_RING_SIZE;
+        p->rx_current_fill--;
+        *pskb = __skb_dequeue(&p->rx_list);
+
+        dma_unmap_single(p->dev, re.s.addr,
+                         ETH_FRAME_LEN + OCTEON_MGMT_RX_HEADROOM,
+                         DMA_FROM_DEVICE);
+
+        return re.d64;
+}
+
+
+static int octeon_mgmt_receive_one(struct octeon_mgmt *p)
+{
+        int port = p->port;
+        struct net_device *netdev = p->netdev;
+        union cvmx_mixx_ircnt mix_ircnt;
+        union mgmt_port_ring_entry re;
+        struct sk_buff *skb;
+        struct sk_buff *skb2;
+        struct sk_buff *skb_new;
+        union mgmt_port_ring_entry re2;
+        int rc = 1;
+
+
+        re.d64 = octeon_mgmt_dequeue_rx_buffer(p, &skb);
+        if (likely(re.s.code == RING_ENTRY_CODE_DONE)) {
+                /* A good packet, send it up. */
+                skb_put(skb, re.s.len);
+good:
+                skb->protocol = eth_type_trans(skb, netdev);
+                netdev->stats.rx_packets++;
+                netdev->stats.rx_bytes += skb->len;
+                netdev->last_rx = jiffies;
+                netif_receive_skb(skb);
+                rc = 0;
+        } else if (re.s.code == RING_ENTRY_CODE_MORE) {
+                /*
+                 * Packet split across skbs.  This can happen if we
+                 * increase the MTU.  Buffers that are already in the
+                 * rx ring can then end up being too small.  As the rx
+                 * ring is refilled, buffers sized for the new MTU
+                 * will be used and we should go back to the normal
+                 * non-split case.
+                 */
+                skb_put(skb, re.s.len);
+                do {
+                        re2.d64 = octeon_mgmt_dequeue_rx_buffer(p, &skb2);
+                        if (re2.s.code != RING_ENTRY_CODE_MORE
+                                && re2.s.code != RING_ENTRY_CODE_DONE)
+                                goto split_error;
+                        skb_put(skb2,  re2.s.len);
+                        skb_new = skb_copy_expand(skb, 0, skb2->len,
+                                                  GFP_ATOMIC);
+                        if (!skb_new)
+                                goto split_error;
+                        if (skb_copy_bits(skb2, 0, skb_tail_pointer(skb_new),
+                                          skb2->len))
+                                goto split_error;
+                        skb_put(skb_new, skb2->len);
+                        dev_kfree_skb_any(skb);
+                        dev_kfree_skb_any(skb2);
+                        skb = skb_new;
+                } while (re2.s.code == RING_ENTRY_CODE_MORE);
+                goto good;
+        } else {
+                /* Some other error, discard it. */
+                dev_kfree_skb_any(skb);
+                /*
+                 * Error statistics are accumulated in
+                 * octeon_mgmt_update_rx_stats.
+                 */
+        }
+        goto done;
+split_error:
+        /* Discard the whole mess. */
+        dev_kfree_skb_any(skb);
+        dev_kfree_skb_any(skb2);
+        while (re2.s.code == RING_ENTRY_CODE_MORE) {
+                re2.d64 = octeon_mgmt_dequeue_rx_buffer(p, &skb2);
+                dev_kfree_skb_any(skb2);
+        }
+        netdev->stats.rx_errors++;
+
+done:
+        /* Tell the hardware we processed a packet.  */
+        mix_ircnt.u64 = 0;
+        mix_ircnt.s.ircnt = 1;
+        cvmx_write_csr(CVMX_MIXX_IRCNT(port), mix_ircnt.u64);
+        return rc;
+
+}
+
+static int octeon_mgmt_receive_packets(struct octeon_mgmt *p, int budget)
+{
+        int port = p->port;
+        unsigned int work_done = 0;
+        union cvmx_mixx_ircnt mix_ircnt;
+        int rc;
+
+
+        mix_ircnt.u64 = cvmx_read_csr(CVMX_MIXX_IRCNT(port));
+        while (work_done < budget && mix_ircnt.s.ircnt) {
+
+                rc = octeon_mgmt_receive_one(p);
+                if (!rc)
+                        work_done++;
+
+                /* Check for more packets. */
+                mix_ircnt.u64 = cvmx_read_csr(CVMX_MIXX_IRCNT(port));
+        }
+
+        octeon_mgmt_rx_fill_ring(p->netdev);
+
+        return work_done;
+}
+
+static int octeon_mgmt_napi_poll(struct napi_struct *napi, int budget)
+{
+        struct octeon_mgmt *p = container_of(napi, struct octeon_mgmt, napi);
+        struct net_device *netdev = p->netdev;
+        unsigned int work_done = 0;
+
+        work_done = octeon_mgmt_receive_packets(p, budget);
+
+        if (work_done < budget) {
+                /* We stopped because no more packets were available. */
+                napi_complete(napi);
+                octeon_mgmt_enable_rx_irq(p);
+        }
+        octeon_mgmt_update_rx_stats(netdev);
+
+        return work_done;
+}
+
+/* Reset the hardware to clean state.  */
+static void octeon_mgmt_reset_hw(struct octeon_mgmt *p)
+{
+        union cvmx_mixx_ctl mix_ctl;
+        union cvmx_mixx_bist mix_bist;
+        union cvmx_agl_gmx_bist agl_gmx_bist;
+
+        mix_ctl.u64 = 0;
+        cvmx_write_csr(CVMX_MIXX_CTL(p->port), mix_ctl.u64);
+        do {
+                mix_ctl.u64 = cvmx_read_csr(CVMX_MIXX_CTL(p->port));
+        } while (mix_ctl.s.busy);
+        mix_ctl.s.reset = 1;
+        cvmx_write_csr(CVMX_MIXX_CTL(p->port), mix_ctl.u64);
+        cvmx_read_csr(CVMX_MIXX_CTL(p->port));
+        cvmx_wait(64);
+
+        mix_bist.u64 = cvmx_read_csr(CVMX_MIXX_BIST(p->port));
+        if (mix_bist.u64)
+                dev_warn(p->dev, "MIX failed BIST (0x%016llx)\n",
+                        (unsigned long long)mix_bist.u64);
+
+        agl_gmx_bist.u64 = cvmx_read_csr(CVMX_AGL_GMX_BIST);
+        if (agl_gmx_bist.u64)
+                dev_warn(p->dev, "AGL failed BIST (0x%016llx)\n",
+                         (unsigned long long)agl_gmx_bist.u64);
+}
+
+struct octeon_mgmt_cam_state {
+        u64 cam[6];
+        u64 cam_mask;
+        int cam_index;
+};
+
+static void octeon_mgmt_cam_state_add(struct octeon_mgmt_cam_state *cs,
+                                      unsigned char *addr)
+{
+        int i;
+
+        for (i = 0; i < 6; i++)
+                cs->cam[i] |= (u64)addr[i] << (8 * (cs->cam_index));
+        cs->cam_mask |= (1ULL << cs->cam_index);
+        cs->cam_index++;
+}
+
+static void octeon_mgmt_set_rx_filtering(struct net_device *netdev)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+        int port = p->port;
+        int i;
+        union cvmx_agl_gmx_rxx_adr_ctl adr_ctl;
+        union cvmx_agl_gmx_prtx_cfg agl_gmx_prtx;
+        unsigned long flags;
+        unsigned int prev_packet_enable;
+        unsigned int cam_mode = 1; /* 1 - Accept on CAM match */
+        unsigned int multicast_mode = 1; /* 1 - Reject all multicast.  */
+        struct octeon_mgmt_cam_state cam_state;
+        struct dev_addr_list *list;
+        struct list_head *pos;
+        int available_cam_entries;
+
+        memset(&cam_state, 0, sizeof(cam_state));
+
+        if ((netdev->flags & IFF_PROMISC) || netdev->dev_addrs.count > 7) {
+                cam_mode = 0;
+                available_cam_entries = 8;
+        } else {
+                /*
+                 * One CAM entry for the primary address, leaves seven
+                 * for the secondary addresses.
+                 */
+                available_cam_entries = 7 - netdev->dev_addrs.count;
+        }
+
+        if (netdev->flags & IFF_MULTICAST) {
+                if (cam_mode == 0 || (netdev->flags & IFF_ALLMULTI)
+                    || netdev->mc_count  > available_cam_entries)
+                        multicast_mode = 2; /* 1 - Accept all multicast.  */
+                else
+                        multicast_mode = 0; /* 0 - Use CAM.  */
+        }
+
+        if (cam_mode == 1) {
+                /* Add primary address. */
+                octeon_mgmt_cam_state_add(&cam_state, netdev->dev_addr);
+                list_for_each(pos, &netdev->dev_addrs.list) {
+                        struct netdev_hw_addr *hw_addr;
+                        hw_addr = list_entry(pos, struct netdev_hw_addr, list);
+                        octeon_mgmt_cam_state_add(&cam_state, hw_addr->addr);
+                        list = list->next;
+                }
+        }
+        if (multicast_mode == 0) {
+                i = netdev->mc_count;
+                list = netdev->mc_list;
+                while (i--) {
+                        octeon_mgmt_cam_state_add(&cam_state, list->da_addr);
+                        list = list->next;
+                }
+        }
+
+
+        spin_lock_irqsave(&p->lock, flags);
+
+        /* Disable packet I/O. */
+        agl_gmx_prtx.u64 = cvmx_read_csr(CVMX_AGL_GMX_PRTX_CFG(port));
+        prev_packet_enable = agl_gmx_prtx.s.en;
+        agl_gmx_prtx.s.en = 0;
+        cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), agl_gmx_prtx.u64);
+
+
+        adr_ctl.u64 = 0;
+        adr_ctl.s.cam_mode = cam_mode;
+        adr_ctl.s.mcst = multicast_mode;
+        adr_ctl.s.bcst = 1;     /* Allow broadcast */
+
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CTL(port), adr_ctl.u64);
+
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM0(port), cam_state.cam[0]);
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM1(port), cam_state.cam[1]);
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM2(port), cam_state.cam[2]);
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM3(port), cam_state.cam[3]);
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM4(port), cam_state.cam[4]);
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM5(port), cam_state.cam[5]);
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM_EN(port), cam_state.cam_mask);
+
+        /* Restore packet I/O. */
+        agl_gmx_prtx.s.en = prev_packet_enable;
+        cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), agl_gmx_prtx.u64);
+
+        spin_unlock_irqrestore(&p->lock, flags);
+}
+
+static int octeon_mgmt_set_mac_address(struct net_device *netdev, void *addr)
+{
+        struct sockaddr *sa = addr;
+
+        if (!is_valid_ether_addr(sa->sa_data))
+                return -EADDRNOTAVAIL;
+
+        memcpy(netdev->dev_addr, sa->sa_data, ETH_ALEN);
+
+        octeon_mgmt_set_rx_filtering(netdev);
+
+        return 0;
+}
+
+static int octeon_mgmt_change_mtu(struct net_device *netdev, int new_mtu)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+        int port = p->port;
+        int size_without_fcs = new_mtu + OCTEON_MGMT_RX_HEADROOM;
+
+        /*
+         * Limit the MTU to make sure the ethernet packets are between
+         * 64 bytes and 16383 bytes.
+         */
+        if (size_without_fcs < 64 || size_without_fcs > 16383) {
+                dev_warn(p->dev, "MTU must be between %d and %d.\n",
+                         64 - OCTEON_MGMT_RX_HEADROOM,
+                         16383 - OCTEON_MGMT_RX_HEADROOM);
+                return -EINVAL;
+        }
+
+        netdev->mtu = new_mtu;
+
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_FRM_MAX(port), size_without_fcs);
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_JABBER(port),
+                       (size_without_fcs + 7) & 0xfff8);
+
+        return 0;
+}
+
+static irqreturn_t octeon_mgmt_interrupt(int cpl, void *dev_id)
+{
+        struct net_device *netdev = dev_id;
+        struct octeon_mgmt *p = netdev_priv(netdev);
+        int port = p->port;
+        union cvmx_mixx_isr mixx_isr;
+
+        mixx_isr.u64 = cvmx_read_csr(CVMX_MIXX_ISR(port));
+
+        /* Clear any pending interrupts */
+        cvmx_write_csr(CVMX_MIXX_ISR(port),
+                       cvmx_read_csr(CVMX_MIXX_ISR(port)));
+        cvmx_read_csr(CVMX_MIXX_ISR(port));
+
+        if (mixx_isr.s.irthresh) {
+                octeon_mgmt_disable_rx_irq(p);
+                napi_schedule(&p->napi);
+        }
+        if (mixx_isr.s.orthresh) {
+                octeon_mgmt_disable_tx_irq(p);
+                tasklet_schedule(&p->tx_clean_tasklet);
+        }
+
+        return IRQ_HANDLED;
+}
+
+static int octeon_mgmt_ioctl(struct net_device *netdev,
+                             struct ifreq *rq, int cmd)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+
+        if (!netif_running(netdev))
+                return -EINVAL;
+
+        if (!p->phydev)
+                return -EINVAL;
+
+        return phy_mii_ioctl(p->phydev, if_mii(rq), cmd);
+}
+
+static void octeon_mgmt_adjust_link(struct net_device *netdev)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+        int port = p->port;
+        union cvmx_agl_gmx_prtx_cfg prtx_cfg;
+        unsigned long flags;
+        int link_changed = 0;
+
+        spin_lock_irqsave(&p->lock, flags);
+        if (p->phydev->link) {
+                if (!p->last_link)
+                        link_changed = 1;
+                if (p->last_duplex != p->phydev->duplex) {
+                        p->last_duplex = p->phydev->duplex;
+                        prtx_cfg.u64 =
+                                cvmx_read_csr(CVMX_AGL_GMX_PRTX_CFG(port));
+                        prtx_cfg.s.duplex = p->phydev->duplex;
+                        cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port),
+                                       prtx_cfg.u64);
+                }
+        } else {
+                if (p->last_link)
+                        link_changed = -1;
+        }
+        p->last_link = p->phydev->link;
+        spin_unlock_irqrestore(&p->lock, flags);
+
+        if (link_changed != 0) {
+                if (link_changed > 0) {
+                        netif_carrier_on(netdev);
+                        pr_info("%s: Link is up - %d/%s\n", netdev->name,
+                                p->phydev->speed,
+                                DUPLEX_FULL == p->phydev->duplex ?
+                                "Full" : "Half");
+                } else {
+                        netif_carrier_off(netdev);
+                        pr_info("%s: Link is down\n", netdev->name);
+                }
+        }
+}
+
+static int octeon_mgmt_init_phy(struct net_device *netdev)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+        char phy_id[20];
+
+        if (octeon_is_simulation()) {
+                /* No PHYs in the simulator. */
+                netif_carrier_on(netdev);
+                return 0;
+        }
+
+        snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, "0", p->port);
+
+        p->phydev = phy_connect(netdev, phy_id, octeon_mgmt_adjust_link, 0,
+                                PHY_INTERFACE_MODE_MII);
+
+        if (IS_ERR(p->phydev)) {
+                p->phydev = NULL;
+                return -1;
+        }
+
+        phy_start_aneg(p->phydev);
+
+        return 0;
+}
+
+static int octeon_mgmt_open(struct net_device *netdev)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+        int port = p->port;
+        union cvmx_mixx_ctl mix_ctl;
+        union cvmx_agl_gmx_inf_mode agl_gmx_inf_mode;
+        union cvmx_mixx_oring1 oring1;
+        union cvmx_mixx_iring1 iring1;
+        union cvmx_agl_gmx_prtx_cfg prtx_cfg;
+        union cvmx_agl_gmx_rxx_frm_ctl rxx_frm_ctl;
+        union cvmx_mixx_irhwm mix_irhwm;
+        union cvmx_mixx_orhwm mix_orhwm;
+        union cvmx_mixx_intena mix_intena;
+        struct sockaddr sa;
+
+        /* Allocate ring buffers.  */
+        p->tx_ring = kzalloc(ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE),
+                             GFP_KERNEL);
+        if (!p->tx_ring)
+                return -ENOMEM;
+        p->tx_ring_handle =
+                dma_map_single(p->dev, p->tx_ring,
+                               ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE),
+                               DMA_BIDIRECTIONAL);
+        p->tx_next = 0;
+        p->tx_next_clean = 0;
+        p->tx_current_fill = 0;
+
+
+        p->rx_ring = kzalloc(ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE),
+                             GFP_KERNEL);
+        if (!p->rx_ring)
+                goto err_nomem;
+        p->rx_ring_handle =
+                dma_map_single(p->dev, p->rx_ring,
+                               ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE),
+                               DMA_BIDIRECTIONAL);
+
+        p->rx_next = 0;
+        p->rx_next_fill = 0;
+        p->rx_current_fill = 0;
+
+        octeon_mgmt_reset_hw(p);
+
+        mix_ctl.u64 = cvmx_read_csr(CVMX_MIXX_CTL(port));
+
+        /* Bring it out of reset if needed. */
+        if (mix_ctl.s.reset) {
+                mix_ctl.s.reset = 0;
+                cvmx_write_csr(CVMX_MIXX_CTL(port), mix_ctl.u64);
+                do {
+                        mix_ctl.u64 = cvmx_read_csr(CVMX_MIXX_CTL(port));
+                } while (mix_ctl.s.reset);
+        }
+
+        agl_gmx_inf_mode.u64 = 0;
+        agl_gmx_inf_mode.s.en = 1;
+        cvmx_write_csr(CVMX_AGL_GMX_INF_MODE, agl_gmx_inf_mode.u64);
+
+        oring1.u64 = 0;
+        oring1.s.obase = p->tx_ring_handle >> 3;
+        oring1.s.osize = OCTEON_MGMT_TX_RING_SIZE;
+        cvmx_write_csr(CVMX_MIXX_ORING1(port), oring1.u64);
+
+        iring1.u64 = 0;
+        iring1.s.ibase = p->rx_ring_handle >> 3;
+        iring1.s.isize = OCTEON_MGMT_RX_RING_SIZE;
+        cvmx_write_csr(CVMX_MIXX_IRING1(port), iring1.u64);
+
+        /* Disable packet I/O. */
+        prtx_cfg.u64 = cvmx_read_csr(CVMX_AGL_GMX_PRTX_CFG(port));
+        prtx_cfg.s.en = 0;
+        cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), prtx_cfg.u64);
+
+        memcpy(sa.sa_data, netdev->dev_addr, ETH_ALEN);
+        octeon_mgmt_set_mac_address(netdev, &sa);
+
+        octeon_mgmt_change_mtu(netdev, netdev->mtu);
+
+        /*
+         * Enable the port HW. Packets are not allowed until
+         * cvmx_mgmt_port_enable() is called.
+         */
+        mix_ctl.u64 = 0;
+        mix_ctl.s.crc_strip = 1;    /* Strip the ending CRC */
+        mix_ctl.s.en = 1;           /* Enable the port */
+        mix_ctl.s.nbtarb = 0;       /* Arbitration mode */
+        /* MII CB-request FIFO programmable high watermark */
+        mix_ctl.s.mrq_hwm = 1;
+        cvmx_write_csr(CVMX_MIXX_CTL(port), mix_ctl.u64);
+
+        if (OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X)
+            || OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X)) {
+                /*
+                 * Force compensation values, as they are not
+                 * determined properly by HW
+                 */
+                union cvmx_agl_gmx_drv_ctl drv_ctl;
+
+                drv_ctl.u64 = cvmx_read_csr(CVMX_AGL_GMX_DRV_CTL);
+                if (port) {
+                        drv_ctl.s.byp_en1 = 1;
+                        drv_ctl.s.nctl1 = 6;
+                        drv_ctl.s.pctl1 = 6;
+                } else {
+                        drv_ctl.s.byp_en = 1;
+                        drv_ctl.s.nctl = 6;
+                        drv_ctl.s.pctl = 6;
+                }
+                cvmx_write_csr(CVMX_AGL_GMX_DRV_CTL, drv_ctl.u64);
+        }
+
+        octeon_mgmt_rx_fill_ring(netdev);
+
+        /* Clear statistics. */
+        /* Clear on read. */
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_STATS_CTL(port), 1);
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_STATS_PKTS_DRP(port), 0);
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_STATS_PKTS_BAD(port), 0);
+
+        cvmx_write_csr(CVMX_AGL_GMX_TXX_STATS_CTL(port), 1);
+        cvmx_write_csr(CVMX_AGL_GMX_TXX_STAT0(port), 0);
+        cvmx_write_csr(CVMX_AGL_GMX_TXX_STAT1(port), 0);
+
+        /* Clear any pending interrupts */
+        cvmx_write_csr(CVMX_MIXX_ISR(port), cvmx_read_csr(CVMX_MIXX_ISR(port)));
+
+        if (request_irq(p->irq, octeon_mgmt_interrupt, 0, netdev->name,
+                        netdev)) {
+                dev_err(p->dev, "request_irq(%d) failed.\n", p->irq);
+                goto err_noirq;
+        }
+
+        /* Interrupt every single RX packet */
+        mix_irhwm.u64 = 0;
+        mix_irhwm.s.irhwm = 0;
+        cvmx_write_csr(CVMX_MIXX_IRHWM(port), mix_irhwm.u64);
+
+        /* Interrupt when we have 5 or more packets to clean.  */
+        mix_orhwm.u64 = 0;
+        mix_orhwm.s.orhwm = 5;
+        cvmx_write_csr(CVMX_MIXX_ORHWM(port), mix_orhwm.u64);
+
+        /* Enable receive and transmit interrupts */
+        mix_intena.u64 = 0;
+        mix_intena.s.ithena = 1;
+        mix_intena.s.othena = 1;
+        cvmx_write_csr(CVMX_MIXX_INTENA(port), mix_intena.u64);
+
+
+        /* Enable packet I/O. */
+
+        rxx_frm_ctl.u64 = 0;
+        rxx_frm_ctl.s.pre_align = 1;
+        /*
+         * When set, disables the length check for non-min sized pkts
+         * with padding in the client data.
+         */
+        rxx_frm_ctl.s.pad_len = 1;
+        /* When set, disables the length check for VLAN pkts */
+        rxx_frm_ctl.s.vlan_len = 1;
+        /* When set, PREAMBLE checking is  less strict */
+        rxx_frm_ctl.s.pre_free = 1;
+        /* Control Pause Frames can match station SMAC */
+        rxx_frm_ctl.s.ctl_smac = 0;
+        /* Control Pause Frames can match globally assign Multicast address */
+        rxx_frm_ctl.s.ctl_mcst = 1;
+        /* Forward pause information to TX block */
+        rxx_frm_ctl.s.ctl_bck = 1;
+        /* Drop Control Pause Frames */
+        rxx_frm_ctl.s.ctl_drp = 1;
+        /* Strip off the preamble */
+        rxx_frm_ctl.s.pre_strp = 1;
+        /*
+         * This port is configured to send PREAMBLE+SFD to begin every
+         * frame.  GMX checks that the PREAMBLE is sent correctly.
+         */
+        rxx_frm_ctl.s.pre_chk = 1;
+        cvmx_write_csr(CVMX_AGL_GMX_RXX_FRM_CTL(port), rxx_frm_ctl.u64);
+
+        /* Enable the AGL block */
+        agl_gmx_inf_mode.u64 = 0;
+        agl_gmx_inf_mode.s.en = 1;
+        cvmx_write_csr(CVMX_AGL_GMX_INF_MODE, agl_gmx_inf_mode.u64);
+
+        /* Configure the port duplex and enables */
+        prtx_cfg.u64 = cvmx_read_csr(CVMX_AGL_GMX_PRTX_CFG(port));
+        prtx_cfg.s.tx_en = 1;
+        prtx_cfg.s.rx_en = 1;
+        prtx_cfg.s.en = 1;
+        p->last_duplex = 1;
+        prtx_cfg.s.duplex = p->last_duplex;
+        cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), prtx_cfg.u64);
+
+        p->last_link = 0;
+        netif_carrier_off(netdev);
+
+        if (octeon_mgmt_init_phy(netdev)) {
+                dev_err(p->dev, "Cannot initialize PHY.\n");
+                goto err_noirq;
+        }
+
+        netif_wake_queue(netdev);
+        napi_enable(&p->napi);
+
+        return 0;
+err_noirq:
+        octeon_mgmt_reset_hw(p);
+        dma_unmap_single(p->dev, p->rx_ring_handle,
+                         ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE),
+                         DMA_BIDIRECTIONAL);
+        kfree(p->rx_ring);
+err_nomem:
+        dma_unmap_single(p->dev, p->tx_ring_handle,
+                         ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE),
+                         DMA_BIDIRECTIONAL);
+        kfree(p->tx_ring);
+        return -ENOMEM;
+}
+
+static int octeon_mgmt_stop(struct net_device *netdev)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+
+        napi_disable(&p->napi);
+        netif_stop_queue(netdev);
+
+        if (p->phydev)
+                phy_disconnect(p->phydev);
+
+        netif_carrier_off(netdev);
+
+        octeon_mgmt_reset_hw(p);
+
+
+        free_irq(p->irq, netdev);
+
+        /* dma_unmap is a nop on Octeon, so just free everything.  */
+        skb_queue_purge(&p->tx_list);
+        skb_queue_purge(&p->rx_list);
+
+        dma_unmap_single(p->dev, p->rx_ring_handle,
+                         ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE),
+                         DMA_BIDIRECTIONAL);
+        kfree(p->rx_ring);
+
+        dma_unmap_single(p->dev, p->tx_ring_handle,
+                         ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE),
+                         DMA_BIDIRECTIONAL);
+        kfree(p->tx_ring);
+
+
+        return 0;
+}
+
+static int octeon_mgmt_xmit(struct sk_buff *skb, struct net_device *netdev)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+        int port = p->port;
+        union mgmt_port_ring_entry re;
+        unsigned long flags;
+
+        re.d64 = 0;
+        re.s.len = skb->len;
+        re.s.addr = dma_map_single(p->dev, skb->data,
+                                   skb->len,
+                                   DMA_TO_DEVICE);
+
+        spin_lock_irqsave(&p->tx_list.lock, flags);
+
+        if (unlikely(p->tx_current_fill >=
+                     ring_max_fill(OCTEON_MGMT_TX_RING_SIZE))) {
+                spin_unlock_irqrestore(&p->tx_list.lock, flags);
+
+                dma_unmap_single(p->dev, re.s.addr, re.s.len,
+                                 DMA_TO_DEVICE);
+
+                netif_stop_queue(netdev);
+                return NETDEV_TX_BUSY;
+        }
+
+        __skb_queue_tail(&p->tx_list, skb);
+
+        /* Put it in the ring.  */
+        p->tx_ring[p->tx_next] = re.d64;
+        p->tx_next = (p->tx_next + 1) % OCTEON_MGMT_TX_RING_SIZE;
+        p->tx_current_fill++;
+
+        spin_unlock_irqrestore(&p->tx_list.lock, flags);
+
+        dma_sync_single_for_device(p->dev, p->tx_ring_handle,
+                                   ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE),
+                                   DMA_BIDIRECTIONAL);
+
+        netdev->stats.tx_packets++;
+        netdev->stats.tx_bytes += skb->len;
+
+        /* Ring the bell.  */
+        cvmx_write_csr(CVMX_MIXX_ORING2(port), 1);
+
+        netdev->trans_start = jiffies;
+        octeon_mgmt_clean_tx_buffers(p);
+        octeon_mgmt_update_tx_stats(netdev);
+        return NETDEV_TX_OK;
+}
+
+#ifdef CONFIG_NET_POLL_CONTROLLER
+static void octeon_mgmt_poll_controller(struct net_device *netdev)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+
+        octeon_mgmt_receive_packets(p, 16);
+        octeon_mgmt_update_rx_stats(netdev);
+        return;
+}
+#endif
+
+static void octeon_mgmt_get_drvinfo(struct net_device *netdev,
+                                    struct ethtool_drvinfo *info)
+{
+        strncpy(info->driver, DRV_NAME, sizeof(info->driver));
+        strncpy(info->version, DRV_VERSION, sizeof(info->version));
+        strncpy(info->fw_version, "N/A", sizeof(info->fw_version));
+        strncpy(info->bus_info, "N/A", sizeof(info->bus_info));
+        info->n_stats = 0;
+        info->testinfo_len = 0;
+        info->regdump_len = 0;
+        info->eedump_len = 0;
+}
+
+static int octeon_mgmt_get_settings(struct net_device *netdev,
+                                    struct ethtool_cmd *cmd)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+
+        if (p->phydev)
+                return phy_ethtool_gset(p->phydev, cmd);
+
+        return -EINVAL;
+}
+
+static int octeon_mgmt_set_settings(struct net_device *netdev,
+                                    struct ethtool_cmd *cmd)
+{
+        struct octeon_mgmt *p = netdev_priv(netdev);
+
+        if (!capable(CAP_NET_ADMIN))
+                return -EPERM;
+
+        if (p->phydev)
+                return phy_ethtool_sset(p->phydev, cmd);
+
+        return -EINVAL;
+}
+
+static const struct ethtool_ops octeon_mgmt_ethtool_ops = {
+        .get_drvinfo = octeon_mgmt_get_drvinfo,
+        .get_link = ethtool_op_get_link,
+        .get_settings = octeon_mgmt_get_settings,
+        .set_settings = octeon_mgmt_set_settings
+};
+
+static const struct net_device_ops octeon_mgmt_ops = {
+        .ndo_open =                     octeon_mgmt_open,
+        .ndo_stop =                     octeon_mgmt_stop,
+        .ndo_start_xmit =               octeon_mgmt_xmit,
+        .ndo_set_rx_mode =              octeon_mgmt_set_rx_filtering,
+        .ndo_set_multicast_list =       octeon_mgmt_set_rx_filtering,
+        .ndo_set_mac_address =          octeon_mgmt_set_mac_address,
+        .ndo_do_ioctl =                 octeon_mgmt_ioctl,
+        .ndo_change_mtu =               octeon_mgmt_change_mtu,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+        .ndo_poll_controller =          octeon_mgmt_poll_controller,
+#endif
+};
+
+static int __init octeon_mgmt_probe(struct platform_device *pdev)
+{
+        struct resource *res_irq;
+        struct net_device *netdev;
+        struct octeon_mgmt *p;
+        int i;
+
+        netdev = alloc_etherdev(sizeof(struct octeon_mgmt));
+        if (netdev == NULL)
+                return -ENOMEM;
+
+        dev_set_drvdata(&pdev->dev, netdev);
+        p = netdev_priv(netdev);
+        netif_napi_add(netdev, &p->napi, octeon_mgmt_napi_poll,
+                       OCTEON_MGMT_NAPI_WEIGHT);
+
+        p->netdev = netdev;
+        p->dev = &pdev->dev;
+
+        p->port = pdev->id;
+        snprintf(netdev->name, IFNAMSIZ, "mgmt%d", p->port);
+
+        res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+        if (!res_irq)
+                goto err;
+
+        p->irq = res_irq->start;
+        spin_lock_init(&p->lock);
+
+        skb_queue_head_init(&p->tx_list);
+        skb_queue_head_init(&p->rx_list);
+        tasklet_init(&p->tx_clean_tasklet,
+                     octeon_mgmt_clean_tx_tasklet, (unsigned long)p);
+
+        netdev->netdev_ops = &octeon_mgmt_ops;
+        netdev->ethtool_ops = &octeon_mgmt_ethtool_ops;
+
+
+        /* The mgmt ports get the first N MACs.  */
+        for (i = 0; i < 6; i++)
+                netdev->dev_addr[i] = octeon_bootinfo->mac_addr_base[i];
+        netdev->dev_addr[5] += p->port;
+
+        if (p->port >= octeon_bootinfo->mac_addr_count)
+                dev_err(&pdev->dev,
+                        "Error %s: Using MAC outside of the assigned range: "
+                        "%02x:%02x:%02x:%02x:%02x:%02x\n", netdev->name,
+                        netdev->dev_addr[0], netdev->dev_addr[1],
+                        netdev->dev_addr[2], netdev->dev_addr[3],
+                        netdev->dev_addr[4], netdev->dev_addr[5]);
+
+        if (register_netdev(netdev))
+                goto err;
+
+        dev_info(&pdev->dev, "Version " DRV_VERSION "\n");
+        return 0;
+err:
+        free_netdev(netdev);
+        return -ENOENT;
+}
+
+static int __exit octeon_mgmt_remove(struct platform_device *pdev)
+{
+        struct net_device *netdev = dev_get_drvdata(&pdev->dev);
+
+        unregister_netdev(netdev);
+        free_netdev(netdev);
+        return 0;
+}
+
+static struct platform_driver octeon_mgmt_driver = {
+        .driver = {
+                .name           = "octeon_mgmt",
+                .owner          = THIS_MODULE,
+        },
+        .probe          = octeon_mgmt_probe,
+        .remove         = __exit_p(octeon_mgmt_remove),
+};
+
+extern void octeon_mdiobus_force_mod_depencency(void);
+
+static int __init octeon_mgmt_mod_init(void)
+{
+        /* Force our mdiobus driver module to be loaded first. */
+        octeon_mdiobus_force_mod_depencency();
+        return platform_driver_register(&octeon_mgmt_driver);
+}
+
+static void __exit octeon_mgmt_mod_exit(void)
+{
+        platform_driver_unregister(&octeon_mgmt_driver);
+}
+
+module_init(octeon_mgmt_mod_init);
+module_exit(octeon_mgmt_mod_exit);
+
+MODULE_DESCRIPTION(DRV_DESCRIPTION);
+MODULE_AUTHOR("David Daney");
+MODULE_LICENSE("GPL");
+MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index d5d8e1c5bc91..fc5938ba3d78 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -115,4 +115,15 @@ config MDIO_GPIO
           To compile this driver as a module, choose M here: the module
           will be called mdio-gpio.
 
+config MDIO_OCTEON
+        tristate "Support for MDIO buses on Octeon SOCs"
+        depends on  CPU_CAVIUM_OCTEON
+        default y
+        help
+
+          This module provides a driver for the Octeon MDIO busses.
+          It is required by the Octeon Ethernet device drivers.
+
+          If in doubt, say Y.
+
 endif # PHYLIB
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index edfaac48cbd5..1342585af381 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -20,3 +20,4 @@ obj-$(CONFIG_MDIO_BITBANG)	+= mdio-bitbang.o
 obj-$(CONFIG_MDIO_GPIO)         += mdio-gpio.o
 obj-$(CONFIG_NATIONAL_PHY)      += national.o
 obj-$(CONFIG_STE10XP)           += ste10Xp.o
+obj-$(CONFIG_MDIO_OCTEON)       += mdio-octeon.o
diff --git a/drivers/net/phy/mdio-octeon.c b/drivers/net/phy/mdio-octeon.c
new file mode 100644
index 000000000000..61a4461cbda5
--- /dev/null
+++ b/drivers/net/phy/mdio-octeon.c
@@ -0,0 +1,180 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2009 Cavium Networks
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/phy.h>
+
+#include <asm/octeon/octeon.h>
+#include <asm/octeon/cvmx-smix-defs.h>
+
+#define DRV_VERSION "1.0"
+#define DRV_DESCRIPTION "Cavium Networks Octeon SMI/MDIO driver"
+
+struct octeon_mdiobus {
+        struct mii_bus *mii_bus;
+        int unit;
+        int phy_irq[PHY_MAX_ADDR];
+};
+
+static int octeon_mdiobus_read(struct mii_bus *bus, int phy_id, int regnum)
+{
+        struct octeon_mdiobus *p = bus->priv;
+        union cvmx_smix_cmd smi_cmd;
+        union cvmx_smix_rd_dat smi_rd;
+        int timeout = 1000;
+
+        smi_cmd.u64 = 0;
+        smi_cmd.s.phy_op = 1; /* MDIO_CLAUSE_22_READ */
+        smi_cmd.s.phy_adr = phy_id;
+        smi_cmd.s.reg_adr = regnum;
+        cvmx_write_csr(CVMX_SMIX_CMD(p->unit), smi_cmd.u64);
+
+        do {
+                /*
+                 * Wait 1000 clocks so we don't saturate the RSL bus
+                 * doing reads.
+                 */
+                cvmx_wait(1000);
+                smi_rd.u64 = cvmx_read_csr(CVMX_SMIX_RD_DAT(p->unit));
+        } while (smi_rd.s.pending && --timeout);
+
+        if (smi_rd.s.val)
+                return smi_rd.s.dat;
+        else
+                return -EIO;
+}
+
+static int octeon_mdiobus_write(struct mii_bus *bus, int phy_id,
+                                int regnum, u16 val)
+{
+        struct octeon_mdiobus *p = bus->priv;
+        union cvmx_smix_cmd smi_cmd;
+        union cvmx_smix_wr_dat smi_wr;
+        int timeout = 1000;
+
+        smi_wr.u64 = 0;
+        smi_wr.s.dat = val;
+        cvmx_write_csr(CVMX_SMIX_WR_DAT(p->unit), smi_wr.u64);
+
+        smi_cmd.u64 = 0;
+        smi_cmd.s.phy_op = 0; /* MDIO_CLAUSE_22_WRITE */
+        smi_cmd.s.phy_adr = phy_id;
+        smi_cmd.s.reg_adr = regnum;
+        cvmx_write_csr(CVMX_SMIX_CMD(p->unit), smi_cmd.u64);
+
+        do {
+                /*
+                 * Wait 1000 clocks so we don't saturate the RSL bus
+                 * doing reads.
+                 */
+                cvmx_wait(1000);
+                smi_wr.u64 = cvmx_read_csr(CVMX_SMIX_WR_DAT(p->unit));
+        } while (smi_wr.s.pending && --timeout);
+
+        if (timeout <= 0)
+                return -EIO;
+
+        return 0;
+}
+
+static int __init octeon_mdiobus_probe(struct platform_device *pdev)
+{
+        struct octeon_mdiobus *bus;
+        int i;
+        int err = -ENOENT;
+
+        bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL);
+        if (!bus)
+                return -ENOMEM;
+
+        /* The platform_device id is our unit number.  */
+        bus->unit = pdev->id;
+
+        bus->mii_bus = mdiobus_alloc();
+
+        if (!bus->mii_bus)
+                goto err;
+
+        /*
+         * Standard Octeon evaluation boards don't support phy
+         * interrupts, we need to poll.
+         */
+        for (i = 0; i < PHY_MAX_ADDR; i++)
+                bus->phy_irq[i] = PHY_POLL;
+
+        bus->mii_bus->priv = bus;
+        bus->mii_bus->irq = bus->phy_irq;
+        bus->mii_bus->name = "mdio-octeon";
+        snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%x", bus->unit);
+        bus->mii_bus->parent = &pdev->dev;
+
+        bus->mii_bus->read = octeon_mdiobus_read;
+        bus->mii_bus->write = octeon_mdiobus_write;
+
+        dev_set_drvdata(&pdev->dev, bus);
+
+        err = mdiobus_register(bus->mii_bus);
+        if (err)
+                goto err_register;
+
+        dev_info(&pdev->dev, "Version " DRV_VERSION "\n");
+
+        return 0;
+err_register:
+        mdiobus_free(bus->mii_bus);
+
+err:
+        devm_kfree(&pdev->dev, bus);
+        return err;
+}
+
+static int __exit octeon_mdiobus_remove(struct platform_device *pdev)
+{
+        struct octeon_mdiobus *bus;
+
+        bus = dev_get_drvdata(&pdev->dev);
+
+        mdiobus_unregister(bus->mii_bus);
+        mdiobus_free(bus->mii_bus);
+        return 0;
+}
+
+static struct platform_driver octeon_mdiobus_driver = {
+        .driver = {
+                .name           = "mdio-octeon",
+                .owner          = THIS_MODULE,
+        },
+        .probe          = octeon_mdiobus_probe,
+        .remove         = __exit_p(octeon_mdiobus_remove),
+};
+
+void octeon_mdiobus_force_mod_depencency(void)
+{
+        /* Let ethernet drivers force us to be loaded.  */
+}
+EXPORT_SYMBOL(octeon_mdiobus_force_mod_depencency);
+
+static int __init octeon_mdiobus_mod_init(void)
+{
+        return platform_driver_register(&octeon_mdiobus_driver);
+}
+
+static void __exit octeon_mdiobus_mod_exit(void)
+{
+        platform_driver_unregister(&octeon_mdiobus_driver);
+}
+
+module_init(octeon_mdiobus_mod_init);
+module_exit(octeon_mdiobus_mod_exit);
+
+MODULE_DESCRIPTION(DRV_DESCRIPTION);
+MODULE_VERSION(DRV_VERSION);
+MODULE_AUTHOR("David Daney");
+MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h
index 675b7df632fc..27ca859e7453 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.h
+++ b/drivers/net/wireless/iwlwifi/iwl-core.h
@@ -63,7 +63,7 @@
 #ifndef __iwl_core_h__
 #define __iwl_core_h__
 
-#include <linux/utsrelease.h>
+#include <generated/utsrelease.h>
 
 /************************
  * forward declarations *
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
index 3aabf1e37988..76e640bccde8 100644
--- a/drivers/pcmcia/pxa2xx_base.c
+++ b/drivers/pcmcia/pxa2xx_base.c
@@ -291,7 +291,7 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
                 skt->nr = ops->first + i;
                 skt->ops = ops;
                 skt->socket.owner = ops->owner;
-                skt->socket.dev.parent = dev;
+                skt->socket.dev.parent = &dev->dev;
                 skt->socket.pci_irq = NO_IRQ;
 
                 ret = pxa2xx_drv_pcmcia_add_one(skt);
@@ -304,8 +304,8 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
                         soc_pcmcia_remove_one(&sinfo->skt[i]);
                 kfree(sinfo);
         } else {
-                pxa2xx_configure_sockets(dev);
-                dev_set_drvdata(dev, sinfo);
+                pxa2xx_configure_sockets(&dev->dev);
+                dev_set_drvdata(&dev->dev, sinfo);
         }
 
         return ret;
diff --git a/drivers/platform/x86/compal-laptop.c b/drivers/platform/x86/compal-laptop.c
index 11003bba10d3..1a387e79f719 100644
--- a/drivers/platform/x86/compal-laptop.c
+++ b/drivers/platform/x86/compal-laptop.c
@@ -51,7 +51,6 @@
 #include <linux/dmi.h>
 #include <linux/backlight.h>
 #include <linux/platform_device.h>
-#include <linux/autoconf.h>
 
 #define COMPAL_DRIVER_VERSION "0.2.6"
 
diff --git a/drivers/regulator/88pm8607.c b/drivers/regulator/88pm8607.c
new file mode 100644
index 000000000000..04719551381b
--- /dev/null
+++ b/drivers/regulator/88pm8607.c
@@ -0,0 +1,685 @@
+/*
+ * Regulators driver for Marvell 88PM8607
+ *
+ * Copyright (C) 2009 Marvell International Ltd.
+ *      Haojian Zhuang <haojian.zhuang@marvell.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/mfd/88pm8607.h>
+
+struct pm8607_regulator_info {
+        struct regulator_desc   desc;
+        struct pm8607_chip      *chip;
+        struct regulator_dev    *regulator;
+
+        int     min_uV;
+        int     max_uV;
+        int     step_uV;
+        int     vol_reg;
+        int     vol_shift;
+        int     vol_nbits;
+        int     update_reg;
+        int     update_bit;
+        int     enable_reg;
+        int     enable_bit;
+        int     slope_double;
+};
+
+static inline int check_range(struct pm8607_regulator_info *info,
+                                int min_uV, int max_uV)
+{
+        if (max_uV < info->min_uV || min_uV > info->max_uV || min_uV > max_uV)
+                return -EINVAL;
+
+        return 0;
+}
+
+static int pm8607_list_voltage(struct regulator_dev *rdev, unsigned index)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        uint8_t chip_id = info->chip->chip_id;
+        int ret = -EINVAL;
+
+        switch (info->desc.id) {
+        case PM8607_ID_BUCK1:
+                ret = (index < 0x1d) ? (index * 25000 + 800000) :
+                        ((index < 0x20) ? 1500000 :
+                        ((index < 0x40) ? ((index - 0x20) * 25000) :
+                        -EINVAL));
+                break;
+        case PM8607_ID_BUCK3:
+                ret = (index < 0x3d) ? (index * 25000) :
+                        ((index < 0x40) ? 1500000 : -EINVAL);
+                if (ret < 0)
+                        break;
+                if (info->slope_double)
+                        ret <<= 1;
+                break;
+        case PM8607_ID_LDO1:
+                ret = (index == 0) ? 1800000 :
+                        ((index == 1) ? 1200000 :
+                        ((index == 2) ? 2800000 : -EINVAL));
+                break;
+        case PM8607_ID_LDO5:
+                ret = (index == 0) ? 2900000 :
+                        ((index == 1) ? 3000000 :
+                        ((index == 2) ? 3100000 : 3300000));
+                break;
+        case PM8607_ID_LDO7:
+        case PM8607_ID_LDO8:
+                ret = (index < 3) ? (index * 50000 + 1800000) :
+                        ((index < 8) ? (index * 50000 + 2550000) :
+                         -EINVAL);
+                break;
+        case PM8607_ID_LDO12:
+                ret = (index < 2) ? (index * 100000 + 1800000) :
+                        ((index < 7) ? (index * 100000 + 2500000) :
+                        ((index == 7) ? 3300000 : 1200000));
+                break;
+        case PM8607_ID_LDO2:
+        case PM8607_ID_LDO3:
+        case PM8607_ID_LDO9:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 8) ? (index * 50000 + 2550000) :
+                                 -EINVAL);
+                        break;
+                case PM8607_CHIP_B0:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 7) ? (index * 50000 + 2550000) :
+                                3300000);
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO4:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 8) ? (index * 50000 + 2550000) :
+                                 -EINVAL);
+                        break;
+                case PM8607_CHIP_B0:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 6) ? (index * 50000 + 2550000) :
+                                ((index == 6) ? 2900000 : 3300000));
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO6:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 8) ? (index * 50000 + 2450000) :
+                                -EINVAL);
+                        break;
+                case PM8607_CHIP_B0:
+                        ret = (index < 2) ? (index * 50000 + 1800000) :
+                                ((index < 7) ? (index * 50000 + 2500000) :
+                                3300000);
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO10:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 8) ? (index * 50000 + 2550000) :
+                                1200000);
+                        break;
+                case PM8607_CHIP_B0:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 7) ? (index * 50000 + 2550000) :
+                                ((index == 7) ? 3300000 : 1200000));
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO14:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 8) ? (index * 50000 + 2550000) :
+                                 -EINVAL);
+                        break;
+                case PM8607_CHIP_B0:
+                        ret = (index < 2) ? (index * 50000 + 1800000) :
+                                ((index < 7) ? (index * 50000 + 2600000) :
+                                3300000);
+                        break;
+                }
+                break;
+        }
+        return ret;
+}
+
+static int choose_voltage(struct regulator_dev *rdev, int min_uV, int max_uV)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        uint8_t chip_id = info->chip->chip_id;
+        int val = -ENOENT;
+        int ret;
+
+        switch (info->desc.id) {
+        case PM8607_ID_BUCK1:
+                if (min_uV >= 800000)           /* 800mV ~ 1500mV / 25mV */
+                        val = (min_uV - 775001) / 25000;
+                else {                          /* 25mV ~ 775mV / 25mV */
+                        val = (min_uV + 249999) / 25000;
+                        val += 32;
+                }
+                break;
+        case PM8607_ID_BUCK3:
+                if (info->slope_double)
+                        min_uV = min_uV >> 1;
+                val = (min_uV + 249999) / 25000; /* 0mV ~ 1500mV / 25mV */
+
+                break;
+        case PM8607_ID_LDO1:
+                if (min_uV > 1800000)
+                        val = 2;
+                else if (min_uV > 1200000)
+                        val = 0;
+                else
+                        val = 1;
+                break;
+        case PM8607_ID_LDO5:
+                if (min_uV > 3100000)
+                        val = 3;
+                else                            /* 2900mV ~ 3100mV / 100mV */
+                        val = (min_uV - 2800001) / 100000;
+                break;
+        case PM8607_ID_LDO7:
+        case PM8607_ID_LDO8:
+                if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */
+                        if (min_uV <= 1800000)
+                                val = 0;        /* 1800mv */
+                        else if (min_uV <= 1900000)
+                                val = (min_uV - 1750001) / 50000;
+                        else
+                                val = 3;        /* 2700mV */
+                } else {                 /* 2700mV ~ 2900mV / 50mV */
+                        if (min_uV <= 2900000) {
+                                val = (min_uV - 2650001) / 50000;
+                                val += 3;
+                        } else
+                                val = -EINVAL;
+                }
+                break;
+        case PM8607_ID_LDO10:
+                if (min_uV > 2850000)
+                        val = 7;
+                else if (min_uV <= 1200000)
+                        val = 8;
+                else if (min_uV < 2700000)      /* 1800mV ~ 1900mV / 50mV */
+                        val = (min_uV - 1750001) / 50000;
+                else {                          /* 2700mV ~ 2850mV / 50mV */
+                        val = (min_uV - 2650001) / 50000;
+                        val += 3;
+                }
+                break;
+        case PM8607_ID_LDO12:
+                if (min_uV < 2700000) {         /* 1800mV ~ 1900mV / 100mV */
+                        if (min_uV <= 1200000)
+                                val = 8;        /* 1200mV */
+                        else if (min_uV <= 1800000)
+                                val = 0;        /* 1800mV */
+                        else if (min_uV <= 1900000)
+                                val = (min_uV - 1700001) / 100000;
+                        else
+                                val = 2;        /* 2700mV */
+                } else {                        /* 2700mV ~ 3100mV / 100mV */
+                        if (min_uV <= 3100000) {
+                                val = (min_uV - 2600001) / 100000;
+                                val += 2;
+                        } else if (min_uV <= 3300000)
+                                val = 7;
+                        else
+                                val = -EINVAL;
+                }
+                break;
+        case PM8607_ID_LDO2:
+        case PM8607_ID_LDO3:
+        case PM8607_ID_LDO9:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        if (min_uV < 2700000)   /* 1800mV ~ 1900mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1900000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 3;        /* 2700mV */
+                        else {                  /* 2700mV ~ 2900mV / 50mV */
+                                if (min_uV <= 2900000) {
+                                        val = (min_uV - 2650001) / 50000;
+                                        val += 3;
+                                } else
+                                        val = -EINVAL;
+                        }
+                        break;
+                case PM8607_CHIP_B0:
+                        if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1900000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 3;        /* 2700mV */
+                        } else {                 /* 2700mV ~ 2850mV / 50mV */
+                                if (min_uV <= 2850000) {
+                                        val = (min_uV - 2650001) / 50000;
+                                        val += 3;
+                                } else if (min_uV <= 3300000)
+                                        val = 7;
+                                else
+                                        val = -EINVAL;
+                        }
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO4:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        if (min_uV < 2700000)   /* 1800mV ~ 1900mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1900000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 3;        /* 2700mV */
+                        else {                  /* 2700mV ~ 2900mV / 50mV */
+                                if (min_uV <= 2900000) {
+                                        val = (min_uV - 2650001) / 50000;
+                                        val += 3;
+                                } else
+                                        val = -EINVAL;
+                        }
+                        break;
+                case PM8607_CHIP_B0:
+                        if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1900000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 3;        /* 2700mV */
+                        } else {                 /* 2700mV ~ 2800mV / 50mV */
+                                if (min_uV <= 2850000) {
+                                        val = (min_uV - 2650001) / 50000;
+                                        val += 3;
+                                } else if (min_uV <= 2900000)
+                                        val = 6;
+                                else if (min_uV <= 3300000)
+                                        val = 7;
+                                else
+                                        val = -EINVAL;
+                        }
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO6:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        if (min_uV < 2600000) { /* 1800mV ~ 1900mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1900000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 3;        /* 2600mV */
+                        } else {                /* 2600mV ~ 2800mV / 50mV */
+                                if (min_uV <= 2800000) {
+                                        val = (min_uV - 2550001) / 50000;
+                                        val += 3;
+                                } else
+                                        val = -EINVAL;
+                        }
+                        break;
+                case PM8607_CHIP_B0:
+                        if (min_uV < 2600000) { /* 1800mV ~ 1850mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1850000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 2;        /* 2600mV */
+                        } else {                /* 2600mV ~ 2800mV / 50mV */
+                                if (min_uV <= 2800000) {
+                                        val = (min_uV - 2550001) / 50000;
+                                        val += 2;
+                                } else if (min_uV <= 3300000)
+                                        val = 7;
+                                else
+                                        val = -EINVAL;
+                        }
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO14:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1900000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 3;        /* 2700mV */
+                        } else {                 /* 2700mV ~ 2900mV / 50mV */
+                                if (min_uV <= 2900000) {
+                                        val = (min_uV - 2650001) / 50000;
+                                        val += 3;
+                                } else
+                                        val = -EINVAL;
+                        }
+                        break;
+                case PM8607_CHIP_B0:
+                        if (min_uV < 2700000) { /* 1800mV ~ 1850mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1850000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 2;        /* 2700mV */
+                        } else {                 /* 2700mV ~ 2900mV / 50mV */
+                                if (min_uV <= 2900000) {
+                                        val = (min_uV - 2650001) / 50000;
+                                        val += 2;
+                                } else if (min_uV <= 3300000)
+                                        val = 7;
+                                else
+                                        val = -EINVAL;
+                        }
+                        break;
+                }
+                break;
+        }
+        if (val >= 0) {
+                ret = pm8607_list_voltage(rdev, val);
+                if (ret > max_uV) {
+                        pr_err("exceed voltage range (%d %d) uV",
+                                min_uV, max_uV);
+                        return -EINVAL;
+                }
+        } else
+                pr_err("invalid voltage range (%d %d) uV", min_uV, max_uV);
+        return val;
+}
+
+static int pm8607_set_voltage(struct regulator_dev *rdev,
+                              int min_uV, int max_uV)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        struct pm8607_chip *chip = info->chip;
+        uint8_t val, mask;
+        int ret;
+
+        if (check_range(info, min_uV, max_uV)) {
+                pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV);
+                return -EINVAL;
+        }
+
+        ret = choose_voltage(rdev, min_uV, max_uV);
+        if (ret < 0)
+                return -EINVAL;
+        val = (uint8_t)(ret << info->vol_shift);
+        mask = ((1 << info->vol_nbits) - 1)  << info->vol_shift;
+
+        ret = pm8607_set_bits(chip, info->vol_reg, mask, val);
+        if (ret)
+                return ret;
+        switch (info->desc.id) {
+        case PM8607_ID_BUCK1:
+        case PM8607_ID_BUCK3:
+                ret = pm8607_set_bits(chip, info->update_reg,
+                                      1 << info->update_bit,
+                                      1 << info->update_bit);
+                break;
+        }
+        return ret;
+}
+
+static int pm8607_get_voltage(struct regulator_dev *rdev)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        struct pm8607_chip *chip = info->chip;
+        uint8_t val, mask;
+        int ret;
+
+        ret = pm8607_reg_read(chip, info->vol_reg);
+        if (ret < 0)
+                return ret;
+
+        mask = ((1 << info->vol_nbits) - 1)  << info->vol_shift;
+        val = ((unsigned char)ret & mask) >> info->vol_shift;
+
+        return pm8607_list_voltage(rdev, val);
+}
+
+static int pm8607_enable(struct regulator_dev *rdev)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        struct pm8607_chip *chip = info->chip;
+
+        return pm8607_set_bits(chip, info->enable_reg,
+                               1 << info->enable_bit,
+                               1 << info->enable_bit);
+}
+
+static int pm8607_disable(struct regulator_dev *rdev)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        struct pm8607_chip *chip = info->chip;
+
+        return pm8607_set_bits(chip, info->enable_reg,
+                               1 << info->enable_bit, 0);
+}
+
+static int pm8607_is_enabled(struct regulator_dev *rdev)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        struct pm8607_chip *chip = info->chip;
+        int ret;
+
+        ret = pm8607_reg_read(chip, info->enable_reg);
+        if (ret < 0)
+                return ret;
+
+        return !!((unsigned char)ret & (1 << info->enable_bit));
+}
+
+static struct regulator_ops pm8607_regulator_ops = {
+        .set_voltage    = pm8607_set_voltage,
+        .get_voltage    = pm8607_get_voltage,
+        .enable         = pm8607_enable,
+        .disable        = pm8607_disable,
+        .is_enabled     = pm8607_is_enabled,
+};
+
+#define PM8607_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \
+{                                                                       \
+        .desc   = {                                                     \
+                .name   = "BUCK" #_id,                                  \
+                .ops    = &pm8607_regulator_ops,                        \
+                .type   = REGULATOR_VOLTAGE,                            \
+                .id     = PM8607_ID_BUCK##_id,                          \
+                .owner  = THIS_MODULE,                                  \
+        },                                                              \
+        .min_uV         = (min) * 1000,                                 \
+        .max_uV         = (max) * 1000,                                 \
+        .step_uV        = (step) * 1000,                                \
+        .vol_reg        = PM8607_##vreg,                                \
+        .vol_shift      = (0),                                          \
+        .vol_nbits      = (nbits),                                      \
+        .update_reg     = PM8607_##ureg,                                \
+        .update_bit     = (ubit),                                       \
+        .enable_reg     = PM8607_##ereg,                                \
+        .enable_bit     = (ebit),                                       \
+        .slope_double   = (0),                                          \
+}
+
+#define PM8607_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \
+{                                                                       \
+        .desc   = {                                                     \
+                .name   = "LDO" #_id,                                   \
+                .ops    = &pm8607_regulator_ops,                        \
+                .type   = REGULATOR_VOLTAGE,                            \
+                .id     = PM8607_ID_LDO##_id,                           \
+                .owner  = THIS_MODULE,                                  \
+        },                                                              \
+        .min_uV         = (min) * 1000,                                 \
+        .max_uV         = (max) * 1000,                                 \
+        .step_uV        = (step) * 1000,                                \
+        .vol_reg        = PM8607_##vreg,                                \
+        .vol_shift      = (shift),                                      \
+        .vol_nbits      = (nbits),                                      \
+        .enable_reg     = PM8607_##ereg,                                \
+        .enable_bit     = (ebit),                                       \
+        .slope_double   = (0),                                          \
+}
+
+static struct pm8607_regulator_info pm8607_regulator_info[] = {
+        PM8607_DVC(1, 0, 1500, 25, BUCK1, 6, GO, 0, SUPPLIES_EN11, 0),
+        PM8607_DVC(3, 0, 1500, 25, BUCK3, 6, GO, 2, SUPPLIES_EN11, 2),
+
+        PM8607_LDO(1 , 1200, 2800, 0, LDO1 , 0, 2, SUPPLIES_EN11, 3),
+        PM8607_LDO(2 , 1800, 3300, 0, LDO2 , 0, 3, SUPPLIES_EN11, 4),
+        PM8607_LDO(3 , 1800, 3300, 0, LDO3 , 0, 3, SUPPLIES_EN11, 5),
+        PM8607_LDO(4 , 1800, 3300, 0, LDO4 , 0, 3, SUPPLIES_EN11, 6),
+        PM8607_LDO(5 , 2900, 3300, 0, LDO5 , 0, 2, SUPPLIES_EN11, 7),
+        PM8607_LDO(6 , 1800, 3300, 0, LDO6 , 0, 3, SUPPLIES_EN12, 0),
+        PM8607_LDO(7 , 1800, 2900, 0, LDO7 , 0, 3, SUPPLIES_EN12, 1),
+        PM8607_LDO(8 , 1800, 2900, 0, LDO8 , 0, 3, SUPPLIES_EN12, 2),
+        PM8607_LDO(9 , 1800, 3300, 0, LDO9 , 0, 3, SUPPLIES_EN12, 3),
+        PM8607_LDO(10, 1200, 3300, 0, LDO10, 0, 4, SUPPLIES_EN11, 4),
+        PM8607_LDO(12, 1200, 3300, 0, LDO12, 0, 4, SUPPLIES_EN11, 5),
+        PM8607_LDO(14, 1800, 3300, 0, LDO14, 0, 3, SUPPLIES_EN11, 6),
+};
+
+static inline struct pm8607_regulator_info *find_regulator_info(int id)
+{
+        struct pm8607_regulator_info *info;
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(pm8607_regulator_info); i++) {
+                info = &pm8607_regulator_info[i];
+                if (info->desc.id == id)
+                        return info;
+        }
+        return NULL;
+}
+
+static int __devinit pm8607_regulator_probe(struct platform_device *pdev)
+{
+        struct pm8607_chip *chip = dev_get_drvdata(pdev->dev.parent);
+        struct pm8607_platform_data *pdata = chip->dev->platform_data;
+        struct pm8607_regulator_info *info = NULL;
+
+        info = find_regulator_info(pdev->id);
+        if (info == NULL) {
+                dev_err(&pdev->dev, "invalid regulator ID specified\n");
+                return -EINVAL;
+        }
+
+        info->chip = chip;
+
+        info->regulator = regulator_register(&info->desc, &pdev->dev,
+                                             pdata->regulator[pdev->id], info);
+        if (IS_ERR(info->regulator)) {
+                dev_err(&pdev->dev, "failed to register regulator %s\n",
+                        info->desc.name);
+                return PTR_ERR(info->regulator);
+        }
+
+        /* check DVC ramp slope double */
+        if (info->desc.id == PM8607_ID_BUCK3)
+                if (info->chip->buck3_double)
+                        info->slope_double = 1;
+
+        platform_set_drvdata(pdev, info);
+        return 0;
+}
+
+static int __devexit pm8607_regulator_remove(struct platform_device *pdev)
+{
+        struct pm8607_regulator_info *info = platform_get_drvdata(pdev);
+
+        regulator_unregister(info->regulator);
+        return 0;
+}
+
+#define PM8607_REGULATOR_DRIVER(_name)                          \
+{                                                               \
+        .driver         = {                                     \
+                .name   = "88pm8607-" #_name,                   \
+                .owner  = THIS_MODULE,                          \
+        },                                                      \
+        .probe          = pm8607_regulator_probe,               \
+        .remove         = __devexit_p(pm8607_regulator_remove), \
+}
+
+static struct platform_driver pm8607_regulator_driver[] = {
+        PM8607_REGULATOR_DRIVER(buck1),
+        PM8607_REGULATOR_DRIVER(buck2),
+        PM8607_REGULATOR_DRIVER(buck3),
+        PM8607_REGULATOR_DRIVER(ldo1),
+        PM8607_REGULATOR_DRIVER(ldo2),
+        PM8607_REGULATOR_DRIVER(ldo3),
+        PM8607_REGULATOR_DRIVER(ldo4),
+        PM8607_REGULATOR_DRIVER(ldo5),
+        PM8607_REGULATOR_DRIVER(ldo6),
+        PM8607_REGULATOR_DRIVER(ldo7),
+        PM8607_REGULATOR_DRIVER(ldo8),
+        PM8607_REGULATOR_DRIVER(ldo9),
+        PM8607_REGULATOR_DRIVER(ldo10),
+        PM8607_REGULATOR_DRIVER(ldo12),
+        PM8607_REGULATOR_DRIVER(ldo14),
+};
+
+static int __init pm8607_regulator_init(void)
+{
+        int i, count, ret;
+
+        count = ARRAY_SIZE(pm8607_regulator_driver);
+        for (i = 0; i < count; i++) {
+                ret = platform_driver_register(&pm8607_regulator_driver[i]);
+                if (ret != 0)
+                        pr_err("Failed to register regulator driver: %d\n",
+                                ret);
+        }
+        return 0;
+}
+subsys_initcall(pm8607_regulator_init);
+
+static void __exit pm8607_regulator_exit(void)
+{
+        int i, count;
+
+        count = ARRAY_SIZE(pm8607_regulator_driver);
+        for (i = 0; i < count; i++)
+                platform_driver_unregister(&pm8607_regulator_driver[i]);
+}
+module_exit(pm8607_regulator_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
+MODULE_DESCRIPTION("Regulator Driver for Marvell 88PM8607 PMIC");
+MODULE_ALIAS("platform:88pm8607-regulator");
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 7cfdd65bebb4..262f62eec837 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -69,6 +69,13 @@ config REGULATOR_MAX1586
           regulator via I2C bus. The provided regulator is suitable
           for PXA27x chips to control VCC_CORE and VCC_USIM voltages.
 
+config REGULATOR_MAX8660
+        tristate "Maxim 8660/8661 voltage regulator"
+        depends on I2C
+        help
+          This driver controls a Maxim 8660/8661 voltage output
+          regulator via I2C bus.
+
 config REGULATOR_TWL4030
         bool "TI TWL4030/TWL5030/TWL6030/TPS695x0 PMIC"
         depends on TWL4030_CORE
@@ -157,5 +164,11 @@ config REGULATOR_TPS6507X
           three step-down converters and two general-purpose LDO voltage regulators.
           It supports TI's software based Class-2 SmartReflex implementation.
 
+config REGULATOR_88PM8607
+        bool "Marvell 88PM8607 Power regulators"
+        depends on MFD_88PM8607=y
+        help
+          This driver supports 88PM8607 voltage regulator chips.
+
 endif
 
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 9ae3cc44e668..b3c806c79415 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_REGULATOR_BQ24022) += bq24022.o
 obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o
 obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o
 obj-$(CONFIG_REGULATOR_TWL4030) += twl-regulator.o
+obj-$(CONFIG_REGULATOR_MAX8660) += max8660.o
 obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o
 obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o
 obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o
@@ -20,10 +21,11 @@ obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o
 obj-$(CONFIG_REGULATOR_DA903X)  += da903x.o
 obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o
 obj-$(CONFIG_REGULATOR_PCAP) += pcap-regulator.o
-obj-$(CONFIG_REGULATOR_MC13783) += mc13783.o
+obj-$(CONFIG_REGULATOR_MC13783) += mc13783-regulator.o
 obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o
 
 obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o
 obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o
+obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o
 
 ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/ab3100.c b/drivers/regulator/ab3100.c
index 49aeee823a25..b349db4504b7 100644
--- a/drivers/regulator/ab3100.c
+++ b/drivers/regulator/ab3100.c
@@ -81,7 +81,7 @@ static const u8 ab3100_reg_init_order[AB3100_NUM_REGULATORS+2] = {
 #define LDO_C_VOLTAGE 2650000
 #define LDO_D_VOLTAGE 2650000
 
-static const int const ldo_e_buck_typ_voltages[] = {
+static const int ldo_e_buck_typ_voltages[] = {
         1800000,
         1400000,
         1300000,
@@ -91,7 +91,7 @@ static const int const ldo_e_buck_typ_voltages[] = {
         900000,
 };
 
-static const int const ldo_f_typ_voltages[] = {
+static const int ldo_f_typ_voltages[] = {
         1800000,
         1400000,
         1300000,
@@ -102,21 +102,21 @@ static const int const ldo_f_typ_voltages[] = {
         2650000,
 };
 
-static const int const ldo_g_typ_voltages[] = {
+static const int ldo_g_typ_voltages[] = {
         2850000,
         2750000,
         1800000,
         1500000,
 };
 
-static const int const ldo_h_typ_voltages[] = {
+static const int ldo_h_typ_voltages[] = {
         2750000,
         1800000,
         1500000,
         1200000,
 };
 
-static const int const ldo_k_typ_voltages[] = {
+static const int ldo_k_typ_voltages[] = {
         2750000,
         1800000,
 };
@@ -241,24 +241,12 @@ static int ab3100_disable_regulator(struct regulator_dev *reg)
          * LDO D is a special regulator. When it is disabled, the entire
          * system is shut down. So this is handled specially.
          */
+        pr_info("Called ab3100_disable_regulator\n");
         if (abreg->regreg == AB3100_LDO_D) {
-                int i;
-
                 dev_info(&reg->dev, "disabling LDO D - shut down system\n");
-                /*
-                 * Set regulators to default values, ignore any errors,
-                 * we're going DOWN
-                 */
-                for (i = 0; i < ARRAY_SIZE(ab3100_reg_init_order); i++) {
-                        (void) ab3100_set_register_interruptible(abreg->ab3100,
-                                        ab3100_reg_init_order[i],
-                                        abreg->plfdata->reg_initvals[i]);
-                }
-
                 /* Setting LDO D to 0x00 cuts the power to the SoC */
                 return ab3100_set_register_interruptible(abreg->ab3100,
                                                          AB3100_LDO_D, 0x00U);
-
         }
 
         /*
@@ -607,13 +595,6 @@ static int __init ab3100_regulators_probe(struct platform_device *pdev)
                 }
         }
 
-        if (err) {
-                dev_err(&pdev->dev,
-                        "LDO D regulator initialization failed with error %d\n",
-                        err);
-                return err;
-        }
-
         /* Register the regulators */
         for (i = 0; i < AB3100_NUM_REGULATORS; i++) {
                 struct ab3100_regulator *reg = &ab3100_regulators[i];
@@ -688,7 +669,7 @@ static __init int ab3100_regulators_init(void)
 
 static __exit void ab3100_regulators_exit(void)
 {
-        platform_driver_register(&ab3100_regulators_driver);
+        platform_driver_unregister(&ab3100_regulators_driver);
 }
 
 subsys_initcall(ab3100_regulators_init);
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index efe568deda12..686ef270ecf7 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -66,6 +66,16 @@ static unsigned int _regulator_get_mode(struct regulator_dev *rdev);
 static void _notifier_call_chain(struct regulator_dev *rdev,
                                   unsigned long event, void *data);
 
+static const char *rdev_get_name(struct regulator_dev *rdev)
+{
+        if (rdev->constraints && rdev->constraints->name)
+                return rdev->constraints->name;
+        else if (rdev->desc->name)
+                return rdev->desc->name;
+        else
+                return "";
+}
+
 /* gets the regulator for a given consumer device */
 static struct regulator *get_device_regulator(struct device *dev)
 {
@@ -96,12 +106,12 @@ static int regulator_check_voltage(struct regulator_dev *rdev,
 
         if (!rdev->constraints) {
                 printk(KERN_ERR "%s: no constraints for %s\n", __func__,
-                       rdev->desc->name);
+                       rdev_get_name(rdev));
                 return -ENODEV;
         }
         if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) {
                 printk(KERN_ERR "%s: operation not allowed for %s\n",
-                       __func__, rdev->desc->name);
+                       __func__, rdev_get_name(rdev));
                 return -EPERM;
         }
 
@@ -124,12 +134,12 @@ static int regulator_check_current_limit(struct regulator_dev *rdev,
 
         if (!rdev->constraints) {
                 printk(KERN_ERR "%s: no constraints for %s\n", __func__,
-                       rdev->desc->name);
+                       rdev_get_name(rdev));
                 return -ENODEV;
         }
         if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_CURRENT)) {
                 printk(KERN_ERR "%s: operation not allowed for %s\n",
-                       __func__, rdev->desc->name);
+                       __func__, rdev_get_name(rdev));
                 return -EPERM;
         }
 
@@ -159,17 +169,17 @@ static int regulator_check_mode(struct regulator_dev *rdev, int mode)
 
         if (!rdev->constraints) {
                 printk(KERN_ERR "%s: no constraints for %s\n", __func__,
-                       rdev->desc->name);
+                       rdev_get_name(rdev));
                 return -ENODEV;
         }
         if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_MODE)) {
                 printk(KERN_ERR "%s: operation not allowed for %s\n",
-                       __func__, rdev->desc->name);
+                       __func__, rdev_get_name(rdev));
                 return -EPERM;
         }
         if (!(rdev->constraints->valid_modes_mask & mode)) {
                 printk(KERN_ERR "%s: invalid mode %x for %s\n",
-                       __func__, mode, rdev->desc->name);
+                       __func__, mode, rdev_get_name(rdev));
                 return -EINVAL;
         }
         return 0;
@@ -180,12 +190,12 @@ static int regulator_check_drms(struct regulator_dev *rdev)
 {
         if (!rdev->constraints) {
                 printk(KERN_ERR "%s: no constraints for %s\n", __func__,
-                       rdev->desc->name);
+                       rdev_get_name(rdev));
                 return -ENODEV;
         }
         if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_DRMS)) {
                 printk(KERN_ERR "%s: operation not allowed for %s\n",
-                       __func__, rdev->desc->name);
+                       __func__, rdev_get_name(rdev));
                 return -EPERM;
         }
         return 0;
@@ -230,16 +240,8 @@ static ssize_t regulator_name_show(struct device *dev,
                              struct device_attribute *attr, char *buf)
 {
         struct regulator_dev *rdev = dev_get_drvdata(dev);
-        const char *name;
 
-        if (rdev->constraints && rdev->constraints->name)
-                name = rdev->constraints->name;
-        else if (rdev->desc->name)
-                name = rdev->desc->name;
-        else
-                name = "";
-
-        return sprintf(buf, "%s\n", name);
+        return sprintf(buf, "%s\n", rdev_get_name(rdev));
 }
 
 static ssize_t regulator_print_opmode(char *buf, int mode)
@@ -388,7 +390,7 @@ static ssize_t regulator_total_uA_show(struct device *dev,
 
         mutex_lock(&rdev->mutex);
         list_for_each_entry(regulator, &rdev->consumer_list, list)
-            uA += regulator->uA_load;
+                uA += regulator->uA_load;
         mutex_unlock(&rdev->mutex);
         return sprintf(buf, "%d\n", uA);
 }
@@ -563,7 +565,7 @@ static void drms_uA_update(struct regulator_dev *rdev)
 
         /* calc total requested load */
         list_for_each_entry(sibling, &rdev->consumer_list, list)
-            current_uA += sibling->uA_load;
+                current_uA += sibling->uA_load;
 
         /* now get the optimum mode for our new total regulator load */
         mode = rdev->desc->ops->get_optimum_mode(rdev, input_uV,
@@ -579,10 +581,29 @@ static int suspend_set_state(struct regulator_dev *rdev,
         struct regulator_state *rstate)
 {
         int ret = 0;
+        bool can_set_state;
 
-        /* enable & disable are mandatory for suspend control */
-        if (!rdev->desc->ops->set_suspend_enable ||
-                !rdev->desc->ops->set_suspend_disable) {
+        can_set_state = rdev->desc->ops->set_suspend_enable &&
+                rdev->desc->ops->set_suspend_disable;
+
+        /* If we have no suspend mode configration don't set anything;
+         * only warn if the driver actually makes the suspend mode
+         * configurable.
+         */
+        if (!rstate->enabled && !rstate->disabled) {
+                if (can_set_state)
+                        printk(KERN_WARNING "%s: No configuration for %s\n",
+                               __func__, rdev_get_name(rdev));
+                return 0;
+        }
+
+        if (rstate->enabled && rstate->disabled) {
+                printk(KERN_ERR "%s: invalid configuration for %s\n",
+                       __func__, rdev_get_name(rdev));
+                return -EINVAL;
+        }
+
+        if (!can_set_state) {
                 printk(KERN_ERR "%s: no way to set suspend state\n",
                         __func__);
                 return -EINVAL;
@@ -641,25 +662,43 @@ static void print_constraints(struct regulator_dev *rdev)
 {
         struct regulation_constraints *constraints = rdev->constraints;
         char buf[80];
-        int count;
+        int count = 0;
+        int ret;
 
-        if (rdev->desc->type == REGULATOR_VOLTAGE) {
+        if (constraints->min_uV && constraints->max_uV) {
                 if (constraints->min_uV == constraints->max_uV)
-                        count = sprintf(buf, "%d mV ",
-                                        constraints->min_uV / 1000);
+                        count += sprintf(buf + count, "%d mV ",
+                                         constraints->min_uV / 1000);
                 else
-                        count = sprintf(buf, "%d <--> %d mV ",
-                                        constraints->min_uV / 1000,
-                                        constraints->max_uV / 1000);
-        } else {
+                        count += sprintf(buf + count, "%d <--> %d mV ",
+                                         constraints->min_uV / 1000,
+                                         constraints->max_uV / 1000);
+        }
+
+        if (!constraints->min_uV ||
+            constraints->min_uV != constraints->max_uV) {
+                ret = _regulator_get_voltage(rdev);
+                if (ret > 0)
+                        count += sprintf(buf + count, "at %d mV ", ret / 1000);
+        }
+
+        if (constraints->min_uA && constraints->max_uA) {
                 if (constraints->min_uA == constraints->max_uA)
-                        count = sprintf(buf, "%d mA ",
-                                        constraints->min_uA / 1000);
+                        count += sprintf(buf + count, "%d mA ",
+                                         constraints->min_uA / 1000);
                 else
-                        count = sprintf(buf, "%d <--> %d mA ",
-                                        constraints->min_uA / 1000,
-                                        constraints->max_uA / 1000);
+                        count += sprintf(buf + count, "%d <--> %d mA ",
+                                         constraints->min_uA / 1000,
+                                         constraints->max_uA / 1000);
         }
+
+        if (!constraints->min_uA ||
+            constraints->min_uA != constraints->max_uA) {
+                ret = _regulator_get_current_limit(rdev);
+                if (ret > 0)
+                        count += sprintf(buf + count, "at %d uA ", ret / 1000);
+        }
+
         if (constraints->valid_modes_mask & REGULATOR_MODE_FAST)
                 count += sprintf(buf + count, "fast ");
         if (constraints->valid_modes_mask & REGULATOR_MODE_NORMAL)
@@ -669,33 +708,30 @@ static void print_constraints(struct regulator_dev *rdev)
         if (constraints->valid_modes_mask & REGULATOR_MODE_STANDBY)
                 count += sprintf(buf + count, "standby");
 
-        printk(KERN_INFO "regulator: %s: %s\n", rdev->desc->name, buf);
+        printk(KERN_INFO "regulator: %s: %s\n", rdev_get_name(rdev), buf);
 }
 
-/**
- * set_machine_constraints - sets regulator constraints
- * @rdev: regulator source
- * @constraints: constraints to apply
- *
- * Allows platform initialisation code to define and constrain
- * regulator circuits e.g. valid voltage/current ranges, etc.  NOTE:
- * Constraints *must* be set by platform code in order for some
- * regulator operations to proceed i.e. set_voltage, set_current_limit,
- * set_mode.
- */
-static int set_machine_constraints(struct regulator_dev *rdev,
+static int machine_constraints_voltage(struct regulator_dev *rdev,
         struct regulation_constraints *constraints)
 {
-        int ret = 0;
-        const char *name;
         struct regulator_ops *ops = rdev->desc->ops;
+        const char *name = rdev_get_name(rdev);
+        int ret;
 
-        if (constraints->name)
-                name = constraints->name;
-        else if (rdev->desc->name)
-                name = rdev->desc->name;
-        else
-                name = "regulator";
+        /* do we need to apply the constraint voltage */
+        if (rdev->constraints->apply_uV &&
+                rdev->constraints->min_uV == rdev->constraints->max_uV &&
+                ops->set_voltage) {
+                ret = ops->set_voltage(rdev,
+                        rdev->constraints->min_uV, rdev->constraints->max_uV);
+                        if (ret < 0) {
+                                printk(KERN_ERR "%s: failed to apply %duV constraint to %s\n",
+                                       __func__,
+                                       rdev->constraints->min_uV, name);
+                                rdev->constraints = NULL;
+                                return ret;
+                        }
+        }
 
         /* constrain machine-level voltage specs to fit
          * the actual range supported by this regulator.
@@ -719,14 +755,13 @@ static int set_machine_constraints(struct regulator_dev *rdev,
 
                 /* voltage constraints are optional */
                 if ((cmin == 0) && (cmax == 0))
-                        goto out;
+                        return 0;
 
                 /* else require explicit machine-level constraints */
                 if (cmin <= 0 || cmax <= 0 || cmax < cmin) {
                         pr_err("%s: %s '%s' voltage constraints\n",
                                        __func__, "invalid", name);
-                        ret = -EINVAL;
-                        goto out;
+                        return -EINVAL;
                 }
 
                 /* initial: [cmin..cmax] valid, [min_uV..max_uV] not */
@@ -748,8 +783,7 @@ static int set_machine_constraints(struct regulator_dev *rdev,
                 if (max_uV < min_uV) {
                         pr_err("%s: %s '%s' voltage constraints\n",
                                        __func__, "unsupportable", name);
-                        ret = -EINVAL;
-                        goto out;
+                        return -EINVAL;
                 }
 
                 /* use regulator's subset of machine constraints */
@@ -767,22 +801,34 @@ static int set_machine_constraints(struct regulator_dev *rdev,
                 }
         }
 
+        return 0;
+}
+
+/**
+ * set_machine_constraints - sets regulator constraints
+ * @rdev: regulator source
+ * @constraints: constraints to apply
+ *
+ * Allows platform initialisation code to define and constrain
+ * regulator circuits e.g. valid voltage/current ranges, etc.  NOTE:
+ * Constraints *must* be set by platform code in order for some
+ * regulator operations to proceed i.e. set_voltage, set_current_limit,
+ * set_mode.
+ */
+static int set_machine_constraints(struct regulator_dev *rdev,
+        struct regulation_constraints *constraints)
+{
+        int ret = 0;
+        const char *name;
+        struct regulator_ops *ops = rdev->desc->ops;
+
         rdev->constraints = constraints;
 
-        /* do we need to apply the constraint voltage */
-        if (rdev->constraints->apply_uV &&
-                rdev->constraints->min_uV == rdev->constraints->max_uV &&
-                ops->set_voltage) {
-                ret = ops->set_voltage(rdev,
-                        rdev->constraints->min_uV, rdev->constraints->max_uV);
-                        if (ret < 0) {
-                                printk(KERN_ERR "%s: failed to apply %duV constraint to %s\n",
-                                       __func__,
-                                       rdev->constraints->min_uV, name);
-                                rdev->constraints = NULL;
-                                goto out;
-                        }
-        }
+        name = rdev_get_name(rdev);
+
+        ret = machine_constraints_voltage(rdev, constraints);
+        if (ret != 0)
+                goto out;
 
         /* do we need to setup our suspend state */
         if (constraints->initial_state) {
@@ -903,7 +949,7 @@ static int set_consumer_device_supply(struct regulator_dev *rdev,
                                 dev_name(&node->regulator->dev),
                                 node->regulator->desc->name,
                                 supply,
-                                dev_name(&rdev->dev), rdev->desc->name);
+                                dev_name(&rdev->dev), rdev_get_name(rdev));
                 return -EBUSY;
         }
 
@@ -1212,7 +1258,7 @@ static int _regulator_enable(struct regulator_dev *rdev)
                 ret = _regulator_enable(rdev->supply);
                 if (ret < 0) {
                         printk(KERN_ERR "%s: failed to enable %s: %d\n",
-                               __func__, rdev->desc->name, ret);
+                               __func__, rdev_get_name(rdev), ret);
                         return ret;
                 }
         }
@@ -1238,7 +1284,7 @@ static int _regulator_enable(struct regulator_dev *rdev)
                         }
                 } else if (ret < 0) {
                         printk(KERN_ERR "%s: is_enabled() failed for %s: %d\n",
-                               __func__, rdev->desc->name, ret);
+                               __func__, rdev_get_name(rdev), ret);
                         return ret;
                 }
                 /* Fallthrough on positive return values - already enabled */
@@ -1279,7 +1325,7 @@ static int _regulator_disable(struct regulator_dev *rdev)
 
         if (WARN(rdev->use_count <= 0,
                         "unbalanced disables for %s\n",
-                        rdev->desc->name))
+                        rdev_get_name(rdev)))
                 return -EIO;
 
         /* are we the last user and permitted to disable ? */
@@ -1292,7 +1338,7 @@ static int _regulator_disable(struct regulator_dev *rdev)
                         ret = rdev->desc->ops->disable(rdev);
                         if (ret < 0) {
                                 printk(KERN_ERR "%s: failed to disable %s\n",
-                                       __func__, rdev->desc->name);
+                                       __func__, rdev_get_name(rdev));
                                 return ret;
                         }
                 }
@@ -1349,7 +1395,7 @@ static int _regulator_force_disable(struct regulator_dev *rdev)
                 ret = rdev->desc->ops->disable(rdev);
                 if (ret < 0) {
                         printk(KERN_ERR "%s: failed to force disable %s\n",
-                               __func__, rdev->desc->name);
+                               __func__, rdev_get_name(rdev));
                         return ret;
                 }
                 /* notify other consumers that power has been forced off */
@@ -1766,7 +1812,7 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
         output_uV = rdev->desc->ops->get_voltage(rdev);
         if (output_uV <= 0) {
                 printk(KERN_ERR "%s: invalid output voltage found for %s\n",
-                        __func__, rdev->desc->name);
+                        __func__, rdev_get_name(rdev));
                 goto out;
         }
 
@@ -1777,13 +1823,13 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
                 input_uV = rdev->constraints->input_uV;
         if (input_uV <= 0) {
                 printk(KERN_ERR "%s: invalid input voltage found for %s\n",
-                        __func__, rdev->desc->name);
+                        __func__, rdev_get_name(rdev));
                 goto out;
         }
 
         /* calc total requested load for this regulator */
         list_for_each_entry(consumer, &rdev->consumer_list, list)
-            total_uA_load += consumer->uA_load;
+                total_uA_load += consumer->uA_load;
 
         mode = rdev->desc->ops->get_optimum_mode(rdev,
                                                  input_uV, output_uV,
@@ -1791,7 +1837,7 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
         ret = regulator_check_mode(rdev, mode);
         if (ret < 0) {
                 printk(KERN_ERR "%s: failed to get optimum mode for %s @"
-                        " %d uA %d -> %d uV\n", __func__, rdev->desc->name,
+                        " %d uA %d -> %d uV\n", __func__, rdev_get_name(rdev),
                         total_uA_load, input_uV, output_uV);
                 goto out;
         }
@@ -1799,7 +1845,7 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
         ret = rdev->desc->ops->set_mode(rdev, mode);
         if (ret < 0) {
                 printk(KERN_ERR "%s: failed to set optimum mode %x for %s\n",
-                        __func__, mode, rdev->desc->name);
+                        __func__, mode, rdev_get_name(rdev));
                 goto out;
         }
         ret = mode;
@@ -1852,9 +1898,9 @@ static void _notifier_call_chain(struct regulator_dev *rdev,
 
         /* now notify regulator we supply */
         list_for_each_entry(_rdev, &rdev->supply_list, slist) {
-          mutex_lock(&_rdev->mutex);
-          _notifier_call_chain(_rdev, event, data);
-          mutex_unlock(&_rdev->mutex);
+                mutex_lock(&_rdev->mutex);
+                _notifier_call_chain(_rdev, event, data);
+                mutex_unlock(&_rdev->mutex);
         }
 }
 
@@ -1885,9 +1931,9 @@ int regulator_bulk_get(struct device *dev, int num_consumers,
                 consumers[i].consumer = regulator_get(dev,
                                                       consumers[i].supply);
                 if (IS_ERR(consumers[i].consumer)) {
-                        dev_err(dev, "Failed to get supply '%s'\n",
-                                consumers[i].supply);
                         ret = PTR_ERR(consumers[i].consumer);
+                        dev_err(dev, "Failed to get supply '%s': %d\n",
+                                consumers[i].supply, ret);
                         consumers[i].consumer = NULL;
                         goto err;
                 }
@@ -1930,8 +1976,8 @@ int regulator_bulk_enable(int num_consumers,
         return 0;
 
 err:
-        printk(KERN_ERR "Failed to enable %s\n", consumers[i].supply);
-        for (i = 0; i < num_consumers; i++)
+        printk(KERN_ERR "Failed to enable %s: %d\n", consumers[i].supply, ret);
+        for (--i; i >= 0; --i)
                 regulator_disable(consumers[i].consumer);
 
         return ret;
@@ -1965,8 +2011,9 @@ int regulator_bulk_disable(int num_consumers,
         return 0;
 
 err:
-        printk(KERN_ERR "Failed to disable %s\n", consumers[i].supply);
-        for (i = 0; i < num_consumers; i++)
+        printk(KERN_ERR "Failed to disable %s: %d\n", consumers[i].supply,
+               ret);
+        for (--i; i >= 0; --i)
                 regulator_enable(consumers[i].consumer);
 
         return ret;
@@ -2316,7 +2363,7 @@ int regulator_suspend_prepare(suspend_state_t state)
 
                 if (ret < 0) {
                         printk(KERN_ERR "%s: failed to prepare %s\n",
-                                __func__, rdev->desc->name);
+                                __func__, rdev_get_name(rdev));
                         goto out;
                 }
         }
@@ -2429,12 +2476,7 @@ static int __init regulator_init_complete(void)
                 ops = rdev->desc->ops;
                 c = rdev->constraints;
 
-                if (c && c->name)
-                        name = c->name;
-                else if (rdev->desc->name)
-                        name = rdev->desc->name;
-                else
-                        name = "regulator";
+                name = rdev_get_name(rdev);
 
                 if (!ops->disable || (c && c->always_on))
                         continue;
diff --git a/drivers/regulator/da903x.c b/drivers/regulator/da903x.c
index aa224d936e0d..f8c4661a7a81 100644
--- a/drivers/regulator/da903x.c
+++ b/drivers/regulator/da903x.c
@@ -331,7 +331,7 @@ static int da9034_get_ldo12_voltage(struct regulator_dev *rdev)
 static int da9034_list_ldo12_voltage(struct regulator_dev *rdev,
                                      unsigned selector)
 {
-        if (selector > ARRAY_SIZE(da9034_ldo12_data))
+        if (selector >= ARRAY_SIZE(da9034_ldo12_data))
                 return -EINVAL;
         return da9034_ldo12_data[selector] * 1000;
 }
diff --git a/drivers/regulator/lp3971.c b/drivers/regulator/lp3971.c
index 7803a320543b..76d08c282f9c 100644
--- a/drivers/regulator/lp3971.c
+++ b/drivers/regulator/lp3971.c
@@ -446,8 +446,8 @@ static int setup_regulators(struct lp3971 *lp3971,
                 lp3971->rdev[i] = regulator_register(&regulators[id],
                         lp3971->dev, pdata->regulators[i].initdata, lp3971);
 
-                err = IS_ERR(lp3971->rdev[i]);
-                if (err) {
+                if (IS_ERR(lp3971->rdev[i])) {
+                        err = PTR_ERR(lp3971->rdev[i]);
                         dev_err(lp3971->dev, "regulator init failed: %d\n",
                                 err);
                         goto error;
diff --git a/drivers/regulator/max8660.c b/drivers/regulator/max8660.c
new file mode 100644
index 000000000000..acc2fb7b6087
--- /dev/null
+++ b/drivers/regulator/max8660.c
@@ -0,0 +1,510 @@
+/*
+ * max8660.c  --  Voltage regulation for the Maxim 8660/8661
+ *
+ * based on max1586.c and wm8400-regulator.c
+ *
+ * Copyright (C) 2009 Wolfram Sang, Pengutronix e.K.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
+ * Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * Some info:
+ *
+ * Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX8660-MAX8661.pdf
+ *
+ * This chip is a bit nasty because it is a write-only device. Thus, the driver
+ * uses shadow registers to keep track of its values. The main problem appears
+ * to be the initialization: When Linux boots up, we cannot know if the chip is
+ * in the default state or not, so we would have to pass such information in
+ * platform_data. As this adds a bit of complexity to the driver, this is left
+ * out for now until it is really needed.
+ *
+ * [A|S|M]DTV1 registers are currently not used, but [A|S|M]DTV2.
+ *
+ * If the driver is feature complete, it might be worth to check if one set of
+ * functions for V3-V7 is sufficient. For maximum flexibility during
+ * development, they are separated for now.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/max8660.h>
+
+#define MAX8660_DCDC_MIN_UV      725000
+#define MAX8660_DCDC_MAX_UV     1800000
+#define MAX8660_DCDC_STEP         25000
+#define MAX8660_DCDC_MAX_SEL    0x2b
+
+#define MAX8660_LDO5_MIN_UV     1700000
+#define MAX8660_LDO5_MAX_UV     2000000
+#define MAX8660_LDO5_STEP         25000
+#define MAX8660_LDO5_MAX_SEL    0x0c
+
+#define MAX8660_LDO67_MIN_UV    1800000
+#define MAX8660_LDO67_MAX_UV    3300000
+#define MAX8660_LDO67_STEP       100000
+#define MAX8660_LDO67_MAX_SEL   0x0f
+
+enum {
+        MAX8660_OVER1,
+        MAX8660_OVER2,
+        MAX8660_VCC1,
+        MAX8660_ADTV1,
+        MAX8660_ADTV2,
+        MAX8660_SDTV1,
+        MAX8660_SDTV2,
+        MAX8660_MDTV1,
+        MAX8660_MDTV2,
+        MAX8660_L12VCR,
+        MAX8660_FPWM,
+        MAX8660_N_REGS, /* not a real register */
+};
+
+struct max8660 {
+        struct i2c_client *client;
+        u8 shadow_regs[MAX8660_N_REGS];         /* as chip is write only */
+        struct regulator_dev *rdev[];
+};
+
+static int max8660_write(struct max8660 *max8660, u8 reg, u8 mask, u8 val)
+{
+        static const u8 max8660_addresses[MAX8660_N_REGS] =
+          { 0x10, 0x12, 0x20, 0x23, 0x24, 0x29, 0x2a, 0x32, 0x33, 0x39, 0x80 };
+
+        int ret;
+        u8 reg_val = (max8660->shadow_regs[reg] & mask) | val;
+        dev_vdbg(&max8660->client->dev, "Writing reg %02x with %02x\n",
+                        max8660_addresses[reg], reg_val);
+
+        ret = i2c_smbus_write_byte_data(max8660->client,
+                        max8660_addresses[reg], reg_val);
+        if (ret == 0)
+                max8660->shadow_regs[reg] = reg_val;
+
+        return ret;
+}
+
+
+/*
+ * DCDC functions
+ */
+
+static int max8660_dcdc_is_enabled(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 val = max8660->shadow_regs[MAX8660_OVER1];
+        u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4;
+        return !!(val & mask);
+}
+
+static int max8660_dcdc_enable(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 bit = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4;
+        return max8660_write(max8660, MAX8660_OVER1, 0xff, bit);
+}
+
+static int max8660_dcdc_disable(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? ~1 : ~4;
+        return max8660_write(max8660, MAX8660_OVER1, mask, 0);
+}
+
+static int max8660_dcdc_list(struct regulator_dev *rdev, unsigned selector)
+{
+        if (selector > MAX8660_DCDC_MAX_SEL)
+                return -EINVAL;
+        return MAX8660_DCDC_MIN_UV + selector * MAX8660_DCDC_STEP;
+}
+
+static int max8660_dcdc_get(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2;
+        u8 selector = max8660->shadow_regs[reg];
+        return MAX8660_DCDC_MIN_UV + selector * MAX8660_DCDC_STEP;
+}
+
+static int max8660_dcdc_set(struct regulator_dev *rdev, int min_uV, int max_uV)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 reg, selector, bits;
+        int ret;
+
+        if (min_uV < MAX8660_DCDC_MIN_UV || min_uV > MAX8660_DCDC_MAX_UV)
+                return -EINVAL;
+        if (max_uV < MAX8660_DCDC_MIN_UV || max_uV > MAX8660_DCDC_MAX_UV)
+                return -EINVAL;
+
+        selector = (min_uV - (MAX8660_DCDC_MIN_UV - MAX8660_DCDC_STEP + 1))
+                        / MAX8660_DCDC_STEP;
+
+        ret = max8660_dcdc_list(rdev, selector);
+        if (ret < 0 || ret > max_uV)
+                return -EINVAL;
+
+        reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2;
+        ret = max8660_write(max8660, reg, 0, selector);
+        if (ret)
+                return ret;
+
+        /* Select target voltage register and activate regulation */
+        bits = (rdev_get_id(rdev) == MAX8660_V3) ? 0x03 : 0x30;
+        return max8660_write(max8660, MAX8660_VCC1, 0xff, bits);
+}
+
+static struct regulator_ops max8660_dcdc_ops = {
+        .is_enabled = max8660_dcdc_is_enabled,
+        .list_voltage = max8660_dcdc_list,
+        .set_voltage = max8660_dcdc_set,
+        .get_voltage = max8660_dcdc_get,
+};
+
+
+/*
+ * LDO5 functions
+ */
+
+static int max8660_ldo5_list(struct regulator_dev *rdev, unsigned selector)
+{
+        if (selector > MAX8660_LDO5_MAX_SEL)
+                return -EINVAL;
+        return MAX8660_LDO5_MIN_UV + selector * MAX8660_LDO5_STEP;
+}
+
+static int max8660_ldo5_get(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 selector = max8660->shadow_regs[MAX8660_MDTV2];
+
+        return MAX8660_LDO5_MIN_UV + selector * MAX8660_LDO5_STEP;
+}
+
+static int max8660_ldo5_set(struct regulator_dev *rdev, int min_uV, int max_uV)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 selector;
+        int ret;
+
+        if (min_uV < MAX8660_LDO5_MIN_UV || min_uV > MAX8660_LDO5_MAX_UV)
+                return -EINVAL;
+        if (max_uV < MAX8660_LDO5_MIN_UV || max_uV > MAX8660_LDO5_MAX_UV)
+                return -EINVAL;
+
+        selector = (min_uV - (MAX8660_LDO5_MIN_UV - MAX8660_LDO5_STEP + 1))
+                        / MAX8660_LDO5_STEP;
+        ret = max8660_ldo5_list(rdev, selector);
+        if (ret < 0 || ret > max_uV)
+                return -EINVAL;
+
+        ret = max8660_write(max8660, MAX8660_MDTV2, 0, selector);
+        if (ret)
+                return ret;
+
+        /* Select target voltage register and activate regulation */
+        return max8660_write(max8660, MAX8660_VCC1, 0xff, 0xc0);
+}
+
+static struct regulator_ops max8660_ldo5_ops = {
+        .list_voltage = max8660_ldo5_list,
+        .set_voltage = max8660_ldo5_set,
+        .get_voltage = max8660_ldo5_get,
+};
+
+
+/*
+ * LDO67 functions
+ */
+
+static int max8660_ldo67_is_enabled(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 val = max8660->shadow_regs[MAX8660_OVER2];
+        u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4;
+        return !!(val & mask);
+}
+
+static int max8660_ldo67_enable(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 bit = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4;
+        return max8660_write(max8660, MAX8660_OVER2, 0xff, bit);
+}
+
+static int max8660_ldo67_disable(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? ~2 : ~4;
+        return max8660_write(max8660, MAX8660_OVER2, mask, 0);
+}
+
+static int max8660_ldo67_list(struct regulator_dev *rdev, unsigned selector)
+{
+        if (selector > MAX8660_LDO67_MAX_SEL)
+                return -EINVAL;
+        return MAX8660_LDO67_MIN_UV + selector * MAX8660_LDO67_STEP;
+}
+
+static int max8660_ldo67_get(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 shift = (rdev_get_id(rdev) == MAX8660_V6) ? 0 : 4;
+        u8 selector = (max8660->shadow_regs[MAX8660_L12VCR] >> shift) & 0xf;
+
+        return MAX8660_LDO67_MIN_UV + selector * MAX8660_LDO67_STEP;
+}
+
+static int max8660_ldo67_set(struct regulator_dev *rdev, int min_uV, int max_uV)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 selector;
+        int ret;
+
+        if (min_uV < MAX8660_LDO67_MIN_UV || min_uV > MAX8660_LDO67_MAX_UV)
+                return -EINVAL;
+        if (max_uV < MAX8660_LDO67_MIN_UV || max_uV > MAX8660_LDO67_MAX_UV)
+                return -EINVAL;
+
+        selector = (min_uV - (MAX8660_LDO67_MIN_UV - MAX8660_LDO67_STEP + 1))
+                        / MAX8660_LDO67_STEP;
+
+        ret = max8660_ldo67_list(rdev, selector);
+        if (ret < 0 || ret > max_uV)
+                return -EINVAL;
+
+        if (rdev_get_id(rdev) == MAX8660_V6)
+                return max8660_write(max8660, MAX8660_L12VCR, 0xf0, selector);
+        else
+                return max8660_write(max8660, MAX8660_L12VCR, 0x0f, selector << 4);
+}
+
+static struct regulator_ops max8660_ldo67_ops = {
+        .is_enabled = max8660_ldo67_is_enabled,
+        .enable = max8660_ldo67_enable,
+        .disable = max8660_ldo67_disable,
+        .list_voltage = max8660_ldo67_list,
+        .get_voltage = max8660_ldo67_get,
+        .set_voltage = max8660_ldo67_set,
+};
+
+static struct regulator_desc max8660_reg[] = {
+        {
+                .name = "V3(DCDC)",
+                .id = MAX8660_V3,
+                .ops = &max8660_dcdc_ops,
+                .type = REGULATOR_VOLTAGE,
+                .n_voltages = MAX8660_DCDC_MAX_SEL + 1,
+                .owner = THIS_MODULE,
+        },
+        {
+                .name = "V4(DCDC)",
+                .id = MAX8660_V4,
+                .ops = &max8660_dcdc_ops,
+                .type = REGULATOR_VOLTAGE,
+                .n_voltages = MAX8660_DCDC_MAX_SEL + 1,
+                .owner = THIS_MODULE,
+        },
+        {
+                .name = "V5(LDO)",
+                .id = MAX8660_V5,
+                .ops = &max8660_ldo5_ops,
+                .type = REGULATOR_VOLTAGE,
+                .n_voltages = MAX8660_LDO5_MAX_SEL + 1,
+                .owner = THIS_MODULE,
+        },
+        {
+                .name = "V6(LDO)",
+                .id = MAX8660_V6,
+                .ops = &max8660_ldo67_ops,
+                .type = REGULATOR_VOLTAGE,
+                .n_voltages = MAX8660_LDO67_MAX_SEL + 1,
+                .owner = THIS_MODULE,
+        },
+        {
+                .name = "V7(LDO)",
+                .id = MAX8660_V7,
+                .ops = &max8660_ldo67_ops,
+                .type = REGULATOR_VOLTAGE,
+                .n_voltages = MAX8660_LDO67_MAX_SEL + 1,
+                .owner = THIS_MODULE,
+        },
+};
+
+static int max8660_probe(struct i2c_client *client,
+                              const struct i2c_device_id *i2c_id)
+{
+        struct regulator_dev **rdev;
+        struct max8660_platform_data *pdata = client->dev.platform_data;
+        struct max8660 *max8660;
+        int boot_on, i, id, ret = -EINVAL;
+
+        if (pdata->num_subdevs > MAX8660_V_END) {
+                dev_err(&client->dev, "Too much regulators found!\n");
+                goto out;
+        }
+
+        max8660 = kzalloc(sizeof(struct max8660) +
+                        sizeof(struct regulator_dev *) * MAX8660_V_END,
+                        GFP_KERNEL);
+        if (!max8660) {
+                ret = -ENOMEM;
+                goto out;
+        }
+
+        max8660->client = client;
+        rdev = max8660->rdev;
+
+        if (pdata->en34_is_high) {
+                /* Simulate always on */
+                max8660->shadow_regs[MAX8660_OVER1] = 5;
+        } else {
+                /* Otherwise devices can be toggled via software */
+                max8660_dcdc_ops.enable = max8660_dcdc_enable;
+                max8660_dcdc_ops.disable = max8660_dcdc_disable;
+        }
+
+        /*
+         * First, set up shadow registers to prevent glitches. As some
+         * registers are shared between regulators, everything must be properly
+         * set up for all regulators in advance.
+         */
+        max8660->shadow_regs[MAX8660_ADTV1] =
+                max8660->shadow_regs[MAX8660_ADTV2] =
+                max8660->shadow_regs[MAX8660_SDTV1] =
+                max8660->shadow_regs[MAX8660_SDTV2] = 0x1b;
+        max8660->shadow_regs[MAX8660_MDTV1] =
+                max8660->shadow_regs[MAX8660_MDTV2] = 0x04;
+
+        for (i = 0; i < pdata->num_subdevs; i++) {
+
+                if (!pdata->subdevs[i].platform_data)
+                        goto err_free;
+
+                boot_on = pdata->subdevs[i].platform_data->constraints.boot_on;
+
+                switch (pdata->subdevs[i].id) {
+                case MAX8660_V3:
+                        if (boot_on)
+                                max8660->shadow_regs[MAX8660_OVER1] |= 1;
+                        break;
+
+                case MAX8660_V4:
+                        if (boot_on)
+                                max8660->shadow_regs[MAX8660_OVER1] |= 4;
+                        break;
+
+                case MAX8660_V5:
+                        break;
+
+                case MAX8660_V6:
+                        if (boot_on)
+                                max8660->shadow_regs[MAX8660_OVER2] |= 2;
+                        break;
+
+                case MAX8660_V7:
+                        if (!strcmp(i2c_id->name, "max8661")) {
+                                dev_err(&client->dev, "Regulator not on this chip!\n");
+                                goto err_free;
+                        }
+
+                        if (boot_on)
+                                max8660->shadow_regs[MAX8660_OVER2] |= 4;
+                        break;
+
+                default:
+                        dev_err(&client->dev, "invalid regulator %s\n",
+                                 pdata->subdevs[i].name);
+                        goto err_free;
+                }
+        }
+
+        /* Finally register devices */
+        for (i = 0; i < pdata->num_subdevs; i++) {
+
+                id = pdata->subdevs[i].id;
+
+                rdev[i] = regulator_register(&max8660_reg[id], &client->dev,
+                                             pdata->subdevs[i].platform_data,
+                                             max8660);
+                if (IS_ERR(rdev[i])) {
+                        ret = PTR_ERR(rdev[i]);
+                        dev_err(&client->dev, "failed to register %s\n",
+                                max8660_reg[id].name);
+                        goto err_unregister;
+                }
+        }
+
+        i2c_set_clientdata(client, rdev);
+        dev_info(&client->dev, "Maxim 8660/8661 regulator driver loaded\n");
+        return 0;
+
+err_unregister:
+        while (--i >= 0)
+                regulator_unregister(rdev[i]);
+err_free:
+        kfree(max8660);
+out:
+        return ret;
+}
+
+static int max8660_remove(struct i2c_client *client)
+{
+        struct regulator_dev **rdev = i2c_get_clientdata(client);
+        int i;
+
+        for (i = 0; i < MAX8660_V_END; i++)
+                if (rdev[i])
+                        regulator_unregister(rdev[i]);
+        kfree(rdev);
+        i2c_set_clientdata(client, NULL);
+
+        return 0;
+}
+
+static const struct i2c_device_id max8660_id[] = {
+        { "max8660", 0 },
+        { "max8661", 0 },
+        { }
+};
+MODULE_DEVICE_TABLE(i2c, max8660_id);
+
+static struct i2c_driver max8660_driver = {
+        .probe = max8660_probe,
+        .remove = max8660_remove,
+        .driver         = {
+                .name   = "max8660",
+        },
+        .id_table       = max8660_id,
+};
+
+static int __init max8660_init(void)
+{
+        return i2c_add_driver(&max8660_driver);
+}
+subsys_initcall(max8660_init);
+
+static void __exit max8660_exit(void)
+{
+        i2c_del_driver(&max8660_driver);
+}
+module_exit(max8660_exit);
+
+/* Module information */
+MODULE_DESCRIPTION("MAXIM 8660/8661 voltage regulator driver");
+MODULE_AUTHOR("Wolfram Sang");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/regulator/mc13783-regulator.c b/drivers/regulator/mc13783-regulator.c
new file mode 100644
index 000000000000..39c495300045
--- /dev/null
+++ b/drivers/regulator/mc13783-regulator.c
@@ -0,0 +1,245 @@
+/*
+ * Regulator Driver for Freescale MC13783 PMIC
+ *
+ * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/mfd/mc13783.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/driver.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/err.h>
+
+#define MC13783_REG_SWITCHERS4                  28
+#define MC13783_REG_SWITCHERS4_PLLEN                    (1 << 18)
+
+#define MC13783_REG_SWITCHERS5                  29
+#define MC13783_REG_SWITCHERS5_SW3EN                    (1 << 20)
+
+#define MC13783_REG_REGULATORMODE0              32
+#define MC13783_REG_REGULATORMODE0_VAUDIOEN             (1 << 0)
+#define MC13783_REG_REGULATORMODE0_VIOHIEN              (1 << 3)
+#define MC13783_REG_REGULATORMODE0_VIOLOEN              (1 << 6)
+#define MC13783_REG_REGULATORMODE0_VDIGEN               (1 << 9)
+#define MC13783_REG_REGULATORMODE0_VGENEN               (1 << 12)
+#define MC13783_REG_REGULATORMODE0_VRFDIGEN             (1 << 15)
+#define MC13783_REG_REGULATORMODE0_VRFREFEN             (1 << 18)
+#define MC13783_REG_REGULATORMODE0_VRFCPEN              (1 << 21)
+
+#define MC13783_REG_REGULATORMODE1              33
+#define MC13783_REG_REGULATORMODE1_VSIMEN               (1 << 0)
+#define MC13783_REG_REGULATORMODE1_VESIMEN              (1 << 3)
+#define MC13783_REG_REGULATORMODE1_VCAMEN               (1 << 6)
+#define MC13783_REG_REGULATORMODE1_VRFBGEN              (1 << 9)
+#define MC13783_REG_REGULATORMODE1_VVIBEN               (1 << 11)
+#define MC13783_REG_REGULATORMODE1_VRF1EN               (1 << 12)
+#define MC13783_REG_REGULATORMODE1_VRF2EN               (1 << 15)
+#define MC13783_REG_REGULATORMODE1_VMMC1EN              (1 << 18)
+#define MC13783_REG_REGULATORMODE1_VMMC2EN              (1 << 21)
+
+#define MC13783_REG_POWERMISC                   34
+#define MC13783_REG_POWERMISC_GPO1EN                    (1 << 6)
+#define MC13783_REG_POWERMISC_GPO2EN                    (1 << 8)
+#define MC13783_REG_POWERMISC_GPO3EN                    (1 << 10)
+#define MC13783_REG_POWERMISC_GPO4EN                    (1 << 12)
+
+struct mc13783_regulator {
+        struct regulator_desc desc;
+        int reg;
+        int enable_bit;
+};
+
+static struct regulator_ops mc13783_regulator_ops;
+
+#define MC13783_DEFINE(prefix, _name, _reg)                             \
+        [MC13783_ ## prefix ## _ ## _name] = {                          \
+                .desc = {                                               \
+                        .name = #prefix "_" #_name,                     \
+                        .ops = &mc13783_regulator_ops,                  \
+                        .type = REGULATOR_VOLTAGE,                      \
+                        .id = MC13783_ ## prefix ## _ ## _name,         \
+                        .owner = THIS_MODULE,                           \
+                },                                                      \
+                .reg = MC13783_REG_ ## _reg,                            \
+                .enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \
+        }
+
+#define MC13783_DEFINE_SW(_name, _reg) MC13783_DEFINE(SW, _name, _reg)
+#define MC13783_DEFINE_REGU(_name, _reg) MC13783_DEFINE(REGU, _name, _reg)
+
+static struct mc13783_regulator mc13783_regulators[] = {
+        MC13783_DEFINE_SW(SW3, SWITCHERS5),
+        MC13783_DEFINE_SW(PLL, SWITCHERS4),
+
+        MC13783_DEFINE_REGU(VAUDIO, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VIOHI, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VDIG, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VGEN, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VSIM, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VESIM, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VCAM, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VRFBG, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VVIB, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VRF1, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VRF2, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1),
+        MC13783_DEFINE_REGU(GPO1, POWERMISC),
+        MC13783_DEFINE_REGU(GPO2, POWERMISC),
+        MC13783_DEFINE_REGU(GPO3, POWERMISC),
+        MC13783_DEFINE_REGU(GPO4, POWERMISC),
+};
+
+struct mc13783_regulator_priv {
+        struct mc13783 *mc13783;
+        struct regulator_dev *regulators[];
+};
+
+static int mc13783_regulator_enable(struct regulator_dev *rdev)
+{
+        struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
+        int id = rdev_get_id(rdev);
+        int ret;
+
+        dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
+
+        mc13783_lock(priv->mc13783);
+        ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].reg,
+                        mc13783_regulators[id].enable_bit,
+                        mc13783_regulators[id].enable_bit);
+        mc13783_unlock(priv->mc13783);
+
+        return ret;
+}
+
+static int mc13783_regulator_disable(struct regulator_dev *rdev)
+{
+        struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
+        int id = rdev_get_id(rdev);
+        int ret;
+
+        dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
+
+        mc13783_lock(priv->mc13783);
+        ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].reg,
+                        mc13783_regulators[id].enable_bit, 0);
+        mc13783_unlock(priv->mc13783);
+
+        return ret;
+}
+
+static int mc13783_regulator_is_enabled(struct regulator_dev *rdev)
+{
+        struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
+        int ret, id = rdev_get_id(rdev);
+        unsigned int val;
+
+        mc13783_lock(priv->mc13783);
+        ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val);
+        mc13783_unlock(priv->mc13783);
+
+        if (ret)
+                return ret;
+
+        return (val & mc13783_regulators[id].enable_bit) != 0;
+}
+
+static struct regulator_ops mc13783_regulator_ops = {
+        .enable = mc13783_regulator_enable,
+        .disable = mc13783_regulator_disable,
+        .is_enabled = mc13783_regulator_is_enabled,
+};
+
+static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
+{
+        struct mc13783_regulator_priv *priv;
+        struct mc13783 *mc13783 = dev_get_drvdata(pdev->dev.parent);
+        struct mc13783_regulator_platform_data *pdata =
+                dev_get_platdata(&pdev->dev);
+        struct mc13783_regulator_init_data *init_data;
+        int i, ret;
+
+        dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id);
+
+        priv = kzalloc(sizeof(*priv) +
+                        pdata->num_regulators * sizeof(priv->regulators[0]),
+                        GFP_KERNEL);
+        if (!priv)
+                return -ENOMEM;
+
+        priv->mc13783 = mc13783;
+
+        for (i = 0; i < pdata->num_regulators; i++) {
+                init_data = &pdata->regulators[i];
+                priv->regulators[i] = regulator_register(
+                                &mc13783_regulators[init_data->id].desc,
+                                &pdev->dev, init_data->init_data, priv);
+
+                if (IS_ERR(priv->regulators[i])) {
+                        dev_err(&pdev->dev, "failed to register regulator %s\n",
+                                mc13783_regulators[i].desc.name);
+                        ret = PTR_ERR(priv->regulators[i]);
+                        goto err;
+                }
+        }
+
+        platform_set_drvdata(pdev, priv);
+
+        return 0;
+err:
+        while (--i >= 0)
+                regulator_unregister(priv->regulators[i]);
+
+        kfree(priv);
+
+        return ret;
+}
+
+static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
+{
+        struct mc13783_regulator_priv *priv = platform_get_drvdata(pdev);
+        struct mc13783_regulator_platform_data *pdata =
+                dev_get_platdata(&pdev->dev);
+        int i;
+
+        for (i = 0; i < pdata->num_regulators; i++)
+                regulator_unregister(priv->regulators[i]);
+
+        return 0;
+}
+
+static struct platform_driver mc13783_regulator_driver = {
+        .driver = {
+                .name   = "mc13783-regulator",
+                .owner  = THIS_MODULE,
+        },
+        .remove         = __devexit_p(mc13783_regulator_remove),
+        .probe          = mc13783_regulator_probe,
+};
+
+static int __init mc13783_regulator_init(void)
+{
+        return platform_driver_register(&mc13783_regulator_driver);
+}
+subsys_initcall(mc13783_regulator_init);
+
+static void __exit mc13783_regulator_exit(void)
+{
+        platform_driver_unregister(&mc13783_regulator_driver);
+}
+module_exit(mc13783_regulator_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
+MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
+MODULE_ALIAS("platform:mc13783-regulator");
diff --git a/drivers/regulator/mc13783.c b/drivers/regulator/mc13783.c
deleted file mode 100644
index 710211f67449..000000000000
--- a/drivers/regulator/mc13783.c
+++ /dev/null
@@ -1,410 +0,0 @@
-/*
- * Regulator Driver for Freescale MC13783 PMIC
- *
- * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/mfd/mc13783-private.h>
-#include <linux/regulator/machine.h>
-#include <linux/regulator/driver.h>
-#include <linux/platform_device.h>
-#include <linux/mfd/mc13783.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/err.h>
-
-struct mc13783_regulator {
-        struct regulator_desc desc;
-        int reg;
-        int enable_bit;
-};
-
-static struct regulator_ops mc13783_regulator_ops;
-
-static struct mc13783_regulator mc13783_regulators[] = {
-        [MC13783_SW_SW3] = {
-                .desc = {
-                        .name   = "SW_SW3",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_SW_SW3,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_SWITCHERS_5,
-                .enable_bit = MC13783_SWCTRL_SW3_EN,
-        },
-        [MC13783_SW_PLL] = {
-                .desc = {
-                        .name   = "SW_PLL",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_SW_PLL,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_SWITCHERS_4,
-                .enable_bit = MC13783_SWCTRL_PLL_EN,
-        },
-        [MC13783_REGU_VAUDIO] = {
-                .desc = {
-                        .name   = "REGU_VAUDIO",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VAUDIO,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VAUDIO_EN,
-        },
-        [MC13783_REGU_VIOHI] = {
-                .desc = {
-                        .name   = "REGU_VIOHI",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VIOHI,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VIOHI_EN,
-        },
-        [MC13783_REGU_VIOLO] = {
-                .desc = {
-                        .name   = "REGU_VIOLO",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VIOLO,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VIOLO_EN,
-        },
-        [MC13783_REGU_VDIG] = {
-                .desc = {
-                        .name   = "REGU_VDIG",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VDIG,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VDIG_EN,
-        },
-        [MC13783_REGU_VGEN] = {
-                .desc = {
-                        .name   = "REGU_VGEN",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VGEN,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VGEN_EN,
-        },
-        [MC13783_REGU_VRFDIG] = {
-                .desc = {
-                        .name   = "REGU_VRFDIG",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VRFDIG,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VRFDIG_EN,
-        },
-        [MC13783_REGU_VRFREF] = {
-                .desc = {
-                        .name   = "REGU_VRFREF",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VRFREF,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VRFREF_EN,
-        },
-        [MC13783_REGU_VRFCP] = {
-                .desc = {
-                        .name   = "REGU_VRFCP",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VRFCP,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VRFCP_EN,
-        },
-        [MC13783_REGU_VSIM] = {
-                .desc = {
-                        .name   = "REGU_VSIM",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VSIM,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VSIM_EN,
-        },
-        [MC13783_REGU_VESIM] = {
-                .desc = {
-                        .name   = "REGU_VESIM",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VESIM,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VESIM_EN,
-        },
-        [MC13783_REGU_VCAM] = {
-                .desc = {
-                        .name   = "REGU_VCAM",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VCAM,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VCAM_EN,
-        },
-        [MC13783_REGU_VRFBG] = {
-                .desc = {
-                        .name   = "REGU_VRFBG",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VRFBG,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VRFBG_EN,
-        },
-        [MC13783_REGU_VVIB] = {
-                .desc = {
-                        .name   = "REGU_VVIB",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VVIB,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VVIB_EN,
-        },
-        [MC13783_REGU_VRF1] = {
-                .desc = {
-                        .name   = "REGU_VRF1",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VRF1,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VRF1_EN,
-        },
-        [MC13783_REGU_VRF2] = {
-                .desc = {
-                        .name   = "REGU_VRF2",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VRF2,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VRF2_EN,
-        },
-        [MC13783_REGU_VMMC1] = {
-                .desc = {
-                        .name   = "REGU_VMMC1",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VMMC1,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VMMC1_EN,
-        },
-        [MC13783_REGU_VMMC2] = {
-                .desc = {
-                        .name   = "REGU_VMMC2",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VMMC2,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VMMC2_EN,
-        },
-        [MC13783_REGU_GPO1] = {
-                .desc = {
-                        .name   = "REGU_GPO1",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_GPO1,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_POWER_MISCELLANEOUS,
-                .enable_bit = MC13783_REGCTRL_GPO1_EN,
-        },
-        [MC13783_REGU_GPO2] = {
-                .desc = {
-                        .name   = "REGU_GPO2",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_GPO2,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_POWER_MISCELLANEOUS,
-                .enable_bit = MC13783_REGCTRL_GPO2_EN,
-        },
-        [MC13783_REGU_GPO3] = {
-                .desc = {
-                        .name   = "REGU_GPO3",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_GPO3,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_POWER_MISCELLANEOUS,
-                .enable_bit = MC13783_REGCTRL_GPO3_EN,
-        },
-        [MC13783_REGU_GPO4] = {
-                .desc = {
-                        .name   = "REGU_GPO4",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_GPO4,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_POWER_MISCELLANEOUS,
-                .enable_bit = MC13783_REGCTRL_GPO4_EN,
-        },
-};
-
-struct mc13783_priv {
-        struct regulator_desc desc[ARRAY_SIZE(mc13783_regulators)];
-        struct mc13783 *mc13783;
-        struct regulator_dev *regulators[0];
-};
-
-static int mc13783_enable(struct regulator_dev *rdev)
-{
-        struct mc13783_priv *priv = rdev_get_drvdata(rdev);
-        int id = rdev_get_id(rdev);
-
-        dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
-
-        return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg,
-                        mc13783_regulators[id].enable_bit,
-                        mc13783_regulators[id].enable_bit);
-}
-
-static int mc13783_disable(struct regulator_dev *rdev)
-{
-        struct mc13783_priv *priv = rdev_get_drvdata(rdev);
-        int id = rdev_get_id(rdev);
-
-        dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
-
-        return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg,
-                        mc13783_regulators[id].enable_bit, 0);
-}
-
-static int mc13783_is_enabled(struct regulator_dev *rdev)
-{
-        struct mc13783_priv *priv = rdev_get_drvdata(rdev);
-        int ret, id = rdev_get_id(rdev);
-        unsigned int val;
-
-        ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val);
-        if (ret)
-                return ret;
-
-        return (val & mc13783_regulators[id].enable_bit) != 0;
-}
-
-static struct regulator_ops mc13783_regulator_ops = {
-        .enable         = mc13783_enable,
-        .disable        = mc13783_disable,
-        .is_enabled     = mc13783_is_enabled,
-};
-
-static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
-{
-        struct mc13783_priv *priv;
-        struct mc13783 *mc13783 = dev_get_drvdata(pdev->dev.parent);
-        struct mc13783_regulator_init_data *init_data;
-        int i, ret;
-
-        dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id);
-
-        priv = kzalloc(sizeof(*priv) + mc13783->num_regulators * sizeof(void *),
-                        GFP_KERNEL);
-        if (!priv)
-                return -ENOMEM;
-
-        priv->mc13783 = mc13783;
-
-        for (i = 0; i < mc13783->num_regulators; i++) {
-                init_data = &mc13783->regulators[i];
-                priv->regulators[i] = regulator_register(
-                                &mc13783_regulators[init_data->id].desc,
-                                &pdev->dev, init_data->init_data, priv);
-
-                if (IS_ERR(priv->regulators[i])) {
-                        dev_err(&pdev->dev, "failed to register regulator %s\n",
-                                mc13783_regulators[i].desc.name);
-                        ret = PTR_ERR(priv->regulators[i]);
-                        goto err;
-                }
-        }
-
-        platform_set_drvdata(pdev, priv);
-
-        return 0;
-err:
-        while (--i >= 0)
-                regulator_unregister(priv->regulators[i]);
-
-        kfree(priv);
-
-        return ret;
-}
-
-static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
-{
-        struct mc13783_priv *priv = platform_get_drvdata(pdev);
-        struct mc13783 *mc13783 = priv->mc13783;
-        int i;
-
-        for (i = 0; i < mc13783->num_regulators; i++)
-                regulator_unregister(priv->regulators[i]);
-
-        return 0;
-}
-
-static struct platform_driver mc13783_regulator_driver = {
-        .driver = {
-                .name   = "mc13783-regulator",
-                .owner  = THIS_MODULE,
-        },
-        .remove         = __devexit_p(mc13783_regulator_remove),
-};
-
-static int __init mc13783_regulator_init(void)
-{
-        return platform_driver_probe(&mc13783_regulator_driver,
-                        mc13783_regulator_probe);
-}
-subsys_initcall(mc13783_regulator_init);
-
-static void __exit mc13783_regulator_exit(void)
-{
-        platform_driver_unregister(&mc13783_regulator_driver);
-}
-module_exit(mc13783_regulator_exit);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
-MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
-MODULE_ALIAS("platform:mc13783-regulator");
diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c
index 7ea1c3a31081..7e674859bd59 100644
--- a/drivers/regulator/twl-regulator.c
+++ b/drivers/regulator/twl-regulator.c
@@ -12,6 +12,7 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/err.h>
+#include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/regulator/driver.h>
 #include <linux/regulator/machine.h>
@@ -40,6 +41,12 @@ struct twlreg_info {
         u8                      table_len;
         const u16               *table;
 
+        /* regulator specific turn-on delay */
+        u16                     delay;
+
+        /* State REMAP default configuration */
+        u8                      remap;
+
         /* chip constraints on regulator behavior */
         u16                     min_mV;
 
@@ -128,6 +135,7 @@ static int twlreg_enable(struct regulator_dev *rdev)
 {
         struct twlreg_info      *info = rdev_get_drvdata(rdev);
         int                     grp;
+        int                     ret;
 
         grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
         if (grp < 0)
@@ -138,7 +146,11 @@ static int twlreg_enable(struct regulator_dev *rdev)
         else
                 grp |= P1_GRP_6030;
 
-        return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
+        ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
+
+        udelay(info->delay);
+
+        return ret;
 }
 
 static int twlreg_disable(struct regulator_dev *rdev)
@@ -151,9 +163,9 @@ static int twlreg_disable(struct regulator_dev *rdev)
                 return grp;
 
         if (twl_class_is_4030())
-                grp &= ~P1_GRP_4030;
+                grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
         else
-                grp &= ~P1_GRP_6030;
+                grp &= ~(P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030);
 
         return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
 }
@@ -294,6 +306,18 @@ static const u16 VSIM_VSEL_table[] = {
 static const u16 VDAC_VSEL_table[] = {
         1200, 1300, 1800, 1800,
 };
+static const u16 VDD1_VSEL_table[] = {
+        800, 1450,
+};
+static const u16 VDD2_VSEL_table[] = {
+        800, 1450, 1500,
+};
+static const u16 VIO_VSEL_table[] = {
+        1800, 1850,
+};
+static const u16 VINTANA2_VSEL_table[] = {
+        2500, 2750,
+};
 static const u16 VAUX1_6030_VSEL_table[] = {
         1000, 1300, 1800, 2500,
         2800, 2900, 3000, 3000,
@@ -414,20 +438,30 @@ static struct regulator_ops twlfixed_ops = {
 
 /*----------------------------------------------------------------------*/
 
-#define TWL4030_ADJUSTABLE_LDO(label, offset, num) \
-                TWL_ADJUSTABLE_LDO(label, offset, num, TWL4030)
-#define TWL4030_FIXED_LDO(label, offset, mVolts, num) \
-                TWL_FIXED_LDO(label, offset, mVolts, num, TWL4030)
-#define TWL6030_ADJUSTABLE_LDO(label, offset, num) \
-                TWL_ADJUSTABLE_LDO(label, offset, num, TWL6030)
-#define TWL6030_FIXED_LDO(label, offset, mVolts, num) \
-                TWL_FIXED_LDO(label, offset, mVolts, num, TWL6030)
-
-#define TWL_ADJUSTABLE_LDO(label, offset, num, family) { \
+#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
+                TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
+                        remap_conf, TWL4030)
+#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
+                        remap_conf) \
+                TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
+                        remap_conf, TWL4030)
+#define TWL6030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
+                        remap_conf) \
+                TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
+                        remap_conf, TWL6030)
+#define TWL6030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
+                        remap_conf) \
+                TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
+                        remap_conf, TWL6030)
+
+#define TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf, \
+                family) { \
         .base = offset, \
         .id = num, \
         .table_len = ARRAY_SIZE(label##_VSEL_table), \
         .table = label##_VSEL_table, \
+        .delay = turnon_delay, \
+        .remap = remap_conf, \
         .desc = { \
                 .name = #label, \
                 .id = family##_REG_##label, \
@@ -438,10 +472,13 @@ static struct regulator_ops twlfixed_ops = {
                 }, \
         }
 
-#define TWL_FIXED_LDO(label, offset, mVolts, num, family) { \
+#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
+                family) { \
         .base = offset, \
         .id = num, \
         .min_mV = mVolts, \
+        .delay = turnon_delay, \
+        .remap = remap_conf, \
         .desc = { \
                 .name = #label, \
                 .id = family##_REG_##label, \
@@ -457,43 +494,41 @@ static struct regulator_ops twlfixed_ops = {
  * software control over them after boot.
  */
 static struct twlreg_info twl_regs[] = {
-        TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1),
-        TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2),
-        TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2),
-        TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3),
-        TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4),
-        TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5),
-        TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6),
-        /*
-        TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7),
-        */
-        TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8),
-        TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9),
-        TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10),
-        /*
-        TWL4030_ADJUSTABLE_LDO(VINTANA1, 0x3f, 11),
-        TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12),
-        TWL4030_ADJUSTABLE_LDO(VINTDIG, 0x47, 13),
-        TWL4030_SMPS(VIO, 0x4b, 14),
-        TWL4030_SMPS(VDD1, 0x55, 15),
-        TWL4030_SMPS(VDD2, 0x63, 16),
-         */
-        TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17),
-        TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18),
-        TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19),
+        TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08),
+        TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08),
+        TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08),
+        TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08),
+        TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08),
+        TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08),
+        TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08),
+        TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00),
+        TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08),
+        TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00),
+        TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08),
+        TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08),
+        TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08),
+        TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08),
+        TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08),
+        TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08),
+        TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08),
+        TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08),
+        TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08),
+        TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08),
         /* VUSBCP is managed *only* by the USB subchip */
 
         /* 6030 REG with base as PMC Slave Misc : 0x0030 */
-        TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1),
-        TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2),
-        TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3),
-        TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4),
-        TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5),
-        TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7),
-        TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15),
-        TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16),
-        TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17),
-        TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18)
+        /* Turnon-delay and remap configuration values for 6030 are not
+           verified since the specification is not public */
+        TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1, 0, 0x08),
+        TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2, 0, 0x08),
+        TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3, 0, 0x08),
+        TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4, 0, 0x08),
+        TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5, 0, 0x08),
+        TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7, 0, 0x08),
+        TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15, 0, 0x08),
+        TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16, 0, 0x08),
+        TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17, 0, 0x08),
+        TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18, 0, 0x08)
 };
 
 static int twlreg_probe(struct platform_device *pdev)
@@ -525,6 +560,19 @@ static int twlreg_probe(struct platform_device *pdev)
         c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
                                 | REGULATOR_CHANGE_MODE
                                 | REGULATOR_CHANGE_STATUS;
+        switch (pdev->id) {
+        case TWL4030_REG_VIO:
+        case TWL4030_REG_VDD1:
+        case TWL4030_REG_VDD2:
+        case TWL4030_REG_VPLL1:
+        case TWL4030_REG_VINTANA1:
+        case TWL4030_REG_VINTANA2:
+        case TWL4030_REG_VINTDIG:
+                c->always_on = true;
+                break;
+        default:
+                break;
+        }
 
         rdev = regulator_register(&info->desc, &pdev->dev, initdata, info);
         if (IS_ERR(rdev)) {
@@ -534,6 +582,9 @@ static int twlreg_probe(struct platform_device *pdev)
         }
         platform_set_drvdata(pdev, rdev);
 
+        twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
+                                                info->remap);
+
         /* NOTE:  many regulators support short-circuit IRQs (presentable
          * as REGULATOR_OVER_CURRENT notifications?) configured via:
          *  - SC_CONFIG
diff --git a/drivers/regulator/wm831x-dcdc.c b/drivers/regulator/wm831x-dcdc.c
index 2eefc1a0cf08..0a6577577e8d 100644
--- a/drivers/regulator/wm831x-dcdc.c
+++ b/drivers/regulator/wm831x-dcdc.c
@@ -19,6 +19,8 @@
 #include <linux/i2c.h>
 #include <linux/platform_device.h>
 #include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/gpio.h>
 
 #include <linux/mfd/wm831x/core.h>
 #include <linux/mfd/wm831x/regulator.h>
@@ -39,6 +41,7 @@
 #define WM831X_DCDC_CONTROL_2     1
 #define WM831X_DCDC_ON_CONFIG     2
 #define WM831X_DCDC_SLEEP_CONTROL 3
+#define WM831X_DCDC_DVS_CONTROL   4
 
 /*
  * Shared
@@ -50,6 +53,10 @@ struct wm831x_dcdc {
         int base;
         struct wm831x *wm831x;
         struct regulator_dev *regulator;
+        int dvs_gpio;
+        int dvs_gpio_state;
+        int on_vsel;
+        int dvs_vsel;
 };
 
 static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)
@@ -240,11 +247,9 @@ static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
         return -EINVAL;
 }
 
-static int wm831x_buckv_set_voltage_int(struct regulator_dev *rdev, int reg,
-                                         int min_uV, int max_uV)
+static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev,
+                                           int min_uV, int max_uV)
 {
-        struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
-        struct wm831x *wm831x = dcdc->wm831x;
         u16 vsel;
 
         if (min_uV < 600000)
@@ -257,39 +262,126 @@ static int wm831x_buckv_set_voltage_int(struct regulator_dev *rdev, int reg,
         if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
                 return -EINVAL;
 
-        return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_VSEL_MASK, vsel);
+        return vsel;
+}
+
+static int wm831x_buckv_select_max_voltage(struct regulator_dev *rdev,
+                                           int min_uV, int max_uV)
+{
+        u16 vsel;
+
+        if (max_uV < 600000 || max_uV > 1800000)
+                return -EINVAL;
+
+        vsel = ((max_uV - 600000) / 12500) + 8;
+
+        if (wm831x_buckv_list_voltage(rdev, vsel) < min_uV ||
+            wm831x_buckv_list_voltage(rdev, vsel) < max_uV)
+                return -EINVAL;
+
+        return vsel;
+}
+
+static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
+{
+        struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
+
+        if (state == dcdc->dvs_gpio_state)
+                return 0;
+
+        dcdc->dvs_gpio_state = state;
+        gpio_set_value(dcdc->dvs_gpio, state);
+
+        /* Should wait for DVS state change to be asserted if we have
+         * a GPIO for it, for now assume the device is configured
+         * for the fastest possible transition.
+         */
+
+        return 0;
 }
 
 static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
-                                     int min_uV, int max_uV)
+                                    int min_uV, int max_uV)
 {
         struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
-        u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
+        struct wm831x *wm831x = dcdc->wm831x;
+        int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
+        int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
+        int vsel, ret;
+
+        vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
+        if (vsel < 0)
+                return vsel;
+
+        /* If this value is already set then do a GPIO update if we can */
+        if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
+                return wm831x_buckv_set_dvs(rdev, 0);
+
+        if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
+                return wm831x_buckv_set_dvs(rdev, 1);
+
+        /* Always set the ON status to the minimum voltage */
+        ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
+        if (ret < 0)
+                return ret;
+        dcdc->on_vsel = vsel;
+
+        if (!dcdc->dvs_gpio)
+                return ret;
+
+        /* Kick the voltage transition now */
+        ret = wm831x_buckv_set_dvs(rdev, 0);
+        if (ret < 0)
+                return ret;
+
+        /* Set the high voltage as the DVS voltage.  This is optimised
+         * for CPUfreq usage, most processors will keep the maximum
+         * voltage constant and lower the minimum with the frequency. */
+        vsel = wm831x_buckv_select_max_voltage(rdev, min_uV, max_uV);
+        if (vsel < 0) {
+                /* This should never happen - at worst the same vsel
+                 * should be chosen */
+                WARN_ON(vsel < 0);
+                return 0;
+        }
+
+        /* Don't bother if it's the same VSEL we're already using */
+        if (vsel == dcdc->on_vsel)
+                return 0;
 
-        return wm831x_buckv_set_voltage_int(rdev, reg, min_uV, max_uV);
+        ret = wm831x_set_bits(wm831x, dvs_reg, WM831X_DC1_DVS_VSEL_MASK, vsel);
+        if (ret == 0)
+                dcdc->dvs_vsel = vsel;
+        else
+                dev_warn(wm831x->dev, "Failed to set DCDC DVS VSEL: %d\n",
+                         ret);
+
+        return 0;
 }
 
 static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
-                                             int uV)
+                                            int uV)
 {
         struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
+        struct wm831x *wm831x = dcdc->wm831x;
         u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
+        int vsel;
+
+        vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV);
+        if (vsel < 0)
+                return vsel;
 
-        return wm831x_buckv_set_voltage_int(rdev, reg, uV, uV);
+        return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
 }
 
 static int wm831x_buckv_get_voltage(struct regulator_dev *rdev)
 {
         struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
-        struct wm831x *wm831x = dcdc->wm831x;
-        u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
-        int val;
 
-        val = wm831x_reg_read(wm831x, reg);
-        if (val < 0)
-                return val;
-
-        return wm831x_buckv_list_voltage(rdev, val & WM831X_DC1_ON_VSEL_MASK);
+        if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
+                return wm831x_buckv_list_voltage(rdev, dcdc->dvs_vsel);
+        else
+                return wm831x_buckv_list_voltage(rdev, dcdc->on_vsel);
 }
 
 /* Current limit options */
@@ -346,6 +438,64 @@ static struct regulator_ops wm831x_buckv_ops = {
         .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
 };
 
+/*
+ * Set up DVS control.  We just log errors since we can still run
+ * (with reduced performance) if we fail.
+ */
+static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
+                                            struct wm831x_buckv_pdata *pdata)
+{
+        struct wm831x *wm831x = dcdc->wm831x;
+        int ret;
+        u16 ctrl;
+
+        if (!pdata || !pdata->dvs_gpio)
+                return;
+
+        switch (pdata->dvs_control_src) {
+        case 1:
+                ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
+                break;
+        case 2:
+                ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
+                break;
+        default:
+                dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
+                        pdata->dvs_control_src, dcdc->name);
+                return;
+        }
+
+        ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
+                              WM831X_DC1_DVS_SRC_MASK, ctrl);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
+                        dcdc->name, ret);
+                return;
+        }
+
+        ret = gpio_request(pdata->dvs_gpio, "DCDC DVS");
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
+                        dcdc->name, ret);
+                return;
+        }
+
+        /* gpiolib won't let us read the GPIO status so pick the higher
+         * of the two existing voltages so we take it as platform data.
+         */
+        dcdc->dvs_gpio_state = pdata->dvs_init_state;
+
+        ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n",
+                        dcdc->name, ret);
+                gpio_free(pdata->dvs_gpio);
+                return;
+        }
+
+        dcdc->dvs_gpio = pdata->dvs_gpio;
+}
+
 static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
 {
         struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
@@ -384,6 +534,23 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
         dcdc->desc.ops = &wm831x_buckv_ops;
         dcdc->desc.owner = THIS_MODULE;
 
+        ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
+                goto err;
+        }
+        dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
+
+        ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
+                goto err;
+        }
+        dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
+
+        if (pdata->dcdc[id])
+                wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
+
         dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
                                              pdata->dcdc[id], dcdc);
         if (IS_ERR(dcdc->regulator)) {
@@ -422,6 +589,8 @@ err_uv:
 err_regulator:
         regulator_unregister(dcdc->regulator);
 err:
+        if (dcdc->dvs_gpio)
+                gpio_free(dcdc->dvs_gpio);
         kfree(dcdc);
         return ret;
 }
@@ -434,6 +603,8 @@ static __devexit int wm831x_buckv_remove(struct platform_device *pdev)
         wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "HC"), dcdc);
         wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
         regulator_unregister(dcdc->regulator);
+        if (dcdc->dvs_gpio)
+                gpio_free(dcdc->dvs_gpio);
         kfree(dcdc);
 
         return 0;
diff --git a/drivers/regulator/wm831x-ldo.c b/drivers/regulator/wm831x-ldo.c
index 902db56ce099..61e02ac2fda3 100644
--- a/drivers/regulator/wm831x-ldo.c
+++ b/drivers/regulator/wm831x-ldo.c
@@ -470,7 +470,7 @@ static unsigned int wm831x_aldo_get_mode(struct regulator_dev *rdev)
         struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
         struct wm831x *wm831x = ldo->wm831x;
         int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
-        unsigned int ret;
+        int ret;
 
         ret = wm831x_reg_read(wm831x, on_reg);
         if (ret < 0)
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index eb154dc57164..c8c12325e69b 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -686,7 +686,8 @@ cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
          */
 #if     defined(CONFIG_ATARI)
         address_space = 64;
-#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) || defined(__sparc__)
+#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
+                        || defined(__sparc__) || defined(__mips__)
         address_space = 128;
 #else
 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
diff --git a/drivers/rtc/rtc-ds1305.c b/drivers/rtc/rtc-ds1305.c
index 259db7f3535b..9630e7d3314e 100644
--- a/drivers/rtc/rtc-ds1305.c
+++ b/drivers/rtc/rtc-ds1305.c
@@ -778,6 +778,8 @@ static int __devinit ds1305_probe(struct spi_device *spi)
                                         spi->irq, status);
                         goto fail1;
                 }
+
+                device_set_wakeup_capable(&spi->dev, 1);
         }
 
         /* export NVRAM */
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index 8a99da6f2f24..c4ec5c158aa1 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -881,6 +881,8 @@ read_rtc:
                                 "unable to request IRQ!\n");
                         goto exit_irq;
                 }
+
+                device_set_wakeup_capable(&client->dev, 1);
                 set_bit(HAS_ALARM, &ds1307->flags);
                 dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
         }
diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c
index 713f7bf5afb3..5317bbcbc7a0 100644
--- a/drivers/rtc/rtc-ds1374.c
+++ b/drivers/rtc/rtc-ds1374.c
@@ -383,6 +383,8 @@ static int ds1374_probe(struct i2c_client *client,
                         dev_err(&client->dev, "unable to request IRQ\n");
                         goto out_free;
                 }
+
+                device_set_wakeup_capable(&client->dev, 1);
         }
 
         ds1374->rtc = rtc_device_register(client->name, &client->dev,
diff --git a/drivers/s390/block/dasd_alias.c b/drivers/s390/block/dasd_alias.c
index fd1231738ef4..148b1dd24070 100644
--- a/drivers/s390/block/dasd_alias.c
+++ b/drivers/s390/block/dasd_alias.c
@@ -218,7 +218,7 @@ int dasd_alias_make_device_known_to_lcu(struct dasd_device *device)
                 spin_unlock_irqrestore(&aliastree.lock, flags);
                 newlcu = _allocate_lcu(uid);
                 if (IS_ERR(newlcu))
-                        return PTR_ERR(lcu);
+                        return PTR_ERR(newlcu);
                 spin_lock_irqsave(&aliastree.lock, flags);
                 lcu = _find_lcu(server, uid);
                 if (!lcu) {
diff --git a/drivers/s390/block/dasd_diag.c b/drivers/s390/block/dasd_diag.c
index f64d0db881b4..6e14863f5c70 100644
--- a/drivers/s390/block/dasd_diag.c
+++ b/drivers/s390/block/dasd_diag.c
@@ -8,7 +8,7 @@
  *
  */
 
-#define KMSG_COMPONENT "dasd-diag"
+#define KMSG_COMPONENT "dasd"
 
 #include <linux/stddef.h>
 #include <linux/kernel.h>
@@ -146,16 +146,16 @@ dasd_diag_erp(struct dasd_device *device)
         rc = mdsk_init_io(device, device->block->bp_block, 0, NULL);
         if (rc == 4) {
                 if (!(device->features & DASD_FEATURE_READONLY)) {
-                        dev_warn(&device->cdev->dev,
-                                 "The access mode of a DIAG device changed"
-                                 " to read-only");
+                        pr_warning("%s: The access mode of a DIAG device "
+                                   "changed to read-only\n",
+                                   dev_name(&device->cdev->dev));
                         device->features |= DASD_FEATURE_READONLY;
                 }
                 rc = 0;
         }
         if (rc)
-                dev_warn(&device->cdev->dev, "DIAG ERP failed with "
-                            "rc=%d\n", rc);
+                pr_warning("%s: DIAG ERP failed with "
+                            "rc=%d\n", dev_name(&device->cdev->dev), rc);
 }
 
 /* Start a given request at the device. Return zero on success, non-zero
@@ -371,8 +371,9 @@ dasd_diag_check_device(struct dasd_device *device)
                 private->pt_block = 2;
                 break;
         default:
-                dev_warn(&device->cdev->dev, "Device type %d is not supported "
-                            "in DIAG mode\n", private->rdc_data.vdev_class);
+                pr_warning("%s: Device type %d is not supported "
+                           "in DIAG mode\n", dev_name(&device->cdev->dev),
+                           private->rdc_data.vdev_class);
                 rc = -EOPNOTSUPP;
                 goto out;
         }
@@ -413,8 +414,8 @@ dasd_diag_check_device(struct dasd_device *device)
                 private->iob.flaga = DASD_DIAG_FLAGA_DEFAULT;
                 rc = dia250(&private->iob, RW_BIO);
                 if (rc == 3) {
-                        dev_warn(&device->cdev->dev,
-                                "A 64-bit DIAG call failed\n");
+                        pr_warning("%s: A 64-bit DIAG call failed\n",
+                                   dev_name(&device->cdev->dev));
                         rc = -EOPNOTSUPP;
                         goto out_label;
                 }
@@ -423,8 +424,9 @@ dasd_diag_check_device(struct dasd_device *device)
                         break;
         }
         if (bsize > PAGE_SIZE) {
-                dev_warn(&device->cdev->dev, "Accessing the DASD failed because"
-                         " of an incorrect format (rc=%d)\n", rc);
+                pr_warning("%s: Accessing the DASD failed because of an "
+                           "incorrect format (rc=%d)\n",
+                           dev_name(&device->cdev->dev), rc);
                 rc = -EIO;
                 goto out_label;
         }
@@ -442,18 +444,18 @@ dasd_diag_check_device(struct dasd_device *device)
                 block->s2b_shift++;
         rc = mdsk_init_io(device, block->bp_block, 0, NULL);
         if (rc && (rc != 4)) {
-                dev_warn(&device->cdev->dev, "DIAG initialization "
-                        "failed with rc=%d\n", rc);
+                pr_warning("%s: DIAG initialization failed with rc=%d\n",
+                           dev_name(&device->cdev->dev), rc);
                 rc = -EIO;
         } else {
                 if (rc == 4)
                         device->features |= DASD_FEATURE_READONLY;
-                dev_info(&device->cdev->dev,
-                         "New DASD with %ld byte/block, total size %ld KB%s\n",
-                         (unsigned long) block->bp_block,
-                         (unsigned long) (block->blocks <<
-                                          block->s2b_shift) >> 1,
-                         (rc == 4) ? ", read-only device" : "");
+                pr_info("%s: New DASD with %ld byte/block, total size %ld "
+                        "KB%s\n", dev_name(&device->cdev->dev),
+                        (unsigned long) block->bp_block,
+                        (unsigned long) (block->blocks <<
+                                         block->s2b_shift) >> 1,
+                        (rc == 4) ? ", read-only device" : "");
                 rc = 0;
         }
 out_label:
diff --git a/drivers/s390/char/fs3270.c b/drivers/s390/char/fs3270.c
index 28e4649fa9e4..247b2b934728 100644
--- a/drivers/s390/char/fs3270.c
+++ b/drivers/s390/char/fs3270.c
@@ -467,7 +467,7 @@ fs3270_open(struct inode *inode, struct file *filp)
         if (IS_ERR(ib)) {
                 raw3270_put_view(&fp->view);
                 raw3270_del_view(&fp->view);
-                rc = PTR_ERR(fp);
+                rc = PTR_ERR(ib);
                 goto out;
         }
         fp->rdbuf = ib;
diff --git a/drivers/s390/char/tape_34xx.c b/drivers/s390/char/tape_34xx.c
index 3657fe103c27..cb70fa1cf539 100644
--- a/drivers/s390/char/tape_34xx.c
+++ b/drivers/s390/char/tape_34xx.c
@@ -9,6 +9,7 @@
  */
 
 #define KMSG_COMPONENT "tape_34xx"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
 
 #include <linux/module.h>
 #include <linux/init.h>
diff --git a/drivers/s390/char/tape_3590.c b/drivers/s390/char/tape_3590.c
index 0c72aadb8391..9821c5886613 100644
--- a/drivers/s390/char/tape_3590.c
+++ b/drivers/s390/char/tape_3590.c
@@ -9,6 +9,7 @@
  */
 
 #define KMSG_COMPONENT "tape_3590"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
 
 #include <linux/module.h>
 #include <linux/init.h>
@@ -136,7 +137,7 @@ static void int_to_ext_kekl(struct tape3592_kekl *in,
                 out->type_on_tape = TAPE390_KEKL_TYPE_LABEL;
         memcpy(out->label, in->label, sizeof(in->label));
         EBCASC(out->label, sizeof(in->label));
-        strstrip(out->label);
+        strim(out->label);
 }
 
 static void int_to_ext_kekl_pair(struct tape3592_kekl_pair *in,
diff --git a/drivers/s390/char/tape_block.c b/drivers/s390/char/tape_block.c
index 4799cc2f73c3..96816149368a 100644
--- a/drivers/s390/char/tape_block.c
+++ b/drivers/s390/char/tape_block.c
@@ -11,6 +11,7 @@
  */
 
 #define KMSG_COMPONENT "tape"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
 
 #include <linux/fs.h>
 #include <linux/module.h>
diff --git a/drivers/s390/char/tape_char.c b/drivers/s390/char/tape_char.c
index 23d773a0d113..2125ec7d95f0 100644
--- a/drivers/s390/char/tape_char.c
+++ b/drivers/s390/char/tape_char.c
@@ -10,6 +10,9 @@
  *               Martin Schwidefsky <schwidefsky@de.ibm.com>
  */
 
+#define KMSG_COMPONENT "tape"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/module.h>
 #include <linux/types.h>
 #include <linux/proc_fs.h>
diff --git a/drivers/s390/char/tape_class.c b/drivers/s390/char/tape_class.c
index ddc914ccea8f..b2864e3edb6d 100644
--- a/drivers/s390/char/tape_class.c
+++ b/drivers/s390/char/tape_class.c
@@ -7,6 +7,10 @@
  * Author: Stefan Bader <shbader@de.ibm.com>
  * Based on simple class device code by Greg K-H
  */
+
+#define KMSG_COMPONENT "tape"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include "tape_class.h"
 
 MODULE_AUTHOR("Stefan Bader <shbader@de.ibm.com>");
diff --git a/drivers/s390/char/tape_core.c b/drivers/s390/char/tape_core.c
index f5d6802dc5da..81b094e480e6 100644
--- a/drivers/s390/char/tape_core.c
+++ b/drivers/s390/char/tape_core.c
@@ -12,6 +12,8 @@
  */
 
 #define KMSG_COMPONENT "tape"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/module.h>
 #include <linux/init.h>      // for kernel parameters
 #include <linux/kmod.h>      // for requesting modules
diff --git a/drivers/s390/char/tape_proc.c b/drivers/s390/char/tape_proc.c
index ebd820ccfb24..0ceb37984f77 100644
--- a/drivers/s390/char/tape_proc.c
+++ b/drivers/s390/char/tape_proc.c
@@ -11,6 +11,9 @@
  * PROCFS Functions
  */
 
+#define KMSG_COMPONENT "tape"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/module.h>
 #include <linux/vmalloc.h>
 #include <linux/seq_file.h>
diff --git a/drivers/s390/char/tape_std.c b/drivers/s390/char/tape_std.c
index 750354ad16e5..03f07e5dd6e9 100644
--- a/drivers/s390/char/tape_std.c
+++ b/drivers/s390/char/tape_std.c
@@ -11,6 +11,9 @@
  *               Stefan Bader <shbader@de.ibm.com>
  */
 
+#define KMSG_COMPONENT "tape"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
 #include <linux/stddef.h>
 #include <linux/kernel.h>
 #include <linux/bio.h>
diff --git a/drivers/s390/cio/ccwreq.c b/drivers/s390/cio/ccwreq.c
index 9509e3860934..7a28a3029a3f 100644
--- a/drivers/s390/cio/ccwreq.c
+++ b/drivers/s390/cio/ccwreq.c
@@ -49,7 +49,6 @@ static u16 ccwreq_next_path(struct ccw_device *cdev)
  */
 static void ccwreq_stop(struct ccw_device *cdev, int rc)
 {
-        struct subchannel *sch = to_subchannel(cdev->dev.parent);
         struct ccw_request *req = &cdev->private->req;
 
         if (req->done)
@@ -57,7 +56,6 @@ static void ccwreq_stop(struct ccw_device *cdev, int rc)
         req->done = 1;
         ccw_device_set_timeout(cdev, 0);
         memset(&cdev->private->irb, 0, sizeof(struct irb));
-        sch->lpm = sch->schib.pmcw.pam;
         if (rc && rc != -ENODEV && req->drc)
                 rc = req->drc;
         req->callback(cdev, req->data, rc);
@@ -80,7 +78,6 @@ static void ccwreq_do(struct ccw_device *cdev)
                         continue;
                 }
                 /* Perform start function. */
-                sch->lpm = 0xff;
                 memset(&cdev->private->irb, 0, sizeof(struct irb));
                 rc = cio_start(sch, cp, (u8) req->mask);
                 if (rc == 0) {
diff --git a/drivers/s390/cio/device.c b/drivers/s390/cio/device.c
index 73901c9e260f..a6c7d5426fb2 100644
--- a/drivers/s390/cio/device.c
+++ b/drivers/s390/cio/device.c
@@ -1519,6 +1519,7 @@ static int ccw_device_console_enable(struct ccw_device *cdev,
         sch->driver = &io_subchannel_driver;
         /* Initialize the ccw_device structure. */
         cdev->dev.parent= &sch->dev;
+        sch_set_cdev(sch, cdev);
         io_subchannel_recog(cdev, sch);
         /* Now wait for the async. recognition to come to an end. */
         spin_lock_irq(cdev->ccwlock);
diff --git a/drivers/s390/cio/device_pgid.c b/drivers/s390/cio/device_pgid.c
index aad188e43b4f..6facb5499a65 100644
--- a/drivers/s390/cio/device_pgid.c
+++ b/drivers/s390/cio/device_pgid.c
@@ -142,7 +142,7 @@ static void spid_do(struct ccw_device *cdev)
         u8 fn;
 
         /* Use next available path that is not already in correct state. */
-        req->lpm = lpm_adjust(req->lpm, sch->schib.pmcw.pam & ~sch->vpm);
+        req->lpm = lpm_adjust(req->lpm, cdev->private->pgid_todo_mask);
         if (!req->lpm)
                 goto out_nopath;
         /* Channel program setup. */
@@ -254,15 +254,15 @@ static void pgid_analyze(struct ccw_device *cdev, struct pgid **p,
         *p = first;
 }
 
-static u8 pgid_to_vpm(struct ccw_device *cdev)
+static u8 pgid_to_donepm(struct ccw_device *cdev)
 {
         struct subchannel *sch = to_subchannel(cdev->dev.parent);
         struct pgid *pgid;
         int i;
         int lpm;
-        u8 vpm = 0;
+        u8 donepm = 0;
 
-        /* Set VPM bits for paths which are already in the target state. */
+        /* Set bits for paths which are already in the target state. */
         for (i = 0; i < 8; i++) {
                 lpm = 0x80 >> i;
                 if ((cdev->private->pgid_valid_mask & lpm) == 0)
@@ -282,10 +282,10 @@ static u8 pgid_to_vpm(struct ccw_device *cdev)
                         if (pgid->inf.ps.state3 != SNID_STATE3_SINGLE_PATH)
                                 continue;
                 }
-                vpm |= lpm;
+                donepm |= lpm;
         }
 
-        return vpm;
+        return donepm;
 }
 
 static void pgid_fill(struct ccw_device *cdev, struct pgid *pgid)
@@ -307,6 +307,7 @@ static void snid_done(struct ccw_device *cdev, int rc)
         int mismatch = 0;
         int reserved = 0;
         int reset = 0;
+        u8 donepm;
 
         if (rc)
                 goto out;
@@ -316,18 +317,20 @@ static void snid_done(struct ccw_device *cdev, int rc)
         else if (mismatch)
                 rc = -EOPNOTSUPP;
         else {
-                sch->vpm = pgid_to_vpm(cdev);
+                donepm = pgid_to_donepm(cdev);
+                sch->vpm = donepm & sch->opm;
+                cdev->private->pgid_todo_mask &= ~donepm;
                 pgid_fill(cdev, pgid);
         }
 out:
         CIO_MSG_EVENT(2, "snid: device 0.%x.%04x: rc=%d pvm=%02x vpm=%02x "
-                      "mism=%d rsvd=%d reset=%d\n", id->ssid, id->devno, rc,
-                      cdev->private->pgid_valid_mask, sch->vpm, mismatch,
-                      reserved, reset);
+                      "todo=%02x mism=%d rsvd=%d reset=%d\n", id->ssid,
+                      id->devno, rc, cdev->private->pgid_valid_mask, sch->vpm,
+                      cdev->private->pgid_todo_mask, mismatch, reserved, reset);
         switch (rc) {
         case 0:
                 /* Anything left to do? */
-                if (sch->vpm == sch->schib.pmcw.pam) {
+                if (cdev->private->pgid_todo_mask == 0) {
                         verify_done(cdev, sch->vpm == 0 ? -EACCES : 0);
                         return;
                 }
@@ -411,6 +414,7 @@ static void verify_start(struct ccw_device *cdev)
         struct ccw_dev_id *devid = &cdev->private->dev_id;
 
         sch->vpm = 0;
+        sch->lpm = sch->schib.pmcw.pam;
         /* Initialize request data. */
         memset(req, 0, sizeof(*req));
         req->timeout    = PGID_TIMEOUT;
@@ -442,11 +446,14 @@ static void verify_start(struct ccw_device *cdev)
  */
 void ccw_device_verify_start(struct ccw_device *cdev)
 {
+        struct subchannel *sch = to_subchannel(cdev->dev.parent);
+
         CIO_TRACE_EVENT(4, "vrfy");
         CIO_HEX_EVENT(4, &cdev->private->dev_id, sizeof(cdev->private->dev_id));
         /* Initialize PGID data. */
         memset(cdev->private->pgid, 0, sizeof(cdev->private->pgid));
         cdev->private->pgid_valid_mask = 0;
+        cdev->private->pgid_todo_mask = sch->schib.pmcw.pam;
         /*
          * Initialize pathgroup and multipath state with target values.
          * They may change in the course of path verification.
diff --git a/drivers/s390/cio/fcx.c b/drivers/s390/cio/fcx.c
index 61677dfbdc9b..ca5e9bb9d458 100644
--- a/drivers/s390/cio/fcx.c
+++ b/drivers/s390/cio/fcx.c
@@ -163,7 +163,7 @@ void tcw_finalize(struct tcw *tcw, int num_tidaws)
         /* Add tcat to tccb. */
         tccb = tcw_get_tccb(tcw);
         tcat = (struct tccb_tcat *) &tccb->tca[tca_size(tccb)];
-        memset(tcat, 0, sizeof(tcat));
+        memset(tcat, 0, sizeof(*tcat));
         /* Calculate tcw input/output count and tcat transport count. */
         count = calc_dcw_count(tccb);
         if (tcw->w && (tcw->flags & TCW_FLAGS_OUTPUT_TIDA))
@@ -269,7 +269,7 @@ EXPORT_SYMBOL(tccb_init);
  */
 void tsb_init(struct tsb *tsb)
 {
-        memset(tsb, 0, sizeof(tsb));
+        memset(tsb, 0, sizeof(*tsb));
 }
 EXPORT_SYMBOL(tsb_init);
 
diff --git a/drivers/s390/cio/io_sch.h b/drivers/s390/cio/io_sch.h
index d72ae4c93af9..b9ce712a7f25 100644
--- a/drivers/s390/cio/io_sch.h
+++ b/drivers/s390/cio/io_sch.h
@@ -150,6 +150,7 @@ struct ccw_device_private {
         struct ccw_request req;         /* internal I/O request */
         int iretry;
         u8 pgid_valid_mask;             /* mask of valid PGIDs */
+        u8 pgid_todo_mask;              /* mask of PGIDs to be adjusted */
         struct {
                 unsigned int fast:1;    /* post with "channel end" */
                 unsigned int repall:1;  /* report every interrupt status */
diff --git a/drivers/s390/cio/qdio_main.c b/drivers/s390/cio/qdio_main.c
index 4be6e84b9599..b2275c5000e7 100644
--- a/drivers/s390/cio/qdio_main.c
+++ b/drivers/s390/cio/qdio_main.c
@@ -486,7 +486,8 @@ static int get_inbound_buffer_frontier(struct qdio_q *q)
         case SLSB_P_INPUT_PRIMED:
                 inbound_primed(q, count);
                 q->first_to_check = add_buf(q->first_to_check, count);
-                atomic_sub(count, &q->nr_buf_used);
+                if (atomic_sub(count, &q->nr_buf_used) == 0)
+                        qdio_perf_stat_inc(&perf_stats.inbound_queue_full);
                 break;
         case SLSB_P_INPUT_ERROR:
                 announce_buffer_error(q, count);
diff --git a/drivers/s390/cio/qdio_perf.c b/drivers/s390/cio/qdio_perf.c
index 968e3c7c2632..54f7c325a3e6 100644
--- a/drivers/s390/cio/qdio_perf.c
+++ b/drivers/s390/cio/qdio_perf.c
@@ -64,6 +64,8 @@ static int qdio_perf_proc_show(struct seq_file *m, void *v)
                    (long)atomic_long_read(&perf_stats.fast_requeue));
         seq_printf(m, "Number of outbound target full condition\t: %li\n",
                    (long)atomic_long_read(&perf_stats.outbound_target_full));
+        seq_printf(m, "Number of inbound queue full condition\t\t: %li\n",
+                   (long)atomic_long_read(&perf_stats.inbound_queue_full));
         seq_printf(m, "Number of outbound tasklet mod_timer calls\t: %li\n",
                    (long)atomic_long_read(&perf_stats.debug_tl_out_timer));
         seq_printf(m, "Number of stop polling calls\t\t\t: %li\n",
diff --git a/drivers/s390/cio/qdio_perf.h b/drivers/s390/cio/qdio_perf.h
index ff4504ce1e3c..12454231dc8b 100644
--- a/drivers/s390/cio/qdio_perf.h
+++ b/drivers/s390/cio/qdio_perf.h
@@ -36,6 +36,7 @@ struct qdio_perf_stats {
         atomic_long_t outbound_handler;
         atomic_long_t fast_requeue;
         atomic_long_t outbound_target_full;
+        atomic_long_t inbound_queue_full;
 
         /* for debugging */
         atomic_long_t debug_tl_out_timer;
diff --git a/drivers/s390/cio/qdio_setup.c b/drivers/s390/cio/qdio_setup.c
index 18d54fc21ce9..8c2dea5fa2b4 100644
--- a/drivers/s390/cio/qdio_setup.c
+++ b/drivers/s390/cio/qdio_setup.c
@@ -48,7 +48,6 @@ static void set_impl_params(struct qdio_irq *irq_ptr,
         if (!irq_ptr)
                 return;
 
-        WARN_ON((unsigned long)&irq_ptr->qib & 0xff);
         irq_ptr->qib.pfmt = qib_param_field_format;
         if (qib_param_field)
                 memcpy(irq_ptr->qib.parm, qib_param_field,
@@ -82,14 +81,12 @@ static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
                 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
                 if (!q)
                         return -ENOMEM;
-                WARN_ON((unsigned long)q & 0xff);
 
                 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
                 if (!q->slib) {
                         kmem_cache_free(qdio_q_cache, q);
                         return -ENOMEM;
                 }
-                WARN_ON((unsigned long)q->slib & 0x7ff);
                 irq_ptr_qs[i] = q;
         }
         return 0;
@@ -131,7 +128,7 @@ static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr,
         /* fill in sbal */
         for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) {
                 q->sbal[j] = *sbals_array++;
-                WARN_ON((unsigned long)q->sbal[j] & 0xff);
+                BUG_ON((unsigned long)q->sbal[j] & 0xff);
         }
 
         /* fill in slib */
@@ -147,11 +144,6 @@ static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr,
         /* fill in sl */
         for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
                 q->sl->element[j].sbal = (unsigned long)q->sbal[j];
-
-        DBF_EVENT("sl-slsb-sbal");
-        DBF_HEX(q->sl, sizeof(void *));
-        DBF_HEX(&q->slsb, sizeof(void *));
-        DBF_HEX(q->sbal, sizeof(void *));
 }
 
 static void setup_queues(struct qdio_irq *irq_ptr,
diff --git a/drivers/scsi/3w-9xxx.c b/drivers/scsi/3w-9xxx.c
index 3bf75924741f..84d3bbaa95e7 100644
--- a/drivers/scsi/3w-9xxx.c
+++ b/drivers/scsi/3w-9xxx.c
@@ -76,6 +76,7 @@
                  Fix bug in twa_get_param() on 4GB+.
                  Use pci_resource_len() for ioremap().
    2.26.02.012 - Add power management support.
+   2.26.02.013 - Fix bug in twa_load_sgl().
 */
 
 #include <linux/module.h>
@@ -100,7 +101,7 @@
 #include "3w-9xxx.h"
 
 /* Globals */
-#define TW_DRIVER_VERSION "2.26.02.012"
+#define TW_DRIVER_VERSION "2.26.02.013"
 static TW_Device_Extension *twa_device_extension_list[TW_MAX_SLOT];
 static unsigned int twa_device_extension_count;
 static int twa_major = -1;
@@ -1382,10 +1383,12 @@ static void twa_load_sgl(TW_Device_Extension *tw_dev, TW_Command_Full *full_comm
                 newcommand = &full_command_packet->command.newcommand;
                 newcommand->request_id__lunl =
                         cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->request_id__lunl), request_id));
-                newcommand->sg_list[0].address = TW_CPU_TO_SGL(dma_handle + sizeof(TW_Ioctl_Buf_Apache) - 1);
-                newcommand->sg_list[0].length = cpu_to_le32(length);
+                if (length) {
+                        newcommand->sg_list[0].address = TW_CPU_TO_SGL(dma_handle + sizeof(TW_Ioctl_Buf_Apache) - 1);
+                        newcommand->sg_list[0].length = cpu_to_le32(length);
+                }
                 newcommand->sgl_entries__lunh =
-                        cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->sgl_entries__lunh), 1));
+                        cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->sgl_entries__lunh), length ? 1 : 0));
         } else {
                 oldcommand = &full_command_packet->command.oldcommand;
                 oldcommand->request_id = request_id;
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index 36900c71a592..9191d1ea6451 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -388,6 +388,16 @@ config BLK_DEV_3W_XXXX_RAID
           Please read the comments at the top of
           <file:drivers/scsi/3w-xxxx.c>.
 
+config SCSI_HPSA
+        tristate "HP Smart Array SCSI driver"
+        depends on PCI && SCSI
+        help
+          This driver supports HP Smart Array Controllers (circa 2009).
+          It is a SCSI alternative to the cciss driver, which is a block
+          driver.  Anyone wishing to use HP Smart Array controllers who
+          would prefer the devices be presented to linux as SCSI devices,
+          rather than as generic block devices should say Y here.
+
 config SCSI_3W_9XXX
         tristate "3ware 9xxx SATA-RAID support"
         depends on PCI && SCSI
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile
index 280d3c657d60..92a8c500b23d 100644
--- a/drivers/scsi/Makefile
+++ b/drivers/scsi/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_SCSI_BFA_FC)	+= bfa/
 obj-$(CONFIG_SCSI_PAS16)        += pas16.o
 obj-$(CONFIG_SCSI_T128)         += t128.o
 obj-$(CONFIG_SCSI_DMX3191D)     += dmx3191d.o
+obj-$(CONFIG_SCSI_HPSA)         += hpsa.o
 obj-$(CONFIG_SCSI_DTC3280)      += dtc.o
 obj-$(CONFIG_SCSI_SYM53C8XX_2)  += sym53c8xx_2/
 obj-$(CONFIG_SCSI_ZALON)        += zalon7xx.o
diff --git a/drivers/scsi/be2iscsi/be_cmds.c b/drivers/scsi/be2iscsi/be_cmds.c
index 698a527d6cca..f008708f1b08 100644
--- a/drivers/scsi/be2iscsi/be_cmds.c
+++ b/drivers/scsi/be2iscsi/be_cmds.c
@@ -135,11 +135,15 @@ int beiscsi_process_mcc(struct beiscsi_hba *phba)
         while ((compl = be_mcc_compl_get(phba))) {
                 if (compl->flags & CQE_FLAGS_ASYNC_MASK) {
                         /* Interpret flags as an async trailer */
-                        BUG_ON(!is_link_state_evt(compl->flags));
+                        if (is_link_state_evt(compl->flags))
+                                /* Interpret compl as a async link evt */
+                                beiscsi_async_link_state_process(phba,
+                                   (struct be_async_event_link_state *) compl);
+                        else
+                                SE_DEBUG(DBG_LVL_1,
+                                         " Unsupported Async Event, flags"
+                                         " = 0x%08x \n", compl->flags);
 
-                        /* Interpret compl as a async link evt */
-                        beiscsi_async_link_state_process(phba,
-                                (struct be_async_event_link_state *) compl);
                 } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) {
                                 status = be_mcc_compl_process(ctrl, compl);
                                 atomic_dec(&phba->ctrl.mcc_obj.q.used);
diff --git a/drivers/scsi/bnx2i/bnx2i.h b/drivers/scsi/bnx2i/bnx2i.h
index 2b973f3c2eb2..6cf9dc37d78b 100644
--- a/drivers/scsi/bnx2i/bnx2i.h
+++ b/drivers/scsi/bnx2i/bnx2i.h
@@ -684,6 +684,7 @@ extern unsigned int error_mask1, error_mask2;
 extern u64 iscsi_error_mask;
 extern unsigned int en_tcp_dack;
 extern unsigned int event_coal_div;
+extern unsigned int event_coal_min;
 
 extern struct scsi_transport_template *bnx2i_scsi_xport_template;
 extern struct iscsi_transport bnx2i_iscsi_transport;
diff --git a/drivers/scsi/bnx2i/bnx2i_hwi.c b/drivers/scsi/bnx2i/bnx2i_hwi.c
index 5c8d7630c13e..1af578dec276 100644
--- a/drivers/scsi/bnx2i/bnx2i_hwi.c
+++ b/drivers/scsi/bnx2i/bnx2i_hwi.c
@@ -133,20 +133,38 @@ void bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action)
 {
         struct bnx2i_5771x_cq_db *cq_db;
         u16 cq_index;
+        u16 next_index;
+        u32 num_active_cmds;
 
+
+        /* Coalesce CQ entries only on 10G devices */
         if (!test_bit(BNX2I_NX2_DEV_57710, &ep->hba->cnic_dev_type))
                 return;
 
+        /* Do not update CQ DB multiple times before firmware writes
+         * '0xFFFF' to CQDB->SQN field. Deviation may cause spurious
+         * interrupts and other unwanted results
+         */
+        cq_db = (struct bnx2i_5771x_cq_db *) ep->qp.cq_pgtbl_virt;
+        if (cq_db->sqn[0] && cq_db->sqn[0] != 0xFFFF)
+                return;
+
         if (action == CNIC_ARM_CQE) {
-                cq_index = ep->qp.cqe_exp_seq_sn +
-                           ep->num_active_cmds / event_coal_div;
-                cq_index %= (ep->qp.cqe_size * 2 + 1);
-                if (!cq_index) {
+                num_active_cmds = ep->num_active_cmds;
+                if (num_active_cmds <= event_coal_min)
+                        next_index = 1;
+                else
+                        next_index = event_coal_min +
+                                (num_active_cmds - event_coal_min) / event_coal_div;
+                if (!next_index)
+                        next_index = 1;
+                cq_index = ep->qp.cqe_exp_seq_sn + next_index - 1;
+                if (cq_index > ep->qp.cqe_size * 2)
+                        cq_index -= ep->qp.cqe_size * 2;
+                if (!cq_index)
                         cq_index = 1;
-                        cq_db = (struct bnx2i_5771x_cq_db *)
-                                        ep->qp.cq_pgtbl_virt;
-                        cq_db->sqn[0] = cq_index;
-                }
+
+                cq_db->sqn[0] = cq_index;
         }
 }
 
@@ -366,6 +384,7 @@ int bnx2i_send_iscsi_tmf(struct bnx2i_conn *bnx2i_conn,
         struct bnx2i_cmd *bnx2i_cmd;
         struct bnx2i_tmf_request *tmfabort_wqe;
         u32 dword;
+        u32 scsi_lun[2];
 
         bnx2i_cmd = (struct bnx2i_cmd *)mtask->dd_data;
         tmfabort_hdr = (struct iscsi_tm *)mtask->hdr;
@@ -376,27 +395,35 @@ int bnx2i_send_iscsi_tmf(struct bnx2i_conn *bnx2i_conn,
         tmfabort_wqe->op_attr = 0;
         tmfabort_wqe->op_attr =
                 ISCSI_TMF_REQUEST_ALWAYS_ONE | ISCSI_TM_FUNC_ABORT_TASK;
-        tmfabort_wqe->lun[0] = be32_to_cpu(tmfabort_hdr->lun[0]);
-        tmfabort_wqe->lun[1] = be32_to_cpu(tmfabort_hdr->lun[1]);
 
         tmfabort_wqe->itt = (mtask->itt | (ISCSI_TASK_TYPE_MPATH << 14));
         tmfabort_wqe->reserved2 = 0;
         tmfabort_wqe->cmd_sn = be32_to_cpu(tmfabort_hdr->cmdsn);
 
         ctask = iscsi_itt_to_task(conn, tmfabort_hdr->rtt);
-        if (!ctask || ctask->sc)
+        if (!ctask || !ctask->sc)
                 /*
                  * the iscsi layer must have completed the cmd while this
                  * was starting up.
+                 *
+                 * Note: In the case of a SCSI cmd timeout, the task's sc
+                 *       is still active; hence ctask->sc != 0
+                 *       In this case, the task must be aborted
                  */
                 return 0;
+
         ref_sc = ctask->sc;
 
+        /* Retrieve LUN directly from the ref_sc */
+        int_to_scsilun(ref_sc->device->lun, (struct scsi_lun *) scsi_lun);
+        tmfabort_wqe->lun[0] = be32_to_cpu(scsi_lun[0]);
+        tmfabort_wqe->lun[1] = be32_to_cpu(scsi_lun[1]);
+
         if (ref_sc->sc_data_direction == DMA_TO_DEVICE)
                 dword = (ISCSI_TASK_TYPE_WRITE << ISCSI_CMD_REQUEST_TYPE_SHIFT);
         else
                 dword = (ISCSI_TASK_TYPE_READ << ISCSI_CMD_REQUEST_TYPE_SHIFT);
-        tmfabort_wqe->ref_itt = (dword | tmfabort_hdr->rtt);
+        tmfabort_wqe->ref_itt = (dword | (tmfabort_hdr->rtt & ISCSI_ITT_MASK));
         tmfabort_wqe->ref_cmd_sn = be32_to_cpu(tmfabort_hdr->refcmdsn);
 
         tmfabort_wqe->bd_list_addr_lo = (u32) bnx2i_conn->hba->mp_bd_dma;
diff --git a/drivers/scsi/bnx2i/bnx2i_init.c b/drivers/scsi/bnx2i/bnx2i_init.c
index 0c4210d48ee8..6d8172e781cf 100644
--- a/drivers/scsi/bnx2i/bnx2i_init.c
+++ b/drivers/scsi/bnx2i/bnx2i_init.c
@@ -17,8 +17,8 @@ static struct list_head adapter_list = LIST_HEAD_INIT(adapter_list);
 static u32 adapter_count;
 
 #define DRV_MODULE_NAME         "bnx2i"
-#define DRV_MODULE_VERSION      "2.0.1e"
-#define DRV_MODULE_RELDATE      "June 22, 2009"
+#define DRV_MODULE_VERSION      "2.1.0"
+#define DRV_MODULE_RELDATE      "Dec 06, 2009"
 
 static char version[] __devinitdata =
                 "Broadcom NetXtreme II iSCSI Driver " DRV_MODULE_NAME \
@@ -32,6 +32,10 @@ MODULE_VERSION(DRV_MODULE_VERSION);
 
 static DEFINE_MUTEX(bnx2i_dev_lock);
 
+unsigned int event_coal_min = 24;
+module_param(event_coal_min, int, 0664);
+MODULE_PARM_DESC(event_coal_min, "Event Coalescing Minimum Commands");
+
 unsigned int event_coal_div = 1;
 module_param(event_coal_div, int, 0664);
 MODULE_PARM_DESC(event_coal_div, "Event Coalescing Divide Factor");
@@ -83,8 +87,12 @@ void bnx2i_identify_device(struct bnx2i_hba *hba)
                 set_bit(BNX2I_NX2_DEV_5709, &hba->cnic_dev_type);
                 hba->mail_queue_access = BNX2I_MQ_BIN_MODE;
         } else if (hba->pci_did == PCI_DEVICE_ID_NX2_57710 ||
-                   hba->pci_did == PCI_DEVICE_ID_NX2_57711)
+                   hba->pci_did == PCI_DEVICE_ID_NX2_57711 ||
+                   hba->pci_did == PCI_DEVICE_ID_NX2_57711E)
                 set_bit(BNX2I_NX2_DEV_57710, &hba->cnic_dev_type);
+        else
+                printk(KERN_ALERT "bnx2i: unknown device, 0x%x\n",
+                                  hba->pci_did);
 }
 
 
@@ -363,7 +371,7 @@ static int __init bnx2i_mod_init(void)
 
         printk(KERN_INFO "%s", version);
 
-        if (!is_power_of_2(sq_size))
+        if (sq_size && !is_power_of_2(sq_size))
                 sq_size = roundup_pow_of_two(sq_size);
 
         mutex_init(&bnx2i_dev_lock);
diff --git a/drivers/scsi/bnx2i/bnx2i_iscsi.c b/drivers/scsi/bnx2i/bnx2i_iscsi.c
index 132898c88d5e..33b2294625bb 100644
--- a/drivers/scsi/bnx2i/bnx2i_iscsi.c
+++ b/drivers/scsi/bnx2i/bnx2i_iscsi.c
@@ -485,7 +485,6 @@ static int bnx2i_setup_cmd_pool(struct bnx2i_hba *hba,
                 struct iscsi_task *task = session->cmds[i];
                 struct bnx2i_cmd *cmd = task->dd_data;
 
-                /* Anil */
                 task->hdr = &cmd->hdr;
                 task->hdr_max = sizeof(struct iscsi_hdr);
 
@@ -765,7 +764,6 @@ struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic)
         hba->pci_svid = hba->pcidev->subsystem_vendor;
         hba->pci_func = PCI_FUNC(hba->pcidev->devfn);
         hba->pci_devno = PCI_SLOT(hba->pcidev->devfn);
-        bnx2i_identify_device(hba);
 
         bnx2i_identify_device(hba);
         bnx2i_setup_host_queue_size(hba, shost);
diff --git a/drivers/scsi/cxgb3i/cxgb3i_offload.c b/drivers/scsi/cxgb3i/cxgb3i_offload.c
index c1d5be4adf9c..26ffdcd5a437 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_offload.c
+++ b/drivers/scsi/cxgb3i/cxgb3i_offload.c
@@ -291,7 +291,7 @@ static void act_open_req_arp_failure(struct t3cdev *dev, struct sk_buff *skb)
         c3cn_hold(c3cn);
         spin_lock_bh(&c3cn->lock);
         if (c3cn->state == C3CN_STATE_CONNECTING)
-                fail_act_open(c3cn, EHOSTUNREACH);
+                fail_act_open(c3cn, -EHOSTUNREACH);
         spin_unlock_bh(&c3cn->lock);
         c3cn_put(c3cn);
         __kfree_skb(skb);
@@ -792,18 +792,18 @@ static int act_open_rpl_status_to_errno(int status)
 {
         switch (status) {
         case CPL_ERR_CONN_RESET:
-                return ECONNREFUSED;
+                return -ECONNREFUSED;
         case CPL_ERR_ARP_MISS:
-                return EHOSTUNREACH;
+                return -EHOSTUNREACH;
         case CPL_ERR_CONN_TIMEDOUT:
-                return ETIMEDOUT;
+                return -ETIMEDOUT;
         case CPL_ERR_TCAM_FULL:
-                return ENOMEM;
+                return -ENOMEM;
         case CPL_ERR_CONN_EXIST:
                 cxgb3i_log_error("ACTIVE_OPEN_RPL: 4-tuple in use\n");
-                return EADDRINUSE;
+                return -EADDRINUSE;
         default:
-                return EIO;
+                return -EIO;
         }
 }
 
@@ -817,7 +817,7 @@ static void act_open_retry_timer(unsigned long data)
         spin_lock_bh(&c3cn->lock);
         skb = alloc_skb(sizeof(struct cpl_act_open_req), GFP_ATOMIC);
         if (!skb)
-                fail_act_open(c3cn, ENOMEM);
+                fail_act_open(c3cn, -ENOMEM);
         else {
                 skb->sk = (struct sock *)c3cn;
                 set_arp_failure_handler(skb, act_open_req_arp_failure);
@@ -966,14 +966,14 @@ static int abort_status_to_errno(struct s3_conn *c3cn, int abort_reason,
         case CPL_ERR_BAD_SYN: /* fall through */
         case CPL_ERR_CONN_RESET:
                 return c3cn->state > C3CN_STATE_ESTABLISHED ?
-                        EPIPE : ECONNRESET;
+                        -EPIPE : -ECONNRESET;
         case CPL_ERR_XMIT_TIMEDOUT:
         case CPL_ERR_PERSIST_TIMEDOUT:
         case CPL_ERR_FINWAIT2_TIMEDOUT:
         case CPL_ERR_KEEPALIVE_TIMEDOUT:
-                return ETIMEDOUT;
+                return -ETIMEDOUT;
         default:
-                return EIO;
+                return -EIO;
         }
 }
 
@@ -1563,7 +1563,7 @@ free_tid:
         s3_free_atid(cdev, c3cn->tid);
         c3cn->tid = 0;
 out_err:
-        return -1;
+        return -EINVAL;
 }
 
 
diff --git a/drivers/scsi/cxgb3i/cxgb3i_pdu.c b/drivers/scsi/cxgb3i/cxgb3i_pdu.c
index 709105071177..1fe3b0f1f3c9 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_pdu.c
+++ b/drivers/scsi/cxgb3i/cxgb3i_pdu.c
@@ -388,8 +388,8 @@ int cxgb3i_conn_xmit_pdu(struct iscsi_task *task)
         if (err > 0) {
                 int pdulen = err;
 
-        cxgb3i_tx_debug("task 0x%p, skb 0x%p, len %u/%u, rv %d.\n",
-                        task, skb, skb->len, skb->data_len, err);
+                cxgb3i_tx_debug("task 0x%p, skb 0x%p, len %u/%u, rv %d.\n",
+                                task, skb, skb->len, skb->data_len, err);
 
                 if (task->conn->hdrdgst_en)
                         pdulen += ISCSI_DIGEST_SIZE;
diff --git a/drivers/scsi/device_handler/scsi_dh_rdac.c b/drivers/scsi/device_handler/scsi_dh_rdac.c
index 47cfe1c49c3e..1a660191a905 100644
--- a/drivers/scsi/device_handler/scsi_dh_rdac.c
+++ b/drivers/scsi/device_handler/scsi_dh_rdac.c
@@ -748,6 +748,8 @@ static const struct scsi_dh_devlist rdac_dev_list[] = {
         {"IBM", "1724"},
         {"IBM", "1726"},
         {"IBM", "1742"},
+        {"IBM", "1745"},
+        {"IBM", "1746"},
         {"IBM", "1814"},
         {"IBM", "1815"},
         {"IBM", "1818"},
diff --git a/drivers/scsi/fcoe/fcoe.c b/drivers/scsi/fcoe/fcoe.c
index a30ffaa1222c..10be9f36a4cc 100644
--- a/drivers/scsi/fcoe/fcoe.c
+++ b/drivers/scsi/fcoe/fcoe.c
@@ -101,6 +101,8 @@ static int fcoe_cpu_callback(struct notifier_block *, unsigned long, void *);
 
 static int fcoe_create(const char *, struct kernel_param *);
 static int fcoe_destroy(const char *, struct kernel_param *);
+static int fcoe_enable(const char *, struct kernel_param *);
+static int fcoe_disable(const char *, struct kernel_param *);
 
 static struct fc_seq *fcoe_elsct_send(struct fc_lport *,
                                       u32 did, struct fc_frame *,
@@ -115,10 +117,16 @@ static void fcoe_get_lesb(struct fc_lport *, struct fc_els_lesb *);
 
 module_param_call(create, fcoe_create, NULL, NULL, S_IWUSR);
 __MODULE_PARM_TYPE(create, "string");
-MODULE_PARM_DESC(create, "Create fcoe fcoe using net device passed in.");
+MODULE_PARM_DESC(create, " Creates fcoe instance on a ethernet interface");
 module_param_call(destroy, fcoe_destroy, NULL, NULL, S_IWUSR);
 __MODULE_PARM_TYPE(destroy, "string");
-MODULE_PARM_DESC(destroy, "Destroy fcoe fcoe");
+MODULE_PARM_DESC(destroy, " Destroys fcoe instance on a ethernet interface");
+module_param_call(enable, fcoe_enable, NULL, NULL, S_IWUSR);
+__MODULE_PARM_TYPE(enable, "string");
+MODULE_PARM_DESC(enable, " Enables fcoe on a ethernet interface.");
+module_param_call(disable, fcoe_disable, NULL, NULL, S_IWUSR);
+__MODULE_PARM_TYPE(disable, "string");
+MODULE_PARM_DESC(disable, " Disables fcoe on a ethernet interface.");
 
 /* notification function for packets from net device */
 static struct notifier_block fcoe_notifier = {
@@ -545,6 +553,23 @@ static void fcoe_queue_timer(ulong lport)
 }
 
 /**
+ * fcoe_get_wwn() - Get the world wide name from LLD if it supports it
+ * @netdev: the associated net device
+ * @wwn: the output WWN
+ * @type: the type of WWN (WWPN or WWNN)
+ *
+ * Returns: 0 for success
+ */
+static int fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type)
+{
+        const struct net_device_ops *ops = netdev->netdev_ops;
+
+        if (ops->ndo_fcoe_get_wwn)
+                return ops->ndo_fcoe_get_wwn(netdev, wwn, type);
+        return -EINVAL;
+}
+
+/**
  * fcoe_netdev_config() - Set up net devive for SW FCoE
  * @lport:  The local port that is associated with the net device
  * @netdev: The associated net device
@@ -611,9 +636,13 @@ static int fcoe_netdev_config(struct fc_lport *lport, struct net_device *netdev)
                  */
                 if (netdev->priv_flags & IFF_802_1Q_VLAN)
                         vid = vlan_dev_vlan_id(netdev);
-                wwnn = fcoe_wwn_from_mac(fcoe->ctlr.ctl_src_addr, 1, 0);
+
+                if (fcoe_get_wwn(netdev, &wwnn, NETDEV_FCOE_WWNN))
+                        wwnn = fcoe_wwn_from_mac(fcoe->ctlr.ctl_src_addr, 1, 0);
                 fc_set_wwnn(lport, wwnn);
-                wwpn = fcoe_wwn_from_mac(fcoe->ctlr.ctl_src_addr, 2, vid);
+                if (fcoe_get_wwn(netdev, &wwpn, NETDEV_FCOE_WWPN))
+                        wwpn = fcoe_wwn_from_mac(fcoe->ctlr.ctl_src_addr,
+                                                 2, vid);
                 fc_set_wwpn(lport, wwpn);
         }
 
@@ -1231,7 +1260,7 @@ int fcoe_rcv(struct sk_buff *skb, struct net_device *netdev,
                                 "CPU.\n");
 
                 spin_unlock_bh(&fps->fcoe_rx_list.lock);
-                cpu = first_cpu(cpu_online_map);
+                cpu = cpumask_first(cpu_online_mask);
                 fps = &per_cpu(fcoe_percpu, cpu);
                 spin_lock_bh(&fps->fcoe_rx_list.lock);
                 if (!fps->thread) {
@@ -1838,6 +1867,104 @@ static struct net_device *fcoe_if_to_netdev(const char *buffer)
 }
 
 /**
+ * fcoe_disable() - Disables a FCoE interface
+ * @buffer: The name of the Ethernet interface to be disabled
+ * @kp:     The associated kernel parameter
+ *
+ * Called from sysfs.
+ *
+ * Returns: 0 for success
+ */
+static int fcoe_disable(const char *buffer, struct kernel_param *kp)
+{
+        struct fcoe_interface *fcoe;
+        struct net_device *netdev;
+        int rc = 0;
+
+        mutex_lock(&fcoe_config_mutex);
+#ifdef CONFIG_FCOE_MODULE
+        /*
+         * Make sure the module has been initialized, and is not about to be
+         * removed.  Module paramter sysfs files are writable before the
+         * module_init function is called and after module_exit.
+         */
+        if (THIS_MODULE->state != MODULE_STATE_LIVE) {
+                rc = -ENODEV;
+                goto out_nodev;
+        }
+#endif
+
+        netdev = fcoe_if_to_netdev(buffer);
+        if (!netdev) {
+                rc = -ENODEV;
+                goto out_nodev;
+        }
+
+        rtnl_lock();
+        fcoe = fcoe_hostlist_lookup_port(netdev);
+        rtnl_unlock();
+
+        if (fcoe)
+                fc_fabric_logoff(fcoe->ctlr.lp);
+        else
+                rc = -ENODEV;
+
+        dev_put(netdev);
+out_nodev:
+        mutex_unlock(&fcoe_config_mutex);
+        return rc;
+}
+
+/**
+ * fcoe_enable() - Enables a FCoE interface
+ * @buffer: The name of the Ethernet interface to be enabled
+ * @kp:     The associated kernel parameter
+ *
+ * Called from sysfs.
+ *
+ * Returns: 0 for success
+ */
+static int fcoe_enable(const char *buffer, struct kernel_param *kp)
+{
+        struct fcoe_interface *fcoe;
+        struct net_device *netdev;
+        int rc = 0;
+
+        mutex_lock(&fcoe_config_mutex);
+#ifdef CONFIG_FCOE_MODULE
+        /*
+         * Make sure the module has been initialized, and is not about to be
+         * removed.  Module paramter sysfs files are writable before the
+         * module_init function is called and after module_exit.
+         */
+        if (THIS_MODULE->state != MODULE_STATE_LIVE) {
+                rc = -ENODEV;
+                goto out_nodev;
+        }
+#endif
+
+        netdev = fcoe_if_to_netdev(buffer);
+        if (!netdev) {
+                rc = -ENODEV;
+                goto out_nodev;
+        }
+
+        rtnl_lock();
+        fcoe = fcoe_hostlist_lookup_port(netdev);
+        rtnl_unlock();
+
+        if (fcoe)
+                rc = fc_fabric_login(fcoe->ctlr.lp);
+        else
+                rc = -ENODEV;
+
+        dev_put(netdev);
+out_nodev:
+        mutex_unlock(&fcoe_config_mutex);
+        return rc;
+}
+
+/**
  * fcoe_destroy() - Destroy a FCoE interface
  * @buffer: The name of the Ethernet interface to be destroyed
  * @kp:     The associated kernel parameter
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c
new file mode 100644
index 000000000000..bb96fdd58e23
--- /dev/null
+++ b/drivers/scsi/hpsa.c
@@ -0,0 +1,3531 @@
+/*
+ *    Disk Array driver for HP Smart Array SAS controllers
+ *    Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
+ *
+ *    This program is free software; you can redistribute it and/or modify
+ *    it under the terms of the GNU General Public License as published by
+ *    the Free Software Foundation; version 2 of the License.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ *    NON INFRINGEMENT.  See the GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/timer.h>
+#include <linux/seq_file.h>
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/smp_lock.h>
+#include <linux/compat.h>
+#include <linux/blktrace_api.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <linux/dma-mapping.h>
+#include <linux/completion.h>
+#include <linux/moduleparam.h>
+#include <scsi/scsi.h>
+#include <scsi/scsi_cmnd.h>
+#include <scsi/scsi_device.h>
+#include <scsi/scsi_host.h>
+#include <linux/cciss_ioctl.h>
+#include <linux/string.h>
+#include <linux/bitmap.h>
+#include <asm/atomic.h>
+#include <linux/kthread.h>
+#include "hpsa_cmd.h"
+#include "hpsa.h"
+
+/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
+#define HPSA_DRIVER_VERSION "1.0.0"
+#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
+
+/* How long to wait (in milliseconds) for board to go into simple mode */
+#define MAX_CONFIG_WAIT 30000
+#define MAX_IOCTL_CONFIG_WAIT 1000
+
+/*define how many times we will try a command because of bus resets */
+#define MAX_CMD_RETRIES 3
+
+/* Embedded module documentation macros - see modules.h */
+MODULE_AUTHOR("Hewlett-Packard Company");
+MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
+        HPSA_DRIVER_VERSION);
+MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
+MODULE_VERSION(HPSA_DRIVER_VERSION);
+MODULE_LICENSE("GPL");
+
+static int hpsa_allow_any;
+module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
+MODULE_PARM_DESC(hpsa_allow_any,
+                "Allow hpsa driver to access unknown HP Smart Array hardware");
+
+/* define the PCI info for the cards we can control */
+static const struct pci_device_id hpsa_pci_device_id[] = {
+        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3223},
+        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3234},
+        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x323D},
+        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
+        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
+        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
+        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
+        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
+        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324a},
+        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324b},
+        {PCI_VENDOR_ID_HP,     PCI_ANY_ID,             PCI_ANY_ID, PCI_ANY_ID,
+                PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
+        {0,}
+};
+
+MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
+
+/*  board_id = Subsystem Device ID & Vendor ID
+ *  product = Marketing Name for the board
+ *  access = Address of the struct of function pointers
+ */
+static struct board_type products[] = {
+        {0x3223103C, "Smart Array P800", &SA5_access},
+        {0x3234103C, "Smart Array P400", &SA5_access},
+        {0x323d103c, "Smart Array P700M", &SA5_access},
+        {0x3241103C, "Smart Array P212", &SA5_access},
+        {0x3243103C, "Smart Array P410", &SA5_access},
+        {0x3245103C, "Smart Array P410i", &SA5_access},
+        {0x3247103C, "Smart Array P411", &SA5_access},
+        {0x3249103C, "Smart Array P812", &SA5_access},
+        {0x324a103C, "Smart Array P712m", &SA5_access},
+        {0x324b103C, "Smart Array P711m", &SA5_access},
+        {0xFFFF103C, "Unknown Smart Array", &SA5_access},
+};
+
+static int number_of_controllers;
+
+static irqreturn_t do_hpsa_intr(int irq, void *dev_id);
+static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
+static void start_io(struct ctlr_info *h);
+
+#ifdef CONFIG_COMPAT
+static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
+#endif
+
+static void cmd_free(struct ctlr_info *h, struct CommandList *c);
+static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
+static struct CommandList *cmd_alloc(struct ctlr_info *h);
+static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
+static void fill_cmd(struct CommandList *c, __u8 cmd, struct ctlr_info *h,
+        void *buff, size_t size, __u8 page_code, unsigned char *scsi3addr,
+        int cmd_type);
+
+static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
+                void (*done)(struct scsi_cmnd *));
+
+static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
+static int hpsa_slave_alloc(struct scsi_device *sdev);
+static void hpsa_slave_destroy(struct scsi_device *sdev);
+
+static ssize_t raid_level_show(struct device *dev,
+        struct device_attribute *attr, char *buf);
+static ssize_t lunid_show(struct device *dev,
+        struct device_attribute *attr, char *buf);
+static ssize_t unique_id_show(struct device *dev,
+        struct device_attribute *attr, char *buf);
+static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
+static ssize_t host_store_rescan(struct device *dev,
+         struct device_attribute *attr, const char *buf, size_t count);
+static int check_for_unit_attention(struct ctlr_info *h,
+        struct CommandList *c);
+static void check_ioctl_unit_attention(struct ctlr_info *h,
+        struct CommandList *c);
+
+static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
+static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
+static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
+static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
+
+static struct device_attribute *hpsa_sdev_attrs[] = {
+        &dev_attr_raid_level,
+        &dev_attr_lunid,
+        &dev_attr_unique_id,
+        NULL,
+};
+
+static struct device_attribute *hpsa_shost_attrs[] = {
+        &dev_attr_rescan,
+        NULL,
+};
+
+static struct scsi_host_template hpsa_driver_template = {
+        .module                 = THIS_MODULE,
+        .name                   = "hpsa",
+        .proc_name              = "hpsa",
+        .queuecommand           = hpsa_scsi_queue_command,
+        .can_queue              = 512,
+        .this_id                = -1,
+        .sg_tablesize           = MAXSGENTRIES,
+        .cmd_per_lun            = 512,
+        .use_clustering         = ENABLE_CLUSTERING,
+        .eh_device_reset_handler = hpsa_eh_device_reset_handler,
+        .ioctl                  = hpsa_ioctl,
+        .slave_alloc            = hpsa_slave_alloc,
+        .slave_destroy          = hpsa_slave_destroy,
+#ifdef CONFIG_COMPAT
+        .compat_ioctl           = hpsa_compat_ioctl,
+#endif
+        .sdev_attrs = hpsa_sdev_attrs,
+        .shost_attrs = hpsa_shost_attrs,
+};
+
+static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
+{
+        unsigned long *priv = shost_priv(sdev->host);
+        return (struct ctlr_info *) *priv;
+}
+
+static struct task_struct *hpsa_scan_thread;
+static DEFINE_MUTEX(hpsa_scan_mutex);
+static LIST_HEAD(hpsa_scan_q);
+static int hpsa_scan_func(void *data);
+
+/**
+ * add_to_scan_list() - add controller to rescan queue
+ * @h:                Pointer to the controller.
+ *
+ * Adds the controller to the rescan queue if not already on the queue.
+ *
+ * returns 1 if added to the queue, 0 if skipped (could be on the
+ * queue already, or the controller could be initializing or shutting
+ * down).
+ **/
+static int add_to_scan_list(struct ctlr_info *h)
+{
+        struct ctlr_info *test_h;
+        int found = 0;
+        int ret = 0;
+
+        if (h->busy_initializing)
+                return 0;
+
+        /*
+         * If we don't get the lock, it means the driver is unloading
+         * and there's no point in scheduling a new scan.
+         */
+        if (!mutex_trylock(&h->busy_shutting_down))
+                return 0;
+
+        mutex_lock(&hpsa_scan_mutex);
+        list_for_each_entry(test_h, &hpsa_scan_q, scan_list) {
+                if (test_h == h) {
+                        found = 1;
+                        break;
+                }
+        }
+        if (!found && !h->busy_scanning) {
+                INIT_COMPLETION(h->scan_wait);
+                list_add_tail(&h->scan_list, &hpsa_scan_q);
+                ret = 1;
+        }
+        mutex_unlock(&hpsa_scan_mutex);
+        mutex_unlock(&h->busy_shutting_down);
+
+        return ret;
+}
+
+/**
+ * remove_from_scan_list() - remove controller from rescan queue
+ * @h:                     Pointer to the controller.
+ *
+ * Removes the controller from the rescan queue if present. Blocks if
+ * the controller is currently conducting a rescan.  The controller
+ * can be in one of three states:
+ * 1. Doesn't need a scan
+ * 2. On the scan list, but not scanning yet (we remove it)
+ * 3. Busy scanning (and not on the list). In this case we want to wait for
+ *    the scan to complete to make sure the scanning thread for this
+ *    controller is completely idle.
+ **/
+static void remove_from_scan_list(struct ctlr_info *h)
+{
+        struct ctlr_info *test_h, *tmp_h;
+
+        mutex_lock(&hpsa_scan_mutex);
+        list_for_each_entry_safe(test_h, tmp_h, &hpsa_scan_q, scan_list) {
+                if (test_h == h) { /* state 2. */
+                        list_del(&h->scan_list);
+                        complete_all(&h->scan_wait);
+                        mutex_unlock(&hpsa_scan_mutex);
+                        return;
+                }
+        }
+        if (h->busy_scanning) { /* state 3. */
+                mutex_unlock(&hpsa_scan_mutex);
+                wait_for_completion(&h->scan_wait);
+        } else { /* state 1, nothing to do. */
+                mutex_unlock(&hpsa_scan_mutex);
+        }
+}
+
+/* hpsa_scan_func() - kernel thread used to rescan controllers
+ * @data:        Ignored.
+ *
+ * A kernel thread used scan for drive topology changes on
+ * controllers. The thread processes only one controller at a time
+ * using a queue.  Controllers are added to the queue using
+ * add_to_scan_list() and removed from the queue either after done
+ * processing or using remove_from_scan_list().
+ *
+ * returns 0.
+ **/
+static int hpsa_scan_func(__attribute__((unused)) void *data)
+{
+        struct ctlr_info *h;
+        int host_no;
+
+        while (1) {
+                set_current_state(TASK_INTERRUPTIBLE);
+                schedule();
+                if (kthread_should_stop())
+                        break;
+
+                while (1) {
+                        mutex_lock(&hpsa_scan_mutex);
+                        if (list_empty(&hpsa_scan_q)) {
+                                mutex_unlock(&hpsa_scan_mutex);
+                                break;
+                        }
+                        h = list_entry(hpsa_scan_q.next, struct ctlr_info,
+                                        scan_list);
+                        list_del(&h->scan_list);
+                        h->busy_scanning = 1;
+                        mutex_unlock(&hpsa_scan_mutex);
+                        host_no = h->scsi_host ?  h->scsi_host->host_no : -1;
+                        hpsa_update_scsi_devices(h, host_no);
+                        complete_all(&h->scan_wait);
+                        mutex_lock(&hpsa_scan_mutex);
+                        h->busy_scanning = 0;
+                        mutex_unlock(&hpsa_scan_mutex);
+                }
+        }
+        return 0;
+}
+
+static int check_for_unit_attention(struct ctlr_info *h,
+        struct CommandList *c)
+{
+        if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
+                return 0;
+
+        switch (c->err_info->SenseInfo[12]) {
+        case STATE_CHANGED:
+                dev_warn(&h->pdev->dev, "hpsa%d: a state change "
+                        "detected, command retried\n", h->ctlr);
+                break;
+        case LUN_FAILED:
+                dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
+                        "detected, action required\n", h->ctlr);
+                break;
+        case REPORT_LUNS_CHANGED:
+                dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
+                        "changed\n", h->ctlr);
+        /*
+         * Here, we could call add_to_scan_list and wake up the scan thread,
+         * except that it's quite likely that we will get more than one
+         * REPORT_LUNS_CHANGED condition in quick succession, which means
+         * that those which occur after the first one will likely happen
+         * *during* the hpsa_scan_thread's rescan.  And the rescan code is not
+         * robust enough to restart in the middle, undoing what it has already
+         * done, and it's not clear that it's even possible to do this, since
+         * part of what it does is notify the SCSI mid layer, which starts
+         * doing it's own i/o to read partition tables and so on, and the
+         * driver doesn't have visibility to know what might need undoing.
+         * In any event, if possible, it is horribly complicated to get right
+         * so we just don't do it for now.
+         *
+         * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
+         */
+                break;
+        case POWER_OR_RESET:
+                dev_warn(&h->pdev->dev, "hpsa%d: a power on "
+                        "or device reset detected\n", h->ctlr);
+                break;
+        case UNIT_ATTENTION_CLEARED:
+                dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
+                    "cleared by another initiator\n", h->ctlr);
+                break;
+        default:
+                dev_warn(&h->pdev->dev, "hpsa%d: unknown "
+                        "unit attention detected\n", h->ctlr);
+                break;
+        }
+        return 1;
+}
+
+static ssize_t host_store_rescan(struct device *dev,
+                                 struct device_attribute *attr,
+                                 const char *buf, size_t count)
+{
+        struct ctlr_info *h;
+        struct Scsi_Host *shost = class_to_shost(dev);
+        unsigned long *priv = shost_priv(shost);
+        h = (struct ctlr_info *) *priv;
+        if (add_to_scan_list(h)) {
+                wake_up_process(hpsa_scan_thread);
+                wait_for_completion_interruptible(&h->scan_wait);
+        }
+        return count;
+}
+
+/* Enqueuing and dequeuing functions for cmdlists. */
+static inline void addQ(struct hlist_head *list, struct CommandList *c)
+{
+        hlist_add_head(&c->list, list);
+}
+
+static void enqueue_cmd_and_start_io(struct ctlr_info *h,
+        struct CommandList *c)
+{
+        unsigned long flags;
+        spin_lock_irqsave(&h->lock, flags);
+        addQ(&h->reqQ, c);
+        h->Qdepth++;
+        start_io(h);
+        spin_unlock_irqrestore(&h->lock, flags);
+}
+
+static inline void removeQ(struct CommandList *c)
+{
+        if (WARN_ON(hlist_unhashed(&c->list)))
+                return;
+        hlist_del_init(&c->list);
+}
+
+static inline int is_hba_lunid(unsigned char scsi3addr[])
+{
+        return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
+}
+
+static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
+{
+        return (scsi3addr[3] & 0xC0) == 0x40;
+}
+
+static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
+        "UNKNOWN"
+};
+#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
+
+static ssize_t raid_level_show(struct device *dev,
+             struct device_attribute *attr, char *buf)
+{
+        ssize_t l = 0;
+        int rlevel;
+        struct ctlr_info *h;
+        struct scsi_device *sdev;
+        struct hpsa_scsi_dev_t *hdev;
+        unsigned long flags;
+
+        sdev = to_scsi_device(dev);
+        h = sdev_to_hba(sdev);
+        spin_lock_irqsave(&h->lock, flags);
+        hdev = sdev->hostdata;
+        if (!hdev) {
+                spin_unlock_irqrestore(&h->lock, flags);
+                return -ENODEV;
+        }
+
+        /* Is this even a logical drive? */
+        if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
+                spin_unlock_irqrestore(&h->lock, flags);
+                l = snprintf(buf, PAGE_SIZE, "N/A\n");
+                return l;
+        }
+
+        rlevel = hdev->raid_level;
+        spin_unlock_irqrestore(&h->lock, flags);
+        if (rlevel < 0 || rlevel > RAID_UNKNOWN)
+                rlevel = RAID_UNKNOWN;
+        l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
+        return l;
+}
+
+static ssize_t lunid_show(struct device *dev,
+             struct device_attribute *attr, char *buf)
+{
+        struct ctlr_info *h;
+        struct scsi_device *sdev;
+        struct hpsa_scsi_dev_t *hdev;
+        unsigned long flags;
+        unsigned char lunid[8];
+
+        sdev = to_scsi_device(dev);
+        h = sdev_to_hba(sdev);
+        spin_lock_irqsave(&h->lock, flags);
+        hdev = sdev->hostdata;
+        if (!hdev) {
+                spin_unlock_irqrestore(&h->lock, flags);
+                return -ENODEV;
+        }
+        memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
+        spin_unlock_irqrestore(&h->lock, flags);
+        return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
+                lunid[0], lunid[1], lunid[2], lunid[3],
+                lunid[4], lunid[5], lunid[6], lunid[7]);
+}
+
+static ssize_t unique_id_show(struct device *dev,
+             struct device_attribute *attr, char *buf)
+{
+        struct ctlr_info *h;
+        struct scsi_device *sdev;
+        struct hpsa_scsi_dev_t *hdev;
+        unsigned long flags;
+        unsigned char sn[16];
+
+        sdev = to_scsi_device(dev);
+        h = sdev_to_hba(sdev);
+        spin_lock_irqsave(&h->lock, flags);
+        hdev = sdev->hostdata;
+        if (!hdev) {
+                spin_unlock_irqrestore(&h->lock, flags);
+                return -ENODEV;
+        }
+        memcpy(sn, hdev->device_id, sizeof(sn));
+        spin_unlock_irqrestore(&h->lock, flags);
+        return snprintf(buf, 16 * 2 + 2,
+                        "%02X%02X%02X%02X%02X%02X%02X%02X"
+                        "%02X%02X%02X%02X%02X%02X%02X%02X\n",
+                        sn[0], sn[1], sn[2], sn[3],
+                        sn[4], sn[5], sn[6], sn[7],
+                        sn[8], sn[9], sn[10], sn[11],
+                        sn[12], sn[13], sn[14], sn[15]);
+}
+
+static int hpsa_find_target_lun(struct ctlr_info *h,
+        unsigned char scsi3addr[], int bus, int *target, int *lun)
+{
+        /* finds an unused bus, target, lun for a new physical device
+         * assumes h->devlock is held
+         */
+        int i, found = 0;
+        DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
+
+        memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
+
+        for (i = 0; i < h->ndevices; i++) {
+                if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
+                        set_bit(h->dev[i]->target, lun_taken);
+        }
+
+        for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
+                if (!test_bit(i, lun_taken)) {
+                        /* *bus = 1; */
+                        *target = i;
+                        *lun = 0;
+                        found = 1;
+                        break;
+                }
+        }
+        return !found;
+}
+
+/* Add an entry into h->dev[] array. */
+static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
+                struct hpsa_scsi_dev_t *device,
+                struct hpsa_scsi_dev_t *added[], int *nadded)
+{
+        /* assumes h->devlock is held */
+        int n = h->ndevices;
+        int i;
+        unsigned char addr1[8], addr2[8];
+        struct hpsa_scsi_dev_t *sd;
+
+        if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
+                dev_err(&h->pdev->dev, "too many devices, some will be "
+                        "inaccessible.\n");
+                return -1;
+        }
+
+        /* physical devices do not have lun or target assigned until now. */
+        if (device->lun != -1)
+                /* Logical device, lun is already assigned. */
+                goto lun_assigned;
+
+        /* If this device a non-zero lun of a multi-lun device
+         * byte 4 of the 8-byte LUN addr will contain the logical
+         * unit no, zero otherise.
+         */
+        if (device->scsi3addr[4] == 0) {
+                /* This is not a non-zero lun of a multi-lun device */
+                if (hpsa_find_target_lun(h, device->scsi3addr,
+                        device->bus, &device->target, &device->lun) != 0)
+                        return -1;
+                goto lun_assigned;
+        }
+
+        /* This is a non-zero lun of a multi-lun device.
+         * Search through our list and find the device which
+         * has the same 8 byte LUN address, excepting byte 4.
+         * Assign the same bus and target for this new LUN.
+         * Use the logical unit number from the firmware.
+         */
+        memcpy(addr1, device->scsi3addr, 8);
+        addr1[4] = 0;
+        for (i = 0; i < n; i++) {
+                sd = h->dev[i];
+                memcpy(addr2, sd->scsi3addr, 8);
+                addr2[4] = 0;
+                /* differ only in byte 4? */
+                if (memcmp(addr1, addr2, 8) == 0) {
+                        device->bus = sd->bus;
+                        device->target = sd->target;
+                        device->lun = device->scsi3addr[4];
+                        break;
+                }
+        }
+        if (device->lun == -1) {
+                dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
+                        " suspect firmware bug or unsupported hardware "
+                        "configuration.\n");
+                        return -1;
+        }
+
+lun_assigned:
+
+        h->dev[n] = device;
+        h->ndevices++;
+        added[*nadded] = device;
+        (*nadded)++;
+
+        /* initially, (before registering with scsi layer) we don't
+         * know our hostno and we don't want to print anything first
+         * time anyway (the scsi layer's inquiries will show that info)
+         */
+        /* if (hostno != -1) */
+                dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
+                        scsi_device_type(device->devtype), hostno,
+                        device->bus, device->target, device->lun);
+        return 0;
+}
+
+/* Remove an entry from h->dev[] array. */
+static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
+        struct hpsa_scsi_dev_t *removed[], int *nremoved)
+{
+        /* assumes h->devlock is held */
+        int i;
+        struct hpsa_scsi_dev_t *sd;
+
+        if (entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA)
+                BUG();
+
+        sd = h->dev[entry];
+        removed[*nremoved] = h->dev[entry];
+        (*nremoved)++;
+
+        for (i = entry; i < h->ndevices-1; i++)
+                h->dev[i] = h->dev[i+1];
+        h->ndevices--;
+        dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
+                scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
+                sd->lun);
+}
+
+#define SCSI3ADDR_EQ(a, b) ( \
+        (a)[7] == (b)[7] && \
+        (a)[6] == (b)[6] && \
+        (a)[5] == (b)[5] && \
+        (a)[4] == (b)[4] && \
+        (a)[3] == (b)[3] && \
+        (a)[2] == (b)[2] && \
+        (a)[1] == (b)[1] && \
+        (a)[0] == (b)[0])
+
+static void fixup_botched_add(struct ctlr_info *h,
+        struct hpsa_scsi_dev_t *added)
+{
+        /* called when scsi_add_device fails in order to re-adjust
+         * h->dev[] to match the mid layer's view.
+         */
+        unsigned long flags;
+        int i, j;
+
+        spin_lock_irqsave(&h->lock, flags);
+        for (i = 0; i < h->ndevices; i++) {
+                if (h->dev[i] == added) {
+                        for (j = i; j < h->ndevices-1; j++)
+                                h->dev[j] = h->dev[j+1];
+                        h->ndevices--;
+                        break;
+                }
+        }
+        spin_unlock_irqrestore(&h->lock, flags);
+        kfree(added);
+}
+
+static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
+        struct hpsa_scsi_dev_t *dev2)
+{
+        if ((is_logical_dev_addr_mode(dev1->scsi3addr) ||
+                (dev1->lun != -1 && dev2->lun != -1)) &&
+                dev1->devtype != 0x0C)
+                return (memcmp(dev1, dev2, sizeof(*dev1)) == 0);
+
+        /* we compare everything except lun and target as these
+         * are not yet assigned.  Compare parts likely
+         * to differ first
+         */
+        if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
+                sizeof(dev1->scsi3addr)) != 0)
+                return 0;
+        if (memcmp(dev1->device_id, dev2->device_id,
+                sizeof(dev1->device_id)) != 0)
+                return 0;
+        if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
+                return 0;
+        if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
+                return 0;
+        if (memcmp(dev1->revision, dev2->revision, sizeof(dev1->revision)) != 0)
+                return 0;
+        if (dev1->devtype != dev2->devtype)
+                return 0;
+        if (dev1->raid_level != dev2->raid_level)
+                return 0;
+        if (dev1->bus != dev2->bus)
+                return 0;
+        return 1;
+}
+
+/* Find needle in haystack.  If exact match found, return DEVICE_SAME,
+ * and return needle location in *index.  If scsi3addr matches, but not
+ * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
+ * location in *index.  If needle not found, return DEVICE_NOT_FOUND.
+ */
+static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
+        struct hpsa_scsi_dev_t *haystack[], int haystack_size,
+        int *index)
+{
+        int i;
+#define DEVICE_NOT_FOUND 0
+#define DEVICE_CHANGED 1
+#define DEVICE_SAME 2
+        for (i = 0; i < haystack_size; i++) {
+                if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
+                        *index = i;
+                        if (device_is_the_same(needle, haystack[i]))
+                                return DEVICE_SAME;
+                        else
+                                return DEVICE_CHANGED;
+                }
+        }
+        *index = -1;
+        return DEVICE_NOT_FOUND;
+}
+
+static int adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
+        struct hpsa_scsi_dev_t *sd[], int nsds)
+{
+        /* sd contains scsi3 addresses and devtypes, and inquiry
+         * data.  This function takes what's in sd to be the current
+         * reality and updates h->dev[] to reflect that reality.
+         */
+        int i, entry, device_change, changes = 0;
+        struct hpsa_scsi_dev_t *csd;
+        unsigned long flags;
+        struct hpsa_scsi_dev_t **added, **removed;
+        int nadded, nremoved;
+        struct Scsi_Host *sh = NULL;
+
+        added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
+                GFP_KERNEL);
+        removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
+                GFP_KERNEL);
+
+        if (!added || !removed) {
+                dev_warn(&h->pdev->dev, "out of memory in "
+                        "adjust_hpsa_scsi_table\n");
+                goto free_and_out;
+        }
+
+        spin_lock_irqsave(&h->devlock, flags);
+
+        /* find any devices in h->dev[] that are not in
+         * sd[] and remove them from h->dev[], and for any
+         * devices which have changed, remove the old device
+         * info and add the new device info.
+         */
+        i = 0;
+        nremoved = 0;
+        nadded = 0;
+        while (i < h->ndevices) {
+                csd = h->dev[i];
+                device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
+                if (device_change == DEVICE_NOT_FOUND) {
+                        changes++;
+                        hpsa_scsi_remove_entry(h, hostno, i,
+                                removed, &nremoved);
+                        continue; /* remove ^^^, hence i not incremented */
+                } else if (device_change == DEVICE_CHANGED) {
+                        changes++;
+                        hpsa_scsi_remove_entry(h, hostno, i,
+                                removed, &nremoved);
+                        (void) hpsa_scsi_add_entry(h, hostno, sd[entry],
+                                added, &nadded);
+                        /* add can't fail, we just removed one. */
+                        sd[entry] = NULL; /* prevent it from being freed */
+                }
+                i++;
+        }
+
+        /* Now, make sure every device listed in sd[] is also
+         * listed in h->dev[], adding them if they aren't found
+         */
+
+        for (i = 0; i < nsds; i++) {
+                if (!sd[i]) /* if already added above. */
+                        continue;
+                device_change = hpsa_scsi_find_entry(sd[i], h->dev,
+                                        h->ndevices, &entry);
+                if (device_change == DEVICE_NOT_FOUND) {
+                        changes++;
+                        if (hpsa_scsi_add_entry(h, hostno, sd[i],
+                                added, &nadded) != 0)
+                                break;
+                        sd[i] = NULL; /* prevent from being freed later. */
+                } else if (device_change == DEVICE_CHANGED) {
+                        /* should never happen... */
+                        changes++;
+                        dev_warn(&h->pdev->dev,
+                                "device unexpectedly changed.\n");
+                        /* but if it does happen, we just ignore that device */
+                }
+        }
+        spin_unlock_irqrestore(&h->devlock, flags);
+
+        /* Don't notify scsi mid layer of any changes the first time through
+         * (or if there are no changes) scsi_scan_host will do it later the
+         * first time through.
+         */
+        if (hostno == -1 || !changes)
+                goto free_and_out;
+
+        sh = h->scsi_host;
+        /* Notify scsi mid layer of any removed devices */
+        for (i = 0; i < nremoved; i++) {
+                struct scsi_device *sdev =
+                        scsi_device_lookup(sh, removed[i]->bus,
+                                removed[i]->target, removed[i]->lun);
+                if (sdev != NULL) {
+                        scsi_remove_device(sdev);
+                        scsi_device_put(sdev);
+                } else {
+                        /* We don't expect to get here.
+                         * future cmds to this device will get selection
+                         * timeout as if the device was gone.
+                         */
+                        dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
+                                " for removal.", hostno, removed[i]->bus,
+                                removed[i]->target, removed[i]->lun);
+                }
+                kfree(removed[i]);
+                removed[i] = NULL;
+        }
+
+        /* Notify scsi mid layer of any added devices */
+        for (i = 0; i < nadded; i++) {
+                if (scsi_add_device(sh, added[i]->bus,
+                        added[i]->target, added[i]->lun) == 0)
+                        continue;
+                dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
+                        "device not added.\n", hostno, added[i]->bus,
+                        added[i]->target, added[i]->lun);
+                /* now we have to remove it from h->dev,
+                 * since it didn't get added to scsi mid layer
+                 */
+                fixup_botched_add(h, added[i]);
+        }
+
+free_and_out:
+        kfree(added);
+        kfree(removed);
+        return 0;
+}
+
+/*
+ * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
+ * Assume's h->devlock is held.
+ */
+static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
+        int bus, int target, int lun)
+{
+        int i;
+        struct hpsa_scsi_dev_t *sd;
+
+        for (i = 0; i < h->ndevices; i++) {
+                sd = h->dev[i];
+                if (sd->bus == bus && sd->target == target && sd->lun == lun)
+                        return sd;
+        }
+        return NULL;
+}
+
+/* link sdev->hostdata to our per-device structure. */
+static int hpsa_slave_alloc(struct scsi_device *sdev)
+{
+        struct hpsa_scsi_dev_t *sd;
+        unsigned long flags;
+        struct ctlr_info *h;
+
+        h = sdev_to_hba(sdev);
+        spin_lock_irqsave(&h->devlock, flags);
+        sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
+                sdev_id(sdev), sdev->lun);
+        if (sd != NULL)
+                sdev->hostdata = sd;
+        spin_unlock_irqrestore(&h->devlock, flags);
+        return 0;
+}
+
+static void hpsa_slave_destroy(struct scsi_device *sdev)
+{
+        return; /* nothing to do. */
+}
+
+static void hpsa_scsi_setup(struct ctlr_info *h)
+{
+        h->ndevices = 0;
+        h->scsi_host = NULL;
+        spin_lock_init(&h->devlock);
+        return;
+}
+
+static void complete_scsi_command(struct CommandList *cp,
+        int timeout, __u32 tag)
+{
+        struct scsi_cmnd *cmd;
+        struct ctlr_info *h;
+        struct ErrorInfo *ei;
+
+        unsigned char sense_key;
+        unsigned char asc;      /* additional sense code */
+        unsigned char ascq;     /* additional sense code qualifier */
+
+        ei = cp->err_info;
+        cmd = (struct scsi_cmnd *) cp->scsi_cmd;
+        h = cp->h;
+
+        scsi_dma_unmap(cmd); /* undo the DMA mappings */
+
+        cmd->result = (DID_OK << 16);           /* host byte */
+        cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
+        cmd->result |= (ei->ScsiStatus << 1);
+
+        /* copy the sense data whether we need to or not. */
+        memcpy(cmd->sense_buffer, ei->SenseInfo,
+                ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
+                        SCSI_SENSE_BUFFERSIZE :
+                        ei->SenseLen);
+        scsi_set_resid(cmd, ei->ResidualCnt);
+
+        if (ei->CommandStatus == 0) {
+                cmd->scsi_done(cmd);
+                cmd_free(h, cp);
+                return;
+        }
+
+        /* an error has occurred */
+        switch (ei->CommandStatus) {
+
+        case CMD_TARGET_STATUS:
+                if (ei->ScsiStatus) {
+                        /* Get sense key */
+                        sense_key = 0xf & ei->SenseInfo[2];
+                        /* Get additional sense code */
+                        asc = ei->SenseInfo[12];
+                        /* Get addition sense code qualifier */
+                        ascq = ei->SenseInfo[13];
+                }
+
+                if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
+                        if (check_for_unit_attention(h, cp)) {
+                                cmd->result = DID_SOFT_ERROR << 16;
+                                break;
+                        }
+                        if (sense_key == ILLEGAL_REQUEST) {
+                                /*
+                                 * SCSI REPORT_LUNS is commonly unsupported on
+                                 * Smart Array.  Suppress noisy complaint.
+                                 */
+                                if (cp->Request.CDB[0] == REPORT_LUNS)
+                                        break;
+
+                                /* If ASC/ASCQ indicate Logical Unit
+                                 * Not Supported condition,
+                                 */
+                                if ((asc == 0x25) && (ascq == 0x0)) {
+                                        dev_warn(&h->pdev->dev, "cp %p "
+                                                "has check condition\n", cp);
+                                        break;
+                                }
+                        }
+
+                        if (sense_key == NOT_READY) {
+                                /* If Sense is Not Ready, Logical Unit
+                                 * Not ready, Manual Intervention
+                                 * required
+                                 */
+                                if ((asc == 0x04) && (ascq == 0x03)) {
+                                        cmd->result = DID_NO_CONNECT << 16;
+                                        dev_warn(&h->pdev->dev, "cp %p "
+                                                "has check condition: unit "
+                                                "not ready, manual "
+                                                "intervention required\n", cp);
+                                        break;
+                                }
+                        }
+
+
+                        /* Must be some other type of check condition */
+                        dev_warn(&h->pdev->dev, "cp %p has check condition: "
+                                        "unknown type: "
+                                        "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
+                                        "Returning result: 0x%x, "
+                                        "cmd=[%02x %02x %02x %02x %02x "
+                                        "%02x %02x %02x %02x %02x]\n",
+                                        cp, sense_key, asc, ascq,
+                                        cmd->result,
+                                        cmd->cmnd[0], cmd->cmnd[1],
+                                        cmd->cmnd[2], cmd->cmnd[3],
+                                        cmd->cmnd[4], cmd->cmnd[5],
+                                        cmd->cmnd[6], cmd->cmnd[7],
+                                        cmd->cmnd[8], cmd->cmnd[9]);
+                        break;
+                }
+
+
+                /* Problem was not a check condition
+                 * Pass it up to the upper layers...
+                 */
+                if (ei->ScsiStatus) {
+                        dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
+                                "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
+                                "Returning result: 0x%x\n",
+                                cp, ei->ScsiStatus,
+                                sense_key, asc, ascq,
+                                cmd->result);
+                } else {  /* scsi status is zero??? How??? */
+                        dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
+                                "Returning no connection.\n", cp),
+
+                        /* Ordinarily, this case should never happen,
+                         * but there is a bug in some released firmware
+                         * revisions that allows it to happen if, for
+                         * example, a 4100 backplane loses power and
+                         * the tape drive is in it.  We assume that
+                         * it's a fatal error of some kind because we
+                         * can't show that it wasn't. We will make it
+                         * look like selection timeout since that is
+                         * the most common reason for this to occur,
+                         * and it's severe enough.
+                         */
+
+                        cmd->result = DID_NO_CONNECT << 16;
+                }
+                break;
+
+        case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
+                break;
+        case CMD_DATA_OVERRUN:
+                dev_warn(&h->pdev->dev, "cp %p has"
+                        " completed with data overrun "
+                        "reported\n", cp);
+                break;
+        case CMD_INVALID: {
+                /* print_bytes(cp, sizeof(*cp), 1, 0);
+                print_cmd(cp); */
+                /* We get CMD_INVALID if you address a non-existent device
+                 * instead of a selection timeout (no response).  You will
+                 * see this if you yank out a drive, then try to access it.
+                 * This is kind of a shame because it means that any other
+                 * CMD_INVALID (e.g. driver bug) will get interpreted as a
+                 * missing target. */
+                cmd->result = DID_NO_CONNECT << 16;
+        }
+                break;
+        case CMD_PROTOCOL_ERR:
+                dev_warn(&h->pdev->dev, "cp %p has "
+                        "protocol error \n", cp);
+                break;
+        case CMD_HARDWARE_ERR:
+                cmd->result = DID_ERROR << 16;
+                dev_warn(&h->pdev->dev, "cp %p had  hardware error\n", cp);
+                break;
+        case CMD_CONNECTION_LOST:
+                cmd->result = DID_ERROR << 16;
+                dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
+                break;
+        case CMD_ABORTED:
+                cmd->result = DID_ABORT << 16;
+                dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
+                                cp, ei->ScsiStatus);
+                break;
+        case CMD_ABORT_FAILED:
+                cmd->result = DID_ERROR << 16;
+                dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
+                break;
+        case CMD_UNSOLICITED_ABORT:
+                cmd->result = DID_ABORT << 16;
+                dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
+                        "abort\n", cp);
+                break;
+        case CMD_TIMEOUT:
+                cmd->result = DID_TIME_OUT << 16;
+                dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
+                break;
+        default:
+                cmd->result = DID_ERROR << 16;
+                dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
+                                cp, ei->CommandStatus);
+        }
+        cmd->scsi_done(cmd);
+        cmd_free(h, cp);
+}
+
+static int hpsa_scsi_detect(struct ctlr_info *h)
+{
+        struct Scsi_Host *sh;
+        int error;
+
+        sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
+        if (sh == NULL)
+                goto fail;
+
+        sh->io_port = 0;
+        sh->n_io_port = 0;
+        sh->this_id = -1;
+        sh->max_channel = 3;
+        sh->max_cmd_len = MAX_COMMAND_SIZE;
+        sh->max_lun = HPSA_MAX_LUN;
+        sh->max_id = HPSA_MAX_LUN;
+        h->scsi_host = sh;
+        sh->hostdata[0] = (unsigned long) h;
+        sh->irq = h->intr[SIMPLE_MODE_INT];
+        sh->unique_id = sh->irq;
+        error = scsi_add_host(sh, &h->pdev->dev);
+        if (error)
+                goto fail_host_put;
+        scsi_scan_host(sh);
+        return 0;
+
+ fail_host_put:
+        dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
+                " failed for controller %d\n", h->ctlr);
+        scsi_host_put(sh);
+        return -1;
+ fail:
+        dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
+                " failed for controller %d\n", h->ctlr);
+        return -1;
+}
+
+static void hpsa_pci_unmap(struct pci_dev *pdev,
+        struct CommandList *c, int sg_used, int data_direction)
+{
+        int i;
+        union u64bit addr64;
+
+        for (i = 0; i < sg_used; i++) {
+                addr64.val32.lower = c->SG[i].Addr.lower;
+                addr64.val32.upper = c->SG[i].Addr.upper;
+                pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
+                        data_direction);
+        }
+}
+
+static void hpsa_map_one(struct pci_dev *pdev,
+                struct CommandList *cp,
+                unsigned char *buf,
+                size_t buflen,
+                int data_direction)
+{
+        __u64 addr64;
+
+        if (buflen == 0 || data_direction == PCI_DMA_NONE) {
+                cp->Header.SGList = 0;
+                cp->Header.SGTotal = 0;
+                return;
+        }
+
+        addr64 = (__u64) pci_map_single(pdev, buf, buflen, data_direction);
+        cp->SG[0].Addr.lower =
+          (__u32) (addr64 & (__u64) 0x00000000FFFFFFFF);
+        cp->SG[0].Addr.upper =
+          (__u32) ((addr64 >> 32) & (__u64) 0x00000000FFFFFFFF);
+        cp->SG[0].Len = buflen;
+        cp->Header.SGList = (__u8) 1;   /* no. SGs contig in this cmd */
+        cp->Header.SGTotal = (__u16) 1; /* total sgs in this cmd list */
+}
+
+static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
+        struct CommandList *c)
+{
+        DECLARE_COMPLETION_ONSTACK(wait);
+
+        c->waiting = &wait;
+        enqueue_cmd_and_start_io(h, c);
+        wait_for_completion(&wait);
+}
+
+static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
+        struct CommandList *c, int data_direction)
+{
+        int retry_count = 0;
+
+        do {
+                memset(c->err_info, 0, sizeof(c->err_info));
+                hpsa_scsi_do_simple_cmd_core(h, c);
+                retry_count++;
+        } while (check_for_unit_attention(h, c) && retry_count <= 3);
+        hpsa_pci_unmap(h->pdev, c, 1, data_direction);
+}
+
+static void hpsa_scsi_interpret_error(struct CommandList *cp)
+{
+        struct ErrorInfo *ei;
+        struct device *d = &cp->h->pdev->dev;
+
+        ei = cp->err_info;
+        switch (ei->CommandStatus) {
+        case CMD_TARGET_STATUS:
+                dev_warn(d, "cmd %p has completed with errors\n", cp);
+                dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
+                                ei->ScsiStatus);
+                if (ei->ScsiStatus == 0)
+                        dev_warn(d, "SCSI status is abnormally zero.  "
+                        "(probably indicates selection timeout "
+                        "reported incorrectly due to a known "
+                        "firmware bug, circa July, 2001.)\n");
+                break;
+        case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
+                        dev_info(d, "UNDERRUN\n");
+                break;
+        case CMD_DATA_OVERRUN:
+                dev_warn(d, "cp %p has completed with data overrun\n", cp);
+                break;
+        case CMD_INVALID: {
+                /* controller unfortunately reports SCSI passthru's
+                 * to non-existent targets as invalid commands.
+                 */
+                dev_warn(d, "cp %p is reported invalid (probably means "
+                        "target device no longer present)\n", cp);
+                /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
+                print_cmd(cp);  */
+                }
+                break;
+        case CMD_PROTOCOL_ERR:
+                dev_warn(d, "cp %p has protocol error \n", cp);
+                break;
+        case CMD_HARDWARE_ERR:
+                /* cmd->result = DID_ERROR << 16; */
+                dev_warn(d, "cp %p had hardware error\n", cp);
+                break;
+        case CMD_CONNECTION_LOST:
+                dev_warn(d, "cp %p had connection lost\n", cp);
+                break;
+        case CMD_ABORTED:
+                dev_warn(d, "cp %p was aborted\n", cp);
+                break;
+        case CMD_ABORT_FAILED:
+                dev_warn(d, "cp %p reports abort failed\n", cp);
+                break;
+        case CMD_UNSOLICITED_ABORT:
+                dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
+                break;
+        case CMD_TIMEOUT:
+                dev_warn(d, "cp %p timed out\n", cp);
+                break;
+        default:
+                dev_warn(d, "cp %p returned unknown status %x\n", cp,
+                                ei->CommandStatus);
+        }
+}
+
+static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
+                        unsigned char page, unsigned char *buf,
+                        unsigned char bufsize)
+{
+        int rc = IO_OK;
+        struct CommandList *c;
+        struct ErrorInfo *ei;
+
+        c = cmd_special_alloc(h);
+
+        if (c == NULL) {                        /* trouble... */
+                dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
+                return -1;
+        }
+
+        fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
+        hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
+        ei = c->err_info;
+        if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
+                hpsa_scsi_interpret_error(c);
+                rc = -1;
+        }
+        cmd_special_free(h, c);
+        return rc;
+}
+
+static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
+{
+        int rc = IO_OK;
+        struct CommandList *c;
+        struct ErrorInfo *ei;
+
+        c = cmd_special_alloc(h);
+
+        if (c == NULL) {                        /* trouble... */
+                dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
+                return -1;
+        }
+
+        fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
+        hpsa_scsi_do_simple_cmd_core(h, c);
+        /* no unmap needed here because no data xfer. */
+
+        ei = c->err_info;
+        if (ei->CommandStatus != 0) {
+                hpsa_scsi_interpret_error(c);
+                rc = -1;
+        }
+        cmd_special_free(h, c);
+        return rc;
+}
+
+static void hpsa_get_raid_level(struct ctlr_info *h,
+        unsigned char *scsi3addr, unsigned char *raid_level)
+{
+        int rc;
+        unsigned char *buf;
+
+        *raid_level = RAID_UNKNOWN;
+        buf = kzalloc(64, GFP_KERNEL);
+        if (!buf)
+                return;
+        rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
+        if (rc == 0)
+                *raid_level = buf[8];
+        if (*raid_level > RAID_UNKNOWN)
+                *raid_level = RAID_UNKNOWN;
+        kfree(buf);
+        return;
+}
+
+/* Get the device id from inquiry page 0x83 */
+static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
+        unsigned char *device_id, int buflen)
+{
+        int rc;
+        unsigned char *buf;
+
+        if (buflen > 16)
+                buflen = 16;
+        buf = kzalloc(64, GFP_KERNEL);
+        if (!buf)
+                return -1;
+        rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
+        if (rc == 0)
+                memcpy(device_id, &buf[8], buflen);
+        kfree(buf);
+        return rc != 0;
+}
+
+static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
+                struct ReportLUNdata *buf, int bufsize,
+                int extended_response)
+{
+        int rc = IO_OK;
+        struct CommandList *c;
+        unsigned char scsi3addr[8];
+        struct ErrorInfo *ei;
+
+        c = cmd_special_alloc(h);
+        if (c == NULL) {                        /* trouble... */
+                dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
+                return -1;
+        }
+
+        memset(&scsi3addr[0], 0, 8); /* address the controller */
+
+        fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
+                buf, bufsize, 0, scsi3addr, TYPE_CMD);
+        if (extended_response)
+                c->Request.CDB[1] = extended_response;
+        hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
+        ei = c->err_info;
+        if (ei->CommandStatus != 0 &&
+            ei->CommandStatus != CMD_DATA_UNDERRUN) {
+                hpsa_scsi_interpret_error(c);
+                rc = -1;
+        }
+        cmd_special_free(h, c);
+        return rc;
+}
+
+static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
+                struct ReportLUNdata *buf,
+                int bufsize, int extended_response)
+{
+        return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
+}
+
+static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
+                struct ReportLUNdata *buf, int bufsize)
+{
+        return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
+}
+
+static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
+        int bus, int target, int lun)
+{
+        device->bus = bus;
+        device->target = target;
+        device->lun = lun;
+}
+
+static int hpsa_update_device_info(struct ctlr_info *h,
+        unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
+{
+#define OBDR_TAPE_INQ_SIZE 49
+        unsigned char *inq_buff = NULL;
+
+        inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
+        if (!inq_buff)
+                goto bail_out;
+
+        memset(inq_buff, 0, OBDR_TAPE_INQ_SIZE);
+        /* Do an inquiry to the device to see what it is. */
+        if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
+                (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
+                /* Inquiry failed (msg printed already) */
+                dev_err(&h->pdev->dev,
+                        "hpsa_update_device_info: inquiry failed\n");
+                goto bail_out;
+        }
+
+        /* As a side effect, record the firmware version number
+         * if we happen to be talking to the RAID controller.
+         */
+        if (is_hba_lunid(scsi3addr))
+                memcpy(h->firm_ver, &inq_buff[32], 4);
+
+        this_device->devtype = (inq_buff[0] & 0x1f);
+        memcpy(this_device->scsi3addr, scsi3addr, 8);
+        memcpy(this_device->vendor, &inq_buff[8],
+                sizeof(this_device->vendor));
+        memcpy(this_device->model, &inq_buff[16],
+                sizeof(this_device->model));
+        memcpy(this_device->revision, &inq_buff[32],
+                sizeof(this_device->revision));
+        memset(this_device->device_id, 0,
+                sizeof(this_device->device_id));
+        hpsa_get_device_id(h, scsi3addr, this_device->device_id,
+                sizeof(this_device->device_id));
+
+        if (this_device->devtype == TYPE_DISK &&
+                is_logical_dev_addr_mode(scsi3addr))
+                hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
+        else
+                this_device->raid_level = RAID_UNKNOWN;
+
+        kfree(inq_buff);
+        return 0;
+
+bail_out:
+        kfree(inq_buff);
+        return 1;
+}
+
+static unsigned char *msa2xxx_model[] = {
+        "MSA2012",
+        "MSA2024",
+        "MSA2312",
+        "MSA2324",
+        NULL,
+};
+
+static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
+{
+        int i;
+
+        for (i = 0; msa2xxx_model[i]; i++)
+                if (strncmp(device->model, msa2xxx_model[i],
+                        strlen(msa2xxx_model[i])) == 0)
+                        return 1;
+        return 0;
+}
+
+/* Helper function to assign bus, target, lun mapping of devices.
+ * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
+ * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
+ * Logical drive target and lun are assigned at this time, but
+ * physical device lun and target assignment are deferred (assigned
+ * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
+ */
+static void figure_bus_target_lun(struct ctlr_info *h,
+        __u8 *lunaddrbytes, int *bus, int *target, int *lun,
+        struct hpsa_scsi_dev_t *device)
+{
+
+        __u32 lunid;
+
+        if (is_logical_dev_addr_mode(lunaddrbytes)) {
+                /* logical device */
+                memcpy(&lunid, lunaddrbytes, sizeof(lunid));
+                lunid = le32_to_cpu(lunid);
+
+                if (is_msa2xxx(h, device)) {
+                        *bus = 1;
+                        *target = (lunid >> 16) & 0x3fff;
+                        *lun = lunid & 0x00ff;
+                } else {
+                        *bus = 0;
+                        *lun = 0;
+                        *target = lunid & 0x3fff;
+                }
+        } else {
+                /* physical device */
+                if (is_hba_lunid(lunaddrbytes))
+                        *bus = 3;
+                else
+                        *bus = 2;
+                *target = -1;
+                *lun = -1; /* we will fill these in later. */
+        }
+}
+
+/*
+ * If there is no lun 0 on a target, linux won't find any devices.
+ * For the MSA2xxx boxes, we have to manually detect the enclosure
+ * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
+ * it for some reason.  *tmpdevice is the target we're adding,
+ * this_device is a pointer into the current element of currentsd[]
+ * that we're building up in update_scsi_devices(), below.
+ * lunzerobits is a bitmap that tracks which targets already have a
+ * lun 0 assigned.
+ * Returns 1 if an enclosure was added, 0 if not.
+ */
+static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
+        struct hpsa_scsi_dev_t *tmpdevice,
+        struct hpsa_scsi_dev_t *this_device, __u8 *lunaddrbytes,
+        int bus, int target, int lun, unsigned long lunzerobits[],
+        int *nmsa2xxx_enclosures)
+{
+        unsigned char scsi3addr[8];
+
+        if (test_bit(target, lunzerobits))
+                return 0; /* There is already a lun 0 on this target. */
+
+        if (!is_logical_dev_addr_mode(lunaddrbytes))
+                return 0; /* It's the logical targets that may lack lun 0. */
+
+        if (!is_msa2xxx(h, tmpdevice))
+                return 0; /* It's only the MSA2xxx that have this problem. */
+
+        if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
+                return 0;
+
+        if (is_hba_lunid(scsi3addr))
+                return 0; /* Don't add the RAID controller here. */
+
+#define MAX_MSA2XXX_ENCLOSURES 32
+        if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
+                dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
+                        "enclosures exceeded.  Check your hardware "
+                        "configuration.");
+                return 0;
+        }
+
+        memset(scsi3addr, 0, 8);
+        scsi3addr[3] = target;
+        if (hpsa_update_device_info(h, scsi3addr, this_device))
+                return 0;
+        (*nmsa2xxx_enclosures)++;
+        hpsa_set_bus_target_lun(this_device, bus, target, 0);
+        set_bit(target, lunzerobits);
+        return 1;
+}
+
+/*
+ * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
+ * logdev.  The number of luns in physdev and logdev are returned in
+ * *nphysicals and *nlogicals, respectively.
+ * Returns 0 on success, -1 otherwise.
+ */
+static int hpsa_gather_lun_info(struct ctlr_info *h,
+        int reportlunsize,
+        struct ReportLUNdata *physdev, __u32 *nphysicals,
+        struct ReportLUNdata *logdev, __u32 *nlogicals)
+{
+        if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
+                dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
+                return -1;
+        }
+        memcpy(nphysicals, &physdev->LUNListLength[0], sizeof(*nphysicals));
+        *nphysicals = be32_to_cpu(*nphysicals) / 8;
+#ifdef DEBUG
+        dev_info(&h->pdev->dev, "number of physical luns is %d\n", *nphysicals);
+#endif
+        if (*nphysicals > HPSA_MAX_PHYS_LUN) {
+                dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
+                        "  %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
+                        *nphysicals - HPSA_MAX_PHYS_LUN);
+                *nphysicals = HPSA_MAX_PHYS_LUN;
+        }
+        if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
+                dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
+                return -1;
+        }
+        memcpy(nlogicals, &logdev->LUNListLength[0], sizeof(*nlogicals));
+        *nlogicals = be32_to_cpu(*nlogicals) / 8;
+#ifdef DEBUG
+        dev_info(&h->pdev->dev, "number of logical luns is %d\n", *nlogicals);
+#endif
+        /* Reject Logicals in excess of our max capability. */
+        if (*nlogicals > HPSA_MAX_LUN) {
+                dev_warn(&h->pdev->dev,
+                        "maximum logical LUNs (%d) exceeded.  "
+                        "%d LUNs ignored.\n", HPSA_MAX_LUN,
+                        *nlogicals - HPSA_MAX_LUN);
+                        *nlogicals = HPSA_MAX_LUN;
+        }
+        if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
+                dev_warn(&h->pdev->dev,
+                        "maximum logical + physical LUNs (%d) exceeded. "
+                        "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
+                        *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
+                *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
+        }
+        return 0;
+}
+
+static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
+{
+        /* the idea here is we could get notified
+         * that some devices have changed, so we do a report
+         * physical luns and report logical luns cmd, and adjust
+         * our list of devices accordingly.
+         *
+         * The scsi3addr's of devices won't change so long as the
+         * adapter is not reset.  That means we can rescan and
+         * tell which devices we already know about, vs. new
+         * devices, vs.  disappearing devices.
+         */
+        struct ReportLUNdata *physdev_list = NULL;
+        struct ReportLUNdata *logdev_list = NULL;
+        unsigned char *inq_buff = NULL;
+        __u32 nphysicals = 0;
+        __u32 nlogicals = 0;
+        __u32 ndev_allocated = 0;
+        struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
+        int ncurrent = 0;
+        int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
+        int i, nmsa2xxx_enclosures, ndevs_to_allocate;
+        int bus, target, lun;
+        DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
+
+        currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
+                GFP_KERNEL);
+        physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
+        logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
+        inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
+        tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
+
+        if (!currentsd || !physdev_list || !logdev_list ||
+                !inq_buff || !tmpdevice) {
+                dev_err(&h->pdev->dev, "out of memory\n");
+                goto out;
+        }
+        memset(lunzerobits, 0, sizeof(lunzerobits));
+
+        if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
+                        logdev_list, &nlogicals))
+                goto out;
+
+        /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
+         * but each of them 4 times through different paths.  The plus 1
+         * is for the RAID controller.
+         */
+        ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
+
+        /* Allocate the per device structures */
+        for (i = 0; i < ndevs_to_allocate; i++) {
+                currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
+                if (!currentsd[i]) {
+                        dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
+                                __FILE__, __LINE__);
+                        goto out;
+                }
+                ndev_allocated++;
+        }
+
+        /* adjust our table of devices */
+        nmsa2xxx_enclosures = 0;
+        for (i = 0; i < nphysicals + nlogicals + 1; i++) {
+                __u8 *lunaddrbytes;
+
+                /* Figure out where the LUN ID info is coming from */
+                if (i < nphysicals)
+                        lunaddrbytes = &physdev_list->LUN[i][0];
+                else
+                        if (i < nphysicals + nlogicals)
+                                lunaddrbytes =
+                                        &logdev_list->LUN[i-nphysicals][0];
+                        else /* jam in the RAID controller at the end */
+                                lunaddrbytes = RAID_CTLR_LUNID;
+
+                /* skip masked physical devices. */
+                if (lunaddrbytes[3] & 0xC0 && i < nphysicals)
+                        continue;
+
+                /* Get device type, vendor, model, device id */
+                if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
+                        continue; /* skip it if we can't talk to it. */
+                figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
+                        tmpdevice);
+                this_device = currentsd[ncurrent];
+
+                /*
+                 * For the msa2xxx boxes, we have to insert a LUN 0 which
+                 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
+                 * is nonetheless an enclosure device there.  We have to
+                 * present that otherwise linux won't find anything if
+                 * there is no lun 0.
+                 */
+                if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
+                                lunaddrbytes, bus, target, lun, lunzerobits,
+                                &nmsa2xxx_enclosures)) {
+                        ncurrent++;
+                        this_device = currentsd[ncurrent];
+                }
+
+                *this_device = *tmpdevice;
+                hpsa_set_bus_target_lun(this_device, bus, target, lun);
+
+                switch (this_device->devtype) {
+                case TYPE_ROM: {
+                        /* We don't *really* support actual CD-ROM devices,
+                         * just "One Button Disaster Recovery" tape drive
+                         * which temporarily pretends to be a CD-ROM drive.
+                         * So we check that the device is really an OBDR tape
+                         * device by checking for "$DR-10" in bytes 43-48 of
+                         * the inquiry data.
+                         */
+                                char obdr_sig[7];
+#define OBDR_TAPE_SIG "$DR-10"
+                                strncpy(obdr_sig, &inq_buff[43], 6);
+                                obdr_sig[6] = '\0';
+                                if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
+                                        /* Not OBDR device, ignore it. */
+                                        break;
+                        }
+                        ncurrent++;
+                        break;
+                case TYPE_DISK:
+                        if (i < nphysicals)
+                                break;
+                        ncurrent++;
+                        break;
+                case TYPE_TAPE:
+                case TYPE_MEDIUM_CHANGER:
+                        ncurrent++;
+                        break;
+                case TYPE_RAID:
+                        /* Only present the Smartarray HBA as a RAID controller.
+                         * If it's a RAID controller other than the HBA itself
+                         * (an external RAID controller, MSA500 or similar)
+                         * don't present it.
+                         */
+                        if (!is_hba_lunid(lunaddrbytes))
+                                break;
+                        ncurrent++;
+                        break;
+                default:
+                        break;
+                }
+                if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
+                        break;
+        }
+        adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
+out:
+        kfree(tmpdevice);
+        for (i = 0; i < ndev_allocated; i++)
+                kfree(currentsd[i]);
+        kfree(currentsd);
+        kfree(inq_buff);
+        kfree(physdev_list);
+        kfree(logdev_list);
+        return;
+}
+
+/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
+ * dma mapping  and fills in the scatter gather entries of the
+ * hpsa command, cp.
+ */
+static int hpsa_scatter_gather(struct pci_dev *pdev,
+                struct CommandList *cp,
+                struct scsi_cmnd *cmd)
+{
+        unsigned int len;
+        struct scatterlist *sg;
+        __u64 addr64;
+        int use_sg, i;
+
+        BUG_ON(scsi_sg_count(cmd) > MAXSGENTRIES);
+
+        use_sg = scsi_dma_map(cmd);
+        if (use_sg < 0)
+                return use_sg;
+
+        if (!use_sg)
+                goto sglist_finished;
+
+        scsi_for_each_sg(cmd, sg, use_sg, i) {
+                addr64 = (__u64) sg_dma_address(sg);
+                len  = sg_dma_len(sg);
+                cp->SG[i].Addr.lower =
+                        (__u32) (addr64 & (__u64) 0x00000000FFFFFFFF);
+                cp->SG[i].Addr.upper =
+                        (__u32) ((addr64 >> 32) & (__u64) 0x00000000FFFFFFFF);
+                cp->SG[i].Len = len;
+                cp->SG[i].Ext = 0;  /* we are not chaining */
+        }
+
+sglist_finished:
+
+        cp->Header.SGList = (__u8) use_sg;   /* no. SGs contig in this cmd */
+        cp->Header.SGTotal = (__u16) use_sg; /* total sgs in this cmd list */
+        return 0;
+}
+
+
+static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
+        void (*done)(struct scsi_cmnd *))
+{
+        struct ctlr_info *h;
+        struct hpsa_scsi_dev_t *dev;
+        unsigned char scsi3addr[8];
+        struct CommandList *c;
+        unsigned long flags;
+
+        /* Get the ptr to our adapter structure out of cmd->host. */
+        h = sdev_to_hba(cmd->device);
+        dev = cmd->device->hostdata;
+        if (!dev) {
+                cmd->result = DID_NO_CONNECT << 16;
+                done(cmd);
+                return 0;
+        }
+        memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
+
+        /* Need a lock as this is being allocated from the pool */
+        spin_lock_irqsave(&h->lock, flags);
+        c = cmd_alloc(h);
+        spin_unlock_irqrestore(&h->lock, flags);
+        if (c == NULL) {                        /* trouble... */
+                dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
+                return SCSI_MLQUEUE_HOST_BUSY;
+        }
+
+        /* Fill in the command list header */
+
+        cmd->scsi_done = done;    /* save this for use by completion code */
+
+        /* save c in case we have to abort it  */
+        cmd->host_scribble = (unsigned char *) c;
+
+        c->cmd_type = CMD_SCSI;
+        c->scsi_cmd = cmd;
+        c->Header.ReplyQueue = 0;  /* unused in simple mode */
+        memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
+        c->Header.Tag.lower = c->busaddr;  /* Use k. address of cmd as tag */
+
+        /* Fill in the request block... */
+
+        c->Request.Timeout = 0;
+        memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
+        BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
+        c->Request.CDBLen = cmd->cmd_len;
+        memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
+        c->Request.Type.Type = TYPE_CMD;
+        c->Request.Type.Attribute = ATTR_SIMPLE;
+        switch (cmd->sc_data_direction) {
+        case DMA_TO_DEVICE:
+                c->Request.Type.Direction = XFER_WRITE;
+                break;
+        case DMA_FROM_DEVICE:
+                c->Request.Type.Direction = XFER_READ;
+                break;
+        case DMA_NONE:
+                c->Request.Type.Direction = XFER_NONE;
+                break;
+        case DMA_BIDIRECTIONAL:
+                /* This can happen if a buggy application does a scsi passthru
+                 * and sets both inlen and outlen to non-zero. ( see
+                 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
+                 */
+
+                c->Request.Type.Direction = XFER_RSVD;
+                /* This is technically wrong, and hpsa controllers should
+                 * reject it with CMD_INVALID, which is the most correct
+                 * response, but non-fibre backends appear to let it
+                 * slide by, and give the same results as if this field
+                 * were set correctly.  Either way is acceptable for
+                 * our purposes here.
+                 */
+
+                break;
+
+        default:
+                dev_err(&h->pdev->dev, "unknown data direction: %d\n",
+                        cmd->sc_data_direction);
+                BUG();
+                break;
+        }
+
+        if (hpsa_scatter_gather(h->pdev, c, cmd) < 0) { /* Fill SG list */
+                cmd_free(h, c);
+                return SCSI_MLQUEUE_HOST_BUSY;
+        }
+        enqueue_cmd_and_start_io(h, c);
+        /* the cmd'll come back via intr handler in complete_scsi_command()  */
+        return 0;
+}
+
+static void hpsa_unregister_scsi(struct ctlr_info *h)
+{
+        /* we are being forcibly unloaded, and may not refuse. */
+        scsi_remove_host(h->scsi_host);
+        scsi_host_put(h->scsi_host);
+        h->scsi_host = NULL;
+}
+
+static int hpsa_register_scsi(struct ctlr_info *h)
+{
+        int rc;
+
+        hpsa_update_scsi_devices(h, -1);
+        rc = hpsa_scsi_detect(h);
+        if (rc != 0)
+                dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
+                        " hpsa_scsi_detect(), rc is %d\n", rc);
+        return rc;
+}
+
+static int wait_for_device_to_become_ready(struct ctlr_info *h,
+        unsigned char lunaddr[])
+{
+        int rc = 0;
+        int count = 0;
+        int waittime = 1; /* seconds */
+        struct CommandList *c;
+
+        c = cmd_special_alloc(h);
+        if (!c) {
+                dev_warn(&h->pdev->dev, "out of memory in "
+                        "wait_for_device_to_become_ready.\n");
+                return IO_ERROR;
+        }
+
+        /* Send test unit ready until device ready, or give up. */
+        while (count < HPSA_TUR_RETRY_LIMIT) {
+
+                /* Wait for a bit.  do this first, because if we send
+                 * the TUR right away, the reset will just abort it.
+                 */
+                msleep(1000 * waittime);
+                count++;
+
+                /* Increase wait time with each try, up to a point. */
+                if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
+                        waittime = waittime * 2;
+
+                /* Send the Test Unit Ready */
+                fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
+                hpsa_scsi_do_simple_cmd_core(h, c);
+                /* no unmap needed here because no data xfer. */
+
+                if (c->err_info->CommandStatus == CMD_SUCCESS)
+                        break;
+
+                if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
+                        c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
+                        (c->err_info->SenseInfo[2] == NO_SENSE ||
+                        c->err_info->SenseInfo[2] == UNIT_ATTENTION))
+                        break;
+
+                dev_warn(&h->pdev->dev, "waiting %d secs "
+                        "for device to become ready.\n", waittime);
+                rc = 1; /* device not ready. */
+        }
+
+        if (rc)
+                dev_warn(&h->pdev->dev, "giving up on device.\n");
+        else
+                dev_warn(&h->pdev->dev, "device is ready.\n");
+
+        cmd_special_free(h, c);
+        return rc;
+}
+
+/* Need at least one of these error handlers to keep ../scsi/hosts.c from
+ * complaining.  Doing a host- or bus-reset can't do anything good here.
+ */
+static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
+{
+        int rc;
+        struct ctlr_info *h;
+        struct hpsa_scsi_dev_t *dev;
+
+        /* find the controller to which the command to be aborted was sent */
+        h = sdev_to_hba(scsicmd->device);
+        if (h == NULL) /* paranoia */
+                return FAILED;
+        dev_warn(&h->pdev->dev, "resetting drive\n");
+
+        dev = scsicmd->device->hostdata;
+        if (!dev) {
+                dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
+                        "device lookup failed.\n");
+                return FAILED;
+        }
+        /* send a reset to the SCSI LUN which the command was sent to */
+        rc = hpsa_send_reset(h, dev->scsi3addr);
+        if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
+                return SUCCESS;
+
+        dev_warn(&h->pdev->dev, "resetting device failed.\n");
+        return FAILED;
+}
+
+/*
+ * For operations that cannot sleep, a command block is allocated at init,
+ * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
+ * which ones are free or in use.  Lock must be held when calling this.
+ * cmd_free() is the complement.
+ */
+static struct CommandList *cmd_alloc(struct ctlr_info *h)
+{
+        struct CommandList *c;
+        int i;
+        union u64bit temp64;
+        dma_addr_t cmd_dma_handle, err_dma_handle;
+
+        do {
+                i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
+                if (i == h->nr_cmds)
+                        return NULL;
+        } while (test_and_set_bit
+                 (i & (BITS_PER_LONG - 1),
+                  h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
+        c = h->cmd_pool + i;
+        memset(c, 0, sizeof(*c));
+        cmd_dma_handle = h->cmd_pool_dhandle
+            + i * sizeof(*c);
+        c->err_info = h->errinfo_pool + i;
+        memset(c->err_info, 0, sizeof(*c->err_info));
+        err_dma_handle = h->errinfo_pool_dhandle
+            + i * sizeof(*c->err_info);
+        h->nr_allocs++;
+
+        c->cmdindex = i;
+
+        INIT_HLIST_NODE(&c->list);
+        c->busaddr = (__u32) cmd_dma_handle;
+        temp64.val = (__u64) err_dma_handle;
+        c->ErrDesc.Addr.lower = temp64.val32.lower;
+        c->ErrDesc.Addr.upper = temp64.val32.upper;
+        c->ErrDesc.Len = sizeof(*c->err_info);
+
+        c->h = h;
+        return c;
+}
+
+/* For operations that can wait for kmalloc to possibly sleep,
+ * this routine can be called. Lock need not be held to call
+ * cmd_special_alloc. cmd_special_free() is the complement.
+ */
+static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
+{
+        struct CommandList *c;
+        union u64bit temp64;
+        dma_addr_t cmd_dma_handle, err_dma_handle;
+
+        c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
+        if (c == NULL)
+                return NULL;
+        memset(c, 0, sizeof(*c));
+
+        c->cmdindex = -1;
+
+        c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
+                    &err_dma_handle);
+
+        if (c->err_info == NULL) {
+                pci_free_consistent(h->pdev,
+                        sizeof(*c), c, cmd_dma_handle);
+                return NULL;
+        }
+        memset(c->err_info, 0, sizeof(*c->err_info));
+
+        INIT_HLIST_NODE(&c->list);
+        c->busaddr = (__u32) cmd_dma_handle;
+        temp64.val = (__u64) err_dma_handle;
+        c->ErrDesc.Addr.lower = temp64.val32.lower;
+        c->ErrDesc.Addr.upper = temp64.val32.upper;
+        c->ErrDesc.Len = sizeof(*c->err_info);
+
+        c->h = h;
+        return c;
+}
+
+static void cmd_free(struct ctlr_info *h, struct CommandList *c)
+{
+        int i;
+
+        i = c - h->cmd_pool;
+        clear_bit(i & (BITS_PER_LONG - 1),
+                  h->cmd_pool_bits + (i / BITS_PER_LONG));
+        h->nr_frees++;
+}
+
+static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
+{
+        union u64bit temp64;
+
+        temp64.val32.lower = c->ErrDesc.Addr.lower;
+        temp64.val32.upper = c->ErrDesc.Addr.upper;
+        pci_free_consistent(h->pdev, sizeof(*c->err_info),
+                            c->err_info, (dma_addr_t) temp64.val);
+        pci_free_consistent(h->pdev, sizeof(*c),
+                            c, (dma_addr_t) c->busaddr);
+}
+
+#ifdef CONFIG_COMPAT
+
+static int do_ioctl(struct scsi_device *dev, int cmd, void *arg)
+{
+        int ret;
+
+        lock_kernel();
+        ret = hpsa_ioctl(dev, cmd, arg);
+        unlock_kernel();
+        return ret;
+}
+
+static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg);
+static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
+        int cmd, void *arg);
+
+static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
+{
+        switch (cmd) {
+        case CCISS_GETPCIINFO:
+        case CCISS_GETINTINFO:
+        case CCISS_SETINTINFO:
+        case CCISS_GETNODENAME:
+        case CCISS_SETNODENAME:
+        case CCISS_GETHEARTBEAT:
+        case CCISS_GETBUSTYPES:
+        case CCISS_GETFIRMVER:
+        case CCISS_GETDRIVVER:
+        case CCISS_REVALIDVOLS:
+        case CCISS_DEREGDISK:
+        case CCISS_REGNEWDISK:
+        case CCISS_REGNEWD:
+        case CCISS_RESCANDISK:
+        case CCISS_GETLUNINFO:
+                return do_ioctl(dev, cmd, arg);
+
+        case CCISS_PASSTHRU32:
+                return hpsa_ioctl32_passthru(dev, cmd, arg);
+        case CCISS_BIG_PASSTHRU32:
+                return hpsa_ioctl32_big_passthru(dev, cmd, arg);
+
+        default:
+                return -ENOIOCTLCMD;
+        }
+}
+
+static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
+{
+        IOCTL32_Command_struct __user *arg32 =
+            (IOCTL32_Command_struct __user *) arg;
+        IOCTL_Command_struct arg64;
+        IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
+        int err;
+        u32 cp;
+
+        err = 0;
+        err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
+                           sizeof(arg64.LUN_info));
+        err |= copy_from_user(&arg64.Request, &arg32->Request,
+                           sizeof(arg64.Request));
+        err |= copy_from_user(&arg64.error_info, &arg32->error_info,
+                           sizeof(arg64.error_info));
+        err |= get_user(arg64.buf_size, &arg32->buf_size);
+        err |= get_user(cp, &arg32->buf);
+        arg64.buf = compat_ptr(cp);
+        err |= copy_to_user(p, &arg64, sizeof(arg64));
+
+        if (err)
+                return -EFAULT;
+
+        err = do_ioctl(dev, CCISS_PASSTHRU, (void *)p);
+        if (err)
+                return err;
+        err |= copy_in_user(&arg32->error_info, &p->error_info,
+                         sizeof(arg32->error_info));
+        if (err)
+                return -EFAULT;
+        return err;
+}
+
+static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
+        int cmd, void *arg)
+{
+        BIG_IOCTL32_Command_struct __user *arg32 =
+            (BIG_IOCTL32_Command_struct __user *) arg;
+        BIG_IOCTL_Command_struct arg64;
+        BIG_IOCTL_Command_struct __user *p =
+            compat_alloc_user_space(sizeof(arg64));
+        int err;
+        u32 cp;
+
+        err = 0;
+        err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
+                           sizeof(arg64.LUN_info));
+        err |= copy_from_user(&arg64.Request, &arg32->Request,
+                           sizeof(arg64.Request));
+        err |= copy_from_user(&arg64.error_info, &arg32->error_info,
+                           sizeof(arg64.error_info));
+        err |= get_user(arg64.buf_size, &arg32->buf_size);
+        err |= get_user(arg64.malloc_size, &arg32->malloc_size);
+        err |= get_user(cp, &arg32->buf);
+        arg64.buf = compat_ptr(cp);
+        err |= copy_to_user(p, &arg64, sizeof(arg64));
+
+        if (err)
+                return -EFAULT;
+
+        err = do_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
+        if (err)
+                return err;
+        err |= copy_in_user(&arg32->error_info, &p->error_info,
+                         sizeof(arg32->error_info));
+        if (err)
+                return -EFAULT;
+        return err;
+}
+#endif
+
+static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
+{
+        struct hpsa_pci_info pciinfo;
+
+        if (!argp)
+                return -EINVAL;
+        pciinfo.domain = pci_domain_nr(h->pdev->bus);
+        pciinfo.bus = h->pdev->bus->number;
+        pciinfo.dev_fn = h->pdev->devfn;
+        pciinfo.board_id = h->board_id;
+        if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
+                return -EFAULT;
+        return 0;
+}
+
+static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
+{
+        DriverVer_type DriverVer;
+        unsigned char vmaj, vmin, vsubmin;
+        int rc;
+
+        rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
+                &vmaj, &vmin, &vsubmin);
+        if (rc != 3) {
+                dev_info(&h->pdev->dev, "driver version string '%s' "
+                        "unrecognized.", HPSA_DRIVER_VERSION);
+                vmaj = 0;
+                vmin = 0;
+                vsubmin = 0;
+        }
+        DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
+        if (!argp)
+                return -EINVAL;
+        if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
+                return -EFAULT;
+        return 0;
+}
+
+static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
+{
+        IOCTL_Command_struct iocommand;
+        struct CommandList *c;
+        char *buff = NULL;
+        union u64bit temp64;
+
+        if (!argp)
+                return -EINVAL;
+        if (!capable(CAP_SYS_RAWIO))
+                return -EPERM;
+        if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
+                return -EFAULT;
+        if ((iocommand.buf_size < 1) &&
+            (iocommand.Request.Type.Direction != XFER_NONE)) {
+                return -EINVAL;
+        }
+        if (iocommand.buf_size > 0) {
+                buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
+                if (buff == NULL)
+                        return -EFAULT;
+        }
+        if (iocommand.Request.Type.Direction == XFER_WRITE) {
+                /* Copy the data into the buffer we created */
+                if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
+                        kfree(buff);
+                        return -EFAULT;
+                }
+        } else
+                memset(buff, 0, iocommand.buf_size);
+        c = cmd_special_alloc(h);
+        if (c == NULL) {
+                kfree(buff);
+                return -ENOMEM;
+        }
+        /* Fill in the command type */
+        c->cmd_type = CMD_IOCTL_PEND;
+        /* Fill in Command Header */
+        c->Header.ReplyQueue = 0; /* unused in simple mode */
+        if (iocommand.buf_size > 0) {   /* buffer to fill */
+                c->Header.SGList = 1;
+                c->Header.SGTotal = 1;
+        } else  { /* no buffers to fill */
+                c->Header.SGList = 0;
+                c->Header.SGTotal = 0;
+        }
+        memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
+        /* use the kernel address the cmd block for tag */
+        c->Header.Tag.lower = c->busaddr;
+
+        /* Fill in Request block */
+        memcpy(&c->Request, &iocommand.Request,
+                sizeof(c->Request));
+
+        /* Fill in the scatter gather information */
+        if (iocommand.buf_size > 0) {
+                temp64.val = pci_map_single(h->pdev, buff,
+                        iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
+                c->SG[0].Addr.lower = temp64.val32.lower;
+                c->SG[0].Addr.upper = temp64.val32.upper;
+                c->SG[0].Len = iocommand.buf_size;
+                c->SG[0].Ext = 0; /* we are not chaining*/
+        }
+        hpsa_scsi_do_simple_cmd_core(h, c);
+        hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
+        check_ioctl_unit_attention(h, c);
+
+        /* Copy the error information out */
+        memcpy(&iocommand.error_info, c->err_info,
+                sizeof(iocommand.error_info));
+        if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
+                kfree(buff);
+                cmd_special_free(h, c);
+                return -EFAULT;
+        }
+
+        if (iocommand.Request.Type.Direction == XFER_READ) {
+                /* Copy the data out of the buffer we created */
+                if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
+                        kfree(buff);
+                        cmd_special_free(h, c);
+                        return -EFAULT;
+                }
+        }
+        kfree(buff);
+        cmd_special_free(h, c);
+        return 0;
+}
+
+static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
+{
+        BIG_IOCTL_Command_struct *ioc;
+        struct CommandList *c;
+        unsigned char **buff = NULL;
+        int *buff_size = NULL;
+        union u64bit temp64;
+        BYTE sg_used = 0;
+        int status = 0;
+        int i;
+        __u32 left;
+        __u32 sz;
+        BYTE __user *data_ptr;
+
+        if (!argp)
+                return -EINVAL;
+        if (!capable(CAP_SYS_RAWIO))
+                return -EPERM;
+        ioc = (BIG_IOCTL_Command_struct *)
+            kmalloc(sizeof(*ioc), GFP_KERNEL);
+        if (!ioc) {
+                status = -ENOMEM;
+                goto cleanup1;
+        }
+        if (copy_from_user(ioc, argp, sizeof(*ioc))) {
+                status = -EFAULT;
+                goto cleanup1;
+        }
+        if ((ioc->buf_size < 1) &&
+            (ioc->Request.Type.Direction != XFER_NONE)) {
+                status = -EINVAL;
+                goto cleanup1;
+        }
+        /* Check kmalloc limits  using all SGs */
+        if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
+                status = -EINVAL;
+                goto cleanup1;
+        }
+        if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
+                status = -EINVAL;
+                goto cleanup1;
+        }
+        buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
+        if (!buff) {
+                status = -ENOMEM;
+                goto cleanup1;
+        }
+        buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
+        if (!buff_size) {
+                status = -ENOMEM;
+                goto cleanup1;
+        }
+        left = ioc->buf_size;
+        data_ptr = ioc->buf;
+        while (left) {
+                sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
+                buff_size[sg_used] = sz;
+                buff[sg_used] = kmalloc(sz, GFP_KERNEL);
+                if (buff[sg_used] == NULL) {
+                        status = -ENOMEM;
+                        goto cleanup1;
+                }
+                if (ioc->Request.Type.Direction == XFER_WRITE) {
+                        if (copy_from_user(buff[sg_used], data_ptr, sz)) {
+                                status = -ENOMEM;
+                                goto cleanup1;
+                        }
+                } else
+                        memset(buff[sg_used], 0, sz);
+                left -= sz;
+                data_ptr += sz;
+                sg_used++;
+        }
+        c = cmd_special_alloc(h);
+        if (c == NULL) {
+                status = -ENOMEM;
+                goto cleanup1;
+        }
+        c->cmd_type = CMD_IOCTL_PEND;
+        c->Header.ReplyQueue = 0;
+
+        if (ioc->buf_size > 0) {
+                c->Header.SGList = sg_used;
+                c->Header.SGTotal = sg_used;
+        } else {
+                c->Header.SGList = 0;
+                c->Header.SGTotal = 0;
+        }
+        memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
+        c->Header.Tag.lower = c->busaddr;
+        memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
+        if (ioc->buf_size > 0) {
+                int i;
+                for (i = 0; i < sg_used; i++) {
+                        temp64.val = pci_map_single(h->pdev, buff[i],
+                                    buff_size[i], PCI_DMA_BIDIRECTIONAL);
+                        c->SG[i].Addr.lower = temp64.val32.lower;
+                        c->SG[i].Addr.upper = temp64.val32.upper;
+                        c->SG[i].Len = buff_size[i];
+                        /* we are not chaining */
+                        c->SG[i].Ext = 0;
+                }
+        }
+        hpsa_scsi_do_simple_cmd_core(h, c);
+        hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
+        check_ioctl_unit_attention(h, c);
+        /* Copy the error information out */
+        memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
+        if (copy_to_user(argp, ioc, sizeof(*ioc))) {
+                cmd_special_free(h, c);
+                status = -EFAULT;
+                goto cleanup1;
+        }
+        if (ioc->Request.Type.Direction == XFER_READ) {
+                /* Copy the data out of the buffer we created */
+                BYTE __user *ptr = ioc->buf;
+                for (i = 0; i < sg_used; i++) {
+                        if (copy_to_user(ptr, buff[i], buff_size[i])) {
+                                cmd_special_free(h, c);
+                                status = -EFAULT;
+                                goto cleanup1;
+                        }
+                        ptr += buff_size[i];
+                }
+        }
+        cmd_special_free(h, c);
+        status = 0;
+cleanup1:
+        if (buff) {
+                for (i = 0; i < sg_used; i++)
+                        kfree(buff[i]);
+                kfree(buff);
+        }
+        kfree(buff_size);
+        kfree(ioc);
+        return status;
+}
+
+static void check_ioctl_unit_attention(struct ctlr_info *h,
+        struct CommandList *c)
+{
+        if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
+                        c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
+                (void) check_for_unit_attention(h, c);
+}
+/*
+ * ioctl
+ */
+static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
+{
+        struct ctlr_info *h;
+        void __user *argp = (void __user *)arg;
+
+        h = sdev_to_hba(dev);
+
+        switch (cmd) {
+        case CCISS_DEREGDISK:
+        case CCISS_REGNEWDISK:
+        case CCISS_REGNEWD:
+                hpsa_update_scsi_devices(h, dev->host->host_no);
+                return 0;
+        case CCISS_GETPCIINFO:
+                return hpsa_getpciinfo_ioctl(h, argp);
+        case CCISS_GETDRIVVER:
+                return hpsa_getdrivver_ioctl(h, argp);
+        case CCISS_PASSTHRU:
+                return hpsa_passthru_ioctl(h, argp);
+        case CCISS_BIG_PASSTHRU:
+                return hpsa_big_passthru_ioctl(h, argp);
+        default:
+                return -ENOTTY;
+        }
+}
+
+static void fill_cmd(struct CommandList *c, __u8 cmd, struct ctlr_info *h,
+        void *buff, size_t size, __u8 page_code, unsigned char *scsi3addr,
+        int cmd_type)
+{
+        int pci_dir = XFER_NONE;
+
+        c->cmd_type = CMD_IOCTL_PEND;
+        c->Header.ReplyQueue = 0;
+        if (buff != NULL && size > 0) {
+                c->Header.SGList = 1;
+                c->Header.SGTotal = 1;
+        } else {
+                c->Header.SGList = 0;
+                c->Header.SGTotal = 0;
+        }
+        c->Header.Tag.lower = c->busaddr;
+        memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
+
+        c->Request.Type.Type = cmd_type;
+        if (cmd_type == TYPE_CMD) {
+                switch (cmd) {
+                case HPSA_INQUIRY:
+                        /* are we trying to read a vital product page */
+                        if (page_code != 0) {
+                                c->Request.CDB[1] = 0x01;
+                                c->Request.CDB[2] = page_code;
+                        }
+                        c->Request.CDBLen = 6;
+                        c->Request.Type.Attribute = ATTR_SIMPLE;
+                        c->Request.Type.Direction = XFER_READ;
+                        c->Request.Timeout = 0;
+                        c->Request.CDB[0] = HPSA_INQUIRY;
+                        c->Request.CDB[4] = size & 0xFF;
+                        break;
+                case HPSA_REPORT_LOG:
+                case HPSA_REPORT_PHYS:
+                        /* Talking to controller so It's a physical command
+                           mode = 00 target = 0.  Nothing to write.
+                         */
+                        c->Request.CDBLen = 12;
+                        c->Request.Type.Attribute = ATTR_SIMPLE;
+                        c->Request.Type.Direction = XFER_READ;
+                        c->Request.Timeout = 0;
+                        c->Request.CDB[0] = cmd;
+                        c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
+                        c->Request.CDB[7] = (size >> 16) & 0xFF;
+                        c->Request.CDB[8] = (size >> 8) & 0xFF;
+                        c->Request.CDB[9] = size & 0xFF;
+                        break;
+
+                case HPSA_READ_CAPACITY:
+                        c->Request.CDBLen = 10;
+                        c->Request.Type.Attribute = ATTR_SIMPLE;
+                        c->Request.Type.Direction = XFER_READ;
+                        c->Request.Timeout = 0;
+                        c->Request.CDB[0] = cmd;
+                        break;
+                case HPSA_CACHE_FLUSH:
+                        c->Request.CDBLen = 12;
+                        c->Request.Type.Attribute = ATTR_SIMPLE;
+                        c->Request.Type.Direction = XFER_WRITE;
+                        c->Request.Timeout = 0;
+                        c->Request.CDB[0] = BMIC_WRITE;
+                        c->Request.CDB[6] = BMIC_CACHE_FLUSH;
+                        break;
+                case TEST_UNIT_READY:
+                        c->Request.CDBLen = 6;
+                        c->Request.Type.Attribute = ATTR_SIMPLE;
+                        c->Request.Type.Direction = XFER_NONE;
+                        c->Request.Timeout = 0;
+                        break;
+                default:
+                        dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
+                        BUG();
+                        return;
+                }
+        } else if (cmd_type == TYPE_MSG) {
+                switch (cmd) {
+
+                case  HPSA_DEVICE_RESET_MSG:
+                        c->Request.CDBLen = 16;
+                        c->Request.Type.Type =  1; /* It is a MSG not a CMD */
+                        c->Request.Type.Attribute = ATTR_SIMPLE;
+                        c->Request.Type.Direction = XFER_NONE;
+                        c->Request.Timeout = 0; /* Don't time out */
+                        c->Request.CDB[0] =  0x01; /* RESET_MSG is 0x01 */
+                        c->Request.CDB[1] = 0x03;  /* Reset target above */
+                        /* If bytes 4-7 are zero, it means reset the */
+                        /* LunID device */
+                        c->Request.CDB[4] = 0x00;
+                        c->Request.CDB[5] = 0x00;
+                        c->Request.CDB[6] = 0x00;
+                        c->Request.CDB[7] = 0x00;
+                break;
+
+                default:
+                        dev_warn(&h->pdev->dev, "unknown message type %d\n",
+                                cmd);
+                        BUG();
+                }
+        } else {
+                dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
+                BUG();
+        }
+
+        switch (c->Request.Type.Direction) {
+        case XFER_READ:
+                pci_dir = PCI_DMA_FROMDEVICE;
+                break;
+        case XFER_WRITE:
+                pci_dir = PCI_DMA_TODEVICE;
+                break;
+        case XFER_NONE:
+                pci_dir = PCI_DMA_NONE;
+                break;
+        default:
+                pci_dir = PCI_DMA_BIDIRECTIONAL;
+        }
+
+        hpsa_map_one(h->pdev, c, buff, size, pci_dir);
+
+        return;
+}
+
+/*
+ * Map (physical) PCI mem into (virtual) kernel space
+ */
+static void __iomem *remap_pci_mem(ulong base, ulong size)
+{
+        ulong page_base = ((ulong) base) & PAGE_MASK;
+        ulong page_offs = ((ulong) base) - page_base;
+        void __iomem *page_remapped = ioremap(page_base, page_offs + size);
+
+        return page_remapped ? (page_remapped + page_offs) : NULL;
+}
+
+/* Takes cmds off the submission queue and sends them to the hardware,
+ * then puts them on the queue of cmds waiting for completion.
+ */
+static void start_io(struct ctlr_info *h)
+{
+        struct CommandList *c;
+
+        while (!hlist_empty(&h->reqQ)) {
+                c = hlist_entry(h->reqQ.first, struct CommandList, list);
+                /* can't do anything if fifo is full */
+                if ((h->access.fifo_full(h))) {
+                        dev_warn(&h->pdev->dev, "fifo full\n");
+                        break;
+                }
+
+                /* Get the first entry from the Request Q */
+                removeQ(c);
+                h->Qdepth--;
+
+                /* Tell the controller execute command */
+                h->access.submit_command(h, c);
+
+                /* Put job onto the completed Q */
+                addQ(&h->cmpQ, c);
+        }
+}
+
+static inline unsigned long get_next_completion(struct ctlr_info *h)
+{
+        return h->access.command_completed(h);
+}
+
+static inline int interrupt_pending(struct ctlr_info *h)
+{
+        return h->access.intr_pending(h);
+}
+
+static inline long interrupt_not_for_us(struct ctlr_info *h)
+{
+        return ((h->access.intr_pending(h) == 0) ||
+                 (h->interrupts_enabled == 0));
+}
+
+static inline int bad_tag(struct ctlr_info *h, __u32 tag_index,
+        __u32 raw_tag)
+{
+        if (unlikely(tag_index >= h->nr_cmds)) {
+                dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
+                return 1;
+        }
+        return 0;
+}
+
+static inline void finish_cmd(struct CommandList *c, __u32 raw_tag)
+{
+        removeQ(c);
+        if (likely(c->cmd_type == CMD_SCSI))
+                complete_scsi_command(c, 0, raw_tag);
+        else if (c->cmd_type == CMD_IOCTL_PEND)
+                complete(c->waiting);
+}
+
+static irqreturn_t do_hpsa_intr(int irq, void *dev_id)
+{
+        struct ctlr_info *h = dev_id;
+        struct CommandList *c;
+        unsigned long flags;
+        __u32 raw_tag, tag, tag_index;
+        struct hlist_node *tmp;
+
+        if (interrupt_not_for_us(h))
+                return IRQ_NONE;
+        spin_lock_irqsave(&h->lock, flags);
+        while (interrupt_pending(h)) {
+                while ((raw_tag = get_next_completion(h)) != FIFO_EMPTY) {
+                        if (likely(HPSA_TAG_CONTAINS_INDEX(raw_tag))) {
+                                tag_index = HPSA_TAG_TO_INDEX(raw_tag);
+                                if (bad_tag(h, tag_index, raw_tag))
+                                        return IRQ_HANDLED;
+                                c = h->cmd_pool + tag_index;
+                                finish_cmd(c, raw_tag);
+                                continue;
+                        }
+                        tag = HPSA_TAG_DISCARD_ERROR_BITS(raw_tag);
+                        c = NULL;
+                        hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
+                                if (c->busaddr == tag) {
+                                        finish_cmd(c, raw_tag);
+                                        break;
+                                }
+                        }
+                }
+        }
+        spin_unlock_irqrestore(&h->lock, flags);
+        return IRQ_HANDLED;
+}
+
+/* Send a message CDB to the firmware. */
+static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
+                                                unsigned char type)
+{
+        struct Command {
+                struct CommandListHeader CommandHeader;
+                struct RequestBlock Request;
+                struct ErrDescriptor ErrorDescriptor;
+        };
+        struct Command *cmd;
+        static const size_t cmd_sz = sizeof(*cmd) +
+                                        sizeof(cmd->ErrorDescriptor);
+        dma_addr_t paddr64;
+        uint32_t paddr32, tag;
+        void __iomem *vaddr;
+        int i, err;
+
+        vaddr = pci_ioremap_bar(pdev, 0);
+        if (vaddr == NULL)
+                return -ENOMEM;
+
+        /* The Inbound Post Queue only accepts 32-bit physical addresses for the
+         * CCISS commands, so they must be allocated from the lower 4GiB of
+         * memory.
+         */
+        err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+        if (err) {
+                iounmap(vaddr);
+                return -ENOMEM;
+        }
+
+        cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
+        if (cmd == NULL) {
+                iounmap(vaddr);
+                return -ENOMEM;
+        }
+
+        /* This must fit, because of the 32-bit consistent DMA mask.  Also,
+         * although there's no guarantee, we assume that the address is at
+         * least 4-byte aligned (most likely, it's page-aligned).
+         */
+        paddr32 = paddr64;
+
+        cmd->CommandHeader.ReplyQueue = 0;
+        cmd->CommandHeader.SGList = 0;
+        cmd->CommandHeader.SGTotal = 0;
+        cmd->CommandHeader.Tag.lower = paddr32;
+        cmd->CommandHeader.Tag.upper = 0;
+        memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
+
+        cmd->Request.CDBLen = 16;
+        cmd->Request.Type.Type = TYPE_MSG;
+        cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
+        cmd->Request.Type.Direction = XFER_NONE;
+        cmd->Request.Timeout = 0; /* Don't time out */
+        cmd->Request.CDB[0] = opcode;
+        cmd->Request.CDB[1] = type;
+        memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
+        cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
+        cmd->ErrorDescriptor.Addr.upper = 0;
+        cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
+
+        writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
+
+        for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
+                tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
+                if (HPSA_TAG_DISCARD_ERROR_BITS(tag) == paddr32)
+                        break;
+                msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
+        }
+
+        iounmap(vaddr);
+
+        /* we leak the DMA buffer here ... no choice since the controller could
+         *  still complete the command.
+         */
+        if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
+                dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
+                        opcode, type);
+                return -ETIMEDOUT;
+        }
+
+        pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
+
+        if (tag & HPSA_ERROR_BIT) {
+                dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
+                        opcode, type);
+                return -EIO;
+        }
+
+        dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
+                opcode, type);
+        return 0;
+}
+
+#define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
+#define hpsa_noop(p) hpsa_message(p, 3, 0)
+
+static __devinit int hpsa_reset_msi(struct pci_dev *pdev)
+{
+/* the #defines are stolen from drivers/pci/msi.h. */
+#define msi_control_reg(base)           (base + PCI_MSI_FLAGS)
+#define PCI_MSIX_FLAGS_ENABLE           (1 << 15)
+
+        int pos;
+        u16 control = 0;
+
+        pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
+        if (pos) {
+                pci_read_config_word(pdev, msi_control_reg(pos), &control);
+                if (control & PCI_MSI_FLAGS_ENABLE) {
+                        dev_info(&pdev->dev, "resetting MSI\n");
+                        pci_write_config_word(pdev, msi_control_reg(pos),
+                                        control & ~PCI_MSI_FLAGS_ENABLE);
+                }
+        }
+
+        pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
+        if (pos) {
+                pci_read_config_word(pdev, msi_control_reg(pos), &control);
+                if (control & PCI_MSIX_FLAGS_ENABLE) {
+                        dev_info(&pdev->dev, "resetting MSI-X\n");
+                        pci_write_config_word(pdev, msi_control_reg(pos),
+                                        control & ~PCI_MSIX_FLAGS_ENABLE);
+                }
+        }
+
+        return 0;
+}
+
+/* This does a hard reset of the controller using PCI power management
+ * states.
+ */
+static __devinit int hpsa_hard_reset_controller(struct pci_dev *pdev)
+{
+        u16 pmcsr, saved_config_space[32];
+        int i, pos;
+
+        dev_info(&pdev->dev, "using PCI PM to reset controller\n");
+
+        /* This is very nearly the same thing as
+         *
+         * pci_save_state(pci_dev);
+         * pci_set_power_state(pci_dev, PCI_D3hot);
+         * pci_set_power_state(pci_dev, PCI_D0);
+         * pci_restore_state(pci_dev);
+         *
+         * but we can't use these nice canned kernel routines on
+         * kexec, because they also check the MSI/MSI-X state in PCI
+         * configuration space and do the wrong thing when it is
+         * set/cleared.  Also, the pci_save/restore_state functions
+         * violate the ordering requirements for restoring the
+         * configuration space from the CCISS document (see the
+         * comment below).  So we roll our own ....
+         */
+
+        for (i = 0; i < 32; i++)
+                pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
+
+        pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
+        if (pos == 0) {
+                dev_err(&pdev->dev,
+                        "hpsa_reset_controller: PCI PM not supported\n");
+                return -ENODEV;
+        }
+
+        /* Quoting from the Open CISS Specification: "The Power
+         * Management Control/Status Register (CSR) controls the power
+         * state of the device.  The normal operating state is D0,
+         * CSR=00h.  The software off state is D3, CSR=03h.  To reset
+         * the controller, place the interface device in D3 then to
+         * D0, this causes a secondary PCI reset which will reset the
+         * controller."
+         */
+
+        /* enter the D3hot power management state */
+        pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
+        pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
+        pmcsr |= PCI_D3hot;
+        pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
+
+        msleep(500);
+
+        /* enter the D0 power management state */
+        pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
+        pmcsr |= PCI_D0;
+        pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
+
+        msleep(500);
+
+        /* Restore the PCI configuration space.  The Open CISS
+         * Specification says, "Restore the PCI Configuration
+         * Registers, offsets 00h through 60h. It is important to
+         * restore the command register, 16-bits at offset 04h,
+         * last. Do not restore the configuration status register,
+         * 16-bits at offset 06h."  Note that the offset is 2*i.
+         */
+        for (i = 0; i < 32; i++) {
+                if (i == 2 || i == 3)
+                        continue;
+                pci_write_config_word(pdev, 2*i, saved_config_space[i]);
+        }
+        wmb();
+        pci_write_config_word(pdev, 4, saved_config_space[2]);
+
+        return 0;
+}
+
+/*
+ *  We cannot read the structure directly, for portability we must use
+ *   the io functions.
+ *   This is for debug only.
+ */
+#ifdef HPSA_DEBUG
+static void print_cfg_table(struct device *dev, struct CfgTable *tb)
+{
+        int i;
+        char temp_name[17];
+
+        dev_info(dev, "Controller Configuration information\n");
+        dev_info(dev, "------------------------------------\n");
+        for (i = 0; i < 4; i++)
+                temp_name[i] = readb(&(tb->Signature[i]));
+        temp_name[4] = '\0';
+        dev_info(dev, "   Signature = %s\n", temp_name);
+        dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
+        dev_info(dev, "   Transport methods supported = 0x%x\n",
+               readl(&(tb->TransportSupport)));
+        dev_info(dev, "   Transport methods active = 0x%x\n",
+               readl(&(tb->TransportActive)));
+        dev_info(dev, "   Requested transport Method = 0x%x\n",
+               readl(&(tb->HostWrite.TransportRequest)));
+        dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
+               readl(&(tb->HostWrite.CoalIntDelay)));
+        dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
+               readl(&(tb->HostWrite.CoalIntCount)));
+        dev_info(dev, "   Max outstanding commands = 0x%d\n",
+               readl(&(tb->CmdsOutMax)));
+        dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
+        for (i = 0; i < 16; i++)
+                temp_name[i] = readb(&(tb->ServerName[i]));
+        temp_name[16] = '\0';
+        dev_info(dev, "   Server Name = %s\n", temp_name);
+        dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
+                readl(&(tb->HeartBeat)));
+}
+#endif                          /* HPSA_DEBUG */
+
+static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
+{
+        int i, offset, mem_type, bar_type;
+
+        if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
+                return 0;
+        offset = 0;
+        for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
+                bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
+                if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
+                        offset += 4;
+                else {
+                        mem_type = pci_resource_flags(pdev, i) &
+                            PCI_BASE_ADDRESS_MEM_TYPE_MASK;
+                        switch (mem_type) {
+                        case PCI_BASE_ADDRESS_MEM_TYPE_32:
+                        case PCI_BASE_ADDRESS_MEM_TYPE_1M:
+                                offset += 4;    /* 32 bit */
+                                break;
+                        case PCI_BASE_ADDRESS_MEM_TYPE_64:
+                                offset += 8;
+                                break;
+                        default:        /* reserved in PCI 2.2 */
+                                dev_warn(&pdev->dev,
+                                       "base address is invalid\n");
+                                return -1;
+                                break;
+                        }
+                }
+                if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
+                        return i + 1;
+        }
+        return -1;
+}
+
+/* If MSI/MSI-X is supported by the kernel we will try to enable it on
+ * controllers that are capable. If not, we use IO-APIC mode.
+ */
+
+static void __devinit hpsa_interrupt_mode(struct ctlr_info *h,
+                                           struct pci_dev *pdev, __u32 board_id)
+{
+#ifdef CONFIG_PCI_MSI
+        int err;
+        struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
+        {0, 2}, {0, 3}
+        };
+
+        /* Some boards advertise MSI but don't really support it */
+        if ((board_id == 0x40700E11) ||
+            (board_id == 0x40800E11) ||
+            (board_id == 0x40820E11) || (board_id == 0x40830E11))
+                goto default_int_mode;
+        if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) {
+                dev_info(&pdev->dev, "MSIX\n");
+                err = pci_enable_msix(pdev, hpsa_msix_entries, 4);
+                if (!err) {
+                        h->intr[0] = hpsa_msix_entries[0].vector;
+                        h->intr[1] = hpsa_msix_entries[1].vector;
+                        h->intr[2] = hpsa_msix_entries[2].vector;
+                        h->intr[3] = hpsa_msix_entries[3].vector;
+                        h->msix_vector = 1;
+                        return;
+                }
+                if (err > 0) {
+                        dev_warn(&pdev->dev, "only %d MSI-X vectors "
+                               "available\n", err);
+                        goto default_int_mode;
+                } else {
+                        dev_warn(&pdev->dev, "MSI-X init failed %d\n",
+                               err);
+                        goto default_int_mode;
+                }
+        }
+        if (pci_find_capability(pdev, PCI_CAP_ID_MSI)) {
+                dev_info(&pdev->dev, "MSI\n");
+                if (!pci_enable_msi(pdev))
+                        h->msi_vector = 1;
+                else
+                        dev_warn(&pdev->dev, "MSI init failed\n");
+        }
+default_int_mode:
+#endif                          /* CONFIG_PCI_MSI */
+        /* if we get here we're going to use the default interrupt mode */
+        h->intr[SIMPLE_MODE_INT] = pdev->irq;
+        return;
+}
+
+static int hpsa_pci_init(struct ctlr_info *h, struct pci_dev *pdev)
+{
+        ushort subsystem_vendor_id, subsystem_device_id, command;
+        __u32 board_id, scratchpad = 0;
+        __u64 cfg_offset;
+        __u32 cfg_base_addr;
+        __u64 cfg_base_addr_index;
+        int i, prod_index, err;
+
+        subsystem_vendor_id = pdev->subsystem_vendor;
+        subsystem_device_id = pdev->subsystem_device;
+        board_id = (((__u32) (subsystem_device_id << 16) & 0xffff0000) |
+                    subsystem_vendor_id);
+
+        for (i = 0; i < ARRAY_SIZE(products); i++)
+                if (board_id == products[i].board_id)
+                        break;
+
+        prod_index = i;
+
+        if (prod_index == ARRAY_SIZE(products)) {
+                prod_index--;
+                if (subsystem_vendor_id != PCI_VENDOR_ID_HP ||
+                                !hpsa_allow_any) {
+                        dev_warn(&pdev->dev, "unrecognized board ID:"
+                                " 0x%08lx, ignoring.\n",
+                                (unsigned long) board_id);
+                        return -ENODEV;
+                }
+        }
+        /* check to see if controller has been disabled
+         * BEFORE trying to enable it
+         */
+        (void)pci_read_config_word(pdev, PCI_COMMAND, &command);
+        if (!(command & 0x02)) {
+                dev_warn(&pdev->dev, "controller appears to be disabled\n");
+                return -ENODEV;
+        }
+
+        err = pci_enable_device(pdev);
+        if (err) {
+                dev_warn(&pdev->dev, "unable to enable PCI device\n");
+                return err;
+        }
+
+        err = pci_request_regions(pdev, "hpsa");
+        if (err) {
+                dev_err(&pdev->dev, "cannot obtain PCI resources, aborting\n");
+                return err;
+        }
+
+        /* If the kernel supports MSI/MSI-X we will try to enable that,
+         * else we use the IO-APIC interrupt assigned to us by system ROM.
+         */
+        hpsa_interrupt_mode(h, pdev, board_id);
+
+        /* find the memory BAR */
+        for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
+                if (pci_resource_flags(pdev, i) & IORESOURCE_MEM)
+                        break;
+        }
+        if (i == DEVICE_COUNT_RESOURCE) {
+                dev_warn(&pdev->dev, "no memory BAR found\n");
+                err = -ENODEV;
+                goto err_out_free_res;
+        }
+
+        h->paddr = pci_resource_start(pdev, i); /* addressing mode bits
+                                                 * already removed
+                                                 */
+
+        h->vaddr = remap_pci_mem(h->paddr, 0x250);
+
+        /* Wait for the board to become ready.  */
+        for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) {
+                scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
+                if (scratchpad == HPSA_FIRMWARE_READY)
+                        break;
+                msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
+        }
+        if (scratchpad != HPSA_FIRMWARE_READY) {
+                dev_warn(&pdev->dev, "board not ready, timed out.\n");
+                err = -ENODEV;
+                goto err_out_free_res;
+        }
+
+        /* get the address index number */
+        cfg_base_addr = readl(h->vaddr + SA5_CTCFG_OFFSET);
+        cfg_base_addr &= (__u32) 0x0000ffff;
+        cfg_base_addr_index = find_PCI_BAR_index(pdev, cfg_base_addr);
+        if (cfg_base_addr_index == -1) {
+                dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
+                err = -ENODEV;
+                goto err_out_free_res;
+        }
+
+        cfg_offset = readl(h->vaddr + SA5_CTMEM_OFFSET);
+        h->cfgtable = remap_pci_mem(pci_resource_start(pdev,
+                               cfg_base_addr_index) + cfg_offset,
+                                sizeof(h->cfgtable));
+        h->board_id = board_id;
+
+        /* Query controller for max supported commands: */
+        h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
+
+        h->product_name = products[prod_index].product_name;
+        h->access = *(products[prod_index].access);
+        /* Allow room for some ioctls */
+        h->nr_cmds = h->max_commands - 4;
+
+        if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
+            (readb(&h->cfgtable->Signature[1]) != 'I') ||
+            (readb(&h->cfgtable->Signature[2]) != 'S') ||
+            (readb(&h->cfgtable->Signature[3]) != 'S')) {
+                dev_warn(&pdev->dev, "not a valid CISS config table\n");
+                err = -ENODEV;
+                goto err_out_free_res;
+        }
+#ifdef CONFIG_X86
+        {
+                /* Need to enable prefetch in the SCSI core for 6400 in x86 */
+                __u32 prefetch;
+                prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
+                prefetch |= 0x100;
+                writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
+        }
+#endif
+
+        /* Disabling DMA prefetch for the P600
+         * An ASIC bug may result in a prefetch beyond
+         * physical memory.
+         */
+        if (board_id == 0x3225103C) {
+                __u32 dma_prefetch;
+                dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
+                dma_prefetch |= 0x8000;
+                writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
+        }
+
+        h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
+        /* Update the field, and then ring the doorbell */
+        writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
+        writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
+
+        /* under certain very rare conditions, this can take awhile.
+         * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
+         * as we enter this code.)
+         */
+        for (i = 0; i < MAX_CONFIG_WAIT; i++) {
+                if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
+                        break;
+                /* delay and try again */
+                msleep(10);
+        }
+
+#ifdef HPSA_DEBUG
+        print_cfg_table(&pdev->dev, h->cfgtable);
+#endif                          /* HPSA_DEBUG */
+
+        if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
+                dev_warn(&pdev->dev, "unable to get board into simple mode\n");
+                err = -ENODEV;
+                goto err_out_free_res;
+        }
+        return 0;
+
+err_out_free_res:
+        /*
+         * Deliberately omit pci_disable_device(): it does something nasty to
+         * Smart Array controllers that pci_enable_device does not undo
+         */
+        pci_release_regions(pdev);
+        return err;
+}
+
+static int __devinit hpsa_init_one(struct pci_dev *pdev,
+                                    const struct pci_device_id *ent)
+{
+        int i;
+        int dac;
+        struct ctlr_info *h;
+
+        if (number_of_controllers == 0)
+                printk(KERN_INFO DRIVER_NAME "\n");
+        if (reset_devices) {
+                /* Reset the controller with a PCI power-cycle */
+                if (hpsa_hard_reset_controller(pdev) || hpsa_reset_msi(pdev))
+                        return -ENODEV;
+
+                /* Some devices (notably the HP Smart Array 5i Controller)
+                   need a little pause here */
+                msleep(HPSA_POST_RESET_PAUSE_MSECS);
+
+                /* Now try to get the controller to respond to a no-op */
+                for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
+                        if (hpsa_noop(pdev) == 0)
+                                break;
+                        else
+                                dev_warn(&pdev->dev, "no-op failed%s\n",
+                                                (i < 11 ? "; re-trying" : ""));
+                }
+        }
+
+        BUILD_BUG_ON(sizeof(struct CommandList) % 8);
+        h = kzalloc(sizeof(*h), GFP_KERNEL);
+        if (!h)
+                return -1;
+
+        h->busy_initializing = 1;
+        INIT_HLIST_HEAD(&h->cmpQ);
+        INIT_HLIST_HEAD(&h->reqQ);
+        mutex_init(&h->busy_shutting_down);
+        init_completion(&h->scan_wait);
+        if (hpsa_pci_init(h, pdev) != 0)
+                goto clean1;
+
+        sprintf(h->devname, "hpsa%d", number_of_controllers);
+        h->ctlr = number_of_controllers;
+        number_of_controllers++;
+        h->pdev = pdev;
+
+        /* configure PCI DMA stuff */
+        if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
+                dac = 1;
+        else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
+                dac = 0;
+        else {
+                dev_err(&pdev->dev, "no suitable DMA available\n");
+                goto clean1;
+        }
+
+        /* make sure the board interrupts are off */
+        h->access.set_intr_mask(h, HPSA_INTR_OFF);
+        if (request_irq(h->intr[SIMPLE_MODE_INT], do_hpsa_intr,
+                        IRQF_DISABLED | IRQF_SHARED, h->devname, h)) {
+                dev_err(&pdev->dev, "unable to get irq %d for %s\n",
+                       h->intr[SIMPLE_MODE_INT], h->devname);
+                goto clean2;
+        }
+
+        dev_info(&pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
+               h->devname, pdev->device, pci_name(pdev),
+               h->intr[SIMPLE_MODE_INT], dac ? "" : " not");
+
+        h->cmd_pool_bits =
+            kmalloc(((h->nr_cmds + BITS_PER_LONG -
+                      1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
+        h->cmd_pool = pci_alloc_consistent(h->pdev,
+                    h->nr_cmds * sizeof(*h->cmd_pool),
+                    &(h->cmd_pool_dhandle));
+        h->errinfo_pool = pci_alloc_consistent(h->pdev,
+                    h->nr_cmds * sizeof(*h->errinfo_pool),
+                    &(h->errinfo_pool_dhandle));
+        if ((h->cmd_pool_bits == NULL)
+            || (h->cmd_pool == NULL)
+            || (h->errinfo_pool == NULL)) {
+                dev_err(&pdev->dev, "out of memory");
+                goto clean4;
+        }
+        spin_lock_init(&h->lock);
+
+        pci_set_drvdata(pdev, h);
+        memset(h->cmd_pool_bits, 0,
+               ((h->nr_cmds + BITS_PER_LONG -
+                 1) / BITS_PER_LONG) * sizeof(unsigned long));
+
+        hpsa_scsi_setup(h);
+
+        /* Turn the interrupts on so we can service requests */
+        h->access.set_intr_mask(h, HPSA_INTR_ON);
+
+        hpsa_register_scsi(h);  /* hook ourselves into SCSI subsystem */
+        h->busy_initializing = 0;
+        return 1;
+
+clean4:
+        kfree(h->cmd_pool_bits);
+        if (h->cmd_pool)
+                pci_free_consistent(h->pdev,
+                            h->nr_cmds * sizeof(struct CommandList),
+                            h->cmd_pool, h->cmd_pool_dhandle);
+        if (h->errinfo_pool)
+                pci_free_consistent(h->pdev,
+                            h->nr_cmds * sizeof(struct ErrorInfo),
+                            h->errinfo_pool,
+                            h->errinfo_pool_dhandle);
+        free_irq(h->intr[SIMPLE_MODE_INT], h);
+clean2:
+clean1:
+        h->busy_initializing = 0;
+        kfree(h);
+        return -1;
+}
+
+static void hpsa_flush_cache(struct ctlr_info *h)
+{
+        char *flush_buf;
+        struct CommandList *c;
+
+        flush_buf = kzalloc(4, GFP_KERNEL);
+        if (!flush_buf)
+                return;
+
+        c = cmd_special_alloc(h);
+        if (!c) {
+                dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
+                goto out_of_memory;
+        }
+        fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
+                RAID_CTLR_LUNID, TYPE_CMD);
+        hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
+        if (c->err_info->CommandStatus != 0)
+                dev_warn(&h->pdev->dev,
+                        "error flushing cache on controller\n");
+        cmd_special_free(h, c);
+out_of_memory:
+        kfree(flush_buf);
+}
+
+static void hpsa_shutdown(struct pci_dev *pdev)
+{
+        struct ctlr_info *h;
+
+        h = pci_get_drvdata(pdev);
+        /* Turn board interrupts off  and send the flush cache command
+         * sendcmd will turn off interrupt, and send the flush...
+         * To write all data in the battery backed cache to disks
+         */
+        hpsa_flush_cache(h);
+        h->access.set_intr_mask(h, HPSA_INTR_OFF);
+        free_irq(h->intr[2], h);
+#ifdef CONFIG_PCI_MSI
+        if (h->msix_vector)
+                pci_disable_msix(h->pdev);
+        else if (h->msi_vector)
+                pci_disable_msi(h->pdev);
+#endif                          /* CONFIG_PCI_MSI */
+}
+
+static void __devexit hpsa_remove_one(struct pci_dev *pdev)
+{
+        struct ctlr_info *h;
+
+        if (pci_get_drvdata(pdev) == NULL) {
+                dev_err(&pdev->dev, "unable to remove device \n");
+                return;
+        }
+        h = pci_get_drvdata(pdev);
+        mutex_lock(&h->busy_shutting_down);
+        remove_from_scan_list(h);
+        hpsa_unregister_scsi(h);        /* unhook from SCSI subsystem */
+        hpsa_shutdown(pdev);
+        iounmap(h->vaddr);
+        pci_free_consistent(h->pdev,
+                h->nr_cmds * sizeof(struct CommandList),
+                h->cmd_pool, h->cmd_pool_dhandle);
+        pci_free_consistent(h->pdev,
+                h->nr_cmds * sizeof(struct ErrorInfo),
+                h->errinfo_pool, h->errinfo_pool_dhandle);
+        kfree(h->cmd_pool_bits);
+        /*
+         * Deliberately omit pci_disable_device(): it does something nasty to
+         * Smart Array controllers that pci_enable_device does not undo
+         */
+        pci_release_regions(pdev);
+        pci_set_drvdata(pdev, NULL);
+        mutex_unlock(&h->busy_shutting_down);
+        kfree(h);
+}
+
+static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
+        __attribute__((unused)) pm_message_t state)
+{
+        return -ENOSYS;
+}
+
+static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
+{
+        return -ENOSYS;
+}
+
+static struct pci_driver hpsa_pci_driver = {
+        .name = "hpsa",
+        .probe = hpsa_init_one,
+        .remove = __devexit_p(hpsa_remove_one),
+        .id_table = hpsa_pci_device_id, /* id_table */
+        .shutdown = hpsa_shutdown,
+        .suspend = hpsa_suspend,
+        .resume = hpsa_resume,
+};
+
+/*
+ *  This is it.  Register the PCI driver information for the cards we control
+ *  the OS will call our registered routines when it finds one of our cards.
+ */
+static int __init hpsa_init(void)
+{
+        int err;
+        /* Start the scan thread */
+        hpsa_scan_thread = kthread_run(hpsa_scan_func, NULL, "hpsa_scan");
+        if (IS_ERR(hpsa_scan_thread)) {
+                err = PTR_ERR(hpsa_scan_thread);
+                return -ENODEV;
+        }
+        err = pci_register_driver(&hpsa_pci_driver);
+        if (err)
+                kthread_stop(hpsa_scan_thread);
+        return err;
+}
+
+static void __exit hpsa_cleanup(void)
+{
+        pci_unregister_driver(&hpsa_pci_driver);
+        kthread_stop(hpsa_scan_thread);
+}
+
+module_init(hpsa_init);
+module_exit(hpsa_cleanup);
diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h
new file mode 100644
index 000000000000..6bd1949144b5
--- /dev/null
+++ b/drivers/scsi/hpsa.h
@@ -0,0 +1,273 @@
+/*
+ *    Disk Array driver for HP Smart Array SAS controllers
+ *    Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
+ *
+ *    This program is free software; you can redistribute it and/or modify
+ *    it under the terms of the GNU General Public License as published by
+ *    the Free Software Foundation; version 2 of the License.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ *    NON INFRINGEMENT.  See the GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
+ *
+ */
+#ifndef HPSA_H
+#define HPSA_H
+
+#include <scsi/scsicam.h>
+
+#define IO_OK           0
+#define IO_ERROR        1
+
+struct ctlr_info;
+
+struct access_method {
+        void (*submit_command)(struct ctlr_info *h,
+                struct CommandList *c);
+        void (*set_intr_mask)(struct ctlr_info *h, unsigned long val);
+        unsigned long (*fifo_full)(struct ctlr_info *h);
+        unsigned long (*intr_pending)(struct ctlr_info *h);
+        unsigned long (*command_completed)(struct ctlr_info *h);
+};
+
+struct hpsa_scsi_dev_t {
+        int devtype;
+        int bus, target, lun;           /* as presented to the OS */
+        unsigned char scsi3addr[8];     /* as presented to the HW */
+#define RAID_CTLR_LUNID "\0\0\0\0\0\0\0\0"
+        unsigned char device_id[16];    /* from inquiry pg. 0x83 */
+        unsigned char vendor[8];        /* bytes 8-15 of inquiry data */
+        unsigned char model[16];        /* bytes 16-31 of inquiry data */
+        unsigned char revision[4];      /* bytes 32-35 of inquiry data */
+        unsigned char raid_level;       /* from inquiry page 0xC1 */
+};
+
+struct ctlr_info {
+        int     ctlr;
+        char    devname[8];
+        char    *product_name;
+        char    firm_ver[4]; /* Firmware version */
+        struct pci_dev *pdev;
+        __u32   board_id;
+        void __iomem *vaddr;
+        unsigned long paddr;
+        int     nr_cmds; /* Number of commands allowed on this controller */
+        struct CfgTable __iomem *cfgtable;
+        int     interrupts_enabled;
+        int     major;
+        int     max_commands;
+        int     commands_outstanding;
+        int     max_outstanding; /* Debug */
+        int     usage_count;  /* number of opens all all minor devices */
+#       define DOORBELL_INT     0
+#       define PERF_MODE_INT    1
+#       define SIMPLE_MODE_INT  2
+#       define MEMQ_MODE_INT    3
+        unsigned int intr[4];
+        unsigned int msix_vector;
+        unsigned int msi_vector;
+        struct access_method access;
+
+        /* queue and queue Info */
+        struct hlist_head reqQ;
+        struct hlist_head cmpQ;
+        unsigned int Qdepth;
+        unsigned int maxQsinceinit;
+        unsigned int maxSG;
+        spinlock_t lock;
+
+        /* pointers to command and error info pool */
+        struct CommandList      *cmd_pool;
+        dma_addr_t              cmd_pool_dhandle;
+        struct ErrorInfo        *errinfo_pool;
+        dma_addr_t              errinfo_pool_dhandle;
+        unsigned long           *cmd_pool_bits;
+        int                     nr_allocs;
+        int                     nr_frees;
+        int                     busy_initializing;
+        int                     busy_scanning;
+        struct mutex            busy_shutting_down;
+        struct list_head        scan_list;
+        struct completion       scan_wait;
+
+        struct Scsi_Host *scsi_host;
+        spinlock_t devlock; /* to protect hba[ctlr]->dev[];  */
+        int ndevices; /* number of used elements in .dev[] array. */
+#define HPSA_MAX_SCSI_DEVS_PER_HBA 256
+        struct hpsa_scsi_dev_t *dev[HPSA_MAX_SCSI_DEVS_PER_HBA];
+};
+#define HPSA_ABORT_MSG 0
+#define HPSA_DEVICE_RESET_MSG 1
+#define HPSA_BUS_RESET_MSG 2
+#define HPSA_HOST_RESET_MSG 3
+#define HPSA_MSG_SEND_RETRY_LIMIT 10
+#define HPSA_MSG_SEND_RETRY_INTERVAL_MSECS 1000
+
+/* Maximum time in seconds driver will wait for command completions
+ * when polling before giving up.
+ */
+#define HPSA_MAX_POLL_TIME_SECS (20)
+
+/* During SCSI error recovery, HPSA_TUR_RETRY_LIMIT defines
+ * how many times to retry TEST UNIT READY on a device
+ * while waiting for it to become ready before giving up.
+ * HPSA_MAX_WAIT_INTERVAL_SECS is the max wait interval
+ * between sending TURs while waiting for a device
+ * to become ready.
+ */
+#define HPSA_TUR_RETRY_LIMIT (20)
+#define HPSA_MAX_WAIT_INTERVAL_SECS (30)
+
+/* HPSA_BOARD_READY_WAIT_SECS is how long to wait for a board
+ * to become ready, in seconds, before giving up on it.
+ * HPSA_BOARD_READY_POLL_INTERVAL_MSECS * is how long to wait
+ * between polling the board to see if it is ready, in
+ * milliseconds.  HPSA_BOARD_READY_POLL_INTERVAL and
+ * HPSA_BOARD_READY_ITERATIONS are derived from those.
+ */
+#define HPSA_BOARD_READY_WAIT_SECS (120)
+#define HPSA_BOARD_READY_POLL_INTERVAL_MSECS (100)
+#define HPSA_BOARD_READY_POLL_INTERVAL \
+        ((HPSA_BOARD_READY_POLL_INTERVAL_MSECS * HZ) / 1000)
+#define HPSA_BOARD_READY_ITERATIONS \
+        ((HPSA_BOARD_READY_WAIT_SECS * 1000) / \
+                HPSA_BOARD_READY_POLL_INTERVAL_MSECS)
+#define HPSA_POST_RESET_PAUSE_MSECS (3000)
+#define HPSA_POST_RESET_NOOP_RETRIES (12)
+
+/*  Defining the diffent access_menthods */
+/*
+ * Memory mapped FIFO interface (SMART 53xx cards)
+ */
+#define SA5_DOORBELL    0x20
+#define SA5_REQUEST_PORT_OFFSET 0x40
+#define SA5_REPLY_INTR_MASK_OFFSET      0x34
+#define SA5_REPLY_PORT_OFFSET           0x44
+#define SA5_INTR_STATUS         0x30
+#define SA5_SCRATCHPAD_OFFSET   0xB0
+
+#define SA5_CTCFG_OFFSET        0xB4
+#define SA5_CTMEM_OFFSET        0xB8
+
+#define SA5_INTR_OFF            0x08
+#define SA5B_INTR_OFF           0x04
+#define SA5_INTR_PENDING        0x08
+#define SA5B_INTR_PENDING       0x04
+#define FIFO_EMPTY              0xffffffff
+#define HPSA_FIRMWARE_READY     0xffff0000 /* value in scratchpad register */
+
+#define HPSA_ERROR_BIT          0x02
+#define HPSA_TAG_CONTAINS_INDEX(tag) ((tag) & 0x04)
+#define HPSA_TAG_TO_INDEX(tag) ((tag) >> 3)
+#define HPSA_TAG_DISCARD_ERROR_BITS(tag) ((tag) & ~3)
+
+#define HPSA_INTR_ON    1
+#define HPSA_INTR_OFF   0
+/*
+        Send the command to the hardware
+*/
+static void SA5_submit_command(struct ctlr_info *h,
+        struct CommandList *c)
+{
+#ifdef HPSA_DEBUG
+         printk(KERN_WARNING "hpsa: Sending %x - down to controller\n",
+                c->busaddr);
+#endif /* HPSA_DEBUG */
+        writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
+        h->commands_outstanding++;
+        if (h->commands_outstanding > h->max_outstanding)
+                h->max_outstanding = h->commands_outstanding;
+}
+
+/*
+ *  This card is the opposite of the other cards.
+ *   0 turns interrupts on...
+ *   0x08 turns them off...
+ */
+static void SA5_intr_mask(struct ctlr_info *h, unsigned long val)
+{
+        if (val) { /* Turn interrupts on */
+                h->interrupts_enabled = 1;
+                writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
+        } else { /* Turn them off */
+                h->interrupts_enabled = 0;
+                writel(SA5_INTR_OFF,
+                        h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
+        }
+}
+/*
+ *  Returns true if fifo is full.
+ *
+ */
+static unsigned long SA5_fifo_full(struct ctlr_info *h)
+{
+        if (h->commands_outstanding >= h->max_commands)
+                return 1;
+        else
+                return 0;
+
+}
+/*
+ *   returns value read from hardware.
+ *     returns FIFO_EMPTY if there is nothing to read
+ */
+static unsigned long SA5_completed(struct ctlr_info *h)
+{
+        unsigned long register_value
+                = readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
+
+        if (register_value != FIFO_EMPTY)
+                h->commands_outstanding--;
+
+#ifdef HPSA_DEBUG
+        if (register_value != FIFO_EMPTY)
+                printk(KERN_INFO "hpsa:  Read %lx back from board\n",
+                        register_value);
+        else
+                printk(KERN_INFO "hpsa:  FIFO Empty read\n");
+#endif
+
+        return register_value;
+}
+/*
+ *      Returns true if an interrupt is pending..
+ */
+static unsigned long SA5_intr_pending(struct ctlr_info *h)
+{
+        unsigned long register_value  =
+                readl(h->vaddr + SA5_INTR_STATUS);
+#ifdef HPSA_DEBUG
+        printk(KERN_INFO "hpsa: intr_pending %lx\n", register_value);
+#endif  /* HPSA_DEBUG */
+        if (register_value &  SA5_INTR_PENDING)
+                return  1;
+        return 0 ;
+}
+
+
+static struct access_method SA5_access = {
+        SA5_submit_command,
+        SA5_intr_mask,
+        SA5_fifo_full,
+        SA5_intr_pending,
+        SA5_completed,
+};
+
+struct board_type {
+        __u32   board_id;
+        char    *product_name;
+        struct access_method *access;
+};
+
+
+/* end of old hpsa_scsi.h file */
+
+#endif /* HPSA_H */
+
diff --git a/drivers/scsi/hpsa_cmd.h b/drivers/scsi/hpsa_cmd.h
new file mode 100644
index 000000000000..12d71387ed9a
--- /dev/null
+++ b/drivers/scsi/hpsa_cmd.h
@@ -0,0 +1,326 @@
+/*
+ *    Disk Array driver for HP Smart Array SAS controllers
+ *    Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
+ *
+ *    This program is free software; you can redistribute it and/or modify
+ *    it under the terms of the GNU General Public License as published by
+ *    the Free Software Foundation; version 2 of the License.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ *    NON INFRINGEMENT.  See the GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
+ *
+ */
+#ifndef HPSA_CMD_H
+#define HPSA_CMD_H
+
+/* general boundary defintions */
+#define SENSEINFOBYTES          32 /* may vary between hbas */
+#define MAXSGENTRIES            31
+#define MAXREPLYQS              256
+
+/* Command Status value */
+#define CMD_SUCCESS             0x0000
+#define CMD_TARGET_STATUS       0x0001
+#define CMD_DATA_UNDERRUN       0x0002
+#define CMD_DATA_OVERRUN        0x0003
+#define CMD_INVALID             0x0004
+#define CMD_PROTOCOL_ERR        0x0005
+#define CMD_HARDWARE_ERR        0x0006
+#define CMD_CONNECTION_LOST     0x0007
+#define CMD_ABORTED             0x0008
+#define CMD_ABORT_FAILED        0x0009
+#define CMD_UNSOLICITED_ABORT   0x000A
+#define CMD_TIMEOUT             0x000B
+#define CMD_UNABORTABLE         0x000C
+
+/* Unit Attentions ASC's as defined for the MSA2012sa */
+#define POWER_OR_RESET                  0x29
+#define STATE_CHANGED                   0x2a
+#define UNIT_ATTENTION_CLEARED          0x2f
+#define LUN_FAILED                      0x3e
+#define REPORT_LUNS_CHANGED             0x3f
+
+/* Unit Attentions ASCQ's as defined for the MSA2012sa */
+
+        /* These ASCQ's defined for ASC = POWER_OR_RESET */
+#define POWER_ON_RESET                  0x00
+#define POWER_ON_REBOOT                 0x01
+#define SCSI_BUS_RESET                  0x02
+#define MSA_TARGET_RESET                0x03
+#define CONTROLLER_FAILOVER             0x04
+#define TRANSCEIVER_SE                  0x05
+#define TRANSCEIVER_LVD                 0x06
+
+        /* These ASCQ's defined for ASC = STATE_CHANGED */
+#define RESERVATION_PREEMPTED           0x03
+#define ASYM_ACCESS_CHANGED             0x06
+#define LUN_CAPACITY_CHANGED            0x09
+
+/* transfer direction */
+#define XFER_NONE               0x00
+#define XFER_WRITE              0x01
+#define XFER_READ               0x02
+#define XFER_RSVD               0x03
+
+/* task attribute */
+#define ATTR_UNTAGGED           0x00
+#define ATTR_SIMPLE             0x04
+#define ATTR_HEADOFQUEUE        0x05
+#define ATTR_ORDERED            0x06
+#define ATTR_ACA                0x07
+
+/* cdb type */
+#define TYPE_CMD                                0x00
+#define TYPE_MSG                                0x01
+
+/* config space register offsets */
+#define CFG_VENDORID            0x00
+#define CFG_DEVICEID            0x02
+#define CFG_I2OBAR              0x10
+#define CFG_MEM1BAR             0x14
+
+/* i2o space register offsets */
+#define I2O_IBDB_SET            0x20
+#define I2O_IBDB_CLEAR          0x70
+#define I2O_INT_STATUS          0x30
+#define I2O_INT_MASK            0x34
+#define I2O_IBPOST_Q            0x40
+#define I2O_OBPOST_Q            0x44
+#define I2O_DMA1_CFG            0x214
+
+/* Configuration Table */
+#define CFGTBL_ChangeReq        0x00000001l
+#define CFGTBL_AccCmds          0x00000001l
+
+#define CFGTBL_Trans_Simple     0x00000002l
+
+#define CFGTBL_BusType_Ultra2   0x00000001l
+#define CFGTBL_BusType_Ultra3   0x00000002l
+#define CFGTBL_BusType_Fibre1G  0x00000100l
+#define CFGTBL_BusType_Fibre2G  0x00000200l
+struct vals32 {
+        __u32   lower;
+        __u32   upper;
+};
+
+union u64bit {
+        struct vals32 val32;
+        __u64 val;
+};
+
+/* FIXME this is a per controller value (barf!) */
+#define HPSA_MAX_TARGETS_PER_CTLR 16
+#define HPSA_MAX_LUN 256
+#define HPSA_MAX_PHYS_LUN 1024
+
+/* SCSI-3 Commands */
+#pragma pack(1)
+
+#define HPSA_INQUIRY 0x12
+struct InquiryData {
+        __u8 data_byte[36];
+};
+
+#define HPSA_REPORT_LOG 0xc2    /* Report Logical LUNs */
+#define HPSA_REPORT_PHYS 0xc3   /* Report Physical LUNs */
+struct ReportLUNdata {
+        __u8 LUNListLength[4];
+        __u32 reserved;
+        __u8 LUN[HPSA_MAX_LUN][8];
+};
+
+struct ReportExtendedLUNdata {
+        __u8 LUNListLength[4];
+        __u8 extended_response_flag;
+        __u8 reserved[3];
+        __u8 LUN[HPSA_MAX_LUN][24];
+};
+
+struct SenseSubsystem_info {
+        __u8 reserved[36];
+        __u8 portname[8];
+        __u8 reserved1[1108];
+};
+
+#define HPSA_READ_CAPACITY 0x25 /* Read Capacity */
+struct ReadCapdata {
+        __u8 total_size[4];     /* Total size in blocks */
+        __u8 block_size[4];     /* Size of blocks in bytes */
+};
+
+#if 0
+/* 12 byte commands not implemented in firmware yet. */
+#define HPSA_READ       0xa8
+#define HPSA_WRITE      0xaa
+#endif
+
+#define HPSA_READ   0x28    /* Read(10) */
+#define HPSA_WRITE  0x2a    /* Write(10) */
+
+/* BMIC commands */
+#define BMIC_READ 0x26
+#define BMIC_WRITE 0x27
+#define BMIC_CACHE_FLUSH 0xc2
+#define HPSA_CACHE_FLUSH 0x01   /* C2 was already being used by HPSA */
+
+/* Command List Structure */
+union SCSI3Addr {
+        struct {
+                __u8 Dev;
+                __u8 Bus:6;
+                __u8 Mode:2;        /* b00 */
+        } PeripDev;
+        struct {
+                __u8 DevLSB;
+                __u8 DevMSB:6;
+                __u8 Mode:2;        /* b01 */
+        } LogDev;
+        struct {
+                __u8 Dev:5;
+                __u8 Bus:3;
+                __u8 Targ:6;
+                __u8 Mode:2;        /* b10 */
+        } LogUnit;
+};
+
+struct PhysDevAddr {
+        __u32             TargetId:24;
+        __u32             Bus:6;
+        __u32             Mode:2;
+        /* 2 level target device addr */
+        union SCSI3Addr  Target[2];
+};
+
+struct LogDevAddr {
+        __u32            VolId:30;
+        __u32            Mode:2;
+        __u8             reserved[4];
+};
+
+union LUNAddr {
+        __u8               LunAddrBytes[8];
+        union SCSI3Addr    SCSI3Lun[4];
+        struct PhysDevAddr PhysDev;
+        struct LogDevAddr  LogDev;
+};
+
+struct CommandListHeader {
+        __u8              ReplyQueue;
+        __u8              SGList;
+        __u16             SGTotal;
+        struct vals32     Tag;
+        union LUNAddr     LUN;
+};
+
+struct RequestBlock {
+        __u8   CDBLen;
+        struct {
+                __u8 Type:3;
+                __u8 Attribute:3;
+                __u8 Direction:2;
+        } Type;
+        __u16  Timeout;
+        __u8   CDB[16];
+};
+
+struct ErrDescriptor {
+        struct vals32 Addr;
+        __u32  Len;
+};
+
+struct SGDescriptor {
+        struct vals32 Addr;
+        __u32  Len;
+        __u32  Ext;
+};
+
+union MoreErrInfo {
+        struct {
+                __u8  Reserved[3];
+                __u8  Type;
+                __u32 ErrorInfo;
+        } Common_Info;
+        struct {
+                __u8  Reserved[2];
+                __u8  offense_size; /* size of offending entry */
+                __u8  offense_num;  /* byte # of offense 0-base */
+                __u32 offense_value;
+        } Invalid_Cmd;
+};
+struct ErrorInfo {
+        __u8               ScsiStatus;
+        __u8               SenseLen;
+        __u16              CommandStatus;
+        __u32              ResidualCnt;
+        union MoreErrInfo  MoreErrInfo;
+        __u8               SenseInfo[SENSEINFOBYTES];
+};
+/* Command types */
+#define CMD_IOCTL_PEND  0x01
+#define CMD_SCSI        0x03
+
+struct ctlr_info; /* defined in hpsa.h */
+/* The size of this structure needs to be divisible by 8
+ * od on all architectures, because the controller uses 2
+ * lower bits of the address, and the driver uses 1 lower
+ * bit (3 bits total.)
+ */
+struct CommandList {
+        struct CommandListHeader Header;
+        struct RequestBlock      Request;
+        struct ErrDescriptor     ErrDesc;
+        struct SGDescriptor      SG[MAXSGENTRIES];
+        /* information associated with the command */
+        __u32                      busaddr; /* physical addr of this record */
+        struct ErrorInfo *err_info; /* pointer to the allocated mem */
+        struct ctlr_info           *h;
+        int                        cmd_type;
+        long                       cmdindex;
+        struct hlist_node list;
+        struct CommandList *prev;
+        struct CommandList *next;
+        struct request *rq;
+        struct completion *waiting;
+        int      retry_count;
+        void   *scsi_cmd;
+};
+
+/* Configuration Table Structure */
+struct HostWrite {
+        __u32 TransportRequest;
+        __u32 Reserved;
+        __u32 CoalIntDelay;
+        __u32 CoalIntCount;
+};
+
+struct CfgTable {
+        __u8             Signature[4];
+        __u32            SpecValence;
+        __u32            TransportSupport;
+        __u32            TransportActive;
+        struct HostWrite HostWrite;
+        __u32            CmdsOutMax;
+        __u32            BusTypes;
+        __u32            Reserved;
+        __u8             ServerName[16];
+        __u32            HeartBeat;
+        __u32            SCSI_Prefetch;
+};
+
+struct hpsa_pci_info {
+        unsigned char   bus;
+        unsigned char   dev_fn;
+        unsigned short  domain;
+        __u32           board_id;
+};
+
+#pragma pack()
+#endif /* HPSA_CMD_H */
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 8643f5089361..9e52d16c7c39 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -6521,6 +6521,7 @@ static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
         int rc;
 
         ENTER;
+        ioa_cfg->pdev->state_saved = true;
         rc = pci_restore_state(ioa_cfg->pdev);
 
         if (rc != PCIBIOS_SUCCESSFUL) {
diff --git a/drivers/scsi/libfc/fc_fcp.c b/drivers/scsi/libfc/fc_fcp.c
index c4b58d042f6f..881d5dfe8c74 100644
--- a/drivers/scsi/libfc/fc_fcp.c
+++ b/drivers/scsi/libfc/fc_fcp.c
@@ -68,18 +68,20 @@ struct kmem_cache *scsi_pkt_cachep;
 
 /**
  * struct fc_fcp_internal - FCP layer internal data
- * @scsi_pkt_pool:  Memory pool to draw FCP packets from
+ * @scsi_pkt_pool: Memory pool to draw FCP packets from
+ * @scsi_queue_lock: Protects the scsi_pkt_queue
  * @scsi_pkt_queue: Current FCP packets
  * @last_can_queue_ramp_down_time: ramp down time
  * @last_can_queue_ramp_up_time: ramp up time
  * @max_can_queue: max can_queue size
  */
 struct fc_fcp_internal {
-        mempool_t        *scsi_pkt_pool;
-        struct list_head scsi_pkt_queue;
-        unsigned long last_can_queue_ramp_down_time;
-        unsigned long last_can_queue_ramp_up_time;
-        int max_can_queue;
+        mempool_t               *scsi_pkt_pool;
+        spinlock_t              scsi_queue_lock;
+        struct list_head        scsi_pkt_queue;
+        unsigned long           last_can_queue_ramp_down_time;
+        unsigned long           last_can_queue_ramp_up_time;
+        int                     max_can_queue;
 };
 
 #define fc_get_scsi_internal(x) ((struct fc_fcp_internal *)(x)->scsi_priv)
@@ -410,12 +412,14 @@ static inline struct fc_frame *fc_fcp_frame_alloc(struct fc_lport *lport,
         unsigned long flags;
 
         fp = fc_frame_alloc(lport, len);
-        if (!fp) {
-                spin_lock_irqsave(lport->host->host_lock, flags);
-                fc_fcp_can_queue_ramp_down(lport);
-                spin_unlock_irqrestore(lport->host->host_lock, flags);
-        }
-        return fp;
+        if (likely(fp))
+                return fp;
+
+        /* error case */
+        spin_lock_irqsave(lport->host->host_lock, flags);
+        fc_fcp_can_queue_ramp_down(lport);
+        spin_unlock_irqrestore(lport->host->host_lock, flags);
+        return NULL;
 }
 
 /**
@@ -990,7 +994,7 @@ static void fc_fcp_cleanup_each_cmd(struct fc_lport *lport, unsigned int id,
         struct scsi_cmnd *sc_cmd;
         unsigned long flags;
 
-        spin_lock_irqsave(lport->host->host_lock, flags);
+        spin_lock_irqsave(&si->scsi_queue_lock, flags);
 restart:
         list_for_each_entry(fsp, &si->scsi_pkt_queue, list) {
                 sc_cmd = fsp->cmd;
@@ -1001,7 +1005,7 @@ restart:
                         continue;
 
                 fc_fcp_pkt_hold(fsp);
-                spin_unlock_irqrestore(lport->host->host_lock, flags);
+                spin_unlock_irqrestore(&si->scsi_queue_lock, flags);
 
                 if (!fc_fcp_lock_pkt(fsp)) {
                         fc_fcp_cleanup_cmd(fsp, error);
@@ -1010,14 +1014,14 @@ restart:
                 }
 
                 fc_fcp_pkt_release(fsp);
-                spin_lock_irqsave(lport->host->host_lock, flags);
+                spin_lock_irqsave(&si->scsi_queue_lock, flags);
                 /*
                  * while we dropped the lock multiple pkts could
                  * have been released, so we have to start over.
                  */
                 goto restart;
         }
-        spin_unlock_irqrestore(lport->host->host_lock, flags);
+        spin_unlock_irqrestore(&si->scsi_queue_lock, flags);
 }
 
 /**
@@ -1035,11 +1039,12 @@ static void fc_fcp_abort_io(struct fc_lport *lport)
  * @fsp:   The FCP packet to send
  *
  * Return:  Zero for success and -1 for failure
- * Locks:   Called with the host lock and irqs disabled.
+ * Locks:   Called without locks held
  */
 static int fc_fcp_pkt_send(struct fc_lport *lport, struct fc_fcp_pkt *fsp)
 {
         struct fc_fcp_internal *si = fc_get_scsi_internal(lport);
+        unsigned long flags;
         int rc;
 
         fsp->cmd->SCp.ptr = (char *)fsp;
@@ -1049,13 +1054,16 @@ static int fc_fcp_pkt_send(struct fc_lport *lport, struct fc_fcp_pkt *fsp)
         int_to_scsilun(fsp->cmd->device->lun,
                        (struct scsi_lun *)fsp->cdb_cmd.fc_lun);
         memcpy(fsp->cdb_cmd.fc_cdb, fsp->cmd->cmnd, fsp->cmd->cmd_len);
-        list_add_tail(&fsp->list, &si->scsi_pkt_queue);
 
-        spin_unlock_irq(lport->host->host_lock);
+        spin_lock_irqsave(&si->scsi_queue_lock, flags);
+        list_add_tail(&fsp->list, &si->scsi_pkt_queue);
+        spin_unlock_irqrestore(&si->scsi_queue_lock, flags);
         rc = lport->tt.fcp_cmd_send(lport, fsp, fc_fcp_recv);
-        spin_lock_irq(lport->host->host_lock);
-        if (rc)
+        if (unlikely(rc)) {
+                spin_lock_irqsave(&si->scsi_queue_lock, flags);
                 list_del(&fsp->list);
+                spin_unlock_irqrestore(&si->scsi_queue_lock, flags);
+        }
 
         return rc;
 }
@@ -1752,6 +1760,7 @@ int fc_queuecommand(struct scsi_cmnd *sc_cmd, void (*done)(struct scsi_cmnd *))
         struct fcoe_dev_stats *stats;
 
         lport = shost_priv(sc_cmd->device->host);
+        spin_unlock_irq(lport->host->host_lock);
 
         rval = fc_remote_port_chkready(rport);
         if (rval) {
@@ -1834,6 +1843,7 @@ int fc_queuecommand(struct scsi_cmnd *sc_cmd, void (*done)(struct scsi_cmnd *))
                 rc = SCSI_MLQUEUE_HOST_BUSY;
         }
 out:
+        spin_lock_irq(lport->host->host_lock);
         return rc;
 }
 EXPORT_SYMBOL(fc_queuecommand);
@@ -1864,11 +1874,8 @@ static void fc_io_compl(struct fc_fcp_pkt *fsp)
 
         lport = fsp->lp;
         si = fc_get_scsi_internal(lport);
-        spin_lock_irqsave(lport->host->host_lock, flags);
-        if (!fsp->cmd) {
-                spin_unlock_irqrestore(lport->host->host_lock, flags);
+        if (!fsp->cmd)
                 return;
-        }
 
         /*
          * if can_queue ramp down is done then try can_queue ramp up
@@ -1880,10 +1887,8 @@ static void fc_io_compl(struct fc_fcp_pkt *fsp)
         sc_cmd = fsp->cmd;
         fsp->cmd = NULL;
 
-        if (!sc_cmd->SCp.ptr) {
-                spin_unlock_irqrestore(lport->host->host_lock, flags);
+        if (!sc_cmd->SCp.ptr)
                 return;
-        }
 
         CMD_SCSI_STATUS(sc_cmd) = fsp->cdb_status;
         switch (fsp->status_code) {
@@ -1945,10 +1950,11 @@ static void fc_io_compl(struct fc_fcp_pkt *fsp)
                 break;
         }
 
+        spin_lock_irqsave(&si->scsi_queue_lock, flags);
         list_del(&fsp->list);
+        spin_unlock_irqrestore(&si->scsi_queue_lock, flags);
         sc_cmd->SCp.ptr = NULL;
         sc_cmd->scsi_done(sc_cmd);
-        spin_unlock_irqrestore(lport->host->host_lock, flags);
 
         /* release ref from initial allocation in queue command */
         fc_fcp_pkt_release(fsp);
@@ -2216,6 +2222,7 @@ int fc_fcp_init(struct fc_lport *lport)
         lport->scsi_priv = si;
         si->max_can_queue = lport->host->can_queue;
         INIT_LIST_HEAD(&si->scsi_pkt_queue);
+        spin_lock_init(&si->scsi_queue_lock);
 
         si->scsi_pkt_pool = mempool_create_slab_pool(2, scsi_pkt_cachep);
         if (!si->scsi_pkt_pool) {
diff --git a/drivers/scsi/libfc/fc_lport.c b/drivers/scsi/libfc/fc_lport.c
index 74338c83ad0a..0b165024a219 100644
--- a/drivers/scsi/libfc/fc_lport.c
+++ b/drivers/scsi/libfc/fc_lport.c
@@ -537,7 +537,9 @@ int fc_fabric_login(struct fc_lport *lport)
         int rc = -1;
 
         mutex_lock(&lport->lp_mutex);
-        if (lport->state == LPORT_ST_DISABLED) {
+        if (lport->state == LPORT_ST_DISABLED ||
+            lport->state == LPORT_ST_LOGO) {
+                fc_lport_state_enter(lport, LPORT_ST_RESET);
                 fc_lport_enter_reset(lport);
                 rc = 0;
         }
@@ -967,6 +969,9 @@ static void fc_lport_enter_reset(struct fc_lport *lport)
         FC_LPORT_DBG(lport, "Entered RESET state from %s state\n",
                      fc_lport_state(lport));
 
+        if (lport->state == LPORT_ST_DISABLED || lport->state == LPORT_ST_LOGO)
+                return;
+
         if (lport->vport) {
                 if (lport->link_up)
                         fc_vport_set_state(lport->vport, FC_VPORT_INITIALIZING);
diff --git a/drivers/scsi/libfc/fc_rport.c b/drivers/scsi/libfc/fc_rport.c
index 35ca0e72df46..02300523b234 100644
--- a/drivers/scsi/libfc/fc_rport.c
+++ b/drivers/scsi/libfc/fc_rport.c
@@ -310,6 +310,7 @@ static void fc_rport_work(struct work_struct *work)
                                 restart = 1;
                         else
                                 list_del(&rdata->peers);
+                        rdata->event = RPORT_EV_NONE;
                         mutex_unlock(&rdata->rp_mutex);
                         mutex_unlock(&lport->disc.disc_mutex);
                 }
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index 226920d15ea1..d4da6bdd0e73 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -4506,9 +4506,13 @@ lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
                 pdev = phba->pcidev;
 
         /* Set the device DMA mask size */
-        if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0)
-                if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
+        if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
+         || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
+                if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
+                 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
                         return error;
+                }
+        }
 
         /* Get the bus address of Bar0 and Bar2 and the number of bytes
          * required by each mapping.
@@ -6021,9 +6025,13 @@ lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
                 pdev = phba->pcidev;
 
         /* Set the device DMA mask size */
-        if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0)
-                if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
+        if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
+         || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
+                if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
+                 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
                         return error;
+                }
+        }
 
         /* Get the bus address of SLI4 device Bar0, Bar1, and Bar2 and the
          * number of bytes required by each mapping. They are actually
diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c
index 134c63ef6d38..99ff99e45bee 100644
--- a/drivers/scsi/megaraid/megaraid_sas.c
+++ b/drivers/scsi/megaraid/megaraid_sas.c
@@ -2501,7 +2501,9 @@ static int megasas_init_mfi(struct megasas_instance *instance)
                 instance->base_addr = pci_resource_start(instance->pdev, 0);
         }
 
-        if (pci_request_regions(instance->pdev, "megasas: LSI")) {
+        if (pci_request_selected_regions(instance->pdev,
+                pci_select_bars(instance->pdev, IORESOURCE_MEM),
+                "megasas: LSI")) {
                 printk(KERN_DEBUG "megasas: IO memory region busy!\n");
                 return -EBUSY;
         }
@@ -2642,7 +2644,8 @@ static int megasas_init_mfi(struct megasas_instance *instance)
         iounmap(instance->reg_set);
 
       fail_ioremap:
-        pci_release_regions(instance->pdev);
+        pci_release_selected_regions(instance->pdev,
+                pci_select_bars(instance->pdev, IORESOURCE_MEM));
 
         return -EINVAL;
 }
@@ -2662,7 +2665,8 @@ static void megasas_release_mfi(struct megasas_instance *instance)
 
         iounmap(instance->reg_set);
 
-        pci_release_regions(instance->pdev);
+        pci_release_selected_regions(instance->pdev,
+                pci_select_bars(instance->pdev, IORESOURCE_MEM));
 }
 
 /**
@@ -2971,7 +2975,7 @@ megasas_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
         /*
          * PCI prepping: enable device set bus mastering and dma mask
          */
-        rval = pci_enable_device(pdev);
+        rval = pci_enable_device_mem(pdev);
 
         if (rval) {
                 return rval;
@@ -3276,7 +3280,7 @@ megasas_resume(struct pci_dev *pdev)
         /*
          * PCI prepping: enable device set bus mastering and dma mask
          */
-        rval = pci_enable_device(pdev);
+        rval = pci_enable_device_mem(pdev);
 
         if (rval) {
                 printk(KERN_ERR "megasas: Enable device failed\n");
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.c b/drivers/scsi/mpt2sas/mpt2sas_base.c
index 6422e258fd52..89d02401b9ec 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_base.c
+++ b/drivers/scsi/mpt2sas/mpt2sas_base.c
@@ -3583,6 +3583,11 @@ mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
         ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
         mutex_init(&ioc->transport_cmds.mutex);
 
+        /* scsih internal command bits */
+        ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
+        ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
+        mutex_init(&ioc->scsih_cmds.mutex);
+
         /* task management internal command bits */
         ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
         ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
diff --git a/drivers/scsi/mvsas/mv_init.c b/drivers/scsi/mvsas/mv_init.c
index c790d45876c4..cae6b2cf492f 100644
--- a/drivers/scsi/mvsas/mv_init.c
+++ b/drivers/scsi/mvsas/mv_init.c
@@ -657,6 +657,7 @@ static struct pci_device_id __devinitdata mvs_pci_table[] = {
         { PCI_VDEVICE(MARVELL, 0x9180), chip_9180 },
         { PCI_VDEVICE(ARECA, PCI_DEVICE_ID_ARECA_1300), chip_1300 },
         { PCI_VDEVICE(ARECA, PCI_DEVICE_ID_ARECA_1320), chip_1320 },
+        { PCI_VDEVICE(ADAPTEC2, 0x0450), chip_6440 },
 
         { }     /* terminate list */
 };
diff --git a/drivers/scsi/osd/osd_initiator.c b/drivers/scsi/osd/osd_initiator.c
index 950202a70bcf..24223473f573 100644
--- a/drivers/scsi/osd/osd_initiator.c
+++ b/drivers/scsi/osd/osd_initiator.c
@@ -432,30 +432,23 @@ static void _osd_free_seg(struct osd_request *or __unused,
         seg->alloc_size = 0;
 }
 
-static void _put_request(struct request *rq , bool is_async)
+static void _put_request(struct request *rq)
 {
-        if (is_async) {
-                WARN_ON(rq->bio);
-                __blk_put_request(rq->q, rq);
-        } else {
-                /*
-                 * If osd_finalize_request() was called but the request was not
-                 * executed through the block layer, then we must release BIOs.
-                 * TODO: Keep error code in or->async_error. Need to audit all
-                 *       code paths.
-                 */
-                if (unlikely(rq->bio))
-                        blk_end_request(rq, -ENOMEM, blk_rq_bytes(rq));
-                else
-                        blk_put_request(rq);
-        }
+        /*
+         * If osd_finalize_request() was called but the request was not
+         * executed through the block layer, then we must release BIOs.
+         * TODO: Keep error code in or->async_error. Need to audit all
+         *       code paths.
+         */
+        if (unlikely(rq->bio))
+                blk_end_request(rq, -ENOMEM, blk_rq_bytes(rq));
+        else
+                blk_put_request(rq);
 }
 
 void osd_end_request(struct osd_request *or)
 {
         struct request *rq = or->request;
-        /* IMPORTANT: make sure this agrees with osd_execute_request_async */
-        bool is_async = (or->request->end_io_data == or);
 
         _osd_free_seg(or, &or->set_attr);
         _osd_free_seg(or, &or->enc_get_attr);
@@ -463,20 +456,34 @@ void osd_end_request(struct osd_request *or)
 
         if (rq) {
                 if (rq->next_rq) {
-                        _put_request(rq->next_rq, is_async);
+                        _put_request(rq->next_rq);
                         rq->next_rq = NULL;
                 }
 
-                _put_request(rq, is_async);
+                _put_request(rq);
         }
         _osd_request_free(or);
 }
 EXPORT_SYMBOL(osd_end_request);
 
+static void _set_error_resid(struct osd_request *or, struct request *req,
+                             int error)
+{
+        or->async_error = error;
+        or->req_errors = req->errors ? : error;
+        or->sense_len = req->sense_len;
+        if (or->out.req)
+                or->out.residual = or->out.req->resid_len;
+        if (or->in.req)
+                or->in.residual = or->in.req->resid_len;
+}
+
 int osd_execute_request(struct osd_request *or)
 {
-        return or->async_error =
-                        blk_execute_rq(or->request->q, NULL, or->request, 0);
+        int error = blk_execute_rq(or->request->q, NULL, or->request, 0);
+
+        _set_error_resid(or, or->request, error);
+        return error;
 }
 EXPORT_SYMBOL(osd_execute_request);
 
@@ -484,15 +491,17 @@ static void osd_request_async_done(struct request *req, int error)
 {
         struct osd_request *or = req->end_io_data;
 
-        or->async_error = error;
-
-        if (unlikely(error)) {
-                OSD_DEBUG("osd_request_async_done error recieved %d "
-                          "errors 0x%x\n", error, req->errors);
-                if (!req->errors) /* don't miss out on this one */
-                        req->errors = error;
+        _set_error_resid(or, req, error);
+        if (req->next_rq) {
+                __blk_put_request(req->q, req->next_rq);
+                req->next_rq = NULL;
         }
 
+        __blk_put_request(req->q, req);
+        or->request = NULL;
+        or->in.req = NULL;
+        or->out.req = NULL;
+
         if (or->async_done)
                 or->async_done(or, or->async_private);
         else
@@ -1489,21 +1498,18 @@ int osd_req_decode_sense_full(struct osd_request *or,
 #endif
         int ret;
 
-        if (likely(!or->request->errors)) {
-                osi->out_resid = 0;
-                osi->in_resid = 0;
+        if (likely(!or->req_errors))
                 return 0;
-        }
 
         osi = osi ? : &local_osi;
         memset(osi, 0, sizeof(*osi));
 
-        ssdb = or->request->sense;
-        sense_len = or->request->sense_len;
+        ssdb = (typeof(ssdb))or->sense;
+        sense_len = or->sense_len;
         if ((sense_len < (int)sizeof(*ssdb) || !ssdb->sense_key)) {
                 OSD_ERR("Block-layer returned error(0x%x) but "
                         "sense_len(%u) || key(%d) is empty\n",
-                        or->request->errors, sense_len, ssdb->sense_key);
+                        or->req_errors, sense_len, ssdb->sense_key);
                 goto analyze;
         }
 
@@ -1525,7 +1531,7 @@ int osd_req_decode_sense_full(struct osd_request *or,
                         "additional_code=0x%x async_error=%d errors=0x%x\n",
                         osi->key, original_sense_len, sense_len,
                         osi->additional_code, or->async_error,
-                        or->request->errors);
+                        or->req_errors);
 
         if (original_sense_len < sense_len)
                 sense_len = original_sense_len;
@@ -1695,10 +1701,10 @@ analyze:
                 ret = -EIO;
         }
 
-        if (or->out.req)
-                osi->out_resid = or->out.req->resid_len ?: or->out.total_bytes;
-        if (or->in.req)
-                osi->in_resid = or->in.req->resid_len ?: or->in.total_bytes;
+        if (!or->out.residual)
+                or->out.residual = or->out.total_bytes;
+        if (!or->in.residual)
+                or->in.residual = or->in.total_bytes;
 
         return ret;
 }
diff --git a/drivers/scsi/pm8001/pm8001_ctl.h b/drivers/scsi/pm8001/pm8001_ctl.h
index 22644de26399..63ad4aa0c422 100644
--- a/drivers/scsi/pm8001/pm8001_ctl.h
+++ b/drivers/scsi/pm8001/pm8001_ctl.h
@@ -45,16 +45,6 @@
 #define HEADER_LEN                      28
 #define SIZE_OFFSET                     16
 
-struct pm8001_ioctl_payload {
-        u32     signature;
-        u16     major_function;
-        u16     minor_function;
-        u16     length;
-        u16     status;
-        u16     offset;
-        u16     id;
-        u8      func_specific[1];
-};
 
 #define FLASH_OK                        0x000000
 #define FAIL_OPEN_BIOS_FILE             0x000100
diff --git a/drivers/scsi/pm8001/pm8001_hwi.c b/drivers/scsi/pm8001/pm8001_hwi.c
index a3de306b9045..9b44c6f1b10e 100644
--- a/drivers/scsi/pm8001/pm8001_hwi.c
+++ b/drivers/scsi/pm8001/pm8001_hwi.c
@@ -373,10 +373,7 @@ static int bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue)
 static void __devinit
 mpi_set_phys_g3_with_ssc(struct pm8001_hba_info *pm8001_ha, u32 SSCbit)
 {
-        u32 offset;
-        u32 value;
-        u32 i, j;
-        u32 bit_cnt;
+        u32 value, offset, i;
 
 #define SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR 0x00030000
 #define SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR 0x00040000
@@ -392,55 +389,35 @@ mpi_set_phys_g3_with_ssc(struct pm8001_hba_info *pm8001_ha, u32 SSCbit)
     */
         if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR))
                 return;
-        /* set SSC bit of PHY 0 - 3 */
+
         for (i = 0; i < 4; i++) {
                 offset = SAS2_SETTINGS_LOCAL_PHY_0_3_OFFSET + 0x4000 * i;
-                value = pm8001_cr32(pm8001_ha, 2, offset);
-                if (SSCbit) {
-                        value |= 0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT;
-                        value &= ~(0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT);
-                } else {
-                        value |= 0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT;
-                        value &= ~(0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT);
-                }
-                bit_cnt = 0;
-                for (j = 0; j < 31; j++)
-                        if ((value >> j) & 0x00000001)
-                                bit_cnt++;
-                if (bit_cnt % 2)
-                        value &= ~(0x00000001 << SNW3_PHY_CAPABILITIES_PARITY);
-                else
-                        value |= 0x00000001 << SNW3_PHY_CAPABILITIES_PARITY;
-
-                pm8001_cw32(pm8001_ha, 2, offset, value);
+                pm8001_cw32(pm8001_ha, 2, offset, 0x80001501);
         }
-
         /* shift membase 3 for SAS2_SETTINGS_LOCAL_PHY 4 - 7 */
         if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR))
                 return;
-
-        /* set SSC bit of PHY 4 - 7 */
         for (i = 4; i < 8; i++) {
                 offset = SAS2_SETTINGS_LOCAL_PHY_4_7_OFFSET + 0x4000 * (i-4);
-                value = pm8001_cr32(pm8001_ha, 2, offset);
-                if (SSCbit) {
-                        value |= 0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT;
-                        value &= ~(0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT);
-                } else {
-                        value |= 0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT;
-                        value &= ~(0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT);
-                }
-                bit_cnt = 0;
-                for (j = 0; j < 31; j++)
-                        if ((value >> j) & 0x00000001)
-                                bit_cnt++;
-                if (bit_cnt % 2)
-                        value &= ~(0x00000001 << SNW3_PHY_CAPABILITIES_PARITY);
-                else
-                        value |= 0x00000001 << SNW3_PHY_CAPABILITIES_PARITY;
-
-                pm8001_cw32(pm8001_ha, 2, offset, value);
+                pm8001_cw32(pm8001_ha, 2, offset, 0x80001501);
         }
+        /*************************************************************
+        Change the SSC upspreading value to 0x0 so that upspreading is disabled.
+        Device MABC SMOD0 Controls
+        Address: (via MEMBASE-III):
+        Using shifted destination address 0x0_0000: with Offset 0xD8
+
+        31:28 R/W Reserved Do not change
+        27:24 R/W SAS_SMOD_SPRDUP 0000
+        23:20 R/W SAS_SMOD_SPRDDN 0000
+        19:0  R/W  Reserved Do not change
+        Upon power-up this register will read as 0x8990c016,
+        and I would like you to change the SAS_SMOD_SPRDUP bits to 0b0000
+        so that the written value will be 0x8090c016.
+        This will ensure only down-spreading SSC is enabled on the SPC.
+        *************************************************************/
+        value = pm8001_cr32(pm8001_ha, 2, 0xd8);
+        pm8001_cw32(pm8001_ha, 2, 0xd8, 0x8000C016);
 
         /*set the shifted destination address to 0x0 to avoid error operation */
         bar4_shift(pm8001_ha, 0x0);
@@ -1901,7 +1878,7 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
 {
         struct sas_task *t;
         struct pm8001_ccb_info *ccb;
-        unsigned long flags;
+        unsigned long flags = 0;
         u32 param;
         u32 status;
         u32 tag;
@@ -2040,7 +2017,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
                         ts->stat = SAS_QUEUE_FULL;
                         pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
                         mb();/*in order to force CPU ordering*/
+                        spin_unlock_irqrestore(&pm8001_ha->lock, flags);
                         t->task_done(t);
+                        spin_lock_irqsave(&pm8001_ha->lock, flags);
                         return;
                 }
                 break;
@@ -2058,7 +2037,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
                         ts->stat = SAS_QUEUE_FULL;
                         pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
                         mb();/*ditto*/
+                        spin_unlock_irqrestore(&pm8001_ha->lock, flags);
                         t->task_done(t);
+                        spin_lock_irqsave(&pm8001_ha->lock, flags);
                         return;
                 }
                 break;
@@ -2084,7 +2065,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
                         ts->stat = SAS_QUEUE_FULL;
                         pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
                         mb();/* ditto*/
+                        spin_unlock_irqrestore(&pm8001_ha->lock, flags);
                         t->task_done(t);
+                        spin_lock_irqsave(&pm8001_ha->lock, flags);
                         return;
                 }
                 break;
@@ -2149,7 +2132,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
                         ts->stat = SAS_QUEUE_FULL;
                         pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
                         mb();/*ditto*/
+                        spin_unlock_irqrestore(&pm8001_ha->lock, flags);
                         t->task_done(t);
+                        spin_lock_irqsave(&pm8001_ha->lock, flags);
                         return;
                 }
                 break;
@@ -2171,7 +2156,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
                         ts->stat = SAS_QUEUE_FULL;
                         pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
                         mb();/*ditto*/
+                        spin_unlock_irqrestore(&pm8001_ha->lock, flags);
                         t->task_done(t);
+                        spin_lock_irqsave(&pm8001_ha->lock, flags);
                         return;
                 }
                 break;
@@ -2200,11 +2187,20 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
                         " resp 0x%x stat 0x%x but aborted by upper layer!\n",
                         t, status, ts->resp, ts->stat));
                 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
-        } else {
+        } else if (t->uldd_task) {
                 spin_unlock_irqrestore(&t->task_state_lock, flags);
                 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
                 mb();/* ditto */
+                spin_unlock_irqrestore(&pm8001_ha->lock, flags);
                 t->task_done(t);
+                spin_lock_irqsave(&pm8001_ha->lock, flags);
+        } else if (!t->uldd_task) {
+                spin_unlock_irqrestore(&t->task_state_lock, flags);
+                pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+                mb();/*ditto*/
+                spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+                t->task_done(t);
+                spin_lock_irqsave(&pm8001_ha->lock, flags);
         }
 }
 
@@ -2212,7 +2208,7 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
 static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
 {
         struct sas_task *t;
-        unsigned long flags;
+        unsigned long flags = 0;
         struct task_status_struct *ts;
         struct pm8001_ccb_info *ccb;
         struct pm8001_device *pm8001_dev;
@@ -2292,7 +2288,9 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
                         ts->stat = SAS_QUEUE_FULL;
                         pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
                         mb();/*ditto*/
+                        spin_unlock_irqrestore(&pm8001_ha->lock, flags);
                         t->task_done(t);
+                        spin_lock_irqsave(&pm8001_ha->lock, flags);
                         return;
                 }
                 break;
@@ -2401,11 +2399,20 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
                         " resp 0x%x stat 0x%x but aborted by upper layer!\n",
                         t, event, ts->resp, ts->stat));
                 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
-        } else {
+        } else if (t->uldd_task) {
                 spin_unlock_irqrestore(&t->task_state_lock, flags);
                 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
-                mb();/* in order to force CPU ordering */
+                mb();/* ditto */
+                spin_unlock_irqrestore(&pm8001_ha->lock, flags);
                 t->task_done(t);
+                spin_lock_irqsave(&pm8001_ha->lock, flags);
+        } else if (!t->uldd_task) {
+                spin_unlock_irqrestore(&t->task_state_lock, flags);
+                pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
+                mb();/*ditto*/
+                spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+                t->task_done(t);
+                spin_lock_irqsave(&pm8001_ha->lock, flags);
         }
 }
 
@@ -2876,15 +2883,20 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
                 le32_to_cpu(pPayload->lr_evt_status_phyid_portid);
         u8 link_rate =
                 (u8)((lr_evt_status_phyid_portid & 0xF0000000) >> 28);
+        u8 port_id = (u8)(lr_evt_status_phyid_portid & 0x0000000F);
         u8 phy_id =
                 (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4);
+        u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate);
+        u8 portstate = (u8)(npip_portstate & 0x0000000F);
+        struct pm8001_port *port = &pm8001_ha->port[port_id];
         struct sas_ha_struct *sas_ha = pm8001_ha->sas;
         struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
         unsigned long flags;
         u8 deviceType = pPayload->sas_identify.dev_type;
-
+        port->port_state =  portstate;
         PM8001_MSG_DBG(pm8001_ha,
-                pm8001_printk("HW_EVENT_SAS_PHY_UP \n"));
+                pm8001_printk("HW_EVENT_SAS_PHY_UP port id = %d, phy id = %d\n",
+                port_id, phy_id));
 
         switch (deviceType) {
         case SAS_PHY_UNUSED:
@@ -2895,16 +2907,19 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
                 PM8001_MSG_DBG(pm8001_ha, pm8001_printk("end device.\n"));
                 pm8001_chip_phy_ctl_req(pm8001_ha, phy_id,
                         PHY_NOTIFY_ENABLE_SPINUP);
+                port->port_attached = 1;
                 get_lrate_mode(phy, link_rate);
                 break;
         case SAS_EDGE_EXPANDER_DEVICE:
                 PM8001_MSG_DBG(pm8001_ha,
                         pm8001_printk("expander device.\n"));
+                port->port_attached = 1;
                 get_lrate_mode(phy, link_rate);
                 break;
         case SAS_FANOUT_EXPANDER_DEVICE:
                 PM8001_MSG_DBG(pm8001_ha,
                         pm8001_printk("fanout expander device.\n"));
+                port->port_attached = 1;
                 get_lrate_mode(phy, link_rate);
                 break;
         default:
@@ -2946,11 +2961,20 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
                 le32_to_cpu(pPayload->lr_evt_status_phyid_portid);
         u8 link_rate =
                 (u8)((lr_evt_status_phyid_portid & 0xF0000000) >> 28);
+        u8 port_id = (u8)(lr_evt_status_phyid_portid & 0x0000000F);
         u8 phy_id =
                 (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4);
+        u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate);
+        u8 portstate = (u8)(npip_portstate & 0x0000000F);
+        struct pm8001_port *port = &pm8001_ha->port[port_id];
         struct sas_ha_struct *sas_ha = pm8001_ha->sas;
         struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
         unsigned long flags;
+        PM8001_MSG_DBG(pm8001_ha,
+                pm8001_printk("HW_EVENT_SATA_PHY_UP port id = %d,"
+                " phy id = %d\n", port_id, phy_id));
+        port->port_state =  portstate;
+        port->port_attached = 1;
         get_lrate_mode(phy, link_rate);
         phy->phy_type |= PORT_TYPE_SATA;
         phy->phy_attached = 1;
@@ -2984,7 +3008,13 @@ hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb)
                 (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4);
         u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate);
         u8 portstate = (u8)(npip_portstate & 0x0000000F);
-
+        struct pm8001_port *port = &pm8001_ha->port[port_id];
+        struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
+        port->port_state =  portstate;
+        phy->phy_type = 0;
+        phy->identify.device_type = 0;
+        phy->phy_attached = 0;
+        memset(&phy->dev_sas_addr, 0, SAS_ADDR_SIZE);
         switch (portstate) {
         case PORT_VALID:
                 break;
@@ -2993,26 +3023,30 @@ hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb)
                         pm8001_printk(" PortInvalid portID %d \n", port_id));
                 PM8001_MSG_DBG(pm8001_ha,
                         pm8001_printk(" Last phy Down and port invalid\n"));
+                port->port_attached = 0;
                 pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN,
                         port_id, phy_id, 0, 0);
                 break;
         case PORT_IN_RESET:
                 PM8001_MSG_DBG(pm8001_ha,
-                        pm8001_printk(" PortInReset portID %d \n", port_id));
+                        pm8001_printk(" Port In Reset portID %d \n", port_id));
                 break;
         case PORT_NOT_ESTABLISHED:
                 PM8001_MSG_DBG(pm8001_ha,
                         pm8001_printk(" phy Down and PORT_NOT_ESTABLISHED\n"));
+                port->port_attached = 0;
                 break;
         case PORT_LOSTCOMM:
                 PM8001_MSG_DBG(pm8001_ha,
                         pm8001_printk(" phy Down and PORT_LOSTCOMM\n"));
                 PM8001_MSG_DBG(pm8001_ha,
                         pm8001_printk(" Last phy Down and port invalid\n"));
+                port->port_attached = 0;
                 pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN,
                         port_id, phy_id, 0, 0);
                 break;
         default:
+                port->port_attached = 0;
                 PM8001_MSG_DBG(pm8001_ha,
                         pm8001_printk(" phy Down and(default) = %x\n",
                         portstate));
@@ -3770,7 +3804,8 @@ static int pm8001_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha,
         u32 opc = OPC_INB_SSPINIIOSTART;
         memset(&ssp_cmd, 0, sizeof(ssp_cmd));
         memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8);
-        ssp_cmd.dir_m_tlr = data_dir_flags[task->data_dir] << 8 | 0x0;/*0 for
+        ssp_cmd.dir_m_tlr =
+                cpu_to_le32(data_dir_flags[task->data_dir] << 8 | 0x0);/*0 for
         SAS 1.1 compatible TLR*/
         ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len);
         ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id);
@@ -3841,7 +3876,7 @@ static int pm8001_chip_sata_req(struct pm8001_hba_info *pm8001_ha,
                 }
         }
         if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag))
-                ncg_tag = cpu_to_le32(hdr_tag);
+                ncg_tag = hdr_tag;
         dir = data_dir_flags[task->data_dir] << 8;
         sata_cmd.tag = cpu_to_le32(tag);
         sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id);
@@ -3986,7 +4021,7 @@ static int pm8001_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha,
                 ((stp_sspsmp_sata & 0x03) * 0x10000000));
         payload.firstburstsize_ITNexustimeout =
                 cpu_to_le32(ITNT | (firstBurstSize * 0x10000));
-        memcpy(&payload.sas_addr_hi, pm8001_dev->sas_device->sas_addr,
+        memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr,
                 SAS_ADDR_SIZE);
         rc = mpi_build_cmd(pm8001_ha, circularQ, opc, &payload);
         return rc;
@@ -4027,7 +4062,7 @@ static int pm8001_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha,
         struct inbound_queue_table *circularQ;
         int ret;
         u32 opc = OPC_INB_LOCAL_PHY_CONTROL;
-        memset((u8 *)&payload, 0, sizeof(payload));
+        memset(&payload, 0, sizeof(payload));
         circularQ = &pm8001_ha->inbnd_q_tbl[0];
         payload.tag = 1;
         payload.phyop_phyid =
diff --git a/drivers/scsi/pm8001/pm8001_hwi.h b/drivers/scsi/pm8001/pm8001_hwi.h
index 96e4daa68b8f..833a5201eda4 100644
--- a/drivers/scsi/pm8001/pm8001_hwi.h
+++ b/drivers/scsi/pm8001/pm8001_hwi.h
@@ -242,8 +242,7 @@ struct reg_dev_req {
         __le32  phyid_portid;
         __le32  dtype_dlr_retry;
         __le32  firstburstsize_ITNexustimeout;
-        u32     sas_addr_hi;
-        u32     sas_addr_low;
+        u8      sas_addr[SAS_ADDR_SIZE];
         __le32  upper_device_id;
         u32     reserved[8];
 } __attribute__((packed, aligned(4)));
diff --git a/drivers/scsi/pm8001/pm8001_init.c b/drivers/scsi/pm8001/pm8001_init.c
index 42ebe725d5a5..c2f1032496cb 100644
--- a/drivers/scsi/pm8001/pm8001_init.c
+++ b/drivers/scsi/pm8001/pm8001_init.c
@@ -200,8 +200,13 @@ static int __devinit pm8001_alloc(struct pm8001_hba_info *pm8001_ha)
 {
         int i;
         spin_lock_init(&pm8001_ha->lock);
-        for (i = 0; i < pm8001_ha->chip->n_phy; i++)
+        for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
                 pm8001_phy_init(pm8001_ha, i);
+                pm8001_ha->port[i].wide_port_phymap = 0;
+                pm8001_ha->port[i].port_attached = 0;
+                pm8001_ha->port[i].port_state = 0;
+                INIT_LIST_HEAD(&pm8001_ha->port[i].list);
+        }
 
         pm8001_ha->tags = kzalloc(PM8001_MAX_CCB, GFP_KERNEL);
         if (!pm8001_ha->tags)
@@ -511,19 +516,23 @@ static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
         u8 i;
 #ifdef PM8001_READ_VPD
         DECLARE_COMPLETION_ONSTACK(completion);
+        struct pm8001_ioctl_payload payload;
         pm8001_ha->nvmd_completion = &completion;
-        PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, 0, 0);
+        payload.minor_function = 0;
+        payload.length = 128;
+        payload.func_specific = kzalloc(128, GFP_KERNEL);
+        PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload);
         wait_for_completion(&completion);
         for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
                 memcpy(&pm8001_ha->phy[i].dev_sas_addr, pm8001_ha->sas_addr,
                         SAS_ADDR_SIZE);
                 PM8001_INIT_DBG(pm8001_ha,
-                        pm8001_printk("phy %d sas_addr = %x \n", i,
-                        (u64)pm8001_ha->phy[i].dev_sas_addr));
+                        pm8001_printk("phy %d sas_addr = %016llx \n", i,
+                        pm8001_ha->phy[i].dev_sas_addr));
         }
 #else
         for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
-                pm8001_ha->phy[i].dev_sas_addr = 0x500e004010000004ULL;
+                pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL;
                 pm8001_ha->phy[i].dev_sas_addr =
                         cpu_to_be64((u64)
                                 (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr));
diff --git a/drivers/scsi/pm8001/pm8001_sas.c b/drivers/scsi/pm8001/pm8001_sas.c
index 1f767a0e727a..7f9c83a76390 100644
--- a/drivers/scsi/pm8001/pm8001_sas.c
+++ b/drivers/scsi/pm8001/pm8001_sas.c
@@ -329,6 +329,23 @@ int pm8001_slave_configure(struct scsi_device *sdev)
         }
         return 0;
 }
+ /* Find the local port id that's attached to this device */
+static int sas_find_local_port_id(struct domain_device *dev)
+{
+        struct domain_device *pdev = dev->parent;
+
+        /* Directly attached device */
+        if (!pdev)
+                return dev->port->id;
+        while (pdev) {
+                struct domain_device *pdev_p = pdev->parent;
+                if (!pdev_p)
+                        return pdev->port->id;
+                pdev = pdev->parent;
+        }
+        return 0;
+}
+
 /**
   * pm8001_task_exec - queue the task(ssp, smp && ata) to the hardware.
   * @task: the task to be execute.
@@ -346,11 +363,12 @@ static int pm8001_task_exec(struct sas_task *task, const int num,
         struct domain_device *dev = task->dev;
         struct pm8001_hba_info *pm8001_ha;
         struct pm8001_device *pm8001_dev;
+        struct pm8001_port *port = NULL;
         struct sas_task *t = task;
         struct pm8001_ccb_info *ccb;
         u32 tag = 0xdeadbeef, rc, n_elem = 0;
         u32 n = num;
-        unsigned long flags = 0;
+        unsigned long flags = 0, flags_libsas = 0;
 
         if (!dev->port) {
                 struct task_status_struct *tsm = &t->task_status;
@@ -379,6 +397,35 @@ static int pm8001_task_exec(struct sas_task *task, const int num,
                         rc = SAS_PHY_DOWN;
                         goto out_done;
                 }
+                port = &pm8001_ha->port[sas_find_local_port_id(dev)];
+                if (!port->port_attached) {
+                        if (sas_protocol_ata(t->task_proto)) {
+                                struct task_status_struct *ts = &t->task_status;
+                                ts->resp = SAS_TASK_UNDELIVERED;
+                                ts->stat = SAS_PHY_DOWN;
+
+                                spin_unlock_irqrestore(&pm8001_ha->lock, flags);
+                                spin_unlock_irqrestore(dev->sata_dev.ap->lock,
+                                                flags_libsas);
+                                t->task_done(t);
+                                spin_lock_irqsave(dev->sata_dev.ap->lock,
+                                        flags_libsas);
+                                spin_lock_irqsave(&pm8001_ha->lock, flags);
+                                if (n > 1)
+                                        t = list_entry(t->list.next,
+                                                        struct sas_task, list);
+                                continue;
+                        } else {
+                                struct task_status_struct *ts = &t->task_status;
+                                ts->resp = SAS_TASK_UNDELIVERED;
+                                ts->stat = SAS_PHY_DOWN;
+                                t->task_done(t);
+                                if (n > 1)
+                                        t = list_entry(t->list.next,
+                                                        struct sas_task, list);
+                                continue;
+                        }
+                }
                 rc = pm8001_tag_alloc(pm8001_ha, &tag);
                 if (rc)
                         goto err_out;
@@ -569,11 +616,11 @@ static int pm8001_dev_found_notify(struct domain_device *dev)
         spin_lock_irqsave(&pm8001_ha->lock, flags);
 
         pm8001_device = pm8001_alloc_dev(pm8001_ha);
-        pm8001_device->sas_device = dev;
         if (!pm8001_device) {
                 res = -1;
                 goto found_out;
         }
+        pm8001_device->sas_device = dev;
         dev->lldd_dev = pm8001_device;
         pm8001_device->dev_type = dev->dev_type;
         pm8001_device->dcompletion = &completion;
@@ -609,7 +656,7 @@ static int pm8001_dev_found_notify(struct domain_device *dev)
         wait_for_completion(&completion);
         if (dev->dev_type == SAS_END_DEV)
                 msleep(50);
-        pm8001_ha->flags = PM8001F_RUN_TIME ;
+        pm8001_ha->flags |= PM8001F_RUN_TIME ;
         return 0;
 found_out:
         spin_unlock_irqrestore(&pm8001_ha->lock, flags);
@@ -772,7 +819,7 @@ pm8001_exec_internal_task_abort(struct pm8001_hba_info *pm8001_ha,
                 task->task_done = pm8001_task_done;
                 task->timer.data = (unsigned long)task;
                 task->timer.function = pm8001_tmf_timedout;
-                task->timer.expires = jiffies + PM8001_TASK_TIMEOUT*HZ;
+                task->timer.expires = jiffies + PM8001_TASK_TIMEOUT * HZ;
                 add_timer(&task->timer);
 
                 res = pm8001_tag_alloc(pm8001_ha, &ccb_tag);
@@ -897,6 +944,8 @@ int pm8001_I_T_nexus_reset(struct domain_device *dev)
 
         if (dev_is_sata(dev)) {
                 DECLARE_COMPLETION_ONSTACK(completion_setstate);
+                if (scsi_is_sas_phy_local(phy))
+                        return 0;
                 rc = sas_phy_reset(phy, 1);
                 msleep(2000);
                 rc = pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev ,
diff --git a/drivers/scsi/pm8001/pm8001_sas.h b/drivers/scsi/pm8001/pm8001_sas.h
index 30f2ede55a75..8e38ca8cd101 100644
--- a/drivers/scsi/pm8001/pm8001_sas.h
+++ b/drivers/scsi/pm8001/pm8001_sas.h
@@ -59,11 +59,11 @@
 
 #define DRV_NAME                "pm8001"
 #define DRV_VERSION             "0.1.36"
-#define PM8001_FAIL_LOGGING     0x01 /* libsas EH function logging */
+#define PM8001_FAIL_LOGGING     0x01 /* Error message logging */
 #define PM8001_INIT_LOGGING     0x02 /* driver init logging */
 #define PM8001_DISC_LOGGING     0x04 /* discovery layer logging */
 #define PM8001_IO_LOGGING       0x08 /* I/O path logging */
-#define PM8001_EH_LOGGING       0x10 /* Error message logging */
+#define PM8001_EH_LOGGING       0x10 /* libsas EH function logging*/
 #define PM8001_IOCTL_LOGGING    0x20 /* IOCTL message logging */
 #define PM8001_MSG_LOGGING      0x40 /* misc message logging */
 #define pm8001_printk(format, arg...)   printk(KERN_INFO "%s %d:" format,\
@@ -100,6 +100,7 @@ do {						\
 
 #define PM8001_USE_TASKLET
 #define PM8001_USE_MSIX
+#define PM8001_READ_VPD
 
 
 #define DEV_IS_EXPANDER(type)   ((type == EDGE_DEV) || (type == FANOUT_DEV))
@@ -111,7 +112,22 @@ extern const struct pm8001_dispatch pm8001_8001_dispatch;
 struct pm8001_hba_info;
 struct pm8001_ccb_info;
 struct pm8001_device;
-struct pm8001_tmf_task;
+/* define task management IU */
+struct pm8001_tmf_task {
+        u8      tmf;
+        u32     tag_of_task_to_be_managed;
+};
+struct pm8001_ioctl_payload {
+        u32     signature;
+        u16     major_function;
+        u16     minor_function;
+        u16     length;
+        u16     status;
+        u16     offset;
+        u16     id;
+        u8      *func_specific;
+};
+
 struct pm8001_dispatch {
         char *name;
         int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
@@ -164,6 +180,10 @@ struct pm8001_chip_info {
 
 struct pm8001_port {
         struct asd_sas_port     sas_port;
+        u8                      port_attached;
+        u8                      wide_port_phymap;
+        u8                      port_state;
+        struct list_head        list;
 };
 
 struct pm8001_phy {
@@ -386,11 +406,7 @@ struct pm8001_fw_image_header {
         __be32 startup_entry;
 } __attribute__((packed, aligned(4)));
 
-/* define task management IU */
-struct pm8001_tmf_task {
-        u8      tmf;
-        u32     tag_of_task_to_be_managed;
-};
+
 /**
  * FW Flash Update status values
  */
diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c
index 34c6b896a91b..e7d2688fbeba 100644
--- a/drivers/scsi/pmcraid.c
+++ b/drivers/scsi/pmcraid.c
@@ -1,7 +1,8 @@
 /*
  * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
  *
- * Written By: PMC Sierra Corporation
+ * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
+ *             PMC-Sierra Inc
  *
  * Copyright (C) 2008, 2009 PMC Sierra Inc
  *
@@ -79,7 +80,7 @@ DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
 /*
  * Module parameters
  */
-MODULE_AUTHOR("PMC Sierra Corporation, anil_ravindranath@pmc-sierra.com");
+MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
 MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
 MODULE_LICENSE("GPL");
 MODULE_VERSION(PMCRAID_DRIVER_VERSION);
@@ -162,10 +163,10 @@ static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
         spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
         list_for_each_entry(temp, &pinstance->used_res_q, queue) {
 
-                /* do not expose VSETs with order-ids >= 240 */
+                /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
                 if (RES_IS_VSET(temp->cfg_entry)) {
                         target = temp->cfg_entry.unique_flags1;
-                        if (target >= PMCRAID_MAX_VSET_TARGETS)
+                        if (target > PMCRAID_MAX_VSET_TARGETS)
                                 continue;
                         bus = PMCRAID_VSET_BUS_ID;
                         lun = 0;
@@ -1210,7 +1211,7 @@ static int pmcraid_expose_resource(struct pmcraid_config_table_entry *cfgte)
         int retval = 0;
 
         if (cfgte->resource_type == RES_TYPE_VSET)
-                retval = ((cfgte->unique_flags1 & 0xFF) < 0xFE);
+                retval = ((cfgte->unique_flags1 & 0x80) == 0);
         else if (cfgte->resource_type == RES_TYPE_GSCSI)
                 retval = (RES_BUS(cfgte->resource_address) !=
                                 PMCRAID_VIRTUAL_ENCL_BUS_ID);
@@ -1361,6 +1362,7 @@ static int pmcraid_notify_aen(struct pmcraid_instance *pinstance, u8 type)
  * Return value:
  *  none
  */
+
 static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
 {
         struct pmcraid_config_table_entry *cfg_entry;
@@ -1368,9 +1370,10 @@ static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
         struct pmcraid_cmd *cmd;
         struct pmcraid_cmd *cfgcmd;
         struct pmcraid_resource_entry *res = NULL;
-        u32 new_entry = 1;
         unsigned long lock_flags;
         unsigned long host_lock_flags;
+        u32 new_entry = 1;
+        u32 hidden_entry = 0;
         int rc;
 
         ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
@@ -1406,9 +1409,15 @@ static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
         }
 
         /* If this resource is not going to be added to mid-layer, just notify
-         * applications and return
+         * applications and return. If this notification is about hiding a VSET
+         * resource, check if it was exposed already.
          */
-        if (!pmcraid_expose_resource(cfg_entry))
+        if (pinstance->ccn.hcam->notification_type ==
+            NOTIFICATION_TYPE_ENTRY_CHANGED &&
+            cfg_entry->resource_type == RES_TYPE_VSET &&
+            cfg_entry->unique_flags1 & 0x80) {
+                hidden_entry = 1;
+        } else if (!pmcraid_expose_resource(cfg_entry))
                 goto out_notify_apps;
 
         spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
@@ -1424,6 +1433,12 @@ static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
 
         if (new_entry) {
 
+                if (hidden_entry) {
+                        spin_unlock_irqrestore(&pinstance->resource_lock,
+                                                lock_flags);
+                        goto out_notify_apps;
+                }
+
                 /* If there are more number of resources than what driver can
                  * manage, do not notify the applications about the CCN. Just
                  * ignore this notifications and re-register the same HCAM
@@ -1454,8 +1469,9 @@ static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
                 sizeof(struct pmcraid_config_table_entry));
 
         if (pinstance->ccn.hcam->notification_type ==
-            NOTIFICATION_TYPE_ENTRY_DELETED) {
+            NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
                 if (res->scsi_dev) {
+                        res->cfg_entry.unique_flags1 &= 0x7F;
                         res->change_detected = RES_CHANGE_DEL;
                         res->cfg_entry.resource_handle =
                                 PMCRAID_INVALID_RES_HANDLE;
diff --git a/drivers/scsi/pmcraid.h b/drivers/scsi/pmcraid.h
index 2752b56cad56..92f89d50850c 100644
--- a/drivers/scsi/pmcraid.h
+++ b/drivers/scsi/pmcraid.h
@@ -1,6 +1,9 @@
 /*
  * pmcraid.h -- PMC Sierra MaxRAID controller driver header file
  *
+ * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
+ *             PMC-Sierra Inc
+ *
  * Copyright (C) 2008, 2009 PMC Sierra Inc.
  *
  * This program is free software; you can redistribute it and/or modify
@@ -106,7 +109,7 @@
 #define PMCRAID_VSET_LUN_ID                      0x0
 #define PMCRAID_PHYS_BUS_ID                      0x0
 #define PMCRAID_VIRTUAL_ENCL_BUS_ID              0x8
-#define PMCRAID_MAX_VSET_TARGETS                 240
+#define PMCRAID_MAX_VSET_TARGETS                 0x7F
 #define PMCRAID_MAX_VSET_LUNS_PER_TARGET         8
 
 #define PMCRAID_IOA_MAX_SECTORS                  32767
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
index 6b9bf23c7735..384afda7dbe9 100644
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -1570,9 +1570,6 @@ typedef struct fc_port {
         struct fc_rport *rport, *drport;
         u32 supported_classes;
 
-        unsigned long last_queue_full;
-        unsigned long last_ramp_up;
-
         uint16_t vp_idx;
 } fc_port_t;
 
@@ -2265,6 +2262,7 @@ struct qla_hw_data {
                 uint32_t        port0                   :1;
                 uint32_t        running_gold_fw         :1;
                 uint32_t        cpu_affinity_enabled    :1;
+                uint32_t        disable_msix_handshake  :1;
         } flags;
 
         /* This spinlock is used to protect "io transactions", you must
@@ -2387,6 +2385,7 @@ struct qla_hw_data {
 #define IS_QLA81XX(ha)          (IS_QLA8001(ha))
 #define IS_QLA2XXX_MIDTYPE(ha)  (IS_QLA24XX(ha) || IS_QLA84XX(ha) || \
                                 IS_QLA25XX(ha) || IS_QLA81XX(ha))
+#define IS_MSIX_NACK_CAPABLE(ha) (IS_QLA81XX(ha))
 #define IS_NOPOLLING_TYPE(ha)   ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && \
                                 (ha)->flags.msix_enabled)
 #define IS_FAC_REQUIRED(ha)     (IS_QLA81XX(ha))
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
index e21851358509..0b6801fc6389 100644
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -72,8 +72,6 @@ extern int ql2xloginretrycount;
 extern int ql2xfdmienable;
 extern int ql2xallocfwdump;
 extern int ql2xextended_error_logging;
-extern int ql2xqfullrampup;
-extern int ql2xqfulltracking;
 extern int ql2xiidmaenable;
 extern int ql2xmaxqueues;
 extern int ql2xmultique_tag;
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index b74924b279ef..73a793539d45 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -1442,7 +1442,17 @@ qla24xx_config_rings(struct scsi_qla_host *vha)
                         icb->firmware_options_2 |=
                                 __constant_cpu_to_le32(BIT_18);
 
-                icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22);
+                /* Use Disable MSIX Handshake mode for capable adapters */
+                if (IS_MSIX_NACK_CAPABLE(ha)) {
+                        icb->firmware_options_2 &=
+                                __constant_cpu_to_le32(~BIT_22);
+                        ha->flags.disable_msix_handshake = 1;
+                        qla_printk(KERN_INFO, ha,
+                                "MSIX Handshake Disable Mode turned on\n");
+                } else {
+                        icb->firmware_options_2 |=
+                                __constant_cpu_to_le32(BIT_22);
+                }
                 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
 
                 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
index 804987397b77..1692a883f4de 100644
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -811,78 +811,6 @@ skip_rio:
                 qla2x00_alert_all_vps(rsp, mb);
 }
 
-static void
-qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, void *data)
-{
-        fc_port_t *fcport = data;
-        struct scsi_qla_host *vha = fcport->vha;
-        struct qla_hw_data *ha = vha->hw;
-        struct req_que *req = NULL;
-
-        if (!ql2xqfulltracking)
-                return;
-
-        req = vha->req;
-        if (!req)
-                return;
-        if (req->max_q_depth <= sdev->queue_depth)
-                return;
-
-        if (sdev->ordered_tags)
-                scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG,
-                    sdev->queue_depth + 1);
-        else
-                scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG,
-                    sdev->queue_depth + 1);
-
-        fcport->last_ramp_up = jiffies;
-
-        DEBUG2(qla_printk(KERN_INFO, ha,
-            "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
-            fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
-            sdev->queue_depth));
-}
-
-static void
-qla2x00_adjust_sdev_qdepth_down(struct scsi_device *sdev, void *data)
-{
-        fc_port_t *fcport = data;
-
-        if (!scsi_track_queue_full(sdev, sdev->queue_depth - 1))
-                return;
-
-        DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
-            "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
-            fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
-            sdev->queue_depth));
-}
-
-static inline void
-qla2x00_ramp_up_queue_depth(scsi_qla_host_t *vha, struct req_que *req,
-                                                                srb_t *sp)
-{
-        fc_port_t *fcport;
-        struct scsi_device *sdev;
-
-        if (!ql2xqfulltracking)
-                return;
-
-        sdev = sp->cmd->device;
-        if (sdev->queue_depth >= req->max_q_depth)
-                return;
-
-        fcport = sp->fcport;
-        if (time_before(jiffies,
-            fcport->last_ramp_up + ql2xqfullrampup * HZ))
-                return;
-        if (time_before(jiffies,
-            fcport->last_queue_full + ql2xqfullrampup * HZ))
-                return;
-
-        starget_for_each_device(sdev->sdev_target, fcport,
-            qla2x00_adjust_sdev_qdepth_up);
-}
-
 /**
  * qla2x00_process_completed_request() - Process a Fast Post response.
  * @ha: SCSI driver HA context
@@ -913,8 +841,6 @@ qla2x00_process_completed_request(struct scsi_qla_host *vha,
 
                 /* Save ISP completion status */
                 sp->cmd->result = DID_OK << 16;
-
-                qla2x00_ramp_up_queue_depth(vha, req, sp);
                 qla2x00_sp_compl(ha, sp);
         } else {
                 DEBUG2(printk("scsi(%ld) Req:%d: Invalid ISP SCSI completion"
@@ -1435,13 +1361,6 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
                             "scsi(%ld): QUEUE FULL status detected "
                             "0x%x-0x%x.\n", vha->host_no, comp_status,
                             scsi_status));
-
-                        /* Adjust queue depth for all luns on the port. */
-                        if (!ql2xqfulltracking)
-                                break;
-                        fcport->last_queue_full = jiffies;
-                        starget_for_each_device(cp->device->sdev_target,
-                            fcport, qla2x00_adjust_sdev_qdepth_down);
                         break;
                 }
                 if (lscsi_status != SS_CHECK_CONDITION)
@@ -1516,17 +1435,6 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
                                     "scsi(%ld): QUEUE FULL status detected "
                                     "0x%x-0x%x.\n", vha->host_no, comp_status,
                                     scsi_status));
-
-                                /*
-                                 * Adjust queue depth for all luns on the
-                                 * port.
-                                 */
-                                if (!ql2xqfulltracking)
-                                        break;
-                                fcport->last_queue_full = jiffies;
-                                starget_for_each_device(
-                                    cp->device->sdev_target, fcport,
-                                    qla2x00_adjust_sdev_qdepth_down);
                                 break;
                         }
                         if (lscsi_status != SS_CHECK_CONDITION)
@@ -2020,7 +1928,7 @@ qla24xx_msix_rsp_q(int irq, void *dev_id)
 
         vha = qla25xx_get_host(rsp);
         qla24xx_process_response_queue(vha, rsp);
-        if (!ha->mqenable) {
+        if (!ha->flags.disable_msix_handshake) {
                 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
                 RD_REG_DWORD_RELAXED(&reg->hccr);
         }
@@ -2034,6 +1942,7 @@ qla25xx_msix_rsp_q(int irq, void *dev_id)
 {
         struct qla_hw_data *ha;
         struct rsp_que *rsp;
+        struct device_reg_24xx __iomem *reg;
 
         rsp = (struct rsp_que *) dev_id;
         if (!rsp) {
@@ -2043,6 +1952,14 @@ qla25xx_msix_rsp_q(int irq, void *dev_id)
         }
         ha = rsp->hw;
 
+        /* Clear the interrupt, if enabled, for this response queue */
+        if (rsp->options & ~BIT_6) {
+                reg = &ha->iobase->isp24;
+                spin_lock_irq(&ha->hardware_lock);
+                WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
+                RD_REG_DWORD_RELAXED(&reg->hccr);
+                spin_unlock_irq(&ha->hardware_lock);
+        }
         queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work);
 
         return IRQ_HANDLED;
diff --git a/drivers/scsi/qla2xxx/qla_mid.c b/drivers/scsi/qla2xxx/qla_mid.c
index a47d34308a3a..2a4c7f4e7b69 100644
--- a/drivers/scsi/qla2xxx/qla_mid.c
+++ b/drivers/scsi/qla2xxx/qla_mid.c
@@ -696,6 +696,10 @@ qla25xx_create_rsp_que(struct qla_hw_data *ha, uint16_t options,
         /* Use alternate PCI devfn */
         if (LSB(rsp->rid))
                 options |= BIT_5;
+        /* Enable MSIX handshake mode on for uncapable adapters */
+        if (!IS_MSIX_NACK_CAPABLE(ha))
+                options |= BIT_6;
+
         rsp->options = options;
         rsp->id = que_id;
         reg = ISP_QUE_REG(ha, que_id);
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index 41669357b186..2f873d237325 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -78,21 +78,6 @@ module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 MODULE_PARM_DESC(ql2xmaxqdepth,
                 "Maximum queue depth to report for target devices.");
 
-int ql2xqfulltracking = 1;
-module_param(ql2xqfulltracking, int, S_IRUGO|S_IWUSR);
-MODULE_PARM_DESC(ql2xqfulltracking,
-                "Controls whether the driver tracks queue full status "
-                "returns and dynamically adjusts a scsi device's queue "
-                "depth.  Default is 1, perform tracking.  Set to 0 to "
-                "disable dynamic tracking and adjustment of queue depth.");
-
-int ql2xqfullrampup = 120;
-module_param(ql2xqfullrampup, int, S_IRUGO|S_IWUSR);
-MODULE_PARM_DESC(ql2xqfullrampup,
-                "Number of seconds to wait to begin to ramp-up the queue "
-                "depth for a device after a queue-full condition has been "
-                "detected.  Default is 120 seconds.");
-
 int ql2xiidmaenable=1;
 module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
 MODULE_PARM_DESC(ql2xiidmaenable,
@@ -1217,13 +1202,61 @@ qla2xxx_slave_destroy(struct scsi_device *sdev)
         sdev->hostdata = NULL;
 }
 
+static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
+{
+        fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
+
+        if (!scsi_track_queue_full(sdev, qdepth))
+                return;
+
+        DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
+                "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
+                fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
+                sdev->queue_depth));
+}
+
+static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
+{
+        fc_port_t *fcport = sdev->hostdata;
+        struct scsi_qla_host *vha = fcport->vha;
+        struct qla_hw_data *ha = vha->hw;
+        struct req_que *req = NULL;
+
+        req = vha->req;
+        if (!req)
+                return;
+
+        if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
+                return;
+
+        if (sdev->ordered_tags)
+                scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
+        else
+                scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
+
+        DEBUG2(qla_printk(KERN_INFO, ha,
+               "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
+               fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
+               sdev->queue_depth));
+}
+
 static int
 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
 {
-        if (reason != SCSI_QDEPTH_DEFAULT)
-                return -EOPNOTSUPP;
+        switch (reason) {
+        case SCSI_QDEPTH_DEFAULT:
+                scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
+                break;
+        case SCSI_QDEPTH_QFULL:
+                qla2x00_handle_queue_full(sdev, qdepth);
+                break;
+        case SCSI_QDEPTH_RAMP_UP:
+                qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
+                break;
+        default:
+                return EOPNOTSUPP;
+        }
 
-        scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
         return sdev->queue_depth;
 }
 
@@ -2003,13 +2036,13 @@ skip_dpc:
         DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
             base_vha->host_no, ha));
 
-        base_vha->flags.init_done = 1;
-        base_vha->flags.online = 1;
-
         ret = scsi_add_host(host, &pdev->dev);
         if (ret)
                 goto probe_failed;
 
+        base_vha->flags.init_done = 1;
+        base_vha->flags.online = 1;
+
         ha->isp_ops->enable_intrs(ha);
 
         scsi_scan_host(host);
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h
index 807e0dbc67fa..c482220f7eed 100644
--- a/drivers/scsi/qla2xxx/qla_version.h
+++ b/drivers/scsi/qla2xxx/qla_version.h
@@ -7,7 +7,7 @@
 /*
  * Driver version
  */
-#define QLA2XXX_VERSION      "8.03.01-k7"
+#define QLA2XXX_VERSION      "8.03.01-k8"
 
 #define QLA_DRIVER_MAJOR_VER    8
 #define QLA_DRIVER_MINOR_VER    3
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index e495d3813948..d8927681ec88 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -859,6 +859,7 @@ void scsi_io_completion(struct scsi_cmnd *cmd, unsigned int good_bytes)
                                 case 0x07: /* operation in progress */
                                 case 0x08: /* Long write in progress */
                                 case 0x09: /* self test in progress */
+                                case 0x14: /* space allocation in progress */
                                         action = ACTION_DELAYED_RETRY;
                                         break;
                                 default:
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c
index 6531c91501be..ddfcecd5099f 100644
--- a/drivers/scsi/scsi_transport_fc.c
+++ b/drivers/scsi/scsi_transport_fc.c
@@ -649,11 +649,22 @@ static __init int fc_transport_init(void)
                 return error;
         error = transport_class_register(&fc_vport_class);
         if (error)
-                return error;
+                goto unreg_host_class;
         error = transport_class_register(&fc_rport_class);
         if (error)
-                return error;
-        return transport_class_register(&fc_transport_class);
+                goto unreg_vport_class;
+        error = transport_class_register(&fc_transport_class);
+        if (error)
+                goto unreg_rport_class;
+        return 0;
+
+unreg_rport_class:
+        transport_class_unregister(&fc_rport_class);
+unreg_vport_class:
+        transport_class_unregister(&fc_vport_class);
+unreg_host_class:
+        transport_class_unregister(&fc_host_class);
+        return error;
 }
 
 static void __exit fc_transport_exit(void)
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 9093c7261f33..255da53e5a01 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -264,6 +264,15 @@ sd_show_app_tag_own(struct device *dev, struct device_attribute *attr,
         return snprintf(buf, 20, "%u\n", sdkp->ATO);
 }
 
+static ssize_t
+sd_show_thin_provisioning(struct device *dev, struct device_attribute *attr,
+                          char *buf)
+{
+        struct scsi_disk *sdkp = to_scsi_disk(dev);
+
+        return snprintf(buf, 20, "%u\n", sdkp->thin_provisioning);
+}
+
 static struct device_attribute sd_disk_attrs[] = {
         __ATTR(cache_type, S_IRUGO|S_IWUSR, sd_show_cache_type,
                sd_store_cache_type),
@@ -274,6 +283,7 @@ static struct device_attribute sd_disk_attrs[] = {
                sd_store_manage_start_stop),
         __ATTR(protection_type, S_IRUGO, sd_show_protection_type, NULL),
         __ATTR(app_tag_own, S_IRUGO, sd_show_app_tag_own, NULL),
+        __ATTR(thin_provisioning, S_IRUGO, sd_show_thin_provisioning, NULL),
         __ATTR_NULL,
 };
 
@@ -399,6 +409,57 @@ static void sd_prot_op(struct scsi_cmnd *scmd, unsigned int dif)
 }
 
 /**
+ * sd_prepare_discard - unmap blocks on thinly provisioned device
+ * @rq: Request to prepare
+ *
+ * Will issue either UNMAP or WRITE SAME(16) depending on preference
+ * indicated by target device.
+ **/
+static int sd_prepare_discard(struct request *rq)
+{
+        struct scsi_disk *sdkp = scsi_disk(rq->rq_disk);
+        struct bio *bio = rq->bio;
+        sector_t sector = bio->bi_sector;
+        unsigned int num = bio_sectors(bio);
+
+        if (sdkp->device->sector_size == 4096) {
+                sector >>= 3;
+                num >>= 3;
+        }
+
+        rq->cmd_type = REQ_TYPE_BLOCK_PC;
+        rq->timeout = SD_TIMEOUT;
+
+        memset(rq->cmd, 0, rq->cmd_len);
+
+        if (sdkp->unmap) {
+                char *buf = kmap_atomic(bio_page(bio), KM_USER0);
+
+                rq->cmd[0] = UNMAP;
+                rq->cmd[8] = 24;
+                rq->cmd_len = 10;
+
+                /* Ensure that data length matches payload */
+                rq->__data_len = bio->bi_size = bio->bi_io_vec->bv_len = 24;
+
+                put_unaligned_be16(6 + 16, &buf[0]);
+                put_unaligned_be16(16, &buf[2]);
+                put_unaligned_be64(sector, &buf[8]);
+                put_unaligned_be32(num, &buf[16]);
+
+                kunmap_atomic(buf, KM_USER0);
+        } else {
+                rq->cmd[0] = WRITE_SAME_16;
+                rq->cmd[1] = 0x8; /* UNMAP */
+                put_unaligned_be64(sector, &rq->cmd[2]);
+                put_unaligned_be32(num, &rq->cmd[10]);
+                rq->cmd_len = 16;
+        }
+
+        return BLKPREP_OK;
+}
+
+/**
  *      sd_init_command - build a scsi (read or write) command from
  *      information in the request structure.
  *      @SCpnt: pointer to mid-level's per scsi command structure that
@@ -418,6 +479,13 @@ static int sd_prep_fn(struct request_queue *q, struct request *rq)
         int ret, host_dif;
         unsigned char protect;
 
+        /*
+         * Discard request come in as REQ_TYPE_FS but we turn them into
+         * block PC requests to make life easier.
+         */
+        if (blk_discard_rq(rq))
+                ret = sd_prepare_discard(rq);
+
         if (rq->cmd_type == REQ_TYPE_BLOCK_PC) {
                 ret = scsi_setup_blk_pc_cmnd(sdp, rq);
                 goto out;
@@ -1432,6 +1500,19 @@ static int read_capacity_16(struct scsi_disk *sdkp, struct scsi_device *sdp,
                 sd_printk(KERN_NOTICE, sdkp,
                           "physical block alignment offset: %u\n", alignment);
 
+        if (buffer[14] & 0x80) { /* TPE */
+                struct request_queue *q = sdp->request_queue;
+
+                sdkp->thin_provisioning = 1;
+                q->limits.discard_granularity = sdkp->hw_sector_size;
+                q->limits.max_discard_sectors = 0xffffffff;
+
+                if (buffer[14] & 0x40) /* TPRZ */
+                        q->limits.discard_zeroes_data = 1;
+
+                queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, q);
+        }
+
         sdkp->capacity = lba + 1;
         return sector_size;
 }
@@ -1863,6 +1944,7 @@ void sd_read_app_tag_own(struct scsi_disk *sdkp, unsigned char *buffer)
  */
 static void sd_read_block_limits(struct scsi_disk *sdkp)
 {
+        struct request_queue *q = sdkp->disk->queue;
         unsigned int sector_sz = sdkp->device->sector_size;
         char *buffer;
 
@@ -1877,6 +1959,31 @@ static void sd_read_block_limits(struct scsi_disk *sdkp)
         blk_queue_io_opt(sdkp->disk->queue,
                          get_unaligned_be32(&buffer[12]) * sector_sz);
 
+        /* Thin provisioning enabled and page length indicates TP support */
+        if (sdkp->thin_provisioning && buffer[3] == 0x3c) {
+                unsigned int lba_count, desc_count, granularity;
+
+                lba_count = get_unaligned_be32(&buffer[20]);
+                desc_count = get_unaligned_be32(&buffer[24]);
+
+                if (lba_count) {
+                        q->limits.max_discard_sectors =
+                                lba_count * sector_sz >> 9;
+
+                        if (desc_count)
+                                sdkp->unmap = 1;
+                }
+
+                granularity = get_unaligned_be32(&buffer[28]);
+
+                if (granularity)
+                        q->limits.discard_granularity = granularity * sector_sz;
+
+                if (buffer[32] & 0x80)
+                        q->limits.discard_alignment =
+                                get_unaligned_be32(&buffer[32]) & ~(1 << 31);
+        }
+
         kfree(buffer);
 }
 
diff --git a/drivers/scsi/sd.h b/drivers/scsi/sd.h
index e374804d26fb..43d3caf268ef 100644
--- a/drivers/scsi/sd.h
+++ b/drivers/scsi/sd.h
@@ -60,6 +60,8 @@ struct scsi_disk {
         unsigned        RCD : 1;        /* state of disk RCD bit, unused */
         unsigned        DPOFUA : 1;     /* state of disk DPOFUA bit */
         unsigned        first_scan : 1;
+        unsigned        thin_provisioning : 1;
+        unsigned        unmap : 1;
 };
 #define to_scsi_disk(obj) container_of(obj,struct scsi_disk,dev)
 
diff --git a/drivers/scsi/st.c b/drivers/scsi/st.c
index ad59abb47722..d04ea9a6f673 100644
--- a/drivers/scsi/st.c
+++ b/drivers/scsi/st.c
@@ -552,13 +552,15 @@ st_do_scsi(struct st_request * SRpnt, struct scsi_tape * STp, unsigned char *cmd
         SRpnt->waiting = waiting;
 
         if (STp->buffer->do_dio) {
+                mdata->page_order = 0;
                 mdata->nr_entries = STp->buffer->sg_segs;
                 mdata->pages = STp->buffer->mapped_pages;
         } else {
+                mdata->page_order = STp->buffer->reserved_page_order;
                 mdata->nr_entries =
                         DIV_ROUND_UP(bytes, PAGE_SIZE << mdata->page_order);
-                STp->buffer->map_data.pages = STp->buffer->reserved_pages;
-                STp->buffer->map_data.offset = 0;
+                mdata->pages = STp->buffer->reserved_pages;
+                mdata->offset = 0;
         }
 
         memcpy(SRpnt->cmd, cmd, sizeof(SRpnt->cmd));
@@ -3719,7 +3721,7 @@ static int enlarge_buffer(struct st_buffer * STbuffer, int new_size, int need_dm
                 priority |= __GFP_ZERO;
 
         if (STbuffer->frp_segs) {
-                order = STbuffer->map_data.page_order;
+                order = STbuffer->reserved_page_order;
                 b_size = PAGE_SIZE << order;
         } else {
                 for (b_size = PAGE_SIZE, order = 0;
@@ -3752,7 +3754,7 @@ static int enlarge_buffer(struct st_buffer * STbuffer, int new_size, int need_dm
                 segs++;
         }
         STbuffer->b_data = page_address(STbuffer->reserved_pages[0]);
-        STbuffer->map_data.page_order = order;
+        STbuffer->reserved_page_order = order;
 
         return 1;
 }
@@ -3765,7 +3767,7 @@ static void clear_buffer(struct st_buffer * st_bp)
 
         for (i=0; i < st_bp->frp_segs; i++)
                 memset(page_address(st_bp->reserved_pages[i]), 0,
-                       PAGE_SIZE << st_bp->map_data.page_order);
+                       PAGE_SIZE << st_bp->reserved_page_order);
         st_bp->cleared = 1;
 }
 
@@ -3773,7 +3775,7 @@ static void clear_buffer(struct st_buffer * st_bp)
 /* Release the extra buffer */
 static void normalize_buffer(struct st_buffer * STbuffer)
 {
-        int i, order = STbuffer->map_data.page_order;
+        int i, order = STbuffer->reserved_page_order;
 
         for (i = 0; i < STbuffer->frp_segs; i++) {
                 __free_pages(STbuffer->reserved_pages[i], order);
@@ -3781,7 +3783,7 @@ static void normalize_buffer(struct st_buffer * STbuffer)
         }
         STbuffer->frp_segs = 0;
         STbuffer->sg_segs = 0;
-        STbuffer->map_data.page_order = 0;
+        STbuffer->reserved_page_order = 0;
         STbuffer->map_data.offset = 0;
 }
 
@@ -3791,7 +3793,7 @@ static void normalize_buffer(struct st_buffer * STbuffer)
 static int append_to_buffer(const char __user *ubp, struct st_buffer * st_bp, int do_count)
 {
         int i, cnt, res, offset;
-        int length = PAGE_SIZE << st_bp->map_data.page_order;
+        int length = PAGE_SIZE << st_bp->reserved_page_order;
 
         for (i = 0, offset = st_bp->buffer_bytes;
              i < st_bp->frp_segs && offset >= length; i++)
@@ -3823,7 +3825,7 @@ static int append_to_buffer(const char __user *ubp, struct st_buffer * st_bp, in
 static int from_buffer(struct st_buffer * st_bp, char __user *ubp, int do_count)
 {
         int i, cnt, res, offset;
-        int length = PAGE_SIZE << st_bp->map_data.page_order;
+        int length = PAGE_SIZE << st_bp->reserved_page_order;
 
         for (i = 0, offset = st_bp->read_pointer;
              i < st_bp->frp_segs && offset >= length; i++)
@@ -3856,7 +3858,7 @@ static void move_buffer_data(struct st_buffer * st_bp, int offset)
 {
         int src_seg, dst_seg, src_offset = 0, dst_offset;
         int count, total;
-        int length = PAGE_SIZE << st_bp->map_data.page_order;
+        int length = PAGE_SIZE << st_bp->reserved_page_order;
 
         if (offset == 0)
                 return;
@@ -4578,7 +4580,6 @@ static int sgl_map_user_pages(struct st_buffer *STbp,
         }
 
         mdata->offset = uaddr & ~PAGE_MASK;
-        mdata->page_order = 0;
         STbp->mapped_pages = pages;
 
         return nr_pages;
diff --git a/drivers/scsi/st.h b/drivers/scsi/st.h
index 544dc6b1f548..f91a67c6d968 100644
--- a/drivers/scsi/st.h
+++ b/drivers/scsi/st.h
@@ -46,6 +46,7 @@ struct st_buffer {
         struct st_request *last_SRpnt;
         struct st_cmdstatus cmdstat;
         struct page **reserved_pages;
+        int reserved_page_order;
         struct page **mapped_pages;
         struct rq_map_data map_data;
         unsigned char *b_data;
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 2d9d70359360..f55eb0107336 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -216,6 +216,17 @@ config SPI_S3C24XX
         help
           SPI driver for Samsung S3C24XX series ARM SoCs
 
+config SPI_S3C24XX_FIQ
+        bool "S3C24XX driver with FIQ pseudo-DMA"
+        depends on SPI_S3C24XX
+        select FIQ
+        help
+          Enable FIQ support for the S3C24XX SPI driver to provide pseudo
+          DMA by using the fast-interrupt request framework, This allows
+          the driver to get DMA-like performance when there are either
+          no free DMA channels, or when doing transfers that required both
+          TX and RX data paths.
+
 config SPI_S3C24XX_GPIO
         tristate "Samsung S3C24XX series SPI by GPIO"
         depends on ARCH_S3C2410 && EXPERIMENTAL
@@ -226,6 +237,13 @@ config SPI_S3C24XX_GPIO
           the inbuilt hardware cannot provide the transfer mode, or
           where the board is using non hardware connected pins.
 
+config SPI_S3C64XX
+        tristate "Samsung S3C64XX series type SPI"
+        depends on ARCH_S3C64XX && EXPERIMENTAL
+        select S3C64XX_DMA
+        help
+          SPI driver for Samsung S3C64XX and newer SoCs.
+
 config SPI_SH_MSIOF
         tristate "SuperH MSIOF SPI controller"
         depends on SUPERH && HAVE_CLK
@@ -289,6 +307,16 @@ config SPI_NUC900
 # Add new SPI master controllers in alphabetical order above this line
 #
 
+config SPI_DESIGNWARE
+        bool "DesignWare SPI controller core support"
+        depends on SPI_MASTER
+        help
+          general driver for SPI controller core from DesignWare
+
+config SPI_DW_PCI
+        tristate "PCI interface driver for DW SPI core"
+        depends on SPI_DESIGNWARE && PCI
+
 #
 # There are lots of SPI device types, with sensors and memory
 # being probably the most widely used ones.
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index ed8c1675b52f..f3d2810ba11c 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -16,6 +16,8 @@ obj-$(CONFIG_SPI_BFIN)			+= spi_bfin5xx.o
 obj-$(CONFIG_SPI_BITBANG)               += spi_bitbang.o
 obj-$(CONFIG_SPI_AU1550)                += au1550_spi.o
 obj-$(CONFIG_SPI_BUTTERFLY)             += spi_butterfly.o
+obj-$(CONFIG_SPI_DESIGNWARE)            += dw_spi.o
+obj-$(CONFIG_SPI_DW_PCI)                += dw_spi_pci.o
 obj-$(CONFIG_SPI_GPIO)                  += spi_gpio.o
 obj-$(CONFIG_SPI_IMX)                   += spi_imx.o
 obj-$(CONFIG_SPI_LM70_LLP)              += spi_lm70llp.o
@@ -30,7 +32,8 @@ obj-$(CONFIG_SPI_MPC52xx)		+= mpc52xx_spi.o
 obj-$(CONFIG_SPI_MPC8xxx)               += spi_mpc8xxx.o
 obj-$(CONFIG_SPI_PPC4xx)                += spi_ppc4xx.o
 obj-$(CONFIG_SPI_S3C24XX_GPIO)          += spi_s3c24xx_gpio.o
-obj-$(CONFIG_SPI_S3C24XX)               += spi_s3c24xx.o
+obj-$(CONFIG_SPI_S3C24XX)               += spi_s3c24xx_hw.o
+obj-$(CONFIG_SPI_S3C64XX)               += spi_s3c64xx.o
 obj-$(CONFIG_SPI_TXX9)                  += spi_txx9.o
 obj-$(CONFIG_SPI_XILINX)                += xilinx_spi.o
 obj-$(CONFIG_SPI_XILINX_OF)             += xilinx_spi_of.o
@@ -39,6 +42,11 @@ obj-$(CONFIG_SPI_SH_SCI)		+= spi_sh_sci.o
 obj-$(CONFIG_SPI_SH_MSIOF)              += spi_sh_msiof.o
 obj-$(CONFIG_SPI_STMP3XXX)              += spi_stmp.o
 obj-$(CONFIG_SPI_NUC900)                += spi_nuc900.o
+
+# special build for s3c24xx spi driver with fiq support
+spi_s3c24xx_hw-y                        := spi_s3c24xx.o
+spi_s3c24xx_hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi_s3c24xx_fiq.o
+
 #       ... add above this line ...
 
 # SPI protocol drivers (device/link on bus)
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index f5b3fdbb1e27..d21c24eaf0a9 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -189,14 +189,14 @@ static void atmel_spi_next_xfer_data(struct spi_master *master,
 
         /* use scratch buffer only when rx or tx data is unspecified */
         if (xfer->rx_buf)
-                *rx_dma = xfer->rx_dma + xfer->len - len;
+                *rx_dma = xfer->rx_dma + xfer->len - *plen;
         else {
                 *rx_dma = as->buffer_dma;
                 if (len > BUFFER_SIZE)
                         len = BUFFER_SIZE;
         }
         if (xfer->tx_buf)
-                *tx_dma = xfer->tx_dma + xfer->len - len;
+                *tx_dma = xfer->tx_dma + xfer->len - *plen;
         else {
                 *tx_dma = as->buffer_dma;
                 if (len > BUFFER_SIZE)
@@ -788,7 +788,7 @@ static int __init atmel_spi_probe(struct platform_device *pdev)
         spin_lock_init(&as->lock);
         INIT_LIST_HEAD(&as->queue);
         as->pdev = pdev;
-        as->regs = ioremap(regs->start, (regs->end - regs->start) + 1);
+        as->regs = ioremap(regs->start, resource_size(regs));
         if (!as->regs)
                 goto out_free_buffer;
         as->irq = irq;
diff --git a/drivers/spi/dw_spi.c b/drivers/spi/dw_spi.c
new file mode 100644
index 000000000000..31620fae77be
--- /dev/null
+++ b/drivers/spi/dw_spi.c
@@ -0,0 +1,944 @@
+/*
+ * dw_spi.c - Designware SPI core controller driver (refer pxa2xx_spi.c)
+ *
+ * Copyright (c) 2009, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/highmem.h>
+#include <linux/delay.h>
+
+#include <linux/spi/dw_spi.h>
+#include <linux/spi/spi.h>
+
+#ifdef CONFIG_DEBUG_FS
+#include <linux/debugfs.h>
+#endif
+
+#define START_STATE     ((void *)0)
+#define RUNNING_STATE   ((void *)1)
+#define DONE_STATE      ((void *)2)
+#define ERROR_STATE     ((void *)-1)
+
+#define QUEUE_RUNNING   0
+#define QUEUE_STOPPED   1
+
+#define MRST_SPI_DEASSERT       0
+#define MRST_SPI_ASSERT         1
+
+/* Slave spi_dev related */
+struct chip_data {
+        u16 cr0;
+        u8 cs;                  /* chip select pin */
+        u8 n_bytes;             /* current is a 1/2/4 byte op */
+        u8 tmode;               /* TR/TO/RO/EEPROM */
+        u8 type;                /* SPI/SSP/MicroWire */
+
+        u8 poll_mode;           /* 1 means use poll mode */
+
+        u32 dma_width;
+        u32 rx_threshold;
+        u32 tx_threshold;
+        u8 enable_dma;
+        u8 bits_per_word;
+        u16 clk_div;            /* baud rate divider */
+        u32 speed_hz;           /* baud rate */
+        int (*write)(struct dw_spi *dws);
+        int (*read)(struct dw_spi *dws);
+        void (*cs_control)(u32 command);
+};
+
+#ifdef CONFIG_DEBUG_FS
+static int spi_show_regs_open(struct inode *inode, struct file *file)
+{
+        file->private_data = inode->i_private;
+        return 0;
+}
+
+#define SPI_REGS_BUFSIZE        1024
+static ssize_t  spi_show_regs(struct file *file, char __user *user_buf,
+                                size_t count, loff_t *ppos)
+{
+        struct dw_spi *dws;
+        char *buf;
+        u32 len = 0;
+        ssize_t ret;
+
+        dws = file->private_data;
+
+        buf = kzalloc(SPI_REGS_BUFSIZE, GFP_KERNEL);
+        if (!buf)
+                return 0;
+
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "MRST SPI0 registers:\n");
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "=================================\n");
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "CTRL0: \t\t0x%08x\n", dw_readl(dws, ctrl0));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "CTRL1: \t\t0x%08x\n", dw_readl(dws, ctrl1));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "SSIENR: \t0x%08x\n", dw_readl(dws, ssienr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "SER: \t\t0x%08x\n", dw_readl(dws, ser));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "BAUDR: \t\t0x%08x\n", dw_readl(dws, baudr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "TXFTLR: \t0x%08x\n", dw_readl(dws, txfltr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "RXFTLR: \t0x%08x\n", dw_readl(dws, rxfltr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "TXFLR: \t\t0x%08x\n", dw_readl(dws, txflr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "RXFLR: \t\t0x%08x\n", dw_readl(dws, rxflr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "SR: \t\t0x%08x\n", dw_readl(dws, sr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "IMR: \t\t0x%08x\n", dw_readl(dws, imr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "ISR: \t\t0x%08x\n", dw_readl(dws, isr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "DMACR: \t\t0x%08x\n", dw_readl(dws, dmacr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "DMATDLR: \t0x%08x\n", dw_readl(dws, dmatdlr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "DMARDLR: \t0x%08x\n", dw_readl(dws, dmardlr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "=================================\n");
+
+        ret =  simple_read_from_buffer(user_buf, count, ppos, buf, len);
+        kfree(buf);
+        return ret;
+}
+
+static const struct file_operations mrst_spi_regs_ops = {
+        .owner          = THIS_MODULE,
+        .open           = spi_show_regs_open,
+        .read           = spi_show_regs,
+};
+
+static int mrst_spi_debugfs_init(struct dw_spi *dws)
+{
+        dws->debugfs = debugfs_create_dir("mrst_spi", NULL);
+        if (!dws->debugfs)
+                return -ENOMEM;
+
+        debugfs_create_file("registers", S_IFREG | S_IRUGO,
+                dws->debugfs, (void *)dws, &mrst_spi_regs_ops);
+        return 0;
+}
+
+static void mrst_spi_debugfs_remove(struct dw_spi *dws)
+{
+        if (dws->debugfs)
+                debugfs_remove_recursive(dws->debugfs);
+}
+
+#else
+static inline int mrst_spi_debugfs_init(struct dw_spi *dws)
+{
+}
+
+static inline void mrst_spi_debugfs_remove(struct dw_spi *dws)
+{
+}
+#endif /* CONFIG_DEBUG_FS */
+
+static void wait_till_not_busy(struct dw_spi *dws)
+{
+        unsigned long end = jiffies + usecs_to_jiffies(1000);
+
+        while (time_before(jiffies, end)) {
+                if (!(dw_readw(dws, sr) & SR_BUSY))
+                        return;
+        }
+        dev_err(&dws->master->dev,
+                "DW SPI: Stutus keeps busy for 1000us after a read/write!\n");
+}
+
+static void flush(struct dw_spi *dws)
+{
+        while (dw_readw(dws, sr) & SR_RF_NOT_EMPT)
+                dw_readw(dws, dr);
+
+        wait_till_not_busy(dws);
+}
+
+static void null_cs_control(u32 command)
+{
+}
+
+static int null_writer(struct dw_spi *dws)
+{
+        u8 n_bytes = dws->n_bytes;
+
+        if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL)
+                || (dws->tx == dws->tx_end))
+                return 0;
+        dw_writew(dws, dr, 0);
+        dws->tx += n_bytes;
+
+        wait_till_not_busy(dws);
+        return 1;
+}
+
+static int null_reader(struct dw_spi *dws)
+{
+        u8 n_bytes = dws->n_bytes;
+
+        while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT)
+                && (dws->rx < dws->rx_end)) {
+                dw_readw(dws, dr);
+                dws->rx += n_bytes;
+        }
+        wait_till_not_busy(dws);
+        return dws->rx == dws->rx_end;
+}
+
+static int u8_writer(struct dw_spi *dws)
+{
+        if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL)
+                || (dws->tx == dws->tx_end))
+                return 0;
+
+        dw_writew(dws, dr, *(u8 *)(dws->tx));
+        ++dws->tx;
+
+        wait_till_not_busy(dws);
+        return 1;
+}
+
+static int u8_reader(struct dw_spi *dws)
+{
+        while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT)
+                && (dws->rx < dws->rx_end)) {
+                *(u8 *)(dws->rx) = dw_readw(dws, dr);
+                ++dws->rx;
+        }
+
+        wait_till_not_busy(dws);
+        return dws->rx == dws->rx_end;
+}
+
+static int u16_writer(struct dw_spi *dws)
+{
+        if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL)
+                || (dws->tx == dws->tx_end))
+                return 0;
+
+        dw_writew(dws, dr, *(u16 *)(dws->tx));
+        dws->tx += 2;
+
+        wait_till_not_busy(dws);
+        return 1;
+}
+
+static int u16_reader(struct dw_spi *dws)
+{
+        u16 temp;
+
+        while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT)
+                && (dws->rx < dws->rx_end)) {
+                temp = dw_readw(dws, dr);
+                *(u16 *)(dws->rx) = temp;
+                dws->rx += 2;
+        }
+
+        wait_till_not_busy(dws);
+        return dws->rx == dws->rx_end;
+}
+
+static void *next_transfer(struct dw_spi *dws)
+{
+        struct spi_message *msg = dws->cur_msg;
+        struct spi_transfer *trans = dws->cur_transfer;
+
+        /* Move to next transfer */
+        if (trans->transfer_list.next != &msg->transfers) {
+                dws->cur_transfer =
+                        list_entry(trans->transfer_list.next,
+                                        struct spi_transfer,
+                                        transfer_list);
+                return RUNNING_STATE;
+        } else
+                return DONE_STATE;
+}
+
+/*
+ * Note: first step is the protocol driver prepares
+ * a dma-capable memory, and this func just need translate
+ * the virt addr to physical
+ */
+static int map_dma_buffers(struct dw_spi *dws)
+{
+        if (!dws->cur_msg->is_dma_mapped || !dws->dma_inited
+                || !dws->cur_chip->enable_dma)
+                return 0;
+
+        if (dws->cur_transfer->tx_dma)
+                dws->tx_dma = dws->cur_transfer->tx_dma;
+
+        if (dws->cur_transfer->rx_dma)
+                dws->rx_dma = dws->cur_transfer->rx_dma;
+
+        return 1;
+}
+
+/* Caller already set message->status; dma and pio irqs are blocked */
+static void giveback(struct dw_spi *dws)
+{
+        struct spi_transfer *last_transfer;
+        unsigned long flags;
+        struct spi_message *msg;
+
+        spin_lock_irqsave(&dws->lock, flags);
+        msg = dws->cur_msg;
+        dws->cur_msg = NULL;
+        dws->cur_transfer = NULL;
+        dws->prev_chip = dws->cur_chip;
+        dws->cur_chip = NULL;
+        dws->dma_mapped = 0;
+        queue_work(dws->workqueue, &dws->pump_messages);
+        spin_unlock_irqrestore(&dws->lock, flags);
+
+        last_transfer = list_entry(msg->transfers.prev,
+                                        struct spi_transfer,
+                                        transfer_list);
+
+        if (!last_transfer->cs_change)
+                dws->cs_control(MRST_SPI_DEASSERT);
+
+        msg->state = NULL;
+        if (msg->complete)
+                msg->complete(msg->context);
+}
+
+static void int_error_stop(struct dw_spi *dws, const char *msg)
+{
+        /* Stop and reset hw */
+        flush(dws);
+        spi_enable_chip(dws, 0);
+
+        dev_err(&dws->master->dev, "%s\n", msg);
+        dws->cur_msg->state = ERROR_STATE;
+        tasklet_schedule(&dws->pump_transfers);
+}
+
+static void transfer_complete(struct dw_spi *dws)
+{
+        /* Update total byte transfered return count actual bytes read */
+        dws->cur_msg->actual_length += dws->len;
+
+        /* Move to next transfer */
+        dws->cur_msg->state = next_transfer(dws);
+
+        /* Handle end of message */
+        if (dws->cur_msg->state == DONE_STATE) {
+                dws->cur_msg->status = 0;
+                giveback(dws);
+        } else
+                tasklet_schedule(&dws->pump_transfers);
+}
+
+static irqreturn_t interrupt_transfer(struct dw_spi *dws)
+{
+        u16 irq_status, irq_mask = 0x3f;
+
+        irq_status = dw_readw(dws, isr) & irq_mask;
+        /* Error handling */
+        if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) {
+                dw_readw(dws, txoicr);
+                dw_readw(dws, rxoicr);
+                dw_readw(dws, rxuicr);
+                int_error_stop(dws, "interrupt_transfer: fifo overrun");
+                return IRQ_HANDLED;
+        }
+
+        /* INT comes from tx */
+        if (dws->tx && (irq_status & SPI_INT_TXEI)) {
+                while (dws->tx < dws->tx_end)
+                        dws->write(dws);
+
+                if (dws->tx == dws->tx_end) {
+                        spi_mask_intr(dws, SPI_INT_TXEI);
+                        transfer_complete(dws);
+                }
+        }
+
+        /* INT comes from rx */
+        if (dws->rx && (irq_status & SPI_INT_RXFI)) {
+                if (dws->read(dws))
+                        transfer_complete(dws);
+        }
+        return IRQ_HANDLED;
+}
+
+static irqreturn_t dw_spi_irq(int irq, void *dev_id)
+{
+        struct dw_spi *dws = dev_id;
+
+        if (!dws->cur_msg) {
+                spi_mask_intr(dws, SPI_INT_TXEI);
+                /* Never fail */
+                return IRQ_HANDLED;
+        }
+
+        return dws->transfer_handler(dws);
+}
+
+/* Must be called inside pump_transfers() */
+static void poll_transfer(struct dw_spi *dws)
+{
+        if (dws->tx) {
+                while (dws->write(dws))
+                        dws->read(dws);
+        }
+
+        dws->read(dws);
+        transfer_complete(dws);
+}
+
+static void dma_transfer(struct dw_spi *dws, int cs_change)
+{
+}
+
+static void pump_transfers(unsigned long data)
+{
+        struct dw_spi *dws = (struct dw_spi *)data;
+        struct spi_message *message = NULL;
+        struct spi_transfer *transfer = NULL;
+        struct spi_transfer *previous = NULL;
+        struct spi_device *spi = NULL;
+        struct chip_data *chip = NULL;
+        u8 bits = 0;
+        u8 imask = 0;
+        u8 cs_change = 0;
+        u16 clk_div = 0;
+        u32 speed = 0;
+        u32 cr0 = 0;
+
+        /* Get current state information */
+        message = dws->cur_msg;
+        transfer = dws->cur_transfer;
+        chip = dws->cur_chip;
+        spi = message->spi;
+
+        if (message->state == ERROR_STATE) {
+                message->status = -EIO;
+                goto early_exit;
+        }
+
+        /* Handle end of message */
+        if (message->state == DONE_STATE) {
+                message->status = 0;
+                goto early_exit;
+        }
+
+        /* Delay if requested at end of transfer*/
+        if (message->state == RUNNING_STATE) {
+                previous = list_entry(transfer->transfer_list.prev,
+                                        struct spi_transfer,
+                                        transfer_list);
+                if (previous->delay_usecs)
+                        udelay(previous->delay_usecs);
+        }
+
+        dws->n_bytes = chip->n_bytes;
+        dws->dma_width = chip->dma_width;
+        dws->cs_control = chip->cs_control;
+
+        dws->rx_dma = transfer->rx_dma;
+        dws->tx_dma = transfer->tx_dma;
+        dws->tx = (void *)transfer->tx_buf;
+        dws->tx_end = dws->tx + transfer->len;
+        dws->rx = transfer->rx_buf;
+        dws->rx_end = dws->rx + transfer->len;
+        dws->write = dws->tx ? chip->write : null_writer;
+        dws->read = dws->rx ? chip->read : null_reader;
+        dws->cs_change = transfer->cs_change;
+        dws->len = dws->cur_transfer->len;
+        if (chip != dws->prev_chip)
+                cs_change = 1;
+
+        cr0 = chip->cr0;
+
+        /* Handle per transfer options for bpw and speed */
+        if (transfer->speed_hz) {
+                speed = chip->speed_hz;
+
+                if (transfer->speed_hz != speed) {
+                        speed = transfer->speed_hz;
+                        if (speed > dws->max_freq) {
+                                printk(KERN_ERR "MRST SPI0: unsupported"
+                                        "freq: %dHz\n", speed);
+                                message->status = -EIO;
+                                goto early_exit;
+                        }
+
+                        /* clk_div doesn't support odd number */
+                        clk_div = dws->max_freq / speed;
+                        clk_div = (clk_div >> 1) << 1;
+
+                        chip->speed_hz = speed;
+                        chip->clk_div = clk_div;
+                }
+        }
+        if (transfer->bits_per_word) {
+                bits = transfer->bits_per_word;
+
+                switch (bits) {
+                case 8:
+                        dws->n_bytes = 1;
+                        dws->dma_width = 1;
+                        dws->read = (dws->read != null_reader) ?
+                                        u8_reader : null_reader;
+                        dws->write = (dws->write != null_writer) ?
+                                        u8_writer : null_writer;
+                        break;
+                case 16:
+                        dws->n_bytes = 2;
+                        dws->dma_width = 2;
+                        dws->read = (dws->read != null_reader) ?
+                                        u16_reader : null_reader;
+                        dws->write = (dws->write != null_writer) ?
+                                        u16_writer : null_writer;
+                        break;
+                default:
+                        printk(KERN_ERR "MRST SPI0: unsupported bits:"
+                                "%db\n", bits);
+                        message->status = -EIO;
+                        goto early_exit;
+                }
+
+                cr0 = (bits - 1)
+                        | (chip->type << SPI_FRF_OFFSET)
+                        | (spi->mode << SPI_MODE_OFFSET)
+                        | (chip->tmode << SPI_TMOD_OFFSET);
+        }
+        message->state = RUNNING_STATE;
+
+        /* Check if current transfer is a DMA transaction */
+        dws->dma_mapped = map_dma_buffers(dws);
+
+        if (!dws->dma_mapped && !chip->poll_mode) {
+                if (dws->rx)
+                        imask |= SPI_INT_RXFI;
+                if (dws->tx)
+                        imask |= SPI_INT_TXEI;
+                dws->transfer_handler = interrupt_transfer;
+        }
+
+        /*
+         * Reprogram registers only if
+         *      1. chip select changes
+         *      2. clk_div is changed
+         *      3. control value changes
+         */
+        if (dw_readw(dws, ctrl0) != cr0 || cs_change || clk_div) {
+                spi_enable_chip(dws, 0);
+
+                if (dw_readw(dws, ctrl0) != cr0)
+                        dw_writew(dws, ctrl0, cr0);
+
+                /* Set the interrupt mask, for poll mode just diable all int */
+                spi_mask_intr(dws, 0xff);
+                if (!chip->poll_mode)
+                        spi_umask_intr(dws, imask);
+
+                spi_set_clk(dws, clk_div ? clk_div : chip->clk_div);
+                spi_chip_sel(dws, spi->chip_select);
+                spi_enable_chip(dws, 1);
+
+                if (cs_change)
+                        dws->prev_chip = chip;
+        }
+
+        if (dws->dma_mapped)
+                dma_transfer(dws, cs_change);
+
+        if (chip->poll_mode)
+                poll_transfer(dws);
+
+        return;
+
+early_exit:
+        giveback(dws);
+        return;
+}
+
+static void pump_messages(struct work_struct *work)
+{
+        struct dw_spi *dws =
+                container_of(work, struct dw_spi, pump_messages);
+        unsigned long flags;
+
+        /* Lock queue and check for queue work */
+        spin_lock_irqsave(&dws->lock, flags);
+        if (list_empty(&dws->queue) || dws->run == QUEUE_STOPPED) {
+                dws->busy = 0;
+                spin_unlock_irqrestore(&dws->lock, flags);
+                return;
+        }
+
+        /* Make sure we are not already running a message */
+        if (dws->cur_msg) {
+                spin_unlock_irqrestore(&dws->lock, flags);
+                return;
+        }
+
+        /* Extract head of queue */
+        dws->cur_msg = list_entry(dws->queue.next, struct spi_message, queue);
+        list_del_init(&dws->cur_msg->queue);
+
+        /* Initial message state*/
+        dws->cur_msg->state = START_STATE;
+        dws->cur_transfer = list_entry(dws->cur_msg->transfers.next,
+                                                struct spi_transfer,
+                                                transfer_list);
+        dws->cur_chip = spi_get_ctldata(dws->cur_msg->spi);
+
+        /* Mark as busy and launch transfers */
+        tasklet_schedule(&dws->pump_transfers);
+
+        dws->busy = 1;
+        spin_unlock_irqrestore(&dws->lock, flags);
+}
+
+/* spi_device use this to queue in their spi_msg */
+static int dw_spi_transfer(struct spi_device *spi, struct spi_message *msg)
+{
+        struct dw_spi *dws = spi_master_get_devdata(spi->master);
+        unsigned long flags;
+
+        spin_lock_irqsave(&dws->lock, flags);
+
+        if (dws->run == QUEUE_STOPPED) {
+                spin_unlock_irqrestore(&dws->lock, flags);
+                return -ESHUTDOWN;
+        }
+
+        msg->actual_length = 0;
+        msg->status = -EINPROGRESS;
+        msg->state = START_STATE;
+
+        list_add_tail(&msg->queue, &dws->queue);
+
+        if (dws->run == QUEUE_RUNNING && !dws->busy) {
+
+                if (dws->cur_transfer || dws->cur_msg)
+                        queue_work(dws->workqueue,
+                                        &dws->pump_messages);
+                else {
+                        /* If no other data transaction in air, just go */
+                        spin_unlock_irqrestore(&dws->lock, flags);
+                        pump_messages(&dws->pump_messages);
+                        return 0;
+                }
+        }
+
+        spin_unlock_irqrestore(&dws->lock, flags);
+        return 0;
+}
+
+/* This may be called twice for each spi dev */
+static int dw_spi_setup(struct spi_device *spi)
+{
+        struct dw_spi_chip *chip_info = NULL;
+        struct chip_data *chip;
+
+        if (spi->bits_per_word != 8 && spi->bits_per_word != 16)
+                return -EINVAL;
+
+        /* Only alloc on first setup */
+        chip = spi_get_ctldata(spi);
+        if (!chip) {
+                chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL);
+                if (!chip)
+                        return -ENOMEM;
+
+                chip->cs_control = null_cs_control;
+                chip->enable_dma = 0;
+        }
+
+        /*
+         * Protocol drivers may change the chip settings, so...
+         * if chip_info exists, use it
+         */
+        chip_info = spi->controller_data;
+
+        /* chip_info doesn't always exist */
+        if (chip_info) {
+                if (chip_info->cs_control)
+                        chip->cs_control = chip_info->cs_control;
+
+                chip->poll_mode = chip_info->poll_mode;
+                chip->type = chip_info->type;
+
+                chip->rx_threshold = 0;
+                chip->tx_threshold = 0;
+
+                chip->enable_dma = chip_info->enable_dma;
+        }
+
+        if (spi->bits_per_word <= 8) {
+                chip->n_bytes = 1;
+                chip->dma_width = 1;
+                chip->read = u8_reader;
+                chip->write = u8_writer;
+        } else if (spi->bits_per_word <= 16) {
+                chip->n_bytes = 2;
+                chip->dma_width = 2;
+                chip->read = u16_reader;
+                chip->write = u16_writer;
+        } else {
+                /* Never take >16b case for MRST SPIC */
+                dev_err(&spi->dev, "invalid wordsize\n");
+                return -EINVAL;
+        }
+        chip->bits_per_word = spi->bits_per_word;
+
+        chip->speed_hz = spi->max_speed_hz;
+        if (chip->speed_hz)
+                chip->clk_div = 25000000 / chip->speed_hz;
+        else
+                chip->clk_div = 8;      /* default value */
+
+        chip->tmode = 0; /* Tx & Rx */
+        /* Default SPI mode is SCPOL = 0, SCPH = 0 */
+        chip->cr0 = (chip->bits_per_word - 1)
+                        | (chip->type << SPI_FRF_OFFSET)
+                        | (spi->mode  << SPI_MODE_OFFSET)
+                        | (chip->tmode << SPI_TMOD_OFFSET);
+
+        spi_set_ctldata(spi, chip);
+        return 0;
+}
+
+static void dw_spi_cleanup(struct spi_device *spi)
+{
+        struct chip_data *chip = spi_get_ctldata(spi);
+        kfree(chip);
+}
+
+static int __init init_queue(struct dw_spi *dws)
+{
+        INIT_LIST_HEAD(&dws->queue);
+        spin_lock_init(&dws->lock);
+
+        dws->run = QUEUE_STOPPED;
+        dws->busy = 0;
+
+        tasklet_init(&dws->pump_transfers,
+                        pump_transfers, (unsigned long)dws);
+
+        INIT_WORK(&dws->pump_messages, pump_messages);
+        dws->workqueue = create_singlethread_workqueue(
+                                        dev_name(dws->master->dev.parent));
+        if (dws->workqueue == NULL)
+                return -EBUSY;
+
+        return 0;
+}
+
+static int start_queue(struct dw_spi *dws)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&dws->lock, flags);
+
+        if (dws->run == QUEUE_RUNNING || dws->busy) {
+                spin_unlock_irqrestore(&dws->lock, flags);
+                return -EBUSY;
+        }
+
+        dws->run = QUEUE_RUNNING;
+        dws->cur_msg = NULL;
+        dws->cur_transfer = NULL;
+        dws->cur_chip = NULL;
+        dws->prev_chip = NULL;
+        spin_unlock_irqrestore(&dws->lock, flags);
+
+        queue_work(dws->workqueue, &dws->pump_messages);
+
+        return 0;
+}
+
+static int stop_queue(struct dw_spi *dws)
+{
+        unsigned long flags;
+        unsigned limit = 50;
+        int status = 0;
+
+        spin_lock_irqsave(&dws->lock, flags);
+        dws->run = QUEUE_STOPPED;
+        while (!list_empty(&dws->queue) && dws->busy && limit--) {
+                spin_unlock_irqrestore(&dws->lock, flags);
+                msleep(10);
+                spin_lock_irqsave(&dws->lock, flags);
+        }
+
+        if (!list_empty(&dws->queue) || dws->busy)
+                status = -EBUSY;
+        spin_unlock_irqrestore(&dws->lock, flags);
+
+        return status;
+}
+
+static int destroy_queue(struct dw_spi *dws)
+{
+        int status;
+
+        status = stop_queue(dws);
+        if (status != 0)
+                return status;
+        destroy_workqueue(dws->workqueue);
+        return 0;
+}
+
+/* Restart the controller, disable all interrupts, clean rx fifo */
+static void spi_hw_init(struct dw_spi *dws)
+{
+        spi_enable_chip(dws, 0);
+        spi_mask_intr(dws, 0xff);
+        spi_enable_chip(dws, 1);
+        flush(dws);
+}
+
+int __devinit dw_spi_add_host(struct dw_spi *dws)
+{
+        struct spi_master *master;
+        int ret;
+
+        BUG_ON(dws == NULL);
+
+        master = spi_alloc_master(dws->parent_dev, 0);
+        if (!master) {
+                ret = -ENOMEM;
+                goto exit;
+        }
+
+        dws->master = master;
+        dws->type = SSI_MOTO_SPI;
+        dws->prev_chip = NULL;
+        dws->dma_inited = 0;
+        dws->dma_addr = (dma_addr_t)(dws->paddr + 0x60);
+
+        ret = request_irq(dws->irq, dw_spi_irq, 0,
+                        "dw_spi", dws);
+        if (ret < 0) {
+                dev_err(&master->dev, "can not get IRQ\n");
+                goto err_free_master;
+        }
+
+        master->mode_bits = SPI_CPOL | SPI_CPHA;
+        master->bus_num = dws->bus_num;
+        master->num_chipselect = dws->num_cs;
+        master->cleanup = dw_spi_cleanup;
+        master->setup = dw_spi_setup;
+        master->transfer = dw_spi_transfer;
+
+        dws->dma_inited = 0;
+
+        /* Basic HW init */
+        spi_hw_init(dws);
+
+        /* Initial and start queue */
+        ret = init_queue(dws);
+        if (ret) {
+                dev_err(&master->dev, "problem initializing queue\n");
+                goto err_diable_hw;
+        }
+        ret = start_queue(dws);
+        if (ret) {
+                dev_err(&master->dev, "problem starting queue\n");
+                goto err_diable_hw;
+        }
+
+        spi_master_set_devdata(master, dws);
+        ret = spi_register_master(master);
+        if (ret) {
+                dev_err(&master->dev, "problem registering spi master\n");
+                goto err_queue_alloc;
+        }
+
+        mrst_spi_debugfs_init(dws);
+        return 0;
+
+err_queue_alloc:
+        destroy_queue(dws);
+err_diable_hw:
+        spi_enable_chip(dws, 0);
+        free_irq(dws->irq, dws);
+err_free_master:
+        spi_master_put(master);
+exit:
+        return ret;
+}
+EXPORT_SYMBOL(dw_spi_add_host);
+
+void __devexit dw_spi_remove_host(struct dw_spi *dws)
+{
+        int status = 0;
+
+        if (!dws)
+                return;
+        mrst_spi_debugfs_remove(dws);
+
+        /* Remove the queue */
+        status = destroy_queue(dws);
+        if (status != 0)
+                dev_err(&dws->master->dev, "dw_spi_remove: workqueue will not "
+                        "complete, message memory not freed\n");
+
+        spi_enable_chip(dws, 0);
+        /* Disable clk */
+        spi_set_clk(dws, 0);
+        free_irq(dws->irq, dws);
+
+        /* Disconnect from the SPI framework */
+        spi_unregister_master(dws->master);
+}
+
+int dw_spi_suspend_host(struct dw_spi *dws)
+{
+        int ret = 0;
+
+        ret = stop_queue(dws);
+        if (ret)
+                return ret;
+        spi_enable_chip(dws, 0);
+        spi_set_clk(dws, 0);
+        return ret;
+}
+EXPORT_SYMBOL(dw_spi_suspend_host);
+
+int dw_spi_resume_host(struct dw_spi *dws)
+{
+        int ret;
+
+        spi_hw_init(dws);
+        ret = start_queue(dws);
+        if (ret)
+                dev_err(&dws->master->dev, "fail to start queue (%d)\n", ret);
+        return ret;
+}
+EXPORT_SYMBOL(dw_spi_resume_host);
+
+MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
+MODULE_DESCRIPTION("Driver for DesignWare SPI controller core");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/spi/dw_spi_pci.c b/drivers/spi/dw_spi_pci.c
new file mode 100644
index 000000000000..34ba69161734
--- /dev/null
+++ b/drivers/spi/dw_spi_pci.c
@@ -0,0 +1,169 @@
+/*
+ * mrst_spi_pci.c - PCI interface driver for DW SPI Core
+ *
+ * Copyright (c) 2009, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/spi/dw_spi.h>
+#include <linux/spi/spi.h>
+
+#define DRIVER_NAME "dw_spi_pci"
+
+struct dw_spi_pci {
+        struct pci_dev          *pdev;
+        struct dw_spi           dws;
+};
+
+static int __devinit spi_pci_probe(struct pci_dev *pdev,
+        const struct pci_device_id *ent)
+{
+        struct dw_spi_pci *dwpci;
+        struct dw_spi *dws;
+        int pci_bar = 0;
+        int ret;
+
+        printk(KERN_INFO "DW: found PCI SPI controller(ID: %04x:%04x)\n",
+                pdev->vendor, pdev->device);
+
+        ret = pci_enable_device(pdev);
+        if (ret)
+                return ret;
+
+        dwpci = kzalloc(sizeof(struct dw_spi_pci), GFP_KERNEL);
+        if (!dwpci) {
+                ret = -ENOMEM;
+                goto err_disable;
+        }
+
+        dwpci->pdev = pdev;
+        dws = &dwpci->dws;
+
+        /* Get basic io resource and map it */
+        dws->paddr = pci_resource_start(pdev, pci_bar);
+        dws->iolen = pci_resource_len(pdev, pci_bar);
+
+        ret = pci_request_region(pdev, pci_bar, dev_name(&pdev->dev));
+        if (ret)
+                goto err_kfree;
+
+        dws->regs = ioremap_nocache((unsigned long)dws->paddr,
+                                pci_resource_len(pdev, pci_bar));
+        if (!dws->regs) {
+                ret = -ENOMEM;
+                goto err_release_reg;
+        }
+
+        dws->parent_dev = &pdev->dev;
+        dws->bus_num = 0;
+        dws->num_cs = 4;
+        dws->max_freq = 25000000;       /* for Moorestwon */
+        dws->irq = pdev->irq;
+
+        ret = dw_spi_add_host(dws);
+        if (ret)
+                goto err_unmap;
+
+        /* PCI hook and SPI hook use the same drv data */
+        pci_set_drvdata(pdev, dwpci);
+        return 0;
+
+err_unmap:
+        iounmap(dws->regs);
+err_release_reg:
+        pci_release_region(pdev, pci_bar);
+err_kfree:
+        kfree(dwpci);
+err_disable:
+        pci_disable_device(pdev);
+        return ret;
+}
+
+static void __devexit spi_pci_remove(struct pci_dev *pdev)
+{
+        struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
+
+        pci_set_drvdata(pdev, NULL);
+        iounmap(dwpci->dws.regs);
+        pci_release_region(pdev, 0);
+        kfree(dwpci);
+        pci_disable_device(pdev);
+}
+
+#ifdef CONFIG_PM
+static int spi_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+        struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
+        int ret;
+
+        ret = dw_spi_suspend_host(&dwpci->dws);
+        if (ret)
+                return ret;
+        pci_save_state(pdev);
+        pci_disable_device(pdev);
+        pci_set_power_state(pdev, pci_choose_state(pdev, state));
+        return ret;
+}
+
+static int spi_resume(struct pci_dev *pdev)
+{
+        struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
+        int ret;
+
+        pci_set_power_state(pdev, PCI_D0);
+        pci_restore_state(pdev);
+        ret = pci_enable_device(pdev);
+        if (ret)
+                return ret;
+        return dw_spi_resume_host(&dwpci->dws);
+}
+#else
+#define spi_suspend     NULL
+#define spi_resume      NULL
+#endif
+
+static const struct pci_device_id pci_ids[] __devinitdata = {
+        /* Intel Moorestown platform SPI controller 0 */
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0800) },
+        {},
+};
+
+static struct pci_driver dw_spi_driver = {
+        .name =         DRIVER_NAME,
+        .id_table =     pci_ids,
+        .probe =        spi_pci_probe,
+        .remove =       __devexit_p(spi_pci_remove),
+        .suspend =      spi_suspend,
+        .resume =       spi_resume,
+};
+
+static int __init mrst_spi_init(void)
+{
+        return pci_register_driver(&dw_spi_driver);
+}
+
+static void __exit mrst_spi_exit(void)
+{
+        pci_unregister_driver(&dw_spi_driver);
+}
+
+module_init(mrst_spi_init);
+module_exit(mrst_spi_exit);
+
+MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
+MODULE_DESCRIPTION("PCI interface driver for DW SPI Core");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c
index 73e24ef5a2f9..1d41058bbab2 100644
--- a/drivers/spi/spi_bfin5xx.c
+++ b/drivers/spi/spi_bfin5xx.c
@@ -1294,7 +1294,7 @@ static int __init bfin_spi_probe(struct platform_device *pdev)
                 goto out_error_get_res;
         }
 
-        drv_data->regs_base = ioremap(res->start, (res->end - res->start + 1));
+        drv_data->regs_base = ioremap(res->start, resource_size(res));
         if (drv_data->regs_base == NULL) {
                 dev_err(dev, "Cannot map IO\n");
                 status = -ENXIO;
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index e9390d747bfc..1fb2a6ea328c 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -1013,7 +1013,7 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
 
         init_completion(&mpc8xxx_spi->done);
 
-        mpc8xxx_spi->base = ioremap(mem->start, mem->end - mem->start + 1);
+        mpc8xxx_spi->base = ioremap(mem->start, resource_size(mem));
         if (mpc8xxx_spi->base == NULL) {
                 ret = -ENOMEM;
                 goto err_ioremap;
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index 276591569c8b..c010733877ae 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -1,7 +1,7 @@
 /* linux/drivers/spi/spi_s3c24xx.c
  *
  * Copyright (c) 2006 Ben Dooks
- * Copyright (c) 2006 Simtec Electronics
+ * Copyright 2006-2009 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
  * This program is free software; you can redistribute it and/or modify
@@ -28,6 +28,11 @@
 #include <plat/regs-spi.h>
 #include <mach/spi.h>
 
+#include <plat/fiq.h>
+#include <asm/fiq.h>
+
+#include "spi_s3c24xx_fiq.h"
+
 /**
  * s3c24xx_spi_devstate - per device data
  * @hz: Last frequency calculated for @sppre field.
@@ -42,6 +47,13 @@ struct s3c24xx_spi_devstate {
         u8              sppre;
 };
 
+enum spi_fiq_mode {
+        FIQ_MODE_NONE   = 0,
+        FIQ_MODE_TX     = 1,
+        FIQ_MODE_RX     = 2,
+        FIQ_MODE_TXRX   = 3,
+};
+
 struct s3c24xx_spi {
         /* bitbang has to be first */
         struct spi_bitbang       bitbang;
@@ -52,6 +64,11 @@ struct s3c24xx_spi {
         int                      len;
         int                      count;
 
+        struct fiq_handler       fiq_handler;
+        enum spi_fiq_mode        fiq_mode;
+        unsigned char            fiq_inuse;
+        unsigned char            fiq_claimed;
+
         void                    (*set_cs)(struct s3c2410_spi_info *spi,
                                           int cs, int pol);
 
@@ -67,6 +84,7 @@ struct s3c24xx_spi {
         struct s3c2410_spi_info *pdata;
 };
 
+
 #define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT)
 #define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP)
 
@@ -127,7 +145,7 @@ static int s3c24xx_spi_update_state(struct spi_device *spi,
         }
 
         if (spi->mode != cs->mode) {
-                u8 spcon = SPCON_DEFAULT;
+                u8 spcon = SPCON_DEFAULT | S3C2410_SPCON_ENSCK;
 
                 if (spi->mode & SPI_CPHA)
                         spcon |= S3C2410_SPCON_CPHA_FMTB;
@@ -214,13 +232,196 @@ static inline unsigned int hw_txbyte(struct s3c24xx_spi *hw, int count)
         return hw->tx ? hw->tx[count] : 0;
 }
 
+#ifdef CONFIG_SPI_S3C24XX_FIQ
+/* Support for FIQ based pseudo-DMA to improve the transfer speed.
+ *
+ * This code uses the assembly helper in spi_s3c24xx_spi.S which is
+ * used by the FIQ core to move data between main memory and the peripheral
+ * block. Since this is code running on the processor, there is no problem
+ * with cache coherency of the buffers, so we can use any buffer we like.
+ */
+
+/**
+ * struct spi_fiq_code - FIQ code and header
+ * @length: The length of the code fragment, excluding this header.
+ * @ack_offset: The offset from @data to the word to place the IRQ ACK bit at.
+ * @data: The code itself to install as a FIQ handler.
+ */
+struct spi_fiq_code {
+        u32     length;
+        u32     ack_offset;
+        u8      data[0];
+};
+
+extern struct spi_fiq_code s3c24xx_spi_fiq_txrx;
+extern struct spi_fiq_code s3c24xx_spi_fiq_tx;
+extern struct spi_fiq_code s3c24xx_spi_fiq_rx;
+
+/**
+ * ack_bit - turn IRQ into IRQ acknowledgement bit
+ * @irq: The interrupt number
+ *
+ * Returns the bit to write to the interrupt acknowledge register.
+ */
+static inline u32 ack_bit(unsigned int irq)
+{
+        return 1 << (irq - IRQ_EINT0);
+}
+
+/**
+ * s3c24xx_spi_tryfiq - attempt to claim and setup FIQ for transfer
+ * @hw: The hardware state.
+ *
+ * Claim the FIQ handler (only one can be active at any one time) and
+ * then setup the correct transfer code for this transfer.
+ *
+ * This call updates all the necessary state information if sucessful,
+ * so the caller does not need to do anything more than start the transfer
+ * as normal, since the IRQ will have been re-routed to the FIQ handler.
+*/
+void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw)
+{
+        struct pt_regs regs;
+        enum spi_fiq_mode mode;
+        struct spi_fiq_code *code;
+        int ret;
+
+        if (!hw->fiq_claimed) {
+                /* try and claim fiq if we haven't got it, and if not
+                 * then return and simply use another transfer method */
+
+                ret = claim_fiq(&hw->fiq_handler);
+                if (ret)
+                        return;
+        }
+
+        if (hw->tx && !hw->rx)
+                mode = FIQ_MODE_TX;
+        else if (hw->rx && !hw->tx)
+                mode = FIQ_MODE_RX;
+        else
+                mode = FIQ_MODE_TXRX;
+
+        regs.uregs[fiq_rspi] = (long)hw->regs;
+        regs.uregs[fiq_rrx]  = (long)hw->rx;
+        regs.uregs[fiq_rtx]  = (long)hw->tx + 1;
+        regs.uregs[fiq_rcount] = hw->len - 1;
+        regs.uregs[fiq_rirq] = (long)S3C24XX_VA_IRQ;
+
+        set_fiq_regs(&regs);
+
+        if (hw->fiq_mode != mode) {
+                u32 *ack_ptr;
+
+                hw->fiq_mode = mode;
+
+                switch (mode) {
+                case FIQ_MODE_TX:
+                        code = &s3c24xx_spi_fiq_tx;
+                        break;
+                case FIQ_MODE_RX:
+                        code = &s3c24xx_spi_fiq_rx;
+                        break;
+                case FIQ_MODE_TXRX:
+                        code = &s3c24xx_spi_fiq_txrx;
+                        break;
+                default:
+                        code = NULL;
+                }
+
+                BUG_ON(!code);
+
+                ack_ptr = (u32 *)&code->data[code->ack_offset];
+                *ack_ptr = ack_bit(hw->irq);
+
+                set_fiq_handler(&code->data, code->length);
+        }
+
+        s3c24xx_set_fiq(hw->irq, true);
+
+        hw->fiq_mode = mode;
+        hw->fiq_inuse = 1;
+}
+
+/**
+ * s3c24xx_spi_fiqop - FIQ core code callback
+ * @pw: Data registered with the handler
+ * @release: Whether this is a release or a return.
+ *
+ * Called by the FIQ code when another module wants to use the FIQ, so
+ * return whether we are currently using this or not and then update our
+ * internal state.
+ */
+static int s3c24xx_spi_fiqop(void *pw, int release)
+{
+        struct s3c24xx_spi *hw = pw;
+        int ret = 0;
+
+        if (release) {
+                if (hw->fiq_inuse)
+                        ret = -EBUSY;
+
+                /* note, we do not need to unroute the FIQ, as the FIQ
+                 * vector code de-routes it to signal the end of transfer */
+
+                hw->fiq_mode = FIQ_MODE_NONE;
+                hw->fiq_claimed = 0;
+        } else {
+                hw->fiq_claimed = 1;
+        }
+
+        return ret;
+}
+
+/**
+ * s3c24xx_spi_initfiq - setup the information for the FIQ core
+ * @hw: The hardware state.
+ *
+ * Setup the fiq_handler block to pass to the FIQ core.
+ */
+static inline void s3c24xx_spi_initfiq(struct s3c24xx_spi *hw)
+{
+        hw->fiq_handler.dev_id = hw;
+        hw->fiq_handler.name = dev_name(hw->dev);
+        hw->fiq_handler.fiq_op = s3c24xx_spi_fiqop;
+}
+
+/**
+ * s3c24xx_spi_usefiq - return if we should be using FIQ.
+ * @hw: The hardware state.
+ *
+ * Return true if the platform data specifies whether this channel is
+ * allowed to use the FIQ.
+ */
+static inline bool s3c24xx_spi_usefiq(struct s3c24xx_spi *hw)
+{
+        return hw->pdata->use_fiq;
+}
+
+/**
+ * s3c24xx_spi_usingfiq - return if channel is using FIQ
+ * @spi: The hardware state.
+ *
+ * Return whether the channel is currently using the FIQ (separate from
+ * whether the FIQ is claimed).
+ */
+static inline bool s3c24xx_spi_usingfiq(struct s3c24xx_spi *spi)
+{
+        return spi->fiq_inuse;
+}
+#else
+
+static inline void s3c24xx_spi_initfiq(struct s3c24xx_spi *s) { }
+static inline void s3c24xx_spi_tryfiq(struct s3c24xx_spi *s) { }
+static inline bool s3c24xx_spi_usefiq(struct s3c24xx_spi *s) { return false; }
+static inline bool s3c24xx_spi_usingfiq(struct s3c24xx_spi *s) { return false; }
+
+#endif /* CONFIG_SPI_S3C24XX_FIQ */
+
 static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
 {
         struct s3c24xx_spi *hw = to_hw(spi);
 
-        dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n",
-                t->tx_buf, t->rx_buf, t->len);
-
         hw->tx = t->tx_buf;
         hw->rx = t->rx_buf;
         hw->len = t->len;
@@ -228,11 +429,14 @@ static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
 
         init_completion(&hw->done);
 
+        hw->fiq_inuse = 0;
+        if (s3c24xx_spi_usefiq(hw) && t->len >= 3)
+                s3c24xx_spi_tryfiq(hw);
+
         /* send the first byte */
         writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT);
 
         wait_for_completion(&hw->done);
-
         return hw->count;
 }
 
@@ -254,17 +458,27 @@ static irqreturn_t s3c24xx_spi_irq(int irq, void *dev)
                 goto irq_done;
         }
 
-        hw->count++;
+        if (!s3c24xx_spi_usingfiq(hw)) {
+                hw->count++;
 
-        if (hw->rx)
-                hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT);
+                if (hw->rx)
+                        hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT);
 
-        count++;
+                count++;
+
+                if (count < hw->len)
+                        writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT);
+                else
+                        complete(&hw->done);
+        } else {
+                hw->count = hw->len;
+                hw->fiq_inuse = 0;
+
+                if (hw->rx)
+                        hw->rx[hw->len-1] = readb(hw->regs + S3C2410_SPRDAT);
 
-        if (count < hw->len)
-                writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT);
-        else
                 complete(&hw->done);
+        }
 
  irq_done:
         return IRQ_HANDLED;
@@ -322,6 +536,10 @@ static int __init s3c24xx_spi_probe(struct platform_device *pdev)
         platform_set_drvdata(pdev, hw);
         init_completion(&hw->done);
 
+        /* initialise fiq handler */
+
+        s3c24xx_spi_initfiq(hw);
+
         /* setup the master state. */
 
         /* the spi->mode bits understood by this driver: */
diff --git a/drivers/spi/spi_s3c24xx_fiq.S b/drivers/spi/spi_s3c24xx_fiq.S
new file mode 100644
index 000000000000..3793cae361db
--- /dev/null
+++ b/drivers/spi/spi_s3c24xx_fiq.S
@@ -0,0 +1,116 @@
+/* linux/drivers/spi/spi_s3c24xx_fiq.S
+ *
+ * Copyright 2009 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX SPI - FIQ pseudo-DMA transfer code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+#include <mach/map.h>
+#include <mach/regs-irq.h>
+#include <plat/regs-spi.h>
+
+#include "spi_s3c24xx_fiq.h"
+
+        .text
+
+        @ entry to these routines is as follows, with the register names
+        @ defined in fiq.h so that they can be shared with the C files which
+        @ setup the calling registers.
+        @
+        @ fiq_rirq      The base of the IRQ registers to find S3C2410_SRCPND
+        @ fiq_rtmp      Temporary register to hold tx/rx data
+        @ fiq_rspi      The base of the SPI register block
+        @ fiq_rtx       The tx buffer pointer
+        @ fiq_rrx       The rx buffer pointer
+        @ fiq_rcount    The number of bytes to move
+
+        @ each entry starts with a word entry of how long it is
+        @ and an offset to the irq acknowledgment word
+
+ENTRY(s3c24xx_spi_fiq_rx)
+s3c24xx_spi_fix_rx:
+        .word   fiq_rx_end - fiq_rx_start
+        .word   fiq_rx_irq_ack - fiq_rx_start
+fiq_rx_start:
+        ldr     fiq_rtmp, fiq_rx_irq_ack
+        str     fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
+
+        ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
+        strb    fiq_rtmp, [ fiq_rrx ], #1
+
+        mov     fiq_rtmp, #0xff
+        strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
+
+        subs    fiq_rcount, fiq_rcount, #1
+        subnes  pc, lr, #4              @@ return, still have work to do
+
+        @@ set IRQ controller so that next op will trigger IRQ
+        mov     fiq_rtmp, #0
+        str     fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
+        subs    pc, lr, #4
+
+fiq_rx_irq_ack:
+        .word   0
+fiq_rx_end:
+
+ENTRY(s3c24xx_spi_fiq_txrx)
+s3c24xx_spi_fiq_txrx:
+        .word   fiq_txrx_end - fiq_txrx_start
+        .word   fiq_txrx_irq_ack - fiq_txrx_start
+fiq_txrx_start:
+
+        ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
+        strb    fiq_rtmp, [ fiq_rrx ], #1
+
+        ldr     fiq_rtmp, fiq_txrx_irq_ack
+        str     fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
+
+        ldrb    fiq_rtmp, [ fiq_rtx ], #1
+        strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
+
+        subs    fiq_rcount, fiq_rcount, #1
+        subnes  pc, lr, #4              @@ return, still have work to do
+
+        mov     fiq_rtmp, #0
+        str     fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
+        subs    pc, lr, #4
+
+fiq_txrx_irq_ack:
+        .word   0
+
+fiq_txrx_end:
+
+ENTRY(s3c24xx_spi_fiq_tx)
+s3c24xx_spi_fix_tx:
+        .word   fiq_tx_end - fiq_tx_start
+        .word   fiq_tx_irq_ack - fiq_tx_start
+fiq_tx_start:
+        ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
+
+        ldr     fiq_rtmp, fiq_tx_irq_ack
+        str     fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
+
+        ldrb    fiq_rtmp, [ fiq_rtx ], #1
+        strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
+
+        subs    fiq_rcount, fiq_rcount, #1
+        subnes  pc, lr, #4              @@ return, still have work to do
+
+        mov     fiq_rtmp, #0
+        str     fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
+        subs    pc, lr, #4
+
+fiq_tx_irq_ack:
+        .word   0
+
+fiq_tx_end:
+
+        .end
diff --git a/drivers/spi/spi_s3c24xx_fiq.h b/drivers/spi/spi_s3c24xx_fiq.h
new file mode 100644
index 000000000000..a5950bb25b51
--- /dev/null
+++ b/drivers/spi/spi_s3c24xx_fiq.h
@@ -0,0 +1,26 @@
+/* linux/drivers/spi/spi_s3c24xx_fiq.h
+ *
+ * Copyright 2009 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX SPI - FIQ pseudo-DMA transfer support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* We have R8 through R13 to play with */
+
+#ifdef __ASSEMBLY__
+#define __REG_NR(x)     r##x
+#else
+#define __REG_NR(x)     (x)
+#endif
+
+#define fiq_rspi        __REG_NR(8)
+#define fiq_rtmp        __REG_NR(9)
+#define fiq_rrx         __REG_NR(10)
+#define fiq_rtx         __REG_NR(11)
+#define fiq_rcount      __REG_NR(12)
+#define fiq_rirq        __REG_NR(13)
diff --git a/drivers/spi/spi_s3c64xx.c b/drivers/spi/spi_s3c64xx.c
new file mode 100644
index 000000000000..88a456dba967
--- /dev/null
+++ b/drivers/spi/spi_s3c64xx.c
@@ -0,0 +1,1196 @@
+/* linux/drivers/spi/spi_s3c64xx.c
+ *
+ * Copyright (C) 2009 Samsung Electronics Ltd.
+ *      Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/workqueue.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+
+#include <mach/dma.h>
+#include <plat/spi.h>
+
+/* Registers and bit-fields */
+
+#define S3C64XX_SPI_CH_CFG              0x00
+#define S3C64XX_SPI_CLK_CFG             0x04
+#define S3C64XX_SPI_MODE_CFG    0x08
+#define S3C64XX_SPI_SLAVE_SEL   0x0C
+#define S3C64XX_SPI_INT_EN              0x10
+#define S3C64XX_SPI_STATUS              0x14
+#define S3C64XX_SPI_TX_DATA             0x18
+#define S3C64XX_SPI_RX_DATA             0x1C
+#define S3C64XX_SPI_PACKET_CNT  0x20
+#define S3C64XX_SPI_PENDING_CLR 0x24
+#define S3C64XX_SPI_SWAP_CFG    0x28
+#define S3C64XX_SPI_FB_CLK              0x2C
+
+#define S3C64XX_SPI_CH_HS_EN            (1<<6)  /* High Speed Enable */
+#define S3C64XX_SPI_CH_SW_RST           (1<<5)
+#define S3C64XX_SPI_CH_SLAVE            (1<<4)
+#define S3C64XX_SPI_CPOL_L              (1<<3)
+#define S3C64XX_SPI_CPHA_B              (1<<2)
+#define S3C64XX_SPI_CH_RXCH_ON          (1<<1)
+#define S3C64XX_SPI_CH_TXCH_ON          (1<<0)
+
+#define S3C64XX_SPI_CLKSEL_SRCMSK       (3<<9)
+#define S3C64XX_SPI_CLKSEL_SRCSHFT      9
+#define S3C64XX_SPI_ENCLK_ENABLE        (1<<8)
+#define S3C64XX_SPI_PSR_MASK            0xff
+
+#define S3C64XX_SPI_MODE_CH_TSZ_BYTE            (0<<29)
+#define S3C64XX_SPI_MODE_CH_TSZ_HALFWORD        (1<<29)
+#define S3C64XX_SPI_MODE_CH_TSZ_WORD            (2<<29)
+#define S3C64XX_SPI_MODE_CH_TSZ_MASK            (3<<29)
+#define S3C64XX_SPI_MODE_BUS_TSZ_BYTE           (0<<17)
+#define S3C64XX_SPI_MODE_BUS_TSZ_HALFWORD       (1<<17)
+#define S3C64XX_SPI_MODE_BUS_TSZ_WORD           (2<<17)
+#define S3C64XX_SPI_MODE_BUS_TSZ_MASK           (3<<17)
+#define S3C64XX_SPI_MODE_RXDMA_ON               (1<<2)
+#define S3C64XX_SPI_MODE_TXDMA_ON               (1<<1)
+#define S3C64XX_SPI_MODE_4BURST                 (1<<0)
+
+#define S3C64XX_SPI_SLAVE_AUTO                  (1<<1)
+#define S3C64XX_SPI_SLAVE_SIG_INACT             (1<<0)
+
+#define S3C64XX_SPI_ACT(c) writel(0, (c)->regs + S3C64XX_SPI_SLAVE_SEL)
+
+#define S3C64XX_SPI_DEACT(c) writel(S3C64XX_SPI_SLAVE_SIG_INACT, \
+                                        (c)->regs + S3C64XX_SPI_SLAVE_SEL)
+
+#define S3C64XX_SPI_INT_TRAILING_EN             (1<<6)
+#define S3C64XX_SPI_INT_RX_OVERRUN_EN           (1<<5)
+#define S3C64XX_SPI_INT_RX_UNDERRUN_EN          (1<<4)
+#define S3C64XX_SPI_INT_TX_OVERRUN_EN           (1<<3)
+#define S3C64XX_SPI_INT_TX_UNDERRUN_EN          (1<<2)
+#define S3C64XX_SPI_INT_RX_FIFORDY_EN           (1<<1)
+#define S3C64XX_SPI_INT_TX_FIFORDY_EN           (1<<0)
+
+#define S3C64XX_SPI_ST_RX_OVERRUN_ERR           (1<<5)
+#define S3C64XX_SPI_ST_RX_UNDERRUN_ERR  (1<<4)
+#define S3C64XX_SPI_ST_TX_OVERRUN_ERR           (1<<3)
+#define S3C64XX_SPI_ST_TX_UNDERRUN_ERR  (1<<2)
+#define S3C64XX_SPI_ST_RX_FIFORDY               (1<<1)
+#define S3C64XX_SPI_ST_TX_FIFORDY               (1<<0)
+
+#define S3C64XX_SPI_PACKET_CNT_EN               (1<<16)
+
+#define S3C64XX_SPI_PND_TX_UNDERRUN_CLR         (1<<4)
+#define S3C64XX_SPI_PND_TX_OVERRUN_CLR          (1<<3)
+#define S3C64XX_SPI_PND_RX_UNDERRUN_CLR         (1<<2)
+#define S3C64XX_SPI_PND_RX_OVERRUN_CLR          (1<<1)
+#define S3C64XX_SPI_PND_TRAILING_CLR            (1<<0)
+
+#define S3C64XX_SPI_SWAP_RX_HALF_WORD           (1<<7)
+#define S3C64XX_SPI_SWAP_RX_BYTE                (1<<6)
+#define S3C64XX_SPI_SWAP_RX_BIT                 (1<<5)
+#define S3C64XX_SPI_SWAP_RX_EN                  (1<<4)
+#define S3C64XX_SPI_SWAP_TX_HALF_WORD           (1<<3)
+#define S3C64XX_SPI_SWAP_TX_BYTE                (1<<2)
+#define S3C64XX_SPI_SWAP_TX_BIT                 (1<<1)
+#define S3C64XX_SPI_SWAP_TX_EN                  (1<<0)
+
+#define S3C64XX_SPI_FBCLK_MSK           (3<<0)
+
+#define S3C64XX_SPI_ST_TRLCNTZ(v, i) ((((v) >> (i)->rx_lvl_offset) & \
+                                        (((i)->fifo_lvl_mask + 1))) \
+                                        ? 1 : 0)
+
+#define S3C64XX_SPI_ST_TX_DONE(v, i) ((((v) >> (i)->rx_lvl_offset) & \
+                                        (((i)->fifo_lvl_mask + 1) << 1)) \
+                                        ? 1 : 0)
+#define TX_FIFO_LVL(v, i) (((v) >> 6) & (i)->fifo_lvl_mask)
+#define RX_FIFO_LVL(v, i) (((v) >> (i)->rx_lvl_offset) & (i)->fifo_lvl_mask)
+
+#define S3C64XX_SPI_MAX_TRAILCNT        0x3ff
+#define S3C64XX_SPI_TRAILCNT_OFF        19
+
+#define S3C64XX_SPI_TRAILCNT            S3C64XX_SPI_MAX_TRAILCNT
+
+#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
+
+#define SUSPND    (1<<0)
+#define SPIBUSY   (1<<1)
+#define RXBUSY    (1<<2)
+#define TXBUSY    (1<<3)
+
+/**
+ * struct s3c64xx_spi_driver_data - Runtime info holder for SPI driver.
+ * @clk: Pointer to the spi clock.
+ * @master: Pointer to the SPI Protocol master.
+ * @workqueue: Work queue for the SPI xfer requests.
+ * @cntrlr_info: Platform specific data for the controller this driver manages.
+ * @tgl_spi: Pointer to the last CS left untoggled by the cs_change hint.
+ * @work: Work
+ * @queue: To log SPI xfer requests.
+ * @lock: Controller specific lock.
+ * @state: Set of FLAGS to indicate status.
+ * @rx_dmach: Controller's DMA channel for Rx.
+ * @tx_dmach: Controller's DMA channel for Tx.
+ * @sfr_start: BUS address of SPI controller regs.
+ * @regs: Pointer to ioremap'ed controller registers.
+ * @xfer_completion: To indicate completion of xfer task.
+ * @cur_mode: Stores the active configuration of the controller.
+ * @cur_bpw: Stores the active bits per word settings.
+ * @cur_speed: Stores the active xfer clock speed.
+ */
+struct s3c64xx_spi_driver_data {
+        void __iomem                    *regs;
+        struct clk                      *clk;
+        struct platform_device          *pdev;
+        struct spi_master               *master;
+        struct workqueue_struct         *workqueue;
+        struct s3c64xx_spi_cntrlr_info  *cntrlr_info;
+        struct spi_device               *tgl_spi;
+        struct work_struct              work;
+        struct list_head                queue;
+        spinlock_t                      lock;
+        enum dma_ch                     rx_dmach;
+        enum dma_ch                     tx_dmach;
+        unsigned long                   sfr_start;
+        struct completion               xfer_completion;
+        unsigned                        state;
+        unsigned                        cur_mode, cur_bpw;
+        unsigned                        cur_speed;
+};
+
+static struct s3c2410_dma_client s3c64xx_spi_dma_client = {
+        .name = "samsung-spi-dma",
+};
+
+static void flush_fifo(struct s3c64xx_spi_driver_data *sdd)
+{
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        void __iomem *regs = sdd->regs;
+        unsigned long loops;
+        u32 val;
+
+        writel(0, regs + S3C64XX_SPI_PACKET_CNT);
+
+        val = readl(regs + S3C64XX_SPI_CH_CFG);
+        val |= S3C64XX_SPI_CH_SW_RST;
+        val &= ~S3C64XX_SPI_CH_HS_EN;
+        writel(val, regs + S3C64XX_SPI_CH_CFG);
+
+        /* Flush TxFIFO*/
+        loops = msecs_to_loops(1);
+        do {
+                val = readl(regs + S3C64XX_SPI_STATUS);
+        } while (TX_FIFO_LVL(val, sci) && loops--);
+
+        /* Flush RxFIFO*/
+        loops = msecs_to_loops(1);
+        do {
+                val = readl(regs + S3C64XX_SPI_STATUS);
+                if (RX_FIFO_LVL(val, sci))
+                        readl(regs + S3C64XX_SPI_RX_DATA);
+                else
+                        break;
+        } while (loops--);
+
+        val = readl(regs + S3C64XX_SPI_CH_CFG);
+        val &= ~S3C64XX_SPI_CH_SW_RST;
+        writel(val, regs + S3C64XX_SPI_CH_CFG);
+
+        val = readl(regs + S3C64XX_SPI_MODE_CFG);
+        val &= ~(S3C64XX_SPI_MODE_TXDMA_ON | S3C64XX_SPI_MODE_RXDMA_ON);
+        writel(val, regs + S3C64XX_SPI_MODE_CFG);
+
+        val = readl(regs + S3C64XX_SPI_CH_CFG);
+        val &= ~(S3C64XX_SPI_CH_RXCH_ON | S3C64XX_SPI_CH_TXCH_ON);
+        writel(val, regs + S3C64XX_SPI_CH_CFG);
+}
+
+static void enable_datapath(struct s3c64xx_spi_driver_data *sdd,
+                                struct spi_device *spi,
+                                struct spi_transfer *xfer, int dma_mode)
+{
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        void __iomem *regs = sdd->regs;
+        u32 modecfg, chcfg;
+
+        modecfg = readl(regs + S3C64XX_SPI_MODE_CFG);
+        modecfg &= ~(S3C64XX_SPI_MODE_TXDMA_ON | S3C64XX_SPI_MODE_RXDMA_ON);
+
+        chcfg = readl(regs + S3C64XX_SPI_CH_CFG);
+        chcfg &= ~S3C64XX_SPI_CH_TXCH_ON;
+
+        if (dma_mode) {
+                chcfg &= ~S3C64XX_SPI_CH_RXCH_ON;
+        } else {
+                /* Always shift in data in FIFO, even if xfer is Tx only,
+                 * this helps setting PCKT_CNT value for generating clocks
+                 * as exactly needed.
+                 */
+                chcfg |= S3C64XX_SPI_CH_RXCH_ON;
+                writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff)
+                                        | S3C64XX_SPI_PACKET_CNT_EN,
+                                        regs + S3C64XX_SPI_PACKET_CNT);
+        }
+
+        if (xfer->tx_buf != NULL) {
+                sdd->state |= TXBUSY;
+                chcfg |= S3C64XX_SPI_CH_TXCH_ON;
+                if (dma_mode) {
+                        modecfg |= S3C64XX_SPI_MODE_TXDMA_ON;
+                        s3c2410_dma_config(sdd->tx_dmach, 1);
+                        s3c2410_dma_enqueue(sdd->tx_dmach, (void *)sdd,
+                                                xfer->tx_dma, xfer->len);
+                        s3c2410_dma_ctrl(sdd->tx_dmach, S3C2410_DMAOP_START);
+                } else {
+                        unsigned char *buf = (unsigned char *) xfer->tx_buf;
+                        int i = 0;
+                        while (i < xfer->len)
+                                writeb(buf[i++], regs + S3C64XX_SPI_TX_DATA);
+                }
+        }
+
+        if (xfer->rx_buf != NULL) {
+                sdd->state |= RXBUSY;
+
+                if (sci->high_speed && sdd->cur_speed >= 30000000UL
+                                        && !(sdd->cur_mode & SPI_CPHA))
+                        chcfg |= S3C64XX_SPI_CH_HS_EN;
+
+                if (dma_mode) {
+                        modecfg |= S3C64XX_SPI_MODE_RXDMA_ON;
+                        chcfg |= S3C64XX_SPI_CH_RXCH_ON;
+                        writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff)
+                                        | S3C64XX_SPI_PACKET_CNT_EN,
+                                        regs + S3C64XX_SPI_PACKET_CNT);
+                        s3c2410_dma_config(sdd->rx_dmach, 1);
+                        s3c2410_dma_enqueue(sdd->rx_dmach, (void *)sdd,
+                                                xfer->rx_dma, xfer->len);
+                        s3c2410_dma_ctrl(sdd->rx_dmach, S3C2410_DMAOP_START);
+                }
+        }
+
+        writel(modecfg, regs + S3C64XX_SPI_MODE_CFG);
+        writel(chcfg, regs + S3C64XX_SPI_CH_CFG);
+}
+
+static inline void enable_cs(struct s3c64xx_spi_driver_data *sdd,
+                                                struct spi_device *spi)
+{
+        struct s3c64xx_spi_csinfo *cs;
+
+        if (sdd->tgl_spi != NULL) { /* If last device toggled after mssg */
+                if (sdd->tgl_spi != spi) { /* if last mssg on diff device */
+                        /* Deselect the last toggled device */
+                        cs = sdd->tgl_spi->controller_data;
+                        cs->set_level(spi->mode & SPI_CS_HIGH ? 0 : 1);
+                }
+                sdd->tgl_spi = NULL;
+        }
+
+        cs = spi->controller_data;
+        cs->set_level(spi->mode & SPI_CS_HIGH ? 1 : 0);
+}
+
+static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd,
+                                struct spi_transfer *xfer, int dma_mode)
+{
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        void __iomem *regs = sdd->regs;
+        unsigned long val;
+        int ms;
+
+        /* millisecs to xfer 'len' bytes @ 'cur_speed' */
+        ms = xfer->len * 8 * 1000 / sdd->cur_speed;
+        ms += 5; /* some tolerance */
+
+        if (dma_mode) {
+                val = msecs_to_jiffies(ms) + 10;
+                val = wait_for_completion_timeout(&sdd->xfer_completion, val);
+        } else {
+                val = msecs_to_loops(ms);
+                do {
+                        val = readl(regs + S3C64XX_SPI_STATUS);
+                } while (RX_FIFO_LVL(val, sci) < xfer->len && --val);
+        }
+
+        if (!val)
+                return -EIO;
+
+        if (dma_mode) {
+                u32 status;
+
+                /*
+                 * DmaTx returns after simply writing data in the FIFO,
+                 * w/o waiting for real transmission on the bus to finish.
+                 * DmaRx returns only after Dma read data from FIFO which
+                 * needs bus transmission to finish, so we don't worry if
+                 * Xfer involved Rx(with or without Tx).
+                 */
+                if (xfer->rx_buf == NULL) {
+                        val = msecs_to_loops(10);
+                        status = readl(regs + S3C64XX_SPI_STATUS);
+                        while ((TX_FIFO_LVL(status, sci)
+                                || !S3C64XX_SPI_ST_TX_DONE(status, sci))
+                                        && --val) {
+                                cpu_relax();
+                                status = readl(regs + S3C64XX_SPI_STATUS);
+                        }
+
+                        if (!val)
+                                return -EIO;
+                }
+        } else {
+                unsigned char *buf;
+                int i;
+
+                /* If it was only Tx */
+                if (xfer->rx_buf == NULL) {
+                        sdd->state &= ~TXBUSY;
+                        return 0;
+                }
+
+                i = 0;
+                buf = xfer->rx_buf;
+                while (i < xfer->len)
+                        buf[i++] = readb(regs + S3C64XX_SPI_RX_DATA);
+
+                sdd->state &= ~RXBUSY;
+        }
+
+        return 0;
+}
+
+static inline void disable_cs(struct s3c64xx_spi_driver_data *sdd,
+                                                struct spi_device *spi)
+{
+        struct s3c64xx_spi_csinfo *cs = spi->controller_data;
+
+        if (sdd->tgl_spi == spi)
+                sdd->tgl_spi = NULL;
+
+        cs->set_level(spi->mode & SPI_CS_HIGH ? 0 : 1);
+}
+
+static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
+{
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        void __iomem *regs = sdd->regs;
+        u32 val;
+
+        /* Disable Clock */
+        val = readl(regs + S3C64XX_SPI_CLK_CFG);
+        val &= ~S3C64XX_SPI_ENCLK_ENABLE;
+        writel(val, regs + S3C64XX_SPI_CLK_CFG);
+
+        /* Set Polarity and Phase */
+        val = readl(regs + S3C64XX_SPI_CH_CFG);
+        val &= ~(S3C64XX_SPI_CH_SLAVE |
+                        S3C64XX_SPI_CPOL_L |
+                        S3C64XX_SPI_CPHA_B);
+
+        if (sdd->cur_mode & SPI_CPOL)
+                val |= S3C64XX_SPI_CPOL_L;
+
+        if (sdd->cur_mode & SPI_CPHA)
+                val |= S3C64XX_SPI_CPHA_B;
+
+        writel(val, regs + S3C64XX_SPI_CH_CFG);
+
+        /* Set Channel & DMA Mode */
+        val = readl(regs + S3C64XX_SPI_MODE_CFG);
+        val &= ~(S3C64XX_SPI_MODE_BUS_TSZ_MASK
+                        | S3C64XX_SPI_MODE_CH_TSZ_MASK);
+
+        switch (sdd->cur_bpw) {
+        case 32:
+                val |= S3C64XX_SPI_MODE_BUS_TSZ_WORD;
+                break;
+        case 16:
+                val |= S3C64XX_SPI_MODE_BUS_TSZ_HALFWORD;
+                break;
+        default:
+                val |= S3C64XX_SPI_MODE_BUS_TSZ_BYTE;
+                break;
+        }
+        val |= S3C64XX_SPI_MODE_CH_TSZ_BYTE; /* Always 8bits wide */
+
+        writel(val, regs + S3C64XX_SPI_MODE_CFG);
+
+        /* Configure Clock */
+        val = readl(regs + S3C64XX_SPI_CLK_CFG);
+        val &= ~S3C64XX_SPI_PSR_MASK;
+        val |= ((clk_get_rate(sci->src_clk) / sdd->cur_speed / 2 - 1)
+                        & S3C64XX_SPI_PSR_MASK);
+        writel(val, regs + S3C64XX_SPI_CLK_CFG);
+
+        /* Enable Clock */
+        val = readl(regs + S3C64XX_SPI_CLK_CFG);
+        val |= S3C64XX_SPI_ENCLK_ENABLE;
+        writel(val, regs + S3C64XX_SPI_CLK_CFG);
+}
+
+void s3c64xx_spi_dma_rxcb(struct s3c2410_dma_chan *chan, void *buf_id,
+                                int size, enum s3c2410_dma_buffresult res)
+{
+        struct s3c64xx_spi_driver_data *sdd = buf_id;
+        unsigned long flags;
+
+        spin_lock_irqsave(&sdd->lock, flags);
+
+        if (res == S3C2410_RES_OK)
+                sdd->state &= ~RXBUSY;
+        else
+                dev_err(&sdd->pdev->dev, "DmaAbrtRx-%d\n", size);
+
+        /* If the other done */
+        if (!(sdd->state & TXBUSY))
+                complete(&sdd->xfer_completion);
+
+        spin_unlock_irqrestore(&sdd->lock, flags);
+}
+
+void s3c64xx_spi_dma_txcb(struct s3c2410_dma_chan *chan, void *buf_id,
+                                int size, enum s3c2410_dma_buffresult res)
+{
+        struct s3c64xx_spi_driver_data *sdd = buf_id;
+        unsigned long flags;
+
+        spin_lock_irqsave(&sdd->lock, flags);
+
+        if (res == S3C2410_RES_OK)
+                sdd->state &= ~TXBUSY;
+        else
+                dev_err(&sdd->pdev->dev, "DmaAbrtTx-%d \n", size);
+
+        /* If the other done */
+        if (!(sdd->state & RXBUSY))
+                complete(&sdd->xfer_completion);
+
+        spin_unlock_irqrestore(&sdd->lock, flags);
+}
+
+#define XFER_DMAADDR_INVALID DMA_BIT_MASK(32)
+
+static int s3c64xx_spi_map_mssg(struct s3c64xx_spi_driver_data *sdd,
+                                                struct spi_message *msg)
+{
+        struct device *dev = &sdd->pdev->dev;
+        struct spi_transfer *xfer;
+
+        if (msg->is_dma_mapped)
+                return 0;
+
+        /* First mark all xfer unmapped */
+        list_for_each_entry(xfer, &msg->transfers, transfer_list) {
+                xfer->rx_dma = XFER_DMAADDR_INVALID;
+                xfer->tx_dma = XFER_DMAADDR_INVALID;
+        }
+
+        /* Map until end or first fail */
+        list_for_each_entry(xfer, &msg->transfers, transfer_list) {
+
+                if (xfer->tx_buf != NULL) {
+                        xfer->tx_dma = dma_map_single(dev, xfer->tx_buf,
+                                                xfer->len, DMA_TO_DEVICE);
+                        if (dma_mapping_error(dev, xfer->tx_dma)) {
+                                dev_err(dev, "dma_map_single Tx failed\n");
+                                xfer->tx_dma = XFER_DMAADDR_INVALID;
+                                return -ENOMEM;
+                        }
+                }
+
+                if (xfer->rx_buf != NULL) {
+                        xfer->rx_dma = dma_map_single(dev, xfer->rx_buf,
+                                                xfer->len, DMA_FROM_DEVICE);
+                        if (dma_mapping_error(dev, xfer->rx_dma)) {
+                                dev_err(dev, "dma_map_single Rx failed\n");
+                                dma_unmap_single(dev, xfer->tx_dma,
+                                                xfer->len, DMA_TO_DEVICE);
+                                xfer->tx_dma = XFER_DMAADDR_INVALID;
+                                xfer->rx_dma = XFER_DMAADDR_INVALID;
+                                return -ENOMEM;
+                        }
+                }
+        }
+
+        return 0;
+}
+
+static void s3c64xx_spi_unmap_mssg(struct s3c64xx_spi_driver_data *sdd,
+                                                struct spi_message *msg)
+{
+        struct device *dev = &sdd->pdev->dev;
+        struct spi_transfer *xfer;
+
+        if (msg->is_dma_mapped)
+                return;
+
+        list_for_each_entry(xfer, &msg->transfers, transfer_list) {
+
+                if (xfer->rx_buf != NULL
+                                && xfer->rx_dma != XFER_DMAADDR_INVALID)
+                        dma_unmap_single(dev, xfer->rx_dma,
+                                                xfer->len, DMA_FROM_DEVICE);
+
+                if (xfer->tx_buf != NULL
+                                && xfer->tx_dma != XFER_DMAADDR_INVALID)
+                        dma_unmap_single(dev, xfer->tx_dma,
+                                                xfer->len, DMA_TO_DEVICE);
+        }
+}
+
+static void handle_msg(struct s3c64xx_spi_driver_data *sdd,
+                                        struct spi_message *msg)
+{
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        struct spi_device *spi = msg->spi;
+        struct s3c64xx_spi_csinfo *cs = spi->controller_data;
+        struct spi_transfer *xfer;
+        int status = 0, cs_toggle = 0;
+        u32 speed;
+        u8 bpw;
+
+        /* If Master's(controller) state differs from that needed by Slave */
+        if (sdd->cur_speed != spi->max_speed_hz
+                        || sdd->cur_mode != spi->mode
+                        || sdd->cur_bpw != spi->bits_per_word) {
+                sdd->cur_bpw = spi->bits_per_word;
+                sdd->cur_speed = spi->max_speed_hz;
+                sdd->cur_mode = spi->mode;
+                s3c64xx_spi_config(sdd);
+        }
+
+        /* Map all the transfers if needed */
+        if (s3c64xx_spi_map_mssg(sdd, msg)) {
+                dev_err(&spi->dev,
+                        "Xfer: Unable to map message buffers!\n");
+                status = -ENOMEM;
+                goto out;
+        }
+
+        /* Configure feedback delay */
+        writel(cs->fb_delay & 0x3, sdd->regs + S3C64XX_SPI_FB_CLK);
+
+        list_for_each_entry(xfer, &msg->transfers, transfer_list) {
+
+                unsigned long flags;
+                int use_dma;
+
+                INIT_COMPLETION(sdd->xfer_completion);
+
+                /* Only BPW and Speed may change across transfers */
+                bpw = xfer->bits_per_word ? : spi->bits_per_word;
+                speed = xfer->speed_hz ? : spi->max_speed_hz;
+
+                if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) {
+                        sdd->cur_bpw = bpw;
+                        sdd->cur_speed = speed;
+                        s3c64xx_spi_config(sdd);
+                }
+
+                /* Polling method for xfers not bigger than FIFO capacity */
+                if (xfer->len <= ((sci->fifo_lvl_mask >> 1) + 1))
+                        use_dma = 0;
+                else
+                        use_dma = 1;
+
+                spin_lock_irqsave(&sdd->lock, flags);
+
+                /* Pending only which is to be done */
+                sdd->state &= ~RXBUSY;
+                sdd->state &= ~TXBUSY;
+
+                enable_datapath(sdd, spi, xfer, use_dma);
+
+                /* Slave Select */
+                enable_cs(sdd, spi);
+
+                /* Start the signals */
+                S3C64XX_SPI_ACT(sdd);
+
+                spin_unlock_irqrestore(&sdd->lock, flags);
+
+                status = wait_for_xfer(sdd, xfer, use_dma);
+
+                /* Quiese the signals */
+                S3C64XX_SPI_DEACT(sdd);
+
+                if (status) {
+                        dev_err(&spi->dev, "I/O Error: \
+                                rx-%d tx-%d res:rx-%c tx-%c len-%d\n",
+                                xfer->rx_buf ? 1 : 0, xfer->tx_buf ? 1 : 0,
+                                (sdd->state & RXBUSY) ? 'f' : 'p',
+                                (sdd->state & TXBUSY) ? 'f' : 'p',
+                                xfer->len);
+
+                        if (use_dma) {
+                                if (xfer->tx_buf != NULL
+                                                && (sdd->state & TXBUSY))
+                                        s3c2410_dma_ctrl(sdd->tx_dmach,
+                                                        S3C2410_DMAOP_FLUSH);
+                                if (xfer->rx_buf != NULL
+                                                && (sdd->state & RXBUSY))
+                                        s3c2410_dma_ctrl(sdd->rx_dmach,
+                                                        S3C2410_DMAOP_FLUSH);
+                        }
+
+                        goto out;
+                }
+
+                if (xfer->delay_usecs)
+                        udelay(xfer->delay_usecs);
+
+                if (xfer->cs_change) {
+                        /* Hint that the next mssg is gonna be
+                           for the same device */
+                        if (list_is_last(&xfer->transfer_list,
+                                                &msg->transfers))
+                                cs_toggle = 1;
+                        else
+                                disable_cs(sdd, spi);
+                }
+
+                msg->actual_length += xfer->len;
+
+                flush_fifo(sdd);
+        }
+
+out:
+        if (!cs_toggle || status)
+                disable_cs(sdd, spi);
+        else
+                sdd->tgl_spi = spi;
+
+        s3c64xx_spi_unmap_mssg(sdd, msg);
+
+        msg->status = status;
+
+        if (msg->complete)
+                msg->complete(msg->context);
+}
+
+static int acquire_dma(struct s3c64xx_spi_driver_data *sdd)
+{
+        if (s3c2410_dma_request(sdd->rx_dmach,
+                                        &s3c64xx_spi_dma_client, NULL) < 0) {
+                dev_err(&sdd->pdev->dev, "cannot get RxDMA\n");
+                return 0;
+        }
+        s3c2410_dma_set_buffdone_fn(sdd->rx_dmach, s3c64xx_spi_dma_rxcb);
+        s3c2410_dma_devconfig(sdd->rx_dmach, S3C2410_DMASRC_HW,
+                                        sdd->sfr_start + S3C64XX_SPI_RX_DATA);
+
+        if (s3c2410_dma_request(sdd->tx_dmach,
+                                        &s3c64xx_spi_dma_client, NULL) < 0) {
+                dev_err(&sdd->pdev->dev, "cannot get TxDMA\n");
+                s3c2410_dma_free(sdd->rx_dmach, &s3c64xx_spi_dma_client);
+                return 0;
+        }
+        s3c2410_dma_set_buffdone_fn(sdd->tx_dmach, s3c64xx_spi_dma_txcb);
+        s3c2410_dma_devconfig(sdd->tx_dmach, S3C2410_DMASRC_MEM,
+                                        sdd->sfr_start + S3C64XX_SPI_TX_DATA);
+
+        return 1;
+}
+
+static void s3c64xx_spi_work(struct work_struct *work)
+{
+        struct s3c64xx_spi_driver_data *sdd = container_of(work,
+                                        struct s3c64xx_spi_driver_data, work);
+        unsigned long flags;
+
+        /* Acquire DMA channels */
+        while (!acquire_dma(sdd))
+                msleep(10);
+
+        spin_lock_irqsave(&sdd->lock, flags);
+
+        while (!list_empty(&sdd->queue)
+                                && !(sdd->state & SUSPND)) {
+
+                struct spi_message *msg;
+
+                msg = container_of(sdd->queue.next, struct spi_message, queue);
+
+                list_del_init(&msg->queue);
+
+                /* Set Xfer busy flag */
+                sdd->state |= SPIBUSY;
+
+                spin_unlock_irqrestore(&sdd->lock, flags);
+
+                handle_msg(sdd, msg);
+
+                spin_lock_irqsave(&sdd->lock, flags);
+
+                sdd->state &= ~SPIBUSY;
+        }
+
+        spin_unlock_irqrestore(&sdd->lock, flags);
+
+        /* Free DMA channels */
+        s3c2410_dma_free(sdd->tx_dmach, &s3c64xx_spi_dma_client);
+        s3c2410_dma_free(sdd->rx_dmach, &s3c64xx_spi_dma_client);
+}
+
+static int s3c64xx_spi_transfer(struct spi_device *spi,
+                                                struct spi_message *msg)
+{
+        struct s3c64xx_spi_driver_data *sdd;
+        unsigned long flags;
+
+        sdd = spi_master_get_devdata(spi->master);
+
+        spin_lock_irqsave(&sdd->lock, flags);
+
+        if (sdd->state & SUSPND) {
+                spin_unlock_irqrestore(&sdd->lock, flags);
+                return -ESHUTDOWN;
+        }
+
+        msg->status = -EINPROGRESS;
+        msg->actual_length = 0;
+
+        list_add_tail(&msg->queue, &sdd->queue);
+
+        queue_work(sdd->workqueue, &sdd->work);
+
+        spin_unlock_irqrestore(&sdd->lock, flags);
+
+        return 0;
+}
+
+/*
+ * Here we only check the validity of requested configuration
+ * and save the configuration in a local data-structure.
+ * The controller is actually configured only just before we
+ * get a message to transfer.
+ */
+static int s3c64xx_spi_setup(struct spi_device *spi)
+{
+        struct s3c64xx_spi_csinfo *cs = spi->controller_data;
+        struct s3c64xx_spi_driver_data *sdd;
+        struct s3c64xx_spi_cntrlr_info *sci;
+        struct spi_message *msg;
+        u32 psr, speed;
+        unsigned long flags;
+        int err = 0;
+
+        if (cs == NULL || cs->set_level == NULL) {
+                dev_err(&spi->dev, "No CS for SPI(%d)\n", spi->chip_select);
+                return -ENODEV;
+        }
+
+        sdd = spi_master_get_devdata(spi->master);
+        sci = sdd->cntrlr_info;
+
+        spin_lock_irqsave(&sdd->lock, flags);
+
+        list_for_each_entry(msg, &sdd->queue, queue) {
+                /* Is some mssg is already queued for this device */
+                if (msg->spi == spi) {
+                        dev_err(&spi->dev,
+                                "setup: attempt while mssg in queue!\n");
+                        spin_unlock_irqrestore(&sdd->lock, flags);
+                        return -EBUSY;
+                }
+        }
+
+        if (sdd->state & SUSPND) {
+                spin_unlock_irqrestore(&sdd->lock, flags);
+                dev_err(&spi->dev,
+                        "setup: SPI-%d not active!\n", spi->master->bus_num);
+                return -ESHUTDOWN;
+        }
+
+        spin_unlock_irqrestore(&sdd->lock, flags);
+
+        if (spi->bits_per_word != 8
+                        && spi->bits_per_word != 16
+                        && spi->bits_per_word != 32) {
+                dev_err(&spi->dev, "setup: %dbits/wrd not supported!\n",
+                                                        spi->bits_per_word);
+                err = -EINVAL;
+                goto setup_exit;
+        }
+
+        /* Check if we can provide the requested rate */
+        speed = clk_get_rate(sci->src_clk) / 2 / (0 + 1); /* Max possible */
+
+        if (spi->max_speed_hz > speed)
+                spi->max_speed_hz = speed;
+
+        psr = clk_get_rate(sci->src_clk) / 2 / spi->max_speed_hz - 1;
+        psr &= S3C64XX_SPI_PSR_MASK;
+        if (psr == S3C64XX_SPI_PSR_MASK)
+                psr--;
+
+        speed = clk_get_rate(sci->src_clk) / 2 / (psr + 1);
+        if (spi->max_speed_hz < speed) {
+                if (psr+1 < S3C64XX_SPI_PSR_MASK) {
+                        psr++;
+                } else {
+                        err = -EINVAL;
+                        goto setup_exit;
+                }
+        }
+
+        speed = clk_get_rate(sci->src_clk) / 2 / (psr + 1);
+        if (spi->max_speed_hz >= speed)
+                spi->max_speed_hz = speed;
+        else
+                err = -EINVAL;
+
+setup_exit:
+
+        /* setup() returns with device de-selected */
+        disable_cs(sdd, spi);
+
+        return err;
+}
+
+static void s3c64xx_spi_hwinit(struct s3c64xx_spi_driver_data *sdd, int channel)
+{
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        void __iomem *regs = sdd->regs;
+        unsigned int val;
+
+        sdd->cur_speed = 0;
+
+        S3C64XX_SPI_DEACT(sdd);
+
+        /* Disable Interrupts - we use Polling if not DMA mode */
+        writel(0, regs + S3C64XX_SPI_INT_EN);
+
+        writel(sci->src_clk_nr << S3C64XX_SPI_CLKSEL_SRCSHFT,
+                                regs + S3C64XX_SPI_CLK_CFG);
+        writel(0, regs + S3C64XX_SPI_MODE_CFG);
+        writel(0, regs + S3C64XX_SPI_PACKET_CNT);
+
+        /* Clear any irq pending bits */
+        writel(readl(regs + S3C64XX_SPI_PENDING_CLR),
+                                regs + S3C64XX_SPI_PENDING_CLR);
+
+        writel(0, regs + S3C64XX_SPI_SWAP_CFG);
+
+        val = readl(regs + S3C64XX_SPI_MODE_CFG);
+        val &= ~S3C64XX_SPI_MODE_4BURST;
+        val &= ~(S3C64XX_SPI_MAX_TRAILCNT << S3C64XX_SPI_TRAILCNT_OFF);
+        val |= (S3C64XX_SPI_TRAILCNT << S3C64XX_SPI_TRAILCNT_OFF);
+        writel(val, regs + S3C64XX_SPI_MODE_CFG);
+
+        flush_fifo(sdd);
+}
+
+static int __init s3c64xx_spi_probe(struct platform_device *pdev)
+{
+        struct resource *mem_res, *dmatx_res, *dmarx_res;
+        struct s3c64xx_spi_driver_data *sdd;
+        struct s3c64xx_spi_cntrlr_info *sci;
+        struct spi_master *master;
+        int ret;
+
+        if (pdev->id < 0) {
+                dev_err(&pdev->dev,
+                                "Invalid platform device id-%d\n", pdev->id);
+                return -ENODEV;
+        }
+
+        if (pdev->dev.platform_data == NULL) {
+                dev_err(&pdev->dev, "platform_data missing!\n");
+                return -ENODEV;
+        }
+
+        /* Check for availability of necessary resource */
+
+        dmatx_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
+        if (dmatx_res == NULL) {
+                dev_err(&pdev->dev, "Unable to get SPI-Tx dma resource\n");
+                return -ENXIO;
+        }
+
+        dmarx_res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
+        if (dmarx_res == NULL) {
+                dev_err(&pdev->dev, "Unable to get SPI-Rx dma resource\n");
+                return -ENXIO;
+        }
+
+        mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (mem_res == NULL) {
+                dev_err(&pdev->dev, "Unable to get SPI MEM resource\n");
+                return -ENXIO;
+        }
+
+        master = spi_alloc_master(&pdev->dev,
+                                sizeof(struct s3c64xx_spi_driver_data));
+        if (master == NULL) {
+                dev_err(&pdev->dev, "Unable to allocate SPI Master\n");
+                return -ENOMEM;
+        }
+
+        sci = pdev->dev.platform_data;
+
+        platform_set_drvdata(pdev, master);
+
+        sdd = spi_master_get_devdata(master);
+        sdd->master = master;
+        sdd->cntrlr_info = sci;
+        sdd->pdev = pdev;
+        sdd->sfr_start = mem_res->start;
+        sdd->tx_dmach = dmatx_res->start;
+        sdd->rx_dmach = dmarx_res->start;
+
+        sdd->cur_bpw = 8;
+
+        master->bus_num = pdev->id;
+        master->setup = s3c64xx_spi_setup;
+        master->transfer = s3c64xx_spi_transfer;
+        master->num_chipselect = sci->num_cs;
+        master->dma_alignment = 8;
+        /* the spi->mode bits understood by this driver: */
+        master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
+
+        if (request_mem_region(mem_res->start,
+                        resource_size(mem_res), pdev->name) == NULL) {
+                dev_err(&pdev->dev, "Req mem region failed\n");
+                ret = -ENXIO;
+                goto err0;
+        }
+
+        sdd->regs = ioremap(mem_res->start, resource_size(mem_res));
+        if (sdd->regs == NULL) {
+                dev_err(&pdev->dev, "Unable to remap IO\n");
+                ret = -ENXIO;
+                goto err1;
+        }
+
+        if (sci->cfg_gpio == NULL || sci->cfg_gpio(pdev)) {
+                dev_err(&pdev->dev, "Unable to config gpio\n");
+                ret = -EBUSY;
+                goto err2;
+        }
+
+        /* Setup clocks */
+        sdd->clk = clk_get(&pdev->dev, "spi");
+        if (IS_ERR(sdd->clk)) {
+                dev_err(&pdev->dev, "Unable to acquire clock 'spi'\n");
+                ret = PTR_ERR(sdd->clk);
+                goto err3;
+        }
+
+        if (clk_enable(sdd->clk)) {
+                dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n");
+                ret = -EBUSY;
+                goto err4;
+        }
+
+        if (sci->src_clk_nr == S3C64XX_SPI_SRCCLK_PCLK)
+                sci->src_clk = sdd->clk;
+        else
+                sci->src_clk = clk_get(&pdev->dev, sci->src_clk_name);
+        if (IS_ERR(sci->src_clk)) {
+                dev_err(&pdev->dev,
+                        "Unable to acquire clock '%s'\n", sci->src_clk_name);
+                ret = PTR_ERR(sci->src_clk);
+                goto err5;
+        }
+
+        if (sci->src_clk != sdd->clk && clk_enable(sci->src_clk)) {
+                dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
+                                                        sci->src_clk_name);
+                ret = -EBUSY;
+                goto err6;
+        }
+
+        sdd->workqueue = create_singlethread_workqueue(
+                                                dev_name(master->dev.parent));
+        if (sdd->workqueue == NULL) {
+                dev_err(&pdev->dev, "Unable to create workqueue\n");
+                ret = -ENOMEM;
+                goto err7;
+        }
+
+        /* Setup Deufult Mode */
+        s3c64xx_spi_hwinit(sdd, pdev->id);
+
+        spin_lock_init(&sdd->lock);
+        init_completion(&sdd->xfer_completion);
+        INIT_WORK(&sdd->work, s3c64xx_spi_work);
+        INIT_LIST_HEAD(&sdd->queue);
+
+        if (spi_register_master(master)) {
+                dev_err(&pdev->dev, "cannot register SPI master\n");
+                ret = -EBUSY;
+                goto err8;
+        }
+
+        dev_dbg(&pdev->dev, "Samsung SoC SPI Driver loaded for Bus SPI-%d \
+                                        with %d Slaves attached\n",
+                                        pdev->id, master->num_chipselect);
+        dev_dbg(&pdev->dev, "\tIOmem=[0x%x-0x%x]\
+                                        \tDMA=[Rx-%d, Tx-%d]\n",
+                                        mem_res->end, mem_res->start,
+                                        sdd->rx_dmach, sdd->tx_dmach);
+
+        return 0;
+
+err8:
+        destroy_workqueue(sdd->workqueue);
+err7:
+        if (sci->src_clk != sdd->clk)
+                clk_disable(sci->src_clk);
+err6:
+        if (sci->src_clk != sdd->clk)
+                clk_put(sci->src_clk);
+err5:
+        clk_disable(sdd->clk);
+err4:
+        clk_put(sdd->clk);
+err3:
+err2:
+        iounmap((void *) sdd->regs);
+err1:
+        release_mem_region(mem_res->start, resource_size(mem_res));
+err0:
+        platform_set_drvdata(pdev, NULL);
+        spi_master_put(master);
+
+        return ret;
+}
+
+static int s3c64xx_spi_remove(struct platform_device *pdev)
+{
+        struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
+        struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        struct resource *mem_res;
+        unsigned long flags;
+
+        spin_lock_irqsave(&sdd->lock, flags);
+        sdd->state |= SUSPND;
+        spin_unlock_irqrestore(&sdd->lock, flags);
+
+        while (sdd->state & SPIBUSY)
+                msleep(10);
+
+        spi_unregister_master(master);
+
+        destroy_workqueue(sdd->workqueue);
+
+        if (sci->src_clk != sdd->clk)
+                clk_disable(sci->src_clk);
+
+        if (sci->src_clk != sdd->clk)
+                clk_put(sci->src_clk);
+
+        clk_disable(sdd->clk);
+        clk_put(sdd->clk);
+
+        iounmap((void *) sdd->regs);
+
+        mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        release_mem_region(mem_res->start, resource_size(mem_res));
+
+        platform_set_drvdata(pdev, NULL);
+        spi_master_put(master);
+
+        return 0;
+}
+
+#ifdef CONFIG_PM
+static int s3c64xx_spi_suspend(struct platform_device *pdev, pm_message_t state)
+{
+        struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
+        struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        struct s3c64xx_spi_csinfo *cs;
+        unsigned long flags;
+
+        spin_lock_irqsave(&sdd->lock, flags);
+        sdd->state |= SUSPND;
+        spin_unlock_irqrestore(&sdd->lock, flags);
+
+        while (sdd->state & SPIBUSY)
+                msleep(10);
+
+        /* Disable the clock */
+        if (sci->src_clk != sdd->clk)
+                clk_disable(sci->src_clk);
+
+        clk_disable(sdd->clk);
+
+        sdd->cur_speed = 0; /* Output Clock is stopped */
+
+        return 0;
+}
+
+static int s3c64xx_spi_resume(struct platform_device *pdev)
+{
+        struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
+        struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        unsigned long flags;
+
+        sci->cfg_gpio(pdev);
+
+        /* Enable the clock */
+        if (sci->src_clk != sdd->clk)
+                clk_enable(sci->src_clk);
+
+        clk_enable(sdd->clk);
+
+        s3c64xx_spi_hwinit(sdd, pdev->id);
+
+        spin_lock_irqsave(&sdd->lock, flags);
+        sdd->state &= ~SUSPND;
+        spin_unlock_irqrestore(&sdd->lock, flags);
+
+        return 0;
+}
+#else
+#define s3c64xx_spi_suspend     NULL
+#define s3c64xx_spi_resume      NULL
+#endif /* CONFIG_PM */
+
+static struct platform_driver s3c64xx_spi_driver = {
+        .driver = {
+                .name   = "s3c64xx-spi",
+                .owner = THIS_MODULE,
+        },
+        .remove = s3c64xx_spi_remove,
+        .suspend = s3c64xx_spi_suspend,
+        .resume = s3c64xx_spi_resume,
+};
+MODULE_ALIAS("platform:s3c64xx-spi");
+
+static int __init s3c64xx_spi_init(void)
+{
+        return platform_driver_probe(&s3c64xx_spi_driver, s3c64xx_spi_probe);
+}
+module_init(s3c64xx_spi_init);
+
+static void __exit s3c64xx_spi_exit(void)
+{
+        platform_driver_unregister(&s3c64xx_spi_driver);
+}
+module_exit(s3c64xx_spi_exit);
+
+MODULE_AUTHOR("Jaswinder Singh <jassi.brar@samsung.com>");
+MODULE_DESCRIPTION("S3C64XX SPI Controller Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/spi/spi_sh_sci.c b/drivers/spi/spi_sh_sci.c
index 7d36720eb982..a65c12ffa733 100644
--- a/drivers/spi/spi_sh_sci.c
+++ b/drivers/spi/spi_sh_sci.c
@@ -148,7 +148,7 @@ static int sh_sci_spi_probe(struct platform_device *dev)
                 ret = -ENOENT;
                 goto err1;
         }
-        sp->membase = ioremap(r->start, r->end - r->start + 1);
+        sp->membase = ioremap(r->start, resource_size(r));
         if (!sp->membase) {
                 ret = -ENXIO;
                 goto err1;
diff --git a/drivers/spi/spi_txx9.c b/drivers/spi/spi_txx9.c
index 19f75627c3de..dfa024b633e1 100644
--- a/drivers/spi/spi_txx9.c
+++ b/drivers/spi/spi_txx9.c
@@ -375,12 +375,10 @@ static int __init txx9spi_probe(struct platform_device *dev)
         res = platform_get_resource(dev, IORESOURCE_MEM, 0);
         if (!res)
                 goto exit_busy;
-        if (!devm_request_mem_region(&dev->dev,
-                                     res->start, res->end - res->start + 1,
+        if (!devm_request_mem_region(&dev->dev, res->start, resource_size(res),
                                      "spi_txx9"))
                 goto exit_busy;
-        c->membase = devm_ioremap(&dev->dev,
-                                  res->start, res->end - res->start + 1);
+        c->membase = devm_ioremap(&dev->dev, res->start, resource_size(res));
         if (!c->membase)
                 goto exit_busy;
 
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 9c446e6003d5..ea1bec3c9a13 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -53,7 +53,7 @@
 #define SPIDEV_MAJOR                    153     /* assigned */
 #define N_SPI_MINORS                    32      /* ... up to 256 */
 
-static unsigned long    minors[N_SPI_MINORS / BITS_PER_LONG];
+static DECLARE_BITMAP(minors, N_SPI_MINORS);
 
 
 /* Bit masks for spi_device.mode management.  Note that incorrect
@@ -558,7 +558,7 @@ static struct class *spidev_class;
 
 /*-------------------------------------------------------------------------*/
 
-static int spidev_probe(struct spi_device *spi)
+static int __devinit spidev_probe(struct spi_device *spi)
 {
         struct spidev_data      *spidev;
         int                     status;
@@ -607,7 +607,7 @@ static int spidev_probe(struct spi_device *spi)
         return status;
 }
 
-static int spidev_remove(struct spi_device *spi)
+static int __devexit spidev_remove(struct spi_device *spi)
 {
         struct spidev_data      *spidev = spi_get_drvdata(spi);
 
@@ -629,7 +629,7 @@ static int spidev_remove(struct spi_device *spi)
         return 0;
 }
 
-static struct spi_driver spidev_spi = {
+static struct spi_driver spidev_spi_driver = {
         .driver = {
                 .name =         "spidev",
                 .owner =        THIS_MODULE,
@@ -661,14 +661,14 @@ static int __init spidev_init(void)
 
         spidev_class = class_create(THIS_MODULE, "spidev");
         if (IS_ERR(spidev_class)) {
-                unregister_chrdev(SPIDEV_MAJOR, spidev_spi.driver.name);
+                unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name);
                 return PTR_ERR(spidev_class);
         }
 
-        status = spi_register_driver(&spidev_spi);
+        status = spi_register_driver(&spidev_spi_driver);
         if (status < 0) {
                 class_destroy(spidev_class);
-                unregister_chrdev(SPIDEV_MAJOR, spidev_spi.driver.name);
+                unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name);
         }
         return status;
 }
@@ -676,9 +676,9 @@ module_init(spidev_init);
 
 static void __exit spidev_exit(void)
 {
-        spi_unregister_driver(&spidev_spi);
+        spi_unregister_driver(&spidev_spi_driver);
         class_destroy(spidev_class);
-        unregister_chrdev(SPIDEV_MAJOR, spidev_spi.driver.name);
+        unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name);
 }
 module_exit(spidev_exit);
 
diff --git a/drivers/staging/iio/ring_sw.h b/drivers/staging/iio/ring_sw.h
index f0b86f02cd80..fd677f008365 100644
--- a/drivers/staging/iio/ring_sw.h
+++ b/drivers/staging/iio/ring_sw.h
@@ -29,7 +29,6 @@
  * driver requests - some may support multiple options */
 
 
-#include <linux/autoconf.h>
 #include "iio.h"
 #include "ring_generic.h"
 
diff --git a/drivers/staging/octeon/Kconfig b/drivers/staging/octeon/Kconfig
index 536e2382de54..638ad6b35891 100644
--- a/drivers/staging/octeon/Kconfig
+++ b/drivers/staging/octeon/Kconfig
@@ -1,7 +1,8 @@
 config OCTEON_ETHERNET
         tristate "Cavium Networks Octeon Ethernet support"
         depends on CPU_CAVIUM_OCTEON
-        select MII
+        select PHYLIB
+        select MDIO_OCTEON
         help
           This driver supports the builtin ethernet ports on Cavium
           Networks' products in the Octeon family. This driver supports the
diff --git a/drivers/staging/octeon/ethernet-mdio.c b/drivers/staging/octeon/ethernet-mdio.c
index 31a58e508924..05a5cc0f43ed 100644
--- a/drivers/staging/octeon/ethernet-mdio.c
+++ b/drivers/staging/octeon/ethernet-mdio.c
@@ -26,7 +26,8 @@
 **********************************************************************/
 #include <linux/kernel.h>
 #include <linux/ethtool.h>
-#include <linux/mii.h>
+#include <linux/phy.h>
+
 #include <net/dst.h>
 
 #include <asm/octeon/octeon.h>
@@ -34,86 +35,12 @@
 #include "ethernet-defines.h"
 #include "octeon-ethernet.h"
 #include "ethernet-mdio.h"
+#include "ethernet-util.h"
 
 #include "cvmx-helper-board.h"
 
 #include "cvmx-smix-defs.h"
 
-DECLARE_MUTEX(mdio_sem);
-
-/**
- * Perform an MII read. Called by the generic MII routines
- *
- * @dev:      Device to perform read for
- * @phy_id:   The MII phy id
- * @location: Register location to read
- * Returns Result from the read or zero on failure
- */
-static int cvm_oct_mdio_read(struct net_device *dev, int phy_id, int location)
-{
-        union cvmx_smix_cmd smi_cmd;
-        union cvmx_smix_rd_dat smi_rd;
-
-        smi_cmd.u64 = 0;
-        smi_cmd.s.phy_op = 1;
-        smi_cmd.s.phy_adr = phy_id;
-        smi_cmd.s.reg_adr = location;
-        cvmx_write_csr(CVMX_SMIX_CMD(0), smi_cmd.u64);
-
-        do {
-                if (!in_interrupt())
-                        yield();
-                smi_rd.u64 = cvmx_read_csr(CVMX_SMIX_RD_DAT(0));
-        } while (smi_rd.s.pending);
-
-        if (smi_rd.s.val)
-                return smi_rd.s.dat;
-        else
-                return 0;
-}
-
-static int cvm_oct_mdio_dummy_read(struct net_device *dev, int phy_id,
-                                   int location)
-{
-        return 0xffff;
-}
-
-/**
- * Perform an MII write. Called by the generic MII routines
- *
- * @dev:      Device to perform write for
- * @phy_id:   The MII phy id
- * @location: Register location to write
- * @val:      Value to write
- */
-static void cvm_oct_mdio_write(struct net_device *dev, int phy_id, int location,
-                               int val)
-{
-        union cvmx_smix_cmd smi_cmd;
-        union cvmx_smix_wr_dat smi_wr;
-
-        smi_wr.u64 = 0;
-        smi_wr.s.dat = val;
-        cvmx_write_csr(CVMX_SMIX_WR_DAT(0), smi_wr.u64);
-
-        smi_cmd.u64 = 0;
-        smi_cmd.s.phy_op = 0;
-        smi_cmd.s.phy_adr = phy_id;
-        smi_cmd.s.reg_adr = location;
-        cvmx_write_csr(CVMX_SMIX_CMD(0), smi_cmd.u64);
-
-        do {
-                if (!in_interrupt())
-                        yield();
-                smi_wr.u64 = cvmx_read_csr(CVMX_SMIX_WR_DAT(0));
-        } while (smi_wr.s.pending);
-}
-
-static void cvm_oct_mdio_dummy_write(struct net_device *dev, int phy_id,
-                                     int location, int val)
-{
-}
-
 static void cvm_oct_get_drvinfo(struct net_device *dev,
                                 struct ethtool_drvinfo *info)
 {
@@ -125,49 +52,37 @@ static void cvm_oct_get_drvinfo(struct net_device *dev,
 static int cvm_oct_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 {
         struct octeon_ethernet *priv = netdev_priv(dev);
-        int ret;
 
-        down(&mdio_sem);
-        ret = mii_ethtool_gset(&priv->mii_info, cmd);
-        up(&mdio_sem);
+        if (priv->phydev)
+                return phy_ethtool_gset(priv->phydev, cmd);
 
-        return ret;
+        return -EINVAL;
 }
 
 static int cvm_oct_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 {
         struct octeon_ethernet *priv = netdev_priv(dev);
-        int ret;
 
-        down(&mdio_sem);
-        ret = mii_ethtool_sset(&priv->mii_info, cmd);
-        up(&mdio_sem);
+        if (!capable(CAP_NET_ADMIN))
+                return -EPERM;
+
+        if (priv->phydev)
+                return phy_ethtool_sset(priv->phydev, cmd);
 
-        return ret;
+        return -EINVAL;
 }
 
 static int cvm_oct_nway_reset(struct net_device *dev)
 {
         struct octeon_ethernet *priv = netdev_priv(dev);
-        int ret;
 
-        down(&mdio_sem);
-        ret = mii_nway_restart(&priv->mii_info);
-        up(&mdio_sem);
+        if (!capable(CAP_NET_ADMIN))
+                return -EPERM;
 
-        return ret;
-}
+        if (priv->phydev)
+                return phy_start_aneg(priv->phydev);
 
-static u32 cvm_oct_get_link(struct net_device *dev)
-{
-        struct octeon_ethernet *priv = netdev_priv(dev);
-        u32 ret;
-
-        down(&mdio_sem);
-        ret = mii_link_ok(&priv->mii_info);
-        up(&mdio_sem);
-
-        return ret;
+        return -EINVAL;
 }
 
 const struct ethtool_ops cvm_oct_ethtool_ops = {
@@ -175,7 +90,7 @@ const struct ethtool_ops cvm_oct_ethtool_ops = {
         .get_settings = cvm_oct_get_settings,
         .set_settings = cvm_oct_set_settings,
         .nway_reset = cvm_oct_nway_reset,
-        .get_link = cvm_oct_get_link,
+        .get_link = ethtool_op_get_link,
         .get_sg = ethtool_op_get_sg,
         .get_tx_csum = ethtool_op_get_tx_csum,
 };
@@ -191,41 +106,78 @@ const struct ethtool_ops cvm_oct_ethtool_ops = {
 int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 {
         struct octeon_ethernet *priv = netdev_priv(dev);
-        struct mii_ioctl_data *data = if_mii(rq);
-        unsigned int duplex_chg;
-        int ret;
 
-        down(&mdio_sem);
-        ret = generic_mii_ioctl(&priv->mii_info, data, cmd, &duplex_chg);
-        up(&mdio_sem);
+        if (!netif_running(dev))
+                return -EINVAL;
+
+        if (!priv->phydev)
+                return -EINVAL;
+
+        return phy_mii_ioctl(priv->phydev, if_mii(rq), cmd);
+}
 
-        return ret;
+static void cvm_oct_adjust_link(struct net_device *dev)
+{
+        struct octeon_ethernet *priv = netdev_priv(dev);
+        cvmx_helper_link_info_t link_info;
+
+        if (priv->last_link != priv->phydev->link) {
+                priv->last_link = priv->phydev->link;
+                link_info.u64 = 0;
+                link_info.s.link_up = priv->last_link ? 1 : 0;
+                link_info.s.full_duplex = priv->phydev->duplex ? 1 : 0;
+                link_info.s.speed = priv->phydev->speed;
+                cvmx_helper_link_set( priv->port, link_info);
+                if (priv->last_link) {
+                        netif_carrier_on(dev);
+                        if (priv->queue != -1)
+                                DEBUGPRINT("%s: %u Mbps %s duplex, "
+                                           "port %2d, queue %2d\n",
+                                           dev->name, priv->phydev->speed,
+                                           priv->phydev->duplex ?
+                                                "Full" : "Half",
+                                           priv->port, priv->queue);
+                        else
+                                DEBUGPRINT("%s: %u Mbps %s duplex, "
+                                           "port %2d, POW\n",
+                                           dev->name, priv->phydev->speed,
+                                           priv->phydev->duplex ?
+                                                "Full" : "Half",
+                                           priv->port);
+                } else {
+                        netif_carrier_off(dev);
+                        DEBUGPRINT("%s: Link down\n", dev->name);
+                }
+        }
 }
 
+
 /**
- * Setup the MDIO device structures
+ * Setup the PHY
  *
  * @dev:    Device to setup
  *
  * Returns Zero on success, negative on failure
  */
-int cvm_oct_mdio_setup_device(struct net_device *dev)
+int cvm_oct_phy_setup_device(struct net_device *dev)
 {
         struct octeon_ethernet *priv = netdev_priv(dev);
-        int phy_id = cvmx_helper_board_get_mii_address(priv->port);
-        if (phy_id != -1) {
-                priv->mii_info.dev = dev;
-                priv->mii_info.phy_id = phy_id;
-                priv->mii_info.phy_id_mask = 0xff;
-                priv->mii_info.supports_gmii = 1;
-                priv->mii_info.reg_num_mask = 0x1f;
-                priv->mii_info.mdio_read = cvm_oct_mdio_read;
-                priv->mii_info.mdio_write = cvm_oct_mdio_write;
-        } else {
-                /* Supply dummy MDIO routines so the kernel won't crash
-                   if the user tries to read them */
-                priv->mii_info.mdio_read = cvm_oct_mdio_dummy_read;
-                priv->mii_info.mdio_write = cvm_oct_mdio_dummy_write;
+
+        int phy_addr = cvmx_helper_board_get_mii_address(priv->port);
+        if (phy_addr != -1) {
+                char phy_id[20];
+
+                snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, "0", phy_addr);
+
+                priv->phydev = phy_connect(dev, phy_id, cvm_oct_adjust_link, 0,
+                                        PHY_INTERFACE_MODE_GMII);
+
+                if (IS_ERR(priv->phydev)) {
+                        priv->phydev = NULL;
+                        return -1;
+                }
+                priv->last_link = 0;
+                phy_start_aneg(priv->phydev);
         }
         return 0;
 }
diff --git a/drivers/staging/octeon/ethernet-mdio.h b/drivers/staging/octeon/ethernet-mdio.h
index b3328aeec2df..55d0614a7cd9 100644
--- a/drivers/staging/octeon/ethernet-mdio.h
+++ b/drivers/staging/octeon/ethernet-mdio.h
@@ -43,4 +43,4 @@
 
 extern const struct ethtool_ops cvm_oct_ethtool_ops;
 int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
-int cvm_oct_mdio_setup_device(struct net_device *dev);
+int cvm_oct_phy_setup_device(struct net_device *dev);
diff --git a/drivers/staging/octeon/ethernet-proc.c b/drivers/staging/octeon/ethernet-proc.c
index 8fa88fc419b7..16308d484d3b 100644
--- a/drivers/staging/octeon/ethernet-proc.c
+++ b/drivers/staging/octeon/ethernet-proc.c
@@ -25,7 +25,6 @@
  * Contact Cavium Networks for more information
 **********************************************************************/
 #include <linux/kernel.h>
-#include <linux/mii.h>
 #include <linux/seq_file.h>
 #include <linux/proc_fs.h>
 #include <net/dst.h>
@@ -38,112 +37,6 @@
 #include "cvmx-helper.h"
 #include "cvmx-pip.h"
 
-static unsigned long long cvm_oct_stats_read_switch(struct net_device *dev,
-                                                    int phy_id, int offset)
-{
-        struct octeon_ethernet *priv = netdev_priv(dev);
-
-        priv->mii_info.mdio_write(dev, phy_id, 0x1d, 0xcc00 | offset);
-        return ((uint64_t) priv->mii_info.
-                mdio_read(dev, phy_id,
-                          0x1e) << 16) | (uint64_t) priv->mii_info.
-            mdio_read(dev, phy_id, 0x1f);
-}
-
-static int cvm_oct_stats_switch_show(struct seq_file *m, void *v)
-{
-        static const int ports[] = { 0, 1, 2, 3, 9, -1 };
-        struct net_device *dev = cvm_oct_device[0];
-        int index = 0;
-
-        while (ports[index] != -1) {
-
-                /* Latch port */
-                struct octeon_ethernet *priv = netdev_priv(dev);
-
-                priv->mii_info.mdio_write(dev, 0x1b, 0x1d,
-                                          0xdc00 | ports[index]);
-                seq_printf(m, "\nSwitch Port %d\n", ports[index]);
-                seq_printf(m, "InGoodOctets:   %12llu\t"
-                           "OutOctets:      %12llu\t"
-                           "64 Octets:      %12llu\n",
-                           cvm_oct_stats_read_switch(dev, 0x1b,
-                                                     0x00) |
-                           (cvm_oct_stats_read_switch(dev, 0x1b, 0x01) << 32),
-                           cvm_oct_stats_read_switch(dev, 0x1b,
-                                                     0x0E) |
-                           (cvm_oct_stats_read_switch(dev, 0x1b, 0x0F) << 32),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x08));
-
-                seq_printf(m, "InBadOctets:    %12llu\t"
-                           "OutUnicast:     %12llu\t"
-                           "65-127 Octets:  %12llu\n",
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x02),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x10),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x09));
-
-                seq_printf(m, "InUnicast:      %12llu\t"
-                           "OutBroadcasts:  %12llu\t"
-                           "128-255 Octets: %12llu\n",
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x04),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x13),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x0A));
-
-                seq_printf(m, "InBroadcasts:   %12llu\t"
-                           "OutMulticasts:  %12llu\t"
-                           "256-511 Octets: %12llu\n",
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x06),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x12),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x0B));
-
-                seq_printf(m, "InMulticasts:   %12llu\t"
-                           "OutPause:       %12llu\t"
-                           "512-1023 Octets:%12llu\n",
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x07),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x15),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x0C));
-
-                seq_printf(m, "InPause:        %12llu\t"
-                           "Excessive:      %12llu\t"
-                           "1024-Max Octets:%12llu\n",
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x16),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x11),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x0D));
-
-                seq_printf(m, "InUndersize:    %12llu\t"
-                           "Collisions:     %12llu\n",
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x18),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x1E));
-
-                seq_printf(m, "InFragments:    %12llu\t"
-                           "Deferred:       %12llu\n",
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x19),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x05));
-
-                seq_printf(m, "InOversize:     %12llu\t"
-                           "Single:         %12llu\n",
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x1A),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x14));
-
-                seq_printf(m, "InJabber:       %12llu\t"
-                           "Multiple:       %12llu\n",
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x1B),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x17));
-
-                seq_printf(m, "In RxErr:       %12llu\t"
-                           "OutFCSErr:      %12llu\n",
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x1C),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x03));
-
-                seq_printf(m, "InFCSErr:       %12llu\t"
-                           "Late:           %12llu\n",
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x1D),
-                           cvm_oct_stats_read_switch(dev, 0x1b, 0x1F));
-                index++;
-        }
-        return 0;
-}
-
 /**
  * User is reading /proc/octeon_ethernet_stats
  *
@@ -215,11 +108,6 @@ static int cvm_oct_stats_show(struct seq_file *m, void *v)
                 }
         }
 
-        if (cvm_oct_device[0]) {
-                priv = netdev_priv(cvm_oct_device[0]);
-                if (priv->imode == CVMX_HELPER_INTERFACE_MODE_GMII)
-                        cvm_oct_stats_switch_show(m, v);
-        }
         return 0;
 }
 
diff --git a/drivers/staging/octeon/ethernet-rgmii.c b/drivers/staging/octeon/ethernet-rgmii.c
index fbaa465d2fac..3820f1ec11d1 100644
--- a/drivers/staging/octeon/ethernet-rgmii.c
+++ b/drivers/staging/octeon/ethernet-rgmii.c
@@ -147,32 +147,36 @@ static void cvm_oct_rgmii_poll(struct net_device *dev)
                 cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface),
                                gmxx_rxx_int_reg.u64);
         }
-
-        link_info = cvmx_helper_link_autoconf(priv->port);
-        priv->link_info = link_info.u64;
+        if (priv->phydev == NULL) {
+                link_info = cvmx_helper_link_autoconf(priv->port);
+                priv->link_info = link_info.u64;
+        }
         spin_unlock_irqrestore(&global_register_lock, flags);
 
-        /* Tell Linux */
-        if (link_info.s.link_up) {
-
-                if (!netif_carrier_ok(dev))
-                        netif_carrier_on(dev);
-                if (priv->queue != -1)
-                        DEBUGPRINT
-                            ("%s: %u Mbps %s duplex, port %2d, queue %2d\n",
-                             dev->name, link_info.s.speed,
-                             (link_info.s.full_duplex) ? "Full" : "Half",
-                             priv->port, priv->queue);
-                else
-                        DEBUGPRINT("%s: %u Mbps %s duplex, port %2d, POW\n",
-                                   dev->name, link_info.s.speed,
-                                   (link_info.s.full_duplex) ? "Full" : "Half",
-                                   priv->port);
-        } else {
-
-                if (netif_carrier_ok(dev))
-                        netif_carrier_off(dev);
-                DEBUGPRINT("%s: Link down\n", dev->name);
+        if (priv->phydev == NULL) {
+                /* Tell core. */
+                if (link_info.s.link_up) {
+                        if (!netif_carrier_ok(dev))
+                                netif_carrier_on(dev);
+                        if (priv->queue != -1)
+                                DEBUGPRINT("%s: %u Mbps %s duplex, "
+                                           "port %2d, queue %2d\n",
+                                           dev->name, link_info.s.speed,
+                                           (link_info.s.full_duplex) ?
+                                                "Full" : "Half",
+                                           priv->port, priv->queue);
+                        else
+                                DEBUGPRINT("%s: %u Mbps %s duplex, "
+                                           "port %2d, POW\n",
+                                           dev->name, link_info.s.speed,
+                                           (link_info.s.full_duplex) ?
+                                                "Full" : "Half",
+                                           priv->port);
+                } else {
+                        if (netif_carrier_ok(dev))
+                                netif_carrier_off(dev);
+                        DEBUGPRINT("%s: Link down\n", dev->name);
+                }
         }
 }
 
diff --git a/drivers/staging/octeon/ethernet-sgmii.c b/drivers/staging/octeon/ethernet-sgmii.c
index 2b54996bd85d..6061d01eca2d 100644
--- a/drivers/staging/octeon/ethernet-sgmii.c
+++ b/drivers/staging/octeon/ethernet-sgmii.c
@@ -113,7 +113,7 @@ int cvm_oct_sgmii_init(struct net_device *dev)
         struct octeon_ethernet *priv = netdev_priv(dev);
         cvm_oct_common_init(dev);
         dev->netdev_ops->ndo_stop(dev);
-        if (!octeon_is_simulation())
+        if (!octeon_is_simulation() && priv->phydev == NULL)
                 priv->poll = cvm_oct_sgmii_poll;
 
         /* FIXME: Need autoneg logic */
diff --git a/drivers/staging/octeon/ethernet-xaui.c b/drivers/staging/octeon/ethernet-xaui.c
index 0c2e7cc40f35..ee3dc41b2c53 100644
--- a/drivers/staging/octeon/ethernet-xaui.c
+++ b/drivers/staging/octeon/ethernet-xaui.c
@@ -112,7 +112,7 @@ int cvm_oct_xaui_init(struct net_device *dev)
         struct octeon_ethernet *priv = netdev_priv(dev);
         cvm_oct_common_init(dev);
         dev->netdev_ops->ndo_stop(dev);
-        if (!octeon_is_simulation())
+        if (!octeon_is_simulation() && priv->phydev == NULL)
                 priv->poll = cvm_oct_xaui_poll;
 
         return 0;
diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c
index 492c5029992d..4cfd4b136b32 100644
--- a/drivers/staging/octeon/ethernet.c
+++ b/drivers/staging/octeon/ethernet.c
@@ -30,7 +30,7 @@
 #include <linux/netdevice.h>
 #include <linux/etherdevice.h>
 #include <linux/delay.h>
-#include <linux/mii.h>
+#include <linux/phy.h>
 
 #include <net/dst.h>
 
@@ -132,8 +132,6 @@ static struct timer_list cvm_oct_poll_timer;
  */
 struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS];
 
-extern struct semaphore mdio_sem;
-
 /**
  * Periodic timer tick for slow management operations
  *
@@ -160,13 +158,8 @@ static void cvm_do_timer(unsigned long arg)
                 goto out;
 
         priv = netdev_priv(cvm_oct_device[port]);
-        if (priv->poll) {
-                /* skip polling if we don't get the lock */
-                if (!down_trylock(&mdio_sem)) {
-                        priv->poll(cvm_oct_device[port]);
-                        up(&mdio_sem);
-                }
-        }
+        if (priv->poll)
+                priv->poll(cvm_oct_device[port]);
 
         queues_per_port = cvmx_pko_get_num_queues(port);
         /* Drain any pending packets in the free list */
@@ -524,7 +517,7 @@ int cvm_oct_common_init(struct net_device *dev)
         dev->features |= NETIF_F_LLTX;
         SET_ETHTOOL_OPS(dev, &cvm_oct_ethtool_ops);
 
-        cvm_oct_mdio_setup_device(dev);
+        cvm_oct_phy_setup_device(dev);
         dev->netdev_ops->ndo_set_mac_address(dev, &sa);
         dev->netdev_ops->ndo_change_mtu(dev, dev->mtu);
 
@@ -540,7 +533,10 @@ int cvm_oct_common_init(struct net_device *dev)
 
 void cvm_oct_common_uninit(struct net_device *dev)
 {
-        /* Currently nothing to do */
+        struct octeon_ethernet *priv = netdev_priv(dev);
+
+        if (priv->phydev)
+                phy_disconnect(priv->phydev);
 }
 
 static const struct net_device_ops cvm_oct_npi_netdev_ops = {
@@ -627,6 +623,8 @@ static const struct net_device_ops cvm_oct_pow_netdev_ops = {
 #endif
 };
 
+extern void octeon_mdiobus_force_mod_depencency(void);
+
 /**
  * Module/ driver initialization. Creates the linux network
  * devices.
@@ -640,6 +638,7 @@ static int __init cvm_oct_init_module(void)
         int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE;
         int qos;
 
+        octeon_mdiobus_force_mod_depencency();
         pr_notice("cavium-ethernet %s\n", OCTEON_ETHERNET_VERSION);
 
         if (OCTEON_IS_MODEL(OCTEON_CN52XX))
diff --git a/drivers/staging/octeon/octeon-ethernet.h b/drivers/staging/octeon/octeon-ethernet.h
index 3aef9878fc0a..402a15b9bb0e 100644
--- a/drivers/staging/octeon/octeon-ethernet.h
+++ b/drivers/staging/octeon/octeon-ethernet.h
@@ -50,9 +50,9 @@ struct octeon_ethernet {
         /* List of outstanding tx buffers per queue */
         struct sk_buff_head tx_free_list[16];
         /* Device statistics */
-        struct net_device_stats stats
-;       /* Generic MII info structure */
-        struct mii_if_info mii_info;
+        struct net_device_stats stats;
+        struct phy_device *phydev;
+        unsigned int last_link;
         /* Last negotiated link state */
         uint64_t link_info;
         /* Called periodically to check link status */
diff --git a/drivers/staging/panel/panel.c b/drivers/staging/panel/panel.c
index 4ce399b6d237..f98a52448eae 100644
--- a/drivers/staging/panel/panel.c
+++ b/drivers/staging/panel/panel.c
@@ -55,7 +55,7 @@
 #include <linux/list.h>
 #include <linux/notifier.h>
 #include <linux/reboot.h>
-#include <linux/utsrelease.h>
+#include <generated/utsrelease.h>
 
 #include <linux/io.h>
 #include <asm/uaccess.h>
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 12f1ad2fd0e8..74d07f4e8b7d 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -37,7 +37,7 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 #include <linux/gpio.h>
-#include <mach/usb.h>
+#include <plat/usb.h>
 
 /*
  * OMAP USBHOST Register addresses: VIRTUAL ADDRESSES
diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c
index 2051c9dc813b..b7687c55fe16 100644
--- a/drivers/video/atafb.c
+++ b/drivers/video/atafb.c
@@ -2245,9 +2245,6 @@ static int ext_setcolreg(unsigned int regno, unsigned int red,
         if (regno > 255)
                 return 1;
 
-        if (regno > 255)
-                return 1;
-
         switch (external_card_type) {
         case IS_VGA:
                 OUTB(0x3c8, regno);
diff --git a/drivers/video/backlight/adp5520_bl.c b/drivers/video/backlight/adp5520_bl.c
index 4c10edecfb66..86d95c228adb 100644
--- a/drivers/video/backlight/adp5520_bl.c
+++ b/drivers/video/backlight/adp5520_bl.c
@@ -85,7 +85,7 @@ static int adp5520_bl_get_brightness(struct backlight_device *bl)
         return error ? data->current_brightness : reg_val;
 }
 
-static struct backlight_ops adp5520_bl_ops = {
+static const struct backlight_ops adp5520_bl_ops = {
         .update_status  = adp5520_bl_update_status,
         .get_brightness = adp5520_bl_get_brightness,
 };
diff --git a/drivers/video/backlight/adx_bl.c b/drivers/video/backlight/adx_bl.c
index 2c3bdfc620b7..d769b0bab21a 100644
--- a/drivers/video/backlight/adx_bl.c
+++ b/drivers/video/backlight/adx_bl.c
@@ -61,7 +61,7 @@ static int adx_backlight_check_fb(struct fb_info *fb)
         return 1;
 }
 
-static struct backlight_ops adx_backlight_ops = {
+static const struct backlight_ops adx_backlight_ops = {
         .options = 0,
         .update_status = adx_backlight_update_status,
         .get_brightness = adx_backlight_get_brightness,
diff --git a/drivers/video/backlight/atmel-pwm-bl.c b/drivers/video/backlight/atmel-pwm-bl.c
index 2cf7ba52f67c..f625ffc69ad3 100644
--- a/drivers/video/backlight/atmel-pwm-bl.c
+++ b/drivers/video/backlight/atmel-pwm-bl.c
@@ -113,7 +113,7 @@ static int atmel_pwm_bl_init_pwm(struct atmel_pwm_bl *pwmbl)
         return pwm_channel_enable(&pwmbl->pwmc);
 }
 
-static struct backlight_ops atmel_pwm_bl_ops = {
+static const struct backlight_ops atmel_pwm_bl_ops = {
         .get_brightness = atmel_pwm_bl_get_intensity,
         .update_status  = atmel_pwm_bl_set_intensity,
 };
diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c
index 6615ac7fa60a..18829cf68b1b 100644
--- a/drivers/video/backlight/backlight.c
+++ b/drivers/video/backlight/backlight.c
@@ -269,7 +269,7 @@ EXPORT_SYMBOL(backlight_force_update);
  * ERR_PTR() or a pointer to the newly allocated device.
  */
 struct backlight_device *backlight_device_register(const char *name,
-                struct device *parent, void *devdata, struct backlight_ops *ops)
+                struct device *parent, void *devdata, const struct backlight_ops *ops)
 {
         struct backlight_device *new_bd;
         int rc;
diff --git a/drivers/video/backlight/corgi_lcd.c b/drivers/video/backlight/corgi_lcd.c
index 96774949cd30..b4bcf8043797 100644
--- a/drivers/video/backlight/corgi_lcd.c
+++ b/drivers/video/backlight/corgi_lcd.c
@@ -451,7 +451,7 @@ void corgi_lcd_limit_intensity(int limit)
 }
 EXPORT_SYMBOL(corgi_lcd_limit_intensity);
 
-static struct backlight_ops corgi_bl_ops = {
+static const struct backlight_ops corgi_bl_ops = {
         .get_brightness = corgi_bl_get_intensity,
         .update_status  = corgi_bl_update_status,
 };
diff --git a/drivers/video/backlight/cr_bllcd.c b/drivers/video/backlight/cr_bllcd.c
index b9fe62b475c6..da86db4374a0 100644
--- a/drivers/video/backlight/cr_bllcd.c
+++ b/drivers/video/backlight/cr_bllcd.c
@@ -108,7 +108,7 @@ static int cr_backlight_get_intensity(struct backlight_device *bd)
         return intensity;
 }
 
-static struct backlight_ops cr_backlight_ops = {
+static const struct backlight_ops cr_backlight_ops = {
         .get_brightness = cr_backlight_get_intensity,
         .update_status = cr_backlight_set_intensity,
 };
@@ -201,7 +201,7 @@ static int cr_backlight_probe(struct platform_device *pdev)
         if (IS_ERR(ldp)) {
                 backlight_device_unregister(bdp);
                 pci_dev_put(lpc_dev);
-                return PTR_ERR(bdp);
+                return PTR_ERR(ldp);
         }
 
         pci_read_config_dword(lpc_dev, CRVML_REG_GPIOBAR,
diff --git a/drivers/video/backlight/da903x_bl.c b/drivers/video/backlight/da903x_bl.c
index f2d76dae1eb3..74cdc640173d 100644
--- a/drivers/video/backlight/da903x_bl.c
+++ b/drivers/video/backlight/da903x_bl.c
@@ -95,7 +95,7 @@ static int da903x_backlight_get_brightness(struct backlight_device *bl)
         return data->current_brightness;
 }
 
-static struct backlight_ops da903x_backlight_ops = {
+static const struct backlight_ops da903x_backlight_ops = {
         .update_status  = da903x_backlight_update_status,
         .get_brightness = da903x_backlight_get_brightness,
 };
diff --git a/drivers/video/backlight/generic_bl.c b/drivers/video/backlight/generic_bl.c
index 6d27f62fdcd0..e6d348e63596 100644
--- a/drivers/video/backlight/generic_bl.c
+++ b/drivers/video/backlight/generic_bl.c
@@ -70,7 +70,7 @@ void corgibl_limit_intensity(int limit)
 }
 EXPORT_SYMBOL(corgibl_limit_intensity);
 
-static struct backlight_ops genericbl_ops = {
+static const struct backlight_ops genericbl_ops = {
         .options = BL_CORE_SUSPENDRESUME,
         .get_brightness = genericbl_get_intensity,
         .update_status  = genericbl_send_intensity,
diff --git a/drivers/video/backlight/hp680_bl.c b/drivers/video/backlight/hp680_bl.c
index 7fb4eefff80d..f7cc528d5be7 100644
--- a/drivers/video/backlight/hp680_bl.c
+++ b/drivers/video/backlight/hp680_bl.c
@@ -98,7 +98,7 @@ static int hp680bl_get_intensity(struct backlight_device *bd)
         return current_intensity;
 }
 
-static struct backlight_ops hp680bl_ops = {
+static const struct backlight_ops hp680bl_ops = {
         .get_brightness = hp680bl_get_intensity,
         .update_status  = hp680bl_set_intensity,
 };
diff --git a/drivers/video/backlight/jornada720_bl.c b/drivers/video/backlight/jornada720_bl.c
index 7aed2565c1bd..db9071fc5665 100644
--- a/drivers/video/backlight/jornada720_bl.c
+++ b/drivers/video/backlight/jornada720_bl.c
@@ -93,7 +93,7 @@ out:
         return ret;
 }
 
-static struct backlight_ops jornada_bl_ops = {
+static const struct backlight_ops jornada_bl_ops = {
         .get_brightness = jornada_bl_get_brightness,
         .update_status = jornada_bl_update_status,
         .options = BL_CORE_SUSPENDRESUME,
diff --git a/drivers/video/backlight/kb3886_bl.c b/drivers/video/backlight/kb3886_bl.c
index a38fda1742dd..939e7b830cf3 100644
--- a/drivers/video/backlight/kb3886_bl.c
+++ b/drivers/video/backlight/kb3886_bl.c
@@ -134,7 +134,7 @@ static int kb3886bl_get_intensity(struct backlight_device *bd)
         return kb3886bl_intensity;
 }
 
-static struct backlight_ops kb3886bl_ops = {
+static const struct backlight_ops kb3886bl_ops = {
         .get_brightness = kb3886bl_get_intensity,
         .update_status  = kb3886bl_send_intensity,
 };
diff --git a/drivers/video/backlight/locomolcd.c b/drivers/video/backlight/locomolcd.c
index 6b488b8a7eee..00a9591b0003 100644
--- a/drivers/video/backlight/locomolcd.c
+++ b/drivers/video/backlight/locomolcd.c
@@ -141,7 +141,7 @@ static int locomolcd_get_intensity(struct backlight_device *bd)
         return current_intensity;
 }
 
-static struct backlight_ops locomobl_data = {
+static const struct backlight_ops locomobl_data = {
         .get_brightness = locomolcd_get_intensity,
         .update_status  = locomolcd_set_intensity,
 };
diff --git a/drivers/video/backlight/mbp_nvidia_bl.c b/drivers/video/backlight/mbp_nvidia_bl.c
index 9edb8d7c295f..2e78b0784bdc 100644
--- a/drivers/video/backlight/mbp_nvidia_bl.c
+++ b/drivers/video/backlight/mbp_nvidia_bl.c
@@ -33,7 +33,7 @@ struct dmi_match_data {
         unsigned long iostart;
         unsigned long iolen;
         /* Backlight operations structure. */
-        struct backlight_ops backlight_ops;
+        const struct backlight_ops backlight_ops;
 };
 
 /* Module parameters. */
@@ -220,6 +220,24 @@ static const struct dmi_system_id __initdata mbp_device_table[] = {
         },
         {
                 .callback       = mbp_dmi_match,
+                .ident          = "MacBookPro 5,3",
+                .matches        = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5,3"),
+                },
+                .driver_data    = (void *)&nvidia_chipset_data,
+        },
+        {
+                .callback       = mbp_dmi_match,
+                .ident          = "MacBookPro 5,4",
+                .matches        = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5,4"),
+                },
+                .driver_data    = (void *)&nvidia_chipset_data,
+        },
+        {
+                .callback       = mbp_dmi_match,
                 .ident          = "MacBookPro 5,5",
                 .matches        = {
                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
diff --git a/drivers/video/backlight/omap1_bl.c b/drivers/video/backlight/omap1_bl.c
index 8693e5fcd2eb..409ca9643528 100644
--- a/drivers/video/backlight/omap1_bl.c
+++ b/drivers/video/backlight/omap1_bl.c
@@ -125,7 +125,7 @@ static int omapbl_get_intensity(struct backlight_device *dev)
         return bl->current_intensity;
 }
 
-static struct backlight_ops omapbl_ops = {
+static const struct backlight_ops omapbl_ops = {
         .get_brightness = omapbl_get_intensity,
         .update_status  = omapbl_update_status,
 };
diff --git a/drivers/video/backlight/progear_bl.c b/drivers/video/backlight/progear_bl.c
index 9edaf24fd82d..075786e05034 100644
--- a/drivers/video/backlight/progear_bl.c
+++ b/drivers/video/backlight/progear_bl.c
@@ -54,7 +54,7 @@ static int progearbl_get_intensity(struct backlight_device *bd)
         return intensity - HW_LEVEL_MIN;
 }
 
-static struct backlight_ops progearbl_ops = {
+static const struct backlight_ops progearbl_ops = {
         .get_brightness = progearbl_get_intensity,
         .update_status = progearbl_set_intensity,
 };
diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c
index 887166267443..9d2ec2a1cce8 100644
--- a/drivers/video/backlight/pwm_bl.c
+++ b/drivers/video/backlight/pwm_bl.c
@@ -22,8 +22,10 @@
 
 struct pwm_bl_data {
         struct pwm_device       *pwm;
+        struct device           *dev;
         unsigned int            period;
-        int                     (*notify)(int brightness);
+        int                     (*notify)(struct device *,
+                                          int brightness);
 };
 
 static int pwm_backlight_update_status(struct backlight_device *bl)
@@ -39,7 +41,7 @@ static int pwm_backlight_update_status(struct backlight_device *bl)
                 brightness = 0;
 
         if (pb->notify)
-                brightness = pb->notify(brightness);
+                brightness = pb->notify(pb->dev, brightness);
 
         if (brightness == 0) {
                 pwm_config(pb->pwm, 0, pb->period);
@@ -56,7 +58,7 @@ static int pwm_backlight_get_brightness(struct backlight_device *bl)
         return bl->props.brightness;
 }
 
-static struct backlight_ops pwm_backlight_ops = {
+static const struct backlight_ops pwm_backlight_ops = {
         .update_status  = pwm_backlight_update_status,
         .get_brightness = pwm_backlight_get_brightness,
 };
@@ -88,6 +90,7 @@ static int pwm_backlight_probe(struct platform_device *pdev)
 
         pb->period = data->pwm_period_ns;
         pb->notify = data->notify;
+        pb->dev = &pdev->dev;
 
         pb->pwm = pwm_request(data->pwm_id, "backlight");
         if (IS_ERR(pb->pwm)) {
@@ -146,7 +149,7 @@ static int pwm_backlight_suspend(struct platform_device *pdev,
         struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev);
 
         if (pb->notify)
-                pb->notify(0);
+                pb->notify(pb->dev, 0);
         pwm_config(pb->pwm, 0, pb->period);
         pwm_disable(pb->pwm);
         return 0;
diff --git a/drivers/video/backlight/tosa_bl.c b/drivers/video/backlight/tosa_bl.c
index 43edbada12d1..e14ce4d469f5 100644
--- a/drivers/video/backlight/tosa_bl.c
+++ b/drivers/video/backlight/tosa_bl.c
@@ -72,7 +72,7 @@ static int tosa_bl_get_brightness(struct backlight_device *dev)
         return props->brightness;
 }
 
-static struct backlight_ops bl_ops = {
+static const struct backlight_ops bl_ops = {
         .get_brightness         = tosa_bl_get_brightness,
         .update_status          = tosa_bl_update_status,
 };
diff --git a/drivers/video/backlight/wm831x_bl.c b/drivers/video/backlight/wm831x_bl.c
index 467bdb7efb23..e32add37a203 100644
--- a/drivers/video/backlight/wm831x_bl.c
+++ b/drivers/video/backlight/wm831x_bl.c
@@ -112,7 +112,7 @@ static int wm831x_backlight_get_brightness(struct backlight_device *bl)
         return data->current_brightness;
 }
 
-static struct backlight_ops wm831x_backlight_ops = {
+static const struct backlight_ops wm831x_backlight_ops = {
         .options = BL_CORE_SUSPENDRESUME,
         .update_status  = wm831x_backlight_update_status,
         .get_brightness = wm831x_backlight_get_brightness,
diff --git a/drivers/video/omap/lcd_ldp.c b/drivers/video/omap/lcd_ldp.c
index 5bb7f6f14601..0f5952cae85e 100644
--- a/drivers/video/omap/lcd_ldp.c
+++ b/drivers/video/omap/lcd_ldp.c
@@ -24,7 +24,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/delay.h>
-#include <linux/i2c/twl4030.h>
+#include <linux/i2c/twl.h>
 
 #include <mach/gpio.h>
 #include <plat/mux.h>
@@ -59,7 +59,7 @@
 #define TWL4030_VPLL2_DEV_GRP           0x33
 #define TWL4030_VPLL2_DEDICATED         0x36
 
-#define t2_out(c, r, v) twl4030_i2c_write_u8(c, r, v)
+#define t2_out(c, r, v) twl_i2c_write_u8(c, r, v)
 
 
 static int ldp_panel_init(struct lcd_panel *panel,
diff --git a/drivers/video/omap/lcd_omap2evm.c b/drivers/video/omap/lcd_omap2evm.c
index 006c2fe7360e..7e7a65c08452 100644
--- a/drivers/video/omap/lcd_omap2evm.c
+++ b/drivers/video/omap/lcd_omap2evm.c
@@ -24,7 +24,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
-#include <linux/i2c/twl4030.h>
+#include <linux/i2c/twl.h>
 
 #include <plat/mux.h>
 #include <asm/mach-types.h>
@@ -61,9 +61,9 @@ static int omap2evm_panel_init(struct lcd_panel *panel,
         gpio_direction_output(LCD_PANEL_LR, 1);
         gpio_direction_output(LCD_PANEL_UD, 1);
 
-        twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN);
-        twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON);
-        twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF);
+        twl_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN);
+        twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON);
+        twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF);
         bklight_level = 100;
 
         return 0;
@@ -101,7 +101,7 @@ static int omap2evm_bklight_setlevel(struct lcd_panel *panel,
         u8 c;
         if ((level >= 0) && (level <= 100)) {
                 c = (125 * (100 - level)) / 100 + 2;
-                twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF);
+                twl_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF);
                 bklight_level = level;
         }
         return 0;
diff --git a/drivers/video/omap/lcd_omap3beagle.c b/drivers/video/omap/lcd_omap3beagle.c
index fc503d8f3c24..ca75cc2a87a5 100644
--- a/drivers/video/omap/lcd_omap3beagle.c
+++ b/drivers/video/omap/lcd_omap3beagle.c
@@ -23,7 +23,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
-#include <linux/i2c/twl4030.h>
+#include <linux/i2c/twl.h>
 
 #include <plat/mux.h>
 #include <plat/mux.h>
diff --git a/drivers/video/omap/lcd_omap3evm.c b/drivers/video/omap/lcd_omap3evm.c
index ae2edc4081a8..06840da0b094 100644
--- a/drivers/video/omap/lcd_omap3evm.c
+++ b/drivers/video/omap/lcd_omap3evm.c
@@ -23,7 +23,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
-#include <linux/i2c/twl4030.h>
+#include <linux/i2c/twl.h>
 
 #include <plat/mux.h>
 #include <asm/mach-types.h>
@@ -63,9 +63,9 @@ static int omap3evm_panel_init(struct lcd_panel *panel,
         gpio_direction_output(LCD_PANEL_LR, 1);
         gpio_direction_output(LCD_PANEL_UD, 1);
 
-        twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN);
-        twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON);
-        twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF);
+        twl_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN);
+        twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON);
+        twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF);
         bklight_level = 100;
 
         return 0;
@@ -102,7 +102,7 @@ static int omap3evm_bklight_setlevel(struct lcd_panel *panel,
         u8 c;
         if ((level >= 0) && (level <= 100)) {
                 c = (125 * (100 - level)) / 100 + 2;
-                twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF);
+                twl_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF);
                 bklight_level = level;
         }
         return 0;
diff --git a/drivers/video/omap/lcd_overo.c b/drivers/video/omap/lcd_overo.c
index 56ee192e9ee2..564933ffac6e 100644
--- a/drivers/video/omap/lcd_overo.c
+++ b/drivers/video/omap/lcd_overo.c
@@ -21,7 +21,7 @@
 
 #include <linux/module.h>
 #include <linux/platform_device.h>
-#include <linux/i2c/twl4030.h>
+#include <linux/i2c/twl.h>
 
 #include <mach/gpio.h>
 #include <plat/mux.h>
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c
index 10d8c4b4baeb..d8df17a7d5fc 100644
--- a/drivers/video/via/viafbdev.c
+++ b/drivers/video/via/viafbdev.c
@@ -680,7 +680,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
                 if (!viafb_gamma_table)
                         return -ENOMEM;
                 if (copy_from_user(viafb_gamma_table, argp,
-                                sizeof(viafb_gamma_table))) {
+                                256 * sizeof(u32))) {
                         kfree(viafb_gamma_table);
                         return -EFAULT;
                 }
@@ -694,7 +694,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
                         return -ENOMEM;
                 viafb_get_gamma_table(viafb_gamma_table);
                 if (copy_to_user(argp, viafb_gamma_table,
-                        sizeof(viafb_gamma_table))) {
+                        256 * sizeof(u32))) {
                         kfree(viafb_gamma_table);
                         return -EFAULT;
                 }
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index d958b76430a2..088f32f29a6e 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -368,7 +368,7 @@ config ALIM7101_WDT
 
 config GEODE_WDT
         tristate "AMD Geode CS5535/CS5536 Watchdog"
-        depends on MGEODE_LX
+        depends on CS5535_MFGPT
         help
           This driver enables a watchdog capability built into the
           CS5535/CS5536 companion chips for the AMD Geode GX and LX
@@ -815,16 +815,6 @@ config PNX833X_WDT
           timer has expired and no process has written to /dev/watchdog during
           that time.
 
-config WDT_RM9K_GPI
-        tristate "RM9000/GPI hardware watchdog"
-        depends on CPU_RM9000
-        help
-          Watchdog implementation using the GPI hardware found on
-          PMC-Sierra RM9xxx CPUs.
-
-          To compile this driver as a module, choose M here: the
-          module will be called rm9k_wdt.
-
 config SIBYTE_WDOG
         tristate "Sibyte SoC hardware watchdog"
         depends on CPU_SB1
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 89c045dc468e..475c61100069 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -109,7 +109,6 @@ obj-$(CONFIG_RC32434_WDT) += rc32434_wdt.o
 obj-$(CONFIG_INDYDOG) += indydog.o
 obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
 obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o
-obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
 obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
 obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
 obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
diff --git a/drivers/watchdog/geodewdt.c b/drivers/watchdog/geodewdt.c
index 9acf0015a1e7..38252ff828ca 100644
--- a/drivers/watchdog/geodewdt.c
+++ b/drivers/watchdog/geodewdt.c
@@ -1,6 +1,7 @@
-/* Watchdog timer for the Geode GX/LX with the CS5535/CS5536 companion chip
+/* Watchdog timer for machines with the CS5535/CS5536 companion chip
  *
  * Copyright (C) 2006-2007, Advanced Micro Devices, Inc.
+ * Copyright (C) 2009  Andres Salomon <dilinger@collabora.co.uk>
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -19,7 +20,7 @@
 #include <linux/reboot.h>
 #include <linux/uaccess.h>
 
-#include <asm/geode.h>
+#include <linux/cs5535.h>
 
 #define GEODEWDT_HZ 500
 #define GEODEWDT_SCALE 6
@@ -46,25 +47,25 @@ MODULE_PARM_DESC(nowayout,
 
 static struct platform_device *geodewdt_platform_device;
 static unsigned long wdt_flags;
-static int wdt_timer;
+static struct cs5535_mfgpt_timer *wdt_timer;
 static int safe_close;
 
 static void geodewdt_ping(void)
 {
         /* Stop the counter */
-        geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0);
+        cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0);
 
         /* Reset the counter */
-        geode_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0);
+        cs5535_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0);
 
         /* Enable the counter */
-        geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN);
+        cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN);
 }
 
 static void geodewdt_disable(void)
 {
-        geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0);
-        geode_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0);
+        cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0);
+        cs5535_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0);
 }
 
 static int geodewdt_set_heartbeat(int val)
@@ -72,10 +73,10 @@ static int geodewdt_set_heartbeat(int val)
         if (val < 1 || val > GEODEWDT_MAX_SECONDS)
                 return -EINVAL;
 
-        geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0);
-        geode_mfgpt_write(wdt_timer, MFGPT_REG_CMP2, val * GEODEWDT_HZ);
-        geode_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0);
-        geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN);
+        cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0);
+        cs5535_mfgpt_write(wdt_timer, MFGPT_REG_CMP2, val * GEODEWDT_HZ);
+        cs5535_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0);
+        cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN);
 
         timeout = val;
         return 0;
@@ -215,28 +216,25 @@ static struct miscdevice geodewdt_miscdev = {
 
 static int __devinit geodewdt_probe(struct platform_device *dev)
 {
-        int ret, timer;
-
-        timer = geode_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING);
+        int ret;
 
-        if (timer == -1) {
+        wdt_timer = cs5535_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING);
+        if (!wdt_timer) {
                 printk(KERN_ERR "geodewdt:  No timers were available\n");
                 return -ENODEV;
         }
 
-        wdt_timer = timer;
-
         /* Set up the timer */
 
-        geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP,
+        cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP,
                           GEODEWDT_SCALE | (3 << 8));
 
         /* Set up comparator 2 to reset when the event fires */
-        geode_mfgpt_toggle_event(wdt_timer, MFGPT_CMP2, MFGPT_EVENT_RESET, 1);
+        cs5535_mfgpt_toggle_event(wdt_timer, MFGPT_CMP2, MFGPT_EVENT_RESET, 1);
 
         /* Set up the initial timeout */
 
-        geode_mfgpt_write(wdt_timer, MFGPT_REG_CMP2,
+        cs5535_mfgpt_write(wdt_timer, MFGPT_REG_CMP2,
                 timeout * GEODEWDT_HZ);
 
         ret = misc_register(&geodewdt_miscdev);
diff --git a/drivers/watchdog/rm9k_wdt.c b/drivers/watchdog/rm9k_wdt.c
deleted file mode 100644
index bb66958b9433..000000000000
--- a/drivers/watchdog/rm9k_wdt.c
+++ /dev/null
@@ -1,419 +0,0 @@
-/*
- *  Watchdog implementation for GPI h/w found on PMC-Sierra RM9xxx
- *  chips.
- *
- *  Copyright (C) 2004 by Basler Vision Technologies AG
- *  Author: Thomas Koeller <thomas.koeller@baslerweb.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#include <linux/platform_device.h>
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/interrupt.h>
-#include <linux/fs.h>
-#include <linux/reboot.h>
-#include <linux/notifier.h>
-#include <linux/miscdevice.h>
-#include <linux/watchdog.h>
-#include <linux/io.h>
-#include <linux/uaccess.h>
-#include <asm/atomic.h>
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/rm9k-ocd.h>
-
-#include <rm9k_wdt.h>
-
-
-#define CLOCK                  125000000
-#define MAX_TIMEOUT_SECONDS    32
-#define CPCCR                  0x0080
-#define CPGIG1SR               0x0044
-#define CPGIG1ER               0x0054
-
-
-/* Function prototypes */
-static irqreturn_t wdt_gpi_irqhdl(int, void *);
-static void wdt_gpi_start(void);
-static void wdt_gpi_stop(void);
-static void wdt_gpi_set_timeout(unsigned int);
-static int wdt_gpi_open(struct inode *, struct file *);
-static int wdt_gpi_release(struct inode *, struct file *);
-static ssize_t wdt_gpi_write(struct file *, const char __user *, size_t,
-                                                                loff_t *);
-static long wdt_gpi_ioctl(struct file *, unsigned int, unsigned long);
-static int wdt_gpi_notify(struct notifier_block *, unsigned long, void *);
-static const struct resource *wdt_gpi_get_resource(struct platform_device *,
-                                                const char *, unsigned int);
-static int __init wdt_gpi_probe(struct platform_device *);
-static int __exit wdt_gpi_remove(struct platform_device *);
-
-
-static const char wdt_gpi_name[] = "wdt_gpi";
-static atomic_t opencnt;
-static int expect_close;
-static int locked;
-
-
-/* These are set from device resources */
-static void __iomem *wd_regs;
-static unsigned int wd_irq, wd_ctr;
-
-
-/* Module arguments */
-static int timeout = MAX_TIMEOUT_SECONDS;
-module_param(timeout, int, 0444);
-MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds");
-
-static unsigned long resetaddr = 0xbffdc200;
-module_param(resetaddr, ulong, 0444);
-MODULE_PARM_DESC(resetaddr, "Address to write to to force a reset");
-
-static unsigned long flagaddr = 0xbffdc104;
-module_param(flagaddr, ulong, 0444);
-MODULE_PARM_DESC(flagaddr, "Address to write to boot flags to");
-
-static int powercycle;
-module_param(powercycle, bool, 0444);
-MODULE_PARM_DESC(powercycle, "Cycle power if watchdog expires");
-
-static int nowayout = WATCHDOG_NOWAYOUT;
-module_param(nowayout, bool, 0444);
-MODULE_PARM_DESC(nowayout, "Watchdog cannot be disabled once started");
-
-
-/* Kernel interfaces */
-static const struct file_operations fops = {
-        .owner          = THIS_MODULE,
-        .open           = wdt_gpi_open,
-        .release        = wdt_gpi_release,
-        .write          = wdt_gpi_write,
-        .unlocked_ioctl = wdt_gpi_ioctl,
-};
-
-static struct miscdevice miscdev = {
-        .minor          = WATCHDOG_MINOR,
-        .name           = wdt_gpi_name,
-        .fops           = &fops,
-};
-
-static struct notifier_block wdt_gpi_shutdown = {
-        .notifier_call  = wdt_gpi_notify,
-};
-
-
-/* Interrupt handler */
-static irqreturn_t wdt_gpi_irqhdl(int irq, void *ctxt)
-{
-        if (!unlikely(__raw_readl(wd_regs + 0x0008) & 0x1))
-                return IRQ_NONE;
-        __raw_writel(0x1, wd_regs + 0x0008);
-
-
-        printk(KERN_CRIT "%s: watchdog expired - resetting system\n",
-                wdt_gpi_name);
-
-        *(volatile char *) flagaddr |= 0x01;
-        *(volatile char *) resetaddr = powercycle ? 0x01 : 0x2;
-        iob();
-        while (1)
-                cpu_relax();
-}
-
-
-/* Watchdog functions */
-static void wdt_gpi_start(void)
-{
-        u32 reg;
-
-        lock_titan_regs();
-        reg = titan_readl(CPGIG1ER);
-        titan_writel(reg | (0x100 << wd_ctr), CPGIG1ER);
-        iob();
-        unlock_titan_regs();
-}
-
-static void wdt_gpi_stop(void)
-{
-        u32 reg;
-
-        lock_titan_regs();
-        reg = titan_readl(CPCCR) & ~(0xf << (wd_ctr * 4));
-        titan_writel(reg, CPCCR);
-        reg = titan_readl(CPGIG1ER);
-        titan_writel(reg & ~(0x100 << wd_ctr), CPGIG1ER);
-        iob();
-        unlock_titan_regs();
-}
-
-static void wdt_gpi_set_timeout(unsigned int to)
-{
-        u32 reg;
-        const u32 wdval = (to * CLOCK) & ~0x0000000f;
-
-        lock_titan_regs();
-        reg = titan_readl(CPCCR) & ~(0xf << (wd_ctr * 4));
-        titan_writel(reg, CPCCR);
-        wmb();
-        __raw_writel(wdval, wd_regs + 0x0000);
-        wmb();
-        titan_writel(reg | (0x2 << (wd_ctr * 4)), CPCCR);
-        wmb();
-        titan_writel(reg | (0x5 << (wd_ctr * 4)), CPCCR);
-        iob();
-        unlock_titan_regs();
-}
-
-
-/* /dev/watchdog operations */
-static int wdt_gpi_open(struct inode *inode, struct file *file)
-{
-        int res;
-
-        if (unlikely(atomic_dec_if_positive(&opencnt) < 0))
-                return -EBUSY;
-
-        expect_close = 0;
-        if (locked) {
-                module_put(THIS_MODULE);
-                free_irq(wd_irq, &miscdev);
-                locked = 0;
-        }
-
-        res = request_irq(wd_irq, wdt_gpi_irqhdl, IRQF_SHARED | IRQF_DISABLED,
-                          wdt_gpi_name, &miscdev);
-        if (unlikely(res))
-                return res;
-
-        wdt_gpi_set_timeout(timeout);
-        wdt_gpi_start();
-
-        printk(KERN_INFO "%s: watchdog started, timeout = %u seconds\n",
-                wdt_gpi_name, timeout);
-        return nonseekable_open(inode, file);
-}
-
-static int wdt_gpi_release(struct inode *inode, struct file *file)
-{
-        if (nowayout) {
-                printk(KERN_INFO "%s: no way out - watchdog left running\n",
-                        wdt_gpi_name);
-                __module_get(THIS_MODULE);
-                locked = 1;
-        } else {
-                if (expect_close) {
-                        wdt_gpi_stop();
-                        free_irq(wd_irq, &miscdev);
-                        printk(KERN_INFO "%s: watchdog stopped\n",
-                                                        wdt_gpi_name);
-                } else {
-                        printk(KERN_CRIT "%s: unexpected close() -"
-                                " watchdog left running\n",
-                                wdt_gpi_name);
-                        wdt_gpi_set_timeout(timeout);
-                        __module_get(THIS_MODULE);
-                        locked = 1;
-                }
-        }
-
-        atomic_inc(&opencnt);
-        return 0;
-}
-
-static ssize_t wdt_gpi_write(struct file *f, const char __user *d, size_t s,
-                                                                loff_t *o)
-{
-        char val;
-
-        wdt_gpi_set_timeout(timeout);
-        expect_close = (s > 0) && !get_user(val, d) && (val == 'V');
-        return s ? 1 : 0;
-}
-
-static long wdt_gpi_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
-{
-        long res = -ENOTTY;
-        const long size = _IOC_SIZE(cmd);
-        int stat;
-        void __user *argp = (void __user *)arg;
-        static struct watchdog_info wdinfo = {
-                .identity               = "RM9xxx/GPI watchdog",
-                .firmware_version       = 0,
-                .options                = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING
-        };
-
-        if (unlikely(_IOC_TYPE(cmd) != WATCHDOG_IOCTL_BASE))
-                return -ENOTTY;
-
-        if ((_IOC_DIR(cmd) & _IOC_READ)
-            && !access_ok(VERIFY_WRITE, arg, size))
-                return -EFAULT;
-
-        if ((_IOC_DIR(cmd) & _IOC_WRITE)
-            && !access_ok(VERIFY_READ, arg, size))
-                return -EFAULT;
-
-        expect_close = 0;
-
-        switch (cmd) {
-        case WDIOC_GETSUPPORT:
-                wdinfo.options = nowayout ?
-                        WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING :
-                        WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
-                        WDIOF_MAGICCLOSE;
-                res = __copy_to_user(argp, &wdinfo, size) ?  -EFAULT : size;
-                break;
-
-        case WDIOC_GETSTATUS:
-                break;
-
-        case WDIOC_GETBOOTSTATUS:
-                stat = (*(volatile char *) flagaddr & 0x01)
-                        ? WDIOF_CARDRESET : 0;
-                res = __copy_to_user(argp, &stat, size) ?
-                        -EFAULT : size;
-                break;
-
-        case WDIOC_SETOPTIONS:
-                break;
-
-        case WDIOC_KEEPALIVE:
-                wdt_gpi_set_timeout(timeout);
-                res = size;
-                break;
-
-        case WDIOC_SETTIMEOUT:
-                {
-                        int val;
-                        if (unlikely(__copy_from_user(&val, argp, size))) {
-                                res = -EFAULT;
-                                break;
-                        }
-
-                        if (val > MAX_TIMEOUT_SECONDS)
-                                val = MAX_TIMEOUT_SECONDS;
-                        timeout = val;
-                        wdt_gpi_set_timeout(val);
-                        res = size;
-                        printk(KERN_INFO "%s: timeout set to %u seconds\n",
-                                wdt_gpi_name, timeout);
-                }
-                break;
-
-        case WDIOC_GETTIMEOUT:
-                res = __copy_to_user(argp, &timeout, size) ?
-                        -EFAULT : size;
-                break;
-        }
-
-        return res;
-}
-
-
-/* Shutdown notifier */
-static int wdt_gpi_notify(struct notifier_block *this, unsigned long code,
-                          void *unused)
-{
-        if (code == SYS_DOWN || code == SYS_HALT)
-                wdt_gpi_stop();
-
-        return NOTIFY_DONE;
-}
-
-
-/* Init & exit procedures */
-static const struct resource *wdt_gpi_get_resource(struct platform_device *pdv,
-                                        const char *name, unsigned int type)
-{
-        char buf[80];
-        if (snprintf(buf, sizeof(buf), "%s_0", name) >= sizeof(buf))
-                return NULL;
-        return platform_get_resource_byname(pdv, type, buf);
-}
-
-/* No hotplugging on the platform bus - use __devinit */
-static int __devinit wdt_gpi_probe(struct platform_device *pdv)
-{
-        int res;
-        const struct resource
-                * const rr = wdt_gpi_get_resource(pdv, WDT_RESOURCE_REGS,
-                                                  IORESOURCE_MEM),
-                * const ri = wdt_gpi_get_resource(pdv, WDT_RESOURCE_IRQ,
-                                                  IORESOURCE_IRQ),
-                * const rc = wdt_gpi_get_resource(pdv, WDT_RESOURCE_COUNTER,
-                                                  0);
-
-        if (unlikely(!rr || !ri || !rc))
-                return -ENXIO;
-
-        wd_regs = ioremap_nocache(rr->start, rr->end + 1 - rr->start);
-        if (unlikely(!wd_regs))
-                return -ENOMEM;
-        wd_irq = ri->start;
-        wd_ctr = rc->start;
-        res = misc_register(&miscdev);
-        if (res)
-                iounmap(wd_regs);
-        else
-                register_reboot_notifier(&wdt_gpi_shutdown);
-        return res;
-}
-
-static int __devexit wdt_gpi_remove(struct platform_device *dev)
-{
-        int res;
-
-        unregister_reboot_notifier(&wdt_gpi_shutdown);
-        res = misc_deregister(&miscdev);
-        iounmap(wd_regs);
-        wd_regs = NULL;
-        return res;
-}
-
-
-/* Device driver init & exit */
-static struct platform_driver wgt_gpi_driver = {
-        .driver = {
-                .name           = wdt_gpi_name,
-                .owner          = THIS_MODULE,
-        },
-        .probe          = wdt_gpi_probe,
-        .remove         = __devexit_p(wdt_gpi_remove),
-};
-
-static int __init wdt_gpi_init_module(void)
-{
-        atomic_set(&opencnt, 1);
-        if (timeout > MAX_TIMEOUT_SECONDS)
-                timeout = MAX_TIMEOUT_SECONDS;
-        return platform_driver_register(&wdt_gpi_driver);
-}
-
-static void __exit wdt_gpi_cleanup_module(void)
-{
-        platform_driver_unregister(&wdt_gpi_driver);
-}
-
-module_init(wdt_gpi_init_module);
-module_exit(wdt_gpi_cleanup_module);
-
-MODULE_AUTHOR("Thomas Koeller <thomas.koeller@baslerweb.com>");
-MODULE_DESCRIPTION("Basler eXcite watchdog driver for gpi devices");
-MODULE_VERSION("0.1");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
-