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-rw-r--r--drivers/ata/ahci.c15
-rw-r--r--drivers/ata/sata_fsl.c5
-rw-r--r--drivers/ata/sata_sil24.c60
3 files changed, 36 insertions, 44 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 9642a7103cb6..6281f7f9eae6 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1179,7 +1179,7 @@ static void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag,
1179 1179
1180static int ahci_kick_engine(struct ata_port *ap, int force_restart) 1180static int ahci_kick_engine(struct ata_port *ap, int force_restart)
1181{ 1181{
1182 void __iomem *port_mmio = ap->ioaddr.cmd_addr; 1182 void __iomem *port_mmio = ahci_port_base(ap);
1183 struct ahci_host_priv *hpriv = ap->host->private_data; 1183 struct ahci_host_priv *hpriv = ap->host->private_data;
1184 u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF; 1184 u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
1185 u32 tmp; 1185 u32 tmp;
@@ -1255,8 +1255,8 @@ static int ahci_exec_polled_cmd(struct ata_port *ap, int pmp,
1255 1255
1256static int ahci_check_ready(struct ata_link *link) 1256static int ahci_check_ready(struct ata_link *link)
1257{ 1257{
1258 void __iomem *mmio = link->ap->ioaddr.cmd_addr; 1258 void __iomem *port_mmio = ahci_port_base(link->ap);
1259 u8 status = readl(mmio + PORT_TFDATA) & 0xFF; 1259 u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
1260 1260
1261 if (!(status & ATA_BUSY)) 1261 if (!(status & ATA_BUSY))
1262 return 1; 1262 return 1;
@@ -1616,7 +1616,7 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
1616 1616
1617static void ahci_port_intr(struct ata_port *ap) 1617static void ahci_port_intr(struct ata_port *ap)
1618{ 1618{
1619 void __iomem *port_mmio = ap->ioaddr.cmd_addr; 1619 void __iomem *port_mmio = ahci_port_base(ap);
1620 struct ata_eh_info *ehi = &ap->link.eh_info; 1620 struct ata_eh_info *ehi = &ap->link.eh_info;
1621 struct ahci_port_priv *pp = ap->private_data; 1621 struct ahci_port_priv *pp = ap->private_data;
1622 struct ahci_host_priv *hpriv = ap->host->private_data; 1622 struct ahci_host_priv *hpriv = ap->host->private_data;
@@ -2210,7 +2210,6 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2210 2210
2211 for (i = 0; i < host->n_ports; i++) { 2211 for (i = 0; i < host->n_ports; i++) {
2212 struct ata_port *ap = host->ports[i]; 2212 struct ata_port *ap = host->ports[i];
2213 void __iomem *port_mmio = ahci_port_base(ap);
2214 2213
2215 ata_port_pbar_desc(ap, AHCI_PCI_BAR, -1, "abar"); 2214 ata_port_pbar_desc(ap, AHCI_PCI_BAR, -1, "abar");
2216 ata_port_pbar_desc(ap, AHCI_PCI_BAR, 2215 ata_port_pbar_desc(ap, AHCI_PCI_BAR,
@@ -2219,12 +2218,8 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2219 /* set initial link pm policy */ 2218 /* set initial link pm policy */
2220 ap->pm_policy = NOT_AVAILABLE; 2219 ap->pm_policy = NOT_AVAILABLE;
2221 2220
2222 /* standard SATA port setup */
2223 if (hpriv->port_map & (1 << i))
2224 ap->ioaddr.cmd_addr = port_mmio;
2225
2226 /* disabled/not-implemented port */ 2221 /* disabled/not-implemented port */
2227 else 2222 if (!(hpriv->port_map & (1 << i)))
2228 ap->ops = &ata_dummy_port_ops; 2223 ap->ops = &ata_dummy_port_ops;
2229 } 2224 }
2230 2225
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index 0cb0a57ddb36..9c4e6a6698c2 100644
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c
@@ -1222,11 +1222,6 @@ static int sata_fsl_probe(struct of_device *ofdev,
1222 /* host->iomap is not used currently */ 1222 /* host->iomap is not used currently */
1223 host->private_data = host_priv; 1223 host->private_data = host_priv;
1224 1224
1225 /* setup port(s) */
1226
1227 host->ports[0]->ioaddr.cmd_addr = host_priv->hcr_base;
1228 host->ports[0]->ioaddr.scr_addr = host_priv->ssr_base;
1229
1230 /* initialize host controller */ 1225 /* initialize host controller */
1231 sata_fsl_init_controller(host); 1226 sata_fsl_init_controller(host);
1232 1227
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c
index 15a4067149b7..6039614e956c 100644
--- a/drivers/ata/sata_sil24.c
+++ b/drivers/ata/sata_sil24.c
@@ -467,9 +467,19 @@ static int sil24_tag(int tag)
467 return tag; 467 return tag;
468} 468}
469 469
470static unsigned long sil24_port_offset(struct ata_port *ap)
471{
472 return ap->port_no * PORT_REGS_SIZE;
473}
474
475static void __iomem *sil24_port_base(struct ata_port *ap)
476{
477 return ap->host->iomap[SIL24_PORT_BAR] + sil24_port_offset(ap);
478}
479
470static void sil24_dev_config(struct ata_device *dev) 480static void sil24_dev_config(struct ata_device *dev)
471{ 481{
472 void __iomem *port = dev->link->ap->ioaddr.cmd_addr; 482 void __iomem *port = sil24_port_base(dev->link->ap);
473 483
474 if (dev->cdb_len == 16) 484 if (dev->cdb_len == 16)
475 writel(PORT_CS_CDB16, port + PORT_CTRL_STAT); 485 writel(PORT_CS_CDB16, port + PORT_CTRL_STAT);
@@ -479,7 +489,7 @@ static void sil24_dev_config(struct ata_device *dev)
479 489
480static void sil24_read_tf(struct ata_port *ap, int tag, struct ata_taskfile *tf) 490static void sil24_read_tf(struct ata_port *ap, int tag, struct ata_taskfile *tf)
481{ 491{
482 void __iomem *port = ap->ioaddr.cmd_addr; 492 void __iomem *port = sil24_port_base(ap);
483 struct sil24_prb __iomem *prb; 493 struct sil24_prb __iomem *prb;
484 u8 fis[6 * 4]; 494 u8 fis[6 * 4];
485 495
@@ -497,7 +507,7 @@ static int sil24_scr_map[] = {
497 507
498static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) 508static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val)
499{ 509{
500 void __iomem *scr_addr = ap->ioaddr.scr_addr; 510 void __iomem *scr_addr = sil24_port_base(ap) + PORT_SCONTROL;
501 511
502 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { 512 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) {
503 void __iomem *addr; 513 void __iomem *addr;
@@ -510,7 +520,7 @@ static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val)
510 520
511static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) 521static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val)
512{ 522{
513 void __iomem *scr_addr = ap->ioaddr.scr_addr; 523 void __iomem *scr_addr = sil24_port_base(ap) + PORT_SCONTROL;
514 524
515 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { 525 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) {
516 void __iomem *addr; 526 void __iomem *addr;
@@ -523,7 +533,7 @@ static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val)
523 533
524static void sil24_config_port(struct ata_port *ap) 534static void sil24_config_port(struct ata_port *ap)
525{ 535{
526 void __iomem *port = ap->ioaddr.cmd_addr; 536 void __iomem *port = sil24_port_base(ap);
527 537
528 /* configure IRQ WoC */ 538 /* configure IRQ WoC */
529 if (ap->flags & SIL24_FLAG_PCIX_IRQ_WOC) 539 if (ap->flags & SIL24_FLAG_PCIX_IRQ_WOC)
@@ -548,7 +558,7 @@ static void sil24_config_port(struct ata_port *ap)
548 558
549static void sil24_config_pmp(struct ata_port *ap, int attached) 559static void sil24_config_pmp(struct ata_port *ap, int attached)
550{ 560{
551 void __iomem *port = ap->ioaddr.cmd_addr; 561 void __iomem *port = sil24_port_base(ap);
552 562
553 if (attached) 563 if (attached)
554 writel(PORT_CS_PMP_EN, port + PORT_CTRL_STAT); 564 writel(PORT_CS_PMP_EN, port + PORT_CTRL_STAT);
@@ -558,7 +568,7 @@ static void sil24_config_pmp(struct ata_port *ap, int attached)
558 568
559static void sil24_clear_pmp(struct ata_port *ap) 569static void sil24_clear_pmp(struct ata_port *ap)
560{ 570{
561 void __iomem *port = ap->ioaddr.cmd_addr; 571 void __iomem *port = sil24_port_base(ap);
562 int i; 572 int i;
563 573
564 writel(PORT_CS_PMP_RESUME, port + PORT_CTRL_CLR); 574 writel(PORT_CS_PMP_RESUME, port + PORT_CTRL_CLR);
@@ -573,7 +583,7 @@ static void sil24_clear_pmp(struct ata_port *ap)
573 583
574static int sil24_init_port(struct ata_port *ap) 584static int sil24_init_port(struct ata_port *ap)
575{ 585{
576 void __iomem *port = ap->ioaddr.cmd_addr; 586 void __iomem *port = sil24_port_base(ap);
577 struct sil24_port_priv *pp = ap->private_data; 587 struct sil24_port_priv *pp = ap->private_data;
578 u32 tmp; 588 u32 tmp;
579 589
@@ -601,7 +611,7 @@ static int sil24_exec_polled_cmd(struct ata_port *ap, int pmp,
601 int is_cmd, u32 ctrl, 611 int is_cmd, u32 ctrl,
602 unsigned long timeout_msec) 612 unsigned long timeout_msec)
603{ 613{
604 void __iomem *port = ap->ioaddr.cmd_addr; 614 void __iomem *port = sil24_port_base(ap);
605 struct sil24_port_priv *pp = ap->private_data; 615 struct sil24_port_priv *pp = ap->private_data;
606 struct sil24_prb *prb = &pp->cmd_block[0].ata.prb; 616 struct sil24_prb *prb = &pp->cmd_block[0].ata.prb;
607 dma_addr_t paddr = pp->cmd_block_dma; 617 dma_addr_t paddr = pp->cmd_block_dma;
@@ -706,7 +716,7 @@ static int sil24_hardreset(struct ata_link *link, unsigned int *class,
706 unsigned long deadline) 716 unsigned long deadline)
707{ 717{
708 struct ata_port *ap = link->ap; 718 struct ata_port *ap = link->ap;
709 void __iomem *port = ap->ioaddr.cmd_addr; 719 void __iomem *port = sil24_port_base(ap);
710 struct sil24_port_priv *pp = ap->private_data; 720 struct sil24_port_priv *pp = ap->private_data;
711 int did_port_rst = 0; 721 int did_port_rst = 0;
712 const char *reason; 722 const char *reason;
@@ -884,7 +894,7 @@ static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc)
884{ 894{
885 struct ata_port *ap = qc->ap; 895 struct ata_port *ap = qc->ap;
886 struct sil24_port_priv *pp = ap->private_data; 896 struct sil24_port_priv *pp = ap->private_data;
887 void __iomem *port = ap->ioaddr.cmd_addr; 897 void __iomem *port = sil24_port_base(ap);
888 unsigned int tag = sil24_tag(qc->tag); 898 unsigned int tag = sil24_tag(qc->tag);
889 dma_addr_t paddr; 899 dma_addr_t paddr;
890 void __iomem *activate; 900 void __iomem *activate;
@@ -939,7 +949,7 @@ static int sil24_pmp_hardreset(struct ata_link *link, unsigned int *class,
939 949
940static void sil24_freeze(struct ata_port *ap) 950static void sil24_freeze(struct ata_port *ap)
941{ 951{
942 void __iomem *port = ap->ioaddr.cmd_addr; 952 void __iomem *port = sil24_port_base(ap);
943 953
944 /* Port-wide IRQ mask in HOST_CTRL doesn't really work, clear 954 /* Port-wide IRQ mask in HOST_CTRL doesn't really work, clear
945 * PORT_IRQ_ENABLE instead. 955 * PORT_IRQ_ENABLE instead.
@@ -949,7 +959,7 @@ static void sil24_freeze(struct ata_port *ap)
949 959
950static void sil24_thaw(struct ata_port *ap) 960static void sil24_thaw(struct ata_port *ap)
951{ 961{
952 void __iomem *port = ap->ioaddr.cmd_addr; 962 void __iomem *port = sil24_port_base(ap);
953 u32 tmp; 963 u32 tmp;
954 964
955 /* clear IRQ */ 965 /* clear IRQ */
@@ -962,7 +972,7 @@ static void sil24_thaw(struct ata_port *ap)
962 972
963static void sil24_error_intr(struct ata_port *ap) 973static void sil24_error_intr(struct ata_port *ap)
964{ 974{
965 void __iomem *port = ap->ioaddr.cmd_addr; 975 void __iomem *port = sil24_port_base(ap);
966 struct sil24_port_priv *pp = ap->private_data; 976 struct sil24_port_priv *pp = ap->private_data;
967 struct ata_queued_cmd *qc = NULL; 977 struct ata_queued_cmd *qc = NULL;
968 struct ata_link *link; 978 struct ata_link *link;
@@ -1089,7 +1099,7 @@ static void sil24_error_intr(struct ata_port *ap)
1089 1099
1090static inline void sil24_host_intr(struct ata_port *ap) 1100static inline void sil24_host_intr(struct ata_port *ap)
1091{ 1101{
1092 void __iomem *port = ap->ioaddr.cmd_addr; 1102 void __iomem *port = sil24_port_base(ap);
1093 u32 slot_stat, qc_active; 1103 u32 slot_stat, qc_active;
1094 int rc; 1104 int rc;
1095 1105
@@ -1209,6 +1219,9 @@ static int sil24_port_start(struct ata_port *ap)
1209 1219
1210 ap->private_data = pp; 1220 ap->private_data = pp;
1211 1221
1222 ata_port_pbar_desc(ap, SIL24_HOST_BAR, -1, "host");
1223 ata_port_pbar_desc(ap, SIL24_PORT_BAR, sil24_port_offset(ap), "port");
1224
1212 return 0; 1225 return 0;
1213} 1226}
1214 1227
@@ -1227,7 +1240,8 @@ static void sil24_init_controller(struct ata_host *host)
1227 /* init ports */ 1240 /* init ports */
1228 for (i = 0; i < host->n_ports; i++) { 1241 for (i = 0; i < host->n_ports; i++) {
1229 struct ata_port *ap = host->ports[i]; 1242 struct ata_port *ap = host->ports[i];
1230 void __iomem *port = ap->ioaddr.cmd_addr; 1243 void __iomem *port = sil24_port_base(ap);
1244
1231 1245
1232 /* Initial PHY setting */ 1246 /* Initial PHY setting */
1233 writel(0x20c, port + PORT_PHY_CFG); 1247 writel(0x20c, port + PORT_PHY_CFG);
@@ -1260,7 +1274,7 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1260 const struct ata_port_info *ppi[] = { &pi, NULL }; 1274 const struct ata_port_info *ppi[] = { &pi, NULL };
1261 void __iomem * const *iomap; 1275 void __iomem * const *iomap;
1262 struct ata_host *host; 1276 struct ata_host *host;
1263 int i, rc; 1277 int rc;
1264 u32 tmp; 1278 u32 tmp;
1265 1279
1266 /* cause link error if sil24_cmd_block is sized wrongly */ 1280 /* cause link error if sil24_cmd_block is sized wrongly */
@@ -1300,18 +1314,6 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1300 return -ENOMEM; 1314 return -ENOMEM;
1301 host->iomap = iomap; 1315 host->iomap = iomap;
1302 1316
1303 for (i = 0; i < host->n_ports; i++) {
1304 struct ata_port *ap = host->ports[i];
1305 size_t offset = ap->port_no * PORT_REGS_SIZE;
1306 void __iomem *port = iomap[SIL24_PORT_BAR] + offset;
1307
1308 host->ports[i]->ioaddr.cmd_addr = port;
1309 host->ports[i]->ioaddr.scr_addr = port + PORT_SCONTROL;
1310
1311 ata_port_pbar_desc(ap, SIL24_HOST_BAR, -1, "host");
1312 ata_port_pbar_desc(ap, SIL24_PORT_BAR, offset, "port");
1313 }
1314
1315 /* configure and activate the device */ 1317 /* configure and activate the device */
1316 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { 1318 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
1317 rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); 1319 rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);