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-rw-r--r--drivers/net/pasemi_mac.c5
-rw-r--r--drivers/net/pasemi_mac.h8
2 files changed, 12 insertions, 1 deletions
diff --git a/drivers/net/pasemi_mac.c b/drivers/net/pasemi_mac.c
index be311e9404b4..46d5c0eef784 100644
--- a/drivers/net/pasemi_mac.c
+++ b/drivers/net/pasemi_mac.c
@@ -206,7 +206,7 @@ static int pasemi_mac_setup_rx_resources(struct net_device *dev)
206 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2)); 206 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
207 207
208 write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id), 208 write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
209 PAS_DMA_RXCHAN_CFG_HBU(1)); 209 PAS_DMA_RXCHAN_CFG_HBU(2));
210 210
211 write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if), 211 write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
212 PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers))); 212 PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
@@ -215,6 +215,9 @@ static int pasemi_mac_setup_rx_resources(struct net_device *dev)
215 PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) | 215 PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
216 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3)); 216 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
217 217
218 write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
219 PAS_DMA_RXINT_CFG_DHL(2));
220
218 ring->next_to_fill = 0; 221 ring->next_to_fill = 0;
219 ring->next_to_clean = 0; 222 ring->next_to_clean = 0;
220 223
diff --git a/drivers/net/pasemi_mac.h b/drivers/net/pasemi_mac.h
index ef443640c768..fbbc17a31db7 100644
--- a/drivers/net/pasemi_mac.h
+++ b/drivers/net/pasemi_mac.h
@@ -219,6 +219,14 @@ enum {
219#define PAS_DMA_RXINT_RCMDSTA_ACT 0x00010000 219#define PAS_DMA_RXINT_RCMDSTA_ACT 0x00010000
220#define PAS_DMA_RXINT_RCMDSTA_DROPS_M 0xfffe0000 220#define PAS_DMA_RXINT_RCMDSTA_DROPS_M 0xfffe0000
221#define PAS_DMA_RXINT_RCMDSTA_DROPS_S 17 221#define PAS_DMA_RXINT_RCMDSTA_DROPS_S 17
222#define PAS_DMA_RXINT_CFG(i) (0x204+(i)*_PAS_DMA_RXINT_STRIDE)
223#define PAS_DMA_RXINT_CFG_DHL_M 0x07000000
224#define PAS_DMA_RXINT_CFG_DHL_S 24
225#define PAS_DMA_RXINT_CFG_DHL(x) (((x) << PAS_DMA_RXINT_CFG_DHL_S) & \
226 PAS_DMA_RXINT_CFG_DHL_M)
227#define PAS_DMA_RXINT_CFG_WIF 0x00000002
228#define PAS_DMA_RXINT_CFG_WIL 0x00000001
229
222#define PAS_DMA_RXINT_INCR(i) (0x210+(i)*_PAS_DMA_RXINT_STRIDE) 230#define PAS_DMA_RXINT_INCR(i) (0x210+(i)*_PAS_DMA_RXINT_STRIDE)
223#define PAS_DMA_RXINT_INCR_INCR_M 0x0000ffff 231#define PAS_DMA_RXINT_INCR_INCR_M 0x0000ffff
224#define PAS_DMA_RXINT_INCR_INCR_S 0 232#define PAS_DMA_RXINT_INCR_INCR_S 0