diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/serial/dz.c | 1 | ||||
-rw-r--r-- | drivers/serial/ip22zilog.c | 8 |
2 files changed, 5 insertions, 4 deletions
diff --git a/drivers/serial/dz.c b/drivers/serial/dz.c index 5ff1e834792c..ba5541de673b 100644 --- a/drivers/serial/dz.c +++ b/drivers/serial/dz.c | |||
@@ -262,6 +262,7 @@ static inline void dz_receive_chars(struct dz_port *dport) | |||
262 | } | 262 | } |
263 | tty_insert_flip_char(tty, ch, flag); | 263 | tty_insert_flip_char(tty, ch, flag); |
264 | ignore_char: | 264 | ignore_char: |
265 | ; | ||
265 | } while (status & DZ_DVAL); | 266 | } while (status & DZ_DVAL); |
266 | 267 | ||
267 | if (tty) | 268 | if (tty) |
diff --git a/drivers/serial/ip22zilog.c b/drivers/serial/ip22zilog.c index 66f117d15065..419dd3cd7862 100644 --- a/drivers/serial/ip22zilog.c +++ b/drivers/serial/ip22zilog.c | |||
@@ -215,7 +215,7 @@ static void __load_zsregs(struct zilog_channel *channel, unsigned char *regs) | |||
215 | /* Lower and upper byte of baud rate generator divisor. */ | 215 | /* Lower and upper byte of baud rate generator divisor. */ |
216 | write_zsreg(channel, R12, regs[R12]); | 216 | write_zsreg(channel, R12, regs[R12]); |
217 | write_zsreg(channel, R13, regs[R13]); | 217 | write_zsreg(channel, R13, regs[R13]); |
218 | 218 | ||
219 | /* Now rewrite R14, with BRENAB (if set). */ | 219 | /* Now rewrite R14, with BRENAB (if set). */ |
220 | write_zsreg(channel, R14, regs[R14]); | 220 | write_zsreg(channel, R14, regs[R14]); |
221 | 221 | ||
@@ -571,7 +571,7 @@ static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl) | |||
571 | else | 571 | else |
572 | clear_bits |= DTR; | 572 | clear_bits |= DTR; |
573 | 573 | ||
574 | /* NOTE: Not subject to 'transmitter active' rule. */ | 574 | /* NOTE: Not subject to 'transmitter active' rule. */ |
575 | up->curregs[R5] |= set_bits; | 575 | up->curregs[R5] |= set_bits; |
576 | up->curregs[R5] &= ~clear_bits; | 576 | up->curregs[R5] &= ~clear_bits; |
577 | write_zsreg(channel, R5, up->curregs[R5]); | 577 | write_zsreg(channel, R5, up->curregs[R5]); |
@@ -654,7 +654,7 @@ static void ip22zilog_enable_ms(struct uart_port *port) | |||
654 | if (new_reg != up->curregs[R15]) { | 654 | if (new_reg != up->curregs[R15]) { |
655 | up->curregs[R15] = new_reg; | 655 | up->curregs[R15] = new_reg; |
656 | 656 | ||
657 | /* NOTE: Not subject to 'transmitter active' rule. */ | 657 | /* NOTE: Not subject to 'transmitter active' rule. */ |
658 | write_zsreg(channel, R15, up->curregs[R15]); | 658 | write_zsreg(channel, R15, up->curregs[R15]); |
659 | } | 659 | } |
660 | } | 660 | } |
@@ -680,7 +680,7 @@ static void ip22zilog_break_ctl(struct uart_port *port, int break_state) | |||
680 | if (new_reg != up->curregs[R5]) { | 680 | if (new_reg != up->curregs[R5]) { |
681 | up->curregs[R5] = new_reg; | 681 | up->curregs[R5] = new_reg; |
682 | 682 | ||
683 | /* NOTE: Not subject to 'transmitter active' rule. */ | 683 | /* NOTE: Not subject to 'transmitter active' rule. */ |
684 | write_zsreg(channel, R5, up->curregs[R5]); | 684 | write_zsreg(channel, R5, up->curregs[R5]); |
685 | } | 685 | } |
686 | 686 | ||