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-rw-r--r--drivers/infiniband/hw/mlx4/main.c2
-rw-r--r--drivers/net/mlx4/fw.c3
-rw-r--r--drivers/net/mlx4/fw.h1
-rw-r--r--drivers/net/mlx4/main.c1
4 files changed, 6 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c
index c591616dccde..2fc8ccebaac1 100644
--- a/drivers/infiniband/hw/mlx4/main.c
+++ b/drivers/infiniband/hw/mlx4/main.c
@@ -169,7 +169,7 @@ static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
169 props->phys_state = out_mad->data[33] >> 4; 169 props->phys_state = out_mad->data[33] >> 4;
170 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 170 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
171 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 171 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
172 props->max_msg_sz = 0x80000000; 172 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
173 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; 173 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
174 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 174 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
175 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 175 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
diff --git a/drivers/net/mlx4/fw.c b/drivers/net/mlx4/fw.c
index d2b065351e45..c45cbe43a0c4 100644
--- a/drivers/net/mlx4/fw.c
+++ b/drivers/net/mlx4/fw.c
@@ -138,6 +138,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
138#define QUERY_DEV_CAP_ACK_DELAY_OFFSET 0x35 138#define QUERY_DEV_CAP_ACK_DELAY_OFFSET 0x35
139#define QUERY_DEV_CAP_MTU_WIDTH_OFFSET 0x36 139#define QUERY_DEV_CAP_MTU_WIDTH_OFFSET 0x36
140#define QUERY_DEV_CAP_VL_PORT_OFFSET 0x37 140#define QUERY_DEV_CAP_VL_PORT_OFFSET 0x37
141#define QUERY_DEV_CAP_MAX_MSG_SZ_OFFSET 0x38
141#define QUERY_DEV_CAP_MAX_GID_OFFSET 0x3b 142#define QUERY_DEV_CAP_MAX_GID_OFFSET 0x3b
142#define QUERY_DEV_CAP_RATE_SUPPORT_OFFSET 0x3c 143#define QUERY_DEV_CAP_RATE_SUPPORT_OFFSET 0x3c
143#define QUERY_DEV_CAP_MAX_PKEY_OFFSET 0x3f 144#define QUERY_DEV_CAP_MAX_PKEY_OFFSET 0x3f
@@ -220,6 +221,8 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
220 dev_cap->local_ca_ack_delay = field & 0x1f; 221 dev_cap->local_ca_ack_delay = field & 0x1f;
221 MLX4_GET(field, outbox, QUERY_DEV_CAP_VL_PORT_OFFSET); 222 MLX4_GET(field, outbox, QUERY_DEV_CAP_VL_PORT_OFFSET);
222 dev_cap->num_ports = field & 0xf; 223 dev_cap->num_ports = field & 0xf;
224 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MSG_SZ_OFFSET);
225 dev_cap->max_msg_sz = 1 << (field & 0x1f);
223 MLX4_GET(stat_rate, outbox, QUERY_DEV_CAP_RATE_SUPPORT_OFFSET); 226 MLX4_GET(stat_rate, outbox, QUERY_DEV_CAP_RATE_SUPPORT_OFFSET);
224 dev_cap->stat_rate_support = stat_rate; 227 dev_cap->stat_rate_support = stat_rate;
225 MLX4_GET(dev_cap->flags, outbox, QUERY_DEV_CAP_FLAGS_OFFSET); 228 MLX4_GET(dev_cap->flags, outbox, QUERY_DEV_CAP_FLAGS_OFFSET);
diff --git a/drivers/net/mlx4/fw.h b/drivers/net/mlx4/fw.h
index 296254ac27c1..7e1dd9e25cfb 100644
--- a/drivers/net/mlx4/fw.h
+++ b/drivers/net/mlx4/fw.h
@@ -60,6 +60,7 @@ struct mlx4_dev_cap {
60 int max_rdma_global; 60 int max_rdma_global;
61 int local_ca_ack_delay; 61 int local_ca_ack_delay;
62 int num_ports; 62 int num_ports;
63 u32 max_msg_sz;
63 int max_mtu[MLX4_MAX_PORTS + 1]; 64 int max_mtu[MLX4_MAX_PORTS + 1];
64 int max_port_width[MLX4_MAX_PORTS + 1]; 65 int max_port_width[MLX4_MAX_PORTS + 1];
65 int max_vl[MLX4_MAX_PORTS + 1]; 66 int max_vl[MLX4_MAX_PORTS + 1];
diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c
index c3da2a2f5431..a4f2e0475a71 100644
--- a/drivers/net/mlx4/main.c
+++ b/drivers/net/mlx4/main.c
@@ -154,6 +154,7 @@ static int __devinit mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev
154 dev->caps.reserved_uars = dev_cap->reserved_uars; 154 dev->caps.reserved_uars = dev_cap->reserved_uars;
155 dev->caps.reserved_pds = dev_cap->reserved_pds; 155 dev->caps.reserved_pds = dev_cap->reserved_pds;
156 dev->caps.mtt_entry_sz = MLX4_MTT_ENTRY_PER_SEG * dev_cap->mtt_entry_sz; 156 dev->caps.mtt_entry_sz = MLX4_MTT_ENTRY_PER_SEG * dev_cap->mtt_entry_sz;
157 dev->caps.max_msg_sz = dev_cap->max_msg_sz;
157 dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); 158 dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1);
158 dev->caps.flags = dev_cap->flags; 159 dev->caps.flags = dev_cap->flags;
159 dev->caps.stat_rate_support = dev_cap->stat_rate_support; 160 dev->caps.stat_rate_support = dev_cap->stat_rate_support;