138 files changed, 19741 insertions, 860 deletions

diff --git a/drivers/Kconfig b/drivers/Kconfig
index 3f8a231fe754..d74d9fbb9fd2 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -52,6 +52,8 @@ source "drivers/i2c/Kconfig"
 
 source "drivers/spi/Kconfig"
 
+source "drivers/gpio/Kconfig"
+
 source "drivers/w1/Kconfig"
 
 source "drivers/power/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 0ee9a8a4095e..f1c11db52a57 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -5,6 +5,7 @@
 # Rewritten to use lists instead of if-statements.
 #
 
+obj-$(CONFIG_HAVE_GPIO_LIB)     += gpio/
 obj-$(CONFIG_PCI)               += pci/
 obj-$(CONFIG_PARISC)            += parisc/
 obj-$(CONFIG_RAPIDIO)           += rapidio/
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index eb1f82f79153..199ea2146153 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -38,7 +38,7 @@
 #include <linux/dmi.h>
 #include <linux/moduleparam.h>
 #include <linux/sched.h>        /* need_resched() */
-#include <linux/latency.h>
+#include <linux/pm_qos_params.h>
 #include <linux/clockchips.h>
 #include <linux/cpuidle.h>
 
@@ -648,7 +648,8 @@ static void acpi_processor_idle(void)
         if (cx->promotion.state &&
             ((cx->promotion.state - pr->power.states) <= max_cstate)) {
                 if (sleep_ticks > cx->promotion.threshold.ticks &&
-                  cx->promotion.state->latency <= system_latency_constraint()) {
+                  cx->promotion.state->latency <=
+                                pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
                         cx->promotion.count++;
                         cx->demotion.count = 0;
                         if (cx->promotion.count >=
@@ -692,7 +693,8 @@ static void acpi_processor_idle(void)
          * or if the latency of the current state is unacceptable
          */
         if ((pr->power.state - pr->power.states) > max_cstate ||
-                pr->power.state->latency > system_latency_constraint()) {
+                pr->power.state->latency >
+                                pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
                 if (cx->demotion.state)
                         next_state = cx->demotion.state;
         }
@@ -1200,7 +1202,7 @@ static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
                    "maximum allowed latency: %d usec\n",
                    pr->power.state ? pr->power.state - pr->power.states : 0,
                    max_cstate, (unsigned)pr->power.bm_activity,
-                   system_latency_constraint());
+                   pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
 
         seq_puts(seq, "states:\n");
 
@@ -1718,8 +1720,9 @@ int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
                                "ACPI: processor limited to max C-state %d\n",
                                max_cstate);
                 first_run++;
-#if !defined (CONFIG_CPU_IDLE) && defined (CONFIG_SMP)
-                register_latency_notifier(&acpi_processor_latency_notifier);
+#if !defined(CONFIG_CPU_IDLE) && defined(CONFIG_SMP)
+                pm_qos_add_notifier(PM_QOS_CPU_DMA_LATENCY,
+                                &acpi_processor_latency_notifier);
 #endif
         }
 
@@ -1806,7 +1809,8 @@ int acpi_processor_power_exit(struct acpi_processor *pr,
                  */
                 cpu_idle_wait();
 #ifdef CONFIG_SMP
-                unregister_latency_notifier(&acpi_processor_latency_notifier);
+                pm_qos_remove_notifier(PM_QOS_CPU_DMA_LATENCY,
+                                &acpi_processor_latency_notifier);
 #endif
         }
 #endif
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index 96e614a1c169..59e65edc5820 100644
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -108,17 +108,6 @@ struct inic_port_priv {
         u8      cached_pirq_mask;
 };
 
-static int inic_slave_config(struct scsi_device *sdev)
-{
-        /* This controller is braindamaged.  dma_boundary is 0xffff
-         * like others but it will lock up the whole machine HARD if
-         * 65536 byte PRD entry is fed.  Reduce maximum segment size.
-         */
-        blk_queue_max_segment_size(sdev->request_queue, 65536 - 512);
-
-        return ata_scsi_slave_config(sdev);
-}
-
 static struct scsi_host_template inic_sht = {
         .module                 = THIS_MODULE,
         .name                   = DRV_NAME,
@@ -132,7 +121,7 @@ static struct scsi_host_template inic_sht = {
         .use_clustering         = ATA_SHT_USE_CLUSTERING,
         .proc_name              = DRV_NAME,
         .dma_boundary           = ATA_DMA_BOUNDARY,
-        .slave_configure        = inic_slave_config,
+        .slave_configure        = ata_scsi_slave_config,
         .slave_destroy          = ata_scsi_slave_destroy,
         .bios_param             = ata_std_bios_param,
 };
@@ -730,6 +719,18 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
                 return rc;
         }
 
+        /*
+         * This controller is braindamaged.  dma_boundary is 0xffff
+         * like others but it will lock up the whole machine HARD if
+         * 65536 byte PRD entry is fed. Reduce maximum segment size.
+         */
+        rc = pci_set_dma_max_seg_size(pdev, 65536 - 512);
+        if (rc) {
+                dev_printk(KERN_ERR, &pdev->dev,
+                           "failed to set the maximum segment size.\n");
+                return rc;
+        }
+
         rc = init_controller(iomap[MMIO_BAR], hpriv->cached_hctl);
         if (rc) {
                 dev_printk(KERN_ERR, &pdev->dev,
diff --git a/drivers/bluetooth/bpa10x.c b/drivers/bluetooth/bpa10x.c
index 1375b5345a0a..3b28658f5a1f 100644
--- a/drivers/bluetooth/bpa10x.c
+++ b/drivers/bluetooth/bpa10x.c
@@ -423,6 +423,7 @@ static int bpa10x_send_frame(struct sk_buff *skb)
                 break;
 
         default:
+                usb_free_urb(urb);
                 return -EILSEQ;
         }
 
diff --git a/drivers/bluetooth/bt3c_cs.c b/drivers/bluetooth/bt3c_cs.c
index a18f9b8c9e12..7703d6e06fd9 100644
--- a/drivers/bluetooth/bt3c_cs.c
+++ b/drivers/bluetooth/bt3c_cs.c
@@ -704,7 +704,7 @@ static int next_tuple(struct pcmcia_device *handle, tuple_t *tuple, cisparse_t *
 
 static int bt3c_config(struct pcmcia_device *link)
 {
-        static kio_addr_t base[5] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
+        static unsigned int base[5] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
         bt3c_info_t *info = link->priv;
         tuple_t tuple;
         u_short buf[256];
diff --git a/drivers/bluetooth/btsdio.c b/drivers/bluetooth/btsdio.c
index b786f6187902..58630cc1eff2 100644
--- a/drivers/bluetooth/btsdio.c
+++ b/drivers/bluetooth/btsdio.c
@@ -162,10 +162,8 @@ static int btsdio_rx_packet(struct btsdio_data *data)
         bt_cb(skb)->pkt_type = hdr[3];
 
         err = hci_recv_frame(skb);
-        if (err < 0) {
-                kfree(skb);
+        if (err < 0)
                 return err;
-        }
 
         sdio_writeb(data->func, 0x00, REG_PC_RRT, NULL);
 
diff --git a/drivers/bluetooth/btuart_cs.c b/drivers/bluetooth/btuart_cs.c
index dade1626865b..68d1d258e6a4 100644
--- a/drivers/bluetooth/btuart_cs.c
+++ b/drivers/bluetooth/btuart_cs.c
@@ -634,7 +634,7 @@ static int next_tuple(struct pcmcia_device *handle, tuple_t *tuple, cisparse_t *
 
 static int btuart_config(struct pcmcia_device *link)
 {
-        static kio_addr_t base[5] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
+        static unsigned int base[5] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
         btuart_info_t *info = link->priv;
         tuple_t tuple;
         u_short buf[256];
diff --git a/drivers/bluetooth/hci_usb.c b/drivers/bluetooth/hci_usb.c
index 98a9cdeaffb6..372c7ef633da 100644
--- a/drivers/bluetooth/hci_usb.c
+++ b/drivers/bluetooth/hci_usb.c
@@ -111,6 +111,7 @@ static struct usb_device_id blacklist_ids[] = {
         { USB_DEVICE(0x0a5c, 0x2033), .driver_info = HCI_IGNORE },
 
         /* Broadcom BCM2035 */
+        { USB_DEVICE(0x0a5c, 0x2035), .driver_info = HCI_RESET | HCI_WRONG_SCO_MTU },
         { USB_DEVICE(0x0a5c, 0x200a), .driver_info = HCI_RESET | HCI_WRONG_SCO_MTU },
         { USB_DEVICE(0x0a5c, 0x2009), .driver_info = HCI_BCM92035 },
 
diff --git a/drivers/char/agp/agp.h b/drivers/char/agp/agp.h
index b83824c41329..c69f79598e47 100644
--- a/drivers/char/agp/agp.h
+++ b/drivers/char/agp/agp.h
@@ -117,7 +117,8 @@ struct agp_bridge_driver {
         void (*free_by_type)(struct agp_memory *);
         void *(*agp_alloc_page)(struct agp_bridge_data *);
         void (*agp_destroy_page)(void *, int flags);
-        int (*agp_type_to_mask_type) (struct agp_bridge_data *, int);
+        int (*agp_type_to_mask_type) (struct agp_bridge_data *, int);
+        void (*chipset_flush)(struct agp_bridge_data *);
 };
 
 struct agp_bridge_data {
@@ -235,6 +236,9 @@ struct agp_bridge_data {
 #define I965_PGETBL_SIZE_512KB  (0 << 1)
 #define I965_PGETBL_SIZE_256KB  (1 << 1)
 #define I965_PGETBL_SIZE_128KB  (2 << 1)
+#define I965_PGETBL_SIZE_1MB    (3 << 1)
+#define I965_PGETBL_SIZE_2MB    (4 << 1)
+#define I965_PGETBL_SIZE_1_5MB  (5 << 1)
 #define G33_PGETBL_SIZE_MASK    (3 << 8)
 #define G33_PGETBL_SIZE_1M      (1 << 8)
 #define G33_PGETBL_SIZE_2M      (2 << 8)
diff --git a/drivers/char/agp/alpha-agp.c b/drivers/char/agp/alpha-agp.c
index aa8f3a39a704..e77c17838c8a 100644
--- a/drivers/char/agp/alpha-agp.c
+++ b/drivers/char/agp/alpha-agp.c
@@ -11,29 +11,28 @@
 
 #include "agp.h"
 
-static struct page *alpha_core_agp_vm_nopage(struct vm_area_struct *vma,
-                                             unsigned long address,
-                                             int *type)
+static int alpha_core_agp_vm_fault(struct vm_area_struct *vma,
+                                        struct vm_fault *vmf)
 {
         alpha_agp_info *agp = agp_bridge->dev_private_data;
         dma_addr_t dma_addr;
         unsigned long pa;
         struct page *page;
 
-        dma_addr = address - vma->vm_start + agp->aperture.bus_base;
+        dma_addr = (unsigned long)vmf->virtual_address - vma->vm_start
+                                                + agp->aperture.bus_base;
         pa = agp->ops->translate(agp, dma_addr);
 
         if (pa == (unsigned long)-EINVAL)
-                return NULL;    /* no translation */
+                return VM_FAULT_SIGBUS; /* no translation */
 
         /*
          * Get the page, inc the use count, and return it
          */
         page = virt_to_page(__va(pa));
         get_page(page);
-        if (type)
-                *type = VM_FAULT_MINOR;
-        return page;
+        vmf->page = page;
+        return 0;
 }
 
 static struct aper_size_info_fixed alpha_core_agp_sizes[] =
@@ -42,7 +41,7 @@ static struct aper_size_info_fixed alpha_core_agp_sizes[] =
 };
 
 struct vm_operations_struct alpha_core_agp_vm_ops = {
-        .nopage = alpha_core_agp_vm_nopage,
+        .fault = alpha_core_agp_vm_fault,
 };
 
 
diff --git a/drivers/char/agp/amd-k7-agp.c b/drivers/char/agp/amd-k7-agp.c
index 1405a42585e1..87be46406daf 100644
--- a/drivers/char/agp/amd-k7-agp.c
+++ b/drivers/char/agp/amd-k7-agp.c
@@ -436,10 +436,6 @@ static int __devinit agp_amdk7_probe(struct pci_dev *pdev,
                                 return -ENODEV;
                         }
                         cap_ptr = pci_find_capability(gfxcard, PCI_CAP_ID_AGP);
-                        if (!cap_ptr) {
-                                pci_dev_put(gfxcard);
-                                continue;
-                        }
                 }
 
                 /* With so many variants of NVidia cards, it's simpler just
diff --git a/drivers/char/agp/backend.c b/drivers/char/agp/backend.c
index 2720882e66fe..b1bdd015165c 100644
--- a/drivers/char/agp/backend.c
+++ b/drivers/char/agp/backend.c
@@ -43,7 +43,7 @@
  * fix some real stupidity. It's only by chance we can bump
  * past 0.99 at all due to some boolean logic error. */
 #define AGPGART_VERSION_MAJOR 0
-#define AGPGART_VERSION_MINOR 102
+#define AGPGART_VERSION_MINOR 103
 static const struct agp_version agp_current_version =
 {
         .major = AGPGART_VERSION_MAJOR,
diff --git a/drivers/char/agp/compat_ioctl.c b/drivers/char/agp/compat_ioctl.c
index ecd4248861b9..39275794fe63 100644
--- a/drivers/char/agp/compat_ioctl.c
+++ b/drivers/char/agp/compat_ioctl.c
@@ -273,6 +273,10 @@ long compat_agp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
         case AGPIOC_UNBIND32:
                 ret_val = compat_agpioc_unbind_wrap(curr_priv, (void __user *) arg);
                 break;
+
+        case AGPIOC_CHIPSET_FLUSH32:
+                ret_val = agpioc_chipset_flush_wrap(curr_priv);
+                break;
         }
 
 ioctl_out:
diff --git a/drivers/char/agp/compat_ioctl.h b/drivers/char/agp/compat_ioctl.h
index 71939d637236..0c9678ac0371 100644
--- a/drivers/char/agp/compat_ioctl.h
+++ b/drivers/char/agp/compat_ioctl.h
@@ -39,6 +39,7 @@
 #define AGPIOC_DEALLOCATE32 _IOW (AGPIOC_BASE, 7, compat_int_t)
 #define AGPIOC_BIND32       _IOW (AGPIOC_BASE, 8, compat_uptr_t)
 #define AGPIOC_UNBIND32     _IOW (AGPIOC_BASE, 9, compat_uptr_t)
+#define AGPIOC_CHIPSET_FLUSH32 _IO (AGPIOC_BASE, 10)
 
 struct agp_info32 {
         struct agp_version version;     /* version of the driver        */
@@ -101,5 +102,6 @@ void agp_free_memory_wrap(struct agp_memory *memory);
 struct agp_memory *agp_allocate_memory_wrap(size_t pg_count, u32 type);
 struct agp_memory *agp_find_mem_by_key(int key);
 struct agp_client *agp_find_client_by_pid(pid_t id);
+int agpioc_chipset_flush_wrap(struct agp_file_private *priv);
 
 #endif /* _AGP_COMPAT_H */
diff --git a/drivers/char/agp/frontend.c b/drivers/char/agp/frontend.c
index 7791e98de51c..55d7a82bd071 100644
--- a/drivers/char/agp/frontend.c
+++ b/drivers/char/agp/frontend.c
@@ -689,7 +689,7 @@ static int agp_open(struct inode *inode, struct file *file)
         set_bit(AGP_FF_ALLOW_CLIENT, &priv->access_flags);
         priv->my_pid = current->pid;
 
-        if ((current->uid == 0) || (current->suid == 0)) {
+        if (capable(CAP_SYS_RAWIO)) {
                 /* Root priv, can be controller */
                 set_bit(AGP_FF_ALLOW_CONTROLLER, &priv->access_flags);
         }
@@ -960,6 +960,13 @@ static int agpioc_unbind_wrap(struct agp_file_private *priv, void __user *arg)
         return agp_unbind_memory(memory);
 }
 
+int agpioc_chipset_flush_wrap(struct agp_file_private *priv)
+{
+        DBG("");
+        agp_flush_chipset(agp_bridge);
+        return 0;
+}
+
 static int agp_ioctl(struct inode *inode, struct file *file,
                      unsigned int cmd, unsigned long arg)
 {
@@ -1033,6 +1040,10 @@ static int agp_ioctl(struct inode *inode, struct file *file,
         case AGPIOC_UNBIND:
                 ret_val = agpioc_unbind_wrap(curr_priv, (void __user *) arg);
                 break;
+               
+        case AGPIOC_CHIPSET_FLUSH:
+                ret_val = agpioc_chipset_flush_wrap(curr_priv);
+                break;
         }
 
 ioctl_out:
diff --git a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c
index 1a4674ce0c71..7484bc759c4c 100644
--- a/drivers/char/agp/generic.c
+++ b/drivers/char/agp/generic.c
@@ -80,6 +80,13 @@ static int agp_get_key(void)
         return -1;
 }
 
+void agp_flush_chipset(struct agp_bridge_data *bridge)
+{
+        if (bridge->driver->chipset_flush)
+                bridge->driver->chipset_flush(bridge);
+}
+EXPORT_SYMBOL(agp_flush_chipset);
+
 /*
  * Use kmalloc if possible for the page list. Otherwise fall back to
  * vmalloc. This speeds things up and also saves memory for small AGP
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 189efb6ef970..eeea50a1d22a 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -14,8 +14,8 @@
 #define PCI_DEVICE_ID_INTEL_E7221_IG    0x258a
 #define PCI_DEVICE_ID_INTEL_82946GZ_HB      0x2970
 #define PCI_DEVICE_ID_INTEL_82946GZ_IG      0x2972
-#define PCI_DEVICE_ID_INTEL_82965G_1_HB     0x2980
-#define PCI_DEVICE_ID_INTEL_82965G_1_IG     0x2982
+#define PCI_DEVICE_ID_INTEL_82G35_HB     0x2980
+#define PCI_DEVICE_ID_INTEL_82G35_IG     0x2982
 #define PCI_DEVICE_ID_INTEL_82965Q_HB       0x2990
 #define PCI_DEVICE_ID_INTEL_82965Q_IG       0x2992
 #define PCI_DEVICE_ID_INTEL_82965G_HB       0x29A0
@@ -32,13 +32,24 @@
 #define PCI_DEVICE_ID_INTEL_Q35_IG          0x29B2
 #define PCI_DEVICE_ID_INTEL_Q33_HB          0x29D0
 #define PCI_DEVICE_ID_INTEL_Q33_IG          0x29D2
+#define PCI_DEVICE_ID_INTEL_IGD_HB          0x2A40
+#define PCI_DEVICE_ID_INTEL_IGD_IG          0x2A42
+
+/* cover 915 and 945 variants */
+#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
+                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB || \
+                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB || \
+                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB || \
+                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB || \
+                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GME_HB)
 
 #define IS_I965 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82946GZ_HB || \
-                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_1_HB || \
-                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965Q_HB || \
-                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \
-                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \
-                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB)
+                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82G35_HB || \
+                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965Q_HB || \
+                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \
+                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \
+                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB || \
+                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_HB)
 
 #define IS_G33 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \
                 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \
@@ -71,9 +82,11 @@ extern int agp_memory_reserved;
 #define I915_GMCH_GMS_STOLEN_64M        (0x7 << 4)
 #define G33_GMCH_GMS_STOLEN_128M       (0x8 << 4)
 #define G33_GMCH_GMS_STOLEN_256M       (0x9 << 4)
+#define I915_IFPADDR    0x60
 
 /* Intel 965G registers */
 #define I965_MSAC 0x62
+#define I965_IFPADDR    0x70
 
 /* Intel 7505 registers */
 #define INTEL_I7505_APSIZE      0x74
@@ -115,6 +128,13 @@ static struct _intel_private {
          * popup and for the GTT.
          */
         int gtt_entries;                        /* i830+ */
+        union {
+                void __iomem *i9xx_flush_page;
+                void *i8xx_flush_page;
+        };
+        struct page *i8xx_page;
+        struct resource ifp_resource;
+        int resource_valid;
 } intel_private;
 
 static int intel_i810_fetch_size(void)
@@ -204,7 +224,7 @@ static void intel_i810_agp_enable(struct agp_bridge_data *bridge, u32 mode)
 /* Exists to support ARGB cursors */
 static void *i8xx_alloc_pages(void)
 {
-        struct page * page;
+        struct page *page;
 
         page = alloc_pages(GFP_KERNEL | GFP_DMA32, 2);
         if (page == NULL)
@@ -433,7 +453,7 @@ static void intel_i830_init_gtt_entries(void)
         static const int ddt[4] = { 0, 16, 32, 64 };
         int size; /* reserved space (in kb) at the top of stolen memory */
 
-        pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
+        pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl);
 
         if (IS_I965) {
                 u32 pgetbl_ctl;
@@ -453,6 +473,15 @@ static void intel_i830_init_gtt_entries(void)
                 case I965_PGETBL_SIZE_512KB:
                         size = 512;
                         break;
+                case I965_PGETBL_SIZE_1MB:
+                        size = 1024;
+                        break;
+                case I965_PGETBL_SIZE_2MB:
+                        size = 2048;
+                        break;
+                case I965_PGETBL_SIZE_1_5MB:
+                        size = 1024 + 512;
+                        break;
                 default:
                         printk(KERN_INFO PFX "Unknown page table size, "
                                "assuming 512KB\n");
@@ -523,26 +552,14 @@ static void intel_i830_init_gtt_entries(void)
                         break;
                 case I915_GMCH_GMS_STOLEN_48M:
                         /* Check it's really I915G */
-                        if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB ||
-                            agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB ||
-                            agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB ||
-                            agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB ||
-                            agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB ||
-                            agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GME_HB ||
-                            IS_I965 || IS_G33)
+                        if (IS_I915 || IS_I965 || IS_G33)
                                 gtt_entries = MB(48) - KB(size);
                         else
                                 gtt_entries = 0;
                         break;
                 case I915_GMCH_GMS_STOLEN_64M:
                         /* Check it's really I915G */
-                        if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB ||
-                            agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB ||
-                            agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB ||
-                            agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB ||
-                            agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB ||
-                            agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GME_HB ||
-                            IS_I965 || IS_G33)
+                        if (IS_I915 || IS_I965 || IS_G33)
                                 gtt_entries = MB(64) - KB(size);
                         else
                                 gtt_entries = 0;
@@ -575,6 +592,45 @@ static void intel_i830_init_gtt_entries(void)
         intel_private.gtt_entries = gtt_entries;
 }
 
+static void intel_i830_fini_flush(void)
+{
+        kunmap(intel_private.i8xx_page);
+        intel_private.i8xx_flush_page = NULL;
+        unmap_page_from_agp(intel_private.i8xx_page);
+
+        __free_page(intel_private.i8xx_page);
+        intel_private.i8xx_page = NULL;
+}
+
+static void intel_i830_setup_flush(void)
+{
+        /* return if we've already set the flush mechanism up */
+        if (intel_private.i8xx_page)
+                return;
+
+        intel_private.i8xx_page = alloc_page(GFP_KERNEL | __GFP_ZERO | GFP_DMA32);
+        if (!intel_private.i8xx_page)
+                return;
+
+        /* make page uncached */
+        map_page_into_agp(intel_private.i8xx_page);
+
+        intel_private.i8xx_flush_page = kmap(intel_private.i8xx_page);
+        if (!intel_private.i8xx_flush_page)
+                intel_i830_fini_flush();
+}
+
+static void intel_i830_chipset_flush(struct agp_bridge_data *bridge)
+{
+        unsigned int *pg = intel_private.i8xx_flush_page;
+        int i;
+
+        for (i = 0; i < 256; i += 2)
+                *(pg + i) = i;
+
+        wmb();
+}
+
 /* The intel i830 automatically initializes the agp aperture during POST.
  * Use the memory already set aside for in the GTT.
  */
@@ -590,10 +646,10 @@ static int intel_i830_create_gatt_table(struct agp_bridge_data *bridge)
         num_entries = size->num_entries;
         agp_bridge->gatt_table_real = NULL;
 
-        pci_read_config_dword(intel_private.pcidev,I810_MMADDR,&temp);
+        pci_read_config_dword(intel_private.pcidev, I810_MMADDR, &temp);
         temp &= 0xfff80000;
 
-        intel_private.registers = ioremap(temp,128 * 4096);
+        intel_private.registers = ioremap(temp, 128 * 4096);
         if (!intel_private.registers)
                 return -ENOMEM;
 
@@ -633,7 +689,7 @@ static int intel_i830_fetch_size(void)
                 return values[0].size;
         }
 
-        pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
+        pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl);
 
         if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
                 agp_bridge->previous_size = agp_bridge->current_size = (void *) values;
@@ -657,12 +713,12 @@ static int intel_i830_configure(void)
 
         current_size = A_SIZE_FIX(agp_bridge->current_size);
 
-        pci_read_config_dword(intel_private.pcidev,I810_GMADDR,&temp);
+        pci_read_config_dword(intel_private.pcidev, I810_GMADDR, &temp);
         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 
-        pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
+        pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl);
         gmch_ctrl |= I830_GMCH_ENABLED;
-        pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
+        pci_write_config_word(agp_bridge->dev, I830_GMCH_CTRL, gmch_ctrl);
 
         writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_private.registers+I810_PGETBL_CTL);
         readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */
@@ -675,6 +731,8 @@ static int intel_i830_configure(void)
         }
 
         global_cache_flush();
+
+        intel_i830_setup_flush();
         return 0;
 }
 
@@ -683,9 +741,10 @@ static void intel_i830_cleanup(void)
         iounmap(intel_private.registers);
 }
 
-static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int type)
+static int intel_i830_insert_entries(struct agp_memory *mem, off_t pg_start,
+                                     int type)
 {
-        int i,j,num_entries;
+        int i, j, num_entries;
         void *temp;
         int ret = -EINVAL;
         int mask_type;
@@ -697,10 +756,10 @@ static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start, int
         num_entries = A_SIZE_FIX(temp)->num_entries;
 
         if (pg_start < intel_private.gtt_entries) {
-                printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_private.gtt_entries == 0x%.8x\n",
-                                pg_start,intel_private.gtt_entries);
+                printk(KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_private.gtt_entries == 0x%.8x\n",
+                                pg_start, intel_private.gtt_entries);
 
-                printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
+                printk(KERN_INFO PFX "Trying to insert into local/stolen memory\n");
                 goto out_err;
         }
 
@@ -738,8 +797,8 @@ out_err:
         return ret;
 }
 
-static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
-                                int type)
+static int intel_i830_remove_entries(struct agp_memory *mem, off_t pg_start,
+                                     int type)
 {
         int i;
 
@@ -747,7 +806,7 @@ static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
                 return 0;
 
         if (pg_start < intel_private.gtt_entries) {
-                printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
+                printk(KERN_INFO PFX "Trying to disable local/stolen memory\n");
                 return -EINVAL;
         }
 
@@ -760,7 +819,7 @@ static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,
         return 0;
 }
 
-static struct agp_memory *intel_i830_alloc_by_type(size_t pg_count,int type)
+static struct agp_memory *intel_i830_alloc_by_type(size_t pg_count, int type)
 {
         if (type == AGP_PHYS_MEMORY)
                 return alloc_agpphysmem_i8xx(pg_count, type);
@@ -768,6 +827,95 @@ static struct agp_memory *intel_i830_alloc_by_type(size_t pg_count,int type)
         return NULL;
 }
 
+static int intel_alloc_chipset_flush_resource(void)
+{
+        int ret;
+        ret = pci_bus_alloc_resource(agp_bridge->dev->bus, &intel_private.ifp_resource, PAGE_SIZE,
+                                     PAGE_SIZE, PCIBIOS_MIN_MEM, 0,
+                                     pcibios_align_resource, agp_bridge->dev);
+
+        return ret;
+}
+
+static void intel_i915_setup_chipset_flush(void)
+{
+        int ret;
+        u32 temp;
+
+        pci_read_config_dword(agp_bridge->dev, I915_IFPADDR, &temp);
+        if (!(temp & 0x1)) {
+                intel_alloc_chipset_flush_resource();
+                intel_private.resource_valid = 1;
+                pci_write_config_dword(agp_bridge->dev, I915_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1);
+        } else {
+                temp &= ~1;
+
+                intel_private.resource_valid = 1;
+                intel_private.ifp_resource.start = temp;
+                intel_private.ifp_resource.end = temp + PAGE_SIZE;
+                ret = request_resource(&iomem_resource, &intel_private.ifp_resource);
+                /* some BIOSes reserve this area in a pnp some don't */
+                if (ret)
+                        intel_private.resource_valid = 0;
+        }
+}
+
+static void intel_i965_g33_setup_chipset_flush(void)
+{
+        u32 temp_hi, temp_lo;
+        int ret;
+
+        pci_read_config_dword(agp_bridge->dev, I965_IFPADDR + 4, &temp_hi);
+        pci_read_config_dword(agp_bridge->dev, I965_IFPADDR, &temp_lo);
+
+        if (!(temp_lo & 0x1)) {
+
+                intel_alloc_chipset_flush_resource();
+
+                intel_private.resource_valid = 1;
+                pci_write_config_dword(agp_bridge->dev, I965_IFPADDR + 4,
+                        upper_32_bits(intel_private.ifp_resource.start));
+                pci_write_config_dword(agp_bridge->dev, I965_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1);
+        } else {
+                u64 l64;
+
+                temp_lo &= ~0x1;
+                l64 = ((u64)temp_hi << 32) | temp_lo;
+
+                intel_private.resource_valid = 1;
+                intel_private.ifp_resource.start = l64;
+                intel_private.ifp_resource.end = l64 + PAGE_SIZE;
+                ret = request_resource(&iomem_resource, &intel_private.ifp_resource);
+                /* some BIOSes reserve this area in a pnp some don't */
+                if (ret)
+                        intel_private.resource_valid = 0;
+        }
+}
+
+static void intel_i9xx_setup_flush(void)
+{
+        /* return if already configured */
+        if (intel_private.ifp_resource.start)
+                return;
+
+        /* setup a resource for this object */
+        intel_private.ifp_resource.name = "Intel Flush Page";
+        intel_private.ifp_resource.flags = IORESOURCE_MEM;
+
+        /* Setup chipset flush for 915 */
+        if (IS_I965 || IS_G33) {
+                intel_i965_g33_setup_chipset_flush();
+        } else {
+                intel_i915_setup_chipset_flush();
+        }
+
+        if (intel_private.ifp_resource.start) {
+                intel_private.i9xx_flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE);
+                if (!intel_private.i9xx_flush_page)
+                        printk(KERN_INFO "unable to ioremap flush  page - no chipset flushing");
+        }
+}
+
 static int intel_i915_configure(void)
 {
         struct aper_size_info_fixed *current_size;
@@ -781,9 +929,9 @@ static int intel_i915_configure(void)
 
         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 
-        pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);
+        pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl);
         gmch_ctrl |= I830_GMCH_ENABLED;
-        pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);
+        pci_write_config_word(agp_bridge->dev, I830_GMCH_CTRL, gmch_ctrl);
 
         writel(agp_bridge->gatt_bus_addr|I810_PGETBL_ENABLED, intel_private.registers+I810_PGETBL_CTL);
         readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */
@@ -796,19 +944,34 @@ static int intel_i915_configure(void)
         }
 
         global_cache_flush();
+
+        intel_i9xx_setup_flush();
+
         return 0;
 }
 
 static void intel_i915_cleanup(void)
 {
+        if (intel_private.i9xx_flush_page)
+                iounmap(intel_private.i9xx_flush_page);
+        if (intel_private.resource_valid)
+                release_resource(&intel_private.ifp_resource);
+        intel_private.ifp_resource.start = 0;
+        intel_private.resource_valid = 0;
         iounmap(intel_private.gtt);
         iounmap(intel_private.registers);
 }
 
-static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
-                                int type)
+static void intel_i915_chipset_flush(struct agp_bridge_data *bridge)
 {
-        int i,j,num_entries;
+        if (intel_private.i9xx_flush_page)
+                writel(1, intel_private.i9xx_flush_page);
+}
+
+static int intel_i915_insert_entries(struct agp_memory *mem, off_t pg_start,
+                                     int type)
+{
+        int i, j, num_entries;
         void *temp;
         int ret = -EINVAL;
         int mask_type;
@@ -820,10 +983,10 @@ static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
         num_entries = A_SIZE_FIX(temp)->num_entries;
 
         if (pg_start < intel_private.gtt_entries) {
-                printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_private.gtt_entries == 0x%.8x\n",
-                                pg_start,intel_private.gtt_entries);
+                printk(KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_private.gtt_entries == 0x%.8x\n",
+                                pg_start, intel_private.gtt_entries);
 
-                printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");
+                printk(KERN_INFO PFX "Trying to insert into local/stolen memory\n");
                 goto out_err;
         }
 
@@ -861,8 +1024,8 @@ static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
         return ret;
 }
 
-static int intel_i915_remove_entries(struct agp_memory *mem,off_t pg_start,
-                                int type)
+static int intel_i915_remove_entries(struct agp_memory *mem, off_t pg_start,
+                                     int type)
 {
         int i;
 
@@ -870,13 +1033,13 @@ static int intel_i915_remove_entries(struct agp_memory *mem,off_t pg_start,
                 return 0;
 
         if (pg_start < intel_private.gtt_entries) {
-                printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");
+                printk(KERN_INFO PFX "Trying to disable local/stolen memory\n");
                 return -EINVAL;
         }
 
-        for (i = pg_start; i < (mem->page_count + pg_start); i++) {
+        for (i = pg_start; i < (mem->page_count + pg_start); i++)
                 writel(agp_bridge->scratch_page, intel_private.gtt+i);
-        }
+
         readl(intel_private.gtt+i-1);
 
         agp_bridge->driver->tlb_flush(mem);
@@ -923,7 +1086,7 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
         agp_bridge->gatt_table_real = NULL;
 
         pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
-        pci_read_config_dword(intel_private.pcidev, I915_PTEADDR,&temp2);
+        pci_read_config_dword(intel_private.pcidev, I915_PTEADDR, &temp2);
 
         if (IS_G33)
             gtt_map_size = 1024 * 1024; /* 1M on G33 */
@@ -933,7 +1096,7 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
 
         temp &= 0xfff80000;
 
-        intel_private.registers = ioremap(temp,128 * 4096);
+        intel_private.registers = ioremap(temp, 128 * 4096);
         if (!intel_private.registers) {
                 iounmap(intel_private.gtt);
                 return -ENOMEM;
@@ -980,6 +1143,7 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
        struct aper_size_info_fixed *size;
        int num_entries;
        u32 temp;
+       int gtt_offset, gtt_size;
 
        size = agp_bridge->current_size;
        page_order = size->page_order;
@@ -989,13 +1153,18 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
        pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
 
        temp &= 0xfff00000;
-       intel_private.gtt = ioremap((temp + (512 * 1024)) , 512 * 1024);
 
-        if (!intel_private.gtt)
-                return -ENOMEM;
+       if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_HB)
+               gtt_offset = gtt_size = MB(2);
+       else
+               gtt_offset = gtt_size = KB(512);
+
+       intel_private.gtt = ioremap((temp + gtt_offset) , gtt_size);
 
+       if (!intel_private.gtt)
+               return -ENOMEM;
 
-       intel_private.registers = ioremap(temp,128 * 4096);
+       intel_private.registers = ioremap(temp, 128 * 4096);
        if (!intel_private.registers) {
                 iounmap(intel_private.gtt);
                 return -ENOMEM;
@@ -1154,7 +1323,7 @@ static int intel_815_configure(void)
         /* the Intel 815 chipset spec. says that bits 29-31 in the
         * ATTBASE register are reserved -> try not to write them */
         if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
-                printk (KERN_EMERG PFX "gatt bus addr too high");
+                printk(KERN_EMERG PFX "gatt bus addr too high");
                 return -EINVAL;
         }
 
@@ -1296,6 +1465,8 @@ static int intel_845_configure(void)
         pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1));
         /* clear any possible error conditions */
         pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
+
+        intel_i830_setup_flush();
         return 0;
 }
 
@@ -1552,6 +1723,7 @@ static const struct agp_bridge_driver intel_830_driver = {
         .agp_alloc_page         = agp_generic_alloc_page,
         .agp_destroy_page       = agp_generic_destroy_page,
         .agp_type_to_mask_type  = intel_i830_type_to_mask_type,
+        .chipset_flush          = intel_i830_chipset_flush,
 };
 
 static const struct agp_bridge_driver intel_820_driver = {
@@ -1648,6 +1820,7 @@ static const struct agp_bridge_driver intel_845_driver = {
         .agp_alloc_page         = agp_generic_alloc_page,
         .agp_destroy_page       = agp_generic_destroy_page,
         .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
+        .chipset_flush          = intel_i830_chipset_flush,
 };
 
 static const struct agp_bridge_driver intel_850_driver = {
@@ -1721,6 +1894,7 @@ static const struct agp_bridge_driver intel_915_driver = {
         .agp_alloc_page         = agp_generic_alloc_page,
         .agp_destroy_page       = agp_generic_destroy_page,
         .agp_type_to_mask_type  = intel_i830_type_to_mask_type,
+        .chipset_flush          = intel_i915_chipset_flush,
 };
 
 static const struct agp_bridge_driver intel_i965_driver = {
@@ -1746,6 +1920,7 @@ static const struct agp_bridge_driver intel_i965_driver = {
        .agp_alloc_page         = agp_generic_alloc_page,
        .agp_destroy_page       = agp_generic_destroy_page,
        .agp_type_to_mask_type  = intel_i830_type_to_mask_type,
+        .chipset_flush          = intel_i915_chipset_flush,
 };
 
 static const struct agp_bridge_driver intel_7505_driver = {
@@ -1795,6 +1970,7 @@ static const struct agp_bridge_driver intel_g33_driver = {
         .agp_alloc_page         = agp_generic_alloc_page,
         .agp_destroy_page       = agp_generic_destroy_page,
         .agp_type_to_mask_type  = intel_i830_type_to_mask_type,
+        .chipset_flush          = intel_i915_chipset_flush,
 };
 
 static int find_gmch(u16 device)
@@ -1804,7 +1980,7 @@ static int find_gmch(u16 device)
         gmch_device = pci_get_device(PCI_VENDOR_ID_INTEL, device, NULL);
         if (gmch_device && PCI_FUNC(gmch_device->devfn) != 0) {
                 gmch_device = pci_get_device(PCI_VENDOR_ID_INTEL,
-                                device, gmch_device);
+                                             device, gmch_device);
         }
 
         if (!gmch_device)
@@ -1867,7 +2043,7 @@ static const struct intel_driver_description {
                 NULL, &intel_915_driver },
         { PCI_DEVICE_ID_INTEL_82946GZ_HB, PCI_DEVICE_ID_INTEL_82946GZ_IG, 0, "946GZ",
                 NULL, &intel_i965_driver },
-        { PCI_DEVICE_ID_INTEL_82965G_1_HB, PCI_DEVICE_ID_INTEL_82965G_1_IG, 0, "965G",
+        { PCI_DEVICE_ID_INTEL_82G35_HB, PCI_DEVICE_ID_INTEL_82G35_IG, 0, "G35",
                 NULL, &intel_i965_driver },
         { PCI_DEVICE_ID_INTEL_82965Q_HB, PCI_DEVICE_ID_INTEL_82965Q_IG, 0, "965Q",
                 NULL, &intel_i965_driver },
@@ -1885,6 +2061,8 @@ static const struct intel_driver_description {
                 NULL, &intel_g33_driver },
         { PCI_DEVICE_ID_INTEL_Q33_HB, PCI_DEVICE_ID_INTEL_Q33_IG, 0, "Q33",
                 NULL, &intel_g33_driver },
+        { PCI_DEVICE_ID_INTEL_IGD_HB, PCI_DEVICE_ID_INTEL_IGD_IG, 0,
+            "Intel Integrated Graphics Device", NULL, &intel_i965_driver },
         { 0, 0, 0, NULL, NULL, NULL }
 };
 
@@ -1924,7 +2102,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
         if (intel_agp_chipsets[i].name == NULL) {
                 if (cap_ptr)
                         printk(KERN_WARNING PFX "Unsupported Intel chipset"
-                               "(device id: %04x)\n", pdev->device);
+                               "(device id: %04x)\n", pdev->device);
                 agp_put_bridge(bridge);
                 return -ENODEV;
         }
@@ -1937,7 +2115,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
                                 intel_agp_chipsets[i].gmch_chip_id);
                 agp_put_bridge(bridge);
                 return -ENODEV;
-        }
+        }
 
         bridge->dev = pdev;
         bridge->capndx = cap_ptr;
@@ -2067,7 +2245,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
         ID(PCI_DEVICE_ID_INTEL_82945GM_HB),
         ID(PCI_DEVICE_ID_INTEL_82945GME_HB),
         ID(PCI_DEVICE_ID_INTEL_82946GZ_HB),
-        ID(PCI_DEVICE_ID_INTEL_82965G_1_HB),
+        ID(PCI_DEVICE_ID_INTEL_82G35_HB),
         ID(PCI_DEVICE_ID_INTEL_82965Q_HB),
         ID(PCI_DEVICE_ID_INTEL_82965G_HB),
         ID(PCI_DEVICE_ID_INTEL_82965GM_HB),
@@ -2075,6 +2253,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
         ID(PCI_DEVICE_ID_INTEL_G33_HB),
         ID(PCI_DEVICE_ID_INTEL_Q35_HB),
         ID(PCI_DEVICE_ID_INTEL_Q33_HB),
+        ID(PCI_DEVICE_ID_INTEL_IGD_HB),
         { }
 };
 
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c
index 0118b9817a95..84cdf9025737 100644
--- a/drivers/char/hw_random/core.c
+++ b/drivers/char/hw_random/core.c
@@ -234,11 +234,11 @@ static DEVICE_ATTR(rng_available, S_IRUGO,
                    NULL);
 
 
-static void unregister_miscdev(void)
+static void unregister_miscdev(bool suspended)
 {
         device_remove_file(rng_miscdev.this_device, &dev_attr_rng_available);
         device_remove_file(rng_miscdev.this_device, &dev_attr_rng_current);
-        misc_deregister(&rng_miscdev);
+        __misc_deregister(&rng_miscdev, suspended);
 }
 
 static int register_miscdev(void)
@@ -313,7 +313,7 @@ out:
 }
 EXPORT_SYMBOL_GPL(hwrng_register);
 
-void hwrng_unregister(struct hwrng *rng)
+void __hwrng_unregister(struct hwrng *rng, bool suspended)
 {
         int err;
 
@@ -332,11 +332,11 @@ void hwrng_unregister(struct hwrng *rng)
                 }
         }
         if (list_empty(&rng_list))
-                unregister_miscdev();
+                unregister_miscdev(suspended);
 
         mutex_unlock(&rng_mutex);
 }
-EXPORT_SYMBOL_GPL(hwrng_unregister);
+EXPORT_SYMBOL_GPL(__hwrng_unregister);
 
 
 MODULE_DESCRIPTION("H/W Random Number Generator (RNG) driver");
diff --git a/drivers/char/misc.c b/drivers/char/misc.c
index 71c8cd7fa15f..a39101feb2ed 100644
--- a/drivers/char/misc.c
+++ b/drivers/char/misc.c
@@ -232,8 +232,9 @@ int misc_register(struct miscdevice * misc)
 }
 
 /**
- *      misc_deregister - unregister a miscellaneous device
+ *      __misc_deregister - unregister a miscellaneous device
  *      @misc: device to unregister
+ *      @suspended: to be set if the function is used during suspend/resume
  *
  *      Unregister a miscellaneous device that was previously
  *      successfully registered with misc_register(). Success
@@ -241,7 +242,7 @@ int misc_register(struct miscdevice * misc)
  *      indicates an error.
  */
 
-int misc_deregister(struct miscdevice * misc)
+int __misc_deregister(struct miscdevice *misc, bool suspended)
 {
         int i = misc->minor;
 
@@ -250,7 +251,11 @@ int misc_deregister(struct miscdevice * misc)
 
         mutex_lock(&misc_mtx);
         list_del(&misc->list);
-        device_destroy(misc_class, MKDEV(MISC_MAJOR, misc->minor));
+        if (suspended)
+                destroy_suspended_device(misc_class,
+                                        MKDEV(MISC_MAJOR, misc->minor));
+        else
+                device_destroy(misc_class, MKDEV(MISC_MAJOR, misc->minor));
         if (i < DYNAMIC_MINORS && i>0) {
                 misc_minors[i>>3] &= ~(1 << (misc->minor & 7));
         }
@@ -259,7 +264,7 @@ int misc_deregister(struct miscdevice * misc)
 }
 
 EXPORT_SYMBOL(misc_register);
-EXPORT_SYMBOL(misc_deregister);
+EXPORT_SYMBOL(__misc_deregister);
 
 static int __init misc_init(void)
 {
diff --git a/drivers/char/pcmcia/cm4000_cs.c b/drivers/char/pcmcia/cm4000_cs.c
index 02518da6a386..454d7324ba40 100644
--- a/drivers/char/pcmcia/cm4000_cs.c
+++ b/drivers/char/pcmcia/cm4000_cs.c
@@ -308,7 +308,8 @@ static unsigned int calc_baudv(unsigned char fidi)
         return (wcrcf / wbrcf);
 }
 
-static unsigned short io_read_num_rec_bytes(ioaddr_t iobase, unsigned short *s)
+static unsigned short io_read_num_rec_bytes(unsigned int iobase,
+                                            unsigned short *s)
 {
         unsigned short tmp;
 
@@ -426,7 +427,7 @@ static struct card_fixup card_fixups[] = {
 static void set_cardparameter(struct cm4000_dev *dev)
 {
         int i;
-        ioaddr_t iobase = dev->p_dev->io.BasePort1;
+        unsigned int iobase = dev->p_dev->io.BasePort1;
         u_int8_t stopbits = 0x02; /* ISO default */
 
         DEBUGP(3, dev, "-> set_cardparameter\n");
@@ -459,7 +460,7 @@ static int set_protocol(struct cm4000_dev *dev, struct ptsreq *ptsreq)
         unsigned short num_bytes_read;
         unsigned char pts_reply[4];
         ssize_t rc;
-        ioaddr_t iobase = dev->p_dev->io.BasePort1;
+        unsigned int iobase = dev->p_dev->io.BasePort1;
 
         rc = 0;
 
@@ -610,7 +611,7 @@ exit_setprotocol:
         return rc;
 }
 
-static int io_detect_cm4000(ioaddr_t iobase, struct cm4000_dev *dev)
+static int io_detect_cm4000(unsigned int iobase, struct cm4000_dev *dev)
 {
 
         /* note: statemachine is assumed to be reset */
@@ -671,7 +672,7 @@ static void terminate_monitor(struct cm4000_dev *dev)
 static void monitor_card(unsigned long p)
 {
         struct cm4000_dev *dev = (struct cm4000_dev *) p;
-        ioaddr_t iobase = dev->p_dev->io.BasePort1;
+        unsigned int iobase = dev->p_dev->io.BasePort1;
         unsigned short s;
         struct ptsreq ptsreq;
         int i, atrc;
@@ -933,7 +934,7 @@ static ssize_t cmm_read(struct file *filp, __user char *buf, size_t count,
                         loff_t *ppos)
 {
         struct cm4000_dev *dev = filp->private_data;
-        ioaddr_t iobase = dev->p_dev->io.BasePort1;
+        unsigned int iobase = dev->p_dev->io.BasePort1;
         ssize_t rc;
         int i, j, k;
 
@@ -1054,7 +1055,7 @@ static ssize_t cmm_write(struct file *filp, const char __user *buf,
                          size_t count, loff_t *ppos)
 {
         struct cm4000_dev *dev = (struct cm4000_dev *) filp->private_data;
-        ioaddr_t iobase = dev->p_dev->io.BasePort1;
+        unsigned int iobase = dev->p_dev->io.BasePort1;
         unsigned short s;
         unsigned char tmp;
         unsigned char infolen;
@@ -1408,7 +1409,7 @@ static int cmm_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
                      unsigned long arg)
 {
         struct cm4000_dev *dev = filp->private_data;
-        ioaddr_t iobase = dev->p_dev->io.BasePort1;
+        unsigned int iobase = dev->p_dev->io.BasePort1;
         struct pcmcia_device *link;
         int size;
         int rc;
diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
index d2fabe7863a9..2a98d99cbd46 100644
--- a/drivers/cpuidle/cpuidle.c
+++ b/drivers/cpuidle/cpuidle.c
@@ -12,7 +12,7 @@
 #include <linux/mutex.h>
 #include <linux/sched.h>
 #include <linux/notifier.h>
-#include <linux/latency.h>
+#include <linux/pm_qos_params.h>
 #include <linux/cpu.h>
 #include <linux/cpuidle.h>
 
@@ -265,7 +265,10 @@ static struct notifier_block cpuidle_latency_notifier = {
         .notifier_call = cpuidle_latency_notify,
 };
 
-#define latency_notifier_init(x) do { register_latency_notifier(x); } while (0)
+static inline void latency_notifier_init(struct notifier_block *n)
+{
+        pm_qos_add_notifier(PM_QOS_CPU_DMA_LATENCY, n);
+}
 
 #else /* CONFIG_SMP */
 
diff --git a/drivers/cpuidle/governors/ladder.c b/drivers/cpuidle/governors/ladder.c
index eb666ecae7c9..ba7b9a6b17a1 100644
--- a/drivers/cpuidle/governors/ladder.c
+++ b/drivers/cpuidle/governors/ladder.c
@@ -14,7 +14,7 @@
 
 #include <linux/kernel.h>
 #include <linux/cpuidle.h>
-#include <linux/latency.h>
+#include <linux/pm_qos_params.h>
 #include <linux/moduleparam.h>
 #include <linux/jiffies.h>
 
@@ -81,7 +81,8 @@ static int ladder_select_state(struct cpuidle_device *dev)
         /* consider promotion */
         if (last_idx < dev->state_count - 1 &&
             last_residency > last_state->threshold.promotion_time &&
-            dev->states[last_idx + 1].exit_latency <= system_latency_constraint()) {
+            dev->states[last_idx + 1].exit_latency <=
+                        pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
                 last_state->stats.promotion_count++;
                 last_state->stats.demotion_count = 0;
                 if (last_state->stats.promotion_count >= last_state->threshold.promotion_count) {
diff --git a/drivers/cpuidle/governors/menu.c b/drivers/cpuidle/governors/menu.c
index 299d45c3bdd2..78d77c5dc35c 100644
--- a/drivers/cpuidle/governors/menu.c
+++ b/drivers/cpuidle/governors/menu.c
@@ -8,7 +8,7 @@
 
 #include <linux/kernel.h>
 #include <linux/cpuidle.h>
-#include <linux/latency.h>
+#include <linux/pm_qos_params.h>
 #include <linux/time.h>
 #include <linux/ktime.h>
 #include <linux/hrtimer.h>
@@ -48,7 +48,7 @@ static int menu_select(struct cpuidle_device *dev)
                         break;
                 if (s->target_residency > data->predicted_us)
                         break;
-                if (s->exit_latency > system_latency_constraint())
+                if (s->exit_latency > pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY))
                         break;
         }
 
diff --git a/drivers/dio/dio.c b/drivers/dio/dio.c
index 17502d6efae7..07f274f853d9 100644
--- a/drivers/dio/dio.c
+++ b/drivers/dio/dio.c
@@ -88,8 +88,6 @@ static struct dioname names[] =
 #undef DIONAME
 #undef DIOFBNAME
 
-#define NUMNAMES (sizeof(names) / sizeof(struct dioname))
-
 static const char *unknowndioname 
         = "unknown DIO board -- please email <linux-m68k@lists.linux-m68k.org>!";
 
@@ -97,7 +95,7 @@ static const char *dio_getname(int id)
 {
         /* return pointer to a constant string describing the board with given ID */
         unsigned int i;
-        for (i = 0; i < NUMNAMES; i++)
+        for (i = 0; i < ARRAY_SIZE(names); i++)
                 if (names[i].id == id) 
                         return names[i].name;
 
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
new file mode 100644
index 000000000000..74fac0f5c348
--- /dev/null
+++ b/drivers/gpio/Kconfig
@@ -0,0 +1,72 @@
+#
+# GPIO infrastructure and expanders
+#
+
+config HAVE_GPIO_LIB
+        bool
+        help
+          Platforms select gpiolib if they use this infrastructure
+          for all their GPIOs, usually starting with ones integrated
+          into SOC processors.
+
+menu "GPIO Support"
+        depends on HAVE_GPIO_LIB
+
+config DEBUG_GPIO
+        bool "Debug GPIO calls"
+        depends on DEBUG_KERNEL
+        help
+          Say Y here to add some extra checks and diagnostics to GPIO calls.
+          The checks help ensure that GPIOs have been properly initialized
+          before they are used and that sleeping calls aren not made from
+          nonsleeping contexts.  They can make bitbanged serial protocols
+          slower.  The diagnostics help catch the type of setup errors
+          that are most common when setting up new platforms or boards.
+
+# put expanders in the right section, in alphabetical order
+
+comment "I2C GPIO expanders:"
+
+config GPIO_PCA9539
+        tristate "PCA9539 16-bit I/O port"
+        depends on I2C
+        help
+          Say yes here to support the PCA9539 16-bit I/O port. These
+          parts are made by NXP and TI.
+
+          This driver can also be built as a module.  If so, the module
+          will be called pca9539.
+
+config GPIO_PCF857X
+        tristate "PCF857x, PCA857x, and PCA967x I2C GPIO expanders"
+        depends on I2C
+        help
+          Say yes here to provide access to most "quasi-bidirectional" I2C
+          GPIO expanders used for additional digital outputs or inputs.
+          Most of these parts are from NXP, though TI is a second source for
+          some of them.  Compatible models include:
+
+          8 bits:   pcf8574, pcf8574a, pca8574, pca8574a,
+                    pca9670, pca9672, pca9674, pca9674a
+
+          16 bits:  pcf8575, pcf8575c, pca8575,
+                    pca9671, pca9673, pca9675
+
+          Your board setup code will need to declare the expanders in
+          use, and assign numbers to the GPIOs they expose.  Those GPIOs
+          can then be used from drivers and other kernel code, just like
+          other GPIOs, but only accessible from task contexts.
+
+          This driver provides an in-kernel interface to those GPIOs using
+          platform-neutral GPIO calls.
+
+comment "SPI GPIO expanders:"
+
+config GPIO_MCP23S08
+        tristate "Microchip MCP23S08 I/O expander"
+        depends on SPI_MASTER
+        help
+          SPI driver for Microchip MCP23S08 I/O expander.  This provides
+          a GPIO interface supporting inputs and outputs.
+
+endmenu
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
new file mode 100644
index 000000000000..470ecd6aa778
--- /dev/null
+++ b/drivers/gpio/Makefile
@@ -0,0 +1,9 @@
+# gpio support: dedicated expander chips, etc
+
+ccflags-$(CONFIG_DEBUG_GPIO)    += -DDEBUG
+
+obj-$(CONFIG_HAVE_GPIO_LIB)     += gpiolib.o
+
+obj-$(CONFIG_GPIO_MCP23S08)     += mcp23s08.o
+obj-$(CONFIG_GPIO_PCA9539)      += pca9539.o
+obj-$(CONFIG_GPIO_PCF857X)      += pcf857x.o
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
new file mode 100644
index 000000000000..d8db2f8ee411
--- /dev/null
+++ b/drivers/gpio/gpiolib.c
@@ -0,0 +1,567 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/irq.h>
+#include <linux/spinlock.h>
+
+#include <asm/gpio.h>
+
+
+/* Optional implementation infrastructure for GPIO interfaces.
+ *
+ * Platforms may want to use this if they tend to use very many GPIOs
+ * that aren't part of a System-On-Chip core; or across I2C/SPI/etc.
+ *
+ * When kernel footprint or instruction count is an issue, simpler
+ * implementations may be preferred.  The GPIO programming interface
+ * allows for inlining speed-critical get/set operations for common
+ * cases, so that access to SOC-integrated GPIOs can sometimes cost
+ * only an instruction or two per bit.
+ */
+
+
+/* When debugging, extend minimal trust to callers and platform code.
+ * Also emit diagnostic messages that may help initial bringup, when
+ * board setup or driver bugs are most common.
+ *
+ * Otherwise, minimize overhead in what may be bitbanging codepaths.
+ */
+#ifdef  DEBUG
+#define extra_checks    1
+#else
+#define extra_checks    0
+#endif
+
+/* gpio_lock prevents conflicts during gpio_desc[] table updates.
+ * While any GPIO is requested, its gpio_chip is not removable;
+ * each GPIO's "requested" flag serves as a lock and refcount.
+ */
+static DEFINE_SPINLOCK(gpio_lock);
+
+struct gpio_desc {
+        struct gpio_chip        *chip;
+        unsigned long           flags;
+/* flag symbols are bit numbers */
+#define FLAG_REQUESTED  0
+#define FLAG_IS_OUT     1
+
+#ifdef CONFIG_DEBUG_FS
+        const char              *label;
+#endif
+};
+static struct gpio_desc gpio_desc[ARCH_NR_GPIOS];
+
+static inline void desc_set_label(struct gpio_desc *d, const char *label)
+{
+#ifdef CONFIG_DEBUG_FS
+        d->label = label;
+#endif
+}
+
+/* Warn when drivers omit gpio_request() calls -- legal but ill-advised
+ * when setting direction, and otherwise illegal.  Until board setup code
+ * and drivers use explicit requests everywhere (which won't happen when
+ * those calls have no teeth) we can't avoid autorequesting.  This nag
+ * message should motivate switching to explicit requests...
+ */
+static void gpio_ensure_requested(struct gpio_desc *desc)
+{
+        if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
+                pr_warning("GPIO-%d autorequested\n", (int)(desc - gpio_desc));
+                desc_set_label(desc, "[auto]");
+        }
+}
+
+/* caller holds gpio_lock *OR* gpio is marked as requested */
+static inline struct gpio_chip *gpio_to_chip(unsigned gpio)
+{
+        return gpio_desc[gpio].chip;
+}
+
+/**
+ * gpiochip_add() - register a gpio_chip
+ * @chip: the chip to register, with chip->base initialized
+ * Context: potentially before irqs or kmalloc will work
+ *
+ * Returns a negative errno if the chip can't be registered, such as
+ * because the chip->base is invalid or already associated with a
+ * different chip.  Otherwise it returns zero as a success code.
+ */
+int gpiochip_add(struct gpio_chip *chip)
+{
+        unsigned long   flags;
+        int             status = 0;
+        unsigned        id;
+
+        /* NOTE chip->base negative is reserved to mean a request for
+         * dynamic allocation.  We don't currently support that.
+         */
+
+        if (chip->base < 0 || (chip->base  + chip->ngpio) >= ARCH_NR_GPIOS) {
+                status = -EINVAL;
+                goto fail;
+        }
+
+        spin_lock_irqsave(&gpio_lock, flags);
+
+        /* these GPIO numbers must not be managed by another gpio_chip */
+        for (id = chip->base; id < chip->base + chip->ngpio; id++) {
+                if (gpio_desc[id].chip != NULL) {
+                        status = -EBUSY;
+                        break;
+                }
+        }
+        if (status == 0) {
+                for (id = chip->base; id < chip->base + chip->ngpio; id++) {
+                        gpio_desc[id].chip = chip;
+                        gpio_desc[id].flags = 0;
+                }
+        }
+
+        spin_unlock_irqrestore(&gpio_lock, flags);
+fail:
+        /* failures here can mean systems won't boot... */
+        if (status)
+                pr_err("gpiochip_add: gpios %d..%d (%s) not registered\n",
+                        chip->base, chip->base + chip->ngpio,
+                        chip->label ? : "generic");
+        return status;
+}
+EXPORT_SYMBOL_GPL(gpiochip_add);
+
+/**
+ * gpiochip_remove() - unregister a gpio_chip
+ * @chip: the chip to unregister
+ *
+ * A gpio_chip with any GPIOs still requested may not be removed.
+ */
+int gpiochip_remove(struct gpio_chip *chip)
+{
+        unsigned long   flags;
+        int             status = 0;
+        unsigned        id;
+
+        spin_lock_irqsave(&gpio_lock, flags);
+
+        for (id = chip->base; id < chip->base + chip->ngpio; id++) {
+                if (test_bit(FLAG_REQUESTED, &gpio_desc[id].flags)) {
+                        status = -EBUSY;
+                        break;
+                }
+        }
+        if (status == 0) {
+                for (id = chip->base; id < chip->base + chip->ngpio; id++)
+                        gpio_desc[id].chip = NULL;
+        }
+
+        spin_unlock_irqrestore(&gpio_lock, flags);
+        return status;
+}
+EXPORT_SYMBOL_GPL(gpiochip_remove);
+
+
+/* These "optional" allocation calls help prevent drivers from stomping
+ * on each other, and help provide better diagnostics in debugfs.
+ * They're called even less than the "set direction" calls.
+ */
+int gpio_request(unsigned gpio, const char *label)
+{
+        struct gpio_desc        *desc;
+        int                     status = -EINVAL;
+        unsigned long           flags;
+
+        spin_lock_irqsave(&gpio_lock, flags);
+
+        if (gpio >= ARCH_NR_GPIOS)
+                goto done;
+        desc = &gpio_desc[gpio];
+        if (desc->chip == NULL)
+                goto done;
+
+        /* NOTE:  gpio_request() can be called in early boot,
+         * before IRQs are enabled.
+         */
+
+        if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
+                desc_set_label(desc, label ? : "?");
+                status = 0;
+        } else
+                status = -EBUSY;
+
+done:
+        if (status)
+                pr_debug("gpio_request: gpio-%d (%s) status %d\n",
+                        gpio, label ? : "?", status);
+        spin_unlock_irqrestore(&gpio_lock, flags);
+        return status;
+}
+EXPORT_SYMBOL_GPL(gpio_request);
+
+void gpio_free(unsigned gpio)
+{
+        unsigned long           flags;
+        struct gpio_desc        *desc;
+
+        if (gpio >= ARCH_NR_GPIOS) {
+                WARN_ON(extra_checks);
+                return;
+        }
+
+        spin_lock_irqsave(&gpio_lock, flags);
+
+        desc = &gpio_desc[gpio];
+        if (desc->chip && test_and_clear_bit(FLAG_REQUESTED, &desc->flags))
+                desc_set_label(desc, NULL);
+        else
+                WARN_ON(extra_checks);
+
+        spin_unlock_irqrestore(&gpio_lock, flags);
+}
+EXPORT_SYMBOL_GPL(gpio_free);
+
+
+/**
+ * gpiochip_is_requested - return string iff signal was requested
+ * @chip: controller managing the signal
+ * @offset: of signal within controller's 0..(ngpio - 1) range
+ *
+ * Returns NULL if the GPIO is not currently requested, else a string.
+ * If debugfs support is enabled, the string returned is the label passed
+ * to gpio_request(); otherwise it is a meaningless constant.
+ *
+ * This function is for use by GPIO controller drivers.  The label can
+ * help with diagnostics, and knowing that the signal is used as a GPIO
+ * can help avoid accidentally multiplexing it to another controller.
+ */
+const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset)
+{
+        unsigned gpio = chip->base + offset;
+
+        if (gpio >= ARCH_NR_GPIOS || gpio_desc[gpio].chip != chip)
+                return NULL;
+        if (test_bit(FLAG_REQUESTED, &gpio_desc[gpio].flags) == 0)
+                return NULL;
+#ifdef CONFIG_DEBUG_FS
+        return gpio_desc[gpio].label;
+#else
+        return "?";
+#endif
+}
+EXPORT_SYMBOL_GPL(gpiochip_is_requested);
+
+
+/* Drivers MUST set GPIO direction before making get/set calls.  In
+ * some cases this is done in early boot, before IRQs are enabled.
+ *
+ * As a rule these aren't called more than once (except for drivers
+ * using the open-drain emulation idiom) so these are natural places
+ * to accumulate extra debugging checks.  Note that we can't (yet)
+ * rely on gpio_request() having been called beforehand.
+ */
+
+int gpio_direction_input(unsigned gpio)
+{
+        unsigned long           flags;
+        struct gpio_chip        *chip;
+        struct gpio_desc        *desc = &gpio_desc[gpio];
+        int                     status = -EINVAL;
+
+        spin_lock_irqsave(&gpio_lock, flags);
+
+        if (gpio >= ARCH_NR_GPIOS)
+                goto fail;
+        chip = desc->chip;
+        if (!chip || !chip->get || !chip->direction_input)
+                goto fail;
+        gpio -= chip->base;
+        if (gpio >= chip->ngpio)
+                goto fail;
+        gpio_ensure_requested(desc);
+
+        /* now we know the gpio is valid and chip won't vanish */
+
+        spin_unlock_irqrestore(&gpio_lock, flags);
+
+        might_sleep_if(extra_checks && chip->can_sleep);
+
+        status = chip->direction_input(chip, gpio);
+        if (status == 0)
+                clear_bit(FLAG_IS_OUT, &desc->flags);
+        return status;
+fail:
+        spin_unlock_irqrestore(&gpio_lock, flags);
+        if (status)
+                pr_debug("%s: gpio-%d status %d\n",
+                        __FUNCTION__, gpio, status);
+        return status;
+}
+EXPORT_SYMBOL_GPL(gpio_direction_input);
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+        unsigned long           flags;
+        struct gpio_chip        *chip;
+        struct gpio_desc        *desc = &gpio_desc[gpio];
+        int                     status = -EINVAL;
+
+        spin_lock_irqsave(&gpio_lock, flags);
+
+        if (gpio >= ARCH_NR_GPIOS)
+                goto fail;
+        chip = desc->chip;
+        if (!chip || !chip->set || !chip->direction_output)
+                goto fail;
+        gpio -= chip->base;
+        if (gpio >= chip->ngpio)
+                goto fail;
+        gpio_ensure_requested(desc);
+
+        /* now we know the gpio is valid and chip won't vanish */
+
+        spin_unlock_irqrestore(&gpio_lock, flags);
+
+        might_sleep_if(extra_checks && chip->can_sleep);
+
+        status = chip->direction_output(chip, gpio, value);
+        if (status == 0)
+                set_bit(FLAG_IS_OUT, &desc->flags);
+        return status;
+fail:
+        spin_unlock_irqrestore(&gpio_lock, flags);
+        if (status)
+                pr_debug("%s: gpio-%d status %d\n",
+                        __FUNCTION__, gpio, status);
+        return status;
+}
+EXPORT_SYMBOL_GPL(gpio_direction_output);
+
+
+/* I/O calls are only valid after configuration completed; the relevant
+ * "is this a valid GPIO" error checks should already have been done.
+ *
+ * "Get" operations are often inlinable as reading a pin value register,
+ * and masking the relevant bit in that register.
+ *
+ * When "set" operations are inlinable, they involve writing that mask to
+ * one register to set a low value, or a different register to set it high.
+ * Otherwise locking is needed, so there may be little value to inlining.
+ *
+ *------------------------------------------------------------------------
+ *
+ * IMPORTANT!!!  The hot paths -- get/set value -- assume that callers
+ * have requested the GPIO.  That can include implicit requesting by
+ * a direction setting call.  Marking a gpio as requested locks its chip
+ * in memory, guaranteeing that these table lookups need no more locking
+ * and that gpiochip_remove() will fail.
+ *
+ * REVISIT when debugging, consider adding some instrumentation to ensure
+ * that the GPIO was actually requested.
+ */
+
+/**
+ * __gpio_get_value() - return a gpio's value
+ * @gpio: gpio whose value will be returned
+ * Context: any
+ *
+ * This is used directly or indirectly to implement gpio_get_value().
+ * It returns the zero or nonzero value provided by the associated
+ * gpio_chip.get() method; or zero if no such method is provided.
+ */
+int __gpio_get_value(unsigned gpio)
+{
+        struct gpio_chip        *chip;
+
+        chip = gpio_to_chip(gpio);
+        WARN_ON(extra_checks && chip->can_sleep);
+        return chip->get ? chip->get(chip, gpio - chip->base) : 0;
+}
+EXPORT_SYMBOL_GPL(__gpio_get_value);
+
+/**
+ * __gpio_set_value() - assign a gpio's value
+ * @gpio: gpio whose value will be assigned
+ * @value: value to assign
+ * Context: any
+ *
+ * This is used directly or indirectly to implement gpio_set_value().
+ * It invokes the associated gpio_chip.set() method.
+ */
+void __gpio_set_value(unsigned gpio, int value)
+{
+        struct gpio_chip        *chip;
+
+        chip = gpio_to_chip(gpio);
+        WARN_ON(extra_checks && chip->can_sleep);
+        chip->set(chip, gpio - chip->base, value);
+}
+EXPORT_SYMBOL_GPL(__gpio_set_value);
+
+/**
+ * __gpio_cansleep() - report whether gpio value access will sleep
+ * @gpio: gpio in question
+ * Context: any
+ *
+ * This is used directly or indirectly to implement gpio_cansleep().  It
+ * returns nonzero if access reading or writing the GPIO value can sleep.
+ */
+int __gpio_cansleep(unsigned gpio)
+{
+        struct gpio_chip        *chip;
+
+        /* only call this on GPIOs that are valid! */
+        chip = gpio_to_chip(gpio);
+
+        return chip->can_sleep;
+}
+EXPORT_SYMBOL_GPL(__gpio_cansleep);
+
+
+
+/* There's no value in making it easy to inline GPIO calls that may sleep.
+ * Common examples include ones connected to I2C or SPI chips.
+ */
+
+int gpio_get_value_cansleep(unsigned gpio)
+{
+        struct gpio_chip        *chip;
+
+        might_sleep_if(extra_checks);
+        chip = gpio_to_chip(gpio);
+        return chip->get(chip, gpio - chip->base);
+}
+EXPORT_SYMBOL_GPL(gpio_get_value_cansleep);
+
+void gpio_set_value_cansleep(unsigned gpio, int value)
+{
+        struct gpio_chip        *chip;
+
+        might_sleep_if(extra_checks);
+        chip = gpio_to_chip(gpio);
+        chip->set(chip, gpio - chip->base, value);
+}
+EXPORT_SYMBOL_GPL(gpio_set_value_cansleep);
+
+
+#ifdef CONFIG_DEBUG_FS
+
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+
+
+static void gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip)
+{
+        unsigned                i;
+        unsigned                gpio = chip->base;
+        struct gpio_desc        *gdesc = &gpio_desc[gpio];
+        int                     is_out;
+
+        for (i = 0; i < chip->ngpio; i++, gpio++, gdesc++) {
+                if (!test_bit(FLAG_REQUESTED, &gdesc->flags))
+                        continue;
+
+                is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
+                seq_printf(s, " gpio-%-3d (%-12s) %s %s",
+                        gpio, gdesc->label,
+                        is_out ? "out" : "in ",
+                        chip->get
+                                ? (chip->get(chip, i) ? "hi" : "lo")
+                                : "?  ");
+
+                if (!is_out) {
+                        int             irq = gpio_to_irq(gpio);
+                        struct irq_desc *desc = irq_desc + irq;
+
+                        /* This races with request_irq(), set_irq_type(),
+                         * and set_irq_wake() ... but those are "rare".
+                         *
+                         * More significantly, trigger type flags aren't
+                         * currently maintained by genirq.
+                         */
+                        if (irq >= 0 && desc->action) {
+                                char *trigger;
+
+                                switch (desc->status & IRQ_TYPE_SENSE_MASK) {
+                                case IRQ_TYPE_NONE:
+                                        trigger = "(default)";
+                                        break;
+                                case IRQ_TYPE_EDGE_FALLING:
+                                        trigger = "edge-falling";
+                                        break;
+                                case IRQ_TYPE_EDGE_RISING:
+                                        trigger = "edge-rising";
+                                        break;
+                                case IRQ_TYPE_EDGE_BOTH:
+                                        trigger = "edge-both";
+                                        break;
+                                case IRQ_TYPE_LEVEL_HIGH:
+                                        trigger = "level-high";
+                                        break;
+                                case IRQ_TYPE_LEVEL_LOW:
+                                        trigger = "level-low";
+                                        break;
+                                default:
+                                        trigger = "?trigger?";
+                                        break;
+                                }
+
+                                seq_printf(s, " irq-%d %s%s",
+                                        irq, trigger,
+                                        (desc->status & IRQ_WAKEUP)
+                                                ? " wakeup" : "");
+                        }
+                }
+
+                seq_printf(s, "\n");
+        }
+}
+
+static int gpiolib_show(struct seq_file *s, void *unused)
+{
+        struct gpio_chip        *chip = NULL;
+        unsigned                gpio;
+        int                     started = 0;
+
+        /* REVISIT this isn't locked against gpio_chip removal ... */
+
+        for (gpio = 0; gpio < ARCH_NR_GPIOS; gpio++) {
+                if (chip == gpio_desc[gpio].chip)
+                        continue;
+                chip = gpio_desc[gpio].chip;
+                if (!chip)
+                        continue;
+
+                seq_printf(s, "%sGPIOs %d-%d, %s%s:\n",
+                                started ? "\n" : "",
+                                chip->base, chip->base + chip->ngpio - 1,
+                                chip->label ? : "generic",
+                                chip->can_sleep ? ", can sleep" : "");
+                started = 1;
+                if (chip->dbg_show)
+                        chip->dbg_show(s, chip);
+                else
+                        gpiolib_dbg_show(s, chip);
+        }
+        return 0;
+}
+
+static int gpiolib_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, gpiolib_show, NULL);
+}
+
+static struct file_operations gpiolib_operations = {
+        .open           = gpiolib_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static int __init gpiolib_debugfs_init(void)
+{
+        /* /sys/kernel/debug/gpio */
+        (void) debugfs_create_file("gpio", S_IFREG | S_IRUGO,
+                                NULL, NULL, &gpiolib_operations);
+        return 0;
+}
+subsys_initcall(gpiolib_debugfs_init);
+
+#endif  /* DEBUG_FS */
diff --git a/drivers/gpio/mcp23s08.c b/drivers/gpio/mcp23s08.c
new file mode 100644
index 000000000000..bb60e8c1a1f0
--- /dev/null
+++ b/drivers/gpio/mcp23s08.c
@@ -0,0 +1,357 @@
+/*
+ * mcp23s08.c - SPI gpio expander driver
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/workqueue.h>
+#include <linux/mutex.h>
+
+#include <linux/spi/spi.h>
+#include <linux/spi/mcp23s08.h>
+
+#include <asm/gpio.h>
+
+
+/* Registers are all 8 bits wide.
+ *
+ * The mcp23s17 has twice as many bits, and can be configured to work
+ * with either 16 bit registers or with two adjacent 8 bit banks.
+ *
+ * Also, there are I2C versions of both chips.
+ */
+#define MCP_IODIR       0x00            /* init/reset:  all ones */
+#define MCP_IPOL        0x01
+#define MCP_GPINTEN     0x02
+#define MCP_DEFVAL      0x03
+#define MCP_INTCON      0x04
+#define MCP_IOCON       0x05
+#       define IOCON_SEQOP      (1 << 5)
+#       define IOCON_HAEN       (1 << 3)
+#       define IOCON_ODR        (1 << 2)
+#       define IOCON_INTPOL     (1 << 1)
+#define MCP_GPPU        0x06
+#define MCP_INTF        0x07
+#define MCP_INTCAP      0x08
+#define MCP_GPIO        0x09
+#define MCP_OLAT        0x0a
+
+struct mcp23s08 {
+        struct spi_device       *spi;
+        u8                      addr;
+
+        /* lock protects the cached values */
+        struct mutex            lock;
+        u8                      cache[11];
+
+        struct gpio_chip        chip;
+
+        struct work_struct      work;
+};
+
+static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
+{
+        u8      tx[2], rx[1];
+        int     status;
+
+        tx[0] = mcp->addr | 0x01;
+        tx[1] = reg;
+        status = spi_write_then_read(mcp->spi, tx, sizeof tx, rx, sizeof rx);
+        return (status < 0) ? status : rx[0];
+}
+
+static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, u8 val)
+{
+        u8      tx[3];
+
+        tx[0] = mcp->addr;
+        tx[1] = reg;
+        tx[2] = val;
+        return spi_write_then_read(mcp->spi, tx, sizeof tx, NULL, 0);
+}
+
+static int
+mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u8 *vals, unsigned n)
+{
+        u8      tx[2];
+
+        if ((n + reg) > sizeof mcp->cache)
+                return -EINVAL;
+        tx[0] = mcp->addr | 0x01;
+        tx[1] = reg;
+        return spi_write_then_read(mcp->spi, tx, sizeof tx, vals, n);
+}
+
+/*----------------------------------------------------------------------*/
+
+static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
+{
+        struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
+        int status;
+
+        mutex_lock(&mcp->lock);
+        mcp->cache[MCP_IODIR] |= (1 << offset);
+        status = mcp23s08_write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
+        mutex_unlock(&mcp->lock);
+        return status;
+}
+
+static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
+{
+        struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
+        int status;
+
+        mutex_lock(&mcp->lock);
+
+        /* REVISIT reading this clears any IRQ ... */
+        status = mcp23s08_read(mcp, MCP_GPIO);
+        if (status < 0)
+                status = 0;
+        else {
+                mcp->cache[MCP_GPIO] = status;
+                status = !!(status & (1 << offset));
+        }
+        mutex_unlock(&mcp->lock);
+        return status;
+}
+
+static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
+{
+        u8 olat = mcp->cache[MCP_OLAT];
+
+        if (value)
+                olat |= mask;
+        else
+                olat &= ~mask;
+        mcp->cache[MCP_OLAT] = olat;
+        return mcp23s08_write(mcp, MCP_OLAT, olat);
+}
+
+static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
+        u8 mask = 1 << offset;
+
+        mutex_lock(&mcp->lock);
+        __mcp23s08_set(mcp, mask, value);
+        mutex_unlock(&mcp->lock);
+}
+
+static int
+mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
+        u8 mask = 1 << offset;
+        int status;
+
+        mutex_lock(&mcp->lock);
+        status = __mcp23s08_set(mcp, mask, value);
+        if (status == 0) {
+                mcp->cache[MCP_IODIR] &= ~mask;
+                status = mcp23s08_write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
+        }
+        mutex_unlock(&mcp->lock);
+        return status;
+}
+
+/*----------------------------------------------------------------------*/
+
+#ifdef CONFIG_DEBUG_FS
+
+#include <linux/seq_file.h>
+
+/*
+ * This shows more info than the generic gpio dump code:
+ * pullups, deglitching, open drain drive.
+ */
+static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
+{
+        struct mcp23s08 *mcp;
+        char            bank;
+        unsigned        t;
+        unsigned        mask;
+
+        mcp = container_of(chip, struct mcp23s08, chip);
+
+        /* NOTE: we only handle one bank for now ... */
+        bank = '0' + ((mcp->addr >> 1) & 0x3);
+
+        mutex_lock(&mcp->lock);
+        t = mcp23s08_read_regs(mcp, 0, mcp->cache, sizeof mcp->cache);
+        if (t < 0) {
+                seq_printf(s, " I/O ERROR %d\n", t);
+                goto done;
+        }
+
+        for (t = 0, mask = 1; t < 8; t++, mask <<= 1) {
+                const char      *label;
+
+                label = gpiochip_is_requested(chip, t);
+                if (!label)
+                        continue;
+
+                seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
+                        chip->base + t, bank, t, label,
+                        (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
+                        (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
+                        (mcp->cache[MCP_GPPU] & mask) ? "  " : "up");
+                /* NOTE:  ignoring the irq-related registers */
+                seq_printf(s, "\n");
+        }
+done:
+        mutex_unlock(&mcp->lock);
+}
+
+#else
+#define mcp23s08_dbg_show       NULL
+#endif
+
+/*----------------------------------------------------------------------*/
+
+static int mcp23s08_probe(struct spi_device *spi)
+{
+        struct mcp23s08                 *mcp;
+        struct mcp23s08_platform_data   *pdata;
+        int                             status;
+        int                             do_update = 0;
+
+        pdata = spi->dev.platform_data;
+        if (!pdata || pdata->slave > 3 || !pdata->base)
+                return -ENODEV;
+
+        mcp = kzalloc(sizeof *mcp, GFP_KERNEL);
+        if (!mcp)
+                return -ENOMEM;
+
+        mutex_init(&mcp->lock);
+
+        mcp->spi = spi;
+        mcp->addr = 0x40 | (pdata->slave << 1);
+
+        mcp->chip.label = "mcp23s08",
+
+        mcp->chip.direction_input = mcp23s08_direction_input;
+        mcp->chip.get = mcp23s08_get;
+        mcp->chip.direction_output = mcp23s08_direction_output;
+        mcp->chip.set = mcp23s08_set;
+        mcp->chip.dbg_show = mcp23s08_dbg_show;
+
+        mcp->chip.base = pdata->base;
+        mcp->chip.ngpio = 8;
+        mcp->chip.can_sleep = 1;
+
+        spi_set_drvdata(spi, mcp);
+
+        /* verify MCP_IOCON.SEQOP = 0, so sequential reads work */
+        status = mcp23s08_read(mcp, MCP_IOCON);
+        if (status < 0)
+                goto fail;
+        if (status & IOCON_SEQOP) {
+                status &= ~IOCON_SEQOP;
+                status = mcp23s08_write(mcp, MCP_IOCON, (u8) status);
+                if (status < 0)
+                        goto fail;
+        }
+
+        /* configure ~100K pullups */
+        status = mcp23s08_write(mcp, MCP_GPPU, pdata->pullups);
+        if (status < 0)
+                goto fail;
+
+        status = mcp23s08_read_regs(mcp, 0, mcp->cache, sizeof mcp->cache);
+        if (status < 0)
+                goto fail;
+
+        /* disable inverter on input */
+        if (mcp->cache[MCP_IPOL] != 0) {
+                mcp->cache[MCP_IPOL] = 0;
+                do_update = 1;
+        }
+
+        /* disable irqs */
+        if (mcp->cache[MCP_GPINTEN] != 0) {
+                mcp->cache[MCP_GPINTEN] = 0;
+                do_update = 1;
+        }
+
+        if (do_update) {
+                u8 tx[4];
+
+                tx[0] = mcp->addr;
+                tx[1] = MCP_IPOL;
+                memcpy(&tx[2], &mcp->cache[MCP_IPOL], sizeof(tx) - 2);
+                status = spi_write_then_read(mcp->spi, tx, sizeof tx, NULL, 0);
+
+                /* FIXME check status... */
+        }
+
+        status = gpiochip_add(&mcp->chip);
+
+        /* NOTE:  these chips have a relatively sane IRQ framework, with
+         * per-signal masking and level/edge triggering.  It's not yet
+         * handled here...
+         */
+
+        if (pdata->setup) {
+                status = pdata->setup(spi, mcp->chip.base,
+                                mcp->chip.ngpio, pdata->context);
+                if (status < 0)
+                        dev_dbg(&spi->dev, "setup --> %d\n", status);
+        }
+
+        return 0;
+
+fail:
+        kfree(mcp);
+        return status;
+}
+
+static int mcp23s08_remove(struct spi_device *spi)
+{
+        struct mcp23s08                 *mcp = spi_get_drvdata(spi);
+        struct mcp23s08_platform_data   *pdata = spi->dev.platform_data;
+        int                             status = 0;
+
+        if (pdata->teardown) {
+                status = pdata->teardown(spi,
+                                mcp->chip.base, mcp->chip.ngpio,
+                                pdata->context);
+                if (status < 0) {
+                        dev_err(&spi->dev, "%s --> %d\n", "teardown", status);
+                        return status;
+                }
+        }
+
+        status = gpiochip_remove(&mcp->chip);
+        if (status == 0)
+                kfree(mcp);
+        else
+                dev_err(&spi->dev, "%s --> %d\n", "remove", status);
+        return status;
+}
+
+static struct spi_driver mcp23s08_driver = {
+        .probe          = mcp23s08_probe,
+        .remove         = mcp23s08_remove,
+        .driver = {
+                .name   = "mcp23s08",
+                .owner  = THIS_MODULE,
+        },
+};
+
+/*----------------------------------------------------------------------*/
+
+static int __init mcp23s08_init(void)
+{
+        return spi_register_driver(&mcp23s08_driver);
+}
+module_init(mcp23s08_init);
+
+static void __exit mcp23s08_exit(void)
+{
+        spi_unregister_driver(&mcp23s08_driver);
+}
+module_exit(mcp23s08_exit);
+
+MODULE_LICENSE("GPL");
+
diff --git a/drivers/gpio/pca9539.c b/drivers/gpio/pca9539.c
new file mode 100644
index 000000000000..3e85c92a7d59
--- /dev/null
+++ b/drivers/gpio/pca9539.c
@@ -0,0 +1,271 @@
+/*
+ *  pca9539.c - 16-bit I/O port with interrupt and reset
+ *
+ *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
+ *  Copyright (C) 2007 Marvell International Ltd.
+ *
+ *  Derived from drivers/i2c/chips/pca9539.c
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; version 2 of the License.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/i2c/pca9539.h>
+
+#include <asm/gpio.h>
+
+
+#define NR_PCA9539_GPIOS        16
+
+#define PCA9539_INPUT           0
+#define PCA9539_OUTPUT          2
+#define PCA9539_INVERT          4
+#define PCA9539_DIRECTION       6
+
+struct pca9539_chip {
+        unsigned gpio_start;
+        uint16_t reg_output;
+        uint16_t reg_direction;
+
+        struct i2c_client *client;
+        struct gpio_chip gpio_chip;
+};
+
+/* NOTE:  we can't currently rely on fault codes to come from SMBus
+ * calls, so we map all errors to EIO here and return zero otherwise.
+ */
+static int pca9539_write_reg(struct pca9539_chip *chip, int reg, uint16_t val)
+{
+        if (i2c_smbus_write_word_data(chip->client, reg, val) < 0)
+                return -EIO;
+        else
+                return 0;
+}
+
+static int pca9539_read_reg(struct pca9539_chip *chip, int reg, uint16_t *val)
+{
+        int ret;
+
+        ret = i2c_smbus_read_word_data(chip->client, reg);
+        if (ret < 0) {
+                dev_err(&chip->client->dev, "failed reading register\n");
+                return -EIO;
+        }
+
+        *val = (uint16_t)ret;
+        return 0;
+}
+
+static int pca9539_gpio_direction_input(struct gpio_chip *gc, unsigned off)
+{
+        struct pca9539_chip *chip;
+        uint16_t reg_val;
+        int ret;
+
+        chip = container_of(gc, struct pca9539_chip, gpio_chip);
+
+        reg_val = chip->reg_direction | (1u << off);
+        ret = pca9539_write_reg(chip, PCA9539_DIRECTION, reg_val);
+        if (ret)
+                return ret;
+
+        chip->reg_direction = reg_val;
+        return 0;
+}
+
+static int pca9539_gpio_direction_output(struct gpio_chip *gc,
+                unsigned off, int val)
+{
+        struct pca9539_chip *chip;
+        uint16_t reg_val;
+        int ret;
+
+        chip = container_of(gc, struct pca9539_chip, gpio_chip);
+
+        /* set output level */
+        if (val)
+                reg_val = chip->reg_output | (1u << off);
+        else
+                reg_val = chip->reg_output & ~(1u << off);
+
+        ret = pca9539_write_reg(chip, PCA9539_OUTPUT, reg_val);
+        if (ret)
+                return ret;
+
+        chip->reg_output = reg_val;
+
+        /* then direction */
+        reg_val = chip->reg_direction & ~(1u << off);
+        ret = pca9539_write_reg(chip, PCA9539_DIRECTION, reg_val);
+        if (ret)
+                return ret;
+
+        chip->reg_direction = reg_val;
+        return 0;
+}
+
+static int pca9539_gpio_get_value(struct gpio_chip *gc, unsigned off)
+{
+        struct pca9539_chip *chip;
+        uint16_t reg_val;
+        int ret;
+
+        chip = container_of(gc, struct pca9539_chip, gpio_chip);
+
+        ret = pca9539_read_reg(chip, PCA9539_INPUT, &reg_val);
+        if (ret < 0) {
+                /* NOTE:  diagnostic already emitted; that's all we should
+                 * do unless gpio_*_value_cansleep() calls become different
+                 * from their nonsleeping siblings (and report faults).
+                 */
+                return 0;
+        }
+
+        return (reg_val & (1u << off)) ? 1 : 0;
+}
+
+static void pca9539_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
+{
+        struct pca9539_chip *chip;
+        uint16_t reg_val;
+        int ret;
+
+        chip = container_of(gc, struct pca9539_chip, gpio_chip);
+
+        if (val)
+                reg_val = chip->reg_output | (1u << off);
+        else
+                reg_val = chip->reg_output & ~(1u << off);
+
+        ret = pca9539_write_reg(chip, PCA9539_OUTPUT, reg_val);
+        if (ret)
+                return;
+
+        chip->reg_output = reg_val;
+}
+
+static int pca9539_init_gpio(struct pca9539_chip *chip)
+{
+        struct gpio_chip *gc;
+
+        gc = &chip->gpio_chip;
+
+        gc->direction_input  = pca9539_gpio_direction_input;
+        gc->direction_output = pca9539_gpio_direction_output;
+        gc->get = pca9539_gpio_get_value;
+        gc->set = pca9539_gpio_set_value;
+
+        gc->base = chip->gpio_start;
+        gc->ngpio = NR_PCA9539_GPIOS;
+        gc->label = "pca9539";
+
+        return gpiochip_add(gc);
+}
+
+static int __devinit pca9539_probe(struct i2c_client *client)
+{
+        struct pca9539_platform_data *pdata;
+        struct pca9539_chip *chip;
+        int ret;
+
+        pdata = client->dev.platform_data;
+        if (pdata == NULL)
+                return -ENODEV;
+
+        chip = kzalloc(sizeof(struct pca9539_chip), GFP_KERNEL);
+        if (chip == NULL)
+                return -ENOMEM;
+
+        chip->client = client;
+
+        chip->gpio_start = pdata->gpio_base;
+
+        /* initialize cached registers from their original values.
+         * we can't share this chip with another i2c master.
+         */
+        ret = pca9539_read_reg(chip, PCA9539_OUTPUT, &chip->reg_output);
+        if (ret)
+                goto out_failed;
+
+        ret = pca9539_read_reg(chip, PCA9539_DIRECTION, &chip->reg_direction);
+        if (ret)
+                goto out_failed;
+
+        /* set platform specific polarity inversion */
+        ret = pca9539_write_reg(chip, PCA9539_INVERT, pdata->invert);
+        if (ret)
+                goto out_failed;
+
+        ret = pca9539_init_gpio(chip);
+        if (ret)
+                goto out_failed;
+
+        if (pdata->setup) {
+                ret = pdata->setup(client, chip->gpio_chip.base,
+                                chip->gpio_chip.ngpio, pdata->context);
+                if (ret < 0)
+                        dev_warn(&client->dev, "setup failed, %d\n", ret);
+        }
+
+        i2c_set_clientdata(client, chip);
+        return 0;
+
+out_failed:
+        kfree(chip);
+        return ret;
+}
+
+static int pca9539_remove(struct i2c_client *client)
+{
+        struct pca9539_platform_data *pdata = client->dev.platform_data;
+        struct pca9539_chip *chip = i2c_get_clientdata(client);
+        int ret = 0;
+
+        if (pdata->teardown) {
+                ret = pdata->teardown(client, chip->gpio_chip.base,
+                                chip->gpio_chip.ngpio, pdata->context);
+                if (ret < 0) {
+                        dev_err(&client->dev, "%s failed, %d\n",
+                                        "teardown", ret);
+                        return ret;
+                }
+        }
+
+        ret = gpiochip_remove(&chip->gpio_chip);
+        if (ret) {
+                dev_err(&client->dev, "%s failed, %d\n",
+                                "gpiochip_remove()", ret);
+                return ret;
+        }
+
+        kfree(chip);
+        return 0;
+}
+
+static struct i2c_driver pca9539_driver = {
+        .driver = {
+                .name   = "pca9539",
+        },
+        .probe          = pca9539_probe,
+        .remove         = pca9539_remove,
+};
+
+static int __init pca9539_init(void)
+{
+        return i2c_add_driver(&pca9539_driver);
+}
+module_init(pca9539_init);
+
+static void __exit pca9539_exit(void)
+{
+        i2c_del_driver(&pca9539_driver);
+}
+module_exit(pca9539_exit);
+
+MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
+MODULE_DESCRIPTION("GPIO expander driver for PCA9539");
+MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/pcf857x.c b/drivers/gpio/pcf857x.c
new file mode 100644
index 000000000000..c6b3b5378384
--- /dev/null
+++ b/drivers/gpio/pcf857x.c
@@ -0,0 +1,330 @@
+/*
+ * pcf857x - driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
+ *
+ * Copyright (C) 2007 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/i2c/pcf857x.h>
+
+#include <asm/gpio.h>
+
+
+/*
+ * The pcf857x, pca857x, and pca967x chips only expose one read and one
+ * write register.  Writing a "one" bit (to match the reset state) lets
+ * that pin be used as an input; it's not an open-drain model, but acts
+ * a bit like one.  This is described as "quasi-bidirectional"; read the
+ * chip documentation for details.
+ *
+ * Many other I2C GPIO expander chips (like the pca953x models) have
+ * more complex register models and more conventional circuitry using
+ * push/pull drivers.  They often use the same 0x20..0x27 addresses as
+ * pcf857x parts, making the "legacy" I2C driver model problematic.
+ */
+struct pcf857x {
+        struct gpio_chip        chip;
+        struct i2c_client       *client;
+        unsigned                out;            /* software latch */
+};
+
+/*-------------------------------------------------------------------------*/
+
+/* Talk to 8-bit I/O expander */
+
+static int pcf857x_input8(struct gpio_chip *chip, unsigned offset)
+{
+        struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
+
+        gpio->out |= (1 << offset);
+        return i2c_smbus_write_byte(gpio->client, gpio->out);
+}
+
+static int pcf857x_get8(struct gpio_chip *chip, unsigned offset)
+{
+        struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
+        s32             value;
+
+        value = i2c_smbus_read_byte(gpio->client);
+        return (value < 0) ? 0 : (value & (1 << offset));
+}
+
+static int pcf857x_output8(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
+        unsigned        bit = 1 << offset;
+
+        if (value)
+                gpio->out |= bit;
+        else
+                gpio->out &= ~bit;
+        return i2c_smbus_write_byte(gpio->client, gpio->out);
+}
+
+static void pcf857x_set8(struct gpio_chip *chip, unsigned offset, int value)
+{
+        pcf857x_output8(chip, offset, value);
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* Talk to 16-bit I/O expander */
+
+static int i2c_write_le16(struct i2c_client *client, u16 word)
+{
+        u8 buf[2] = { word & 0xff, word >> 8, };
+        int status;
+
+        status = i2c_master_send(client, buf, 2);
+        return (status < 0) ? status : 0;
+}
+
+static int i2c_read_le16(struct i2c_client *client)
+{
+        u8 buf[2];
+        int status;
+
+        status = i2c_master_recv(client, buf, 2);
+        if (status < 0)
+                return status;
+        return (buf[1] << 8) | buf[0];
+}
+
+static int pcf857x_input16(struct gpio_chip *chip, unsigned offset)
+{
+        struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
+
+        gpio->out |= (1 << offset);
+        return i2c_write_le16(gpio->client, gpio->out);
+}
+
+static int pcf857x_get16(struct gpio_chip *chip, unsigned offset)
+{
+        struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
+        int             value;
+
+        value = i2c_read_le16(gpio->client);
+        return (value < 0) ? 0 : (value & (1 << offset));
+}
+
+static int pcf857x_output16(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
+        unsigned        bit = 1 << offset;
+
+        if (value)
+                gpio->out |= bit;
+        else
+                gpio->out &= ~bit;
+        return i2c_write_le16(gpio->client, gpio->out);
+}
+
+static void pcf857x_set16(struct gpio_chip *chip, unsigned offset, int value)
+{
+        pcf857x_output16(chip, offset, value);
+}
+
+/*-------------------------------------------------------------------------*/
+
+static int pcf857x_probe(struct i2c_client *client)
+{
+        struct pcf857x_platform_data    *pdata;
+        struct pcf857x                  *gpio;
+        int                             status;
+
+        pdata = client->dev.platform_data;
+        if (!pdata)
+                return -ENODEV;
+
+        /* Allocate, initialize, and register this gpio_chip. */
+        gpio = kzalloc(sizeof *gpio, GFP_KERNEL);
+        if (!gpio)
+                return -ENOMEM;
+
+        gpio->chip.base = pdata->gpio_base;
+        gpio->chip.can_sleep = 1;
+
+        /* NOTE:  the OnSemi jlc1562b is also largely compatible with
+         * these parts, notably for output.  It has a low-resolution
+         * DAC instead of pin change IRQs; and its inputs can be the
+         * result of comparators.
+         */
+
+        /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
+         * 9670, 9672, 9764, and 9764a use quite a variety.
+         *
+         * NOTE: we don't distinguish here between *4 and *4a parts.
+         */
+        if (strcmp(client->name, "pcf8574") == 0
+                        || strcmp(client->name, "pca8574") == 0
+                        || strcmp(client->name, "pca9670") == 0
+                        || strcmp(client->name, "pca9672") == 0
+                        || strcmp(client->name, "pca9674") == 0
+                        ) {
+                gpio->chip.ngpio = 8;
+                gpio->chip.direction_input = pcf857x_input8;
+                gpio->chip.get = pcf857x_get8;
+                gpio->chip.direction_output = pcf857x_output8;
+                gpio->chip.set = pcf857x_set8;
+
+                if (!i2c_check_functionality(client->adapter,
+                                I2C_FUNC_SMBUS_BYTE))
+                        status = -EIO;
+
+                /* fail if there's no chip present */
+                else
+                        status = i2c_smbus_read_byte(client);
+
+        /* '75/'75c addresses are 0x20..0x27, just like the '74;
+         * the '75c doesn't have a current source pulling high.
+         * 9671, 9673, and 9765 use quite a variety of addresses.
+         *
+         * NOTE: we don't distinguish here between '75 and '75c parts.
+         */
+        } else if (strcmp(client->name, "pcf8575") == 0
+                        || strcmp(client->name, "pca8575") == 0
+                        || strcmp(client->name, "pca9671") == 0
+                        || strcmp(client->name, "pca9673") == 0
+                        || strcmp(client->name, "pca9675") == 0
+                        ) {
+                gpio->chip.ngpio = 16;
+                gpio->chip.direction_input = pcf857x_input16;
+                gpio->chip.get = pcf857x_get16;
+                gpio->chip.direction_output = pcf857x_output16;
+                gpio->chip.set = pcf857x_set16;
+
+                if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
+                        status = -EIO;
+
+                /* fail if there's no chip present */
+                else
+                        status = i2c_read_le16(client);
+
+        } else
+                status = -ENODEV;
+
+        if (status < 0)
+                goto fail;
+
+        gpio->chip.label = client->name;
+
+        gpio->client = client;
+        i2c_set_clientdata(client, gpio);
+
+        /* NOTE:  these chips have strange "quasi-bidirectional" I/O pins.
+         * We can't actually know whether a pin is configured (a) as output
+         * and driving the signal low, or (b) as input and reporting a low
+         * value ... without knowing the last value written since the chip
+         * came out of reset (if any).  We can't read the latched output.
+         *
+         * In short, the only reliable solution for setting up pin direction
+         * is to do it explicitly.  The setup() method can do that, but it
+         * may cause transient glitching since it can't know the last value
+         * written (some pins may need to be driven low).
+         *
+         * Using pdata->n_latch avoids that trouble.  When left initialized
+         * to zero, our software copy of the "latch" then matches the chip's
+         * all-ones reset state.  Otherwise it flags pins to be driven low.
+         */
+        gpio->out = ~pdata->n_latch;
+
+        status = gpiochip_add(&gpio->chip);
+        if (status < 0)
+                goto fail;
+
+        /* NOTE: these chips can issue "some pin-changed" IRQs, which we
+         * don't yet even try to use.  Among other issues, the relevant
+         * genirq state isn't available to modular drivers; and most irq
+         * methods can't be called from sleeping contexts.
+         */
+
+        dev_info(&client->dev, "gpios %d..%d on a %s%s\n",
+                        gpio->chip.base,
+                        gpio->chip.base + gpio->chip.ngpio - 1,
+                        client->name,
+                        client->irq ? " (irq ignored)" : "");
+
+        /* Let platform code set up the GPIOs and their users.
+         * Now is the first time anyone could use them.
+         */
+        if (pdata->setup) {
+                status = pdata->setup(client,
+                                gpio->chip.base, gpio->chip.ngpio,
+                                pdata->context);
+                if (status < 0)
+                        dev_warn(&client->dev, "setup --> %d\n", status);
+        }
+
+        return 0;
+
+fail:
+        dev_dbg(&client->dev, "probe error %d for '%s'\n",
+                        status, client->name);
+        kfree(gpio);
+        return status;
+}
+
+static int pcf857x_remove(struct i2c_client *client)
+{
+        struct pcf857x_platform_data    *pdata = client->dev.platform_data;
+        struct pcf857x                  *gpio = i2c_get_clientdata(client);
+        int                             status = 0;
+
+        if (pdata->teardown) {
+                status = pdata->teardown(client,
+                                gpio->chip.base, gpio->chip.ngpio,
+                                pdata->context);
+                if (status < 0) {
+                        dev_err(&client->dev, "%s --> %d\n",
+                                        "teardown", status);
+                        return status;
+                }
+        }
+
+        status = gpiochip_remove(&gpio->chip);
+        if (status == 0)
+                kfree(gpio);
+        else
+                dev_err(&client->dev, "%s --> %d\n", "remove", status);
+        return status;
+}
+
+static struct i2c_driver pcf857x_driver = {
+        .driver = {
+                .name   = "pcf857x",
+                .owner  = THIS_MODULE,
+        },
+        .probe  = pcf857x_probe,
+        .remove = pcf857x_remove,
+};
+
+static int __init pcf857x_init(void)
+{
+        return i2c_add_driver(&pcf857x_driver);
+}
+module_init(pcf857x_init);
+
+static void __exit pcf857x_exit(void)
+{
+        i2c_del_driver(&pcf857x_driver);
+}
+module_exit(pcf857x_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("David Brownell");
diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig
index bd7082c2443d..b21593f93586 100644
--- a/drivers/i2c/chips/Kconfig
+++ b/drivers/i2c/chips/Kconfig
@@ -54,8 +54,8 @@ config PCF8575
           hardware.  If unsure, say N.
 
 config SENSORS_PCA9539
-        tristate "Philips PCA9539 16-bit I/O port"
-        depends on EXPERIMENTAL
+        tristate "Philips PCA9539 16-bit I/O port (DEPRECATED)"
+        depends on EXPERIMENTAL && GPIO_PCA9539 = "n"
         help
           If you say yes here you get support for the Philips PCA9539
           16-bit I/O port.
@@ -63,6 +63,9 @@ config SENSORS_PCA9539
           This driver can also be built as a module.  If so, the module
           will be called pca9539.
 
+          This driver is deprecated and will be dropped soon. Use
+          drivers/gpio/pca9539.c instead.
+
 config SENSORS_PCF8591
         tristate "Philips PCF8591"
         depends on EXPERIMENTAL
diff --git a/drivers/infiniband/Kconfig b/drivers/infiniband/Kconfig
index a193dfbf99d2..a5dc78ae62d4 100644
--- a/drivers/infiniband/Kconfig
+++ b/drivers/infiniband/Kconfig
@@ -44,8 +44,8 @@ source "drivers/infiniband/hw/ipath/Kconfig"
 source "drivers/infiniband/hw/ehca/Kconfig"
 source "drivers/infiniband/hw/amso1100/Kconfig"
 source "drivers/infiniband/hw/cxgb3/Kconfig"
-
 source "drivers/infiniband/hw/mlx4/Kconfig"
+source "drivers/infiniband/hw/nes/Kconfig"
 
 source "drivers/infiniband/ulp/ipoib/Kconfig"
 
diff --git a/drivers/infiniband/Makefile b/drivers/infiniband/Makefile
index 75f325e40b54..ed35e4496241 100644
--- a/drivers/infiniband/Makefile
+++ b/drivers/infiniband/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_INFINIBAND_EHCA)		+= hw/ehca/
 obj-$(CONFIG_INFINIBAND_AMSO1100)       += hw/amso1100/
 obj-$(CONFIG_INFINIBAND_CXGB3)          += hw/cxgb3/
 obj-$(CONFIG_MLX4_INFINIBAND)           += hw/mlx4/
+obj-$(CONFIG_INFINIBAND_NES)            += hw/nes/
 obj-$(CONFIG_INFINIBAND_IPOIB)          += ulp/ipoib/
 obj-$(CONFIG_INFINIBAND_SRP)            += ulp/srp/
 obj-$(CONFIG_INFINIBAND_ISER)           += ulp/iser/
diff --git a/drivers/infiniband/core/cm.c b/drivers/infiniband/core/cm.c
index c0150147d347..638b727d42e0 100644
--- a/drivers/infiniband/core/cm.c
+++ b/drivers/infiniband/core/cm.c
@@ -974,6 +974,9 @@ static void cm_format_req(struct cm_req_msg *req_msg,
                           struct cm_id_private *cm_id_priv,
                           struct ib_cm_req_param *param)
 {
+        struct ib_sa_path_rec *pri_path = param->primary_path;
+        struct ib_sa_path_rec *alt_path = param->alternate_path;
+
         cm_format_mad_hdr(&req_msg->hdr, CM_REQ_ATTR_ID,
                           cm_form_tid(cm_id_priv, CM_MSG_SEQUENCE_REQ));
 
@@ -997,35 +1000,46 @@ static void cm_format_req(struct cm_req_msg *req_msg,
         cm_req_set_max_cm_retries(req_msg, param->max_cm_retries);
         cm_req_set_srq(req_msg, param->srq);
 
-        req_msg->primary_local_lid = param->primary_path->slid;
-        req_msg->primary_remote_lid = param->primary_path->dlid;
-        req_msg->primary_local_gid = param->primary_path->sgid;
-        req_msg->primary_remote_gid = param->primary_path->dgid;
-        cm_req_set_primary_flow_label(req_msg, param->primary_path->flow_label);
-        cm_req_set_primary_packet_rate(req_msg, param->primary_path->rate);
-        req_msg->primary_traffic_class = param->primary_path->traffic_class;
-        req_msg->primary_hop_limit = param->primary_path->hop_limit;
-        cm_req_set_primary_sl(req_msg, param->primary_path->sl);
-        cm_req_set_primary_subnet_local(req_msg, 1); /* local only... */
+        if (pri_path->hop_limit <= 1) {
+                req_msg->primary_local_lid = pri_path->slid;
+                req_msg->primary_remote_lid = pri_path->dlid;
+        } else {
+                /* Work-around until there's a way to obtain remote LID info */
+                req_msg->primary_local_lid = IB_LID_PERMISSIVE;
+                req_msg->primary_remote_lid = IB_LID_PERMISSIVE;
+        }
+        req_msg->primary_local_gid = pri_path->sgid;
+        req_msg->primary_remote_gid = pri_path->dgid;
+        cm_req_set_primary_flow_label(req_msg, pri_path->flow_label);
+        cm_req_set_primary_packet_rate(req_msg, pri_path->rate);
+        req_msg->primary_traffic_class = pri_path->traffic_class;
+        req_msg->primary_hop_limit = pri_path->hop_limit;
+        cm_req_set_primary_sl(req_msg, pri_path->sl);
+        cm_req_set_primary_subnet_local(req_msg, (pri_path->hop_limit <= 1));
         cm_req_set_primary_local_ack_timeout(req_msg,
                 cm_ack_timeout(cm_id_priv->av.port->cm_dev->ack_delay,
-                               param->primary_path->packet_life_time));
+                               pri_path->packet_life_time));
 
-        if (param->alternate_path) {
-                req_msg->alt_local_lid = param->alternate_path->slid;
-                req_msg->alt_remote_lid = param->alternate_path->dlid;
-                req_msg->alt_local_gid = param->alternate_path->sgid;
-                req_msg->alt_remote_gid = param->alternate_path->dgid;
+        if (alt_path) {
+                if (alt_path->hop_limit <= 1) {
+                        req_msg->alt_local_lid = alt_path->slid;
+                        req_msg->alt_remote_lid = alt_path->dlid;
+                } else {
+                        req_msg->alt_local_lid = IB_LID_PERMISSIVE;
+                        req_msg->alt_remote_lid = IB_LID_PERMISSIVE;
+                }
+                req_msg->alt_local_gid = alt_path->sgid;
+                req_msg->alt_remote_gid = alt_path->dgid;
                 cm_req_set_alt_flow_label(req_msg,
-                                          param->alternate_path->flow_label);
-                cm_req_set_alt_packet_rate(req_msg, param->alternate_path->rate);
-                req_msg->alt_traffic_class = param->alternate_path->traffic_class;
-                req_msg->alt_hop_limit = param->alternate_path->hop_limit;
-                cm_req_set_alt_sl(req_msg, param->alternate_path->sl);
-                cm_req_set_alt_subnet_local(req_msg, 1); /* local only... */
+                                          alt_path->flow_label);
+                cm_req_set_alt_packet_rate(req_msg, alt_path->rate);
+                req_msg->alt_traffic_class = alt_path->traffic_class;
+                req_msg->alt_hop_limit = alt_path->hop_limit;
+                cm_req_set_alt_sl(req_msg, alt_path->sl);
+                cm_req_set_alt_subnet_local(req_msg, (alt_path->hop_limit <= 1));
                 cm_req_set_alt_local_ack_timeout(req_msg,
                         cm_ack_timeout(cm_id_priv->av.port->cm_dev->ack_delay,
-                                       param->alternate_path->packet_life_time));
+                                       alt_path->packet_life_time));
         }
 
         if (param->private_data && param->private_data_len)
@@ -1441,6 +1455,34 @@ out:
         return listen_cm_id_priv;
 }
 
+/*
+ * Work-around for inter-subnet connections.  If the LIDs are permissive,
+ * we need to override the LID/SL data in the REQ with the LID information
+ * in the work completion.
+ */
+static void cm_process_routed_req(struct cm_req_msg *req_msg, struct ib_wc *wc)
+{
+        if (!cm_req_get_primary_subnet_local(req_msg)) {
+                if (req_msg->primary_local_lid == IB_LID_PERMISSIVE) {
+                        req_msg->primary_local_lid = cpu_to_be16(wc->slid);
+                        cm_req_set_primary_sl(req_msg, wc->sl);
+                }
+
+                if (req_msg->primary_remote_lid == IB_LID_PERMISSIVE)
+                        req_msg->primary_remote_lid = cpu_to_be16(wc->dlid_path_bits);
+        }
+
+        if (!cm_req_get_alt_subnet_local(req_msg)) {
+                if (req_msg->alt_local_lid == IB_LID_PERMISSIVE) {
+                        req_msg->alt_local_lid = cpu_to_be16(wc->slid);
+                        cm_req_set_alt_sl(req_msg, wc->sl);
+                }
+
+                if (req_msg->alt_remote_lid == IB_LID_PERMISSIVE)
+                        req_msg->alt_remote_lid = cpu_to_be16(wc->dlid_path_bits);
+        }
+}
+
 static int cm_req_handler(struct cm_work *work)
 {
         struct ib_cm_id *cm_id;
@@ -1481,6 +1523,7 @@ static int cm_req_handler(struct cm_work *work)
         cm_id_priv->id.service_id = req_msg->service_id;
         cm_id_priv->id.service_mask = __constant_cpu_to_be64(~0ULL);
 
+        cm_process_routed_req(req_msg, work->mad_recv_wc->wc);
         cm_format_paths_from_req(req_msg, &work->path[0], &work->path[1]);
         ret = cm_init_av_by_path(&work->path[0], &cm_id_priv->av);
         if (ret) {
diff --git a/drivers/infiniband/core/fmr_pool.c b/drivers/infiniband/core/fmr_pool.c
index 6c7aa59794d4..7f00347364f7 100644
--- a/drivers/infiniband/core/fmr_pool.c
+++ b/drivers/infiniband/core/fmr_pool.c
@@ -320,10 +320,13 @@ struct ib_fmr_pool *ib_create_fmr_pool(struct ib_pd             *pd,
                         .max_maps   = pool->max_remaps,
                         .page_shift = params->page_shift
                 };
+                int bytes_per_fmr = sizeof *fmr;
+
+                if (pool->cache_bucket)
+                        bytes_per_fmr += params->max_pages_per_fmr * sizeof (u64);
 
                 for (i = 0; i < params->pool_size; ++i) {
-                        fmr = kmalloc(sizeof *fmr + params->max_pages_per_fmr * sizeof (u64),
-                                      GFP_KERNEL);
+                        fmr = kmalloc(bytes_per_fmr, GFP_KERNEL);
                         if (!fmr) {
                                 printk(KERN_WARNING PFX "failed to allocate fmr "
                                        "struct for FMR %d\n", i);
diff --git a/drivers/infiniband/hw/ehca/ehca_classes.h b/drivers/infiniband/hw/ehca/ehca_classes.h
index f281d16040f5..92cce8aacbb7 100644
--- a/drivers/infiniband/hw/ehca/ehca_classes.h
+++ b/drivers/infiniband/hw/ehca/ehca_classes.h
@@ -101,6 +101,7 @@ struct ehca_sport {
         spinlock_t mod_sqp_lock;
         enum ib_port_state port_state;
         struct ehca_sma_attr saved_attr;
+        u32 pma_qp_nr;
 };
 
 #define HCA_CAP_MR_PGSIZE_4K  0x80000000
diff --git a/drivers/infiniband/hw/ehca/ehca_irq.c b/drivers/infiniband/hw/ehca/ehca_irq.c
index 863b34fa9ff9..b5ca94c6b8d9 100644
--- a/drivers/infiniband/hw/ehca/ehca_irq.c
+++ b/drivers/infiniband/hw/ehca/ehca_irq.c
@@ -403,6 +403,8 @@ static void parse_ec(struct ehca_shca *shca, u64 eqe)
                         sport->port_state = IB_PORT_ACTIVE;
                         dispatch_port_event(shca, port, IB_EVENT_PORT_ACTIVE,
                                             "is active");
+                        ehca_query_sma_attr(shca, port,
+                                            &sport->saved_attr);
                 } else
                         notify_port_conf_change(shca, port);
                 break;
diff --git a/drivers/infiniband/hw/ehca/ehca_iverbs.h b/drivers/infiniband/hw/ehca/ehca_iverbs.h
index c469bfde2708..a8a2ea585d2f 100644
--- a/drivers/infiniband/hw/ehca/ehca_iverbs.h
+++ b/drivers/infiniband/hw/ehca/ehca_iverbs.h
@@ -187,6 +187,11 @@ int ehca_dealloc_ucontext(struct ib_ucontext *context);
 
 int ehca_mmap(struct ib_ucontext *context, struct vm_area_struct *vma);
 
+int ehca_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
+                     struct ib_wc *in_wc, struct ib_grh *in_grh,
+                     struct ib_mad *in_mad,
+                     struct ib_mad *out_mad);
+
 void ehca_poll_eqs(unsigned long data);
 
 int ehca_calc_ipd(struct ehca_shca *shca, int port,
diff --git a/drivers/infiniband/hw/ehca/ehca_main.c b/drivers/infiniband/hw/ehca/ehca_main.c
index 84c9b7b8669b..a86ebcc79a95 100644
--- a/drivers/infiniband/hw/ehca/ehca_main.c
+++ b/drivers/infiniband/hw/ehca/ehca_main.c
@@ -472,7 +472,7 @@ int ehca_init_device(struct ehca_shca *shca)
         shca->ib_device.dealloc_fmr         = ehca_dealloc_fmr;
         shca->ib_device.attach_mcast        = ehca_attach_mcast;
         shca->ib_device.detach_mcast        = ehca_detach_mcast;
-        /* shca->ib_device.process_mad      = ehca_process_mad;     */
+        shca->ib_device.process_mad         = ehca_process_mad;
         shca->ib_device.mmap                = ehca_mmap;
 
         if (EHCA_BMASK_GET(HCA_CAP_SRQ, shca->hca_cap)) {
diff --git a/drivers/infiniband/hw/ehca/ehca_reqs.c b/drivers/infiniband/hw/ehca/ehca_reqs.c
index 3aacc8cf1e44..2ce8cffb8664 100644
--- a/drivers/infiniband/hw/ehca/ehca_reqs.c
+++ b/drivers/infiniband/hw/ehca/ehca_reqs.c
@@ -209,6 +209,10 @@ static inline int ehca_write_swqe(struct ehca_qp *qp,
                         ehca_gen_err("wr.ud.ah is NULL. qp=%p", qp);
                         return -EINVAL;
                 }
+                if (unlikely(send_wr->wr.ud.remote_qpn == 0)) {
+                        ehca_gen_err("dest QP# is 0. qp=%x", qp->real_qp_num);
+                        return -EINVAL;
+                }
                 my_av = container_of(send_wr->wr.ud.ah, struct ehca_av, ib_ah);
                 wqe_p->u.ud_av.ud_av = my_av->av;
 
diff --git a/drivers/infiniband/hw/ehca/ehca_sqp.c b/drivers/infiniband/hw/ehca/ehca_sqp.c
index 79e72b25b252..706d97ad5555 100644
--- a/drivers/infiniband/hw/ehca/ehca_sqp.c
+++ b/drivers/infiniband/hw/ehca/ehca_sqp.c
@@ -39,12 +39,18 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include <rdma/ib_mad.h>
 
 #include "ehca_classes.h"
 #include "ehca_tools.h"
 #include "ehca_iverbs.h"
 #include "hcp_if.h"
 
+#define IB_MAD_STATUS_REDIRECT          __constant_htons(0x0002)
+#define IB_MAD_STATUS_UNSUP_VERSION     __constant_htons(0x0004)
+#define IB_MAD_STATUS_UNSUP_METHOD      __constant_htons(0x0008)
+
+#define IB_PMA_CLASS_PORT_INFO          __constant_htons(0x0001)
 
 /**
  * ehca_define_sqp - Defines special queue pair 1 (GSI QP). When special queue
@@ -83,6 +89,9 @@ u64 ehca_define_sqp(struct ehca_shca *shca,
                                  port, ret);
                         return ret;
                 }
+                shca->sport[port - 1].pma_qp_nr = pma_qp_nr;
+                ehca_dbg(&shca->ib_device, "port=%x pma_qp_nr=%x",
+                         port, pma_qp_nr);
                 break;
         default:
                 ehca_err(&shca->ib_device, "invalid qp_type=%x",
@@ -109,3 +118,85 @@ u64 ehca_define_sqp(struct ehca_shca *shca,
 
         return H_SUCCESS;
 }
+
+struct ib_perf {
+        struct ib_mad_hdr mad_hdr;
+        u8 reserved[40];
+        u8 data[192];
+} __attribute__ ((packed));
+
+
+static int ehca_process_perf(struct ib_device *ibdev, u8 port_num,
+                             struct ib_mad *in_mad, struct ib_mad *out_mad)
+{
+        struct ib_perf *in_perf = (struct ib_perf *)in_mad;
+        struct ib_perf *out_perf = (struct ib_perf *)out_mad;
+        struct ib_class_port_info *poi =
+                (struct ib_class_port_info *)out_perf->data;
+        struct ehca_shca *shca =
+                container_of(ibdev, struct ehca_shca, ib_device);
+        struct ehca_sport *sport = &shca->sport[port_num - 1];
+
+        ehca_dbg(ibdev, "method=%x", in_perf->mad_hdr.method);
+
+        *out_mad = *in_mad;
+
+        if (in_perf->mad_hdr.class_version != 1) {
+                ehca_warn(ibdev, "Unsupported class_version=%x",
+                          in_perf->mad_hdr.class_version);
+                out_perf->mad_hdr.status = IB_MAD_STATUS_UNSUP_VERSION;
+                goto perf_reply;
+        }
+
+        switch (in_perf->mad_hdr.method) {
+        case IB_MGMT_METHOD_GET:
+        case IB_MGMT_METHOD_SET:
+                /* set class port info for redirection */
+                out_perf->mad_hdr.attr_id = IB_PMA_CLASS_PORT_INFO;
+                out_perf->mad_hdr.status = IB_MAD_STATUS_REDIRECT;
+                memset(poi, 0, sizeof(*poi));
+                poi->base_version = 1;
+                poi->class_version = 1;
+                poi->resp_time_value = 18;
+                poi->redirect_lid = sport->saved_attr.lid;
+                poi->redirect_qp = sport->pma_qp_nr;
+                poi->redirect_qkey = IB_QP1_QKEY;
+                poi->redirect_pkey = IB_DEFAULT_PKEY_FULL;
+
+                ehca_dbg(ibdev, "ehca_pma_lid=%x ehca_pma_qp=%x",
+                         sport->saved_attr.lid, sport->pma_qp_nr);
+                break;
+
+        case IB_MGMT_METHOD_GET_RESP:
+                return IB_MAD_RESULT_FAILURE;
+
+        default:
+                out_perf->mad_hdr.status = IB_MAD_STATUS_UNSUP_METHOD;
+                break;
+        }
+
+perf_reply:
+        out_perf->mad_hdr.method = IB_MGMT_METHOD_GET_RESP;
+
+        return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
+}
+
+int ehca_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
+                     struct ib_wc *in_wc, struct ib_grh *in_grh,
+                     struct ib_mad *in_mad,
+                     struct ib_mad *out_mad)
+{
+        int ret;
+
+        if (!port_num || port_num > ibdev->phys_port_cnt)
+                return IB_MAD_RESULT_FAILURE;
+
+        /* accept only pma request */
+        if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
+                return IB_MAD_RESULT_SUCCESS;
+
+        ehca_dbg(ibdev, "port_num=%x src_qp=%x", port_num, in_wc->src_qp);
+        ret = ehca_process_perf(ibdev, port_num, in_mad, out_mad);
+
+        return ret;
+}
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c
index d8287d9db41e..96a39b5c9254 100644
--- a/drivers/infiniband/hw/mlx4/main.c
+++ b/drivers/infiniband/hw/mlx4/main.c
@@ -52,7 +52,7 @@ MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
 MODULE_LICENSE("Dual BSD/GPL");
 MODULE_VERSION(DRV_VERSION);
 
-static const char mlx4_ib_version[] __devinitdata =
+static const char mlx4_ib_version[] =
         DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
         DRV_VERSION " (" DRV_RELDATE ")\n";
 
@@ -468,6 +468,7 @@ static int init_node_data(struct mlx4_ib_dev *dev)
         if (err)
                 goto out;
 
+        dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
         memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
 
 out:
@@ -516,9 +517,16 @@ static struct class_device_attribute *mlx4_class_attributes[] = {
 
 static void *mlx4_ib_add(struct mlx4_dev *dev)
 {
+        static int mlx4_ib_version_printed;
         struct mlx4_ib_dev *ibdev;
         int i;
 
+
+        if (!mlx4_ib_version_printed) {
+                printk(KERN_INFO "%s", mlx4_ib_version);
+                ++mlx4_ib_version_printed;
+        }
+
         ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
         if (!ibdev) {
                 dev_err(&dev->pdev->dev, "Device struct alloc failed\n");
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c
index 6966f943f440..09a30dd12b14 100644
--- a/drivers/infiniband/hw/mthca/mthca_cmd.c
+++ b/drivers/infiniband/hw/mthca/mthca_cmd.c
@@ -1255,9 +1255,14 @@ int mthca_QUERY_ADAPTER(struct mthca_dev *dev,
         if (err)
                 goto out;
 
-        MTHCA_GET(adapter->vendor_id, outbox,   QUERY_ADAPTER_VENDOR_ID_OFFSET);
-        MTHCA_GET(adapter->device_id, outbox,   QUERY_ADAPTER_DEVICE_ID_OFFSET);
-        MTHCA_GET(adapter->revision_id, outbox, QUERY_ADAPTER_REVISION_ID_OFFSET);
+        if (!mthca_is_memfree(dev)) {
+                MTHCA_GET(adapter->vendor_id, outbox,
+                          QUERY_ADAPTER_VENDOR_ID_OFFSET);
+                MTHCA_GET(adapter->device_id, outbox,
+                          QUERY_ADAPTER_DEVICE_ID_OFFSET);
+                MTHCA_GET(adapter->revision_id, outbox,
+                          QUERY_ADAPTER_REVISION_ID_OFFSET);
+        }
         MTHCA_GET(adapter->inta_pin, outbox,    QUERY_ADAPTER_INTA_PIN_OFFSET);
 
         get_board_id(outbox + QUERY_ADAPTER_VSD_OFFSET / 4,
diff --git a/drivers/infiniband/hw/mthca/mthca_main.c b/drivers/infiniband/hw/mthca/mthca_main.c
index 5cf8250d4e16..cd3d8adbef9f 100644
--- a/drivers/infiniband/hw/mthca/mthca_main.c
+++ b/drivers/infiniband/hw/mthca/mthca_main.c
@@ -126,7 +126,7 @@ module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444);
 MODULE_PARM_DESC(fmr_reserved_mtts,
                  "number of memory translation table segments reserved for FMR");
 
-static const char mthca_version[] __devinitdata =
+static char mthca_version[] __devinitdata =
         DRV_NAME ": Mellanox InfiniBand HCA driver v"
         DRV_VERSION " (" DRV_RELDATE ")\n";
 
@@ -735,7 +735,8 @@ static int mthca_init_hca(struct mthca_dev *mdev)
         }
 
         mdev->eq_table.inta_pin = adapter.inta_pin;
-        mdev->rev_id            = adapter.revision_id;
+        if (!mthca_is_memfree(mdev))
+                mdev->rev_id = adapter.revision_id;
         memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id);
 
         return 0;
diff --git a/drivers/infiniband/hw/mthca/mthca_mr.c b/drivers/infiniband/hw/mthca/mthca_mr.c
index aa6c70a6a36f..3b6985557cb2 100644
--- a/drivers/infiniband/hw/mthca/mthca_mr.c
+++ b/drivers/infiniband/hw/mthca/mthca_mr.c
@@ -613,8 +613,10 @@ int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
                         sizeof *(mr->mem.tavor.mpt) * idx;
 
         mr->mtt = __mthca_alloc_mtt(dev, list_len, dev->mr_table.fmr_mtt_buddy);
-        if (IS_ERR(mr->mtt))
+        if (IS_ERR(mr->mtt)) {
+                err = PTR_ERR(mr->mtt);
                 goto err_out_table;
+        }
 
         mtt_seg = mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE;
 
@@ -627,8 +629,10 @@ int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
                 mr->mem.tavor.mtts = dev->mr_table.tavor_fmr.mtt_base + mtt_seg;
 
         mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
-        if (IS_ERR(mailbox))
+        if (IS_ERR(mailbox)) {
+                err = PTR_ERR(mailbox);
                 goto err_out_free_mtt;
+        }
 
         mpt_entry = mailbox->buf;
 
diff --git a/drivers/infiniband/hw/mthca/mthca_provider.c b/drivers/infiniband/hw/mthca/mthca_provider.c
index 6bcde1cb9688..9e491df6419c 100644
--- a/drivers/infiniband/hw/mthca/mthca_provider.c
+++ b/drivers/infiniband/hw/mthca/mthca_provider.c
@@ -923,17 +923,13 @@ static struct ib_mr *mthca_reg_phys_mr(struct ib_pd       *pd,
         struct mthca_mr *mr;
         u64 *page_list;
         u64 total_size;
-        u64 mask;
+        unsigned long mask;
         int shift;
         int npages;
         int err;
         int i, j, n;
 
-        /* First check that we have enough alignment */
-        if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
-                return ERR_PTR(-EINVAL);
-
-        mask = 0;
+        mask = buffer_list[0].addr ^ *iova_start;
         total_size = 0;
         for (i = 0; i < num_phys_buf; ++i) {
                 if (i != 0)
@@ -947,17 +943,7 @@ static struct ib_mr *mthca_reg_phys_mr(struct ib_pd       *pd,
         if (mask & ~PAGE_MASK)
                 return ERR_PTR(-EINVAL);
 
-        /* Find largest page shift we can use to cover buffers */
-        for (shift = PAGE_SHIFT; shift < 31; ++shift)
-                if (num_phys_buf > 1) {
-                        if ((1ULL << shift) & mask)
-                                break;
-                } else {
-                        if (1ULL << shift >=
-                            buffer_list[0].size +
-                            (buffer_list[0].addr & ((1ULL << shift) - 1)))
-                                break;
-                }
+        shift = __ffs(mask | 1 << 31);
 
         buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
         buffer_list[0].addr &= ~0ull << shift;
@@ -1270,6 +1256,8 @@ static int mthca_init_node_data(struct mthca_dev *dev)
                 goto out;
         }
 
+        if (mthca_is_memfree(dev))
+                dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
         memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
 
 out:
diff --git a/drivers/infiniband/hw/mthca/mthca_qp.c b/drivers/infiniband/hw/mthca/mthca_qp.c
index 0e5461c65731..db5595bbf7f0 100644
--- a/drivers/infiniband/hw/mthca/mthca_qp.c
+++ b/drivers/infiniband/hw/mthca/mthca_qp.c
@@ -1175,6 +1175,7 @@ static int mthca_alloc_qp_common(struct mthca_dev *dev,
 {
         int ret;
         int i;
+        struct mthca_next_seg *next;
 
         qp->refcount = 1;
         init_waitqueue_head(&qp->wait);
@@ -1217,7 +1218,6 @@ static int mthca_alloc_qp_common(struct mthca_dev *dev,
         }
 
         if (mthca_is_memfree(dev)) {
-                struct mthca_next_seg *next;
                 struct mthca_data_seg *scatter;
                 int size = (sizeof (struct mthca_next_seg) +
                             qp->rq.max_gs * sizeof (struct mthca_data_seg)) / 16;
@@ -1240,6 +1240,13 @@ static int mthca_alloc_qp_common(struct mthca_dev *dev,
                                                     qp->sq.wqe_shift) +
                                                    qp->send_wqe_offset);
                 }
+        } else {
+                for (i = 0; i < qp->rq.max; ++i) {
+                        next = get_recv_wqe(qp, i);
+                        next->nda_op = htonl((((i + 1) % qp->rq.max) <<
+                                              qp->rq.wqe_shift) | 1);
+                }
+
         }
 
         qp->sq.last = get_send_wqe(qp, qp->sq.max - 1);
@@ -1863,7 +1870,6 @@ int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
                 prev_wqe = qp->rq.last;
                 qp->rq.last = wqe;
 
-                ((struct mthca_next_seg *) wqe)->nda_op = 0;
                 ((struct mthca_next_seg *) wqe)->ee_nds =
                         cpu_to_be32(MTHCA_NEXT_DBD);
                 ((struct mthca_next_seg *) wqe)->flags = 0;
@@ -1885,9 +1891,6 @@ int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
 
                 qp->wrid[ind] = wr->wr_id;
 
-                ((struct mthca_next_seg *) prev_wqe)->nda_op =
-                        cpu_to_be32((ind << qp->rq.wqe_shift) | 1);
-                wmb();
                 ((struct mthca_next_seg *) prev_wqe)->ee_nds =
                         cpu_to_be32(MTHCA_NEXT_DBD | size);
 
diff --git a/drivers/infiniband/hw/mthca/mthca_srq.c b/drivers/infiniband/hw/mthca/mthca_srq.c
index 553d681f6813..a5ffff6e1026 100644
--- a/drivers/infiniband/hw/mthca/mthca_srq.c
+++ b/drivers/infiniband/hw/mthca/mthca_srq.c
@@ -175,9 +175,17 @@ static int mthca_alloc_srq_buf(struct mthca_dev *dev, struct mthca_pd *pd,
          * scatter list L_Keys to the sentry value of 0x100.
          */
         for (i = 0; i < srq->max; ++i) {
-                wqe = get_wqe(srq, i);
+                struct mthca_next_seg *next;
 
-                *wqe_to_link(wqe) = i < srq->max - 1 ? i + 1 : -1;
+                next = wqe = get_wqe(srq, i);
+
+                if (i < srq->max - 1) {
+                        *wqe_to_link(wqe) = i + 1;
+                        next->nda_op = htonl(((i + 1) << srq->wqe_shift) | 1);
+                } else {
+                        *wqe_to_link(wqe) = -1;
+                        next->nda_op = 0;
+                }
 
                 for (scatter = wqe + sizeof (struct mthca_next_seg);
                      (void *) scatter < wqe + (1 << srq->wqe_shift);
@@ -470,16 +478,15 @@ out:
 void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr)
 {
         int ind;
+        struct mthca_next_seg *last_free;
 
         ind = wqe_addr >> srq->wqe_shift;
 
         spin_lock(&srq->lock);
 
-        if (likely(srq->first_free >= 0))
-                *wqe_to_link(get_wqe(srq, srq->last_free)) = ind;
-        else
-                srq->first_free = ind;
-
+        last_free = get_wqe(srq, srq->last_free);
+        *wqe_to_link(last_free) = ind;
+        last_free->nda_op = htonl((ind << srq->wqe_shift) | 1);
         *wqe_to_link(get_wqe(srq, ind)) = -1;
         srq->last_free = ind;
 
@@ -506,15 +513,7 @@ int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
         first_ind = srq->first_free;
 
         for (nreq = 0; wr; wr = wr->next) {
-                ind = srq->first_free;
-
-                if (unlikely(ind < 0)) {
-                        mthca_err(dev, "SRQ %06x full\n", srq->srqn);
-                        err = -ENOMEM;
-                        *bad_wr = wr;
-                        break;
-                }
-
+                ind       = srq->first_free;
                 wqe       = get_wqe(srq, ind);
                 next_ind  = *wqe_to_link(wqe);
 
@@ -528,7 +527,6 @@ int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
                 prev_wqe  = srq->last;
                 srq->last = wqe;
 
-                ((struct mthca_next_seg *) wqe)->nda_op = 0;
                 ((struct mthca_next_seg *) wqe)->ee_nds = 0;
                 /* flags field will always remain 0 */
 
@@ -549,9 +547,6 @@ int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
                 if (i < srq->max_gs)
                         mthca_set_data_seg_inval(wqe);
 
-                ((struct mthca_next_seg *) prev_wqe)->nda_op =
-                        cpu_to_be32((ind << srq->wqe_shift) | 1);
-                wmb();
                 ((struct mthca_next_seg *) prev_wqe)->ee_nds =
                         cpu_to_be32(MTHCA_NEXT_DBD);
 
@@ -614,15 +609,7 @@ int mthca_arbel_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
         spin_lock_irqsave(&srq->lock, flags);
 
         for (nreq = 0; wr; ++nreq, wr = wr->next) {
-                ind = srq->first_free;
-
-                if (unlikely(ind < 0)) {
-                        mthca_err(dev, "SRQ %06x full\n", srq->srqn);
-                        err = -ENOMEM;
-                        *bad_wr = wr;
-                        break;
-                }
-
+                ind       = srq->first_free;
                 wqe       = get_wqe(srq, ind);
                 next_ind  = *wqe_to_link(wqe);
 
@@ -633,8 +620,6 @@ int mthca_arbel_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
                         break;
                 }
 
-                ((struct mthca_next_seg *) wqe)->nda_op =
-                        cpu_to_be32((next_ind << srq->wqe_shift) | 1);
                 ((struct mthca_next_seg *) wqe)->ee_nds = 0;
                 /* flags field will always remain 0 */
 
diff --git a/drivers/infiniband/hw/nes/Kconfig b/drivers/infiniband/hw/nes/Kconfig
new file mode 100644
index 000000000000..2aeb7ac972a9
--- /dev/null
+++ b/drivers/infiniband/hw/nes/Kconfig
@@ -0,0 +1,16 @@
+config INFINIBAND_NES
+        tristate "NetEffect RNIC Driver"
+        depends on PCI && INET && INFINIBAND
+        select LIBCRC32C
+        ---help---
+          This is a low-level driver for NetEffect RDMA enabled
+          Network Interface Cards (RNIC).
+
+config INFINIBAND_NES_DEBUG
+        bool "Verbose debugging output"
+        depends on INFINIBAND_NES
+        default n
+        ---help---
+          This option causes the NetEffect RNIC driver to produce debug
+          messages.  Select this if you are developing the driver
+          or trying to diagnose a problem.
diff --git a/drivers/infiniband/hw/nes/Makefile b/drivers/infiniband/hw/nes/Makefile
new file mode 100644
index 000000000000..35148513c47e
--- /dev/null
+++ b/drivers/infiniband/hw/nes/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_INFINIBAND_NES) += iw_nes.o
+
+iw_nes-objs := nes.o nes_hw.o nes_nic.o nes_utils.o nes_verbs.o nes_cm.o
diff --git a/drivers/infiniband/hw/nes/nes.c b/drivers/infiniband/hw/nes/nes.c
new file mode 100644
index 000000000000..7f8853b44ee1
--- /dev/null
+++ b/drivers/infiniband/hw/nes/nes.c
@@ -0,0 +1,1152 @@
+/*
+ * Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
+ * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/ethtool.h>
+#include <linux/mii.h>
+#include <linux/if_vlan.h>
+#include <linux/crc32.h>
+#include <linux/in.h>
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/if_arp.h>
+#include <linux/highmem.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/byteorder.h>
+#include <rdma/ib_smi.h>
+#include <rdma/ib_verbs.h>
+#include <rdma/ib_pack.h>
+#include <rdma/iw_cm.h>
+
+#include "nes.h"
+
+#include <net/netevent.h>
+#include <net/neighbour.h>
+#include <linux/route.h>
+#include <net/ip_fib.h>
+
+MODULE_AUTHOR("NetEffect");
+MODULE_DESCRIPTION("NetEffect RNIC Low-level iWARP Driver");
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_VERSION(DRV_VERSION);
+
+int max_mtu = 9000;
+int nics_per_function = 1;
+int interrupt_mod_interval = 0;
+
+
+/* Interoperability */
+int mpa_version = 1;
+module_param(mpa_version, int, 0);
+MODULE_PARM_DESC(mpa_version, "MPA version to be used int MPA Req/Resp (0 or 1)");
+
+/* Interoperability */
+int disable_mpa_crc = 0;
+module_param(disable_mpa_crc, int, 0);
+MODULE_PARM_DESC(disable_mpa_crc, "Disable checking of MPA CRC");
+
+unsigned int send_first = 0;
+module_param(send_first, int, 0);
+MODULE_PARM_DESC(send_first, "Send RDMA Message First on Active Connection");
+
+
+unsigned int nes_drv_opt = 0;
+module_param(nes_drv_opt, int, 0);
+MODULE_PARM_DESC(nes_drv_opt, "Driver option parameters");
+
+unsigned int nes_debug_level = 0;
+module_param_named(debug_level, nes_debug_level, uint, 0644);
+MODULE_PARM_DESC(debug_level, "Enable debug output level");
+
+LIST_HEAD(nes_adapter_list);
+LIST_HEAD(nes_dev_list);
+
+atomic_t qps_destroyed;
+atomic_t cqp_reqs_allocated;
+atomic_t cqp_reqs_freed;
+atomic_t cqp_reqs_dynallocated;
+atomic_t cqp_reqs_dynfreed;
+atomic_t cqp_reqs_queued;
+atomic_t cqp_reqs_redriven;
+
+static void nes_print_macaddr(struct net_device *netdev);
+static irqreturn_t nes_interrupt(int, void *);
+static int __devinit nes_probe(struct pci_dev *, const struct pci_device_id *);
+static void __devexit nes_remove(struct pci_dev *);
+static int __init nes_init_module(void);
+static void __exit nes_exit_module(void);
+static unsigned int ee_flsh_adapter;
+static unsigned int sysfs_nonidx_addr;
+static unsigned int sysfs_idx_addr;
+
+static struct pci_device_id nes_pci_table[] = {
+        {PCI_VENDOR_ID_NETEFFECT, PCI_DEVICE_ID_NETEFFECT_NE020, PCI_ANY_ID, PCI_ANY_ID},
+        {0}
+};
+
+MODULE_DEVICE_TABLE(pci, nes_pci_table);
+
+static int nes_inetaddr_event(struct notifier_block *, unsigned long, void *);
+static int nes_net_event(struct notifier_block *, unsigned long, void *);
+static int nes_notifiers_registered;
+
+
+static struct notifier_block nes_inetaddr_notifier = {
+        .notifier_call = nes_inetaddr_event
+};
+
+static struct notifier_block nes_net_notifier = {
+        .notifier_call = nes_net_event
+};
+
+
+
+
+/**
+ * nes_inetaddr_event
+ */
+static int nes_inetaddr_event(struct notifier_block *notifier,
+                unsigned long event, void *ptr)
+{
+        struct in_ifaddr *ifa = ptr;
+        struct net_device *event_netdev = ifa->ifa_dev->dev;
+        struct nes_device *nesdev;
+        struct net_device *netdev;
+        struct nes_vnic *nesvnic;
+        unsigned int addr;
+        unsigned int mask;
+
+        addr = ntohl(ifa->ifa_address);
+        mask = ntohl(ifa->ifa_mask);
+        nes_debug(NES_DBG_NETDEV, "nes_inetaddr_event: ip address %08X, netmask %08X.\n",
+                        addr, mask);
+        list_for_each_entry(nesdev, &nes_dev_list, list) {
+                nes_debug(NES_DBG_NETDEV, "Nesdev list entry = 0x%p. (%s)\n",
+                                nesdev, nesdev->netdev[0]->name);
+                netdev = nesdev->netdev[0];
+                nesvnic = netdev_priv(netdev);
+                if (netdev == event_netdev) {
+                        if (nesvnic->rdma_enabled == 0) {
+                                nes_debug(NES_DBG_NETDEV, "Returning without processing event for %s since"
+                                                " RDMA is not enabled.\n",
+                                                netdev->name);
+                                return NOTIFY_OK;
+                        }
+                        /* we have ifa->ifa_address/mask here if we need it */
+                        switch (event) {
+                                case NETDEV_DOWN:
+                                        nes_debug(NES_DBG_NETDEV, "event:DOWN\n");
+                                        nes_write_indexed(nesdev,
+                                                        NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)), 0);
+
+                                        nes_manage_arp_cache(netdev, netdev->dev_addr,
+                                                        ntohl(nesvnic->local_ipaddr), NES_ARP_DELETE);
+                                        nesvnic->local_ipaddr = 0;
+                                        return NOTIFY_OK;
+                                        break;
+                                case NETDEV_UP:
+                                        nes_debug(NES_DBG_NETDEV, "event:UP\n");
+
+                                        if (nesvnic->local_ipaddr != 0) {
+                                                nes_debug(NES_DBG_NETDEV, "Interface already has local_ipaddr\n");
+                                                return NOTIFY_OK;
+                                        }
+                                        /* Add the address to the IP table */
+                                        nesvnic->local_ipaddr = ifa->ifa_address;
+
+                                        nes_write_indexed(nesdev,
+                                                        NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)),
+                                                        ntohl(ifa->ifa_address));
+                                        nes_manage_arp_cache(netdev, netdev->dev_addr,
+                                                        ntohl(nesvnic->local_ipaddr), NES_ARP_ADD);
+                                        return NOTIFY_OK;
+                                        break;
+                                default:
+                                        break;
+                        }
+                }
+        }
+
+        return NOTIFY_DONE;
+}
+
+
+/**
+ * nes_net_event
+ */
+static int nes_net_event(struct notifier_block *notifier,
+                unsigned long event, void *ptr)
+{
+        struct neighbour *neigh = ptr;
+        struct nes_device *nesdev;
+        struct net_device *netdev;
+        struct nes_vnic *nesvnic;
+
+        switch (event) {
+                case NETEVENT_NEIGH_UPDATE:
+                        list_for_each_entry(nesdev, &nes_dev_list, list) {
+                                /* nes_debug(NES_DBG_NETDEV, "Nesdev list entry = 0x%p.\n", nesdev); */
+                                netdev = nesdev->netdev[0];
+                                nesvnic = netdev_priv(netdev);
+                                if (netdev == neigh->dev) {
+                                        if (nesvnic->rdma_enabled == 0) {
+                                                nes_debug(NES_DBG_NETDEV, "Skipping device %s since no RDMA\n",
+                                                                netdev->name);
+                                        } else {
+                                                if (neigh->nud_state & NUD_VALID) {
+                                                        nes_manage_arp_cache(neigh->dev, neigh->ha,
+                                                                        ntohl(*(__be32 *)neigh->primary_key), NES_ARP_ADD);
+                                                } else {
+                                                        nes_manage_arp_cache(neigh->dev, neigh->ha,
+                                                                        ntohl(*(__be32 *)neigh->primary_key), NES_ARP_DELETE);
+                                                }
+                                        }
+                                        return NOTIFY_OK;
+                                }
+                        }
+                        break;
+                default:
+                        nes_debug(NES_DBG_NETDEV, "NETEVENT_ %lu undefined\n", event);
+                        break;
+        }
+
+        return NOTIFY_DONE;
+}
+
+
+/**
+ * nes_add_ref
+ */
+void nes_add_ref(struct ib_qp *ibqp)
+{
+        struct nes_qp *nesqp;
+
+        nesqp = to_nesqp(ibqp);
+        nes_debug(NES_DBG_QP, "Bumping refcount for QP%u.  Pre-inc value = %u\n",
+                        ibqp->qp_num, atomic_read(&nesqp->refcount));
+        atomic_inc(&nesqp->refcount);
+}
+
+static void nes_cqp_rem_ref_callback(struct nes_device *nesdev, struct nes_cqp_request *cqp_request)
+{
+        unsigned long flags;
+        struct nes_qp *nesqp = cqp_request->cqp_callback_pointer;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        u32 qp_id;
+
+        atomic_inc(&qps_destroyed);
+
+        /* Free the control structures */
+
+        qp_id = nesqp->hwqp.qp_id;
+        if (nesqp->pbl_vbase) {
+                pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size,
+                                nesqp->hwqp.q2_vbase, nesqp->hwqp.q2_pbase);
+                spin_lock_irqsave(&nesadapter->pbl_lock, flags);
+                nesadapter->free_256pbl++;
+                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase);
+                nesqp->pbl_vbase = NULL;
+
+        } else {
+                pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size,
+                                nesqp->hwqp.sq_vbase, nesqp->hwqp.sq_pbase);
+        }
+        nes_free_resource(nesadapter, nesadapter->allocated_qps, nesqp->hwqp.qp_id);
+
+        kfree(nesqp->allocated_buffer);
+
+}
+
+/**
+ * nes_rem_ref
+ */
+void nes_rem_ref(struct ib_qp *ibqp)
+{
+        u64 u64temp;
+        struct nes_qp *nesqp;
+        struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        struct nes_cqp_request *cqp_request;
+        u32 opcode;
+
+        nesqp = to_nesqp(ibqp);
+
+        if (atomic_read(&nesqp->refcount) == 0) {
+                printk(KERN_INFO PFX "%s: Reference count already 0 for QP%d, last aeq = 0x%04X.\n",
+                                __FUNCTION__, ibqp->qp_num, nesqp->last_aeq);
+                BUG();
+        }
+
+        if (atomic_dec_and_test(&nesqp->refcount)) {
+                nesadapter->qp_table[nesqp->hwqp.qp_id-NES_FIRST_QPN] = NULL;
+
+                /* Destroy the QP */
+                cqp_request = nes_get_cqp_request(nesdev);
+                if (cqp_request == NULL) {
+                        nes_debug(NES_DBG_QP, "Failed to get a cqp_request.\n");
+                        return;
+                }
+                cqp_request->waiting = 0;
+                cqp_request->callback = 1;
+                cqp_request->cqp_callback = nes_cqp_rem_ref_callback;
+                cqp_request->cqp_callback_pointer = nesqp;
+                cqp_wqe = &cqp_request->cqp_wqe;
+
+                nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+                opcode = NES_CQP_DESTROY_QP | NES_CQP_QP_TYPE_IWARP;
+
+                if (nesqp->hte_added) {
+                        opcode  |= NES_CQP_QP_DEL_HTE;
+                        nesqp->hte_added = 0;
+                }
+                set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
+                set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id);
+                u64temp = (u64)nesqp->nesqp_context_pbase;
+                set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp);
+                nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+        }
+}
+
+
+/**
+ * nes_get_qp
+ */
+struct ib_qp *nes_get_qp(struct ib_device *device, int qpn)
+{
+        struct nes_vnic *nesvnic = to_nesvnic(device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+
+        if ((qpn < NES_FIRST_QPN) || (qpn >= (NES_FIRST_QPN + nesadapter->max_qp)))
+                return NULL;
+
+        return &nesadapter->qp_table[qpn - NES_FIRST_QPN]->ibqp;
+}
+
+
+/**
+ * nes_print_macaddr
+ */
+static void nes_print_macaddr(struct net_device *netdev)
+{
+        nes_debug(NES_DBG_INIT, "%s: MAC %02X:%02X:%02X:%02X:%02X:%02X, IRQ %u\n",
+                        netdev->name,
+                        netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
+                        netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5],
+                        netdev->irq);
+}
+
+
+/**
+ * nes_interrupt - handle interrupts
+ */
+static irqreturn_t nes_interrupt(int irq, void *dev_id)
+{
+        struct nes_device *nesdev = (struct nes_device *)dev_id;
+        int handled = 0;
+        u32 int_mask;
+        u32 int_req;
+        u32 int_stat;
+        u32 intf_int_stat;
+        u32 timer_stat;
+
+        if (nesdev->msi_enabled) {
+                /* No need to read the interrupt pending register if msi is enabled */
+                handled = 1;
+        } else {
+                if (unlikely(nesdev->nesadapter->hw_rev == NE020_REV)) {
+                        /* Master interrupt enable provides synchronization for kicking off bottom half
+                          when interrupt sharing is going on */
+                        int_mask = nes_read32(nesdev->regs + NES_INT_MASK);
+                        if (int_mask & 0x80000000) {
+                                /* Check interrupt status to see if this might be ours */
+                                int_stat = nes_read32(nesdev->regs + NES_INT_STAT);
+                                int_req = nesdev->int_req;
+                                if (int_stat&int_req) {
+                                        /* if interesting CEQ or AEQ is pending, claim the interrupt */
+                                        if ((int_stat&int_req) & (~(NES_INT_TIMER|NES_INT_INTF))) {
+                                                handled = 1;
+                                        } else {
+                                                if (((int_stat & int_req) & NES_INT_TIMER) == NES_INT_TIMER) {
+                                                        /* Timer might be running but might be for another function */
+                                                        timer_stat = nes_read32(nesdev->regs + NES_TIMER_STAT);
+                                                        if ((timer_stat & nesdev->timer_int_req) != 0) {
+                                                                handled = 1;
+                                                        }
+                                                }
+                                                if ((((int_stat & int_req) & NES_INT_INTF) == NES_INT_INTF) &&
+                                                                (handled == 0)) {
+                                                        intf_int_stat = nes_read32(nesdev->regs+NES_INTF_INT_STAT);
+                                                        if ((intf_int_stat & nesdev->intf_int_req) != 0) {
+                                                                handled = 1;
+                                                        }
+                                                }
+                                        }
+                                        if (handled) {
+                                                nes_write32(nesdev->regs+NES_INT_MASK, int_mask & (~0x80000000));
+                                                int_mask = nes_read32(nesdev->regs+NES_INT_MASK);
+                                                /* Save off the status to save an additional read */
+                                                nesdev->int_stat = int_stat;
+                                                nesdev->napi_isr_ran = 1;
+                                        }
+                                }
+                        }
+                } else {
+                        handled = nes_read32(nesdev->regs+NES_INT_PENDING);
+                }
+        }
+
+        if (handled) {
+
+                if (nes_napi_isr(nesdev) == 0) {
+                        tasklet_schedule(&nesdev->dpc_tasklet);
+
+                }
+                return IRQ_HANDLED;
+        } else {
+                return IRQ_NONE;
+        }
+}
+
+
+/**
+ * nes_probe - Device initialization
+ */
+static int __devinit nes_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
+{
+        struct net_device *netdev = NULL;
+        struct nes_device *nesdev = NULL;
+        int ret = 0;
+        struct nes_vnic *nesvnic = NULL;
+        void __iomem *mmio_regs = NULL;
+        u8 hw_rev;
+
+        assert(pcidev != NULL);
+        assert(ent != NULL);
+
+        printk(KERN_INFO PFX "NetEffect RNIC driver v%s loading. (%s)\n",
+                        DRV_VERSION, pci_name(pcidev));
+
+        ret = pci_enable_device(pcidev);
+        if (ret) {
+                printk(KERN_ERR PFX "Unable to enable PCI device. (%s)\n", pci_name(pcidev));
+                goto bail0;
+        }
+
+        nes_debug(NES_DBG_INIT, "BAR0 (@0x%08lX) size = 0x%lX bytes\n",
+                        (long unsigned int)pci_resource_start(pcidev, BAR_0),
+                        (long unsigned int)pci_resource_len(pcidev, BAR_0));
+        nes_debug(NES_DBG_INIT, "BAR1 (@0x%08lX) size = 0x%lX bytes\n",
+                        (long unsigned int)pci_resource_start(pcidev, BAR_1),
+                        (long unsigned int)pci_resource_len(pcidev, BAR_1));
+
+        /* Make sure PCI base addr are MMIO */
+        if (!(pci_resource_flags(pcidev, BAR_0) & IORESOURCE_MEM) ||
+                        !(pci_resource_flags(pcidev, BAR_1) & IORESOURCE_MEM)) {
+                printk(KERN_ERR PFX "PCI regions not an MMIO resource\n");
+                ret = -ENODEV;
+                goto bail1;
+        }
+
+        /* Reserve PCI I/O and memory resources */
+        ret = pci_request_regions(pcidev, DRV_NAME);
+        if (ret) {
+                printk(KERN_ERR PFX "Unable to request regions. (%s)\n", pci_name(pcidev));
+                goto bail1;
+        }
+
+        if ((sizeof(dma_addr_t) > 4)) {
+                ret = pci_set_dma_mask(pcidev, DMA_64BIT_MASK);
+                if (ret < 0) {
+                        printk(KERN_ERR PFX "64b DMA mask configuration failed\n");
+                        goto bail2;
+                }
+                ret = pci_set_consistent_dma_mask(pcidev, DMA_64BIT_MASK);
+                if (ret) {
+                        printk(KERN_ERR PFX "64b DMA consistent mask configuration failed\n");
+                        goto bail2;
+                }
+        } else {
+                ret = pci_set_dma_mask(pcidev, DMA_32BIT_MASK);
+                if (ret < 0) {
+                        printk(KERN_ERR PFX "32b DMA mask configuration failed\n");
+                        goto bail2;
+                }
+                ret = pci_set_consistent_dma_mask(pcidev, DMA_32BIT_MASK);
+                if (ret) {
+                        printk(KERN_ERR PFX "32b DMA consistent mask configuration failed\n");
+                        goto bail2;
+                }
+        }
+
+        pci_set_master(pcidev);
+
+        /* Allocate hardware structure */
+        nesdev = kzalloc(sizeof(struct nes_device), GFP_KERNEL);
+        if (!nesdev) {
+                printk(KERN_ERR PFX "%s: Unable to alloc hardware struct\n", pci_name(pcidev));
+                ret = -ENOMEM;
+                goto bail2;
+        }
+
+        nes_debug(NES_DBG_INIT, "Allocated nes device at %p\n", nesdev);
+        nesdev->pcidev = pcidev;
+        pci_set_drvdata(pcidev, nesdev);
+
+        pci_read_config_byte(pcidev, 0x0008, &hw_rev);
+        nes_debug(NES_DBG_INIT, "hw_rev=%u\n", hw_rev);
+
+        spin_lock_init(&nesdev->indexed_regs_lock);
+
+        /* Remap the PCI registers in adapter BAR0 to kernel VA space */
+        mmio_regs = ioremap_nocache(pci_resource_start(pcidev, BAR_0), sizeof(mmio_regs));
+        if (mmio_regs == NULL) {
+                printk(KERN_ERR PFX "Unable to remap BAR0\n");
+                ret = -EIO;
+                goto bail3;
+        }
+        nesdev->regs = mmio_regs;
+        nesdev->index_reg = 0x50 + (PCI_FUNC(pcidev->devfn)*8) + mmio_regs;
+
+        /* Ensure interrupts are disabled */
+        nes_write32(nesdev->regs+NES_INT_MASK, 0x7fffffff);
+
+        if (nes_drv_opt & NES_DRV_OPT_ENABLE_MSI) {
+                if (!pci_enable_msi(nesdev->pcidev)) {
+                        nesdev->msi_enabled = 1;
+                        nes_debug(NES_DBG_INIT, "MSI is enabled for device %s\n",
+                                        pci_name(pcidev));
+                } else {
+                        nes_debug(NES_DBG_INIT, "MSI is disabled by linux for device %s\n",
+                                        pci_name(pcidev));
+                }
+        } else {
+                nes_debug(NES_DBG_INIT, "MSI not requested due to driver options for device %s\n",
+                                pci_name(pcidev));
+        }
+
+        nesdev->csr_start = pci_resource_start(nesdev->pcidev, BAR_0);
+        nesdev->doorbell_region = pci_resource_start(nesdev->pcidev, BAR_1);
+
+        /* Init the adapter */
+        nesdev->nesadapter = nes_init_adapter(nesdev, hw_rev);
+        nesdev->nesadapter->et_rx_coalesce_usecs_irq = interrupt_mod_interval;
+        if (!nesdev->nesadapter) {
+                printk(KERN_ERR PFX "Unable to initialize adapter.\n");
+                ret = -ENOMEM;
+                goto bail5;
+        }
+
+        /* nesdev->base_doorbell_index =
+                        nesdev->nesadapter->pd_config_base[PCI_FUNC(nesdev->pcidev->devfn)]; */
+        nesdev->base_doorbell_index = 1;
+        nesdev->doorbell_start = nesdev->nesadapter->doorbell_start;
+        nesdev->mac_index = PCI_FUNC(nesdev->pcidev->devfn) % nesdev->nesadapter->port_count;
+
+        tasklet_init(&nesdev->dpc_tasklet, nes_dpc, (unsigned long)nesdev);
+
+        /* bring up the Control QP */
+        if (nes_init_cqp(nesdev)) {
+                ret = -ENODEV;
+                goto bail6;
+        }
+
+        /* Arm the CCQ */
+        nes_write32(nesdev->regs+NES_CQE_ALLOC, NES_CQE_ALLOC_NOTIFY_NEXT |
+                        PCI_FUNC(nesdev->pcidev->devfn));
+        nes_read32(nesdev->regs+NES_CQE_ALLOC);
+
+        /* Enable the interrupts */
+        nesdev->int_req = (0x101 << PCI_FUNC(nesdev->pcidev->devfn)) |
+                        (1 << (PCI_FUNC(nesdev->pcidev->devfn)+16));
+        if (PCI_FUNC(nesdev->pcidev->devfn) < 4) {
+                nesdev->int_req |= (1 << (PCI_FUNC(nesdev->pcidev->devfn)+24));
+        }
+
+        /* TODO: This really should be the first driver to load, not function 0 */
+        if (PCI_FUNC(nesdev->pcidev->devfn) == 0) {
+                /* pick up PCI and critical errors if the first driver to load */
+                nesdev->intf_int_req = NES_INTF_INT_PCIERR | NES_INTF_INT_CRITERR;
+                nesdev->int_req |= NES_INT_INTF;
+        } else {
+                nesdev->intf_int_req = 0;
+        }
+        nesdev->intf_int_req |= (1 << (PCI_FUNC(nesdev->pcidev->devfn)+16));
+        nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS0, 0);
+        nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS1, 0);
+        nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS2, 0x00001265);
+        nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS4, 0x18021804);
+
+        nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS3, 0x17801790);
+
+        /* deal with both periodic and one_shot */
+        nesdev->timer_int_req = 0x101 << PCI_FUNC(nesdev->pcidev->devfn);
+        nesdev->nesadapter->timer_int_req |= nesdev->timer_int_req;
+        nes_debug(NES_DBG_INIT, "setting int_req for function %u, nesdev = 0x%04X, adapter = 0x%04X\n",
+                        PCI_FUNC(nesdev->pcidev->devfn),
+                        nesdev->timer_int_req, nesdev->nesadapter->timer_int_req);
+
+        nes_write32(nesdev->regs+NES_INTF_INT_MASK, ~(nesdev->intf_int_req));
+
+        list_add_tail(&nesdev->list, &nes_dev_list);
+
+        /* Request an interrupt line for the driver */
+        ret = request_irq(pcidev->irq, nes_interrupt, IRQF_SHARED, DRV_NAME, nesdev);
+        if (ret) {
+                printk(KERN_ERR PFX "%s: requested IRQ %u is busy\n",
+                                pci_name(pcidev), pcidev->irq);
+                goto bail65;
+        }
+
+        nes_write32(nesdev->regs+NES_INT_MASK, ~nesdev->int_req);
+
+        if (nes_notifiers_registered == 0) {
+                register_inetaddr_notifier(&nes_inetaddr_notifier);
+                register_netevent_notifier(&nes_net_notifier);
+        }
+        nes_notifiers_registered++;
+
+        /* Initialize network devices */
+                if ((netdev = nes_netdev_init(nesdev, mmio_regs)) == NULL) {
+                        goto bail7;
+                }
+
+                /* Register network device */
+                ret = register_netdev(netdev);
+                if (ret) {
+                        printk(KERN_ERR PFX "Unable to register netdev, ret = %d\n", ret);
+                        nes_netdev_destroy(netdev);
+                        goto bail7;
+                }
+
+                nes_print_macaddr(netdev);
+                /* create a CM core for this netdev */
+                nesvnic = netdev_priv(netdev);
+
+                nesdev->netdev_count++;
+                nesdev->nesadapter->netdev_count++;
+
+
+        printk(KERN_ERR PFX "%s: NetEffect RNIC driver successfully loaded.\n",
+                        pci_name(pcidev));
+        return 0;
+
+        bail7:
+        printk(KERN_ERR PFX "bail7\n");
+        while (nesdev->netdev_count > 0) {
+                nesdev->netdev_count--;
+                nesdev->nesadapter->netdev_count--;
+
+                unregister_netdev(nesdev->netdev[nesdev->netdev_count]);
+                nes_netdev_destroy(nesdev->netdev[nesdev->netdev_count]);
+        }
+
+        nes_debug(NES_DBG_INIT, "netdev_count=%d, nesadapter->netdev_count=%d\n",
+                        nesdev->netdev_count, nesdev->nesadapter->netdev_count);
+
+        nes_notifiers_registered--;
+        if (nes_notifiers_registered == 0) {
+                unregister_netevent_notifier(&nes_net_notifier);
+                unregister_inetaddr_notifier(&nes_inetaddr_notifier);
+        }
+
+        list_del(&nesdev->list);
+        nes_destroy_cqp(nesdev);
+
+        bail65:
+        printk(KERN_ERR PFX "bail65\n");
+        free_irq(pcidev->irq, nesdev);
+        if (nesdev->msi_enabled) {
+                pci_disable_msi(pcidev);
+        }
+        bail6:
+        printk(KERN_ERR PFX "bail6\n");
+        tasklet_kill(&nesdev->dpc_tasklet);
+        /* Deallocate the Adapter Structure */
+        nes_destroy_adapter(nesdev->nesadapter);
+
+        bail5:
+        printk(KERN_ERR PFX "bail5\n");
+        iounmap(nesdev->regs);
+
+        bail3:
+        printk(KERN_ERR PFX "bail3\n");
+        kfree(nesdev);
+
+        bail2:
+        pci_release_regions(pcidev);
+
+        bail1:
+        pci_disable_device(pcidev);
+
+        bail0:
+        return ret;
+}
+
+
+/**
+ * nes_remove - unload from kernel
+ */
+static void __devexit nes_remove(struct pci_dev *pcidev)
+{
+        struct nes_device *nesdev = pci_get_drvdata(pcidev);
+        struct net_device *netdev;
+        int netdev_index = 0;
+
+                if (nesdev->netdev_count) {
+                        netdev = nesdev->netdev[netdev_index];
+                        if (netdev) {
+                                netif_stop_queue(netdev);
+                                unregister_netdev(netdev);
+                                nes_netdev_destroy(netdev);
+
+                                nesdev->netdev[netdev_index] = NULL;
+                                nesdev->netdev_count--;
+                                nesdev->nesadapter->netdev_count--;
+                        }
+                }
+
+        nes_notifiers_registered--;
+        if (nes_notifiers_registered == 0) {
+                unregister_netevent_notifier(&nes_net_notifier);
+                unregister_inetaddr_notifier(&nes_inetaddr_notifier);
+        }
+
+        list_del(&nesdev->list);
+        nes_destroy_cqp(nesdev);
+        tasklet_kill(&nesdev->dpc_tasklet);
+
+        /* Deallocate the Adapter Structure */
+        nes_destroy_adapter(nesdev->nesadapter);
+
+        free_irq(pcidev->irq, nesdev);
+
+        if (nesdev->msi_enabled) {
+                pci_disable_msi(pcidev);
+        }
+
+        iounmap(nesdev->regs);
+        kfree(nesdev);
+
+        /* nes_debug(NES_DBG_SHUTDOWN, "calling pci_release_regions.\n"); */
+        pci_release_regions(pcidev);
+        pci_disable_device(pcidev);
+        pci_set_drvdata(pcidev, NULL);
+}
+
+
+static struct pci_driver nes_pci_driver = {
+        .name = DRV_NAME,
+        .id_table = nes_pci_table,
+        .probe = nes_probe,
+        .remove = __devexit_p(nes_remove),
+};
+
+static ssize_t nes_show_adapter(struct device_driver *ddp, char *buf)
+{
+        unsigned int  devfn = 0xffffffff;
+        unsigned char bus_number = 0xff;
+        unsigned int  i = 0;
+        struct nes_device *nesdev;
+
+        list_for_each_entry(nesdev, &nes_dev_list, list) {
+                if (i == ee_flsh_adapter) {
+                        devfn      = nesdev->nesadapter->devfn;
+                        bus_number = nesdev->nesadapter->bus_number;
+                        break;
+                }
+                i++;
+        }
+
+        return snprintf(buf, PAGE_SIZE, "%x:%x", bus_number, devfn);
+}
+
+static ssize_t nes_store_adapter(struct device_driver *ddp,
+        const char *buf, size_t count)
+{
+        char *p = (char *)buf;
+
+        ee_flsh_adapter = simple_strtoul(p, &p, 10);
+        return strnlen(buf, count);
+}
+
+static ssize_t nes_show_ee_cmd(struct device_driver *ddp, char *buf)
+{
+        u32 eeprom_cmd = 0xdead;
+        u32 i = 0;
+        struct nes_device *nesdev;
+
+        list_for_each_entry(nesdev, &nes_dev_list, list) {
+                if (i == ee_flsh_adapter) {
+                        eeprom_cmd = nes_read32(nesdev->regs + NES_EEPROM_COMMAND);
+                        break;
+                }
+                i++;
+        }
+        return snprintf(buf, PAGE_SIZE, "0x%x\n", eeprom_cmd);
+}
+
+static ssize_t nes_store_ee_cmd(struct device_driver *ddp,
+        const char *buf, size_t count)
+{
+        char *p = (char *)buf;
+        u32 val;
+        u32 i = 0;
+        struct nes_device *nesdev;
+
+        if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
+                val = simple_strtoul(p, &p, 16);
+                list_for_each_entry(nesdev, &nes_dev_list, list) {
+                        if (i == ee_flsh_adapter) {
+                                nes_write32(nesdev->regs + NES_EEPROM_COMMAND, val);
+                                break;
+                        }
+                        i++;
+                }
+        }
+        return strnlen(buf, count);
+}
+
+static ssize_t nes_show_ee_data(struct device_driver *ddp, char *buf)
+{
+        u32 eeprom_data = 0xdead;
+        u32 i = 0;
+        struct nes_device *nesdev;
+
+        list_for_each_entry(nesdev, &nes_dev_list, list) {
+                if (i == ee_flsh_adapter) {
+                        eeprom_data = nes_read32(nesdev->regs + NES_EEPROM_DATA);
+                        break;
+                }
+                i++;
+        }
+
+        return  snprintf(buf, PAGE_SIZE, "0x%x\n", eeprom_data);
+}
+
+static ssize_t nes_store_ee_data(struct device_driver *ddp,
+        const char *buf, size_t count)
+{
+        char *p = (char *)buf;
+        u32 val;
+        u32 i = 0;
+        struct nes_device *nesdev;
+
+        if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
+                val = simple_strtoul(p, &p, 16);
+                list_for_each_entry(nesdev, &nes_dev_list, list) {
+                        if (i == ee_flsh_adapter) {
+                                nes_write32(nesdev->regs + NES_EEPROM_DATA, val);
+                                break;
+                        }
+                        i++;
+                }
+        }
+        return strnlen(buf, count);
+}
+
+static ssize_t nes_show_flash_cmd(struct device_driver *ddp, char *buf)
+{
+        u32 flash_cmd = 0xdead;
+        u32 i = 0;
+        struct nes_device *nesdev;
+
+        list_for_each_entry(nesdev, &nes_dev_list, list) {
+                if (i == ee_flsh_adapter) {
+                        flash_cmd = nes_read32(nesdev->regs + NES_FLASH_COMMAND);
+                        break;
+                }
+                i++;
+        }
+
+        return  snprintf(buf, PAGE_SIZE, "0x%x\n", flash_cmd);
+}
+
+static ssize_t nes_store_flash_cmd(struct device_driver *ddp,
+        const char *buf, size_t count)
+{
+        char *p = (char *)buf;
+        u32 val;
+        u32 i = 0;
+        struct nes_device *nesdev;
+
+        if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
+                val = simple_strtoul(p, &p, 16);
+                list_for_each_entry(nesdev, &nes_dev_list, list) {
+                        if (i == ee_flsh_adapter) {
+                                nes_write32(nesdev->regs + NES_FLASH_COMMAND, val);
+                                break;
+                        }
+                        i++;
+                }
+        }
+        return strnlen(buf, count);
+}
+
+static ssize_t nes_show_flash_data(struct device_driver *ddp, char *buf)
+{
+        u32 flash_data = 0xdead;
+        u32 i = 0;
+        struct nes_device *nesdev;
+
+        list_for_each_entry(nesdev, &nes_dev_list, list) {
+                if (i == ee_flsh_adapter) {
+                        flash_data = nes_read32(nesdev->regs + NES_FLASH_DATA);
+                        break;
+                }
+                i++;
+        }
+
+        return  snprintf(buf, PAGE_SIZE, "0x%x\n", flash_data);
+}
+
+static ssize_t nes_store_flash_data(struct device_driver *ddp,
+        const char *buf, size_t count)
+{
+        char *p = (char *)buf;
+        u32 val;
+        u32 i = 0;
+        struct nes_device *nesdev;
+
+        if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
+                val = simple_strtoul(p, &p, 16);
+                list_for_each_entry(nesdev, &nes_dev_list, list) {
+                        if (i == ee_flsh_adapter) {
+                                nes_write32(nesdev->regs + NES_FLASH_DATA, val);
+                                break;
+                        }
+                        i++;
+                }
+        }
+        return strnlen(buf, count);
+}
+
+static ssize_t nes_show_nonidx_addr(struct device_driver *ddp, char *buf)
+{
+        return  snprintf(buf, PAGE_SIZE, "0x%x\n", sysfs_nonidx_addr);
+}
+
+static ssize_t nes_store_nonidx_addr(struct device_driver *ddp,
+        const char *buf, size_t count)
+{
+        char *p = (char *)buf;
+
+        if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X')
+                sysfs_nonidx_addr = simple_strtoul(p, &p, 16);
+
+        return strnlen(buf, count);
+}
+
+static ssize_t nes_show_nonidx_data(struct device_driver *ddp, char *buf)
+{
+        u32 nonidx_data = 0xdead;
+        u32 i = 0;
+        struct nes_device *nesdev;
+
+        list_for_each_entry(nesdev, &nes_dev_list, list) {
+                if (i == ee_flsh_adapter) {
+                        nonidx_data = nes_read32(nesdev->regs + sysfs_nonidx_addr);
+                        break;
+                }
+                i++;
+        }
+
+        return  snprintf(buf, PAGE_SIZE, "0x%x\n", nonidx_data);
+}
+
+static ssize_t nes_store_nonidx_data(struct device_driver *ddp,
+        const char *buf, size_t count)
+{
+        char *p = (char *)buf;
+        u32 val;
+        u32 i = 0;
+        struct nes_device *nesdev;
+
+        if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
+                val = simple_strtoul(p, &p, 16);
+                list_for_each_entry(nesdev, &nes_dev_list, list) {
+                        if (i == ee_flsh_adapter) {
+                                nes_write32(nesdev->regs + sysfs_nonidx_addr, val);
+                                break;
+                        }
+                        i++;
+                }
+        }
+        return strnlen(buf, count);
+}
+
+static ssize_t nes_show_idx_addr(struct device_driver *ddp, char *buf)
+{
+        return  snprintf(buf, PAGE_SIZE, "0x%x\n", sysfs_idx_addr);
+}
+
+static ssize_t nes_store_idx_addr(struct device_driver *ddp,
+        const char *buf, size_t count)
+{
+        char *p = (char *)buf;
+
+        if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X')
+                sysfs_idx_addr = simple_strtoul(p, &p, 16);
+
+        return strnlen(buf, count);
+}
+
+static ssize_t nes_show_idx_data(struct device_driver *ddp, char *buf)
+{
+        u32 idx_data = 0xdead;
+        u32 i = 0;
+        struct nes_device *nesdev;
+
+        list_for_each_entry(nesdev, &nes_dev_list, list) {
+                if (i == ee_flsh_adapter) {
+                        idx_data = nes_read_indexed(nesdev, sysfs_idx_addr);
+                        break;
+                }
+                i++;
+        }
+
+        return  snprintf(buf, PAGE_SIZE, "0x%x\n", idx_data);
+}
+
+static ssize_t nes_store_idx_data(struct device_driver *ddp,
+        const char *buf, size_t count)
+{
+        char *p = (char *)buf;
+        u32 val;
+        u32 i = 0;
+        struct nes_device *nesdev;
+
+        if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
+                val = simple_strtoul(p, &p, 16);
+                list_for_each_entry(nesdev, &nes_dev_list, list) {
+                        if (i == ee_flsh_adapter) {
+                                nes_write_indexed(nesdev, sysfs_idx_addr, val);
+                                break;
+                        }
+                        i++;
+                }
+        }
+        return strnlen(buf, count);
+}
+
+static DRIVER_ATTR(adapter, S_IRUSR | S_IWUSR,
+                   nes_show_adapter, nes_store_adapter);
+static DRIVER_ATTR(eeprom_cmd, S_IRUSR | S_IWUSR,
+                   nes_show_ee_cmd, nes_store_ee_cmd);
+static DRIVER_ATTR(eeprom_data, S_IRUSR | S_IWUSR,
+                   nes_show_ee_data, nes_store_ee_data);
+static DRIVER_ATTR(flash_cmd, S_IRUSR | S_IWUSR,
+                   nes_show_flash_cmd, nes_store_flash_cmd);
+static DRIVER_ATTR(flash_data, S_IRUSR | S_IWUSR,
+                   nes_show_flash_data, nes_store_flash_data);
+static DRIVER_ATTR(nonidx_addr, S_IRUSR | S_IWUSR,
+                   nes_show_nonidx_addr, nes_store_nonidx_addr);
+static DRIVER_ATTR(nonidx_data, S_IRUSR | S_IWUSR,
+                   nes_show_nonidx_data, nes_store_nonidx_data);
+static DRIVER_ATTR(idx_addr, S_IRUSR | S_IWUSR,
+                   nes_show_idx_addr, nes_store_idx_addr);
+static DRIVER_ATTR(idx_data, S_IRUSR | S_IWUSR,
+                   nes_show_idx_data, nes_store_idx_data);
+
+static int nes_create_driver_sysfs(struct pci_driver *drv)
+{
+        int error;
+        error  = driver_create_file(&drv->driver, &driver_attr_adapter);
+        error |= driver_create_file(&drv->driver, &driver_attr_eeprom_cmd);
+        error |= driver_create_file(&drv->driver, &driver_attr_eeprom_data);
+        error |= driver_create_file(&drv->driver, &driver_attr_flash_cmd);
+        error |= driver_create_file(&drv->driver, &driver_attr_flash_data);
+        error |= driver_create_file(&drv->driver, &driver_attr_nonidx_addr);
+        error |= driver_create_file(&drv->driver, &driver_attr_nonidx_data);
+        error |= driver_create_file(&drv->driver, &driver_attr_idx_addr);
+        error |= driver_create_file(&drv->driver, &driver_attr_idx_data);
+        return error;
+}
+
+static void nes_remove_driver_sysfs(struct pci_driver *drv)
+{
+        driver_remove_file(&drv->driver, &driver_attr_adapter);
+        driver_remove_file(&drv->driver, &driver_attr_eeprom_cmd);
+        driver_remove_file(&drv->driver, &driver_attr_eeprom_data);
+        driver_remove_file(&drv->driver, &driver_attr_flash_cmd);
+        driver_remove_file(&drv->driver, &driver_attr_flash_data);
+        driver_remove_file(&drv->driver, &driver_attr_nonidx_addr);
+        driver_remove_file(&drv->driver, &driver_attr_nonidx_data);
+        driver_remove_file(&drv->driver, &driver_attr_idx_addr);
+        driver_remove_file(&drv->driver, &driver_attr_idx_data);
+}
+
+/**
+ * nes_init_module - module initialization entry point
+ */
+static int __init nes_init_module(void)
+{
+        int retval;
+        int retval1;
+
+        retval = nes_cm_start();
+        if (retval) {
+                printk(KERN_ERR PFX "Unable to start NetEffect iWARP CM.\n");
+                return retval;
+        }
+        retval = pci_register_driver(&nes_pci_driver);
+        if (retval >= 0) {
+                retval1 = nes_create_driver_sysfs(&nes_pci_driver);
+                if (retval1 < 0)
+                        printk(KERN_ERR PFX "Unable to create NetEffect sys files.\n");
+        }
+        return retval;
+}
+
+
+/**
+ * nes_exit_module - module unload entry point
+ */
+static void __exit nes_exit_module(void)
+{
+        nes_cm_stop();
+        nes_remove_driver_sysfs(&nes_pci_driver);
+
+        pci_unregister_driver(&nes_pci_driver);
+}
+
+
+module_init(nes_init_module);
+module_exit(nes_exit_module);
diff --git a/drivers/infiniband/hw/nes/nes.h b/drivers/infiniband/hw/nes/nes.h
new file mode 100644
index 000000000000..fd57e8a1582f
--- /dev/null
+++ b/drivers/infiniband/hw/nes/nes.h
@@ -0,0 +1,560 @@
+/*
+ * Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
+ * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef __NES_H
+#define __NES_H
+
+#include <linux/netdevice.h>
+#include <linux/inetdevice.h>
+#include <linux/spinlock.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/pci.h>
+#include <linux/dma-mapping.h>
+#include <linux/workqueue.h>
+#include <linux/slab.h>
+#include <asm/semaphore.h>
+#include <linux/version.h>
+#include <asm/io.h>
+#include <linux/crc32c.h>
+
+#include <rdma/ib_smi.h>
+#include <rdma/ib_verbs.h>
+#include <rdma/ib_pack.h>
+#include <rdma/rdma_cm.h>
+#include <rdma/iw_cm.h>
+
+#define NES_SEND_FIRST_WRITE
+
+#define QUEUE_DISCONNECTS
+
+#define DRV_BUILD   "1"
+
+#define DRV_NAME    "iw_nes"
+#define DRV_VERSION "1.0 KO Build " DRV_BUILD
+#define PFX         DRV_NAME ": "
+
+/*
+ * NetEffect PCI vendor id and NE010 PCI device id.
+ */
+#ifndef PCI_VENDOR_ID_NETEFFECT /* not in pci.ids yet */
+#define PCI_VENDOR_ID_NETEFFECT       0x1678
+#define PCI_DEVICE_ID_NETEFFECT_NE020 0x0100
+#endif
+
+#define NE020_REV   4
+#define NE020_REV1  5
+
+#define BAR_0       0
+#define BAR_1       2
+
+#define RX_BUF_SIZE             (1536 + 8)
+#define NES_REG0_SIZE           (4 * 1024)
+#define NES_TX_TIMEOUT          (6*HZ)
+#define NES_FIRST_QPN           64
+#define NES_SW_CONTEXT_ALIGN    1024
+
+#define NES_NIC_MAX_NICS        16
+#define NES_MAX_ARP_TABLE_SIZE  4096
+
+#define NES_NIC_CEQ_SIZE        8
+/* NICs will be on a separate CQ */
+#define NES_CCEQ_SIZE ((nesadapter->max_cq / nesadapter->port_count) - 32)
+
+#define NES_MAX_PORT_COUNT 4
+
+#define MAX_DPC_ITERATIONS               128
+
+#define NES_CQP_REQUEST_NO_DOORBELL_RING 0
+#define NES_CQP_REQUEST_RING_DOORBELL    1
+
+#define NES_DRV_OPT_ENABLE_MPA_VER_0     0x00000001
+#define NES_DRV_OPT_DISABLE_MPA_CRC      0x00000002
+#define NES_DRV_OPT_DISABLE_FIRST_WRITE  0x00000004
+#define NES_DRV_OPT_DISABLE_INTF         0x00000008
+#define NES_DRV_OPT_ENABLE_MSI           0x00000010
+#define NES_DRV_OPT_DUAL_LOGICAL_PORT    0x00000020
+#define NES_DRV_OPT_SUPRESS_OPTION_BC    0x00000040
+#define NES_DRV_OPT_NO_INLINE_DATA       0x00000080
+#define NES_DRV_OPT_DISABLE_INT_MOD      0x00000100
+#define NES_DRV_OPT_DISABLE_VIRT_WQ      0x00000200
+
+#define NES_AEQ_EVENT_TIMEOUT         2500
+#define NES_DISCONNECT_EVENT_TIMEOUT  2000
+
+/* debug levels */
+/* must match userspace */
+#define NES_DBG_HW          0x00000001
+#define NES_DBG_INIT        0x00000002
+#define NES_DBG_ISR         0x00000004
+#define NES_DBG_PHY         0x00000008
+#define NES_DBG_NETDEV      0x00000010
+#define NES_DBG_CM          0x00000020
+#define NES_DBG_CM1         0x00000040
+#define NES_DBG_NIC_RX      0x00000080
+#define NES_DBG_NIC_TX      0x00000100
+#define NES_DBG_CQP         0x00000200
+#define NES_DBG_MMAP        0x00000400
+#define NES_DBG_MR          0x00000800
+#define NES_DBG_PD          0x00001000
+#define NES_DBG_CQ          0x00002000
+#define NES_DBG_QP          0x00004000
+#define NES_DBG_MOD_QP      0x00008000
+#define NES_DBG_AEQ         0x00010000
+#define NES_DBG_IW_RX       0x00020000
+#define NES_DBG_IW_TX       0x00040000
+#define NES_DBG_SHUTDOWN    0x00080000
+#define NES_DBG_RSVD1       0x10000000
+#define NES_DBG_RSVD2       0x20000000
+#define NES_DBG_RSVD3       0x40000000
+#define NES_DBG_RSVD4       0x80000000
+#define NES_DBG_ALL         0xffffffff
+
+#ifdef CONFIG_INFINIBAND_NES_DEBUG
+#define nes_debug(level, fmt, args...) \
+        if (level & nes_debug_level) \
+                printk(KERN_ERR PFX "%s[%u]: " fmt, __FUNCTION__, __LINE__, ##args)
+
+#define assert(expr)                                                \
+if (!(expr)) {                                                       \
+        printk(KERN_ERR PFX "Assertion failed! %s, %s, %s, line %d\n",  \
+                   #expr, __FILE__, __FUNCTION__, __LINE__);                \
+}
+
+#define NES_EVENT_TIMEOUT   1200000
+#else
+#define nes_debug(level, fmt, args...)
+#define assert(expr)          do {} while (0)
+
+#define NES_EVENT_TIMEOUT   100000
+#endif
+
+#include "nes_hw.h"
+#include "nes_verbs.h"
+#include "nes_context.h"
+#include "nes_user.h"
+#include "nes_cm.h"
+
+extern int max_mtu;
+extern int nics_per_function;
+#define max_frame_len (max_mtu+ETH_HLEN)
+extern int interrupt_mod_interval;
+extern int nes_if_count;
+extern int mpa_version;
+extern int disable_mpa_crc;
+extern unsigned int send_first;
+extern unsigned int nes_drv_opt;
+extern unsigned int nes_debug_level;
+
+extern struct list_head nes_adapter_list;
+extern struct list_head nes_dev_list;
+
+extern struct nes_cm_core *g_cm_core;
+
+extern atomic_t cm_connects;
+extern atomic_t cm_accepts;
+extern atomic_t cm_disconnects;
+extern atomic_t cm_closes;
+extern atomic_t cm_connecteds;
+extern atomic_t cm_connect_reqs;
+extern atomic_t cm_rejects;
+extern atomic_t mod_qp_timouts;
+extern atomic_t qps_created;
+extern atomic_t qps_destroyed;
+extern atomic_t sw_qps_destroyed;
+extern u32 mh_detected;
+extern u32 mh_pauses_sent;
+extern u32 cm_packets_sent;
+extern u32 cm_packets_bounced;
+extern u32 cm_packets_created;
+extern u32 cm_packets_received;
+extern u32 cm_packets_dropped;
+extern u32 cm_packets_retrans;
+extern u32 cm_listens_created;
+extern u32 cm_listens_destroyed;
+extern u32 cm_backlog_drops;
+extern atomic_t cm_loopbacks;
+extern atomic_t cm_nodes_created;
+extern atomic_t cm_nodes_destroyed;
+extern atomic_t cm_accel_dropped_pkts;
+extern atomic_t cm_resets_recvd;
+
+extern u32 crit_err_count;
+extern u32 int_mod_timer_init;
+extern u32 int_mod_cq_depth_256;
+extern u32 int_mod_cq_depth_128;
+extern u32 int_mod_cq_depth_32;
+extern u32 int_mod_cq_depth_24;
+extern u32 int_mod_cq_depth_16;
+extern u32 int_mod_cq_depth_4;
+extern u32 int_mod_cq_depth_1;
+
+extern atomic_t cqp_reqs_allocated;
+extern atomic_t cqp_reqs_freed;
+extern atomic_t cqp_reqs_dynallocated;
+extern atomic_t cqp_reqs_dynfreed;
+extern atomic_t cqp_reqs_queued;
+extern atomic_t cqp_reqs_redriven;
+
+
+struct nes_device {
+        struct nes_adapter         *nesadapter;
+        void __iomem           *regs;
+        void __iomem           *index_reg;
+        struct pci_dev         *pcidev;
+        struct net_device      *netdev[NES_NIC_MAX_NICS];
+        u64                    link_status_interrupts;
+        struct tasklet_struct  dpc_tasklet;
+        spinlock_t             indexed_regs_lock;
+        unsigned long          csr_start;
+        unsigned long          doorbell_region;
+        unsigned long          doorbell_start;
+        unsigned long          mac_tx_errors;
+        unsigned long          mac_pause_frames_sent;
+        unsigned long          mac_pause_frames_received;
+        unsigned long          mac_rx_errors;
+        unsigned long          mac_rx_crc_errors;
+        unsigned long          mac_rx_symbol_err_frames;
+        unsigned long          mac_rx_jabber_frames;
+        unsigned long          mac_rx_oversized_frames;
+        unsigned long          mac_rx_short_frames;
+        unsigned long          port_rx_discards;
+        unsigned long          port_tx_discards;
+        unsigned int           mac_index;
+        unsigned int           nes_stack_start;
+
+        /* Control Structures */
+        void                   *cqp_vbase;
+        dma_addr_t             cqp_pbase;
+        u32                    cqp_mem_size;
+        u8                     ceq_index;
+        u8                     nic_ceq_index;
+        struct nes_hw_cqp      cqp;
+        struct nes_hw_cq       ccq;
+        struct list_head       cqp_avail_reqs;
+        struct list_head       cqp_pending_reqs;
+        struct nes_cqp_request *nes_cqp_requests;
+
+        u32                    int_req;
+        u32                    int_stat;
+        u32                    timer_int_req;
+        u32                    timer_only_int_count;
+        u32                    intf_int_req;
+        u32                    last_mac_tx_pauses;
+        u32                    last_used_chunks_tx;
+        struct list_head       list;
+
+        u16                    base_doorbell_index;
+        u16                    currcq_count;
+        u16                    deepcq_count;
+        u8                     msi_enabled;
+        u8                     netdev_count;
+        u8                     napi_isr_ran;
+        u8                     disable_rx_flow_control;
+        u8                     disable_tx_flow_control;
+};
+
+
+static inline void
+set_wqe_64bit_value(__le32 *wqe_words, u32 index, u64 value)
+{
+        wqe_words[index]     = cpu_to_le32((u32) ((unsigned long)value));
+        wqe_words[index + 1] = cpu_to_le32((u32)(upper_32_bits((unsigned long)value)));
+}
+
+static inline void
+set_wqe_32bit_value(__le32 *wqe_words, u32 index, u32 value)
+{
+        wqe_words[index] = cpu_to_le32(value);
+}
+
+static inline void
+nes_fill_init_cqp_wqe(struct nes_hw_cqp_wqe *cqp_wqe, struct nes_device *nesdev)
+{
+        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_COMP_CTX_LOW_IDX,
+                        (u64)((unsigned long) &nesdev->cqp));
+        cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX]   = 0;
+        cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX]  = 0;
+        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX] = 0;
+        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_LEN_IDX]       = 0;
+        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_LOW_IDX]       = 0;
+        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_LOW_IDX]        = 0;
+        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_HIGH_IDX]       = 0;
+}
+
+static inline void
+nes_fill_init_qp_wqe(struct nes_hw_qp_wqe *wqe, struct nes_qp *nesqp, u32 head)
+{
+        u32 value;
+        value = ((u32)((unsigned long) nesqp)) | head;
+        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_HIGH_IDX,
+                        (u32)(upper_32_bits((unsigned long)(nesqp))));
+        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX, value);
+}
+
+/* Read from memory-mapped device */
+static inline u32 nes_read_indexed(struct nes_device *nesdev, u32 reg_index)
+{
+        unsigned long flags;
+        void __iomem *addr = nesdev->index_reg;
+        u32 value;
+
+        spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
+
+        writel(reg_index, addr);
+        value = readl((void __iomem *)addr + 4);
+
+        spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
+        return value;
+}
+
+static inline u32 nes_read32(const void __iomem *addr)
+{
+        return readl(addr);
+}
+
+static inline u16 nes_read16(const void __iomem *addr)
+{
+        return readw(addr);
+}
+
+static inline u8 nes_read8(const void __iomem *addr)
+{
+        return readb(addr);
+}
+
+/* Write to memory-mapped device */
+static inline void nes_write_indexed(struct nes_device *nesdev, u32 reg_index, u32 val)
+{
+        unsigned long flags;
+        void __iomem *addr = nesdev->index_reg;
+
+        spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
+
+        writel(reg_index, addr);
+        writel(val, (void __iomem *)addr + 4);
+
+        spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
+}
+
+static inline void nes_write32(void __iomem *addr, u32 val)
+{
+        writel(val, addr);
+}
+
+static inline void nes_write16(void __iomem *addr, u16 val)
+{
+        writew(val, addr);
+}
+
+static inline void nes_write8(void __iomem *addr, u8 val)
+{
+        writeb(val, addr);
+}
+
+
+
+static inline int nes_alloc_resource(struct nes_adapter *nesadapter,
+                unsigned long *resource_array, u32 max_resources,
+                u32 *req_resource_num, u32 *next)
+{
+        unsigned long flags;
+        u32 resource_num;
+
+        spin_lock_irqsave(&nesadapter->resource_lock, flags);
+
+        resource_num = find_next_zero_bit(resource_array, max_resources, *next);
+        if (resource_num >= max_resources) {
+                resource_num = find_first_zero_bit(resource_array, max_resources);
+                if (resource_num >= max_resources) {
+                        printk(KERN_ERR PFX "%s: No available resourcess.\n", __FUNCTION__);
+                        spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
+                        return -EMFILE;
+                }
+        }
+        set_bit(resource_num, resource_array);
+        *next = resource_num+1;
+        if (*next == max_resources) {
+                *next = 0;
+        }
+        spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
+        *req_resource_num = resource_num;
+
+        return 0;
+}
+
+static inline int nes_is_resource_allocated(struct nes_adapter *nesadapter,
+                unsigned long *resource_array, u32 resource_num)
+{
+        unsigned long flags;
+        int bit_is_set;
+
+        spin_lock_irqsave(&nesadapter->resource_lock, flags);
+
+        bit_is_set = test_bit(resource_num, resource_array);
+        nes_debug(NES_DBG_HW, "resource_num %u is%s allocated.\n",
+                        resource_num, (bit_is_set ? "": " not"));
+        spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
+
+        return bit_is_set;
+}
+
+static inline void nes_free_resource(struct nes_adapter *nesadapter,
+                unsigned long *resource_array, u32 resource_num)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&nesadapter->resource_lock, flags);
+        clear_bit(resource_num, resource_array);
+        spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
+}
+
+static inline struct nes_vnic *to_nesvnic(struct ib_device *ibdev)
+{
+        return container_of(ibdev, struct nes_ib_device, ibdev)->nesvnic;
+}
+
+static inline struct nes_pd *to_nespd(struct ib_pd *ibpd)
+{
+        return container_of(ibpd, struct nes_pd, ibpd);
+}
+
+static inline struct nes_ucontext *to_nesucontext(struct ib_ucontext *ibucontext)
+{
+        return container_of(ibucontext, struct nes_ucontext, ibucontext);
+}
+
+static inline struct nes_mr *to_nesmr(struct ib_mr *ibmr)
+{
+        return container_of(ibmr, struct nes_mr, ibmr);
+}
+
+static inline struct nes_mr *to_nesmr_from_ibfmr(struct ib_fmr *ibfmr)
+{
+        return container_of(ibfmr, struct nes_mr, ibfmr);
+}
+
+static inline struct nes_mr *to_nesmw(struct ib_mw *ibmw)
+{
+        return container_of(ibmw, struct nes_mr, ibmw);
+}
+
+static inline struct nes_fmr *to_nesfmr(struct nes_mr *nesmr)
+{
+        return container_of(nesmr, struct nes_fmr, nesmr);
+}
+
+static inline struct nes_cq *to_nescq(struct ib_cq *ibcq)
+{
+        return container_of(ibcq, struct nes_cq, ibcq);
+}
+
+static inline struct nes_qp *to_nesqp(struct ib_qp *ibqp)
+{
+        return container_of(ibqp, struct nes_qp, ibqp);
+}
+
+
+
+/* nes.c */
+void nes_add_ref(struct ib_qp *);
+void nes_rem_ref(struct ib_qp *);
+struct ib_qp *nes_get_qp(struct ib_device *, int);
+
+
+/* nes_hw.c */
+struct nes_adapter *nes_init_adapter(struct nes_device *, u8);
+void  nes_nic_init_timer_defaults(struct nes_device *, u8);
+unsigned int nes_reset_adapter_ne020(struct nes_device *, u8 *);
+int nes_init_serdes(struct nes_device *, u8, u8, u8);
+void nes_init_csr_ne020(struct nes_device *, u8, u8);
+void nes_destroy_adapter(struct nes_adapter *);
+int nes_init_cqp(struct nes_device *);
+int nes_init_phy(struct nes_device *);
+int nes_init_nic_qp(struct nes_device *, struct net_device *);
+void nes_destroy_nic_qp(struct nes_vnic *);
+int nes_napi_isr(struct nes_device *);
+void nes_dpc(unsigned long);
+void nes_process_ceq(struct nes_device *, struct nes_hw_ceq *);
+void nes_process_aeq(struct nes_device *, struct nes_hw_aeq *);
+void nes_process_mac_intr(struct nes_device *, u32);
+void nes_nic_napi_ce_handler(struct nes_device *, struct nes_hw_nic_cq *);
+void nes_nic_ce_handler(struct nes_device *, struct nes_hw_nic_cq *);
+void nes_cqp_ce_handler(struct nes_device *, struct nes_hw_cq *);
+void nes_process_iwarp_aeqe(struct nes_device *, struct nes_hw_aeqe *);
+void nes_iwarp_ce_handler(struct nes_device *, struct nes_hw_cq *);
+int nes_destroy_cqp(struct nes_device *);
+int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
+
+/* nes_nic.c */
+void nes_netdev_set_multicast_list(struct net_device *);
+void nes_netdev_exit(struct nes_vnic *);
+struct net_device *nes_netdev_init(struct nes_device *, void __iomem *);
+void nes_netdev_destroy(struct net_device *);
+int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
+
+/* nes_cm.c */
+void *nes_cm_create(struct net_device *);
+int nes_cm_recv(struct sk_buff *, struct net_device *);
+void nes_update_arp(unsigned char *, u32, u32, u16, u16);
+void nes_manage_arp_cache(struct net_device *, unsigned char *, u32, u32);
+void nes_sock_release(struct nes_qp *, unsigned long *);
+struct nes_cm_core *nes_cm_alloc_core(void);
+void flush_wqes(struct nes_device *nesdev, struct nes_qp *, u32, u32);
+int nes_manage_apbvt(struct nes_vnic *, u32, u32, u32);
+int nes_cm_disconn(struct nes_qp *);
+void nes_cm_disconn_worker(void *);
+
+/* nes_verbs.c */
+int nes_hw_modify_qp(struct nes_device *, struct nes_qp *, u32, u32);
+int nes_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
+struct nes_ib_device *nes_init_ofa_device(struct net_device *);
+void nes_destroy_ofa_device(struct nes_ib_device *);
+int nes_register_ofa_device(struct nes_ib_device *);
+void nes_unregister_ofa_device(struct nes_ib_device *);
+
+/* nes_util.c */
+int nes_read_eeprom_values(struct nes_device *, struct nes_adapter *);
+void nes_write_1G_phy_reg(struct nes_device *, u8, u8, u16);
+void nes_read_1G_phy_reg(struct nes_device *, u8, u8, u16 *);
+void nes_write_10G_phy_reg(struct nes_device *, u16, u8, u16);
+void nes_read_10G_phy_reg(struct nes_device *, u16, u8);
+struct nes_cqp_request *nes_get_cqp_request(struct nes_device *);
+void nes_post_cqp_request(struct nes_device *, struct nes_cqp_request *, int);
+int nes_arp_table(struct nes_device *, u32, u8 *, u32);
+void nes_mh_fix(unsigned long);
+void nes_clc(unsigned long);
+void nes_dump_mem(unsigned int, void *, int);
+u32 nes_crc32(u32, u32, u32, u32, u8 *, u32, u32, u32);
+
+#endif  /* __NES_H */
diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c
new file mode 100644
index 000000000000..bd5cfeaac203
--- /dev/null
+++ b/drivers/infiniband/hw/nes/nes_cm.c
@@ -0,0 +1,3088 @@
+/*
+ * Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+
+#define TCPOPT_TIMESTAMP 8
+
+#include <asm/atomic.h>
+#include <linux/skbuff.h>
+#include <linux/ip.h>
+#include <linux/tcp.h>
+#include <linux/init.h>
+#include <linux/if_arp.h>
+#include <linux/notifier.h>
+#include <linux/net.h>
+#include <linux/types.h>
+#include <linux/timer.h>
+#include <linux/time.h>
+#include <linux/delay.h>
+#include <linux/etherdevice.h>
+#include <linux/netdevice.h>
+#include <linux/random.h>
+#include <linux/list.h>
+#include <linux/threads.h>
+
+#include <net/neighbour.h>
+#include <net/route.h>
+#include <net/ip_fib.h>
+
+#include "nes.h"
+
+u32 cm_packets_sent;
+u32 cm_packets_bounced;
+u32 cm_packets_dropped;
+u32 cm_packets_retrans;
+u32 cm_packets_created;
+u32 cm_packets_received;
+u32 cm_listens_created;
+u32 cm_listens_destroyed;
+u32 cm_backlog_drops;
+atomic_t cm_loopbacks;
+atomic_t cm_nodes_created;
+atomic_t cm_nodes_destroyed;
+atomic_t cm_accel_dropped_pkts;
+atomic_t cm_resets_recvd;
+
+static inline int mini_cm_accelerated(struct nes_cm_core *, struct nes_cm_node *);
+static struct nes_cm_listener *mini_cm_listen(struct nes_cm_core *,
+                struct nes_vnic *, struct nes_cm_info *);
+static int add_ref_cm_node(struct nes_cm_node *);
+static int rem_ref_cm_node(struct nes_cm_core *, struct nes_cm_node *);
+static int mini_cm_del_listen(struct nes_cm_core *, struct nes_cm_listener *);
+
+
+/* External CM API Interface */
+/* instance of function pointers for client API */
+/* set address of this instance to cm_core->cm_ops at cm_core alloc */
+static struct nes_cm_ops nes_cm_api = {
+        mini_cm_accelerated,
+        mini_cm_listen,
+        mini_cm_del_listen,
+        mini_cm_connect,
+        mini_cm_close,
+        mini_cm_accept,
+        mini_cm_reject,
+        mini_cm_recv_pkt,
+        mini_cm_dealloc_core,
+        mini_cm_get,
+        mini_cm_set
+};
+
+struct nes_cm_core *g_cm_core;
+
+atomic_t cm_connects;
+atomic_t cm_accepts;
+atomic_t cm_disconnects;
+atomic_t cm_closes;
+atomic_t cm_connecteds;
+atomic_t cm_connect_reqs;
+atomic_t cm_rejects;
+
+
+/**
+ * create_event
+ */
+static struct nes_cm_event *create_event(struct nes_cm_node *cm_node,
+                enum nes_cm_event_type type)
+{
+        struct nes_cm_event *event;
+
+        if (!cm_node->cm_id)
+                return NULL;
+
+        /* allocate an empty event */
+        event = kzalloc(sizeof(*event), GFP_ATOMIC);
+
+        if (!event)
+                return NULL;
+
+        event->type = type;
+        event->cm_node = cm_node;
+        event->cm_info.rem_addr = cm_node->rem_addr;
+        event->cm_info.loc_addr = cm_node->loc_addr;
+        event->cm_info.rem_port = cm_node->rem_port;
+        event->cm_info.loc_port = cm_node->loc_port;
+        event->cm_info.cm_id = cm_node->cm_id;
+
+        nes_debug(NES_DBG_CM, "Created event=%p, type=%u, dst_addr=%08x[%x],"
+                        " src_addr=%08x[%x]\n",
+                        event, type,
+                        event->cm_info.loc_addr, event->cm_info.loc_port,
+                        event->cm_info.rem_addr, event->cm_info.rem_port);
+
+        nes_cm_post_event(event);
+        return event;
+}
+
+
+/**
+ * send_mpa_request
+ */
+int send_mpa_request(struct nes_cm_node *cm_node)
+{
+        struct sk_buff *skb;
+        int ret;
+
+        skb = get_free_pkt(cm_node);
+        if (!skb) {
+                nes_debug(NES_DBG_CM, "Failed to get a Free pkt\n");
+                return -1;
+        }
+
+        /* send an MPA Request frame */
+        form_cm_frame(skb, cm_node, NULL, 0, &cm_node->mpa_frame,
+                        cm_node->mpa_frame_size, SET_ACK);
+
+        ret = schedule_nes_timer(cm_node, skb, NES_TIMER_TYPE_SEND, 1, 0);
+        if (ret < 0) {
+                return ret;
+        }
+
+        return 0;
+}
+
+
+/**
+ * recv_mpa - process a received TCP pkt, we are expecting an
+ * IETF MPA frame
+ */
+static int parse_mpa(struct nes_cm_node *cm_node, u8 *buffer, u32 len)
+{
+        struct ietf_mpa_frame *mpa_frame;
+
+        /* assume req frame is in tcp data payload */
+        if (len < sizeof(struct ietf_mpa_frame)) {
+                nes_debug(NES_DBG_CM, "The received ietf buffer was too small (%x)\n", len);
+                return -1;
+        }
+
+        mpa_frame = (struct ietf_mpa_frame *)buffer;
+        cm_node->mpa_frame_size = ntohs(mpa_frame->priv_data_len);
+
+        if (cm_node->mpa_frame_size + sizeof(struct ietf_mpa_frame) != len) {
+                nes_debug(NES_DBG_CM, "The received ietf buffer was not right"
+                                " complete (%x + %x != %x)\n",
+                                cm_node->mpa_frame_size, (u32)sizeof(struct ietf_mpa_frame), len);
+                return -1;
+        }
+
+        /* copy entire MPA frame to our cm_node's frame */
+        memcpy(cm_node->mpa_frame_buf, buffer + sizeof(struct ietf_mpa_frame),
+                        cm_node->mpa_frame_size);
+
+        return 0;
+}
+
+
+/**
+ * handle_exception_pkt - process an exception packet.
+ * We have been in a TSA state, and we have now received SW
+ * TCP/IP traffic should be a FIN request or IP pkt with options
+ */
+static int handle_exception_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb)
+{
+        int ret = 0;
+        struct tcphdr *tcph = tcp_hdr(skb);
+
+        /* first check to see if this a FIN pkt */
+        if (tcph->fin) {
+                /* we need to ACK the FIN request */
+                send_ack(cm_node);
+
+                /* check which side we are (client/server) and set next state accordingly */
+                if (cm_node->tcp_cntxt.client)
+                        cm_node->state = NES_CM_STATE_CLOSING;
+                else {
+                        /* we are the server side */
+                        cm_node->state = NES_CM_STATE_CLOSE_WAIT;
+                        /* since this is a self contained CM we don't wait for */
+                        /* an APP to close us, just send final FIN immediately */
+                        ret = send_fin(cm_node, NULL);
+                        cm_node->state = NES_CM_STATE_LAST_ACK;
+                }
+        } else {
+                ret = -EINVAL;
+        }
+
+        return ret;
+}
+
+
+/**
+ * form_cm_frame - get a free packet and build empty frame Use
+ * node info to build.
+ */
+struct sk_buff *form_cm_frame(struct sk_buff *skb, struct nes_cm_node *cm_node,
+                void *options, u32 optionsize, void *data, u32 datasize, u8 flags)
+{
+        struct tcphdr *tcph;
+        struct iphdr *iph;
+        struct ethhdr *ethh;
+        u8 *buf;
+        u16 packetsize = sizeof(*iph);
+
+        packetsize += sizeof(*tcph);
+        packetsize +=  optionsize + datasize;
+
+        memset(skb->data, 0x00, ETH_HLEN + sizeof(*iph) + sizeof(*tcph));
+
+        skb->len = 0;
+        buf = skb_put(skb, packetsize + ETH_HLEN);
+
+        ethh = (struct ethhdr *) buf;
+        buf += ETH_HLEN;
+
+        iph = (struct iphdr *)buf;
+        buf += sizeof(*iph);
+        tcph = (struct tcphdr *)buf;
+        skb_reset_mac_header(skb);
+        skb_set_network_header(skb, ETH_HLEN);
+        skb_set_transport_header(skb, ETH_HLEN+sizeof(*iph));
+        buf += sizeof(*tcph);
+
+        skb->ip_summed = CHECKSUM_PARTIAL;
+        skb->protocol = htons(0x800);
+        skb->data_len = 0;
+        skb->mac_len = ETH_HLEN;
+
+        memcpy(ethh->h_dest, cm_node->rem_mac, ETH_ALEN);
+        memcpy(ethh->h_source, cm_node->loc_mac, ETH_ALEN);
+        ethh->h_proto = htons(0x0800);
+
+        iph->version = IPVERSION;
+        iph->ihl = 5;           /* 5 * 4Byte words, IP headr len */
+        iph->tos = 0;
+        iph->tot_len = htons(packetsize);
+        iph->id = htons(++cm_node->tcp_cntxt.loc_id);
+
+        iph->frag_off = htons(0x4000);
+        iph->ttl = 0x40;
+        iph->protocol = 0x06;   /* IPPROTO_TCP */
+
+        iph->saddr = htonl(cm_node->loc_addr);
+        iph->daddr = htonl(cm_node->rem_addr);
+
+        tcph->source = htons(cm_node->loc_port);
+        tcph->dest = htons(cm_node->rem_port);
+        tcph->seq = htonl(cm_node->tcp_cntxt.loc_seq_num);
+
+        if (flags & SET_ACK) {
+                cm_node->tcp_cntxt.loc_ack_num = cm_node->tcp_cntxt.rcv_nxt;
+                tcph->ack_seq = htonl(cm_node->tcp_cntxt.loc_ack_num);
+                tcph->ack = 1;
+        } else
+                tcph->ack_seq = 0;
+
+        if (flags & SET_SYN) {
+                cm_node->tcp_cntxt.loc_seq_num++;
+                tcph->syn = 1;
+        } else
+                cm_node->tcp_cntxt.loc_seq_num += datasize;     /* data (no headers) */
+
+        if (flags & SET_FIN)
+                tcph->fin = 1;
+
+        if (flags & SET_RST)
+                tcph->rst = 1;
+
+        tcph->doff = (u16)((sizeof(*tcph) + optionsize + 3) >> 2);
+        tcph->window = htons(cm_node->tcp_cntxt.rcv_wnd);
+        tcph->urg_ptr = 0;
+        if (optionsize)
+                memcpy(buf, options, optionsize);
+        buf += optionsize;
+        if (datasize)
+                memcpy(buf, data, datasize);
+
+        skb_shinfo(skb)->nr_frags = 0;
+        cm_packets_created++;
+
+        return skb;
+}
+
+
+/**
+ * print_core - dump a cm core
+ */
+static void print_core(struct nes_cm_core *core)
+{
+        nes_debug(NES_DBG_CM, "---------------------------------------------\n");
+        nes_debug(NES_DBG_CM, "CM Core  -- (core = %p )\n", core);
+        if (!core)
+                return;
+        nes_debug(NES_DBG_CM, "---------------------------------------------\n");
+        nes_debug(NES_DBG_CM, "Session ID    : %u \n", atomic_read(&core->session_id));
+
+        nes_debug(NES_DBG_CM, "State         : %u \n",  core->state);
+
+        nes_debug(NES_DBG_CM, "Tx Free cnt   : %u \n", skb_queue_len(&core->tx_free_list));
+        nes_debug(NES_DBG_CM, "Listen Nodes  : %u \n", atomic_read(&core->listen_node_cnt));
+        nes_debug(NES_DBG_CM, "Active Nodes  : %u \n", atomic_read(&core->node_cnt));
+
+        nes_debug(NES_DBG_CM, "core          : %p \n", core);
+
+        nes_debug(NES_DBG_CM, "-------------- end core ---------------\n");
+}
+
+
+/**
+ * schedule_nes_timer
+ * note - cm_node needs to be protected before calling this. Encase in:
+ *                      rem_ref_cm_node(cm_core, cm_node);add_ref_cm_node(cm_node);
+ */
+int schedule_nes_timer(struct nes_cm_node *cm_node, struct sk_buff *skb,
+                enum nes_timer_type type, int send_retrans,
+                int close_when_complete)
+{
+        unsigned long  flags;
+        struct nes_cm_core *cm_core;
+        struct nes_timer_entry *new_send;
+        int ret = 0;
+        u32 was_timer_set;
+
+        new_send = kzalloc(sizeof(*new_send), GFP_ATOMIC);
+        if (!new_send)
+                return -1;
+        if (!cm_node)
+                return -EINVAL;
+
+        /* new_send->timetosend = currenttime */
+        new_send->retrycount = NES_DEFAULT_RETRYS;
+        new_send->retranscount = NES_DEFAULT_RETRANS;
+        new_send->skb = skb;
+        new_send->timetosend = jiffies;
+        new_send->type = type;
+        new_send->netdev = cm_node->netdev;
+        new_send->send_retrans = send_retrans;
+        new_send->close_when_complete = close_when_complete;
+
+        if (type == NES_TIMER_TYPE_CLOSE) {
+                new_send->timetosend += (HZ/2); /* TODO: decide on the correct value here */
+                spin_lock_irqsave(&cm_node->recv_list_lock, flags);
+                list_add_tail(&new_send->list, &cm_node->recv_list);
+                spin_unlock_irqrestore(&cm_node->recv_list_lock, flags);
+        }
+
+        if (type == NES_TIMER_TYPE_SEND) {
+                new_send->seq_num = htonl(tcp_hdr(skb)->seq);
+                atomic_inc(&new_send->skb->users);
+
+                ret = nes_nic_cm_xmit(new_send->skb, cm_node->netdev);
+                if (ret != NETDEV_TX_OK) {
+                        nes_debug(NES_DBG_CM, "Error sending packet %p (jiffies = %lu)\n",
+                                        new_send, jiffies);
+                        atomic_dec(&new_send->skb->users);
+                        new_send->timetosend = jiffies;
+                } else {
+                        cm_packets_sent++;
+                        if (!send_retrans) {
+                                if (close_when_complete)
+                                        rem_ref_cm_node(cm_node->cm_core, cm_node);
+                                dev_kfree_skb_any(new_send->skb);
+                                kfree(new_send);
+                                return ret;
+                        }
+                        new_send->timetosend = jiffies + NES_RETRY_TIMEOUT;
+                }
+                spin_lock_irqsave(&cm_node->retrans_list_lock, flags);
+                list_add_tail(&new_send->list, &cm_node->retrans_list);
+                spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags);
+        }
+        if (type == NES_TIMER_TYPE_RECV) {
+                new_send->seq_num = htonl(tcp_hdr(skb)->seq);
+                new_send->timetosend = jiffies;
+                spin_lock_irqsave(&cm_node->recv_list_lock, flags);
+                list_add_tail(&new_send->list, &cm_node->recv_list);
+                spin_unlock_irqrestore(&cm_node->recv_list_lock, flags);
+        }
+        cm_core = cm_node->cm_core;
+
+        was_timer_set = timer_pending(&cm_core->tcp_timer);
+
+        if (!was_timer_set) {
+                cm_core->tcp_timer.expires = new_send->timetosend;
+                add_timer(&cm_core->tcp_timer);
+        }
+
+        return ret;
+}
+
+
+/**
+ * nes_cm_timer_tick
+ */
+void nes_cm_timer_tick(unsigned long pass)
+{
+        unsigned long flags, qplockflags;
+        unsigned long nexttimeout = jiffies + NES_LONG_TIME;
+        struct iw_cm_id *cm_id;
+        struct nes_cm_node *cm_node;
+        struct nes_timer_entry *send_entry, *recv_entry;
+        struct list_head *list_core, *list_core_temp;
+        struct list_head *list_node, *list_node_temp;
+        struct nes_cm_core *cm_core = g_cm_core;
+        struct nes_qp *nesqp;
+        struct sk_buff *skb;
+        u32 settimer = 0;
+        int ret = NETDEV_TX_OK;
+        int    node_done;
+
+        spin_lock_irqsave(&cm_core->ht_lock, flags);
+
+        list_for_each_safe(list_node, list_core_temp, &cm_core->connected_nodes) {
+                cm_node = container_of(list_node, struct nes_cm_node, list);
+                add_ref_cm_node(cm_node);
+                spin_unlock_irqrestore(&cm_core->ht_lock, flags);
+                spin_lock_irqsave(&cm_node->recv_list_lock, flags);
+                list_for_each_safe(list_core, list_node_temp, &cm_node->recv_list) {
+                        recv_entry = container_of(list_core, struct nes_timer_entry, list);
+                        if ((time_after(recv_entry->timetosend, jiffies)) &&
+                                        (recv_entry->type == NES_TIMER_TYPE_CLOSE)) {
+                                if (nexttimeout > recv_entry->timetosend || !settimer) {
+                                        nexttimeout = recv_entry->timetosend;
+                                        settimer = 1;
+                                }
+                                continue;
+                        }
+                        list_del(&recv_entry->list);
+                        cm_id = cm_node->cm_id;
+                        spin_unlock_irqrestore(&cm_node->recv_list_lock, flags);
+                        if (recv_entry->type == NES_TIMER_TYPE_CLOSE) {
+                                nesqp = (struct nes_qp *)recv_entry->skb;
+                                spin_lock_irqsave(&nesqp->lock, qplockflags);
+                                if (nesqp->cm_id) {
+                                        nes_debug(NES_DBG_CM, "QP%u: cm_id = %p, refcount = %d: "
+                                                        "****** HIT A NES_TIMER_TYPE_CLOSE"
+                                                        " with something to do!!! ******\n",
+                                                        nesqp->hwqp.qp_id, cm_id,
+                                                        atomic_read(&nesqp->refcount));
+                                        nesqp->hw_tcp_state = NES_AEQE_TCP_STATE_CLOSED;
+                                        nesqp->last_aeq = NES_AEQE_AEID_RESET_SENT;
+                                        nesqp->ibqp_state = IB_QPS_ERR;
+                                        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                        nes_cm_disconn(nesqp);
+                                } else {
+                                        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                        nes_debug(NES_DBG_CM, "QP%u: cm_id = %p, refcount = %d:"
+                                                        " ****** HIT A NES_TIMER_TYPE_CLOSE"
+                                                        " with nothing to do!!! ******\n",
+                                                        nesqp->hwqp.qp_id, cm_id,
+                                                        atomic_read(&nesqp->refcount));
+                                        nes_rem_ref(&nesqp->ibqp);
+                                }
+                                if (cm_id)
+                                        cm_id->rem_ref(cm_id);
+                        }
+                        kfree(recv_entry);
+                        spin_lock_irqsave(&cm_node->recv_list_lock, flags);
+                }
+                spin_unlock_irqrestore(&cm_node->recv_list_lock, flags);
+
+                spin_lock_irqsave(&cm_node->retrans_list_lock, flags);
+                node_done = 0;
+                list_for_each_safe(list_core, list_node_temp, &cm_node->retrans_list) {
+                        if (node_done) {
+                                break;
+                        }
+                        send_entry = container_of(list_core, struct nes_timer_entry, list);
+                        if (time_after(send_entry->timetosend, jiffies)) {
+                                if (cm_node->state != NES_CM_STATE_TSA) {
+                                        if ((nexttimeout > send_entry->timetosend) || !settimer) {
+                                                nexttimeout = send_entry->timetosend;
+                                                settimer = 1;
+                                        }
+                                        node_done = 1;
+                                        continue;
+                                } else {
+                                        list_del(&send_entry->list);
+                                        skb = send_entry->skb;
+                                        spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags);
+                                        dev_kfree_skb_any(skb);
+                                        kfree(send_entry);
+                                        spin_lock_irqsave(&cm_node->retrans_list_lock, flags);
+                                        continue;
+                                }
+                        }
+                        if (send_entry->type == NES_TIMER_NODE_CLEANUP) {
+                                list_del(&send_entry->list);
+                                spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags);
+                                kfree(send_entry);
+                                spin_lock_irqsave(&cm_node->retrans_list_lock, flags);
+                                continue;
+                        }
+                        if ((send_entry->seq_num < cm_node->tcp_cntxt.rem_ack_num) ||
+                                        (cm_node->state == NES_CM_STATE_TSA) ||
+                                        (cm_node->state == NES_CM_STATE_CLOSED)) {
+                                skb = send_entry->skb;
+                                list_del(&send_entry->list);
+                                spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags);
+                                kfree(send_entry);
+                                dev_kfree_skb_any(skb);
+                                spin_lock_irqsave(&cm_node->retrans_list_lock, flags);
+                                continue;
+                        }
+
+                        if (!send_entry->retranscount || !send_entry->retrycount) {
+                                cm_packets_dropped++;
+                                skb = send_entry->skb;
+                                list_del(&send_entry->list);
+                                spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags);
+                                dev_kfree_skb_any(skb);
+                                kfree(send_entry);
+                                if (cm_node->state == NES_CM_STATE_SYN_RCVD) {
+                                        /* this node never even generated an indication up to the cm */
+                                        rem_ref_cm_node(cm_core, cm_node);
+                                } else {
+                                        cm_node->state = NES_CM_STATE_CLOSED;
+                                        create_event(cm_node, NES_CM_EVENT_ABORTED);
+                                }
+                                spin_lock_irqsave(&cm_node->retrans_list_lock, flags);
+                                continue;
+                        }
+                        /* this seems like the correct place, but leave send entry unprotected */
+                        // spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags);
+                        atomic_inc(&send_entry->skb->users);
+                        cm_packets_retrans++;
+                        nes_debug(NES_DBG_CM, "Retransmitting send_entry %p for node %p,"
+                                        " jiffies = %lu, time to send =  %lu, retranscount = %u, "
+                                        "send_entry->seq_num = 0x%08X, cm_node->tcp_cntxt.rem_ack_num = 0x%08X\n",
+                                        send_entry, cm_node, jiffies, send_entry->timetosend, send_entry->retranscount,
+                                        send_entry->seq_num, cm_node->tcp_cntxt.rem_ack_num);
+
+                        spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags);
+                        ret = nes_nic_cm_xmit(send_entry->skb, cm_node->netdev);
+                        if (ret != NETDEV_TX_OK) {
+                                cm_packets_bounced++;
+                                atomic_dec(&send_entry->skb->users);
+                                send_entry->retrycount--;
+                                nexttimeout = jiffies + NES_SHORT_TIME;
+                                settimer = 1;
+                                node_done = 1;
+                                spin_lock_irqsave(&cm_node->retrans_list_lock, flags);
+                                continue;
+                        } else {
+                                cm_packets_sent++;
+                        }
+                        spin_lock_irqsave(&cm_node->retrans_list_lock, flags);
+                        list_del(&send_entry->list);
+                        nes_debug(NES_DBG_CM, "Packet Sent: retrans count = %u, retry count = %u.\n",
+                                        send_entry->retranscount, send_entry->retrycount);
+                        if (send_entry->send_retrans) {
+                                send_entry->retranscount--;
+                                send_entry->timetosend = jiffies + NES_RETRY_TIMEOUT;
+                                if (nexttimeout > send_entry->timetosend || !settimer) {
+                                        nexttimeout = send_entry->timetosend;
+                                        settimer = 1;
+                                }
+                                list_add(&send_entry->list, &cm_node->retrans_list);
+                                continue;
+                        } else {
+                                int close_when_complete;
+                                skb = send_entry->skb;
+                                close_when_complete = send_entry->close_when_complete;
+                                spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags);
+                                if (close_when_complete) {
+                                        BUG_ON(atomic_read(&cm_node->ref_count) == 1);
+                                        rem_ref_cm_node(cm_core, cm_node);
+                                }
+                                dev_kfree_skb_any(skb);
+                                kfree(send_entry);
+                                spin_lock_irqsave(&cm_node->retrans_list_lock, flags);
+                                continue;
+                        }
+                }
+                spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags);
+
+                rem_ref_cm_node(cm_core, cm_node);
+
+                spin_lock_irqsave(&cm_core->ht_lock, flags);
+                if (ret != NETDEV_TX_OK)
+                        break;
+        }
+        spin_unlock_irqrestore(&cm_core->ht_lock, flags);
+
+        if (settimer) {
+                if (!timer_pending(&cm_core->tcp_timer)) {
+                        cm_core->tcp_timer.expires  = nexttimeout;
+                        add_timer(&cm_core->tcp_timer);
+                }
+        }
+}
+
+
+/**
+ * send_syn
+ */
+int send_syn(struct nes_cm_node *cm_node, u32 sendack)
+{
+        int ret;
+        int flags = SET_SYN;
+        struct sk_buff *skb;
+        char optionsbuffer[sizeof(struct option_mss) +
+                        sizeof(struct option_windowscale) +
+                        sizeof(struct option_base) + 1];
+
+        int optionssize = 0;
+        /* Sending MSS option */
+        union all_known_options *options;
+
+        if (!cm_node)
+                return -EINVAL;
+
+        options = (union all_known_options *)&optionsbuffer[optionssize];
+        options->as_mss.optionnum = OPTION_NUMBER_MSS;
+        options->as_mss.length = sizeof(struct option_mss);
+        options->as_mss.mss = htons(cm_node->tcp_cntxt.mss);
+        optionssize += sizeof(struct option_mss);
+
+        options = (union all_known_options *)&optionsbuffer[optionssize];
+        options->as_windowscale.optionnum = OPTION_NUMBER_WINDOW_SCALE;
+        options->as_windowscale.length = sizeof(struct option_windowscale);
+        options->as_windowscale.shiftcount = cm_node->tcp_cntxt.rcv_wscale;
+        optionssize += sizeof(struct option_windowscale);
+
+        if (sendack && !(NES_DRV_OPT_SUPRESS_OPTION_BC & nes_drv_opt)
+                        ) {
+                options = (union all_known_options *)&optionsbuffer[optionssize];
+                options->as_base.optionnum = OPTION_NUMBER_WRITE0;
+                options->as_base.length = sizeof(struct option_base);
+                optionssize += sizeof(struct option_base);
+                /* we need the size to be a multiple of 4 */
+                options = (union all_known_options *)&optionsbuffer[optionssize];
+                options->as_end = 1;
+                optionssize += 1;
+                options = (union all_known_options *)&optionsbuffer[optionssize];
+                options->as_end = 1;
+                optionssize += 1;
+        }
+
+        options = (union all_known_options *)&optionsbuffer[optionssize];
+        options->as_end = OPTION_NUMBER_END;
+        optionssize += 1;
+
+        skb = get_free_pkt(cm_node);
+        if (!skb) {
+                nes_debug(NES_DBG_CM, "Failed to get a Free pkt\n");
+                return -1;
+        }
+
+        if (sendack)
+                flags |= SET_ACK;
+
+        form_cm_frame(skb, cm_node, optionsbuffer, optionssize, NULL, 0, flags);
+        ret = schedule_nes_timer(cm_node, skb, NES_TIMER_TYPE_SEND, 1, 0);
+
+        return ret;
+}
+
+
+/**
+ * send_reset
+ */
+int send_reset(struct nes_cm_node *cm_node)
+{
+        int ret;
+        struct sk_buff *skb = get_free_pkt(cm_node);
+        int flags = SET_RST | SET_ACK;
+
+        if (!skb) {
+                nes_debug(NES_DBG_CM, "Failed to get a Free pkt\n");
+                return -1;
+        }
+
+        add_ref_cm_node(cm_node);
+        form_cm_frame(skb, cm_node, NULL, 0, NULL, 0, flags);
+        ret = schedule_nes_timer(cm_node, skb, NES_TIMER_TYPE_SEND, 0, 1);
+
+        return ret;
+}
+
+
+/**
+ * send_ack
+ */
+int send_ack(struct nes_cm_node *cm_node)
+{
+        int ret;
+        struct sk_buff *skb = get_free_pkt(cm_node);
+
+        if (!skb) {
+                nes_debug(NES_DBG_CM, "Failed to get a Free pkt\n");
+                return -1;
+        }
+
+        form_cm_frame(skb, cm_node, NULL, 0, NULL, 0, SET_ACK);
+        ret = schedule_nes_timer(cm_node, skb, NES_TIMER_TYPE_SEND, 0, 0);
+
+        return ret;
+}
+
+
+/**
+ * send_fin
+ */
+int send_fin(struct nes_cm_node *cm_node, struct sk_buff *skb)
+{
+        int ret;
+
+        /* if we didn't get a frame get one */
+        if (!skb)
+                skb = get_free_pkt(cm_node);
+
+        if (!skb) {
+                nes_debug(NES_DBG_CM, "Failed to get a Free pkt\n");
+                return -1;
+        }
+
+        form_cm_frame(skb, cm_node, NULL, 0, NULL, 0, SET_ACK | SET_FIN);
+        ret = schedule_nes_timer(cm_node, skb, NES_TIMER_TYPE_SEND, 1, 0);
+
+        return ret;
+}
+
+
+/**
+ * get_free_pkt
+ */
+struct sk_buff *get_free_pkt(struct nes_cm_node *cm_node)
+{
+        struct sk_buff *skb, *new_skb;
+
+        /* check to see if we need to repopulate the free tx pkt queue */
+        if (skb_queue_len(&cm_node->cm_core->tx_free_list) < NES_CM_FREE_PKT_LO_WATERMARK) {
+                while (skb_queue_len(&cm_node->cm_core->tx_free_list) <
+                                cm_node->cm_core->free_tx_pkt_max) {
+                        /* replace the frame we took, we won't get it back */
+                        new_skb = dev_alloc_skb(cm_node->cm_core->mtu);
+                        BUG_ON(!new_skb);
+                        /* add a replacement frame to the free tx list head */
+                        skb_queue_head(&cm_node->cm_core->tx_free_list, new_skb);
+                }
+        }
+
+        skb = skb_dequeue(&cm_node->cm_core->tx_free_list);
+
+        return skb;
+}
+
+
+/**
+ * make_hashkey - generate hash key from node tuple
+ */
+static inline int make_hashkey(u16 loc_port, nes_addr_t loc_addr, u16 rem_port,
+                nes_addr_t rem_addr)
+{
+        u32 hashkey = 0;
+
+        hashkey = loc_addr + rem_addr + loc_port + rem_port;
+        hashkey = (hashkey % NES_CM_HASHTABLE_SIZE);
+
+        return hashkey;
+}
+
+
+/**
+ * find_node - find a cm node that matches the reference cm node
+ */
+static struct nes_cm_node *find_node(struct nes_cm_core *cm_core,
+                u16 rem_port, nes_addr_t rem_addr, u16 loc_port, nes_addr_t loc_addr)
+{
+        unsigned long flags;
+        u32 hashkey;
+        struct list_head *list_pos;
+        struct list_head *hte;
+        struct nes_cm_node *cm_node;
+
+        /* make a hash index key for this packet */
+        hashkey = make_hashkey(loc_port, loc_addr, rem_port, rem_addr);
+
+        /* get a handle on the hte */
+        hte = &cm_core->connected_nodes;
+
+        nes_debug(NES_DBG_CM, "Searching for an owner node:%x:%x from core %p->%p\n",
+                        loc_addr, loc_port, cm_core, hte);
+
+        /* walk list and find cm_node associated with this session ID */
+        spin_lock_irqsave(&cm_core->ht_lock, flags);
+        list_for_each(list_pos, hte) {
+                cm_node = container_of(list_pos, struct nes_cm_node, list);
+                /* compare quad, return node handle if a match */
+                nes_debug(NES_DBG_CM, "finding node %x:%x =? %x:%x ^ %x:%x =? %x:%x\n",
+                                cm_node->loc_addr, cm_node->loc_port,
+                                loc_addr, loc_port,
+                                cm_node->rem_addr, cm_node->rem_port,
+                                rem_addr, rem_port);
+                if ((cm_node->loc_addr == loc_addr) && (cm_node->loc_port == loc_port) &&
+                                (cm_node->rem_addr == rem_addr) && (cm_node->rem_port == rem_port)) {
+                        add_ref_cm_node(cm_node);
+                        spin_unlock_irqrestore(&cm_core->ht_lock, flags);
+                        return cm_node;
+                }
+        }
+        spin_unlock_irqrestore(&cm_core->ht_lock, flags);
+
+        /* no owner node */
+        return NULL;
+}
+
+
+/**
+ * find_listener - find a cm node listening on this addr-port pair
+ */
+static struct nes_cm_listener *find_listener(struct nes_cm_core *cm_core,
+                nes_addr_t dst_addr, u16 dst_port, enum nes_cm_listener_state listener_state)
+{
+        unsigned long flags;
+        struct list_head *listen_list;
+        struct nes_cm_listener *listen_node;
+
+        /* walk list and find cm_node associated with this session ID */
+        spin_lock_irqsave(&cm_core->listen_list_lock, flags);
+        list_for_each(listen_list, &cm_core->listen_list.list) {
+                listen_node = container_of(listen_list, struct nes_cm_listener, list);
+                /* compare node pair, return node handle if a match */
+                if (((listen_node->loc_addr == dst_addr) ||
+                                listen_node->loc_addr == 0x00000000) &&
+                                (listen_node->loc_port == dst_port) &&
+                                (listener_state & listen_node->listener_state)) {
+                        atomic_inc(&listen_node->ref_count);
+                        spin_unlock_irqrestore(&cm_core->listen_list_lock, flags);
+                        return listen_node;
+                }
+        }
+        spin_unlock_irqrestore(&cm_core->listen_list_lock, flags);
+
+        nes_debug(NES_DBG_CM, "Unable to find listener- %x:%x\n",
+                        dst_addr, dst_port);
+
+        /* no listener */
+        return NULL;
+}
+
+
+/**
+ * add_hte_node - add a cm node to the hash table
+ */
+static int add_hte_node(struct nes_cm_core *cm_core, struct nes_cm_node *cm_node)
+{
+        unsigned long flags;
+        u32 hashkey;
+        struct list_head *hte;
+
+        if (!cm_node || !cm_core)
+                return -EINVAL;
+
+        nes_debug(NES_DBG_CM, "Adding Node to Active Connection HT\n");
+
+        /* first, make an index into our hash table */
+        hashkey = make_hashkey(cm_node->loc_port, cm_node->loc_addr,
+                        cm_node->rem_port, cm_node->rem_addr);
+        cm_node->hashkey = hashkey;
+
+        spin_lock_irqsave(&cm_core->ht_lock, flags);
+
+        /* get a handle on the hash table element (list head for this slot) */
+        hte = &cm_core->connected_nodes;
+        list_add_tail(&cm_node->list, hte);
+        atomic_inc(&cm_core->ht_node_cnt);
+
+        spin_unlock_irqrestore(&cm_core->ht_lock, flags);
+
+        return 0;
+}
+
+
+/**
+ * mini_cm_dec_refcnt_listen
+ */
+static int mini_cm_dec_refcnt_listen(struct nes_cm_core *cm_core,
+                struct nes_cm_listener *listener, int free_hanging_nodes)
+{
+        int ret = 1;
+        unsigned long flags;
+        spin_lock_irqsave(&cm_core->listen_list_lock, flags);
+        if (!atomic_dec_return(&listener->ref_count)) {
+                list_del(&listener->list);
+
+                /* decrement our listen node count */
+                atomic_dec(&cm_core->listen_node_cnt);
+
+                spin_unlock_irqrestore(&cm_core->listen_list_lock, flags);
+
+                if (listener->nesvnic) {
+                        nes_manage_apbvt(listener->nesvnic, listener->loc_port,
+                                        PCI_FUNC(listener->nesvnic->nesdev->pcidev->devfn), NES_MANAGE_APBVT_DEL);
+                }
+
+                nes_debug(NES_DBG_CM, "destroying listener (%p)\n", listener);
+
+                kfree(listener);
+                ret = 0;
+                cm_listens_destroyed++;
+        } else {
+                spin_unlock_irqrestore(&cm_core->listen_list_lock, flags);
+        }
+        if (listener) {
+                if (atomic_read(&listener->pend_accepts_cnt) > 0)
+                        nes_debug(NES_DBG_CM, "destroying listener (%p)"
+                                        " with non-zero pending accepts=%u\n",
+                                        listener, atomic_read(&listener->pend_accepts_cnt));
+        }
+
+        return ret;
+}
+
+
+/**
+ * mini_cm_del_listen
+ */
+static int mini_cm_del_listen(struct nes_cm_core *cm_core,
+                struct nes_cm_listener *listener)
+{
+        listener->listener_state = NES_CM_LISTENER_PASSIVE_STATE;
+        listener->cm_id = NULL; /* going to be destroyed pretty soon */
+        return mini_cm_dec_refcnt_listen(cm_core, listener, 1);
+}
+
+
+/**
+ * mini_cm_accelerated
+ */
+static inline int mini_cm_accelerated(struct nes_cm_core *cm_core,
+                struct nes_cm_node *cm_node)
+{
+        u32 was_timer_set;
+        cm_node->accelerated = 1;
+
+        if (cm_node->accept_pend) {
+                BUG_ON(!cm_node->listener);
+                atomic_dec(&cm_node->listener->pend_accepts_cnt);
+                BUG_ON(atomic_read(&cm_node->listener->pend_accepts_cnt) < 0);
+        }
+
+        was_timer_set = timer_pending(&cm_core->tcp_timer);
+        if (!was_timer_set) {
+                cm_core->tcp_timer.expires = jiffies + NES_SHORT_TIME;
+                add_timer(&cm_core->tcp_timer);
+        }
+
+        return 0;
+}
+
+
+/**
+ * nes_addr_send_arp
+ */
+static void nes_addr_send_arp(u32 dst_ip)
+{
+        struct rtable *rt;
+        struct flowi fl;
+
+        memset(&fl, 0, sizeof fl);
+        fl.nl_u.ip4_u.daddr = htonl(dst_ip);
+        if (ip_route_output_key(&init_net, &rt, &fl)) {
+                printk("%s: ip_route_output_key failed for 0x%08X\n",
+                                __FUNCTION__, dst_ip);
+                return;
+        }
+
+        neigh_event_send(rt->u.dst.neighbour, NULL);
+        ip_rt_put(rt);
+}
+
+
+/**
+ * make_cm_node - create a new instance of a cm node
+ */
+static struct nes_cm_node *make_cm_node(struct nes_cm_core *cm_core,
+                struct nes_vnic *nesvnic, struct nes_cm_info *cm_info,
+                struct nes_cm_listener *listener)
+{
+        struct nes_cm_node *cm_node;
+        struct timespec ts;
+        int arpindex = 0;
+        struct nes_device *nesdev;
+        struct nes_adapter *nesadapter;
+
+        /* create an hte and cm_node for this instance */
+        cm_node = kzalloc(sizeof(*cm_node), GFP_ATOMIC);
+        if (!cm_node)
+                return NULL;
+
+        /* set our node specific transport info */
+        cm_node->loc_addr = cm_info->loc_addr;
+        cm_node->rem_addr = cm_info->rem_addr;
+        cm_node->loc_port = cm_info->loc_port;
+        cm_node->rem_port = cm_info->rem_port;
+        cm_node->send_write0 = send_first;
+        nes_debug(NES_DBG_CM, "Make node addresses : loc = %x:%x, rem = %x:%x\n",
+                        cm_node->loc_addr, cm_node->loc_port, cm_node->rem_addr, cm_node->rem_port);
+        cm_node->listener = listener;
+        cm_node->netdev = nesvnic->netdev;
+        cm_node->cm_id = cm_info->cm_id;
+        memcpy(cm_node->loc_mac, nesvnic->netdev->dev_addr, ETH_ALEN);
+
+        nes_debug(NES_DBG_CM, "listener=%p, cm_id=%p\n",
+                        cm_node->listener, cm_node->cm_id);
+
+        INIT_LIST_HEAD(&cm_node->retrans_list);
+        spin_lock_init(&cm_node->retrans_list_lock);
+        INIT_LIST_HEAD(&cm_node->recv_list);
+        spin_lock_init(&cm_node->recv_list_lock);
+
+        cm_node->loopbackpartner = NULL;
+        atomic_set(&cm_node->ref_count, 1);
+        /* associate our parent CM core */
+        cm_node->cm_core = cm_core;
+        cm_node->tcp_cntxt.loc_id = NES_CM_DEF_LOCAL_ID;
+        cm_node->tcp_cntxt.rcv_wscale = NES_CM_DEFAULT_RCV_WND_SCALE;
+        cm_node->tcp_cntxt.rcv_wnd = NES_CM_DEFAULT_RCV_WND_SCALED >>
+                        NES_CM_DEFAULT_RCV_WND_SCALE;
+        ts = current_kernel_time();
+        cm_node->tcp_cntxt.loc_seq_num = htonl(ts.tv_nsec);
+        cm_node->tcp_cntxt.mss = nesvnic->max_frame_size - sizeof(struct iphdr) -
+                        sizeof(struct tcphdr) - ETH_HLEN;
+        cm_node->tcp_cntxt.rcv_nxt = 0;
+        /* get a unique session ID , add thread_id to an upcounter to handle race */
+        atomic_inc(&cm_core->node_cnt);
+        atomic_inc(&cm_core->session_id);
+        cm_node->session_id = (u32)(atomic_read(&cm_core->session_id) + current->tgid);
+        cm_node->conn_type = cm_info->conn_type;
+        cm_node->apbvt_set = 0;
+        cm_node->accept_pend = 0;
+
+        cm_node->nesvnic = nesvnic;
+        /* get some device handles, for arp lookup */
+        nesdev = nesvnic->nesdev;
+        nesadapter = nesdev->nesadapter;
+
+        cm_node->loopbackpartner = NULL;
+        /* get the mac addr for the remote node */
+        arpindex = nes_arp_table(nesdev, cm_node->rem_addr, NULL, NES_ARP_RESOLVE);
+        if (arpindex < 0) {
+                kfree(cm_node);
+                nes_addr_send_arp(cm_info->rem_addr);
+                return NULL;
+        }
+
+        /* copy the mac addr to node context */
+        memcpy(cm_node->rem_mac, nesadapter->arp_table[arpindex].mac_addr, ETH_ALEN);
+        nes_debug(NES_DBG_CM, "Remote mac addr from arp table:%02x,"
+                        " %02x, %02x, %02x, %02x, %02x\n",
+                        cm_node->rem_mac[0], cm_node->rem_mac[1],
+                        cm_node->rem_mac[2], cm_node->rem_mac[3],
+                        cm_node->rem_mac[4], cm_node->rem_mac[5]);
+
+        add_hte_node(cm_core, cm_node);
+        atomic_inc(&cm_nodes_created);
+
+        return cm_node;
+}
+
+
+/**
+ * add_ref_cm_node - destroy an instance of a cm node
+ */
+static int add_ref_cm_node(struct nes_cm_node *cm_node)
+{
+        atomic_inc(&cm_node->ref_count);
+        return 0;
+}
+
+
+/**
+ * rem_ref_cm_node - destroy an instance of a cm node
+ */
+static int rem_ref_cm_node(struct nes_cm_core *cm_core,
+                struct nes_cm_node *cm_node)
+{
+        unsigned long flags, qplockflags;
+        struct nes_timer_entry *send_entry;
+        struct nes_timer_entry *recv_entry;
+        struct iw_cm_id *cm_id;
+        struct list_head *list_core, *list_node_temp;
+        struct nes_qp *nesqp;
+
+        if (!cm_node)
+                return -EINVAL;
+
+        spin_lock_irqsave(&cm_node->cm_core->ht_lock, flags);
+        if (atomic_dec_return(&cm_node->ref_count)) {
+                spin_unlock_irqrestore(&cm_node->cm_core->ht_lock, flags);
+                return 0;
+        }
+        list_del(&cm_node->list);
+        atomic_dec(&cm_core->ht_node_cnt);
+        spin_unlock_irqrestore(&cm_node->cm_core->ht_lock, flags);
+
+        /* if the node is destroyed before connection was accelerated */
+        if (!cm_node->accelerated && cm_node->accept_pend) {
+                BUG_ON(!cm_node->listener);
+                atomic_dec(&cm_node->listener->pend_accepts_cnt);
+                BUG_ON(atomic_read(&cm_node->listener->pend_accepts_cnt) < 0);
+        }
+
+        spin_lock_irqsave(&cm_node->retrans_list_lock, flags);
+        list_for_each_safe(list_core, list_node_temp, &cm_node->retrans_list) {
+                send_entry = container_of(list_core, struct nes_timer_entry, list);
+                list_del(&send_entry->list);
+                spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags);
+                dev_kfree_skb_any(send_entry->skb);
+                kfree(send_entry);
+                spin_lock_irqsave(&cm_node->retrans_list_lock, flags);
+                continue;
+        }
+        spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags);
+
+        spin_lock_irqsave(&cm_node->recv_list_lock, flags);
+        list_for_each_safe(list_core, list_node_temp, &cm_node->recv_list) {
+                recv_entry = container_of(list_core, struct nes_timer_entry, list);
+                list_del(&recv_entry->list);
+                cm_id = cm_node->cm_id;
+                spin_unlock_irqrestore(&cm_node->recv_list_lock, flags);
+                if (recv_entry->type == NES_TIMER_TYPE_CLOSE) {
+                        nesqp = (struct nes_qp *)recv_entry->skb;
+                        spin_lock_irqsave(&nesqp->lock, qplockflags);
+                        if (nesqp->cm_id) {
+                                nes_debug(NES_DBG_CM, "QP%u: cm_id = %p: ****** HIT A NES_TIMER_TYPE_CLOSE"
+                                                " with something to do!!! ******\n",
+                                                nesqp->hwqp.qp_id, cm_id);
+                                nesqp->hw_tcp_state = NES_AEQE_TCP_STATE_CLOSED;
+                                nesqp->last_aeq = NES_AEQE_AEID_RESET_SENT;
+                                nesqp->ibqp_state = IB_QPS_ERR;
+                                spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                nes_cm_disconn(nesqp);
+                        } else {
+                                spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                nes_debug(NES_DBG_CM, "QP%u: cm_id = %p: ****** HIT A NES_TIMER_TYPE_CLOSE"
+                                                " with nothing to do!!! ******\n",
+                                                nesqp->hwqp.qp_id, cm_id);
+                                nes_rem_ref(&nesqp->ibqp);
+                        }
+                        cm_id->rem_ref(cm_id);
+                } else if (recv_entry->type == NES_TIMER_TYPE_RECV) {
+                        dev_kfree_skb_any(recv_entry->skb);
+                }
+                kfree(recv_entry);
+                spin_lock_irqsave(&cm_node->recv_list_lock, flags);
+        }
+        spin_unlock_irqrestore(&cm_node->recv_list_lock, flags);
+
+        if (cm_node->listener) {
+                mini_cm_dec_refcnt_listen(cm_core, cm_node->listener, 0);
+        } else {
+                if (cm_node->apbvt_set && cm_node->nesvnic) {
+                        nes_manage_apbvt(cm_node->nesvnic, cm_node->loc_port,
+                                        PCI_FUNC(cm_node->nesvnic->nesdev->pcidev->devfn),
+                                        NES_MANAGE_APBVT_DEL);
+                }
+        }
+
+        kfree(cm_node);
+        atomic_dec(&cm_core->node_cnt);
+        atomic_inc(&cm_nodes_destroyed);
+
+        return 0;
+}
+
+
+/**
+ * process_options
+ */
+static int process_options(struct nes_cm_node *cm_node, u8 *optionsloc, u32 optionsize, u32 syn_packet)
+{
+        u32 tmp;
+        u32 offset = 0;
+        union all_known_options *all_options;
+        char got_mss_option = 0;
+
+        while (offset < optionsize) {
+                all_options = (union all_known_options *)(optionsloc + offset);
+                switch (all_options->as_base.optionnum) {
+                        case OPTION_NUMBER_END:
+                                offset = optionsize;
+                                break;
+                        case OPTION_NUMBER_NONE:
+                                offset += 1;
+                                continue;
+                        case OPTION_NUMBER_MSS:
+                                nes_debug(NES_DBG_CM, "%s: MSS Length: %d Offset: %d Size: %d\n",
+                                                __FUNCTION__,
+                                                all_options->as_mss.length, offset, optionsize);
+                                got_mss_option = 1;
+                                if (all_options->as_mss.length != 4) {
+                                        return 1;
+                                } else {
+                                        tmp = ntohs(all_options->as_mss.mss);
+                                        if (tmp > 0 && tmp < cm_node->tcp_cntxt.mss)
+                                                cm_node->tcp_cntxt.mss = tmp;
+                                }
+                                break;
+                        case OPTION_NUMBER_WINDOW_SCALE:
+                                cm_node->tcp_cntxt.snd_wscale = all_options->as_windowscale.shiftcount;
+                                break;
+                        case OPTION_NUMBER_WRITE0:
+                                cm_node->send_write0 = 1;
+                                break;
+                        default:
+                                nes_debug(NES_DBG_CM, "TCP Option not understood: %x\n",
+                                                all_options->as_base.optionnum);
+                                break;
+                }
+                offset += all_options->as_base.length;
+        }
+        if ((!got_mss_option) && (syn_packet))
+                cm_node->tcp_cntxt.mss = NES_CM_DEFAULT_MSS;
+        return 0;
+}
+
+
+/**
+ * process_packet
+ */
+int process_packet(struct nes_cm_node *cm_node, struct sk_buff *skb,
+                struct nes_cm_core *cm_core)
+{
+        int optionsize;
+        int datasize;
+        int ret = 0;
+        struct tcphdr *tcph = tcp_hdr(skb);
+        u32 inc_sequence;
+        if (cm_node->state == NES_CM_STATE_SYN_SENT && tcph->syn) {
+                inc_sequence = ntohl(tcph->seq);
+                cm_node->tcp_cntxt.rcv_nxt = inc_sequence;
+        }
+
+        if ((!tcph) || (cm_node->state == NES_CM_STATE_TSA)) {
+                BUG_ON(!tcph);
+                atomic_inc(&cm_accel_dropped_pkts);
+                return -1;
+        }
+
+        if (tcph->rst) {
+                atomic_inc(&cm_resets_recvd);
+                nes_debug(NES_DBG_CM, "Received Reset, cm_node = %p, state = %u. refcnt=%d\n",
+                                cm_node, cm_node->state, atomic_read(&cm_node->ref_count));
+                switch (cm_node->state) {
+                        case NES_CM_STATE_LISTENING:
+                                rem_ref_cm_node(cm_core, cm_node);
+                                break;
+                        case NES_CM_STATE_TSA:
+                        case NES_CM_STATE_CLOSED:
+                                break;
+                        case NES_CM_STATE_SYN_RCVD:
+                                        nes_debug(NES_DBG_CM, "Received a reset for local 0x%08X:%04X,"
+                                                        " remote 0x%08X:%04X, node state = %u\n",
+                                                        cm_node->loc_addr, cm_node->loc_port,
+                                                        cm_node->rem_addr, cm_node->rem_port,
+                                                        cm_node->state);
+                                rem_ref_cm_node(cm_core, cm_node);
+                                break;
+                        case NES_CM_STATE_ONE_SIDE_ESTABLISHED:
+                        case NES_CM_STATE_ESTABLISHED:
+                        case NES_CM_STATE_MPAREQ_SENT:
+                        default:
+                                        nes_debug(NES_DBG_CM, "Received a reset for local 0x%08X:%04X,"
+                                                        " remote 0x%08X:%04X, node state = %u refcnt=%d\n",
+                                                        cm_node->loc_addr, cm_node->loc_port,
+                                                        cm_node->rem_addr, cm_node->rem_port,
+                                                        cm_node->state, atomic_read(&cm_node->ref_count));
+                                // create event
+                                cm_node->state = NES_CM_STATE_CLOSED;
+
+                                create_event(cm_node, NES_CM_EVENT_ABORTED);
+                                break;
+
+                }
+                return -1;
+        }
+
+        optionsize = (tcph->doff << 2) - sizeof(struct tcphdr);
+
+        skb_pull(skb, ip_hdr(skb)->ihl << 2);
+        skb_pull(skb, tcph->doff << 2);
+
+        datasize = skb->len;
+        inc_sequence = ntohl(tcph->seq);
+        nes_debug(NES_DBG_CM, "datasize = %u, sequence = 0x%08X, ack_seq = 0x%08X,"
+                        " rcv_nxt = 0x%08X Flags: %s %s.\n",
+                        datasize, inc_sequence, ntohl(tcph->ack_seq),
+                        cm_node->tcp_cntxt.rcv_nxt, (tcph->syn ? "SYN":""),
+                        (tcph->ack ? "ACK":""));
+
+        if (!tcph->syn && (inc_sequence != cm_node->tcp_cntxt.rcv_nxt)
+                ) {
+                nes_debug(NES_DBG_CM, "dropping packet, datasize = %u, sequence = 0x%08X,"
+                                " ack_seq = 0x%08X, rcv_nxt = 0x%08X Flags: %s.\n",
+                                datasize, inc_sequence, ntohl(tcph->ack_seq),
+                                cm_node->tcp_cntxt.rcv_nxt, (tcph->ack ? "ACK":""));
+                if (cm_node->state == NES_CM_STATE_LISTENING) {
+                        rem_ref_cm_node(cm_core, cm_node);
+                }
+                return -1;
+        }
+
+                cm_node->tcp_cntxt.rcv_nxt = inc_sequence + datasize;
+
+
+        if (optionsize) {
+                u8 *optionsloc = (u8 *)&tcph[1];
+                if (process_options(cm_node, optionsloc, optionsize, (u32)tcph->syn)) {
+                        nes_debug(NES_DBG_CM, "%s: Node %p, Sending RESET\n", __FUNCTION__, cm_node);
+                        send_reset(cm_node);
+                        if (cm_node->state != NES_CM_STATE_SYN_SENT)
+                        rem_ref_cm_node(cm_core, cm_node);
+                        return 0;
+                }
+        } else if (tcph->syn)
+                cm_node->tcp_cntxt.mss = NES_CM_DEFAULT_MSS;
+
+        cm_node->tcp_cntxt.snd_wnd = ntohs(tcph->window) <<
+                        cm_node->tcp_cntxt.snd_wscale;
+
+        if (cm_node->tcp_cntxt.snd_wnd > cm_node->tcp_cntxt.max_snd_wnd) {
+                cm_node->tcp_cntxt.max_snd_wnd = cm_node->tcp_cntxt.snd_wnd;
+        }
+
+        if (tcph->ack) {
+                cm_node->tcp_cntxt.rem_ack_num = ntohl(tcph->ack_seq);
+                switch (cm_node->state) {
+                        case NES_CM_STATE_SYN_RCVD:
+                        case NES_CM_STATE_SYN_SENT:
+                                /* read and stash current sequence number */
+                                if (cm_node->tcp_cntxt.rem_ack_num != cm_node->tcp_cntxt.loc_seq_num) {
+                                        nes_debug(NES_DBG_CM, "ERROR - cm_node->tcp_cntxt.rem_ack_num !="
+                                                        " cm_node->tcp_cntxt.loc_seq_num\n");
+                                        send_reset(cm_node);
+                                        return 0;
+                                }
+                                if (cm_node->state == NES_CM_STATE_SYN_SENT)
+                                        cm_node->state = NES_CM_STATE_ONE_SIDE_ESTABLISHED;
+                                else {
+                                                cm_node->state = NES_CM_STATE_ESTABLISHED;
+                                }
+                                break;
+                        case NES_CM_STATE_LAST_ACK:
+                                cm_node->state = NES_CM_STATE_CLOSED;
+                                break;
+                        case NES_CM_STATE_FIN_WAIT1:
+                                cm_node->state = NES_CM_STATE_FIN_WAIT2;
+                                break;
+                        case NES_CM_STATE_CLOSING:
+                                cm_node->state = NES_CM_STATE_TIME_WAIT;
+                                /* need to schedule this to happen in 2MSL timeouts */
+                                cm_node->state = NES_CM_STATE_CLOSED;
+                                break;
+                        case NES_CM_STATE_ONE_SIDE_ESTABLISHED:
+                        case NES_CM_STATE_ESTABLISHED:
+                        case NES_CM_STATE_MPAREQ_SENT:
+                        case NES_CM_STATE_CLOSE_WAIT:
+                        case NES_CM_STATE_TIME_WAIT:
+                        case NES_CM_STATE_CLOSED:
+                                break;
+                        case NES_CM_STATE_LISTENING:
+                                nes_debug(NES_DBG_CM, "Received an ACK on a listening port (SYN %d)\n", tcph->syn);
+                                cm_node->tcp_cntxt.loc_seq_num = ntohl(tcph->ack_seq);
+                                send_reset(cm_node);
+                                /* send_reset bumps refcount, this should have been a new node */
+                                rem_ref_cm_node(cm_core, cm_node);
+                                return -1;
+                                break;
+                        case NES_CM_STATE_TSA:
+                                nes_debug(NES_DBG_CM, "Received a packet with the ack bit set while in TSA state\n");
+                                break;
+                        case NES_CM_STATE_UNKNOWN:
+                        case NES_CM_STATE_INITED:
+                        case NES_CM_STATE_ACCEPTING:
+                        case NES_CM_STATE_FIN_WAIT2:
+                        default:
+                                nes_debug(NES_DBG_CM, "Received ack from unknown state: %x\n",
+                                                cm_node->state);
+                                send_reset(cm_node);
+                                break;
+                }
+        }
+
+        if (tcph->syn) {
+                if (cm_node->state == NES_CM_STATE_LISTENING) {
+                        /* do not exceed backlog */
+                        atomic_inc(&cm_node->listener->pend_accepts_cnt);
+                        if (atomic_read(&cm_node->listener->pend_accepts_cnt) >
+                                        cm_node->listener->backlog) {
+                                nes_debug(NES_DBG_CM, "drop syn due to backlog pressure \n");
+                                cm_backlog_drops++;
+                                atomic_dec(&cm_node->listener->pend_accepts_cnt);
+                                rem_ref_cm_node(cm_core, cm_node);
+                                return 0;
+                        }
+                        cm_node->accept_pend = 1;
+
+                }
+                if (datasize == 0)
+                        cm_node->tcp_cntxt.rcv_nxt ++;
+
+                if (cm_node->state == NES_CM_STATE_LISTENING) {
+                        cm_node->state = NES_CM_STATE_SYN_RCVD;
+                        send_syn(cm_node, 1);
+                }
+                if (cm_node->state == NES_CM_STATE_ONE_SIDE_ESTABLISHED) {
+                        cm_node->state = NES_CM_STATE_ESTABLISHED;
+                        /* send final handshake ACK */
+                        ret = send_ack(cm_node);
+                        if (ret < 0)
+                                return ret;
+
+                                cm_node->state = NES_CM_STATE_MPAREQ_SENT;
+                                ret = send_mpa_request(cm_node);
+                                if (ret < 0)
+                                        return ret;
+                }
+        }
+
+        if (tcph->fin) {
+                cm_node->tcp_cntxt.rcv_nxt++;
+                switch (cm_node->state) {
+                        case NES_CM_STATE_SYN_RCVD:
+                        case NES_CM_STATE_SYN_SENT:
+                        case NES_CM_STATE_ONE_SIDE_ESTABLISHED:
+                        case NES_CM_STATE_ESTABLISHED:
+                        case NES_CM_STATE_ACCEPTING:
+                        case NES_CM_STATE_MPAREQ_SENT:
+                                cm_node->state = NES_CM_STATE_CLOSE_WAIT;
+                                cm_node->state = NES_CM_STATE_LAST_ACK;
+                                ret = send_fin(cm_node, NULL);
+                                break;
+                        case NES_CM_STATE_FIN_WAIT1:
+                                cm_node->state = NES_CM_STATE_CLOSING;
+                                ret = send_ack(cm_node);
+                                break;
+                        case NES_CM_STATE_FIN_WAIT2:
+                                cm_node->state = NES_CM_STATE_TIME_WAIT;
+                                cm_node->tcp_cntxt.loc_seq_num ++;
+                                ret = send_ack(cm_node);
+                                /* need to schedule this to happen in 2MSL timeouts */
+                                cm_node->state = NES_CM_STATE_CLOSED;
+                                break;
+                        case NES_CM_STATE_CLOSE_WAIT:
+                        case NES_CM_STATE_LAST_ACK:
+                        case NES_CM_STATE_CLOSING:
+                        case NES_CM_STATE_TSA:
+                        default:
+                                nes_debug(NES_DBG_CM, "Received a fin while in %x state\n",
+                                                cm_node->state);
+                                ret = -EINVAL;
+                                break;
+                }
+        }
+
+        if (datasize) {
+                u8 *dataloc = skb->data;
+                /* figure out what state we are in and handle transition to next state */
+                switch (cm_node->state) {
+                        case NES_CM_STATE_LISTENING:
+                        case NES_CM_STATE_SYN_RCVD:
+                        case NES_CM_STATE_SYN_SENT:
+                        case NES_CM_STATE_FIN_WAIT1:
+                        case NES_CM_STATE_FIN_WAIT2:
+                        case NES_CM_STATE_CLOSE_WAIT:
+                        case NES_CM_STATE_LAST_ACK:
+                        case NES_CM_STATE_CLOSING:
+                                break;
+                        case  NES_CM_STATE_MPAREQ_SENT:
+                                /* recv the mpa res frame, ret=frame len (incl priv data) */
+                                ret = parse_mpa(cm_node, dataloc, datasize);
+                                if (ret < 0)
+                                        break;
+                                /* set the req frame payload len in skb */
+                                /* we are done handling this state, set node to a TSA state */
+                                cm_node->state = NES_CM_STATE_TSA;
+                                send_ack(cm_node);
+                                create_event(cm_node, NES_CM_EVENT_CONNECTED);
+                                break;
+
+                        case  NES_CM_STATE_ESTABLISHED:
+                                /* we are expecting an MPA req frame */
+                                ret = parse_mpa(cm_node, dataloc, datasize);
+                                if (ret < 0) {
+                                        break;
+                                }
+                                cm_node->state = NES_CM_STATE_TSA;
+                                send_ack(cm_node);
+                                /* we got a valid MPA request, create an event */
+                                create_event(cm_node, NES_CM_EVENT_MPA_REQ);
+                                break;
+                        case  NES_CM_STATE_TSA:
+                                handle_exception_pkt(cm_node, skb);
+                                break;
+                        case NES_CM_STATE_UNKNOWN:
+                        case NES_CM_STATE_INITED:
+                        default:
+                                ret = -1;
+                }
+        }
+
+        return ret;
+}
+
+
+/**
+ * mini_cm_listen - create a listen node with params
+ */
+static struct nes_cm_listener *mini_cm_listen(struct nes_cm_core *cm_core,
+                struct nes_vnic *nesvnic, struct nes_cm_info *cm_info)
+{
+        struct nes_cm_listener *listener;
+        unsigned long flags;
+
+        nes_debug(NES_DBG_CM, "Search for 0x%08x : 0x%04x\n",
+                cm_info->loc_addr, cm_info->loc_port);
+
+        /* cannot have multiple matching listeners */
+        listener = find_listener(cm_core, htonl(cm_info->loc_addr),
+                        htons(cm_info->loc_port), NES_CM_LISTENER_EITHER_STATE);
+        if (listener && listener->listener_state == NES_CM_LISTENER_ACTIVE_STATE) {
+                /* find automatically incs ref count ??? */
+                atomic_dec(&listener->ref_count);
+                nes_debug(NES_DBG_CM, "Not creating listener since it already exists\n");
+                return NULL;
+        }
+
+        if (!listener) {
+                /* create a CM listen node (1/2 node to compare incoming traffic to) */
+                listener = kzalloc(sizeof(*listener), GFP_ATOMIC);
+                if (!listener) {
+                        nes_debug(NES_DBG_CM, "Not creating listener memory allocation failed\n");
+                        return NULL;
+                }
+
+                memset(listener, 0, sizeof(struct nes_cm_listener));
+                listener->loc_addr = htonl(cm_info->loc_addr);
+                listener->loc_port = htons(cm_info->loc_port);
+                listener->reused_node = 0;
+
+                atomic_set(&listener->ref_count, 1);
+        }
+        /* pasive case */
+        /* find already inc'ed the ref count */
+        else {
+                listener->reused_node = 1;
+        }
+
+        listener->cm_id = cm_info->cm_id;
+        atomic_set(&listener->pend_accepts_cnt, 0);
+        listener->cm_core = cm_core;
+        listener->nesvnic = nesvnic;
+        atomic_inc(&cm_core->node_cnt);
+        atomic_inc(&cm_core->session_id);
+
+        listener->session_id = (u32)(atomic_read(&cm_core->session_id) + current->tgid);
+        listener->conn_type = cm_info->conn_type;
+        listener->backlog = cm_info->backlog;
+        listener->listener_state = NES_CM_LISTENER_ACTIVE_STATE;
+
+        if (!listener->reused_node) {
+                spin_lock_irqsave(&cm_core->listen_list_lock, flags);
+                list_add(&listener->list, &cm_core->listen_list.list);
+                spin_unlock_irqrestore(&cm_core->listen_list_lock, flags);
+                atomic_inc(&cm_core->listen_node_cnt);
+        }
+
+        nes_debug(NES_DBG_CM, "Api - listen(): addr=0x%08X, port=0x%04x,"
+                        " listener = %p, backlog = %d, cm_id = %p.\n",
+                        cm_info->loc_addr, cm_info->loc_port,
+                        listener, listener->backlog, listener->cm_id);
+
+        return listener;
+}
+
+
+/**
+ * mini_cm_connect - make a connection node with params
+ */
+struct nes_cm_node *mini_cm_connect(struct nes_cm_core *cm_core,
+                struct nes_vnic *nesvnic, struct ietf_mpa_frame *mpa_frame,
+                struct nes_cm_info *cm_info)
+{
+        int ret = 0;
+        struct nes_cm_node *cm_node;
+        struct nes_cm_listener *loopbackremotelistener;
+        struct nes_cm_node *loopbackremotenode;
+        struct nes_cm_info loopback_cm_info;
+
+        u16 mpa_frame_size = sizeof(struct ietf_mpa_frame) +
+                        ntohs(mpa_frame->priv_data_len);
+
+        cm_info->loc_addr = htonl(cm_info->loc_addr);
+        cm_info->rem_addr = htonl(cm_info->rem_addr);
+        cm_info->loc_port = htons(cm_info->loc_port);
+        cm_info->rem_port = htons(cm_info->rem_port);
+
+        /* create a CM connection node */
+        cm_node = make_cm_node(cm_core, nesvnic, cm_info, NULL);
+        if (!cm_node)
+                return NULL;
+
+        // set our node side to client (active) side
+        cm_node->tcp_cntxt.client = 1;
+        cm_node->tcp_cntxt.rcv_wscale = NES_CM_DEFAULT_RCV_WND_SCALE;
+
+        if (cm_info->loc_addr == cm_info->rem_addr) {
+                loopbackremotelistener = find_listener(cm_core, cm_node->rem_addr,
+                                cm_node->rem_port, NES_CM_LISTENER_ACTIVE_STATE);
+                if (loopbackremotelistener == NULL) {
+                        create_event(cm_node, NES_CM_EVENT_ABORTED);
+                } else {
+                        atomic_inc(&cm_loopbacks);
+                        loopback_cm_info = *cm_info;
+                        loopback_cm_info.loc_port = cm_info->rem_port;
+                        loopback_cm_info.rem_port = cm_info->loc_port;
+                        loopback_cm_info.cm_id = loopbackremotelistener->cm_id;
+                        loopbackremotenode = make_cm_node(cm_core, nesvnic, &loopback_cm_info,
+                                        loopbackremotelistener);
+                        loopbackremotenode->loopbackpartner = cm_node;
+                        loopbackremotenode->tcp_cntxt.rcv_wscale = NES_CM_DEFAULT_RCV_WND_SCALE;
+                        cm_node->loopbackpartner = loopbackremotenode;
+                        memcpy(loopbackremotenode->mpa_frame_buf, &mpa_frame->priv_data,
+                                        mpa_frame_size);
+                        loopbackremotenode->mpa_frame_size = mpa_frame_size -
+                                        sizeof(struct ietf_mpa_frame);
+
+                        // we are done handling this state, set node to a TSA state
+                        cm_node->state = NES_CM_STATE_TSA;
+                        cm_node->tcp_cntxt.rcv_nxt = loopbackremotenode->tcp_cntxt.loc_seq_num;
+                        loopbackremotenode->tcp_cntxt.rcv_nxt = cm_node->tcp_cntxt.loc_seq_num;
+                        cm_node->tcp_cntxt.max_snd_wnd = loopbackremotenode->tcp_cntxt.rcv_wnd;
+                        loopbackremotenode->tcp_cntxt.max_snd_wnd = cm_node->tcp_cntxt.rcv_wnd;
+                        cm_node->tcp_cntxt.snd_wnd = loopbackremotenode->tcp_cntxt.rcv_wnd;
+                        loopbackremotenode->tcp_cntxt.snd_wnd = cm_node->tcp_cntxt.rcv_wnd;
+                        cm_node->tcp_cntxt.snd_wscale = loopbackremotenode->tcp_cntxt.rcv_wscale;
+                        loopbackremotenode->tcp_cntxt.snd_wscale = cm_node->tcp_cntxt.rcv_wscale;
+
+                        create_event(loopbackremotenode, NES_CM_EVENT_MPA_REQ);
+                }
+                return cm_node;
+        }
+
+        /* set our node side to client (active) side */
+        cm_node->tcp_cntxt.client = 1;
+        /* init our MPA frame ptr */
+        memcpy(&cm_node->mpa_frame, mpa_frame, mpa_frame_size);
+        cm_node->mpa_frame_size = mpa_frame_size;
+
+        /* send a syn and goto syn sent state */
+        cm_node->state = NES_CM_STATE_SYN_SENT;
+        ret = send_syn(cm_node, 0);
+
+        nes_debug(NES_DBG_CM, "Api - connect(): dest addr=0x%08X, port=0x%04x,"
+                        " cm_node=%p, cm_id = %p.\n",
+                        cm_node->rem_addr, cm_node->rem_port, cm_node, cm_node->cm_id);
+
+        return cm_node;
+}
+
+
+/**
+ * mini_cm_accept - accept a connection
+ * This function is never called
+ */
+int mini_cm_accept(struct nes_cm_core *cm_core, struct ietf_mpa_frame *mpa_frame,
+                struct nes_cm_node *cm_node)
+{
+        return 0;
+}
+
+
+/**
+ * mini_cm_reject - reject and teardown a connection
+ */
+int mini_cm_reject(struct nes_cm_core *cm_core,
+                struct ietf_mpa_frame *mpa_frame,
+                struct nes_cm_node *cm_node)
+{
+        int ret = 0;
+        struct sk_buff *skb;
+        u16 mpa_frame_size = sizeof(struct ietf_mpa_frame) +
+                        ntohs(mpa_frame->priv_data_len);
+
+        skb = get_free_pkt(cm_node);
+        if (!skb) {
+                nes_debug(NES_DBG_CM, "Failed to get a Free pkt\n");
+                return -1;
+        }
+
+        /* send an MPA Request frame */
+        form_cm_frame(skb, cm_node, NULL, 0, mpa_frame, mpa_frame_size, SET_ACK | SET_FIN);
+        ret = schedule_nes_timer(cm_node, skb, NES_TIMER_TYPE_SEND, 1, 0);
+
+        cm_node->state = NES_CM_STATE_CLOSED;
+        ret = send_fin(cm_node, NULL);
+
+        if (ret < 0) {
+                printk(KERN_INFO PFX "failed to send MPA Reply (reject)\n");
+                return ret;
+        }
+
+        return ret;
+}
+
+
+/**
+ * mini_cm_close
+ */
+int mini_cm_close(struct nes_cm_core *cm_core, struct nes_cm_node *cm_node)
+{
+        int ret = 0;
+
+        if (!cm_core || !cm_node)
+                return -EINVAL;
+
+        switch (cm_node->state) {
+                /* if passed in node is null, create a reference key node for node search */
+                /* check if we found an owner node for this pkt */
+                case NES_CM_STATE_SYN_RCVD:
+                case NES_CM_STATE_SYN_SENT:
+                case NES_CM_STATE_ONE_SIDE_ESTABLISHED:
+                case NES_CM_STATE_ESTABLISHED:
+                case NES_CM_STATE_ACCEPTING:
+                case NES_CM_STATE_MPAREQ_SENT:
+                        cm_node->state = NES_CM_STATE_FIN_WAIT1;
+                        send_fin(cm_node, NULL);
+                        break;
+                case NES_CM_STATE_CLOSE_WAIT:
+                        cm_node->state = NES_CM_STATE_LAST_ACK;
+                        send_fin(cm_node, NULL);
+                        break;
+                case NES_CM_STATE_FIN_WAIT1:
+                case NES_CM_STATE_FIN_WAIT2:
+                case NES_CM_STATE_LAST_ACK:
+                case NES_CM_STATE_TIME_WAIT:
+                case NES_CM_STATE_CLOSING:
+                        ret = -1;
+                        break;
+                case NES_CM_STATE_LISTENING:
+                case NES_CM_STATE_UNKNOWN:
+                case NES_CM_STATE_INITED:
+                case NES_CM_STATE_CLOSED:
+                case NES_CM_STATE_TSA:
+                        ret = rem_ref_cm_node(cm_core, cm_node);
+                        break;
+        }
+        cm_node->cm_id = NULL;
+        return ret;
+}
+
+
+/**
+ * recv_pkt - recv an ETHERNET packet, and process it through CM
+ * node state machine
+ */
+int mini_cm_recv_pkt(struct nes_cm_core *cm_core, struct nes_vnic *nesvnic,
+                struct sk_buff *skb)
+{
+        struct nes_cm_node *cm_node = NULL;
+        struct nes_cm_listener *listener = NULL;
+        struct iphdr *iph;
+        struct tcphdr *tcph;
+        struct nes_cm_info nfo;
+        int ret = 0;
+
+        if (!skb || skb->len < sizeof(struct iphdr) + sizeof(struct tcphdr)) {
+                ret = -EINVAL;
+                goto out;
+        }
+
+        iph = (struct iphdr *)skb->data;
+        tcph = (struct tcphdr *)(skb->data + sizeof(struct iphdr));
+        skb_reset_network_header(skb);
+        skb_set_transport_header(skb, sizeof(*tcph));
+        skb->len = ntohs(iph->tot_len);
+
+        nfo.loc_addr = ntohl(iph->daddr);
+        nfo.loc_port = ntohs(tcph->dest);
+        nfo.rem_addr = ntohl(iph->saddr);
+        nfo.rem_port = ntohs(tcph->source);
+
+        nes_debug(NES_DBG_CM, "Received packet: dest=0x%08X:0x%04X src=0x%08X:0x%04X\n",
+                        iph->daddr, tcph->dest, iph->saddr, tcph->source);
+
+        /* note: this call is going to increment cm_node ref count */
+        cm_node = find_node(cm_core,
+                        nfo.rem_port, nfo.rem_addr,
+                        nfo.loc_port, nfo.loc_addr);
+
+        if (!cm_node) {
+                listener = find_listener(cm_core, nfo.loc_addr, nfo.loc_port,
+                                NES_CM_LISTENER_ACTIVE_STATE);
+                if (listener) {
+                        nfo.cm_id = listener->cm_id;
+                        nfo.conn_type = listener->conn_type;
+                } else {
+                        nfo.cm_id = NULL;
+                        nfo.conn_type = 0;
+                }
+
+                cm_node = make_cm_node(cm_core, nesvnic, &nfo, listener);
+                if (!cm_node) {
+                        nes_debug(NES_DBG_CM, "Unable to allocate node\n");
+                        if (listener) {
+                                nes_debug(NES_DBG_CM, "unable to allocate node and decrementing listener refcount\n");
+                                atomic_dec(&listener->ref_count);
+                        }
+                        ret = -1;
+                        goto out;
+                }
+                if (!listener) {
+                        nes_debug(NES_DBG_CM, "Packet found for unknown port %x refcnt=%d\n",
+                                        nfo.loc_port, atomic_read(&cm_node->ref_count));
+                        if (!tcph->rst) {
+                                nes_debug(NES_DBG_CM, "Packet found for unknown port=%d"
+                                                " rem_port=%d refcnt=%d\n",
+                                                nfo.loc_port, nfo.rem_port, atomic_read(&cm_node->ref_count));
+
+                                cm_node->tcp_cntxt.rcv_nxt = ntohl(tcph->seq);
+                                cm_node->tcp_cntxt.loc_seq_num = ntohl(tcph->ack_seq);
+                                send_reset(cm_node);
+                        }
+                        rem_ref_cm_node(cm_core, cm_node);
+                        ret = -1;
+                        goto out;
+                }
+                add_ref_cm_node(cm_node);
+                cm_node->state = NES_CM_STATE_LISTENING;
+        }
+
+        nes_debug(NES_DBG_CM, "Processing Packet for node %p, data = (%p):\n",
+                        cm_node, skb->data);
+        process_packet(cm_node, skb, cm_core);
+
+        rem_ref_cm_node(cm_core, cm_node);
+        out:
+        if (skb)
+                dev_kfree_skb_any(skb);
+        return ret;
+}
+
+
+/**
+ * nes_cm_alloc_core - allocate a top level instance of a cm core
+ */
+struct nes_cm_core *nes_cm_alloc_core(void)
+{
+        int i;
+
+        struct nes_cm_core *cm_core;
+        struct sk_buff *skb = NULL;
+
+        /* setup the CM core */
+        /* alloc top level core control structure */
+        cm_core = kzalloc(sizeof(*cm_core), GFP_KERNEL);
+        if (!cm_core)
+                return NULL;
+
+        INIT_LIST_HEAD(&cm_core->connected_nodes);
+        init_timer(&cm_core->tcp_timer);
+        cm_core->tcp_timer.function = nes_cm_timer_tick;
+
+        cm_core->mtu   = NES_CM_DEFAULT_MTU;
+        cm_core->state = NES_CM_STATE_INITED;
+        cm_core->free_tx_pkt_max = NES_CM_DEFAULT_FREE_PKTS;
+
+        atomic_set(&cm_core->session_id, 0);
+        atomic_set(&cm_core->events_posted, 0);
+
+        /* init the packet lists */
+        skb_queue_head_init(&cm_core->tx_free_list);
+
+        for (i = 0; i < NES_CM_DEFAULT_FRAME_CNT; i++) {
+                skb = dev_alloc_skb(cm_core->mtu);
+                if (!skb) {
+                        kfree(cm_core);
+                        return NULL;
+                }
+                /* add 'raw' skb to free frame list */
+                skb_queue_head(&cm_core->tx_free_list, skb);
+        }
+
+        cm_core->api = &nes_cm_api;
+
+        spin_lock_init(&cm_core->ht_lock);
+        spin_lock_init(&cm_core->listen_list_lock);
+
+        INIT_LIST_HEAD(&cm_core->listen_list.list);
+
+        nes_debug(NES_DBG_CM, "Init CM Core completed -- cm_core=%p\n", cm_core);
+
+        nes_debug(NES_DBG_CM, "Enable QUEUE EVENTS\n");
+        cm_core->event_wq = create_singlethread_workqueue("nesewq");
+        cm_core->post_event = nes_cm_post_event;
+        nes_debug(NES_DBG_CM, "Enable QUEUE DISCONNECTS\n");
+        cm_core->disconn_wq = create_singlethread_workqueue("nesdwq");
+
+        print_core(cm_core);
+        return cm_core;
+}
+
+
+/**
+ * mini_cm_dealloc_core - deallocate a top level instance of a cm core
+ */
+int mini_cm_dealloc_core(struct nes_cm_core *cm_core)
+{
+        nes_debug(NES_DBG_CM, "De-Alloc CM Core (%p)\n", cm_core);
+
+        if (!cm_core)
+                return -EINVAL;
+
+        barrier();
+
+        if (timer_pending(&cm_core->tcp_timer)) {
+                del_timer(&cm_core->tcp_timer);
+        }
+
+        destroy_workqueue(cm_core->event_wq);
+        destroy_workqueue(cm_core->disconn_wq);
+        nes_debug(NES_DBG_CM, "\n");
+        kfree(cm_core);
+
+        return 0;
+}
+
+
+/**
+ * mini_cm_get
+ */
+int mini_cm_get(struct nes_cm_core *cm_core)
+{
+        return cm_core->state;
+}
+
+
+/**
+ * mini_cm_set
+ */
+int mini_cm_set(struct nes_cm_core *cm_core, u32 type, u32 value)
+{
+        int ret = 0;
+
+        switch (type) {
+                case NES_CM_SET_PKT_SIZE:
+                        cm_core->mtu = value;
+                        break;
+                case NES_CM_SET_FREE_PKT_Q_SIZE:
+                        cm_core->free_tx_pkt_max = value;
+                        break;
+                default:
+                        /* unknown set option */
+                        ret = -EINVAL;
+        }
+
+        return ret;
+}
+
+
+/**
+ * nes_cm_init_tsa_conn setup HW; MPA frames must be
+ * successfully exchanged when this is called
+ */
+static int nes_cm_init_tsa_conn(struct nes_qp *nesqp, struct nes_cm_node *cm_node)
+{
+        int ret = 0;
+
+        if (!nesqp)
+                return -EINVAL;
+
+        nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_IPV4 |
+                        NES_QPCONTEXT_MISC_NO_NAGLE | NES_QPCONTEXT_MISC_DO_NOT_FRAG |
+                        NES_QPCONTEXT_MISC_DROS);
+
+        if (cm_node->tcp_cntxt.snd_wscale || cm_node->tcp_cntxt.rcv_wscale)
+                nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_WSCALE);
+
+        nesqp->nesqp_context->misc2 |= cpu_to_le32(64 << NES_QPCONTEXT_MISC2_TTL_SHIFT);
+
+        nesqp->nesqp_context->mss |= cpu_to_le32(((u32)cm_node->tcp_cntxt.mss) << 16);
+
+        nesqp->nesqp_context->tcp_state_flow_label |= cpu_to_le32(
+                        (u32)NES_QPCONTEXT_TCPSTATE_EST << NES_QPCONTEXT_TCPFLOW_TCP_STATE_SHIFT);
+
+        nesqp->nesqp_context->pd_index_wscale |= cpu_to_le32(
+                        (cm_node->tcp_cntxt.snd_wscale << NES_QPCONTEXT_PDWSCALE_SND_WSCALE_SHIFT) &
+                        NES_QPCONTEXT_PDWSCALE_SND_WSCALE_MASK);
+
+        nesqp->nesqp_context->pd_index_wscale |= cpu_to_le32(
+                        (cm_node->tcp_cntxt.rcv_wscale << NES_QPCONTEXT_PDWSCALE_RCV_WSCALE_SHIFT) &
+                        NES_QPCONTEXT_PDWSCALE_RCV_WSCALE_MASK);
+
+        nesqp->nesqp_context->keepalive = cpu_to_le32(0x80);
+        nesqp->nesqp_context->ts_recent = 0;
+        nesqp->nesqp_context->ts_age = 0;
+        nesqp->nesqp_context->snd_nxt = cpu_to_le32(cm_node->tcp_cntxt.loc_seq_num);
+        nesqp->nesqp_context->snd_wnd = cpu_to_le32(cm_node->tcp_cntxt.snd_wnd);
+        nesqp->nesqp_context->rcv_nxt = cpu_to_le32(cm_node->tcp_cntxt.rcv_nxt);
+        nesqp->nesqp_context->rcv_wnd = cpu_to_le32(cm_node->tcp_cntxt.rcv_wnd <<
+                        cm_node->tcp_cntxt.rcv_wscale);
+        nesqp->nesqp_context->snd_max = cpu_to_le32(cm_node->tcp_cntxt.loc_seq_num);
+        nesqp->nesqp_context->snd_una = cpu_to_le32(cm_node->tcp_cntxt.loc_seq_num);
+        nesqp->nesqp_context->srtt = 0;
+        nesqp->nesqp_context->rttvar = cpu_to_le32(0x6);
+        nesqp->nesqp_context->ssthresh = cpu_to_le32(0x3FFFC000);
+        nesqp->nesqp_context->cwnd = cpu_to_le32(2*cm_node->tcp_cntxt.mss);
+        nesqp->nesqp_context->snd_wl1 = cpu_to_le32(cm_node->tcp_cntxt.rcv_nxt);
+        nesqp->nesqp_context->snd_wl2 = cpu_to_le32(cm_node->tcp_cntxt.loc_seq_num);
+        nesqp->nesqp_context->max_snd_wnd = cpu_to_le32(cm_node->tcp_cntxt.max_snd_wnd);
+
+        nes_debug(NES_DBG_CM, "QP%u: rcv_nxt = 0x%08X, snd_nxt = 0x%08X,"
+                        " Setting MSS to %u, PDWscale = 0x%08X, rcv_wnd = %u, context misc = 0x%08X.\n",
+                        nesqp->hwqp.qp_id, le32_to_cpu(nesqp->nesqp_context->rcv_nxt),
+                        le32_to_cpu(nesqp->nesqp_context->snd_nxt),
+                        cm_node->tcp_cntxt.mss, le32_to_cpu(nesqp->nesqp_context->pd_index_wscale),
+                        le32_to_cpu(nesqp->nesqp_context->rcv_wnd),
+                        le32_to_cpu(nesqp->nesqp_context->misc));
+        nes_debug(NES_DBG_CM, "  snd_wnd  = 0x%08X.\n", le32_to_cpu(nesqp->nesqp_context->snd_wnd));
+        nes_debug(NES_DBG_CM, "  snd_cwnd = 0x%08X.\n", le32_to_cpu(nesqp->nesqp_context->cwnd));
+        nes_debug(NES_DBG_CM, "  max_swnd = 0x%08X.\n", le32_to_cpu(nesqp->nesqp_context->max_snd_wnd));
+
+        nes_debug(NES_DBG_CM, "Change cm_node state to TSA\n");
+        cm_node->state = NES_CM_STATE_TSA;
+
+        return ret;
+}
+
+
+/**
+ * nes_cm_disconn
+ */
+int nes_cm_disconn(struct nes_qp *nesqp)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&nesqp->lock, flags);
+        if (nesqp->disconn_pending == 0) {
+                nesqp->disconn_pending++;
+                spin_unlock_irqrestore(&nesqp->lock, flags);
+                /* nes_add_ref(&nesqp->ibqp); */
+                /* init our disconnect work element, to */
+                INIT_WORK(&nesqp->disconn_work, nes_disconnect_worker);
+
+                queue_work(g_cm_core->disconn_wq, &nesqp->disconn_work);
+        } else {
+                spin_unlock_irqrestore(&nesqp->lock, flags);
+                nes_rem_ref(&nesqp->ibqp);
+        }
+
+        return 0;
+}
+
+
+/**
+ * nes_disconnect_worker
+ */
+void nes_disconnect_worker(struct work_struct *work)
+{
+        struct nes_qp *nesqp = container_of(work, struct nes_qp, disconn_work);
+
+        nes_debug(NES_DBG_CM, "processing AEQE id 0x%04X for QP%u.\n",
+                        nesqp->last_aeq, nesqp->hwqp.qp_id);
+        nes_cm_disconn_true(nesqp);
+}
+
+
+/**
+ * nes_cm_disconn_true
+ */
+int nes_cm_disconn_true(struct nes_qp *nesqp)
+{
+        unsigned long flags;
+        int ret = 0;
+        struct iw_cm_id *cm_id;
+        struct iw_cm_event cm_event;
+        struct nes_vnic *nesvnic;
+        u16 last_ae;
+        u8 original_hw_tcp_state;
+        u8 original_ibqp_state;
+        u8 issued_disconnect_reset = 0;
+
+        if (!nesqp) {
+                nes_debug(NES_DBG_CM, "disconnect_worker nesqp is NULL\n");
+                return -1;
+        }
+
+        spin_lock_irqsave(&nesqp->lock, flags);
+        cm_id = nesqp->cm_id;
+        /* make sure we havent already closed this connection */
+        if (!cm_id) {
+                nes_debug(NES_DBG_CM, "QP%u disconnect_worker cmid is NULL\n",
+                                nesqp->hwqp.qp_id);
+                spin_unlock_irqrestore(&nesqp->lock, flags);
+                nes_rem_ref(&nesqp->ibqp);
+                return -1;
+        }
+
+        nesvnic = to_nesvnic(nesqp->ibqp.device);
+        nes_debug(NES_DBG_CM, "Disconnecting QP%u\n", nesqp->hwqp.qp_id);
+
+        original_hw_tcp_state = nesqp->hw_tcp_state;
+        original_ibqp_state   = nesqp->ibqp_state;
+        last_ae = nesqp->last_aeq;
+
+
+        nes_debug(NES_DBG_CM, "set ibqp_state=%u\n", nesqp->ibqp_state);
+
+        if ((nesqp->cm_id) && (cm_id->event_handler)) {
+                if ((original_hw_tcp_state == NES_AEQE_TCP_STATE_CLOSE_WAIT) ||
+                                ((original_ibqp_state == IB_QPS_RTS) &&
+                                (last_ae == NES_AEQE_AEID_LLP_CONNECTION_RESET))) {
+                        atomic_inc(&cm_disconnects);
+                        cm_event.event = IW_CM_EVENT_DISCONNECT;
+                        if (last_ae == NES_AEQE_AEID_LLP_CONNECTION_RESET) {
+                                issued_disconnect_reset = 1;
+                                cm_event.status = IW_CM_EVENT_STATUS_RESET;
+                                nes_debug(NES_DBG_CM, "Generating a CM Disconnect Event (status reset) for "
+                                                " QP%u, cm_id = %p. \n",
+                                                nesqp->hwqp.qp_id, cm_id);
+                        } else {
+                                cm_event.status = IW_CM_EVENT_STATUS_OK;
+                        }
+
+                        cm_event.local_addr = cm_id->local_addr;
+                        cm_event.remote_addr = cm_id->remote_addr;
+                        cm_event.private_data = NULL;
+                        cm_event.private_data_len = 0;
+
+                        nes_debug(NES_DBG_CM, "Generating a CM Disconnect Event for "
+                                        " QP%u, SQ Head = %u, SQ Tail = %u. cm_id = %p, refcount = %u.\n",
+                                        nesqp->hwqp.qp_id,
+                                        nesqp->hwqp.sq_head, nesqp->hwqp.sq_tail, cm_id,
+                                        atomic_read(&nesqp->refcount));
+
+                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                        ret = cm_id->event_handler(cm_id, &cm_event);
+                        if (ret)
+                                nes_debug(NES_DBG_CM, "OFA CM event_handler returned, ret=%d\n", ret);
+                        spin_lock_irqsave(&nesqp->lock, flags);
+                }
+
+                nesqp->disconn_pending = 0;
+                /* There might have been another AE while the lock was released */
+                original_hw_tcp_state = nesqp->hw_tcp_state;
+                original_ibqp_state   = nesqp->ibqp_state;
+                last_ae = nesqp->last_aeq;
+
+                if ((issued_disconnect_reset == 0) && (nesqp->cm_id) &&
+                                ((original_hw_tcp_state == NES_AEQE_TCP_STATE_CLOSED) ||
+                                 (original_hw_tcp_state == NES_AEQE_TCP_STATE_TIME_WAIT) ||
+                                 (last_ae == NES_AEQE_AEID_RDMAP_ROE_BAD_LLP_CLOSE) ||
+                                 (last_ae == NES_AEQE_AEID_LLP_CONNECTION_RESET))) {
+                        atomic_inc(&cm_closes);
+                        nesqp->cm_id = NULL;
+                        nesqp->in_disconnect = 0;
+                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                        nes_disconnect(nesqp, 1);
+
+                        cm_id->provider_data = nesqp;
+                        /* Send up the close complete event */
+                        cm_event.event = IW_CM_EVENT_CLOSE;
+                        cm_event.status = IW_CM_EVENT_STATUS_OK;
+                        cm_event.provider_data = cm_id->provider_data;
+                        cm_event.local_addr = cm_id->local_addr;
+                        cm_event.remote_addr = cm_id->remote_addr;
+                        cm_event.private_data = NULL;
+                        cm_event.private_data_len = 0;
+
+                        ret = cm_id->event_handler(cm_id, &cm_event);
+                        if (ret) {
+                                nes_debug(NES_DBG_CM, "OFA CM event_handler returned, ret=%d\n", ret);
+                        }
+
+                        cm_id->rem_ref(cm_id);
+
+                        spin_lock_irqsave(&nesqp->lock, flags);
+                        if (nesqp->flush_issued == 0) {
+                                nesqp->flush_issued = 1;
+                                spin_unlock_irqrestore(&nesqp->lock, flags);
+                                flush_wqes(nesvnic->nesdev, nesqp, NES_CQP_FLUSH_RQ, 1);
+                        } else {
+                                spin_unlock_irqrestore(&nesqp->lock, flags);
+                        }
+
+                        /* This reference is from either ModifyQP or the AE processing,
+                                        there is still a race here with modifyqp */
+                        nes_rem_ref(&nesqp->ibqp);
+
+                } else {
+                        cm_id = nesqp->cm_id;
+                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                        /* check to see if the inbound reset beat the outbound reset */
+                        if ((!cm_id) && (last_ae==NES_AEQE_AEID_RESET_SENT)) {
+                                nes_debug(NES_DBG_CM, "QP%u: Decing refcount due to inbound reset"
+                                                " beating the outbound reset.\n",
+                                                nesqp->hwqp.qp_id);
+                                nes_rem_ref(&nesqp->ibqp);
+                        }
+                }
+        } else {
+                nesqp->disconn_pending = 0;
+                spin_unlock_irqrestore(&nesqp->lock, flags);
+        }
+        nes_rem_ref(&nesqp->ibqp);
+
+        return 0;
+}
+
+
+/**
+ * nes_disconnect
+ */
+int nes_disconnect(struct nes_qp *nesqp, int abrupt)
+{
+        int ret = 0;
+        struct nes_vnic *nesvnic;
+        struct nes_device *nesdev;
+
+        nesvnic = to_nesvnic(nesqp->ibqp.device);
+        if (!nesvnic)
+                return -EINVAL;
+
+        nesdev = nesvnic->nesdev;
+
+        nes_debug(NES_DBG_CM, "netdev refcnt = %u.\n",
+                        atomic_read(&nesvnic->netdev->refcnt));
+
+        if (nesqp->active_conn) {
+
+                /* indicate this connection is NOT active */
+                nesqp->active_conn = 0;
+        } else {
+                /* Need to free the Last Streaming Mode Message */
+                if (nesqp->ietf_frame) {
+                        pci_free_consistent(nesdev->pcidev,
+                                        nesqp->private_data_len+sizeof(struct ietf_mpa_frame),
+                                        nesqp->ietf_frame, nesqp->ietf_frame_pbase);
+                }
+        }
+
+        /* close the CM node down if it is still active */
+        if (nesqp->cm_node) {
+                nes_debug(NES_DBG_CM, "Call close API\n");
+
+                g_cm_core->api->close(g_cm_core, nesqp->cm_node);
+                nesqp->cm_node = NULL;
+        }
+
+        return ret;
+}
+
+
+/**
+ * nes_accept
+ */
+int nes_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
+{
+        u64 u64temp;
+        struct ib_qp *ibqp;
+        struct nes_qp *nesqp;
+        struct nes_vnic *nesvnic;
+        struct nes_device *nesdev;
+        struct nes_cm_node *cm_node;
+        struct nes_adapter *adapter;
+        struct ib_qp_attr attr;
+        struct iw_cm_event cm_event;
+        struct nes_hw_qp_wqe *wqe;
+        struct nes_v4_quad nes_quad;
+        int ret;
+
+        ibqp = nes_get_qp(cm_id->device, conn_param->qpn);
+        if (!ibqp)
+                return -EINVAL;
+
+        /* get all our handles */
+        nesqp = to_nesqp(ibqp);
+        nesvnic = to_nesvnic(nesqp->ibqp.device);
+        nesdev = nesvnic->nesdev;
+        adapter = nesdev->nesadapter;
+
+        nes_debug(NES_DBG_CM, "nesvnic=%p, netdev=%p, %s\n",
+                        nesvnic, nesvnic->netdev, nesvnic->netdev->name);
+
+        /* since this is from a listen, we were able to put node handle into cm_id */
+        cm_node = (struct nes_cm_node *)cm_id->provider_data;
+
+        /* associate the node with the QP */
+        nesqp->cm_node = (void *)cm_node;
+
+        nes_debug(NES_DBG_CM, "QP%u, cm_node=%p, jiffies = %lu\n",
+                        nesqp->hwqp.qp_id, cm_node, jiffies);
+        atomic_inc(&cm_accepts);
+
+        nes_debug(NES_DBG_CM, "netdev refcnt = %u.\n",
+                        atomic_read(&nesvnic->netdev->refcnt));
+
+                /* allocate the ietf frame and space for private data */
+                nesqp->ietf_frame = pci_alloc_consistent(nesdev->pcidev,
+                                sizeof(struct ietf_mpa_frame) + conn_param->private_data_len,
+                                &nesqp->ietf_frame_pbase);
+
+                if (!nesqp->ietf_frame) {
+                        nes_debug(NES_DBG_CM, "Unable to allocate memory for private data\n");
+                        return -ENOMEM;
+                }
+
+
+                /* setup the MPA frame */
+                nesqp->private_data_len = conn_param->private_data_len;
+                memcpy(nesqp->ietf_frame->key, IEFT_MPA_KEY_REP, IETF_MPA_KEY_SIZE);
+
+                memcpy(nesqp->ietf_frame->priv_data, conn_param->private_data,
+                                conn_param->private_data_len);
+
+                nesqp->ietf_frame->priv_data_len = cpu_to_be16(conn_param->private_data_len);
+                nesqp->ietf_frame->rev = mpa_version;
+                nesqp->ietf_frame->flags = IETF_MPA_FLAGS_CRC;
+
+                /* setup our first outgoing iWarp send WQE (the IETF frame response) */
+                wqe = &nesqp->hwqp.sq_vbase[0];
+
+                if (cm_id->remote_addr.sin_addr.s_addr != cm_id->local_addr.sin_addr.s_addr) {
+                        u64temp = (unsigned long)nesqp;
+                        u64temp |= NES_SW_CONTEXT_ALIGN>>1;
+                        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX,
+                                            u64temp);
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_MISC_IDX] =
+                                        cpu_to_le32(NES_IWARP_SQ_WQE_STREAMING | NES_IWARP_SQ_WQE_WRPDU);
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX] =
+                                        cpu_to_le32(conn_param->private_data_len + sizeof(struct ietf_mpa_frame));
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_FRAG0_LOW_IDX] =
+                                        cpu_to_le32((u32)nesqp->ietf_frame_pbase);
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_FRAG0_HIGH_IDX] =
+                                        cpu_to_le32((u32)((u64)nesqp->ietf_frame_pbase >> 32));
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_LENGTH0_IDX] =
+                                        cpu_to_le32(conn_param->private_data_len + sizeof(struct ietf_mpa_frame));
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = 0;
+
+                        nesqp->nesqp_context->ird_ord_sizes |= cpu_to_le32(
+                                        NES_QPCONTEXT_ORDIRD_LSMM_PRESENT | NES_QPCONTEXT_ORDIRD_WRPDU);
+                } else {
+                        nesqp->nesqp_context->ird_ord_sizes |= cpu_to_le32((NES_QPCONTEXT_ORDIRD_LSMM_PRESENT |
+                                        NES_QPCONTEXT_ORDIRD_WRPDU | NES_QPCONTEXT_ORDIRD_ALSMM));
+                }
+                nesqp->skip_lsmm = 1;
+
+
+        /* Cache the cm_id in the qp */
+        nesqp->cm_id = cm_id;
+        cm_node->cm_id = cm_id;
+
+        /*  nesqp->cm_node = (void *)cm_id->provider_data; */
+        cm_id->provider_data = nesqp;
+        nesqp->active_conn   = 0;
+
+        nes_cm_init_tsa_conn(nesqp, cm_node);
+
+        nesqp->nesqp_context->tcpPorts[0] = cpu_to_le16(ntohs(cm_id->local_addr.sin_port));
+        nesqp->nesqp_context->tcpPorts[1] = cpu_to_le16(ntohs(cm_id->remote_addr.sin_port));
+        nesqp->nesqp_context->ip0 = cpu_to_le32(ntohl(cm_id->remote_addr.sin_addr.s_addr));
+
+        nesqp->nesqp_context->misc2 |= cpu_to_le32(
+                        (u32)PCI_FUNC(nesdev->pcidev->devfn) << NES_QPCONTEXT_MISC2_SRC_IP_SHIFT);
+
+        nesqp->nesqp_context->arp_index_vlan |= cpu_to_le32(
+                        nes_arp_table(nesdev, le32_to_cpu(nesqp->nesqp_context->ip0), NULL,
+                        NES_ARP_RESOLVE) << 16);
+
+        nesqp->nesqp_context->ts_val_delta = cpu_to_le32(
+                        jiffies - nes_read_indexed(nesdev, NES_IDX_TCP_NOW));
+
+        nesqp->nesqp_context->ird_index = cpu_to_le32(nesqp->hwqp.qp_id);
+
+        nesqp->nesqp_context->ird_ord_sizes |= cpu_to_le32(
+                        ((u32)1 << NES_QPCONTEXT_ORDIRD_IWARP_MODE_SHIFT));
+        nesqp->nesqp_context->ird_ord_sizes |= cpu_to_le32((u32)conn_param->ord);
+
+        memset(&nes_quad, 0, sizeof(nes_quad));
+        nes_quad.DstIpAdrIndex = cpu_to_le32((u32)PCI_FUNC(nesdev->pcidev->devfn) << 24);
+        nes_quad.SrcIpadr      = cm_id->remote_addr.sin_addr.s_addr;
+        nes_quad.TcpPorts[0]   = cm_id->remote_addr.sin_port;
+        nes_quad.TcpPorts[1]   = cm_id->local_addr.sin_port;
+
+        /* Produce hash key */
+        nesqp->hte_index = cpu_to_be32(
+                        crc32c(~0, (void *)&nes_quad, sizeof(nes_quad)) ^ 0xffffffff);
+        nes_debug(NES_DBG_CM, "HTE Index = 0x%08X, CRC = 0x%08X\n",
+                        nesqp->hte_index, nesqp->hte_index & adapter->hte_index_mask);
+
+        nesqp->hte_index &= adapter->hte_index_mask;
+        nesqp->nesqp_context->hte_index = cpu_to_le32(nesqp->hte_index);
+
+        cm_node->cm_core->api->accelerated(cm_node->cm_core, cm_node);
+
+        nes_debug(NES_DBG_CM, "QP%u, Destination IP = 0x%08X:0x%04X, local = 0x%08X:0x%04X,"
+                        " rcv_nxt=0x%08X, snd_nxt=0x%08X, mpa + private data length=%zu.\n",
+                        nesqp->hwqp.qp_id,
+                        ntohl(cm_id->remote_addr.sin_addr.s_addr),
+                        ntohs(cm_id->remote_addr.sin_port),
+                        ntohl(cm_id->local_addr.sin_addr.s_addr),
+                        ntohs(cm_id->local_addr.sin_port),
+                        le32_to_cpu(nesqp->nesqp_context->rcv_nxt),
+                        le32_to_cpu(nesqp->nesqp_context->snd_nxt),
+                        conn_param->private_data_len+sizeof(struct ietf_mpa_frame));
+
+        attr.qp_state = IB_QPS_RTS;
+        nes_modify_qp(&nesqp->ibqp, &attr, IB_QP_STATE, NULL);
+
+        /* notify OF layer that accept event was successfull */
+        cm_id->add_ref(cm_id);
+
+        cm_event.event = IW_CM_EVENT_ESTABLISHED;
+        cm_event.status = IW_CM_EVENT_STATUS_ACCEPTED;
+        cm_event.provider_data = (void *)nesqp;
+        cm_event.local_addr = cm_id->local_addr;
+        cm_event.remote_addr = cm_id->remote_addr;
+        cm_event.private_data = NULL;
+        cm_event.private_data_len = 0;
+        ret = cm_id->event_handler(cm_id, &cm_event);
+        if (cm_node->loopbackpartner) {
+                cm_node->loopbackpartner->mpa_frame_size = nesqp->private_data_len;
+                /* copy entire MPA frame to our cm_node's frame */
+                memcpy(cm_node->loopbackpartner->mpa_frame_buf, nesqp->ietf_frame->priv_data,
+                           nesqp->private_data_len);
+                create_event(cm_node->loopbackpartner, NES_CM_EVENT_CONNECTED);
+        }
+        if (ret)
+                printk("%s[%u] OFA CM event_handler returned, ret=%d\n",
+                                __FUNCTION__, __LINE__, ret);
+
+        return 0;
+}
+
+
+/**
+ * nes_reject
+ */
+int nes_reject(struct iw_cm_id *cm_id, const void *pdata, u8 pdata_len)
+{
+        struct nes_cm_node *cm_node;
+        struct nes_cm_core *cm_core;
+
+        atomic_inc(&cm_rejects);
+        cm_node = (struct nes_cm_node *) cm_id->provider_data;
+        cm_core = cm_node->cm_core;
+        cm_node->mpa_frame_size = sizeof(struct ietf_mpa_frame) + pdata_len;
+
+        strcpy(&cm_node->mpa_frame.key[0], IEFT_MPA_KEY_REP);
+        memcpy(&cm_node->mpa_frame.priv_data, pdata, pdata_len);
+
+        cm_node->mpa_frame.priv_data_len = cpu_to_be16(pdata_len);
+        cm_node->mpa_frame.rev = mpa_version;
+        cm_node->mpa_frame.flags = IETF_MPA_FLAGS_CRC | IETF_MPA_FLAGS_REJECT;
+
+        cm_core->api->reject(cm_core, &cm_node->mpa_frame, cm_node);
+
+        return 0;
+}
+
+
+/**
+ * nes_connect
+ * setup and launch cm connect node
+ */
+int nes_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
+{
+        struct ib_qp *ibqp;
+        struct nes_qp *nesqp;
+        struct nes_vnic *nesvnic;
+        struct nes_device *nesdev;
+        struct nes_cm_node *cm_node;
+        struct nes_cm_info cm_info;
+
+        ibqp = nes_get_qp(cm_id->device, conn_param->qpn);
+        if (!ibqp)
+                return -EINVAL;
+        nesqp = to_nesqp(ibqp);
+        if (!nesqp)
+                return -EINVAL;
+        nesvnic = to_nesvnic(nesqp->ibqp.device);
+        if (!nesvnic)
+                return -EINVAL;
+        nesdev  = nesvnic->nesdev;
+        if (!nesdev)
+                return -EINVAL;
+
+        atomic_inc(&cm_connects);
+
+        nesqp->ietf_frame = kzalloc(sizeof(struct ietf_mpa_frame) +
+                        conn_param->private_data_len, GFP_KERNEL);
+        if (!nesqp->ietf_frame)
+                return -ENOMEM;
+
+        /* set qp as having an active connection */
+        nesqp->active_conn = 1;
+
+        nes_debug(NES_DBG_CM, "QP%u, Destination IP = 0x%08X:0x%04X, local = 0x%08X:0x%04X.\n",
+                        nesqp->hwqp.qp_id,
+                        ntohl(cm_id->remote_addr.sin_addr.s_addr),
+                        ntohs(cm_id->remote_addr.sin_port),
+                        ntohl(cm_id->local_addr.sin_addr.s_addr),
+                        ntohs(cm_id->local_addr.sin_port));
+
+        /* cache the cm_id in the qp */
+        nesqp->cm_id = cm_id;
+
+        cm_id->provider_data = nesqp;
+
+        /* copy the private data */
+        if (conn_param->private_data_len) {
+                memcpy(nesqp->ietf_frame->priv_data, conn_param->private_data,
+                                conn_param->private_data_len);
+        }
+
+        nesqp->private_data_len = conn_param->private_data_len;
+        nesqp->nesqp_context->ird_ord_sizes |= cpu_to_le32((u32)conn_param->ord);
+        nes_debug(NES_DBG_CM, "requested ord = 0x%08X.\n", (u32)conn_param->ord);
+        nes_debug(NES_DBG_CM, "mpa private data len =%u\n", conn_param->private_data_len);
+
+        strcpy(&nesqp->ietf_frame->key[0], IEFT_MPA_KEY_REQ);
+        nesqp->ietf_frame->flags = IETF_MPA_FLAGS_CRC;
+        nesqp->ietf_frame->rev = IETF_MPA_VERSION;
+        nesqp->ietf_frame->priv_data_len = htons(conn_param->private_data_len);
+
+        if (cm_id->local_addr.sin_addr.s_addr != cm_id->remote_addr.sin_addr.s_addr)
+                nes_manage_apbvt(nesvnic, ntohs(cm_id->local_addr.sin_port),
+                                PCI_FUNC(nesdev->pcidev->devfn), NES_MANAGE_APBVT_ADD);
+
+        /* set up the connection params for the node */
+        cm_info.loc_addr = (cm_id->local_addr.sin_addr.s_addr);
+        cm_info.loc_port = (cm_id->local_addr.sin_port);
+        cm_info.rem_addr = (cm_id->remote_addr.sin_addr.s_addr);
+        cm_info.rem_port = (cm_id->remote_addr.sin_port);
+        cm_info.cm_id = cm_id;
+        cm_info.conn_type = NES_CM_IWARP_CONN_TYPE;
+
+        cm_id->add_ref(cm_id);
+        nes_add_ref(&nesqp->ibqp);
+
+        /* create a connect CM node connection */
+        cm_node = g_cm_core->api->connect(g_cm_core, nesvnic, nesqp->ietf_frame, &cm_info);
+        if (!cm_node) {
+                if (cm_id->local_addr.sin_addr.s_addr != cm_id->remote_addr.sin_addr.s_addr)
+                        nes_manage_apbvt(nesvnic, ntohs(cm_id->local_addr.sin_port),
+                                        PCI_FUNC(nesdev->pcidev->devfn), NES_MANAGE_APBVT_DEL);
+                nes_rem_ref(&nesqp->ibqp);
+                kfree(nesqp->ietf_frame);
+                nesqp->ietf_frame = NULL;
+                cm_id->rem_ref(cm_id);
+                return -ENOMEM;
+        }
+
+        cm_node->apbvt_set = 1;
+        nesqp->cm_node = cm_node;
+
+        return 0;
+}
+
+
+/**
+ * nes_create_listen
+ */
+int nes_create_listen(struct iw_cm_id *cm_id, int backlog)
+{
+        struct nes_vnic *nesvnic;
+        struct nes_cm_listener *cm_node;
+        struct nes_cm_info cm_info;
+        struct nes_adapter *adapter;
+        int err;
+
+
+        nes_debug(NES_DBG_CM, "cm_id = %p, local port = 0x%04X.\n",
+                        cm_id, ntohs(cm_id->local_addr.sin_port));
+
+        nesvnic = to_nesvnic(cm_id->device);
+        if (!nesvnic)
+                return -EINVAL;
+        adapter = nesvnic->nesdev->nesadapter;
+        nes_debug(NES_DBG_CM, "nesvnic=%p, netdev=%p, %s\n",
+                        nesvnic, nesvnic->netdev, nesvnic->netdev->name);
+
+        nes_debug(NES_DBG_CM, "nesvnic->local_ipaddr=0x%08x, sin_addr.s_addr=0x%08x\n",
+                        nesvnic->local_ipaddr, cm_id->local_addr.sin_addr.s_addr);
+
+        /* setup listen params in our api call struct */
+        cm_info.loc_addr = nesvnic->local_ipaddr;
+        cm_info.loc_port = cm_id->local_addr.sin_port;
+        cm_info.backlog = backlog;
+        cm_info.cm_id = cm_id;
+
+        cm_info.conn_type = NES_CM_IWARP_CONN_TYPE;
+
+
+        cm_node = g_cm_core->api->listen(g_cm_core, nesvnic, &cm_info);
+        if (!cm_node) {
+                printk("%s[%u] Error returned from listen API call\n",
+                                __FUNCTION__, __LINE__);
+                return -ENOMEM;
+        }
+
+        cm_id->provider_data = cm_node;
+
+        if (!cm_node->reused_node) {
+                err = nes_manage_apbvt(nesvnic, ntohs(cm_id->local_addr.sin_port),
+                                PCI_FUNC(nesvnic->nesdev->pcidev->devfn), NES_MANAGE_APBVT_ADD);
+                if (err) {
+                        printk("nes_manage_apbvt call returned %d.\n", err);
+                        g_cm_core->api->stop_listener(g_cm_core, (void *)cm_node);
+                        return err;
+                }
+                cm_listens_created++;
+        }
+
+        cm_id->add_ref(cm_id);
+        cm_id->provider_data = (void *)cm_node;
+
+
+        return 0;
+}
+
+
+/**
+ * nes_destroy_listen
+ */
+int nes_destroy_listen(struct iw_cm_id *cm_id)
+{
+        if (cm_id->provider_data)
+                g_cm_core->api->stop_listener(g_cm_core, cm_id->provider_data);
+        else
+                nes_debug(NES_DBG_CM, "cm_id->provider_data was NULL\n");
+
+        cm_id->rem_ref(cm_id);
+
+        return 0;
+}
+
+
+/**
+ * nes_cm_recv
+ */
+int nes_cm_recv(struct sk_buff *skb, struct net_device *netdevice)
+{
+        cm_packets_received++;
+        if ((g_cm_core) && (g_cm_core->api)) {
+                g_cm_core->api->recv_pkt(g_cm_core, netdev_priv(netdevice), skb);
+        } else {
+                nes_debug(NES_DBG_CM, "Unable to process packet for CM,"
+                                " cm is not setup properly.\n");
+        }
+
+        return 0;
+}
+
+
+/**
+ * nes_cm_start
+ * Start and init a cm core module
+ */
+int nes_cm_start(void)
+{
+        nes_debug(NES_DBG_CM, "\n");
+        /* create the primary CM core, pass this handle to subsequent core inits */
+        g_cm_core = nes_cm_alloc_core();
+        if (g_cm_core) {
+                return 0;
+        } else {
+                return -ENOMEM;
+        }
+}
+
+
+/**
+ * nes_cm_stop
+ * stop and dealloc all cm core instances
+ */
+int nes_cm_stop(void)
+{
+        g_cm_core->api->destroy_cm_core(g_cm_core);
+        return 0;
+}
+
+
+/**
+ * cm_event_connected
+ * handle a connected event, setup QPs and HW
+ */
+void cm_event_connected(struct nes_cm_event *event)
+{
+        u64 u64temp;
+        struct nes_qp *nesqp;
+        struct nes_vnic *nesvnic;
+        struct nes_device *nesdev;
+        struct nes_cm_node *cm_node;
+        struct nes_adapter *nesadapter;
+        struct ib_qp_attr attr;
+        struct iw_cm_id *cm_id;
+        struct iw_cm_event cm_event;
+        struct nes_hw_qp_wqe *wqe;
+        struct nes_v4_quad nes_quad;
+        int ret;
+
+        /* get all our handles */
+        cm_node = event->cm_node;
+        cm_id = cm_node->cm_id;
+        nes_debug(NES_DBG_CM, "cm_event_connected - %p - cm_id = %p\n", cm_node, cm_id);
+        nesqp = (struct nes_qp *)cm_id->provider_data;
+        nesvnic = to_nesvnic(nesqp->ibqp.device);
+        nesdev = nesvnic->nesdev;
+        nesadapter = nesdev->nesadapter;
+
+        if (nesqp->destroyed) {
+                return;
+        }
+        atomic_inc(&cm_connecteds);
+        nes_debug(NES_DBG_CM, "QP%u attempting to connect to  0x%08X:0x%04X on"
+                        " local port 0x%04X. jiffies = %lu.\n",
+                        nesqp->hwqp.qp_id,
+                        ntohl(cm_id->remote_addr.sin_addr.s_addr),
+                        ntohs(cm_id->remote_addr.sin_port),
+                        ntohs(cm_id->local_addr.sin_port),
+                        jiffies);
+
+        nes_cm_init_tsa_conn(nesqp, cm_node);
+
+        /* set the QP tsa context */
+        nesqp->nesqp_context->tcpPorts[0] = cpu_to_le16(ntohs(cm_id->local_addr.sin_port));
+        nesqp->nesqp_context->tcpPorts[1] = cpu_to_le16(ntohs(cm_id->remote_addr.sin_port));
+        nesqp->nesqp_context->ip0 = cpu_to_le32(ntohl(cm_id->remote_addr.sin_addr.s_addr));
+
+        nesqp->nesqp_context->misc2 |= cpu_to_le32(
+                        (u32)PCI_FUNC(nesdev->pcidev->devfn) << NES_QPCONTEXT_MISC2_SRC_IP_SHIFT);
+        nesqp->nesqp_context->arp_index_vlan |= cpu_to_le32(
+                        nes_arp_table(nesdev, le32_to_cpu(nesqp->nesqp_context->ip0),
+                        NULL, NES_ARP_RESOLVE) << 16);
+        nesqp->nesqp_context->ts_val_delta = cpu_to_le32(
+                        jiffies - nes_read_indexed(nesdev, NES_IDX_TCP_NOW));
+        nesqp->nesqp_context->ird_index = cpu_to_le32(nesqp->hwqp.qp_id);
+        nesqp->nesqp_context->ird_ord_sizes |=
+                        cpu_to_le32((u32)1 << NES_QPCONTEXT_ORDIRD_IWARP_MODE_SHIFT);
+
+        /* Adjust tail for not having a LSMM */
+        nesqp->hwqp.sq_tail = 1;
+
+#if defined(NES_SEND_FIRST_WRITE)
+                if (cm_node->send_write0) {
+                        nes_debug(NES_DBG_CM, "Sending first write.\n");
+                        wqe = &nesqp->hwqp.sq_vbase[0];
+                        u64temp = (unsigned long)nesqp;
+                        u64temp |= NES_SW_CONTEXT_ALIGN>>1;
+                        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX,
+                                            u64temp);
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_MISC_IDX] = cpu_to_le32(NES_IWARP_SQ_OP_RDMAW);
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX] = 0;
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_FRAG0_LOW_IDX] = 0;
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_FRAG0_HIGH_IDX] = 0;
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_LENGTH0_IDX] = 0;
+                        wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = 0;
+
+                        /* use the reserved spot on the WQ for the extra first WQE */
+                        nesqp->nesqp_context->ird_ord_sizes &= cpu_to_le32(~(NES_QPCONTEXT_ORDIRD_LSMM_PRESENT |
+                                        NES_QPCONTEXT_ORDIRD_WRPDU | NES_QPCONTEXT_ORDIRD_ALSMM));
+                        nesqp->skip_lsmm = 1;
+                        nesqp->hwqp.sq_tail = 0;
+                        nes_write32(nesdev->regs + NES_WQE_ALLOC,
+                                        (1 << 24) | 0x00800000 | nesqp->hwqp.qp_id);
+                }
+#endif
+
+        memset(&nes_quad, 0, sizeof(nes_quad));
+
+        nes_quad.DstIpAdrIndex = cpu_to_le32((u32)PCI_FUNC(nesdev->pcidev->devfn) << 24);
+        nes_quad.SrcIpadr = cm_id->remote_addr.sin_addr.s_addr;
+        nes_quad.TcpPorts[0] = cm_id->remote_addr.sin_port;
+        nes_quad.TcpPorts[1] = cm_id->local_addr.sin_port;
+
+        /* Produce hash key */
+        nesqp->hte_index = cpu_to_be32(
+                        crc32c(~0, (void *)&nes_quad, sizeof(nes_quad)) ^ 0xffffffff);
+        nes_debug(NES_DBG_CM, "HTE Index = 0x%08X, After CRC = 0x%08X\n",
+                        nesqp->hte_index, nesqp->hte_index & nesadapter->hte_index_mask);
+
+        nesqp->hte_index &= nesadapter->hte_index_mask;
+        nesqp->nesqp_context->hte_index = cpu_to_le32(nesqp->hte_index);
+
+        nesqp->ietf_frame = &cm_node->mpa_frame;
+        nesqp->private_data_len = (u8) cm_node->mpa_frame_size;
+        cm_node->cm_core->api->accelerated(cm_node->cm_core, cm_node);
+
+        /* modify QP state to rts */
+        attr.qp_state = IB_QPS_RTS;
+        nes_modify_qp(&nesqp->ibqp, &attr, IB_QP_STATE, NULL);
+
+        /* notify OF layer we successfully created the requested connection */
+        cm_event.event = IW_CM_EVENT_CONNECT_REPLY;
+        cm_event.status = IW_CM_EVENT_STATUS_ACCEPTED;
+        cm_event.provider_data = cm_id->provider_data;
+        cm_event.local_addr.sin_family = AF_INET;
+        cm_event.local_addr.sin_port = cm_id->local_addr.sin_port;
+        cm_event.remote_addr = cm_id->remote_addr;
+
+                cm_event.private_data = (void *)event->cm_node->mpa_frame_buf;
+                cm_event.private_data_len = (u8) event->cm_node->mpa_frame_size;
+
+        cm_event.local_addr.sin_addr.s_addr = event->cm_info.rem_addr;
+        ret = cm_id->event_handler(cm_id, &cm_event);
+        nes_debug(NES_DBG_CM, "OFA CM event_handler returned, ret=%d\n", ret);
+
+        if (ret)
+                printk("%s[%u] OFA CM event_handler returned, ret=%d\n",
+                                __FUNCTION__, __LINE__, ret);
+        nes_debug(NES_DBG_CM, "Exiting connect thread for QP%u. jiffies = %lu\n",
+                        nesqp->hwqp.qp_id, jiffies );
+
+        nes_rem_ref(&nesqp->ibqp);
+
+        return;
+}
+
+
+/**
+ * cm_event_connect_error
+ */
+void cm_event_connect_error(struct nes_cm_event *event)
+{
+        struct nes_qp *nesqp;
+        struct iw_cm_id *cm_id;
+        struct iw_cm_event cm_event;
+        /* struct nes_cm_info cm_info; */
+        int ret;
+
+        if (!event->cm_node)
+                return;
+
+        cm_id = event->cm_node->cm_id;
+        if (!cm_id) {
+                return;
+        }
+
+        nes_debug(NES_DBG_CM, "cm_node=%p, cm_id=%p\n", event->cm_node, cm_id);
+        nesqp = cm_id->provider_data;
+
+        if (!nesqp) {
+                return;
+        }
+
+        /* notify OF layer about this connection error event */
+        /* cm_id->rem_ref(cm_id); */
+        nesqp->cm_id = NULL;
+        cm_id->provider_data = NULL;
+        cm_event.event = IW_CM_EVENT_CONNECT_REPLY;
+        cm_event.status = IW_CM_EVENT_STATUS_REJECTED;
+        cm_event.provider_data = cm_id->provider_data;
+        cm_event.local_addr = cm_id->local_addr;
+        cm_event.remote_addr = cm_id->remote_addr;
+        cm_event.private_data = NULL;
+        cm_event.private_data_len = 0;
+
+        nes_debug(NES_DBG_CM, "call CM_EVENT REJECTED, local_addr=%08x, remove_addr=%08x\n",
+                        cm_event.local_addr.sin_addr.s_addr, cm_event.remote_addr.sin_addr.s_addr);
+
+        ret = cm_id->event_handler(cm_id, &cm_event);
+        nes_debug(NES_DBG_CM, "OFA CM event_handler returned, ret=%d\n", ret);
+        if (ret)
+                printk("%s[%u] OFA CM event_handler returned, ret=%d\n",
+                                __FUNCTION__, __LINE__, ret);
+        nes_rem_ref(&nesqp->ibqp);
+                cm_id->rem_ref(cm_id);
+
+        return;
+}
+
+
+/**
+ * cm_event_reset
+ */
+void cm_event_reset(struct nes_cm_event *event)
+{
+        struct nes_qp *nesqp;
+        struct iw_cm_id *cm_id;
+        struct iw_cm_event cm_event;
+        /* struct nes_cm_info cm_info; */
+        int ret;
+
+        if (!event->cm_node)
+                return;
+
+        if (!event->cm_node->cm_id)
+                return;
+
+        cm_id = event->cm_node->cm_id;
+
+        nes_debug(NES_DBG_CM, "%p - cm_id = %p\n", event->cm_node, cm_id);
+        nesqp = cm_id->provider_data;
+
+        nesqp->cm_id = NULL;
+        /* cm_id->provider_data = NULL; */
+        cm_event.event = IW_CM_EVENT_DISCONNECT;
+        cm_event.status = IW_CM_EVENT_STATUS_RESET;
+        cm_event.provider_data = cm_id->provider_data;
+        cm_event.local_addr = cm_id->local_addr;
+        cm_event.remote_addr = cm_id->remote_addr;
+        cm_event.private_data = NULL;
+        cm_event.private_data_len = 0;
+
+        ret = cm_id->event_handler(cm_id, &cm_event);
+        nes_debug(NES_DBG_CM, "OFA CM event_handler returned, ret=%d\n", ret);
+
+
+        /* notify OF layer about this connection error event */
+        cm_id->rem_ref(cm_id);
+
+        return;
+}
+
+
+/**
+ * cm_event_mpa_req
+ */
+void cm_event_mpa_req(struct nes_cm_event *event)
+{
+        struct iw_cm_id   *cm_id;
+        struct iw_cm_event cm_event;
+        int ret;
+        struct nes_cm_node *cm_node;
+
+        cm_node = event->cm_node;
+        if (!cm_node)
+                return;
+        cm_id = cm_node->cm_id;
+
+        atomic_inc(&cm_connect_reqs);
+        nes_debug(NES_DBG_CM, "cm_node = %p - cm_id = %p, jiffies = %lu\n",
+                        cm_node, cm_id, jiffies);
+
+        cm_event.event = IW_CM_EVENT_CONNECT_REQUEST;
+        cm_event.status = IW_CM_EVENT_STATUS_OK;
+        cm_event.provider_data = (void *)cm_node;
+
+        cm_event.local_addr.sin_family = AF_INET;
+        cm_event.local_addr.sin_port = htons(event->cm_info.loc_port);
+        cm_event.local_addr.sin_addr.s_addr = htonl(event->cm_info.loc_addr);
+
+        cm_event.remote_addr.sin_family = AF_INET;
+        cm_event.remote_addr.sin_port = htons(event->cm_info.rem_port);
+        cm_event.remote_addr.sin_addr.s_addr = htonl(event->cm_info.rem_addr);
+
+                cm_event.private_data                = cm_node->mpa_frame_buf;
+                cm_event.private_data_len            = (u8) cm_node->mpa_frame_size;
+
+        ret = cm_id->event_handler(cm_id, &cm_event);
+        if (ret)
+                printk("%s[%u] OFA CM event_handler returned, ret=%d\n",
+                                __FUNCTION__, __LINE__, ret);
+
+        return;
+}
+
+
+static void nes_cm_event_handler(struct work_struct *);
+
+/**
+ * nes_cm_post_event
+ * post an event to the cm event handler
+ */
+int nes_cm_post_event(struct nes_cm_event *event)
+{
+        atomic_inc(&event->cm_node->cm_core->events_posted);
+        add_ref_cm_node(event->cm_node);
+        event->cm_info.cm_id->add_ref(event->cm_info.cm_id);
+        INIT_WORK(&event->event_work, nes_cm_event_handler);
+        nes_debug(NES_DBG_CM, "queue_work, event=%p\n", event);
+
+        queue_work(event->cm_node->cm_core->event_wq, &event->event_work);
+
+        nes_debug(NES_DBG_CM, "Exit\n");
+        return 0;
+}
+
+
+/**
+ * nes_cm_event_handler
+ * worker function to handle cm events
+ * will free instance of nes_cm_event
+ */
+static void nes_cm_event_handler(struct work_struct *work)
+{
+        struct nes_cm_event *event = container_of(work, struct nes_cm_event, event_work);
+        struct nes_cm_core *cm_core;
+
+        if ((!event) || (!event->cm_node) || (!event->cm_node->cm_core)) {
+                return;
+        }
+        cm_core = event->cm_node->cm_core;
+        nes_debug(NES_DBG_CM, "event=%p, event->type=%u, events posted=%u\n",
+                        event, event->type, atomic_read(&cm_core->events_posted));
+
+        switch (event->type) {
+                case NES_CM_EVENT_MPA_REQ:
+                        cm_event_mpa_req(event);
+                        nes_debug(NES_DBG_CM, "CM Event: MPA REQUEST\n");
+                        break;
+                case NES_CM_EVENT_RESET:
+                        nes_debug(NES_DBG_CM, "CM Event: RESET\n");
+                        cm_event_reset(event);
+                        break;
+                case NES_CM_EVENT_CONNECTED:
+                        if ((!event->cm_node->cm_id) ||
+                                (event->cm_node->state != NES_CM_STATE_TSA)) {
+                                break;
+                        }
+                        cm_event_connected(event);
+                        nes_debug(NES_DBG_CM, "CM Event: CONNECTED\n");
+                        break;
+                case NES_CM_EVENT_ABORTED:
+                        if ((!event->cm_node->cm_id) || (event->cm_node->state == NES_CM_STATE_TSA)) {
+                                break;
+                        }
+                        cm_event_connect_error(event);
+                        nes_debug(NES_DBG_CM, "CM Event: ABORTED\n");
+                        break;
+                case NES_CM_EVENT_DROPPED_PKT:
+                        nes_debug(NES_DBG_CM, "CM Event: DROPPED PKT\n");
+                        break;
+                default:
+                        nes_debug(NES_DBG_CM, "CM Event: UNKNOWN EVENT TYPE\n");
+                        break;
+        }
+
+        atomic_dec(&cm_core->events_posted);
+        event->cm_info.cm_id->rem_ref(event->cm_info.cm_id);
+        rem_ref_cm_node(cm_core, event->cm_node);
+        kfree(event);
+
+        return;
+}
diff --git a/drivers/infiniband/hw/nes/nes_cm.h b/drivers/infiniband/hw/nes/nes_cm.h
new file mode 100644
index 000000000000..a59f0a7fb278
--- /dev/null
+++ b/drivers/infiniband/hw/nes/nes_cm.h
@@ -0,0 +1,433 @@
+/*
+ * Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+#ifndef NES_CM_H
+#define NES_CM_H
+
+#define QUEUE_EVENTS
+
+#define NES_MANAGE_APBVT_DEL 0
+#define NES_MANAGE_APBVT_ADD 1
+
+/* IETF MPA -- defines, enums, structs */
+#define IEFT_MPA_KEY_REQ  "MPA ID Req Frame"
+#define IEFT_MPA_KEY_REP  "MPA ID Rep Frame"
+#define IETF_MPA_KEY_SIZE 16
+#define IETF_MPA_VERSION  1
+
+enum ietf_mpa_flags {
+        IETF_MPA_FLAGS_MARKERS = 0x80,  /* receive Markers */
+        IETF_MPA_FLAGS_CRC     = 0x40,  /* receive Markers */
+        IETF_MPA_FLAGS_REJECT  = 0x20,  /* Reject */
+};
+
+struct ietf_mpa_frame {
+        u8 key[IETF_MPA_KEY_SIZE];
+        u8 flags;
+        u8 rev;
+        __be16 priv_data_len;
+        u8 priv_data[0];
+};
+
+#define ietf_mpa_req_resp_frame ietf_mpa_frame
+
+struct nes_v4_quad {
+        u32 rsvd0;
+        __le32 DstIpAdrIndex;   /* Only most significant 5 bits are valid */
+        __be32 SrcIpadr;
+        __be16 TcpPorts[2];             /* src is low, dest is high */
+};
+
+struct nes_cm_node;
+enum nes_timer_type {
+        NES_TIMER_TYPE_SEND,
+        NES_TIMER_TYPE_RECV,
+        NES_TIMER_NODE_CLEANUP,
+        NES_TIMER_TYPE_CLOSE,
+};
+
+#define MAX_NES_IFS 4
+
+#define SET_ACK 1
+#define SET_SYN 2
+#define SET_FIN 4
+#define SET_RST 8
+
+struct option_base {
+        u8 optionnum;
+        u8 length;
+};
+
+enum option_numbers {
+        OPTION_NUMBER_END,
+        OPTION_NUMBER_NONE,
+        OPTION_NUMBER_MSS,
+        OPTION_NUMBER_WINDOW_SCALE,
+        OPTION_NUMBER_SACK_PERM,
+        OPTION_NUMBER_SACK,
+        OPTION_NUMBER_WRITE0 = 0xbc
+};
+
+struct option_mss {
+        u8 optionnum;
+        u8 length;
+        __be16 mss;
+};
+
+struct option_windowscale {
+        u8 optionnum;
+        u8 length;
+        u8 shiftcount;
+};
+
+union all_known_options {
+        char as_end;
+        struct option_base as_base;
+        struct option_mss as_mss;
+        struct option_windowscale as_windowscale;
+};
+
+struct nes_timer_entry {
+        struct list_head list;
+        unsigned long timetosend;       /* jiffies */
+        struct sk_buff *skb;
+        u32 type;
+        u32 retrycount;
+        u32 retranscount;
+        u32 context;
+        u32 seq_num;
+        u32 send_retrans;
+        int close_when_complete;
+        struct net_device *netdev;
+};
+
+#define NES_DEFAULT_RETRYS  64
+#define NES_DEFAULT_RETRANS 8
+#ifdef CONFIG_INFINIBAND_NES_DEBUG
+#define NES_RETRY_TIMEOUT   (1000*HZ/1000)
+#else
+#define NES_RETRY_TIMEOUT   (3000*HZ/1000)
+#endif
+#define NES_SHORT_TIME      (10)
+#define NES_LONG_TIME       (2000*HZ/1000)
+
+#define NES_CM_HASHTABLE_SIZE         1024
+#define NES_CM_TCP_TIMER_INTERVAL     3000
+#define NES_CM_DEFAULT_MTU            1540
+#define NES_CM_DEFAULT_FRAME_CNT      10
+#define NES_CM_THREAD_STACK_SIZE      256
+#define NES_CM_DEFAULT_RCV_WND        64240     // before we know that window scaling is allowed
+#define NES_CM_DEFAULT_RCV_WND_SCALED 256960  // after we know that window scaling is allowed
+#define NES_CM_DEFAULT_RCV_WND_SCALE  2
+#define NES_CM_DEFAULT_FREE_PKTS      0x000A
+#define NES_CM_FREE_PKT_LO_WATERMARK  2
+
+#define NES_CM_DEFAULT_MSS   536
+
+#define NES_CM_DEF_SEQ       0x159bf75f
+#define NES_CM_DEF_LOCAL_ID  0x3b47
+
+#define NES_CM_DEF_SEQ2      0x18ed5740
+#define NES_CM_DEF_LOCAL_ID2 0xb807
+
+typedef u32 nes_addr_t;
+
+#define nes_cm_tsa_context nes_qp_context
+
+struct nes_qp;
+
+/* cm node transition states */
+enum nes_cm_node_state {
+        NES_CM_STATE_UNKNOWN,
+        NES_CM_STATE_INITED,
+        NES_CM_STATE_LISTENING,
+        NES_CM_STATE_SYN_RCVD,
+        NES_CM_STATE_SYN_SENT,
+        NES_CM_STATE_ONE_SIDE_ESTABLISHED,
+        NES_CM_STATE_ESTABLISHED,
+        NES_CM_STATE_ACCEPTING,
+        NES_CM_STATE_MPAREQ_SENT,
+        NES_CM_STATE_TSA,
+        NES_CM_STATE_FIN_WAIT1,
+        NES_CM_STATE_FIN_WAIT2,
+        NES_CM_STATE_CLOSE_WAIT,
+        NES_CM_STATE_TIME_WAIT,
+        NES_CM_STATE_LAST_ACK,
+        NES_CM_STATE_CLOSING,
+        NES_CM_STATE_CLOSED
+};
+
+/* type of nes connection */
+enum nes_cm_conn_type {
+        NES_CM_IWARP_CONN_TYPE,
+};
+
+/* CM context params */
+struct nes_cm_tcp_context {
+        u8  client;
+
+        u32 loc_seq_num;
+        u32 loc_ack_num;
+        u32 rem_ack_num;
+        u32 rcv_nxt;
+
+        u32 loc_id;
+        u32 rem_id;
+
+        u32 snd_wnd;
+        u32 max_snd_wnd;
+
+        u32 rcv_wnd;
+        u32 mss;
+        u8  snd_wscale;
+        u8  rcv_wscale;
+
+        struct nes_cm_tsa_context tsa_cntxt;
+        struct timeval            sent_ts;
+};
+
+
+enum nes_cm_listener_state {
+        NES_CM_LISTENER_PASSIVE_STATE=1,
+        NES_CM_LISTENER_ACTIVE_STATE=2,
+        NES_CM_LISTENER_EITHER_STATE=3
+};
+
+struct nes_cm_listener {
+        struct list_head           list;
+        u64                        session_id;
+        struct nes_cm_core         *cm_core;
+        u8                         loc_mac[ETH_ALEN];
+        nes_addr_t                 loc_addr;
+        u16                        loc_port;
+        struct iw_cm_id            *cm_id;
+        enum nes_cm_conn_type      conn_type;
+        atomic_t                   ref_count;
+        struct nes_vnic            *nesvnic;
+        atomic_t                   pend_accepts_cnt;
+        int                        backlog;
+        enum nes_cm_listener_state listener_state;
+        u32                        reused_node;
+};
+
+/* per connection node and node state information */
+struct nes_cm_node {
+        u64                       session_id;
+        u32                       hashkey;
+
+        nes_addr_t                loc_addr, rem_addr;
+        u16                       loc_port, rem_port;
+
+        u8                        loc_mac[ETH_ALEN];
+        u8                        rem_mac[ETH_ALEN];
+
+        enum nes_cm_node_state    state;
+        struct nes_cm_tcp_context tcp_cntxt;
+        struct nes_cm_core        *cm_core;
+        struct sk_buff_head       resend_list;
+        atomic_t                  ref_count;
+        struct net_device         *netdev;
+
+        struct nes_cm_node        *loopbackpartner;
+        struct list_head          retrans_list;
+        spinlock_t                retrans_list_lock;
+        struct list_head          recv_list;
+        spinlock_t                recv_list_lock;
+
+        int                       send_write0;
+        union {
+                struct ietf_mpa_frame mpa_frame;
+                u8                    mpa_frame_buf[NES_CM_DEFAULT_MTU];
+        };
+        u16                       mpa_frame_size;
+        struct iw_cm_id           *cm_id;
+        struct list_head          list;
+        int                       accelerated;
+        struct nes_cm_listener    *listener;
+        enum nes_cm_conn_type     conn_type;
+        struct nes_vnic           *nesvnic;
+        int                       apbvt_set;
+        int                       accept_pend;
+};
+
+/* structure for client or CM to fill when making CM api calls. */
+/*      - only need to set relevant data, based on op. */
+struct nes_cm_info {
+        union {
+                struct iw_cm_id   *cm_id;
+                struct net_device *netdev;
+        };
+
+        u16 loc_port;
+        u16 rem_port;
+        nes_addr_t loc_addr;
+        nes_addr_t rem_addr;
+
+        enum nes_cm_conn_type  conn_type;
+        int backlog;
+};
+
+/* CM event codes */
+enum  nes_cm_event_type {
+        NES_CM_EVENT_UNKNOWN,
+        NES_CM_EVENT_ESTABLISHED,
+        NES_CM_EVENT_MPA_REQ,
+        NES_CM_EVENT_MPA_CONNECT,
+        NES_CM_EVENT_MPA_ACCEPT,
+        NES_CM_EVENT_MPA_ESTABLISHED,
+        NES_CM_EVENT_CONNECTED,
+        NES_CM_EVENT_CLOSED,
+        NES_CM_EVENT_RESET,
+        NES_CM_EVENT_DROPPED_PKT,
+        NES_CM_EVENT_CLOSE_IMMED,
+        NES_CM_EVENT_CLOSE_HARD,
+        NES_CM_EVENT_CLOSE_CLEAN,
+        NES_CM_EVENT_ABORTED,
+        NES_CM_EVENT_SEND_FIRST
+};
+
+/* event to post to CM event handler */
+struct nes_cm_event {
+        enum nes_cm_event_type type;
+
+        struct nes_cm_info cm_info;
+        struct work_struct event_work;
+        struct nes_cm_node *cm_node;
+};
+
+struct nes_cm_core {
+        enum nes_cm_node_state  state;
+        atomic_t                session_id;
+
+        atomic_t                listen_node_cnt;
+        struct nes_cm_node      listen_list;
+        spinlock_t              listen_list_lock;
+
+        u32                     mtu;
+        u32                     free_tx_pkt_max;
+        u32                     rx_pkt_posted;
+        struct sk_buff_head     tx_free_list;
+        atomic_t                ht_node_cnt;
+        struct list_head        connected_nodes;
+        /* struct list_head hashtable[NES_CM_HASHTABLE_SIZE]; */
+        spinlock_t              ht_lock;
+
+        struct timer_list       tcp_timer;
+
+        struct nes_cm_ops       *api;
+
+        int (*post_event)(struct nes_cm_event *event);
+        atomic_t                events_posted;
+        struct workqueue_struct *event_wq;
+        struct workqueue_struct *disconn_wq;
+
+        atomic_t                node_cnt;
+        u64                     aborted_connects;
+        u32                     options;
+
+        struct nes_cm_node      *current_listen_node;
+};
+
+
+#define NES_CM_SET_PKT_SIZE        (1 << 1)
+#define NES_CM_SET_FREE_PKT_Q_SIZE (1 << 2)
+
+/* CM ops/API for client interface */
+struct nes_cm_ops {
+        int (*accelerated)(struct nes_cm_core *, struct nes_cm_node *);
+        struct nes_cm_listener * (*listen)(struct nes_cm_core *, struct nes_vnic *,
+                        struct nes_cm_info *);
+        int (*stop_listener)(struct nes_cm_core *, struct nes_cm_listener *);
+        struct nes_cm_node * (*connect)(struct nes_cm_core *,
+                        struct nes_vnic *, struct ietf_mpa_frame *,
+                        struct nes_cm_info *);
+        int (*close)(struct nes_cm_core *, struct nes_cm_node *);
+        int (*accept)(struct nes_cm_core *, struct ietf_mpa_frame *,
+                        struct nes_cm_node *);
+        int (*reject)(struct nes_cm_core *, struct ietf_mpa_frame *,
+                        struct nes_cm_node *);
+        int (*recv_pkt)(struct nes_cm_core *, struct nes_vnic *,
+                        struct sk_buff *);
+        int (*destroy_cm_core)(struct nes_cm_core *);
+        int (*get)(struct nes_cm_core *);
+        int (*set)(struct nes_cm_core *, u32, u32);
+};
+
+
+int send_mpa_request(struct nes_cm_node *);
+struct sk_buff *form_cm_frame(struct sk_buff *, struct nes_cm_node *,
+                void *, u32, void *, u32, u8);
+int schedule_nes_timer(struct nes_cm_node *, struct sk_buff *,
+                enum nes_timer_type, int, int);
+void nes_cm_timer_tick(unsigned long);
+int send_syn(struct nes_cm_node *, u32);
+int send_reset(struct nes_cm_node *);
+int send_ack(struct nes_cm_node *);
+int send_fin(struct nes_cm_node *, struct sk_buff *);
+struct sk_buff *get_free_pkt(struct nes_cm_node *);
+int process_packet(struct nes_cm_node *, struct sk_buff *, struct nes_cm_core *);
+
+struct nes_cm_node * mini_cm_connect(struct nes_cm_core *,
+                struct nes_vnic *, struct ietf_mpa_frame *, struct nes_cm_info *);
+int mini_cm_accept(struct nes_cm_core *, struct ietf_mpa_frame *, struct nes_cm_node *);
+int mini_cm_reject(struct nes_cm_core *, struct ietf_mpa_frame *, struct nes_cm_node *);
+int mini_cm_close(struct nes_cm_core *, struct nes_cm_node *);
+int mini_cm_recv_pkt(struct nes_cm_core *, struct nes_vnic *, struct sk_buff *);
+struct nes_cm_core *mini_cm_alloc_core(struct nes_cm_info *);
+int mini_cm_dealloc_core(struct nes_cm_core *);
+int mini_cm_get(struct nes_cm_core *);
+int mini_cm_set(struct nes_cm_core *, u32, u32);
+
+int nes_cm_disconn(struct nes_qp *);
+void nes_disconnect_worker(struct work_struct *);
+int nes_cm_disconn_true(struct nes_qp *);
+int nes_disconnect(struct nes_qp *, int);
+
+int nes_accept(struct iw_cm_id *, struct iw_cm_conn_param *);
+int nes_reject(struct iw_cm_id *, const void *, u8);
+int nes_connect(struct iw_cm_id *, struct iw_cm_conn_param *);
+int nes_create_listen(struct iw_cm_id *, int);
+int nes_destroy_listen(struct iw_cm_id *);
+
+int nes_cm_recv(struct sk_buff *, struct net_device *);
+int nes_cm_start(void);
+int nes_cm_stop(void);
+
+/* CM event handler functions */
+void cm_event_connected(struct nes_cm_event *);
+void cm_event_connect_error(struct nes_cm_event *);
+void cm_event_reset(struct nes_cm_event *);
+void cm_event_mpa_req(struct nes_cm_event *);
+int nes_cm_post_event(struct nes_cm_event *);
+
+#endif                  /* NES_CM_H */
diff --git a/drivers/infiniband/hw/nes/nes_context.h b/drivers/infiniband/hw/nes/nes_context.h
new file mode 100644
index 000000000000..da9daba8e668
--- /dev/null
+++ b/drivers/infiniband/hw/nes/nes_context.h
@@ -0,0 +1,193 @@
+/*
+ * Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef NES_CONTEXT_H
+#define NES_CONTEXT_H
+
+struct nes_qp_context {
+        __le32   misc;
+        __le32   cqs;
+        __le32   sq_addr_low;
+        __le32   sq_addr_high;
+        __le32   rq_addr_low;
+        __le32   rq_addr_high;
+        __le32   misc2;
+        __le16   tcpPorts[2];
+        __le32   ip0;
+        __le32   ip1;
+        __le32   ip2;
+        __le32   ip3;
+        __le32   mss;
+        __le32   arp_index_vlan;
+        __le32   tcp_state_flow_label;
+        __le32   pd_index_wscale;
+        __le32   keepalive;
+        u32   ts_recent;
+        u32   ts_age;
+        __le32   snd_nxt;
+        __le32   snd_wnd;
+        __le32   rcv_nxt;
+        __le32   rcv_wnd;
+        __le32   snd_max;
+        __le32   snd_una;
+        u32   srtt;
+        __le32   rttvar;
+        __le32   ssthresh;
+        __le32   cwnd;
+        __le32   snd_wl1;
+        __le32   snd_wl2;
+        __le32   max_snd_wnd;
+        __le32   ts_val_delta;
+        u32   retransmit;
+        u32   probe_cnt;
+        u32   hte_index;
+        __le32   q2_addr_low;
+        __le32   q2_addr_high;
+        __le32   ird_index;
+        u32   Rsvd3;
+        __le32   ird_ord_sizes;
+        u32   mrkr_offset;
+        __le32   aeq_token_low;
+        __le32   aeq_token_high;
+};
+
+/* QP Context Misc Field */
+
+#define NES_QPCONTEXT_MISC_IWARP_VER_MASK    0x00000003
+#define NES_QPCONTEXT_MISC_IWARP_VER_SHIFT   0
+#define NES_QPCONTEXT_MISC_EFB_SIZE_MASK     0x000000C0
+#define NES_QPCONTEXT_MISC_EFB_SIZE_SHIFT    6
+#define NES_QPCONTEXT_MISC_RQ_SIZE_MASK      0x00000300
+#define NES_QPCONTEXT_MISC_RQ_SIZE_SHIFT     8
+#define NES_QPCONTEXT_MISC_SQ_SIZE_MASK      0x00000c00
+#define NES_QPCONTEXT_MISC_SQ_SIZE_SHIFT     10
+#define NES_QPCONTEXT_MISC_PCI_FCN_MASK      0x00007000
+#define NES_QPCONTEXT_MISC_PCI_FCN_SHIFT     12
+#define NES_QPCONTEXT_MISC_DUP_ACKS_MASK     0x00070000
+#define NES_QPCONTEXT_MISC_DUP_ACKS_SHIFT    16
+
+enum nes_qp_context_misc_bits {
+        NES_QPCONTEXT_MISC_RX_WQE_SIZE         = 0x00000004,
+        NES_QPCONTEXT_MISC_IPV4                = 0x00000008,
+        NES_QPCONTEXT_MISC_DO_NOT_FRAG         = 0x00000010,
+        NES_QPCONTEXT_MISC_INSERT_VLAN         = 0x00000020,
+        NES_QPCONTEXT_MISC_DROS                = 0x00008000,
+        NES_QPCONTEXT_MISC_WSCALE              = 0x00080000,
+        NES_QPCONTEXT_MISC_KEEPALIVE           = 0x00100000,
+        NES_QPCONTEXT_MISC_TIMESTAMP           = 0x00200000,
+        NES_QPCONTEXT_MISC_SACK                = 0x00400000,
+        NES_QPCONTEXT_MISC_RDMA_WRITE_EN       = 0x00800000,
+        NES_QPCONTEXT_MISC_RDMA_READ_EN        = 0x01000000,
+        NES_QPCONTEXT_MISC_WBIND_EN            = 0x10000000,
+        NES_QPCONTEXT_MISC_FAST_REGISTER_EN    = 0x20000000,
+        NES_QPCONTEXT_MISC_PRIV_EN             = 0x40000000,
+        NES_QPCONTEXT_MISC_NO_NAGLE            = 0x80000000
+};
+
+enum nes_qp_acc_wq_sizes {
+        HCONTEXT_TSA_WQ_SIZE_4 = 0,
+        HCONTEXT_TSA_WQ_SIZE_32 = 1,
+        HCONTEXT_TSA_WQ_SIZE_128 = 2,
+        HCONTEXT_TSA_WQ_SIZE_512 = 3
+};
+
+/* QP Context Misc2 Fields */
+#define NES_QPCONTEXT_MISC2_TTL_MASK            0x000000ff
+#define NES_QPCONTEXT_MISC2_TTL_SHIFT           0
+#define NES_QPCONTEXT_MISC2_HOP_LIMIT_MASK      0x000000ff
+#define NES_QPCONTEXT_MISC2_HOP_LIMIT_SHIFT     0
+#define NES_QPCONTEXT_MISC2_LIMIT_MASK          0x00000300
+#define NES_QPCONTEXT_MISC2_LIMIT_SHIFT         8
+#define NES_QPCONTEXT_MISC2_NIC_INDEX_MASK      0x0000fc00
+#define NES_QPCONTEXT_MISC2_NIC_INDEX_SHIFT     10
+#define NES_QPCONTEXT_MISC2_SRC_IP_MASK         0x001f0000
+#define NES_QPCONTEXT_MISC2_SRC_IP_SHIFT        16
+#define NES_QPCONTEXT_MISC2_TOS_MASK            0xff000000
+#define NES_QPCONTEXT_MISC2_TOS_SHIFT           24
+#define NES_QPCONTEXT_MISC2_TRAFFIC_CLASS_MASK  0xff000000
+#define NES_QPCONTEXT_MISC2_TRAFFIC_CLASS_SHIFT 24
+
+/* QP Context Tcp State/Flow Label Fields */
+#define NES_QPCONTEXT_TCPFLOW_FLOW_LABEL_MASK   0x000fffff
+#define NES_QPCONTEXT_TCPFLOW_FLOW_LABEL_SHIFT  0
+#define NES_QPCONTEXT_TCPFLOW_TCP_STATE_MASK    0xf0000000
+#define NES_QPCONTEXT_TCPFLOW_TCP_STATE_SHIFT   28
+
+enum nes_qp_tcp_state {
+        NES_QPCONTEXT_TCPSTATE_CLOSED = 1,
+        NES_QPCONTEXT_TCPSTATE_EST = 5,
+        NES_QPCONTEXT_TCPSTATE_TIME_WAIT = 11,
+};
+
+/* QP Context PD Index/wscale Fields */
+#define NES_QPCONTEXT_PDWSCALE_RCV_WSCALE_MASK  0x0000000f
+#define NES_QPCONTEXT_PDWSCALE_RCV_WSCALE_SHIFT 0
+#define NES_QPCONTEXT_PDWSCALE_SND_WSCALE_MASK  0x00000f00
+#define NES_QPCONTEXT_PDWSCALE_SND_WSCALE_SHIFT 8
+#define NES_QPCONTEXT_PDWSCALE_PDINDEX_MASK     0xffff0000
+#define NES_QPCONTEXT_PDWSCALE_PDINDEX_SHIFT    16
+
+/* QP Context Keepalive Fields */
+#define NES_QPCONTEXT_KEEPALIVE_DELTA_MASK      0x0000ffff
+#define NES_QPCONTEXT_KEEPALIVE_DELTA_SHIFT     0
+#define NES_QPCONTEXT_KEEPALIVE_PROBE_CNT_MASK  0x00ff0000
+#define NES_QPCONTEXT_KEEPALIVE_PROBE_CNT_SHIFT 16
+#define NES_QPCONTEXT_KEEPALIVE_INTV_MASK       0xff000000
+#define NES_QPCONTEXT_KEEPALIVE_INTV_SHIFT      24
+
+/* QP Context ORD/IRD Fields */
+#define NES_QPCONTEXT_ORDIRD_ORDSIZE_MASK       0x0000007f
+#define NES_QPCONTEXT_ORDIRD_ORDSIZE_SHIFT      0
+#define NES_QPCONTEXT_ORDIRD_IRDSIZE_MASK       0x00030000
+#define NES_QPCONTEXT_ORDIRD_IRDSIZE_SHIFT      16
+#define NES_QPCONTEXT_ORDIRD_IWARP_MODE_MASK    0x30000000
+#define NES_QPCONTEXT_ORDIRD_IWARP_MODE_SHIFT   28
+
+enum nes_ord_ird_bits {
+        NES_QPCONTEXT_ORDIRD_WRPDU                   = 0x02000000,
+        NES_QPCONTEXT_ORDIRD_LSMM_PRESENT            = 0x04000000,
+        NES_QPCONTEXT_ORDIRD_ALSMM                   = 0x08000000,
+        NES_QPCONTEXT_ORDIRD_AAH                     = 0x40000000,
+        NES_QPCONTEXT_ORDIRD_RNMC                    = 0x80000000
+};
+
+enum nes_iwarp_qp_state {
+        NES_QPCONTEXT_IWARP_STATE_NONEXIST  = 0,
+        NES_QPCONTEXT_IWARP_STATE_IDLE      = 1,
+        NES_QPCONTEXT_IWARP_STATE_RTS       = 2,
+        NES_QPCONTEXT_IWARP_STATE_CLOSING   = 3,
+        NES_QPCONTEXT_IWARP_STATE_TERMINATE = 5,
+        NES_QPCONTEXT_IWARP_STATE_ERROR     = 6
+};
+
+
+#endif          /* NES_CONTEXT_H */
diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c
new file mode 100644
index 000000000000..7c4c0fbf0abd
--- /dev/null
+++ b/drivers/infiniband/hw/nes/nes_hw.c
@@ -0,0 +1,3080 @@
+/*
+ * Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/ip.h>
+#include <linux/tcp.h>
+#include <linux/if_vlan.h>
+
+#include "nes.h"
+
+u32 crit_err_count = 0;
+u32 int_mod_timer_init;
+u32 int_mod_cq_depth_256;
+u32 int_mod_cq_depth_128;
+u32 int_mod_cq_depth_32;
+u32 int_mod_cq_depth_24;
+u32 int_mod_cq_depth_16;
+u32 int_mod_cq_depth_4;
+u32 int_mod_cq_depth_1;
+
+#include "nes_cm.h"
+
+
+#ifdef CONFIG_INFINIBAND_NES_DEBUG
+static unsigned char *nes_iwarp_state_str[] = {
+        "Non-Existant",
+        "Idle",
+        "RTS",
+        "Closing",
+        "RSVD1",
+        "Terminate",
+        "Error",
+        "RSVD2",
+};
+
+static unsigned char *nes_tcp_state_str[] = {
+        "Non-Existant",
+        "Closed",
+        "Listen",
+        "SYN Sent",
+        "SYN Rcvd",
+        "Established",
+        "Close Wait",
+        "FIN Wait 1",
+        "Closing",
+        "Last Ack",
+        "FIN Wait 2",
+        "Time Wait",
+        "RSVD1",
+        "RSVD2",
+        "RSVD3",
+        "RSVD4",
+};
+#endif
+
+
+/**
+ * nes_nic_init_timer_defaults
+ */
+void  nes_nic_init_timer_defaults(struct nes_device *nesdev, u8 jumbomode)
+{
+        unsigned long flags;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
+
+        spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags);
+
+        shared_timer->timer_in_use_min = NES_NIC_FAST_TIMER_LOW;
+        shared_timer->timer_in_use_max = NES_NIC_FAST_TIMER_HIGH;
+        if (jumbomode) {
+                shared_timer->threshold_low    = DEFAULT_JUMBO_NES_QL_LOW;
+                shared_timer->threshold_target = DEFAULT_JUMBO_NES_QL_TARGET;
+                shared_timer->threshold_high   = DEFAULT_JUMBO_NES_QL_HIGH;
+        } else {
+                shared_timer->threshold_low    = DEFAULT_NES_QL_LOW;
+                shared_timer->threshold_target = DEFAULT_NES_QL_TARGET;
+                shared_timer->threshold_high   = DEFAULT_NES_QL_HIGH;
+        }
+
+        /* todo use netdev->mtu to set thresholds */
+        spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags);
+}
+
+
+/**
+ * nes_nic_init_timer
+ */
+static void  nes_nic_init_timer(struct nes_device *nesdev)
+{
+        unsigned long flags;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
+
+        spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags);
+
+        if (shared_timer->timer_in_use_old == 0) {
+                nesdev->deepcq_count = 0;
+                shared_timer->timer_direction_upward = 0;
+                shared_timer->timer_direction_downward = 0;
+                shared_timer->timer_in_use = NES_NIC_FAST_TIMER;
+                shared_timer->timer_in_use_old = 0;
+
+        }
+        if (shared_timer->timer_in_use != shared_timer->timer_in_use_old) {
+                shared_timer->timer_in_use_old = shared_timer->timer_in_use;
+                nes_write32(nesdev->regs+NES_PERIODIC_CONTROL,
+                        0x80000000 | ((u32)(shared_timer->timer_in_use*8)));
+        }
+        /* todo use netdev->mtu to set thresholds */
+        spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags);
+}
+
+
+/**
+ * nes_nic_tune_timer
+ */
+static void nes_nic_tune_timer(struct nes_device *nesdev)
+{
+        unsigned long flags;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
+        u16 cq_count = nesdev->currcq_count;
+
+        spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags);
+
+        if (shared_timer->cq_count_old < cq_count) {
+                if (cq_count > shared_timer->threshold_low)
+                        shared_timer->cq_direction_downward=0;
+        }
+        if (shared_timer->cq_count_old >= cq_count)
+                shared_timer->cq_direction_downward++;
+        shared_timer->cq_count_old = cq_count;
+        if (shared_timer->cq_direction_downward > NES_NIC_CQ_DOWNWARD_TREND) {
+                if (cq_count <= shared_timer->threshold_low) {
+                        shared_timer->threshold_low = shared_timer->threshold_low/2;
+                        shared_timer->cq_direction_downward=0;
+                        nesdev->currcq_count = 0;
+                        spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags);
+                        return;
+                }
+        }
+
+        if (cq_count > 1) {
+                nesdev->deepcq_count += cq_count;
+                if (cq_count <= shared_timer->threshold_low) {       /* increase timer gently */
+                        shared_timer->timer_direction_upward++;
+                        shared_timer->timer_direction_downward = 0;
+                } else if (cq_count <= shared_timer->threshold_target) { /* balanced */
+                        shared_timer->timer_direction_upward = 0;
+                        shared_timer->timer_direction_downward = 0;
+                } else if (cq_count <= shared_timer->threshold_high) {  /* decrease timer gently */
+                        shared_timer->timer_direction_downward++;
+                        shared_timer->timer_direction_upward = 0;
+                } else if (cq_count <= (shared_timer->threshold_high) * 2) {
+                        shared_timer->timer_in_use -= 2;
+                        shared_timer->timer_direction_upward = 0;
+                        shared_timer->timer_direction_downward++;
+                } else {
+                        shared_timer->timer_in_use -= 4;
+                        shared_timer->timer_direction_upward = 0;
+                        shared_timer->timer_direction_downward++;
+                }
+
+                if (shared_timer->timer_direction_upward > 3 ) {  /* using history */
+                        shared_timer->timer_in_use += 3;
+                        shared_timer->timer_direction_upward = 0;
+                        shared_timer->timer_direction_downward = 0;
+                }
+                if (shared_timer->timer_direction_downward > 5) { /* using history */
+                        shared_timer->timer_in_use -= 4 ;
+                        shared_timer->timer_direction_downward = 0;
+                        shared_timer->timer_direction_upward = 0;
+                }
+        }
+
+        /* boundary checking */
+        if (shared_timer->timer_in_use > NES_NIC_FAST_TIMER_HIGH)
+                shared_timer->timer_in_use = NES_NIC_FAST_TIMER_HIGH;
+        else if (shared_timer->timer_in_use < NES_NIC_FAST_TIMER_LOW) {
+                shared_timer->timer_in_use = NES_NIC_FAST_TIMER_LOW;
+        }
+
+        nesdev->currcq_count = 0;
+
+        spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags);
+}
+
+
+/**
+ * nes_init_adapter - initialize adapter
+ */
+struct nes_adapter *nes_init_adapter(struct nes_device *nesdev, u8 hw_rev) {
+        struct nes_adapter *nesadapter = NULL;
+        unsigned long num_pds;
+        u32 u32temp;
+        u32 port_count;
+        u16 max_rq_wrs;
+        u16 max_sq_wrs;
+        u32 max_mr;
+        u32 max_256pbl;
+        u32 max_4kpbl;
+        u32 max_qp;
+        u32 max_irrq;
+        u32 max_cq;
+        u32 hte_index_mask;
+        u32 adapter_size;
+        u32 arp_table_size;
+        u16 vendor_id;
+        u8  OneG_Mode;
+        u8  func_index;
+
+        /* search the list of existing adapters */
+        list_for_each_entry(nesadapter, &nes_adapter_list, list) {
+                nes_debug(NES_DBG_INIT, "Searching Adapter list for PCI devfn = 0x%X,"
+                                " adapter PCI slot/bus = %u/%u, pci devices PCI slot/bus = %u/%u, .\n",
+                                nesdev->pcidev->devfn,
+                                PCI_SLOT(nesadapter->devfn),
+                                nesadapter->bus_number,
+                                PCI_SLOT(nesdev->pcidev->devfn),
+                                nesdev->pcidev->bus->number );
+                if ((PCI_SLOT(nesadapter->devfn) == PCI_SLOT(nesdev->pcidev->devfn)) &&
+                                (nesadapter->bus_number == nesdev->pcidev->bus->number)) {
+                        nesadapter->ref_count++;
+                        return nesadapter;
+                }
+        }
+
+        /* no adapter found */
+        num_pds = pci_resource_len(nesdev->pcidev, BAR_1) >> PAGE_SHIFT;
+        if ((hw_rev != NE020_REV) && (hw_rev != NE020_REV1)) {
+                nes_debug(NES_DBG_INIT, "NE020 driver detected unknown hardware revision 0x%x\n",
+                                hw_rev);
+                return NULL;
+        }
+
+        nes_debug(NES_DBG_INIT, "Determine Soft Reset, QP_control=0x%x, CPU0=0x%x, CPU1=0x%x, CPU2=0x%x\n",
+                        nes_read_indexed(nesdev, NES_IDX_QP_CONTROL + PCI_FUNC(nesdev->pcidev->devfn) * 8),
+                        nes_read_indexed(nesdev, NES_IDX_INT_CPU_STATUS),
+                        nes_read_indexed(nesdev, NES_IDX_INT_CPU_STATUS + 4),
+                        nes_read_indexed(nesdev, NES_IDX_INT_CPU_STATUS + 8));
+
+        nes_debug(NES_DBG_INIT, "Reset and init NE020\n");
+
+
+        if ((port_count = nes_reset_adapter_ne020(nesdev, &OneG_Mode)) == 0)
+                return NULL;
+        if (nes_init_serdes(nesdev, hw_rev, port_count, OneG_Mode))
+                return NULL;
+        nes_init_csr_ne020(nesdev, hw_rev, port_count);
+
+        max_qp = nes_read_indexed(nesdev, NES_IDX_QP_CTX_SIZE);
+        nes_debug(NES_DBG_INIT, "QP_CTX_SIZE=%u\n", max_qp);
+
+        u32temp = nes_read_indexed(nesdev, NES_IDX_QUAD_HASH_TABLE_SIZE);
+        if (max_qp > ((u32)1 << (u32temp & 0x001f))) {
+                nes_debug(NES_DBG_INIT, "Reducing Max QPs to %u due to hash table size = 0x%08X\n",
+                                max_qp, u32temp);
+                max_qp = (u32)1 << (u32temp & 0x001f);
+        }
+
+        hte_index_mask = ((u32)1 << ((u32temp & 0x001f)+1))-1;
+        nes_debug(NES_DBG_INIT, "Max QP = %u, hte_index_mask = 0x%08X.\n",
+                        max_qp, hte_index_mask);
+
+        u32temp = nes_read_indexed(nesdev, NES_IDX_IRRQ_COUNT);
+
+        max_irrq = 1 << (u32temp & 0x001f);
+
+        if (max_qp > max_irrq) {
+                max_qp = max_irrq;
+                nes_debug(NES_DBG_INIT, "Reducing Max QPs to %u due to Available Q1s.\n",
+                                max_qp);
+        }
+
+        /* there should be no reason to allocate more pds than qps */
+        if (num_pds > max_qp)
+                num_pds = max_qp;
+
+        u32temp = nes_read_indexed(nesdev, NES_IDX_MRT_SIZE);
+        max_mr = (u32)8192 << (u32temp & 0x7);
+
+        u32temp = nes_read_indexed(nesdev, NES_IDX_PBL_REGION_SIZE);
+        max_256pbl = (u32)1 << (u32temp & 0x0000001f);
+        max_4kpbl = (u32)1 << ((u32temp >> 16) & 0x0000001f);
+        max_cq = nes_read_indexed(nesdev, NES_IDX_CQ_CTX_SIZE);
+
+        u32temp = nes_read_indexed(nesdev, NES_IDX_ARP_CACHE_SIZE);
+        arp_table_size = 1 << u32temp;
+
+        adapter_size = (sizeof(struct nes_adapter) +
+                        (sizeof(unsigned long)-1)) & (~(sizeof(unsigned long)-1));
+        adapter_size += sizeof(unsigned long) * BITS_TO_LONGS(max_qp);
+        adapter_size += sizeof(unsigned long) * BITS_TO_LONGS(max_mr);
+        adapter_size += sizeof(unsigned long) * BITS_TO_LONGS(max_cq);
+        adapter_size += sizeof(unsigned long) * BITS_TO_LONGS(num_pds);
+        adapter_size += sizeof(unsigned long) * BITS_TO_LONGS(arp_table_size);
+        adapter_size += sizeof(struct nes_qp **) * max_qp;
+
+        /* allocate a new adapter struct */
+        nesadapter = kzalloc(adapter_size, GFP_KERNEL);
+        if (nesadapter == NULL) {
+                return NULL;
+        }
+
+        nes_debug(NES_DBG_INIT, "Allocating new nesadapter @ %p, size = %u (actual size = %u).\n",
+                        nesadapter, (u32)sizeof(struct nes_adapter), adapter_size);
+
+        /* populate the new nesadapter */
+        nesadapter->devfn = nesdev->pcidev->devfn;
+        nesadapter->bus_number = nesdev->pcidev->bus->number;
+        nesadapter->ref_count = 1;
+        nesadapter->timer_int_req = 0xffff0000;
+        nesadapter->OneG_Mode = OneG_Mode;
+        nesadapter->doorbell_start = nesdev->doorbell_region;
+
+        /* nesadapter->tick_delta = clk_divisor; */
+        nesadapter->hw_rev = hw_rev;
+        nesadapter->port_count = port_count;
+
+        nesadapter->max_qp = max_qp;
+        nesadapter->hte_index_mask = hte_index_mask;
+        nesadapter->max_irrq = max_irrq;
+        nesadapter->max_mr = max_mr;
+        nesadapter->max_256pbl = max_256pbl - 1;
+        nesadapter->max_4kpbl = max_4kpbl - 1;
+        nesadapter->max_cq = max_cq;
+        nesadapter->free_256pbl = max_256pbl - 1;
+        nesadapter->free_4kpbl = max_4kpbl - 1;
+        nesadapter->max_pd = num_pds;
+        nesadapter->arp_table_size = arp_table_size;
+
+        nesadapter->et_pkt_rate_low = NES_TIMER_ENABLE_LIMIT;
+        if (nes_drv_opt & NES_DRV_OPT_DISABLE_INT_MOD) {
+                nesadapter->et_use_adaptive_rx_coalesce = 0;
+                nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT;
+                nesadapter->et_rx_coalesce_usecs_irq = interrupt_mod_interval;
+        } else {
+                nesadapter->et_use_adaptive_rx_coalesce = 1;
+                nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT_DYNAMIC;
+                nesadapter->et_rx_coalesce_usecs_irq = 0;
+                printk(PFX "%s: Using Adaptive Interrupt Moderation\n", __FUNCTION__);
+        }
+        /* Setup and enable the periodic timer */
+        if (nesadapter->et_rx_coalesce_usecs_irq)
+                nes_write32(nesdev->regs+NES_PERIODIC_CONTROL, 0x80000000 |
+                                ((u32)(nesadapter->et_rx_coalesce_usecs_irq * 8)));
+        else
+                nes_write32(nesdev->regs+NES_PERIODIC_CONTROL, 0x00000000);
+
+        nesadapter->base_pd = 1;
+
+        nesadapter->device_cap_flags =
+                        IB_DEVICE_ZERO_STAG | IB_DEVICE_SEND_W_INV | IB_DEVICE_MEM_WINDOW;
+
+        nesadapter->allocated_qps = (unsigned long *)&(((unsigned char *)nesadapter)
+                        [(sizeof(struct nes_adapter)+(sizeof(unsigned long)-1))&(~(sizeof(unsigned long)-1))]);
+        nesadapter->allocated_cqs = &nesadapter->allocated_qps[BITS_TO_LONGS(max_qp)];
+        nesadapter->allocated_mrs = &nesadapter->allocated_cqs[BITS_TO_LONGS(max_cq)];
+        nesadapter->allocated_pds = &nesadapter->allocated_mrs[BITS_TO_LONGS(max_mr)];
+        nesadapter->allocated_arps = &nesadapter->allocated_pds[BITS_TO_LONGS(num_pds)];
+        nesadapter->qp_table = (struct nes_qp **)(&nesadapter->allocated_arps[BITS_TO_LONGS(arp_table_size)]);
+
+
+        /* mark the usual suspect QPs and CQs as in use */
+        for (u32temp = 0; u32temp < NES_FIRST_QPN; u32temp++) {
+                set_bit(u32temp, nesadapter->allocated_qps);
+                set_bit(u32temp, nesadapter->allocated_cqs);
+        }
+
+        for (u32temp = 0; u32temp < 20; u32temp++)
+                set_bit(u32temp, nesadapter->allocated_pds);
+        u32temp = nes_read_indexed(nesdev, NES_IDX_QP_MAX_CFG_SIZES);
+
+        max_rq_wrs = ((u32temp >> 8) & 3);
+        switch (max_rq_wrs) {
+                case 0:
+                        max_rq_wrs = 4;
+                        break;
+                case 1:
+                        max_rq_wrs = 16;
+                        break;
+                case 2:
+                        max_rq_wrs = 32;
+                        break;
+                case 3:
+                        max_rq_wrs = 512;
+                        break;
+        }
+
+        max_sq_wrs = (u32temp & 3);
+        switch (max_sq_wrs) {
+                case 0:
+                        max_sq_wrs = 4;
+                        break;
+                case 1:
+                        max_sq_wrs = 16;
+                        break;
+                case 2:
+                        max_sq_wrs = 32;
+                        break;
+                case 3:
+                        max_sq_wrs = 512;
+                        break;
+        }
+        nesadapter->max_qp_wr = min(max_rq_wrs, max_sq_wrs);
+        nesadapter->max_irrq_wr = (u32temp >> 16) & 3;
+
+        nesadapter->max_sge = 4;
+        nesadapter->max_cqe = 32767;
+
+        if (nes_read_eeprom_values(nesdev, nesadapter)) {
+                printk(KERN_ERR PFX "Unable to read EEPROM data.\n");
+                kfree(nesadapter);
+                return NULL;
+        }
+
+        u32temp = nes_read_indexed(nesdev, NES_IDX_TCP_TIMER_CONFIG);
+        nes_write_indexed(nesdev, NES_IDX_TCP_TIMER_CONFIG,
+                        (u32temp & 0xff000000) | (nesadapter->tcp_timer_core_clk_divisor & 0x00ffffff));
+
+        /* setup port configuration */
+        if (nesadapter->port_count == 1) {
+                u32temp = 0x00000000;
+                if (nes_drv_opt & NES_DRV_OPT_DUAL_LOGICAL_PORT)
+                        nes_write_indexed(nesdev, NES_IDX_TX_POOL_SIZE, 0x00000002);
+                else
+                        nes_write_indexed(nesdev, NES_IDX_TX_POOL_SIZE, 0x00000003);
+        } else {
+                if (nesadapter->port_count == 2)
+                        u32temp = 0x00000044;
+                else
+                        u32temp = 0x000000e4;
+                nes_write_indexed(nesdev, NES_IDX_TX_POOL_SIZE, 0x00000003);
+        }
+
+        nes_write_indexed(nesdev, NES_IDX_NIC_LOGPORT_TO_PHYPORT, u32temp);
+        nes_debug(NES_DBG_INIT, "Probe time, LOG2PHY=%u\n",
+                        nes_read_indexed(nesdev, NES_IDX_NIC_LOGPORT_TO_PHYPORT));
+
+        spin_lock_init(&nesadapter->resource_lock);
+        spin_lock_init(&nesadapter->phy_lock);
+        spin_lock_init(&nesadapter->pbl_lock);
+        spin_lock_init(&nesadapter->periodic_timer_lock);
+
+        INIT_LIST_HEAD(&nesadapter->nesvnic_list[0]);
+        INIT_LIST_HEAD(&nesadapter->nesvnic_list[1]);
+        INIT_LIST_HEAD(&nesadapter->nesvnic_list[2]);
+        INIT_LIST_HEAD(&nesadapter->nesvnic_list[3]);
+
+        if ((!nesadapter->OneG_Mode) && (nesadapter->port_count == 2)) {
+                u32 pcs_control_status0, pcs_control_status1;
+                u32 reset_value;
+                u32 i = 0;
+                u32 int_cnt = 0;
+                u32 ext_cnt = 0;
+                unsigned long flags;
+                u32 j = 0;
+
+                pcs_control_status0 = nes_read_indexed(nesdev,
+                        NES_IDX_PHY_PCS_CONTROL_STATUS0);
+                pcs_control_status1 = nes_read_indexed(nesdev,
+                        NES_IDX_PHY_PCS_CONTROL_STATUS0 + 0x200);
+
+                for (i = 0; i < NES_MAX_LINK_CHECK; i++) {
+                        pcs_control_status0 = nes_read_indexed(nesdev,
+                                        NES_IDX_PHY_PCS_CONTROL_STATUS0);
+                        pcs_control_status1 = nes_read_indexed(nesdev,
+                                        NES_IDX_PHY_PCS_CONTROL_STATUS0 + 0x200);
+                        if ((0x0F000100 == (pcs_control_status0 & 0x0F000100))
+                            || (0x0F000100 == (pcs_control_status1 & 0x0F000100)))
+                                int_cnt++;
+                        msleep(1);
+                }
+                if (int_cnt > 1) {
+                        spin_lock_irqsave(&nesadapter->phy_lock, flags);
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL1, 0x0000F088);
+                        mh_detected++;
+                        reset_value = nes_read32(nesdev->regs+NES_SOFTWARE_RESET);
+                        reset_value |= 0x0000003d;
+                        nes_write32(nesdev->regs+NES_SOFTWARE_RESET, reset_value);
+
+                        while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET)
+                                & 0x00000040) != 0x00000040) && (j++ < 5000));
+                        spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
+
+                        pcs_control_status0 = nes_read_indexed(nesdev,
+                                        NES_IDX_PHY_PCS_CONTROL_STATUS0);
+                        pcs_control_status1 = nes_read_indexed(nesdev,
+                                        NES_IDX_PHY_PCS_CONTROL_STATUS0 + 0x200);
+
+                        for (i = 0; i < NES_MAX_LINK_CHECK; i++) {
+                                pcs_control_status0 = nes_read_indexed(nesdev,
+                                        NES_IDX_PHY_PCS_CONTROL_STATUS0);
+                                pcs_control_status1 = nes_read_indexed(nesdev,
+                                        NES_IDX_PHY_PCS_CONTROL_STATUS0 + 0x200);
+                                if ((0x0F000100 == (pcs_control_status0 & 0x0F000100))
+                                        || (0x0F000100 == (pcs_control_status1 & 0x0F000100))) {
+                                        if (++ext_cnt > int_cnt) {
+                                                spin_lock_irqsave(&nesadapter->phy_lock, flags);
+                                                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL1,
+                                                                0x0000F0C8);
+                                                mh_detected++;
+                                                reset_value = nes_read32(nesdev->regs+NES_SOFTWARE_RESET);
+                                                reset_value |= 0x0000003d;
+                                                nes_write32(nesdev->regs+NES_SOFTWARE_RESET, reset_value);
+
+                                                while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET)
+                                                        & 0x00000040) != 0x00000040) && (j++ < 5000));
+                                                spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
+                                                break;
+                                        }
+                                }
+                                msleep(1);
+                        }
+                }
+        }
+
+        if (nesadapter->hw_rev == NE020_REV) {
+                init_timer(&nesadapter->mh_timer);
+                nesadapter->mh_timer.function = nes_mh_fix;
+                nesadapter->mh_timer.expires = jiffies + (HZ/5);  /* 1 second */
+                nesadapter->mh_timer.data = (unsigned long)nesdev;
+                add_timer(&nesadapter->mh_timer);
+        } else {
+                nes_write32(nesdev->regs+NES_INTF_INT_STAT, 0x0f000000);
+        }
+
+        init_timer(&nesadapter->lc_timer);
+        nesadapter->lc_timer.function = nes_clc;
+        nesadapter->lc_timer.expires = jiffies + 3600 * HZ;  /* 1 hour */
+        nesadapter->lc_timer.data = (unsigned long)nesdev;
+        add_timer(&nesadapter->lc_timer);
+
+        list_add_tail(&nesadapter->list, &nes_adapter_list);
+
+        for (func_index = 0; func_index < 8; func_index++) {
+                pci_bus_read_config_word(nesdev->pcidev->bus,
+                                        PCI_DEVFN(PCI_SLOT(nesdev->pcidev->devfn),
+                                        func_index), 0, &vendor_id);
+                if (vendor_id == 0xffff)
+                        break;
+        }
+        nes_debug(NES_DBG_INIT, "%s %d functions found for %s.\n", __FUNCTION__,
+                func_index, pci_name(nesdev->pcidev));
+        nesadapter->adapter_fcn_count = func_index;
+
+        return nesadapter;
+}
+
+
+/**
+ * nes_reset_adapter_ne020
+ */
+unsigned int nes_reset_adapter_ne020(struct nes_device *nesdev, u8 *OneG_Mode)
+{
+        u32 port_count;
+        u32 u32temp;
+        u32 i;
+
+        u32temp = nes_read32(nesdev->regs+NES_SOFTWARE_RESET);
+        port_count = ((u32temp & 0x00000300) >> 8) + 1;
+        /* TODO: assuming that both SERDES are set the same for now */
+        *OneG_Mode = (u32temp & 0x00003c00) ? 0 : 1;
+        nes_debug(NES_DBG_INIT, "Initial Software Reset = 0x%08X, port_count=%u\n",
+                        u32temp, port_count);
+        if (*OneG_Mode)
+                nes_debug(NES_DBG_INIT, "Running in 1G mode.\n");
+        u32temp &= 0xff00ffc0;
+        switch (port_count) {
+                case 1:
+                        u32temp |= 0x00ee0000;
+                        break;
+                case 2:
+                        u32temp |= 0x00cc0000;
+                        break;
+                case 4:
+                        u32temp |= 0x00000000;
+                        break;
+                default:
+                        return 0;
+                        break;
+        }
+
+        /* check and do full reset if needed */
+        if (nes_read_indexed(nesdev, NES_IDX_QP_CONTROL+(PCI_FUNC(nesdev->pcidev->devfn)*8))) {
+                nes_debug(NES_DBG_INIT, "Issuing Full Soft reset = 0x%08X\n", u32temp | 0xd);
+                nes_write32(nesdev->regs+NES_SOFTWARE_RESET, u32temp | 0xd);
+
+                i = 0;
+                while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET) & 0x00000040) == 0) && i++ < 10000)
+                        mdelay(1);
+                if (i >= 10000) {
+                        nes_debug(NES_DBG_INIT, "Did not see full soft reset done.\n");
+                        return 0;
+                }
+        }
+
+        /* port reset */
+        switch (port_count) {
+                case 1:
+                        u32temp |= 0x00ee0010;
+                        break;
+                case 2:
+                        u32temp |= 0x00cc0030;
+                        break;
+                case 4:
+                        u32temp |= 0x00000030;
+                        break;
+        }
+
+        nes_debug(NES_DBG_INIT, "Issuing Port Soft reset = 0x%08X\n", u32temp | 0xd);
+        nes_write32(nesdev->regs+NES_SOFTWARE_RESET, u32temp | 0xd);
+
+        i = 0;
+        while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET) & 0x00000040) == 0) && i++ < 10000)
+                mdelay(1);
+        if (i >= 10000) {
+                nes_debug(NES_DBG_INIT, "Did not see port soft reset done.\n");
+                return 0;
+        }
+
+        /* serdes 0 */
+        i = 0;
+        while (((u32temp = (nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0)
+                        & 0x0000000f)) != 0x0000000f) && i++ < 5000)
+                mdelay(1);
+        if (i >= 5000) {
+                nes_debug(NES_DBG_INIT, "Serdes 0 not ready, status=%x\n", u32temp);
+                return 0;
+        }
+
+        /* serdes 1 */
+        if (port_count > 1) {
+                i = 0;
+                while (((u32temp = (nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS1)
+                                & 0x0000000f)) != 0x0000000f) && i++ < 5000)
+                        mdelay(1);
+                if (i >= 5000) {
+                        nes_debug(NES_DBG_INIT, "Serdes 1 not ready, status=%x\n", u32temp);
+                        return 0;
+                }
+        }
+
+
+
+        i = 0;
+        while ((nes_read_indexed(nesdev, NES_IDX_INT_CPU_STATUS) != 0x80) && i++ < 10000)
+                mdelay(1);
+        if (i >= 10000) {
+                printk(KERN_ERR PFX "Internal CPU not ready, status = %02X\n",
+                                nes_read_indexed(nesdev, NES_IDX_INT_CPU_STATUS));
+                return 0;
+        }
+
+        return port_count;
+}
+
+
+/**
+ * nes_init_serdes
+ */
+int nes_init_serdes(struct nes_device *nesdev, u8 hw_rev, u8 port_count, u8  OneG_Mode)
+{
+        int i;
+        u32 u32temp;
+
+        if (hw_rev != NE020_REV) {
+                /* init serdes 0 */
+
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000FF);
+                if (!OneG_Mode)
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_HIGHZ_LANE_MODE0, 0x11110000);
+                if (port_count > 1) {
+                        /* init serdes 1 */
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL1, 0x000000FF);
+                        if (!OneG_Mode)
+                                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_HIGHZ_LANE_MODE1, 0x11110000);
+                        }
+        } else {
+                /* init serdes 0 */
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, 0x00000008);
+                i = 0;
+                while (((u32temp = (nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0)
+                                & 0x0000000f)) != 0x0000000f) && i++ < 5000)
+                        mdelay(1);
+                if (i >= 5000) {
+                        nes_debug(NES_DBG_PHY, "Init: serdes 0 not ready, status=%x\n", u32temp);
+                        return 1;
+                }
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_EMP0, 0x000bdef7);
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_DRIVE0, 0x9ce73000);
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_MODE0, 0x0ff00000);
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_SIGDET0, 0x00000000);
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_BYPASS0, 0x00000000);
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_LOOPBACK_CONTROL0, 0x00000000);
+                if (OneG_Mode)
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0182222);
+                else
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0042222);
+
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000ff);
+                if (port_count > 1) {
+                        /* init serdes 1 */
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL1, 0x00000048);
+                        i = 0;
+                        while (((u32temp = (nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS1)
+                                & 0x0000000f)) != 0x0000000f) && (i++ < 5000))
+                                mdelay(1);
+                        if (i >= 5000) {
+                                printk("%s: Init: serdes 1 not ready, status=%x\n", __FUNCTION__, u32temp);
+                                /* return 1; */
+                        }
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_EMP1, 0x000bdef7);
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_DRIVE1, 0x9ce73000);
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_MODE1, 0x0ff00000);
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_SIGDET1, 0x00000000);
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_BYPASS1, 0x00000000);
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_LOOPBACK_CONTROL1, 0x00000000);
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL1, 0xf0002222);
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL1, 0x000000ff);
+                }
+        }
+        return 0;
+}
+
+
+/**
+ * nes_init_csr_ne020
+ * Initialize registers for ne020 hardware
+ */
+void nes_init_csr_ne020(struct nes_device *nesdev, u8 hw_rev, u8 port_count)
+{
+        u32 u32temp;
+
+        nes_debug(NES_DBG_INIT, "port_count=%d\n", port_count);
+
+        nes_write_indexed(nesdev, 0x000001E4, 0x00000007);
+        /* nes_write_indexed(nesdev, 0x000001E8, 0x000208C4); */
+        nes_write_indexed(nesdev, 0x000001E8, 0x00020874);
+        nes_write_indexed(nesdev, 0x000001D8, 0x00048002);
+        /* nes_write_indexed(nesdev, 0x000001D8, 0x0004B002); */
+        nes_write_indexed(nesdev, 0x000001FC, 0x00050005);
+        nes_write_indexed(nesdev, 0x00000600, 0x55555555);
+        nes_write_indexed(nesdev, 0x00000604, 0x55555555);
+
+        /* TODO: move these MAC register settings to NIC bringup */
+        nes_write_indexed(nesdev, 0x00002000, 0x00000001);
+        nes_write_indexed(nesdev, 0x00002004, 0x00000001);
+        nes_write_indexed(nesdev, 0x00002008, 0x0000FFFF);
+        nes_write_indexed(nesdev, 0x0000200C, 0x00000001);
+        nes_write_indexed(nesdev, 0x00002010, 0x000003c1);
+        nes_write_indexed(nesdev, 0x0000201C, 0x75345678);
+        if (port_count > 1) {
+                nes_write_indexed(nesdev, 0x00002200, 0x00000001);
+                nes_write_indexed(nesdev, 0x00002204, 0x00000001);
+                nes_write_indexed(nesdev, 0x00002208, 0x0000FFFF);
+                nes_write_indexed(nesdev, 0x0000220C, 0x00000001);
+                nes_write_indexed(nesdev, 0x00002210, 0x000003c1);
+                nes_write_indexed(nesdev, 0x0000221C, 0x75345678);
+                nes_write_indexed(nesdev, 0x00000908, 0x20000001);
+        }
+        if (port_count > 2) {
+                nes_write_indexed(nesdev, 0x00002400, 0x00000001);
+                nes_write_indexed(nesdev, 0x00002404, 0x00000001);
+                nes_write_indexed(nesdev, 0x00002408, 0x0000FFFF);
+                nes_write_indexed(nesdev, 0x0000240C, 0x00000001);
+                nes_write_indexed(nesdev, 0x00002410, 0x000003c1);
+                nes_write_indexed(nesdev, 0x0000241C, 0x75345678);
+                nes_write_indexed(nesdev, 0x00000910, 0x20000001);
+
+                nes_write_indexed(nesdev, 0x00002600, 0x00000001);
+                nes_write_indexed(nesdev, 0x00002604, 0x00000001);
+                nes_write_indexed(nesdev, 0x00002608, 0x0000FFFF);
+                nes_write_indexed(nesdev, 0x0000260C, 0x00000001);
+                nes_write_indexed(nesdev, 0x00002610, 0x000003c1);
+                nes_write_indexed(nesdev, 0x0000261C, 0x75345678);
+                nes_write_indexed(nesdev, 0x00000918, 0x20000001);
+        }
+
+        nes_write_indexed(nesdev, 0x00005000, 0x00018000);
+        /* nes_write_indexed(nesdev, 0x00005000, 0x00010000); */
+        nes_write_indexed(nesdev, 0x00005004, 0x00020001);
+        nes_write_indexed(nesdev, 0x00005008, 0x1F1F1F1F);
+        nes_write_indexed(nesdev, 0x00005010, 0x1F1F1F1F);
+        nes_write_indexed(nesdev, 0x00005018, 0x1F1F1F1F);
+        nes_write_indexed(nesdev, 0x00005020, 0x1F1F1F1F);
+        nes_write_indexed(nesdev, 0x00006090, 0xFFFFFFFF);
+
+        /* TODO: move this to code, get from EEPROM */
+        nes_write_indexed(nesdev, 0x00000900, 0x20000001);
+        nes_write_indexed(nesdev, 0x000060C0, 0x0000028e);
+        nes_write_indexed(nesdev, 0x000060C8, 0x00000020);
+                                                                                                                //
+        nes_write_indexed(nesdev, 0x000001EC, 0x7b2625a0);
+        /* nes_write_indexed(nesdev, 0x000001EC, 0x5f2625a0); */
+
+        if (hw_rev != NE020_REV) {
+                u32temp = nes_read_indexed(nesdev, 0x000008e8);
+                u32temp |= 0x80000000;
+                nes_write_indexed(nesdev, 0x000008e8, u32temp);
+                u32temp = nes_read_indexed(nesdev, 0x000021f8);
+                u32temp &= 0x7fffffff;
+                u32temp |= 0x7fff0010;
+                nes_write_indexed(nesdev, 0x000021f8, u32temp);
+        }
+}
+
+
+/**
+ * nes_destroy_adapter - destroy the adapter structure
+ */
+void nes_destroy_adapter(struct nes_adapter *nesadapter)
+{
+        struct nes_adapter *tmp_adapter;
+
+        list_for_each_entry(tmp_adapter, &nes_adapter_list, list) {
+                nes_debug(NES_DBG_SHUTDOWN, "Nes Adapter list entry = 0x%p.\n",
+                                tmp_adapter);
+        }
+
+        nesadapter->ref_count--;
+        if (!nesadapter->ref_count) {
+                if (nesadapter->hw_rev == NE020_REV) {
+                        del_timer(&nesadapter->mh_timer);
+                }
+                del_timer(&nesadapter->lc_timer);
+
+                list_del(&nesadapter->list);
+                kfree(nesadapter);
+        }
+}
+
+
+/**
+ * nes_init_cqp
+ */
+int nes_init_cqp(struct nes_device *nesdev)
+{
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_hw_cqp_qp_context *cqp_qp_context;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        struct nes_hw_ceq *ceq;
+        struct nes_hw_ceq *nic_ceq;
+        struct nes_hw_aeq *aeq;
+        void *vmem;
+        dma_addr_t pmem;
+        u32 count=0;
+        u32 cqp_head;
+        u64 u64temp;
+        u32 u32temp;
+
+        /* allocate CQP memory */
+        /* Need to add max_cq to the aeq size once cq overflow checking is added back */
+        /* SQ is 512 byte aligned, others are 256 byte aligned */
+        nesdev->cqp_mem_size = 512 +
+                        (sizeof(struct nes_hw_cqp_wqe) * NES_CQP_SQ_SIZE) +
+                        (sizeof(struct nes_hw_cqe) * NES_CCQ_SIZE) +
+                        max(((u32)sizeof(struct nes_hw_ceqe) * NES_CCEQ_SIZE), (u32)256) +
+                        max(((u32)sizeof(struct nes_hw_ceqe) * NES_NIC_CEQ_SIZE), (u32)256) +
+                        (sizeof(struct nes_hw_aeqe) * nesadapter->max_qp) +
+                        sizeof(struct nes_hw_cqp_qp_context);
+
+        nesdev->cqp_vbase = pci_alloc_consistent(nesdev->pcidev, nesdev->cqp_mem_size,
+                        &nesdev->cqp_pbase);
+        if (!nesdev->cqp_vbase) {
+                nes_debug(NES_DBG_INIT, "Unable to allocate memory for host descriptor rings\n");
+                return -ENOMEM;
+        }
+        memset(nesdev->cqp_vbase, 0, nesdev->cqp_mem_size);
+
+        /* Allocate a twice the number of CQP requests as the SQ size */
+        nesdev->nes_cqp_requests = kzalloc(sizeof(struct nes_cqp_request) *
+                        2 * NES_CQP_SQ_SIZE, GFP_KERNEL);
+        if (nesdev->nes_cqp_requests == NULL) {
+                nes_debug(NES_DBG_INIT, "Unable to allocate memory CQP request entries.\n");
+                pci_free_consistent(nesdev->pcidev, nesdev->cqp_mem_size, nesdev->cqp.sq_vbase,
+                                nesdev->cqp.sq_pbase);
+                return -ENOMEM;
+        }
+
+        nes_debug(NES_DBG_INIT, "Allocated CQP structures at %p (phys = %016lX), size = %u.\n",
+                        nesdev->cqp_vbase, (unsigned long)nesdev->cqp_pbase, nesdev->cqp_mem_size);
+
+        spin_lock_init(&nesdev->cqp.lock);
+        init_waitqueue_head(&nesdev->cqp.waitq);
+
+        /* Setup Various Structures */
+        vmem = (void *)(((unsigned long)nesdev->cqp_vbase + (512 - 1)) &
+                        ~(unsigned long)(512 - 1));
+        pmem = (dma_addr_t)(((unsigned long long)nesdev->cqp_pbase + (512 - 1)) &
+                        ~(unsigned long long)(512 - 1));
+
+        nesdev->cqp.sq_vbase = vmem;
+        nesdev->cqp.sq_pbase = pmem;
+        nesdev->cqp.sq_size = NES_CQP_SQ_SIZE;
+        nesdev->cqp.sq_head = 0;
+        nesdev->cqp.sq_tail = 0;
+        nesdev->cqp.qp_id = PCI_FUNC(nesdev->pcidev->devfn);
+
+        vmem += (sizeof(struct nes_hw_cqp_wqe) * nesdev->cqp.sq_size);
+        pmem += (sizeof(struct nes_hw_cqp_wqe) * nesdev->cqp.sq_size);
+
+        nesdev->ccq.cq_vbase = vmem;
+        nesdev->ccq.cq_pbase = pmem;
+        nesdev->ccq.cq_size = NES_CCQ_SIZE;
+        nesdev->ccq.cq_head = 0;
+        nesdev->ccq.ce_handler = nes_cqp_ce_handler;
+        nesdev->ccq.cq_number = PCI_FUNC(nesdev->pcidev->devfn);
+
+        vmem += (sizeof(struct nes_hw_cqe) * nesdev->ccq.cq_size);
+        pmem += (sizeof(struct nes_hw_cqe) * nesdev->ccq.cq_size);
+
+        nesdev->ceq_index = PCI_FUNC(nesdev->pcidev->devfn);
+        ceq = &nesadapter->ceq[nesdev->ceq_index];
+        ceq->ceq_vbase = vmem;
+        ceq->ceq_pbase = pmem;
+        ceq->ceq_size = NES_CCEQ_SIZE;
+        ceq->ceq_head = 0;
+
+        vmem += max(((u32)sizeof(struct nes_hw_ceqe) * ceq->ceq_size), (u32)256);
+        pmem += max(((u32)sizeof(struct nes_hw_ceqe) * ceq->ceq_size), (u32)256);
+
+        nesdev->nic_ceq_index = PCI_FUNC(nesdev->pcidev->devfn) + 8;
+        nic_ceq = &nesadapter->ceq[nesdev->nic_ceq_index];
+        nic_ceq->ceq_vbase = vmem;
+        nic_ceq->ceq_pbase = pmem;
+        nic_ceq->ceq_size = NES_NIC_CEQ_SIZE;
+        nic_ceq->ceq_head = 0;
+
+        vmem += max(((u32)sizeof(struct nes_hw_ceqe) * nic_ceq->ceq_size), (u32)256);
+        pmem += max(((u32)sizeof(struct nes_hw_ceqe) * nic_ceq->ceq_size), (u32)256);
+
+        aeq = &nesadapter->aeq[PCI_FUNC(nesdev->pcidev->devfn)];
+        aeq->aeq_vbase = vmem;
+        aeq->aeq_pbase = pmem;
+        aeq->aeq_size = nesadapter->max_qp;
+        aeq->aeq_head = 0;
+
+        /* Setup QP Context */
+        vmem += (sizeof(struct nes_hw_aeqe) * aeq->aeq_size);
+        pmem += (sizeof(struct nes_hw_aeqe) * aeq->aeq_size);
+
+        cqp_qp_context = vmem;
+        cqp_qp_context->context_words[0] =
+                        cpu_to_le32((PCI_FUNC(nesdev->pcidev->devfn) << 12) + (2 << 10));
+        cqp_qp_context->context_words[1] = 0;
+        cqp_qp_context->context_words[2] = cpu_to_le32((u32)nesdev->cqp.sq_pbase);
+        cqp_qp_context->context_words[3] = cpu_to_le32(((u64)nesdev->cqp.sq_pbase) >> 32);
+
+
+        /* Write the address to Create CQP */
+        if ((sizeof(dma_addr_t) > 4)) {
+                nes_write_indexed(nesdev,
+                                NES_IDX_CREATE_CQP_HIGH + (PCI_FUNC(nesdev->pcidev->devfn) * 8),
+                                ((u64)pmem) >> 32);
+        } else {
+                nes_write_indexed(nesdev,
+                                NES_IDX_CREATE_CQP_HIGH + (PCI_FUNC(nesdev->pcidev->devfn) * 8), 0);
+        }
+        nes_write_indexed(nesdev,
+                        NES_IDX_CREATE_CQP_LOW + (PCI_FUNC(nesdev->pcidev->devfn) * 8),
+                        (u32)pmem);
+
+        INIT_LIST_HEAD(&nesdev->cqp_avail_reqs);
+        INIT_LIST_HEAD(&nesdev->cqp_pending_reqs);
+
+        for (count = 0; count < 2*NES_CQP_SQ_SIZE; count++) {
+                init_waitqueue_head(&nesdev->nes_cqp_requests[count].waitq);
+                list_add_tail(&nesdev->nes_cqp_requests[count].list, &nesdev->cqp_avail_reqs);
+        }
+
+        /* Write Create CCQ WQE */
+        cqp_head = nesdev->cqp.sq_head++;
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX,
+                        (NES_CQP_CREATE_CQ | NES_CQP_CQ_CEQ_VALID |
+                        NES_CQP_CQ_CHK_OVERFLOW | ((u32)nesdev->ccq.cq_size << 16)));
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX,
+                            (nesdev->ccq.cq_number |
+                             ((u32)nesdev->ceq_index << 16)));
+        u64temp = (u64)nesdev->ccq.cq_pbase;
+        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_CQ_WQE_PBL_LOW_IDX, u64temp);
+        cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX] = 0;
+        u64temp = (unsigned long)&nesdev->ccq;
+        cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_LOW_IDX] =
+                        cpu_to_le32((u32)(u64temp >> 1));
+        cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX] =
+                        cpu_to_le32(((u32)((u64temp) >> 33)) & 0x7FFFFFFF);
+        cqp_wqe->wqe_words[NES_CQP_CQ_WQE_DOORBELL_INDEX_HIGH_IDX] = 0;
+
+        /* Write Create CEQ WQE */
+        cqp_head = nesdev->cqp.sq_head++;
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX,
+                            (NES_CQP_CREATE_CEQ + ((u32)nesdev->ceq_index << 8)));
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_CEQ_WQE_ELEMENT_COUNT_IDX, ceq->ceq_size);
+        u64temp = (u64)ceq->ceq_pbase;
+        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_CQ_WQE_PBL_LOW_IDX, u64temp);
+
+        /* Write Create AEQ WQE */
+        cqp_head = nesdev->cqp.sq_head++;
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX,
+                        (NES_CQP_CREATE_AEQ + ((u32)PCI_FUNC(nesdev->pcidev->devfn) << 8)));
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_AEQ_WQE_ELEMENT_COUNT_IDX, aeq->aeq_size);
+        u64temp = (u64)aeq->aeq_pbase;
+        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_CQ_WQE_PBL_LOW_IDX, u64temp);
+
+        /* Write Create NIC CEQ WQE */
+        cqp_head = nesdev->cqp.sq_head++;
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX,
+                        (NES_CQP_CREATE_CEQ + ((u32)nesdev->nic_ceq_index << 8)));
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_CEQ_WQE_ELEMENT_COUNT_IDX, nic_ceq->ceq_size);
+        u64temp = (u64)nic_ceq->ceq_pbase;
+        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_CQ_WQE_PBL_LOW_IDX, u64temp);
+
+        /* Poll until CCQP done */
+        count = 0;
+        do {
+                if (count++ > 1000) {
+                        printk(KERN_ERR PFX "Error creating CQP\n");
+                        pci_free_consistent(nesdev->pcidev, nesdev->cqp_mem_size,
+                                        nesdev->cqp_vbase, nesdev->cqp_pbase);
+                        return -1;
+                }
+                udelay(10);
+        } while (!(nes_read_indexed(nesdev,
+                        NES_IDX_QP_CONTROL + (PCI_FUNC(nesdev->pcidev->devfn) * 8)) & (1 << 8)));
+
+        nes_debug(NES_DBG_INIT, "CQP Status = 0x%08X\n", nes_read_indexed(nesdev,
+                        NES_IDX_QP_CONTROL+(PCI_FUNC(nesdev->pcidev->devfn)*8)));
+
+        u32temp = 0x04800000;
+        nes_write32(nesdev->regs+NES_WQE_ALLOC, u32temp | nesdev->cqp.qp_id);
+
+        /* wait for the CCQ, CEQ, and AEQ to get created */
+        count = 0;
+        do {
+                if (count++ > 1000) {
+                        printk(KERN_ERR PFX "Error creating CCQ, CEQ, and AEQ\n");
+                        pci_free_consistent(nesdev->pcidev, nesdev->cqp_mem_size,
+                                        nesdev->cqp_vbase, nesdev->cqp_pbase);
+                        return -1;
+                }
+                udelay(10);
+        } while (((nes_read_indexed(nesdev,
+                        NES_IDX_QP_CONTROL+(PCI_FUNC(nesdev->pcidev->devfn)*8)) & (15<<8)) != (15<<8)));
+
+        /* dump the QP status value */
+        nes_debug(NES_DBG_INIT, "QP Status = 0x%08X\n", nes_read_indexed(nesdev,
+                        NES_IDX_QP_CONTROL+(PCI_FUNC(nesdev->pcidev->devfn)*8)));
+
+        nesdev->cqp.sq_tail++;
+
+        return 0;
+}
+
+
+/**
+ * nes_destroy_cqp
+ */
+int nes_destroy_cqp(struct nes_device *nesdev)
+{
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        u32 count = 0;
+        u32 cqp_head;
+        unsigned long flags;
+
+        do {
+                if (count++ > 1000)
+                        break;
+                udelay(10);
+        } while (!(nesdev->cqp.sq_head == nesdev->cqp.sq_tail));
+
+        /* Reset CCQ */
+        nes_write32(nesdev->regs+NES_CQE_ALLOC, NES_CQE_ALLOC_RESET |
+                        nesdev->ccq.cq_number);
+
+        /* Disable device interrupts */
+        nes_write32(nesdev->regs+NES_INT_MASK, 0x7fffffff);
+
+        spin_lock_irqsave(&nesdev->cqp.lock, flags);
+
+        /* Destroy the AEQ */
+        cqp_head = nesdev->cqp.sq_head++;
+        nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1;
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_DESTROY_AEQ |
+                        ((u32)PCI_FUNC(nesdev->pcidev->devfn) << 8));
+        cqp_wqe->wqe_words[NES_CQP_WQE_COMP_CTX_HIGH_IDX] = 0;
+
+        /* Destroy the NIC CEQ */
+        cqp_head = nesdev->cqp.sq_head++;
+        nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1;
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_DESTROY_CEQ |
+                        ((u32)nesdev->nic_ceq_index << 8));
+
+        /* Destroy the CEQ */
+        cqp_head = nesdev->cqp.sq_head++;
+        nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1;
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_DESTROY_CEQ |
+                        (nesdev->ceq_index << 8));
+
+        /* Destroy the CCQ */
+        cqp_head = nesdev->cqp.sq_head++;
+        nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1;
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_DESTROY_CQ);
+        cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX] = cpu_to_le32(nesdev->ccq.cq_number |
+                        ((u32)nesdev->ceq_index << 16));
+
+        /* Destroy CQP */
+        cqp_head = nesdev->cqp.sq_head++;
+        nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1;
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_DESTROY_QP |
+                        NES_CQP_QP_TYPE_CQP);
+        cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX] = cpu_to_le32(nesdev->cqp.qp_id);
+
+        barrier();
+        /* Ring doorbell (5 WQEs) */
+        nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x05800000 | nesdev->cqp.qp_id);
+
+        spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+
+        /* wait for the CCQ, CEQ, and AEQ to get destroyed */
+        count = 0;
+        do {
+                if (count++ > 1000) {
+                        printk(KERN_ERR PFX "Function%d: Error destroying CCQ, CEQ, and AEQ\n",
+                                        PCI_FUNC(nesdev->pcidev->devfn));
+                        break;
+                }
+                udelay(10);
+        } while (((nes_read_indexed(nesdev,
+                        NES_IDX_QP_CONTROL + (PCI_FUNC(nesdev->pcidev->devfn)*8)) & (15 << 8)) != 0));
+
+        /* dump the QP status value */
+        nes_debug(NES_DBG_SHUTDOWN, "Function%d: QP Status = 0x%08X\n",
+                        PCI_FUNC(nesdev->pcidev->devfn),
+                        nes_read_indexed(nesdev,
+                        NES_IDX_QP_CONTROL+(PCI_FUNC(nesdev->pcidev->devfn)*8)));
+
+        kfree(nesdev->nes_cqp_requests);
+
+        /* Free the control structures */
+        pci_free_consistent(nesdev->pcidev, nesdev->cqp_mem_size, nesdev->cqp.sq_vbase,
+                        nesdev->cqp.sq_pbase);
+
+        return 0;
+}
+
+
+/**
+ * nes_init_phy
+ */
+int nes_init_phy(struct nes_device *nesdev)
+{
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        u32 counter = 0;
+        u32 mac_index = nesdev->mac_index;
+        u32 tx_config;
+        u16 phy_data;
+
+        if (nesadapter->OneG_Mode) {
+                nes_debug(NES_DBG_PHY, "1G PHY, mac_index = %d.\n", mac_index);
+                if (nesadapter->phy_type[mac_index] == NES_PHY_TYPE_1G) {
+                        printk(PFX "%s: Programming mdc config for 1G\n", __FUNCTION__);
+                        tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG);
+                        tx_config |= 0x04;
+                        nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config);
+                }
+
+                nes_read_1G_phy_reg(nesdev, 1, nesadapter->phy_index[mac_index], &phy_data);
+                nes_debug(NES_DBG_PHY, "Phy data from register 1 phy address %u = 0x%X.\n",
+                                nesadapter->phy_index[mac_index], phy_data);
+                nes_write_1G_phy_reg(nesdev, 23, nesadapter->phy_index[mac_index],  0xb000);
+
+                /* Reset the PHY */
+                nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], 0x8000);
+                udelay(100);
+                counter = 0;
+                do {
+                        nes_read_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], &phy_data);
+                        nes_debug(NES_DBG_PHY, "Phy data from register 0 = 0x%X.\n", phy_data);
+                        if (counter++ > 100) break;
+                } while (phy_data & 0x8000);
+
+                /* Setting no phy loopback */
+                phy_data &= 0xbfff;
+                phy_data |= 0x1140;
+                nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index],  phy_data);
+                nes_read_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], &phy_data);
+                nes_debug(NES_DBG_PHY, "Phy data from register 0 = 0x%X.\n", phy_data);
+
+                nes_read_1G_phy_reg(nesdev, 0x17, nesadapter->phy_index[mac_index], &phy_data);
+                nes_debug(NES_DBG_PHY, "Phy data from register 0x17 = 0x%X.\n", phy_data);
+
+                nes_read_1G_phy_reg(nesdev, 0x1e, nesadapter->phy_index[mac_index], &phy_data);
+                nes_debug(NES_DBG_PHY, "Phy data from register 0x1e = 0x%X.\n", phy_data);
+
+                /* Setting the interrupt mask */
+                nes_read_1G_phy_reg(nesdev, 0x19, nesadapter->phy_index[mac_index], &phy_data);
+                nes_debug(NES_DBG_PHY, "Phy data from register 0x19 = 0x%X.\n", phy_data);
+                nes_write_1G_phy_reg(nesdev, 0x19, nesadapter->phy_index[mac_index], 0xffee);
+
+                nes_read_1G_phy_reg(nesdev, 0x19, nesadapter->phy_index[mac_index], &phy_data);
+                nes_debug(NES_DBG_PHY, "Phy data from register 0x19 = 0x%X.\n", phy_data);
+
+                /* turning on flow control */
+                nes_read_1G_phy_reg(nesdev, 4, nesadapter->phy_index[mac_index], &phy_data);
+                nes_debug(NES_DBG_PHY, "Phy data from register 0x4 = 0x%X.\n", phy_data);
+                nes_write_1G_phy_reg(nesdev, 4, nesadapter->phy_index[mac_index],
+                                (phy_data & ~(0x03E0)) | 0xc00);
+                /* nes_write_1G_phy_reg(nesdev, 4, nesadapter->phy_index[mac_index],
+                                phy_data | 0xc00); */
+                nes_read_1G_phy_reg(nesdev, 4, nesadapter->phy_index[mac_index], &phy_data);
+                nes_debug(NES_DBG_PHY, "Phy data from register 0x4 = 0x%X.\n", phy_data);
+
+                nes_read_1G_phy_reg(nesdev, 9, nesadapter->phy_index[mac_index], &phy_data);
+                nes_debug(NES_DBG_PHY, "Phy data from register 0x9 = 0x%X.\n", phy_data);
+                /* Clear Half duplex */
+                nes_write_1G_phy_reg(nesdev, 9, nesadapter->phy_index[mac_index],
+                                phy_data & ~(0x0100));
+                nes_read_1G_phy_reg(nesdev, 9, nesadapter->phy_index[mac_index], &phy_data);
+                nes_debug(NES_DBG_PHY, "Phy data from register 0x9 = 0x%X.\n", phy_data);
+
+                nes_read_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], &phy_data);
+                nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], phy_data | 0x0300);
+        } else {
+                if (nesadapter->phy_type[mac_index] == NES_PHY_TYPE_IRIS) {
+                        /* setup 10G MDIO operation */
+                        tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG);
+                        tx_config |= 0x14;
+                        nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config);
+                }
+        }
+        return 0;
+}
+
+
+/**
+ * nes_replenish_nic_rq
+ */
+static void nes_replenish_nic_rq(struct nes_vnic *nesvnic)
+{
+        unsigned long flags;
+        dma_addr_t bus_address;
+        struct sk_buff *skb;
+        struct nes_hw_nic_rq_wqe *nic_rqe;
+        struct nes_hw_nic *nesnic;
+        struct nes_device *nesdev;
+        u32 rx_wqes_posted = 0;
+
+        nesnic = &nesvnic->nic;
+        nesdev = nesvnic->nesdev;
+        spin_lock_irqsave(&nesnic->rq_lock, flags);
+        if (nesnic->replenishing_rq !=0) {
+                if (((nesnic->rq_size-1) == atomic_read(&nesvnic->rx_skbs_needed)) &&
+                                (atomic_read(&nesvnic->rx_skb_timer_running) == 0)) {
+                        atomic_set(&nesvnic->rx_skb_timer_running, 1);
+                        spin_unlock_irqrestore(&nesnic->rq_lock, flags);
+                        nesvnic->rq_wqes_timer.expires = jiffies + (HZ/2);      /* 1/2 second */
+                        add_timer(&nesvnic->rq_wqes_timer);
+                } else
+                spin_unlock_irqrestore(&nesnic->rq_lock, flags);
+                return;
+        }
+        nesnic->replenishing_rq = 1;
+        spin_unlock_irqrestore(&nesnic->rq_lock, flags);
+        do {
+                skb = dev_alloc_skb(nesvnic->max_frame_size);
+                if (skb) {
+                        skb->dev = nesvnic->netdev;
+
+                        bus_address = pci_map_single(nesdev->pcidev,
+                                        skb->data, nesvnic->max_frame_size, PCI_DMA_FROMDEVICE);
+
+                        nic_rqe = &nesnic->rq_vbase[nesvnic->nic.rq_head];
+                        nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_1_0_IDX] =
+                                        cpu_to_le32(nesvnic->max_frame_size);
+                        nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_3_2_IDX] = 0;
+                        nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX] =
+                                        cpu_to_le32((u32)bus_address);
+                        nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX] =
+                                        cpu_to_le32((u32)((u64)bus_address >> 32));
+                        nesnic->rx_skb[nesnic->rq_head] = skb;
+                        nesnic->rq_head++;
+                        nesnic->rq_head &= nesnic->rq_size - 1;
+                        atomic_dec(&nesvnic->rx_skbs_needed);
+                        barrier();
+                        if (++rx_wqes_posted == 255) {
+                                nes_write32(nesdev->regs+NES_WQE_ALLOC, (rx_wqes_posted << 24) | nesnic->qp_id);
+                                rx_wqes_posted = 0;
+                        }
+                } else {
+                        spin_lock_irqsave(&nesnic->rq_lock, flags);
+                        if (((nesnic->rq_size-1) == atomic_read(&nesvnic->rx_skbs_needed)) &&
+                                        (atomic_read(&nesvnic->rx_skb_timer_running) == 0)) {
+                                atomic_set(&nesvnic->rx_skb_timer_running, 1);
+                                spin_unlock_irqrestore(&nesnic->rq_lock, flags);
+                                nesvnic->rq_wqes_timer.expires = jiffies + (HZ/2);      /* 1/2 second */
+                                add_timer(&nesvnic->rq_wqes_timer);
+                        } else
+                                spin_unlock_irqrestore(&nesnic->rq_lock, flags);
+                        break;
+                }
+        } while (atomic_read(&nesvnic->rx_skbs_needed));
+        barrier();
+        if (rx_wqes_posted)
+                nes_write32(nesdev->regs+NES_WQE_ALLOC, (rx_wqes_posted << 24) | nesnic->qp_id);
+        nesnic->replenishing_rq = 0;
+}
+
+
+/**
+ * nes_rq_wqes_timeout
+ */
+static void nes_rq_wqes_timeout(unsigned long parm)
+{
+        struct nes_vnic *nesvnic = (struct nes_vnic *)parm;
+        printk("%s: Timer fired.\n", __FUNCTION__);
+        atomic_set(&nesvnic->rx_skb_timer_running, 0);
+        if (atomic_read(&nesvnic->rx_skbs_needed))
+                nes_replenish_nic_rq(nesvnic);
+}
+
+
+/**
+ * nes_init_nic_qp
+ */
+int nes_init_nic_qp(struct nes_device *nesdev, struct net_device *netdev)
+{
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        struct nes_hw_nic_sq_wqe *nic_sqe;
+        struct nes_hw_nic_qp_context *nic_context;
+        struct sk_buff *skb;
+        struct nes_hw_nic_rq_wqe *nic_rqe;
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        unsigned long flags;
+        void *vmem;
+        dma_addr_t pmem;
+        u64 u64temp;
+        int ret;
+        u32 cqp_head;
+        u32 counter;
+        u32 wqe_count;
+        u8 jumbomode=0;
+
+        /* Allocate fragment, SQ, RQ, and CQ; Reuse CEQ based on the PCI function */
+        nesvnic->nic_mem_size = 256 +
+                        (NES_NIC_WQ_SIZE * sizeof(struct nes_first_frag)) +
+                        (NES_NIC_WQ_SIZE * sizeof(struct nes_hw_nic_sq_wqe)) +
+                        (NES_NIC_WQ_SIZE * sizeof(struct nes_hw_nic_rq_wqe)) +
+                        (NES_NIC_WQ_SIZE * 2 * sizeof(struct nes_hw_nic_cqe)) +
+                        sizeof(struct nes_hw_nic_qp_context);
+
+        nesvnic->nic_vbase = pci_alloc_consistent(nesdev->pcidev, nesvnic->nic_mem_size,
+                        &nesvnic->nic_pbase);
+        if (!nesvnic->nic_vbase) {
+                nes_debug(NES_DBG_INIT, "Unable to allocate memory for NIC host descriptor rings\n");
+                return -ENOMEM;
+        }
+        memset(nesvnic->nic_vbase, 0, nesvnic->nic_mem_size);
+        nes_debug(NES_DBG_INIT, "Allocated NIC QP structures at %p (phys = %016lX), size = %u.\n",
+                        nesvnic->nic_vbase, (unsigned long)nesvnic->nic_pbase, nesvnic->nic_mem_size);
+
+        vmem = (void *)(((unsigned long)nesvnic->nic_vbase + (256 - 1)) &
+                        ~(unsigned long)(256 - 1));
+        pmem = (dma_addr_t)(((unsigned long long)nesvnic->nic_pbase + (256 - 1)) &
+                        ~(unsigned long long)(256 - 1));
+
+        /* Setup the first Fragment buffers */
+        nesvnic->nic.first_frag_vbase = vmem;
+
+        for (counter = 0; counter < NES_NIC_WQ_SIZE; counter++) {
+                nesvnic->nic.frag_paddr[counter] = pmem;
+                pmem += sizeof(struct nes_first_frag);
+        }
+
+        /* setup the SQ */
+        vmem += (NES_NIC_WQ_SIZE * sizeof(struct nes_first_frag));
+
+        nesvnic->nic.sq_vbase = (void *)vmem;
+        nesvnic->nic.sq_pbase = pmem;
+        nesvnic->nic.sq_head = 0;
+        nesvnic->nic.sq_tail = 0;
+        nesvnic->nic.sq_size = NES_NIC_WQ_SIZE;
+        for (counter = 0; counter < NES_NIC_WQ_SIZE; counter++) {
+                nic_sqe = &nesvnic->nic.sq_vbase[counter];
+                nic_sqe->wqe_words[NES_NIC_SQ_WQE_MISC_IDX] =
+                                cpu_to_le32(NES_NIC_SQ_WQE_DISABLE_CHKSUM |
+                                NES_NIC_SQ_WQE_COMPLETION);
+                nic_sqe->wqe_words[NES_NIC_SQ_WQE_LENGTH_0_TAG_IDX] =
+                                cpu_to_le32((u32)NES_FIRST_FRAG_SIZE << 16);
+                nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX] =
+                                cpu_to_le32((u32)nesvnic->nic.frag_paddr[counter]);
+                nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX] =
+                                cpu_to_le32((u32)((u64)nesvnic->nic.frag_paddr[counter] >> 32));
+        }
+
+        nesvnic->get_cqp_request = nes_get_cqp_request;
+        nesvnic->post_cqp_request = nes_post_cqp_request;
+        nesvnic->mcrq_mcast_filter = NULL;
+
+        spin_lock_init(&nesvnic->nic.sq_lock);
+        spin_lock_init(&nesvnic->nic.rq_lock);
+
+        /* setup the RQ */
+        vmem += (NES_NIC_WQ_SIZE * sizeof(struct nes_hw_nic_sq_wqe));
+        pmem += (NES_NIC_WQ_SIZE * sizeof(struct nes_hw_nic_sq_wqe));
+
+
+        nesvnic->nic.rq_vbase = vmem;
+        nesvnic->nic.rq_pbase = pmem;
+        nesvnic->nic.rq_head = 0;
+        nesvnic->nic.rq_tail = 0;
+        nesvnic->nic.rq_size = NES_NIC_WQ_SIZE;
+
+        /* setup the CQ */
+        vmem += (NES_NIC_WQ_SIZE * sizeof(struct nes_hw_nic_rq_wqe));
+        pmem += (NES_NIC_WQ_SIZE * sizeof(struct nes_hw_nic_rq_wqe));
+
+        if (nesdev->nesadapter->netdev_count > 2)
+                nesvnic->mcrq_qp_id = nesvnic->nic_index + 32;
+        else
+                nesvnic->mcrq_qp_id = nesvnic->nic.qp_id + 4;
+
+        nesvnic->nic_cq.cq_vbase = vmem;
+        nesvnic->nic_cq.cq_pbase = pmem;
+        nesvnic->nic_cq.cq_head = 0;
+        nesvnic->nic_cq.cq_size = NES_NIC_WQ_SIZE * 2;
+
+        nesvnic->nic_cq.ce_handler = nes_nic_napi_ce_handler;
+
+        /* Send CreateCQ request to CQP */
+        spin_lock_irqsave(&nesdev->cqp.lock, flags);
+        cqp_head = nesdev->cqp.sq_head;
+
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+
+        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(
+                        NES_CQP_CREATE_CQ | NES_CQP_CQ_CEQ_VALID |
+                        ((u32)nesvnic->nic_cq.cq_size << 16));
+        cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX] = cpu_to_le32(
+                        nesvnic->nic_cq.cq_number | ((u32)nesdev->nic_ceq_index << 16));
+        u64temp = (u64)nesvnic->nic_cq.cq_pbase;
+        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_CQ_WQE_PBL_LOW_IDX, u64temp);
+        cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX] =  0;
+        u64temp = (unsigned long)&nesvnic->nic_cq;
+        cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_LOW_IDX] =  cpu_to_le32((u32)(u64temp >> 1));
+        cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX] =
+                        cpu_to_le32(((u32)((u64temp) >> 33)) & 0x7FFFFFFF);
+        cqp_wqe->wqe_words[NES_CQP_CQ_WQE_DOORBELL_INDEX_HIGH_IDX] = 0;
+        if (++cqp_head >= nesdev->cqp.sq_size)
+                cqp_head = 0;
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+
+        /* Send CreateQP request to CQP */
+        nic_context = (void *)(&nesvnic->nic_cq.cq_vbase[nesvnic->nic_cq.cq_size]);
+        nic_context->context_words[NES_NIC_CTX_MISC_IDX] =
+                        cpu_to_le32((u32)NES_NIC_CTX_SIZE |
+                        ((u32)PCI_FUNC(nesdev->pcidev->devfn) << 12));
+        nes_debug(NES_DBG_INIT, "RX_WINDOW_BUFFER_PAGE_TABLE_SIZE = 0x%08X, RX_WINDOW_BUFFER_SIZE = 0x%08X\n",
+                        nes_read_indexed(nesdev, NES_IDX_RX_WINDOW_BUFFER_PAGE_TABLE_SIZE),
+                        nes_read_indexed(nesdev, NES_IDX_RX_WINDOW_BUFFER_SIZE));
+        if (nes_read_indexed(nesdev, NES_IDX_RX_WINDOW_BUFFER_SIZE) != 0) {
+                nic_context->context_words[NES_NIC_CTX_MISC_IDX] |= cpu_to_le32(NES_NIC_BACK_STORE);
+        }
+
+        u64temp = (u64)nesvnic->nic.sq_pbase;
+        nic_context->context_words[NES_NIC_CTX_SQ_LOW_IDX] = cpu_to_le32((u32)u64temp);
+        nic_context->context_words[NES_NIC_CTX_SQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32));
+        u64temp = (u64)nesvnic->nic.rq_pbase;
+        nic_context->context_words[NES_NIC_CTX_RQ_LOW_IDX] = cpu_to_le32((u32)u64temp);
+        nic_context->context_words[NES_NIC_CTX_RQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32));
+
+        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_CREATE_QP |
+                        NES_CQP_QP_TYPE_NIC);
+        cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX] = cpu_to_le32(nesvnic->nic.qp_id);
+        u64temp = (u64)nesvnic->nic_cq.cq_pbase +
+                        (nesvnic->nic_cq.cq_size * sizeof(struct nes_hw_nic_cqe));
+        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp);
+
+        if (++cqp_head >= nesdev->cqp.sq_size)
+                cqp_head = 0;
+        nesdev->cqp.sq_head = cqp_head;
+
+        barrier();
+
+        /* Ring doorbell (2 WQEs) */
+        nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x02800000 | nesdev->cqp.qp_id);
+
+        spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+        nes_debug(NES_DBG_INIT, "Waiting for create NIC QP%u to complete.\n",
+                        nesvnic->nic.qp_id);
+
+        ret = wait_event_timeout(nesdev->cqp.waitq, (nesdev->cqp.sq_tail == cqp_head),
+                        NES_EVENT_TIMEOUT);
+        nes_debug(NES_DBG_INIT, "Create NIC QP%u completed, wait_event_timeout ret = %u.\n",
+                        nesvnic->nic.qp_id, ret);
+        if (!ret) {
+                nes_debug(NES_DBG_INIT, "NIC QP%u create timeout expired\n", nesvnic->nic.qp_id);
+                pci_free_consistent(nesdev->pcidev, nesvnic->nic_mem_size, nesvnic->nic_vbase,
+                                nesvnic->nic_pbase);
+                return -EIO;
+        }
+
+        /* Populate the RQ */
+        for (counter = 0; counter < (NES_NIC_WQ_SIZE - 1); counter++) {
+                skb = dev_alloc_skb(nesvnic->max_frame_size);
+                if (!skb) {
+                        nes_debug(NES_DBG_INIT, "%s: out of memory for receive skb\n", netdev->name);
+
+                        nes_destroy_nic_qp(nesvnic);
+                        return -ENOMEM;
+                }
+
+                skb->dev = netdev;
+
+                pmem = pci_map_single(nesdev->pcidev, skb->data,
+                                nesvnic->max_frame_size, PCI_DMA_FROMDEVICE);
+
+                nic_rqe = &nesvnic->nic.rq_vbase[counter];
+                nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_1_0_IDX] = cpu_to_le32(nesvnic->max_frame_size);
+                nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_3_2_IDX] = 0;
+                nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX] = cpu_to_le32((u32)pmem);
+                nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX] = cpu_to_le32((u32)((u64)pmem >> 32));
+                nesvnic->nic.rx_skb[counter] = skb;
+        }
+
+        wqe_count = NES_NIC_WQ_SIZE - 1;
+        nesvnic->nic.rq_head = wqe_count;
+        barrier();
+        do {
+                counter = min(wqe_count, ((u32)255));
+                wqe_count -= counter;
+                nes_write32(nesdev->regs+NES_WQE_ALLOC, (counter << 24) | nesvnic->nic.qp_id);
+        } while (wqe_count);
+        init_timer(&nesvnic->rq_wqes_timer);
+        nesvnic->rq_wqes_timer.function = nes_rq_wqes_timeout;
+        nesvnic->rq_wqes_timer.data = (unsigned long)nesvnic;
+        nes_debug(NES_DBG_INIT, "NAPI support Enabled\n");
+
+        if (nesdev->nesadapter->et_use_adaptive_rx_coalesce)
+        {
+                nes_nic_init_timer(nesdev);
+                if (netdev->mtu > 1500)
+                        jumbomode = 1;
+                nes_nic_init_timer_defaults(nesdev, jumbomode);
+        }
+
+        return 0;
+}
+
+
+/**
+ * nes_destroy_nic_qp
+ */
+void nes_destroy_nic_qp(struct nes_vnic *nesvnic)
+{
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        struct nes_hw_nic_rq_wqe *nic_rqe;
+        u64 wqe_frag;
+        u32 cqp_head;
+        unsigned long flags;
+        int ret;
+
+        /* Free remaining NIC receive buffers */
+        while (nesvnic->nic.rq_head != nesvnic->nic.rq_tail) {
+                nic_rqe = &nesvnic->nic.rq_vbase[nesvnic->nic.rq_tail];
+                wqe_frag = (u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX]);
+                wqe_frag |= ((u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX])) << 32;
+                pci_unmap_single(nesdev->pcidev, (dma_addr_t)wqe_frag,
+                                nesvnic->max_frame_size, PCI_DMA_FROMDEVICE);
+                dev_kfree_skb(nesvnic->nic.rx_skb[nesvnic->nic.rq_tail++]);
+                nesvnic->nic.rq_tail &= (nesvnic->nic.rq_size - 1);
+        }
+
+        spin_lock_irqsave(&nesdev->cqp.lock, flags);
+
+        /* Destroy NIC QP */
+        cqp_head = nesdev->cqp.sq_head;
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX,
+                (NES_CQP_DESTROY_QP | NES_CQP_QP_TYPE_NIC));
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX,
+                nesvnic->nic.qp_id);
+
+        if (++cqp_head >= nesdev->cqp.sq_size)
+                cqp_head = 0;
+
+        cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+
+        /* Destroy NIC CQ */
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX,
+                (NES_CQP_DESTROY_CQ | ((u32)nesvnic->nic_cq.cq_size << 16)));
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX,
+                (nesvnic->nic_cq.cq_number | ((u32)nesdev->nic_ceq_index << 16)));
+
+        if (++cqp_head >= nesdev->cqp.sq_size)
+                cqp_head = 0;
+
+        nesdev->cqp.sq_head = cqp_head;
+        barrier();
+
+        /* Ring doorbell (2 WQEs) */
+        nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x02800000 | nesdev->cqp.qp_id);
+
+        spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+        nes_debug(NES_DBG_SHUTDOWN, "Waiting for CQP, cqp_head=%u, cqp.sq_head=%u,"
+                        " cqp.sq_tail=%u, cqp.sq_size=%u\n",
+                        cqp_head, nesdev->cqp.sq_head,
+                        nesdev->cqp.sq_tail, nesdev->cqp.sq_size);
+
+        ret = wait_event_timeout(nesdev->cqp.waitq, (nesdev->cqp.sq_tail == cqp_head),
+                        NES_EVENT_TIMEOUT);
+
+        nes_debug(NES_DBG_SHUTDOWN, "Destroy NIC QP returned, wait_event_timeout ret = %u, cqp_head=%u,"
+                        " cqp.sq_head=%u, cqp.sq_tail=%u\n",
+                        ret, cqp_head, nesdev->cqp.sq_head, nesdev->cqp.sq_tail);
+        if (!ret) {
+                nes_debug(NES_DBG_SHUTDOWN, "NIC QP%u destroy timeout expired\n",
+                                nesvnic->nic.qp_id);
+        }
+
+        pci_free_consistent(nesdev->pcidev, nesvnic->nic_mem_size, nesvnic->nic_vbase,
+                        nesvnic->nic_pbase);
+}
+
+/**
+ * nes_napi_isr
+ */
+int nes_napi_isr(struct nes_device *nesdev)
+{
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        u32 int_stat;
+
+        if (nesdev->napi_isr_ran) {
+                /* interrupt status has already been read in ISR */
+                int_stat = nesdev->int_stat;
+        } else {
+                int_stat = nes_read32(nesdev->regs + NES_INT_STAT);
+                nesdev->int_stat = int_stat;
+                nesdev->napi_isr_ran = 1;
+        }
+
+        int_stat &= nesdev->int_req;
+        /* iff NIC, process here, else wait for DPC */
+        if ((int_stat) && ((int_stat & 0x0000ff00) == int_stat)) {
+                nesdev->napi_isr_ran = 0;
+                nes_write32(nesdev->regs+NES_INT_STAT,
+                                (int_stat &
+                                ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0|NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3)));
+
+                /* Process the CEQs */
+                nes_process_ceq(nesdev, &nesdev->nesadapter->ceq[nesdev->nic_ceq_index]);
+
+                if (unlikely((((nesadapter->et_rx_coalesce_usecs_irq) &&
+                                           (!nesadapter->et_use_adaptive_rx_coalesce)) ||
+                                          ((nesadapter->et_use_adaptive_rx_coalesce) &&
+                                           (nesdev->deepcq_count > nesadapter->et_pkt_rate_low)))) ) {
+                        if ((nesdev->int_req & NES_INT_TIMER) == 0) {
+                                /* Enable Periodic timer interrupts */
+                                nesdev->int_req |= NES_INT_TIMER;
+                                /* ack any pending periodic timer interrupts so we don't get an immediate interrupt */
+                                /* TODO: need to also ack other unused periodic timer values, get from nesadapter */
+                                nes_write32(nesdev->regs+NES_TIMER_STAT,
+                                                nesdev->timer_int_req  | ~(nesdev->nesadapter->timer_int_req));
+                                nes_write32(nesdev->regs+NES_INTF_INT_MASK,
+                                                ~(nesdev->intf_int_req | NES_INTF_PERIODIC_TIMER));
+                        }
+
+                        if (unlikely(nesadapter->et_use_adaptive_rx_coalesce))
+                        {
+                                nes_nic_init_timer(nesdev);
+                        }
+                        /* Enable interrupts, except CEQs */
+                        nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff | (~nesdev->int_req));
+                } else {
+                        /* Enable interrupts, make sure timer is off */
+                        nesdev->int_req &= ~NES_INT_TIMER;
+                        nes_write32(nesdev->regs+NES_INTF_INT_MASK, ~(nesdev->intf_int_req));
+                        nes_write32(nesdev->regs+NES_INT_MASK, ~nesdev->int_req);
+                        nesadapter->tune_timer.timer_in_use_old = 0;
+                }
+                nesdev->deepcq_count = 0;
+                return 1;
+        } else {
+                return 0;
+        }
+}
+
+
+/**
+ * nes_dpc
+ */
+void nes_dpc(unsigned long param)
+{
+        struct nes_device *nesdev = (struct nes_device *)param;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        u32 counter;
+        u32 loop_counter = 0;
+        u32 int_status_bit;
+        u32 int_stat;
+        u32 timer_stat;
+        u32 temp_int_stat;
+        u32 intf_int_stat;
+        u32 debug_error;
+        u32 processed_intf_int = 0;
+        u16 processed_timer_int = 0;
+        u16 completion_ints = 0;
+        u16 timer_ints = 0;
+
+        /* nes_debug(NES_DBG_ISR, "\n"); */
+
+        do {
+                timer_stat = 0;
+                if (nesdev->napi_isr_ran) {
+                        nesdev->napi_isr_ran = 0;
+                        int_stat = nesdev->int_stat;
+                } else
+                        int_stat = nes_read32(nesdev->regs+NES_INT_STAT);
+                if (processed_intf_int != 0)
+                        int_stat &= nesdev->int_req & ~NES_INT_INTF;
+                else
+                        int_stat &= nesdev->int_req;
+                if (processed_timer_int == 0) {
+                        processed_timer_int = 1;
+                        if (int_stat & NES_INT_TIMER) {
+                                timer_stat = nes_read32(nesdev->regs + NES_TIMER_STAT);
+                                if ((timer_stat & nesdev->timer_int_req) == 0) {
+                                        int_stat &= ~NES_INT_TIMER;
+                                }
+                        }
+                } else {
+                        int_stat &= ~NES_INT_TIMER;
+                }
+
+                if (int_stat) {
+                        if (int_stat & ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0|
+                                        NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3)) {
+                                /* Ack the interrupts */
+                                nes_write32(nesdev->regs+NES_INT_STAT,
+                                                (int_stat & ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0|
+                                                NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3)));
+                        }
+
+                        temp_int_stat = int_stat;
+                        for (counter = 0, int_status_bit = 1; counter < 16; counter++) {
+                                if (int_stat & int_status_bit) {
+                                        nes_process_ceq(nesdev, &nesadapter->ceq[counter]);
+                                        temp_int_stat &= ~int_status_bit;
+                                        completion_ints = 1;
+                                }
+                                if (!(temp_int_stat & 0x0000ffff))
+                                        break;
+                                int_status_bit <<= 1;
+                        }
+
+                        /* Process the AEQ for this pci function */
+                        int_status_bit = 1 << (16 + PCI_FUNC(nesdev->pcidev->devfn));
+                        if (int_stat & int_status_bit) {
+                                nes_process_aeq(nesdev, &nesadapter->aeq[PCI_FUNC(nesdev->pcidev->devfn)]);
+                        }
+
+                        /* Process the MAC interrupt for this pci function */
+                        int_status_bit = 1 << (24 + nesdev->mac_index);
+                        if (int_stat & int_status_bit) {
+                                nes_process_mac_intr(nesdev, nesdev->mac_index);
+                        }
+
+                        if (int_stat & NES_INT_TIMER) {
+                                if (timer_stat & nesdev->timer_int_req) {
+                                        nes_write32(nesdev->regs + NES_TIMER_STAT,
+                                                        (timer_stat & nesdev->timer_int_req) |
+                                                        ~(nesdev->nesadapter->timer_int_req));
+                                        timer_ints = 1;
+                                }
+                        }
+
+                        if (int_stat & NES_INT_INTF) {
+                                processed_intf_int = 1;
+                                intf_int_stat = nes_read32(nesdev->regs+NES_INTF_INT_STAT);
+                                intf_int_stat &= nesdev->intf_int_req;
+                                if (NES_INTF_INT_CRITERR & intf_int_stat) {
+                                        debug_error = nes_read_indexed(nesdev, NES_IDX_DEBUG_ERROR_CONTROL_STATUS);
+                                        printk(KERN_ERR PFX "Critical Error reported by device!!! 0x%02X\n",
+                                                        (u16)debug_error);
+                                        nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_CONTROL_STATUS,
+                                                        0x01010000 | (debug_error & 0x0000ffff));
+                                        /* BUG(); */
+                                        if (crit_err_count++ > 10)
+                                                nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS1, 1 << 0x17);
+                                }
+                                if (NES_INTF_INT_PCIERR & intf_int_stat) {
+                                        printk(KERN_ERR PFX "PCI Error reported by device!!!\n");
+                                        BUG();
+                                }
+                                if (NES_INTF_INT_AEQ_OFLOW & intf_int_stat) {
+                                        printk(KERN_ERR PFX "AEQ Overflow reported by device!!!\n");
+                                        BUG();
+                                }
+                                nes_write32(nesdev->regs+NES_INTF_INT_STAT, intf_int_stat);
+                        }
+
+                        if (int_stat & NES_INT_TSW) {
+                        }
+                }
+                /* Don't use the interface interrupt bit stay in loop */
+                int_stat &= ~NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0|
+                                NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3;
+        } while ((int_stat != 0) && (loop_counter++ < MAX_DPC_ITERATIONS));
+
+        if (timer_ints == 1) {
+                if ((nesadapter->et_rx_coalesce_usecs_irq) || (nesadapter->et_use_adaptive_rx_coalesce)) {
+                        if (completion_ints == 0) {
+                                nesdev->timer_only_int_count++;
+                                if (nesdev->timer_only_int_count>=nesadapter->timer_int_limit) {
+                                        nesdev->timer_only_int_count = 0;
+                                        nesdev->int_req &= ~NES_INT_TIMER;
+                                        nes_write32(nesdev->regs + NES_INTF_INT_MASK, ~(nesdev->intf_int_req));
+                                        nes_write32(nesdev->regs+NES_INT_MASK, ~nesdev->int_req);
+                                        nesdev->nesadapter->tune_timer.timer_in_use_old = 0;
+                                } else {
+                                        nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff|(~nesdev->int_req));
+                                }
+                        } else {
+                                if (unlikely(nesadapter->et_use_adaptive_rx_coalesce))
+                                {
+                                        nes_nic_init_timer(nesdev);
+                                }
+                                nesdev->timer_only_int_count = 0;
+                                nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff|(~nesdev->int_req));
+                        }
+                } else {
+                        nesdev->timer_only_int_count = 0;
+                        nesdev->int_req &= ~NES_INT_TIMER;
+                        nes_write32(nesdev->regs+NES_INTF_INT_MASK, ~(nesdev->intf_int_req));
+                        nes_write32(nesdev->regs+NES_TIMER_STAT,
+                                        nesdev->timer_int_req | ~(nesdev->nesadapter->timer_int_req));
+                        nes_write32(nesdev->regs+NES_INT_MASK, ~nesdev->int_req);
+                }
+        } else {
+                if ( (completion_ints == 1) &&
+                         (((nesadapter->et_rx_coalesce_usecs_irq) &&
+                           (!nesadapter->et_use_adaptive_rx_coalesce)) ||
+                          ((nesdev->deepcq_count > nesadapter->et_pkt_rate_low) &&
+                           (nesadapter->et_use_adaptive_rx_coalesce) )) ) {
+                        /* nes_debug(NES_DBG_ISR, "Enabling periodic timer interrupt.\n" ); */
+                        nesdev->timer_only_int_count = 0;
+                        nesdev->int_req |= NES_INT_TIMER;
+                        nes_write32(nesdev->regs+NES_TIMER_STAT,
+                                        nesdev->timer_int_req | ~(nesdev->nesadapter->timer_int_req));
+                        nes_write32(nesdev->regs+NES_INTF_INT_MASK,
+                                        ~(nesdev->intf_int_req | NES_INTF_PERIODIC_TIMER));
+                        nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff | (~nesdev->int_req));
+                } else {
+                        nes_write32(nesdev->regs+NES_INT_MASK, ~nesdev->int_req);
+                }
+        }
+        nesdev->deepcq_count = 0;
+}
+
+
+/**
+ * nes_process_ceq
+ */
+void nes_process_ceq(struct nes_device *nesdev, struct nes_hw_ceq *ceq)
+{
+        u64 u64temp;
+        struct nes_hw_cq *cq;
+        u32 head;
+        u32 ceq_size;
+
+        /* nes_debug(NES_DBG_CQ, "\n"); */
+        head = ceq->ceq_head;
+        ceq_size = ceq->ceq_size;
+
+        do {
+                if (le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX]) &
+                                NES_CEQE_VALID) {
+                        u64temp = (((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX])))<<32) |
+                                                ((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_LOW_IDX])));
+                        u64temp <<= 1;
+                        cq = *((struct nes_hw_cq **)&u64temp);
+                        /* nes_debug(NES_DBG_CQ, "pCQ = %p\n", cq); */
+                        barrier();
+                        ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX] = 0;
+
+                        /* call the event handler */
+                        cq->ce_handler(nesdev, cq);
+
+                        if (++head >= ceq_size)
+                                head = 0;
+                } else {
+                        break;
+                }
+
+        } while (1);
+
+        ceq->ceq_head = head;
+}
+
+
+/**
+ * nes_process_aeq
+ */
+void nes_process_aeq(struct nes_device *nesdev, struct nes_hw_aeq *aeq)
+{
+//      u64 u64temp;
+        u32 head;
+        u32 aeq_size;
+        u32 aeqe_misc;
+        u32 aeqe_cq_id;
+        struct nes_hw_aeqe volatile *aeqe;
+
+        head = aeq->aeq_head;
+        aeq_size = aeq->aeq_size;
+
+        do {
+                aeqe = &aeq->aeq_vbase[head];
+                if ((le32_to_cpu(aeqe->aeqe_words[NES_AEQE_MISC_IDX]) & NES_AEQE_VALID) == 0)
+                        break;
+                aeqe_misc  = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_MISC_IDX]);
+                aeqe_cq_id = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]);
+                if (aeqe_misc & (NES_AEQE_QP|NES_AEQE_CQ)) {
+                        if (aeqe_cq_id >= NES_FIRST_QPN) {
+                                /* dealing with an accelerated QP related AE */
+//                              u64temp = (((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])))<<32) |
+//                                      ((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX])));
+                                nes_process_iwarp_aeqe(nesdev, (struct nes_hw_aeqe *)aeqe);
+                        } else {
+                                /* TODO: dealing with a CQP related AE */
+                                nes_debug(NES_DBG_AEQ, "Processing CQP related AE, misc = 0x%04X\n",
+                                                (u16)(aeqe_misc >> 16));
+                        }
+                }
+
+                aeqe->aeqe_words[NES_AEQE_MISC_IDX] = 0;
+
+                if (++head >= aeq_size)
+                        head = 0;
+        }
+        while (1);
+        aeq->aeq_head = head;
+}
+
+static void nes_reset_link(struct nes_device *nesdev, u32 mac_index)
+{
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        u32 reset_value;
+        u32 i=0;
+        u32 u32temp;
+
+        if (nesadapter->hw_rev == NE020_REV) {
+                return;
+        }
+        mh_detected++;
+
+        reset_value = nes_read32(nesdev->regs+NES_SOFTWARE_RESET);
+
+        if ((mac_index == 0) || ((mac_index == 1) && (nesadapter->OneG_Mode)))
+                reset_value |= 0x0000001d;
+        else
+                reset_value |= 0x0000002d;
+
+        if (4 <= (nesadapter->link_interrupt_count[mac_index] / ((u16)NES_MAX_LINK_INTERRUPTS))) {
+                if ((!nesadapter->OneG_Mode) && (nesadapter->port_count == 2)) {
+                        nesadapter->link_interrupt_count[0] = 0;
+                        nesadapter->link_interrupt_count[1] = 0;
+                        u32temp = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL1);
+                        if (0x00000040 & u32temp)
+                                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL1, 0x0000F088);
+                        else
+                                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL1, 0x0000F0C8);
+
+                        reset_value |= 0x0000003d;
+                }
+                nesadapter->link_interrupt_count[mac_index] = 0;
+        }
+
+        nes_write32(nesdev->regs+NES_SOFTWARE_RESET, reset_value);
+
+        while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET)
+                        & 0x00000040) != 0x00000040) && (i++ < 5000));
+
+        if (0x0000003d == (reset_value & 0x0000003d)) {
+                u32 pcs_control_status0, pcs_control_status1;
+
+                for (i = 0; i < 10; i++) {
+                        pcs_control_status0 = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0);
+                        pcs_control_status1 = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + 0x200);
+                        if (((0x0F000000 == (pcs_control_status0 & 0x0F000000))
+                             && (pcs_control_status0 & 0x00100000))
+                            || ((0x0F000000 == (pcs_control_status1 & 0x0F000000))
+                                && (pcs_control_status1 & 0x00100000)))
+                                continue;
+                        else
+                                break;
+                }
+                if (10 == i) {
+                        u32temp = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL1);
+                        if (0x00000040 & u32temp)
+                                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL1, 0x0000F088);
+                        else
+                                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL1, 0x0000F0C8);
+
+                        nes_write32(nesdev->regs+NES_SOFTWARE_RESET, reset_value);
+
+                        while (((nes_read32(nesdev->regs + NES_SOFTWARE_RESET)
+                                 & 0x00000040) != 0x00000040) && (i++ < 5000));
+                }
+        }
+}
+
+/**
+ * nes_process_mac_intr
+ */
+void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number)
+{
+        unsigned long flags;
+        u32 pcs_control_status;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_vnic *nesvnic;
+        u32 mac_status;
+        u32 mac_index = nesdev->mac_index;
+        u32 u32temp;
+        u16 phy_data;
+        u16 temp_phy_data;
+
+        spin_lock_irqsave(&nesadapter->phy_lock, flags);
+        if (nesadapter->mac_sw_state[mac_number] != NES_MAC_SW_IDLE) {
+                spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
+                return;
+        }
+        nesadapter->mac_sw_state[mac_number] = NES_MAC_SW_INTERRUPT;
+        spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
+
+        /* ack the MAC interrupt */
+        mac_status = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (mac_index * 0x200));
+        /* Clear the interrupt */
+        nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (mac_index * 0x200), mac_status);
+
+        nes_debug(NES_DBG_PHY, "MAC%u interrupt status = 0x%X.\n", mac_number, mac_status);
+
+        if (mac_status & (NES_MAC_INT_LINK_STAT_CHG | NES_MAC_INT_XGMII_EXT)) {
+                nesdev->link_status_interrupts++;
+                if (0 == (++nesadapter->link_interrupt_count[mac_index] % ((u16)NES_MAX_LINK_INTERRUPTS))) {
+                        spin_lock_irqsave(&nesadapter->phy_lock, flags);
+                        nes_reset_link(nesdev, mac_index);
+                        spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
+                }
+                /* read the PHY interrupt status register */
+                if (nesadapter->OneG_Mode) {
+                        do {
+                                nes_read_1G_phy_reg(nesdev, 0x1a,
+                                                nesadapter->phy_index[mac_index], &phy_data);
+                                nes_debug(NES_DBG_PHY, "Phy%d data from register 0x1a = 0x%X.\n",
+                                                nesadapter->phy_index[mac_index], phy_data);
+                        } while (phy_data&0x8000);
+
+                        temp_phy_data = 0;
+                        do {
+                                nes_read_1G_phy_reg(nesdev, 0x11,
+                                                nesadapter->phy_index[mac_index], &phy_data);
+                                nes_debug(NES_DBG_PHY, "Phy%d data from register 0x11 = 0x%X.\n",
+                                                nesadapter->phy_index[mac_index], phy_data);
+                                if (temp_phy_data == phy_data)
+                                        break;
+                                temp_phy_data = phy_data;
+                        } while (1);
+
+                        nes_read_1G_phy_reg(nesdev, 0x1e,
+                                        nesadapter->phy_index[mac_index], &phy_data);
+                        nes_debug(NES_DBG_PHY, "Phy%d data from register 0x1e = 0x%X.\n",
+                                        nesadapter->phy_index[mac_index], phy_data);
+
+                        nes_read_1G_phy_reg(nesdev, 1,
+                                        nesadapter->phy_index[mac_index], &phy_data);
+                        nes_debug(NES_DBG_PHY, "1G phy%u data from register 1 = 0x%X\n",
+                                        nesadapter->phy_index[mac_index], phy_data);
+
+                        if (temp_phy_data & 0x1000) {
+                                nes_debug(NES_DBG_PHY, "The Link is up according to the PHY\n");
+                                phy_data = 4;
+                        } else {
+                                nes_debug(NES_DBG_PHY, "The Link is down according to the PHY\n");
+                        }
+                }
+                nes_debug(NES_DBG_PHY, "Eth SERDES Common Status: 0=0x%08X, 1=0x%08X\n",
+                                nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0),
+                                nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0+0x200));
+                pcs_control_status = nes_read_indexed(nesdev,
+                                NES_IDX_PHY_PCS_CONTROL_STATUS0 + ((mac_index&1)*0x200));
+                pcs_control_status = nes_read_indexed(nesdev,
+                                NES_IDX_PHY_PCS_CONTROL_STATUS0 + ((mac_index&1)*0x200));
+                nes_debug(NES_DBG_PHY, "PCS PHY Control/Status%u: 0x%08X\n",
+                                mac_index, pcs_control_status);
+                if (nesadapter->OneG_Mode) {
+                        u32temp = 0x01010000;
+                        if (nesadapter->port_count > 2) {
+                                u32temp |= 0x02020000;
+                        }
+                        if ((pcs_control_status & u32temp)!= u32temp) {
+                                phy_data = 0;
+                                nes_debug(NES_DBG_PHY, "PCS says the link is down\n");
+                        }
+                } else if (nesadapter->phy_type[mac_index] == NES_PHY_TYPE_IRIS) {
+                        nes_read_10G_phy_reg(nesdev, 1, nesadapter->phy_index[mac_index]);
+                        temp_phy_data = (u16)nes_read_indexed(nesdev,
+                                                                NES_IDX_MAC_MDIO_CONTROL);
+                        u32temp = 20;
+                        do {
+                                nes_read_10G_phy_reg(nesdev, 1, nesadapter->phy_index[mac_index]);
+                                phy_data = (u16)nes_read_indexed(nesdev,
+                                                                NES_IDX_MAC_MDIO_CONTROL);
+                                if ((phy_data == temp_phy_data) || (!(--u32temp)))
+                                        break;
+                                temp_phy_data = phy_data;
+                        } while (1);
+                        nes_debug(NES_DBG_PHY, "%s: Phy data = 0x%04X, link was %s.\n",
+                                __FUNCTION__, phy_data, nesadapter->mac_link_down ? "DOWN" : "UP");
+
+                } else {
+                        phy_data = (0x0f0f0000 == (pcs_control_status & 0x0f1f0000)) ? 4 : 0;
+                }
+
+                if (phy_data & 0x0004) {
+                        nesadapter->mac_link_down[mac_index] = 0;
+                        list_for_each_entry(nesvnic, &nesadapter->nesvnic_list[mac_index], list) {
+                                nes_debug(NES_DBG_PHY, "The Link is UP!!.  linkup was %d\n",
+                                                nesvnic->linkup);
+                                if (nesvnic->linkup == 0) {
+                                        printk(PFX "The Link is now up for port %u, netdev %p.\n",
+                                                        mac_index, nesvnic->netdev);
+                                        if (netif_queue_stopped(nesvnic->netdev))
+                                                netif_start_queue(nesvnic->netdev);
+                                        nesvnic->linkup = 1;
+                                        netif_carrier_on(nesvnic->netdev);
+                                }
+                        }
+                } else {
+                        nesadapter->mac_link_down[mac_index] = 1;
+                        list_for_each_entry(nesvnic, &nesadapter->nesvnic_list[mac_index], list) {
+                                nes_debug(NES_DBG_PHY, "The Link is Down!!. linkup was %d\n",
+                                                nesvnic->linkup);
+                                if (nesvnic->linkup == 1) {
+                                        printk(PFX "The Link is now down for port %u, netdev %p.\n",
+                                                        mac_index, nesvnic->netdev);
+                                        if (!(netif_queue_stopped(nesvnic->netdev)))
+                                                netif_stop_queue(nesvnic->netdev);
+                                        nesvnic->linkup = 0;
+                                        netif_carrier_off(nesvnic->netdev);
+                                }
+                        }
+                }
+        }
+
+        nesadapter->mac_sw_state[mac_number] = NES_MAC_SW_IDLE;
+}
+
+
+
+void nes_nic_napi_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
+{
+        struct nes_vnic *nesvnic = container_of(cq, struct nes_vnic, nic_cq);
+
+        netif_rx_schedule(nesdev->netdev[nesvnic->netdev_index], &nesvnic->napi);
+}
+
+
+/* The MAX_RQES_TO_PROCESS defines how many max read requests to complete before
+* getting out of nic_ce_handler
+*/
+#define MAX_RQES_TO_PROCESS     384
+
+/**
+ * nes_nic_ce_handler
+ */
+void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
+{
+        u64 u64temp;
+        dma_addr_t bus_address;
+        struct nes_hw_nic *nesnic;
+        struct nes_vnic *nesvnic = container_of(cq, struct nes_vnic, nic_cq);
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_hw_nic_rq_wqe *nic_rqe;
+        struct nes_hw_nic_sq_wqe *nic_sqe;
+        struct sk_buff *skb;
+        struct sk_buff *rx_skb;
+        __le16 *wqe_fragment_length;
+        u32 head;
+        u32 cq_size;
+        u32 rx_pkt_size;
+        u32 cqe_count=0;
+        u32 cqe_errv;
+        u32 cqe_misc;
+        u16 wqe_fragment_index = 1;     /* first fragment (0) is used by copy buffer */
+        u16 vlan_tag;
+        u16 pkt_type;
+        u16 rqes_processed = 0;
+        u8 sq_cqes = 0;
+
+        head = cq->cq_head;
+        cq_size = cq->cq_size;
+        cq->cqes_pending = 1;
+        do {
+                if (le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_NIC_CQE_MISC_IDX]) &
+                                NES_NIC_CQE_VALID) {
+                        nesnic = &nesvnic->nic;
+                        cqe_misc = le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_NIC_CQE_MISC_IDX]);
+                        if (cqe_misc & NES_NIC_CQE_SQ) {
+                                sq_cqes++;
+                                wqe_fragment_index = 1;
+                                nic_sqe = &nesnic->sq_vbase[nesnic->sq_tail];
+                                skb = nesnic->tx_skb[nesnic->sq_tail];
+                                wqe_fragment_length = (__le16 *)&nic_sqe->wqe_words[NES_NIC_SQ_WQE_LENGTH_0_TAG_IDX];
+                                /* bump past the vlan tag */
+                                wqe_fragment_length++;
+                                if (le16_to_cpu(wqe_fragment_length[wqe_fragment_index]) != 0) {
+                                        u64temp = (u64) le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX+wqe_fragment_index*2]);
+                                        u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX+wqe_fragment_index*2]))<<32;
+                                        bus_address = (dma_addr_t)u64temp;
+                                        if (test_and_clear_bit(nesnic->sq_tail, nesnic->first_frag_overflow)) {
+                                                pci_unmap_single(nesdev->pcidev,
+                                                                bus_address,
+                                                                le16_to_cpu(wqe_fragment_length[wqe_fragment_index++]),
+                                                                PCI_DMA_TODEVICE);
+                                        }
+                                        for (; wqe_fragment_index < 5; wqe_fragment_index++) {
+                                                if (wqe_fragment_length[wqe_fragment_index]) {
+                                                        u64temp = le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX+wqe_fragment_index*2]);
+                                                        u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX+wqe_fragment_index*2]))<<32;
+                                                        bus_address = (dma_addr_t)u64temp;
+                                                        pci_unmap_page(nesdev->pcidev,
+                                                                        bus_address,
+                                                                        le16_to_cpu(wqe_fragment_length[wqe_fragment_index]),
+                                                                        PCI_DMA_TODEVICE);
+                                                } else
+                                                        break;
+                                        }
+                                        if (skb)
+                                                dev_kfree_skb_any(skb);
+                                }
+                                nesnic->sq_tail++;
+                                nesnic->sq_tail &= nesnic->sq_size-1;
+                                if (sq_cqes > 128) {
+                                        barrier();
+                                /* restart the queue if it had been stopped */
+                                if (netif_queue_stopped(nesvnic->netdev))
+                                        netif_wake_queue(nesvnic->netdev);
+                                        sq_cqes = 0;
+                                }
+                        } else {
+                                rqes_processed ++;
+
+                                cq->rx_cqes_completed++;
+                                cq->rx_pkts_indicated++;
+                                rx_pkt_size = cqe_misc & 0x0000ffff;
+                                nic_rqe = &nesnic->rq_vbase[nesnic->rq_tail];
+                                /* Get the skb */
+                                rx_skb = nesnic->rx_skb[nesnic->rq_tail];
+                                nic_rqe = &nesnic->rq_vbase[nesvnic->nic.rq_tail];
+                                bus_address = (dma_addr_t)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX]);
+                                bus_address += ((u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX])) << 32;
+                                pci_unmap_single(nesdev->pcidev, bus_address,
+                                                nesvnic->max_frame_size, PCI_DMA_FROMDEVICE);
+                                /* rx_skb->tail = rx_skb->data + rx_pkt_size; */
+                                /* rx_skb->len = rx_pkt_size; */
+                                rx_skb->len = 0;  /* TODO: see if this is necessary */
+                                skb_put(rx_skb, rx_pkt_size);
+                                rx_skb->protocol = eth_type_trans(rx_skb, nesvnic->netdev);
+                                nesnic->rq_tail++;
+                                nesnic->rq_tail &= nesnic->rq_size - 1;
+
+                                atomic_inc(&nesvnic->rx_skbs_needed);
+                                if (atomic_read(&nesvnic->rx_skbs_needed) > (nesvnic->nic.rq_size>>1)) {
+                                        nes_write32(nesdev->regs+NES_CQE_ALLOC,
+                                                        cq->cq_number | (cqe_count << 16));
+//                                      nesadapter->tune_timer.cq_count += cqe_count;
+                                        nesdev->currcq_count += cqe_count;
+                                        cqe_count = 0;
+                                        nes_replenish_nic_rq(nesvnic);
+                                }
+                                pkt_type = (u16)(le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_NIC_CQE_TAG_PKT_TYPE_IDX]));
+                                cqe_errv = (cqe_misc & NES_NIC_CQE_ERRV_MASK) >> NES_NIC_CQE_ERRV_SHIFT;
+                                rx_skb->ip_summed = CHECKSUM_NONE;
+
+                                if ((NES_PKT_TYPE_TCPV4_BITS == (pkt_type & NES_PKT_TYPE_TCPV4_MASK)) ||
+                                                (NES_PKT_TYPE_UDPV4_BITS == (pkt_type & NES_PKT_TYPE_UDPV4_MASK))) {
+                                        if ((cqe_errv &
+                                                        (NES_NIC_ERRV_BITS_IPV4_CSUM_ERR | NES_NIC_ERRV_BITS_TCPUDP_CSUM_ERR |
+                                                        NES_NIC_ERRV_BITS_IPH_ERR | NES_NIC_ERRV_BITS_WQE_OVERRUN)) == 0) {
+                                                if (nesvnic->rx_checksum_disabled == 0) {
+                                                        rx_skb->ip_summed = CHECKSUM_UNNECESSARY;
+                                                }
+                                        } else
+                                                nes_debug(NES_DBG_CQ, "%s: unsuccessfully checksummed TCP or UDP packet."
+                                                                " errv = 0x%X, pkt_type = 0x%X.\n",
+                                                                nesvnic->netdev->name, cqe_errv, pkt_type);
+
+                                } else if ((pkt_type & NES_PKT_TYPE_IPV4_MASK) == NES_PKT_TYPE_IPV4_BITS) {
+                                        if ((cqe_errv &
+                                                        (NES_NIC_ERRV_BITS_IPV4_CSUM_ERR | NES_NIC_ERRV_BITS_IPH_ERR |
+                                                        NES_NIC_ERRV_BITS_WQE_OVERRUN)) == 0) {
+                                                if (nesvnic->rx_checksum_disabled == 0) {
+                                                        rx_skb->ip_summed = CHECKSUM_UNNECESSARY;
+                                                        /* nes_debug(NES_DBG_CQ, "%s: Reporting successfully checksummed IPv4 packet.\n",
+                                                                  nesvnic->netdev->name); */
+                                                }
+                                        } else
+                                                nes_debug(NES_DBG_CQ, "%s: unsuccessfully checksummed TCP or UDP packet."
+                                                                " errv = 0x%X, pkt_type = 0x%X.\n",
+                                                                nesvnic->netdev->name, cqe_errv, pkt_type);
+                                        }
+                                /* nes_debug(NES_DBG_CQ, "pkt_type=%x, APBVT_MASK=%x\n",
+                                                        pkt_type, (pkt_type & NES_PKT_TYPE_APBVT_MASK)); */
+
+                                if ((pkt_type & NES_PKT_TYPE_APBVT_MASK) == NES_PKT_TYPE_APBVT_BITS) {
+                                        nes_cm_recv(rx_skb, nesvnic->netdev);
+                                } else {
+                                        if ((cqe_misc & NES_NIC_CQE_TAG_VALID) && (nesvnic->vlan_grp != NULL)) {
+                                                vlan_tag = (u16)(le32_to_cpu(
+                                                                cq->cq_vbase[head].cqe_words[NES_NIC_CQE_TAG_PKT_TYPE_IDX])
+                                                                >> 16);
+                                                nes_debug(NES_DBG_CQ, "%s: Reporting stripped VLAN packet. Tag = 0x%04X\n",
+                                                                nesvnic->netdev->name, vlan_tag);
+                                                nes_vlan_rx(rx_skb, nesvnic->vlan_grp, vlan_tag);
+                                        } else {
+                                                nes_netif_rx(rx_skb);
+                                        }
+                                }
+
+                                nesvnic->netdev->last_rx = jiffies;
+                                /* nesvnic->netstats.rx_packets++; */
+                                /* nesvnic->netstats.rx_bytes += rx_pkt_size; */
+                        }
+
+                        cq->cq_vbase[head].cqe_words[NES_NIC_CQE_MISC_IDX] = 0;
+                        /* Accounting... */
+                        cqe_count++;
+                        if (++head >= cq_size)
+                                head = 0;
+                        if (cqe_count == 255) {
+                                /* Replenish Nic CQ */
+                                nes_write32(nesdev->regs+NES_CQE_ALLOC,
+                                                cq->cq_number | (cqe_count << 16));
+//                              nesdev->nesadapter->tune_timer.cq_count += cqe_count;
+                                nesdev->currcq_count += cqe_count;
+                                cqe_count = 0;
+                        }
+
+                        if (cq->rx_cqes_completed >= nesvnic->budget)
+                                break;
+                } else {
+                        cq->cqes_pending = 0;
+                        break;
+                }
+
+        } while (1);
+
+        if (sq_cqes) {
+                barrier();
+                /* restart the queue if it had been stopped */
+                if (netif_queue_stopped(nesvnic->netdev))
+                        netif_wake_queue(nesvnic->netdev);
+        }
+
+        cq->cq_head = head;
+        /* nes_debug(NES_DBG_CQ, "CQ%u Processed = %u cqes, new head = %u.\n",
+                        cq->cq_number, cqe_count, cq->cq_head); */
+        cq->cqe_allocs_pending = cqe_count;
+        if (unlikely(nesadapter->et_use_adaptive_rx_coalesce))
+        {
+//              nesdev->nesadapter->tune_timer.cq_count += cqe_count;
+                nesdev->currcq_count += cqe_count;
+                nes_nic_tune_timer(nesdev);
+        }
+        if (atomic_read(&nesvnic->rx_skbs_needed))
+                nes_replenish_nic_rq(nesvnic);
+        }
+
+
+/**
+ * nes_cqp_ce_handler
+ */
+void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
+{
+        u64 u64temp;
+        unsigned long flags;
+        struct nes_hw_cqp *cqp = NULL;
+        struct nes_cqp_request *cqp_request;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        u32 head;
+        u32 cq_size;
+        u32 cqe_count=0;
+        u32 error_code;
+        /* u32 counter; */
+
+        head = cq->cq_head;
+        cq_size = cq->cq_size;
+
+        do {
+                /* process the CQE */
+                /* nes_debug(NES_DBG_CQP, "head=%u cqe_words=%08X\n", head,
+                          le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX])); */
+
+                if (le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_VALID) {
+                        u64temp = (((u64)(le32_to_cpu(cq->cq_vbase[head].
+                                        cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX])))<<32) |
+                                        ((u64)(le32_to_cpu(cq->cq_vbase[head].
+                                        cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX])));
+                        cqp = *((struct nes_hw_cqp **)&u64temp);
+
+                        error_code = le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_ERROR_CODE_IDX]);
+                        if (error_code) {
+                                nes_debug(NES_DBG_CQP, "Bad Completion code for opcode 0x%02X from CQP,"
+                                                " Major/Minor codes = 0x%04X:%04X.\n",
+                                                le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX])&0x3f,
+                                                (u16)(error_code >> 16),
+                                                (u16)error_code);
+                                nes_debug(NES_DBG_CQP, "cqp: qp_id=%u, sq_head=%u, sq_tail=%u\n",
+                                                cqp->qp_id, cqp->sq_head, cqp->sq_tail);
+                        }
+
+                        u64temp = (((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail].
+                                        wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX])))<<32) |
+                                        ((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail].
+                                        wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX])));
+                        cqp_request = *((struct nes_cqp_request **)&u64temp);
+                        if (cqp_request) {
+                                if (cqp_request->waiting) {
+                                        /* nes_debug(NES_DBG_CQP, "%s: Waking up requestor\n"); */
+                                        cqp_request->major_code = (u16)(error_code >> 16);
+                                        cqp_request->minor_code = (u16)error_code;
+                                        barrier();
+                                        cqp_request->request_done = 1;
+                                        wake_up(&cqp_request->waitq);
+                                        if (atomic_dec_and_test(&cqp_request->refcount)) {
+                                                nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n",
+                                                                cqp_request,
+                                                                le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f);
+                                                if (cqp_request->dynamic) {
+                                                        kfree(cqp_request);
+                                                } else {
+                                                        spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                                        list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                                        spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                                                }
+                                        }
+                                } else if (cqp_request->callback) {
+                                        /* Envoke the callback routine */
+                                        cqp_request->cqp_callback(nesdev, cqp_request);
+                                        if (cqp_request->dynamic) {
+                                                kfree(cqp_request);
+                                        } else {
+                                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                                        }
+                                } else {
+                                        nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n",
+                                                        cqp_request,
+                                                        le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f);
+                                        if (cqp_request->dynamic) {
+                                                kfree(cqp_request);
+                                        } else {
+                                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                                        }
+                                }
+                        } else {
+                                wake_up(&nesdev->cqp.waitq);
+                        }
+
+                        cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX] = 0;
+                        nes_write32(nesdev->regs+NES_CQE_ALLOC, cq->cq_number | (1 << 16));
+                        if (++cqp->sq_tail >= cqp->sq_size)
+                                cqp->sq_tail = 0;
+
+                        /* Accounting... */
+                        cqe_count++;
+                        if (++head >= cq_size)
+                                head = 0;
+                } else {
+                        break;
+                }
+        } while (1);
+        cq->cq_head = head;
+
+        spin_lock_irqsave(&nesdev->cqp.lock, flags);
+        while ((!list_empty(&nesdev->cqp_pending_reqs)) &&
+                        ((((nesdev->cqp.sq_tail+nesdev->cqp.sq_size)-nesdev->cqp.sq_head) &
+                        (nesdev->cqp.sq_size - 1)) != 1)) {
+                cqp_request = list_entry(nesdev->cqp_pending_reqs.next,
+                                struct nes_cqp_request, list);
+                list_del_init(&cqp_request->list);
+                head = nesdev->cqp.sq_head++;
+                nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1;
+                cqp_wqe = &nesdev->cqp.sq_vbase[head];
+                memcpy(cqp_wqe, &cqp_request->cqp_wqe, sizeof(*cqp_wqe));
+                barrier();
+                cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX] =
+                        cpu_to_le32((u32)((unsigned long)cqp_request));
+                cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX] =
+                        cpu_to_le32((u32)(upper_32_bits((unsigned long)cqp_request)));
+                nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) put on CQPs SQ wqe%u.\n",
+                                cqp_request, le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f, head);
+                /* Ring doorbell (1 WQEs) */
+                barrier();
+                nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x01800000 | nesdev->cqp.qp_id);
+        }
+        spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+
+        /* Arm the CCQ */
+        nes_write32(nesdev->regs+NES_CQE_ALLOC, NES_CQE_ALLOC_NOTIFY_NEXT |
+                        cq->cq_number);
+        nes_read32(nesdev->regs+NES_CQE_ALLOC);
+}
+
+
+/**
+ * nes_process_iwarp_aeqe
+ */
+void nes_process_iwarp_aeqe(struct nes_device *nesdev, struct nes_hw_aeqe *aeqe)
+{
+        u64 context;
+        u64 aeqe_context = 0;
+        unsigned long flags;
+        struct nes_qp *nesqp;
+        int resource_allocated;
+        /* struct iw_cm_id *cm_id; */
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct ib_event ibevent;
+        /* struct iw_cm_event cm_event; */
+        u32 aeq_info;
+        u32 next_iwarp_state = 0;
+        u16 async_event_id;
+        u8 tcp_state;
+        u8 iwarp_state;
+
+        nes_debug(NES_DBG_AEQ, "\n");
+        aeq_info = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_MISC_IDX]);
+        if ((NES_AEQE_INBOUND_RDMA&aeq_info) || (!(NES_AEQE_QP&aeq_info))) {
+                context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]);
+                context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32;
+        } else {
+                aeqe_context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]);
+                aeqe_context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32;
+                context = (unsigned long)nesadapter->qp_table[le32_to_cpu(
+                                                aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX])-NES_FIRST_QPN];
+                BUG_ON(!context);
+        }
+
+        async_event_id = (u16)aeq_info;
+        tcp_state = (aeq_info & NES_AEQE_TCP_STATE_MASK) >> NES_AEQE_TCP_STATE_SHIFT;
+        iwarp_state = (aeq_info & NES_AEQE_IWARP_STATE_MASK) >> NES_AEQE_IWARP_STATE_SHIFT;
+        nes_debug(NES_DBG_AEQ, "aeid = 0x%04X, qp-cq id = %d, aeqe = %p,"
+                        " Tcp state = %s, iWARP state = %s\n",
+                        async_event_id,
+                        le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]), aeqe,
+                        nes_tcp_state_str[tcp_state], nes_iwarp_state_str[iwarp_state]);
+
+
+        switch (async_event_id) {
+                case NES_AEQE_AEID_LLP_FIN_RECEIVED:
+                        nesqp = *((struct nes_qp **)&context);
+                        if (atomic_inc_return(&nesqp->close_timer_started) == 1) {
+                                nesqp->cm_id->add_ref(nesqp->cm_id);
+                                nes_add_ref(&nesqp->ibqp);
+                                schedule_nes_timer(nesqp->cm_node, (struct sk_buff *)nesqp,
+                                                NES_TIMER_TYPE_CLOSE, 1, 0);
+                                nes_debug(NES_DBG_AEQ, "QP%u Not decrementing QP refcount (%d),"
+                                                " need ae to finish up, original_last_aeq = 0x%04X."
+                                                " last_aeq = 0x%04X, scheduling timer. TCP state = %d\n",
+                                                nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
+                                                async_event_id, nesqp->last_aeq, tcp_state);
+                        }
+                        if ((tcp_state != NES_AEQE_TCP_STATE_CLOSE_WAIT) ||
+                                        (nesqp->ibqp_state != IB_QPS_RTS)) {
+                                /* FIN Received but tcp state or IB state moved on,
+                                                should expect a close complete */
+                                return;
+                        }
+                case NES_AEQE_AEID_LLP_CLOSE_COMPLETE:
+                case NES_AEQE_AEID_LLP_CONNECTION_RESET:
+                case NES_AEQE_AEID_TERMINATE_SENT:
+                case NES_AEQE_AEID_RDMAP_ROE_BAD_LLP_CLOSE:
+                case NES_AEQE_AEID_RESET_SENT:
+                        nesqp = *((struct nes_qp **)&context);
+                        if (async_event_id == NES_AEQE_AEID_RESET_SENT) {
+                                tcp_state = NES_AEQE_TCP_STATE_CLOSED;
+                        }
+                        nes_add_ref(&nesqp->ibqp);
+                        spin_lock_irqsave(&nesqp->lock, flags);
+                        nesqp->hw_iwarp_state = iwarp_state;
+                        nesqp->hw_tcp_state = tcp_state;
+                        nesqp->last_aeq = async_event_id;
+
+                        if ((tcp_state == NES_AEQE_TCP_STATE_CLOSED) ||
+                                        (tcp_state == NES_AEQE_TCP_STATE_TIME_WAIT)) {
+                                nesqp->hte_added = 0;
+                                spin_unlock_irqrestore(&nesqp->lock, flags);
+                                nes_debug(NES_DBG_AEQ, "issuing hw modifyqp for QP%u to remove hte\n",
+                                                nesqp->hwqp.qp_id);
+                                nes_hw_modify_qp(nesdev, nesqp,
+                                                NES_CQP_QP_IWARP_STATE_ERROR | NES_CQP_QP_DEL_HTE, 0);
+                                spin_lock_irqsave(&nesqp->lock, flags);
+                        }
+
+                        if ((nesqp->ibqp_state == IB_QPS_RTS) &&
+                                        ((tcp_state == NES_AEQE_TCP_STATE_CLOSE_WAIT) ||
+                                        (async_event_id == NES_AEQE_AEID_LLP_CONNECTION_RESET))) {
+                                switch (nesqp->hw_iwarp_state) {
+                                        case NES_AEQE_IWARP_STATE_RTS:
+                                                next_iwarp_state = NES_CQP_QP_IWARP_STATE_CLOSING;
+                                                nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_CLOSING;
+                                                break;
+                                        case NES_AEQE_IWARP_STATE_TERMINATE:
+                                                next_iwarp_state = NES_CQP_QP_IWARP_STATE_TERMINATE;
+                                                nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_TERMINATE;
+                                                if (async_event_id == NES_AEQE_AEID_RDMAP_ROE_BAD_LLP_CLOSE) {
+                                                        next_iwarp_state |= 0x02000000;
+                                                        nesqp->hw_tcp_state = NES_AEQE_TCP_STATE_CLOSED;
+                                                }
+                                                break;
+                                        default:
+                                                next_iwarp_state = 0;
+                                }
+                                spin_unlock_irqrestore(&nesqp->lock, flags);
+                                if (next_iwarp_state) {
+                                        nes_add_ref(&nesqp->ibqp);
+                                        nes_debug(NES_DBG_AEQ, "issuing hw modifyqp for QP%u. next state = 0x%08X,"
+                                                        " also added another reference\n",
+                                                        nesqp->hwqp.qp_id, next_iwarp_state);
+                                        nes_hw_modify_qp(nesdev, nesqp, next_iwarp_state, 0);
+                                }
+                                nes_cm_disconn(nesqp);
+                        } else {
+                                if (async_event_id ==  NES_AEQE_AEID_LLP_FIN_RECEIVED) {
+                                        /* FIN Received but ib state not RTS,
+                                                        close complete will be on its way */
+                                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                                        nes_rem_ref(&nesqp->ibqp);
+                                        return;
+                                }
+                                spin_unlock_irqrestore(&nesqp->lock, flags);
+                                if (async_event_id == NES_AEQE_AEID_RDMAP_ROE_BAD_LLP_CLOSE) {
+                                        next_iwarp_state = NES_CQP_QP_IWARP_STATE_TERMINATE | 0x02000000;
+                                        nesqp->hw_tcp_state = NES_AEQE_TCP_STATE_CLOSED;
+                                        nes_debug(NES_DBG_AEQ, "issuing hw modifyqp for QP%u. next state = 0x%08X,"
+                                                        " also added another reference\n",
+                                                        nesqp->hwqp.qp_id, next_iwarp_state);
+                                        nes_hw_modify_qp(nesdev, nesqp, next_iwarp_state, 0);
+                                }
+                                nes_cm_disconn(nesqp);
+                        }
+                        break;
+                case NES_AEQE_AEID_LLP_TERMINATE_RECEIVED:
+                        nesqp = *((struct nes_qp **)&context);
+                        spin_lock_irqsave(&nesqp->lock, flags);
+                        nesqp->hw_iwarp_state = iwarp_state;
+                        nesqp->hw_tcp_state = tcp_state;
+                        nesqp->last_aeq = async_event_id;
+                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                        nes_debug(NES_DBG_AEQ, "Processing an NES_AEQE_AEID_LLP_TERMINATE_RECEIVED"
+                                        " event on QP%u \n  Q2 Data:\n",
+                                        nesqp->hwqp.qp_id);
+                        if (nesqp->ibqp.event_handler) {
+                                ibevent.device = nesqp->ibqp.device;
+                                ibevent.element.qp = &nesqp->ibqp;
+                                ibevent.event = IB_EVENT_QP_FATAL;
+                                nesqp->ibqp.event_handler(&ibevent, nesqp->ibqp.qp_context);
+                        }
+                        if ((tcp_state == NES_AEQE_TCP_STATE_CLOSE_WAIT) ||
+                                        ((nesqp->ibqp_state == IB_QPS_RTS)&&
+                                        (async_event_id == NES_AEQE_AEID_LLP_CONNECTION_RESET))) {
+                                nes_add_ref(&nesqp->ibqp);
+                                nes_cm_disconn(nesqp);
+                        } else {
+                                nesqp->in_disconnect = 0;
+                                wake_up(&nesqp->kick_waitq);
+                        }
+                        break;
+                case NES_AEQE_AEID_LLP_TOO_MANY_RETRIES:
+                        nesqp = *((struct nes_qp **)&context);
+                        nes_add_ref(&nesqp->ibqp);
+                        spin_lock_irqsave(&nesqp->lock, flags);
+                        nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_ERROR;
+                        nesqp->hw_tcp_state = NES_AEQE_TCP_STATE_CLOSED;
+                        nesqp->last_aeq = async_event_id;
+                        if (nesqp->cm_id) {
+                                nes_debug(NES_DBG_AEQ, "Processing an NES_AEQE_AEID_LLP_TOO_MANY_RETRIES"
+                                                " event on QP%u, remote IP = 0x%08X \n",
+                                                nesqp->hwqp.qp_id,
+                                                ntohl(nesqp->cm_id->remote_addr.sin_addr.s_addr));
+                        } else {
+                                nes_debug(NES_DBG_AEQ, "Processing an NES_AEQE_AEID_LLP_TOO_MANY_RETRIES"
+                                                " event on QP%u \n",
+                                                nesqp->hwqp.qp_id);
+                        }
+                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                        next_iwarp_state = NES_CQP_QP_IWARP_STATE_ERROR | NES_CQP_QP_RESET;
+                        nes_hw_modify_qp(nesdev, nesqp, next_iwarp_state, 0);
+                        if (nesqp->ibqp.event_handler) {
+                                ibevent.device = nesqp->ibqp.device;
+                                ibevent.element.qp = &nesqp->ibqp;
+                                ibevent.event = IB_EVENT_QP_FATAL;
+                                nesqp->ibqp.event_handler(&ibevent, nesqp->ibqp.qp_context);
+                        }
+                        break;
+                case NES_AEQE_AEID_AMP_BAD_STAG_INDEX:
+                        if (NES_AEQE_INBOUND_RDMA&aeq_info) {
+                                nesqp = nesadapter->qp_table[le32_to_cpu(
+                                                aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX])-NES_FIRST_QPN];
+                        } else {
+                                /* TODO: get the actual WQE and mask off wqe index */
+                                context &= ~((u64)511);
+                                nesqp = *((struct nes_qp **)&context);
+                        }
+                        spin_lock_irqsave(&nesqp->lock, flags);
+                        nesqp->hw_iwarp_state = iwarp_state;
+                        nesqp->hw_tcp_state = tcp_state;
+                        nesqp->last_aeq = async_event_id;
+                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                        nes_debug(NES_DBG_AEQ, "Processing an NES_AEQE_AEID_AMP_BAD_STAG_INDEX event on QP%u\n",
+                                        nesqp->hwqp.qp_id);
+                        if (nesqp->ibqp.event_handler) {
+                                ibevent.device = nesqp->ibqp.device;
+                                ibevent.element.qp = &nesqp->ibqp;
+                                ibevent.event = IB_EVENT_QP_ACCESS_ERR;
+                                nesqp->ibqp.event_handler(&ibevent, nesqp->ibqp.qp_context);
+                        }
+                        break;
+                case NES_AEQE_AEID_AMP_UNALLOCATED_STAG:
+                        nesqp = *((struct nes_qp **)&context);
+                        spin_lock_irqsave(&nesqp->lock, flags);
+                        nesqp->hw_iwarp_state = iwarp_state;
+                        nesqp->hw_tcp_state = tcp_state;
+                        nesqp->last_aeq = async_event_id;
+                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                        nes_debug(NES_DBG_AEQ, "Processing an NES_AEQE_AEID_AMP_UNALLOCATED_STAG event on QP%u\n",
+                                        nesqp->hwqp.qp_id);
+                        if (nesqp->ibqp.event_handler) {
+                                ibevent.device = nesqp->ibqp.device;
+                                ibevent.element.qp = &nesqp->ibqp;
+                                ibevent.event = IB_EVENT_QP_ACCESS_ERR;
+                                nesqp->ibqp.event_handler(&ibevent, nesqp->ibqp.qp_context);
+                        }
+                        break;
+                case NES_AEQE_AEID_PRIV_OPERATION_DENIED:
+                        nesqp = nesadapter->qp_table[le32_to_cpu(aeqe->aeqe_words
+                                        [NES_AEQE_COMP_QP_CQ_ID_IDX])-NES_FIRST_QPN];
+                        spin_lock_irqsave(&nesqp->lock, flags);
+                        nesqp->hw_iwarp_state = iwarp_state;
+                        nesqp->hw_tcp_state = tcp_state;
+                        nesqp->last_aeq = async_event_id;
+                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                        nes_debug(NES_DBG_AEQ, "Processing an NES_AEQE_AEID_PRIV_OPERATION_DENIED event on QP%u,"
+                                        " nesqp = %p, AE reported %p\n",
+                                        nesqp->hwqp.qp_id, nesqp, *((struct nes_qp **)&context));
+                        if (nesqp->ibqp.event_handler) {
+                                ibevent.device = nesqp->ibqp.device;
+                                ibevent.element.qp = &nesqp->ibqp;
+                                ibevent.event = IB_EVENT_QP_ACCESS_ERR;
+                                nesqp->ibqp.event_handler(&ibevent, nesqp->ibqp.qp_context);
+                        }
+                        break;
+                case NES_AEQE_AEID_CQ_OPERATION_ERROR:
+                        context <<= 1;
+                        nes_debug(NES_DBG_AEQ, "Processing an NES_AEQE_AEID_CQ_OPERATION_ERROR event on CQ%u, %p\n",
+                                        le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]), (void *)(unsigned long)context);
+                        resource_allocated = nes_is_resource_allocated(nesadapter, nesadapter->allocated_cqs,
+                                        le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]));
+                        if (resource_allocated) {
+                                printk(KERN_ERR PFX "%s: Processing an NES_AEQE_AEID_CQ_OPERATION_ERROR event on CQ%u\n",
+                                                __FUNCTION__, le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]));
+                        }
+                        break;
+                case NES_AEQE_AEID_DDP_UBE_DDP_MESSAGE_TOO_LONG_FOR_AVAILABLE_BUFFER:
+                        nesqp = nesadapter->qp_table[le32_to_cpu(
+                                        aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX])-NES_FIRST_QPN];
+                        spin_lock_irqsave(&nesqp->lock, flags);
+                        nesqp->hw_iwarp_state = iwarp_state;
+                        nesqp->hw_tcp_state = tcp_state;
+                        nesqp->last_aeq = async_event_id;
+                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                        nes_debug(NES_DBG_AEQ, "Processing an NES_AEQE_AEID_DDP_UBE_DDP_MESSAGE_TOO_LONG"
+                                        "_FOR_AVAILABLE_BUFFER event on QP%u\n",
+                                        nesqp->hwqp.qp_id);
+                        if (nesqp->ibqp.event_handler) {
+                                ibevent.device = nesqp->ibqp.device;
+                                ibevent.element.qp = &nesqp->ibqp;
+                                ibevent.event = IB_EVENT_QP_ACCESS_ERR;
+                                nesqp->ibqp.event_handler(&ibevent, nesqp->ibqp.qp_context);
+                        }
+                        /* tell cm to disconnect, cm will queue work to thread */
+                        nes_add_ref(&nesqp->ibqp);
+                        nes_cm_disconn(nesqp);
+                        break;
+                case NES_AEQE_AEID_DDP_UBE_INVALID_MSN_NO_BUFFER_AVAILABLE:
+                        nesqp = *((struct nes_qp **)&context);
+                        spin_lock_irqsave(&nesqp->lock, flags);
+                        nesqp->hw_iwarp_state = iwarp_state;
+                        nesqp->hw_tcp_state = tcp_state;
+                        nesqp->last_aeq = async_event_id;
+                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                        nes_debug(NES_DBG_AEQ, "Processing an NES_AEQE_AEID_DDP_UBE_INVALID_MSN"
+                                        "_NO_BUFFER_AVAILABLE event on QP%u\n",
+                                        nesqp->hwqp.qp_id);
+                        if (nesqp->ibqp.event_handler) {
+                                ibevent.device = nesqp->ibqp.device;
+                                ibevent.element.qp = &nesqp->ibqp;
+                                ibevent.event = IB_EVENT_QP_FATAL;
+                                nesqp->ibqp.event_handler(&ibevent, nesqp->ibqp.qp_context);
+                        }
+                        /* tell cm to disconnect, cm will queue work to thread */
+                        nes_add_ref(&nesqp->ibqp);
+                        nes_cm_disconn(nesqp);
+                        break;
+                case NES_AEQE_AEID_LLP_RECEIVED_MPA_CRC_ERROR:
+                        nesqp = *((struct nes_qp **)&context);
+                        spin_lock_irqsave(&nesqp->lock, flags);
+                        nesqp->hw_iwarp_state = iwarp_state;
+                        nesqp->hw_tcp_state = tcp_state;
+                        nesqp->last_aeq = async_event_id;
+                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                        nes_debug(NES_DBG_AEQ, "Processing an NES_AEQE_AEID_LLP_RECEIVED_MPA_CRC_ERROR"
+                                        " event on QP%u \n  Q2 Data:\n",
+                                        nesqp->hwqp.qp_id);
+                        if (nesqp->ibqp.event_handler) {
+                                ibevent.device = nesqp->ibqp.device;
+                                ibevent.element.qp = &nesqp->ibqp;
+                                ibevent.event = IB_EVENT_QP_FATAL;
+                                nesqp->ibqp.event_handler(&ibevent, nesqp->ibqp.qp_context);
+                        }
+                        /* tell cm to disconnect, cm will queue work to thread */
+                        nes_add_ref(&nesqp->ibqp);
+                        nes_cm_disconn(nesqp);
+                        break;
+                        /* TODO: additional AEs need to be here */
+                default:
+                        nes_debug(NES_DBG_AEQ, "Processing an iWARP related AE for QP, misc = 0x%04X\n",
+                                        async_event_id);
+                        break;
+        }
+
+}
+
+
+/**
+ * nes_iwarp_ce_handler
+ */
+void nes_iwarp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *hw_cq)
+{
+        struct nes_cq *nescq = container_of(hw_cq, struct nes_cq, hw_cq);
+
+        /* nes_debug(NES_DBG_CQ, "Processing completion event for iWARP CQ%u.\n",
+                        nescq->hw_cq.cq_number); */
+        nes_write32(nesdev->regs+NES_CQ_ACK, nescq->hw_cq.cq_number);
+
+        if (nescq->ibcq.comp_handler)
+                nescq->ibcq.comp_handler(&nescq->ibcq, nescq->ibcq.cq_context);
+
+        return;
+}
+
+
+/**
+ * nes_manage_apbvt()
+ */
+int nes_manage_apbvt(struct nes_vnic *nesvnic, u32 accel_local_port,
+                u32 nic_index, u32 add_port)
+{
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        unsigned long flags;
+        struct nes_cqp_request *cqp_request;
+        int ret = 0;
+        u16 major_code;
+
+        /* Send manage APBVT request to CQP */
+        cqp_request = nes_get_cqp_request(nesdev);
+        if (cqp_request == NULL) {
+                nes_debug(NES_DBG_QP, "Failed to get a cqp_request.\n");
+                return -ENOMEM;
+        }
+        cqp_request->waiting = 1;
+        cqp_wqe = &cqp_request->cqp_wqe;
+
+        nes_debug(NES_DBG_QP, "%s APBV for local port=%u(0x%04x), nic_index=%u\n",
+                        (add_port == NES_MANAGE_APBVT_ADD) ? "ADD" : "DEL",
+                        accel_local_port, accel_local_port, nic_index);
+
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, (NES_CQP_MANAGE_APBVT |
+                        ((add_port == NES_MANAGE_APBVT_ADD) ? NES_CQP_APBVT_ADD : 0)));
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX,
+                        ((nic_index << NES_CQP_APBVT_NIC_SHIFT) | accel_local_port));
+
+        nes_debug(NES_DBG_QP, "Waiting for CQP completion for APBVT.\n");
+
+        atomic_set(&cqp_request->refcount, 2);
+        nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+
+        if (add_port == NES_MANAGE_APBVT_ADD)
+                ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
+                                NES_EVENT_TIMEOUT);
+        nes_debug(NES_DBG_QP, "Completed, ret=%u,  CQP Major:Minor codes = 0x%04X:0x%04X\n",
+                        ret, cqp_request->major_code, cqp_request->minor_code);
+        major_code = cqp_request->major_code;
+        if (atomic_dec_and_test(&cqp_request->refcount)) {
+                if (cqp_request->dynamic) {
+                        kfree(cqp_request);
+                } else {
+                        spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                        list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                        spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                }
+        }
+        if (!ret)
+                return -ETIME;
+        else if (major_code)
+                return -EIO;
+        else
+                return 0;
+}
+
+
+/**
+ * nes_manage_arp_cache
+ */
+void nes_manage_arp_cache(struct net_device *netdev, unsigned char *mac_addr,
+                u32 ip_addr, u32 action)
+{
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev;
+        struct nes_cqp_request *cqp_request;
+        int arp_index;
+
+        nesdev = nesvnic->nesdev;
+        arp_index = nes_arp_table(nesdev, ip_addr, mac_addr, action);
+        if (arp_index == -1) {
+                return;
+        }
+
+        /* update the ARP entry */
+        cqp_request = nes_get_cqp_request(nesdev);
+        if (cqp_request == NULL) {
+                nes_debug(NES_DBG_NETDEV, "Failed to get a cqp_request.\n");
+                return;
+        }
+        cqp_request->waiting = 0;
+        cqp_wqe = &cqp_request->cqp_wqe;
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+
+        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(
+                        NES_CQP_MANAGE_ARP_CACHE | NES_CQP_ARP_PERM);
+        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(
+                        (u32)PCI_FUNC(nesdev->pcidev->devfn) << NES_CQP_ARP_AEQ_INDEX_SHIFT);
+        cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX] = cpu_to_le32(arp_index);
+
+        if (action == NES_ARP_ADD) {
+                cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_ARP_VALID);
+                cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_ADDR_LOW_IDX] = cpu_to_le32(
+                                (((u32)mac_addr[2]) << 24) | (((u32)mac_addr[3]) << 16) |
+                                (((u32)mac_addr[4]) << 8) | (u32)mac_addr[5]);
+                cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_HIGH_IDX] = cpu_to_le32(
+                                (((u32)mac_addr[0]) << 16) | (u32)mac_addr[1]);
+        } else {
+                cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_ADDR_LOW_IDX] = 0;
+                cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_HIGH_IDX] = 0;
+        }
+
+        nes_debug(NES_DBG_NETDEV, "Not waiting for CQP, cqp.sq_head=%u, cqp.sq_tail=%u\n",
+                        nesdev->cqp.sq_head, nesdev->cqp.sq_tail);
+
+        atomic_set(&cqp_request->refcount, 1);
+        nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+}
+
+
+/**
+ * flush_wqes
+ */
+void flush_wqes(struct nes_device *nesdev, struct nes_qp *nesqp,
+                u32 which_wq, u32 wait_completion)
+{
+        unsigned long flags;
+        struct nes_cqp_request *cqp_request;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        int ret;
+
+        cqp_request = nes_get_cqp_request(nesdev);
+        if (cqp_request == NULL) {
+                nes_debug(NES_DBG_QP, "Failed to get a cqp_request.\n");
+                return;
+        }
+        if (wait_completion) {
+                cqp_request->waiting = 1;
+                atomic_set(&cqp_request->refcount, 2);
+        } else {
+                cqp_request->waiting = 0;
+        }
+        cqp_wqe = &cqp_request->cqp_wqe;
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+
+        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] =
+                        cpu_to_le32(NES_CQP_FLUSH_WQES | which_wq);
+        cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX] = cpu_to_le32(nesqp->hwqp.qp_id);
+
+        nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+
+        if (wait_completion) {
+                /* Wait for CQP */
+                ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
+                                NES_EVENT_TIMEOUT);
+                nes_debug(NES_DBG_QP, "Flush SQ QP WQEs completed, ret=%u,"
+                                " CQP Major:Minor codes = 0x%04X:0x%04X\n",
+                                ret, cqp_request->major_code, cqp_request->minor_code);
+                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                        if (cqp_request->dynamic) {
+                                kfree(cqp_request);
+                        } else {
+                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                        }
+                }
+        }
+}
diff --git a/drivers/infiniband/hw/nes/nes_hw.h b/drivers/infiniband/hw/nes/nes_hw.h
new file mode 100644
index 000000000000..1e10df550c9e
--- /dev/null
+++ b/drivers/infiniband/hw/nes/nes_hw.h
@@ -0,0 +1,1206 @@
+/*
+* Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
+*
+* This software is available to you under a choice of one of two
+* licenses.  You may choose to be licensed under the terms of the GNU
+* General Public License (GPL) Version 2, available from the file
+* COPYING in the main directory of this source tree, or the
+* OpenIB.org BSD license below:
+*
+*     Redistribution and use in source and binary forms, with or
+*     without modification, are permitted provided that the following
+*     conditions are met:
+*
+*      - Redistributions of source code must retain the above
+*        copyright notice, this list of conditions and the following
+*        disclaimer.
+*
+*      - Redistributions in binary form must reproduce the above
+*        copyright notice, this list of conditions and the following
+*        disclaimer in the documentation and/or other materials
+*        provided with the distribution.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*/
+
+#ifndef __NES_HW_H
+#define __NES_HW_H
+
+#define NES_PHY_TYPE_1G   2
+#define NES_PHY_TYPE_IRIS 3
+#define NES_PHY_TYPE_PUMA_10G  6
+
+#define NES_MULTICAST_PF_MAX 8
+
+enum pci_regs {
+        NES_INT_STAT = 0x0000,
+        NES_INT_MASK = 0x0004,
+        NES_INT_PENDING = 0x0008,
+        NES_INTF_INT_STAT = 0x000C,
+        NES_INTF_INT_MASK = 0x0010,
+        NES_TIMER_STAT = 0x0014,
+        NES_PERIODIC_CONTROL = 0x0018,
+        NES_ONE_SHOT_CONTROL = 0x001C,
+        NES_EEPROM_COMMAND = 0x0020,
+        NES_EEPROM_DATA = 0x0024,
+        NES_FLASH_COMMAND = 0x0028,
+        NES_FLASH_DATA  = 0x002C,
+        NES_SOFTWARE_RESET = 0x0030,
+        NES_CQ_ACK = 0x0034,
+        NES_WQE_ALLOC = 0x0040,
+        NES_CQE_ALLOC = 0x0044,
+};
+
+enum indexed_regs {
+        NES_IDX_CREATE_CQP_LOW = 0x0000,
+        NES_IDX_CREATE_CQP_HIGH = 0x0004,
+        NES_IDX_QP_CONTROL = 0x0040,
+        NES_IDX_FLM_CONTROL = 0x0080,
+        NES_IDX_INT_CPU_STATUS = 0x00a0,
+        NES_IDX_GPIO_CONTROL = 0x00f0,
+        NES_IDX_GPIO_DATA = 0x00f4,
+        NES_IDX_TCP_CONFIG0 = 0x01e4,
+        NES_IDX_TCP_TIMER_CONFIG = 0x01ec,
+        NES_IDX_TCP_NOW = 0x01f0,
+        NES_IDX_QP_MAX_CFG_SIZES = 0x0200,
+        NES_IDX_QP_CTX_SIZE = 0x0218,
+        NES_IDX_TCP_TIMER_SIZE0 = 0x0238,
+        NES_IDX_TCP_TIMER_SIZE1 = 0x0240,
+        NES_IDX_ARP_CACHE_SIZE = 0x0258,
+        NES_IDX_CQ_CTX_SIZE = 0x0260,
+        NES_IDX_MRT_SIZE = 0x0278,
+        NES_IDX_PBL_REGION_SIZE = 0x0280,
+        NES_IDX_IRRQ_COUNT = 0x02b0,
+        NES_IDX_RX_WINDOW_BUFFER_PAGE_TABLE_SIZE = 0x02f0,
+        NES_IDX_RX_WINDOW_BUFFER_SIZE = 0x0300,
+        NES_IDX_DST_IP_ADDR = 0x0400,
+        NES_IDX_PCIX_DIAG = 0x08e8,
+        NES_IDX_MPP_DEBUG = 0x0a00,
+        NES_IDX_PORT_RX_DISCARDS = 0x0a30,
+        NES_IDX_PORT_TX_DISCARDS = 0x0a34,
+        NES_IDX_MPP_LB_DEBUG = 0x0b00,
+        NES_IDX_DENALI_CTL_22 = 0x1058,
+        NES_IDX_MAC_TX_CONTROL = 0x2000,
+        NES_IDX_MAC_TX_CONFIG = 0x2004,
+        NES_IDX_MAC_TX_PAUSE_QUANTA = 0x2008,
+        NES_IDX_MAC_RX_CONTROL = 0x200c,
+        NES_IDX_MAC_RX_CONFIG = 0x2010,
+        NES_IDX_MAC_EXACT_MATCH_BOTTOM = 0x201c,
+        NES_IDX_MAC_MDIO_CONTROL = 0x2084,
+        NES_IDX_MAC_TX_OCTETS_LOW = 0x2100,
+        NES_IDX_MAC_TX_OCTETS_HIGH = 0x2104,
+        NES_IDX_MAC_TX_FRAMES_LOW = 0x2108,
+        NES_IDX_MAC_TX_FRAMES_HIGH = 0x210c,
+        NES_IDX_MAC_TX_PAUSE_FRAMES = 0x2118,
+        NES_IDX_MAC_TX_ERRORS = 0x2138,
+        NES_IDX_MAC_RX_OCTETS_LOW = 0x213c,
+        NES_IDX_MAC_RX_OCTETS_HIGH = 0x2140,
+        NES_IDX_MAC_RX_FRAMES_LOW = 0x2144,
+        NES_IDX_MAC_RX_FRAMES_HIGH = 0x2148,
+        NES_IDX_MAC_RX_BC_FRAMES_LOW = 0x214c,
+        NES_IDX_MAC_RX_MC_FRAMES_HIGH = 0x2150,
+        NES_IDX_MAC_RX_PAUSE_FRAMES = 0x2154,
+        NES_IDX_MAC_RX_SHORT_FRAMES = 0x2174,
+        NES_IDX_MAC_RX_OVERSIZED_FRAMES = 0x2178,
+        NES_IDX_MAC_RX_JABBER_FRAMES = 0x217c,
+        NES_IDX_MAC_RX_CRC_ERR_FRAMES = 0x2180,
+        NES_IDX_MAC_RX_LENGTH_ERR_FRAMES = 0x2184,
+        NES_IDX_MAC_RX_SYMBOL_ERR_FRAMES = 0x2188,
+        NES_IDX_MAC_INT_STATUS = 0x21f0,
+        NES_IDX_MAC_INT_MASK = 0x21f4,
+        NES_IDX_PHY_PCS_CONTROL_STATUS0 = 0x2800,
+        NES_IDX_PHY_PCS_CONTROL_STATUS1 = 0x2a00,
+        NES_IDX_ETH_SERDES_COMMON_CONTROL0 = 0x2808,
+        NES_IDX_ETH_SERDES_COMMON_CONTROL1 = 0x2a08,
+        NES_IDX_ETH_SERDES_COMMON_STATUS0 = 0x280c,
+        NES_IDX_ETH_SERDES_COMMON_STATUS1 = 0x2a0c,
+        NES_IDX_ETH_SERDES_TX_EMP0 = 0x2810,
+        NES_IDX_ETH_SERDES_TX_EMP1 = 0x2a10,
+        NES_IDX_ETH_SERDES_TX_DRIVE0 = 0x2814,
+        NES_IDX_ETH_SERDES_TX_DRIVE1 = 0x2a14,
+        NES_IDX_ETH_SERDES_RX_MODE0 = 0x2818,
+        NES_IDX_ETH_SERDES_RX_MODE1 = 0x2a18,
+        NES_IDX_ETH_SERDES_RX_SIGDET0 = 0x281c,
+        NES_IDX_ETH_SERDES_RX_SIGDET1 = 0x2a1c,
+        NES_IDX_ETH_SERDES_BYPASS0 = 0x2820,
+        NES_IDX_ETH_SERDES_BYPASS1 = 0x2a20,
+        NES_IDX_ETH_SERDES_LOOPBACK_CONTROL0 = 0x2824,
+        NES_IDX_ETH_SERDES_LOOPBACK_CONTROL1 = 0x2a24,
+        NES_IDX_ETH_SERDES_RX_EQ_CONTROL0 = 0x2828,
+        NES_IDX_ETH_SERDES_RX_EQ_CONTROL1 = 0x2a28,
+        NES_IDX_ETH_SERDES_RX_EQ_STATUS0 = 0x282c,
+        NES_IDX_ETH_SERDES_RX_EQ_STATUS1 = 0x2a2c,
+        NES_IDX_ETH_SERDES_CDR_RESET0 = 0x2830,
+        NES_IDX_ETH_SERDES_CDR_RESET1 = 0x2a30,
+        NES_IDX_ETH_SERDES_CDR_CONTROL0 = 0x2834,
+        NES_IDX_ETH_SERDES_CDR_CONTROL1 = 0x2a34,
+        NES_IDX_ETH_SERDES_TX_HIGHZ_LANE_MODE0 = 0x2838,
+        NES_IDX_ETH_SERDES_TX_HIGHZ_LANE_MODE1 = 0x2a38,
+        NES_IDX_ENDNODE0_NSTAT_RX_DISCARD = 0x3080,
+        NES_IDX_ENDNODE0_NSTAT_RX_OCTETS_LO = 0x3000,
+        NES_IDX_ENDNODE0_NSTAT_RX_OCTETS_HI = 0x3004,
+        NES_IDX_ENDNODE0_NSTAT_RX_FRAMES_LO = 0x3008,
+        NES_IDX_ENDNODE0_NSTAT_RX_FRAMES_HI = 0x300c,
+        NES_IDX_ENDNODE0_NSTAT_TX_OCTETS_LO = 0x7000,
+        NES_IDX_ENDNODE0_NSTAT_TX_OCTETS_HI = 0x7004,
+        NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_LO = 0x7008,
+        NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_HI = 0x700c,
+        NES_IDX_CM_CONFIG = 0x5100,
+        NES_IDX_NIC_LOGPORT_TO_PHYPORT = 0x6000,
+        NES_IDX_NIC_PHYPORT_TO_USW = 0x6008,
+        NES_IDX_NIC_ACTIVE = 0x6010,
+        NES_IDX_NIC_UNICAST_ALL = 0x6018,
+        NES_IDX_NIC_MULTICAST_ALL = 0x6020,
+        NES_IDX_NIC_MULTICAST_ENABLE = 0x6028,
+        NES_IDX_NIC_BROADCAST_ON = 0x6030,
+        NES_IDX_USED_CHUNKS_TX = 0x60b0,
+        NES_IDX_TX_POOL_SIZE = 0x60b8,
+        NES_IDX_QUAD_HASH_TABLE_SIZE = 0x6148,
+        NES_IDX_PERFECT_FILTER_LOW = 0x6200,
+        NES_IDX_PERFECT_FILTER_HIGH = 0x6204,
+        NES_IDX_IPV4_TCP_REXMITS = 0x7080,
+        NES_IDX_DEBUG_ERROR_CONTROL_STATUS = 0x913c,
+        NES_IDX_DEBUG_ERROR_MASKS0 = 0x9140,
+        NES_IDX_DEBUG_ERROR_MASKS1 = 0x9144,
+        NES_IDX_DEBUG_ERROR_MASKS2 = 0x9148,
+        NES_IDX_DEBUG_ERROR_MASKS3 = 0x914c,
+        NES_IDX_DEBUG_ERROR_MASKS4 = 0x9150,
+        NES_IDX_DEBUG_ERROR_MASKS5 = 0x9154,
+};
+
+#define NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE   1
+#define NES_IDX_MPP_DEBUG_PORT_DISABLE_PAUSE (1 << 17)
+
+enum nes_cqp_opcodes {
+        NES_CQP_CREATE_QP = 0x00,
+        NES_CQP_MODIFY_QP = 0x01,
+        NES_CQP_DESTROY_QP = 0x02,
+        NES_CQP_CREATE_CQ = 0x03,
+        NES_CQP_MODIFY_CQ = 0x04,
+        NES_CQP_DESTROY_CQ = 0x05,
+        NES_CQP_ALLOCATE_STAG = 0x09,
+        NES_CQP_REGISTER_STAG = 0x0a,
+        NES_CQP_QUERY_STAG = 0x0b,
+        NES_CQP_REGISTER_SHARED_STAG = 0x0c,
+        NES_CQP_DEALLOCATE_STAG = 0x0d,
+        NES_CQP_MANAGE_ARP_CACHE = 0x0f,
+        NES_CQP_SUSPEND_QPS = 0x11,
+        NES_CQP_UPLOAD_CONTEXT = 0x13,
+        NES_CQP_CREATE_CEQ = 0x16,
+        NES_CQP_DESTROY_CEQ = 0x18,
+        NES_CQP_CREATE_AEQ = 0x19,
+        NES_CQP_DESTROY_AEQ = 0x1b,
+        NES_CQP_LMI_ACCESS = 0x20,
+        NES_CQP_FLUSH_WQES = 0x22,
+        NES_CQP_MANAGE_APBVT = 0x23
+};
+
+enum nes_cqp_wqe_word_idx {
+        NES_CQP_WQE_OPCODE_IDX = 0,
+        NES_CQP_WQE_ID_IDX = 1,
+        NES_CQP_WQE_COMP_CTX_LOW_IDX = 2,
+        NES_CQP_WQE_COMP_CTX_HIGH_IDX = 3,
+        NES_CQP_WQE_COMP_SCRATCH_LOW_IDX = 4,
+        NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX = 5,
+};
+
+enum nes_cqp_cq_wqeword_idx {
+        NES_CQP_CQ_WQE_PBL_LOW_IDX = 6,
+        NES_CQP_CQ_WQE_PBL_HIGH_IDX = 7,
+        NES_CQP_CQ_WQE_CQ_CONTEXT_LOW_IDX = 8,
+        NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX = 9,
+        NES_CQP_CQ_WQE_DOORBELL_INDEX_HIGH_IDX = 10,
+};
+
+enum nes_cqp_stag_wqeword_idx {
+        NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX = 1,
+        NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX = 6,
+        NES_CQP_STAG_WQE_LEN_LOW_IDX = 7,
+        NES_CQP_STAG_WQE_STAG_IDX = 8,
+        NES_CQP_STAG_WQE_VA_LOW_IDX = 10,
+        NES_CQP_STAG_WQE_VA_HIGH_IDX = 11,
+        NES_CQP_STAG_WQE_PA_LOW_IDX = 12,
+        NES_CQP_STAG_WQE_PA_HIGH_IDX = 13,
+        NES_CQP_STAG_WQE_PBL_LEN_IDX = 14
+};
+
+#define NES_CQP_OP_IWARP_STATE_SHIFT 28
+
+enum nes_cqp_qp_bits {
+        NES_CQP_QP_ARP_VALID = (1<<8),
+        NES_CQP_QP_WINBUF_VALID = (1<<9),
+        NES_CQP_QP_CONTEXT_VALID = (1<<10),
+        NES_CQP_QP_ORD_VALID = (1<<11),
+        NES_CQP_QP_WINBUF_DATAIND_EN = (1<<12),
+        NES_CQP_QP_VIRT_WQS = (1<<13),
+        NES_CQP_QP_DEL_HTE = (1<<14),
+        NES_CQP_QP_CQS_VALID = (1<<15),
+        NES_CQP_QP_TYPE_TSA = 0,
+        NES_CQP_QP_TYPE_IWARP = (1<<16),
+        NES_CQP_QP_TYPE_CQP = (4<<16),
+        NES_CQP_QP_TYPE_NIC = (5<<16),
+        NES_CQP_QP_MSS_CHG = (1<<20),
+        NES_CQP_QP_STATIC_RESOURCES = (1<<21),
+        NES_CQP_QP_IGNORE_MW_BOUND = (1<<22),
+        NES_CQP_QP_VWQ_USE_LMI = (1<<23),
+        NES_CQP_QP_IWARP_STATE_IDLE = (1<<NES_CQP_OP_IWARP_STATE_SHIFT),
+        NES_CQP_QP_IWARP_STATE_RTS = (2<<NES_CQP_OP_IWARP_STATE_SHIFT),
+        NES_CQP_QP_IWARP_STATE_CLOSING = (3<<NES_CQP_OP_IWARP_STATE_SHIFT),
+        NES_CQP_QP_IWARP_STATE_TERMINATE = (5<<NES_CQP_OP_IWARP_STATE_SHIFT),
+        NES_CQP_QP_IWARP_STATE_ERROR = (6<<NES_CQP_OP_IWARP_STATE_SHIFT),
+        NES_CQP_QP_IWARP_STATE_MASK = (7<<NES_CQP_OP_IWARP_STATE_SHIFT),
+        NES_CQP_QP_RESET = (1<<31),
+};
+
+enum nes_cqp_qp_wqe_word_idx {
+        NES_CQP_QP_WQE_CONTEXT_LOW_IDX = 6,
+        NES_CQP_QP_WQE_CONTEXT_HIGH_IDX = 7,
+        NES_CQP_QP_WQE_NEW_MSS_IDX = 15,
+};
+
+enum nes_nic_ctx_bits {
+        NES_NIC_CTX_RQ_SIZE_32 = (3<<8),
+        NES_NIC_CTX_RQ_SIZE_512 = (3<<8),
+        NES_NIC_CTX_SQ_SIZE_32 = (1<<10),
+        NES_NIC_CTX_SQ_SIZE_512 = (3<<10),
+};
+
+enum nes_nic_qp_ctx_word_idx {
+        NES_NIC_CTX_MISC_IDX = 0,
+        NES_NIC_CTX_SQ_LOW_IDX = 2,
+        NES_NIC_CTX_SQ_HIGH_IDX = 3,
+        NES_NIC_CTX_RQ_LOW_IDX = 4,
+        NES_NIC_CTX_RQ_HIGH_IDX = 5,
+};
+
+enum nes_cqp_cq_bits {
+        NES_CQP_CQ_CEQE_MASK = (1<<9),
+        NES_CQP_CQ_CEQ_VALID = (1<<10),
+        NES_CQP_CQ_RESIZE = (1<<11),
+        NES_CQP_CQ_CHK_OVERFLOW = (1<<12),
+        NES_CQP_CQ_4KB_CHUNK = (1<<14),
+        NES_CQP_CQ_VIRT = (1<<15),
+};
+
+enum nes_cqp_stag_bits {
+        NES_CQP_STAG_VA_TO = (1<<9),
+        NES_CQP_STAG_DEALLOC_PBLS = (1<<10),
+        NES_CQP_STAG_PBL_BLK_SIZE = (1<<11),
+        NES_CQP_STAG_MR = (1<<13),
+        NES_CQP_STAG_RIGHTS_LOCAL_READ = (1<<16),
+        NES_CQP_STAG_RIGHTS_LOCAL_WRITE = (1<<17),
+        NES_CQP_STAG_RIGHTS_REMOTE_READ = (1<<18),
+        NES_CQP_STAG_RIGHTS_REMOTE_WRITE = (1<<19),
+        NES_CQP_STAG_RIGHTS_WINDOW_BIND = (1<<20),
+        NES_CQP_STAG_REM_ACC_EN = (1<<21),
+        NES_CQP_STAG_LEAVE_PENDING = (1<<31),
+};
+
+enum nes_cqp_ceq_wqeword_idx {
+        NES_CQP_CEQ_WQE_ELEMENT_COUNT_IDX = 1,
+        NES_CQP_CEQ_WQE_PBL_LOW_IDX = 6,
+        NES_CQP_CEQ_WQE_PBL_HIGH_IDX = 7,
+};
+
+enum nes_cqp_ceq_bits {
+        NES_CQP_CEQ_4KB_CHUNK = (1<<14),
+        NES_CQP_CEQ_VIRT = (1<<15),
+};
+
+enum nes_cqp_aeq_wqeword_idx {
+        NES_CQP_AEQ_WQE_ELEMENT_COUNT_IDX = 1,
+        NES_CQP_AEQ_WQE_PBL_LOW_IDX = 6,
+        NES_CQP_AEQ_WQE_PBL_HIGH_IDX = 7,
+};
+
+enum nes_cqp_aeq_bits {
+        NES_CQP_AEQ_4KB_CHUNK = (1<<14),
+        NES_CQP_AEQ_VIRT = (1<<15),
+};
+
+enum nes_cqp_lmi_wqeword_idx {
+        NES_CQP_LMI_WQE_LMI_OFFSET_IDX = 1,
+        NES_CQP_LMI_WQE_FRAG_LOW_IDX = 8,
+        NES_CQP_LMI_WQE_FRAG_HIGH_IDX = 9,
+        NES_CQP_LMI_WQE_FRAG_LEN_IDX = 10,
+};
+
+enum nes_cqp_arp_wqeword_idx {
+        NES_CQP_ARP_WQE_MAC_ADDR_LOW_IDX = 6,
+        NES_CQP_ARP_WQE_MAC_HIGH_IDX = 7,
+        NES_CQP_ARP_WQE_REACHABILITY_MAX_IDX = 1,
+};
+
+enum nes_cqp_upload_wqeword_idx {
+        NES_CQP_UPLOAD_WQE_CTXT_LOW_IDX = 6,
+        NES_CQP_UPLOAD_WQE_CTXT_HIGH_IDX = 7,
+        NES_CQP_UPLOAD_WQE_HTE_IDX = 8,
+};
+
+enum nes_cqp_arp_bits {
+        NES_CQP_ARP_VALID = (1<<8),
+        NES_CQP_ARP_PERM = (1<<9),
+};
+
+enum nes_cqp_flush_bits {
+        NES_CQP_FLUSH_SQ = (1<<30),
+        NES_CQP_FLUSH_RQ = (1<<31),
+};
+
+enum nes_cqe_opcode_bits {
+        NES_CQE_STAG_VALID = (1<<6),
+        NES_CQE_ERROR = (1<<7),
+        NES_CQE_SQ = (1<<8),
+        NES_CQE_SE = (1<<9),
+        NES_CQE_PSH = (1<<29),
+        NES_CQE_FIN = (1<<30),
+        NES_CQE_VALID = (1<<31),
+};
+
+
+enum nes_cqe_word_idx {
+        NES_CQE_PAYLOAD_LENGTH_IDX = 0,
+        NES_CQE_COMP_COMP_CTX_LOW_IDX = 2,
+        NES_CQE_COMP_COMP_CTX_HIGH_IDX = 3,
+        NES_CQE_INV_STAG_IDX = 4,
+        NES_CQE_QP_ID_IDX = 5,
+        NES_CQE_ERROR_CODE_IDX = 6,
+        NES_CQE_OPCODE_IDX = 7,
+};
+
+enum nes_ceqe_word_idx {
+        NES_CEQE_CQ_CTX_LOW_IDX = 0,
+        NES_CEQE_CQ_CTX_HIGH_IDX = 1,
+};
+
+enum nes_ceqe_status_bit {
+        NES_CEQE_VALID = (1<<31),
+};
+
+enum nes_int_bits {
+        NES_INT_CEQ0 = (1<<0),
+        NES_INT_CEQ1 = (1<<1),
+        NES_INT_CEQ2 = (1<<2),
+        NES_INT_CEQ3 = (1<<3),
+        NES_INT_CEQ4 = (1<<4),
+        NES_INT_CEQ5 = (1<<5),
+        NES_INT_CEQ6 = (1<<6),
+        NES_INT_CEQ7 = (1<<7),
+        NES_INT_CEQ8 = (1<<8),
+        NES_INT_CEQ9 = (1<<9),
+        NES_INT_CEQ10 = (1<<10),
+        NES_INT_CEQ11 = (1<<11),
+        NES_INT_CEQ12 = (1<<12),
+        NES_INT_CEQ13 = (1<<13),
+        NES_INT_CEQ14 = (1<<14),
+        NES_INT_CEQ15 = (1<<15),
+        NES_INT_AEQ0 = (1<<16),
+        NES_INT_AEQ1 = (1<<17),
+        NES_INT_AEQ2 = (1<<18),
+        NES_INT_AEQ3 = (1<<19),
+        NES_INT_AEQ4 = (1<<20),
+        NES_INT_AEQ5 = (1<<21),
+        NES_INT_AEQ6 = (1<<22),
+        NES_INT_AEQ7 = (1<<23),
+        NES_INT_MAC0 = (1<<24),
+        NES_INT_MAC1 = (1<<25),
+        NES_INT_MAC2 = (1<<26),
+        NES_INT_MAC3 = (1<<27),
+        NES_INT_TSW = (1<<28),
+        NES_INT_TIMER = (1<<29),
+        NES_INT_INTF = (1<<30),
+};
+
+enum nes_intf_int_bits {
+        NES_INTF_INT_PCIERR = (1<<0),
+        NES_INTF_PERIODIC_TIMER = (1<<2),
+        NES_INTF_ONE_SHOT_TIMER = (1<<3),
+        NES_INTF_INT_CRITERR = (1<<14),
+        NES_INTF_INT_AEQ0_OFLOW = (1<<16),
+        NES_INTF_INT_AEQ1_OFLOW = (1<<17),
+        NES_INTF_INT_AEQ2_OFLOW = (1<<18),
+        NES_INTF_INT_AEQ3_OFLOW = (1<<19),
+        NES_INTF_INT_AEQ4_OFLOW = (1<<20),
+        NES_INTF_INT_AEQ5_OFLOW = (1<<21),
+        NES_INTF_INT_AEQ6_OFLOW = (1<<22),
+        NES_INTF_INT_AEQ7_OFLOW = (1<<23),
+        NES_INTF_INT_AEQ_OFLOW = (0xff<<16),
+};
+
+enum nes_mac_int_bits {
+        NES_MAC_INT_LINK_STAT_CHG = (1<<1),
+        NES_MAC_INT_XGMII_EXT = (1<<2),
+        NES_MAC_INT_TX_UNDERFLOW = (1<<6),
+        NES_MAC_INT_TX_ERROR = (1<<7),
+};
+
+enum nes_cqe_allocate_bits {
+        NES_CQE_ALLOC_INC_SELECT = (1<<28),
+        NES_CQE_ALLOC_NOTIFY_NEXT = (1<<29),
+        NES_CQE_ALLOC_NOTIFY_SE = (1<<30),
+        NES_CQE_ALLOC_RESET = (1<<31),
+};
+
+enum nes_nic_rq_wqe_word_idx {
+        NES_NIC_RQ_WQE_LENGTH_1_0_IDX = 0,
+        NES_NIC_RQ_WQE_LENGTH_3_2_IDX = 1,
+        NES_NIC_RQ_WQE_FRAG0_LOW_IDX = 2,
+        NES_NIC_RQ_WQE_FRAG0_HIGH_IDX = 3,
+        NES_NIC_RQ_WQE_FRAG1_LOW_IDX = 4,
+        NES_NIC_RQ_WQE_FRAG1_HIGH_IDX = 5,
+        NES_NIC_RQ_WQE_FRAG2_LOW_IDX = 6,
+        NES_NIC_RQ_WQE_FRAG2_HIGH_IDX = 7,
+        NES_NIC_RQ_WQE_FRAG3_LOW_IDX = 8,
+        NES_NIC_RQ_WQE_FRAG3_HIGH_IDX = 9,
+};
+
+enum nes_nic_sq_wqe_word_idx {
+        NES_NIC_SQ_WQE_MISC_IDX = 0,
+        NES_NIC_SQ_WQE_TOTAL_LENGTH_IDX = 1,
+        NES_NIC_SQ_WQE_LSO_INFO_IDX = 2,
+        NES_NIC_SQ_WQE_LENGTH_0_TAG_IDX = 3,
+        NES_NIC_SQ_WQE_LENGTH_2_1_IDX = 4,
+        NES_NIC_SQ_WQE_LENGTH_4_3_IDX = 5,
+        NES_NIC_SQ_WQE_FRAG0_LOW_IDX = 6,
+        NES_NIC_SQ_WQE_FRAG0_HIGH_IDX = 7,
+        NES_NIC_SQ_WQE_FRAG1_LOW_IDX = 8,
+        NES_NIC_SQ_WQE_FRAG1_HIGH_IDX = 9,
+        NES_NIC_SQ_WQE_FRAG2_LOW_IDX = 10,
+        NES_NIC_SQ_WQE_FRAG2_HIGH_IDX = 11,
+        NES_NIC_SQ_WQE_FRAG3_LOW_IDX = 12,
+        NES_NIC_SQ_WQE_FRAG3_HIGH_IDX = 13,
+        NES_NIC_SQ_WQE_FRAG4_LOW_IDX = 14,
+        NES_NIC_SQ_WQE_FRAG4_HIGH_IDX = 15,
+};
+
+enum nes_iwarp_sq_wqe_word_idx {
+        NES_IWARP_SQ_WQE_MISC_IDX = 0,
+        NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX = 1,
+        NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX = 2,
+        NES_IWARP_SQ_WQE_COMP_CTX_HIGH_IDX = 3,
+        NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX = 4,
+        NES_IWARP_SQ_WQE_COMP_SCRATCH_HIGH_IDX = 5,
+        NES_IWARP_SQ_WQE_INV_STAG_LOW_IDX = 7,
+        NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX = 8,
+        NES_IWARP_SQ_WQE_RDMA_TO_HIGH_IDX = 9,
+        NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX = 10,
+        NES_IWARP_SQ_WQE_RDMA_STAG_IDX = 11,
+        NES_IWARP_SQ_WQE_IMM_DATA_START_IDX = 12,
+        NES_IWARP_SQ_WQE_FRAG0_LOW_IDX = 16,
+        NES_IWARP_SQ_WQE_FRAG0_HIGH_IDX = 17,
+        NES_IWARP_SQ_WQE_LENGTH0_IDX = 18,
+        NES_IWARP_SQ_WQE_STAG0_IDX = 19,
+        NES_IWARP_SQ_WQE_FRAG1_LOW_IDX = 20,
+        NES_IWARP_SQ_WQE_FRAG1_HIGH_IDX = 21,
+        NES_IWARP_SQ_WQE_LENGTH1_IDX = 22,
+        NES_IWARP_SQ_WQE_STAG1_IDX = 23,
+        NES_IWARP_SQ_WQE_FRAG2_LOW_IDX = 24,
+        NES_IWARP_SQ_WQE_FRAG2_HIGH_IDX = 25,
+        NES_IWARP_SQ_WQE_LENGTH2_IDX = 26,
+        NES_IWARP_SQ_WQE_STAG2_IDX = 27,
+        NES_IWARP_SQ_WQE_FRAG3_LOW_IDX = 28,
+        NES_IWARP_SQ_WQE_FRAG3_HIGH_IDX = 29,
+        NES_IWARP_SQ_WQE_LENGTH3_IDX = 30,
+        NES_IWARP_SQ_WQE_STAG3_IDX = 31,
+};
+
+enum nes_iwarp_sq_bind_wqe_word_idx {
+        NES_IWARP_SQ_BIND_WQE_MR_IDX = 6,
+        NES_IWARP_SQ_BIND_WQE_MW_IDX = 7,
+        NES_IWARP_SQ_BIND_WQE_LENGTH_LOW_IDX = 8,
+        NES_IWARP_SQ_BIND_WQE_LENGTH_HIGH_IDX = 9,
+        NES_IWARP_SQ_BIND_WQE_VA_FBO_LOW_IDX = 10,
+        NES_IWARP_SQ_BIND_WQE_VA_FBO_HIGH_IDX = 11,
+};
+
+enum nes_iwarp_sq_fmr_wqe_word_idx {
+        NES_IWARP_SQ_FMR_WQE_MR_STAG_IDX = 7,
+        NES_IWARP_SQ_FMR_WQE_LENGTH_LOW_IDX = 8,
+        NES_IWARP_SQ_FMR_WQE_LENGTH_HIGH_IDX = 9,
+        NES_IWARP_SQ_FMR_WQE_VA_FBO_LOW_IDX = 10,
+        NES_IWARP_SQ_FMR_WQE_VA_FBO_HIGH_IDX = 11,
+        NES_IWARP_SQ_FMR_WQE_PBL_ADDR_LOW_IDX = 12,
+        NES_IWARP_SQ_FMR_WQE_PBL_ADDR_HIGH_IDX = 13,
+        NES_IWARP_SQ_FMR_WQE_PBL_LENGTH_IDX = 14,
+};
+
+enum nes_iwarp_sq_locinv_wqe_word_idx {
+        NES_IWARP_SQ_LOCINV_WQE_INV_STAG_IDX = 6,
+};
+
+
+enum nes_iwarp_rq_wqe_word_idx {
+        NES_IWARP_RQ_WQE_TOTAL_PAYLOAD_IDX = 1,
+        NES_IWARP_RQ_WQE_COMP_CTX_LOW_IDX = 2,
+        NES_IWARP_RQ_WQE_COMP_CTX_HIGH_IDX = 3,
+        NES_IWARP_RQ_WQE_COMP_SCRATCH_LOW_IDX = 4,
+        NES_IWARP_RQ_WQE_COMP_SCRATCH_HIGH_IDX = 5,
+        NES_IWARP_RQ_WQE_FRAG0_LOW_IDX = 8,
+        NES_IWARP_RQ_WQE_FRAG0_HIGH_IDX = 9,
+        NES_IWARP_RQ_WQE_LENGTH0_IDX = 10,
+        NES_IWARP_RQ_WQE_STAG0_IDX = 11,
+        NES_IWARP_RQ_WQE_FRAG1_LOW_IDX = 12,
+        NES_IWARP_RQ_WQE_FRAG1_HIGH_IDX = 13,
+        NES_IWARP_RQ_WQE_LENGTH1_IDX = 14,
+        NES_IWARP_RQ_WQE_STAG1_IDX = 15,
+        NES_IWARP_RQ_WQE_FRAG2_LOW_IDX = 16,
+        NES_IWARP_RQ_WQE_FRAG2_HIGH_IDX = 17,
+        NES_IWARP_RQ_WQE_LENGTH2_IDX = 18,
+        NES_IWARP_RQ_WQE_STAG2_IDX = 19,
+        NES_IWARP_RQ_WQE_FRAG3_LOW_IDX = 20,
+        NES_IWARP_RQ_WQE_FRAG3_HIGH_IDX = 21,
+        NES_IWARP_RQ_WQE_LENGTH3_IDX = 22,
+        NES_IWARP_RQ_WQE_STAG3_IDX = 23,
+};
+
+enum nes_nic_sq_wqe_bits {
+        NES_NIC_SQ_WQE_PHDR_CS_READY =  (1<<21),
+        NES_NIC_SQ_WQE_LSO_ENABLE = (1<<22),
+        NES_NIC_SQ_WQE_TAGVALUE_ENABLE = (1<<23),
+        NES_NIC_SQ_WQE_DISABLE_CHKSUM = (1<<30),
+        NES_NIC_SQ_WQE_COMPLETION = (1<<31),
+};
+
+enum nes_nic_cqe_word_idx {
+        NES_NIC_CQE_ACCQP_ID_IDX = 0,
+        NES_NIC_CQE_TAG_PKT_TYPE_IDX = 2,
+        NES_NIC_CQE_MISC_IDX = 3,
+};
+
+#define NES_PKT_TYPE_APBVT_BITS 0xC112
+#define NES_PKT_TYPE_APBVT_MASK 0xff3e
+
+#define NES_PKT_TYPE_PVALID_BITS 0x10000000
+#define NES_PKT_TYPE_PVALID_MASK 0x30000000
+
+#define NES_PKT_TYPE_TCPV4_BITS 0x0110
+#define NES_PKT_TYPE_TCPV4_MASK 0x3f30
+
+#define NES_PKT_TYPE_UDPV4_BITS 0x0210
+#define NES_PKT_TYPE_UDPV4_MASK 0x3f30
+
+#define NES_PKT_TYPE_IPV4_BITS  0x0010
+#define NES_PKT_TYPE_IPV4_MASK  0x3f30
+
+#define NES_PKT_TYPE_OTHER_BITS 0x0000
+#define NES_PKT_TYPE_OTHER_MASK 0x0030
+
+#define NES_NIC_CQE_ERRV_SHIFT 16
+enum nes_nic_ev_bits {
+        NES_NIC_ERRV_BITS_MODE = (1<<0),
+        NES_NIC_ERRV_BITS_IPV4_CSUM_ERR = (1<<1),
+        NES_NIC_ERRV_BITS_TCPUDP_CSUM_ERR = (1<<2),
+        NES_NIC_ERRV_BITS_WQE_OVERRUN = (1<<3),
+        NES_NIC_ERRV_BITS_IPH_ERR = (1<<4),
+};
+
+enum nes_nic_cqe_bits {
+        NES_NIC_CQE_ERRV_MASK = (0xff<<NES_NIC_CQE_ERRV_SHIFT),
+        NES_NIC_CQE_SQ = (1<<24),
+        NES_NIC_CQE_ACCQP_PORT = (1<<28),
+        NES_NIC_CQE_ACCQP_VALID = (1<<29),
+        NES_NIC_CQE_TAG_VALID = (1<<30),
+        NES_NIC_CQE_VALID = (1<<31),
+};
+
+enum nes_aeqe_word_idx {
+        NES_AEQE_COMP_CTXT_LOW_IDX = 0,
+        NES_AEQE_COMP_CTXT_HIGH_IDX = 1,
+        NES_AEQE_COMP_QP_CQ_ID_IDX = 2,
+        NES_AEQE_MISC_IDX = 3,
+};
+
+enum nes_aeqe_bits {
+        NES_AEQE_QP = (1<<16),
+        NES_AEQE_CQ = (1<<17),
+        NES_AEQE_SQ = (1<<18),
+        NES_AEQE_INBOUND_RDMA = (1<<19),
+        NES_AEQE_IWARP_STATE_MASK = (7<<20),
+        NES_AEQE_TCP_STATE_MASK = (0xf<<24),
+        NES_AEQE_VALID = (1<<31),
+};
+
+#define NES_AEQE_IWARP_STATE_SHIFT      20
+#define NES_AEQE_TCP_STATE_SHIFT        24
+
+enum nes_aeqe_iwarp_state {
+        NES_AEQE_IWARP_STATE_NON_EXISTANT = 0,
+        NES_AEQE_IWARP_STATE_IDLE = 1,
+        NES_AEQE_IWARP_STATE_RTS = 2,
+        NES_AEQE_IWARP_STATE_CLOSING = 3,
+        NES_AEQE_IWARP_STATE_TERMINATE = 5,
+        NES_AEQE_IWARP_STATE_ERROR = 6
+};
+
+enum nes_aeqe_tcp_state {
+        NES_AEQE_TCP_STATE_NON_EXISTANT = 0,
+        NES_AEQE_TCP_STATE_CLOSED = 1,
+        NES_AEQE_TCP_STATE_LISTEN = 2,
+        NES_AEQE_TCP_STATE_SYN_SENT = 3,
+        NES_AEQE_TCP_STATE_SYN_RCVD = 4,
+        NES_AEQE_TCP_STATE_ESTABLISHED = 5,
+        NES_AEQE_TCP_STATE_CLOSE_WAIT = 6,
+        NES_AEQE_TCP_STATE_FIN_WAIT_1 = 7,
+        NES_AEQE_TCP_STATE_CLOSING = 8,
+        NES_AEQE_TCP_STATE_LAST_ACK = 9,
+        NES_AEQE_TCP_STATE_FIN_WAIT_2 = 10,
+        NES_AEQE_TCP_STATE_TIME_WAIT = 11
+};
+
+enum nes_aeqe_aeid {
+        NES_AEQE_AEID_AMP_UNALLOCATED_STAG                            = 0x0102,
+        NES_AEQE_AEID_AMP_INVALID_STAG                                = 0x0103,
+        NES_AEQE_AEID_AMP_BAD_QP                                      = 0x0104,
+        NES_AEQE_AEID_AMP_BAD_PD                                      = 0x0105,
+        NES_AEQE_AEID_AMP_BAD_STAG_KEY                                = 0x0106,
+        NES_AEQE_AEID_AMP_BAD_STAG_INDEX                              = 0x0107,
+        NES_AEQE_AEID_AMP_BOUNDS_VIOLATION                            = 0x0108,
+        NES_AEQE_AEID_AMP_RIGHTS_VIOLATION                            = 0x0109,
+        NES_AEQE_AEID_AMP_TO_WRAP                                     = 0x010a,
+        NES_AEQE_AEID_AMP_FASTREG_SHARED                              = 0x010b,
+        NES_AEQE_AEID_AMP_FASTREG_VALID_STAG                          = 0x010c,
+        NES_AEQE_AEID_AMP_FASTREG_MW_STAG                             = 0x010d,
+        NES_AEQE_AEID_AMP_FASTREG_INVALID_RIGHTS                      = 0x010e,
+        NES_AEQE_AEID_AMP_FASTREG_PBL_TABLE_OVERFLOW                  = 0x010f,
+        NES_AEQE_AEID_AMP_FASTREG_INVALID_LENGTH                      = 0x0110,
+        NES_AEQE_AEID_AMP_INVALIDATE_SHARED                           = 0x0111,
+        NES_AEQE_AEID_AMP_INVALIDATE_NO_REMOTE_ACCESS_RIGHTS          = 0x0112,
+        NES_AEQE_AEID_AMP_INVALIDATE_MR_WITH_BOUND_WINDOWS            = 0x0113,
+        NES_AEQE_AEID_AMP_MWBIND_VALID_STAG                           = 0x0114,
+        NES_AEQE_AEID_AMP_MWBIND_OF_MR_STAG                           = 0x0115,
+        NES_AEQE_AEID_AMP_MWBIND_TO_ZERO_BASED_STAG                   = 0x0116,
+        NES_AEQE_AEID_AMP_MWBIND_TO_MW_STAG                           = 0x0117,
+        NES_AEQE_AEID_AMP_MWBIND_INVALID_RIGHTS                       = 0x0118,
+        NES_AEQE_AEID_AMP_MWBIND_INVALID_BOUNDS                       = 0x0119,
+        NES_AEQE_AEID_AMP_MWBIND_TO_INVALID_PARENT                    = 0x011a,
+        NES_AEQE_AEID_AMP_MWBIND_BIND_DISABLED                        = 0x011b,
+        NES_AEQE_AEID_BAD_CLOSE                                       = 0x0201,
+        NES_AEQE_AEID_RDMAP_ROE_BAD_LLP_CLOSE                         = 0x0202,
+        NES_AEQE_AEID_CQ_OPERATION_ERROR                              = 0x0203,
+        NES_AEQE_AEID_PRIV_OPERATION_DENIED                           = 0x0204,
+        NES_AEQE_AEID_RDMA_READ_WHILE_ORD_ZERO                        = 0x0205,
+        NES_AEQE_AEID_STAG_ZERO_INVALID                               = 0x0206,
+        NES_AEQE_AEID_DDP_INVALID_MSN_GAP_IN_MSN                      = 0x0301,
+        NES_AEQE_AEID_DDP_INVALID_MSN_RANGE_IS_NOT_VALID              = 0x0302,
+        NES_AEQE_AEID_DDP_UBE_DDP_MESSAGE_TOO_LONG_FOR_AVAILABLE_BUFFER = 0x0303,
+        NES_AEQE_AEID_DDP_UBE_INVALID_DDP_VERSION                     = 0x0304,
+        NES_AEQE_AEID_DDP_UBE_INVALID_MO                              = 0x0305,
+        NES_AEQE_AEID_DDP_UBE_INVALID_MSN_NO_BUFFER_AVAILABLE         = 0x0306,
+        NES_AEQE_AEID_DDP_UBE_INVALID_QN                              = 0x0307,
+        NES_AEQE_AEID_DDP_NO_L_BIT                                    = 0x0308,
+        NES_AEQE_AEID_RDMAP_ROE_INVALID_RDMAP_VERSION                 = 0x0311,
+        NES_AEQE_AEID_RDMAP_ROE_UNEXPECTED_OPCODE                     = 0x0312,
+        NES_AEQE_AEID_ROE_INVALID_RDMA_READ_REQUEST                   = 0x0313,
+        NES_AEQE_AEID_ROE_INVALID_RDMA_WRITE_OR_READ_RESP             = 0x0314,
+        NES_AEQE_AEID_INVALID_ARP_ENTRY                               = 0x0401,
+        NES_AEQE_AEID_INVALID_TCP_OPTION_RCVD                         = 0x0402,
+        NES_AEQE_AEID_STALE_ARP_ENTRY                                 = 0x0403,
+        NES_AEQE_AEID_LLP_CLOSE_COMPLETE                              = 0x0501,
+        NES_AEQE_AEID_LLP_CONNECTION_RESET                            = 0x0502,
+        NES_AEQE_AEID_LLP_FIN_RECEIVED                                = 0x0503,
+        NES_AEQE_AEID_LLP_RECEIVED_MARKER_AND_LENGTH_FIELDS_DONT_MATCH =  0x0504,
+        NES_AEQE_AEID_LLP_RECEIVED_MPA_CRC_ERROR                      = 0x0505,
+        NES_AEQE_AEID_LLP_SEGMENT_TOO_LARGE                           = 0x0506,
+        NES_AEQE_AEID_LLP_SEGMENT_TOO_SMALL                           = 0x0507,
+        NES_AEQE_AEID_LLP_SYN_RECEIVED                                = 0x0508,
+        NES_AEQE_AEID_LLP_TERMINATE_RECEIVED                          = 0x0509,
+        NES_AEQE_AEID_LLP_TOO_MANY_RETRIES                            = 0x050a,
+        NES_AEQE_AEID_LLP_TOO_MANY_KEEPALIVE_RETRIES                  = 0x050b,
+        NES_AEQE_AEID_RESET_SENT                                      = 0x0601,
+        NES_AEQE_AEID_TERMINATE_SENT                                  = 0x0602,
+        NES_AEQE_AEID_DDP_LCE_LOCAL_CATASTROPHIC                      = 0x0700
+};
+
+enum nes_iwarp_sq_opcodes {
+        NES_IWARP_SQ_WQE_WRPDU = (1<<15),
+        NES_IWARP_SQ_WQE_PSH = (1<<21),
+        NES_IWARP_SQ_WQE_STREAMING = (1<<23),
+        NES_IWARP_SQ_WQE_IMM_DATA = (1<<28),
+        NES_IWARP_SQ_WQE_READ_FENCE = (1<<29),
+        NES_IWARP_SQ_WQE_LOCAL_FENCE = (1<<30),
+        NES_IWARP_SQ_WQE_SIGNALED_COMPL = (1<<31),
+};
+
+enum nes_iwarp_sq_wqe_bits {
+        NES_IWARP_SQ_OP_RDMAW = 0,
+        NES_IWARP_SQ_OP_RDMAR = 1,
+        NES_IWARP_SQ_OP_SEND = 3,
+        NES_IWARP_SQ_OP_SENDINV = 4,
+        NES_IWARP_SQ_OP_SENDSE = 5,
+        NES_IWARP_SQ_OP_SENDSEINV = 6,
+        NES_IWARP_SQ_OP_BIND = 8,
+        NES_IWARP_SQ_OP_FAST_REG = 9,
+        NES_IWARP_SQ_OP_LOCINV = 10,
+        NES_IWARP_SQ_OP_RDMAR_LOCINV = 11,
+        NES_IWARP_SQ_OP_NOP = 12,
+};
+
+#define NES_EEPROM_READ_REQUEST (1<<16)
+#define NES_MAC_ADDR_VALID      (1<<20)
+
+/*
+ * NES index registers init values.
+ */
+struct nes_init_values {
+        u32 index;
+        u32 data;
+        u8  wrt;
+};
+
+/*
+ * NES registers in BAR0.
+ */
+struct nes_pci_regs {
+        u32 int_status;
+        u32 int_mask;
+        u32 int_pending;
+        u32 intf_int_status;
+        u32 intf_int_mask;
+        u32 other_regs[59];      /* pad out to 256 bytes for now */
+};
+
+#define NES_CQP_SQ_SIZE    128
+#define NES_CCQ_SIZE       128
+#define NES_NIC_WQ_SIZE    512
+#define NES_NIC_CTX_SIZE   ((NES_NIC_CTX_RQ_SIZE_512) | (NES_NIC_CTX_SQ_SIZE_512))
+#define NES_NIC_BACK_STORE 0x00038000
+
+struct nes_device;
+
+struct nes_hw_nic_qp_context {
+        __le32 context_words[6];
+};
+
+struct nes_hw_nic_sq_wqe {
+        __le32 wqe_words[16];
+};
+
+struct nes_hw_nic_rq_wqe {
+        __le32 wqe_words[16];
+};
+
+struct nes_hw_nic_cqe {
+        __le32 cqe_words[4];
+};
+
+struct nes_hw_cqp_qp_context {
+        __le32 context_words[4];
+};
+
+struct nes_hw_cqp_wqe {
+        __le32 wqe_words[16];
+};
+
+struct nes_hw_qp_wqe {
+        __le32 wqe_words[32];
+};
+
+struct nes_hw_cqe {
+        __le32 cqe_words[8];
+};
+
+struct nes_hw_ceqe {
+        __le32 ceqe_words[2];
+};
+
+struct nes_hw_aeqe {
+        __le32 aeqe_words[4];
+};
+
+struct nes_cqp_request {
+        union {
+                u64 cqp_callback_context;
+                void *cqp_callback_pointer;
+        };
+        wait_queue_head_t     waitq;
+        struct nes_hw_cqp_wqe cqp_wqe;
+        struct list_head      list;
+        atomic_t              refcount;
+        void (*cqp_callback)(struct nes_device *nesdev, struct nes_cqp_request *cqp_request);
+        u16                   major_code;
+        u16                   minor_code;
+        u8                    waiting;
+        u8                    request_done;
+        u8                    dynamic;
+        u8                    callback;
+};
+
+struct nes_hw_cqp {
+        struct nes_hw_cqp_wqe *sq_vbase;
+        dma_addr_t            sq_pbase;
+        spinlock_t            lock;
+        wait_queue_head_t     waitq;
+        u16                   qp_id;
+        u16                   sq_head;
+        u16                   sq_tail;
+        u16                   sq_size;
+};
+
+#define NES_FIRST_FRAG_SIZE 128
+struct nes_first_frag {
+        u8 buffer[NES_FIRST_FRAG_SIZE];
+};
+
+struct nes_hw_nic {
+        struct nes_first_frag    *first_frag_vbase;     /* virtual address of first frags */
+        struct nes_hw_nic_sq_wqe *sq_vbase;                     /* virtual address of sq */
+        struct nes_hw_nic_rq_wqe *rq_vbase;                     /* virtual address of rq */
+        struct sk_buff           *tx_skb[NES_NIC_WQ_SIZE];
+        struct sk_buff           *rx_skb[NES_NIC_WQ_SIZE];
+        dma_addr_t frag_paddr[NES_NIC_WQ_SIZE];
+        unsigned long first_frag_overflow[BITS_TO_LONGS(NES_NIC_WQ_SIZE)];
+        dma_addr_t sq_pbase;                    /* PCI memory for host rings */
+        dma_addr_t rq_pbase;                    /* PCI memory for host rings */
+
+        u16 qp_id;
+        u16 sq_head;
+        u16 sq_tail;
+        u16 sq_size;
+        u16 rq_head;
+        u16 rq_tail;
+        u16 rq_size;
+        u8 replenishing_rq;
+        u8 reserved;
+
+        spinlock_t sq_lock;
+        spinlock_t rq_lock;
+};
+
+struct nes_hw_nic_cq {
+        struct nes_hw_nic_cqe volatile *cq_vbase;       /* PCI memory for host rings */
+        void (*ce_handler)(struct nes_device *nesdev, struct nes_hw_nic_cq *cq);
+        dma_addr_t cq_pbase;    /* PCI memory for host rings */
+        int rx_cqes_completed;
+        int cqe_allocs_pending;
+        int rx_pkts_indicated;
+        u16 cq_head;
+        u16 cq_size;
+        u16 cq_number;
+        u8  cqes_pending;
+};
+
+struct nes_hw_qp {
+        struct nes_hw_qp_wqe *sq_vbase;         /* PCI memory for host rings */
+        struct nes_hw_qp_wqe *rq_vbase;         /* PCI memory for host rings */
+        void                 *q2_vbase;                 /* PCI memory for host rings */
+        dma_addr_t sq_pbase;    /* PCI memory for host rings */
+        dma_addr_t rq_pbase;    /* PCI memory for host rings */
+        dma_addr_t q2_pbase;    /* PCI memory for host rings */
+        u32 qp_id;
+        u16 sq_head;
+        u16 sq_tail;
+        u16 sq_size;
+        u16 rq_head;
+        u16 rq_tail;
+        u16 rq_size;
+        u8  rq_encoded_size;
+        u8  sq_encoded_size;
+};
+
+struct nes_hw_cq {
+        struct nes_hw_cqe volatile *cq_vbase;   /* PCI memory for host rings */
+        void (*ce_handler)(struct nes_device *nesdev, struct nes_hw_cq *cq);
+        dma_addr_t cq_pbase;    /* PCI memory for host rings */
+        u16 cq_head;
+        u16 cq_size;
+        u16 cq_number;
+};
+
+struct nes_hw_ceq {
+        struct nes_hw_ceqe volatile *ceq_vbase; /* PCI memory for host rings */
+        dma_addr_t ceq_pbase;   /* PCI memory for host rings */
+        u16 ceq_head;
+        u16 ceq_size;
+};
+
+struct nes_hw_aeq {
+        struct nes_hw_aeqe volatile *aeq_vbase; /* PCI memory for host rings */
+        dma_addr_t aeq_pbase;   /* PCI memory for host rings */
+        u16 aeq_head;
+        u16 aeq_size;
+};
+
+struct nic_qp_map {
+        u8 qpid;
+        u8 nic_index;
+        u8 logical_port;
+        u8 is_hnic;
+};
+
+#define NES_CQP_ARP_AEQ_INDEX_MASK  0x000f0000
+#define NES_CQP_ARP_AEQ_INDEX_SHIFT 16
+
+#define NES_CQP_APBVT_ADD                       0x00008000
+#define NES_CQP_APBVT_NIC_SHIFT         16
+
+#define NES_ARP_ADD     1
+#define NES_ARP_DELETE  2
+#define NES_ARP_RESOLVE 3
+
+#define NES_MAC_SW_IDLE      0
+#define NES_MAC_SW_INTERRUPT 1
+#define NES_MAC_SW_MH        2
+
+struct nes_arp_entry {
+        u32 ip_addr;
+        u8  mac_addr[ETH_ALEN];
+};
+
+#define NES_NIC_FAST_TIMER          96
+#define NES_NIC_FAST_TIMER_LOW      40
+#define NES_NIC_FAST_TIMER_HIGH     1000
+#define DEFAULT_NES_QL_HIGH         256
+#define DEFAULT_NES_QL_LOW          16
+#define DEFAULT_NES_QL_TARGET       64
+#define DEFAULT_JUMBO_NES_QL_LOW    12
+#define DEFAULT_JUMBO_NES_QL_TARGET 40
+#define DEFAULT_JUMBO_NES_QL_HIGH   128
+#define NES_NIC_CQ_DOWNWARD_TREND   8
+
+struct nes_hw_tune_timer {
+    //u16 cq_count;
+    u16 threshold_low;
+    u16 threshold_target;
+    u16 threshold_high;
+    u16 timer_in_use;
+    u16 timer_in_use_old;
+    u16 timer_in_use_min;
+    u16 timer_in_use_max;
+    u8  timer_direction_upward;
+    u8  timer_direction_downward;
+    u16 cq_count_old;
+    u8  cq_direction_downward;
+};
+
+#define NES_TIMER_INT_LIMIT         2
+#define NES_TIMER_INT_LIMIT_DYNAMIC 10
+#define NES_TIMER_ENABLE_LIMIT      4
+#define NES_MAX_LINK_INTERRUPTS         128
+#define NES_MAX_LINK_CHECK              200
+
+struct nes_adapter {
+        u64              fw_ver;
+        unsigned long    *allocated_qps;
+        unsigned long    *allocated_cqs;
+        unsigned long    *allocated_mrs;
+        unsigned long    *allocated_pds;
+        unsigned long    *allocated_arps;
+        struct nes_qp    **qp_table;
+        struct workqueue_struct *work_q;
+
+        struct list_head list;
+        struct list_head active_listeners;
+        /* list of the netdev's associated with each logical port */
+        struct list_head nesvnic_list[4];
+
+        struct timer_list  mh_timer;
+        struct timer_list  lc_timer;
+        struct work_struct work;
+        spinlock_t         resource_lock;
+        spinlock_t         phy_lock;
+        spinlock_t         pbl_lock;
+        spinlock_t         periodic_timer_lock;
+
+        struct nes_arp_entry arp_table[NES_MAX_ARP_TABLE_SIZE];
+
+        /* Adapter CEQ and AEQs */
+        struct nes_hw_ceq ceq[16];
+        struct nes_hw_aeq aeq[8];
+
+        struct nes_hw_tune_timer tune_timer;
+
+        unsigned long doorbell_start;
+
+        u32 hw_rev;
+        u32 vendor_id;
+        u32 vendor_part_id;
+        u32 device_cap_flags;
+        u32 tick_delta;
+        u32 timer_int_req;
+        u32 arp_table_size;
+        u32 next_arp_index;
+
+        u32 max_mr;
+        u32 max_256pbl;
+        u32 max_4kpbl;
+        u32 free_256pbl;
+        u32 free_4kpbl;
+        u32 max_mr_size;
+        u32 max_qp;
+        u32 next_qp;
+        u32 max_irrq;
+        u32 max_qp_wr;
+        u32 max_sge;
+        u32 max_cq;
+        u32 next_cq;
+        u32 max_cqe;
+        u32 max_pd;
+        u32 base_pd;
+        u32 next_pd;
+        u32 hte_index_mask;
+
+        /* EEPROM information */
+        u32 rx_pool_size;
+        u32 tx_pool_size;
+        u32 rx_threshold;
+        u32 tcp_timer_core_clk_divisor;
+        u32 iwarp_config;
+        u32 cm_config;
+        u32 sws_timer_config;
+        u32 tcp_config1;
+        u32 wqm_wat;
+        u32 core_clock;
+        u32 firmware_version;
+
+        u32 nic_rx_eth_route_err;
+
+        u32 et_rx_coalesce_usecs;
+        u32     et_rx_max_coalesced_frames;
+        u32 et_rx_coalesce_usecs_irq;
+        u32 et_rx_max_coalesced_frames_irq;
+        u32 et_pkt_rate_low;
+        u32 et_rx_coalesce_usecs_low;
+        u32 et_rx_max_coalesced_frames_low;
+        u32 et_pkt_rate_high;
+        u32 et_rx_coalesce_usecs_high;
+        u32 et_rx_max_coalesced_frames_high;
+        u32 et_rate_sample_interval;
+        u32 timer_int_limit;
+
+        /* Adapter base MAC address */
+        u32 mac_addr_low;
+        u16 mac_addr_high;
+
+        u16 firmware_eeprom_offset;
+        u16 software_eeprom_offset;
+
+        u16 max_irrq_wr;
+
+        /* pd config for each port */
+        u16 pd_config_size[4];
+        u16 pd_config_base[4];
+
+        u16 link_interrupt_count[4];
+
+        /* the phy index for each port */
+        u8  phy_index[4];
+        u8  mac_sw_state[4];
+        u8  mac_link_down[4];
+        u8  phy_type[4];
+
+        /* PCI information */
+        unsigned int  devfn;
+        unsigned char bus_number;
+        unsigned char OneG_Mode;
+
+        unsigned char ref_count;
+        u8            netdev_count;
+        u8            netdev_max;       /* from host nic address count in EEPROM */
+        u8            port_count;
+        u8            virtwq;
+        u8            et_use_adaptive_rx_coalesce;
+        u8            adapter_fcn_count;
+};
+
+struct nes_pbl {
+        u64              *pbl_vbase;
+        dma_addr_t       pbl_pbase;
+        struct page      *page;
+        unsigned long    user_base;
+        u32              pbl_size;
+        struct list_head list;
+        /* TODO: need to add list for two level tables */
+};
+
+struct nes_listener {
+        struct work_struct      work;
+        struct workqueue_struct *wq;
+        struct nes_vnic         *nesvnic;
+        struct iw_cm_id         *cm_id;
+        struct list_head        list;
+        unsigned long           socket;
+        u8                      accept_failed;
+};
+
+struct nes_ib_device;
+
+struct nes_vnic {
+        struct nes_ib_device *nesibdev;
+        u64 sq_full;
+        u64 sq_locked;
+        u64 tso_requests;
+        u64 segmented_tso_requests;
+        u64 linearized_skbs;
+        u64 tx_sw_dropped;
+        u64 endnode_nstat_rx_discard;
+        u64 endnode_nstat_rx_octets;
+        u64 endnode_nstat_rx_frames;
+        u64 endnode_nstat_tx_octets;
+        u64 endnode_nstat_tx_frames;
+        u64 endnode_ipv4_tcp_retransmits;
+        /* void *mem; */
+        struct nes_device *nesdev;
+        struct net_device *netdev;
+        struct vlan_group *vlan_grp;
+        atomic_t          rx_skbs_needed;
+        atomic_t          rx_skb_timer_running;
+        int               budget;
+        u32               msg_enable;
+        /* u32 tx_avail; */
+        __be32            local_ipaddr;
+        struct napi_struct   napi;
+        spinlock_t           tx_lock;   /* could use netdev tx lock? */
+        struct timer_list    rq_wqes_timer;
+        u32                  nic_mem_size;
+        void                 *nic_vbase;
+        dma_addr_t           nic_pbase;
+        struct nes_hw_nic    nic;
+        struct nes_hw_nic_cq nic_cq;
+        u32    mcrq_qp_id;
+        struct nes_ucontext *mcrq_ucontext;
+        struct nes_cqp_request* (*get_cqp_request)(struct nes_device *nesdev);
+        void (*post_cqp_request)(struct nes_device*, struct nes_cqp_request *, int);
+        int (*mcrq_mcast_filter)( struct nes_vnic* nesvnic, __u8* dmi_addr );
+        struct net_device_stats netstats;
+        /* used to put the netdev on the adapters logical port list */
+        struct list_head list;
+        u16 max_frame_size;
+        u8  netdev_open;
+        u8  linkup;
+        u8  logical_port;
+        u8  netdev_index;  /* might not be needed, indexes nesdev->netdev */
+        u8  perfect_filter_index;
+        u8  nic_index;
+        u8  qp_nic_index[4];
+        u8  next_qp_nic_index;
+        u8  of_device_registered;
+        u8  rdma_enabled;
+        u8  rx_checksum_disabled;
+};
+
+struct nes_ib_device {
+        struct ib_device ibdev;
+        struct nes_vnic *nesvnic;
+
+        /* Virtual RNIC Limits */
+        u32 max_mr;
+        u32 max_qp;
+        u32 max_cq;
+        u32 max_pd;
+        u32 num_mr;
+        u32 num_qp;
+        u32 num_cq;
+        u32 num_pd;
+};
+
+#define nes_vlan_rx vlan_hwaccel_receive_skb
+#define nes_netif_rx netif_receive_skb
+
+#endif          /* __NES_HW_H */
diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c
new file mode 100644
index 000000000000..b6cc265aa9a4
--- /dev/null
+++ b/drivers/infiniband/hw/nes/nes_nic.c
@@ -0,0 +1,1703 @@
+/*
+ * Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/ip.h>
+#include <linux/tcp.h>
+#include <linux/if_arp.h>
+#include <linux/if_vlan.h>
+#include <linux/ethtool.h>
+#include <net/tcp.h>
+
+#include <net/inet_common.h>
+#include <linux/inet.h>
+
+#include "nes.h"
+
+static struct nic_qp_map nic_qp_mapping_0[] = {
+        {16,0,0,1},{24,4,0,0},{28,8,0,0},{32,12,0,0},
+        {20,2,2,1},{26,6,2,0},{30,10,2,0},{34,14,2,0},
+        {18,1,1,1},{25,5,1,0},{29,9,1,0},{33,13,1,0},
+        {22,3,3,1},{27,7,3,0},{31,11,3,0},{35,15,3,0}
+};
+
+static struct nic_qp_map nic_qp_mapping_1[] = {
+        {18,1,1,1},{25,5,1,0},{29,9,1,0},{33,13,1,0},
+        {22,3,3,1},{27,7,3,0},{31,11,3,0},{35,15,3,0}
+};
+
+static struct nic_qp_map nic_qp_mapping_2[] = {
+        {20,2,2,1},{26,6,2,0},{30,10,2,0},{34,14,2,0}
+};
+
+static struct nic_qp_map nic_qp_mapping_3[] = {
+        {22,3,3,1},{27,7,3,0},{31,11,3,0},{35,15,3,0}
+};
+
+static struct nic_qp_map nic_qp_mapping_4[] = {
+        {28,8,0,0},{32,12,0,0}
+};
+
+static struct nic_qp_map nic_qp_mapping_5[] = {
+        {29,9,1,0},{33,13,1,0}
+};
+
+static struct nic_qp_map nic_qp_mapping_6[] = {
+        {30,10,2,0},{34,14,2,0}
+};
+
+static struct nic_qp_map nic_qp_mapping_7[] = {
+        {31,11,3,0},{35,15,3,0}
+};
+
+static struct nic_qp_map *nic_qp_mapping_per_function[] = {
+        nic_qp_mapping_0, nic_qp_mapping_1, nic_qp_mapping_2, nic_qp_mapping_3,
+        nic_qp_mapping_4, nic_qp_mapping_5, nic_qp_mapping_6, nic_qp_mapping_7
+};
+
+static const u32 default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
+                | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
+static int debug = -1;
+
+
+static int nes_netdev_open(struct net_device *);
+static int nes_netdev_stop(struct net_device *);
+static int nes_netdev_start_xmit(struct sk_buff *, struct net_device *);
+static struct net_device_stats *nes_netdev_get_stats(struct net_device *);
+static void nes_netdev_tx_timeout(struct net_device *);
+static int nes_netdev_set_mac_address(struct net_device *, void *);
+static int nes_netdev_change_mtu(struct net_device *, int);
+
+/**
+ * nes_netdev_poll
+ */
+static int nes_netdev_poll(struct napi_struct *napi, int budget)
+{
+        struct nes_vnic *nesvnic = container_of(napi, struct nes_vnic, napi);
+        struct net_device *netdev = nesvnic->netdev;
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_hw_nic_cq *nescq = &nesvnic->nic_cq;
+
+        nesvnic->budget = budget;
+        nescq->cqes_pending = 0;
+        nescq->rx_cqes_completed = 0;
+        nescq->cqe_allocs_pending = 0;
+        nescq->rx_pkts_indicated = 0;
+
+        nes_nic_ce_handler(nesdev, nescq);
+
+        if (nescq->cqes_pending == 0) {
+                netif_rx_complete(netdev, napi);
+                /* clear out completed cqes and arm */
+                nes_write32(nesdev->regs+NES_CQE_ALLOC, NES_CQE_ALLOC_NOTIFY_NEXT |
+                                nescq->cq_number | (nescq->cqe_allocs_pending << 16));
+                nes_read32(nesdev->regs+NES_CQE_ALLOC);
+        } else {
+                /* clear out completed cqes but don't arm */
+                nes_write32(nesdev->regs+NES_CQE_ALLOC,
+                                nescq->cq_number | (nescq->cqe_allocs_pending << 16));
+                nes_debug(NES_DBG_NETDEV, "%s: exiting with work pending\n",
+                                nesvnic->netdev->name);
+        }
+        return nescq->rx_pkts_indicated;
+}
+
+
+/**
+ * nes_netdev_open - Activate the network interface; ifconfig
+ * ethx up.
+ */
+static int nes_netdev_open(struct net_device *netdev)
+{
+        u32 macaddr_low;
+        u16 macaddr_high;
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        int ret;
+        int i;
+        struct nes_vnic *first_nesvnic;
+        u32 nic_active_bit;
+        u32 nic_active;
+
+        assert(nesdev != NULL);
+
+        first_nesvnic = list_entry(nesdev->nesadapter->nesvnic_list[nesdev->mac_index].next,
+                        struct nes_vnic, list);
+
+        if (netif_msg_ifup(nesvnic))
+                printk(KERN_INFO PFX "%s: enabling interface\n", netdev->name);
+
+        ret = nes_init_nic_qp(nesdev, netdev);
+        if (ret) {
+                return ret;
+        }
+
+        netif_carrier_off(netdev);
+        netif_stop_queue(netdev);
+
+        if ((!nesvnic->of_device_registered) && (nesvnic->rdma_enabled)) {
+                nesvnic->nesibdev = nes_init_ofa_device(netdev);
+                if (nesvnic->nesibdev == NULL) {
+                        printk(KERN_ERR PFX "%s: nesvnic->nesibdev alloc failed", netdev->name);
+                } else {
+                        nesvnic->nesibdev->nesvnic = nesvnic;
+                        ret = nes_register_ofa_device(nesvnic->nesibdev);
+                        if (ret) {
+                                printk(KERN_ERR PFX "%s: Unable to register RDMA device, ret = %d\n",
+                                                netdev->name, ret);
+                        }
+                }
+        }
+        /* Set packet filters */
+        nic_active_bit = 1 << nesvnic->nic_index;
+        nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_ACTIVE);
+        nic_active |= nic_active_bit;
+        nes_write_indexed(nesdev, NES_IDX_NIC_ACTIVE, nic_active);
+        nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_MULTICAST_ENABLE);
+        nic_active |= nic_active_bit;
+        nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ENABLE, nic_active);
+        nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON);
+        nic_active |= nic_active_bit;
+        nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active);
+
+        macaddr_high = ((u16)netdev->dev_addr[0]) << 8;
+        macaddr_high += (u16)netdev->dev_addr[1];
+        macaddr_low = ((u32)netdev->dev_addr[2]) << 24;
+        macaddr_low += ((u32)netdev->dev_addr[3]) << 16;
+        macaddr_low += ((u32)netdev->dev_addr[4]) << 8;
+        macaddr_low += (u32)netdev->dev_addr[5];
+
+        /* Program the various MAC regs */
+        for (i = 0; i < NES_MAX_PORT_COUNT; i++) {
+                if (nesvnic->qp_nic_index[i] == 0xf) {
+                        break;
+                }
+                nes_debug(NES_DBG_NETDEV, "i=%d, perfect filter table index= %d, PERF FILTER LOW"
+                                " (Addr:%08X) = %08X, HIGH = %08X.\n",
+                                i, nesvnic->qp_nic_index[i],
+                                NES_IDX_PERFECT_FILTER_LOW+((nesvnic->perfect_filter_index + i) * 8),
+                                macaddr_low,
+                                (u32)macaddr_high | NES_MAC_ADDR_VALID |
+                                ((((u32)nesvnic->nic_index) << 16)));
+                nes_write_indexed(nesdev,
+                                NES_IDX_PERFECT_FILTER_LOW + (nesvnic->qp_nic_index[i] * 8),
+                                macaddr_low);
+                nes_write_indexed(nesdev,
+                                NES_IDX_PERFECT_FILTER_HIGH + (nesvnic->qp_nic_index[i] * 8),
+                                (u32)macaddr_high | NES_MAC_ADDR_VALID |
+                                ((((u32)nesvnic->nic_index) << 16)));
+        }
+
+
+        nes_write32(nesdev->regs+NES_CQE_ALLOC, NES_CQE_ALLOC_NOTIFY_NEXT |
+                        nesvnic->nic_cq.cq_number);
+        nes_read32(nesdev->regs+NES_CQE_ALLOC);
+
+        if (first_nesvnic->linkup) {
+                /* Enable network packets */
+                nesvnic->linkup = 1;
+                netif_start_queue(netdev);
+                netif_carrier_on(netdev);
+        }
+        napi_enable(&nesvnic->napi);
+        nesvnic->netdev_open = 1;
+
+        return 0;
+}
+
+
+/**
+ * nes_netdev_stop
+ */
+static int nes_netdev_stop(struct net_device *netdev)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        u32 nic_active_mask;
+        u32 nic_active;
+
+        nes_debug(NES_DBG_SHUTDOWN, "nesvnic=%p, nesdev=%p, netdev=%p %s\n",
+                        nesvnic, nesdev, netdev, netdev->name);
+        if (nesvnic->netdev_open == 0)
+                return 0;
+
+        if (netif_msg_ifdown(nesvnic))
+                printk(KERN_INFO PFX "%s: disabling interface\n", netdev->name);
+
+        /* Disable network packets */
+        napi_disable(&nesvnic->napi);
+        netif_stop_queue(netdev);
+        if ((nesdev->netdev[0] == netdev) & (nesvnic->logical_port == nesdev->mac_index)) {
+                nes_write_indexed(nesdev,
+                                NES_IDX_MAC_INT_MASK+(0x200*nesdev->mac_index), 0xffffffff);
+        }
+
+        nic_active_mask = ~((u32)(1 << nesvnic->nic_index));
+        nes_write_indexed(nesdev, NES_IDX_PERFECT_FILTER_HIGH+
+                        (nesvnic->perfect_filter_index*8), 0);
+        nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_ACTIVE);
+        nic_active &= nic_active_mask;
+        nes_write_indexed(nesdev, NES_IDX_NIC_ACTIVE, nic_active);
+        nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL);
+        nic_active &= nic_active_mask;
+        nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL, nic_active);
+        nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_MULTICAST_ENABLE);
+        nic_active &= nic_active_mask;
+        nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ENABLE, nic_active);
+        nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL);
+        nic_active &= nic_active_mask;
+        nes_write_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL, nic_active);
+        nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON);
+        nic_active &= nic_active_mask;
+        nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active);
+
+
+        if (nesvnic->of_device_registered) {
+                nes_destroy_ofa_device(nesvnic->nesibdev);
+                nesvnic->nesibdev = NULL;
+                nesvnic->of_device_registered = 0;
+        }
+        nes_destroy_nic_qp(nesvnic);
+
+        nesvnic->netdev_open = 0;
+
+        return 0;
+}
+
+
+/**
+ * nes_nic_send
+ */
+static int nes_nic_send(struct sk_buff *skb, struct net_device *netdev)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_hw_nic *nesnic = &nesvnic->nic;
+        struct nes_hw_nic_sq_wqe *nic_sqe;
+        struct tcphdr *tcph;
+        __le16 *wqe_fragment_length;
+        u32 wqe_misc;
+        u16 wqe_fragment_index = 1;     /* first fragment (0) is used by copy buffer */
+        u16 skb_fragment_index;
+        dma_addr_t bus_address;
+
+        nic_sqe = &nesnic->sq_vbase[nesnic->sq_head];
+        wqe_fragment_length = (__le16 *)&nic_sqe->wqe_words[NES_NIC_SQ_WQE_LENGTH_0_TAG_IDX];
+
+        /* setup the VLAN tag if present */
+        if (vlan_tx_tag_present(skb)) {
+                nes_debug(NES_DBG_NIC_TX, "%s: VLAN packet to send... VLAN = %08X\n",
+                                netdev->name, vlan_tx_tag_get(skb));
+                wqe_misc = NES_NIC_SQ_WQE_TAGVALUE_ENABLE;
+                wqe_fragment_length[0] = (__force __le16) vlan_tx_tag_get(skb);
+        } else
+                wqe_misc = 0;
+
+        /* bump past the vlan tag */
+        wqe_fragment_length++;
+        /*      wqe_fragment_address = (u64 *)&nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX]; */
+
+        if (skb->ip_summed == CHECKSUM_PARTIAL) {
+                tcph = tcp_hdr(skb);
+                if (1) {
+                        if (skb_is_gso(skb)) {
+                                /* nes_debug(NES_DBG_NIC_TX, "%s: TSO request... seg size = %u\n",
+                                                netdev->name, skb_is_gso(skb)); */
+                                wqe_misc |= NES_NIC_SQ_WQE_LSO_ENABLE |
+                                                NES_NIC_SQ_WQE_COMPLETION | (u16)skb_is_gso(skb);
+                                set_wqe_32bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_LSO_INFO_IDX,
+                                                ((u32)tcph->doff) |
+                                                (((u32)(((unsigned char *)tcph) - skb->data)) << 4));
+                        } else {
+                                wqe_misc |= NES_NIC_SQ_WQE_COMPLETION;
+                        }
+                }
+        } else {        /* CHECKSUM_HW */
+                wqe_misc |= NES_NIC_SQ_WQE_DISABLE_CHKSUM | NES_NIC_SQ_WQE_COMPLETION;
+        }
+
+        set_wqe_32bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_TOTAL_LENGTH_IDX,
+                                skb->len);
+        memcpy(&nesnic->first_frag_vbase[nesnic->sq_head].buffer,
+                        skb->data, min(((unsigned int)NES_FIRST_FRAG_SIZE), skb_headlen(skb)));
+        wqe_fragment_length[0] = cpu_to_le16(min(((unsigned int)NES_FIRST_FRAG_SIZE),
+                        skb_headlen(skb)));
+        wqe_fragment_length[1] = 0;
+        if (skb_headlen(skb) > NES_FIRST_FRAG_SIZE) {
+                if ((skb_shinfo(skb)->nr_frags + 1) > 4) {
+                        nes_debug(NES_DBG_NIC_TX, "%s: Packet with %u fragments not sent, skb_headlen=%u\n",
+                                        netdev->name, skb_shinfo(skb)->nr_frags + 2, skb_headlen(skb));
+                        kfree_skb(skb);
+                        nesvnic->tx_sw_dropped++;
+                        return NETDEV_TX_LOCKED;
+                }
+                set_bit(nesnic->sq_head, nesnic->first_frag_overflow);
+                bus_address = pci_map_single(nesdev->pcidev, skb->data + NES_FIRST_FRAG_SIZE,
+                                skb_headlen(skb) - NES_FIRST_FRAG_SIZE, PCI_DMA_TODEVICE);
+                wqe_fragment_length[wqe_fragment_index++] =
+                                cpu_to_le16(skb_headlen(skb) - NES_FIRST_FRAG_SIZE);
+                wqe_fragment_length[wqe_fragment_index] = 0;
+                set_wqe_64bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_FRAG1_LOW_IDX,
+                                ((u64)(bus_address)));
+                nesnic->tx_skb[nesnic->sq_head] = skb;
+        }
+
+        if (skb_headlen(skb) == skb->len) {
+                if (skb_headlen(skb) <= NES_FIRST_FRAG_SIZE) {
+                        nic_sqe->wqe_words[NES_NIC_SQ_WQE_LENGTH_2_1_IDX] = 0;
+                        nesnic->tx_skb[nesnic->sq_head] = NULL;
+                        dev_kfree_skb(skb);
+                }
+        } else {
+                /* Deal with Fragments */
+                nesnic->tx_skb[nesnic->sq_head] = skb;
+                for (skb_fragment_index = 0; skb_fragment_index < skb_shinfo(skb)->nr_frags;
+                                skb_fragment_index++) {
+                        bus_address = pci_map_page( nesdev->pcidev,
+                                        skb_shinfo(skb)->frags[skb_fragment_index].page,
+                                        skb_shinfo(skb)->frags[skb_fragment_index].page_offset,
+                                        skb_shinfo(skb)->frags[skb_fragment_index].size,
+                                        PCI_DMA_TODEVICE);
+                        wqe_fragment_length[wqe_fragment_index] =
+                                        cpu_to_le16(skb_shinfo(skb)->frags[skb_fragment_index].size);
+                        set_wqe_64bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_FRAG0_LOW_IDX+(2*wqe_fragment_index),
+                                bus_address);
+                        wqe_fragment_index++;
+                        if (wqe_fragment_index < 5)
+                                wqe_fragment_length[wqe_fragment_index] = 0;
+                }
+        }
+
+        set_wqe_32bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_MISC_IDX, wqe_misc);
+        nesnic->sq_head++;
+        nesnic->sq_head &= nesnic->sq_size - 1;
+
+        return NETDEV_TX_OK;
+}
+
+
+/**
+ * nes_netdev_start_xmit
+ */
+static int nes_netdev_start_xmit(struct sk_buff *skb, struct net_device *netdev)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_hw_nic *nesnic = &nesvnic->nic;
+        struct nes_hw_nic_sq_wqe *nic_sqe;
+        struct tcphdr *tcph;
+        /* struct udphdr *udph; */
+#define NES_MAX_TSO_FRAGS 18
+        /* 64K segment plus overflow on each side */
+        dma_addr_t tso_bus_address[NES_MAX_TSO_FRAGS];
+        dma_addr_t bus_address;
+        u32 tso_frag_index;
+        u32 tso_frag_count;
+        u32 tso_wqe_length;
+        u32 curr_tcp_seq;
+        u32 wqe_count=1;
+        u32 send_rc;
+        struct iphdr *iph;
+        unsigned long flags;
+        __le16 *wqe_fragment_length;
+        u32 nr_frags;
+        u32 original_first_length;
+//      u64 *wqe_fragment_address;
+        /* first fragment (0) is used by copy buffer */
+        u16 wqe_fragment_index=1;
+        u16 hoffset;
+        u16 nhoffset;
+        u16 wqes_needed;
+        u16 wqes_available;
+        u32 old_head;
+        u32 wqe_misc;
+
+        /* nes_debug(NES_DBG_NIC_TX, "%s Request to tx NIC packet length %u, headlen %u,"
+                        " (%u frags), tso_size=%u\n",
+                        netdev->name, skb->len, skb_headlen(skb),
+                        skb_shinfo(skb)->nr_frags, skb_is_gso(skb));
+        */
+
+        if (!netif_carrier_ok(netdev))
+                return NETDEV_TX_OK;
+
+        if (netif_queue_stopped(netdev))
+                return NETDEV_TX_BUSY;
+
+        local_irq_save(flags);
+        if (!spin_trylock(&nesnic->sq_lock)) {
+                local_irq_restore(flags);
+                nesvnic->sq_locked++;
+                return NETDEV_TX_LOCKED;
+        }
+
+        /* Check if SQ is full */
+        if ((((nesnic->sq_tail+(nesnic->sq_size*2))-nesnic->sq_head) & (nesnic->sq_size - 1)) == 1) {
+                if (!netif_queue_stopped(netdev)) {
+                        netif_stop_queue(netdev);
+                        barrier();
+                        if ((((((volatile u16)nesnic->sq_tail)+(nesnic->sq_size*2))-nesnic->sq_head) & (nesnic->sq_size - 1)) != 1) {
+                                netif_start_queue(netdev);
+                                goto sq_no_longer_full;
+                        }
+                }
+                nesvnic->sq_full++;
+                spin_unlock_irqrestore(&nesnic->sq_lock, flags);
+                return NETDEV_TX_BUSY;
+        }
+
+sq_no_longer_full:
+        nr_frags = skb_shinfo(skb)->nr_frags;
+        if (skb_headlen(skb) > NES_FIRST_FRAG_SIZE) {
+                nr_frags++;
+        }
+        /* Check if too many fragments */
+        if (unlikely((nr_frags > 4))) {
+                if (skb_is_gso(skb)) {
+                        nesvnic->segmented_tso_requests++;
+                        nesvnic->tso_requests++;
+                        old_head = nesnic->sq_head;
+                        /* Basically 4 fragments available per WQE with extended fragments */
+                        wqes_needed = nr_frags >> 2;
+                        wqes_needed += (nr_frags&3)?1:0;
+                        wqes_available = (((nesnic->sq_tail+nesnic->sq_size)-nesnic->sq_head) - 1) &
+                                        (nesnic->sq_size - 1);
+
+                        if (unlikely(wqes_needed > wqes_available)) {
+                                if (!netif_queue_stopped(netdev)) {
+                                        netif_stop_queue(netdev);
+                                        barrier();
+                                        wqes_available = (((((volatile u16)nesnic->sq_tail)+nesnic->sq_size)-nesnic->sq_head) - 1) &
+                                                (nesnic->sq_size - 1);
+                                        if (wqes_needed <= wqes_available) {
+                                                netif_start_queue(netdev);
+                                                goto tso_sq_no_longer_full;
+                                        }
+                                }
+                                nesvnic->sq_full++;
+                                spin_unlock_irqrestore(&nesnic->sq_lock, flags);
+                                nes_debug(NES_DBG_NIC_TX, "%s: HNIC SQ full- TSO request has too many frags!\n",
+                                                netdev->name);
+                                return NETDEV_TX_BUSY;
+                        }
+tso_sq_no_longer_full:
+                        /* Map all the buffers */
+                        for (tso_frag_count=0; tso_frag_count < skb_shinfo(skb)->nr_frags;
+                                        tso_frag_count++) {
+                                tso_bus_address[tso_frag_count] = pci_map_page( nesdev->pcidev,
+                                                skb_shinfo(skb)->frags[tso_frag_count].page,
+                                                skb_shinfo(skb)->frags[tso_frag_count].page_offset,
+                                                skb_shinfo(skb)->frags[tso_frag_count].size,
+                                                PCI_DMA_TODEVICE);
+                        }
+
+                        tso_frag_index = 0;
+                        curr_tcp_seq = ntohl(tcp_hdr(skb)->seq);
+                        hoffset = skb_transport_header(skb) - skb->data;
+                        nhoffset = skb_network_header(skb) - skb->data;
+                        original_first_length = hoffset + ((((struct tcphdr *)skb_transport_header(skb))->doff)<<2);
+
+                        for (wqe_count=0; wqe_count<((u32)wqes_needed); wqe_count++) {
+                                tso_wqe_length = 0;
+                                nic_sqe = &nesnic->sq_vbase[nesnic->sq_head];
+                                wqe_fragment_length =
+                                                (__le16 *)&nic_sqe->wqe_words[NES_NIC_SQ_WQE_LENGTH_0_TAG_IDX];
+                                /* setup the VLAN tag if present */
+                                if (vlan_tx_tag_present(skb)) {
+                                        nes_debug(NES_DBG_NIC_TX, "%s: VLAN packet to send... VLAN = %08X\n",
+                                                        netdev->name, vlan_tx_tag_get(skb) );
+                                        wqe_misc = NES_NIC_SQ_WQE_TAGVALUE_ENABLE;
+                                        wqe_fragment_length[0] = (__force __le16) vlan_tx_tag_get(skb);
+                                } else
+                                        wqe_misc = 0;
+
+                                /* bump past the vlan tag */
+                                wqe_fragment_length++;
+
+                                /* Assumes header totally fits in allocated buffer and is in first fragment */
+                                if (original_first_length > NES_FIRST_FRAG_SIZE) {
+                                        nes_debug(NES_DBG_NIC_TX, "ERROR: SKB header too big, headlen=%u, FIRST_FRAG_SIZE=%u\n",
+                                                        original_first_length, NES_FIRST_FRAG_SIZE);
+                                        nes_debug(NES_DBG_NIC_TX, "%s Request to tx NIC packet length %u, headlen %u,"
+                                                        " (%u frags), tso_size=%u\n",
+                                                        netdev->name,
+                                                        skb->len, skb_headlen(skb),
+                                                        skb_shinfo(skb)->nr_frags, skb_is_gso(skb));
+                                }
+                                memcpy(&nesnic->first_frag_vbase[nesnic->sq_head].buffer,
+                                                skb->data, min(((unsigned int)NES_FIRST_FRAG_SIZE),
+                                                original_first_length));
+                                iph = (struct iphdr *)
+                                (&nesnic->first_frag_vbase[nesnic->sq_head].buffer[nhoffset]);
+                                tcph = (struct tcphdr *)
+                                (&nesnic->first_frag_vbase[nesnic->sq_head].buffer[hoffset]);
+                                if ((wqe_count+1)!=(u32)wqes_needed) {
+                                        tcph->fin = 0;
+                                        tcph->psh = 0;
+                                        tcph->rst = 0;
+                                        tcph->urg = 0;
+                                }
+                                if (wqe_count) {
+                                        tcph->syn = 0;
+                                }
+                                tcph->seq = htonl(curr_tcp_seq);
+                                wqe_fragment_length[0] = cpu_to_le16(min(((unsigned int)NES_FIRST_FRAG_SIZE),
+                                                original_first_length));
+
+                                wqe_fragment_index = 1;
+                                if ((wqe_count==0) && (skb_headlen(skb) > original_first_length)) {
+                                        set_bit(nesnic->sq_head, nesnic->first_frag_overflow);
+                                        bus_address = pci_map_single(nesdev->pcidev, skb->data + original_first_length,
+                                                        skb_headlen(skb) - original_first_length, PCI_DMA_TODEVICE);
+                                        wqe_fragment_length[wqe_fragment_index++] =
+                                                cpu_to_le16(skb_headlen(skb) - original_first_length);
+                                        wqe_fragment_length[wqe_fragment_index] = 0;
+                                        set_wqe_64bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_FRAG1_LOW_IDX,
+                                                                        bus_address);
+                                }
+                                while (wqe_fragment_index < 5) {
+                                        wqe_fragment_length[wqe_fragment_index] =
+                                                        cpu_to_le16(skb_shinfo(skb)->frags[tso_frag_index].size);
+                                        set_wqe_64bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_FRAG0_LOW_IDX+(2*wqe_fragment_index),
+                                                (u64)tso_bus_address[tso_frag_index]);
+                                        wqe_fragment_index++;
+                                        tso_wqe_length += skb_shinfo(skb)->frags[tso_frag_index++].size;
+                                        if (wqe_fragment_index < 5)
+                                                wqe_fragment_length[wqe_fragment_index] = 0;
+                                        if (tso_frag_index == tso_frag_count)
+                                                break;
+                                }
+                                if ((wqe_count+1) == (u32)wqes_needed) {
+                                        nesnic->tx_skb[nesnic->sq_head] = skb;
+                                } else {
+                                        nesnic->tx_skb[nesnic->sq_head] = NULL;
+                                }
+                                wqe_misc |= NES_NIC_SQ_WQE_COMPLETION | (u16)skb_is_gso(skb);
+                                if ((tso_wqe_length + original_first_length) > skb_is_gso(skb)) {
+                                        wqe_misc |= NES_NIC_SQ_WQE_LSO_ENABLE;
+                                } else {
+                                        iph->tot_len = htons(tso_wqe_length + original_first_length - nhoffset);
+                                }
+
+                                set_wqe_32bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_MISC_IDX,
+                                                 wqe_misc);
+                                set_wqe_32bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_LSO_INFO_IDX,
+                                                ((u32)tcph->doff) | (((u32)hoffset) << 4));
+
+                                set_wqe_32bit_value(nic_sqe->wqe_words, NES_NIC_SQ_WQE_TOTAL_LENGTH_IDX,
+                                                tso_wqe_length + original_first_length);
+                                curr_tcp_seq += tso_wqe_length;
+                                nesnic->sq_head++;
+                                nesnic->sq_head &= nesnic->sq_size-1;
+                        }
+                } else {
+                        nesvnic->linearized_skbs++;
+                        hoffset = skb_transport_header(skb) - skb->data;
+                        nhoffset = skb_network_header(skb) - skb->data;
+                        skb_linearize(skb);
+                        skb_set_transport_header(skb, hoffset);
+                        skb_set_network_header(skb, nhoffset);
+                        send_rc = nes_nic_send(skb, netdev);
+                        if (send_rc != NETDEV_TX_OK) {
+                                spin_unlock_irqrestore(&nesnic->sq_lock, flags);
+                                return NETDEV_TX_OK;
+                        }
+                }
+        } else {
+                send_rc = nes_nic_send(skb, netdev);
+                if (send_rc != NETDEV_TX_OK) {
+                        spin_unlock_irqrestore(&nesnic->sq_lock, flags);
+                        return NETDEV_TX_OK;
+                }
+        }
+
+        barrier();
+
+        if (wqe_count)
+                nes_write32(nesdev->regs+NES_WQE_ALLOC,
+                                (wqe_count << 24) | (1 << 23) | nesvnic->nic.qp_id);
+
+        netdev->trans_start = jiffies;
+        spin_unlock_irqrestore(&nesnic->sq_lock, flags);
+
+        return NETDEV_TX_OK;
+}
+
+
+/**
+ * nes_netdev_get_stats
+ */
+static struct net_device_stats *nes_netdev_get_stats(struct net_device *netdev)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        u64 u64temp;
+        u32 u32temp;
+
+        u32temp = nes_read_indexed(nesdev,
+                        NES_IDX_ENDNODE0_NSTAT_RX_DISCARD + (nesvnic->nic_index*0x200));
+        nesvnic->netstats.rx_dropped += u32temp;
+        nesvnic->endnode_nstat_rx_discard += u32temp;
+
+        u64temp = (u64)nes_read_indexed(nesdev,
+                        NES_IDX_ENDNODE0_NSTAT_RX_OCTETS_LO + (nesvnic->nic_index*0x200));
+        u64temp += ((u64)nes_read_indexed(nesdev,
+                        NES_IDX_ENDNODE0_NSTAT_RX_OCTETS_HI + (nesvnic->nic_index*0x200))) << 32;
+
+        nesvnic->endnode_nstat_rx_octets += u64temp;
+        nesvnic->netstats.rx_bytes += u64temp;
+
+        u64temp = (u64)nes_read_indexed(nesdev,
+                        NES_IDX_ENDNODE0_NSTAT_RX_FRAMES_LO + (nesvnic->nic_index*0x200));
+        u64temp += ((u64)nes_read_indexed(nesdev,
+                        NES_IDX_ENDNODE0_NSTAT_RX_FRAMES_HI + (nesvnic->nic_index*0x200))) << 32;
+
+        nesvnic->endnode_nstat_rx_frames += u64temp;
+        nesvnic->netstats.rx_packets += u64temp;
+
+        u64temp = (u64)nes_read_indexed(nesdev,
+                        NES_IDX_ENDNODE0_NSTAT_TX_OCTETS_LO + (nesvnic->nic_index*0x200));
+        u64temp += ((u64)nes_read_indexed(nesdev,
+                        NES_IDX_ENDNODE0_NSTAT_TX_OCTETS_HI + (nesvnic->nic_index*0x200))) << 32;
+
+        nesvnic->endnode_nstat_tx_octets += u64temp;
+        nesvnic->netstats.tx_bytes += u64temp;
+
+        u64temp = (u64)nes_read_indexed(nesdev,
+                        NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_LO + (nesvnic->nic_index*0x200));
+        u64temp += ((u64)nes_read_indexed(nesdev,
+                        NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_HI + (nesvnic->nic_index*0x200))) << 32;
+
+        nesvnic->endnode_nstat_tx_frames += u64temp;
+        nesvnic->netstats.tx_packets += u64temp;
+
+        u32temp = nes_read_indexed(nesdev,
+                        NES_IDX_MAC_RX_SHORT_FRAMES + (nesvnic->nesdev->mac_index*0x200));
+        nesvnic->netstats.rx_dropped += u32temp;
+        nesvnic->nesdev->mac_rx_errors += u32temp;
+        nesvnic->nesdev->mac_rx_short_frames += u32temp;
+
+        u32temp = nes_read_indexed(nesdev,
+                        NES_IDX_MAC_RX_OVERSIZED_FRAMES + (nesvnic->nesdev->mac_index*0x200));
+        nesvnic->netstats.rx_dropped += u32temp;
+        nesvnic->nesdev->mac_rx_errors += u32temp;
+        nesvnic->nesdev->mac_rx_oversized_frames += u32temp;
+
+        u32temp = nes_read_indexed(nesdev,
+                        NES_IDX_MAC_RX_JABBER_FRAMES + (nesvnic->nesdev->mac_index*0x200));
+        nesvnic->netstats.rx_dropped += u32temp;
+        nesvnic->nesdev->mac_rx_errors += u32temp;
+        nesvnic->nesdev->mac_rx_jabber_frames += u32temp;
+
+        u32temp = nes_read_indexed(nesdev,
+                        NES_IDX_MAC_RX_SYMBOL_ERR_FRAMES + (nesvnic->nesdev->mac_index*0x200));
+        nesvnic->netstats.rx_dropped += u32temp;
+        nesvnic->nesdev->mac_rx_errors += u32temp;
+        nesvnic->nesdev->mac_rx_symbol_err_frames += u32temp;
+
+        u32temp = nes_read_indexed(nesdev,
+                        NES_IDX_MAC_RX_LENGTH_ERR_FRAMES + (nesvnic->nesdev->mac_index*0x200));
+        nesvnic->netstats.rx_length_errors += u32temp;
+        nesvnic->nesdev->mac_rx_errors += u32temp;
+
+        u32temp = nes_read_indexed(nesdev,
+                        NES_IDX_MAC_RX_CRC_ERR_FRAMES + (nesvnic->nesdev->mac_index*0x200));
+        nesvnic->nesdev->mac_rx_errors += u32temp;
+        nesvnic->nesdev->mac_rx_crc_errors += u32temp;
+        nesvnic->netstats.rx_crc_errors += u32temp;
+
+        u32temp = nes_read_indexed(nesdev,
+                        NES_IDX_MAC_TX_ERRORS + (nesvnic->nesdev->mac_index*0x200));
+        nesvnic->nesdev->mac_tx_errors += u32temp;
+        nesvnic->netstats.tx_errors += u32temp;
+
+        return &nesvnic->netstats;
+}
+
+
+/**
+ * nes_netdev_tx_timeout
+ */
+static void nes_netdev_tx_timeout(struct net_device *netdev)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+
+        if (netif_msg_timer(nesvnic))
+                nes_debug(NES_DBG_NIC_TX, "%s: tx timeout\n", netdev->name);
+}
+
+
+/**
+ * nes_netdev_set_mac_address
+ */
+static int nes_netdev_set_mac_address(struct net_device *netdev, void *p)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct sockaddr *mac_addr = p;
+        int i;
+        u32 macaddr_low;
+        u16 macaddr_high;
+
+        if (!is_valid_ether_addr(mac_addr->sa_data))
+                return -EADDRNOTAVAIL;
+
+        memcpy(netdev->dev_addr, mac_addr->sa_data, netdev->addr_len);
+        printk(PFX "%s: Address length = %d, Address = %02X%02X%02X%02X%02X%02X..\n",
+                   __FUNCTION__, netdev->addr_len,
+                   mac_addr->sa_data[0], mac_addr->sa_data[1],
+                   mac_addr->sa_data[2], mac_addr->sa_data[3],
+                   mac_addr->sa_data[4], mac_addr->sa_data[5]);
+        macaddr_high = ((u16)netdev->dev_addr[0]) << 8;
+        macaddr_high += (u16)netdev->dev_addr[1];
+        macaddr_low = ((u32)netdev->dev_addr[2]) << 24;
+        macaddr_low += ((u32)netdev->dev_addr[3]) << 16;
+        macaddr_low += ((u32)netdev->dev_addr[4]) << 8;
+        macaddr_low += (u32)netdev->dev_addr[5];
+
+        for (i = 0; i < NES_MAX_PORT_COUNT; i++) {
+                if (nesvnic->qp_nic_index[i] == 0xf) {
+                        break;
+                }
+                nes_write_indexed(nesdev,
+                                NES_IDX_PERFECT_FILTER_LOW + (nesvnic->qp_nic_index[i] * 8),
+                                macaddr_low);
+                nes_write_indexed(nesdev,
+                                NES_IDX_PERFECT_FILTER_HIGH + (nesvnic->qp_nic_index[i] * 8),
+                                (u32)macaddr_high | NES_MAC_ADDR_VALID |
+                                ((((u32)nesvnic->nic_index) << 16)));
+        }
+        return 0;
+}
+
+
+/**
+ * nes_netdev_set_multicast_list
+ */
+void nes_netdev_set_multicast_list(struct net_device *netdev)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct dev_mc_list *multicast_addr;
+        u32 nic_active_bit;
+        u32 nic_active;
+        u32 perfect_filter_register_address;
+        u32 macaddr_low;
+        u16 macaddr_high;
+        u8 mc_all_on = 0;
+        u8 mc_index;
+        int mc_nic_index = -1;
+
+        nic_active_bit = 1 << nesvnic->nic_index;
+
+        if (netdev->flags & IFF_PROMISC) {
+                nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL);
+                nic_active |= nic_active_bit;
+                nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL, nic_active);
+                nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL);
+                nic_active |= nic_active_bit;
+                nes_write_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL, nic_active);
+                mc_all_on = 1;
+        } else if ((netdev->flags & IFF_ALLMULTI) || (netdev->mc_count > NES_MULTICAST_PF_MAX) ||
+                           (nesvnic->nic_index > 3)) {
+                nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL);
+                nic_active |= nic_active_bit;
+                nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL, nic_active);
+                nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL);
+                nic_active &= ~nic_active_bit;
+                nes_write_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL, nic_active);
+                mc_all_on = 1;
+        } else {
+                nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL);
+                nic_active &= ~nic_active_bit;
+                nes_write_indexed(nesdev, NES_IDX_NIC_MULTICAST_ALL, nic_active);
+                nic_active = nes_read_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL);
+                nic_active &= ~nic_active_bit;
+                nes_write_indexed(nesdev, NES_IDX_NIC_UNICAST_ALL, nic_active);
+        }
+
+        nes_debug(NES_DBG_NIC_RX, "Number of MC entries = %d, Promiscous = %d, All Multicast = %d.\n",
+                          netdev->mc_count, (netdev->flags & IFF_PROMISC)?1:0,
+                          (netdev->flags & IFF_ALLMULTI)?1:0);
+        if (!mc_all_on) {
+                multicast_addr = netdev->mc_list;
+                perfect_filter_register_address = NES_IDX_PERFECT_FILTER_LOW + 0x80;
+                perfect_filter_register_address += nesvnic->nic_index*0x40;
+                for (mc_index=0; mc_index < NES_MULTICAST_PF_MAX; mc_index++) {
+                        while (multicast_addr && nesvnic->mcrq_mcast_filter && ((mc_nic_index = nesvnic->mcrq_mcast_filter(nesvnic, multicast_addr->dmi_addr)) == 0))
+                                multicast_addr = multicast_addr->next;
+
+                        if (mc_nic_index < 0)
+                                mc_nic_index = nesvnic->nic_index;
+                        if (multicast_addr) {
+                                nes_debug(NES_DBG_NIC_RX, "Assigning MC Address = %02X%02X%02X%02X%02X%02X to register 0x%04X nic_idx=%d\n",
+                                                  multicast_addr->dmi_addr[0], multicast_addr->dmi_addr[1],
+                                                  multicast_addr->dmi_addr[2], multicast_addr->dmi_addr[3],
+                                                  multicast_addr->dmi_addr[4], multicast_addr->dmi_addr[5],
+                                                  perfect_filter_register_address+(mc_index * 8), mc_nic_index);
+                                macaddr_high = ((u16)multicast_addr->dmi_addr[0]) << 8;
+                                macaddr_high += (u16)multicast_addr->dmi_addr[1];
+                                macaddr_low = ((u32)multicast_addr->dmi_addr[2]) << 24;
+                                macaddr_low += ((u32)multicast_addr->dmi_addr[3]) << 16;
+                                macaddr_low += ((u32)multicast_addr->dmi_addr[4]) << 8;
+                                macaddr_low += (u32)multicast_addr->dmi_addr[5];
+                                nes_write_indexed(nesdev,
+                                                perfect_filter_register_address+(mc_index * 8),
+                                                macaddr_low);
+                                nes_write_indexed(nesdev,
+                                                perfect_filter_register_address+4+(mc_index * 8),
+                                                (u32)macaddr_high | NES_MAC_ADDR_VALID |
+                                                ((((u32)(1<<mc_nic_index)) << 16)));
+                                multicast_addr = multicast_addr->next;
+                        } else {
+                                nes_debug(NES_DBG_NIC_RX, "Clearing MC Address at register 0x%04X\n",
+                                                  perfect_filter_register_address+(mc_index * 8));
+                                nes_write_indexed(nesdev,
+                                                perfect_filter_register_address+4+(mc_index * 8),
+                                                0);
+                        }
+                }
+        }
+}
+
+
+/**
+ * nes_netdev_change_mtu
+ */
+static int nes_netdev_change_mtu(struct net_device *netdev,     int     new_mtu)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev =     nesvnic->nesdev;
+        int     ret     = 0;
+        u8 jumbomode=0;
+
+        if ((new_mtu < ETH_ZLEN) ||     (new_mtu > max_mtu))
+                return -EINVAL;
+
+        netdev->mtu     = new_mtu;
+        nesvnic->max_frame_size = new_mtu+ETH_HLEN;
+
+        if (netdev->mtu > 1500) {
+                jumbomode=1;
+        }
+        nes_nic_init_timer_defaults(nesdev,     jumbomode);
+
+        if (netif_running(netdev)) {
+                nes_netdev_stop(netdev);
+                nes_netdev_open(netdev);
+        }
+
+        return ret;
+}
+
+
+/**
+ * nes_netdev_exit - destroy network device
+ */
+void nes_netdev_exit(struct nes_vnic *nesvnic)
+{
+        struct net_device *netdev = nesvnic->netdev;
+        struct nes_ib_device *nesibdev = nesvnic->nesibdev;
+
+        nes_debug(NES_DBG_SHUTDOWN, "\n");
+
+        // destroy the ibdevice if RDMA enabled
+        if ((nesvnic->rdma_enabled)&&(nesvnic->of_device_registered)) {
+                nes_destroy_ofa_device( nesibdev );
+                nesvnic->of_device_registered = 0;
+                nesvnic->nesibdev = NULL;
+        }
+        unregister_netdev(netdev);
+        nes_debug(NES_DBG_SHUTDOWN, "\n");
+}
+
+
+#define NES_ETHTOOL_STAT_COUNT 55
+static const char nes_ethtool_stringset[NES_ETHTOOL_STAT_COUNT][ETH_GSTRING_LEN] = {
+        "Link Change Interrupts",
+        "Linearized SKBs",
+        "T/GSO Requests",
+        "Pause Frames Sent",
+        "Pause Frames Received",
+        "Internal Routing Errors",
+        "SQ SW Dropped SKBs",
+        "SQ Locked",
+        "SQ Full",
+        "Segmented TSO Requests",
+        "Rx Symbol Errors",
+        "Rx Jabber Errors",
+        "Rx Oversized Frames",
+        "Rx Short Frames",
+        "Endnode Rx Discards",
+        "Endnode Rx Octets",
+        "Endnode Rx Frames",
+        "Endnode Tx Octets",
+        "Endnode Tx Frames",
+        "mh detected",
+        "mh pauses",
+        "Retransmission Count",
+        "CM Connects",
+        "CM Accepts",
+        "Disconnects",
+        "Connected Events",
+        "Connect Requests",
+        "CM Rejects",
+        "ModifyQP Timeouts",
+        "CreateQPs",
+        "SW DestroyQPs",
+        "DestroyQPs",
+        "CM Closes",
+        "CM Packets Sent",
+        "CM Packets Bounced",
+        "CM Packets Created",
+        "CM Packets Rcvd",
+        "CM Packets Dropped",
+        "CM Packets Retrans",
+        "CM Listens Created",
+        "CM Listens Destroyed",
+        "CM Backlog Drops",
+        "CM Loopbacks",
+        "CM Nodes Created",
+        "CM Nodes Destroyed",
+        "CM Accel Drops",
+        "CM Resets Received",
+        "Timer Inits",
+        "CQ Depth 1",
+        "CQ Depth 4",
+        "CQ Depth 16",
+        "CQ Depth 24",
+        "CQ Depth 32",
+        "CQ Depth 128",
+        "CQ Depth 256",
+};
+
+
+/**
+ * nes_netdev_get_rx_csum
+ */
+static u32 nes_netdev_get_rx_csum (struct net_device *netdev)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+
+        if (nesvnic->rx_checksum_disabled)
+                return 0;
+        else
+                return 1;
+}
+
+
+/**
+ * nes_netdev_set_rc_csum
+ */
+static int nes_netdev_set_rx_csum(struct net_device *netdev, u32 enable)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+
+        if (enable)
+                nesvnic->rx_checksum_disabled = 0;
+        else
+                nesvnic->rx_checksum_disabled = 1;
+        return 0;
+}
+
+
+/**
+ * nes_netdev_get_stats_count
+ */
+static int nes_netdev_get_stats_count(struct net_device *netdev)
+{
+        return NES_ETHTOOL_STAT_COUNT;
+}
+
+
+/**
+ * nes_netdev_get_strings
+ */
+static void nes_netdev_get_strings(struct net_device *netdev, u32 stringset,
+                u8 *ethtool_strings)
+{
+        if (stringset == ETH_SS_STATS)
+                memcpy(ethtool_strings,
+                                &nes_ethtool_stringset,
+                                sizeof(nes_ethtool_stringset));
+}
+
+
+/**
+ * nes_netdev_get_ethtool_stats
+ */
+static void nes_netdev_get_ethtool_stats(struct net_device *netdev,
+                struct ethtool_stats *target_ethtool_stats, u64 *target_stat_values)
+{
+        u64 u64temp;
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        u32 nic_count;
+        u32 u32temp;
+
+        target_ethtool_stats->n_stats = NES_ETHTOOL_STAT_COUNT;
+        target_stat_values[0] = nesvnic->nesdev->link_status_interrupts;
+        target_stat_values[1] = nesvnic->linearized_skbs;
+        target_stat_values[2] = nesvnic->tso_requests;
+
+        u32temp = nes_read_indexed(nesdev,
+                        NES_IDX_MAC_TX_PAUSE_FRAMES + (nesvnic->nesdev->mac_index*0x200));
+        nesvnic->nesdev->mac_pause_frames_sent += u32temp;
+        target_stat_values[3] = nesvnic->nesdev->mac_pause_frames_sent;
+
+        u32temp = nes_read_indexed(nesdev,
+                        NES_IDX_MAC_RX_PAUSE_FRAMES + (nesvnic->nesdev->mac_index*0x200));
+        nesvnic->nesdev->mac_pause_frames_received += u32temp;
+
+        u32temp = nes_read_indexed(nesdev,
+                        NES_IDX_PORT_RX_DISCARDS + (nesvnic->nesdev->mac_index*0x40));
+        nesvnic->nesdev->port_rx_discards += u32temp;
+        nesvnic->netstats.rx_dropped += u32temp;
+
+        u32temp = nes_read_indexed(nesdev,
+                        NES_IDX_PORT_TX_DISCARDS + (nesvnic->nesdev->mac_index*0x40));
+        nesvnic->nesdev->port_tx_discards += u32temp;
+        nesvnic->netstats.tx_dropped += u32temp;
+
+        for (nic_count = 0; nic_count < NES_MAX_PORT_COUNT; nic_count++) {
+                if (nesvnic->qp_nic_index[nic_count] == 0xf)
+                        break;
+
+                u32temp = nes_read_indexed(nesdev,
+                                NES_IDX_ENDNODE0_NSTAT_RX_DISCARD +
+                                (nesvnic->qp_nic_index[nic_count]*0x200));
+                nesvnic->netstats.rx_dropped += u32temp;
+                nesvnic->endnode_nstat_rx_discard += u32temp;
+
+                u64temp = (u64)nes_read_indexed(nesdev,
+                                NES_IDX_ENDNODE0_NSTAT_RX_OCTETS_LO +
+                                (nesvnic->qp_nic_index[nic_count]*0x200));
+                u64temp += ((u64)nes_read_indexed(nesdev,
+                                NES_IDX_ENDNODE0_NSTAT_RX_OCTETS_HI +
+                                (nesvnic->qp_nic_index[nic_count]*0x200))) << 32;
+
+                nesvnic->endnode_nstat_rx_octets += u64temp;
+                nesvnic->netstats.rx_bytes += u64temp;
+
+                u64temp = (u64)nes_read_indexed(nesdev,
+                                NES_IDX_ENDNODE0_NSTAT_RX_FRAMES_LO +
+                                (nesvnic->qp_nic_index[nic_count]*0x200));
+                u64temp += ((u64)nes_read_indexed(nesdev,
+                                NES_IDX_ENDNODE0_NSTAT_RX_FRAMES_HI +
+                                (nesvnic->qp_nic_index[nic_count]*0x200))) << 32;
+
+                nesvnic->endnode_nstat_rx_frames += u64temp;
+                nesvnic->netstats.rx_packets += u64temp;
+
+                u64temp = (u64)nes_read_indexed(nesdev,
+                                NES_IDX_ENDNODE0_NSTAT_TX_OCTETS_LO +
+                                (nesvnic->qp_nic_index[nic_count]*0x200));
+                u64temp += ((u64)nes_read_indexed(nesdev,
+                                NES_IDX_ENDNODE0_NSTAT_TX_OCTETS_HI +
+                                (nesvnic->qp_nic_index[nic_count]*0x200))) << 32;
+
+                nesvnic->endnode_nstat_tx_octets += u64temp;
+                nesvnic->netstats.tx_bytes += u64temp;
+
+                u64temp = (u64)nes_read_indexed(nesdev,
+                                NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_LO +
+                                (nesvnic->qp_nic_index[nic_count]*0x200));
+                u64temp += ((u64)nes_read_indexed(nesdev,
+                                NES_IDX_ENDNODE0_NSTAT_TX_FRAMES_HI +
+                                (nesvnic->qp_nic_index[nic_count]*0x200))) << 32;
+
+                nesvnic->endnode_nstat_tx_frames += u64temp;
+                nesvnic->netstats.tx_packets += u64temp;
+
+                u32temp = nes_read_indexed(nesdev,
+                                NES_IDX_IPV4_TCP_REXMITS + (nesvnic->qp_nic_index[nic_count]*0x200));
+                nesvnic->endnode_ipv4_tcp_retransmits += u32temp;
+        }
+
+        target_stat_values[4] = nesvnic->nesdev->mac_pause_frames_received;
+        target_stat_values[5] = nesdev->nesadapter->nic_rx_eth_route_err;
+        target_stat_values[6] = nesvnic->tx_sw_dropped;
+        target_stat_values[7] = nesvnic->sq_locked;
+        target_stat_values[8] = nesvnic->sq_full;
+        target_stat_values[9] = nesvnic->segmented_tso_requests;
+        target_stat_values[10] = nesvnic->nesdev->mac_rx_symbol_err_frames;
+        target_stat_values[11] = nesvnic->nesdev->mac_rx_jabber_frames;
+        target_stat_values[12] = nesvnic->nesdev->mac_rx_oversized_frames;
+        target_stat_values[13] = nesvnic->nesdev->mac_rx_short_frames;
+        target_stat_values[14] = nesvnic->endnode_nstat_rx_discard;
+        target_stat_values[15] = nesvnic->endnode_nstat_rx_octets;
+        target_stat_values[16] = nesvnic->endnode_nstat_rx_frames;
+        target_stat_values[17] = nesvnic->endnode_nstat_tx_octets;
+        target_stat_values[18] = nesvnic->endnode_nstat_tx_frames;
+        target_stat_values[19] = mh_detected;
+        target_stat_values[20] = mh_pauses_sent;
+        target_stat_values[21] = nesvnic->endnode_ipv4_tcp_retransmits;
+        target_stat_values[22] = atomic_read(&cm_connects);
+        target_stat_values[23] = atomic_read(&cm_accepts);
+        target_stat_values[24] = atomic_read(&cm_disconnects);
+        target_stat_values[25] = atomic_read(&cm_connecteds);
+        target_stat_values[26] = atomic_read(&cm_connect_reqs);
+        target_stat_values[27] = atomic_read(&cm_rejects);
+        target_stat_values[28] = atomic_read(&mod_qp_timouts);
+        target_stat_values[29] = atomic_read(&qps_created);
+        target_stat_values[30] = atomic_read(&sw_qps_destroyed);
+        target_stat_values[31] = atomic_read(&qps_destroyed);
+        target_stat_values[32] = atomic_read(&cm_closes);
+        target_stat_values[33] = cm_packets_sent;
+        target_stat_values[34] = cm_packets_bounced;
+        target_stat_values[35] = cm_packets_created;
+        target_stat_values[36] = cm_packets_received;
+        target_stat_values[37] = cm_packets_dropped;
+        target_stat_values[38] = cm_packets_retrans;
+        target_stat_values[39] = cm_listens_created;
+        target_stat_values[40] = cm_listens_destroyed;
+        target_stat_values[41] = cm_backlog_drops;
+        target_stat_values[42] = atomic_read(&cm_loopbacks);
+        target_stat_values[43] = atomic_read(&cm_nodes_created);
+        target_stat_values[44] = atomic_read(&cm_nodes_destroyed);
+        target_stat_values[45] = atomic_read(&cm_accel_dropped_pkts);
+        target_stat_values[46] = atomic_read(&cm_resets_recvd);
+        target_stat_values[47] = int_mod_timer_init;
+        target_stat_values[48] = int_mod_cq_depth_1;
+        target_stat_values[49] = int_mod_cq_depth_4;
+        target_stat_values[50] = int_mod_cq_depth_16;
+        target_stat_values[51] = int_mod_cq_depth_24;
+        target_stat_values[52] = int_mod_cq_depth_32;
+        target_stat_values[53] = int_mod_cq_depth_128;
+        target_stat_values[54] = int_mod_cq_depth_256;
+
+}
+
+
+/**
+ * nes_netdev_get_drvinfo
+ */
+static void nes_netdev_get_drvinfo(struct net_device *netdev,
+                struct ethtool_drvinfo *drvinfo)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+
+        strcpy(drvinfo->driver, DRV_NAME);
+        strcpy(drvinfo->bus_info, pci_name(nesvnic->nesdev->pcidev));
+        strcpy(drvinfo->fw_version, "TBD");
+        strcpy(drvinfo->version, DRV_VERSION);
+        drvinfo->n_stats = nes_netdev_get_stats_count(netdev);
+        drvinfo->testinfo_len = 0;
+        drvinfo->eedump_len = 0;
+        drvinfo->regdump_len = 0;
+}
+
+
+/**
+ * nes_netdev_set_coalesce
+ */
+static int nes_netdev_set_coalesce(struct net_device *netdev,
+                struct ethtool_coalesce *et_coalesce)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev =     nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
+        unsigned long flags;
+
+        spin_lock_irqsave(&nesadapter->periodic_timer_lock,     flags);
+        if (et_coalesce->rx_max_coalesced_frames_low) {
+                shared_timer->threshold_low      = et_coalesce->rx_max_coalesced_frames_low;
+        }
+        if (et_coalesce->rx_max_coalesced_frames_irq) {
+                shared_timer->threshold_target = et_coalesce->rx_max_coalesced_frames_irq;
+        }
+        if (et_coalesce->rx_max_coalesced_frames_high) {
+                shared_timer->threshold_high = et_coalesce->rx_max_coalesced_frames_high;
+        }
+        if (et_coalesce->rx_coalesce_usecs_low) {
+                shared_timer->timer_in_use_min = et_coalesce->rx_coalesce_usecs_low;
+        }
+        if (et_coalesce->rx_coalesce_usecs_high) {
+                shared_timer->timer_in_use_max = et_coalesce->rx_coalesce_usecs_high;
+        }
+        spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags);
+
+        /* using this to drive total interrupt moderation */
+        nesadapter->et_rx_coalesce_usecs_irq = et_coalesce->rx_coalesce_usecs_irq;
+        if (et_coalesce->use_adaptive_rx_coalesce) {
+                nesadapter->et_use_adaptive_rx_coalesce = 1;
+                nesadapter->timer_int_limit     = NES_TIMER_INT_LIMIT_DYNAMIC;
+                nesadapter->et_rx_coalesce_usecs_irq = 0;
+                if (et_coalesce->pkt_rate_low) {
+                        nesadapter->et_pkt_rate_low     = et_coalesce->pkt_rate_low;
+                }
+        } else {
+                nesadapter->et_use_adaptive_rx_coalesce = 0;
+                nesadapter->timer_int_limit     = NES_TIMER_INT_LIMIT;
+                if (nesadapter->et_rx_coalesce_usecs_irq) {
+                        nes_write32(nesdev->regs+NES_PERIODIC_CONTROL,
+                                        0x80000000 | ((u32)(nesadapter->et_rx_coalesce_usecs_irq*8)));
+                }
+        }
+        return 0;
+}
+
+
+/**
+ * nes_netdev_get_coalesce
+ */
+static int nes_netdev_get_coalesce(struct net_device *netdev,
+                struct ethtool_coalesce *et_coalesce)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev =     nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct ethtool_coalesce temp_et_coalesce;
+        struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
+        unsigned long flags;
+
+        memset(&temp_et_coalesce, 0, sizeof(temp_et_coalesce));
+        temp_et_coalesce.rx_coalesce_usecs_irq = nesadapter->et_rx_coalesce_usecs_irq;
+        temp_et_coalesce.use_adaptive_rx_coalesce =     nesadapter->et_use_adaptive_rx_coalesce;
+        temp_et_coalesce.rate_sample_interval = nesadapter->et_rate_sample_interval;
+        temp_et_coalesce.pkt_rate_low = nesadapter->et_pkt_rate_low;
+        spin_lock_irqsave(&nesadapter->periodic_timer_lock,     flags);
+        temp_et_coalesce.rx_max_coalesced_frames_low =  shared_timer->threshold_low;
+        temp_et_coalesce.rx_max_coalesced_frames_irq =  shared_timer->threshold_target;
+        temp_et_coalesce.rx_max_coalesced_frames_high = shared_timer->threshold_high;
+        temp_et_coalesce.rx_coalesce_usecs_low = shared_timer->timer_in_use_min;
+        temp_et_coalesce.rx_coalesce_usecs_high = shared_timer->timer_in_use_max;
+        if (nesadapter->et_use_adaptive_rx_coalesce) {
+                temp_et_coalesce.rx_coalesce_usecs_irq = shared_timer->timer_in_use;
+        }
+        spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags);
+        memcpy(et_coalesce,     &temp_et_coalesce, sizeof(*et_coalesce));
+        return 0;
+}
+
+
+/**
+ * nes_netdev_get_pauseparam
+ */
+static void nes_netdev_get_pauseparam(struct net_device *netdev,
+                struct ethtool_pauseparam *et_pauseparam)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+
+        et_pauseparam->autoneg = 0;
+        et_pauseparam->rx_pause = (nesvnic->nesdev->disable_rx_flow_control == 0) ? 1:0;
+        et_pauseparam->tx_pause = (nesvnic->nesdev->disable_tx_flow_control == 0) ? 1:0;
+}
+
+
+/**
+ * nes_netdev_set_pauseparam
+ */
+static int nes_netdev_set_pauseparam(struct net_device *netdev,
+                struct ethtool_pauseparam *et_pauseparam)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        u32 u32temp;
+
+        if (et_pauseparam->autoneg) {
+                /* TODO: should return unsupported */
+                return 0;
+        }
+        if ((et_pauseparam->tx_pause == 1) && (nesdev->disable_tx_flow_control == 1)) {
+                u32temp = nes_read_indexed(nesdev,
+                                NES_IDX_MAC_TX_CONFIG + (nesdev->mac_index*0x200));
+                u32temp |= NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE;
+                nes_write_indexed(nesdev,
+                                NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE + (nesdev->mac_index*0x200), u32temp);
+                nesdev->disable_tx_flow_control = 0;
+        } else if ((et_pauseparam->tx_pause == 0) && (nesdev->disable_tx_flow_control == 0)) {
+                u32temp = nes_read_indexed(nesdev,
+                                NES_IDX_MAC_TX_CONFIG + (nesdev->mac_index*0x200));
+                u32temp &= ~NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE;
+                nes_write_indexed(nesdev,
+                                NES_IDX_MAC_TX_CONFIG_ENABLE_PAUSE + (nesdev->mac_index*0x200), u32temp);
+                nesdev->disable_tx_flow_control = 1;
+        }
+        if ((et_pauseparam->rx_pause == 1) && (nesdev->disable_rx_flow_control == 1)) {
+                u32temp = nes_read_indexed(nesdev,
+                                NES_IDX_MPP_DEBUG + (nesdev->mac_index*0x40));
+                u32temp &= ~NES_IDX_MPP_DEBUG_PORT_DISABLE_PAUSE;
+                nes_write_indexed(nesdev,
+                                NES_IDX_MPP_DEBUG + (nesdev->mac_index*0x40), u32temp);
+                nesdev->disable_rx_flow_control = 0;
+        } else if ((et_pauseparam->rx_pause == 0) && (nesdev->disable_rx_flow_control == 0)) {
+                u32temp = nes_read_indexed(nesdev,
+                                NES_IDX_MPP_DEBUG + (nesdev->mac_index*0x40));
+                u32temp |= NES_IDX_MPP_DEBUG_PORT_DISABLE_PAUSE;
+                nes_write_indexed(nesdev,
+                                NES_IDX_MPP_DEBUG + (nesdev->mac_index*0x40), u32temp);
+                nesdev->disable_rx_flow_control = 1;
+        }
+
+        return 0;
+}
+
+
+/**
+ * nes_netdev_get_settings
+ */
+static int nes_netdev_get_settings(struct net_device *netdev, struct ethtool_cmd *et_cmd)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        u16 phy_data;
+
+        et_cmd->duplex = DUPLEX_FULL;
+        et_cmd->port = PORT_MII;
+        if (nesadapter->OneG_Mode) {
+                et_cmd->supported = SUPPORTED_1000baseT_Full|SUPPORTED_Autoneg;
+                et_cmd->advertising = ADVERTISED_1000baseT_Full|ADVERTISED_Autoneg;
+                et_cmd->speed = SPEED_1000;
+                nes_read_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index],
+                                &phy_data);
+                if (phy_data&0x1000) {
+                        et_cmd->autoneg = AUTONEG_ENABLE;
+                } else {
+                        et_cmd->autoneg = AUTONEG_DISABLE;
+                }
+                et_cmd->transceiver = XCVR_EXTERNAL;
+                et_cmd->phy_address = nesadapter->phy_index[nesdev->mac_index];
+        } else {
+                if (nesadapter->phy_type[nesvnic->logical_port] == NES_PHY_TYPE_IRIS) {
+                        et_cmd->transceiver = XCVR_EXTERNAL;
+                        et_cmd->port = PORT_FIBRE;
+                        et_cmd->supported = SUPPORTED_FIBRE;
+                        et_cmd->advertising = ADVERTISED_FIBRE;
+                        et_cmd->phy_address = nesadapter->phy_index[nesdev->mac_index];
+                } else {
+                        et_cmd->transceiver = XCVR_INTERNAL;
+                        et_cmd->supported = SUPPORTED_10000baseT_Full;
+                        et_cmd->advertising = ADVERTISED_10000baseT_Full;
+                        et_cmd->phy_address = nesdev->mac_index;
+                }
+                et_cmd->speed = SPEED_10000;
+                et_cmd->autoneg = AUTONEG_DISABLE;
+        }
+        et_cmd->maxtxpkt = 511;
+        et_cmd->maxrxpkt = 511;
+        return 0;
+}
+
+
+/**
+ * nes_netdev_set_settings
+ */
+static int nes_netdev_set_settings(struct net_device *netdev, struct ethtool_cmd *et_cmd)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        u16 phy_data;
+
+        if (nesadapter->OneG_Mode) {
+                nes_read_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index],
+                                &phy_data);
+                if (et_cmd->autoneg) {
+                        /* Turn on Full duplex, Autoneg, and restart autonegotiation */
+                        phy_data |= 0x1300;
+                } else {
+                        // Turn off autoneg
+                        phy_data &= ~0x1000;
+                }
+                nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index],
+                                phy_data);
+        }
+
+        return 0;
+}
+
+
+static struct ethtool_ops nes_ethtool_ops = {
+        .get_link = ethtool_op_get_link,
+        .get_settings = nes_netdev_get_settings,
+        .set_settings = nes_netdev_set_settings,
+        .get_tx_csum = ethtool_op_get_tx_csum,
+        .get_rx_csum = nes_netdev_get_rx_csum,
+        .get_sg = ethtool_op_get_sg,
+        .get_strings = nes_netdev_get_strings,
+        .get_stats_count = nes_netdev_get_stats_count,
+        .get_ethtool_stats = nes_netdev_get_ethtool_stats,
+        .get_drvinfo = nes_netdev_get_drvinfo,
+        .get_coalesce = nes_netdev_get_coalesce,
+        .set_coalesce = nes_netdev_set_coalesce,
+        .get_pauseparam = nes_netdev_get_pauseparam,
+        .set_pauseparam = nes_netdev_set_pauseparam,
+        .set_tx_csum = ethtool_op_set_tx_csum,
+        .set_rx_csum = nes_netdev_set_rx_csum,
+        .set_sg = ethtool_op_set_sg,
+        .get_tso = ethtool_op_get_tso,
+        .set_tso = ethtool_op_set_tso,
+};
+
+
+static void nes_netdev_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        u32 u32temp;
+
+        nesvnic->vlan_grp = grp;
+
+        /* Enable/Disable VLAN Stripping */
+        u32temp = nes_read_indexed(nesdev, NES_IDX_PCIX_DIAG);
+        if (grp)
+                u32temp &= 0xfdffffff;
+        else
+                u32temp |= 0x02000000;
+
+        nes_write_indexed(nesdev, NES_IDX_PCIX_DIAG, u32temp);
+}
+
+
+/**
+ * nes_netdev_init - initialize network device
+ */
+struct net_device *nes_netdev_init(struct nes_device *nesdev,
+                void __iomem *mmio_addr)
+{
+        u64 u64temp;
+        struct nes_vnic *nesvnic = NULL;
+        struct net_device *netdev;
+        struct nic_qp_map *curr_qp_map;
+        u32 u32temp;
+        u16 phy_data;
+        u16 temp_phy_data;
+
+        netdev = alloc_etherdev(sizeof(struct nes_vnic));
+        if (!netdev) {
+                printk(KERN_ERR PFX "nesvnic etherdev alloc failed");
+                return NULL;
+        }
+
+        nes_debug(NES_DBG_INIT, "netdev = %p, %s\n", netdev, netdev->name);
+
+        SET_NETDEV_DEV(netdev, &nesdev->pcidev->dev);
+
+        nesvnic = netdev_priv(netdev);
+        memset(nesvnic, 0, sizeof(*nesvnic));
+
+        netdev->open = nes_netdev_open;
+        netdev->stop = nes_netdev_stop;
+        netdev->hard_start_xmit = nes_netdev_start_xmit;
+        netdev->get_stats = nes_netdev_get_stats;
+        netdev->tx_timeout = nes_netdev_tx_timeout;
+        netdev->set_mac_address = nes_netdev_set_mac_address;
+        netdev->set_multicast_list = nes_netdev_set_multicast_list;
+        netdev->change_mtu = nes_netdev_change_mtu;
+        netdev->watchdog_timeo = NES_TX_TIMEOUT;
+        netdev->irq = nesdev->pcidev->irq;
+        netdev->mtu = ETH_DATA_LEN;
+        netdev->hard_header_len = ETH_HLEN;
+        netdev->addr_len = ETH_ALEN;
+        netdev->type = ARPHRD_ETHER;
+        netdev->features = NETIF_F_HIGHDMA;
+        netdev->ethtool_ops = &nes_ethtool_ops;
+        netif_napi_add(netdev, &nesvnic->napi, nes_netdev_poll, 128);
+        nes_debug(NES_DBG_INIT, "Enabling VLAN Insert/Delete.\n");
+        netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
+        netdev->vlan_rx_register = nes_netdev_vlan_rx_register;
+        netdev->features |= NETIF_F_LLTX;
+
+        /* Fill in the port structure */
+        nesvnic->netdev = netdev;
+        nesvnic->nesdev = nesdev;
+        nesvnic->msg_enable = netif_msg_init(debug, default_msg);
+        nesvnic->netdev_index = nesdev->netdev_count;
+        nesvnic->perfect_filter_index = nesdev->nesadapter->netdev_count;
+        nesvnic->max_frame_size = netdev->mtu+netdev->hard_header_len;
+
+        curr_qp_map = nic_qp_mapping_per_function[PCI_FUNC(nesdev->pcidev->devfn)];
+        nesvnic->nic.qp_id = curr_qp_map[nesdev->netdev_count].qpid;
+        nesvnic->nic_index = curr_qp_map[nesdev->netdev_count].nic_index;
+        nesvnic->logical_port = curr_qp_map[nesdev->netdev_count].logical_port;
+
+        /* Setup the burned in MAC address */
+        u64temp = (u64)nesdev->nesadapter->mac_addr_low;
+        u64temp += ((u64)nesdev->nesadapter->mac_addr_high) << 32;
+        u64temp += nesvnic->nic_index;
+        netdev->dev_addr[0] = (u8)(u64temp>>40);
+        netdev->dev_addr[1] = (u8)(u64temp>>32);
+        netdev->dev_addr[2] = (u8)(u64temp>>24);
+        netdev->dev_addr[3] = (u8)(u64temp>>16);
+        netdev->dev_addr[4] = (u8)(u64temp>>8);
+        netdev->dev_addr[5] = (u8)u64temp;
+        memcpy(netdev->perm_addr, netdev->dev_addr, 6);
+
+        if ((nesvnic->logical_port < 2) || (nesdev->nesadapter->hw_rev != NE020_REV)) {
+                netdev->features |= NETIF_F_TSO | NETIF_F_SG | NETIF_F_IP_CSUM;
+                netdev->features |= NETIF_F_GSO | NETIF_F_TSO | NETIF_F_SG | NETIF_F_IP_CSUM;
+        } else {
+                netdev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
+        }
+
+        nes_debug(NES_DBG_INIT, "nesvnic = %p, reported features = 0x%lX, QPid = %d,"
+                        " nic_index = %d, logical_port = %d, mac_index = %d.\n",
+                        nesvnic, (unsigned long)netdev->features, nesvnic->nic.qp_id,
+                        nesvnic->nic_index, nesvnic->logical_port,  nesdev->mac_index);
+
+        if (nesvnic->nesdev->nesadapter->port_count == 1) {
+                nesvnic->qp_nic_index[0] = nesvnic->nic_index;
+                nesvnic->qp_nic_index[1] = nesvnic->nic_index + 1;
+                if (nes_drv_opt & NES_DRV_OPT_DUAL_LOGICAL_PORT) {
+                        nesvnic->qp_nic_index[2] = 0xf;
+                        nesvnic->qp_nic_index[3] = 0xf;
+                } else {
+                        nesvnic->qp_nic_index[2] = nesvnic->nic_index + 2;
+                        nesvnic->qp_nic_index[3] = nesvnic->nic_index + 3;
+                }
+        } else {
+                if (nesvnic->nesdev->nesadapter->port_count == 2) {
+                        nesvnic->qp_nic_index[0] = nesvnic->nic_index;
+                        nesvnic->qp_nic_index[1] = nesvnic->nic_index + 2;
+                        nesvnic->qp_nic_index[2] = 0xf;
+                        nesvnic->qp_nic_index[3] = 0xf;
+                } else {
+                        nesvnic->qp_nic_index[0] = nesvnic->nic_index;
+                        nesvnic->qp_nic_index[1] = 0xf;
+                        nesvnic->qp_nic_index[2] = 0xf;
+                        nesvnic->qp_nic_index[3] = 0xf;
+                }
+        }
+        nesvnic->next_qp_nic_index = 0;
+
+        if (nesdev->netdev_count == 0) {
+                nesvnic->rdma_enabled = 1;
+        } else {
+                nesvnic->rdma_enabled = 0;
+        }
+        nesvnic->nic_cq.cq_number = nesvnic->nic.qp_id;
+        spin_lock_init(&nesvnic->tx_lock);
+        nesdev->netdev[nesdev->netdev_count] = netdev;
+
+        nes_debug(NES_DBG_INIT, "Adding nesvnic (%p) to the adapters nesvnic_list for MAC%d.\n",
+                        nesvnic, nesdev->mac_index);
+        list_add_tail(&nesvnic->list, &nesdev->nesadapter->nesvnic_list[nesdev->mac_index]);
+
+        if ((nesdev->netdev_count == 0) &&
+                        (PCI_FUNC(nesdev->pcidev->devfn) == nesdev->mac_index)) {
+                nes_debug(NES_DBG_INIT, "Setting up PHY interrupt mask. Using register index 0x%04X\n",
+                                NES_IDX_PHY_PCS_CONTROL_STATUS0+(0x200*(nesvnic->logical_port&1)));
+                u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 +
+                                (0x200*(nesvnic->logical_port&1)));
+                u32temp |= 0x00200000;
+                nes_write_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 +
+                                (0x200*(nesvnic->logical_port&1)), u32temp);
+                u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 +
+                                (0x200*(nesvnic->logical_port&1)) );
+                if ((u32temp&0x0f1f0000) == 0x0f0f0000) {
+                        if (nesdev->nesadapter->phy_type[nesvnic->logical_port] == NES_PHY_TYPE_IRIS) {
+                                nes_init_phy(nesdev);
+                                nes_read_10G_phy_reg(nesdev, 1,
+                                                nesdev->nesadapter->phy_index[nesvnic->logical_port]);
+                                temp_phy_data = (u16)nes_read_indexed(nesdev,
+                                                                        NES_IDX_MAC_MDIO_CONTROL);
+                                u32temp = 20;
+                                do {
+                                        nes_read_10G_phy_reg(nesdev, 1,
+                                                        nesdev->nesadapter->phy_index[nesvnic->logical_port]);
+                                        phy_data = (u16)nes_read_indexed(nesdev,
+                                                                        NES_IDX_MAC_MDIO_CONTROL);
+                                        if ((phy_data == temp_phy_data) || (!(--u32temp)))
+                                                break;
+                                        temp_phy_data = phy_data;
+                                } while (1);
+                                if (phy_data & 4) {
+                                        nes_debug(NES_DBG_INIT, "The Link is UP!!.\n");
+                                        nesvnic->linkup = 1;
+                                } else {
+                                        nes_debug(NES_DBG_INIT, "The Link is DOWN!!.\n");
+                                }
+                        } else {
+                                nes_debug(NES_DBG_INIT, "The Link is UP!!.\n");
+                                nesvnic->linkup = 1;
+                        }
+                }
+                nes_debug(NES_DBG_INIT, "Setting up MAC interrupt mask.\n");
+                /* clear the MAC interrupt status, assumes direct logical to physical mapping */
+                u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS+(0x200*nesvnic->logical_port));
+                nes_debug(NES_DBG_INIT, "Phy interrupt status = 0x%X.\n", u32temp);
+                nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS+(0x200*nesvnic->logical_port), u32temp);
+
+                if (nesdev->nesadapter->phy_type[nesvnic->logical_port] != NES_PHY_TYPE_IRIS)
+                        nes_init_phy(nesdev);
+
+                nes_write_indexed(nesdev, NES_IDX_MAC_INT_MASK+(0x200*nesvnic->logical_port),
+                                ~(NES_MAC_INT_LINK_STAT_CHG | NES_MAC_INT_XGMII_EXT |
+                                NES_MAC_INT_TX_UNDERFLOW | NES_MAC_INT_TX_ERROR));
+        }
+
+        return netdev;
+}
+
+
+/**
+ * nes_netdev_destroy - destroy network device structure
+ */
+void nes_netdev_destroy(struct net_device *netdev)
+{
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+
+        /* make sure 'stop' method is called by Linux stack */
+        /* nes_netdev_stop(netdev); */
+
+        list_del(&nesvnic->list);
+
+        if (nesvnic->of_device_registered) {
+                nes_destroy_ofa_device(nesvnic->nesibdev);
+        }
+
+        free_netdev(netdev);
+}
+
+
+/**
+ * nes_nic_cm_xmit -- CM calls this to send out pkts
+ */
+int nes_nic_cm_xmit(struct sk_buff *skb, struct net_device *netdev)
+{
+        int ret;
+
+        skb->dev = netdev;
+        ret = dev_queue_xmit(skb);
+        if (ret) {
+                nes_debug(NES_DBG_CM, "Bad return code from dev_queue_xmit %d\n", ret);
+        }
+
+        return ret;
+}
diff --git a/drivers/infiniband/hw/nes/nes_user.h b/drivers/infiniband/hw/nes/nes_user.h
new file mode 100644
index 000000000000..e64306bce80b
--- /dev/null
+++ b/drivers/infiniband/hw/nes/nes_user.h
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2006 - 2008 NetEffect.  All rights reserved.
+ * Copyright (c) 2005 Topspin Communications.  All rights reserved.
+ * Copyright (c) 2005 Cisco Systems.  All rights reserved.
+ * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+#ifndef NES_USER_H
+#define NES_USER_H
+
+#include <linux/types.h>
+
+#define NES_ABI_USERSPACE_VER 1
+#define NES_ABI_KERNEL_VER    1
+
+/*
+ * Make sure that all structs defined in this file remain laid out so
+ * that they pack the same way on 32-bit and 64-bit architectures (to
+ * avoid incompatibility between 32-bit userspace and 64-bit kernels).
+ * In particular do not use pointer types -- pass pointers in __u64
+ * instead.
+ */
+
+struct nes_alloc_ucontext_req {
+        __u32 reserved32;
+        __u8  userspace_ver;
+        __u8  reserved8[3];
+};
+
+struct nes_alloc_ucontext_resp {
+        __u32 max_pds; /* maximum pds allowed for this user process */
+        __u32 max_qps; /* maximum qps allowed for this user process */
+        __u32 wq_size; /* size of the WQs (sq+rq) allocated to the mmaped area */
+        __u8  virtwq;  /* flag to indicate if virtual WQ are to be used or not */
+        __u8  kernel_ver;
+        __u8  reserved[2];
+};
+
+struct nes_alloc_pd_resp {
+        __u32 pd_id;
+        __u32 mmap_db_index;
+};
+
+struct nes_create_cq_req {
+        __u64 user_cq_buffer;
+        __u32 mcrqf;
+        __u8 reserved[4];
+};
+
+struct nes_create_qp_req {
+        __u64 user_wqe_buffers;
+};
+
+enum iwnes_memreg_type {
+        IWNES_MEMREG_TYPE_MEM = 0x0000,
+        IWNES_MEMREG_TYPE_QP = 0x0001,
+        IWNES_MEMREG_TYPE_CQ = 0x0002,
+        IWNES_MEMREG_TYPE_MW = 0x0003,
+        IWNES_MEMREG_TYPE_FMR = 0x0004,
+};
+
+struct nes_mem_reg_req {
+        __u32 reg_type; /* indicates if id is memory, QP or CQ */
+        __u32 reserved;
+};
+
+struct nes_create_cq_resp {
+        __u32 cq_id;
+        __u32 cq_size;
+        __u32 mmap_db_index;
+        __u32 reserved;
+};
+
+struct nes_create_qp_resp {
+        __u32 qp_id;
+        __u32 actual_sq_size;
+        __u32 actual_rq_size;
+        __u32 mmap_sq_db_index;
+        __u32 mmap_rq_db_index;
+        __u32 nes_drv_opt;
+};
+
+#endif                          /* NES_USER_H */
diff --git a/drivers/infiniband/hw/nes/nes_utils.c b/drivers/infiniband/hw/nes/nes_utils.c
new file mode 100644
index 000000000000..c4ec6ac63461
--- /dev/null
+++ b/drivers/infiniband/hw/nes/nes_utils.c
@@ -0,0 +1,917 @@
+/*
+ * Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/ethtool.h>
+#include <linux/mii.h>
+#include <linux/if_vlan.h>
+#include <linux/crc32.h>
+#include <linux/in.h>
+#include <linux/ip.h>
+#include <linux/tcp.h>
+#include <linux/init.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/byteorder.h>
+
+#include "nes.h"
+
+
+
+static u16 nes_read16_eeprom(void __iomem *addr, u16 offset);
+
+u32 mh_detected;
+u32 mh_pauses_sent;
+
+/**
+ * nes_read_eeprom_values -
+ */
+int nes_read_eeprom_values(struct nes_device *nesdev, struct nes_adapter *nesadapter)
+{
+        u32 mac_addr_low;
+        u16 mac_addr_high;
+        u16 eeprom_data;
+        u16 eeprom_offset;
+        u16 next_section_address;
+        u16 sw_section_ver;
+        u8  major_ver = 0;
+        u8  minor_ver = 0;
+
+        /* TODO: deal with EEPROM endian issues */
+        if (nesadapter->firmware_eeprom_offset == 0) {
+                /* Read the EEPROM Parameters */
+                eeprom_data = nes_read16_eeprom(nesdev->regs, 0);
+                nes_debug(NES_DBG_HW, "EEPROM Offset 0  = 0x%04X\n", eeprom_data);
+                eeprom_offset = 2 + (((eeprom_data & 0x007f) << 3) <<
+                                ((eeprom_data & 0x0080) >> 7));
+                nes_debug(NES_DBG_HW, "Firmware Offset = 0x%04X\n", eeprom_offset);
+                nesadapter->firmware_eeprom_offset = eeprom_offset;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4);
+                if (eeprom_data != 0x5746) {
+                        nes_debug(NES_DBG_HW, "Not a valid Firmware Image = 0x%04X\n", eeprom_data);
+                        return -1;
+                }
+
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
+                nes_debug(NES_DBG_HW, "EEPROM Offset %u  = 0x%04X\n",
+                                eeprom_offset + 2, eeprom_data);
+                eeprom_offset += ((eeprom_data & 0x00ff) << 3) << ((eeprom_data & 0x0100) >> 8);
+                nes_debug(NES_DBG_HW, "Software Offset = 0x%04X\n", eeprom_offset);
+                nesadapter->software_eeprom_offset = eeprom_offset;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4);
+                if (eeprom_data != 0x5753) {
+                        printk("Not a valid Software Image = 0x%04X\n", eeprom_data);
+                        return -1;
+                }
+                sw_section_ver = nes_read16_eeprom(nesdev->regs, nesadapter->software_eeprom_offset  + 6);
+                nes_debug(NES_DBG_HW, "Software section version number = 0x%04X\n",
+                                sw_section_ver);
+
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
+                nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section)  = 0x%04X\n",
+                                eeprom_offset + 2, eeprom_data);
+                next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) <<
+                                ((eeprom_data & 0x0100) >> 8));
+                eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
+                if (eeprom_data != 0x414d) {
+                        nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n",
+                                        eeprom_data);
+                        goto no_fw_rev;
+                }
+                eeprom_offset = next_section_address;
+
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
+                nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section)  = 0x%04X\n",
+                                eeprom_offset + 2, eeprom_data);
+                next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) <<
+                                ((eeprom_data & 0x0100) >> 8));
+                eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
+                if (eeprom_data != 0x4f52) {
+                        nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x4f52 but was 0x%04X\n",
+                                        eeprom_data);
+                        goto no_fw_rev;
+                }
+                eeprom_offset = next_section_address;
+
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
+                nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section)  = 0x%04X\n",
+                                eeprom_offset + 2, eeprom_data);
+                next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
+                eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
+                if (eeprom_data != 0x5746) {
+                        nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5746 but was 0x%04X\n",
+                                        eeprom_data);
+                        goto no_fw_rev;
+                }
+                eeprom_offset = next_section_address;
+
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
+                nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section)  = 0x%04X\n",
+                                eeprom_offset + 2, eeprom_data);
+                next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
+                eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
+                if (eeprom_data != 0x5753) {
+                        nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5753 but was 0x%04X\n",
+                                        eeprom_data);
+                        goto no_fw_rev;
+                }
+                eeprom_offset = next_section_address;
+
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
+                nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section)  = 0x%04X\n",
+                                eeprom_offset + 2, eeprom_data);
+                next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
+                eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
+                if (eeprom_data != 0x414d) {
+                        nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n",
+                                        eeprom_data);
+                        goto no_fw_rev;
+                }
+                eeprom_offset = next_section_address;
+
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
+                nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section)  = 0x%04X\n",
+                                eeprom_offset + 2, eeprom_data);
+                next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
+                eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
+                if (eeprom_data != 0x464e) {
+                        nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x464e but was 0x%04X\n",
+                                        eeprom_data);
+                        goto no_fw_rev;
+                }
+                eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 8);
+                printk(PFX "Firmware version %u.%u\n", (u8)(eeprom_data>>8), (u8)eeprom_data);
+                major_ver = (u8)(eeprom_data >> 8);
+                minor_ver = (u8)(eeprom_data);
+
+                if (nes_drv_opt & NES_DRV_OPT_DISABLE_VIRT_WQ) {
+                        nes_debug(NES_DBG_HW, "Virtual WQs have been disabled\n");
+                } else if (((major_ver == 2) && (minor_ver > 21)) || ((major_ver > 2) && (major_ver != 255))) {
+                        nesadapter->virtwq = 1;
+                }
+                nesadapter->firmware_version = (((u32)(u8)(eeprom_data>>8))  <<  16) +
+                                (u32)((u8)eeprom_data);
+
+no_fw_rev:
+                /* eeprom is valid */
+                eeprom_offset = nesadapter->software_eeprom_offset;
+                eeprom_offset += 8;
+                nesadapter->netdev_max = (u8)nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                mac_addr_high = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                mac_addr_low = (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                mac_addr_low <<= 16;
+                mac_addr_low += (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nes_debug(NES_DBG_HW, "Base MAC Address = 0x%04X%08X\n",
+                                mac_addr_high, mac_addr_low);
+                nes_debug(NES_DBG_HW, "MAC Address count = %u\n", nesadapter->netdev_max);
+
+                nesadapter->mac_addr_low = mac_addr_low;
+                nesadapter->mac_addr_high = mac_addr_high;
+
+                /* Read the Phy Type array */
+                eeprom_offset += 10;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nesadapter->phy_type[0] = (u8)(eeprom_data >> 8);
+                nesadapter->phy_type[1] = (u8)eeprom_data;
+
+                /* Read the port array */
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nesadapter->phy_type[2] = (u8)(eeprom_data >> 8);
+                nesadapter->phy_type[3] = (u8)eeprom_data;
+                /* port_count is set by soft reset reg */
+                nes_debug(NES_DBG_HW, "port_count = %u, port 0 -> %u, port 1 -> %u,"
+                                " port 2 -> %u, port 3 -> %u\n",
+                                nesadapter->port_count,
+                                nesadapter->phy_type[0], nesadapter->phy_type[1],
+                                nesadapter->phy_type[2], nesadapter->phy_type[3]);
+
+                /* Read PD config array */
+                eeprom_offset += 10;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nesadapter->pd_config_size[0] = eeprom_data;
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nesadapter->pd_config_base[0] = eeprom_data;
+                nes_debug(NES_DBG_HW, "PD0 config, size=0x%04x, base=0x%04x\n",
+                                nesadapter->pd_config_size[0], nesadapter->pd_config_base[0]);
+
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nesadapter->pd_config_size[1] = eeprom_data;
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nesadapter->pd_config_base[1] = eeprom_data;
+                nes_debug(NES_DBG_HW, "PD1 config, size=0x%04x, base=0x%04x\n",
+                                nesadapter->pd_config_size[1], nesadapter->pd_config_base[1]);
+
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nesadapter->pd_config_size[2] = eeprom_data;
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nesadapter->pd_config_base[2] = eeprom_data;
+                nes_debug(NES_DBG_HW, "PD2 config, size=0x%04x, base=0x%04x\n",
+                                nesadapter->pd_config_size[2], nesadapter->pd_config_base[2]);
+
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nesadapter->pd_config_size[3] = eeprom_data;
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nesadapter->pd_config_base[3] = eeprom_data;
+                nes_debug(NES_DBG_HW, "PD3 config, size=0x%04x, base=0x%04x\n",
+                                nesadapter->pd_config_size[3], nesadapter->pd_config_base[3]);
+
+                /* Read Rx Pool Size */
+                eeprom_offset += 22;   /* 46 */
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                nesadapter->rx_pool_size = (((u32)eeprom_data) << 16) +
+                                nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nes_debug(NES_DBG_HW, "rx_pool_size = 0x%08X\n", nesadapter->rx_pool_size);
+
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                nesadapter->tx_pool_size = (((u32)eeprom_data) << 16) +
+                                nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nes_debug(NES_DBG_HW, "tx_pool_size = 0x%08X\n", nesadapter->tx_pool_size);
+
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                nesadapter->rx_threshold = (((u32)eeprom_data) << 16) +
+                                nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nes_debug(NES_DBG_HW, "rx_threshold = 0x%08X\n", nesadapter->rx_threshold);
+
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                nesadapter->tcp_timer_core_clk_divisor = (((u32)eeprom_data) << 16) +
+                                nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nes_debug(NES_DBG_HW, "tcp_timer_core_clk_divisor = 0x%08X\n",
+                                nesadapter->tcp_timer_core_clk_divisor);
+
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                nesadapter->iwarp_config = (((u32)eeprom_data) << 16) +
+                                nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nes_debug(NES_DBG_HW, "iwarp_config = 0x%08X\n", nesadapter->iwarp_config);
+
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                nesadapter->cm_config = (((u32)eeprom_data) << 16) +
+                                nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nes_debug(NES_DBG_HW, "cm_config = 0x%08X\n", nesadapter->cm_config);
+
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                nesadapter->sws_timer_config = (((u32)eeprom_data) << 16) +
+                                nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nes_debug(NES_DBG_HW, "sws_timer_config = 0x%08X\n", nesadapter->sws_timer_config);
+
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                nesadapter->tcp_config1 = (((u32)eeprom_data) << 16) +
+                                nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nes_debug(NES_DBG_HW, "tcp_config1 = 0x%08X\n", nesadapter->tcp_config1);
+
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                nesadapter->wqm_wat = (((u32)eeprom_data) << 16) +
+                                nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nes_debug(NES_DBG_HW, "wqm_wat = 0x%08X\n", nesadapter->wqm_wat);
+
+                eeprom_offset += 2;
+                eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                eeprom_offset += 2;
+                nesadapter->core_clock = (((u32)eeprom_data) << 16) +
+                                nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                nes_debug(NES_DBG_HW, "core_clock = 0x%08X\n", nesadapter->core_clock);
+
+                if ((sw_section_ver) && (nesadapter->hw_rev != NE020_REV)) {
+                        eeprom_offset += 2;
+                        eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                        nesadapter->phy_index[0] = (eeprom_data & 0xff00)>>8;
+                        nesadapter->phy_index[1] = eeprom_data & 0x00ff;
+                        eeprom_offset += 2;
+                        eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
+                        nesadapter->phy_index[2] = (eeprom_data & 0xff00)>>8;
+                        nesadapter->phy_index[3] = eeprom_data & 0x00ff;
+                } else {
+                        nesadapter->phy_index[0] = 4;
+                        nesadapter->phy_index[1] = 5;
+                        nesadapter->phy_index[2] = 6;
+                        nesadapter->phy_index[3] = 7;
+                }
+                nes_debug(NES_DBG_HW, "Phy address map = 0 > %u,  1 > %u, 2 > %u, 3 > %u\n",
+                           nesadapter->phy_index[0],nesadapter->phy_index[1],
+                           nesadapter->phy_index[2],nesadapter->phy_index[3]);
+        }
+
+        return 0;
+}
+
+
+/**
+ * nes_read16_eeprom
+ */
+static u16 nes_read16_eeprom(void __iomem *addr, u16 offset)
+{
+        writel(NES_EEPROM_READ_REQUEST + (offset >> 1),
+                        (void __iomem *)addr + NES_EEPROM_COMMAND);
+
+        do {
+        } while (readl((void __iomem *)addr + NES_EEPROM_COMMAND) &
+                        NES_EEPROM_READ_REQUEST);
+
+        return readw((void __iomem *)addr + NES_EEPROM_DATA);
+}
+
+
+/**
+ * nes_write_1G_phy_reg
+ */
+void nes_write_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 data)
+{
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        u32 u32temp;
+        u32 counter;
+        unsigned long flags;
+
+        spin_lock_irqsave(&nesadapter->phy_lock, flags);
+
+        nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
+                        0x50020000 | data | ((u32)phy_reg << 18) | ((u32)phy_addr << 23));
+        for (counter = 0; counter < 100 ; counter++) {
+                udelay(30);
+                u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
+                if (u32temp & 1) {
+                        /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */
+                        nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
+                        break;
+                }
+        }
+        if (!(u32temp & 1))
+                nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
+                                u32temp);
+
+        spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
+}
+
+
+/**
+ * nes_read_1G_phy_reg
+ * This routine only issues the read, the data must be read
+ * separately.
+ */
+void nes_read_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 *data)
+{
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        u32 u32temp;
+        u32 counter;
+        unsigned long flags;
+
+        /* nes_debug(NES_DBG_PHY, "phy addr = %d, mac_index = %d\n",
+                        phy_addr, nesdev->mac_index); */
+        spin_lock_irqsave(&nesadapter->phy_lock, flags);
+
+        nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
+                        0x60020000 | ((u32)phy_reg << 18) | ((u32)phy_addr << 23));
+        for (counter = 0; counter < 100 ; counter++) {
+                udelay(30);
+                u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
+                if (u32temp & 1) {
+                        /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */
+                        nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
+                        break;
+                }
+        }
+        if (!(u32temp & 1)) {
+                nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
+                                u32temp);
+                *data = 0xffff;
+        } else {
+                *data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
+        }
+        spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
+}
+
+
+/**
+ * nes_write_10G_phy_reg
+ */
+void nes_write_10G_phy_reg(struct nes_device *nesdev, u16 phy_reg,
+                u8 phy_addr, u16 data)
+{
+        u32 dev_addr;
+        u32 port_addr;
+        u32 u32temp;
+        u32 counter;
+
+        dev_addr = 1;
+        port_addr = phy_addr;
+
+        /* set address */
+        nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
+                        0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
+        for (counter = 0; counter < 100 ; counter++) {
+                udelay(30);
+                u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
+                if (u32temp & 1) {
+                        nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
+                        break;
+                }
+        }
+        if (!(u32temp & 1))
+                nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
+                                u32temp);
+
+        /* set data */
+        nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
+                        0x10020000 | (u32)data | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
+        for (counter = 0; counter < 100 ; counter++) {
+                udelay(30);
+                u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
+                if (u32temp & 1) {
+                        nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
+                        break;
+                }
+        }
+        if (!(u32temp & 1))
+                nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
+                                u32temp);
+}
+
+
+/**
+ * nes_read_10G_phy_reg
+ * This routine only issues the read, the data must be read
+ * separately.
+ */
+void nes_read_10G_phy_reg(struct nes_device *nesdev, u16 phy_reg, u8 phy_addr)
+{
+        u32 dev_addr;
+        u32 port_addr;
+        u32 u32temp;
+        u32 counter;
+
+        dev_addr = 1;
+        port_addr = phy_addr;
+
+        /* set address */
+        nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
+                        0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
+        for (counter = 0; counter < 100 ; counter++) {
+                udelay(30);
+                u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
+                if (u32temp & 1) {
+                        nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
+                        break;
+                }
+        }
+        if (!(u32temp & 1))
+                nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
+                                u32temp);
+
+        /* issue read */
+        nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
+                        0x30020000 | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
+        for (counter = 0; counter < 100 ; counter++) {
+                udelay(30);
+                u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
+                if (u32temp & 1) {
+                        nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
+                        break;
+                }
+        }
+        if (!(u32temp & 1))
+                nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
+                                u32temp);
+}
+
+
+/**
+ * nes_get_cqp_request
+ */
+struct nes_cqp_request *nes_get_cqp_request(struct nes_device *nesdev)
+{
+        unsigned long flags;
+        struct nes_cqp_request *cqp_request = NULL;
+
+        if (!list_empty(&nesdev->cqp_avail_reqs)) {
+                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                cqp_request = list_entry(nesdev->cqp_avail_reqs.next,
+                                struct nes_cqp_request, list);
+                list_del_init(&cqp_request->list);
+                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+        } else {
+                cqp_request = kzalloc(sizeof(struct nes_cqp_request), GFP_KERNEL);
+                if (cqp_request) {
+                        cqp_request->dynamic = 1;
+                        INIT_LIST_HEAD(&cqp_request->list);
+                }
+        }
+
+        if (cqp_request) {
+                init_waitqueue_head(&cqp_request->waitq);
+                cqp_request->waiting = 0;
+                cqp_request->request_done = 0;
+                cqp_request->callback = 0;
+                init_waitqueue_head(&cqp_request->waitq);
+                nes_debug(NES_DBG_CQP, "Got cqp request %p from the available list \n",
+                                cqp_request);
+        } else
+                printk(KERN_ERR PFX "%s: Could not allocated a CQP request.\n",
+                           __FUNCTION__);
+
+        return cqp_request;
+}
+
+
+/**
+ * nes_post_cqp_request
+ */
+void nes_post_cqp_request(struct nes_device *nesdev,
+                struct nes_cqp_request *cqp_request, int ring_doorbell)
+{
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        unsigned long flags;
+        u32 cqp_head;
+        u64 u64temp;
+
+        spin_lock_irqsave(&nesdev->cqp.lock, flags);
+
+        if (((((nesdev->cqp.sq_tail+(nesdev->cqp.sq_size*2))-nesdev->cqp.sq_head) &
+                        (nesdev->cqp.sq_size - 1)) != 1)
+                        && (list_empty(&nesdev->cqp_pending_reqs))) {
+                cqp_head = nesdev->cqp.sq_head++;
+                nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1;
+                cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
+                memcpy(cqp_wqe, &cqp_request->cqp_wqe, sizeof(*cqp_wqe));
+                barrier();
+                u64temp = (unsigned long)cqp_request;
+                set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_COMP_SCRATCH_LOW_IDX,
+                                    u64temp);
+                nes_debug(NES_DBG_CQP, "CQP request (opcode 0x%02X), line 1 = 0x%08X put on CQPs SQ,"
+                                " request = %p, cqp_head = %u, cqp_tail = %u, cqp_size = %u,"
+                                " waiting = %d, refcount = %d.\n",
+                                le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f,
+                                le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX]), cqp_request,
+                                nesdev->cqp.sq_head, nesdev->cqp.sq_tail, nesdev->cqp.sq_size,
+                                cqp_request->waiting, atomic_read(&cqp_request->refcount));
+                barrier();
+                if (ring_doorbell) {
+                        /* Ring doorbell (1 WQEs) */
+                        nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x01800000 | nesdev->cqp.qp_id);
+                }
+
+                barrier();
+        } else {
+                nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X), line 1 = 0x%08X"
+                                " put on the pending queue.\n",
+                                cqp_request,
+                                le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f,
+                                le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_ID_IDX]));
+                list_add_tail(&cqp_request->list, &nesdev->cqp_pending_reqs);
+        }
+
+        spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+
+        return;
+}
+
+
+/**
+ * nes_arp_table
+ */
+int nes_arp_table(struct nes_device *nesdev, u32 ip_addr, u8 *mac_addr, u32 action)
+{
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        int arp_index;
+        int err = 0;
+
+        for (arp_index = 0; (u32) arp_index < nesadapter->arp_table_size; arp_index++) {
+                if (nesadapter->arp_table[arp_index].ip_addr == ip_addr)
+                        break;
+        }
+
+        if (action == NES_ARP_ADD) {
+                if (arp_index != nesadapter->arp_table_size) {
+                        return -1;
+                }
+
+                arp_index = 0;
+                err = nes_alloc_resource(nesadapter, nesadapter->allocated_arps,
+                                nesadapter->arp_table_size, (u32 *)&arp_index, &nesadapter->next_arp_index);
+                if (err) {
+                        nes_debug(NES_DBG_NETDEV, "nes_alloc_resource returned error = %u\n", err);
+                        return err;
+                }
+                nes_debug(NES_DBG_NETDEV, "ADD, arp_index=%d\n", arp_index);
+
+                nesadapter->arp_table[arp_index].ip_addr = ip_addr;
+                memcpy(nesadapter->arp_table[arp_index].mac_addr, mac_addr, ETH_ALEN);
+                return arp_index;
+        }
+
+        /* DELETE or RESOLVE */
+        if (arp_index == nesadapter->arp_table_size) {
+                nes_debug(NES_DBG_NETDEV, "mac address not in ARP table - cannot delete or resolve\n");
+                return -1;
+        }
+
+        if (action == NES_ARP_RESOLVE) {
+                nes_debug(NES_DBG_NETDEV, "RESOLVE, arp_index=%d\n", arp_index);
+                return arp_index;
+        }
+
+        if (action == NES_ARP_DELETE) {
+                nes_debug(NES_DBG_NETDEV, "DELETE, arp_index=%d\n", arp_index);
+                nesadapter->arp_table[arp_index].ip_addr = 0;
+                memset(nesadapter->arp_table[arp_index].mac_addr, 0x00, ETH_ALEN);
+                nes_free_resource(nesadapter, nesadapter->allocated_arps, arp_index);
+                return arp_index;
+        }
+
+        return -1;
+}
+
+
+/**
+ * nes_mh_fix
+ */
+void nes_mh_fix(unsigned long parm)
+{
+        unsigned long flags;
+        struct nes_device *nesdev = (struct nes_device *)parm;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_vnic *nesvnic;
+        u32 used_chunks_tx;
+        u32 temp_used_chunks_tx;
+        u32 temp_last_used_chunks_tx;
+        u32 used_chunks_mask;
+        u32 mac_tx_frames_low;
+        u32 mac_tx_frames_high;
+        u32 mac_tx_pauses;
+        u32 serdes_status;
+        u32 reset_value;
+        u32 tx_control;
+        u32 tx_config;
+        u32 tx_pause_quanta;
+        u32 rx_control;
+        u32 rx_config;
+        u32 mac_exact_match;
+        u32 mpp_debug;
+        u32 i=0;
+        u32 chunks_tx_progress = 0;
+
+        spin_lock_irqsave(&nesadapter->phy_lock, flags);
+        if ((nesadapter->mac_sw_state[0] != NES_MAC_SW_IDLE) || (nesadapter->mac_link_down[0])) {
+                spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
+                goto no_mh_work;
+        }
+        nesadapter->mac_sw_state[0] = NES_MAC_SW_MH;
+        spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
+        do {
+                mac_tx_frames_low = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_LOW);
+                mac_tx_frames_high = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_HIGH);
+                mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
+                used_chunks_tx = nes_read_indexed(nesdev, NES_IDX_USED_CHUNKS_TX);
+                nesdev->mac_pause_frames_sent += mac_tx_pauses;
+                used_chunks_mask = 0;
+                temp_used_chunks_tx = used_chunks_tx;
+                temp_last_used_chunks_tx = nesdev->last_used_chunks_tx;
+
+                if (nesdev->netdev[0]) {
+                        nesvnic = netdev_priv(nesdev->netdev[0]);
+                } else {
+                        break;
+                }
+
+                for (i=0; i<4; i++) {
+                        used_chunks_mask <<= 8;
+                        if (nesvnic->qp_nic_index[i] != 0xff) {
+                                used_chunks_mask |= 0xff;
+                                if ((temp_used_chunks_tx&0xff)<(temp_last_used_chunks_tx&0xff)) {
+                                        chunks_tx_progress = 1;
+                                }
+                        }
+                        temp_used_chunks_tx >>= 8;
+                        temp_last_used_chunks_tx >>= 8;
+                }
+                if ((mac_tx_frames_low) || (mac_tx_frames_high) ||
+                        (!(used_chunks_tx&used_chunks_mask)) ||
+                        (!(nesdev->last_used_chunks_tx&used_chunks_mask)) ||
+                        (chunks_tx_progress) ) {
+                        nesdev->last_used_chunks_tx = used_chunks_tx;
+                        break;
+                }
+                nesdev->last_used_chunks_tx = used_chunks_tx;
+                barrier();
+
+                nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000005);
+                mh_pauses_sent++;
+                mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
+                if (mac_tx_pauses) {
+                        nesdev->mac_pause_frames_sent += mac_tx_pauses;
+                        break;
+                }
+
+                tx_control = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONTROL);
+                tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG);
+                tx_pause_quanta = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA);
+                rx_control = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONTROL);
+                rx_config = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONFIG);
+                mac_exact_match = nes_read_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM);
+                mpp_debug = nes_read_indexed(nesdev, NES_IDX_MPP_DEBUG);
+
+                /* one last ditch effort to avoid a false positive */
+                mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
+                if (mac_tx_pauses) {
+                        nesdev->last_mac_tx_pauses = nesdev->mac_pause_frames_sent;
+                        nes_debug(NES_DBG_HW, "failsafe caught slow outbound pause\n");
+                        break;
+                }
+                mh_detected++;
+
+                nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000000);
+                nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, 0x00000000);
+                reset_value = nes_read32(nesdev->regs+NES_SOFTWARE_RESET);
+
+                nes_write32(nesdev->regs+NES_SOFTWARE_RESET, reset_value | 0x0000001d);
+
+                while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET)
+                                & 0x00000040) != 0x00000040) && (i++ < 5000)) {
+                        /* mdelay(1); */
+                }
+
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, 0x00000008);
+                serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0);
+
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_EMP0, 0x000bdef7);
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_DRIVE0, 0x9ce73000);
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_MODE0, 0x0ff00000);
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_SIGDET0, 0x00000000);
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_BYPASS0, 0x00000000);
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_LOOPBACK_CONTROL0, 0x00000000);
+                if (nesadapter->OneG_Mode) {
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0182222);
+                } else {
+                        nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0042222);
+                }
+                serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_STATUS0);
+                nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000ff);
+
+                nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, tx_control);
+                nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config);
+                nes_write_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA, tx_pause_quanta);
+                nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONTROL, rx_control);
+                nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONFIG, rx_config);
+                nes_write_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM, mac_exact_match);
+                nes_write_indexed(nesdev, NES_IDX_MPP_DEBUG, mpp_debug);
+
+        } while (0);
+
+        nesadapter->mac_sw_state[0] = NES_MAC_SW_IDLE;
+no_mh_work:
+        nesdev->nesadapter->mh_timer.expires = jiffies + (HZ/5);
+        add_timer(&nesdev->nesadapter->mh_timer);
+}
+
+/**
+ * nes_clc
+ */
+void nes_clc(unsigned long parm)
+{
+        unsigned long flags;
+        struct nes_device *nesdev = (struct nes_device *)parm;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+
+        spin_lock_irqsave(&nesadapter->phy_lock, flags);
+    nesadapter->link_interrupt_count[0] = 0;
+    nesadapter->link_interrupt_count[1] = 0;
+    nesadapter->link_interrupt_count[2] = 0;
+    nesadapter->link_interrupt_count[3] = 0;
+        spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
+
+        nesadapter->lc_timer.expires = jiffies + 3600 * HZ;  /* 1 hour */
+        add_timer(&nesadapter->lc_timer);
+}
+
+
+/**
+ * nes_dump_mem
+ */
+void nes_dump_mem(unsigned int dump_debug_level, void *addr, int length)
+{
+        char  xlate[] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9',
+                'a', 'b', 'c', 'd', 'e', 'f'};
+        char  *ptr;
+        char  hex_buf[80];
+        char  ascii_buf[20];
+        int   num_char;
+        int   num_ascii;
+        int   num_hex;
+
+        if (!(nes_debug_level & dump_debug_level)) {
+                return;
+        }
+
+        ptr = addr;
+        if (length > 0x100) {
+                nes_debug(dump_debug_level, "Length truncated from %x to %x\n", length, 0x100);
+                length = 0x100;
+        }
+        nes_debug(dump_debug_level, "Address=0x%p, length=0x%x (%d)\n", ptr, length, length);
+
+        memset(ascii_buf, 0, 20);
+        memset(hex_buf, 0, 80);
+
+        num_ascii = 0;
+        num_hex = 0;
+        for (num_char = 0; num_char < length; num_char++) {
+                if (num_ascii == 8) {
+                        ascii_buf[num_ascii++] = ' ';
+                        hex_buf[num_hex++] = '-';
+                        hex_buf[num_hex++] = ' ';
+                }
+
+                if (*ptr < 0x20 || *ptr > 0x7e)
+                        ascii_buf[num_ascii++] = '.';
+                else
+                        ascii_buf[num_ascii++] = *ptr;
+                hex_buf[num_hex++] = xlate[((*ptr & 0xf0) >> 4)];
+                hex_buf[num_hex++] = xlate[*ptr & 0x0f];
+                hex_buf[num_hex++] = ' ';
+                ptr++;
+
+                if (num_ascii >= 17) {
+                        /* output line and reset */
+                        nes_debug(dump_debug_level, "   %s |  %s\n", hex_buf, ascii_buf);
+                        memset(ascii_buf, 0, 20);
+                        memset(hex_buf, 0, 80);
+                        num_ascii = 0;
+                        num_hex = 0;
+                }
+        }
+
+        /* output the rest */
+        if (num_ascii) {
+                while (num_ascii < 17) {
+                        if (num_ascii == 8) {
+                                hex_buf[num_hex++] = ' ';
+                                hex_buf[num_hex++] = ' ';
+                        }
+                        hex_buf[num_hex++] = ' ';
+                        hex_buf[num_hex++] = ' ';
+                        hex_buf[num_hex++] = ' ';
+                        num_ascii++;
+                }
+
+                nes_debug(dump_debug_level, "   %s |  %s\n", hex_buf, ascii_buf);
+        }
+}
diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c
new file mode 100644
index 000000000000..ffd4b425567f
--- /dev/null
+++ b/drivers/infiniband/hw/nes/nes_verbs.c
@@ -0,0 +1,3917 @@
+/*
+ * Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/random.h>
+#include <linux/highmem.h>
+#include <asm/byteorder.h>
+
+#include <rdma/ib_verbs.h>
+#include <rdma/iw_cm.h>
+#include <rdma/ib_user_verbs.h>
+
+#include "nes.h"
+
+#include <rdma/ib_umem.h>
+
+atomic_t mod_qp_timouts;
+atomic_t qps_created;
+atomic_t sw_qps_destroyed;
+
+
+/**
+ * nes_alloc_mw
+ */
+static struct ib_mw *nes_alloc_mw(struct ib_pd *ibpd) {
+        unsigned long flags;
+        struct nes_pd *nespd = to_nespd(ibpd);
+        struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_cqp_request *cqp_request;
+        struct nes_mr *nesmr;
+        struct ib_mw *ibmw;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        int ret;
+        u32 stag;
+        u32 stag_index = 0;
+        u32 next_stag_index = 0;
+        u32 driver_key = 0;
+        u8 stag_key = 0;
+
+        get_random_bytes(&next_stag_index, sizeof(next_stag_index));
+        stag_key = (u8)next_stag_index;
+
+        driver_key = 0;
+
+        next_stag_index >>= 8;
+        next_stag_index %= nesadapter->max_mr;
+
+        ret = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
+                        nesadapter->max_mr, &stag_index, &next_stag_index);
+        if (ret) {
+                return ERR_PTR(ret);
+        }
+
+        nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
+        if (!nesmr) {
+                nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                return ERR_PTR(-ENOMEM);
+        }
+
+        stag = stag_index << 8;
+        stag |= driver_key;
+        stag += (u32)stag_key;
+
+        nes_debug(NES_DBG_MR, "Registering STag 0x%08X, index = 0x%08X\n",
+                        stag, stag_index);
+
+        /* Register the region with the adapter */
+        cqp_request = nes_get_cqp_request(nesdev);
+        if (cqp_request == NULL) {
+                kfree(nesmr);
+                nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                return ERR_PTR(-ENOMEM);
+        }
+
+        cqp_request->waiting = 1;
+        cqp_wqe = &cqp_request->cqp_wqe;
+
+        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] =
+                        cpu_to_le32( NES_CQP_ALLOCATE_STAG | NES_CQP_STAG_RIGHTS_REMOTE_READ |
+                        NES_CQP_STAG_RIGHTS_REMOTE_WRITE | NES_CQP_STAG_VA_TO |
+                        NES_CQP_STAG_REM_ACC_EN);
+
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX, (nespd->pd_id & 0x00007fff));
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
+
+        atomic_set(&cqp_request->refcount, 2);
+        nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+
+        /* Wait for CQP */
+        ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
+                        NES_EVENT_TIMEOUT);
+        nes_debug(NES_DBG_MR, "Register STag 0x%08X completed, wait_event_timeout ret = %u,"
+                        " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
+                        stag, ret, cqp_request->major_code, cqp_request->minor_code);
+        if ((!ret) || (cqp_request->major_code)) {
+                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                        if (cqp_request->dynamic) {
+                                kfree(cqp_request);
+                        } else {
+                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                        }
+                }
+                kfree(nesmr);
+                nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                if (!ret) {
+                        return ERR_PTR(-ETIME);
+                } else {
+                        return ERR_PTR(-ENOMEM);
+                }
+        } else {
+                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                        if (cqp_request->dynamic) {
+                                kfree(cqp_request);
+                        } else {
+                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                        }
+                }
+        }
+
+        nesmr->ibmw.rkey = stag;
+        nesmr->mode = IWNES_MEMREG_TYPE_MW;
+        ibmw = &nesmr->ibmw;
+        nesmr->pbl_4k = 0;
+        nesmr->pbls_used = 0;
+
+        return ibmw;
+}
+
+
+/**
+ * nes_dealloc_mw
+ */
+static int nes_dealloc_mw(struct ib_mw *ibmw)
+{
+        struct nes_mr *nesmr = to_nesmw(ibmw);
+        struct nes_vnic *nesvnic = to_nesvnic(ibmw->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        struct nes_cqp_request *cqp_request;
+        int err = 0;
+        unsigned long flags;
+        int ret;
+
+        /* Deallocate the window with the adapter */
+        cqp_request = nes_get_cqp_request(nesdev);
+        if (cqp_request == NULL) {
+                nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
+                return -ENOMEM;
+        }
+        cqp_request->waiting = 1;
+        cqp_wqe = &cqp_request->cqp_wqe;
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, NES_CQP_DEALLOCATE_STAG);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, ibmw->rkey);
+
+        atomic_set(&cqp_request->refcount, 2);
+        nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+
+        /* Wait for CQP */
+        nes_debug(NES_DBG_MR, "Waiting for deallocate STag 0x%08X to complete.\n",
+                        ibmw->rkey);
+        ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done),
+                        NES_EVENT_TIMEOUT);
+        nes_debug(NES_DBG_MR, "Deallocate STag completed, wait_event_timeout ret = %u,"
+                        " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
+                        ret, cqp_request->major_code, cqp_request->minor_code);
+        if ((!ret) || (cqp_request->major_code)) {
+                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                        if (cqp_request->dynamic) {
+                                kfree(cqp_request);
+                        } else {
+                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                        }
+                }
+                if (!ret) {
+                        err = -ETIME;
+                } else {
+                        err = -EIO;
+                }
+        } else {
+                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                        if (cqp_request->dynamic) {
+                                kfree(cqp_request);
+                        } else {
+                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                        }
+                }
+        }
+
+        nes_free_resource(nesadapter, nesadapter->allocated_mrs,
+                        (ibmw->rkey & 0x0fffff00) >> 8);
+        kfree(nesmr);
+
+        return err;
+}
+
+
+/**
+ * nes_bind_mw
+ */
+static int nes_bind_mw(struct ib_qp *ibqp, struct ib_mw *ibmw,
+                struct ib_mw_bind *ibmw_bind)
+{
+        u64 u64temp;
+        struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        /* struct nes_mr *nesmr = to_nesmw(ibmw); */
+        struct nes_qp *nesqp = to_nesqp(ibqp);
+        struct nes_hw_qp_wqe *wqe;
+        unsigned long flags = 0;
+        u32 head;
+        u32 wqe_misc = 0;
+        u32 qsize;
+
+        if (nesqp->ibqp_state > IB_QPS_RTS)
+                return -EINVAL;
+
+                spin_lock_irqsave(&nesqp->lock, flags);
+
+        head = nesqp->hwqp.sq_head;
+        qsize = nesqp->hwqp.sq_tail;
+
+        /* Check for SQ overflow */
+        if (((head + (2 * qsize) - nesqp->hwqp.sq_tail) % qsize) == (qsize - 1)) {
+                        spin_unlock_irqrestore(&nesqp->lock, flags);
+                return -EINVAL;
+        }
+
+        wqe = &nesqp->hwqp.sq_vbase[head];
+        /* nes_debug(NES_DBG_MR, "processing sq wqe at %p, head = %u.\n", wqe, head); */
+        nes_fill_init_qp_wqe(wqe, nesqp, head);
+        u64temp = ibmw_bind->wr_id;
+        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX, u64temp);
+        wqe_misc = NES_IWARP_SQ_OP_BIND;
+
+        wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
+
+        if (ibmw_bind->send_flags & IB_SEND_SIGNALED)
+                wqe_misc |= NES_IWARP_SQ_WQE_SIGNALED_COMPL;
+
+        if (ibmw_bind->mw_access_flags & IB_ACCESS_REMOTE_WRITE) {
+                wqe_misc |= NES_CQP_STAG_RIGHTS_REMOTE_WRITE;
+        }
+        if (ibmw_bind->mw_access_flags & IB_ACCESS_REMOTE_READ) {
+                wqe_misc |= NES_CQP_STAG_RIGHTS_REMOTE_READ;
+        }
+
+        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_MISC_IDX, wqe_misc);
+        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_BIND_WQE_MR_IDX, ibmw_bind->mr->lkey);
+        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_BIND_WQE_MW_IDX, ibmw->rkey);
+        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_BIND_WQE_LENGTH_LOW_IDX,
+                        ibmw_bind->length);
+        wqe->wqe_words[NES_IWARP_SQ_BIND_WQE_LENGTH_HIGH_IDX] = 0;
+        u64temp = (u64)ibmw_bind->addr;
+        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_BIND_WQE_VA_FBO_LOW_IDX, u64temp);
+
+        head++;
+        if (head >= qsize)
+                head = 0;
+
+        nesqp->hwqp.sq_head = head;
+        barrier();
+
+        nes_write32(nesdev->regs+NES_WQE_ALLOC,
+                        (1 << 24) | 0x00800000 | nesqp->hwqp.qp_id);
+
+                spin_unlock_irqrestore(&nesqp->lock, flags);
+
+        return 0;
+}
+
+
+/**
+ * nes_alloc_fmr
+ */
+static struct ib_fmr *nes_alloc_fmr(struct ib_pd *ibpd,
+                int ibmr_access_flags,
+                struct ib_fmr_attr *ibfmr_attr)
+{
+        unsigned long flags;
+        struct nes_pd *nespd = to_nespd(ibpd);
+        struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_fmr *nesfmr;
+        struct nes_cqp_request *cqp_request;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        int ret;
+        u32 stag;
+        u32 stag_index = 0;
+        u32 next_stag_index = 0;
+        u32 driver_key = 0;
+        u32 opcode = 0;
+        u8 stag_key = 0;
+        int i=0;
+        struct nes_vpbl vpbl;
+
+        get_random_bytes(&next_stag_index, sizeof(next_stag_index));
+        stag_key = (u8)next_stag_index;
+
+        driver_key = 0;
+
+        next_stag_index >>= 8;
+        next_stag_index %= nesadapter->max_mr;
+
+        ret = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
+                        nesadapter->max_mr, &stag_index, &next_stag_index);
+        if (ret) {
+                goto failed_resource_alloc;
+        }
+
+        nesfmr = kzalloc(sizeof(*nesfmr), GFP_KERNEL);
+        if (!nesfmr) {
+                ret = -ENOMEM;
+                goto failed_fmr_alloc;
+        }
+
+        nesfmr->nesmr.mode = IWNES_MEMREG_TYPE_FMR;
+        if (ibfmr_attr->max_pages == 1) {
+                /* use zero length PBL */
+                nesfmr->nesmr.pbl_4k = 0;
+                nesfmr->nesmr.pbls_used = 0;
+        } else if (ibfmr_attr->max_pages <= 32) {
+                /* use PBL 256 */
+                nesfmr->nesmr.pbl_4k = 0;
+                nesfmr->nesmr.pbls_used = 1;
+        } else if (ibfmr_attr->max_pages <= 512) {
+                /* use 4K PBLs */
+                nesfmr->nesmr.pbl_4k = 1;
+                nesfmr->nesmr.pbls_used = 1;
+        } else {
+                /* use two level 4K PBLs */
+                /* add support for two level 256B PBLs */
+                nesfmr->nesmr.pbl_4k = 1;
+                nesfmr->nesmr.pbls_used = 1 + (ibfmr_attr->max_pages >> 9) +
+                                ((ibfmr_attr->max_pages & 511) ? 1 : 0);
+        }
+        /* Register the region with the adapter */
+        spin_lock_irqsave(&nesadapter->pbl_lock, flags);
+
+        /* track PBL resources */
+        if (nesfmr->nesmr.pbls_used != 0) {
+                if (nesfmr->nesmr.pbl_4k) {
+                        if (nesfmr->nesmr.pbls_used > nesadapter->free_4kpbl) {
+                                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                ret = -ENOMEM;
+                                goto failed_vpbl_alloc;
+                        } else {
+                                nesadapter->free_4kpbl -= nesfmr->nesmr.pbls_used;
+                        }
+                } else {
+                        if (nesfmr->nesmr.pbls_used > nesadapter->free_256pbl) {
+                                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                ret = -ENOMEM;
+                                goto failed_vpbl_alloc;
+                        } else {
+                                nesadapter->free_256pbl -= nesfmr->nesmr.pbls_used;
+                        }
+                }
+        }
+
+        /* one level pbl */
+        if (nesfmr->nesmr.pbls_used == 0) {
+                nesfmr->root_vpbl.pbl_vbase = NULL;
+                nes_debug(NES_DBG_MR,  "zero level pbl \n");
+        } else if (nesfmr->nesmr.pbls_used == 1) {
+                /* can change it to kmalloc & dma_map_single */
+                nesfmr->root_vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 4096,
+                                &nesfmr->root_vpbl.pbl_pbase);
+                if (!nesfmr->root_vpbl.pbl_vbase) {
+                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                        ret = -ENOMEM;
+                        goto failed_vpbl_alloc;
+                }
+                nesfmr->leaf_pbl_cnt = 0;
+                nes_debug(NES_DBG_MR, "one level pbl, root_vpbl.pbl_vbase=%p \n",
+                                nesfmr->root_vpbl.pbl_vbase);
+        }
+        /* two level pbl */
+        else {
+                nesfmr->root_vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 8192,
+                                &nesfmr->root_vpbl.pbl_pbase);
+                if (!nesfmr->root_vpbl.pbl_vbase) {
+                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                        ret = -ENOMEM;
+                        goto failed_vpbl_alloc;
+                }
+
+                nesfmr->root_vpbl.leaf_vpbl = kzalloc(sizeof(*nesfmr->root_vpbl.leaf_vpbl)*1024, GFP_KERNEL);
+                if (!nesfmr->root_vpbl.leaf_vpbl) {
+                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                        ret = -ENOMEM;
+                        goto failed_leaf_vpbl_alloc;
+                }
+
+                nesfmr->leaf_pbl_cnt = nesfmr->nesmr.pbls_used-1;
+                nes_debug(NES_DBG_MR, "two level pbl, root_vpbl.pbl_vbase=%p"
+                                " leaf_pbl_cnt=%d root_vpbl.leaf_vpbl=%p\n",
+                                nesfmr->root_vpbl.pbl_vbase, nesfmr->leaf_pbl_cnt, nesfmr->root_vpbl.leaf_vpbl);
+
+                for (i=0; i<nesfmr->leaf_pbl_cnt; i++)
+                        nesfmr->root_vpbl.leaf_vpbl[i].pbl_vbase = NULL;
+
+                for (i=0; i<nesfmr->leaf_pbl_cnt; i++) {
+                        vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 4096,
+                                        &vpbl.pbl_pbase);
+
+                        if (!vpbl.pbl_vbase) {
+                                ret = -ENOMEM;
+                                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                goto failed_leaf_vpbl_pages_alloc;
+                        }
+
+                        nesfmr->root_vpbl.pbl_vbase[i].pa_low = cpu_to_le32((u32)vpbl.pbl_pbase);
+                        nesfmr->root_vpbl.pbl_vbase[i].pa_high = cpu_to_le32((u32)((((u64)vpbl.pbl_pbase)>>32)));
+                        nesfmr->root_vpbl.leaf_vpbl[i] = vpbl;
+
+                        nes_debug(NES_DBG_MR, "pbase_low=0x%x, pbase_high=0x%x, vpbl=%p\n",
+                                        nesfmr->root_vpbl.pbl_vbase[i].pa_low,
+                                        nesfmr->root_vpbl.pbl_vbase[i].pa_high,
+                                        &nesfmr->root_vpbl.leaf_vpbl[i]);
+                }
+        }
+        nesfmr->ib_qp = NULL;
+        nesfmr->access_rights =0;
+
+        stag = stag_index << 8;
+        stag |= driver_key;
+        stag += (u32)stag_key;
+
+        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+        cqp_request = nes_get_cqp_request(nesdev);
+        if (cqp_request == NULL) {
+                nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
+                ret = -ENOMEM;
+                goto failed_leaf_vpbl_pages_alloc;
+        }
+        cqp_request->waiting = 1;
+        cqp_wqe = &cqp_request->cqp_wqe;
+
+        nes_debug(NES_DBG_MR, "Registering STag 0x%08X, index = 0x%08X\n",
+                        stag, stag_index);
+
+        opcode = NES_CQP_ALLOCATE_STAG | NES_CQP_STAG_VA_TO | NES_CQP_STAG_MR;
+
+        if (nesfmr->nesmr.pbl_4k == 1)
+                opcode |= NES_CQP_STAG_PBL_BLK_SIZE;
+
+        if (ibmr_access_flags & IB_ACCESS_REMOTE_WRITE) {
+                opcode |= NES_CQP_STAG_RIGHTS_REMOTE_WRITE |
+                                NES_CQP_STAG_RIGHTS_LOCAL_WRITE | NES_CQP_STAG_REM_ACC_EN;
+                nesfmr->access_rights |=
+                                NES_CQP_STAG_RIGHTS_REMOTE_WRITE | NES_CQP_STAG_RIGHTS_LOCAL_WRITE |
+                                NES_CQP_STAG_REM_ACC_EN;
+        }
+
+        if (ibmr_access_flags & IB_ACCESS_REMOTE_READ) {
+                opcode |= NES_CQP_STAG_RIGHTS_REMOTE_READ |
+                                NES_CQP_STAG_RIGHTS_LOCAL_READ | NES_CQP_STAG_REM_ACC_EN;
+                nesfmr->access_rights |=
+                                NES_CQP_STAG_RIGHTS_REMOTE_READ | NES_CQP_STAG_RIGHTS_LOCAL_READ |
+                                NES_CQP_STAG_REM_ACC_EN;
+        }
+
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX, (nespd->pd_id & 0x00007fff));
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
+
+        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX] =
+                        cpu_to_le32((nesfmr->nesmr.pbls_used>1) ?
+                        (nesfmr->nesmr.pbls_used-1) : nesfmr->nesmr.pbls_used);
+
+        atomic_set(&cqp_request->refcount, 2);
+        nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+
+        /* Wait for CQP */
+        ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
+                        NES_EVENT_TIMEOUT);
+        nes_debug(NES_DBG_MR, "Register STag 0x%08X completed, wait_event_timeout ret = %u,"
+                        " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
+                        stag, ret, cqp_request->major_code, cqp_request->minor_code);
+
+        if ((!ret) || (cqp_request->major_code)) {
+                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                        if (cqp_request->dynamic) {
+                                kfree(cqp_request);
+                        } else {
+                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                        }
+                }
+                ret = (!ret) ? -ETIME : -EIO;
+                goto failed_leaf_vpbl_pages_alloc;
+        } else {
+                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                        if (cqp_request->dynamic) {
+                                kfree(cqp_request);
+                        } else {
+                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                        }
+                }
+        }
+
+        nesfmr->nesmr.ibfmr.lkey = stag;
+        nesfmr->nesmr.ibfmr.rkey = stag;
+        nesfmr->attr = *ibfmr_attr;
+
+        return &nesfmr->nesmr.ibfmr;
+
+        failed_leaf_vpbl_pages_alloc:
+        /* unroll all allocated pages */
+        for (i=0; i<nesfmr->leaf_pbl_cnt; i++) {
+                if (nesfmr->root_vpbl.leaf_vpbl[i].pbl_vbase) {
+                        pci_free_consistent(nesdev->pcidev, 4096, nesfmr->root_vpbl.leaf_vpbl[i].pbl_vbase,
+                                        nesfmr->root_vpbl.leaf_vpbl[i].pbl_pbase);
+                }
+        }
+        if (nesfmr->root_vpbl.leaf_vpbl)
+                kfree(nesfmr->root_vpbl.leaf_vpbl);
+
+        failed_leaf_vpbl_alloc:
+        if (nesfmr->leaf_pbl_cnt == 0) {
+                if (nesfmr->root_vpbl.pbl_vbase)
+                        pci_free_consistent(nesdev->pcidev, 4096, nesfmr->root_vpbl.pbl_vbase,
+                                        nesfmr->root_vpbl.pbl_pbase);
+        } else
+                pci_free_consistent(nesdev->pcidev, 8192, nesfmr->root_vpbl.pbl_vbase,
+                                nesfmr->root_vpbl.pbl_pbase);
+
+        failed_vpbl_alloc:
+        kfree(nesfmr);
+
+        failed_fmr_alloc:
+        nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+
+        failed_resource_alloc:
+        return ERR_PTR(ret);
+}
+
+
+/**
+ * nes_dealloc_fmr
+ */
+static int nes_dealloc_fmr(struct ib_fmr *ibfmr)
+{
+        struct nes_mr *nesmr = to_nesmr_from_ibfmr(ibfmr);
+        struct nes_fmr *nesfmr = to_nesfmr(nesmr);
+        struct nes_vnic *nesvnic = to_nesvnic(ibfmr->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_mr temp_nesmr = *nesmr;
+        int i = 0;
+
+        temp_nesmr.ibmw.device = ibfmr->device;
+        temp_nesmr.ibmw.pd = ibfmr->pd;
+        temp_nesmr.ibmw.rkey = ibfmr->rkey;
+        temp_nesmr.ibmw.uobject = NULL;
+
+        /* free the resources */
+        if (nesfmr->leaf_pbl_cnt == 0) {
+                /* single PBL case */
+                if (nesfmr->root_vpbl.pbl_vbase)
+                        pci_free_consistent(nesdev->pcidev, 4096, nesfmr->root_vpbl.pbl_vbase,
+                                        nesfmr->root_vpbl.pbl_pbase);
+        } else {
+                for (i = 0; i < nesfmr->leaf_pbl_cnt; i++) {
+                        pci_free_consistent(nesdev->pcidev, 4096, nesfmr->root_vpbl.leaf_vpbl[i].pbl_vbase,
+                                        nesfmr->root_vpbl.leaf_vpbl[i].pbl_pbase);
+                }
+                kfree(nesfmr->root_vpbl.leaf_vpbl);
+                pci_free_consistent(nesdev->pcidev, 8192, nesfmr->root_vpbl.pbl_vbase,
+                                nesfmr->root_vpbl.pbl_pbase);
+        }
+
+        return nes_dealloc_mw(&temp_nesmr.ibmw);
+}
+
+
+/**
+ * nes_map_phys_fmr
+ */
+static int nes_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
+                int list_len, u64 iova)
+{
+        return 0;
+}
+
+
+/**
+ * nes_unmap_frm
+ */
+static int nes_unmap_fmr(struct list_head *ibfmr_list)
+{
+        return 0;
+}
+
+
+
+/**
+ * nes_query_device
+ */
+static int nes_query_device(struct ib_device *ibdev, struct ib_device_attr *props)
+{
+        struct nes_vnic *nesvnic = to_nesvnic(ibdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_ib_device *nesibdev = nesvnic->nesibdev;
+
+        memset(props, 0, sizeof(*props));
+        memcpy(&props->sys_image_guid, nesvnic->netdev->dev_addr, 6);
+
+        props->fw_ver = nesdev->nesadapter->fw_ver;
+        props->device_cap_flags = nesdev->nesadapter->device_cap_flags;
+        props->vendor_id = nesdev->nesadapter->vendor_id;
+        props->vendor_part_id = nesdev->nesadapter->vendor_part_id;
+        props->hw_ver = nesdev->nesadapter->hw_rev;
+        props->max_mr_size = 0x80000000;
+        props->max_qp = nesibdev->max_qp;
+        props->max_qp_wr = nesdev->nesadapter->max_qp_wr - 2;
+        props->max_sge = nesdev->nesadapter->max_sge;
+        props->max_cq = nesibdev->max_cq;
+        props->max_cqe = nesdev->nesadapter->max_cqe - 1;
+        props->max_mr = nesibdev->max_mr;
+        props->max_mw = nesibdev->max_mr;
+        props->max_pd = nesibdev->max_pd;
+        props->max_sge_rd = 1;
+        switch (nesdev->nesadapter->max_irrq_wr) {
+                case 0:
+                        props->max_qp_rd_atom = 1;
+                        break;
+                case 1:
+                        props->max_qp_rd_atom = 4;
+                        break;
+                case 2:
+                        props->max_qp_rd_atom = 16;
+                        break;
+                case 3:
+                        props->max_qp_rd_atom = 32;
+                        break;
+                default:
+                        props->max_qp_rd_atom = 0;
+        }
+        props->max_qp_init_rd_atom = props->max_qp_wr;
+        props->atomic_cap = IB_ATOMIC_NONE;
+        props->max_map_per_fmr = 1;
+
+        return 0;
+}
+
+
+/**
+ * nes_query_port
+ */
+static int nes_query_port(struct ib_device *ibdev, u8 port, struct ib_port_attr *props)
+{
+        memset(props, 0, sizeof(*props));
+
+        props->max_mtu = IB_MTU_2048;
+        props->active_mtu = IB_MTU_2048;
+        props->lid = 1;
+        props->lmc = 0;
+        props->sm_lid = 0;
+        props->sm_sl = 0;
+        props->state = IB_PORT_ACTIVE;
+        props->phys_state = 0;
+        props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
+                        IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
+        props->gid_tbl_len = 1;
+        props->pkey_tbl_len = 1;
+        props->qkey_viol_cntr = 0;
+        props->active_width = IB_WIDTH_4X;
+        props->active_speed = 1;
+        props->max_msg_sz = 0x80000000;
+
+        return 0;
+}
+
+
+/**
+ * nes_modify_port
+ */
+static int nes_modify_port(struct ib_device *ibdev, u8 port,
+                int port_modify_mask, struct ib_port_modify *props)
+{
+        return 0;
+}
+
+
+/**
+ * nes_query_pkey
+ */
+static int nes_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
+{
+        *pkey = 0;
+        return 0;
+}
+
+
+/**
+ * nes_query_gid
+ */
+static int nes_query_gid(struct ib_device *ibdev, u8 port,
+                int index, union ib_gid *gid)
+{
+        struct nes_vnic *nesvnic = to_nesvnic(ibdev);
+
+        memset(&(gid->raw[0]), 0, sizeof(gid->raw));
+        memcpy(&(gid->raw[0]), nesvnic->netdev->dev_addr, 6);
+
+        return 0;
+}
+
+
+/**
+ * nes_alloc_ucontext - Allocate the user context data structure. This keeps track
+ * of all objects associated with a particular user-mode client.
+ */
+static struct ib_ucontext *nes_alloc_ucontext(struct ib_device *ibdev,
+                struct ib_udata *udata)
+{
+        struct nes_vnic *nesvnic = to_nesvnic(ibdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_alloc_ucontext_req req;
+        struct nes_alloc_ucontext_resp uresp;
+        struct nes_ucontext *nes_ucontext;
+        struct nes_ib_device *nesibdev = nesvnic->nesibdev;
+
+
+        if (ib_copy_from_udata(&req, udata, sizeof(struct nes_alloc_ucontext_req))) {
+                printk(KERN_ERR PFX "Invalid structure size on allocate user context.\n");
+                return ERR_PTR(-EINVAL);
+        }
+
+        if (req.userspace_ver != NES_ABI_USERSPACE_VER) {
+                printk(KERN_ERR PFX "Invalid userspace driver version detected. Detected version %d, should be %d\n",
+                        req.userspace_ver, NES_ABI_USERSPACE_VER);
+                return ERR_PTR(-EINVAL);
+        }
+
+
+        memset(&uresp, 0, sizeof uresp);
+
+        uresp.max_qps = nesibdev->max_qp;
+        uresp.max_pds = nesibdev->max_pd;
+        uresp.wq_size = nesdev->nesadapter->max_qp_wr * 2;
+        uresp.virtwq = nesadapter->virtwq;
+        uresp.kernel_ver = NES_ABI_KERNEL_VER;
+
+        nes_ucontext = kzalloc(sizeof *nes_ucontext, GFP_KERNEL);
+        if (!nes_ucontext)
+                return ERR_PTR(-ENOMEM);
+
+        nes_ucontext->nesdev = nesdev;
+        nes_ucontext->mmap_wq_offset = uresp.max_pds;
+        nes_ucontext->mmap_cq_offset = nes_ucontext->mmap_wq_offset +
+                        ((sizeof(struct nes_hw_qp_wqe) * uresp.max_qps * 2) + PAGE_SIZE-1) /
+                        PAGE_SIZE;
+
+
+        if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
+                kfree(nes_ucontext);
+                return ERR_PTR(-EFAULT);
+        }
+
+        INIT_LIST_HEAD(&nes_ucontext->cq_reg_mem_list);
+        INIT_LIST_HEAD(&nes_ucontext->qp_reg_mem_list);
+        atomic_set(&nes_ucontext->usecnt, 1);
+        return &nes_ucontext->ibucontext;
+}
+
+
+/**
+ * nes_dealloc_ucontext
+ */
+static int nes_dealloc_ucontext(struct ib_ucontext *context)
+{
+        /* struct nes_vnic *nesvnic = to_nesvnic(context->device); */
+        /* struct nes_device *nesdev = nesvnic->nesdev; */
+        struct nes_ucontext *nes_ucontext = to_nesucontext(context);
+
+        if (!atomic_dec_and_test(&nes_ucontext->usecnt))
+          return 0;
+        kfree(nes_ucontext);
+        return 0;
+}
+
+
+/**
+ * nes_mmap
+ */
+static int nes_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
+{
+        unsigned long index;
+        struct nes_vnic *nesvnic = to_nesvnic(context->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        /* struct nes_adapter *nesadapter = nesdev->nesadapter; */
+        struct nes_ucontext *nes_ucontext;
+        struct nes_qp *nesqp;
+
+        nes_ucontext = to_nesucontext(context);
+
+
+        if (vma->vm_pgoff >= nes_ucontext->mmap_wq_offset) {
+                index = (vma->vm_pgoff - nes_ucontext->mmap_wq_offset) * PAGE_SIZE;
+                index /= ((sizeof(struct nes_hw_qp_wqe) * nesdev->nesadapter->max_qp_wr * 2) +
+                                PAGE_SIZE-1) & (~(PAGE_SIZE-1));
+                if (!test_bit(index, nes_ucontext->allocated_wqs)) {
+                        nes_debug(NES_DBG_MMAP, "wq %lu not allocated\n", index);
+                        return -EFAULT;
+                }
+                nesqp = nes_ucontext->mmap_nesqp[index];
+                if (nesqp == NULL) {
+                        nes_debug(NES_DBG_MMAP, "wq %lu has a NULL QP base.\n", index);
+                        return -EFAULT;
+                }
+                if (remap_pfn_range(vma, vma->vm_start,
+                                virt_to_phys(nesqp->hwqp.sq_vbase) >> PAGE_SHIFT,
+                                vma->vm_end - vma->vm_start,
+                                vma->vm_page_prot)) {
+                        nes_debug(NES_DBG_MMAP, "remap_pfn_range failed.\n");
+                        return -EAGAIN;
+                }
+                vma->vm_private_data = nesqp;
+                return 0;
+        } else {
+                index = vma->vm_pgoff;
+                if (!test_bit(index, nes_ucontext->allocated_doorbells))
+                        return -EFAULT;
+
+                vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+                if (io_remap_pfn_range(vma, vma->vm_start,
+                                (nesdev->doorbell_start +
+                                ((nes_ucontext->mmap_db_index[index] - nesdev->base_doorbell_index) * 4096))
+                                >> PAGE_SHIFT, PAGE_SIZE, vma->vm_page_prot))
+                        return -EAGAIN;
+                vma->vm_private_data = nes_ucontext;
+                return 0;
+        }
+
+        return -ENOSYS;
+}
+
+
+/**
+ * nes_alloc_pd
+ */
+static struct ib_pd *nes_alloc_pd(struct ib_device *ibdev,
+                struct ib_ucontext *context, struct ib_udata *udata)
+{
+        struct nes_pd *nespd;
+        struct nes_vnic *nesvnic = to_nesvnic(ibdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_ucontext *nesucontext;
+        struct nes_alloc_pd_resp uresp;
+        u32 pd_num = 0;
+        int err;
+
+        nes_debug(NES_DBG_PD, "nesvnic=%p, netdev=%p %s, ibdev=%p, context=%p, netdev refcnt=%u\n",
+                        nesvnic, nesdev->netdev[0], nesdev->netdev[0]->name, ibdev, context,
+                        atomic_read(&nesvnic->netdev->refcnt));
+
+        err = nes_alloc_resource(nesadapter, nesadapter->allocated_pds,
+                        nesadapter->max_pd, &pd_num, &nesadapter->next_pd);
+        if (err) {
+                return ERR_PTR(err);
+        }
+
+        nespd = kzalloc(sizeof (struct nes_pd), GFP_KERNEL);
+        if (!nespd) {
+                nes_free_resource(nesadapter, nesadapter->allocated_pds, pd_num);
+                return ERR_PTR(-ENOMEM);
+        }
+
+        nes_debug(NES_DBG_PD, "Allocating PD (%p) for ib device %s\n",
+                        nespd, nesvnic->nesibdev->ibdev.name);
+
+        nespd->pd_id = (pd_num << (PAGE_SHIFT-12)) + nesadapter->base_pd;
+
+        if (context) {
+                nesucontext = to_nesucontext(context);
+                nespd->mmap_db_index = find_next_zero_bit(nesucontext->allocated_doorbells,
+                                NES_MAX_USER_DB_REGIONS, nesucontext->first_free_db);
+                nes_debug(NES_DBG_PD, "find_first_zero_biton doorbells returned %u, mapping pd_id %u.\n",
+                                nespd->mmap_db_index, nespd->pd_id);
+                if (nespd->mmap_db_index > NES_MAX_USER_DB_REGIONS) {
+                        nes_debug(NES_DBG_PD, "mmap_db_index > MAX\n");
+                        nes_free_resource(nesadapter, nesadapter->allocated_pds, pd_num);
+                        kfree(nespd);
+                        return ERR_PTR(-ENOMEM);
+                }
+
+                uresp.pd_id = nespd->pd_id;
+                uresp.mmap_db_index = nespd->mmap_db_index;
+                if (ib_copy_to_udata(udata, &uresp, sizeof (struct nes_alloc_pd_resp))) {
+                        nes_free_resource(nesadapter, nesadapter->allocated_pds, pd_num);
+                        kfree(nespd);
+                        return ERR_PTR(-EFAULT);
+                }
+
+                set_bit(nespd->mmap_db_index, nesucontext->allocated_doorbells);
+                nesucontext->mmap_db_index[nespd->mmap_db_index] = nespd->pd_id;
+                nesucontext->first_free_db = nespd->mmap_db_index + 1;
+        }
+
+        nes_debug(NES_DBG_PD, "PD%u structure located @%p.\n", nespd->pd_id, nespd);
+        return &nespd->ibpd;
+}
+
+
+/**
+ * nes_dealloc_pd
+ */
+static int nes_dealloc_pd(struct ib_pd *ibpd)
+{
+        struct nes_ucontext *nesucontext;
+        struct nes_pd *nespd = to_nespd(ibpd);
+        struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+
+        if ((ibpd->uobject) && (ibpd->uobject->context)) {
+                nesucontext = to_nesucontext(ibpd->uobject->context);
+                nes_debug(NES_DBG_PD, "Clearing bit %u from allocated doorbells\n",
+                                nespd->mmap_db_index);
+                clear_bit(nespd->mmap_db_index, nesucontext->allocated_doorbells);
+                nesucontext->mmap_db_index[nespd->mmap_db_index] = 0;
+                if (nesucontext->first_free_db > nespd->mmap_db_index) {
+                        nesucontext->first_free_db = nespd->mmap_db_index;
+                }
+        }
+
+        nes_debug(NES_DBG_PD, "Deallocating PD%u structure located @%p.\n",
+                        nespd->pd_id, nespd);
+        nes_free_resource(nesadapter, nesadapter->allocated_pds,
+                        (nespd->pd_id-nesadapter->base_pd)>>(PAGE_SHIFT-12));
+        kfree(nespd);
+
+        return 0;
+}
+
+
+/**
+ * nes_create_ah
+ */
+static struct ib_ah *nes_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr)
+{
+        return ERR_PTR(-ENOSYS);
+}
+
+
+/**
+ * nes_destroy_ah
+ */
+static int nes_destroy_ah(struct ib_ah *ah)
+{
+        return -ENOSYS;
+}
+
+
+/**
+ * nes_get_encoded_size
+ */
+static inline u8 nes_get_encoded_size(int *size)
+{
+        u8 encoded_size = 0;
+        if (*size <= 32) {
+                *size = 32;
+                encoded_size = 1;
+        } else if (*size <= 128) {
+                *size = 128;
+                encoded_size = 2;
+        } else if (*size <= 512) {
+                *size = 512;
+                encoded_size = 3;
+        }
+        return (encoded_size);
+}
+
+
+
+/**
+ * nes_setup_virt_qp
+ */
+static int nes_setup_virt_qp(struct nes_qp *nesqp, struct nes_pbl *nespbl,
+                struct nes_vnic *nesvnic, int sq_size, int rq_size)
+{
+        unsigned long flags;
+        void *mem;
+        __le64 *pbl = NULL;
+        __le64 *tpbl;
+        __le64 *pblbuffer;
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        u32 pbl_entries;
+        u8 rq_pbl_entries;
+        u8 sq_pbl_entries;
+
+        pbl_entries = nespbl->pbl_size >> 3;
+        nes_debug(NES_DBG_QP, "Userspace PBL, pbl_size=%u, pbl_entries = %d pbl_vbase=%p, pbl_pbase=%p\n",
+                        nespbl->pbl_size, pbl_entries,
+                        (void *)nespbl->pbl_vbase,
+                        (void *)nespbl->pbl_pbase);
+        pbl = (__le64 *) nespbl->pbl_vbase; /* points to first pbl entry */
+        /* now lets set the sq_vbase as well as rq_vbase addrs we will assign */
+        /* the first pbl to be fro the rq_vbase... */
+        rq_pbl_entries = (rq_size * sizeof(struct nes_hw_qp_wqe)) >> 12;
+        sq_pbl_entries = (sq_size * sizeof(struct nes_hw_qp_wqe)) >> 12;
+        nesqp->hwqp.sq_pbase = (le32_to_cpu(((__le32 *)pbl)[0])) | ((u64)((le32_to_cpu(((__le32 *)pbl)[1]))) << 32);
+        if (!nespbl->page) {
+                nes_debug(NES_DBG_QP, "QP nespbl->page is NULL \n");
+                kfree(nespbl);
+                return -ENOMEM;
+        }
+
+        nesqp->hwqp.sq_vbase = kmap(nespbl->page);
+        nesqp->page = nespbl->page;
+        if (!nesqp->hwqp.sq_vbase) {
+                nes_debug(NES_DBG_QP, "QP sq_vbase kmap failed\n");
+                kfree(nespbl);
+                return -ENOMEM;
+        }
+
+        /* Now to get to sq.. we need to calculate how many */
+        /* PBL entries were used by the rq.. */
+        pbl += sq_pbl_entries;
+        nesqp->hwqp.rq_pbase = (le32_to_cpu(((__le32 *)pbl)[0])) | ((u64)((le32_to_cpu(((__le32 *)pbl)[1]))) << 32);
+        /* nesqp->hwqp.rq_vbase = bus_to_virt(*pbl); */
+        /*nesqp->hwqp.rq_vbase = phys_to_virt(*pbl); */
+
+        nes_debug(NES_DBG_QP, "QP sq_vbase= %p sq_pbase=%p rq_vbase=%p rq_pbase=%p\n",
+                        nesqp->hwqp.sq_vbase, (void *)nesqp->hwqp.sq_pbase,
+                        nesqp->hwqp.rq_vbase, (void *)nesqp->hwqp.rq_pbase);
+        spin_lock_irqsave(&nesadapter->pbl_lock, flags);
+        if (!nesadapter->free_256pbl) {
+                pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
+                                nespbl->pbl_pbase);
+                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                kunmap(nesqp->page);
+                kfree(nespbl);
+                return -ENOMEM;
+        }
+        nesadapter->free_256pbl--;
+        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+
+        nesqp->pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 256, &nesqp->pbl_pbase);
+        pblbuffer = nesqp->pbl_vbase;
+        if (!nesqp->pbl_vbase) {
+                /* memory allocated during nes_reg_user_mr() */
+                pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
+                                    nespbl->pbl_pbase);
+                kfree(nespbl);
+                spin_lock_irqsave(&nesadapter->pbl_lock, flags);
+                nesadapter->free_256pbl++;
+                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                kunmap(nesqp->page);
+                return -ENOMEM;
+        }
+        memset(nesqp->pbl_vbase, 0, 256);
+        /* fill in the page address in the pbl buffer.. */
+        tpbl = pblbuffer + 16;
+        pbl = (__le64 *)nespbl->pbl_vbase;
+        while (sq_pbl_entries--)
+                *tpbl++ = *pbl++;
+        tpbl = pblbuffer;
+        while (rq_pbl_entries--)
+                *tpbl++ = *pbl++;
+
+        /* done with memory allocated during nes_reg_user_mr() */
+        pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
+                            nespbl->pbl_pbase);
+        kfree(nespbl);
+
+        nesqp->qp_mem_size =
+                        max((u32)sizeof(struct nes_qp_context), ((u32)256)) + 256;     /* this is Q2 */
+        /* Round up to a multiple of a page */
+        nesqp->qp_mem_size += PAGE_SIZE - 1;
+        nesqp->qp_mem_size &= ~(PAGE_SIZE - 1);
+
+        mem = pci_alloc_consistent(nesdev->pcidev, nesqp->qp_mem_size,
+                        &nesqp->hwqp.q2_pbase);
+
+        if (!mem) {
+                pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase);
+                nesqp->pbl_vbase = NULL;
+                spin_lock_irqsave(&nesadapter->pbl_lock, flags);
+                nesadapter->free_256pbl++;
+                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                kunmap(nesqp->page);
+                return -ENOMEM;
+        }
+        nesqp->hwqp.q2_vbase = mem;
+        mem += 256;
+        memset(nesqp->hwqp.q2_vbase, 0, 256);
+        nesqp->nesqp_context = mem;
+        memset(nesqp->nesqp_context, 0, sizeof(*nesqp->nesqp_context));
+        nesqp->nesqp_context_pbase = nesqp->hwqp.q2_pbase + 256;
+
+        return 0;
+}
+
+
+/**
+ * nes_setup_mmap_qp
+ */
+static int nes_setup_mmap_qp(struct nes_qp *nesqp, struct nes_vnic *nesvnic,
+                int sq_size, int rq_size)
+{
+        void *mem;
+        struct nes_device *nesdev = nesvnic->nesdev;
+
+        nesqp->qp_mem_size = (sizeof(struct nes_hw_qp_wqe) * sq_size) +
+                        (sizeof(struct nes_hw_qp_wqe) * rq_size) +
+                        max((u32)sizeof(struct nes_qp_context), ((u32)256)) +
+                        256; /* this is Q2 */
+        /* Round up to a multiple of a page */
+        nesqp->qp_mem_size += PAGE_SIZE - 1;
+        nesqp->qp_mem_size &= ~(PAGE_SIZE - 1);
+
+        mem = pci_alloc_consistent(nesdev->pcidev, nesqp->qp_mem_size,
+                        &nesqp->hwqp.sq_pbase);
+        if (!mem)
+                return -ENOMEM;
+        nes_debug(NES_DBG_QP, "PCI consistent memory for "
+                        "host descriptor rings located @ %p (pa = 0x%08lX.) size = %u.\n",
+                        mem, (unsigned long)nesqp->hwqp.sq_pbase, nesqp->qp_mem_size);
+
+        memset(mem, 0, nesqp->qp_mem_size);
+
+        nesqp->hwqp.sq_vbase = mem;
+        mem += sizeof(struct nes_hw_qp_wqe) * sq_size;
+
+        nesqp->hwqp.rq_vbase = mem;
+        nesqp->hwqp.rq_pbase = nesqp->hwqp.sq_pbase +
+                        sizeof(struct nes_hw_qp_wqe) * sq_size;
+        mem += sizeof(struct nes_hw_qp_wqe) * rq_size;
+
+        nesqp->hwqp.q2_vbase = mem;
+        nesqp->hwqp.q2_pbase = nesqp->hwqp.rq_pbase +
+                        sizeof(struct nes_hw_qp_wqe) * rq_size;
+        mem += 256;
+        memset(nesqp->hwqp.q2_vbase, 0, 256);
+
+        nesqp->nesqp_context = mem;
+        nesqp->nesqp_context_pbase = nesqp->hwqp.q2_pbase + 256;
+        memset(nesqp->nesqp_context, 0, sizeof(*nesqp->nesqp_context));
+        return 0;
+}
+
+
+/**
+ * nes_free_qp_mem() is to free up the qp's pci_alloc_consistent() memory.
+ */
+static inline void nes_free_qp_mem(struct nes_device *nesdev,
+                struct nes_qp *nesqp, int virt_wqs)
+{
+        unsigned long flags;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        if (!virt_wqs) {
+                pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size,
+                                nesqp->hwqp.sq_vbase, nesqp->hwqp.sq_pbase);
+        }else {
+                spin_lock_irqsave(&nesadapter->pbl_lock, flags);
+                nesadapter->free_256pbl++;
+                spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size, nesqp->hwqp.q2_vbase, nesqp->hwqp.q2_pbase);
+                pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase );
+                nesqp->pbl_vbase = NULL;
+                kunmap(nesqp->page);
+        }
+}
+
+
+/**
+ * nes_create_qp
+ */
+static struct ib_qp *nes_create_qp(struct ib_pd *ibpd,
+                struct ib_qp_init_attr *init_attr, struct ib_udata *udata)
+{
+        u64 u64temp= 0;
+        u64 u64nesqp = 0;
+        struct nes_pd *nespd = to_nespd(ibpd);
+        struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_qp *nesqp;
+        struct nes_cq *nescq;
+        struct nes_ucontext *nes_ucontext;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        struct nes_cqp_request *cqp_request;
+        struct nes_create_qp_req req;
+        struct nes_create_qp_resp uresp;
+        struct nes_pbl  *nespbl = NULL;
+        u32 qp_num = 0;
+        u32 opcode = 0;
+        /* u32 counter = 0; */
+        void *mem;
+        unsigned long flags;
+        int ret;
+        int err;
+        int virt_wqs = 0;
+        int sq_size;
+        int rq_size;
+        u8 sq_encoded_size;
+        u8 rq_encoded_size;
+        /* int counter; */
+
+        atomic_inc(&qps_created);
+        switch (init_attr->qp_type) {
+                case IB_QPT_RC:
+                        if (nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) {
+                                init_attr->cap.max_inline_data = 0;
+                        } else {
+                                init_attr->cap.max_inline_data = 64;
+                        }
+                        sq_size = init_attr->cap.max_send_wr;
+                        rq_size = init_attr->cap.max_recv_wr;
+
+                        // check if the encoded sizes are OK or not...
+                        sq_encoded_size = nes_get_encoded_size(&sq_size);
+                        rq_encoded_size = nes_get_encoded_size(&rq_size);
+
+                        if ((!sq_encoded_size) || (!rq_encoded_size)) {
+                                nes_debug(NES_DBG_QP, "ERROR bad rq (%u) or sq (%u) size\n",
+                                                rq_size, sq_size);
+                                return ERR_PTR(-EINVAL);
+                        }
+
+                        init_attr->cap.max_send_wr = sq_size -2;
+                        init_attr->cap.max_recv_wr = rq_size -1;
+                        nes_debug(NES_DBG_QP, "RQ size=%u, SQ Size=%u\n", rq_size, sq_size);
+
+                        ret = nes_alloc_resource(nesadapter, nesadapter->allocated_qps,
+                                        nesadapter->max_qp, &qp_num, &nesadapter->next_qp);
+                        if (ret) {
+                                return ERR_PTR(ret);
+                        }
+
+                        /* Need 512 (actually now 1024) byte alignment on this structure */
+                        mem = kzalloc(sizeof(*nesqp)+NES_SW_CONTEXT_ALIGN-1, GFP_KERNEL);
+                        if (!mem) {
+                                nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
+                                nes_debug(NES_DBG_QP, "Unable to allocate QP\n");
+                                return ERR_PTR(-ENOMEM);
+                        }
+                        u64nesqp = (unsigned long)mem;
+                        u64nesqp += ((u64)NES_SW_CONTEXT_ALIGN) - 1;
+                        u64temp = ((u64)NES_SW_CONTEXT_ALIGN) - 1;
+                        u64nesqp &= ~u64temp;
+                        nesqp = (struct nes_qp *)(unsigned long)u64nesqp;
+                        /* nes_debug(NES_DBG_QP, "nesqp=%p, allocated buffer=%p.  Rounded to closest %u\n",
+                                        nesqp, mem, NES_SW_CONTEXT_ALIGN); */
+                        nesqp->allocated_buffer = mem;
+
+                        if (udata) {
+                                if (ib_copy_from_udata(&req, udata, sizeof(struct nes_create_qp_req))) {
+                                        nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
+                                        kfree(nesqp->allocated_buffer);
+                                        nes_debug(NES_DBG_QP, "ib_copy_from_udata() Failed \n");
+                                        return NULL;
+                                }
+                                if (req.user_wqe_buffers) {
+                                        virt_wqs = 1;
+                                }
+                                if ((ibpd->uobject) && (ibpd->uobject->context)) {
+                                        nesqp->user_mode = 1;
+                                        nes_ucontext = to_nesucontext(ibpd->uobject->context);
+                                        if (virt_wqs) {
+                                                err = 1;
+                                                list_for_each_entry(nespbl, &nes_ucontext->qp_reg_mem_list, list) {
+                                                        if (nespbl->user_base == (unsigned long )req.user_wqe_buffers) {
+                                                                list_del(&nespbl->list);
+                                                                err = 0;
+                                                                nes_debug(NES_DBG_QP, "Found PBL for virtual QP. nespbl=%p. user_base=0x%lx\n",
+                                                                          nespbl, nespbl->user_base);
+                                                                break;
+                                                        }
+                                                }
+                                                if (err) {
+                                                        nes_debug(NES_DBG_QP, "Didn't Find PBL for virtual QP. address = %llx.\n",
+                                                                  (long long unsigned int)req.user_wqe_buffers);
+                                                        nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
+                                                        kfree(nesqp->allocated_buffer);
+                                                        return ERR_PTR(-ENOMEM);
+                                                }
+                                        }
+
+                                        nes_ucontext = to_nesucontext(ibpd->uobject->context);
+                                        nesqp->mmap_sq_db_index =
+                                                find_next_zero_bit(nes_ucontext->allocated_wqs,
+                                                                   NES_MAX_USER_WQ_REGIONS, nes_ucontext->first_free_wq);
+                                        /* nes_debug(NES_DBG_QP, "find_first_zero_biton wqs returned %u\n",
+                                                        nespd->mmap_db_index); */
+                                        if (nesqp->mmap_sq_db_index > NES_MAX_USER_WQ_REGIONS) {
+                                                nes_debug(NES_DBG_QP,
+                                                          "db index > max user regions, failing create QP\n");
+                                                nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
+                                                if (virt_wqs) {
+                                                        pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
+                                                                            nespbl->pbl_pbase);
+                                                        kfree(nespbl);
+                                                }
+                                                kfree(nesqp->allocated_buffer);
+                                                return ERR_PTR(-ENOMEM);
+                                        }
+                                        set_bit(nesqp->mmap_sq_db_index, nes_ucontext->allocated_wqs);
+                                        nes_ucontext->mmap_nesqp[nesqp->mmap_sq_db_index] = nesqp;
+                                        nes_ucontext->first_free_wq = nesqp->mmap_sq_db_index + 1;
+                                } else {
+                                        nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
+                                        kfree(nesqp->allocated_buffer);
+                                        return ERR_PTR(-EFAULT);
+                                }
+                        }
+                        err = (!virt_wqs) ? nes_setup_mmap_qp(nesqp, nesvnic, sq_size, rq_size) :
+                                        nes_setup_virt_qp(nesqp, nespbl, nesvnic, sq_size, rq_size);
+                        if (err) {
+                                nes_debug(NES_DBG_QP,
+                                          "error geting qp mem code = %d\n", err);
+                                nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
+                                kfree(nesqp->allocated_buffer);
+                                return ERR_PTR(-ENOMEM);
+                        }
+
+                        nesqp->hwqp.sq_size = sq_size;
+                        nesqp->hwqp.sq_encoded_size = sq_encoded_size;
+                        nesqp->hwqp.sq_head = 1;
+                        nesqp->hwqp.rq_size = rq_size;
+                        nesqp->hwqp.rq_encoded_size = rq_encoded_size;
+                        /* nes_debug(NES_DBG_QP, "nesqp->nesqp_context_pbase = %p\n",
+                                        (void *)nesqp->nesqp_context_pbase);
+                        */
+                        nesqp->hwqp.qp_id = qp_num;
+                        nesqp->ibqp.qp_num = nesqp->hwqp.qp_id;
+                        nesqp->nespd = nespd;
+
+                        nescq = to_nescq(init_attr->send_cq);
+                        nesqp->nesscq = nescq;
+                        nescq = to_nescq(init_attr->recv_cq);
+                        nesqp->nesrcq = nescq;
+
+                        nesqp->nesqp_context->misc |= cpu_to_le32((u32)PCI_FUNC(nesdev->pcidev->devfn) <<
+                                        NES_QPCONTEXT_MISC_PCI_FCN_SHIFT);
+                        nesqp->nesqp_context->misc |= cpu_to_le32((u32)nesqp->hwqp.rq_encoded_size <<
+                                        NES_QPCONTEXT_MISC_RQ_SIZE_SHIFT);
+                        nesqp->nesqp_context->misc |= cpu_to_le32((u32)nesqp->hwqp.sq_encoded_size <<
+                                        NES_QPCONTEXT_MISC_SQ_SIZE_SHIFT);
+                                nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_PRIV_EN);
+                                nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_FAST_REGISTER_EN);
+                        nesqp->nesqp_context->cqs = cpu_to_le32(nesqp->nesscq->hw_cq.cq_number +
+                                        ((u32)nesqp->nesrcq->hw_cq.cq_number << 16));
+                        u64temp = (u64)nesqp->hwqp.sq_pbase;
+                        nesqp->nesqp_context->sq_addr_low = cpu_to_le32((u32)u64temp);
+                        nesqp->nesqp_context->sq_addr_high = cpu_to_le32((u32)(u64temp >> 32));
+
+
+                        if (!virt_wqs) {
+                                u64temp = (u64)nesqp->hwqp.sq_pbase;
+                                nesqp->nesqp_context->sq_addr_low = cpu_to_le32((u32)u64temp);
+                                nesqp->nesqp_context->sq_addr_high = cpu_to_le32((u32)(u64temp >> 32));
+                                u64temp = (u64)nesqp->hwqp.rq_pbase;
+                                nesqp->nesqp_context->rq_addr_low = cpu_to_le32((u32)u64temp);
+                                nesqp->nesqp_context->rq_addr_high = cpu_to_le32((u32)(u64temp >> 32));
+                        } else {
+                                u64temp = (u64)nesqp->pbl_pbase;
+                                nesqp->nesqp_context->rq_addr_low = cpu_to_le32((u32)u64temp);
+                                nesqp->nesqp_context->rq_addr_high = cpu_to_le32((u32)(u64temp >> 32));
+                        }
+
+                        /* nes_debug(NES_DBG_QP, "next_qp_nic_index=%u, using nic_index=%d\n",
+                                        nesvnic->next_qp_nic_index,
+                                        nesvnic->qp_nic_index[nesvnic->next_qp_nic_index]); */
+                        spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                        nesqp->nesqp_context->misc2 |= cpu_to_le32(
+                                        (u32)nesvnic->qp_nic_index[nesvnic->next_qp_nic_index] <<
+                                        NES_QPCONTEXT_MISC2_NIC_INDEX_SHIFT);
+                        nesvnic->next_qp_nic_index++;
+                        if ((nesvnic->next_qp_nic_index > 3) ||
+                                        (nesvnic->qp_nic_index[nesvnic->next_qp_nic_index] == 0xf)) {
+                                nesvnic->next_qp_nic_index = 0;
+                        }
+                        spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+
+                        nesqp->nesqp_context->pd_index_wscale |= cpu_to_le32((u32)nesqp->nespd->pd_id << 16);
+                        u64temp = (u64)nesqp->hwqp.q2_pbase;
+                        nesqp->nesqp_context->q2_addr_low = cpu_to_le32((u32)u64temp);
+                        nesqp->nesqp_context->q2_addr_high = cpu_to_le32((u32)(u64temp >> 32));
+                        nesqp->nesqp_context->aeq_token_low =  cpu_to_le32((u32)((unsigned long)(nesqp)));
+                        nesqp->nesqp_context->aeq_token_high =  cpu_to_le32((u32)(upper_32_bits((unsigned long)(nesqp))));
+                        nesqp->nesqp_context->ird_ord_sizes = cpu_to_le32(NES_QPCONTEXT_ORDIRD_ALSMM |
+                                        ((((u32)nesadapter->max_irrq_wr) <<
+                                        NES_QPCONTEXT_ORDIRD_IRDSIZE_SHIFT) & NES_QPCONTEXT_ORDIRD_IRDSIZE_MASK));
+                        if (disable_mpa_crc) {
+                                nes_debug(NES_DBG_QP, "Disabling MPA crc checking due to module option.\n");
+                                nesqp->nesqp_context->ird_ord_sizes |= cpu_to_le32(NES_QPCONTEXT_ORDIRD_RNMC);
+                        }
+
+
+                        /* Create the QP */
+                        cqp_request = nes_get_cqp_request(nesdev);
+                        if (cqp_request == NULL) {
+                                nes_debug(NES_DBG_QP, "Failed to get a cqp_request\n");
+                                nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
+                                nes_free_qp_mem(nesdev, nesqp,virt_wqs);
+                                kfree(nesqp->allocated_buffer);
+                                return ERR_PTR(-ENOMEM);
+                        }
+                        cqp_request->waiting = 1;
+                        cqp_wqe = &cqp_request->cqp_wqe;
+
+                        if (!virt_wqs) {
+                                opcode = NES_CQP_CREATE_QP | NES_CQP_QP_TYPE_IWARP |
+                                        NES_CQP_QP_IWARP_STATE_IDLE;
+                        } else {
+                                opcode = NES_CQP_CREATE_QP | NES_CQP_QP_TYPE_IWARP | NES_CQP_QP_VIRT_WQS |
+                                        NES_CQP_QP_IWARP_STATE_IDLE;
+                        }
+                        opcode |= NES_CQP_QP_CQS_VALID;
+                        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+                        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
+                        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id);
+
+                        u64temp = (u64)nesqp->nesqp_context_pbase;
+                        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp);
+
+                        atomic_set(&cqp_request->refcount, 2);
+                        nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+
+                        /* Wait for CQP */
+                        nes_debug(NES_DBG_QP, "Waiting for create iWARP QP%u to complete.\n",
+                                        nesqp->hwqp.qp_id);
+                        ret = wait_event_timeout(cqp_request->waitq,
+                                        (cqp_request->request_done != 0), NES_EVENT_TIMEOUT);
+                        nes_debug(NES_DBG_QP, "Create iwarp QP%u completed, wait_event_timeout ret=%u,"
+                                        " nesdev->cqp_head = %u, nesdev->cqp.sq_tail = %u,"
+                                        " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
+                                        nesqp->hwqp.qp_id, ret, nesdev->cqp.sq_head, nesdev->cqp.sq_tail,
+                                        cqp_request->major_code, cqp_request->minor_code);
+                        if ((!ret) || (cqp_request->major_code)) {
+                                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                                        if (cqp_request->dynamic) {
+                                                kfree(cqp_request);
+                                        } else {
+                                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                                        }
+                                }
+                                nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
+                                nes_free_qp_mem(nesdev, nesqp,virt_wqs);
+                                kfree(nesqp->allocated_buffer);
+                                if (!ret) {
+                                        return ERR_PTR(-ETIME);
+                                } else {
+                                        return ERR_PTR(-EIO);
+                                }
+                        } else {
+                                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                                        if (cqp_request->dynamic) {
+                                                kfree(cqp_request);
+                                        } else {
+                                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                                        }
+                                }
+                        }
+
+                        if (ibpd->uobject) {
+                                uresp.mmap_sq_db_index = nesqp->mmap_sq_db_index;
+                                uresp.actual_sq_size = sq_size;
+                                uresp.actual_rq_size = rq_size;
+                                uresp.qp_id = nesqp->hwqp.qp_id;
+                                uresp.nes_drv_opt = nes_drv_opt;
+                                if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
+                                        nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
+                                        nes_free_qp_mem(nesdev, nesqp,virt_wqs);
+                                        kfree(nesqp->allocated_buffer);
+                                        return ERR_PTR(-EFAULT);
+                                }
+                        }
+
+                        nes_debug(NES_DBG_QP, "QP%u structure located @%p.Size = %u.\n",
+                                        nesqp->hwqp.qp_id, nesqp, (u32)sizeof(*nesqp));
+                        spin_lock_init(&nesqp->lock);
+                        init_waitqueue_head(&nesqp->state_waitq);
+                        init_waitqueue_head(&nesqp->kick_waitq);
+                        nes_add_ref(&nesqp->ibqp);
+                        break;
+                default:
+                        nes_debug(NES_DBG_QP, "Invalid QP type: %d\n", init_attr->qp_type);
+                        return ERR_PTR(-EINVAL);
+                        break;
+        }
+
+        /* update the QP table */
+        nesdev->nesadapter->qp_table[nesqp->hwqp.qp_id-NES_FIRST_QPN] = nesqp;
+        nes_debug(NES_DBG_QP, "netdev refcnt=%u\n",
+                        atomic_read(&nesvnic->netdev->refcnt));
+
+        return &nesqp->ibqp;
+}
+
+
+/**
+ * nes_destroy_qp
+ */
+static int nes_destroy_qp(struct ib_qp *ibqp)
+{
+        struct nes_qp *nesqp = to_nesqp(ibqp);
+        /* struct nes_vnic *nesvnic = to_nesvnic(ibqp->device); */
+        struct nes_ucontext *nes_ucontext;
+        struct ib_qp_attr attr;
+        struct iw_cm_id *cm_id;
+        struct iw_cm_event cm_event;
+        int ret;
+
+        atomic_inc(&sw_qps_destroyed);
+        nesqp->destroyed = 1;
+
+        /* Blow away the connection if it exists. */
+        if (nesqp->ibqp_state >= IB_QPS_INIT && nesqp->ibqp_state <= IB_QPS_RTS) {
+                /* if (nesqp->ibqp_state == IB_QPS_RTS) { */
+                attr.qp_state = IB_QPS_ERR;
+                nes_modify_qp(&nesqp->ibqp, &attr, IB_QP_STATE, NULL);
+        }
+
+        if (((nesqp->ibqp_state == IB_QPS_INIT) ||
+                        (nesqp->ibqp_state == IB_QPS_RTR)) && (nesqp->cm_id)) {
+                cm_id = nesqp->cm_id;
+                cm_event.event = IW_CM_EVENT_CONNECT_REPLY;
+                cm_event.status = IW_CM_EVENT_STATUS_TIMEOUT;
+                cm_event.local_addr = cm_id->local_addr;
+                cm_event.remote_addr = cm_id->remote_addr;
+                cm_event.private_data = NULL;
+                cm_event.private_data_len = 0;
+
+                nes_debug(NES_DBG_QP, "Generating a CM Timeout Event for "
+                                "QP%u. cm_id = %p, refcount = %u. \n",
+                                nesqp->hwqp.qp_id, cm_id, atomic_read(&nesqp->refcount));
+
+                cm_id->rem_ref(cm_id);
+                ret = cm_id->event_handler(cm_id, &cm_event);
+                if (ret)
+                        nes_debug(NES_DBG_QP, "OFA CM event_handler returned, ret=%d\n", ret);
+        }
+
+
+        if (nesqp->user_mode) {
+                if ((ibqp->uobject)&&(ibqp->uobject->context)) {
+                        nes_ucontext = to_nesucontext(ibqp->uobject->context);
+                        clear_bit(nesqp->mmap_sq_db_index, nes_ucontext->allocated_wqs);
+                        nes_ucontext->mmap_nesqp[nesqp->mmap_sq_db_index] = NULL;
+                        if (nes_ucontext->first_free_wq > nesqp->mmap_sq_db_index) {
+                                nes_ucontext->first_free_wq = nesqp->mmap_sq_db_index;
+                        }
+                }
+                if (nesqp->pbl_pbase)
+                        kunmap(nesqp->page);
+        }
+
+        nes_rem_ref(&nesqp->ibqp);
+        return 0;
+}
+
+
+/**
+ * nes_create_cq
+ */
+static struct ib_cq *nes_create_cq(struct ib_device *ibdev, int entries,
+                int comp_vector,
+                struct ib_ucontext *context, struct ib_udata *udata)
+{
+        u64 u64temp;
+        struct nes_vnic *nesvnic = to_nesvnic(ibdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_cq *nescq;
+        struct nes_ucontext *nes_ucontext = NULL;
+        struct nes_cqp_request *cqp_request;
+        void *mem = NULL;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        struct nes_pbl *nespbl = NULL;
+        struct nes_create_cq_req req;
+        struct nes_create_cq_resp resp;
+        u32 cq_num = 0;
+        u32 opcode = 0;
+        u32 pbl_entries = 1;
+        int err;
+        unsigned long flags;
+        int ret;
+
+        err = nes_alloc_resource(nesadapter, nesadapter->allocated_cqs,
+                        nesadapter->max_cq, &cq_num, &nesadapter->next_cq);
+        if (err) {
+                return ERR_PTR(err);
+        }
+
+        nescq = kzalloc(sizeof(struct nes_cq), GFP_KERNEL);
+        if (!nescq) {
+                nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
+                nes_debug(NES_DBG_CQ, "Unable to allocate nes_cq struct\n");
+                return ERR_PTR(-ENOMEM);
+        }
+
+        nescq->hw_cq.cq_size = max(entries + 1, 5);
+        nescq->hw_cq.cq_number = cq_num;
+        nescq->ibcq.cqe = nescq->hw_cq.cq_size - 1;
+
+
+        if (context) {
+                nes_ucontext = to_nesucontext(context);
+                if (ib_copy_from_udata(&req, udata, sizeof (struct nes_create_cq_req))) {
+                        nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
+                        kfree(nescq);
+                        return ERR_PTR(-EFAULT);
+                }
+                nesvnic->mcrq_ucontext = nes_ucontext;
+                nes_ucontext->mcrqf = req.mcrqf;
+                if (nes_ucontext->mcrqf) {
+                        if (nes_ucontext->mcrqf & 0x80000000)
+                                nescq->hw_cq.cq_number = nesvnic->nic.qp_id + 12 + (nes_ucontext->mcrqf & 0xf) - 1;
+                        else if (nes_ucontext->mcrqf & 0x40000000)
+                                nescq->hw_cq.cq_number = nes_ucontext->mcrqf & 0xffff;
+                        else
+                                nescq->hw_cq.cq_number = nesvnic->mcrq_qp_id + nes_ucontext->mcrqf-1;
+                        nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
+                }
+                nes_debug(NES_DBG_CQ, "CQ Virtual Address = %08lX, size = %u.\n",
+                                (unsigned long)req.user_cq_buffer, entries);
+                list_for_each_entry(nespbl, &nes_ucontext->cq_reg_mem_list, list) {
+                        if (nespbl->user_base == (unsigned long )req.user_cq_buffer) {
+                                list_del(&nespbl->list);
+                                err = 0;
+                                nes_debug(NES_DBG_CQ, "Found PBL for virtual CQ. nespbl=%p.\n",
+                                                nespbl);
+                                break;
+                        }
+                }
+                if (err) {
+                        nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
+                        kfree(nescq);
+                        return ERR_PTR(err);
+                }
+
+                pbl_entries = nespbl->pbl_size >> 3;
+                nescq->cq_mem_size = 0;
+        } else {
+                nescq->cq_mem_size = nescq->hw_cq.cq_size * sizeof(struct nes_hw_cqe);
+                nes_debug(NES_DBG_CQ, "Attempting to allocate pci memory (%u entries, %u bytes) for CQ%u.\n",
+                                entries, nescq->cq_mem_size, nescq->hw_cq.cq_number);
+
+                /* allocate the physical buffer space */
+                mem = pci_alloc_consistent(nesdev->pcidev, nescq->cq_mem_size,
+                                &nescq->hw_cq.cq_pbase);
+                if (!mem) {
+                        printk(KERN_ERR PFX "Unable to allocate pci memory for cq\n");
+                        nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
+                        kfree(nescq);
+                        return ERR_PTR(-ENOMEM);
+                }
+
+                memset(mem, 0, nescq->cq_mem_size);
+                nescq->hw_cq.cq_vbase = mem;
+                nescq->hw_cq.cq_head = 0;
+                nes_debug(NES_DBG_CQ, "CQ%u virtual address @ %p, phys = 0x%08X\n",
+                                nescq->hw_cq.cq_number, nescq->hw_cq.cq_vbase,
+                                (u32)nescq->hw_cq.cq_pbase);
+        }
+
+        nescq->hw_cq.ce_handler = nes_iwarp_ce_handler;
+        spin_lock_init(&nescq->lock);
+
+        /* send CreateCQ request to CQP */
+        cqp_request = nes_get_cqp_request(nesdev);
+        if (cqp_request == NULL) {
+                nes_debug(NES_DBG_CQ, "Failed to get a cqp_request.\n");
+                if (!context)
+                        pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem,
+                                        nescq->hw_cq.cq_pbase);
+                nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
+                kfree(nescq);
+                return ERR_PTR(-ENOMEM);
+        }
+        cqp_request->waiting = 1;
+        cqp_wqe = &cqp_request->cqp_wqe;
+
+        opcode = NES_CQP_CREATE_CQ | NES_CQP_CQ_CEQ_VALID |
+                        NES_CQP_CQ_CHK_OVERFLOW |
+                        NES_CQP_CQ_CEQE_MASK | ((u32)nescq->hw_cq.cq_size << 16);
+
+        spin_lock_irqsave(&nesadapter->pbl_lock, flags);
+
+        if (pbl_entries != 1) {
+                if (pbl_entries > 32) {
+                        /* use 4k pbl */
+                        nes_debug(NES_DBG_CQ, "pbl_entries=%u, use a 4k PBL\n", pbl_entries);
+                        if (nesadapter->free_4kpbl == 0) {
+                                if (cqp_request->dynamic) {
+                                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                        kfree(cqp_request);
+                                } else {
+                                        list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                }
+                                if (!context)
+                                        pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem,
+                                                        nescq->hw_cq.cq_pbase);
+                                nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
+                                kfree(nescq);
+                                return ERR_PTR(-ENOMEM);
+                        } else {
+                                opcode |= (NES_CQP_CQ_VIRT | NES_CQP_CQ_4KB_CHUNK);
+                                nescq->virtual_cq = 2;
+                                nesadapter->free_4kpbl--;
+                        }
+                } else {
+                        /* use 256 byte pbl */
+                        nes_debug(NES_DBG_CQ, "pbl_entries=%u, use a 256 byte PBL\n", pbl_entries);
+                        if (nesadapter->free_256pbl == 0) {
+                                if (cqp_request->dynamic) {
+                                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                        kfree(cqp_request);
+                                } else {
+                                        list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                }
+                                if (!context)
+                                        pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem,
+                                                        nescq->hw_cq.cq_pbase);
+                                nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
+                                kfree(nescq);
+                                return ERR_PTR(-ENOMEM);
+                        } else {
+                                opcode |= NES_CQP_CQ_VIRT;
+                                nescq->virtual_cq = 1;
+                                nesadapter->free_256pbl--;
+                        }
+                }
+        }
+
+        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX,
+                        (nescq->hw_cq.cq_number | ((u32)nesdev->ceq_index << 16)));
+
+        if (context) {
+                if (pbl_entries != 1)
+                        u64temp = (u64)nespbl->pbl_pbase;
+                else
+                        u64temp = le64_to_cpu(nespbl->pbl_vbase[0]);
+                set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_CQ_WQE_DOORBELL_INDEX_HIGH_IDX,
+                                nes_ucontext->mmap_db_index[0]);
+        } else {
+                u64temp = (u64)nescq->hw_cq.cq_pbase;
+                cqp_wqe->wqe_words[NES_CQP_CQ_WQE_DOORBELL_INDEX_HIGH_IDX] = 0;
+        }
+        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_CQ_WQE_PBL_LOW_IDX, u64temp);
+        cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX] = 0;
+        u64temp = (u64)(unsigned long)&nescq->hw_cq;
+        cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_LOW_IDX] =
+                        cpu_to_le32((u32)(u64temp >> 1));
+        cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX] =
+                        cpu_to_le32(((u32)((u64temp) >> 33)) & 0x7FFFFFFF);
+
+        atomic_set(&cqp_request->refcount, 2);
+        nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+
+        /* Wait for CQP */
+        nes_debug(NES_DBG_CQ, "Waiting for create iWARP CQ%u to complete.\n",
+                        nescq->hw_cq.cq_number);
+        ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done),
+                        NES_EVENT_TIMEOUT * 2);
+        nes_debug(NES_DBG_CQ, "Create iWARP CQ%u completed, wait_event_timeout ret = %d.\n",
+                        nescq->hw_cq.cq_number, ret);
+        if ((!ret) || (cqp_request->major_code)) {
+                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                        if (cqp_request->dynamic) {
+                                kfree(cqp_request);
+                        } else {
+                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                        }
+                }
+                nes_debug(NES_DBG_CQ, "iWARP CQ%u create timeout expired, major code = 0x%04X,"
+                                " minor code = 0x%04X\n",
+                                nescq->hw_cq.cq_number, cqp_request->major_code, cqp_request->minor_code);
+                if (!context)
+                        pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem,
+                                        nescq->hw_cq.cq_pbase);
+                nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
+                kfree(nescq);
+                return ERR_PTR(-EIO);
+        } else {
+                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                        if (cqp_request->dynamic) {
+                                kfree(cqp_request);
+                        } else {
+                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                        }
+                }
+        }
+
+        if (context) {
+                /* free the nespbl */
+                pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
+                                nespbl->pbl_pbase);
+                kfree(nespbl);
+                resp.cq_id = nescq->hw_cq.cq_number;
+                resp.cq_size = nescq->hw_cq.cq_size;
+                resp.mmap_db_index = 0;
+                if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
+                        nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
+                        kfree(nescq);
+                        return ERR_PTR(-EFAULT);
+                }
+        }
+
+        return &nescq->ibcq;
+}
+
+
+/**
+ * nes_destroy_cq
+ */
+static int nes_destroy_cq(struct ib_cq *ib_cq)
+{
+        struct nes_cq *nescq;
+        struct nes_device *nesdev;
+        struct nes_vnic *nesvnic;
+        struct nes_adapter *nesadapter;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        struct nes_cqp_request *cqp_request;
+        unsigned long flags;
+        u32 opcode = 0;
+        int ret;
+
+        if (ib_cq == NULL)
+                return 0;
+
+        nescq = to_nescq(ib_cq);
+        nesvnic = to_nesvnic(ib_cq->device);
+        nesdev = nesvnic->nesdev;
+        nesadapter = nesdev->nesadapter;
+
+        nes_debug(NES_DBG_CQ, "Destroy CQ%u\n", nescq->hw_cq.cq_number);
+
+        /* Send DestroyCQ request to CQP */
+        cqp_request = nes_get_cqp_request(nesdev);
+        if (cqp_request == NULL) {
+                nes_debug(NES_DBG_CQ, "Failed to get a cqp_request.\n");
+                return -ENOMEM;
+        }
+        cqp_request->waiting = 1;
+        cqp_wqe = &cqp_request->cqp_wqe;
+        opcode = NES_CQP_DESTROY_CQ | (nescq->hw_cq.cq_size << 16);
+        spin_lock_irqsave(&nesadapter->pbl_lock, flags);
+        if (nescq->virtual_cq == 1) {
+                nesadapter->free_256pbl++;
+                if (nesadapter->free_256pbl > nesadapter->max_256pbl) {
+                        printk(KERN_ERR PFX "%s: free 256B PBLs(%u) has exceeded the max(%u)\n",
+                                        __FUNCTION__, nesadapter->free_256pbl, nesadapter->max_256pbl);
+                }
+        } else if (nescq->virtual_cq == 2) {
+                nesadapter->free_4kpbl++;
+                if (nesadapter->free_4kpbl > nesadapter->max_4kpbl) {
+                        printk(KERN_ERR PFX "%s: free 4K PBLs(%u) has exceeded the max(%u)\n",
+                                        __FUNCTION__, nesadapter->free_4kpbl, nesadapter->max_4kpbl);
+                }
+                opcode |= NES_CQP_CQ_4KB_CHUNK;
+        }
+
+        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX,
+                (nescq->hw_cq.cq_number | ((u32)PCI_FUNC(nesdev->pcidev->devfn) << 16)));
+        nes_free_resource(nesadapter, nesadapter->allocated_cqs, nescq->hw_cq.cq_number);
+        atomic_set(&cqp_request->refcount, 2);
+        nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+
+        /* Wait for CQP */
+        nes_debug(NES_DBG_CQ, "Waiting for destroy iWARP CQ%u to complete.\n",
+                        nescq->hw_cq.cq_number);
+        ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done),
+                        NES_EVENT_TIMEOUT);
+        nes_debug(NES_DBG_CQ, "Destroy iWARP CQ%u completed, wait_event_timeout ret = %u,"
+                        " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
+                        nescq->hw_cq.cq_number, ret, cqp_request->major_code,
+                        cqp_request->minor_code);
+        if ((!ret) || (cqp_request->major_code)) {
+                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                        if (cqp_request->dynamic) {
+                                kfree(cqp_request);
+                        } else {
+                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                        }
+                }
+                if (!ret) {
+                        nes_debug(NES_DBG_CQ, "iWARP CQ%u destroy timeout expired\n",
+                                        nescq->hw_cq.cq_number);
+                        ret = -ETIME;
+                } else {
+                        nes_debug(NES_DBG_CQ, "iWARP CQ%u destroy failed\n",
+                                        nescq->hw_cq.cq_number);
+                        ret = -EIO;
+                }
+        } else {
+                ret = 0;
+                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                        if (cqp_request->dynamic) {
+                                kfree(cqp_request);
+                        } else {
+                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                        }
+                }
+        }
+
+        if (nescq->cq_mem_size)
+                pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size,
+                                (void *)nescq->hw_cq.cq_vbase, nescq->hw_cq.cq_pbase);
+        kfree(nescq);
+
+        return ret;
+}
+
+
+/**
+ * nes_reg_mr
+ */
+static int nes_reg_mr(struct nes_device *nesdev, struct nes_pd *nespd,
+                u32 stag, u64 region_length, struct nes_root_vpbl *root_vpbl,
+                dma_addr_t single_buffer, u16 pbl_count, u16 residual_page_count,
+                int acc, u64 *iova_start)
+{
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        struct nes_cqp_request *cqp_request;
+        unsigned long flags;
+        int ret;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        /* int count; */
+        u32 opcode = 0;
+        u16 major_code;
+
+        /* Register the region with the adapter */
+        cqp_request = nes_get_cqp_request(nesdev);
+        if (cqp_request == NULL) {
+                nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
+                return -ENOMEM;
+        }
+        cqp_request->waiting = 1;
+        cqp_wqe = &cqp_request->cqp_wqe;
+
+        spin_lock_irqsave(&nesadapter->pbl_lock, flags);
+        /* track PBL resources */
+        if (pbl_count != 0) {
+                if (pbl_count > 1) {
+                        /* Two level PBL */
+                        if ((pbl_count+1) > nesadapter->free_4kpbl) {
+                                nes_debug(NES_DBG_MR, "Out of 4KB Pbls for two level request.\n");
+                                if (cqp_request->dynamic) {
+                                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                        kfree(cqp_request);
+                                } else {
+                                        list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                }
+                                return -ENOMEM;
+                        } else {
+                                nesadapter->free_4kpbl -= pbl_count+1;
+                        }
+                } else if (residual_page_count > 32) {
+                        if (pbl_count > nesadapter->free_4kpbl) {
+                                nes_debug(NES_DBG_MR, "Out of 4KB Pbls.\n");
+                                if (cqp_request->dynamic) {
+                                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                        kfree(cqp_request);
+                                } else {
+                                        list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                }
+                                return -ENOMEM;
+                        } else {
+                                nesadapter->free_4kpbl -= pbl_count;
+                        }
+                } else {
+                        if (pbl_count > nesadapter->free_256pbl) {
+                                nes_debug(NES_DBG_MR, "Out of 256B Pbls.\n");
+                                if (cqp_request->dynamic) {
+                                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                        kfree(cqp_request);
+                                } else {
+                                        list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+                                }
+                                return -ENOMEM;
+                        } else {
+                                nesadapter->free_256pbl -= pbl_count;
+                        }
+                }
+        }
+
+        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+
+        opcode = NES_CQP_REGISTER_STAG | NES_CQP_STAG_RIGHTS_LOCAL_READ |
+                                        NES_CQP_STAG_VA_TO | NES_CQP_STAG_MR;
+        if (acc & IB_ACCESS_LOCAL_WRITE)
+                opcode |= NES_CQP_STAG_RIGHTS_LOCAL_WRITE;
+        if (acc & IB_ACCESS_REMOTE_WRITE)
+                opcode |= NES_CQP_STAG_RIGHTS_REMOTE_WRITE | NES_CQP_STAG_REM_ACC_EN;
+        if (acc & IB_ACCESS_REMOTE_READ)
+                opcode |= NES_CQP_STAG_RIGHTS_REMOTE_READ | NES_CQP_STAG_REM_ACC_EN;
+        if (acc & IB_ACCESS_MW_BIND)
+                opcode |= NES_CQP_STAG_RIGHTS_WINDOW_BIND | NES_CQP_STAG_REM_ACC_EN;
+
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
+        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_VA_LOW_IDX, *iova_start);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_LOW_IDX, region_length);
+
+        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] =
+                        cpu_to_le32((u32)(region_length >> 8) & 0xff000000);
+        cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] |=
+                        cpu_to_le32(nespd->pd_id & 0x00007fff);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
+
+        if (pbl_count == 0) {
+                set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PA_LOW_IDX, single_buffer);
+        } else {
+                set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PA_LOW_IDX, root_vpbl->pbl_pbase);
+                set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX, pbl_count);
+                set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_LEN_IDX,
+                                (((pbl_count - 1) * 4096) + (residual_page_count*8)));
+
+                if ((pbl_count > 1) || (residual_page_count > 32))
+                        cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_STAG_PBL_BLK_SIZE);
+        }
+        barrier();
+
+        atomic_set(&cqp_request->refcount, 2);
+        nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+
+        /* Wait for CQP */
+        ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done),
+                        NES_EVENT_TIMEOUT);
+        nes_debug(NES_DBG_MR, "Register STag 0x%08X completed, wait_event_timeout ret = %u,"
+                        " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
+                        stag, ret, cqp_request->major_code, cqp_request->minor_code);
+        major_code = cqp_request->major_code;
+        if (atomic_dec_and_test(&cqp_request->refcount)) {
+                if (cqp_request->dynamic) {
+                        kfree(cqp_request);
+                } else {
+                        spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                        list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                        spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                }
+        }
+        if (!ret)
+                return -ETIME;
+        else if (major_code)
+                return -EIO;
+        else
+                return 0;
+
+        return 0;
+}
+
+
+/**
+ * nes_reg_phys_mr
+ */
+static struct ib_mr *nes_reg_phys_mr(struct ib_pd *ib_pd,
+                struct ib_phys_buf *buffer_list, int num_phys_buf, int acc,
+                u64 * iova_start)
+{
+        u64 region_length;
+        struct nes_pd *nespd = to_nespd(ib_pd);
+        struct nes_vnic *nesvnic = to_nesvnic(ib_pd->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_mr *nesmr;
+        struct ib_mr *ibmr;
+        struct nes_vpbl vpbl;
+        struct nes_root_vpbl root_vpbl;
+        u32 stag;
+        u32 i;
+        u32 stag_index = 0;
+        u32 next_stag_index = 0;
+        u32 driver_key = 0;
+        u32 root_pbl_index = 0;
+        u32 cur_pbl_index = 0;
+        int err = 0, pbl_depth = 0;
+        int ret = 0;
+        u16 pbl_count = 0;
+        u8 single_page = 1;
+        u8 stag_key = 0;
+
+        pbl_depth = 0;
+        region_length = 0;
+        vpbl.pbl_vbase = NULL;
+        root_vpbl.pbl_vbase = NULL;
+        root_vpbl.pbl_pbase = 0;
+
+        get_random_bytes(&next_stag_index, sizeof(next_stag_index));
+        stag_key = (u8)next_stag_index;
+
+        driver_key = 0;
+
+        next_stag_index >>= 8;
+        next_stag_index %= nesadapter->max_mr;
+        if (num_phys_buf > (1024*512)) {
+                return ERR_PTR(-E2BIG);
+        }
+
+        err = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs, nesadapter->max_mr,
+                        &stag_index, &next_stag_index);
+        if (err) {
+                return ERR_PTR(err);
+        }
+
+        nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
+        if (!nesmr) {
+                nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                return ERR_PTR(-ENOMEM);
+        }
+
+        for (i = 0; i < num_phys_buf; i++) {
+
+                if ((i & 0x01FF) == 0) {
+                        if (root_pbl_index == 1) {
+                                /* Allocate the root PBL */
+                                root_vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 8192,
+                                                &root_vpbl.pbl_pbase);
+                                nes_debug(NES_DBG_MR, "Allocating root PBL, va = %p, pa = 0x%08X\n",
+                                                root_vpbl.pbl_vbase, (unsigned int)root_vpbl.pbl_pbase);
+                                if (!root_vpbl.pbl_vbase) {
+                                        pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
+                                                        vpbl.pbl_pbase);
+                                        nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                                        kfree(nesmr);
+                                        return ERR_PTR(-ENOMEM);
+                                }
+                                root_vpbl.leaf_vpbl = kzalloc(sizeof(*root_vpbl.leaf_vpbl)*1024, GFP_KERNEL);
+                                if (!root_vpbl.leaf_vpbl) {
+                                        pci_free_consistent(nesdev->pcidev, 8192, root_vpbl.pbl_vbase,
+                                                        root_vpbl.pbl_pbase);
+                                        pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
+                                                        vpbl.pbl_pbase);
+                                        nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                                        kfree(nesmr);
+                                        return ERR_PTR(-ENOMEM);
+                                }
+                                root_vpbl.pbl_vbase[0].pa_low = cpu_to_le32((u32)vpbl.pbl_pbase);
+                                root_vpbl.pbl_vbase[0].pa_high =
+                                                cpu_to_le32((u32)((((u64)vpbl.pbl_pbase) >> 32)));
+                                root_vpbl.leaf_vpbl[0] = vpbl;
+                        }
+                        /* Allocate a 4K buffer for the PBL */
+                        vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 4096,
+                                        &vpbl.pbl_pbase);
+                        nes_debug(NES_DBG_MR, "Allocating leaf PBL, va = %p, pa = 0x%016lX\n",
+                                        vpbl.pbl_vbase, (unsigned long)vpbl.pbl_pbase);
+                        if (!vpbl.pbl_vbase) {
+                                nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                                ibmr = ERR_PTR(-ENOMEM);
+                                kfree(nesmr);
+                                goto reg_phys_err;
+                        }
+                        /* Fill in the root table */
+                        if (1 <= root_pbl_index) {
+                                root_vpbl.pbl_vbase[root_pbl_index].pa_low =
+                                                cpu_to_le32((u32)vpbl.pbl_pbase);
+                                root_vpbl.pbl_vbase[root_pbl_index].pa_high =
+                                                cpu_to_le32((u32)((((u64)vpbl.pbl_pbase) >> 32)));
+                                root_vpbl.leaf_vpbl[root_pbl_index] = vpbl;
+                        }
+                        root_pbl_index++;
+                        cur_pbl_index = 0;
+                }
+                if (buffer_list[i].addr & ~PAGE_MASK) {
+                        /* TODO: Unwind allocated buffers */
+                        nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                        nes_debug(NES_DBG_MR, "Unaligned Memory Buffer: 0x%x\n",
+                                        (unsigned int) buffer_list[i].addr);
+                        ibmr = ERR_PTR(-EINVAL);
+                        kfree(nesmr);
+                        goto reg_phys_err;
+                }
+
+                if (!buffer_list[i].size) {
+                        nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                        nes_debug(NES_DBG_MR, "Invalid Buffer Size\n");
+                        ibmr = ERR_PTR(-EINVAL);
+                        kfree(nesmr);
+                        goto reg_phys_err;
+                }
+
+                region_length += buffer_list[i].size;
+                if ((i != 0) && (single_page)) {
+                        if ((buffer_list[i-1].addr+PAGE_SIZE) != buffer_list[i].addr)
+                                single_page = 0;
+                }
+                vpbl.pbl_vbase[cur_pbl_index].pa_low = cpu_to_le32((u32)buffer_list[i].addr);
+                vpbl.pbl_vbase[cur_pbl_index++].pa_high =
+                                cpu_to_le32((u32)((((u64)buffer_list[i].addr) >> 32)));
+        }
+
+        stag = stag_index << 8;
+        stag |= driver_key;
+        stag += (u32)stag_key;
+
+        nes_debug(NES_DBG_MR, "Registering STag 0x%08X, VA = 0x%016lX,"
+                        " length = 0x%016lX, index = 0x%08X\n",
+                        stag, (unsigned long)*iova_start, (unsigned long)region_length, stag_index);
+
+        region_length -= (*iova_start)&PAGE_MASK;
+
+        /* Make the leaf PBL the root if only one PBL */
+        if (root_pbl_index == 1) {
+                root_vpbl.pbl_pbase = vpbl.pbl_pbase;
+        }
+
+        if (single_page) {
+                pbl_count = 0;
+        } else {
+                pbl_count = root_pbl_index;
+        }
+        ret = nes_reg_mr(nesdev, nespd, stag, region_length, &root_vpbl,
+                        buffer_list[0].addr, pbl_count, (u16)cur_pbl_index, acc, iova_start);
+
+        if (ret == 0) {
+                nesmr->ibmr.rkey = stag;
+                nesmr->ibmr.lkey = stag;
+                nesmr->mode = IWNES_MEMREG_TYPE_MEM;
+                ibmr = &nesmr->ibmr;
+                nesmr->pbl_4k = ((pbl_count > 1) || (cur_pbl_index > 32)) ? 1 : 0;
+                nesmr->pbls_used = pbl_count;
+                if (pbl_count > 1) {
+                        nesmr->pbls_used++;
+                }
+        } else {
+                kfree(nesmr);
+                ibmr = ERR_PTR(-ENOMEM);
+        }
+
+        reg_phys_err:
+        /* free the resources */
+        if (root_pbl_index == 1) {
+                /* single PBL case */
+                pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase, vpbl.pbl_pbase);
+        } else {
+                for (i=0; i<root_pbl_index; i++) {
+                        pci_free_consistent(nesdev->pcidev, 4096, root_vpbl.leaf_vpbl[i].pbl_vbase,
+                                        root_vpbl.leaf_vpbl[i].pbl_pbase);
+                }
+                kfree(root_vpbl.leaf_vpbl);
+                pci_free_consistent(nesdev->pcidev, 8192, root_vpbl.pbl_vbase,
+                                root_vpbl.pbl_pbase);
+        }
+
+        return ibmr;
+}
+
+
+/**
+ * nes_get_dma_mr
+ */
+static struct ib_mr *nes_get_dma_mr(struct ib_pd *pd, int acc)
+{
+        struct ib_phys_buf bl;
+        u64 kva = 0;
+
+        nes_debug(NES_DBG_MR, "\n");
+
+        bl.size = (u64)0xffffffffffULL;
+        bl.addr = 0;
+        return nes_reg_phys_mr(pd, &bl, 1, acc, &kva);
+}
+
+
+/**
+ * nes_reg_user_mr
+ */
+static struct ib_mr *nes_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
+                u64 virt, int acc, struct ib_udata *udata)
+{
+        u64 iova_start;
+        __le64 *pbl;
+        u64 region_length;
+        dma_addr_t last_dma_addr = 0;
+        dma_addr_t first_dma_addr = 0;
+        struct nes_pd *nespd = to_nespd(pd);
+        struct nes_vnic *nesvnic = to_nesvnic(pd->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct ib_mr *ibmr = ERR_PTR(-EINVAL);
+        struct ib_umem_chunk *chunk;
+        struct nes_ucontext *nes_ucontext;
+        struct nes_pbl *nespbl;
+        struct nes_mr *nesmr;
+        struct ib_umem *region;
+        struct nes_mem_reg_req req;
+        struct nes_vpbl vpbl;
+        struct nes_root_vpbl root_vpbl;
+        int nmap_index, page_index;
+        int page_count = 0;
+        int err, pbl_depth = 0;
+        int chunk_pages;
+        int ret;
+        u32 stag;
+        u32 stag_index = 0;
+        u32 next_stag_index;
+        u32 driver_key;
+        u32 root_pbl_index = 0;
+        u32 cur_pbl_index = 0;
+        u32 skip_pages;
+        u16 pbl_count;
+        u8 single_page = 1;
+        u8 stag_key;
+
+        region = ib_umem_get(pd->uobject->context, start, length, acc);
+        if (IS_ERR(region)) {
+                return (struct ib_mr *)region;
+        }
+
+        nes_debug(NES_DBG_MR, "User base = 0x%lX, Virt base = 0x%lX, length = %u,"
+                        " offset = %u, page size = %u.\n",
+                        (unsigned long int)start, (unsigned long int)virt, (u32)length,
+                        region->offset, region->page_size);
+
+        skip_pages = ((u32)region->offset) >> 12;
+
+        if (ib_copy_from_udata(&req, udata, sizeof(req)))
+                return ERR_PTR(-EFAULT);
+        nes_debug(NES_DBG_MR, "Memory Registration type = %08X.\n", req.reg_type);
+
+        switch (req.reg_type) {
+                case IWNES_MEMREG_TYPE_MEM:
+                        pbl_depth = 0;
+                        region_length = 0;
+                        vpbl.pbl_vbase = NULL;
+                        root_vpbl.pbl_vbase = NULL;
+                        root_vpbl.pbl_pbase = 0;
+
+                        get_random_bytes(&next_stag_index, sizeof(next_stag_index));
+                        stag_key = (u8)next_stag_index;
+
+                        driver_key = next_stag_index & 0x70000000;
+
+                        next_stag_index >>= 8;
+                        next_stag_index %= nesadapter->max_mr;
+
+                        err = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
+                                        nesadapter->max_mr, &stag_index, &next_stag_index);
+                        if (err) {
+                                ib_umem_release(region);
+                                return ERR_PTR(err);
+                        }
+
+                        nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
+                        if (!nesmr) {
+                                ib_umem_release(region);
+                                nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                                return ERR_PTR(-ENOMEM);
+                        }
+                        nesmr->region = region;
+
+                        list_for_each_entry(chunk, &region->chunk_list, list) {
+                                nes_debug(NES_DBG_MR, "Chunk: nents = %u, nmap = %u .\n",
+                                                chunk->nents, chunk->nmap);
+                                for (nmap_index = 0; nmap_index < chunk->nmap; ++nmap_index) {
+                                        if (sg_dma_address(&chunk->page_list[nmap_index]) & ~PAGE_MASK) {
+                                                ib_umem_release(region);
+                                                nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                                                nes_debug(NES_DBG_MR, "Unaligned Memory Buffer: 0x%x\n",
+                                                                (unsigned int) sg_dma_address(&chunk->page_list[nmap_index]));
+                                                ibmr = ERR_PTR(-EINVAL);
+                                                kfree(nesmr);
+                                                goto reg_user_mr_err;
+                                        }
+
+                                        if (!sg_dma_len(&chunk->page_list[nmap_index])) {
+                                                ib_umem_release(region);
+                                                nes_free_resource(nesadapter, nesadapter->allocated_mrs,
+                                                                stag_index);
+                                                nes_debug(NES_DBG_MR, "Invalid Buffer Size\n");
+                                                ibmr = ERR_PTR(-EINVAL);
+                                                kfree(nesmr);
+                                                goto reg_user_mr_err;
+                                        }
+
+                                        region_length += sg_dma_len(&chunk->page_list[nmap_index]);
+                                        chunk_pages = sg_dma_len(&chunk->page_list[nmap_index]) >> 12;
+                                        region_length -= skip_pages << 12;
+                                        for (page_index=skip_pages; page_index < chunk_pages; page_index++) {
+                                                skip_pages = 0;
+                                                if ((page_count!=0)&&(page_count<<12)-(region->offset&(4096-1))>=region->length)
+                                                        goto enough_pages;
+                                                if ((page_count&0x01FF) == 0) {
+                                                        if (page_count>(1024*512)) {
+                                                                ib_umem_release(region);
+                                                                pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
+                                                                                vpbl.pbl_pbase);
+                                                                nes_free_resource(nesadapter,
+                                                                                nesadapter->allocated_mrs, stag_index);
+                                                                kfree(nesmr);
+                                                                ibmr = ERR_PTR(-E2BIG);
+                                                                goto reg_user_mr_err;
+                                                        }
+                                                        if (root_pbl_index == 1) {
+                                                                root_vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev,
+                                                                                8192, &root_vpbl.pbl_pbase);
+                                                                nes_debug(NES_DBG_MR, "Allocating root PBL, va = %p, pa = 0x%08X\n",
+                                                                                root_vpbl.pbl_vbase, (unsigned int)root_vpbl.pbl_pbase);
+                                                                if (!root_vpbl.pbl_vbase) {
+                                                                        ib_umem_release(region);
+                                                                        pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
+                                                                                        vpbl.pbl_pbase);
+                                                                        nes_free_resource(nesadapter, nesadapter->allocated_mrs,
+                                                                                        stag_index);
+                                                                        kfree(nesmr);
+                                                                        ibmr = ERR_PTR(-ENOMEM);
+                                                                        goto reg_user_mr_err;
+                                                                }
+                                                                root_vpbl.leaf_vpbl = kzalloc(sizeof(*root_vpbl.leaf_vpbl)*1024,
+                                                                                GFP_KERNEL);
+                                                                if (!root_vpbl.leaf_vpbl) {
+                                                                        ib_umem_release(region);
+                                                                        pci_free_consistent(nesdev->pcidev, 8192, root_vpbl.pbl_vbase,
+                                                                                        root_vpbl.pbl_pbase);
+                                                                        pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
+                                                                                        vpbl.pbl_pbase);
+                                                                        nes_free_resource(nesadapter, nesadapter->allocated_mrs,
+                                                                                        stag_index);
+                                                                        kfree(nesmr);
+                                                                        ibmr = ERR_PTR(-ENOMEM);
+                                                                        goto reg_user_mr_err;
+                                                                }
+                                                                root_vpbl.pbl_vbase[0].pa_low =
+                                                                                cpu_to_le32((u32)vpbl.pbl_pbase);
+                                                                root_vpbl.pbl_vbase[0].pa_high =
+                                                                                cpu_to_le32((u32)((((u64)vpbl.pbl_pbase) >> 32)));
+                                                                root_vpbl.leaf_vpbl[0] = vpbl;
+                                                        }
+                                                        vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 4096,
+                                                                        &vpbl.pbl_pbase);
+                                                        nes_debug(NES_DBG_MR, "Allocating leaf PBL, va = %p, pa = 0x%08X\n",
+                                                                        vpbl.pbl_vbase, (unsigned int)vpbl.pbl_pbase);
+                                                        if (!vpbl.pbl_vbase) {
+                                                                ib_umem_release(region);
+                                                                nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
+                                                                ibmr = ERR_PTR(-ENOMEM);
+                                                                kfree(nesmr);
+                                                                goto reg_user_mr_err;
+                                                        }
+                                                        if (1 <= root_pbl_index) {
+                                                                root_vpbl.pbl_vbase[root_pbl_index].pa_low =
+                                                                                cpu_to_le32((u32)vpbl.pbl_pbase);
+                                                                root_vpbl.pbl_vbase[root_pbl_index].pa_high =
+                                                                                cpu_to_le32((u32)((((u64)vpbl.pbl_pbase)>>32)));
+                                                                root_vpbl.leaf_vpbl[root_pbl_index] = vpbl;
+                                                        }
+                                                        root_pbl_index++;
+                                                        cur_pbl_index = 0;
+                                                }
+                                                if (single_page) {
+                                                        if (page_count != 0) {
+                                                                if ((last_dma_addr+4096) !=
+                                                                                (sg_dma_address(&chunk->page_list[nmap_index])+
+                                                                                (page_index*4096)))
+                                                                        single_page = 0;
+                                                                last_dma_addr = sg_dma_address(&chunk->page_list[nmap_index])+
+                                                                                (page_index*4096);
+                                                        } else {
+                                                                first_dma_addr = sg_dma_address(&chunk->page_list[nmap_index])+
+                                                                                (page_index*4096);
+                                                                last_dma_addr = first_dma_addr;
+                                                        }
+                                                }
+
+                                                vpbl.pbl_vbase[cur_pbl_index].pa_low =
+                                                                cpu_to_le32((u32)(sg_dma_address(&chunk->page_list[nmap_index])+
+                                                                (page_index*4096)));
+                                                vpbl.pbl_vbase[cur_pbl_index].pa_high =
+                                                                cpu_to_le32((u32)((((u64)(sg_dma_address(&chunk->page_list[nmap_index])+
+                                                                (page_index*4096))) >> 32)));
+                                                cur_pbl_index++;
+                                                page_count++;
+                                        }
+                                }
+                        }
+                        enough_pages:
+                        nes_debug(NES_DBG_MR, "calculating stag, stag_index=0x%08x, driver_key=0x%08x,"
+                                        " stag_key=0x%08x\n",
+                                        stag_index, driver_key, stag_key);
+                        stag = stag_index << 8;
+                        stag |= driver_key;
+                        stag += (u32)stag_key;
+                        if (stag == 0) {
+                                stag = 1;
+                        }
+
+                        iova_start = virt;
+                        /* Make the leaf PBL the root if only one PBL */
+                        if (root_pbl_index == 1) {
+                                root_vpbl.pbl_pbase = vpbl.pbl_pbase;
+                        }
+
+                        if (single_page) {
+                                pbl_count = 0;
+                        } else {
+                                pbl_count = root_pbl_index;
+                                first_dma_addr = 0;
+                        }
+                        nes_debug(NES_DBG_MR, "Registering STag 0x%08X, VA = 0x%08X, length = 0x%08X,"
+                                        " index = 0x%08X, region->length=0x%08llx, pbl_count = %u\n",
+                                        stag, (unsigned int)iova_start,
+                                        (unsigned int)region_length, stag_index,
+                                        (unsigned long long)region->length, pbl_count);
+                        ret = nes_reg_mr( nesdev, nespd, stag, region->length, &root_vpbl,
+                                        first_dma_addr, pbl_count, (u16)cur_pbl_index, acc, &iova_start);
+
+                        nes_debug(NES_DBG_MR, "ret=%d\n", ret);
+
+                        if (ret == 0) {
+                                nesmr->ibmr.rkey = stag;
+                                nesmr->ibmr.lkey = stag;
+                                nesmr->mode = IWNES_MEMREG_TYPE_MEM;
+                                ibmr = &nesmr->ibmr;
+                                nesmr->pbl_4k = ((pbl_count > 1) || (cur_pbl_index > 32)) ? 1 : 0;
+                                nesmr->pbls_used = pbl_count;
+                                if (pbl_count > 1) {
+                                        nesmr->pbls_used++;
+                                }
+                        } else {
+                                ib_umem_release(region);
+                                kfree(nesmr);
+                                ibmr = ERR_PTR(-ENOMEM);
+                        }
+
+                        reg_user_mr_err:
+                        /* free the resources */
+                        if (root_pbl_index == 1) {
+                                pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
+                                                vpbl.pbl_pbase);
+                        } else {
+                                for (page_index=0; page_index<root_pbl_index; page_index++) {
+                                        pci_free_consistent(nesdev->pcidev, 4096,
+                                                        root_vpbl.leaf_vpbl[page_index].pbl_vbase,
+                                                        root_vpbl.leaf_vpbl[page_index].pbl_pbase);
+                                }
+                                kfree(root_vpbl.leaf_vpbl);
+                                pci_free_consistent(nesdev->pcidev, 8192, root_vpbl.pbl_vbase,
+                                                root_vpbl.pbl_pbase);
+                        }
+
+                        nes_debug(NES_DBG_MR, "Leaving, ibmr=%p", ibmr);
+
+                        return ibmr;
+                        break;
+                case IWNES_MEMREG_TYPE_QP:
+                case IWNES_MEMREG_TYPE_CQ:
+                        nespbl = kzalloc(sizeof(*nespbl), GFP_KERNEL);
+                        if (!nespbl) {
+                                nes_debug(NES_DBG_MR, "Unable to allocate PBL\n");
+                                ib_umem_release(region);
+                                return ERR_PTR(-ENOMEM);
+                        }
+                        nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
+                        if (!nesmr) {
+                                ib_umem_release(region);
+                                kfree(nespbl);
+                                nes_debug(NES_DBG_MR, "Unable to allocate nesmr\n");
+                                return ERR_PTR(-ENOMEM);
+                        }
+                        nesmr->region = region;
+                        nes_ucontext = to_nesucontext(pd->uobject->context);
+                        pbl_depth = region->length >> 12;
+                        pbl_depth += (region->length & (4096-1)) ? 1 : 0;
+                        nespbl->pbl_size = pbl_depth*sizeof(u64);
+                        if (req.reg_type == IWNES_MEMREG_TYPE_QP) {
+                                nes_debug(NES_DBG_MR, "Attempting to allocate QP PBL memory");
+                        } else {
+                                nes_debug(NES_DBG_MR, "Attempting to allocate CP PBL memory");
+                        }
+
+                        nes_debug(NES_DBG_MR, " %u bytes, %u entries.\n",
+                                        nespbl->pbl_size, pbl_depth);
+                        pbl = pci_alloc_consistent(nesdev->pcidev, nespbl->pbl_size,
+                                        &nespbl->pbl_pbase);
+                        if (!pbl) {
+                                ib_umem_release(region);
+                                kfree(nesmr);
+                                kfree(nespbl);
+                                nes_debug(NES_DBG_MR, "Unable to allocate PBL memory\n");
+                                return ERR_PTR(-ENOMEM);
+                        }
+
+                        nespbl->pbl_vbase = (u64 *)pbl;
+                        nespbl->user_base = start;
+                        nes_debug(NES_DBG_MR, "Allocated PBL memory, %u bytes, pbl_pbase=%p,"
+                                        " pbl_vbase=%p user_base=0x%lx\n",
+                                        nespbl->pbl_size, (void *)nespbl->pbl_pbase,
+                                        (void*)nespbl->pbl_vbase, nespbl->user_base);
+
+                        list_for_each_entry(chunk, &region->chunk_list, list) {
+                                for (nmap_index = 0; nmap_index < chunk->nmap; ++nmap_index) {
+                                        chunk_pages = sg_dma_len(&chunk->page_list[nmap_index]) >> 12;
+                                        chunk_pages += (sg_dma_len(&chunk->page_list[nmap_index]) & (4096-1)) ? 1 : 0;
+                                        nespbl->page = sg_page(&chunk->page_list[0]);
+                                        for (page_index=0; page_index<chunk_pages; page_index++) {
+                                                ((__le32 *)pbl)[0] = cpu_to_le32((u32)
+                                                                (sg_dma_address(&chunk->page_list[nmap_index])+
+                                                                (page_index*4096)));
+                                                ((__le32 *)pbl)[1] = cpu_to_le32(((u64)
+                                                                (sg_dma_address(&chunk->page_list[nmap_index])+
+                                                                (page_index*4096)))>>32);
+                                                nes_debug(NES_DBG_MR, "pbl=%p, *pbl=0x%016llx, 0x%08x%08x\n", pbl,
+                                                                (unsigned long long)*pbl,
+                                                                le32_to_cpu(((__le32 *)pbl)[1]), le32_to_cpu(((__le32 *)pbl)[0]));
+                                                pbl++;
+                                        }
+                                }
+                        }
+                        if (req.reg_type == IWNES_MEMREG_TYPE_QP) {
+                                list_add_tail(&nespbl->list, &nes_ucontext->qp_reg_mem_list);
+                        } else {
+                                list_add_tail(&nespbl->list, &nes_ucontext->cq_reg_mem_list);
+                        }
+                        nesmr->ibmr.rkey = -1;
+                        nesmr->ibmr.lkey = -1;
+                        nesmr->mode = req.reg_type;
+                        return &nesmr->ibmr;
+                        break;
+        }
+
+        return ERR_PTR(-ENOSYS);
+}
+
+
+/**
+ * nes_dereg_mr
+ */
+static int nes_dereg_mr(struct ib_mr *ib_mr)
+{
+        struct nes_mr *nesmr = to_nesmr(ib_mr);
+        struct nes_vnic *nesvnic = to_nesvnic(ib_mr->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        struct nes_cqp_request *cqp_request;
+        unsigned long flags;
+        int ret;
+        u16 major_code;
+        u16 minor_code;
+
+        if (nesmr->region) {
+                ib_umem_release(nesmr->region);
+        }
+        if (nesmr->mode != IWNES_MEMREG_TYPE_MEM) {
+                kfree(nesmr);
+                return 0;
+        }
+
+        /* Deallocate the region with the adapter */
+
+        cqp_request = nes_get_cqp_request(nesdev);
+        if (cqp_request == NULL) {
+                nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
+                return -ENOMEM;
+        }
+        cqp_request->waiting = 1;
+        cqp_wqe = &cqp_request->cqp_wqe;
+
+        spin_lock_irqsave(&nesadapter->pbl_lock, flags);
+        if (nesmr->pbls_used != 0) {
+                if (nesmr->pbl_4k) {
+                        nesadapter->free_4kpbl += nesmr->pbls_used;
+                        if (nesadapter->free_4kpbl > nesadapter->max_4kpbl) {
+                                printk(KERN_ERR PFX "free 4KB PBLs(%u) has exceeded the max(%u)\n",
+                                                nesadapter->free_4kpbl, nesadapter->max_4kpbl);
+                        }
+                } else {
+                        nesadapter->free_256pbl += nesmr->pbls_used;
+                        if (nesadapter->free_256pbl > nesadapter->max_256pbl) {
+                                printk(KERN_ERR PFX "free 256B PBLs(%u) has exceeded the max(%u)\n",
+                                                nesadapter->free_256pbl, nesadapter->max_256pbl);
+                        }
+                }
+        }
+
+        spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX,
+                        NES_CQP_DEALLOCATE_STAG | NES_CQP_STAG_VA_TO |
+                        NES_CQP_STAG_DEALLOC_PBLS | NES_CQP_STAG_MR);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, ib_mr->rkey);
+
+        atomic_set(&cqp_request->refcount, 2);
+        nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+
+        /* Wait for CQP */
+        nes_debug(NES_DBG_MR, "Waiting for deallocate STag 0x%08X completed\n", ib_mr->rkey);
+        ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
+                        NES_EVENT_TIMEOUT);
+        nes_debug(NES_DBG_MR, "Deallocate STag 0x%08X completed, wait_event_timeout ret = %u,"
+                        " CQP Major:Minor codes = 0x%04X:0x%04X\n",
+                        ib_mr->rkey, ret, cqp_request->major_code, cqp_request->minor_code);
+
+        nes_free_resource(nesadapter, nesadapter->allocated_mrs,
+                        (ib_mr->rkey & 0x0fffff00) >> 8);
+
+        kfree(nesmr);
+
+        major_code = cqp_request->major_code;
+        minor_code = cqp_request->minor_code;
+        if (atomic_dec_and_test(&cqp_request->refcount)) {
+                if (cqp_request->dynamic) {
+                        kfree(cqp_request);
+                } else {
+                        spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                        list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                        spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                }
+        }
+        if (!ret) {
+                nes_debug(NES_DBG_MR, "Timeout waiting to destroy STag,"
+                                " ib_mr=%p, rkey = 0x%08X\n",
+                                ib_mr, ib_mr->rkey);
+                return -ETIME;
+        } else if (major_code) {
+                nes_debug(NES_DBG_MR, "Error (0x%04X:0x%04X) while attempting"
+                                " to destroy STag, ib_mr=%p, rkey = 0x%08X\n",
+                                major_code, minor_code, ib_mr, ib_mr->rkey);
+                return -EIO;
+        } else
+                return 0;
+}
+
+
+/**
+ * show_rev
+ */
+static ssize_t show_rev(struct class_device *cdev, char *buf)
+{
+        struct nes_ib_device *nesibdev =
+                        container_of(cdev, struct nes_ib_device, ibdev.class_dev);
+        struct nes_vnic *nesvnic = nesibdev->nesvnic;
+
+        nes_debug(NES_DBG_INIT, "\n");
+        return sprintf(buf, "%x\n", nesvnic->nesdev->nesadapter->hw_rev);
+}
+
+
+/**
+ * show_fw_ver
+ */
+static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
+{
+        struct nes_ib_device *nesibdev =
+                        container_of(cdev, struct nes_ib_device, ibdev.class_dev);
+        struct nes_vnic *nesvnic = nesibdev->nesvnic;
+
+        nes_debug(NES_DBG_INIT, "\n");
+        return sprintf(buf, "%x.%x.%x\n",
+                        (int)(nesvnic->nesdev->nesadapter->fw_ver >> 32),
+                        (int)(nesvnic->nesdev->nesadapter->fw_ver >> 16) & 0xffff,
+                        (int)(nesvnic->nesdev->nesadapter->fw_ver & 0xffff));
+}
+
+
+/**
+ * show_hca
+ */
+static ssize_t show_hca(struct class_device *cdev, char *buf)
+{
+        nes_debug(NES_DBG_INIT, "\n");
+        return sprintf(buf, "NES020\n");
+}
+
+
+/**
+ * show_board
+ */
+static ssize_t show_board(struct class_device *cdev, char *buf)
+{
+        nes_debug(NES_DBG_INIT, "\n");
+        return sprintf(buf, "%.*s\n", 32, "NES020 Board ID");
+}
+
+
+static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
+static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
+static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
+static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
+
+static struct class_device_attribute *nes_class_attributes[] = {
+        &class_device_attr_hw_rev,
+        &class_device_attr_fw_ver,
+        &class_device_attr_hca_type,
+        &class_device_attr_board_id
+};
+
+
+/**
+ * nes_query_qp
+ */
+static int nes_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
+                int attr_mask, struct ib_qp_init_attr *init_attr)
+{
+        struct nes_qp *nesqp = to_nesqp(ibqp);
+
+        nes_debug(NES_DBG_QP, "\n");
+
+        attr->qp_access_flags = 0;
+        attr->cap.max_send_wr = nesqp->hwqp.sq_size;
+        attr->cap.max_recv_wr = nesqp->hwqp.rq_size;
+        attr->cap.max_recv_sge = 1;
+        if (nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) {
+                init_attr->cap.max_inline_data = 0;
+        } else {
+                init_attr->cap.max_inline_data = 64;
+        }
+
+        init_attr->event_handler = nesqp->ibqp.event_handler;
+        init_attr->qp_context = nesqp->ibqp.qp_context;
+        init_attr->send_cq = nesqp->ibqp.send_cq;
+        init_attr->recv_cq = nesqp->ibqp.recv_cq;
+        init_attr->srq = nesqp->ibqp.srq = nesqp->ibqp.srq;
+        init_attr->cap = attr->cap;
+
+        return 0;
+}
+
+
+/**
+ * nes_hw_modify_qp
+ */
+int nes_hw_modify_qp(struct nes_device *nesdev, struct nes_qp *nesqp,
+                u32 next_iwarp_state, u32 wait_completion)
+{
+        struct nes_hw_cqp_wqe *cqp_wqe;
+        /* struct iw_cm_id *cm_id = nesqp->cm_id; */
+        /* struct iw_cm_event cm_event; */
+        struct nes_cqp_request *cqp_request;
+        unsigned long flags;
+        int ret;
+        u16 major_code;
+
+        nes_debug(NES_DBG_MOD_QP, "QP%u, refcount=%d\n",
+                        nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount));
+
+        cqp_request = nes_get_cqp_request(nesdev);
+        if (cqp_request == NULL) {
+                nes_debug(NES_DBG_MOD_QP, "Failed to get a cqp_request.\n");
+                return -ENOMEM;
+        }
+        if (wait_completion) {
+                cqp_request->waiting = 1;
+        } else {
+                cqp_request->waiting = 0;
+        }
+        cqp_wqe = &cqp_request->cqp_wqe;
+
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX,
+                        NES_CQP_MODIFY_QP | NES_CQP_QP_TYPE_IWARP | next_iwarp_state);
+        nes_debug(NES_DBG_MOD_QP, "using next_iwarp_state=%08x, wqe_words=%08x\n",
+                        next_iwarp_state, le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX]));
+        nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
+        set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id);
+        set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, (u64)nesqp->nesqp_context_pbase);
+
+        atomic_set(&cqp_request->refcount, 2);
+        nes_post_cqp_request(nesdev, cqp_request, NES_CQP_REQUEST_RING_DOORBELL);
+
+        /* Wait for CQP */
+        if (wait_completion) {
+                /* nes_debug(NES_DBG_MOD_QP, "Waiting for modify iWARP QP%u to complete.\n",
+                                nesqp->hwqp.qp_id); */
+                ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
+                                NES_EVENT_TIMEOUT);
+                nes_debug(NES_DBG_MOD_QP, "Modify iwarp QP%u completed, wait_event_timeout ret=%u, "
+                                "CQP Major:Minor codes = 0x%04X:0x%04X.\n",
+                                nesqp->hwqp.qp_id, ret, cqp_request->major_code, cqp_request->minor_code);
+                major_code = cqp_request->major_code;
+                if (major_code) {
+                        nes_debug(NES_DBG_MOD_QP, "Modify iwarp QP%u failed"
+                                        "CQP Major:Minor codes = 0x%04X:0x%04X, intended next state = 0x%08X.\n",
+                                        nesqp->hwqp.qp_id, cqp_request->major_code,
+                                        cqp_request->minor_code, next_iwarp_state);
+                }
+                if (atomic_dec_and_test(&cqp_request->refcount)) {
+                        if (cqp_request->dynamic) {
+                                kfree(cqp_request);
+                        } else {
+                                spin_lock_irqsave(&nesdev->cqp.lock, flags);
+                                list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
+                                spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
+                        }
+                }
+                if (!ret)
+                        return -ETIME;
+                else if (major_code)
+                        return -EIO;
+                else
+                        return 0;
+        } else {
+                return 0;
+        }
+}
+
+
+/**
+ * nes_modify_qp
+ */
+int nes_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
+                int attr_mask, struct ib_udata *udata)
+{
+        struct nes_qp *nesqp = to_nesqp(ibqp);
+        struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        /* u32 cqp_head; */
+        /* u32 counter; */
+        u32 next_iwarp_state = 0;
+        int err;
+        unsigned long qplockflags;
+        int ret;
+        u16 original_last_aeq;
+        u8 issue_modify_qp = 0;
+        u8 issue_disconnect = 0;
+        u8 dont_wait = 0;
+
+        nes_debug(NES_DBG_MOD_QP, "QP%u: QP State=%u, cur QP State=%u,"
+                        " iwarp_state=0x%X, refcount=%d\n",
+                        nesqp->hwqp.qp_id, attr->qp_state, nesqp->ibqp_state,
+                        nesqp->iwarp_state, atomic_read(&nesqp->refcount));
+
+        nes_add_ref(&nesqp->ibqp);
+        spin_lock_irqsave(&nesqp->lock, qplockflags);
+
+        nes_debug(NES_DBG_MOD_QP, "QP%u: hw_iwarp_state=0x%X, hw_tcp_state=0x%X,"
+                        " QP Access Flags=0x%X, attr_mask = 0x%0x\n",
+                        nesqp->hwqp.qp_id, nesqp->hw_iwarp_state,
+                        nesqp->hw_tcp_state, attr->qp_access_flags, attr_mask);
+
+        if (attr_mask & IB_QP_STATE) {
+                switch (attr->qp_state) {
+                        case IB_QPS_INIT:
+                                nes_debug(NES_DBG_MOD_QP, "QP%u: new state = init\n",
+                                                nesqp->hwqp.qp_id);
+                                if (nesqp->iwarp_state > (u32)NES_CQP_QP_IWARP_STATE_IDLE) {
+                                        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                        nes_rem_ref(&nesqp->ibqp);
+                                        return -EINVAL;
+                                }
+                                next_iwarp_state = NES_CQP_QP_IWARP_STATE_IDLE;
+                                issue_modify_qp = 1;
+                                break;
+                        case IB_QPS_RTR:
+                                nes_debug(NES_DBG_MOD_QP, "QP%u: new state = rtr\n",
+                                                nesqp->hwqp.qp_id);
+                                if (nesqp->iwarp_state>(u32)NES_CQP_QP_IWARP_STATE_IDLE) {
+                                        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                        nes_rem_ref(&nesqp->ibqp);
+                                        return -EINVAL;
+                                }
+                                next_iwarp_state = NES_CQP_QP_IWARP_STATE_IDLE;
+                                issue_modify_qp = 1;
+                                break;
+                        case IB_QPS_RTS:
+                                nes_debug(NES_DBG_MOD_QP, "QP%u: new state = rts\n",
+                                                nesqp->hwqp.qp_id);
+                                if (nesqp->iwarp_state>(u32)NES_CQP_QP_IWARP_STATE_RTS) {
+                                        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                        nes_rem_ref(&nesqp->ibqp);
+                                        return -EINVAL;
+                                }
+                                if (nesqp->cm_id == NULL) {
+                                        nes_debug(NES_DBG_MOD_QP, "QP%u: Failing attempt to move QP to RTS without a CM_ID. \n",
+                                                        nesqp->hwqp.qp_id );
+                                        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                        nes_rem_ref(&nesqp->ibqp);
+                                        return -EINVAL;
+                                }
+                                next_iwarp_state = NES_CQP_QP_IWARP_STATE_RTS;
+                                if (nesqp->iwarp_state != NES_CQP_QP_IWARP_STATE_RTS)
+                                        next_iwarp_state |= NES_CQP_QP_CONTEXT_VALID |
+                                                        NES_CQP_QP_ARP_VALID | NES_CQP_QP_ORD_VALID;
+                                issue_modify_qp = 1;
+                                nesqp->hw_tcp_state = NES_AEQE_TCP_STATE_ESTABLISHED;
+                                nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_RTS;
+                                nesqp->hte_added = 1;
+                                break;
+                        case IB_QPS_SQD:
+                                issue_modify_qp = 1;
+                                nes_debug(NES_DBG_MOD_QP, "QP%u: new state=closing. SQ head=%u, SQ tail=%u\n",
+                                                nesqp->hwqp.qp_id, nesqp->hwqp.sq_head, nesqp->hwqp.sq_tail);
+                                if (nesqp->iwarp_state == (u32)NES_CQP_QP_IWARP_STATE_CLOSING) {
+                                        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                        nes_rem_ref(&nesqp->ibqp);
+                                        return 0;
+                                } else {
+                                        if (nesqp->iwarp_state > (u32)NES_CQP_QP_IWARP_STATE_CLOSING) {
+                                                nes_debug(NES_DBG_MOD_QP, "QP%u: State change to closing"
+                                                                " ignored due to current iWARP state\n",
+                                                                nesqp->hwqp.qp_id);
+                                                spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                                nes_rem_ref(&nesqp->ibqp);
+                                                return -EINVAL;
+                                        }
+                                        if (nesqp->hw_iwarp_state != NES_AEQE_IWARP_STATE_RTS) {
+                                                nes_debug(NES_DBG_MOD_QP, "QP%u: State change to closing"
+                                                                " already done based on hw state.\n",
+                                                                nesqp->hwqp.qp_id);
+                                                issue_modify_qp = 0;
+                                                nesqp->in_disconnect = 0;
+                                        }
+                                        switch (nesqp->hw_iwarp_state) {
+                                                case NES_AEQE_IWARP_STATE_CLOSING:
+                                                        next_iwarp_state = NES_CQP_QP_IWARP_STATE_CLOSING;
+                                                case NES_AEQE_IWARP_STATE_TERMINATE:
+                                                        next_iwarp_state = NES_CQP_QP_IWARP_STATE_TERMINATE;
+                                                        break;
+                                                case NES_AEQE_IWARP_STATE_ERROR:
+                                                        next_iwarp_state = NES_CQP_QP_IWARP_STATE_ERROR;
+                                                        break;
+                                                default:
+                                                        next_iwarp_state = NES_CQP_QP_IWARP_STATE_CLOSING;
+                                                        nesqp->in_disconnect = 1;
+                                                        nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_CLOSING;
+                                                        break;
+                                        }
+                                }
+                                break;
+                        case IB_QPS_SQE:
+                                nes_debug(NES_DBG_MOD_QP, "QP%u: new state = terminate\n",
+                                                nesqp->hwqp.qp_id);
+                                if (nesqp->iwarp_state>=(u32)NES_CQP_QP_IWARP_STATE_TERMINATE) {
+                                        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                        nes_rem_ref(&nesqp->ibqp);
+                                        return -EINVAL;
+                                }
+                                /* next_iwarp_state = (NES_CQP_QP_IWARP_STATE_TERMINATE | 0x02000000); */
+                                next_iwarp_state = NES_CQP_QP_IWARP_STATE_TERMINATE;
+                                nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_TERMINATE;
+                                issue_modify_qp = 1;
+                                nesqp->in_disconnect = 1;
+                                break;
+                        case IB_QPS_ERR:
+                        case IB_QPS_RESET:
+                                if (nesqp->iwarp_state == (u32)NES_CQP_QP_IWARP_STATE_ERROR) {
+                                        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                        nes_rem_ref(&nesqp->ibqp);
+                                        return -EINVAL;
+                                }
+                                nes_debug(NES_DBG_MOD_QP, "QP%u: new state = error\n",
+                                                nesqp->hwqp.qp_id);
+                                next_iwarp_state = NES_CQP_QP_IWARP_STATE_ERROR;
+                                /* next_iwarp_state = (NES_CQP_QP_IWARP_STATE_TERMINATE | 0x02000000); */
+                                        if (nesqp->hte_added) {
+                                                nes_debug(NES_DBG_MOD_QP, "set CQP_QP_DEL_HTE\n");
+                                                next_iwarp_state |= NES_CQP_QP_DEL_HTE;
+                                                nesqp->hte_added = 0;
+                                        }
+                                if ((nesqp->hw_tcp_state > NES_AEQE_TCP_STATE_CLOSED) &&
+                                                (nesqp->hw_tcp_state != NES_AEQE_TCP_STATE_TIME_WAIT)) {
+                                        next_iwarp_state |= NES_CQP_QP_RESET;
+                                        nesqp->in_disconnect = 1;
+                                } else {
+                                        nes_debug(NES_DBG_MOD_QP, "QP%u NOT setting NES_CQP_QP_RESET since TCP state = %u\n",
+                                                        nesqp->hwqp.qp_id, nesqp->hw_tcp_state);
+                                        dont_wait = 1;
+                                }
+                                issue_modify_qp = 1;
+                                nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_ERROR;
+                                break;
+                        default:
+                                spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                nes_rem_ref(&nesqp->ibqp);
+                                return -EINVAL;
+                                break;
+                }
+
+                nesqp->ibqp_state = attr->qp_state;
+                if (((nesqp->iwarp_state & NES_CQP_QP_IWARP_STATE_MASK) ==
+                                (u32)NES_CQP_QP_IWARP_STATE_RTS) &&
+                                ((next_iwarp_state & NES_CQP_QP_IWARP_STATE_MASK) >
+                                (u32)NES_CQP_QP_IWARP_STATE_RTS)) {
+                        nesqp->iwarp_state = next_iwarp_state & NES_CQP_QP_IWARP_STATE_MASK;
+                        nes_debug(NES_DBG_MOD_QP, "Change nesqp->iwarp_state=%08x\n",
+                                        nesqp->iwarp_state);
+                        issue_disconnect = 1;
+                } else {
+                        nesqp->iwarp_state = next_iwarp_state & NES_CQP_QP_IWARP_STATE_MASK;
+                        nes_debug(NES_DBG_MOD_QP, "Change nesqp->iwarp_state=%08x\n",
+                                        nesqp->iwarp_state);
+                }
+        }
+
+        if (attr_mask & IB_QP_ACCESS_FLAGS) {
+                if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE) {
+                        nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_RDMA_WRITE_EN |
+                                        NES_QPCONTEXT_MISC_RDMA_READ_EN);
+                        issue_modify_qp = 1;
+                }
+                if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) {
+                        nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_RDMA_WRITE_EN);
+                        issue_modify_qp = 1;
+                }
+                if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) {
+                        nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_RDMA_READ_EN);
+                        issue_modify_qp = 1;
+                }
+                if (attr->qp_access_flags & IB_ACCESS_MW_BIND) {
+                        nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_WBIND_EN);
+                        issue_modify_qp = 1;
+                }
+
+                if (nesqp->user_mode) {
+                        nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_RDMA_WRITE_EN |
+                                        NES_QPCONTEXT_MISC_RDMA_READ_EN);
+                        issue_modify_qp = 1;
+                }
+        }
+
+        original_last_aeq = nesqp->last_aeq;
+        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+
+        nes_debug(NES_DBG_MOD_QP, "issue_modify_qp=%u\n", issue_modify_qp);
+
+        ret = 0;
+
+
+        if (issue_modify_qp) {
+                nes_debug(NES_DBG_MOD_QP, "call nes_hw_modify_qp\n");
+                ret = nes_hw_modify_qp(nesdev, nesqp, next_iwarp_state, 1);
+                if (ret)
+                        nes_debug(NES_DBG_MOD_QP, "nes_hw_modify_qp (next_iwarp_state = 0x%08X)"
+                                        " failed for QP%u.\n",
+                                        next_iwarp_state, nesqp->hwqp.qp_id);
+
+        }
+
+        if ((issue_modify_qp) && (nesqp->ibqp_state > IB_QPS_RTS)) {
+                nes_debug(NES_DBG_MOD_QP, "QP%u Issued ModifyQP refcount (%d),"
+                                " original_last_aeq = 0x%04X. last_aeq = 0x%04X.\n",
+                                nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
+                                original_last_aeq, nesqp->last_aeq);
+                if ((!ret) ||
+                                ((original_last_aeq != NES_AEQE_AEID_RDMAP_ROE_BAD_LLP_CLOSE) &&
+                                (ret))) {
+                        if (dont_wait) {
+                                if (nesqp->cm_id && nesqp->hw_tcp_state != 0) {
+                                        nes_debug(NES_DBG_MOD_QP, "QP%u Queuing fake disconnect for QP refcount (%d),"
+                                                        " original_last_aeq = 0x%04X. last_aeq = 0x%04X.\n",
+                                                        nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
+                                                        original_last_aeq, nesqp->last_aeq);
+                                        /* this one is for the cm_disconnect thread */
+                                        nes_add_ref(&nesqp->ibqp);
+                                        spin_lock_irqsave(&nesqp->lock, qplockflags);
+                                        nesqp->hw_tcp_state = NES_AEQE_TCP_STATE_CLOSED;
+                                        nesqp->last_aeq = NES_AEQE_AEID_RESET_SENT;
+                                        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                        nes_cm_disconn(nesqp);
+                                } else {
+                                        nes_debug(NES_DBG_MOD_QP, "QP%u No fake disconnect, QP refcount=%d\n",
+                                                        nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount));
+                                        nes_rem_ref(&nesqp->ibqp);
+                                }
+                        } else {
+                                spin_lock_irqsave(&nesqp->lock, qplockflags);
+                                if (nesqp->cm_id) {
+                                        /* These two are for the timer thread */
+                                        if (atomic_inc_return(&nesqp->close_timer_started) == 1) {
+                                                nes_add_ref(&nesqp->ibqp);
+                                                nesqp->cm_id->add_ref(nesqp->cm_id);
+                                                nes_debug(NES_DBG_MOD_QP, "QP%u Not decrementing QP refcount (%d),"
+                                                                " need ae to finish up, original_last_aeq = 0x%04X."
+                                                                " last_aeq = 0x%04X, scheduling timer.\n",
+                                                                nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
+                                                                original_last_aeq, nesqp->last_aeq);
+                                                schedule_nes_timer(nesqp->cm_node, (struct sk_buff *) nesqp, NES_TIMER_TYPE_CLOSE, 1, 0);
+                                        }
+                                        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                } else {
+                                        spin_unlock_irqrestore(&nesqp->lock, qplockflags);
+                                        nes_debug(NES_DBG_MOD_QP, "QP%u Not decrementing QP refcount (%d),"
+                                                        " need ae to finish up, original_last_aeq = 0x%04X."
+                                                        " last_aeq = 0x%04X.\n",
+                                                        nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
+                                                        original_last_aeq, nesqp->last_aeq);
+                                }
+                        }
+                } else {
+                        nes_debug(NES_DBG_MOD_QP, "QP%u Decrementing QP refcount (%d), No ae to finish up,"
+                                        " original_last_aeq = 0x%04X. last_aeq = 0x%04X.\n",
+                                        nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
+                                        original_last_aeq, nesqp->last_aeq);
+                        nes_rem_ref(&nesqp->ibqp);
+                }
+        } else {
+                nes_debug(NES_DBG_MOD_QP, "QP%u Decrementing QP refcount (%d), No ae to finish up,"
+                                " original_last_aeq = 0x%04X. last_aeq = 0x%04X.\n",
+                                nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
+                                original_last_aeq, nesqp->last_aeq);
+                nes_rem_ref(&nesqp->ibqp);
+        }
+
+        err = 0;
+
+        nes_debug(NES_DBG_MOD_QP, "QP%u Leaving, refcount=%d\n",
+                        nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount));
+
+        return err;
+}
+
+
+/**
+ * nes_muticast_attach
+ */
+static int nes_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
+{
+        nes_debug(NES_DBG_INIT, "\n");
+        return -ENOSYS;
+}
+
+
+/**
+ * nes_multicast_detach
+ */
+static int nes_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
+{
+        nes_debug(NES_DBG_INIT, "\n");
+        return -ENOSYS;
+}
+
+
+/**
+ * nes_process_mad
+ */
+static int nes_process_mad(struct ib_device *ibdev, int mad_flags,
+                u8 port_num, struct ib_wc *in_wc, struct ib_grh *in_grh,
+                struct ib_mad *in_mad, struct ib_mad *out_mad)
+{
+        nes_debug(NES_DBG_INIT, "\n");
+        return -ENOSYS;
+}
+
+static inline void
+fill_wqe_sg_send(struct nes_hw_qp_wqe *wqe, struct ib_send_wr *ib_wr, u32 uselkey)
+{
+        int sge_index;
+        int total_payload_length = 0;
+        for (sge_index = 0; sge_index < ib_wr->num_sge; sge_index++) {
+                set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_FRAG0_LOW_IDX+(sge_index*4),
+                        ib_wr->sg_list[sge_index].addr);
+                set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_LENGTH0_IDX + (sge_index*4),
+                        ib_wr->sg_list[sge_index].length);
+                if (uselkey)
+                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX + (sge_index*4),
+                                                (ib_wr->sg_list[sge_index].lkey));
+                else
+                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX + (sge_index*4), 0);
+
+                total_payload_length += ib_wr->sg_list[sge_index].length;
+        }
+        nes_debug(NES_DBG_IW_TX, "UC UC UC, sending total_payload_length=%u \n",
+                        total_payload_length);
+        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
+                                total_payload_length);
+}
+
+/**
+ * nes_post_send
+ */
+static int nes_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
+                struct ib_send_wr **bad_wr)
+{
+        u64 u64temp;
+        unsigned long flags = 0;
+        struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_qp *nesqp = to_nesqp(ibqp);
+        struct nes_hw_qp_wqe *wqe;
+        int err;
+        u32 qsize = nesqp->hwqp.sq_size;
+        u32 head;
+        u32 wqe_misc;
+        u32 wqe_count;
+        u32 counter;
+        u32 total_payload_length;
+
+        err = 0;
+        wqe_misc = 0;
+        wqe_count = 0;
+        total_payload_length = 0;
+
+        if (nesqp->ibqp_state > IB_QPS_RTS)
+                return -EINVAL;
+
+                spin_lock_irqsave(&nesqp->lock, flags);
+
+        head = nesqp->hwqp.sq_head;
+
+        while (ib_wr) {
+                /* Check for SQ overflow */
+                if (((head + (2 * qsize) - nesqp->hwqp.sq_tail) % qsize) == (qsize - 1)) {
+                        err = -EINVAL;
+                        break;
+                }
+
+                wqe = &nesqp->hwqp.sq_vbase[head];
+                /* nes_debug(NES_DBG_IW_TX, "processing sq wqe for QP%u at %p, head = %u.\n",
+                                nesqp->hwqp.qp_id, wqe, head); */
+                nes_fill_init_qp_wqe(wqe, nesqp, head);
+                u64temp = (u64)(ib_wr->wr_id);
+                set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX,
+                                        u64temp);
+                        switch (ib_wr->opcode) {
+                                case IB_WR_SEND:
+                                        if (ib_wr->send_flags & IB_SEND_SOLICITED) {
+                                                wqe_misc = NES_IWARP_SQ_OP_SENDSE;
+                                        } else {
+                                                wqe_misc = NES_IWARP_SQ_OP_SEND;
+                                        }
+                                        if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
+                                                err = -EINVAL;
+                                                break;
+                                        }
+                                        if (ib_wr->send_flags & IB_SEND_FENCE) {
+                                                wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
+                                        }
+                                        if ((ib_wr->send_flags & IB_SEND_INLINE) &&
+                                                        ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
+                                                        (ib_wr->sg_list[0].length <= 64)) {
+                                                memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
+                                                               (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
+                                                set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
+                                                                ib_wr->sg_list[0].length);
+                                                wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
+                                        } else {
+                                                fill_wqe_sg_send(wqe, ib_wr, 1);
+                                        }
+
+                                        break;
+                                case IB_WR_RDMA_WRITE:
+                                        wqe_misc = NES_IWARP_SQ_OP_RDMAW;
+                                        if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
+                                                nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=%u\n",
+                                                                ib_wr->num_sge,
+                                                                nesdev->nesadapter->max_sge);
+                                                err = -EINVAL;
+                                                break;
+                                        }
+                                        if (ib_wr->send_flags & IB_SEND_FENCE) {
+                                                wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
+                                        }
+
+                                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
+                                                        ib_wr->wr.rdma.rkey);
+                                        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
+                                                        ib_wr->wr.rdma.remote_addr);
+
+                                        if ((ib_wr->send_flags & IB_SEND_INLINE) &&
+                                                        ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
+                                                        (ib_wr->sg_list[0].length <= 64)) {
+                                                memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
+                                                               (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
+                                                set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
+                                                                ib_wr->sg_list[0].length);
+                                                wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
+                                        } else {
+                                                fill_wqe_sg_send(wqe, ib_wr, 1);
+                                        }
+                                        wqe->wqe_words[NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX] =
+                                                        wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX];
+                                        break;
+                                case IB_WR_RDMA_READ:
+                                        /* iWARP only supports 1 sge for RDMA reads */
+                                        if (ib_wr->num_sge > 1) {
+                                                nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=1\n",
+                                                                ib_wr->num_sge);
+                                                err = -EINVAL;
+                                                break;
+                                        }
+                                        wqe_misc = NES_IWARP_SQ_OP_RDMAR;
+                                        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
+                                                        ib_wr->wr.rdma.remote_addr);
+                                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
+                                                        ib_wr->wr.rdma.rkey);
+                                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX,
+                                                        ib_wr->sg_list->length);
+                                        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_FRAG0_LOW_IDX,
+                                                        ib_wr->sg_list->addr);
+                                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX,
+                                                        ib_wr->sg_list->lkey);
+                                        break;
+                                default:
+                                        /* error */
+                                        err = -EINVAL;
+                                        break;
+                        }
+
+                if (ib_wr->send_flags & IB_SEND_SIGNALED) {
+                        wqe_misc |= NES_IWARP_SQ_WQE_SIGNALED_COMPL;
+                }
+                wqe->wqe_words[NES_IWARP_SQ_WQE_MISC_IDX] = cpu_to_le32(wqe_misc);
+
+                ib_wr = ib_wr->next;
+                head++;
+                wqe_count++;
+                if (head >= qsize)
+                        head = 0;
+
+        }
+
+        nesqp->hwqp.sq_head = head;
+        barrier();
+        while (wqe_count) {
+                counter = min(wqe_count, ((u32)255));
+                wqe_count -= counter;
+                nes_write32(nesdev->regs + NES_WQE_ALLOC,
+                                (counter << 24) | 0x00800000 | nesqp->hwqp.qp_id);
+        }
+
+                spin_unlock_irqrestore(&nesqp->lock, flags);
+
+        if (err)
+                *bad_wr = ib_wr;
+        return err;
+}
+
+
+/**
+ * nes_post_recv
+ */
+static int nes_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *ib_wr,
+                struct ib_recv_wr **bad_wr)
+{
+        u64 u64temp;
+        unsigned long flags = 0;
+        struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_qp *nesqp = to_nesqp(ibqp);
+        struct nes_hw_qp_wqe *wqe;
+        int err = 0;
+        int sge_index;
+        u32 qsize = nesqp->hwqp.rq_size;
+        u32 head;
+        u32 wqe_count = 0;
+        u32 counter;
+        u32 total_payload_length;
+
+        if (nesqp->ibqp_state > IB_QPS_RTS)
+                return -EINVAL;
+
+                spin_lock_irqsave(&nesqp->lock, flags);
+
+        head = nesqp->hwqp.rq_head;
+
+        while (ib_wr) {
+                if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
+                        err = -EINVAL;
+                        break;
+                }
+                /* Check for RQ overflow */
+                if (((head + (2 * qsize) - nesqp->hwqp.rq_tail) % qsize) == (qsize - 1)) {
+                        err = -EINVAL;
+                        break;
+                }
+
+                nes_debug(NES_DBG_IW_RX, "ibwr sge count = %u.\n", ib_wr->num_sge);
+                wqe = &nesqp->hwqp.rq_vbase[head];
+
+                /* nes_debug(NES_DBG_IW_RX, "QP%u:processing rq wqe at %p, head = %u.\n",
+                                nesqp->hwqp.qp_id, wqe, head); */
+                nes_fill_init_qp_wqe(wqe, nesqp, head);
+                u64temp = (u64)(ib_wr->wr_id);
+                set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX,
+                                        u64temp);
+                total_payload_length = 0;
+                for (sge_index=0; sge_index < ib_wr->num_sge; sge_index++) {
+                        set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_RQ_WQE_FRAG0_LOW_IDX+(sge_index*4),
+                                        ib_wr->sg_list[sge_index].addr);
+                        set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_RQ_WQE_LENGTH0_IDX+(sge_index*4),
+                                        ib_wr->sg_list[sge_index].length);
+                        set_wqe_32bit_value(wqe->wqe_words,NES_IWARP_RQ_WQE_STAG0_IDX+(sge_index*4),
+                                        ib_wr->sg_list[sge_index].lkey);
+
+                        total_payload_length += ib_wr->sg_list[sge_index].length;
+                }
+                set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_RQ_WQE_TOTAL_PAYLOAD_IDX,
+                                        total_payload_length);
+
+                ib_wr = ib_wr->next;
+                head++;
+                wqe_count++;
+                if (head >= qsize)
+                        head = 0;
+        }
+
+        nesqp->hwqp.rq_head = head;
+        barrier();
+        while (wqe_count) {
+                counter = min(wqe_count, ((u32)255));
+                wqe_count -= counter;
+                nes_write32(nesdev->regs+NES_WQE_ALLOC, (counter<<24) | nesqp->hwqp.qp_id);
+        }
+
+                spin_unlock_irqrestore(&nesqp->lock, flags);
+
+        if (err)
+                *bad_wr = ib_wr;
+        return err;
+}
+
+
+/**
+ * nes_poll_cq
+ */
+static int nes_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *entry)
+{
+        u64 u64temp;
+        u64 wrid;
+        /* u64 u64temp; */
+        unsigned long flags = 0;
+        struct nes_vnic *nesvnic = to_nesvnic(ibcq->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_cq *nescq = to_nescq(ibcq);
+        struct nes_qp *nesqp;
+        struct nes_hw_cqe cqe;
+        u32 head;
+        u32 wq_tail;
+        u32 cq_size;
+        u32 cqe_count = 0;
+        u32 wqe_index;
+        u32 u32temp;
+        /* u32 counter; */
+
+        nes_debug(NES_DBG_CQ, "\n");
+
+                spin_lock_irqsave(&nescq->lock, flags);
+
+        head = nescq->hw_cq.cq_head;
+        cq_size = nescq->hw_cq.cq_size;
+
+        while (cqe_count < num_entries) {
+                if (le32_to_cpu(nescq->hw_cq.cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX]) &
+                                NES_CQE_VALID) {
+                        cqe = nescq->hw_cq.cq_vbase[head];
+                        nescq->hw_cq.cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX] = 0;
+                        u32temp = le32_to_cpu(cqe.cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX]);
+                        wqe_index = u32temp &
+                                        (nesdev->nesadapter->max_qp_wr - 1);
+                        u32temp &= ~(NES_SW_CONTEXT_ALIGN-1);
+                        /* parse CQE, get completion context from WQE (either rq or sq */
+                        u64temp = (((u64)(le32_to_cpu(cqe.cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX])))<<32) |
+                                        ((u64)u32temp);
+                        nesqp = *((struct nes_qp **)&u64temp);
+                        memset(entry, 0, sizeof *entry);
+                        if (cqe.cqe_words[NES_CQE_ERROR_CODE_IDX] == 0) {
+                                entry->status = IB_WC_SUCCESS;
+                        } else {
+                                entry->status = IB_WC_WR_FLUSH_ERR;
+                        }
+
+                        entry->qp = &nesqp->ibqp;
+                        entry->src_qp = nesqp->hwqp.qp_id;
+
+                        if (le32_to_cpu(cqe.cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_SQ) {
+                                if (nesqp->skip_lsmm) {
+                                        nesqp->skip_lsmm = 0;
+                                        wq_tail = nesqp->hwqp.sq_tail++;
+                                }
+
+                                /* Working on a SQ Completion*/
+                                wq_tail = wqe_index;
+                                nesqp->hwqp.sq_tail = (wqe_index+1)&(nesqp->hwqp.sq_size - 1);
+                                wrid = (((u64)(cpu_to_le32((u32)nesqp->hwqp.sq_vbase[wq_tail].
+                                                wqe_words[NES_IWARP_SQ_WQE_COMP_SCRATCH_HIGH_IDX]))) << 32) |
+                                                ((u64)(cpu_to_le32((u32)nesqp->hwqp.sq_vbase[wq_tail].
+                                                wqe_words[NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX])));
+                                entry->byte_len = le32_to_cpu(nesqp->hwqp.sq_vbase[wq_tail].
+                                                wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX]);
+
+                                switch (le32_to_cpu(nesqp->hwqp.sq_vbase[wq_tail].
+                                                wqe_words[NES_IWARP_SQ_WQE_MISC_IDX]) & 0x3f) {
+                                        case NES_IWARP_SQ_OP_RDMAW:
+                                                nes_debug(NES_DBG_CQ, "Operation = RDMA WRITE.\n");
+                                                entry->opcode = IB_WC_RDMA_WRITE;
+                                                break;
+                                        case NES_IWARP_SQ_OP_RDMAR:
+                                                nes_debug(NES_DBG_CQ, "Operation = RDMA READ.\n");
+                                                entry->opcode = IB_WC_RDMA_READ;
+                                                entry->byte_len = le32_to_cpu(nesqp->hwqp.sq_vbase[wq_tail].
+                                                                wqe_words[NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX]);
+                                                break;
+                                        case NES_IWARP_SQ_OP_SENDINV:
+                                        case NES_IWARP_SQ_OP_SENDSEINV:
+                                        case NES_IWARP_SQ_OP_SEND:
+                                        case NES_IWARP_SQ_OP_SENDSE:
+                                                nes_debug(NES_DBG_CQ, "Operation = Send.\n");
+                                                entry->opcode = IB_WC_SEND;
+                                                break;
+                                }
+                        } else {
+                                /* Working on a RQ Completion*/
+                                wq_tail = wqe_index;
+                                        nesqp->hwqp.rq_tail = (wqe_index+1)&(nesqp->hwqp.rq_size - 1);
+                                entry->byte_len = le32_to_cpu(cqe.cqe_words[NES_CQE_PAYLOAD_LENGTH_IDX]);
+                                wrid = ((u64)(le32_to_cpu(nesqp->hwqp.rq_vbase[wq_tail].wqe_words[NES_IWARP_RQ_WQE_COMP_SCRATCH_LOW_IDX]))) |
+                                        ((u64)(le32_to_cpu(nesqp->hwqp.rq_vbase[wq_tail].wqe_words[NES_IWARP_RQ_WQE_COMP_SCRATCH_HIGH_IDX]))<<32);
+                                        entry->opcode = IB_WC_RECV;
+                        }
+                        entry->wr_id = wrid;
+
+                        if (++head >= cq_size)
+                                head = 0;
+                        cqe_count++;
+                        nescq->polled_completions++;
+                        if ((nescq->polled_completions > (cq_size / 2)) ||
+                                        (nescq->polled_completions == 255)) {
+                                nes_debug(NES_DBG_CQ, "CQ%u Issuing CQE Allocate since more than half of cqes"
+                                                " are pending %u of %u.\n",
+                                                nescq->hw_cq.cq_number, nescq->polled_completions, cq_size);
+                                nes_write32(nesdev->regs+NES_CQE_ALLOC,
+                                                nescq->hw_cq.cq_number | (nescq->polled_completions << 16));
+                                nescq->polled_completions = 0;
+                        }
+                        entry++;
+                } else
+                        break;
+        }
+
+        if (nescq->polled_completions) {
+                nes_write32(nesdev->regs+NES_CQE_ALLOC,
+                                nescq->hw_cq.cq_number | (nescq->polled_completions << 16));
+                nescq->polled_completions = 0;
+        }
+
+        nescq->hw_cq.cq_head = head;
+        nes_debug(NES_DBG_CQ, "Reporting %u completions for CQ%u.\n",
+                        cqe_count, nescq->hw_cq.cq_number);
+
+                spin_unlock_irqrestore(&nescq->lock, flags);
+
+        return cqe_count;
+}
+
+
+/**
+ * nes_req_notify_cq
+ */
+static int nes_req_notify_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags notify_flags)
+                {
+        struct nes_vnic *nesvnic = to_nesvnic(ibcq->device);
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_cq *nescq = to_nescq(ibcq);
+        u32 cq_arm;
+
+        nes_debug(NES_DBG_CQ, "Requesting notification for CQ%u.\n",
+                        nescq->hw_cq.cq_number);
+
+        cq_arm = nescq->hw_cq.cq_number;
+        if ((notify_flags & IB_CQ_SOLICITED_MASK) == IB_CQ_NEXT_COMP)
+                cq_arm |= NES_CQE_ALLOC_NOTIFY_NEXT;
+        else if ((notify_flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED)
+                cq_arm |= NES_CQE_ALLOC_NOTIFY_SE;
+        else
+                return -EINVAL;
+
+        nes_write32(nesdev->regs+NES_CQE_ALLOC, cq_arm);
+        nes_read32(nesdev->regs+NES_CQE_ALLOC);
+
+        return 0;
+}
+
+
+/**
+ * nes_init_ofa_device
+ */
+struct nes_ib_device *nes_init_ofa_device(struct net_device *netdev)
+{
+        struct nes_ib_device *nesibdev;
+        struct nes_vnic *nesvnic = netdev_priv(netdev);
+        struct nes_device *nesdev = nesvnic->nesdev;
+
+        nesibdev = (struct nes_ib_device *)ib_alloc_device(sizeof(struct nes_ib_device));
+        if (nesibdev == NULL) {
+                return NULL;
+        }
+        strlcpy(nesibdev->ibdev.name, "nes%d", IB_DEVICE_NAME_MAX);
+        nesibdev->ibdev.owner = THIS_MODULE;
+
+        nesibdev->ibdev.node_type = RDMA_NODE_RNIC;
+        memset(&nesibdev->ibdev.node_guid, 0, sizeof(nesibdev->ibdev.node_guid));
+        memcpy(&nesibdev->ibdev.node_guid, netdev->dev_addr, 6);
+
+        nesibdev->ibdev.uverbs_cmd_mask =
+                        (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
+                        (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
+                        (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
+                        (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
+                        (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
+                        (1ull << IB_USER_VERBS_CMD_REG_MR) |
+                        (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
+                        (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
+                        (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
+                        (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
+                        (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
+                        (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
+                        (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
+                        (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
+                        (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
+                        (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
+                        (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
+                        (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
+                        (1ull << IB_USER_VERBS_CMD_BIND_MW) |
+                        (1ull << IB_USER_VERBS_CMD_DEALLOC_MW) |
+                        (1ull << IB_USER_VERBS_CMD_POST_RECV) |
+                        (1ull << IB_USER_VERBS_CMD_POST_SEND);
+
+        nesibdev->ibdev.phys_port_cnt = 1;
+        nesibdev->ibdev.num_comp_vectors = 1;
+        nesibdev->ibdev.dma_device = &nesdev->pcidev->dev;
+        nesibdev->ibdev.class_dev.dev = &nesdev->pcidev->dev;
+        nesibdev->ibdev.query_device = nes_query_device;
+        nesibdev->ibdev.query_port = nes_query_port;
+        nesibdev->ibdev.modify_port = nes_modify_port;
+        nesibdev->ibdev.query_pkey = nes_query_pkey;
+        nesibdev->ibdev.query_gid = nes_query_gid;
+        nesibdev->ibdev.alloc_ucontext = nes_alloc_ucontext;
+        nesibdev->ibdev.dealloc_ucontext = nes_dealloc_ucontext;
+        nesibdev->ibdev.mmap = nes_mmap;
+        nesibdev->ibdev.alloc_pd = nes_alloc_pd;
+        nesibdev->ibdev.dealloc_pd = nes_dealloc_pd;
+        nesibdev->ibdev.create_ah = nes_create_ah;
+        nesibdev->ibdev.destroy_ah = nes_destroy_ah;
+        nesibdev->ibdev.create_qp = nes_create_qp;
+        nesibdev->ibdev.modify_qp = nes_modify_qp;
+        nesibdev->ibdev.query_qp = nes_query_qp;
+        nesibdev->ibdev.destroy_qp = nes_destroy_qp;
+        nesibdev->ibdev.create_cq = nes_create_cq;
+        nesibdev->ibdev.destroy_cq = nes_destroy_cq;
+        nesibdev->ibdev.poll_cq = nes_poll_cq;
+        nesibdev->ibdev.get_dma_mr = nes_get_dma_mr;
+        nesibdev->ibdev.reg_phys_mr = nes_reg_phys_mr;
+        nesibdev->ibdev.reg_user_mr = nes_reg_user_mr;
+        nesibdev->ibdev.dereg_mr = nes_dereg_mr;
+        nesibdev->ibdev.alloc_mw = nes_alloc_mw;
+        nesibdev->ibdev.dealloc_mw = nes_dealloc_mw;
+        nesibdev->ibdev.bind_mw = nes_bind_mw;
+
+        nesibdev->ibdev.alloc_fmr = nes_alloc_fmr;
+        nesibdev->ibdev.unmap_fmr = nes_unmap_fmr;
+        nesibdev->ibdev.dealloc_fmr = nes_dealloc_fmr;
+        nesibdev->ibdev.map_phys_fmr = nes_map_phys_fmr;
+
+        nesibdev->ibdev.attach_mcast = nes_multicast_attach;
+        nesibdev->ibdev.detach_mcast = nes_multicast_detach;
+        nesibdev->ibdev.process_mad = nes_process_mad;
+
+        nesibdev->ibdev.req_notify_cq = nes_req_notify_cq;
+        nesibdev->ibdev.post_send = nes_post_send;
+        nesibdev->ibdev.post_recv = nes_post_recv;
+
+        nesibdev->ibdev.iwcm = kzalloc(sizeof(*nesibdev->ibdev.iwcm), GFP_KERNEL);
+        if (nesibdev->ibdev.iwcm == NULL) {
+                ib_dealloc_device(&nesibdev->ibdev);
+                return NULL;
+        }
+        nesibdev->ibdev.iwcm->add_ref = nes_add_ref;
+        nesibdev->ibdev.iwcm->rem_ref = nes_rem_ref;
+        nesibdev->ibdev.iwcm->get_qp = nes_get_qp;
+        nesibdev->ibdev.iwcm->connect = nes_connect;
+        nesibdev->ibdev.iwcm->accept = nes_accept;
+        nesibdev->ibdev.iwcm->reject = nes_reject;
+        nesibdev->ibdev.iwcm->create_listen = nes_create_listen;
+        nesibdev->ibdev.iwcm->destroy_listen = nes_destroy_listen;
+
+        return nesibdev;
+}
+
+
+/**
+ * nes_destroy_ofa_device
+ */
+void nes_destroy_ofa_device(struct nes_ib_device *nesibdev)
+{
+        if (nesibdev == NULL)
+                return;
+
+        nes_unregister_ofa_device(nesibdev);
+
+        kfree(nesibdev->ibdev.iwcm);
+        ib_dealloc_device(&nesibdev->ibdev);
+}
+
+
+/**
+ * nes_register_ofa_device
+ */
+int nes_register_ofa_device(struct nes_ib_device *nesibdev)
+{
+        struct nes_vnic *nesvnic = nesibdev->nesvnic;
+        struct nes_device *nesdev = nesvnic->nesdev;
+        struct nes_adapter *nesadapter = nesdev->nesadapter;
+        int i, ret;
+
+        ret = ib_register_device(&nesvnic->nesibdev->ibdev);
+        if (ret) {
+                return ret;
+        }
+
+        /* Get the resources allocated to this device */
+        nesibdev->max_cq = (nesadapter->max_cq-NES_FIRST_QPN) / nesadapter->port_count;
+        nesibdev->max_mr = nesadapter->max_mr / nesadapter->port_count;
+        nesibdev->max_qp = (nesadapter->max_qp-NES_FIRST_QPN) / nesadapter->port_count;
+        nesibdev->max_pd = nesadapter->max_pd / nesadapter->port_count;
+
+        for (i = 0; i < ARRAY_SIZE(nes_class_attributes); ++i) {
+                ret = class_device_create_file(&nesibdev->ibdev.class_dev, nes_class_attributes[i]);
+                if (ret) {
+                        while (i > 0) {
+                                i--;
+                                class_device_remove_file(&nesibdev->ibdev.class_dev,
+                                                nes_class_attributes[i]);
+                        }
+                        ib_unregister_device(&nesibdev->ibdev);
+                        return ret;
+                }
+        }
+
+        nesvnic->of_device_registered = 1;
+
+        return 0;
+}
+
+
+/**
+ * nes_unregister_ofa_device
+ */
+void nes_unregister_ofa_device(struct nes_ib_device *nesibdev)
+{
+        struct nes_vnic *nesvnic = nesibdev->nesvnic;
+        int i;
+
+        if (nesibdev == NULL)
+                return;
+
+        for (i = 0; i < ARRAY_SIZE(nes_class_attributes); ++i) {
+                class_device_remove_file(&nesibdev->ibdev.class_dev, nes_class_attributes[i]);
+        }
+
+        if (nesvnic->of_device_registered) {
+                ib_unregister_device(&nesibdev->ibdev);
+        }
+
+        nesvnic->of_device_registered = 0;
+}
diff --git a/drivers/infiniband/hw/nes/nes_verbs.h b/drivers/infiniband/hw/nes/nes_verbs.h
new file mode 100644
index 000000000000..6c6b4da5184f
--- /dev/null
+++ b/drivers/infiniband/hw/nes/nes_verbs.h
@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
+ * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ */
+
+#ifndef NES_VERBS_H
+#define NES_VERBS_H
+
+struct nes_device;
+
+#define NES_MAX_USER_DB_REGIONS  4096
+#define NES_MAX_USER_WQ_REGIONS  4096
+
+struct nes_ucontext {
+        struct ib_ucontext ibucontext;
+        struct nes_device  *nesdev;
+        unsigned long      mmap_wq_offset;
+        unsigned long      mmap_cq_offset; /* to be removed */
+        int                index;               /* rnic index (minor) */
+        unsigned long      allocated_doorbells[BITS_TO_LONGS(NES_MAX_USER_DB_REGIONS)];
+        u16                mmap_db_index[NES_MAX_USER_DB_REGIONS];
+        u16                first_free_db;
+        unsigned long      allocated_wqs[BITS_TO_LONGS(NES_MAX_USER_WQ_REGIONS)];
+        struct nes_qp      *mmap_nesqp[NES_MAX_USER_WQ_REGIONS];
+        u16                first_free_wq;
+        struct list_head   cq_reg_mem_list;
+        struct list_head   qp_reg_mem_list;
+        u32                mcrqf;
+        atomic_t           usecnt;
+};
+
+struct nes_pd {
+        struct ib_pd ibpd;
+        u16          pd_id;
+        atomic_t     sqp_count;
+        u16          mmap_db_index;
+};
+
+struct nes_mr {
+        union {
+                struct ib_mr  ibmr;
+                struct ib_mw  ibmw;
+                struct ib_fmr ibfmr;
+        };
+        struct ib_umem    *region;
+        u16               pbls_used;
+        u8                mode;
+        u8                pbl_4k;
+};
+
+struct nes_hw_pb {
+        __le32 pa_low;
+        __le32 pa_high;
+};
+
+struct nes_vpbl {
+        dma_addr_t       pbl_pbase;
+        struct nes_hw_pb *pbl_vbase;
+};
+
+struct nes_root_vpbl {
+        dma_addr_t       pbl_pbase;
+        struct nes_hw_pb *pbl_vbase;
+        struct nes_vpbl  *leaf_vpbl;
+};
+
+struct nes_fmr {
+        struct nes_mr        nesmr;
+        u32                  leaf_pbl_cnt;
+        struct nes_root_vpbl root_vpbl;
+        struct ib_qp         *ib_qp;
+        int                  access_rights;
+        struct ib_fmr_attr   attr;
+};
+
+struct nes_av;
+
+struct nes_cq {
+        struct ib_cq     ibcq;
+        struct nes_hw_cq hw_cq;
+        u32              polled_completions;
+        u32              cq_mem_size;
+        spinlock_t       lock;
+        u8               virtual_cq;
+        u8               pad[3];
+};
+
+struct nes_wq {
+        spinlock_t lock;
+};
+
+struct iw_cm_id;
+struct ietf_mpa_frame;
+
+struct nes_qp {
+        struct ib_qp          ibqp;
+        void                  *allocated_buffer;
+        struct iw_cm_id       *cm_id;
+        struct workqueue_struct *wq;
+        struct work_struct    disconn_work;
+        struct nes_cq         *nesscq;
+        struct nes_cq         *nesrcq;
+        struct nes_pd         *nespd;
+        void *cm_node; /* handle of the node this QP is associated with */
+        struct ietf_mpa_frame *ietf_frame;
+        dma_addr_t            ietf_frame_pbase;
+        wait_queue_head_t     state_waitq;
+        unsigned long         socket;
+        struct nes_hw_qp      hwqp;
+        struct work_struct    work;
+        struct work_struct    ae_work;
+        enum ib_qp_state      ibqp_state;
+        u32                   iwarp_state;
+        u32                   hte_index;
+        u32                   last_aeq;
+        u32                   qp_mem_size;
+        atomic_t              refcount;
+        atomic_t              close_timer_started;
+        u32                   mmap_sq_db_index;
+        u32                   mmap_rq_db_index;
+        spinlock_t            lock;
+        struct nes_qp_context *nesqp_context;
+        dma_addr_t            nesqp_context_pbase;
+        void                  *pbl_vbase;
+        dma_addr_t            pbl_pbase;
+        struct page           *page;
+        wait_queue_head_t     kick_waitq;
+        u16                   in_disconnect;
+        u16                   private_data_len;
+        u8                    active_conn;
+        u8                    skip_lsmm;
+        u8                    user_mode;
+        u8                    hte_added;
+        u8                    hw_iwarp_state;
+        u8                    flush_issued;
+        u8                    hw_tcp_state;
+        u8                    disconn_pending;
+        u8                    destroyed;
+};
+#endif                  /* NES_VERBS_H */
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c
index a082466f4a83..09f5371137a1 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -680,12 +680,7 @@ static int ipoib_start_xmit(struct sk_buff *skb, struct net_device *dev)
 
                 neigh = *to_ipoib_neigh(skb->dst->neighbour);
 
-                if (ipoib_cm_get(neigh)) {
-                        if (ipoib_cm_up(neigh)) {
-                                ipoib_cm_send(dev, skb, ipoib_cm_get(neigh));
-                                goto out;
-                        }
-                } else if (neigh->ah) {
+                if (neigh->ah)
                         if (unlikely((memcmp(&neigh->dgid.raw,
                                             skb->dst->neighbour->ha + 4,
                                             sizeof(union ib_gid))) ||
@@ -706,6 +701,12 @@ static int ipoib_start_xmit(struct sk_buff *skb, struct net_device *dev)
                                 goto out;
                         }
 
+                if (ipoib_cm_get(neigh)) {
+                        if (ipoib_cm_up(neigh)) {
+                                ipoib_cm_send(dev, skb, ipoib_cm_get(neigh));
+                                goto out;
+                        }
+                } else if (neigh->ah) {
                         ipoib_send(dev, skb, neigh->ah, IPOIB_QPN(skb->dst->neighbour->ha));
                         goto out;
                 }
@@ -813,11 +814,9 @@ static void ipoib_neigh_cleanup(struct neighbour *n)
         struct ipoib_ah *ah = NULL;
 
         neigh = *to_ipoib_neigh(n);
-        if (neigh) {
+        if (neigh)
                 priv = netdev_priv(neigh->dev);
-                ipoib_dbg(priv, "neigh_destructor for bonding device: %s\n",
-                          n->dev->name);
-        } else
+        else
                 return;
         ipoib_dbg(priv,
                   "neigh_cleanup for %06x " IPOIB_GID_FMT "\n",
diff --git a/drivers/infiniband/ulp/srp/ib_srp.c b/drivers/infiniband/ulp/srp/ib_srp.c
index 195ce7c12319..fd4a49fc4773 100644
--- a/drivers/infiniband/ulp/srp/ib_srp.c
+++ b/drivers/infiniband/ulp/srp/ib_srp.c
@@ -204,6 +204,22 @@ out:
         return ret;
 }
 
+static int srp_new_cm_id(struct srp_target_port *target)
+{
+        struct ib_cm_id *new_cm_id;
+
+        new_cm_id = ib_create_cm_id(target->srp_host->dev->dev,
+                                    srp_cm_handler, target);
+        if (IS_ERR(new_cm_id))
+                return PTR_ERR(new_cm_id);
+
+        if (target->cm_id)
+                ib_destroy_cm_id(target->cm_id);
+        target->cm_id = new_cm_id;
+
+        return 0;
+}
+
 static int srp_create_target_ib(struct srp_target_port *target)
 {
         struct ib_qp_init_attr *init_attr;
@@ -436,6 +452,7 @@ static void srp_remove_work(struct work_struct *work)
 
 static int srp_connect_target(struct srp_target_port *target)
 {
+        int retries = 3;
         int ret;
 
         ret = srp_lookup_path(target);
@@ -468,6 +485,21 @@ static int srp_connect_target(struct srp_target_port *target)
                 case SRP_DLID_REDIRECT:
                         break;
 
+                case SRP_STALE_CONN:
+                        /* Our current CM id was stale, and is now in timewait.
+                         * Try to reconnect with a new one.
+                         */
+                        if (!retries-- || srp_new_cm_id(target)) {
+                                shost_printk(KERN_ERR, target->scsi_host, PFX
+                                             "giving up on stale connection\n");
+                                target->status = -ECONNRESET;
+                                return target->status;
+                        }
+
+                        shost_printk(KERN_ERR, target->scsi_host, PFX
+                                     "retrying stale connection\n");
+                        break;
+
                 default:
                         return target->status;
                 }
@@ -507,7 +539,6 @@ static void srp_reset_req(struct srp_target_port *target, struct srp_request *re
 
 static int srp_reconnect_target(struct srp_target_port *target)
 {
-        struct ib_cm_id *new_cm_id;
         struct ib_qp_attr qp_attr;
         struct srp_request *req, *tmp;
         struct ib_wc wc;
@@ -526,14 +557,9 @@ static int srp_reconnect_target(struct srp_target_port *target)
          * Now get a new local CM ID so that we avoid confusing the
          * target in case things are really fouled up.
          */
-        new_cm_id = ib_create_cm_id(target->srp_host->dev->dev,
-                                    srp_cm_handler, target);
-        if (IS_ERR(new_cm_id)) {
-                ret = PTR_ERR(new_cm_id);
+        ret = srp_new_cm_id(target);
+        if (ret)
                 goto err;
-        }
-        ib_destroy_cm_id(target->cm_id);
-        target->cm_id = new_cm_id;
 
         qp_attr.qp_state = IB_QPS_RESET;
         ret = ib_modify_qp(target->qp, &qp_attr, IB_QP_STATE);
@@ -1171,6 +1197,11 @@ static void srp_cm_rej_handler(struct ib_cm_id *cm_id,
                 target->status = -ECONNRESET;
                 break;
 
+        case IB_CM_REJ_STALE_CONN:
+                shost_printk(KERN_WARNING, shost, "  REJ reason: stale connection\n");
+                target->status = SRP_STALE_CONN;
+                break;
+
         default:
                 shost_printk(KERN_WARNING, shost, "  REJ reason 0x%x\n",
                              event->param.rej_rcvd.reason);
@@ -1862,11 +1893,9 @@ static ssize_t srp_create_target(struct class_device *class_dev,
         if (ret)
                 goto err;
 
-        target->cm_id = ib_create_cm_id(host->dev->dev, srp_cm_handler, target);
-        if (IS_ERR(target->cm_id)) {
-                ret = PTR_ERR(target->cm_id);
+        ret = srp_new_cm_id(target);
+        if (ret)
                 goto err_free;
-        }
 
         target->qp_in_error = 0;
         ret = srp_connect_target(target);
diff --git a/drivers/infiniband/ulp/srp/ib_srp.h b/drivers/infiniband/ulp/srp/ib_srp.h
index 4a3c1f37e4c2..cb6eb816024a 100644
--- a/drivers/infiniband/ulp/srp/ib_srp.h
+++ b/drivers/infiniband/ulp/srp/ib_srp.h
@@ -54,6 +54,7 @@ enum {
 
         SRP_PORT_REDIRECT       = 1,
         SRP_DLID_REDIRECT       = 2,
+        SRP_STALE_CONN          = 3,
 
         SRP_MAX_LUN             = 512,
         SRP_DEF_SG_TABLESIZE    = 12,
diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c
index 64c66b3769c9..4a938780dfc3 100644
--- a/drivers/leds/led-class.c
+++ b/drivers/leds/led-class.c
@@ -137,12 +137,14 @@ err_out:
 EXPORT_SYMBOL_GPL(led_classdev_register);
 
 /**
- * led_classdev_unregister - unregisters a object of led_properties class.
+ * __led_classdev_unregister - unregisters a object of led_properties class.
  * @led_cdev: the led device to unregister
+ * @suspended: indicates whether system-wide suspend or resume is in progress
  *
  * Unregisters a previously registered via led_classdev_register object.
  */
-void led_classdev_unregister(struct led_classdev *led_cdev)
+void __led_classdev_unregister(struct led_classdev *led_cdev,
+                                      bool suspended)
 {
         device_remove_file(led_cdev->dev, &dev_attr_brightness);
 #ifdef CONFIG_LEDS_TRIGGERS
@@ -153,13 +155,16 @@ void led_classdev_unregister(struct led_classdev *led_cdev)
         up_write(&led_cdev->trigger_lock);
 #endif
 
-        device_unregister(led_cdev->dev);
+        if (suspended)
+                device_pm_schedule_removal(led_cdev->dev);
+        else
+                device_unregister(led_cdev->dev);
 
         down_write(&leds_list_lock);
         list_del(&led_cdev->node);
         up_write(&leds_list_lock);
 }
-EXPORT_SYMBOL_GPL(led_classdev_unregister);
+EXPORT_SYMBOL_GPL(__led_classdev_unregister);
 
 static int __init leds_init(void)
 {
diff --git a/drivers/macintosh/via-macii.c b/drivers/macintosh/via-macii.c
index 01b8eca7ccd5..6e6dd17ab572 100644
--- a/drivers/macintosh/via-macii.c
+++ b/drivers/macintosh/via-macii.c
@@ -111,7 +111,7 @@ static enum macii_state {
 static struct adb_request *current_req; /* first request struct in the queue */
 static struct adb_request *last_req;     /* last request struct in the queue */
 static unsigned char reply_buf[16];        /* storage for autopolled replies */
-static unsigned char *reply_ptr;      /* next byte in req->data or reply_buf */
+static unsigned char *reply_ptr;     /* next byte in reply_buf or req->reply */
 static int reading_reply;        /* store reply in reply_buf else req->reply */
 static int data_index;      /* index of the next byte to send from req->data */
 static int reply_len; /* number of bytes received in reply_buf or req->reply */
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index f234ba3f0404..7d170cd381c3 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -920,8 +920,7 @@ config ENC28J60
         ---help---
           Support for the Microchip EN28J60 ethernet chip.
 
-          To compile this driver as a module, choose M here and read
-          <file:Documentation/networking/net-modules.txt>.  The module will be
+          To compile this driver as a module, choose M here. The module will be
           called enc28j60.
 
 config ENC28J60_WRITEVERIFY
@@ -2041,8 +2040,7 @@ config IGB
          More specific information on configuring the driver is in
          <file:Documentation/networking/e1000.txt>.
 
-         To compile this driver as a module, choose M here and read
-         <file:Documentation/networking/net-modules.txt>.  The module
+         To compile this driver as a module, choose M here. The module
          will be called igb.
 
 source "drivers/net/ixp2000/Kconfig"
diff --git a/drivers/net/cxgb3/cxgb3_offload.c b/drivers/net/cxgb3/cxgb3_offload.c
index d48c396bdabb..901c824bfe6d 100644
--- a/drivers/net/cxgb3/cxgb3_offload.c
+++ b/drivers/net/cxgb3/cxgb3_offload.c
@@ -1070,9 +1070,7 @@ void *cxgb_alloc_mem(unsigned long size)
  */
 void cxgb_free_mem(void *addr)
 {
-        unsigned long p = (unsigned long)addr;
-
-        if (p >= VMALLOC_START && p < VMALLOC_END)
+        if (is_vmalloc_addr(addr))
                 vfree(addr);
         else
                 kfree(addr);
diff --git a/drivers/net/hamradio/dmascc.c b/drivers/net/hamradio/dmascc.c
index 11b83dae00ac..e04bf9926441 100644
--- a/drivers/net/hamradio/dmascc.c
+++ b/drivers/net/hamradio/dmascc.c
@@ -262,8 +262,8 @@ static void tm_isr(struct scc_priv *priv);
 
 static int io[MAX_NUM_DEVS] __initdata = { 0, };
 
-/* Beware! hw[] is also used in cleanup_module(). */
-static struct scc_hardware hw[NUM_TYPES] __initdata_or_module = HARDWARE;
+/* Beware! hw[] is also used in dmascc_exit(). */
+static struct scc_hardware hw[NUM_TYPES] = HARDWARE;
 
 
 /* Global variables */
diff --git a/drivers/net/mlx4/fw.c b/drivers/net/mlx4/fw.c
index 535a4461d88c..61dc4951d6b0 100644
--- a/drivers/net/mlx4/fw.c
+++ b/drivers/net/mlx4/fw.c
@@ -617,9 +617,6 @@ int mlx4_QUERY_ADAPTER(struct mlx4_dev *dev, struct mlx4_adapter *adapter)
         int err;
 
 #define QUERY_ADAPTER_OUT_SIZE             0x100
-#define QUERY_ADAPTER_VENDOR_ID_OFFSET     0x00
-#define QUERY_ADAPTER_DEVICE_ID_OFFSET     0x04
-#define QUERY_ADAPTER_REVISION_ID_OFFSET   0x08
 #define QUERY_ADAPTER_INTA_PIN_OFFSET      0x10
 #define QUERY_ADAPTER_VSD_OFFSET           0x20
 
@@ -633,9 +630,6 @@ int mlx4_QUERY_ADAPTER(struct mlx4_dev *dev, struct mlx4_adapter *adapter)
         if (err)
                 goto out;
 
-        MLX4_GET(adapter->vendor_id, outbox,   QUERY_ADAPTER_VENDOR_ID_OFFSET);
-        MLX4_GET(adapter->device_id, outbox,   QUERY_ADAPTER_DEVICE_ID_OFFSET);
-        MLX4_GET(adapter->revision_id, outbox, QUERY_ADAPTER_REVISION_ID_OFFSET);
         MLX4_GET(adapter->inta_pin, outbox,    QUERY_ADAPTER_INTA_PIN_OFFSET);
 
         get_board_id(outbox + QUERY_ADAPTER_VSD_OFFSET / 4,
diff --git a/drivers/net/mlx4/fw.h b/drivers/net/mlx4/fw.h
index 7e1dd9e25cfb..e16dec890413 100644
--- a/drivers/net/mlx4/fw.h
+++ b/drivers/net/mlx4/fw.h
@@ -99,9 +99,6 @@ struct mlx4_dev_cap {
 };
 
 struct mlx4_adapter {
-        u32  vendor_id;
-        u32  device_id;
-        u32  revision_id;
         char board_id[MLX4_BOARD_ID_LEN];
         u8   inta_pin;
 };
diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c
index 89b3f0b7cdc0..08bfc130a33e 100644
--- a/drivers/net/mlx4/main.c
+++ b/drivers/net/mlx4/main.c
@@ -71,7 +71,7 @@ MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
 
 #endif /* CONFIG_PCI_MSI */
 
-static const char mlx4_version[] __devinitdata =
+static char mlx4_version[] __devinitdata =
         DRV_NAME ": Mellanox ConnectX core driver v"
         DRV_VERSION " (" DRV_RELDATE ")\n";
 
@@ -163,7 +163,7 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
         return 0;
 }
 
-static int __devinit mlx4_load_fw(struct mlx4_dev *dev)
+static int mlx4_load_fw(struct mlx4_dev *dev)
 {
         struct mlx4_priv *priv = mlx4_priv(dev);
         int err;
@@ -197,8 +197,8 @@ err_free:
         return err;
 }
 
-static int __devinit mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
-                                          int cmpt_entry_sz)
+static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
+                                int cmpt_entry_sz)
 {
         struct mlx4_priv *priv = mlx4_priv(dev);
         int err;
@@ -534,7 +534,6 @@ static int mlx4_init_hca(struct mlx4_dev *dev)
         }
 
         priv->eq_table.inta_pin = adapter.inta_pin;
-        dev->rev_id             = adapter.revision_id;
         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
 
         return 0;
@@ -688,7 +687,7 @@ err_uar_table_free:
         return err;
 }
 
-static void __devinit mlx4_enable_msi_x(struct mlx4_dev *dev)
+static void mlx4_enable_msi_x(struct mlx4_dev *dev)
 {
         struct mlx4_priv *priv = mlx4_priv(dev);
         struct msix_entry entries[MLX4_NUM_EQ];
diff --git a/drivers/net/mlx4/mr.c b/drivers/net/mlx4/mr.c
index 0c05a10bae3b..9c9e308d0917 100644
--- a/drivers/net/mlx4/mr.c
+++ b/drivers/net/mlx4/mr.c
@@ -122,7 +122,7 @@ static void mlx4_buddy_free(struct mlx4_buddy *buddy, u32 seg, int order)
         spin_unlock(&buddy->lock);
 }
 
-static int __devinit mlx4_buddy_init(struct mlx4_buddy *buddy, int max_order)
+static int mlx4_buddy_init(struct mlx4_buddy *buddy, int max_order)
 {
         int i, s;
 
diff --git a/drivers/net/pcmcia/3c574_cs.c b/drivers/net/pcmcia/3c574_cs.c
index 36a7ba3134ce..3b78a3819bb3 100644
--- a/drivers/net/pcmcia/3c574_cs.c
+++ b/drivers/net/pcmcia/3c574_cs.c
@@ -230,10 +230,11 @@ static char mii_preamble_required = 0;
 static int tc574_config(struct pcmcia_device *link);
 static void tc574_release(struct pcmcia_device *link);
 
-static void mdio_sync(kio_addr_t ioaddr, int bits);
-static int mdio_read(kio_addr_t ioaddr, int phy_id, int location);
-static void mdio_write(kio_addr_t ioaddr, int phy_id, int location, int value);
-static unsigned short read_eeprom(kio_addr_t ioaddr, int index);
+static void mdio_sync(unsigned int ioaddr, int bits);
+static int mdio_read(unsigned int ioaddr, int phy_id, int location);
+static void mdio_write(unsigned int ioaddr, int phy_id, int location,
+                       int value);
+static unsigned short read_eeprom(unsigned int ioaddr, int index);
 static void tc574_wait_for_completion(struct net_device *dev, int cmd);
 
 static void tc574_reset(struct net_device *dev);
@@ -341,7 +342,7 @@ static int tc574_config(struct pcmcia_device *link)
         tuple_t tuple;
         __le16 buf[32];
         int last_fn, last_ret, i, j;
-        kio_addr_t ioaddr;
+        unsigned int ioaddr;
         __be16 *phys_addr;
         char *cardname;
         __u32 config;
@@ -515,7 +516,7 @@ static int tc574_resume(struct pcmcia_device *link)
 
 static void dump_status(struct net_device *dev)
 {
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         EL3WINDOW(1);
         printk(KERN_INFO "  irq status %04x, rx status %04x, tx status "
                    "%02x, tx free %04x\n", inw(ioaddr+EL3_STATUS),
@@ -544,7 +545,7 @@ static void tc574_wait_for_completion(struct net_device *dev, int cmd)
 /* Read a word from the EEPROM using the regular EEPROM access register.
    Assume that we are in register window zero.
  */
-static unsigned short read_eeprom(kio_addr_t ioaddr, int index)
+static unsigned short read_eeprom(unsigned int ioaddr, int index)
 {
         int timer;
         outw(EEPROM_Read + index, ioaddr + Wn0EepromCmd);
@@ -572,9 +573,9 @@ static unsigned short read_eeprom(kio_addr_t ioaddr, int index)
 
 /* Generate the preamble required for initial synchronization and
    a few older transceivers. */
-static void mdio_sync(kio_addr_t ioaddr, int bits)
+static void mdio_sync(unsigned int ioaddr, int bits)
 {
-        kio_addr_t mdio_addr = ioaddr + Wn4_PhysicalMgmt;
+        unsigned int mdio_addr = ioaddr + Wn4_PhysicalMgmt;
 
         /* Establish sync by sending at least 32 logic ones. */
         while (-- bits >= 0) {
@@ -583,12 +584,12 @@ static void mdio_sync(kio_addr_t ioaddr, int bits)
         }
 }
 
-static int mdio_read(kio_addr_t ioaddr, int phy_id, int location)
+static int mdio_read(unsigned int ioaddr, int phy_id, int location)
 {
         int i;
         int read_cmd = (0xf6 << 10) | (phy_id << 5) | location;
         unsigned int retval = 0;
-        kio_addr_t mdio_addr = ioaddr + Wn4_PhysicalMgmt;
+        unsigned int mdio_addr = ioaddr + Wn4_PhysicalMgmt;
 
         if (mii_preamble_required)
                 mdio_sync(ioaddr, 32);
@@ -608,10 +609,10 @@ static int mdio_read(kio_addr_t ioaddr, int phy_id, int location)
         return (retval>>1) & 0xffff;
 }
 
-static void mdio_write(kio_addr_t ioaddr, int phy_id, int location, int value)
+static void mdio_write(unsigned int ioaddr, int phy_id, int location, int value)
 {
         int write_cmd = 0x50020000 | (phy_id << 23) | (location << 18) | value;
-        kio_addr_t mdio_addr = ioaddr + Wn4_PhysicalMgmt;
+        unsigned int mdio_addr = ioaddr + Wn4_PhysicalMgmt;
         int i;
 
         if (mii_preamble_required)
@@ -637,7 +638,7 @@ static void tc574_reset(struct net_device *dev)
 {
         struct el3_private *lp = netdev_priv(dev);
         int i;
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         unsigned long flags;
 
         tc574_wait_for_completion(dev, TotalReset|0x10);
@@ -695,7 +696,7 @@ static void tc574_reset(struct net_device *dev)
         mdio_write(ioaddr, lp->phys, 4, lp->advertising);
         if (!auto_polarity) {
                 /* works for TDK 78Q2120 series MII's */
-                int i = mdio_read(ioaddr, lp->phys, 16) | 0x20;
+                i = mdio_read(ioaddr, lp->phys, 16) | 0x20;
                 mdio_write(ioaddr, lp->phys, 16, i);
         }
 
@@ -741,7 +742,7 @@ static int el3_open(struct net_device *dev)
 static void el3_tx_timeout(struct net_device *dev)
 {
         struct el3_private *lp = netdev_priv(dev);
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         
         printk(KERN_NOTICE "%s: Transmit timed out!\n", dev->name);
         dump_status(dev);
@@ -756,7 +757,7 @@ static void el3_tx_timeout(struct net_device *dev)
 static void pop_tx_status(struct net_device *dev)
 {
         struct el3_private *lp = netdev_priv(dev);
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         int i;
     
         /* Clear the Tx status stack. */
@@ -779,7 +780,7 @@ static void pop_tx_status(struct net_device *dev)
 
 static int el3_start_xmit(struct sk_buff *skb, struct net_device *dev)
 {
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         struct el3_private *lp = netdev_priv(dev);
         unsigned long flags;
 
@@ -813,7 +814,7 @@ static irqreturn_t el3_interrupt(int irq, void *dev_id)
 {
         struct net_device *dev = (struct net_device *) dev_id;
         struct el3_private *lp = netdev_priv(dev);
-        kio_addr_t ioaddr;
+        unsigned int ioaddr;
         unsigned status;
         int work_budget = max_interrupt_work;
         int handled = 0;
@@ -907,7 +908,7 @@ static void media_check(unsigned long arg)
 {
         struct net_device *dev = (struct net_device *) arg;
         struct el3_private *lp = netdev_priv(dev);
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         unsigned long flags;
         unsigned short /* cable, */ media, partner;
 
@@ -996,7 +997,7 @@ static struct net_device_stats *el3_get_stats(struct net_device *dev)
 static void update_stats(struct net_device *dev)
 {
         struct el3_private *lp = netdev_priv(dev);
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         u8 rx, tx, up;
 
         DEBUG(2, "%s: updating the statistics.\n", dev->name);
@@ -1033,7 +1034,7 @@ static void update_stats(struct net_device *dev)
 static int el3_rx(struct net_device *dev, int worklimit)
 {
         struct el3_private *lp = netdev_priv(dev);
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         short rx_status;
         
         DEBUG(3, "%s: in rx_packet(), status %4.4x, rx_status %4.4x.\n",
@@ -1094,7 +1095,7 @@ static const struct ethtool_ops netdev_ethtool_ops = {
 static int el3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 {
         struct el3_private *lp = netdev_priv(dev);
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         u16 *data = (u16 *)&rq->ifr_ifru;
         int phy = lp->phys & 0x1f;
 
@@ -1148,7 +1149,7 @@ static int el3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 
 static void set_rx_mode(struct net_device *dev)
 {
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
 
         if (dev->flags & IFF_PROMISC)
                 outw(SetRxFilter | RxStation | RxMulticast | RxBroadcast | RxProm,
@@ -1161,7 +1162,7 @@ static void set_rx_mode(struct net_device *dev)
 
 static int el3_close(struct net_device *dev)
 {
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         struct el3_private *lp = netdev_priv(dev);
         struct pcmcia_device *link = lp->p_dev;
 
diff --git a/drivers/net/pcmcia/3c589_cs.c b/drivers/net/pcmcia/3c589_cs.c
index e862d14ece79..1b1abb19c911 100644
--- a/drivers/net/pcmcia/3c589_cs.c
+++ b/drivers/net/pcmcia/3c589_cs.c
@@ -145,7 +145,7 @@ DRV_NAME ".c " DRV_VERSION " 2001/10/13 00:08:50 (David Hinds)";
 static int tc589_config(struct pcmcia_device *link);
 static void tc589_release(struct pcmcia_device *link);
 
-static u16 read_eeprom(kio_addr_t ioaddr, int index);
+static u16 read_eeprom(unsigned int ioaddr, int index);
 static void tc589_reset(struct net_device *dev);
 static void media_check(unsigned long arg);
 static int el3_config(struct net_device *dev, struct ifmap *map);
@@ -254,7 +254,7 @@ static int tc589_config(struct pcmcia_device *link)
     __le16 buf[32];
     __be16 *phys_addr;
     int last_fn, last_ret, i, j, multi = 0, fifo;
-    kio_addr_t ioaddr;
+    unsigned int ioaddr;
     char *ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
     DECLARE_MAC_BUF(mac);
     
@@ -403,7 +403,7 @@ static void tc589_wait_for_completion(struct net_device *dev, int cmd)
   Read a word from the EEPROM using the regular EEPROM access register.
   Assume that we are in register window zero.
 */
-static u16 read_eeprom(kio_addr_t ioaddr, int index)
+static u16 read_eeprom(unsigned int ioaddr, int index)
 {
     int i;
     outw(EEPROM_READ + index, ioaddr + 10);
@@ -421,7 +421,7 @@ static u16 read_eeprom(kio_addr_t ioaddr, int index)
 static void tc589_set_xcvr(struct net_device *dev, int if_port)
 {
     struct el3_private *lp = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     
     EL3WINDOW(0);
     switch (if_port) {
@@ -443,7 +443,7 @@ static void tc589_set_xcvr(struct net_device *dev, int if_port)
 
 static void dump_status(struct net_device *dev)
 {
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     EL3WINDOW(1);
     printk(KERN_INFO "  irq status %04x, rx status %04x, tx status "
            "%02x  tx free %04x\n", inw(ioaddr+EL3_STATUS),
@@ -459,7 +459,7 @@ static void dump_status(struct net_device *dev)
 /* Reset and restore all of the 3c589 registers. */
 static void tc589_reset(struct net_device *dev)
 {
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     int i;
     
     EL3WINDOW(0);
@@ -567,7 +567,7 @@ static int el3_open(struct net_device *dev)
 static void el3_tx_timeout(struct net_device *dev)
 {
     struct el3_private *lp = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     
     printk(KERN_WARNING "%s: Transmit timed out!\n", dev->name);
     dump_status(dev);
@@ -582,7 +582,7 @@ static void el3_tx_timeout(struct net_device *dev)
 static void pop_tx_status(struct net_device *dev)
 {
     struct el3_private *lp = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     int i;
     
     /* Clear the Tx status stack. */
@@ -604,7 +604,7 @@ static void pop_tx_status(struct net_device *dev)
 
 static int el3_start_xmit(struct sk_buff *skb, struct net_device *dev)
 {
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     struct el3_private *priv = netdev_priv(dev);
     unsigned long flags;
 
@@ -641,7 +641,7 @@ static irqreturn_t el3_interrupt(int irq, void *dev_id)
 {
     struct net_device *dev = (struct net_device *) dev_id;
     struct el3_private *lp = netdev_priv(dev);
-    kio_addr_t ioaddr;
+    unsigned int ioaddr;
     __u16 status;
     int i = 0, handled = 1;
     
@@ -727,7 +727,7 @@ static void media_check(unsigned long arg)
 {
     struct net_device *dev = (struct net_device *)(arg);
     struct el3_private *lp = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     u16 media, errs;
     unsigned long flags;
 
@@ -828,7 +828,7 @@ static struct net_device_stats *el3_get_stats(struct net_device *dev)
 static void update_stats(struct net_device *dev)
 {
     struct el3_private *lp = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
 
     DEBUG(2, "%s: updating the statistics.\n", dev->name);
     /* Turn off statistics updates while reading. */
@@ -855,7 +855,7 @@ static void update_stats(struct net_device *dev)
 static int el3_rx(struct net_device *dev)
 {
     struct el3_private *lp = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     int worklimit = 32;
     short rx_status;
     
@@ -909,7 +909,7 @@ static void set_multicast_list(struct net_device *dev)
 {
     struct el3_private *lp = netdev_priv(dev);
     struct pcmcia_device *link = lp->p_dev;
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     u16 opts = SetRxFilter | RxStation | RxBroadcast;
 
     if (!pcmcia_dev_present(link)) return;
@@ -924,7 +924,7 @@ static int el3_close(struct net_device *dev)
 {
     struct el3_private *lp = netdev_priv(dev);
     struct pcmcia_device *link = lp->p_dev;
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     
     DEBUG(1, "%s: shutting down ethercard.\n", dev->name);
 
diff --git a/drivers/net/pcmcia/axnet_cs.c b/drivers/net/pcmcia/axnet_cs.c
index 6d342f6c14f6..e8a63e483a2b 100644
--- a/drivers/net/pcmcia/axnet_cs.c
+++ b/drivers/net/pcmcia/axnet_cs.c
@@ -96,8 +96,8 @@ static irqreturn_t ei_irq_wrapper(int irq, void *dev_id);
 static void ei_watchdog(u_long arg);
 static void axnet_reset_8390(struct net_device *dev);
 
-static int mdio_read(kio_addr_t addr, int phy_id, int loc);
-static void mdio_write(kio_addr_t addr, int phy_id, int loc, int value);
+static int mdio_read(unsigned int addr, int phy_id, int loc);
+static void mdio_write(unsigned int addr, int phy_id, int loc, int value);
 
 static void get_8390_hdr(struct net_device *,
                          struct e8390_pkt_hdr *, int);
@@ -203,7 +203,7 @@ static void axnet_detach(struct pcmcia_device *link)
 static int get_prom(struct pcmcia_device *link)
 {
     struct net_device *dev = link->priv;
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     int i, j;
 
     /* This is based on drivers/net/ne.c */
@@ -473,7 +473,7 @@ static int axnet_resume(struct pcmcia_device *link)
 #define MDIO_MASK               0x0f
 #define MDIO_ENB_IN             0x02
 
-static void mdio_sync(kio_addr_t addr)
+static void mdio_sync(unsigned int addr)
 {
     int bits;
     for (bits = 0; bits < 32; bits++) {
@@ -482,7 +482,7 @@ static void mdio_sync(kio_addr_t addr)
     }
 }
 
-static int mdio_read(kio_addr_t addr, int phy_id, int loc)
+static int mdio_read(unsigned int addr, int phy_id, int loc)
 {
     u_int cmd = (0xf6<<10)|(phy_id<<5)|loc;
     int i, retval = 0;
@@ -501,7 +501,7 @@ static int mdio_read(kio_addr_t addr, int phy_id, int loc)
     return (retval>>1) & 0xffff;
 }
 
-static void mdio_write(kio_addr_t addr, int phy_id, int loc, int value)
+static void mdio_write(unsigned int addr, int phy_id, int loc, int value)
 {
     u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
     int i;
@@ -575,7 +575,7 @@ static int axnet_close(struct net_device *dev)
 
 static void axnet_reset_8390(struct net_device *dev)
 {
-    kio_addr_t nic_base = dev->base_addr;
+    unsigned int nic_base = dev->base_addr;
     int i;
 
     ei_status.txing = ei_status.dmaing = 0;
@@ -610,8 +610,8 @@ static void ei_watchdog(u_long arg)
 {
     struct net_device *dev = (struct net_device *)(arg);
     axnet_dev_t *info = PRIV(dev);
-    kio_addr_t nic_base = dev->base_addr;
-    kio_addr_t mii_addr = nic_base + AXNET_MII_EEP;
+    unsigned int nic_base = dev->base_addr;
+    unsigned int mii_addr = nic_base + AXNET_MII_EEP;
     u_short link;
 
     if (!netif_device_present(dev)) goto reschedule;
@@ -681,7 +681,7 @@ static int axnet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 {
     axnet_dev_t *info = PRIV(dev);
     u16 *data = (u16 *)&rq->ifr_ifru;
-    kio_addr_t mii_addr = dev->base_addr + AXNET_MII_EEP;
+    unsigned int mii_addr = dev->base_addr + AXNET_MII_EEP;
     switch (cmd) {
     case SIOCGMIIPHY:
         data[0] = info->phy_id;
@@ -703,7 +703,7 @@ static void get_8390_hdr(struct net_device *dev,
                          struct e8390_pkt_hdr *hdr,
                          int ring_page)
 {
-    kio_addr_t nic_base = dev->base_addr;
+    unsigned int nic_base = dev->base_addr;
 
     outb_p(0, nic_base + EN0_RSARLO);           /* On page boundary */
     outb_p(ring_page, nic_base + EN0_RSARHI);
@@ -721,7 +721,7 @@ static void get_8390_hdr(struct net_device *dev,
 static void block_input(struct net_device *dev, int count,
                         struct sk_buff *skb, int ring_offset)
 {
-    kio_addr_t nic_base = dev->base_addr;
+    unsigned int nic_base = dev->base_addr;
     int xfer_count = count;
     char *buf = skb->data;
 
@@ -744,7 +744,7 @@ static void block_input(struct net_device *dev, int count,
 static void block_output(struct net_device *dev, int count,
                          const u_char *buf, const int start_page)
 {
-    kio_addr_t nic_base = dev->base_addr;
+    unsigned int nic_base = dev->base_addr;
 
 #ifdef PCMCIA_DEBUG
     if (ei_debug > 4)
@@ -991,7 +991,7 @@ static int ax_open(struct net_device *dev)
  *
  * Opposite of ax_open(). Only used when "ifconfig <devname> down" is done.
  */
-int ax_close(struct net_device *dev)
+static int ax_close(struct net_device *dev)
 {
         unsigned long flags;
 
@@ -1014,7 +1014,7 @@ int ax_close(struct net_device *dev)
  * completed (or failed) - i.e. never posted a Tx related interrupt.
  */
 
-void ei_tx_timeout(struct net_device *dev)
+static void ei_tx_timeout(struct net_device *dev)
 {
         long e8390_base = dev->base_addr;
         struct ei_device *ei_local = (struct ei_device *) netdev_priv(dev);
@@ -1087,8 +1087,8 @@ static int ei_start_xmit(struct sk_buff *skb, struct net_device *dev)
         
         ei_local->irqlock = 1;
 
-        send_length = ETH_ZLEN < length ? length : ETH_ZLEN;
-        
+        send_length = max(length, ETH_ZLEN);
+
         /*
          * We have two Tx slots available for use. Find the first free
          * slot, and then perform some sanity checks. With two Tx bufs,
diff --git a/drivers/net/pcmcia/fmvj18x_cs.c b/drivers/net/pcmcia/fmvj18x_cs.c
index 949c6df74c97..8f328a03847b 100644
--- a/drivers/net/pcmcia/fmvj18x_cs.c
+++ b/drivers/net/pcmcia/fmvj18x_cs.c
@@ -298,7 +298,8 @@ do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
 static int mfc_try_io_port(struct pcmcia_device *link)
 {
     int i, ret;
-    static const kio_addr_t serial_base[5] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
+    static const unsigned int serial_base[5] =
+        { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
 
     for (i = 0; i < 5; i++) {
         link->io.BasePort2 = serial_base[i];
@@ -316,7 +317,7 @@ static int mfc_try_io_port(struct pcmcia_device *link)
 static int ungermann_try_io_port(struct pcmcia_device *link)
 {
     int ret;
-    kio_addr_t ioaddr;
+    unsigned int ioaddr;
     /*
         Ungermann-Bass Access/CARD accepts 0x300,0x320,0x340,0x360
         0x380,0x3c0 only for ioport.
@@ -342,7 +343,7 @@ static int fmvj18x_config(struct pcmcia_device *link)
     cisparse_t parse;
     u_short buf[32];
     int i, last_fn = 0, last_ret = 0, ret;
-    kio_addr_t ioaddr;
+    unsigned int ioaddr;
     cardtype_t cardtype;
     char *card_name = "unknown";
     u_char *node_id;
@@ -610,7 +611,7 @@ static int fmvj18x_setup_mfc(struct pcmcia_device *link)
     u_char __iomem *base;
     int i, j;
     struct net_device *dev = link->priv;
-    kio_addr_t ioaddr;
+    unsigned int ioaddr;
 
     /* Allocate a small memory window */
     req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
@@ -735,7 +736,7 @@ static irqreturn_t fjn_interrupt(int dummy, void *dev_id)
 {
     struct net_device *dev = dev_id;
     local_info_t *lp = netdev_priv(dev);
-    kio_addr_t ioaddr;
+    unsigned int ioaddr;
     unsigned short tx_stat, rx_stat;
 
     ioaddr = dev->base_addr;
@@ -789,7 +790,7 @@ static irqreturn_t fjn_interrupt(int dummy, void *dev_id)
 static void fjn_tx_timeout(struct net_device *dev)
 {
     struct local_info_t *lp = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
 
     printk(KERN_NOTICE "%s: transmit timed out with status %04x, %s?\n",
            dev->name, htons(inw(ioaddr + TX_STATUS)),
@@ -819,7 +820,7 @@ static void fjn_tx_timeout(struct net_device *dev)
 static int fjn_start_xmit(struct sk_buff *skb, struct net_device *dev)
 {
     struct local_info_t *lp = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     short length = skb->len;
     
     if (length < ETH_ZLEN)
@@ -892,7 +893,7 @@ static int fjn_start_xmit(struct sk_buff *skb, struct net_device *dev)
 static void fjn_reset(struct net_device *dev)
 {
     struct local_info_t *lp = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     int i;
 
     DEBUG(4, "fjn_reset(%s) called.\n",dev->name);
@@ -971,7 +972,7 @@ static void fjn_reset(struct net_device *dev)
 static void fjn_rx(struct net_device *dev)
 {
     struct local_info_t *lp = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     int boguscount = 10;        /* 5 -> 10: by agy 19940922 */
 
     DEBUG(4, "%s: in rx_packet(), rx_status %02x.\n",
@@ -1125,7 +1126,7 @@ static int fjn_close(struct net_device *dev)
 {
     struct local_info_t *lp = netdev_priv(dev);
     struct pcmcia_device *link = lp->p_dev;
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
 
     DEBUG(4, "fjn_close('%s').\n", dev->name);
 
@@ -1168,7 +1169,7 @@ static struct net_device_stats *fjn_get_stats(struct net_device *dev)
 
 static void set_rx_mode(struct net_device *dev)
 {
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     u_char mc_filter[8];                 /* Multicast hash filter */
     u_long flags;
     int i;
@@ -1197,8 +1198,7 @@ static void set_rx_mode(struct net_device *dev)
         outb(1, ioaddr + RX_MODE);      /* Ignore almost all multicasts. */
     } else {
         struct dev_mc_list *mclist;
-        int i;
-        
+
         memset(mc_filter, 0, sizeof(mc_filter));
         for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
              i++, mclist = mclist->next) {
diff --git a/drivers/net/pcmcia/nmclan_cs.c b/drivers/net/pcmcia/nmclan_cs.c
index a355a93b908b..cfcbea9b7e2e 100644
--- a/drivers/net/pcmcia/nmclan_cs.c
+++ b/drivers/net/pcmcia/nmclan_cs.c
@@ -518,7 +518,7 @@ mace_read
         assuming that during normal operation, the MACE is always in
         bank 0.
 ---------------------------------------------------------------------------- */
-static int mace_read(mace_private *lp, kio_addr_t ioaddr, int reg)
+static int mace_read(mace_private *lp, unsigned int ioaddr, int reg)
 {
   int data = 0xFF;
   unsigned long flags;
@@ -545,7 +545,8 @@ mace_write
         are assuming that during normal operation, the MACE is always in
         bank 0.
 ---------------------------------------------------------------------------- */
-static void mace_write(mace_private *lp, kio_addr_t ioaddr, int reg, int data)
+static void mace_write(mace_private *lp, unsigned int ioaddr, int reg,
+                       int data)
 {
   unsigned long flags;
 
@@ -567,7 +568,7 @@ static void mace_write(mace_private *lp, kio_addr_t ioaddr, int reg, int data)
 mace_init
         Resets the MACE chip.
 ---------------------------------------------------------------------------- */
-static int mace_init(mace_private *lp, kio_addr_t ioaddr, char *enet_addr)
+static int mace_init(mace_private *lp, unsigned int ioaddr, char *enet_addr)
 {
   int i;
   int ct = 0;
@@ -657,7 +658,7 @@ static int nmclan_config(struct pcmcia_device *link)
   tuple_t tuple;
   u_char buf[64];
   int i, last_ret, last_fn;
-  kio_addr_t ioaddr;
+  unsigned int ioaddr;
   DECLARE_MAC_BUF(mac);
 
   DEBUG(0, "nmclan_config(0x%p)\n", link);
@@ -839,7 +840,7 @@ mace_open
 ---------------------------------------------------------------------------- */
 static int mace_open(struct net_device *dev)
 {
-  kio_addr_t ioaddr = dev->base_addr;
+  unsigned int ioaddr = dev->base_addr;
   mace_private *lp = netdev_priv(dev);
   struct pcmcia_device *link = lp->p_dev;
 
@@ -862,7 +863,7 @@ mace_close
 ---------------------------------------------------------------------------- */
 static int mace_close(struct net_device *dev)
 {
-  kio_addr_t ioaddr = dev->base_addr;
+  unsigned int ioaddr = dev->base_addr;
   mace_private *lp = netdev_priv(dev);
   struct pcmcia_device *link = lp->p_dev;
 
@@ -935,7 +936,7 @@ static void mace_tx_timeout(struct net_device *dev)
 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
 {
   mace_private *lp = netdev_priv(dev);
-  kio_addr_t ioaddr = dev->base_addr;
+  unsigned int ioaddr = dev->base_addr;
 
   netif_stop_queue(dev);
 
@@ -996,7 +997,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)
 {
   struct net_device *dev = (struct net_device *) dev_id;
   mace_private *lp = netdev_priv(dev);
-  kio_addr_t ioaddr;
+  unsigned int ioaddr;
   int status;
   int IntrCnt = MACE_MAX_IR_ITERATIONS;
 
@@ -1140,7 +1141,7 @@ mace_rx
 static int mace_rx(struct net_device *dev, unsigned char RxCnt)
 {
   mace_private *lp = netdev_priv(dev);
-  kio_addr_t ioaddr = dev->base_addr;
+  unsigned int ioaddr = dev->base_addr;
   unsigned char rx_framecnt;
   unsigned short rx_status;
 
@@ -1302,7 +1303,7 @@ update_stats
         card's SRAM fast enough.  If this happens, something is
         seriously wrong with the hardware.
 ---------------------------------------------------------------------------- */
-static void update_stats(kio_addr_t ioaddr, struct net_device *dev)
+static void update_stats(unsigned int ioaddr, struct net_device *dev)
 {
   mace_private *lp = netdev_priv(dev);
 
@@ -1448,7 +1449,7 @@ static void restore_multicast_list(struct net_device *dev)
   mace_private *lp = netdev_priv(dev);
   int num_addrs = lp->multicast_num_addrs;
   int *ladrf = lp->multicast_ladrf;
-  kio_addr_t ioaddr = dev->base_addr;
+  unsigned int ioaddr = dev->base_addr;
   int i;
 
   DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
@@ -1540,7 +1541,7 @@ static void set_multicast_list(struct net_device *dev)
 
 static void restore_multicast_list(struct net_device *dev)
 {
-  kio_addr_t ioaddr = dev->base_addr;
+  unsigned int ioaddr = dev->base_addr;
   mace_private *lp = netdev_priv(dev);
 
   DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c
index 9ba56aa26a1b..6323988dfa1d 100644
--- a/drivers/net/pcmcia/pcnet_cs.c
+++ b/drivers/net/pcmcia/pcnet_cs.c
@@ -349,7 +349,7 @@ static hw_info_t *get_hwinfo(struct pcmcia_device *link)
 static hw_info_t *get_prom(struct pcmcia_device *link)
 {
     struct net_device *dev = link->priv;
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     u_char prom[32];
     int i, j;
 
@@ -425,7 +425,7 @@ static hw_info_t *get_dl10019(struct pcmcia_device *link)
 static hw_info_t *get_ax88190(struct pcmcia_device *link)
 {
     struct net_device *dev = link->priv;
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     int i, j;
 
     /* Not much of a test, but the alternatives are messy */
@@ -521,7 +521,7 @@ static int pcnet_config(struct pcmcia_device *link)
     int i, last_ret, last_fn, start_pg, stop_pg, cm_offset;
     int has_shmem = 0;
     u_short buf[64];
-    hw_info_t *hw_info;
+    hw_info_t *local_hw_info;
     DECLARE_MAC_BUF(mac);
 
     DEBUG(0, "pcnet_config(0x%p)\n", link);
@@ -590,23 +590,23 @@ static int pcnet_config(struct pcmcia_device *link)
         dev->if_port = 0;
     }
 
-    hw_info = get_hwinfo(link);
-    if (hw_info == NULL)
-        hw_info = get_prom(link);
-    if (hw_info == NULL)
-        hw_info = get_dl10019(link);
-    if (hw_info == NULL)
-        hw_info = get_ax88190(link);
-    if (hw_info == NULL)
-        hw_info = get_hwired(link);
-
-    if (hw_info == NULL) {
+    local_hw_info = get_hwinfo(link);
+    if (local_hw_info == NULL)
+        local_hw_info = get_prom(link);
+    if (local_hw_info == NULL)
+        local_hw_info = get_dl10019(link);
+    if (local_hw_info == NULL)
+        local_hw_info = get_ax88190(link);
+    if (local_hw_info == NULL)
+        local_hw_info = get_hwired(link);
+
+    if (local_hw_info == NULL) {
         printk(KERN_NOTICE "pcnet_cs: unable to read hardware net"
                " address for io base %#3lx\n", dev->base_addr);
         goto failed;
     }
 
-    info->flags = hw_info->flags;
+    info->flags = local_hw_info->flags;
     /* Check for user overrides */
     info->flags |= (delay_output) ? DELAY_OUTPUT : 0;
     if ((link->manf_id == MANFID_SOCKET) &&
@@ -756,7 +756,7 @@ static int pcnet_resume(struct pcmcia_device *link)
 #define MDIO_DATA_READ          0x10
 #define MDIO_MASK               0x0f
 
-static void mdio_sync(kio_addr_t addr)
+static void mdio_sync(unsigned int addr)
 {
     int bits, mask = inb(addr) & MDIO_MASK;
     for (bits = 0; bits < 32; bits++) {
@@ -765,7 +765,7 @@ static void mdio_sync(kio_addr_t addr)
     }
 }
 
-static int mdio_read(kio_addr_t addr, int phy_id, int loc)
+static int mdio_read(unsigned int addr, int phy_id, int loc)
 {
     u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
     int i, retval = 0, mask = inb(addr) & MDIO_MASK;
@@ -784,7 +784,7 @@ static int mdio_read(kio_addr_t addr, int phy_id, int loc)
     return (retval>>1) & 0xffff;
 }
 
-static void mdio_write(kio_addr_t addr, int phy_id, int loc, int value)
+static void mdio_write(unsigned int addr, int phy_id, int loc, int value)
 {
     u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
     int i, mask = inb(addr) & MDIO_MASK;
@@ -818,10 +818,10 @@ static void mdio_write(kio_addr_t addr, int phy_id, int loc, int value)
 
 #define DL19FDUPLX      0x0400  /* DL10019 Full duplex mode */
 
-static int read_eeprom(kio_addr_t ioaddr, int location)
+static int read_eeprom(unsigned int ioaddr, int location)
 {
     int i, retval = 0;
-    kio_addr_t ee_addr = ioaddr + DLINK_EEPROM;
+    unsigned int ee_addr = ioaddr + DLINK_EEPROM;
     int read_cmd = location | (EE_READ_CMD << 8);
 
     outb(0, ee_addr);
@@ -852,10 +852,10 @@ static int read_eeprom(kio_addr_t ioaddr, int location)
     In ASIC mode, EE_ADOT is used to output the data to the ASIC.
 */
 
-static void write_asic(kio_addr_t ioaddr, int location, short asic_data)
+static void write_asic(unsigned int ioaddr, int location, short asic_data)
 {
         int i;
-        kio_addr_t ee_addr = ioaddr + DLINK_EEPROM;
+        unsigned int ee_addr = ioaddr + DLINK_EEPROM;
         short dataval;
         int read_cmd = location | (EE_READ_CMD << 8);
 
@@ -897,7 +897,7 @@ static void write_asic(kio_addr_t ioaddr, int location, short asic_data)
 
 static void set_misc_reg(struct net_device *dev)
 {
-    kio_addr_t nic_base = dev->base_addr;
+    unsigned int nic_base = dev->base_addr;
     pcnet_dev_t *info = PRIV(dev);
     u_char tmp;
 
@@ -936,7 +936,7 @@ static void set_misc_reg(struct net_device *dev)
 static void mii_phy_probe(struct net_device *dev)
 {
     pcnet_dev_t *info = PRIV(dev);
-    kio_addr_t mii_addr = dev->base_addr + DLINK_GPIO;
+    unsigned int mii_addr = dev->base_addr + DLINK_GPIO;
     int i;
     u_int tmp, phyid;
 
@@ -1014,7 +1014,7 @@ static int pcnet_close(struct net_device *dev)
 
 static void pcnet_reset_8390(struct net_device *dev)
 {
-    kio_addr_t nic_base = dev->base_addr;
+    unsigned int nic_base = dev->base_addr;
     int i;
 
     ei_status.txing = ei_status.dmaing = 0;
@@ -1074,8 +1074,8 @@ static void ei_watchdog(u_long arg)
 {
     struct net_device *dev = (struct net_device *)arg;
     pcnet_dev_t *info = PRIV(dev);
-    kio_addr_t nic_base = dev->base_addr;
-    kio_addr_t mii_addr = nic_base + DLINK_GPIO;
+    unsigned int nic_base = dev->base_addr;
+    unsigned int mii_addr = nic_base + DLINK_GPIO;
     u_short link;
 
     if (!netif_device_present(dev)) goto reschedule;
@@ -1177,7 +1177,7 @@ static int ei_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 {
     pcnet_dev_t *info = PRIV(dev);
     u16 *data = (u16 *)&rq->ifr_ifru;
-    kio_addr_t mii_addr = dev->base_addr + DLINK_GPIO;
+    unsigned int mii_addr = dev->base_addr + DLINK_GPIO;
     switch (cmd) {
     case SIOCGMIIPHY:
         data[0] = info->phy_id;
@@ -1199,7 +1199,7 @@ static void dma_get_8390_hdr(struct net_device *dev,
                              struct e8390_pkt_hdr *hdr,
                              int ring_page)
 {
-    kio_addr_t nic_base = dev->base_addr;
+    unsigned int nic_base = dev->base_addr;
 
     if (ei_status.dmaing) {
         printk(KERN_NOTICE "%s: DMAing conflict in dma_block_input."
@@ -1230,7 +1230,7 @@ static void dma_get_8390_hdr(struct net_device *dev,
 static void dma_block_input(struct net_device *dev, int count,
                             struct sk_buff *skb, int ring_offset)
 {
-    kio_addr_t nic_base = dev->base_addr;
+    unsigned int nic_base = dev->base_addr;
     int xfer_count = count;
     char *buf = skb->data;
 
@@ -1285,7 +1285,7 @@ static void dma_block_input(struct net_device *dev, int count,
 static void dma_block_output(struct net_device *dev, int count,
                              const u_char *buf, const int start_page)
 {
-    kio_addr_t nic_base = dev->base_addr;
+    unsigned int nic_base = dev->base_addr;
     pcnet_dev_t *info = PRIV(dev);
 #ifdef PCMCIA_DEBUG
     int retries = 0;
diff --git a/drivers/net/pcmcia/smc91c92_cs.c b/drivers/net/pcmcia/smc91c92_cs.c
index c9868e9dac4c..f18eca9831e8 100644
--- a/drivers/net/pcmcia/smc91c92_cs.c
+++ b/drivers/net/pcmcia/smc91c92_cs.c
@@ -295,7 +295,7 @@ static int s9k_config(struct net_device *dev, struct ifmap *map);
 static void smc_set_xcvr(struct net_device *dev, int if_port);
 static void smc_reset(struct net_device *dev);
 static void media_check(u_long arg);
-static void mdio_sync(kio_addr_t addr);
+static void mdio_sync(unsigned int addr);
 static int mdio_read(struct net_device *dev, int phy_id, int loc);
 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
 static int smc_link_ok(struct net_device *dev);
@@ -601,8 +601,8 @@ static void mot_config(struct pcmcia_device *link)
 {
     struct net_device *dev = link->priv;
     struct smc_private *smc = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
-    kio_addr_t iouart = link->io.BasePort2;
+    unsigned int ioaddr = dev->base_addr;
+    unsigned int iouart = link->io.BasePort2;
 
     /* Set UART base address and force map with COR bit 1 */
     writeb(iouart & 0xff,        smc->base + MOT_UART + CISREG_IOBASE_0);
@@ -621,7 +621,7 @@ static void mot_config(struct pcmcia_device *link)
 static int mot_setup(struct pcmcia_device *link)
 {
     struct net_device *dev = link->priv;
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     int i, wait, loop;
     u_int addr;
 
@@ -754,7 +754,7 @@ free_cfg_mem:
 static int osi_config(struct pcmcia_device *link)
 {
     struct net_device *dev = link->priv;
-    static const kio_addr_t com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
+    static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
     int i, j;
 
     link->conf.Attributes |= CONF_ENABLE_SPKR;
@@ -900,7 +900,7 @@ static int smc91c92_resume(struct pcmcia_device *link)
 static int check_sig(struct pcmcia_device *link)
 {
     struct net_device *dev = link->priv;
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     int width;
     u_short s;
 
@@ -960,7 +960,7 @@ static int smc91c92_config(struct pcmcia_device *link)
     struct smc_private *smc = netdev_priv(dev);
     char *name;
     int i, j, rev;
-    kio_addr_t ioaddr;
+    unsigned int ioaddr;
     u_long mir;
     DECLARE_MAC_BUF(mac);
 
@@ -1136,7 +1136,7 @@ static void smc91c92_release(struct pcmcia_device *link)
 #define MDIO_DATA_WRITE1        (MDIO_DIR_WRITE | MDIO_DATA_OUT)
 #define MDIO_DATA_READ          0x02
 
-static void mdio_sync(kio_addr_t addr)
+static void mdio_sync(unsigned int addr)
 {
     int bits;
     for (bits = 0; bits < 32; bits++) {
@@ -1147,7 +1147,7 @@ static void mdio_sync(kio_addr_t addr)
 
 static int mdio_read(struct net_device *dev, int phy_id, int loc)
 {
-    kio_addr_t addr = dev->base_addr + MGMT;
+    unsigned int addr = dev->base_addr + MGMT;
     u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
     int i, retval = 0;
 
@@ -1167,7 +1167,7 @@ static int mdio_read(struct net_device *dev, int phy_id, int loc)
 
 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
 {
-    kio_addr_t addr = dev->base_addr + MGMT;
+    unsigned int addr = dev->base_addr + MGMT;
     u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
     int i;
 
@@ -1193,7 +1193,7 @@ static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
 #ifdef PCMCIA_DEBUG
 static void smc_dump(struct net_device *dev)
 {
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     u_short i, w, save;
     save = inw(ioaddr + BANK_SELECT);
     for (w = 0; w < 4; w++) {
@@ -1248,7 +1248,7 @@ static int smc_close(struct net_device *dev)
 {
     struct smc_private *smc = netdev_priv(dev);
     struct pcmcia_device *link = smc->p_dev;
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
 
     DEBUG(0, "%s: smc_close(), status %4.4x.\n",
           dev->name, inw(ioaddr + BANK_SELECT));
@@ -1285,7 +1285,7 @@ static void smc_hardware_send_packet(struct net_device * dev)
 {
     struct smc_private *smc = netdev_priv(dev);
     struct sk_buff *skb = smc->saved_skb;
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     u_char packet_no;
 
     if (!skb) {
@@ -1349,7 +1349,7 @@ static void smc_hardware_send_packet(struct net_device * dev)
 static void smc_tx_timeout(struct net_device *dev)
 {
     struct smc_private *smc = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
 
     printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, "
            "Tx_status %2.2x status %4.4x.\n",
@@ -1364,7 +1364,7 @@ static void smc_tx_timeout(struct net_device *dev)
 static int smc_start_xmit(struct sk_buff *skb, struct net_device *dev)
 {
     struct smc_private *smc = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     u_short num_pages;
     short time_out, ir;
     unsigned long flags;
@@ -1434,7 +1434,7 @@ static int smc_start_xmit(struct sk_buff *skb, struct net_device *dev)
 static void smc_tx_err(struct net_device * dev)
 {
     struct smc_private *smc = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
     int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
     int tx_status;
@@ -1478,7 +1478,7 @@ static void smc_tx_err(struct net_device * dev)
 static void smc_eph_irq(struct net_device *dev)
 {
     struct smc_private *smc = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     u_short card_stats, ephs;
 
     SMC_SELECT_BANK(0);
@@ -1513,7 +1513,7 @@ static irqreturn_t smc_interrupt(int irq, void *dev_id)
 {
     struct net_device *dev = dev_id;
     struct smc_private *smc = netdev_priv(dev);
-    kio_addr_t ioaddr;
+    unsigned int ioaddr;
     u_short saved_bank, saved_pointer, mask, status;
     unsigned int handled = 1;
     char bogus_cnt = INTR_WORK;         /* Work we are willing to do. */
@@ -1633,7 +1633,7 @@ irq_done:
 static void smc_rx(struct net_device *dev)
 {
     struct smc_private *smc = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     int rx_status;
     int packet_length;  /* Caution: not frame length, rather words
                            to transfer from the chip. */
@@ -1738,7 +1738,7 @@ static void fill_multicast_tbl(int count, struct dev_mc_list *addrs,
 
 static void set_rx_mode(struct net_device *dev)
 {
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     struct smc_private *smc = netdev_priv(dev);
     u_int multicast_table[ 2 ] = { 0, };
     unsigned long flags;
@@ -1804,7 +1804,7 @@ static int s9k_config(struct net_device *dev, struct ifmap *map)
 static void smc_set_xcvr(struct net_device *dev, int if_port)
 {
     struct smc_private *smc = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     u_short saved_bank;
 
     saved_bank = inw(ioaddr + BANK_SELECT);
@@ -1827,7 +1827,7 @@ static void smc_set_xcvr(struct net_device *dev, int if_port)
 
 static void smc_reset(struct net_device *dev)
 {
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     struct smc_private *smc = netdev_priv(dev);
     int i;
 
@@ -1904,7 +1904,7 @@ static void media_check(u_long arg)
 {
     struct net_device *dev = (struct net_device *) arg;
     struct smc_private *smc = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     u_short i, media, saved_bank;
     u_short link;
     unsigned long flags;
@@ -2021,7 +2021,7 @@ reschedule:
 
 static int smc_link_ok(struct net_device *dev)
 {
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     struct smc_private *smc = netdev_priv(dev);
 
     if (smc->cfg & CFG_MII_SELECT) {
@@ -2035,7 +2035,7 @@ static int smc_link_ok(struct net_device *dev)
 static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
 {
     u16 tmp;
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
 
     ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
         SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
@@ -2057,7 +2057,7 @@ static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
 static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
 {
     u16 tmp;
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
 
     if (ecmd->speed != SPEED_10)
         return -EINVAL;
@@ -2100,7 +2100,7 @@ static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info
 static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
 {
         struct smc_private *smc = netdev_priv(dev);
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         u16 saved_bank = inw(ioaddr + BANK_SELECT);
         int ret;
 
@@ -2118,7 +2118,7 @@ static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
 static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
 {
         struct smc_private *smc = netdev_priv(dev);
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         u16 saved_bank = inw(ioaddr + BANK_SELECT);
         int ret;
 
@@ -2136,7 +2136,7 @@ static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
 static u32 smc_get_link(struct net_device *dev)
 {
         struct smc_private *smc = netdev_priv(dev);
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
         u16 saved_bank = inw(ioaddr + BANK_SELECT);
         u32 ret;
 
@@ -2164,7 +2164,7 @@ static int smc_nway_reset(struct net_device *dev)
 {
         struct smc_private *smc = netdev_priv(dev);
         if (smc->cfg & CFG_MII_SELECT) {
-                kio_addr_t ioaddr = dev->base_addr;
+                unsigned int ioaddr = dev->base_addr;
                 u16 saved_bank = inw(ioaddr + BANK_SELECT);
                 int res;
 
@@ -2196,7 +2196,7 @@ static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
         struct mii_ioctl_data *mii = if_mii(rq);
         int rc = 0;
         u16 saved_bank;
-        kio_addr_t ioaddr = dev->base_addr;
+        unsigned int ioaddr = dev->base_addr;
 
         if (!netif_running(dev))
                 return -EINVAL;
diff --git a/drivers/net/pcmcia/xirc2ps_cs.c b/drivers/net/pcmcia/xirc2ps_cs.c
index 1f09bea6db5a..d041f831a18d 100644
--- a/drivers/net/pcmcia/xirc2ps_cs.c
+++ b/drivers/net/pcmcia/xirc2ps_cs.c
@@ -273,12 +273,12 @@ INT_MODULE_PARM(lockup_hack,	0);  /* anti lockup hack */
 static unsigned maxrx_bytes = 22000;
 
 /* MII management prototypes */
-static void mii_idle(kio_addr_t ioaddr);
-static void mii_putbit(kio_addr_t ioaddr, unsigned data);
-static int  mii_getbit(kio_addr_t ioaddr);
-static void mii_wbits(kio_addr_t ioaddr, unsigned data, int len);
-static unsigned mii_rd(kio_addr_t ioaddr, u_char phyaddr, u_char phyreg);
-static void mii_wr(kio_addr_t ioaddr, u_char phyaddr, u_char phyreg,
+static void mii_idle(unsigned int ioaddr);
+static void mii_putbit(unsigned int ioaddr, unsigned data);
+static int  mii_getbit(unsigned int ioaddr);
+static void mii_wbits(unsigned int ioaddr, unsigned data, int len);
+static unsigned mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg);
+static void mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg,
                    unsigned data, int len);
 
 /*
@@ -403,7 +403,7 @@ next_tuple(struct pcmcia_device *handle, tuple_t *tuple, cisparse_t *parse)
 static void
 PrintRegisters(struct net_device *dev)
 {
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
 
     if (pc_debug > 1) {
         int i, page;
@@ -439,7 +439,7 @@ PrintRegisters(struct net_device *dev)
  * Turn around for read
  */
 static void
-mii_idle(kio_addr_t ioaddr)
+mii_idle(unsigned int ioaddr)
 {
     PutByte(XIRCREG2_GPR2, 0x04|0); /* drive MDCK low */
     udelay(1);
@@ -451,7 +451,7 @@ mii_idle(kio_addr_t ioaddr)
  * Write a bit to MDI/O
  */
 static void
-mii_putbit(kio_addr_t ioaddr, unsigned data)
+mii_putbit(unsigned int ioaddr, unsigned data)
 {
   #if 1
     if (data) {
@@ -484,7 +484,7 @@ mii_putbit(kio_addr_t ioaddr, unsigned data)
  * Get a bit from MDI/O
  */
 static int
-mii_getbit(kio_addr_t ioaddr)
+mii_getbit(unsigned int ioaddr)
 {
     unsigned d;
 
@@ -497,7 +497,7 @@ mii_getbit(kio_addr_t ioaddr)
 }
 
 static void
-mii_wbits(kio_addr_t ioaddr, unsigned data, int len)
+mii_wbits(unsigned int ioaddr, unsigned data, int len)
 {
     unsigned m = 1 << (len-1);
     for (; m; m >>= 1)
@@ -505,7 +505,7 @@ mii_wbits(kio_addr_t ioaddr, unsigned data, int len)
 }
 
 static unsigned
-mii_rd(kio_addr_t ioaddr,       u_char phyaddr, u_char phyreg)
+mii_rd(unsigned int ioaddr,     u_char phyaddr, u_char phyreg)
 {
     int i;
     unsigned data=0, m;
@@ -527,7 +527,8 @@ mii_rd(kio_addr_t ioaddr,	u_char phyaddr, u_char phyreg)
 }
 
 static void
-mii_wr(kio_addr_t ioaddr, u_char phyaddr, u_char phyreg, unsigned data, int len)
+mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, unsigned data,
+       int len)
 {
     int i;
 
@@ -726,7 +727,7 @@ xirc2ps_config(struct pcmcia_device * link)
     local_info_t *local = netdev_priv(dev);
     tuple_t tuple;
     cisparse_t parse;
-    kio_addr_t ioaddr;
+    unsigned int ioaddr;
     int err, i;
     u_char buf[64];
     cistpl_lan_node_id_t *node_id = (cistpl_lan_node_id_t*)parse.funce.data;
@@ -1104,7 +1105,7 @@ xirc2ps_interrupt(int irq, void *dev_id)
 {
     struct net_device *dev = (struct net_device *)dev_id;
     local_info_t *lp = netdev_priv(dev);
-    kio_addr_t ioaddr;
+    unsigned int ioaddr;
     u_char saved_page;
     unsigned bytes_rcvd;
     unsigned int_status, eth_status, rx_status, tx_status;
@@ -1209,7 +1210,7 @@ xirc2ps_interrupt(int irq, void *dev_id)
                     unsigned i;
                     u_long *p = skb_put(skb, pktlen);
                     register u_long a;
-                    kio_addr_t edpreg = ioaddr+XIRCREG_EDP-2;
+                    unsigned int edpreg = ioaddr+XIRCREG_EDP-2;
                     for (i=0; i < len ; i += 4, p++) {
                         a = inl(edpreg);
                         __asm__("rorl $16,%0\n\t"
@@ -1346,7 +1347,7 @@ static int
 do_start_xmit(struct sk_buff *skb, struct net_device *dev)
 {
     local_info_t *lp = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     int okay;
     unsigned freespace;
     unsigned pktlen = skb->len;
@@ -1415,7 +1416,7 @@ do_get_stats(struct net_device *dev)
 static void
 set_addresses(struct net_device *dev)
 {
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     local_info_t *lp = netdev_priv(dev);
     struct dev_mc_list *dmi = dev->mc_list;
     unsigned char *addr;
@@ -1459,7 +1460,7 @@ set_addresses(struct net_device *dev)
 static void
 set_multicast_list(struct net_device *dev)
 {
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
 
     SelectPage(0x42);
     if (dev->flags & IFF_PROMISC) { /* snoop */
@@ -1543,7 +1544,7 @@ static int
 do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 {
     local_info_t *local = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     u16 *data = (u16 *)&rq->ifr_ifru;
 
     DEBUG(1, "%s: ioctl(%-.6s, %#04x) %04x %04x %04x %04x\n",
@@ -1575,7 +1576,7 @@ static void
 hardreset(struct net_device *dev)
 {
     local_info_t *local = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
 
     SelectPage(4);
     udelay(1);
@@ -1592,7 +1593,7 @@ static void
 do_reset(struct net_device *dev, int full)
 {
     local_info_t *local = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     unsigned value;
 
     DEBUG(0, "%s: do_reset(%p,%d)\n", dev? dev->name:"eth?", dev, full);
@@ -1753,7 +1754,7 @@ static int
 init_mii(struct net_device *dev)
 {
     local_info_t *local = netdev_priv(dev);
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     unsigned control, status, linkpartner;
     int i;
 
@@ -1826,7 +1827,7 @@ static void
 do_powerdown(struct net_device *dev)
 {
 
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
 
     DEBUG(0, "do_powerdown(%p)\n", dev);
 
@@ -1838,7 +1839,7 @@ do_powerdown(struct net_device *dev)
 static int
 do_stop(struct net_device *dev)
 {
-    kio_addr_t ioaddr = dev->base_addr;
+    unsigned int ioaddr = dev->base_addr;
     local_info_t *lp = netdev_priv(dev);
     struct pcmcia_device *link = lp->p_dev;
 
diff --git a/drivers/net/pppol2tp.c b/drivers/net/pppol2tp.c
index 1b51bb668d39..5aa0a8089694 100644
--- a/drivers/net/pppol2tp.c
+++ b/drivers/net/pppol2tp.c
@@ -2468,9 +2468,10 @@ static int __init pppol2tp_init(void)
 
 out:
         return err;
-
+#ifdef CONFIG_PROC_FS
 out_unregister_pppox_proto:
         unregister_pppox_proto(PX_PROTO_OL2TP);
+#endif
 out_unregister_pppol2tp_proto:
         proto_unregister(&pppol2tp_sk_proto);
         goto out;
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 46339f6bcd00..038c1ef94d2e 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -529,9 +529,13 @@ static int tun_set_iff(struct file *file, struct ifreq *ifr)
 
         if (ifr->ifr_flags & IFF_NO_PI)
                 tun->flags |= TUN_NO_PI;
+        else
+                tun->flags &= ~TUN_NO_PI;
 
         if (ifr->ifr_flags & IFF_ONE_QUEUE)
                 tun->flags |= TUN_ONE_QUEUE;
+        else
+                tun->flags &= ~TUN_ONE_QUEUE;
 
         file->private_data = tun;
         tun->attached = 1;
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index 32a24f5c4fa6..08a011f0834a 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -724,6 +724,7 @@ struct b43_wldev {
         bool short_preamble;    /* TRUE, if short preamble is enabled. */
         bool short_slot;        /* TRUE, if short slot timing is enabled. */
         bool radio_hw_enable;   /* saved state of radio hardware enabled state */
+        bool suspend_in_progress;       /* TRUE, if we are in a suspend/resume cycle */
 
         /* PHY/Radio device. */
         struct b43_phy phy;
diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c
index 8a708b77925d..3dfb28a34be9 100644
--- a/drivers/net/wireless/b43/dma.c
+++ b/drivers/net/wireless/b43/dma.c
@@ -337,7 +337,7 @@ static inline int txring_to_priority(struct b43_dmaring *ring)
         return idx_to_prio[index];
 }
 
-u16 b43_dmacontroller_base(int dma64bit, int controller_idx)
+static u16 b43_dmacontroller_base(enum b43_dmatype type, int controller_idx)
 {
         static const u16 map64[] = {
                 B43_MMIO_DMA64_BASE0,
@@ -356,7 +356,7 @@ u16 b43_dmacontroller_base(int dma64bit, int controller_idx)
                 B43_MMIO_DMA32_BASE5,
         };
 
-        if (dma64bit) {
+        if (type == B43_DMA_64BIT) {
                 B43_WARN_ON(!(controller_idx >= 0 &&
                               controller_idx < ARRAY_SIZE(map64)));
                 return map64[controller_idx];
@@ -437,7 +437,7 @@ static int alloc_ringmemory(struct b43_dmaring *ring)
          * 02, which uses 64-bit DMA, needs the ring buffer in very low memory,
          * which accounts for the GFP_DMA flag below.
          */
-        if (ring->dma64)
+        if (ring->type == B43_DMA_64BIT)
                 flags |= GFP_DMA;
         ring->descbase = dma_alloc_coherent(dev, B43_DMA_RINGMEMSIZE,
                                             &(ring->dmabase), flags);
@@ -459,7 +459,8 @@ static void free_ringmemory(struct b43_dmaring *ring)
 }
 
 /* Reset the RX DMA channel */
-int b43_dmacontroller_rx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
+static int b43_dmacontroller_rx_reset(struct b43_wldev *dev, u16 mmio_base,
+                                      enum b43_dmatype type)
 {
         int i;
         u32 value;
@@ -467,12 +468,13 @@ int b43_dmacontroller_rx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
 
         might_sleep();
 
-        offset = dma64 ? B43_DMA64_RXCTL : B43_DMA32_RXCTL;
+        offset = (type == B43_DMA_64BIT) ? B43_DMA64_RXCTL : B43_DMA32_RXCTL;
         b43_write32(dev, mmio_base + offset, 0);
         for (i = 0; i < 10; i++) {
-                offset = dma64 ? B43_DMA64_RXSTATUS : B43_DMA32_RXSTATUS;
+                offset = (type == B43_DMA_64BIT) ? B43_DMA64_RXSTATUS :
+                                                   B43_DMA32_RXSTATUS;
                 value = b43_read32(dev, mmio_base + offset);
-                if (dma64) {
+                if (type == B43_DMA_64BIT) {
                         value &= B43_DMA64_RXSTAT;
                         if (value == B43_DMA64_RXSTAT_DISABLED) {
                                 i = -1;
@@ -496,7 +498,8 @@ int b43_dmacontroller_rx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
 }
 
 /* Reset the TX DMA channel */
-int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
+static int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base,
+                                      enum b43_dmatype type)
 {
         int i;
         u32 value;
@@ -505,9 +508,10 @@ int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
         might_sleep();
 
         for (i = 0; i < 10; i++) {
-                offset = dma64 ? B43_DMA64_TXSTATUS : B43_DMA32_TXSTATUS;
+                offset = (type == B43_DMA_64BIT) ? B43_DMA64_TXSTATUS :
+                                                   B43_DMA32_TXSTATUS;
                 value = b43_read32(dev, mmio_base + offset);
-                if (dma64) {
+                if (type == B43_DMA_64BIT) {
                         value &= B43_DMA64_TXSTAT;
                         if (value == B43_DMA64_TXSTAT_DISABLED ||
                             value == B43_DMA64_TXSTAT_IDLEWAIT ||
@@ -522,12 +526,13 @@ int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
                 }
                 msleep(1);
         }
-        offset = dma64 ? B43_DMA64_TXCTL : B43_DMA32_TXCTL;
+        offset = (type == B43_DMA_64BIT) ? B43_DMA64_TXCTL : B43_DMA32_TXCTL;
         b43_write32(dev, mmio_base + offset, 0);
         for (i = 0; i < 10; i++) {
-                offset = dma64 ? B43_DMA64_TXSTATUS : B43_DMA32_TXSTATUS;
+                offset = (type == B43_DMA_64BIT) ? B43_DMA64_TXSTATUS :
+                                                   B43_DMA32_TXSTATUS;
                 value = b43_read32(dev, mmio_base + offset);
-                if (dma64) {
+                if (type == B43_DMA_64BIT) {
                         value &= B43_DMA64_TXSTAT;
                         if (value == B43_DMA64_TXSTAT_DISABLED) {
                                 i = -1;
@@ -552,6 +557,33 @@ int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
         return 0;
 }
 
+/* Check if a DMA mapping address is invalid. */
+static bool b43_dma_mapping_error(struct b43_dmaring *ring,
+                                  dma_addr_t addr,
+                                  size_t buffersize)
+{
+        if (unlikely(dma_mapping_error(addr)))
+                return 1;
+
+        switch (ring->type) {
+        case B43_DMA_30BIT:
+                if ((u64)addr + buffersize > (1ULL << 30))
+                        return 1;
+                break;
+        case B43_DMA_32BIT:
+                if ((u64)addr + buffersize > (1ULL << 32))
+                        return 1;
+                break;
+        case B43_DMA_64BIT:
+                /* Currently we can't have addresses beyond
+                 * 64bit in the kernel. */
+                break;
+        }
+
+        /* The address is OK. */
+        return 0;
+}
+
 static int setup_rx_descbuffer(struct b43_dmaring *ring,
                                struct b43_dmadesc_generic *desc,
                                struct b43_dmadesc_meta *meta, gfp_t gfp_flags)
@@ -567,7 +599,7 @@ static int setup_rx_descbuffer(struct b43_dmaring *ring,
         if (unlikely(!skb))
                 return -ENOMEM;
         dmaaddr = map_descbuffer(ring, skb->data, ring->rx_buffersize, 0);
-        if (dma_mapping_error(dmaaddr)) {
+        if (b43_dma_mapping_error(ring, dmaaddr, ring->rx_buffersize)) {
                 /* ugh. try to realloc in zone_dma */
                 gfp_flags |= GFP_DMA;
 
@@ -580,7 +612,7 @@ static int setup_rx_descbuffer(struct b43_dmaring *ring,
                                          ring->rx_buffersize, 0);
         }
 
-        if (dma_mapping_error(dmaaddr)) {
+        if (b43_dma_mapping_error(ring, dmaaddr, ring->rx_buffersize)) {
                 dev_kfree_skb_any(skb);
                 return -EIO;
         }
@@ -645,7 +677,7 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
         u32 trans = ssb_dma_translation(ring->dev->dev);
 
         if (ring->tx) {
-                if (ring->dma64) {
+                if (ring->type == B43_DMA_64BIT) {
                         u64 ringbase = (u64) (ring->dmabase);
 
                         addrext = ((ringbase >> 32) & SSB_DMA_TRANSLATION_MASK)
@@ -677,7 +709,7 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
                 err = alloc_initial_descbuffers(ring);
                 if (err)
                         goto out;
-                if (ring->dma64) {
+                if (ring->type == B43_DMA_64BIT) {
                         u64 ringbase = (u64) (ring->dmabase);
 
                         addrext = ((ringbase >> 32) & SSB_DMA_TRANSLATION_MASK)
@@ -722,16 +754,16 @@ static void dmacontroller_cleanup(struct b43_dmaring *ring)
 {
         if (ring->tx) {
                 b43_dmacontroller_tx_reset(ring->dev, ring->mmio_base,
-                                           ring->dma64);
-                if (ring->dma64) {
+                                           ring->type);
+                if (ring->type == B43_DMA_64BIT) {
                         b43_dma_write(ring, B43_DMA64_TXRINGLO, 0);
                         b43_dma_write(ring, B43_DMA64_TXRINGHI, 0);
                 } else
                         b43_dma_write(ring, B43_DMA32_TXRING, 0);
         } else {
                 b43_dmacontroller_rx_reset(ring->dev, ring->mmio_base,
-                                           ring->dma64);
-                if (ring->dma64) {
+                                           ring->type);
+                if (ring->type == B43_DMA_64BIT) {
                         b43_dma_write(ring, B43_DMA64_RXRINGLO, 0);
                         b43_dma_write(ring, B43_DMA64_RXRINGHI, 0);
                 } else
@@ -786,7 +818,8 @@ static u64 supported_dma_mask(struct b43_wldev *dev)
 static
 struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
                                       int controller_index,
-                                      int for_tx, int dma64)
+                                      int for_tx,
+                                      enum b43_dmatype type)
 {
         struct b43_dmaring *ring;
         int err;
@@ -796,6 +829,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
         ring = kzalloc(sizeof(*ring), GFP_KERNEL);
         if (!ring)
                 goto out;
+        ring->type = type;
 
         nr_slots = B43_RXRING_SLOTS;
         if (for_tx)
@@ -818,7 +852,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
                                           b43_txhdr_size(dev),
                                           DMA_TO_DEVICE);
 
-                if (dma_mapping_error(dma_test)) {
+                if (b43_dma_mapping_error(ring, dma_test, b43_txhdr_size(dev))) {
                         /* ugh realloc */
                         kfree(ring->txhdr_cache);
                         ring->txhdr_cache = kcalloc(nr_slots,
@@ -832,7 +866,8 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
                                                   b43_txhdr_size(dev),
                                                   DMA_TO_DEVICE);
 
-                        if (dma_mapping_error(dma_test))
+                        if (b43_dma_mapping_error(ring, dma_test,
+                                                  b43_txhdr_size(dev)))
                                 goto err_kfree_txhdr_cache;
                 }
 
@@ -843,10 +878,9 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
 
         ring->dev = dev;
         ring->nr_slots = nr_slots;
-        ring->mmio_base = b43_dmacontroller_base(dma64, controller_index);
+        ring->mmio_base = b43_dmacontroller_base(type, controller_index);
         ring->index = controller_index;
-        ring->dma64 = !!dma64;
-        if (dma64)
+        if (type == B43_DMA_64BIT)
                 ring->ops = &dma64_ops;
         else
                 ring->ops = &dma32_ops;
@@ -896,8 +930,8 @@ static void b43_destroy_dmaring(struct b43_dmaring *ring)
         if (!ring)
                 return;
 
-        b43dbg(ring->dev->wl, "DMA-%s 0x%04X (%s) max used slots: %d/%d\n",
-               (ring->dma64) ? "64" : "32",
+        b43dbg(ring->dev->wl, "DMA-%u 0x%04X (%s) max used slots: %d/%d\n",
+               (unsigned int)(ring->type),
                ring->mmio_base,
                (ring->tx) ? "TX" : "RX", ring->max_used_slots, ring->nr_slots);
         /* Device IRQs are disabled prior entering this function,
@@ -941,12 +975,22 @@ int b43_dma_init(struct b43_wldev *dev)
         struct b43_dmaring *ring;
         int err;
         u64 dmamask;
-        int dma64 = 0;
+        enum b43_dmatype type;
 
         dmamask = supported_dma_mask(dev);
-        if (dmamask == DMA_64BIT_MASK)
-                dma64 = 1;
-
+        switch (dmamask) {
+        default:
+                B43_WARN_ON(1);
+        case DMA_30BIT_MASK:
+                type = B43_DMA_30BIT;
+                break;
+        case DMA_32BIT_MASK:
+                type = B43_DMA_32BIT;
+                break;
+        case DMA_64BIT_MASK:
+                type = B43_DMA_64BIT;
+                break;
+        }
         err = ssb_dma_set_mask(dev->dev, dmamask);
         if (err) {
                 b43err(dev->wl, "The machine/kernel does not support "
@@ -958,52 +1002,51 @@ int b43_dma_init(struct b43_wldev *dev)
 
         err = -ENOMEM;
         /* setup TX DMA channels. */
-        ring = b43_setup_dmaring(dev, 0, 1, dma64);
+        ring = b43_setup_dmaring(dev, 0, 1, type);
         if (!ring)
                 goto out;
         dma->tx_ring0 = ring;
 
-        ring = b43_setup_dmaring(dev, 1, 1, dma64);
+        ring = b43_setup_dmaring(dev, 1, 1, type);
         if (!ring)
                 goto err_destroy_tx0;
         dma->tx_ring1 = ring;
 
-        ring = b43_setup_dmaring(dev, 2, 1, dma64);
+        ring = b43_setup_dmaring(dev, 2, 1, type);
         if (!ring)
                 goto err_destroy_tx1;
         dma->tx_ring2 = ring;
 
-        ring = b43_setup_dmaring(dev, 3, 1, dma64);
+        ring = b43_setup_dmaring(dev, 3, 1, type);
         if (!ring)
                 goto err_destroy_tx2;
         dma->tx_ring3 = ring;
 
-        ring = b43_setup_dmaring(dev, 4, 1, dma64);
+        ring = b43_setup_dmaring(dev, 4, 1, type);
         if (!ring)
                 goto err_destroy_tx3;
         dma->tx_ring4 = ring;
 
-        ring = b43_setup_dmaring(dev, 5, 1, dma64);
+        ring = b43_setup_dmaring(dev, 5, 1, type);
         if (!ring)
                 goto err_destroy_tx4;
         dma->tx_ring5 = ring;
 
         /* setup RX DMA channels. */
-        ring = b43_setup_dmaring(dev, 0, 0, dma64);
+        ring = b43_setup_dmaring(dev, 0, 0, type);
         if (!ring)
                 goto err_destroy_tx5;
         dma->rx_ring0 = ring;
 
         if (dev->dev->id.revision < 5) {
-                ring = b43_setup_dmaring(dev, 3, 0, dma64);
+                ring = b43_setup_dmaring(dev, 3, 0, type);
                 if (!ring)
                         goto err_destroy_rx0;
                 dma->rx_ring3 = ring;
         }
 
-        b43dbg(dev->wl, "%d-bit DMA initialized\n",
-               (dmamask == DMA_64BIT_MASK) ? 64 :
-               (dmamask == DMA_32BIT_MASK) ? 32 : 30);
+        b43dbg(dev->wl, "%u-bit DMA initialized\n",
+               (unsigned int)type);
         err = 0;
       out:
         return err;
@@ -1146,7 +1189,7 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
 
         meta_hdr->dmaaddr = map_descbuffer(ring, (unsigned char *)header,
                                            hdrsize, 1);
-        if (dma_mapping_error(meta_hdr->dmaaddr)) {
+        if (b43_dma_mapping_error(ring, meta_hdr->dmaaddr, hdrsize)) {
                 ring->current_slot = old_top_slot;
                 ring->used_slots = old_used_slots;
                 return -EIO;
@@ -1165,7 +1208,7 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
 
         meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
         /* create a bounce buffer in zone_dma on mapping failure. */
-        if (dma_mapping_error(meta->dmaaddr)) {
+        if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len)) {
                 bounce_skb = __dev_alloc_skb(skb->len, GFP_ATOMIC | GFP_DMA);
                 if (!bounce_skb) {
                         ring->current_slot = old_top_slot;
@@ -1179,7 +1222,7 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
                 skb = bounce_skb;
                 meta->skb = skb;
                 meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
-                if (dma_mapping_error(meta->dmaaddr)) {
+                if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len)) {
                         ring->current_slot = old_top_slot;
                         ring->used_slots = old_used_slots;
                         err = -EIO;
diff --git a/drivers/net/wireless/b43/dma.h b/drivers/net/wireless/b43/dma.h
index 58db03ac536e..c0d6b69e6501 100644
--- a/drivers/net/wireless/b43/dma.h
+++ b/drivers/net/wireless/b43/dma.h
@@ -203,6 +203,12 @@ struct b43_dma_ops {
         void (*set_current_rxslot) (struct b43_dmaring * ring, int slot);
 };
 
+enum b43_dmatype {
+        B43_DMA_30BIT   = 30,
+        B43_DMA_32BIT   = 32,
+        B43_DMA_64BIT   = 64,
+};
+
 struct b43_dmaring {
         /* Lowlevel DMA ops. */
         const struct b43_dma_ops *ops;
@@ -235,8 +241,8 @@ struct b43_dmaring {
         int index;
         /* Boolean. Is this a TX ring? */
         bool tx;
-        /* Boolean. 64bit DMA if true, 32bit DMA otherwise. */
-        bool dma64;
+        /* The type of DMA engine used. */
+        enum b43_dmatype type;
         /* Boolean. Is this ring stopped at ieee80211 level? */
         bool stopped;
         /* Lock, only used for TX. */
@@ -255,8 +261,7 @@ static inline u32 b43_dma_read(struct b43_dmaring *ring, u16 offset)
         return b43_read32(ring->dev, ring->mmio_base + offset);
 }
 
-static inline
-    void b43_dma_write(struct b43_dmaring *ring, u16 offset, u32 value)
+static inline void b43_dma_write(struct b43_dmaring *ring, u16 offset, u32 value)
 {
         b43_write32(ring->dev, ring->mmio_base + offset, value);
 }
@@ -264,13 +269,6 @@ static inline
 int b43_dma_init(struct b43_wldev *dev);
 void b43_dma_free(struct b43_wldev *dev);
 
-int b43_dmacontroller_rx_reset(struct b43_wldev *dev,
-                               u16 dmacontroller_mmio_base, int dma64);
-int b43_dmacontroller_tx_reset(struct b43_wldev *dev,
-                               u16 dmacontroller_mmio_base, int dma64);
-
-u16 b43_dmacontroller_base(int dma64bit, int dmacontroller_idx);
-
 void b43_dma_tx_suspend(struct b43_wldev *dev);
 void b43_dma_tx_resume(struct b43_wldev *dev);
 
diff --git a/drivers/net/wireless/b43/leds.c b/drivers/net/wireless/b43/leds.c
index 4b590d8c65ff..0908335892db 100644
--- a/drivers/net/wireless/b43/leds.c
+++ b/drivers/net/wireless/b43/leds.c
@@ -116,7 +116,10 @@ static void b43_unregister_led(struct b43_led *led)
 {
         if (!led->dev)
                 return;
-        led_classdev_unregister(&led->led_dev);
+        if (led->dev->suspend_in_progress)
+                led_classdev_unregister_suspended(&led->led_dev);
+        else
+                led_classdev_unregister(&led->led_dev);
         b43_led_turn_off(led->dev, led->index, led->activelow);
         led->dev = NULL;
 }
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 64c154d080d8..ef65c41af00f 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -38,6 +38,7 @@
 #include <linux/wireless.h>
 #include <linux/workqueue.h>
 #include <linux/skbuff.h>
+#include <linux/io.h>
 #include <linux/dma-mapping.h>
 #include <asm/unaligned.h>
 
@@ -2554,10 +2555,10 @@ static int b43_rng_read(struct hwrng *rng, u32 * data)
         return (sizeof(u16));
 }
 
-static void b43_rng_exit(struct b43_wl *wl)
+static void b43_rng_exit(struct b43_wl *wl, bool suspended)
 {
         if (wl->rng_initialized)
-                hwrng_unregister(&wl->rng);
+                __hwrng_unregister(&wl->rng, suspended);
 }
 
 static int b43_rng_init(struct b43_wl *wl)
@@ -3417,8 +3418,10 @@ static void b43_wireless_core_exit(struct b43_wldev *dev)
         macctl |= B43_MACCTL_PSM_JMP0;
         b43_write32(dev, B43_MMIO_MACCTL, macctl);
 
-        b43_leds_exit(dev);
-        b43_rng_exit(dev->wl);
+        if (!dev->suspend_in_progress) {
+                b43_leds_exit(dev);
+                b43_rng_exit(dev->wl, false);
+        }
         b43_dma_free(dev);
         b43_chip_exit(dev);
         b43_radio_turn_off(dev, 1);
@@ -3534,11 +3537,13 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
         ssb_bus_powerup(bus, 1);        /* Enable dynamic PCTL */
         b43_upload_card_macaddress(dev);
         b43_security_init(dev);
-        b43_rng_init(wl);
+        if (!dev->suspend_in_progress)
+                b43_rng_init(wl);
 
         b43_set_status(dev, B43_STAT_INITIALIZED);
 
-        b43_leds_init(dev);
+        if (!dev->suspend_in_progress)
+                b43_leds_init(dev);
 out:
         return err;
 
@@ -4135,6 +4140,7 @@ static int b43_suspend(struct ssb_device *dev, pm_message_t state)
         b43dbg(wl, "Suspending...\n");
 
         mutex_lock(&wl->mutex);
+        wldev->suspend_in_progress = true;
         wldev->suspend_init_status = b43_status(wldev);
         if (wldev->suspend_init_status >= B43_STAT_STARTED)
                 b43_wireless_core_stop(wldev);
@@ -4166,15 +4172,17 @@ static int b43_resume(struct ssb_device *dev)
         if (wldev->suspend_init_status >= B43_STAT_STARTED) {
                 err = b43_wireless_core_start(wldev);
                 if (err) {
+                        b43_leds_exit(wldev);
+                        b43_rng_exit(wldev->wl, true);
                         b43_wireless_core_exit(wldev);
                         b43err(wl, "Resume failed at core start\n");
                         goto out;
                 }
         }
-        mutex_unlock(&wl->mutex);
-
         b43dbg(wl, "Device resumed.\n");
-      out:
+ out:
+        wldev->suspend_in_progress = false;
+        mutex_unlock(&wl->mutex);
         return err;
 }
 
diff --git a/drivers/net/wireless/b43legacy/dma.c b/drivers/net/wireless/b43legacy/dma.c
index 83161d9af813..6e08405e8026 100644
--- a/drivers/net/wireless/b43legacy/dma.c
+++ b/drivers/net/wireless/b43legacy/dma.c
@@ -1164,7 +1164,7 @@ static int dma_tx_fragment(struct b43legacy_dmaring *ring,
 {
         const struct b43legacy_dma_ops *ops = ring->ops;
         u8 *header;
-        int slot;
+        int slot, old_top_slot, old_used_slots;
         int err;
         struct b43legacy_dmadesc_generic *desc;
         struct b43legacy_dmadesc_meta *meta;
@@ -1174,6 +1174,9 @@ static int dma_tx_fragment(struct b43legacy_dmaring *ring,
 #define SLOTS_PER_PACKET  2
         B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags != 0);
 
+        old_top_slot = ring->current_slot;
+        old_used_slots = ring->used_slots;
+
         /* Get a slot for the header. */
         slot = request_slot(ring);
         desc = ops->idx2desc(ring, slot, &meta_hdr);
@@ -1181,9 +1184,14 @@ static int dma_tx_fragment(struct b43legacy_dmaring *ring,
 
         header = &(ring->txhdr_cache[slot * sizeof(
                                struct b43legacy_txhdr_fw3)]);
-        b43legacy_generate_txhdr(ring->dev, header,
+        err = b43legacy_generate_txhdr(ring->dev, header,
                                  skb->data, skb->len, ctl,
                                  generate_cookie(ring, slot));
+        if (unlikely(err)) {
+                ring->current_slot = old_top_slot;
+                ring->used_slots = old_used_slots;
+                return err;
+        }
 
         meta_hdr->dmaaddr = map_descbuffer(ring, (unsigned char *)header,
                                        sizeof(struct b43legacy_txhdr_fw3), 1);
@@ -1206,6 +1214,8 @@ static int dma_tx_fragment(struct b43legacy_dmaring *ring,
         if (dma_mapping_error(meta->dmaaddr)) {
                 bounce_skb = __dev_alloc_skb(skb->len, GFP_ATOMIC | GFP_DMA);
                 if (!bounce_skb) {
+                        ring->current_slot = old_top_slot;
+                        ring->used_slots = old_used_slots;
                         err = -ENOMEM;
                         goto out_unmap_hdr;
                 }
@@ -1216,6 +1226,8 @@ static int dma_tx_fragment(struct b43legacy_dmaring *ring,
                 meta->skb = skb;
                 meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
                 if (dma_mapping_error(meta->dmaaddr)) {
+                        ring->current_slot = old_top_slot;
+                        ring->used_slots = old_used_slots;
                         err = -EIO;
                         goto out_free_bounce;
                 }
@@ -1282,6 +1294,13 @@ int b43legacy_dma_tx(struct b43legacy_wldev *dev,
         B43legacy_BUG_ON(ring->stopped);
 
         err = dma_tx_fragment(ring, skb, ctl);
+        if (unlikely(err == -ENOKEY)) {
+                /* Drop this packet, as we don't have the encryption key
+                 * anymore and must not transmit it unencrypted. */
+                dev_kfree_skb_any(skb);
+                err = 0;
+                goto out_unlock;
+        }
         if (unlikely(err)) {
                 b43legacyerr(dev->wl, "DMA tx mapping failure\n");
                 goto out_unlock;
diff --git a/drivers/net/wireless/b43legacy/main.c b/drivers/net/wireless/b43legacy/main.c
index aa20d5d56e2f..53f7f2e97615 100644
--- a/drivers/net/wireless/b43legacy/main.c
+++ b/drivers/net/wireless/b43legacy/main.c
@@ -3160,8 +3160,6 @@ static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
 
         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
-        memset(wl->bssid, 0, ETH_ALEN);
-        memset(wl->mac_addr, 0, ETH_ALEN);
         b43legacy_upload_card_macaddress(dev);
         b43legacy_security_init(dev);
         b43legacy_rng_init(wl);
@@ -3263,6 +3261,13 @@ static int b43legacy_op_start(struct ieee80211_hw *hw)
          * LEDs that are registered later depend on it. */
         b43legacy_rfkill_init(dev);
 
+        /* Kill all old instance specific information to make sure
+         * the card won't use it in the short timeframe between start
+         * and mac80211 reconfiguring it. */
+        memset(wl->bssid, 0, ETH_ALEN);
+        memset(wl->mac_addr, 0, ETH_ALEN);
+        wl->filter_flags = 0;
+
         mutex_lock(&wl->mutex);
 
         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
diff --git a/drivers/net/wireless/b43legacy/pio.c b/drivers/net/wireless/b43legacy/pio.c
index e4f4c5c39e33..bcdd54eb2edb 100644
--- a/drivers/net/wireless/b43legacy/pio.c
+++ b/drivers/net/wireless/b43legacy/pio.c
@@ -181,7 +181,7 @@ union txhdr_union {
         struct b43legacy_txhdr_fw3 txhdr_fw3;
 };
 
-static void pio_tx_write_fragment(struct b43legacy_pioqueue *queue,
+static int pio_tx_write_fragment(struct b43legacy_pioqueue *queue,
                                   struct sk_buff *skb,
                                   struct b43legacy_pio_txpacket *packet,
                                   size_t txhdr_size)
@@ -189,14 +189,17 @@ static void pio_tx_write_fragment(struct b43legacy_pioqueue *queue,
         union txhdr_union txhdr_data;
         u8 *txhdr = NULL;
         unsigned int octets;
+        int err;
 
         txhdr = (u8 *)(&txhdr_data.txhdr_fw3);
 
         B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags != 0);
-        b43legacy_generate_txhdr(queue->dev,
+        err = b43legacy_generate_txhdr(queue->dev,
                                  txhdr, skb->data, skb->len,
                                  &packet->txstat.control,
                                  generate_cookie(queue, packet));
+        if (err)
+                return err;
 
         tx_start(queue);
         octets = skb->len + txhdr_size;
@@ -204,6 +207,8 @@ static void pio_tx_write_fragment(struct b43legacy_pioqueue *queue,
                 octets--;
         tx_data(queue, txhdr, (u8 *)skb->data, octets);
         tx_complete(queue, skb);
+
+        return 0;
 }
 
 static void free_txpacket(struct b43legacy_pio_txpacket *packet,
@@ -226,6 +231,7 @@ static int pio_tx_packet(struct b43legacy_pio_txpacket *packet)
         struct b43legacy_pioqueue *queue = packet->queue;
         struct sk_buff *skb = packet->skb;
         u16 octets;
+        int err;
 
         octets = (u16)skb->len + sizeof(struct b43legacy_txhdr_fw3);
         if (queue->tx_devq_size < octets) {
@@ -247,8 +253,14 @@ static int pio_tx_packet(struct b43legacy_pio_txpacket *packet)
         if (queue->tx_devq_used + octets > queue->tx_devq_size)
                 return -EBUSY;
         /* Now poke the device. */
-        pio_tx_write_fragment(queue, skb, packet,
+        err = pio_tx_write_fragment(queue, skb, packet,
                               sizeof(struct b43legacy_txhdr_fw3));
+        if (unlikely(err == -ENOKEY)) {
+                /* Drop this packet, as we don't have the encryption key
+                 * anymore and must not transmit it unencrypted. */
+                free_txpacket(packet, 1);
+                return 0;
+        }
 
         /* Account for the packet size.
          * (We must not overflow the device TX queue)
@@ -486,6 +498,9 @@ void b43legacy_pio_handle_txstatus(struct b43legacy_wldev *dev,
         queue = parse_cookie(dev, status->cookie, &packet);
         B43legacy_WARN_ON(!queue);
 
+        if (!packet->skb)
+                return;
+
         queue->tx_devq_packets--;
         queue->tx_devq_used -= (packet->skb->len +
                                 sizeof(struct b43legacy_txhdr_fw3));
diff --git a/drivers/net/wireless/b43legacy/xmit.c b/drivers/net/wireless/b43legacy/xmit.c
index e20c552442d5..d84408a82db9 100644
--- a/drivers/net/wireless/b43legacy/xmit.c
+++ b/drivers/net/wireless/b43legacy/xmit.c
@@ -181,7 +181,7 @@ static u8 b43legacy_calc_fallback_rate(u8 bitrate)
         return 0;
 }
 
-static void generate_txhdr_fw3(struct b43legacy_wldev *dev,
+static int generate_txhdr_fw3(struct b43legacy_wldev *dev,
                                struct b43legacy_txhdr_fw3 *txhdr,
                                const unsigned char *fragment_data,
                                unsigned int fragment_len,
@@ -252,6 +252,13 @@ static void generate_txhdr_fw3(struct b43legacy_wldev *dev,
                         iv_len = min((size_t)txctl->iv_len,
                                      ARRAY_SIZE(txhdr->iv));
                         memcpy(txhdr->iv, ((u8 *)wlhdr) + wlhdr_len, iv_len);
+                } else {
+                        /* This key is invalid. This might only happen
+                         * in a short timeframe after machine resume before
+                         * we were able to reconfigure keys.
+                         * Drop this packet completely. Do not transmit it
+                         * unencrypted to avoid leaking information. */
+                        return -ENOKEY;
                 }
         }
         b43legacy_generate_plcp_hdr((struct b43legacy_plcp_hdr4 *)
@@ -345,16 +352,18 @@ static void generate_txhdr_fw3(struct b43legacy_wldev *dev,
         /* Apply the bitfields */
         txhdr->mac_ctl = cpu_to_le32(mac_ctl);
         txhdr->phy_ctl = cpu_to_le16(phy_ctl);
+
+        return 0;
 }
 
-void b43legacy_generate_txhdr(struct b43legacy_wldev *dev,
+int b43legacy_generate_txhdr(struct b43legacy_wldev *dev,
                               u8 *txhdr,
                               const unsigned char *fragment_data,
                               unsigned int fragment_len,
                               const struct ieee80211_tx_control *txctl,
                               u16 cookie)
 {
-        generate_txhdr_fw3(dev, (struct b43legacy_txhdr_fw3 *)txhdr,
+        return generate_txhdr_fw3(dev, (struct b43legacy_txhdr_fw3 *)txhdr,
                            fragment_data, fragment_len,
                            txctl, cookie);
 }
diff --git a/drivers/net/wireless/b43legacy/xmit.h b/drivers/net/wireless/b43legacy/xmit.h
index 8a155d0a5d1f..bab47928a0c9 100644
--- a/drivers/net/wireless/b43legacy/xmit.h
+++ b/drivers/net/wireless/b43legacy/xmit.h
@@ -76,7 +76,7 @@ struct b43legacy_txhdr_fw3 {
 
 
 
-void b43legacy_generate_txhdr(struct b43legacy_wldev *dev,
+int b43legacy_generate_txhdr(struct b43legacy_wldev *dev,
                               u8 *txhdr,
                               const unsigned char *fragment_data,
                               unsigned int fragment_len,
diff --git a/drivers/net/wireless/ipw2100.c b/drivers/net/wireless/ipw2100.c
index 2ab107f45793..5bf9e00b070c 100644
--- a/drivers/net/wireless/ipw2100.c
+++ b/drivers/net/wireless/ipw2100.c
@@ -162,7 +162,7 @@ that only one external action is invoked at a time.
 #include <linux/firmware.h>
 #include <linux/acpi.h>
 #include <linux/ctype.h>
-#include <linux/latency.h>
+#include <linux/pm_qos_params.h>
 
 #include "ipw2100.h"
 
@@ -1701,7 +1701,7 @@ static int ipw2100_up(struct ipw2100_priv *priv, int deferred)
         /* the ipw2100 hardware really doesn't want power management delays
          * longer than 175usec
          */
-        modify_acceptable_latency("ipw2100", 175);
+        pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY, "ipw2100", 175);
 
         /* If the interrupt is enabled, turn it off... */
         spin_lock_irqsave(&priv->low_lock, flags);
@@ -1856,7 +1856,8 @@ static void ipw2100_down(struct ipw2100_priv *priv)
         ipw2100_disable_interrupts(priv);
         spin_unlock_irqrestore(&priv->low_lock, flags);
 
-        modify_acceptable_latency("ipw2100", INFINITE_LATENCY);
+        pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY, "ipw2100",
+                        PM_QOS_DEFAULT_VALUE);
 
         /* We have to signal any supplicant if we are disassociating */
         if (associated)
@@ -6554,7 +6555,8 @@ static int __init ipw2100_init(void)
         if (ret)
                 goto out;
 
-        set_acceptable_latency("ipw2100", INFINITE_LATENCY);
+        pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, "ipw2100",
+                        PM_QOS_DEFAULT_VALUE);
 #ifdef CONFIG_IPW2100_DEBUG
         ipw2100_debug_level = debug;
         ret = driver_create_file(&ipw2100_pci_driver.driver,
@@ -6576,7 +6578,7 @@ static void __exit ipw2100_exit(void)
                            &driver_attr_debug_level);
 #endif
         pci_unregister_driver(&ipw2100_pci_driver);
-        remove_acceptable_latency("ipw2100");
+        pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, "ipw2100");
 }
 
 module_init(ipw2100_init);
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c
index f55c75712b55..5ee1ad69898b 100644
--- a/drivers/net/wireless/iwlwifi/iwl3945-base.c
+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c
@@ -4207,13 +4207,13 @@ static u8 ratio2dB[100] = {
  * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
 int iwl3945_calc_db_from_ratio(int sig_ratio)
 {
-        /* Anything above 1000:1 just report as 60 dB */
-        if (sig_ratio > 1000)
+        /* 1000:1 or higher just report as 60 dB */
+        if (sig_ratio >= 1000)
                 return 60;
 
-        /* Above 100:1, divide by 10 and use table,
+        /* 100:1 or higher, divide by 10 and use table,
          *   add 20 dB to make up for divide by 10 */
-        if (sig_ratio > 100)
+        if (sig_ratio >= 100)
                 return (20 + (int)ratio2dB[sig_ratio/10]);
 
         /* We shouldn't see this */
diff --git a/drivers/net/wireless/netwave_cs.c b/drivers/net/wireless/netwave_cs.c
index d2fa079fbc4c..f479c1af6782 100644
--- a/drivers/net/wireless/netwave_cs.c
+++ b/drivers/net/wireless/netwave_cs.c
@@ -195,7 +195,7 @@ static int netwave_pcmcia_config(struct pcmcia_device *arg); /* Runs after card
 static void netwave_detach(struct pcmcia_device *p_dev);    /* Destroy instance */
 
 /* Hardware configuration */
-static void netwave_doreset(kio_addr_t iobase, u_char __iomem *ramBase);
+static void netwave_doreset(unsigned int iobase, u_char __iomem *ramBase);
 static void netwave_reset(struct net_device *dev);
 
 /* Misc device stuff */
@@ -309,7 +309,7 @@ static inline void wait_WOC(unsigned int iobase)
 }
 
 static void netwave_snapshot(netwave_private *priv, u_char __iomem *ramBase, 
-                             kio_addr_t iobase) {
+                             unsigned int iobase) {
     u_short resultBuffer;
 
     /* if time since last snapshot is > 1 sec. (100 jiffies?)  then take 
@@ -340,7 +340,7 @@ static void netwave_snapshot(netwave_private *priv, u_char __iomem *ramBase,
 static struct iw_statistics *netwave_get_wireless_stats(struct net_device *dev)
 {       
     unsigned long flags;
-    kio_addr_t iobase = dev->base_addr;
+    unsigned int iobase = dev->base_addr;
     netwave_private *priv = netdev_priv(dev);
     u_char __iomem *ramBase = priv->ramBase;
     struct iw_statistics* wstats;
@@ -471,7 +471,7 @@ static int netwave_set_nwid(struct net_device *dev,
                             char *extra)
 {
         unsigned long flags;
-        kio_addr_t iobase = dev->base_addr;
+        unsigned int iobase = dev->base_addr;
         netwave_private *priv = netdev_priv(dev);
         u_char __iomem *ramBase = priv->ramBase;
 
@@ -518,7 +518,7 @@ static int netwave_set_scramble(struct net_device *dev,
                                 char *key)
 {
         unsigned long flags;
-        kio_addr_t iobase = dev->base_addr;
+        unsigned int iobase = dev->base_addr;
         netwave_private *priv = netdev_priv(dev);
         u_char __iomem *ramBase = priv->ramBase;
 
@@ -621,7 +621,7 @@ static int netwave_get_snap(struct net_device *dev,
                             char *extra)
 {
         unsigned long flags;
-        kio_addr_t iobase = dev->base_addr;
+        unsigned int iobase = dev->base_addr;
         netwave_private *priv = netdev_priv(dev);
         u_char __iomem *ramBase = priv->ramBase;
 
@@ -874,7 +874,7 @@ static int netwave_resume(struct pcmcia_device *link)
  *
  *    Proper hardware reset of the card.
  */
-static void netwave_doreset(kio_addr_t ioBase, u_char __iomem *ramBase)
+static void netwave_doreset(unsigned int ioBase, u_char __iomem *ramBase)
 {
     /* Reset card */
     wait_WOC(ioBase);
@@ -892,7 +892,7 @@ static void netwave_reset(struct net_device *dev) {
     /* u_char state; */
     netwave_private *priv = netdev_priv(dev);
     u_char __iomem *ramBase = priv->ramBase;
-    kio_addr_t iobase = dev->base_addr;
+    unsigned int iobase = dev->base_addr;
 
     DEBUG(0, "netwave_reset: Done with hardware reset\n");
 
@@ -973,7 +973,7 @@ static int netwave_hw_xmit(unsigned char* data, int len,
         
     netwave_private *priv = netdev_priv(dev);
     u_char __iomem * ramBase = priv->ramBase;
-    kio_addr_t iobase = dev->base_addr;
+    unsigned int iobase = dev->base_addr;
 
     /* Disable interrupts & save flags */
     spin_lock_irqsave(&priv->spinlock, flags);
@@ -1065,7 +1065,7 @@ static int netwave_start_xmit(struct sk_buff *skb, struct net_device *dev) {
  */
 static irqreturn_t netwave_interrupt(int irq, void* dev_id)
 {
-    kio_addr_t iobase;
+    unsigned int iobase;
     u_char __iomem *ramBase;
     struct net_device *dev = (struct net_device *)dev_id;
     struct netwave_private *priv = netdev_priv(dev);
@@ -1235,7 +1235,7 @@ static int netwave_rx(struct net_device *dev)
 {
     netwave_private *priv = netdev_priv(dev);
     u_char __iomem *ramBase = priv->ramBase;
-    kio_addr_t iobase = dev->base_addr;
+    unsigned int iobase = dev->base_addr;
     u_char rxStatus;
     struct sk_buff *skb = NULL;
     unsigned int curBuffer,
@@ -1388,7 +1388,7 @@ module_exit(exit_netwave_cs);
  */
 static void set_multicast_list(struct net_device *dev)
 {
-    kio_addr_t iobase = dev->base_addr;
+    unsigned int iobase = dev->base_addr;
     netwave_private *priv = netdev_priv(dev);
     u_char __iomem * ramBase = priv->ramBase;
     u_char  rcvMode = 0;
diff --git a/drivers/net/wireless/wavelan_cs.c b/drivers/net/wireless/wavelan_cs.c
index c2037b2a05bf..06eea6ab7bf0 100644
--- a/drivers/net/wireless/wavelan_cs.c
+++ b/drivers/net/wireless/wavelan_cs.c
@@ -149,7 +149,7 @@ psa_write(struct net_device *	dev,
   net_local *lp = netdev_priv(dev);
   u_char __iomem *ptr = lp->mem + PSA_ADDR + (o << 1);
   int           count = 0;
-  kio_addr_t    base = dev->base_addr;
+  unsigned int  base = dev->base_addr;
   /* As there seem to have no flag PSA_BUSY as in the ISA model, we are
    * oblige to verify this address to know when the PSA is ready... */
   volatile u_char __iomem *verify = lp->mem + PSA_ADDR +
@@ -708,7 +708,7 @@ static void wl_update_history(wavepoint_history *wavepoint, unsigned char sigqua
 /* Perform a handover to a new WavePoint */
 static void wv_roam_handover(wavepoint_history *wavepoint, net_local *lp)
 {
-  kio_addr_t            base = lp->dev->base_addr;
+  unsigned int          base = lp->dev->base_addr;
   mm_t                  m;
   unsigned long         flags;
 
@@ -821,7 +821,7 @@ wv_82593_cmd(struct net_device *	dev,
              int        cmd,
              int        result)
 {
-  kio_addr_t    base = dev->base_addr;
+  unsigned int  base = dev->base_addr;
   int           status;
   int           wait_completed;
   long          spin;
@@ -945,7 +945,7 @@ read_ringbuf(struct net_device *	dev,
              char *     buf,
              int        len)
 {
-  kio_addr_t    base = dev->base_addr;
+  unsigned int  base = dev->base_addr;
   int           ring_ptr = addr;
   int           chunk_len;
   char *        buf_ptr = buf;
@@ -1096,7 +1096,7 @@ wv_psa_show(psa_t *	p)
 static void
 wv_mmc_show(struct net_device * dev)
 {
-  kio_addr_t    base = dev->base_addr;
+  unsigned int  base = dev->base_addr;
   net_local *   lp = netdev_priv(dev);
   mmr_t         m;
 
@@ -1275,7 +1275,7 @@ wv_packet_info(u_char *		p,		/* Packet to dump */
 static inline void
 wv_init_info(struct net_device *        dev)
 {
-  kio_addr_t    base = dev->base_addr;
+  unsigned int  base = dev->base_addr;
   psa_t         psa;
   DECLARE_MAC_BUF(mac);
 
@@ -1294,7 +1294,7 @@ wv_init_info(struct net_device *	dev)
 
 #ifdef DEBUG_BASIC_SHOW
   /* Now, let's go for the basic stuff */
-  printk(KERN_NOTICE "%s: WaveLAN: port %#lx, irq %d, "
+  printk(KERN_NOTICE "%s: WaveLAN: port %#x, irq %d, "
          "hw_addr %s",
          dev->name, base, dev->irq,
          print_mac(mac, dev->dev_addr));
@@ -1828,7 +1828,7 @@ static int wavelan_set_nwid(struct net_device *dev,
                             union iwreq_data *wrqu,
                             char *extra)
 {
-        kio_addr_t base = dev->base_addr;
+        unsigned int base = dev->base_addr;
         net_local *lp = netdev_priv(dev);
         psa_t psa;
         mm_t m;
@@ -1918,7 +1918,7 @@ static int wavelan_set_freq(struct net_device *dev,
                             union iwreq_data *wrqu,
                             char *extra)
 {
-        kio_addr_t base = dev->base_addr;
+        unsigned int base = dev->base_addr;
         net_local *lp = netdev_priv(dev);
         unsigned long flags;
         int ret;
@@ -1948,7 +1948,7 @@ static int wavelan_get_freq(struct net_device *dev,
                             union iwreq_data *wrqu,
                             char *extra)
 {
-        kio_addr_t base = dev->base_addr;
+        unsigned int base = dev->base_addr;
         net_local *lp = netdev_priv(dev);
         psa_t psa;
         unsigned long flags;
@@ -1994,7 +1994,7 @@ static int wavelan_set_sens(struct net_device *dev,
                             union iwreq_data *wrqu,
                             char *extra)
 {
-        kio_addr_t base = dev->base_addr;
+        unsigned int base = dev->base_addr;
         net_local *lp = netdev_priv(dev);
         psa_t psa;
         unsigned long flags;
@@ -2060,7 +2060,7 @@ static int wavelan_set_encode(struct net_device *dev,
                               union iwreq_data *wrqu,
                               char *extra)
 {
-        kio_addr_t base = dev->base_addr;
+        unsigned int base = dev->base_addr;
         net_local *lp = netdev_priv(dev);
         unsigned long flags;
         psa_t psa;
@@ -2130,7 +2130,7 @@ static int wavelan_get_encode(struct net_device *dev,
                               union iwreq_data *wrqu,
                               char *extra)
 {
-        kio_addr_t base = dev->base_addr;
+        unsigned int base = dev->base_addr;
         net_local *lp = netdev_priv(dev);
         psa_t psa;
         unsigned long flags;
@@ -2349,7 +2349,7 @@ static int wavelan_get_range(struct net_device *dev,
                              union iwreq_data *wrqu,
                              char *extra)
 {
-        kio_addr_t base = dev->base_addr;
+        unsigned int base = dev->base_addr;
         net_local *lp = netdev_priv(dev);
         struct iw_range *range = (struct iw_range *) extra;
         unsigned long flags;
@@ -2425,7 +2425,7 @@ static int wavelan_set_qthr(struct net_device *dev,
                             union iwreq_data *wrqu,
                             char *extra)
 {
-        kio_addr_t base = dev->base_addr;
+        unsigned int base = dev->base_addr;
         net_local *lp = netdev_priv(dev);
         psa_t psa;
         unsigned long flags;
@@ -2701,7 +2701,7 @@ static const struct iw_handler_def	wavelan_handler_def =
 static iw_stats *
 wavelan_get_wireless_stats(struct net_device *  dev)
 {
-  kio_addr_t            base = dev->base_addr;
+  unsigned int          base = dev->base_addr;
   net_local *           lp = netdev_priv(dev);
   mmr_t                 m;
   iw_stats *            wstats;
@@ -2764,7 +2764,7 @@ wv_start_of_frame(struct net_device *	dev,
                   int           rfp,    /* end of frame */
                   int           wrap)   /* start of buffer */
 {
-  kio_addr_t    base = dev->base_addr;
+  unsigned int  base = dev->base_addr;
   int           rp;
   int           len;
 
@@ -2925,7 +2925,7 @@ wv_packet_read(struct net_device *		dev,
 static inline void
 wv_packet_rcv(struct net_device *       dev)
 {
-  kio_addr_t    base = dev->base_addr;
+  unsigned int  base = dev->base_addr;
   net_local *   lp = netdev_priv(dev);
   int           newrfp;
   int           rp;
@@ -3062,7 +3062,7 @@ wv_packet_write(struct net_device *	dev,
                 short           length)
 {
   net_local *           lp = netdev_priv(dev);
-  kio_addr_t            base = dev->base_addr;
+  unsigned int          base = dev->base_addr;
   unsigned long         flags;
   int                   clen = length;
   register u_short      xmtdata_base = TX_BASE;
@@ -3183,7 +3183,7 @@ wavelan_packet_xmit(struct sk_buff *	skb,
 static inline int
 wv_mmc_init(struct net_device * dev)
 {
-  kio_addr_t    base = dev->base_addr;
+  unsigned int  base = dev->base_addr;
   psa_t         psa;
   mmw_t         m;
   int           configured;
@@ -3377,7 +3377,7 @@ wv_mmc_init(struct net_device *	dev)
 static int
 wv_ru_stop(struct net_device *  dev)
 {
-  kio_addr_t    base = dev->base_addr;
+  unsigned int  base = dev->base_addr;
   net_local *   lp = netdev_priv(dev);
   unsigned long flags;
   int           status;
@@ -3440,7 +3440,7 @@ wv_ru_stop(struct net_device *	dev)
 static int
 wv_ru_start(struct net_device * dev)
 {
-  kio_addr_t    base = dev->base_addr;
+  unsigned int  base = dev->base_addr;
   net_local *   lp = netdev_priv(dev);
   unsigned long flags;
 
@@ -3528,7 +3528,7 @@ wv_ru_start(struct net_device *	dev)
 static int
 wv_82593_config(struct net_device *     dev)
 {
-  kio_addr_t                    base = dev->base_addr;
+  unsigned int                  base = dev->base_addr;
   net_local *                   lp = netdev_priv(dev);
   struct i82593_conf_block      cfblk;
   int                           ret = TRUE;
@@ -3765,7 +3765,7 @@ static int
 wv_hw_config(struct net_device *        dev)
 {
   net_local *           lp = netdev_priv(dev);
-  kio_addr_t            base = dev->base_addr;
+  unsigned int          base = dev->base_addr;
   unsigned long         flags;
   int                   ret = FALSE;
 
@@ -4047,7 +4047,7 @@ wavelan_interrupt(int		irq,
 {
   struct net_device *   dev = dev_id;
   net_local *   lp;
-  kio_addr_t    base;
+  unsigned int  base;
   int           status0;
   u_int         tx_status;
 
@@ -4306,7 +4306,7 @@ static void
 wavelan_watchdog(struct net_device *    dev)
 {
   net_local *           lp = netdev_priv(dev);
-  kio_addr_t            base = dev->base_addr;
+  unsigned int          base = dev->base_addr;
   unsigned long         flags;
   int                   aborted = FALSE;
 
@@ -4382,7 +4382,7 @@ wavelan_open(struct net_device *	dev)
 {
   net_local *   lp = netdev_priv(dev);
   struct pcmcia_device *        link = lp->link;
-  kio_addr_t    base = dev->base_addr;
+  unsigned int  base = dev->base_addr;
 
 #ifdef DEBUG_CALLBACK_TRACE
   printk(KERN_DEBUG "%s: ->wavelan_open(dev=0x%x)\n", dev->name,
@@ -4436,7 +4436,7 @@ static int
 wavelan_close(struct net_device *       dev)
 {
   struct pcmcia_device *        link = ((net_local *)netdev_priv(dev))->link;
-  kio_addr_t    base = dev->base_addr;
+  unsigned int  base = dev->base_addr;
 
 #ifdef DEBUG_CALLBACK_TRACE
   printk(KERN_DEBUG "%s: ->wavelan_close(dev=0x%x)\n", dev->name,
diff --git a/drivers/nubus/Makefile b/drivers/nubus/Makefile
index f5ef03cf9879..21bda2031e7e 100644
--- a/drivers/nubus/Makefile
+++ b/drivers/nubus/Makefile
@@ -4,5 +4,4 @@
 
 obj-y   := nubus.o
 
-obj-$(CONFIG_MODULES) += nubus_syms.o 
 obj-$(CONFIG_PROC_FS) += proc.o
diff --git a/drivers/nubus/nubus.c b/drivers/nubus/nubus.c
index f4076aeb2098..2f047e573d86 100644
--- a/drivers/nubus/nubus.c
+++ b/drivers/nubus/nubus.c
@@ -14,6 +14,7 @@
 #include <linux/errno.h>
 #include <linux/init.h>
 #include <linux/delay.h>
+#include <linux/module.h>
 #include <asm/setup.h>
 #include <asm/system.h>
 #include <asm/page.h>
@@ -186,6 +187,7 @@ void nubus_get_rsrc_mem(void *dest, const struct nubus_dirent* dirent,
                 len--;
         }
 }
+EXPORT_SYMBOL(nubus_get_rsrc_mem);
 
 void nubus_get_rsrc_str(void *dest, const struct nubus_dirent* dirent,
                         int len)
@@ -200,6 +202,7 @@ void nubus_get_rsrc_str(void *dest, const struct nubus_dirent* dirent,
                 len--;
         }
 }
+EXPORT_SYMBOL(nubus_get_rsrc_str);
 
 int nubus_get_root_dir(const struct nubus_board* board,
                        struct nubus_dir* dir)
@@ -209,6 +212,7 @@ int nubus_get_root_dir(const struct nubus_board* board,
         dir->mask = board->lanes;
         return 0;
 }
+EXPORT_SYMBOL(nubus_get_root_dir);
 
 /* This is a slyly renamed version of the above */
 int nubus_get_func_dir(const struct nubus_dev* dev,
@@ -219,6 +223,7 @@ int nubus_get_func_dir(const struct nubus_dev* dev,
         dir->mask = dev->board->lanes;
         return 0;
 }
+EXPORT_SYMBOL(nubus_get_func_dir);
 
 int nubus_get_board_dir(const struct nubus_board* board,
                         struct nubus_dir* dir)
@@ -237,6 +242,7 @@ int nubus_get_board_dir(const struct nubus_board* board,
                 return -1;
         return 0;
 }
+EXPORT_SYMBOL(nubus_get_board_dir);
 
 int nubus_get_subdir(const struct nubus_dirent *ent,
                      struct nubus_dir *dir)
@@ -246,6 +252,7 @@ int nubus_get_subdir(const struct nubus_dirent *ent,
         dir->mask = ent->mask;
         return 0;
 }
+EXPORT_SYMBOL(nubus_get_subdir);
 
 int nubus_readdir(struct nubus_dir *nd, struct nubus_dirent *ent)
 {
@@ -274,12 +281,14 @@ int nubus_readdir(struct nubus_dir *nd, struct nubus_dirent *ent)
         ent->mask  = nd->mask;
         return 0;
 }
+EXPORT_SYMBOL(nubus_readdir);
 
 int nubus_rewinddir(struct nubus_dir* dir)
 {
         dir->ptr = dir->base;
         return 0;
 }
+EXPORT_SYMBOL(nubus_rewinddir);
 
 /* Driver interface functions, more or less like in pci.c */
 
@@ -303,6 +312,7 @@ nubus_find_device(unsigned short category,
         }
         return NULL;
 }
+EXPORT_SYMBOL(nubus_find_device);
 
 struct nubus_dev*
 nubus_find_type(unsigned short category,
@@ -320,6 +330,7 @@ nubus_find_type(unsigned short category,
         }
         return NULL;
 }
+EXPORT_SYMBOL(nubus_find_type);
 
 struct nubus_dev*
 nubus_find_slot(unsigned int slot,
@@ -335,6 +346,7 @@ nubus_find_slot(unsigned int slot,
         }
         return NULL;
 }
+EXPORT_SYMBOL(nubus_find_slot);
 
 int
 nubus_find_rsrc(struct nubus_dir* dir, unsigned char rsrc_type,
@@ -346,6 +358,7 @@ nubus_find_rsrc(struct nubus_dir* dir, unsigned char rsrc_type,
         }       
         return -1;
 }
+EXPORT_SYMBOL(nubus_find_rsrc);
 
 /* Initialization functions - decide which slots contain stuff worth
    looking at, and print out lots and lots of information from the
diff --git a/drivers/nubus/nubus_syms.c b/drivers/nubus/nubus_syms.c
deleted file mode 100644
index 9204f04fbf0b..000000000000
--- a/drivers/nubus/nubus_syms.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/* Exported symbols for NuBus services
-
-   (c) 1999 David Huggins-Daines <dhd@debian.org> */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/nubus.h>
-
-#ifdef CONFIG_PROC_FS
-EXPORT_SYMBOL(nubus_proc_attach_device);
-EXPORT_SYMBOL(nubus_proc_detach_device);
-#endif
-
-MODULE_LICENSE("GPL");
-
-EXPORT_SYMBOL(nubus_find_device);
-EXPORT_SYMBOL(nubus_find_type);
-EXPORT_SYMBOL(nubus_find_slot);
-EXPORT_SYMBOL(nubus_get_root_dir);
-EXPORT_SYMBOL(nubus_get_board_dir);
-EXPORT_SYMBOL(nubus_get_func_dir);
-EXPORT_SYMBOL(nubus_readdir);
-EXPORT_SYMBOL(nubus_find_rsrc);
-EXPORT_SYMBOL(nubus_rewinddir);
-EXPORT_SYMBOL(nubus_get_subdir);
-EXPORT_SYMBOL(nubus_get_rsrc_mem);
-EXPORT_SYMBOL(nubus_get_rsrc_str);
-
diff --git a/drivers/nubus/proc.c b/drivers/nubus/proc.c
index 5271a4a7af26..e07492be1f4a 100644
--- a/drivers/nubus/proc.c
+++ b/drivers/nubus/proc.c
@@ -22,6 +22,8 @@
 #include <linux/nubus.h>
 #include <linux/proc_fs.h>
 #include <linux/init.h>
+#include <linux/module.h>
+
 #include <asm/uaccess.h>
 #include <asm/byteorder.h>
 
@@ -140,6 +142,7 @@ int nubus_proc_attach_device(struct nubus_dev *dev)
 
         return 0;
 }
+EXPORT_SYMBOL(nubus_proc_attach_device);
 
 /* FIXME: this is certainly broken! */
 int nubus_proc_detach_device(struct nubus_dev *dev)
@@ -154,6 +157,7 @@ int nubus_proc_detach_device(struct nubus_dev *dev)
         }
         return 0;
 }
+EXPORT_SYMBOL(nubus_proc_detach_device);
 
 void __init proc_bus_nubus_add_devices(void)
 {
diff --git a/drivers/parisc/ccio-dma.c b/drivers/parisc/ccio-dma.c
index ca52307b8f40..d08b284de196 100644
--- a/drivers/parisc/ccio-dma.c
+++ b/drivers/parisc/ccio-dma.c
@@ -941,7 +941,7 @@ ccio_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
         ** w/o this association, we wouldn't have coherent DMA!
         ** Access to the virtual address is what forces a two pass algorithm.
         */
-        coalesced = iommu_coalesce_chunks(ioc, sglist, nents, ccio_alloc_range);
+        coalesced = iommu_coalesce_chunks(ioc, dev, sglist, nents, ccio_alloc_range);
 
         /*
         ** Program the I/O Pdir
diff --git a/drivers/parisc/iommu-helpers.h b/drivers/parisc/iommu-helpers.h
index 0a1f99a2e93e..97ba8286c596 100644
--- a/drivers/parisc/iommu-helpers.h
+++ b/drivers/parisc/iommu-helpers.h
@@ -95,12 +95,14 @@ iommu_fill_pdir(struct ioc *ioc, struct scatterlist *startsg, int nents,
 */
 
 static inline unsigned int
-iommu_coalesce_chunks(struct ioc *ioc, struct scatterlist *startsg, int nents,
+iommu_coalesce_chunks(struct ioc *ioc, struct device *dev,
+                      struct scatterlist *startsg, int nents,
                       int (*iommu_alloc_range)(struct ioc *, size_t))
 {
         struct scatterlist *contig_sg;     /* contig chunk head */
         unsigned long dma_offset, dma_len; /* start/len of DMA stream */
         unsigned int n_mappings = 0;
+        unsigned int max_seg_size = dma_get_max_seg_size(dev);
 
         while (nents > 0) {
 
@@ -142,6 +144,9 @@ iommu_coalesce_chunks(struct ioc *ioc, struct scatterlist *startsg, int nents,
                                             IOVP_SIZE) > DMA_CHUNK_SIZE))
                                 break;
 
+                        if (startsg->length + dma_len > max_seg_size)
+                                break;
+
                         /*
                         ** Next see if we can append the next chunk (i.e.
                         ** it must end on one page and begin on another
diff --git a/drivers/parisc/sba_iommu.c b/drivers/parisc/sba_iommu.c
index e527a0e1d6c0..d06627c3f353 100644
--- a/drivers/parisc/sba_iommu.c
+++ b/drivers/parisc/sba_iommu.c
@@ -946,7 +946,7 @@ sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
         ** w/o this association, we wouldn't have coherent DMA!
         ** Access to the virtual address is what forces a two pass algorithm.
         */
-        coalesced = iommu_coalesce_chunks(ioc, sglist, nents, sba_alloc_range);
+        coalesced = iommu_coalesce_chunks(ioc, dev, sglist, nents, sba_alloc_range);
 
         /*
         ** Program the I/O Pdir
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 04aac7782468..ae3df46eaabf 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1451,6 +1451,22 @@ pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
 }
 #endif
 
+#ifndef HAVE_ARCH_PCI_SET_DMA_MAX_SEGMENT_SIZE
+int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size)
+{
+        return dma_set_max_seg_size(&dev->dev, size);
+}
+EXPORT_SYMBOL(pci_set_dma_max_seg_size);
+#endif
+
+#ifndef HAVE_ARCH_PCI_SET_DMA_SEGMENT_BOUNDARY
+int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask)
+{
+        return dma_set_seg_boundary(&dev->dev, mask);
+}
+EXPORT_SYMBOL(pci_set_dma_seg_boundary);
+#endif
+
 /**
  * pcix_get_max_mmrbc - get PCI-X maximum designed memory read byte count
  * @dev: PCI device to query
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 7f5dab34d315..4d23b9fb551b 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -933,8 +933,12 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
 
         set_dev_node(&dev->dev, pcibus_to_node(bus));
         dev->dev.dma_mask = &dev->dma_mask;
+        dev->dev.dma_parms = &dev->dma_parms;
         dev->dev.coherent_dma_mask = 0xffffffffull;
 
+        pci_set_dma_max_seg_size(dev, 65536);
+        pci_set_dma_seg_boundary(dev, 0xffffffff);
+
         /* Fix up broken headers */
         pci_fixup_device(pci_fixup_header, dev);
 
diff --git a/drivers/pcmcia/at91_cf.c b/drivers/pcmcia/at91_cf.c
index eb6abd3f9221..385e145e1acc 100644
--- a/drivers/pcmcia/at91_cf.c
+++ b/drivers/pcmcia/at91_cf.c
@@ -21,9 +21,9 @@
 #include <asm/hardware.h>
 #include <asm/io.h>
 #include <asm/sizes.h>
+#include <asm/gpio.h>
 
 #include <asm/arch/board.h>
-#include <asm/arch/gpio.h>
 #include <asm/arch/at91rm9200_mc.h>
 
 
@@ -56,7 +56,7 @@ struct at91_cf_socket {
 
 static inline int at91_cf_present(struct at91_cf_socket *cf)
 {
-        return !at91_get_gpio_value(cf->board->det_pin);
+        return !gpio_get_value(cf->board->det_pin);
 }
 
 /*--------------------------------------------------------------------------*/
@@ -100,9 +100,9 @@ static int at91_cf_get_status(struct pcmcia_socket *s, u_int *sp)
                 int vcc = cf->board->vcc_pin;
 
                 *sp = SS_DETECT | SS_3VCARD;
-                if (!rdy || at91_get_gpio_value(rdy))
+                if (!rdy || gpio_get_value(rdy))
                         *sp |= SS_READY;
-                if (!vcc || at91_get_gpio_value(vcc))
+                if (!vcc || gpio_get_value(vcc))
                         *sp |= SS_POWERON;
         } else
                 *sp = 0;
@@ -121,10 +121,10 @@ at91_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
         if (cf->board->vcc_pin) {
                 switch (s->Vcc) {
                         case 0:
-                                at91_set_gpio_value(cf->board->vcc_pin, 0);
+                                gpio_set_value(cf->board->vcc_pin, 0);
                                 break;
                         case 33:
-                                at91_set_gpio_value(cf->board->vcc_pin, 1);
+                                gpio_set_value(cf->board->vcc_pin, 1);
                                 break;
                         default:
                                 return -EINVAL;
@@ -132,7 +132,7 @@ at91_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
         }
 
         /* toggle reset if needed */
-        at91_set_gpio_value(cf->board->rst_pin, s->flags & SS_RESET);
+        gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET);
 
         pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
                 driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
@@ -239,11 +239,24 @@ static int __init at91_cf_probe(struct platform_device *pdev)
         platform_set_drvdata(pdev, cf);
 
         /* must be a GPIO; ergo must trigger on both edges */
-        status = request_irq(board->det_pin, at91_cf_irq, 0, driver_name, cf);
+        status = gpio_request(board->det_pin, "cf_det");
         if (status < 0)
                 goto fail0;
+        status = request_irq(board->det_pin, at91_cf_irq, 0, driver_name, cf);
+        if (status < 0)
+                goto fail00;
         device_init_wakeup(&pdev->dev, 1);
 
+        status = gpio_request(board->rst_pin, "cf_rst");
+        if (status < 0)
+                goto fail0a;
+
+        if (board->vcc_pin) {
+                status = gpio_request(board->vcc_pin, "cf_vcc");
+                if (status < 0)
+                        goto fail0b;
+        }
+
         /*
          * The card driver will request this irq later as needed.
          * but it causes lots of "irqNN: nobody cared" messages
@@ -251,16 +264,20 @@ static int __init at91_cf_probe(struct platform_device *pdev)
          * (Note:  DK board doesn't wire the IRQ pin...)
          */
         if (board->irq_pin) {
+                status = gpio_request(board->irq_pin, "cf_irq");
+                if (status < 0)
+                        goto fail0c;
                 status = request_irq(board->irq_pin, at91_cf_irq,
                                 IRQF_SHARED, driver_name, cf);
                 if (status < 0)
-                        goto fail0a;
+                        goto fail0d;
                 cf->socket.pci_irq = board->irq_pin;
         } else
                 cf->socket.pci_irq = NR_IRQS + 1;
 
         /* pcmcia layer only remaps "real" memory not iospace */
-        cf->socket.io_offset = (unsigned long) ioremap(cf->phys_baseaddr + CF_IO_PHYS, SZ_2K);
+        cf->socket.io_offset = (unsigned long)
+                        ioremap(cf->phys_baseaddr + CF_IO_PHYS, SZ_2K);
         if (!cf->socket.io_offset) {
                 status = -ENXIO;
                 goto fail1;
@@ -296,11 +313,21 @@ fail2:
 fail1:
         if (cf->socket.io_offset)
                 iounmap((void __iomem *) cf->socket.io_offset);
-        if (board->irq_pin)
+        if (board->irq_pin) {
                 free_irq(board->irq_pin, cf);
+fail0d:
+                gpio_free(board->irq_pin);
+        }
+fail0c:
+        if (board->vcc_pin)
+                gpio_free(board->vcc_pin);
+fail0b:
+        gpio_free(board->rst_pin);
 fail0a:
         device_init_wakeup(&pdev->dev, 0);
         free_irq(board->det_pin, cf);
+fail00:
+        gpio_free(board->det_pin);
 fail0:
         kfree(cf);
         return status;
@@ -313,13 +340,18 @@ static int __exit at91_cf_remove(struct platform_device *pdev)
         struct resource         *io = cf->socket.io[0].res;
 
         pcmcia_unregister_socket(&cf->socket);
-        if (board->irq_pin)
+        release_mem_region(io->start, io->end + 1 - io->start);
+        iounmap((void __iomem *) cf->socket.io_offset);
+        if (board->irq_pin) {
                 free_irq(board->irq_pin, cf);
+                gpio_free(board->irq_pin);
+        }
+        if (board->vcc_pin)
+                gpio_free(board->vcc_pin);
+        gpio_free(board->rst_pin);
         device_init_wakeup(&pdev->dev, 0);
         free_irq(board->det_pin, cf);
-        iounmap((void __iomem *) cf->socket.io_offset);
-        release_mem_region(io->start, io->end + 1 - io->start);
-
+        gpio_free(board->det_pin);
         kfree(cf);
         return 0;
 }
diff --git a/drivers/pcmcia/cardbus.c b/drivers/pcmcia/cardbus.c
index a1bd763b4e33..714baaeb6da1 100644
--- a/drivers/pcmcia/cardbus.c
+++ b/drivers/pcmcia/cardbus.c
@@ -143,7 +143,7 @@ int read_cb_mem(struct pcmcia_socket * s, int space, u_int addr, u_int len, void
         /* Config space? */
         if (space == 0) {
                 if (addr + len > 0x100)
-                        goto fail;
+                        goto failput;
                 for (; len; addr++, ptr++, len--)
                         pci_read_config_byte(dev, addr, ptr);
                 return 0;
@@ -171,6 +171,8 @@ int read_cb_mem(struct pcmcia_socket * s, int space, u_int addr, u_int len, void
         memcpy_fromio(ptr, s->cb_cis_virt + addr, len);
         return 0;
 
+failput:
+        pci_dev_put(dev);
 fail:
         memset(ptr, 0xff, len);
         return -1;
diff --git a/drivers/pcmcia/ds.c b/drivers/pcmcia/ds.c
index 15c18f5246d6..5a85871f5ee9 100644
--- a/drivers/pcmcia/ds.c
+++ b/drivers/pcmcia/ds.c
@@ -865,11 +865,12 @@ static int pcmcia_load_firmware(struct pcmcia_device *dev, char * filename)
         ds_dbg(1, "trying to load CIS file %s\n", filename);
 
         if (strlen(filename) > 14) {
-                printk(KERN_WARNING "pcmcia: CIS filename is too long\n");
+                printk(KERN_WARNING "pcmcia: CIS filename is too long [%s]\n",
+                        filename);
                 return -EINVAL;
         }
 
-        snprintf(path, 20, "%s", filename);
+        snprintf(path, sizeof(path), "%s", filename);
 
         if (request_firmware(&fw, path, &dev->dev) == 0) {
                 if (fw->size >= CISTPL_MAX_CIS_SIZE) {
@@ -1130,8 +1131,6 @@ static int runtime_suspend(struct device *dev)
         down(&dev->sem);
         rc = pcmcia_dev_suspend(dev, PMSG_SUSPEND);
         up(&dev->sem);
-        if (!rc)
-                dev->power.power_state.event = PM_EVENT_SUSPEND;
         return rc;
 }
 
@@ -1142,8 +1141,6 @@ static void runtime_resume(struct device *dev)
         down(&dev->sem);
         rc = pcmcia_dev_resume(dev);
         up(&dev->sem);
-        if (!rc)
-                dev->power.power_state.event = PM_EVENT_ON;
 }
 
 /************************ per-device sysfs output ***************************/
@@ -1265,6 +1262,9 @@ static int pcmcia_dev_suspend(struct device * dev, pm_message_t state)
         struct pcmcia_driver *p_drv = NULL;
         int ret = 0;
 
+        if (p_dev->suspended)
+                return 0;
+
         ds_dbg(2, "suspending %s\n", dev->bus_id);
 
         if (dev->driver)
@@ -1301,6 +1301,9 @@ static int pcmcia_dev_resume(struct device * dev)
         struct pcmcia_driver *p_drv = NULL;
         int ret = 0;
 
+        if (!p_dev->suspended)
+                return 0;
+
         ds_dbg(2, "resuming %s\n", dev->bus_id);
 
         if (dev->driver)
diff --git a/drivers/pcmcia/i82092.c b/drivers/pcmcia/i82092.c
index df21e2d16f87..749515534cc0 100644
--- a/drivers/pcmcia/i82092.c
+++ b/drivers/pcmcia/i82092.c
@@ -82,7 +82,7 @@ struct socket_info {
                                     1 = empty socket, 
                                     2 = card but not initialized,
                                     3 = operational card */
-        kio_addr_t io_base;     /* base io address of the socket */
+        unsigned int io_base;   /* base io address of the socket */
         
         struct pcmcia_socket socket;
         struct pci_dev *dev;    /* The PCI device for the socket */
diff --git a/drivers/pcmcia/i82365.c b/drivers/pcmcia/i82365.c
index 839bb1c0db58..32a2ab119798 100644
--- a/drivers/pcmcia/i82365.c
+++ b/drivers/pcmcia/i82365.c
@@ -164,7 +164,7 @@ struct i82365_socket {
     u_short             type, flags;
     struct pcmcia_socket        socket;
     unsigned int        number;
-    kio_addr_t          ioaddr;
+    unsigned int        ioaddr;
     u_short             psock;
     u_char              cs_irq, intr;
     union {
@@ -238,7 +238,7 @@ static u_char i365_get(u_short sock, u_short reg)
     unsigned long flags;
     spin_lock_irqsave(&bus_lock,flags);
     {
-        kio_addr_t port = socket[sock].ioaddr;
+        unsigned int port = socket[sock].ioaddr;
         u_char val;
         reg = I365_REG(socket[sock].psock, reg);
         outb(reg, port); val = inb(port+1);
@@ -252,7 +252,7 @@ static void i365_set(u_short sock, u_short reg, u_char data)
     unsigned long flags;
     spin_lock_irqsave(&bus_lock,flags);
     {
-        kio_addr_t port = socket[sock].ioaddr;
+        unsigned int port = socket[sock].ioaddr;
         u_char val = I365_REG(socket[sock].psock, reg);
         outb(val, port); outb(data, port+1);
         spin_unlock_irqrestore(&bus_lock,flags);
@@ -588,7 +588,7 @@ static int to_cycles(int ns)
 
 /*====================================================================*/
 
-static int __init identify(kio_addr_t port, u_short sock)
+static int __init identify(unsigned int port, u_short sock)
 {
     u_char val;
     int type = -1;
@@ -659,7 +659,7 @@ static int __init identify(kio_addr_t port, u_short sock)
 static int __init is_alive(u_short sock)
 {
     u_char stat;
-    kio_addr_t start, stop;
+    unsigned int start, stop;
     
     stat = i365_get(sock, I365_STATUS);
     start = i365_get_pair(sock, I365_IO(0)+I365_W_START);
@@ -678,7 +678,7 @@ static int __init is_alive(u_short sock)
 
 /*====================================================================*/
 
-static void __init add_socket(kio_addr_t port, int psock, int type)
+static void __init add_socket(unsigned int port, int psock, int type)
 {
     socket[sockets].ioaddr = port;
     socket[sockets].psock = psock;
@@ -698,7 +698,7 @@ static void __init add_pcic(int ns, int type)
     base = sockets-ns;
     if (base == 0) printk("\n");
     printk(KERN_INFO "  %s", pcic[type].name);
-    printk(" ISA-to-PCMCIA at port %#lx ofs 0x%02x",
+    printk(" ISA-to-PCMCIA at port %#x ofs 0x%02x",
                t->ioaddr, t->psock*0x40);
     printk(", %d socket%s\n", ns, ((ns > 1) ? "s" : ""));
 
@@ -772,7 +772,7 @@ static struct pnp_dev *i82365_pnpdev;
 static void __init isa_probe(void)
 {
     int i, j, sock, k, ns, id;
-    kio_addr_t port;
+    unsigned int port;
 #ifdef CONFIG_PNP
     struct isapnp_device_id *devid;
     struct pnp_dev *dev;
@@ -1053,7 +1053,7 @@ static int i365_set_io_map(u_short sock, struct pccard_io_map *io)
     u_char map, ioctl;
     
     debug(1, "SetIOMap(%d, %d, %#2.2x, %d ns, "
-          "%#lx-%#lx)\n", sock, io->map, io->flags,
+          "%#x-%#x)\n", sock, io->map, io->flags,
           io->speed, io->start, io->stop);
     map = io->map;
     if ((map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) ||
diff --git a/drivers/pcmcia/m32r_cfc.c b/drivers/pcmcia/m32r_cfc.c
index 91da15b5a81e..3616da227152 100644
--- a/drivers/pcmcia/m32r_cfc.c
+++ b/drivers/pcmcia/m32r_cfc.c
@@ -58,7 +58,7 @@ typedef struct pcc_socket {
         u_short                 type, flags;
         struct pcmcia_socket    socket;
         unsigned int            number;
-        kio_addr_t              ioaddr;
+        unsigned int            ioaddr;
         u_long                  mapaddr;
         u_long                  base;   /* PCC register base */
         u_char                  cs_irq1, cs_irq2, intr;
@@ -298,7 +298,8 @@ static int __init is_alive(u_short sock)
         return 0;
 }
 
-static void add_pcc_socket(ulong base, int irq, ulong mapaddr, kio_addr_t ioaddr)
+static void add_pcc_socket(ulong base, int irq, ulong mapaddr,
+                           unsigned int ioaddr)
 {
         pcc_socket_t *t = &socket[pcc_sockets];
 
@@ -738,7 +739,7 @@ static int __init init_m32r_pcc(void)
 #else   /* CONFIG_PLAT_USRV */
         {
                 ulong base, mapaddr;
-                kio_addr_t ioaddr;
+                unsigned int ioaddr;
 
                 for (i = 0 ; i < M32R_MAX_PCC ; i++) {
                         base = (ulong)PLD_CFRSTCR;
diff --git a/drivers/pcmcia/m32r_pcc.c b/drivers/pcmcia/m32r_pcc.c
index ec4c1253ebbb..2b42b7155e34 100644
--- a/drivers/pcmcia/m32r_pcc.c
+++ b/drivers/pcmcia/m32r_pcc.c
@@ -65,7 +65,7 @@ typedef struct pcc_socket {
         u_short                 type, flags;
         struct pcmcia_socket    socket;
         unsigned int            number;
-        kio_addr_t              ioaddr;
+        unsigned int            ioaddr;
         u_long                  mapaddr;
         u_long                  base;   /* PCC register base */
         u_char                  cs_irq, intr;
@@ -310,7 +310,8 @@ static int __init is_alive(u_short sock)
         return 0;
 }
 
-static void add_pcc_socket(ulong base, int irq, ulong mapaddr, kio_addr_t ioaddr)
+static void add_pcc_socket(ulong base, int irq, ulong mapaddr,
+                           unsigned int ioaddr)
 {
         pcc_socket_t *t = &socket[pcc_sockets];
 
@@ -491,7 +492,7 @@ static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io)
         u_char map;
 
         debug(3, "m32r-pcc: SetIOMap(%d, %d, %#2.2x, %d ns, "
-                  "%#lx-%#lx)\n", sock, io->map, io->flags,
+                  "%#x-%#x)\n", sock, io->map, io->flags,
                   io->speed, io->start, io->stop);
         map = io->map;
 
diff --git a/drivers/pcmcia/m8xx_pcmcia.c b/drivers/pcmcia/m8xx_pcmcia.c
index 4ea426a25909..ac70d2cb7dd4 100644
--- a/drivers/pcmcia/m8xx_pcmcia.c
+++ b/drivers/pcmcia/m8xx_pcmcia.c
@@ -1174,8 +1174,10 @@ static int __init m8xx_probe(struct of_device *ofdev,
 
         pcmcia_schlvl = irq_of_parse_and_map(np, 0);
         hwirq = irq_map[pcmcia_schlvl].hwirq;
-        if (pcmcia_schlvl < 0)
+        if (pcmcia_schlvl < 0) {
+                iounmap(pcmcia);
                 return -EINVAL;
+        }
 
         m8xx_pgcrx[0] = &pcmcia->pcmc_pgcra;
         m8xx_pgcrx[1] = &pcmcia->pcmc_pgcrb;
@@ -1189,6 +1191,7 @@ static int __init m8xx_probe(struct of_device *ofdev,
                         driver_name, socket)) {
                 pcmcia_error("Cannot allocate IRQ %u for SCHLVL!\n",
                              pcmcia_schlvl);
+                iounmap(pcmcia);
                 return -1;
         }
 
@@ -1284,6 +1287,7 @@ static int m8xx_remove(struct of_device *ofdev)
         }
         for (i = 0; i < PCMCIA_SOCKETS_NO; i++)
                 pcmcia_unregister_socket(&socket[i].socket);
+        iounmap(pcmcia);
 
         free_irq(pcmcia_schlvl, NULL);
 
diff --git a/drivers/pcmcia/pcmcia_resource.c b/drivers/pcmcia/pcmcia_resource.c
index 0ce39de834c4..1d128fbd1a92 100644
--- a/drivers/pcmcia/pcmcia_resource.c
+++ b/drivers/pcmcia/pcmcia_resource.c
@@ -65,23 +65,23 @@ extern int ds_pc_debug;
  * Special stuff for managing IO windows, because they are scarce
  */
 
-static int alloc_io_space(struct pcmcia_socket *s, u_int attr, ioaddr_t *base,
-                          ioaddr_t num, u_int lines)
+static int alloc_io_space(struct pcmcia_socket *s, u_int attr,
+                          unsigned int *base, unsigned int num, u_int lines)
 {
         int i;
-        kio_addr_t try, align;
+        unsigned int try, align;
 
         align = (*base) ? (lines ? 1<<lines : 0) : 1;
         if (align && (align < num)) {
                 if (*base) {
-                        ds_dbg(s, 0, "odd IO request: num %#x align %#lx\n",
+                        ds_dbg(s, 0, "odd IO request: num %#x align %#x\n",
                                num, align);
                         align = 0;
                 } else
                         while (align && (align < num)) align <<= 1;
         }
         if (*base & ~(align-1)) {
-                ds_dbg(s, 0, "odd IO request: base %#x align %#lx\n",
+                ds_dbg(s, 0, "odd IO request: base %#x align %#x\n",
                        *base, align);
                 align = 0;
         }
@@ -132,8 +132,8 @@ static int alloc_io_space(struct pcmcia_socket *s, u_int attr, ioaddr_t *base,
 } /* alloc_io_space */
 
 
-static void release_io_space(struct pcmcia_socket *s, ioaddr_t base,
-                             ioaddr_t num)
+static void release_io_space(struct pcmcia_socket *s, unsigned int base,
+                             unsigned int num)
 {
         int i;
 
diff --git a/drivers/pcmcia/rsrc_nonstatic.c b/drivers/pcmcia/rsrc_nonstatic.c
index bfcaad6021cf..a8d100707721 100644
--- a/drivers/pcmcia/rsrc_nonstatic.c
+++ b/drivers/pcmcia/rsrc_nonstatic.c
@@ -186,15 +186,16 @@ static int sub_interval(struct resource_map *map, u_long base, u_long num)
 ======================================================================*/
 
 #ifdef CONFIG_PCMCIA_PROBE
-static void do_io_probe(struct pcmcia_socket *s, kio_addr_t base, kio_addr_t num)
+static void do_io_probe(struct pcmcia_socket *s, unsigned int base,
+                        unsigned int num)
 {
     struct resource *res;
     struct socket_data *s_data = s->resource_data;
-    kio_addr_t i, j, bad;
+    unsigned int i, j, bad;
     int any;
     u_char *b, hole, most;
 
-    printk(KERN_INFO "cs: IO port probe %#lx-%#lx:",
+    printk(KERN_INFO "cs: IO port probe %#x-%#x:",
            base, base+num-1);
 
     /* First, what does a floating port look like? */
@@ -233,7 +234,7 @@ static void do_io_probe(struct pcmcia_socket *s, kio_addr_t base, kio_addr_t num
         } else {
             if (bad) {
                 sub_interval(&s_data->io_db, bad, i-bad);
-                printk(" %#lx-%#lx", bad, i-1);
+                printk(" %#x-%#x", bad, i-1);
                 bad = 0;
             }
         }
@@ -244,7 +245,7 @@ static void do_io_probe(struct pcmcia_socket *s, kio_addr_t base, kio_addr_t num
             return;
         } else {
             sub_interval(&s_data->io_db, bad, i-bad);
-            printk(" %#lx-%#lx", bad, i-1);
+            printk(" %#x-%#x", bad, i-1);
         }
     }
 
diff --git a/drivers/pcmcia/tcic.c b/drivers/pcmcia/tcic.c
index 749ac3710914..5792bd5c54f9 100644
--- a/drivers/pcmcia/tcic.c
+++ b/drivers/pcmcia/tcic.c
@@ -719,7 +719,7 @@ static int tcic_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
     u_short base, len, ioctl;
     
     debug(1, "SetIOMap(%d, %d, %#2.2x, %d ns, "
-          "%#lx-%#lx)\n", psock, io->map, io->flags,
+          "%#x-%#x)\n", psock, io->map, io->flags,
           io->speed, io->start, io->stop);
     if ((io->map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) ||
         (io->stop < io->start)) return -EINVAL;
diff --git a/drivers/s390/block/dasd.c b/drivers/s390/block/dasd.c
index d640427c74c8..d984e0fae630 100644
--- a/drivers/s390/block/dasd.c
+++ b/drivers/s390/block/dasd.c
@@ -1057,12 +1057,11 @@ void dasd_int_handler(struct ccw_device *cdev, unsigned long intparm,
                 if (device->features & DASD_FEATURE_ERPLOG) {
                         dasd_log_sense(cqr, irb);
                 }
-                /* If we have no sense data, or we just don't want complex ERP
-                 * for this request, but if we have retries left, then just
-                 * reset this request and retry it in the fastpath
+                /*
+                 * If we don't want complex ERP for this request, then just
+                 * reset this and retry it in the fastpath
                  */
-                if (!(cqr->irb.esw.esw0.erw.cons &&
-                      test_bit(DASD_CQR_FLAGS_USE_ERP, &cqr->flags)) &&
+                if (!test_bit(DASD_CQR_FLAGS_USE_ERP, &cqr->flags) &&
                     cqr->retries > 0) {
                         DEV_MESSAGE(KERN_DEBUG, device,
                                     "default ERP in fastpath (%i retries left)",
@@ -1707,7 +1706,7 @@ static void __dasd_cleanup_cqr(struct dasd_ccw_req *cqr)
 
         req = (struct request *) cqr->callback_data;
         dasd_profile_end(cqr->block, cqr, req);
-        status = cqr->memdev->discipline->free_cp(cqr, req);
+        status = cqr->block->base->discipline->free_cp(cqr, req);
         if (status <= 0)
                 error = status ? status : -EIO;
         dasd_end_request(req, error);
@@ -1742,12 +1741,8 @@ restart:
 
                 /*  Process requests that may be recovered */
                 if (cqr->status == DASD_CQR_NEED_ERP) {
-                        if (cqr->irb.esw.esw0.erw.cons &&
-                            test_bit(DASD_CQR_FLAGS_USE_ERP,
-                                     &cqr->flags)) {
-                                erp_fn = base->discipline->erp_action(cqr);
-                                erp_fn(cqr);
-                        }
+                        erp_fn = base->discipline->erp_action(cqr);
+                        erp_fn(cqr);
                         goto restart;
                 }
 
diff --git a/drivers/s390/block/dasd_3990_erp.c b/drivers/s390/block/dasd_3990_erp.c
index c361ab69ec00..f69714a0e9e7 100644
--- a/drivers/s390/block/dasd_3990_erp.c
+++ b/drivers/s390/block/dasd_3990_erp.c
@@ -164,7 +164,7 @@ dasd_3990_erp_alternate_path(struct dasd_ccw_req * erp)
 
                 /* reset status to submit the request again... */
                 erp->status = DASD_CQR_FILLED;
-                erp->retries = 1;
+                erp->retries = 10;
         } else {
                 DEV_MESSAGE(KERN_ERR, device,
                             "No alternate channel path left (lpum=%x / "
@@ -301,8 +301,7 @@ dasd_3990_erp_action_4(struct dasd_ccw_req * erp, char *sense)
                 erp->function = dasd_3990_erp_action_4;
 
         } else {
-
-                if (sense[25] == 0x1D) {        /* state change pending */
+                if (sense && (sense[25] == 0x1D)) { /* state change pending */
 
                         DEV_MESSAGE(KERN_INFO, device,
                                     "waiting for state change pending "
@@ -311,7 +310,7 @@ dasd_3990_erp_action_4(struct dasd_ccw_req * erp, char *sense)
 
                         dasd_3990_erp_block_queue(erp, 30*HZ);
 
-                } else if (sense[25] == 0x1E) { /* busy */
+                } else if (sense && (sense[25] == 0x1E)) {      /* busy */
                         DEV_MESSAGE(KERN_INFO, device,
                                     "busy - redriving request later, "
                                     "%d retries left",
@@ -2120,6 +2119,34 @@ dasd_3990_erp_inspect_32(struct dasd_ccw_req * erp, char *sense)
  */
 
 /*
+ * DASD_3990_ERP_CONTROL_CHECK
+ *
+ * DESCRIPTION
+ *   Does a generic inspection if a control check occured and sets up
+ *   the related error recovery procedure
+ *
+ * PARAMETER
+ *   erp                pointer to the currently created default ERP
+ *
+ * RETURN VALUES
+ *   erp_filled         pointer to the erp
+ */
+
+static struct dasd_ccw_req *
+dasd_3990_erp_control_check(struct dasd_ccw_req *erp)
+{
+        struct dasd_device *device = erp->startdev;
+
+        if (erp->refers->irb.scsw.cstat & (SCHN_STAT_INTF_CTRL_CHK
+                                           | SCHN_STAT_CHN_CTRL_CHK)) {
+                DEV_MESSAGE(KERN_DEBUG, device, "%s",
+                            "channel or interface control check");
+                erp = dasd_3990_erp_action_4(erp, NULL);
+        }
+        return erp;
+}
+
+/*
  * DASD_3990_ERP_INSPECT
  *
  * DESCRIPTION
@@ -2145,8 +2172,11 @@ dasd_3990_erp_inspect(struct dasd_ccw_req * erp)
         if (erp_new)
                 return erp_new;
 
+        /* check if no concurrent sens is available */
+        if (!erp->refers->irb.esw.esw0.erw.cons)
+                erp_new = dasd_3990_erp_control_check(erp);
         /* distinguish between 24 and 32 byte sense data */
-        if (sense[27] & DASD_SENSE_BIT_0) {
+        else if (sense[27] & DASD_SENSE_BIT_0) {
 
                 /* inspect the 24 byte sense data */
                 erp_new = dasd_3990_erp_inspect_24(erp, sense);
@@ -2285,6 +2315,17 @@ dasd_3990_erp_error_match(struct dasd_ccw_req *cqr1, struct dasd_ccw_req *cqr2)
                 //      return 0;       /* CCW doesn't match */
         }
 
+        if (cqr1->irb.esw.esw0.erw.cons != cqr2->irb.esw.esw0.erw.cons)
+                return 0;
+
+        if ((cqr1->irb.esw.esw0.erw.cons == 0) &&
+            (cqr2->irb.esw.esw0.erw.cons == 0)) {
+                if ((cqr1->irb.scsw.cstat & (SCHN_STAT_INTF_CTRL_CHK |
+                                             SCHN_STAT_CHN_CTRL_CHK)) ==
+                    (cqr2->irb.scsw.cstat & (SCHN_STAT_INTF_CTRL_CHK |
+                                             SCHN_STAT_CHN_CTRL_CHK)))
+                        return 1; /* match with ifcc*/
+        }
         /* check sense data; byte 0-2,25,27 */
         if (!((memcmp (cqr1->irb.ecw, cqr2->irb.ecw, 3) == 0) &&
               (cqr1->irb.ecw[27] == cqr2->irb.ecw[27]) &&
@@ -2560,17 +2601,6 @@ dasd_3990_erp_action(struct dasd_ccw_req * cqr)
 
                 return cqr;
         }
-        /* check if sense data are available */
-        if (!cqr->irb.ecw) {
-                DEV_MESSAGE(KERN_DEBUG, device,
-                            "ERP called witout sense data avail ..."
-                            "request %p - NO ERP possible", cqr);
-
-                cqr->status = DASD_CQR_FAILED;
-
-                return cqr;
-
-        }
 
         /* check if error happened before */
         erp = dasd_3990_erp_in_erp(cqr);
diff --git a/drivers/s390/block/dcssblk.c b/drivers/s390/block/dcssblk.c
index 7779bfce1c31..3faf0538b328 100644
--- a/drivers/s390/block/dcssblk.c
+++ b/drivers/s390/block/dcssblk.c
@@ -415,6 +415,8 @@ dcssblk_add_store(struct device *dev, struct device_attribute *attr, const char
         dev_info->gd->queue = dev_info->dcssblk_queue;
         dev_info->gd->private_data = dev_info;
         dev_info->gd->driverfs_dev = &dev_info->dev;
+        blk_queue_make_request(dev_info->dcssblk_queue, dcssblk_make_request);
+        blk_queue_hardsect_size(dev_info->dcssblk_queue, 4096);
         /*
          * load the segment
          */
@@ -472,9 +474,6 @@ dcssblk_add_store(struct device *dev, struct device_attribute *attr, const char
         if (rc)
                 goto unregister_dev;
 
-        blk_queue_make_request(dev_info->dcssblk_queue, dcssblk_make_request);
-        blk_queue_hardsect_size(dev_info->dcssblk_queue, 4096);
-
         add_disk(dev_info->gd);
 
         switch (dev_info->segment_type) {
diff --git a/drivers/s390/char/sclp_tty.c b/drivers/s390/char/sclp_tty.c
index e3b3d390b4a3..2e616e33891d 100644
--- a/drivers/s390/char/sclp_tty.c
+++ b/drivers/s390/char/sclp_tty.c
@@ -332,7 +332,7 @@ sclp_tty_write_string(const unsigned char *str, int count)
                 if (sclp_ttybuf == NULL) {
                         while (list_empty(&sclp_tty_pages)) {
                                 spin_unlock_irqrestore(&sclp_tty_lock, flags);
-                                if (in_interrupt())
+                                if (in_atomic())
                                         sclp_sync_wait();
                                 else
                                         wait_event(sclp_tty_waitq,
diff --git a/drivers/s390/char/sclp_vt220.c b/drivers/s390/char/sclp_vt220.c
index 40cd21bc5cc4..68071622d4bb 100644
--- a/drivers/s390/char/sclp_vt220.c
+++ b/drivers/s390/char/sclp_vt220.c
@@ -400,7 +400,7 @@ __sclp_vt220_write(const unsigned char *buf, int count, int do_schedule,
                         while (list_empty(&sclp_vt220_empty)) {
                                 spin_unlock_irqrestore(&sclp_vt220_lock,
                                                        flags);
-                                if (in_interrupt())
+                                if (in_atomic())
                                         sclp_sync_wait();
                                 else
                                         wait_event(sclp_vt220_waitq,
diff --git a/drivers/s390/cio/ccwgroup.c b/drivers/s390/cio/ccwgroup.c
index 3964056a9a47..03914fa81174 100644
--- a/drivers/s390/cio/ccwgroup.c
+++ b/drivers/s390/cio/ccwgroup.c
@@ -391,12 +391,24 @@ ccwgroup_remove (struct device *dev)
         return 0;
 }
 
+static void ccwgroup_shutdown(struct device *dev)
+{
+        struct ccwgroup_device *gdev;
+        struct ccwgroup_driver *gdrv;
+
+        gdev = to_ccwgroupdev(dev);
+        gdrv = to_ccwgroupdrv(dev->driver);
+        if (gdrv && gdrv->shutdown)
+                gdrv->shutdown(gdev);
+}
+
 static struct bus_type ccwgroup_bus_type = {
         .name   = "ccwgroup",
         .match  = ccwgroup_bus_match,
         .uevent = ccwgroup_uevent,
         .probe  = ccwgroup_probe,
         .remove = ccwgroup_remove,
+        .shutdown = ccwgroup_shutdown,
 };
 
 /**
diff --git a/drivers/s390/cio/chsc.c b/drivers/s390/cio/chsc.c
index e7ba16a74ef7..007aaeb4f532 100644
--- a/drivers/s390/cio/chsc.c
+++ b/drivers/s390/cio/chsc.c
@@ -26,6 +26,25 @@
 
 static void *sei_page;
 
+static int chsc_error_from_response(int response)
+{
+        switch (response) {
+        case 0x0001:
+                return 0;
+        case 0x0002:
+        case 0x0003:
+        case 0x0006:
+        case 0x0007:
+        case 0x0008:
+        case 0x000a:
+                return -EINVAL;
+        case 0x0004:
+                return -EOPNOTSUPP;
+        default:
+                return -EIO;
+        }
+}
+
 struct chsc_ssd_area {
         struct chsc_header request;
         u16 :10;
@@ -75,11 +94,11 @@ int chsc_get_ssd_info(struct subchannel_id schid, struct chsc_ssd_info *ssd)
                 ret = (ccode == 3) ? -ENODEV : -EBUSY;
                 goto out_free;
         }
-        if (ssd_area->response.code != 0x0001) {
+        ret = chsc_error_from_response(ssd_area->response.code);
+        if (ret != 0) {
                 CIO_MSG_EVENT(2, "chsc: ssd failed for 0.%x.%04x (rc=%04x)\n",
                               schid.ssid, schid.sch_no,
                               ssd_area->response.code);
-                ret = -EIO;
                 goto out_free;
         }
         if (!ssd_area->sch_valid) {
@@ -717,36 +736,15 @@ __chsc_do_secm(struct channel_subsystem *css, int enable, void *page)
                 return (ccode == 3) ? -ENODEV : -EBUSY;
 
         switch (secm_area->response.code) {
-        case 0x0001: /* Success. */
-                ret = 0;
-                break;
-        case 0x0003: /* Invalid block. */
-        case 0x0007: /* Invalid format. */
-        case 0x0008: /* Other invalid block. */
-                CIO_CRW_EVENT(2, "Error in chsc request block!\n");
-                ret = -EINVAL;
-                break;
-        case 0x0004: /* Command not provided in model. */
-                CIO_CRW_EVENT(2, "Model does not provide secm\n");
-                ret = -EOPNOTSUPP;
-                break;
-        case 0x0102: /* cub adresses incorrect */
-                CIO_CRW_EVENT(2, "Invalid addresses in chsc request block\n");
-                ret = -EINVAL;
-                break;
-        case 0x0103: /* key error */
-                CIO_CRW_EVENT(2, "Access key error in secm\n");
+        case 0x0102:
+        case 0x0103:
                 ret = -EINVAL;
-                break;
-        case 0x0105: /* error while starting */
-                CIO_CRW_EVENT(2, "Error while starting channel measurement\n");
-                ret = -EIO;
-                break;
         default:
-                CIO_CRW_EVENT(2, "Unknown CHSC response %d\n",
-                              secm_area->response.code);
-                ret = -EIO;
+                ret = chsc_error_from_response(secm_area->response.code);
         }
+        if (ret != 0)
+                CIO_CRW_EVENT(2, "chsc: secm failed (rc=%04x)\n",
+                              secm_area->response.code);
         return ret;
 }
 
@@ -827,27 +825,14 @@ int chsc_determine_channel_path_description(struct chp_id chpid,
                 goto out;
         }
 
-        switch (scpd_area->response.code) {
-        case 0x0001: /* Success. */
+        ret = chsc_error_from_response(scpd_area->response.code);
+        if (ret == 0)
+                /* Success. */
                 memcpy(desc, &scpd_area->desc,
                        sizeof(struct channel_path_desc));
-                ret = 0;
-                break;
-        case 0x0003: /* Invalid block. */
-        case 0x0007: /* Invalid format. */
-        case 0x0008: /* Other invalid block. */
-                CIO_CRW_EVENT(2, "Error in chsc request block!\n");
-                ret = -EINVAL;
-                break;
-        case 0x0004: /* Command not provided in model. */
-                CIO_CRW_EVENT(2, "Model does not provide scpd\n");
-                ret = -EOPNOTSUPP;
-                break;
-        default:
-                CIO_CRW_EVENT(2, "Unknown CHSC response %d\n",
+        else
+                CIO_CRW_EVENT(2, "chsc: scpd failed (rc=%04x)\n",
                               scpd_area->response.code);
-                ret = -EIO;
-        }
 out:
         free_page((unsigned long)scpd_area);
         return ret;
@@ -923,8 +908,9 @@ int chsc_get_channel_measurement_chars(struct channel_path *chp)
                 goto out;
         }
 
-        switch (scmc_area->response.code) {
-        case 0x0001: /* Success. */
+        ret = chsc_error_from_response(scmc_area->response.code);
+        if (ret == 0) {
+                /* Success. */
                 if (!scmc_area->not_valid) {
                         chp->cmg = scmc_area->cmg;
                         chp->shared = scmc_area->shared;
@@ -935,22 +921,9 @@ int chsc_get_channel_measurement_chars(struct channel_path *chp)
                         chp->cmg = -1;
                         chp->shared = -1;
                 }
-                ret = 0;
-                break;
-        case 0x0003: /* Invalid block. */
-        case 0x0007: /* Invalid format. */
-        case 0x0008: /* Invalid bit combination. */
-                CIO_CRW_EVENT(2, "Error in chsc request block!\n");
-                ret = -EINVAL;
-                break;
-        case 0x0004: /* Command not provided. */
-                CIO_CRW_EVENT(2, "Model does not provide scmc\n");
-                ret = -EOPNOTSUPP;
-                break;
-        default:
-                CIO_CRW_EVENT(2, "Unknown CHSC response %d\n",
+        } else {
+                CIO_CRW_EVENT(2, "chsc: scmc failed (rc=%04x)\n",
                               scmc_area->response.code);
-                ret = -EIO;
         }
 out:
         free_page((unsigned long)scmc_area);
@@ -1002,21 +975,17 @@ chsc_enable_facility(int operation_code)
                 ret = (ret == 3) ? -ENODEV : -EBUSY;
                 goto out;
         }
+
         switch (sda_area->response.code) {
-        case 0x0001: /* everything ok */
-                ret = 0;
-                break;
-        case 0x0003: /* invalid request block */
-        case 0x0007:
-                ret = -EINVAL;
-                break;
-        case 0x0004: /* command not provided */
-        case 0x0101: /* facility not provided */
+        case 0x0101:
                 ret = -EOPNOTSUPP;
                 break;
-        default: /* something went wrong */
-                ret = -EIO;
+        default:
+                ret = chsc_error_from_response(sda_area->response.code);
         }
+        if (ret != 0)
+                CIO_CRW_EVENT(2, "chsc: sda (oc=%x) failed (rc=%04x)\n",
+                              operation_code, sda_area->response.code);
  out:
         free_page((unsigned long)sda_area);
         return ret;
@@ -1041,33 +1010,27 @@ chsc_determine_css_characteristics(void)
         } __attribute__ ((packed)) *scsc_area;
 
         scsc_area = (void *)get_zeroed_page(GFP_KERNEL | GFP_DMA);
-        if (!scsc_area) {
-                CIO_MSG_EVENT(0, "Was not able to determine available "
-                              "CHSCs due to no memory.\n");
+        if (!scsc_area)
                 return -ENOMEM;
-        }
 
         scsc_area->request.length = 0x0010;
         scsc_area->request.code = 0x0010;
 
         result = chsc(scsc_area);
         if (result) {
-                CIO_MSG_EVENT(0, "Was not able to determine available CHSCs, "
-                              "cc=%i.\n", result);
-                result = -EIO;
+                result = (result == 3) ? -ENODEV : -EBUSY;
                 goto exit;
         }
 
-        if (scsc_area->response.code != 1) {
-                CIO_MSG_EVENT(0, "Was not able to determine "
-                              "available CHSCs.\n");
-                result = -EIO;
-                goto exit;
-        }
-        memcpy(&css_general_characteristics, scsc_area->general_char,
-               sizeof(css_general_characteristics));
-        memcpy(&css_chsc_characteristics, scsc_area->chsc_char,
-               sizeof(css_chsc_characteristics));
+        result = chsc_error_from_response(scsc_area->response.code);
+        if (result == 0) {
+                memcpy(&css_general_characteristics, scsc_area->general_char,
+                       sizeof(css_general_characteristics));
+                memcpy(&css_chsc_characteristics, scsc_area->chsc_char,
+                       sizeof(css_chsc_characteristics));
+        } else
+                CIO_CRW_EVENT(2, "chsc: scsc failed (rc=%04x)\n",
+                              scsc_area->response.code);
 exit:
         free_page ((unsigned long) scsc_area);
         return result;
diff --git a/drivers/s390/cio/device_id.c b/drivers/s390/cio/device_id.c
index 918b8b89cf9a..dc4d87f77f6c 100644
--- a/drivers/s390/cio/device_id.c
+++ b/drivers/s390/cio/device_id.c
@@ -26,17 +26,18 @@
 #include "ioasm.h"
 #include "io_sch.h"
 
-/*
- * Input :
- *   devno - device number
- *   ps    - pointer to sense ID data area
- * Output : none
+/**
+ * vm_vdev_to_cu_type - Convert vm virtual device into control unit type
+ *                      for certain devices.
+ * @class: virtual device class
+ * @type: virtual device type
+ *
+ * Returns control unit type if a match was made or %0xffff otherwise.
  */
-static void
-VM_virtual_device_info (__u16 devno, struct senseid *ps)
+static int vm_vdev_to_cu_type(int class, int type)
 {
         static struct {
-                int vrdcvcla, vrdcvtyp, cu_type;
+                int class, type, cu_type;
         } vm_devices[] = {
                 { 0x08, 0x01, 0x3480 },
                 { 0x08, 0x02, 0x3430 },
@@ -68,8 +69,26 @@ VM_virtual_device_info (__u16 devno, struct senseid *ps)
                 { 0x40, 0xc0, 0x5080 },
                 { 0x80, 0x00, 0x3215 },
         };
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(vm_devices); i++)
+                if (class == vm_devices[i].class && type == vm_devices[i].type)
+                        return vm_devices[i].cu_type;
+
+        return 0xffff;
+}
+
+/**
+ * diag_get_dev_info - retrieve device information via DIAG X'210'
+ * @devno: device number
+ * @ps: pointer to sense ID data area
+ *
+ * Returns zero on success, non-zero otherwise.
+ */
+static int diag_get_dev_info(u16 devno, struct senseid *ps)
+{
         struct diag210 diag_data;
-        int ccode, i;
+        int ccode;
 
         CIO_TRACE_EVENT (4, "VMvdinf");
 
@@ -79,21 +98,21 @@ VM_virtual_device_info (__u16 devno, struct senseid *ps)
         };
 
         ccode = diag210 (&diag_data);
-        ps->reserved = 0xff;
+        if ((ccode == 0) || (ccode == 2)) {
+                ps->reserved = 0xff;
 
-        /* Special case for bloody osa devices. */
-        if (diag_data.vrdcvcla == 0x02 &&
-            diag_data.vrdcvtyp == 0x20) {
-                ps->cu_type = 0x3088;
-                ps->cu_model = 0x60;
-                return;
-        }
-        for (i = 0; i < ARRAY_SIZE(vm_devices); i++)
-                if (diag_data.vrdcvcla == vm_devices[i].vrdcvcla &&
-                    diag_data.vrdcvtyp == vm_devices[i].vrdcvtyp) {
-                        ps->cu_type = vm_devices[i].cu_type;
-                        return;
+                /* Special case for osa devices. */
+                if (diag_data.vrdcvcla == 0x02 && diag_data.vrdcvtyp == 0x20) {
+                        ps->cu_type = 0x3088;
+                        ps->cu_model = 0x60;
+                        return 0;
                 }
+                ps->cu_type = vm_vdev_to_cu_type(diag_data.vrdcvcla,
+                                                diag_data.vrdcvtyp);
+                if (ps->cu_type != 0xffff)
+                        return 0;
+        }
+
         CIO_MSG_EVENT(0, "DIAG X'210' for device %04X returned (cc = %d):"
                       "vdev class : %02X, vdev type : %04X \n ...  "
                       "rdev class : %02X, rdev type : %04X, "
@@ -102,6 +121,8 @@ VM_virtual_device_info (__u16 devno, struct senseid *ps)
                       diag_data.vrdcvcla, diag_data.vrdcvtyp,
                       diag_data.vrdcrccl, diag_data.vrdccrty,
                       diag_data.vrdccrmd);
+
+        return -ENODEV;
 }
 
 /*
@@ -130,6 +151,7 @@ __ccw_device_sense_id_start(struct ccw_device *cdev)
         /* Try on every path. */
         ret = -ENODEV;
         while (cdev->private->imask != 0) {
+                cdev->private->senseid.cu_type = 0xFFFF;
                 if ((sch->opm & cdev->private->imask) != 0 &&
                     cdev->private->iretry > 0) {
                         cdev->private->iretry--;
@@ -153,7 +175,6 @@ ccw_device_sense_id_start(struct ccw_device *cdev)
         int ret;
 
         memset (&cdev->private->senseid, 0, sizeof (struct senseid));
-        cdev->private->senseid.cu_type = 0xFFFF;
         cdev->private->imask = 0x80;
         cdev->private->iretry = 5;
         ret = __ccw_device_sense_id_start(cdev);
@@ -173,13 +194,7 @@ ccw_device_check_sense_id(struct ccw_device *cdev)
 
         sch = to_subchannel(cdev->dev.parent);
         irb = &cdev->private->irb;
-        /* Did we get a proper answer ? */
-        if (cdev->private->senseid.cu_type != 0xFFFF && 
-            cdev->private->senseid.reserved == 0xFF) {
-                if (irb->scsw.count < sizeof (struct senseid) - 8)
-                        cdev->private->flags.esid = 1;
-                return 0; /* Success */
-        }
+
         /* Check the error cases. */
         if (irb->scsw.fctl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) {
                 /* Retry Sense ID if requested. */
@@ -231,6 +246,15 @@ ccw_device_check_sense_id(struct ccw_device *cdev)
                                       sch->schid.ssid, sch->schid.sch_no);
                 return -EACCES;
         }
+
+        /* Did we get a proper answer ? */
+        if (irb->scsw.cc == 0 && cdev->private->senseid.cu_type != 0xFFFF &&
+            cdev->private->senseid.reserved == 0xFF) {
+                if (irb->scsw.count < sizeof(struct senseid) - 8)
+                        cdev->private->flags.esid = 1;
+                return 0; /* Success */
+        }
+
         /* Hmm, whatever happened, try again. */
         CIO_MSG_EVENT(2, "SenseID : start_IO() for device %04x on "
                       "subchannel 0.%x.%04x returns status %02X%02X\n",
@@ -283,20 +307,17 @@ ccw_device_sense_id_irq(struct ccw_device *cdev, enum dev_event dev_event)
                         break;
                 /* fall through. */
         default:                /* Sense ID failed. Try asking VM. */
-                if (MACHINE_IS_VM) {
-                        VM_virtual_device_info (cdev->private->dev_id.devno,
+                if (MACHINE_IS_VM)
+                        ret = diag_get_dev_info(cdev->private->dev_id.devno,
                                                 &cdev->private->senseid);
-                        if (cdev->private->senseid.cu_type != 0xFFFF) {
-                                /* Got the device information from VM. */
-                                ccw_device_sense_id_done(cdev, 0);
-                                return;
-                        }
-                }
-                /*
-                 * If we can't couldn't identify the device type we
-                 *  consider the device "not operational".
-                 */
-                ccw_device_sense_id_done(cdev, -ENODEV);
+                else
+                        /*
+                         * If we can't couldn't identify the device type we
+                         *  consider the device "not operational".
+                         */
+                        ret = -ENODEV;
+
+                ccw_device_sense_id_done(cdev, ret);
                 break;
         }
 }
diff --git a/drivers/scsi/aacraid/linit.c b/drivers/scsi/aacraid/linit.c
index 0e8267c1e915..fb0886140dd7 100644
--- a/drivers/scsi/aacraid/linit.c
+++ b/drivers/scsi/aacraid/linit.c
@@ -449,9 +449,6 @@ static int aac_slave_configure(struct scsi_device *sdev)
                 else if (depth < 2)
                         depth = 2;
                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, depth);
-                if (!(((struct aac_dev *)host->hostdata)->adapter_info.options &
-                                AAC_OPT_NEW_COMM))
-                        blk_queue_max_segment_size(sdev->request_queue, 65536);
         } else
                 scsi_adjust_queue_depth(sdev, 0, 1);
 
@@ -1133,6 +1130,12 @@ static int __devinit aac_probe_one(struct pci_dev *pdev,
         if (error < 0)
                 goto out_deinit;
 
+        if (!(aac->adapter_info.options & AAC_OPT_NEW_COMM)) {
+                error = pci_set_dma_max_seg_size(pdev, 65536);
+                if (error)
+                        goto out_deinit;
+        }
+
         /*
          * Lets override negotiations and drop the maximum SG limit to 34
          */
diff --git a/drivers/scsi/pcmcia/fdomain_stub.c b/drivers/scsi/pcmcia/fdomain_stub.c
index 4b82b2021981..d8b99351b053 100644
--- a/drivers/scsi/pcmcia/fdomain_stub.c
+++ b/drivers/scsi/pcmcia/fdomain_stub.c
@@ -130,7 +130,7 @@ static int fdomain_config(struct pcmcia_device *link)
     cisparse_t parse;
     int i, last_ret, last_fn;
     u_char tuple_data[64];
-    char str[16];
+    char str[22];
     struct Scsi_Host *host;
 
     DEBUG(0, "fdomain_config(0x%p)\n", link);
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index b12fb310e399..f243fc30c908 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -1569,6 +1569,7 @@ struct request_queue *__scsi_alloc_queue(struct Scsi_Host *shost,
                                          request_fn_proc *request_fn)
 {
         struct request_queue *q;
+        struct device *dev = shost->shost_gendev.parent;
 
         q = blk_init_queue(request_fn, NULL);
         if (!q)
@@ -1583,6 +1584,9 @@ struct request_queue *__scsi_alloc_queue(struct Scsi_Host *shost,
         blk_queue_max_sectors(q, shost->max_sectors);
         blk_queue_bounce_limit(q, scsi_calculate_bounce_limit(shost));
         blk_queue_segment_boundary(q, shost->dma_boundary);
+        dma_set_seg_boundary(dev, shost->dma_boundary);
+
+        blk_queue_max_segment_size(q, dma_get_max_seg_size(dev));
 
         if (!shost->use_clustering)
                 clear_bit(QUEUE_FLAG_CLUSTER, &q->queue_flags);
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index f94109cbb46e..b8a4bd94f51d 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -2047,7 +2047,7 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
          * Oxford Semi 952 rev B workaround
          */
         if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
-                quot ++;
+                quot++;
 
         if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
                 if (baud < 2400)
@@ -2662,16 +2662,17 @@ static int __devinit serial8250_probe(struct platform_device *dev)
         memset(&port, 0, sizeof(struct uart_port));
 
         for (i = 0; p && p->flags != 0; p++, i++) {
-                port.iobase     = p->iobase;
-                port.membase    = p->membase;
-                port.irq        = p->irq;
-                port.uartclk    = p->uartclk;
-                port.regshift   = p->regshift;
-                port.iotype     = p->iotype;
-                port.flags      = p->flags;
-                port.mapbase    = p->mapbase;
-                port.hub6       = p->hub6;
-                port.dev        = &dev->dev;
+                port.iobase             = p->iobase;
+                port.membase            = p->membase;
+                port.irq                = p->irq;
+                port.uartclk            = p->uartclk;
+                port.regshift           = p->regshift;
+                port.iotype             = p->iotype;
+                port.flags              = p->flags;
+                port.mapbase            = p->mapbase;
+                port.hub6               = p->hub6;
+                port.private_data       = p->private_data;
+                port.dev                = &dev->dev;
                 if (share_irqs)
                         port.flags |= UPF_SHARE_IRQ;
                 ret = serial8250_register_port(&port);
@@ -2812,15 +2813,16 @@ int serial8250_register_port(struct uart_port *port)
         if (uart) {
                 uart_remove_one_port(&serial8250_reg, &uart->port);
 
-                uart->port.iobase   = port->iobase;
-                uart->port.membase  = port->membase;
-                uart->port.irq      = port->irq;
-                uart->port.uartclk  = port->uartclk;
-                uart->port.fifosize = port->fifosize;
-                uart->port.regshift = port->regshift;
-                uart->port.iotype   = port->iotype;
-                uart->port.flags    = port->flags | UPF_BOOT_AUTOCONF;
-                uart->port.mapbase  = port->mapbase;
+                uart->port.iobase       = port->iobase;
+                uart->port.membase      = port->membase;
+                uart->port.irq          = port->irq;
+                uart->port.uartclk      = port->uartclk;
+                uart->port.fifosize     = port->fifosize;
+                uart->port.regshift     = port->regshift;
+                uart->port.iotype       = port->iotype;
+                uart->port.flags        = port->flags | UPF_BOOT_AUTOCONF;
+                uart->port.mapbase      = port->mapbase;
+                uart->port.private_data = port->private_data;
                 if (port->dev)
                         uart->port.dev = port->dev;
 
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index ceb03c9e749f..0a4ac2b6eb5a 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -106,6 +106,32 @@ setup_port(struct serial_private *priv, struct uart_port *port,
 }
 
 /*
+ * ADDI-DATA GmbH communication cards <info@addi-data.com>
+ */
+static int addidata_apci7800_setup(struct serial_private *priv,
+                                struct pciserial_board *board,
+                                struct uart_port *port, int idx)
+{
+        unsigned int bar = 0, offset = board->first_offset;
+        bar = FL_GET_BASE(board->flags);
+
+        if (idx < 2) {
+                offset += idx * board->uart_offset;
+        } else if ((idx >= 2) && (idx < 4)) {
+                bar += 1;
+                offset += ((idx - 2) * board->uart_offset);
+        } else if ((idx >= 4) && (idx < 6)) {
+                bar += 2;
+                offset += ((idx - 4) * board->uart_offset);
+        } else if (idx >= 6) {
+                bar += 3;
+                offset += ((idx - 6) * board->uart_offset);
+        }
+
+        return setup_port(priv, port, bar, offset, board->reg_shift);
+}
+
+/*
  * AFAVLAB uses a different mixture of BARs and offsets
  * Not that ugly ;) -- HW
  */
@@ -752,6 +778,16 @@ pci_default_setup(struct serial_private *priv, struct pciserial_board *board,
  */
 static struct pci_serial_quirk pci_serial_quirks[] = {
         /*
+        * ADDI-DATA GmbH communication cards <info@addi-data.com>
+        */
+        {
+                .vendor         = PCI_VENDOR_ID_ADDIDATA_OLD,
+                .device         = PCI_DEVICE_ID_ADDIDATA_APCI7800,
+                .subvendor      = PCI_ANY_ID,
+                .subdevice      = PCI_ANY_ID,
+                .setup          = addidata_apci7800_setup,
+        },
+        /*
          * AFAVLAB cards - these may be called via parport_serial
          *  It is not clear whether this applies to all products.
          */
@@ -1179,6 +1215,12 @@ static struct pciserial_board pci_boards[] __devinitdata = {
                 .base_baud      = 115200,
                 .uart_offset    = 8,
         },
+        [pbn_b0_8_115200] = {
+                .flags          = FL_BASE0,
+                .num_ports      = 8,
+                .base_baud      = 115200,
+                .uart_offset    = 8,
+        },
 
         [pbn_b0_1_921600] = {
                 .flags          = FL_BASE0,
@@ -2697,6 +2739,97 @@ static struct pci_device_id serial_pci_tbl[] = {
                 pbn_pasemi_1682M },
 
         /*
+        * ADDI-DATA GmbH communication cards <info@addi-data.com>
+        */
+        {       PCI_VENDOR_ID_ADDIDATA,
+                PCI_DEVICE_ID_ADDIDATA_APCI7500,
+                PCI_ANY_ID,
+                PCI_ANY_ID,
+                0,
+                0,
+                pbn_b0_4_115200 },
+
+        {       PCI_VENDOR_ID_ADDIDATA,
+                PCI_DEVICE_ID_ADDIDATA_APCI7420,
+                PCI_ANY_ID,
+                PCI_ANY_ID,
+                0,
+                0,
+                pbn_b0_2_115200 },
+
+        {       PCI_VENDOR_ID_ADDIDATA,
+                PCI_DEVICE_ID_ADDIDATA_APCI7300,
+                PCI_ANY_ID,
+                PCI_ANY_ID,
+                0,
+                0,
+                pbn_b0_1_115200 },
+
+        {       PCI_VENDOR_ID_ADDIDATA_OLD,
+                PCI_DEVICE_ID_ADDIDATA_APCI7800,
+                PCI_ANY_ID,
+                PCI_ANY_ID,
+                0,
+                0,
+                pbn_b1_8_115200 },
+
+        {       PCI_VENDOR_ID_ADDIDATA,
+                PCI_DEVICE_ID_ADDIDATA_APCI7500_2,
+                PCI_ANY_ID,
+                PCI_ANY_ID,
+                0,
+                0,
+                pbn_b0_4_115200 },
+
+        {       PCI_VENDOR_ID_ADDIDATA,
+                PCI_DEVICE_ID_ADDIDATA_APCI7420_2,
+                PCI_ANY_ID,
+                PCI_ANY_ID,
+                0,
+                0,
+                pbn_b0_2_115200 },
+
+        {       PCI_VENDOR_ID_ADDIDATA,
+                PCI_DEVICE_ID_ADDIDATA_APCI7300_2,
+                PCI_ANY_ID,
+                PCI_ANY_ID,
+                0,
+                0,
+                pbn_b0_1_115200 },
+
+        {       PCI_VENDOR_ID_ADDIDATA,
+                PCI_DEVICE_ID_ADDIDATA_APCI7500_3,
+                PCI_ANY_ID,
+                PCI_ANY_ID,
+                0,
+                0,
+                pbn_b0_4_115200 },
+
+        {       PCI_VENDOR_ID_ADDIDATA,
+                PCI_DEVICE_ID_ADDIDATA_APCI7420_3,
+                PCI_ANY_ID,
+                PCI_ANY_ID,
+                0,
+                0,
+                pbn_b0_2_115200 },
+
+        {       PCI_VENDOR_ID_ADDIDATA,
+                PCI_DEVICE_ID_ADDIDATA_APCI7300_3,
+                PCI_ANY_ID,
+                PCI_ANY_ID,
+                0,
+                0,
+                pbn_b0_1_115200 },
+
+        {       PCI_VENDOR_ID_ADDIDATA,
+                PCI_DEVICE_ID_ADDIDATA_APCI7800_3,
+                PCI_ANY_ID,
+                PCI_ANY_ID,
+                0,
+                0,
+                pbn_b0_8_115200 },
+
+        /*
          * These entries match devices with class COMMUNICATION_SERIAL,
          * COMMUNICATION_MODEM or COMMUNICATION_MULTISERIAL
          */
diff --git a/drivers/serial/8250_pnp.c b/drivers/serial/8250_pnp.c
index 1de098e75497..6f09cbd7fc48 100644
--- a/drivers/serial/8250_pnp.c
+++ b/drivers/serial/8250_pnp.c
@@ -414,8 +414,9 @@ static int __devinit check_resources(struct pnp_option *option)
  */
 static int __devinit serial_pnp_guess_board(struct pnp_dev *dev, int *flags)
 {
-        if (!(check_name(pnp_dev_name(dev)) || (dev->card && check_name(dev->card->name))))
-                return -ENODEV;
+        if (!(check_name(pnp_dev_name(dev)) ||
+                (dev->card && check_name(dev->card->name))))
+                        return -ENODEV;
 
         if (check_resources(dev->independent))
                 return 0;
@@ -452,8 +453,9 @@ serial_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id)
                 return -ENODEV;
 
 #ifdef SERIAL_DEBUG_PNP
-        printk("Setup PNP port: port %x, mem 0x%lx, irq %d, type %d\n",
-               port.iobase, port.mapbase, port.irq, port.iotype);
+        printk(KERN_DEBUG
+                "Setup PNP port: port %x, mem 0x%lx, irq %d, type %d\n",
+                       port.iobase, port.mapbase, port.irq, port.iotype);
 #endif
 
         port.flags |= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
diff --git a/drivers/serial/mcf.c b/drivers/serial/mcf.c
index 051fcc2f5ba8..e76fc72c9b36 100644
--- a/drivers/serial/mcf.c
+++ b/drivers/serial/mcf.c
@@ -434,7 +434,7 @@ static struct uart_ops mcf_uart_ops = {
 
 static struct mcf_uart mcf_ports[3];
 
-#define MCF_MAXPORTS    (sizeof(mcf_ports) / sizeof(struct mcf_uart))
+#define MCF_MAXPORTS    ARRAY_SIZE(mcf_ports)
 
 /****************************************************************************/
 #if defined(CONFIG_SERIAL_MCF_CONSOLE)
diff --git a/drivers/serial/mpsc.c b/drivers/serial/mpsc.c
index 4d643c926657..cb3a91967742 100644
--- a/drivers/serial/mpsc.c
+++ b/drivers/serial/mpsc.c
@@ -612,6 +612,7 @@ static void mpsc_hw_init(struct mpsc_port_info *pi)
 
         /* No preamble, 16x divider, low-latency, */
         writel(0x04400400, pi->mpsc_base + MPSC_MMCRH);
+        mpsc_set_baudrate(pi, pi->default_baud);
 
         if (pi->mirror_regs) {
                 pi->MPSC_CHR_1_m = 0;
diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c
index e773c8e14962..45de19366030 100644
--- a/drivers/serial/s3c2410.c
+++ b/drivers/serial/s3c2410.c
@@ -1527,7 +1527,7 @@ static inline void s3c2440_serial_exit(void)
 #define s3c2440_uart_inf_at NULL
 #endif /* CONFIG_CPU_S3C2440 */
 
-#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
+#if defined(CONFIG_CPU_S3C2412)
 
 static int s3c2412_serial_setsource(struct uart_port *port,
                                      struct s3c24xx_uart_clksrc *clk)
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
index 3bb5d241dd40..276da148c57e 100644
--- a/drivers/serial/serial_core.c
+++ b/drivers/serial/serial_core.c
@@ -371,7 +371,8 @@ uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
                  */
                 termios->c_cflag &= ~CBAUD;
                 if (old) {
-                        termios->c_cflag |= old->c_cflag & CBAUD;
+                        baud = tty_termios_baud_rate(old);
+                        tty_termios_encode_baud_rate(termios, baud, baud);
                         old = NULL;
                         continue;
                 }
@@ -380,7 +381,7 @@ uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
                  * As a last resort, if the quotient is zero,
                  * default to 9600 bps
                  */
-                termios->c_cflag |= B9600;
+                tty_termios_encode_baud_rate(termios, 9600, 9600);
         }
 
         return 0;
@@ -1977,6 +1978,7 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *port)
 
         if (state->info && state->info->flags & UIF_INITIALIZED) {
                 const struct uart_ops *ops = port->ops;
+                int tries;
 
                 state->info->flags = (state->info->flags & ~UIF_INITIALIZED)
                                      | UIF_SUSPENDED;
@@ -1990,9 +1992,14 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *port)
                 /*
                  * Wait for the transmitter to empty.
                  */
-                while (!ops->tx_empty(port)) {
+                for (tries = 3; !ops->tx_empty(port) && tries; tries--) {
                         msleep(10);
                 }
+                if (!tries)
+                        printk(KERN_ERR "%s%s%s%d: Unable to drain transmitter\n",
+                               port->dev ? port->dev->bus_id : "",
+                               port->dev ? ": " : "",
+                               drv->dev_name, port->line);
 
                 ops->shutdown(port);
         }
@@ -2029,8 +2036,6 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *port)
         }
         port->suspended = 0;
 
-        uart_change_pm(state, 0);
-
         /*
          * Re-enable the console device after suspending.
          */
@@ -2049,6 +2054,7 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *port)
                 if (state->info && state->info->tty && termios.c_cflag == 0)
                         termios = *state->info->tty->termios;
 
+                uart_change_pm(state, 0);
                 port->ops->set_termios(port, &termios, NULL);
                 console_start(port->cons);
         }
@@ -2057,6 +2063,7 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *port)
                 const struct uart_ops *ops = port->ops;
                 int ret;
 
+                uart_change_pm(state, 0);
                 ops->set_mctrl(port, 0);
                 ret = ops->startup(port);
                 if (ret == 0) {
@@ -2150,10 +2157,11 @@ uart_configure_port(struct uart_driver *drv, struct uart_state *state,
 
                 /*
                  * Ensure that the modem control lines are de-activated.
+                 * keep the DTR setting that is set in uart_set_options()
                  * We probably don't need a spinlock around this, but
                  */
                 spin_lock_irqsave(&port->lock, flags);
-                port->ops->set_mctrl(port, 0);
+                port->ops->set_mctrl(port, port->mctrl & TIOCM_DTR);
                 spin_unlock_irqrestore(&port->lock, flags);
 
                 /*
diff --git a/drivers/serial/serial_cs.c b/drivers/serial/serial_cs.c
index d8b660061c13..164d2a42eb59 100644
--- a/drivers/serial/serial_cs.c
+++ b/drivers/serial/serial_cs.c
@@ -389,7 +389,7 @@ static void serial_detach(struct pcmcia_device *link)
 /*====================================================================*/
 
 static int setup_serial(struct pcmcia_device *handle, struct serial_info * info,
-                        kio_addr_t iobase, int irq)
+                        unsigned int iobase, int irq)
 {
         struct uart_port port;
         int line;
@@ -456,7 +456,7 @@ next_tuple(struct pcmcia_device *handle, tuple_t * tuple, cisparse_t * parse)
 
 static int simple_config(struct pcmcia_device *link)
 {
-        static const kio_addr_t base[5] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
+        static const unsigned int base[5] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
         static const int size_table[2] = { 8, 16 };
         struct serial_info *info = link->priv;
         struct serial_cfg_mem *cfg_mem;
@@ -480,7 +480,7 @@ static int simple_config(struct pcmcia_device *link)
         /* If the card is already configured, look up the port and irq */
         i = pcmcia_get_configuration_info(link, &config);
         if ((i == CS_SUCCESS) && (config.Attributes & CONF_VALID_CLIENT)) {
-                kio_addr_t port = 0;
+                unsigned int port = 0;
                 if ((config.BasePort2 != 0) && (config.NumPorts2 == 8)) {
                         port = config.BasePort2;
                         info->slave = 1;