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-rw-r--r--drivers/Makefile1
-rw-r--r--drivers/acorn/README1
-rw-r--r--drivers/acorn/block/Kconfig36
-rw-r--r--drivers/acorn/block/Makefile9
-rw-r--r--drivers/acorn/block/fd1772.c1604
-rw-r--r--drivers/acorn/block/fd1772dma.S100
-rw-r--r--drivers/acorn/block/mfm.S162
-rw-r--r--drivers/acorn/block/mfmhd.c1385
-rw-r--r--drivers/acpi/Kconfig8
-rw-r--r--drivers/ata/ata_piix.c74
-rw-r--r--drivers/ata/libata-core.c1
-rw-r--r--drivers/ata/libata-sff.c4
-rw-r--r--drivers/ata/pata_cmd64x.c8
-rw-r--r--drivers/ata/pata_sis.c20
-rw-r--r--drivers/base/cpu.c2
-rw-r--r--drivers/block/cciss.c5
-rw-r--r--drivers/char/Makefile1
-rw-r--r--drivers/char/drm/i915_dma.c14
-rw-r--r--drivers/char/drm/i915_drv.h1
-rw-r--r--drivers/char/ip2/ip2main.c3
-rw-r--r--drivers/char/ipmi/ipmi_si_intf.c1
-rw-r--r--drivers/char/synclink_gt.c75
-rw-r--r--drivers/char/watchdog/Kconfig117
-rw-r--r--drivers/char/watchdog/Makefile43
-rw-r--r--drivers/char/watchdog/bfin_wdt.c490
-rw-r--r--drivers/char/watchdog/booke_wdt.c2
-rw-r--r--drivers/char/watchdog/cpu5wdt.c4
-rw-r--r--drivers/char/watchdog/davinci_wdt.c281
-rw-r--r--drivers/char/watchdog/iTCO_wdt.c38
-rw-r--r--drivers/char/watchdog/machzwd.c1
-rw-r--r--drivers/char/watchdog/mixcomwd.c5
-rw-r--r--drivers/char/watchdog/mpc5200_wdt.c286
-rw-r--r--drivers/char/watchdog/mpc83xx_wdt.c3
-rw-r--r--drivers/char/watchdog/mpc8xx_wdt.c2
-rw-r--r--drivers/char/watchdog/mtx-1_wdt.c1
-rw-r--r--drivers/char/watchdog/mv64x60_wdt.c218
-rw-r--r--drivers/char/watchdog/omap_wdt.c4
-rw-r--r--drivers/char/watchdog/s3c2410_wdt.c6
-rw-r--r--drivers/char/watchdog/sa1100_wdt.c3
-rw-r--r--drivers/char/watchdog/sbc60xxwdt.c4
-rw-r--r--drivers/char/watchdog/sc1200wdt.c4
-rw-r--r--drivers/char/watchdog/sc520_wdt.c4
-rw-r--r--drivers/char/watchdog/w83627hf_wdt.c24
-rw-r--r--drivers/dma/iovlock.c27
-rw-r--r--drivers/firewire/fw-ohci.c20
-rw-r--r--drivers/firewire/fw-sbp2.c5
-rw-r--r--drivers/firewire/fw-transaction.c4
-rw-r--r--drivers/firewire/fw-transaction.h2
-rw-r--r--drivers/hid/usbhid/hid-core.c5
-rw-r--r--drivers/hid/usbhid/hid-quirks.c138
-rw-r--r--drivers/hwmon/Kconfig10
-rw-r--r--drivers/hwmon/Makefile1
-rw-r--r--drivers/hwmon/abituguru3.c5
-rw-r--r--drivers/hwmon/ams/ams-core.c1
-rw-r--r--drivers/hwmon/applesmc.c14
-rw-r--r--drivers/hwmon/dme1737.c2
-rw-r--r--drivers/hwmon/fscher.c4
-rw-r--r--drivers/hwmon/it87.c2
-rw-r--r--drivers/hwmon/lm78.c2
-rw-r--r--drivers/hwmon/lm90.c2
-rw-r--r--drivers/hwmon/lm93.c2
-rw-r--r--drivers/hwmon/pc87360.c2
-rw-r--r--drivers/hwmon/sis5595.c2
-rw-r--r--drivers/hwmon/smsc47m1.c2
-rw-r--r--drivers/hwmon/thmc50.c440
-rw-r--r--drivers/hwmon/via686a.c2
-rw-r--r--drivers/hwmon/vt8231.c4
-rw-r--r--drivers/hwmon/w83627hf.c2
-rw-r--r--drivers/ide/Kconfig2
-rw-r--r--drivers/ide/arm/icside.c3
-rw-r--r--drivers/ide/arm/ide_arm.c20
-rw-r--r--drivers/ide/ide-tape.c2
-rw-r--r--drivers/ide/pci/alim15x3.c2
-rw-r--r--drivers/ide/pci/cmd64x.c4
-rw-r--r--drivers/ide/pci/cs5520.c2
-rw-r--r--drivers/ide/pci/cs5535.c42
-rw-r--r--drivers/ide/pci/it8213.c33
-rw-r--r--drivers/ide/pci/jmicron.c21
-rw-r--r--drivers/ide/pci/piix.c17
-rw-r--r--drivers/ide/pci/scc_pata.c61
-rw-r--r--drivers/ide/pci/sis5513.c1
-rw-r--r--drivers/ide/pci/slc90e66.c15
-rw-r--r--drivers/ieee1394/Kconfig2
-rw-r--r--drivers/ieee1394/sbp2.c5
-rw-r--r--drivers/infiniband/hw/ehca/ehca_irq.c2
-rw-r--r--drivers/input/evdev.c2
-rw-r--r--drivers/isdn/divert/divert_procfs.c4
-rw-r--r--drivers/md/raid10.c10
-rw-r--r--drivers/message/i2o/i2o_block.c2
-rw-r--r--drivers/mtd/Makefile2
-rw-r--r--drivers/mtd/devices/docprobe.c3
-rw-r--r--drivers/mtd/mtdpart.c4
-rw-r--r--drivers/mtd/nand/at91_nand.c5
-rw-r--r--drivers/mtd/nand/diskonchip.c3
-rw-r--r--drivers/mtd/nand/edb7312.c10
-rw-r--r--drivers/mtd/nand/nand_base.c12
-rw-r--r--drivers/mtd/rfd_ftl.c1
-rw-r--r--drivers/net/3c59x.c1
-rw-r--r--drivers/net/8139cp.c1
-rw-r--r--drivers/net/8139too.c1
-rw-r--r--drivers/net/Kconfig2
-rw-r--r--drivers/net/ax88796.c1
-rw-r--r--drivers/net/b44.c1
-rw-r--r--drivers/net/bnx2.c1
-rw-r--r--drivers/net/bonding/bond_main.c52
-rw-r--r--drivers/net/cxgb3/cxgb3_main.c1
-rw-r--r--drivers/net/e100.c1
-rw-r--r--drivers/net/e1000/e1000_ethtool.c1
-rw-r--r--drivers/net/forcedeth.c1
-rw-r--r--drivers/net/hamradio/bpqether.c6
-rw-r--r--drivers/net/ixgb/ixgb_ethtool.c1
-rw-r--r--drivers/net/loopback.c7
-rw-r--r--drivers/net/ne2k-pci.c1
-rw-r--r--drivers/net/netxen/netxen_nic_ethtool.c1
-rw-r--r--drivers/net/pcnet32.c1
-rw-r--r--drivers/net/pppoe.c37
-rw-r--r--drivers/net/pppox.c11
-rwxr-xr-xdrivers/net/qla3xxx.c1
-rw-r--r--drivers/net/r8169.c1
-rw-r--r--drivers/net/s2io.c9
-rw-r--r--drivers/net/sc92031.c1
-rw-r--r--drivers/net/skfp/pmf.c2
-rw-r--r--drivers/net/skge.c1
-rw-r--r--drivers/net/sky2.c1
-rw-r--r--drivers/net/sundance.c1
-rw-r--r--drivers/net/sunlance.c48
-rw-r--r--drivers/net/sunvnet.c1
-rw-r--r--drivers/net/tc35815.c1
-rw-r--r--drivers/net/tg3.c1
-rw-r--r--drivers/net/tulip/tulip_core.c8
-rw-r--r--drivers/net/via-rhine.c1
-rw-r--r--drivers/net/via-velocity.c2
-rw-r--r--drivers/parport/parport_pc.c4
-rw-r--r--drivers/pci/pci-driver.c2
-rw-r--r--drivers/pci/pci.c7
-rw-r--r--drivers/pcmcia/cs.c3
-rw-r--r--drivers/power/Kconfig2
-rw-r--r--drivers/rtc/Kconfig78
-rw-r--r--drivers/rtc/rtc-dev.c2
-rw-r--r--drivers/rtc/rtc-m48t59.c2
-rw-r--r--drivers/rtc/rtc-s3c.c2
-rw-r--r--drivers/s390/block/dasd_eckd.c4
-rw-r--r--drivers/sbus/char/bbc_envctrl.c10
-rw-r--r--drivers/sbus/char/bbc_i2c.c4
-rw-r--r--drivers/sbus/char/vfc_dev.c1
-rw-r--r--drivers/scsi/arm/Kconfig9
-rw-r--r--drivers/scsi/arm/Makefile1
-rw-r--r--drivers/scsi/arm/ecoscsi.c166
-rw-r--r--drivers/scsi/ide-scsi.c10
-rw-r--r--drivers/serial/8250.c2
-rw-r--r--drivers/serial/8250_early.c2
-rw-r--r--drivers/serial/8250_pci.c20
-rw-r--r--drivers/serial/Kconfig16
-rw-r--r--drivers/serial/mpsc.c711
-rw-r--r--drivers/serial/sb1250-duart.c14
-rw-r--r--drivers/serial/serial_txx9.c5
-rw-r--r--drivers/serial/vr41xx_siu.c7
-rw-r--r--drivers/spi/spi.c45
-rw-r--r--drivers/spi/spi_mpc83xx.c30
-rw-r--r--drivers/spi/spidev.c13
-rw-r--r--drivers/video/Kconfig12
-rw-r--r--drivers/video/Makefile1
-rw-r--r--drivers/video/acornfb.c20
-rw-r--r--drivers/video/cg6.c5
-rw-r--r--drivers/video/console/fonts.c4
-rw-r--r--drivers/video/fbmem.c42
-rw-r--r--drivers/video/geode/Kconfig15
-rw-r--r--drivers/video/geode/Makefile2
-rw-r--r--drivers/video/geode/lxfb.h199
-rw-r--r--drivers/video/geode/lxfb_core.c621
-rw-r--r--drivers/video/geode/lxfb_ops.c536
-rw-r--r--drivers/video/s3c2410fb.c88
-rw-r--r--drivers/video/s3c2410fb.h3
-rw-r--r--drivers/video/tx3912fb.c326
-rw-r--r--drivers/video/xilinxfb.c23
175 files changed, 4274 insertions, 5050 deletions
diff --git a/drivers/Makefile b/drivers/Makefile
index a9e4c5f922a0..f0878b2ec55e 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -66,6 +66,7 @@ obj-y += i2c/
66obj-$(CONFIG_W1) += w1/ 66obj-$(CONFIG_W1) += w1/
67obj-$(CONFIG_POWER_SUPPLY) += power/ 67obj-$(CONFIG_POWER_SUPPLY) += power/
68obj-$(CONFIG_HWMON) += hwmon/ 68obj-$(CONFIG_HWMON) += hwmon/
69obj-$(CONFIG_WATCHDOG) += char/watchdog/
69obj-$(CONFIG_PHONE) += telephony/ 70obj-$(CONFIG_PHONE) += telephony/
70obj-$(CONFIG_MD) += md/ 71obj-$(CONFIG_MD) += md/
71obj-$(CONFIG_BT) += bluetooth/ 72obj-$(CONFIG_BT) += bluetooth/
diff --git a/drivers/acorn/README b/drivers/acorn/README
deleted file mode 100644
index d399c09ca61c..000000000000
--- a/drivers/acorn/README
+++ /dev/null
@@ -1 +0,0 @@
1Drivers for the ACORN "podule" ARM specific bus.
diff --git a/drivers/acorn/block/Kconfig b/drivers/acorn/block/Kconfig
deleted file mode 100644
index a0ff25ea439f..000000000000
--- a/drivers/acorn/block/Kconfig
+++ /dev/null
@@ -1,36 +0,0 @@
1#
2# Block device driver configuration
3#
4
5menu "Acorn-specific block devices"
6 depends on ARCH_ARC || ARCH_A5K
7
8config BLK_DEV_FD1772
9 tristate "Old Archimedes floppy (1772) support"
10 depends on ARCH_ARC || ARCH_A5K
11 help
12 Support the floppy drive on the Acorn Archimedes (A300, A4x0, A540,
13 R140 and R260) series of computers; it supports only 720K floppies
14 at the moment. If you don't have one of these machines just answer
15 N.
16
17config BLK_DEV_MFM
18 tristate "MFM harddisk support"
19 depends on ARCH_ARC || ARCH_A5K
20 help
21 Support the MFM hard drives on the Acorn Archimedes both
22 on-board the A4x0 motherboards and via the Acorn MFM podules.
23 Drives up to 64MB are supported. If you haven't got one of these
24 machines or drives just say N.
25
26config BLK_DEV_MFM_AUTODETECT
27 bool "Autodetect hard drive geometry"
28 depends on BLK_DEV_MFM
29 help
30 If you answer Y, the MFM code will attempt to automatically detect
31 the cylinders/heads/sectors count on your hard drive. WARNING: This
32 sometimes doesn't work and it also does some dodgy stuff which
33 potentially might damage your drive.
34
35endmenu
36
diff --git a/drivers/acorn/block/Makefile b/drivers/acorn/block/Makefile
deleted file mode 100644
index 38a9afe8e03f..000000000000
--- a/drivers/acorn/block/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
1#
2# Makefile for the Acorn block device drivers.
3#
4
5fd1772_mod-objs := fd1772.o fd1772dma.o
6mfmhd_mod-objs := mfmhd.o mfm.o
7
8obj-$(CONFIG_BLK_DEV_FD1772) += fd1772_mod.o
9obj-$(CONFIG_BLK_DEV_MFM) += mfmhd_mod.o
diff --git a/drivers/acorn/block/fd1772.c b/drivers/acorn/block/fd1772.c
deleted file mode 100644
index d7e18ce8dad9..000000000000
--- a/drivers/acorn/block/fd1772.c
+++ /dev/null
@@ -1,1604 +0,0 @@
1/*
2 * linux/kernel/arch/arm/drivers/block/fd1772.c
3 * Based on ataflop.c in the m68k Linux
4 * Copyright (C) 1993 Greg Harp
5 * Atari Support by Bjoern Brauel, Roman Hodek
6 * Archimedes Support by Dave Gilbert (linux@treblig.org)
7 *
8 * Big cleanup Sep 11..14 1994 Roman Hodek:
9 * - Driver now works interrupt driven
10 * - Support for two drives; should work, but I cannot test that :-(
11 * - Reading is done in whole tracks and buffered to speed up things
12 * - Disk change detection and drive deselecting after motor-off
13 * similar to TOS
14 * - Autodetection of disk format (DD/HD); untested yet, because I
15 * don't have an HD drive :-(
16 *
17 * Fixes Nov 13 1994 Martin Schaller:
18 * - Autodetection works now
19 * - Support for 5 1/4" disks
20 * - Removed drive type (unknown on atari)
21 * - Do seeks with 8 Mhz
22 *
23 * Changes by Andreas Schwab:
24 * - After errors in multiple read mode try again reading single sectors
25 * (Feb 1995):
26 * - Clean up error handling
27 * - Set blk_size for proper size checking
28 * - Initialize track register when testing presence of floppy
29 * - Implement some ioctl's
30 *
31 * Changes by Torsten Lang:
32 * - When probing the floppies we should add the FDC1772CMDADD_H flag since
33 * the FDC1772 will otherwise wait forever when no disk is inserted...
34 *
35 * Things left to do:
36 * - Formatting
37 * - Maybe a better strategy for disk change detection (does anyone
38 * know one?)
39 * - There are some strange problems left: The strangest one is
40 * that, at least on my TT (4+4MB), the first 2 Bytes of the last
41 * page of the TT-Ram (!) change their contents (some bits get
42 * set) while a floppy DMA is going on. But there are no accesses
43 * to these memory locations from the kernel... (I tested that by
44 * making the page read-only). I cannot explain what's going on...
45 * - Sometimes the drive-change-detection stops to work. The
46 * function is still called, but the WP bit always reads as 0...
47 * Maybe a problem with the status reg mode or a timing problem.
48 * Note 10/12/94: The change detection now seems to work reliably.
49 * There is no proof, but I've seen no hang for a long time...
50 *
51 * ARCHIMEDES changes: (gilbertd@cs.man.ac.uk)
52 * 26/12/95 - Changed all names starting with FDC to FDC1772
53 * Removed all references to clock speed of FDC - we're stuck with 8MHz
54 * Modified disk_type structure to remove HD formats
55 *
56 * 7/ 1/96 - Wrote FIQ code, removed most remaining atariisms
57 *
58 * 13/ 1/96 - Well I think its read a single sector; but there is a problem
59 * fd_rwsec_done which is called in FIQ mode starts another transfer
60 * off (in fd_rwsec) while still in FIQ mode. Because its still in
61 * FIQ mode it can't service the DMA and loses data. So need to
62 * heavily restructure.
63 * 14/ 1/96 - Found that the definitions of the register numbers of the
64 * FDC were multiplied by 2 in the header for the 16bit words
65 * of the atari so half the writes were going in the wrong place.
66 * Also realised that the FIQ entry didn't make any attempt to
67 * preserve registers or return correctly; now in assembler.
68 *
69 * 11/ 2/96 - Hmm - doesn't work on real machine. Auto detect doesn't
70 * and hacking that past seems to wait forever - check motor
71 * being turned on.
72 *
73 * 17/ 2/96 - still having problems - forcing track to -1 when selecting
74 * new drives seems to allow it to read first few sectors
75 * but then we get solid hangs at apparently random places
76 * which change depending what is happening.
77 *
78 * 9/ 3/96 - Fiddled a lot of stuff around to move to kernel 1.3.35
79 * A lot of fiddling in DMA stuff. Having problems with it
80 * constnatly thinking its timeing out. Ah - its timeout
81 * was set to (6*HZ) rather than jiffies+(6*HZ). Now giving
82 * duff data!
83 *
84 * 5/ 4/96 - Made it use the new IOC_ macros rather than *ioc
85 * Hmm - giving unexpected FIQ and then timeouts
86 * 18/ 8/96 - Ran through indent -kr -i8
87 * Some changes to disc change detect; don't know how well it
88 * works.
89 * 24/ 8/96 - Put all the track buffering code back in from the atari
90 * code - I wonder if it will still work... No :-)
91 * Still works if I turn off track buffering.
92 * 25/ 8/96 - Changed the timer expires that I'd added back to be
93 * jiffies + ....; and it all sprang to life! Got 2.8K/sec
94 * off a cp -r of a 679K disc (showed 94% cpu usage!)
95 * (PC gets 14.3K/sec - 0% CPU!) Hmm - hard drive corrupt!
96 * Also perhaps that compile was with cache off.
97 * changed cli in fd_readtrack_check to cliIF
98 * changed vmallocs to kmalloc (whats the difference!!)
99 * Removed the busy wait loop in do_fd_request and replaced
100 * by a routine on tq_immediate; only 11% cpu on a dd off the
101 * raw disc - but the speed is the same.
102 * 1/ 9/96 - Idea (failed!) - set the 'disable spin-up sequence'
103 * when we read the track if we know the motor is on; didn't
104 * help - perhaps we have to do it in stepping as well.
105 * Nope. Still doesn't help.
106 * Hmm - what seems to be happening is that fd_readtrack_check
107 * is never getting called. Its job is to terminate the read
108 * just after we think we should have got the data; otherwise
109 * the fdc takes 1 second to timeout; which is what's happening
110 * Now I can see 'readtrack_timer' being set (which should do the
111 * call); but it never seems to be called - hmm!
112 * OK - I've moved the check to my tq_immediate code -
113 * and it WORKS! 13.95K/second at 19% CPU.
114 * I wish I knew why that timer didn't work.....
115 *
116 * 16/11/96 - Fiddled and frigged for 2.0.18
117 *
118 * DAG 30/01/99 - Started frobbing for 2.2.1
119 * DAG 20/06/99 - A little more frobbing:
120 * Included include/asm/uaccess.h for get_user/put_user
121 *
122 * DAG 1/09/00 - Dusted off for 2.4.0-test7
123 * MAX_SECTORS was name clashing so it is now FD1772_...
124 * Minor parameter, name layouts for 2.4.x differences
125 */
126
127#include <linux/sched.h>
128#include <linux/fs.h>
129#include <linux/fcntl.h>
130#include <linux/slab.h>
131#include <linux/kernel.h>
132#include <linux/interrupt.h>
133#include <linux/timer.h>
134#include <linux/workqueue.h>
135#include <linux/fd.h>
136#include <linux/fd1772.h>
137#include <linux/errno.h>
138#include <linux/types.h>
139#include <linux/delay.h>
140#include <linux/mm.h>
141#include <linux/bitops.h>
142
143#include <asm/arch/oldlatches.h>
144#include <asm/dma.h>
145#include <asm/hardware.h>
146#include <asm/hardware/ioc.h>
147#include <asm/io.h>
148#include <asm/irq.h>
149#include <asm/mach-types.h>
150#include <asm/pgtable.h>
151#include <asm/system.h>
152#include <asm/uaccess.h>
153
154
155/* Note: FD_MAX_UNITS could be redefined to 2 for the Atari (with
156 * little additional rework in this file). But I'm not yet sure if
157 * some other code depends on the number of floppies... (It is defined
158 * in a public header!)
159 */
160#if 0
161#undef FD_MAX_UNITS
162#define FD_MAX_UNITS 2
163#endif
164
165/* Ditto worries for Arc - DAG */
166#define FD_MAX_UNITS 4
167#define TRACKBUFFER 0
168/*#define DEBUG*/
169
170#ifdef DEBUG
171#define DPRINT(a) printk a
172#else
173#define DPRINT(a)
174#endif
175
176static struct request_queue *floppy_queue;
177
178#define MAJOR_NR FLOPPY_MAJOR
179#define FLOPPY_DMA 0
180#define DEVICE_NAME "floppy"
181#define QUEUE (floppy_queue)
182#define CURRENT elv_next_request(floppy_queue)
183
184/* Disk types: DD */
185static struct archy_disk_type {
186 const char *name;
187 unsigned spt; /* sectors per track */
188 unsigned blocks; /* total number of blocks */
189 unsigned stretch; /* track doubling ? */
190} disk_type[] = {
191
192 { "d360", 9, 720, 0 }, /* 360kB diskette */
193 { "D360", 9, 720, 1 }, /* 360kb in 720kb drive */
194 { "D720", 9, 1440, 0 }, /* 720kb diskette (DD) */
195 /*{ "D820", 10,1640, 0}, *//* DD disk with 82 tracks/10 sectors
196 - DAG - can't see how type detect can distinguish this
197 from 720K until it reads block 4 by which time its too late! */
198};
199
200#define NUM_DISK_TYPES (sizeof(disk_type)/sizeof(*disk_type))
201
202/*
203 * Maximum disk size (in kilobytes). This default is used whenever the
204 * current disk size is unknown.
205 */
206#define MAX_DISK_SIZE 720
207
208static struct gendisk *disks[FD_MAX_UNIT];
209
210/* current info on each unit */
211static struct archy_floppy_struct {
212 int connected; /* !=0 : drive is connected */
213 int autoprobe; /* !=0 : do autoprobe */
214
215 struct archy_disk_type *disktype; /* current type of disk */
216
217 int track; /* current head position or -1
218 * if unknown */
219 unsigned int steprate; /* steprate setting */
220 unsigned int wpstat; /* current state of WP signal
221 * (for disk change detection) */
222} unit[FD_MAX_UNITS];
223
224/* DAG: On Arc we spin on a flag being cleared by fdc1772_comendhandler which
225 is an assembler routine */
226extern void fdc1772_comendhandler(void); /* Actually doens't have these parameters - see fd1772.S */
227extern volatile int fdc1772_comendstatus;
228extern volatile int fdc1772_fdc_int_done;
229
230#define FDC1772BASE ((0x210000>>2)|0x80000000)
231
232#define FDC1772_READ(reg) inb(FDC1772BASE+(reg/2))
233
234/* DAG: You wouldn't be silly to ask why FDC1772_WRITE is a function rather
235 than the #def below - well simple - the #def won't compile - and I
236 don't understand why (__outwc not defined) */
237/* NOTE: Reg is 0,2,4,6 as opposed to 0,1,2,3 or 0,4,8,12 to keep compatibility
238 with the ST version of fd1772.h */
239/*#define FDC1772_WRITE(reg,val) outw(val,(reg+FDC1772BASE)); */
240void FDC1772_WRITE(int reg, unsigned char val)
241{
242 if (reg == FDC1772REG_CMD) {
243 DPRINT(("FDC1772_WRITE new command 0x%x @ %d\n", val,jiffies));
244 if (fdc1772_fdc_int_done) {
245 DPRINT(("FDC1772_WRITE: Hmm fdc1772_fdc_int_done true - resetting\n"));
246 fdc1772_fdc_int_done = 0;
247 };
248 };
249 outb(val, (reg / 2) + FDC1772BASE);
250};
251
252#define FD1772_MAX_SECTORS 22
253
254unsigned char *DMABuffer; /* buffer for writes */
255/*static unsigned long PhysDMABuffer; *//* physical address */
256/* DAG: On Arc we just go straight for the DMA buffer */
257#define PhysDMABuffer DMABuffer
258
259#ifdef TRACKBUFFER
260unsigned char *TrackBuffer; /* buffer for reads */
261#define PhysTrackBuffer TrackBuffer /* physical address */
262static int BufferDrive, BufferSide, BufferTrack;
263static int read_track; /* non-zero if we are reading whole tracks */
264
265#define SECTOR_BUFFER(sec) (TrackBuffer + ((sec)-1)*512)
266#define IS_BUFFERED(drive,side,track) \
267 (BufferDrive == (drive) && BufferSide == (side) && BufferTrack == (track))
268#endif
269
270/*
271 * These are global variables, as that's the easiest way to give
272 * information to interrupts. They are the data used for the current
273 * request.
274 */
275static int SelectedDrive = 0;
276static int ReqCmd, ReqBlock;
277static int ReqSide, ReqTrack, ReqSector, ReqCnt;
278static int HeadSettleFlag = 0;
279static unsigned char *ReqData, *ReqBuffer;
280static int MotorOn = 0, MotorOffTrys;
281
282/* Synchronization of FDC1772 access. */
283static volatile int fdc_busy = 0;
284static DECLARE_WAIT_QUEUE_HEAD(fdc_wait);
285
286
287/* long req'd for set_bit --RR */
288static unsigned long changed_floppies = 0xff, fake_change = 0;
289#define CHECK_CHANGE_DELAY HZ/2
290
291/* DAG - increased to 30*HZ - not sure if this is the correct thing to do */
292#define FD_MOTOR_OFF_DELAY (10*HZ)
293#define FD_MOTOR_OFF_MAXTRY (10*20)
294
295#define FLOPPY_TIMEOUT (6*HZ)
296#define RECALIBRATE_ERRORS 4 /* After this many errors the drive
297 * will be recalibrated. */
298#define MAX_ERRORS 8 /* After this many errors the driver
299 * will give up. */
300
301#define START_MOTOR_OFF_TIMER(delay) \
302 do { \
303 motor_off_timer.expires = jiffies + (delay); \
304 add_timer( &motor_off_timer ); \
305 MotorOffTrys = 0; \
306 } while(0)
307
308#define START_CHECK_CHANGE_TIMER(delay) \
309 do { \
310 mod_timer(&fd_timer, jiffies + (delay)); \
311 } while(0)
312
313#define START_TIMEOUT() \
314 do { \
315 mod_timer(&timeout_timer, jiffies+FLOPPY_TIMEOUT); \
316 } while(0)
317
318#define STOP_TIMEOUT() \
319 do { \
320 del_timer( &timeout_timer ); \
321 } while(0)
322
323#define ENABLE_IRQ() enable_irq(FIQ_FD1772+64);
324
325#define DISABLE_IRQ() disable_irq(FIQ_FD1772+64);
326
327static void fd1772_checkint(void);
328
329DECLARE_WORK(fd1772_tq, (void *)fd1772_checkint, NULL);
330/*
331 * The driver is trying to determine the correct media format
332 * while Probing is set. fd_rwsec_done() clears it after a
333 * successful access.
334 */
335static int Probing = 0;
336
337/* This flag is set when a dummy seek is necessary to make the WP
338 * status bit accessible.
339 */
340static int NeedSeek = 0;
341
342
343/***************************** Prototypes *****************************/
344
345static void fd_select_side(int side);
346static void fd_select_drive(int drive);
347static void fd_deselect(void);
348static void fd_motor_off_timer(unsigned long dummy);
349static void check_change(unsigned long dummy);
350static void floppy_irqconsequencehandler(void);
351static void fd_error(void);
352static void do_fd_action(int drive);
353static void fd_calibrate(void);
354static void fd_calibrate_done(int status);
355static void fd_seek(void);
356static void fd_seek_done(int status);
357static void fd_rwsec(void);
358#ifdef TRACKBUFFER
359static void fd_readtrack_check( unsigned long dummy );
360#endif
361static void fd_rwsec_done(int status);
362static void fd_times_out(unsigned long dummy);
363static void finish_fdc(void);
364static void finish_fdc_done(int dummy);
365static void floppy_off(unsigned int nr);
366static void setup_req_params(int drive);
367static void redo_fd_request(void);
368static int fd_ioctl(struct inode *inode, struct file *filp, unsigned int
369 cmd, unsigned long param);
370static void fd_probe(int drive);
371static int fd_test_drive_present(int drive);
372static void config_types(void);
373static int floppy_open(struct inode *inode, struct file *filp);
374static int floppy_release(struct inode *inode, struct file *filp);
375static void do_fd_request(struct request_queue *);
376
377/************************* End of Prototypes **************************/
378
379static DEFINE_TIMER(motor_off_timer, fd_motor_off_timer, 0, 0);
380
381#ifdef TRACKBUFFER
382static DEFINE_TIMER(readtrack_timer, fd_readtrack_check, 0, 0);
383#endif
384
385static DEFINE_TIMER(timeout_timer, fd_times_out, 0, 0);
386
387static DEFINE_TIMER(fd_timer, check_change, 0, 0);
388
389/* DAG: Haven't got a clue what this is? */
390int stdma_islocked(void)
391{
392 return 0;
393};
394
395/* Select the side to use. */
396
397static void fd_select_side(int side)
398{
399 oldlatch_aupdate(LATCHA_SIDESEL, side ? 0 : LATCHA_SIDESEL);
400}
401
402
403/* Select a drive, update the FDC1772's track register
404 */
405
406static void fd_select_drive(int drive)
407{
408#ifdef DEBUG
409 printk("fd_select_drive:%d\n", drive);
410#endif
411 /* Hmm - nowhere do we seem to turn the motor on - I'm going to do it here! */
412 oldlatch_aupdate(LATCHA_MOTOR | LATCHA_INUSE, 0);
413
414 if (drive == SelectedDrive)
415 return;
416
417 oldlatch_aupdate(LATCHA_FDSELALL, 0xf - (1 << drive));
418
419 /* restore track register to saved value */
420 FDC1772_WRITE(FDC1772REG_TRACK, unit[drive].track);
421 udelay(25);
422
423 SelectedDrive = drive;
424}
425
426
427/* Deselect both drives. */
428
429static void fd_deselect(void)
430{
431 unsigned long flags;
432
433 DPRINT(("fd_deselect\n"));
434
435 oldlatch_aupdate(LATCHA_FDSELALL | LATCHA_MOTOR | LATCHA_INUSE, 0xf | LATCHA_MOTOR | LATCHA_INUSE);
436
437 SelectedDrive = -1;
438}
439
440
441/* This timer function deselects the drives when the FDC1772 switched the
442 * motor off. The deselection cannot happen earlier because the FDC1772
443 * counts the index signals, which arrive only if one drive is selected.
444 */
445
446static void fd_motor_off_timer(unsigned long dummy)
447{
448 unsigned long flags;
449 unsigned char status;
450 int delay;
451
452 del_timer(&motor_off_timer);
453
454 if (SelectedDrive < 0)
455 /* no drive selected, needn't deselect anyone */
456 return;
457
458 save_flags(flags);
459 cli();
460
461 if (fdc_busy) /* was stdma_islocked */
462 goto retry;
463
464 status = FDC1772_READ(FDC1772REG_STATUS);
465
466 if (!(status & 0x80)) {
467 /*
468 * motor already turned off by FDC1772 -> deselect drives
469 * In actual fact its this deselection which turns the motor
470 * off on the Arc, since the motor control is actually on
471 * Latch A
472 */
473 DPRINT(("fdc1772: deselecting in fd_motor_off_timer\n"));
474 fd_deselect();
475 MotorOn = 0;
476 restore_flags(flags);
477 return;
478 }
479 /* not yet off, try again */
480
481retry:
482 restore_flags(flags);
483 /* Test again later; if tested too often, it seems there is no disk
484 * in the drive and the FDC1772 will leave the motor on forever (or,
485 * at least until a disk is inserted). So we'll test only twice
486 * per second from then on...
487 */
488 delay = (MotorOffTrys < FD_MOTOR_OFF_MAXTRY) ?
489 (++MotorOffTrys, HZ / 20) : HZ / 2;
490 START_MOTOR_OFF_TIMER(delay);
491}
492
493
494/* This function is repeatedly called to detect disk changes (as good
495 * as possible) and keep track of the current state of the write protection.
496 */
497
498static void check_change(unsigned long dummy)
499{
500 static int drive = 0;
501
502 unsigned long flags;
503 int stat;
504
505 if (fdc_busy)
506 return; /* Don't start poking about if the fdc is busy */
507
508 return; /* let's just forget it for the mo DAG */
509
510 if (++drive > 1 || !unit[drive].connected)
511 drive = 0;
512
513 save_flags(flags);
514 cli();
515
516 if (!stdma_islocked()) {
517 stat = !!(FDC1772_READ(FDC1772REG_STATUS) & FDC1772STAT_WPROT);
518
519 /* The idea here is that if the write protect line has changed then
520 the disc must have changed */
521 if (stat != unit[drive].wpstat) {
522 DPRINT(("wpstat[%d] = %d\n", drive, stat));
523 unit[drive].wpstat = stat;
524 set_bit(drive, &changed_floppies);
525 }
526 }
527 restore_flags(flags);
528
529 START_CHECK_CHANGE_TIMER(CHECK_CHANGE_DELAY);
530}
531
532
533/* Handling of the Head Settling Flag: This flag should be set after each
534 * seek operation, because we don't use seeks with verify.
535 */
536
537static inline void set_head_settle_flag(void)
538{
539 HeadSettleFlag = FDC1772CMDADD_E;
540}
541
542static inline int get_head_settle_flag(void)
543{
544 int tmp = HeadSettleFlag;
545 HeadSettleFlag = 0;
546 return (tmp);
547}
548
549
550
551
552/* General Interrupt Handling */
553
554static inline void copy_buffer(void *from, void *to)
555{
556 ulong *p1 = (ulong *) from, *p2 = (ulong *) to;
557 int cnt;
558
559 for (cnt = 512 / 4; cnt; cnt--)
560 *p2++ = *p1++;
561}
562
563static void (*FloppyIRQHandler) (int status) = NULL;
564
565static void floppy_irqconsequencehandler(void)
566{
567 unsigned char status;
568 void (*handler) (int);
569
570 fdc1772_fdc_int_done = 0;
571
572 handler = FloppyIRQHandler;
573 FloppyIRQHandler = NULL;
574
575 if (handler) {
576 nop();
577 status = (unsigned char) fdc1772_comendstatus;
578 DPRINT(("FDC1772 irq, status = %02x handler = %08lx\n", (unsigned int) status, (unsigned long) handler));
579 handler(status);
580 } else {
581 DPRINT(("FDC1772 irq, no handler status=%02x\n", fdc1772_comendstatus));
582 }
583 DPRINT(("FDC1772 irq: end of floppy_irq\n"));
584}
585
586
587/* Error handling: If some error happened, retry some times, then
588 * recalibrate, then try again, and fail after MAX_ERRORS.
589 */
590
591static void fd_error(void)
592{
593 printk("FDC1772: fd_error\n");
594 /*panic("fd1772: fd_error"); *//* DAG tmp */
595 if (!CURRENT)
596 return;
597 CURRENT->errors++;
598 if (CURRENT->errors >= MAX_ERRORS) {
599 printk("fd%d: too many errors.\n", SelectedDrive);
600 end_request(CURRENT, 0);
601 } else if (CURRENT->errors == RECALIBRATE_ERRORS) {
602 printk("fd%d: recalibrating\n", SelectedDrive);
603 if (SelectedDrive != -1)
604 unit[SelectedDrive].track = -1;
605 }
606 redo_fd_request();
607}
608
609
610
611#define SET_IRQ_HANDLER(proc) do { FloppyIRQHandler = (proc); } while(0)
612
613
614/* do_fd_action() is the general procedure for a fd request: All
615 * required parameter settings (drive select, side select, track
616 * position) are checked and set if needed. For each of these
617 * parameters and the actual reading or writing exist two functions:
618 * one that starts the setting (or skips it if possible) and one
619 * callback for the "done" interrupt. Each done func calls the next
620 * set function to propagate the request down to fd_rwsec_done().
621 */
622
623static void do_fd_action(int drive)
624{
625 struct request *req;
626 DPRINT(("do_fd_action unit[drive].track=%d\n", unit[drive].track));
627
628#ifdef TRACKBUFFER
629repeat:
630
631 if (IS_BUFFERED( drive, ReqSide, ReqTrack )) {
632 req = CURRENT;
633 if (ReqCmd == READ) {
634 copy_buffer( SECTOR_BUFFER(ReqSector), ReqData );
635 if (++ReqCnt < req->current_nr_sectors) {
636 /* read next sector */
637 setup_req_params( drive );
638 goto repeat;
639 } else {
640 /* all sectors finished */
641 req->nr_sectors -= req->current_nr_sectors;
642 req->sector += req->current_nr_sectors;
643 end_request(req, 1);
644 redo_fd_request();
645 return;
646 }
647 } else {
648 /* cmd == WRITE, pay attention to track buffer
649 * consistency! */
650 copy_buffer( ReqData, SECTOR_BUFFER(ReqSector) );
651 }
652 }
653#endif
654
655 if (SelectedDrive != drive) {
656 /*unit[drive].track = -1; DAG */
657 fd_select_drive(drive);
658 };
659
660
661 if (unit[drive].track == -1)
662 fd_calibrate();
663 else if (unit[drive].track != ReqTrack << unit[drive].disktype->stretch)
664 fd_seek();
665 else
666 fd_rwsec();
667}
668
669
670/* Seek to track 0 if the current track is unknown */
671
672static void fd_calibrate(void)
673{
674 DPRINT(("fd_calibrate\n"));
675 if (unit[SelectedDrive].track >= 0) {
676 fd_calibrate_done(0);
677 return;
678 }
679 DPRINT(("fd_calibrate (after track compare)\n"));
680 SET_IRQ_HANDLER(fd_calibrate_done);
681 /* we can't verify, since the speed may be incorrect */
682 FDC1772_WRITE(FDC1772REG_CMD, FDC1772CMD_RESTORE | unit[SelectedDrive].steprate);
683
684 NeedSeek = 1;
685 MotorOn = 1;
686 START_TIMEOUT();
687 /* wait for IRQ */
688}
689
690
691static void fd_calibrate_done(int status)
692{
693 DPRINT(("fd_calibrate_done()\n"));
694 STOP_TIMEOUT();
695
696 /* set the correct speed now */
697 if (status & FDC1772STAT_RECNF) {
698 printk("fd%d: restore failed\n", SelectedDrive);
699 fd_error();
700 } else {
701 unit[SelectedDrive].track = 0;
702 fd_seek();
703 }
704}
705
706
707/* Seek the drive to the requested track. The drive must have been
708 * calibrated at some point before this.
709 */
710
711static void fd_seek(void)
712{
713 unsigned long flags;
714 DPRINT(("fd_seek() to track %d (unit[SelectedDrive].track=%d)\n", ReqTrack,
715 unit[SelectedDrive].track));
716 if (unit[SelectedDrive].track == ReqTrack <<
717 unit[SelectedDrive].disktype->stretch) {
718 fd_seek_done(0);
719 return;
720 }
721 FDC1772_WRITE(FDC1772REG_DATA, ReqTrack <<
722 unit[SelectedDrive].disktype->stretch);
723 udelay(25);
724 save_flags(flags);
725 clf();
726 SET_IRQ_HANDLER(fd_seek_done);
727 FDC1772_WRITE(FDC1772REG_CMD, FDC1772CMD_SEEK | unit[SelectedDrive].steprate |
728 /* DAG */
729 (MotorOn?FDC1772CMDADD_H:0));
730
731 restore_flags(flags);
732 MotorOn = 1;
733 set_head_settle_flag();
734 START_TIMEOUT();
735 /* wait for IRQ */
736}
737
738
739static void fd_seek_done(int status)
740{
741 DPRINT(("fd_seek_done()\n"));
742 STOP_TIMEOUT();
743
744 /* set the correct speed */
745 if (status & FDC1772STAT_RECNF) {
746 printk("fd%d: seek error (to track %d)\n",
747 SelectedDrive, ReqTrack);
748 /* we don't know exactly which track we are on now! */
749 unit[SelectedDrive].track = -1;
750 fd_error();
751 } else {
752 unit[SelectedDrive].track = ReqTrack <<
753 unit[SelectedDrive].disktype->stretch;
754 NeedSeek = 0;
755 fd_rwsec();
756 }
757}
758
759
760/* This does the actual reading/writing after positioning the head
761 * over the correct track.
762 */
763
764#ifdef TRACKBUFFER
765static int MultReadInProgress = 0;
766#endif
767
768
769static void fd_rwsec(void)
770{
771 unsigned long paddr, flags;
772 unsigned int rwflag, old_motoron;
773 unsigned int track;
774
775 DPRINT(("fd_rwsec(), Sec=%d, Access=%c\n", ReqSector, ReqCmd == WRITE ? 'w' : 'r'));
776 if (ReqCmd == WRITE) {
777 /*cache_push( (unsigned long)ReqData, 512 ); */
778 paddr = (unsigned long) ReqData;
779 rwflag = 0x100;
780 } else {
781 paddr = (unsigned long) PhysDMABuffer;
782#ifdef TRACKBUFFER
783 if (read_track)
784 paddr = (unsigned long)PhysTrackBuffer;
785#endif
786 rwflag = 0;
787 }
788
789 DPRINT(("fd_rwsec() before sidesel rwflag=%d sec=%d trk=%d\n", rwflag,
790 ReqSector, FDC1772_READ(FDC1772REG_TRACK)));
791 fd_select_side(ReqSide);
792
793 /*DPRINT(("fd_rwsec() before start sector \n")); */
794 /* Start sector of this operation */
795#ifdef TRACKBUFFER
796 FDC1772_WRITE( FDC1772REG_SECTOR, !read_track ? ReqSector : 1 );
797#else
798 FDC1772_WRITE( FDC1772REG_SECTOR, ReqSector );
799#endif
800
801 /* Cheat for track if stretch != 0 */
802 if (unit[SelectedDrive].disktype->stretch) {
803 track = FDC1772_READ(FDC1772REG_TRACK);
804 FDC1772_WRITE(FDC1772REG_TRACK, track >>
805 unit[SelectedDrive].disktype->stretch);
806 }
807 udelay(25);
808
809 DPRINT(("fd_rwsec() before setup DMA \n"));
810 /* Setup DMA - Heavily modified by DAG */
811 save_flags(flags);
812 clf();
813 disable_dma(FLOPPY_DMA);
814 set_dma_mode(FLOPPY_DMA, rwflag ? DMA_MODE_WRITE : DMA_MODE_READ);
815 set_dma_addr(FLOPPY_DMA, (long) paddr); /* DAG - changed from Atari specific */
816#ifdef TRACKBUFFER
817 set_dma_count(FLOPPY_DMA,(!read_track ? 1 : unit[SelectedDrive].disktype->spt)*512);
818#else
819 set_dma_count(FLOPPY_DMA, 512); /* Block/sector size - going to have to change */
820#endif
821 SET_IRQ_HANDLER(fd_rwsec_done);
822 /* Turn on dma int */
823 enable_dma(FLOPPY_DMA);
824 /* Now give it something to do */
825 FDC1772_WRITE(FDC1772REG_CMD, (rwflag ? (FDC1772CMD_WRSEC | FDC1772CMDADD_P) :
826#ifdef TRACKBUFFER
827 (FDC1772CMD_RDSEC | (read_track ? FDC1772CMDADD_M : 0) |
828 /* Hmm - the idea here is to stop the FDC spinning the disc
829 up when we know that we already still have it spinning */
830 (MotorOn?FDC1772CMDADD_H:0))
831#else
832 FDC1772CMD_RDSEC
833#endif
834 ));
835
836 restore_flags(flags);
837 DPRINT(("fd_rwsec() after DMA setup flags=0x%08x\n", flags));
838 /*sti(); *//* DAG - Hmm */
839 /* Hmm - should do something DAG */
840 old_motoron = MotorOn;
841 MotorOn = 1;
842 NeedSeek = 1;
843
844 /* wait for interrupt */
845
846#ifdef TRACKBUFFER
847 if (read_track) {
848 /*
849 * If reading a whole track, wait about one disk rotation and
850 * then check if all sectors are read. The FDC will even
851 * search for the first non-existant sector and need 1 sec to
852 * recognise that it isn't present :-(
853 */
854 /* 1 rot. + 5 rot.s if motor was off */
855 mod_timer(&readtrack_timer, jiffies + HZ/5 + (old_motoron ? 0 : HZ));
856 DPRINT(("Setting readtrack_timer to %d @ %d\n",
857 readtrack_timer.expires,jiffies));
858 MultReadInProgress = 1;
859 }
860#endif
861
862 /*DPRINT(("fd_rwsec() before START_TIMEOUT \n")); */
863 START_TIMEOUT();
864 /*DPRINT(("fd_rwsec() after START_TIMEOUT \n")); */
865}
866
867
868#ifdef TRACKBUFFER
869
870static void fd_readtrack_check(unsigned long dummy)
871{
872 unsigned long flags, addr;
873 extern unsigned char *fdc1772_dataaddr;
874
875 DPRINT(("fd_readtrack_check @ %d\n",jiffies));
876
877 save_flags(flags);
878 clf();
879
880 del_timer( &readtrack_timer );
881
882 if (!MultReadInProgress) {
883 /* This prevents a race condition that could arise if the
884 * interrupt is triggered while the calling of this timer
885 * callback function takes place. The IRQ function then has
886 * already cleared 'MultReadInProgress' when control flow
887 * gets here.
888 */
889 restore_flags(flags);
890 return;
891 }
892
893 /* get the current DMA address */
894 addr=(unsigned long)fdc1772_dataaddr; /* DAG - ? */
895 DPRINT(("fd_readtrack_check: addr=%x PhysTrackBuffer=%x\n",addr,PhysTrackBuffer));
896
897 if (addr >= (unsigned int)PhysTrackBuffer + unit[SelectedDrive].disktype->spt*512) {
898 /* already read enough data, force an FDC interrupt to stop
899 * the read operation
900 */
901 SET_IRQ_HANDLER( NULL );
902 restore_flags(flags);
903 DPRINT(("fd_readtrack_check(): done\n"));
904 FDC1772_WRITE( FDC1772REG_CMD, FDC1772CMD_FORCI );
905 udelay(25);
906
907 /* No error until now -- the FDC would have interrupted
908 * otherwise!
909 */
910 fd_rwsec_done( 0 );
911 } else {
912 /* not yet finished, wait another tenth rotation */
913 restore_flags(flags);
914 DPRINT(("fd_readtrack_check(): not yet finished\n"));
915 readtrack_timer.expires = jiffies + HZ/5/10;
916 add_timer( &readtrack_timer );
917 }
918}
919
920#endif
921
922static void fd_rwsec_done(int status)
923{
924 unsigned int track;
925
926 DPRINT(("fd_rwsec_done() status=%d @ %d\n", status,jiffies));
927
928#ifdef TRACKBUFFER
929 if (read_track && !MultReadInProgress)
930 return;
931
932 MultReadInProgress = 0;
933
934 STOP_TIMEOUT();
935
936 if (read_track)
937 del_timer( &readtrack_timer );
938#endif
939
940
941 /* Correct the track if stretch != 0 */
942 if (unit[SelectedDrive].disktype->stretch) {
943 track = FDC1772_READ(FDC1772REG_TRACK);
944 FDC1772_WRITE(FDC1772REG_TRACK, track <<
945 unit[SelectedDrive].disktype->stretch);
946 }
947 if (ReqCmd == WRITE && (status & FDC1772STAT_WPROT)) {
948 printk("fd%d: is write protected\n", SelectedDrive);
949 goto err_end;
950 }
951 if ((status & FDC1772STAT_RECNF)
952#ifdef TRACKBUFFER
953 /* RECNF is no error after a multiple read when the FDC
954 * searched for a non-existant sector!
955 */
956 && !(read_track &&
957 FDC1772_READ(FDC1772REG_SECTOR) > unit[SelectedDrive].disktype->spt)
958#endif
959 ) {
960 if (Probing) {
961 if (unit[SelectedDrive].disktype > disk_type) {
962 /* try another disk type */
963 unit[SelectedDrive].disktype--;
964 set_capacity(disks[SelectedDrive],
965 unit[SelectedDrive].disktype->blocks);
966 } else
967 Probing = 0;
968 } else {
969 /* record not found, but not probing. Maybe stretch wrong ? Restart probing */
970 if (unit[SelectedDrive].autoprobe) {
971 unit[SelectedDrive].disktype = disk_type + NUM_DISK_TYPES - 1;
972 set_capacity(disks[SelectedDrive],
973 unit[SelectedDrive].disktype->blocks);
974 Probing = 1;
975 }
976 }
977 if (Probing) {
978 setup_req_params(SelectedDrive);
979#ifdef TRACKBUFFER
980 BufferDrive = -1;
981#endif
982 do_fd_action(SelectedDrive);
983 return;
984 }
985 printk("fd%d: sector %d not found (side %d, track %d)\n",
986 SelectedDrive, FDC1772_READ(FDC1772REG_SECTOR), ReqSide, ReqTrack);
987 goto err_end;
988 }
989 if (status & FDC1772STAT_CRC) {
990 printk("fd%d: CRC error (side %d, track %d, sector %d)\n",
991 SelectedDrive, ReqSide, ReqTrack, FDC1772_READ(FDC1772REG_SECTOR));
992 goto err_end;
993 }
994 if (status & FDC1772STAT_LOST) {
995 printk("fd%d: lost data (side %d, track %d, sector %d)\n",
996 SelectedDrive, ReqSide, ReqTrack, FDC1772_READ(FDC1772REG_SECTOR));
997 goto err_end;
998 }
999 Probing = 0;
1000
1001 if (ReqCmd == READ) {
1002#ifdef TRACKBUFFER
1003 if (!read_track) {
1004 /*cache_clear (PhysDMABuffer, 512);*/
1005 copy_buffer (DMABuffer, ReqData);
1006 } else {
1007 /*cache_clear (PhysTrackBuffer, FD1772_MAX_SECTORS * 512);*/
1008 BufferDrive = SelectedDrive;
1009 BufferSide = ReqSide;
1010 BufferTrack = ReqTrack;
1011 copy_buffer (SECTOR_BUFFER (ReqSector), ReqData);
1012 }
1013#else
1014 /*cache_clear( PhysDMABuffer, 512 ); */
1015 copy_buffer(DMABuffer, ReqData);
1016#endif
1017 }
1018 if (++ReqCnt < CURRENT->current_nr_sectors) {
1019 /* read next sector */
1020 setup_req_params(SelectedDrive);
1021 do_fd_action(SelectedDrive);
1022 } else {
1023 /* all sectors finished */
1024 CURRENT->nr_sectors -= CURRENT->current_nr_sectors;
1025 CURRENT->sector += CURRENT->current_nr_sectors;
1026 end_request(CURRENT, 1);
1027 redo_fd_request();
1028 }
1029 return;
1030
1031err_end:
1032#ifdef TRACKBUFFER
1033 BufferDrive = -1;
1034#endif
1035
1036 fd_error();
1037}
1038
1039
1040static void fd_times_out(unsigned long dummy)
1041{
1042 SET_IRQ_HANDLER(NULL);
1043 /* If the timeout occurred while the readtrack_check timer was
1044 * active, we need to cancel it, else bad things will happen */
1045 del_timer( &readtrack_timer );
1046 FDC1772_WRITE(FDC1772REG_CMD, FDC1772CMD_FORCI);
1047 udelay(25);
1048
1049 printk("floppy timeout\n");
1050 STOP_TIMEOUT(); /* hmm - should we do this ? */
1051 fd_error();
1052}
1053
1054
1055/* The (noop) seek operation here is needed to make the WP bit in the
1056 * FDC1772 status register accessible for check_change. If the last disk
1057 * operation would have been a RDSEC, this bit would always read as 0
1058 * no matter what :-( To save time, the seek goes to the track we're
1059 * already on.
1060 */
1061
1062static void finish_fdc(void)
1063{
1064 /* DAG - just try without this dummy seek! */
1065 finish_fdc_done(0);
1066 return;
1067
1068 if (!NeedSeek) {
1069 finish_fdc_done(0);
1070 } else {
1071 DPRINT(("finish_fdc: dummy seek started\n"));
1072 FDC1772_WRITE(FDC1772REG_DATA, unit[SelectedDrive].track);
1073 SET_IRQ_HANDLER(finish_fdc_done);
1074 FDC1772_WRITE(FDC1772REG_CMD, FDC1772CMD_SEEK);
1075 MotorOn = 1;
1076 START_TIMEOUT();
1077 /* we must wait for the IRQ here, because the ST-DMA is
1078 * released immediately afterwards and the interrupt may be
1079 * delivered to the wrong driver.
1080 */
1081 }
1082}
1083
1084
1085static void finish_fdc_done(int dummy)
1086{
1087 unsigned long flags;
1088
1089 DPRINT(("finish_fdc_done entered\n"));
1090 STOP_TIMEOUT();
1091 NeedSeek = 0;
1092
1093 if (timer_pending(&fd_timer) &&
1094 time_after(jiffies + 5, fd_timer.expires))
1095 /* If the check for a disk change is done too early after this
1096 * last seek command, the WP bit still reads wrong :-((
1097 */
1098 mod_timer(&fd_timer, jiffies + 5);
1099 else {
1100 /* START_CHECK_CHANGE_TIMER( CHECK_CHANGE_DELAY ); */
1101 };
1102 del_timer(&motor_off_timer);
1103 START_MOTOR_OFF_TIMER(FD_MOTOR_OFF_DELAY);
1104
1105 save_flags(flags);
1106 cli();
1107 /* stdma_release(); - not sure if I should do something DAG */
1108 fdc_busy = 0;
1109 wake_up(&fdc_wait);
1110 restore_flags(flags);
1111
1112 DPRINT(("finish_fdc() finished\n"));
1113}
1114
1115
1116/* Prevent "aliased" accesses. */
1117static int fd_ref[4];
1118static int fd_device[4];
1119
1120/* dummy for blk.h */
1121static void floppy_off(unsigned int nr)
1122{
1123}
1124
1125
1126/* On the old arcs write protect depends on the particular model
1127 of machine. On the A310, R140, and A440 there is a disc changed
1128 detect, however on the A4x0/1 range there is not. There
1129 is nothing to tell you which machine your on.
1130 At the moment I'm just marking changed always. I've
1131 left the Atari's 'change on write protect change' code in this
1132 part (but nothing sets it).
1133 RiscOS apparently checks the disc serial number etc. to detect changes
1134 - but if it sees a disc change line go high (?) it flips to using
1135 it. Well maybe I'll add that in the future (!?)
1136*/
1137static int check_floppy_change(struct gendisk *disk)
1138{
1139 struct archy_floppy_struct *p = disk->private_data;
1140 unsigned int drive = p - unit;
1141
1142 if (test_bit(drive, &fake_change)) {
1143 /* simulated change (e.g. after formatting) */
1144 return 1;
1145 }
1146 if (test_bit(drive, &changed_floppies)) {
1147 /* surely changed (the WP signal changed at least once) */
1148 return 1;
1149 }
1150 if (p->wpstat) {
1151 /* WP is on -> could be changed: to be sure, buffers should be
1152 * invalidated...
1153 */
1154 return 1;
1155 }
1156 return 1; /* DAG - was 0 */
1157}
1158
1159static int floppy_revalidate(struct gendisk *disk)
1160{
1161 struct archy_floppy_struct *p = disk->private_data;
1162 unsigned int drive = p - unit;
1163
1164 if (test_bit(drive, &changed_floppies) || test_bit(drive, &fake_change)
1165 || unit[drive].disktype == 0) {
1166#ifdef TRACKBUFFER
1167 BufferDrive = -1;
1168#endif
1169 clear_bit(drive, &fake_change);
1170 clear_bit(drive, &changed_floppies);
1171 p->disktype = 0;
1172 }
1173 return 0;
1174}
1175
1176/* This sets up the global variables describing the current request. */
1177
1178static void setup_req_params(int drive)
1179{
1180 int block = ReqBlock + ReqCnt;
1181
1182 ReqTrack = block / unit[drive].disktype->spt;
1183 ReqSector = block - ReqTrack * unit[drive].disktype->spt + 1;
1184 ReqSide = ReqTrack & 1;
1185 ReqTrack >>= 1;
1186 ReqData = ReqBuffer + 512 * ReqCnt;
1187
1188#ifdef TRACKBUFFER
1189 read_track = (ReqCmd == READ && CURRENT->errors == 0);
1190#endif
1191
1192 DPRINT(("Request params: Si=%d Tr=%d Se=%d Data=%08lx\n", ReqSide,
1193 ReqTrack, ReqSector, (unsigned long) ReqData));
1194}
1195
1196
1197static void redo_fd_request(void)
1198{
1199 int drive, type;
1200 struct archy_floppy_struct *floppy;
1201
1202 DPRINT(("redo_fd_request: CURRENT=%p dev=%s CURRENT->sector=%ld\n",
1203 CURRENT, CURRENT ? CURRENT->rq_disk->disk_name : "",
1204 CURRENT ? CURRENT->sector : 0));
1205
1206repeat:
1207
1208 if (!CURRENT)
1209 goto the_end;
1210
1211 floppy = CURRENT->rq_disk->private_data;
1212 drive = floppy - unit;
1213 type = fd_device[drive];
1214
1215 if (!floppy->connected) {
1216 /* drive not connected */
1217 printk("Unknown Device: fd%d\n", drive);
1218 end_request(CURRENT, 0);
1219 goto repeat;
1220 }
1221 if (type == 0) {
1222 if (!floppy->disktype) {
1223 Probing = 1;
1224 floppy->disktype = disk_type + NUM_DISK_TYPES - 1;
1225 set_capacity(disks[drive], floppy->disktype->blocks);
1226 floppy->autoprobe = 1;
1227 }
1228 } else {
1229 /* user supplied disk type */
1230 --type;
1231 if (type >= NUM_DISK_TYPES) {
1232 printk("fd%d: invalid disk format", drive);
1233 end_request(CURRENT, 0);
1234 goto repeat;
1235 }
1236 floppy->disktype = &disk_type[type];
1237 set_capacity(disks[drive], floppy->disktype->blocks);
1238 floppy->autoprobe = 0;
1239 }
1240
1241 if (CURRENT->sector + 1 > floppy->disktype->blocks) {
1242 end_request(CURRENT, 0);
1243 goto repeat;
1244 }
1245 /* stop deselect timer */
1246 del_timer(&motor_off_timer);
1247
1248 ReqCnt = 0;
1249 ReqCmd = rq_data_dir(CURRENT);
1250 ReqBlock = CURRENT->sector;
1251 ReqBuffer = CURRENT->buffer;
1252 setup_req_params(drive);
1253 do_fd_action(drive);
1254
1255 return;
1256
1257the_end:
1258 finish_fdc();
1259}
1260
1261static void fd1772_checkint(void)
1262{
1263 extern int fdc1772_bytestogo;
1264
1265 /*printk("fd1772_checkint %d\n",fdc1772_fdc_int_done);*/
1266 if (fdc1772_fdc_int_done)
1267 floppy_irqconsequencehandler();
1268 if ((MultReadInProgress) && (fdc1772_bytestogo==0)) fd_readtrack_check(0);
1269 if (fdc_busy) {
1270 schedule_work(&fd1772_tq);
1271 }
1272}
1273
1274static void do_fd_request(struct request_queue* q)
1275{
1276 unsigned long flags;
1277
1278 DPRINT(("do_fd_request for pid %d\n", current->pid));
1279 if (fdc_busy) return;
1280 save_flags(flags);
1281 cli();
1282 wait_event(fdc_wait, !fdc_busy);
1283 fdc_busy = 1;
1284 ENABLE_IRQ();
1285 restore_flags(flags);
1286
1287 fdc1772_fdc_int_done = 0;
1288
1289 redo_fd_request();
1290
1291 schedule_work(&fd1772_tq);
1292}
1293
1294
1295static int invalidate_drive(struct block_device *bdev)
1296{
1297 struct archy_floppy_struct *p = bdev->bd_disk->private_data;
1298 /* invalidate the buffer track to force a reread */
1299#ifdef TRACKBUFFER
1300 BufferDrive = -1;
1301#endif
1302
1303 set_bit(p - unit, &fake_change);
1304 return 0;
1305}
1306
1307static int fd_ioctl(struct inode *inode, struct file *filp,
1308 unsigned int cmd, unsigned long param)
1309{
1310 struct block_device *bdev = inode->i_bdev;
1311
1312 switch (cmd) {
1313 case FDFMTEND:
1314 case FDFLUSH:
1315 invalidate_drive(bdev);
1316 check_disk_change(bdev);
1317 case FDFMTBEG:
1318 return 0;
1319 default:
1320 return -EINVAL;
1321 }
1322}
1323
1324
1325/* Initialize the 'unit' variable for drive 'drive' */
1326
1327static void fd_probe(int drive)
1328{
1329 unit[drive].connected = 0;
1330 unit[drive].disktype = NULL;
1331
1332 if (!fd_test_drive_present(drive))
1333 return;
1334
1335 unit[drive].connected = 1;
1336 unit[drive].track = -1; /* If we put the auto detect back in this can go to 0 */
1337 unit[drive].steprate = FDC1772STEP_6;
1338 MotorOn = 1; /* from probe restore operation! */
1339}
1340
1341
1342/* This function tests the physical presence of a floppy drive (not
1343 * whether a disk is inserted). This is done by issuing a restore
1344 * command, waiting max. 2 seconds (that should be enough to move the
1345 * head across the whole disk) and looking at the state of the "TR00"
1346 * signal. This should now be raised if there is a drive connected
1347 * (and there is no hardware failure :-) Otherwise, the drive is
1348 * declared absent.
1349 */
1350
1351static int fd_test_drive_present(int drive)
1352{
1353 unsigned long timeout;
1354 unsigned char status;
1355 int ok;
1356
1357 printk("fd_test_drive_present %d\n", drive);
1358 if (drive > 1)
1359 return (0);
1360 return (1); /* Simple hack for the moment - the autodetect doesn't seem to work on arc */
1361 fd_select_drive(drive);
1362
1363 /* disable interrupt temporarily */
1364 DISABLE_IRQ();
1365 FDC1772_WRITE(FDC1772REG_TRACK, 0x00); /* was ff00 why? */
1366 FDC1772_WRITE(FDC1772REG_CMD, FDC1772CMD_RESTORE | FDC1772CMDADD_H | FDC1772STEP_6);
1367
1368 /*printk("fd_test_drive_present: Going into timeout loop\n"); */
1369 for (ok = 0, timeout = jiffies + 2 * HZ + HZ / 2; time_before(jiffies, timeout);) {
1370 /* What does this piece of atariism do? - query for an interrupt? */
1371 /* if (!(mfp.par_dt_reg & 0x20))
1372 break; */
1373 /* Well this is my nearest guess - quit when we get an FDC interrupt */
1374 if (ioc_readb(IOC_FIQSTAT) & 2)
1375 break;
1376 }
1377
1378 /*printk("fd_test_drive_present: Coming out of timeout loop\n"); */
1379 status = FDC1772_READ(FDC1772REG_STATUS);
1380 ok = (status & FDC1772STAT_TR00) != 0;
1381
1382 /*printk("fd_test_drive_present: ok=%d\n",ok); */
1383 /* force interrupt to abort restore operation (FDC1772 would try
1384 * about 50 seconds!) */
1385 FDC1772_WRITE(FDC1772REG_CMD, FDC1772CMD_FORCI);
1386 udelay(500);
1387 status = FDC1772_READ(FDC1772REG_STATUS);
1388 udelay(20);
1389 /*printk("fd_test_drive_present: just before OK code %d\n",ok); */
1390
1391 if (ok) {
1392 /* dummy seek command to make WP bit accessible */
1393 FDC1772_WRITE(FDC1772REG_DATA, 0);
1394 FDC1772_WRITE(FDC1772REG_CMD, FDC1772CMD_SEEK);
1395 printk("fd_test_drive_present: just before wait for int\n");
1396 /* DAG: Guess means wait for interrupt */
1397 while (!(ioc_readb(IOC_FIQSTAT) & 2));
1398 printk("fd_test_drive_present: just after wait for int\n");
1399 status = FDC1772_READ(FDC1772REG_STATUS);
1400 }
1401 printk("fd_test_drive_present: just before ENABLE_IRQ\n");
1402 ENABLE_IRQ();
1403 printk("fd_test_drive_present: about to return\n");
1404 return (ok);
1405}
1406
1407
1408/* Look how many and which kind of drives are connected. If there are
1409 * floppies, additionally start the disk-change and motor-off timers.
1410 */
1411
1412static void config_types(void)
1413{
1414 int drive, cnt = 0;
1415
1416 printk("Probing floppy drive(s):\n");
1417 for (drive = 0; drive < FD_MAX_UNITS; drive++) {
1418 fd_probe(drive);
1419 if (unit[drive].connected) {
1420 printk("fd%d\n", drive);
1421 ++cnt;
1422 }
1423 }
1424
1425 if (FDC1772_READ(FDC1772REG_STATUS) & FDC1772STAT_BUSY) {
1426 /* If FDC1772 is still busy from probing, give it another FORCI
1427 * command to abort the operation. If this isn't done, the FDC1772
1428 * will interrupt later and its IRQ line stays low, because
1429 * the status register isn't read. And this will block any
1430 * interrupts on this IRQ line :-(
1431 */
1432 FDC1772_WRITE(FDC1772REG_CMD, FDC1772CMD_FORCI);
1433 udelay(500);
1434 FDC1772_READ(FDC1772REG_STATUS);
1435 udelay(20);
1436 }
1437 if (cnt > 0) {
1438 START_MOTOR_OFF_TIMER(FD_MOTOR_OFF_DELAY);
1439 if (cnt == 1)
1440 fd_select_drive(0);
1441 /*START_CHECK_CHANGE_TIMER( CHECK_CHANGE_DELAY ); */
1442 }
1443}
1444
1445/*
1446 * floppy_open check for aliasing (/dev/fd0 can be the same as
1447 * /dev/PS0 etc), and disallows simultaneous access to the same
1448 * drive with different device numbers.
1449 */
1450
1451static int floppy_open(struct inode *inode, struct file *filp)
1452{
1453 int drive = iminor(inode) & 3;
1454 int type = iminor(inode) >> 2;
1455 int old_dev = fd_device[drive];
1456
1457 if (fd_ref[drive] && old_dev != type)
1458 return -EBUSY;
1459
1460 if (fd_ref[drive] == -1 || (fd_ref[drive] && filp->f_flags & O_EXCL))
1461 return -EBUSY;
1462
1463 if (filp->f_flags & O_EXCL)
1464 fd_ref[drive] = -1;
1465 else
1466 fd_ref[drive]++;
1467
1468 fd_device[drive] = type;
1469
1470 if (filp->f_flags & O_NDELAY)
1471 return 0;
1472
1473 if (filp->f_mode & 3) {
1474 check_disk_change(inode->i_bdev);
1475 if (filp->f_mode & 2) {
1476 if (unit[drive].wpstat) {
1477 floppy_release(inode, filp);
1478 return -EROFS;
1479 }
1480 }
1481 }
1482 return 0;
1483}
1484
1485
1486static int floppy_release(struct inode *inode, struct file *filp)
1487{
1488 int drive = iminor(inode) & 3;
1489
1490 if (fd_ref[drive] < 0)
1491 fd_ref[drive] = 0;
1492 else if (!fd_ref[drive]--) {
1493 printk("floppy_release with fd_ref == 0");
1494 fd_ref[drive] = 0;
1495 }
1496
1497 return 0;
1498}
1499
1500static struct block_device_operations floppy_fops =
1501{
1502 .open = floppy_open,
1503 .release = floppy_release,
1504 .ioctl = fd_ioctl,
1505 .media_changed = check_floppy_change,
1506 .revalidate_disk= floppy_revalidate,
1507};
1508
1509static struct kobject *floppy_find(dev_t dev, int *part, void *data)
1510{
1511 int drive = *part & 3;
1512 if ((*part >> 2) > NUM_DISK_TYPES || drive >= FD_MAX_UNITS)
1513 return NULL;
1514 *part = 0;
1515 return get_disk(disks[drive]);
1516}
1517
1518int fd1772_init(void)
1519{
1520 static DEFINE_SPINLOCK(lock);
1521 int i, err = -ENOMEM;
1522
1523 if (!machine_is_archimedes())
1524 return 0;
1525
1526 for (i = 0; i < FD_MAX_UNITS; i++) {
1527 disks[i] = alloc_disk(1);
1528 if (!disks[i])
1529 goto err_disk;
1530 }
1531
1532 err = register_blkdev(MAJOR_NR, "fd");
1533 if (err)
1534 goto err_disk;
1535
1536 err = -EBUSY;
1537 if (request_dma(FLOPPY_DMA, "fd1772")) {
1538 printk("Unable to grab DMA%d for the floppy (1772) driver\n", FLOPPY_DMA);
1539 goto err_blkdev;
1540 };
1541
1542 if (request_dma(FIQ_FD1772, "fd1772 end")) {
1543 printk("Unable to grab DMA%d for the floppy (1772) driver\n", FIQ_FD1772);
1544 goto err_dma1;
1545 };
1546
1547 /* initialize variables */
1548 SelectedDrive = -1;
1549#ifdef TRACKBUFFER
1550 BufferDrive = BufferSide = BufferTrack = -1;
1551 /* Atari uses 512 - I want to eventually cope with 1K sectors */
1552 DMABuffer = kmalloc((FD1772_MAX_SECTORS+1)*512,GFP_KERNEL);
1553 TrackBuffer = DMABuffer + 512;
1554#else
1555 /* Allocate memory for the DMAbuffer - on the Atari this takes it
1556 out of some special memory... */
1557 DMABuffer = kmalloc(2048); /* Copes with pretty large sectors */
1558#endif
1559 err = -ENOMEM;
1560 if (!DMAbuffer)
1561 goto err_dma2;
1562
1563 enable_dma(FIQ_FD1772); /* This inserts a call to our command end routine */
1564
1565 floppy_queue = blk_init_queue(do_fd_request, &lock);
1566 if (!floppy_queue)
1567 goto err_queue;
1568
1569 for (i = 0; i < FD_MAX_UNITS; i++) {
1570 unit[i].track = -1;
1571 disks[i]->major = MAJOR_NR;
1572 disks[i]->first_minor = 0;
1573 disks[i]->fops = &floppy_fops;
1574 sprintf(disks[i]->disk_name, "fd%d", i);
1575 disks[i]->private_data = &unit[i];
1576 disks[i]->queue = floppy_queue;
1577 set_capacity(disks[i], MAX_DISK_SIZE * 2);
1578 }
1579 blk_register_region(MKDEV(MAJOR_NR, 0), 256, THIS_MODULE,
1580 floppy_find, NULL, NULL);
1581
1582 for (i = 0; i < FD_MAX_UNITS; i++)
1583 add_disk(disks[i]);
1584
1585 config_types();
1586
1587 return 0;
1588
1589 err_queue:
1590 kfree(DMAbuffer);
1591 err_dma2:
1592 free_dma(FIQ_FD1772);
1593
1594 err_dma1:
1595 free_dma(FLOPPY_DMA);
1596
1597 err_blkdev:
1598 unregister_blkdev(MAJOR_NR, "fd");
1599
1600 err_disk:
1601 while (i--)
1602 put_disk(disks[i]);
1603 return err;
1604}
diff --git a/drivers/acorn/block/fd1772dma.S b/drivers/acorn/block/fd1772dma.S
deleted file mode 100644
index 7964435443ec..000000000000
--- a/drivers/acorn/block/fd1772dma.S
+++ /dev/null
@@ -1,100 +0,0 @@
1#include <asm/hardware.h>
2
3@ Code for DMA with the 1772 fdc
4.text
5
6
7 .global fdc1772_dataaddr
8fdc1772_fiqdata:
9@ Number of bytes left to DMA
10 .global fdc1772_bytestogo
11fdc1772_bytestogo:
12 .word 0
13@ Place to put/get data from in DMA
14 .global fdc1772_dataaddr
15fdc1772_dataaddr:
16 .word 0
17
18 .global fdc1772_fdc_int_done
19fdc1772_fdc_int_done:
20 .word 0
21 .global fdc1772_comendstatus
22fdc1772_comendstatus:
23 .word 0
24
25@ We hang this off DMA channel 1
26 .global fdc1772_comendhandler
27fdc1772_comendhandler:
28 mov r8,#IOC_BASE
29 ldrb r9,[r8,#0x34] @ IOC FIQ status
30 tst r9,#2
31 subeqs pc,r14,#4 @ should I leave a space here
32 orr r9,r8,#0x10000 @ FDC base
33 adr r8,fdc1772_fdc_int_done
34 ldrb r10,[r9,#0] @ FDC status
35 mov r9,#1 @ Got a FIQ flag
36 stmia r8,{r9,r10}
37 subs pc,r14,#4
38
39
40 .global fdc1772_dma_read
41fdc1772_dma_read:
42 mov r8,#IOC_BASE
43 ldrb r9,[r8,#0x34] @ IOC FIQ status
44 tst r9,#1
45 beq fdc1772_dma_read_notours
46 orr r8,r8,#0x10000 @ FDC base
47 ldrb r10,[r8,#0xc] @ Read from FDC data reg (also clears interrupt)
48 ldmia r11,{r8,r9}
49 subs r8,r8,#1 @ One less byte to go
50 @ If there was somewhere for this data to go then store it and update pointers
51 strplb r10,[r9],#1 @ Store the data and increment the pointer
52 stmplia r11,{r8,r9} @ Update count/pointers
53 @ Handle any other interrupts if there are any
54fdc1772_dma_read_notours:
55 @ Cant branch because this code has been copied down to the FIQ vector
56 ldr pc,[pc,#-4]
57 .word fdc1772_comendhandler
58 .global fdc1772_dma_read_end
59fdc1772_dma_read_end:
60
61 .global fdc1772_dma_write
62fdc1772_dma_write:
63 mov r8,#IOC_BASE
64 ldrb r9,[r8,#0x34] @ IOC FIQ status
65 tst r9,#1
66 beq fdc1772_dma_write_notours
67 orr r8,r8,#0x10000 @ FDC base
68 ldmia r11,{r9,r10}
69 subs r9,r9,#1 @ One less byte to go
70 @ If there really is some data then get it, store it and update count
71 ldrplb r12,[r10],#1
72 strplb r12,[r8,#0xc] @ write it to FDC data reg
73 stmplia r11,{r9,r10} @ Update count and pointer - should clear interrupt
74 @ Handle any other interrupts
75fdc1772_dma_write_notours:
76 @ Cant branch because this code has been copied down to the FIQ vector
77 ldr pc,[pc,#-4]
78 .word fdc1772_comendhandler
79
80 .global fdc1772_dma_write_end
81fdc1772_dma_write_end:
82
83
84@ Setup the FIQ R11 to point to the data and store the count, address
85@ for this dma
86@ R0=count
87@ R1=address
88 .global fdc1772_setupdma
89fdc1772_setupdma:
90 @ The big job is flipping in and out of FIQ mode
91 adr r2,fdc1772_fiqdata @ This is what we really came here for
92 stmia r2,{r0,r1}
93 mov r3, pc
94 teqp pc,#0x0c000001 @ Disable FIQs, IRQs and switch to FIQ mode
95 mov r0,r0 @ NOP
96 mov r11,r2
97 teqp r3,#0 @ Normal mode
98 mov r0,r0 @ NOP
99 mov pc,r14
100
diff --git a/drivers/acorn/block/mfm.S b/drivers/acorn/block/mfm.S
deleted file mode 100644
index c90cbd41ce21..000000000000
--- a/drivers/acorn/block/mfm.S
+++ /dev/null
@@ -1,162 +0,0 @@
1@ Read/Write DMA code for the ST506/MFM hard drive controllers on the A400 Acorn Archimedes
2@ motherboard and on ST506 expansion podules.
3@ (c) David Alan Gilbert (linux@treblig.org) 1996-1999
4
5#include <asm/assembler.h>
6
7hdc63463_irqdata:
8@ Controller base address
9 .global hdc63463_baseaddress
10hdc63463_baseaddress:
11 .word 0
12
13 .global hdc63463_irqpolladdress
14hdc63463_irqpolladdress:
15 .word 0
16
17 .global hdc63463_irqpollmask
18hdc63463_irqpollmask:
19 .word 0
20
21@ where to read/write data from the kernel data space
22 .global hdc63463_dataptr
23hdc63463_dataptr:
24 .word 0
25
26@ Number of bytes left to transfer
27 .global hdc63463_dataleft
28hdc63463_dataleft:
29 .word 0
30
31@ -------------------------------------------------------------------------
32@ hdc63463_writedma: DMA from host to controller
33@ internal reg usage: r0=hdc base address, r1=irq poll address, r2=poll mask
34@ r3=data ptr, r4=data left, r5,r6=temporary
35 .global hdc63463_writedma
36hdc63463_writedma:
37 stmfd sp!,{r4-r7}
38 adr r5,hdc63463_irqdata
39 ldmia r5,{r0,r1,r2,r3,r4}
40
41writedma_again:
42
43 @ test number of remaining bytes to transfer
44 cmp r4,#0
45 beq writedma_end
46 bmi writedma_end
47
48 @ Check the hdc is interrupting
49 ldrb r5,[r1,#0]
50 tst r5,r2
51 beq writedma_end
52
53 @ Transfer a block of upto 256 bytes
54 cmp r4,#256
55 movlt r7,r4
56 movge r7,#256
57
58 @ Check the hdc is still busy and command has not ended and no errors
59 ldr r5,[r0,#32] @ Status reg - 16 bit - its the top few bits which are status
60 @ think we should continue DMA until it drops busy - perhaps this was
61 @ the main problem with corrected errors causing a hang
62 @tst r5,#0x3c00 @ Test for things which should be off
63 @bne writedma_end
64 and r5,r5,#0x8000 @ This is test for things which should be on: Busy
65 cmp r5,#0x8000
66 bne writedma_end
67
68 @ Bytes remaining at end
69 sub r4,r4,r7
70
71 @ HDC Write register location
72 add r0,r0,#32+8
73
74writedma_loop:
75 @ OK - pretty sure we should be doing this
76
77 ldr r5,[r3],#4 @ Get a word to be written
78 @ get bottom half to be sent first
79 mov r6,r5,lsl#16 @ Separate the first 2 bytes
80 orr r2,r6,r6,lsr #16 @ Duplicate them in the bottom half of the word
81 @ now the top half
82 mov r6,r5,lsr#16 @ Get 2nd 2 bytes
83 orr r6,r6,r6,lsl#16 @ Duplicate
84 @str r6,[r0] @ to hdc
85 stmia r0,{r2,r6}
86 subs r7,r7,#4 @ Dec. number of bytes left
87 bne writedma_loop
88
89 @ If we were too slow we had better go through again - DAG - took out with new interrupt routine
90 @ sub r0,r0,#32+8
91 @ adr r2,hdc63463_irqdata
92 @ ldr r2,[r2,#8]
93 @ b writedma_again
94
95writedma_end:
96 adr r5,hdc63463_irqdata+12
97 stmia r5,{r3,r4}
98 ldmfd sp!,{r4-r7}
99 RETINSTR(mov,pc,lr)
100
101@ -------------------------------------------------------------------------
102@ hdc63463_readdma: DMA from controller to host
103@ internal reg usage: r0=hdc base address, r1=irq poll address, r2=poll mask
104@ r3=data ptr, r4=data left, r5,r6=temporary
105 .global hdc63463_readdma
106hdc63463_readdma:
107 stmfd sp!,{r4-r7}
108 adr r5,hdc63463_irqdata
109 ldmia r5,{r0,r1,r2,r3,r4}
110
111readdma_again:
112 @ test number of remaining bytes to transfer
113 cmp r4,#0
114 beq readdma_end
115 bmi readdma_end
116
117 @ Check the hdc is interrupting
118 ldrb r5,[r1,#0]
119 tst r5,r2
120 beq readdma_end
121
122 @ Check the hdc is still busy and command has not ended and no errors
123 ldr r5,[r0,#32] @ Status reg - 16 bit - its the top few bits which are status
124 @ think we should continue DMA until it drops busy - perhaps this was
125 @ the main problem with corrected errors causing a hang
126 @tst r5,#0x3c00 @ Test for things which should be off
127 @bne readdma_end
128 and r5,r5,#0x8000 @ This is test for things which should be on: Busy
129 cmp r5,#0x8000
130 bne readdma_end
131
132 @ Transfer a block of upto 256 bytes
133 cmp r4,#256
134 movlt r7,r4
135 movge r7,#256
136
137 @ Bytes remaining at end
138 sub r4,r4,r7
139
140 @ Set a pointer to the data register in the HDC
141 add r0,r0,#8
142readdma_loop:
143 @ OK - pretty sure we should be doing this
144 ldmia r0,{r5,r6}
145 mov r5,r5,lsl#16
146 mov r6,r6,lsl#16
147 orr r6,r6,r5,lsr #16
148 str r6,[r3],#4
149 subs r7,r7,#4 @ Decrement bytes to go
150 bne readdma_loop
151
152 @ Try reading multiple blocks - if this was fast enough then I do not think
153 @ this should help - NO taken out DAG - new interrupt handler has
154 @ non-consecutive memory blocks
155 @ sub r0,r0,#8
156 @ b readdma_again
157
158readdma_end:
159 adr r5,hdc63463_irqdata+12
160 stmia r5,{r3,r4}
161 ldmfd sp!,{r4-r7}
162 RETINSTR(mov,pc,lr)
diff --git a/drivers/acorn/block/mfmhd.c b/drivers/acorn/block/mfmhd.c
deleted file mode 100644
index 74058db674db..000000000000
--- a/drivers/acorn/block/mfmhd.c
+++ /dev/null
@@ -1,1385 +0,0 @@
1/*
2 * linux/drivers/acorn/block/mfmhd.c
3 *
4 * Copyright (C) 1995, 1996 Russell King, Dave Alan Gilbert (gilbertd@cs.man.ac.uk)
5 *
6 * MFM hard drive code [experimental]
7 */
8
9/*
10 * Change list:
11 *
12 * 3/2/96:DAG: Started a change list :-)
13 * Set the hardsect_size pointers up since we are running 256 byte
14 * sectors
15 * Added DMA code, put it into the rw_intr
16 * Moved RCAL out of generic interrupt code - don't want to do it
17 * while DMA'ing - its now in individual handlers.
18 * Took interrupt handlers off task queue lists and called
19 * directly - not sure of implications.
20 *
21 * 18/2/96:DAG: Well its reading OK I think, well enough for image file code
22 * to find the image file; but now I've discovered that I actually
23 * have to put some code in for image files.
24 *
25 * Added stuff for image files; seems to work, but I've not
26 * got a multisegment image file (I don't think!).
27 * Put in a hack (yep a real hack) for multiple cylinder reads.
28 * Not convinced its working.
29 *
30 * 5/4/96:DAG: Added asm/hardware.h and use IOC_ macros
31 * Rewrote dma code in mfm.S (again!) - now takes a word at a time
32 * from main RAM for speed; still doesn't feel speedy!
33 *
34 * 20/4/96:DAG: After rewriting mfm.S a heck of a lot of times and speeding
35 * things up, I've finally figured out why its so damn slow.
36 * Linux is only reading a block at a time, and so you never
37 * get more than 1K per disc revoloution ~=60K/second.
38 *
39 * 27/4/96:DAG: On Russell's advice I change ll_rw_blk.c to ask it to
40 * join adjacent blocks together. Everything falls flat on its
41 * face.
42 * Four hours of debugging later; I hadn't realised that
43 * ll_rw_blk would be so generous as to join blocks whose
44 * results aren't going into consecutive buffers.
45 *
46 * OK; severe rehacking of mfm_rw_interrupt; now end_request's
47 * as soon as its DMA'd each request. Odd thing is that
48 * we are sometimes getting interrupts where we are not transferring
49 * any data; why? Is that what happens when you miss? I doubt
50 * it; are we too fast? No - its just at command ends. Got 240K/s
51 * better than before, but RiscOS hits 480K/s
52 *
53 * 25/6/96:RMK: Fixed init code to allow the MFM podule to work. Increased the
54 * number of errors for my Miniscribe drive (8425).
55 *
56 * 30/6/96:DAG: Russell suggested that a check drive 0 might turn the LEDs off
57 * - so in request_done just before it clears Busy it sends a
58 * check drive 0 - and the LEDs go off!!!!
59 *
60 * Added test for mainboard controller. - Removes need for separate
61 * define.
62 *
63 * 13/7/96:DAG: Changed hardware sectore size to 512 in attempt to make
64 * IM drivers work.
65 * 21/7/96:DAG: Took out old image file stuff (accessing it now produces an IO
66 * error.)
67 *
68 * 17/8/96:DAG: Ran through indent -kr -i8; evil - all my nice 2 character indents
69 * gone :-( Hand modified afterwards.
70 * Took out last remains of the older image map system.
71 *
72 * 22/9/96:DAG: Changed mfm.S so it will carry on DMA'ing til; BSY is dropped
73 * Changed mfm_rw_intr so that it doesn't follow the error
74 * code until BSY is dropped. Nope - still broke. Problem
75 * may revolve around when it reads the results for the error
76 * number?
77 *
78 *16/11/96:DAG: Modified for 2.0.18; request_irq changed
79 *
80 *17/12/96:RMK: Various cleanups, reorganisation, and the changes for new IO system.
81 * Improved probe for onboard MFM chip - it was hanging on my A5k.
82 * Added autodetect CHS code such that we don't rely on the presence
83 * of an ADFS boot block. Added ioport resource manager calls so
84 * that we don't clash with already-running hardware (eg. RiscPC Ether
85 * card slots if someone tries this)!
86 *
87 * 17/1/97:RMK: Upgraded to 2.1 kernels.
88 *
89 * 4/3/98:RMK: Changed major number to 21.
90 *
91 * 27/6/98:RMK: Changed asm/delay.h to linux/delay.h for mdelay().
92 */
93
94/*
95 * Possible enhancements:
96 * Multi-thread the code so that it is possible that while one drive
97 * is seeking, the other one can be reading data/seeking as well.
98 * This would be a performance boost with dual drive systems.
99 */
100
101#include <linux/module.h>
102#include <linux/fs.h>
103#include <linux/interrupt.h>
104#include <linux/kernel.h>
105#include <linux/timer.h>
106#include <linux/mm.h>
107#include <linux/errno.h>
108#include <linux/genhd.h>
109#include <linux/major.h>
110#include <linux/ioport.h>
111#include <linux/delay.h>
112#include <linux/blkpg.h>
113
114#include <asm/system.h>
115#include <asm/io.h>
116#include <asm/irq.h>
117#include <asm/uaccess.h>
118#include <asm/dma.h>
119#include <asm/hardware.h>
120#include <asm/ecard.h>
121#include <asm/hardware/ioc.h>
122
123static void (*do_mfm)(void) = NULL;
124static struct request_queue *mfm_queue;
125static DEFINE_SPINLOCK(mfm_lock);
126
127#define MAJOR_NR MFM_ACORN_MAJOR
128#define QUEUE (mfm_queue)
129#define CURRENT elv_next_request(mfm_queue)
130
131/*
132 * Configuration section
133 *
134 * This is the maximum number of drives that we accept
135 */
136#define MFM_MAXDRIVES 2
137/*
138 * Linux I/O address of onboard MFM controller or 0 to disable this
139 */
140#define ONBOARD_MFM_ADDRESS ((0x002d0000 >> 2) | 0x80000000)
141/*
142 * Uncomment this to enable debugging in the MFM driver...
143 */
144#ifndef DEBUG
145/*#define DEBUG */
146#endif
147/*
148 * End of configuration
149 */
150
151
152/*
153 * This structure contains all information to do with a particular physical
154 * device.
155 */
156struct mfm_info {
157 unsigned char sectors;
158 unsigned char heads;
159 unsigned short cylinders;
160 unsigned short lowcurrent;
161 unsigned short precomp;
162#define NO_TRACK -1
163#define NEED_1_RECAL -2
164#define NEED_2_RECAL -3
165 int cylinder;
166 struct {
167 char recal;
168 char report;
169 char abort;
170 } errors;
171} mfm_info[MFM_MAXDRIVES];
172
173#define MFM_DRV_INFO mfm_info[raw_cmd.dev]
174
175/* Stuff from the assembly routines */
176extern unsigned int hdc63463_baseaddress; /* Controller base address */
177extern unsigned int hdc63463_irqpolladdress; /* Address to read to test for int */
178extern unsigned int hdc63463_irqpollmask; /* Mask for irq register */
179extern unsigned int hdc63463_dataptr; /* Pointer to kernel data space to DMA */
180extern int hdc63463_dataleft; /* Number of bytes left to transfer */
181
182
183
184
185static int lastspecifieddrive;
186static unsigned Busy;
187
188static unsigned int PartFragRead; /* The number of sectors which have been read
189 during a partial read split over two
190 cylinders. If 0 it means a partial
191 read did not occur. */
192
193static unsigned int PartFragRead_RestartBlock; /* Where to restart on a split access */
194static unsigned int PartFragRead_SectorsLeft; /* Where to restart on a split access */
195
196static int Sectors256LeftInCurrent; /* i.e. 256 byte sectors left in current */
197static int SectorsLeftInRequest; /* i.e. blocks left in the thing mfm_request was called for */
198static int Copy_Sector; /* The 256 byte sector we are currently at - fragments need to know
199 where to take over */
200static char *Copy_buffer;
201
202
203static void mfm_seek(void);
204static void mfm_rerequest(void);
205static void mfm_request(void);
206static void mfm_specify (void);
207static void issue_request(unsigned int block, unsigned int nsect,
208 struct request *req);
209
210static unsigned int mfm_addr; /* Controller address */
211static unsigned int mfm_IRQPollLoc; /* Address to read for IRQ information */
212static unsigned int mfm_irqenable; /* Podule IRQ enable location */
213static unsigned char mfm_irq; /* Interrupt number */
214static int mfm_drives = 0; /* drives available */
215static int mfm_status = 0; /* interrupt status */
216static int *errors;
217
218static struct rawcmd {
219 unsigned int dev;
220 unsigned int cylinder;
221 unsigned int head;
222 unsigned int sector;
223 unsigned int cmdtype;
224 unsigned int cmdcode;
225 unsigned char cmddata[16];
226 unsigned int cmdlen;
227} raw_cmd;
228
229static unsigned char result[16];
230
231static struct cont {
232 void (*interrupt) (void); /* interrupt handler */
233 void (*error) (void); /* error handler */
234 void (*redo) (void); /* redo handler */
235 void (*done) (int st); /* done handler */
236} *cont = NULL;
237
238#if 0
239static struct tq_struct mfm_tq = {0, 0, (void (*)(void *)) NULL, 0};
240#endif
241
242int number_mfm_drives = 1;
243
244/* ------------------------------------------------------------------------------------------ */
245/*
246 * From the HD63463 data sheet from Hitachi Ltd.
247 */
248
249#define MFM_COMMAND (mfm_addr + 0)
250#define MFM_DATAOUT (mfm_addr + 1)
251#define MFM_STATUS (mfm_addr + 8)
252#define MFM_DATAIN (mfm_addr + 9)
253
254#define CMD_ABT 0xF0 /* Abort */
255#define CMD_SPC 0xE8 /* Specify */
256#define CMD_TST 0xE0 /* Test */
257#define CMD_RCLB 0xC8 /* Recalibrate */
258#define CMD_SEK 0xC0 /* Seek */
259#define CMD_WFS 0xAB /* Write Format Skew */
260#define CMD_WFM 0xA3 /* Write Format */
261#define CMD_MTB 0x90 /* Memory to buffer */
262#define CMD_CMPD 0x88 /* Compare data */
263#define CMD_WD 0x87 /* Write data */
264#define CMD_RED 0x70 /* Read erroneous data */
265#define CMD_RIS 0x68 /* Read ID skew */
266#define CMD_FID 0x61 /* Find ID */
267#define CMD_RID 0x60 /* Read ID */
268#define CMD_BTM 0x50 /* Buffer to memory */
269#define CMD_CKD 0x48 /* Check data */
270#define CMD_RD 0x40 /* Read data */
271#define CMD_OPBW 0x38 /* Open buffer write */
272#define CMD_OPBR 0x30 /* Open buffer read */
273#define CMD_CKV 0x28 /* Check drive */
274#define CMD_CKE 0x20 /* Check ECC */
275#define CMD_POD 0x18 /* Polling disable */
276#define CMD_POL 0x10 /* Polling enable */
277#define CMD_RCAL 0x08 /* Recall */
278
279#define STAT_BSY 0x8000 /* Busy */
280#define STAT_CPR 0x4000 /* Command Parameter Rejection */
281#define STAT_CED 0x2000 /* Command end */
282#define STAT_SED 0x1000 /* Seek end */
283#define STAT_DER 0x0800 /* Drive error */
284#define STAT_ABN 0x0400 /* Abnormal end */
285#define STAT_POL 0x0200 /* Polling */
286
287/* ------------------------------------------------------------------------------------------ */
288#ifdef DEBUG
289static void console_printf(const char *fmt,...)
290{
291 static char buffer[2048]; /* Arbitary! */
292 extern void console_print(const char *);
293 unsigned long flags;
294 va_list ap;
295
296 local_irq_save(flags);
297
298 va_start(ap, fmt);
299 vsprintf(buffer, fmt, ap);
300 console_print(buffer);
301 va_end(fmt);
302
303 local_irq_restore(flags);
304}; /* console_printf */
305
306#define DBG(x...) console_printf(x)
307#else
308#define DBG(x...)
309#endif
310
311static void print_status(void)
312{
313 char *error;
314 static char *errors[] = {
315 "no error",
316 "command aborted",
317 "invalid command",
318 "parameter error",
319 "not initialised",
320 "rejected TEST",
321 "no useld",
322 "write fault",
323 "not ready",
324 "no scp",
325 "in seek",
326 "invalid NCA",
327 "invalid step rate",
328 "seek error",
329 "over run",
330 "invalid PHA",
331 "data field EEC error",
332 "data field CRC error",
333 "error corrected",
334 "data field fatal error",
335 "no data am",
336 "not hit",
337 "ID field CRC error",
338 "time over",
339 "no ID am",
340 "not writable"
341 };
342 if (result[1] < 0x65)
343 error = errors[result[1] >> 2];
344 else
345 error = "unknown";
346 printk("(");
347 if (mfm_status & STAT_BSY) printk("BSY ");
348 if (mfm_status & STAT_CPR) printk("CPR ");
349 if (mfm_status & STAT_CED) printk("CED ");
350 if (mfm_status & STAT_SED) printk("SED ");
351 if (mfm_status & STAT_DER) printk("DER ");
352 if (mfm_status & STAT_ABN) printk("ABN ");
353 if (mfm_status & STAT_POL) printk("POL ");
354 printk(") SSB = %X (%s)\n", result[1], error);
355
356}
357
358/* ------------------------------------------------------------------------------------- */
359
360static void issue_command(int command, unsigned char *cmdb, int len)
361{
362 int status;
363#ifdef DEBUG
364 int i;
365 console_printf("issue_command: %02X: ", command);
366 for (i = 0; i < len; i++)
367 console_printf("%02X ", cmdb[i]);
368 console_printf("\n");
369#endif
370
371 do {
372 status = inw(MFM_STATUS);
373 } while (status & (STAT_BSY | STAT_POL));
374 DBG("issue_command: status after pol/bsy loop: %02X:\n ", status >> 8);
375
376 if (status & (STAT_CPR | STAT_CED | STAT_SED | STAT_DER | STAT_ABN)) {
377 outw(CMD_RCAL, MFM_COMMAND);
378 while (inw(MFM_STATUS) & STAT_BSY);
379 }
380 status = inw(MFM_STATUS);
381 DBG("issue_command: status before parameter issue: %02X:\n ", status >> 8);
382
383 while (len > 0) {
384 outw(cmdb[1] | (cmdb[0] << 8), MFM_DATAOUT);
385 len -= 2;
386 cmdb += 2;
387 }
388 status = inw(MFM_STATUS);
389 DBG("issue_command: status before command issue: %02X:\n ", status >> 8);
390
391 outw(command, MFM_COMMAND);
392 status = inw(MFM_STATUS);
393 DBG("issue_command: status immediately after command issue: %02X:\n ", status >> 8);
394}
395
396static void wait_for_completion(void)
397{
398 while ((mfm_status = inw(MFM_STATUS)) & STAT_BSY);
399}
400
401static void wait_for_command_end(void)
402{
403 int i;
404
405 while (!((mfm_status = inw(MFM_STATUS)) & STAT_CED));
406
407 for (i = 0; i < 16;) {
408 int in;
409 in = inw(MFM_DATAIN);
410 result[i++] = in >> 8;
411 result[i++] = in;
412 }
413 outw (CMD_RCAL, MFM_COMMAND);
414}
415
416/* ------------------------------------------------------------------------------------- */
417
418static void mfm_rw_intr(void)
419{
420 int old_status; /* Holds status on entry, we read to see if the command just finished */
421#ifdef DEBUG
422 console_printf("mfm_rw_intr...dataleft=%d\n", hdc63463_dataleft);
423 print_status();
424#endif
425
426 /* Now don't handle the error until BSY drops */
427 if ((mfm_status & (STAT_DER | STAT_ABN)) && ((mfm_status&STAT_BSY)==0)) {
428 /* Something has gone wrong - let's try that again */
429 outw(CMD_RCAL, MFM_COMMAND); /* Clear interrupt condition */
430 if (cont) {
431 DBG("mfm_rw_intr: DER/ABN err\n");
432 cont->error();
433 cont->redo();
434 };
435 return;
436 };
437
438 /* OK so what ever happened it's not an error, now I reckon we are left between
439 a choice of command end or some data which is ready to be collected */
440 /* I think we have to transfer data while the interrupt line is on and its
441 not any other type of interrupt */
442 if (rq_data_dir(CURRENT) == WRITE) {
443 extern void hdc63463_writedma(void);
444 if ((hdc63463_dataleft <= 0) && (!(mfm_status & STAT_CED))) {
445 printk("mfm_rw_intr: Apparent DMA write request when no more to DMA\n");
446 if (cont) {
447 cont->error();
448 cont->redo();
449 };
450 return;
451 };
452 hdc63463_writedma();
453 } else {
454 extern void hdc63463_readdma(void);
455 if ((hdc63463_dataleft <= 0) && (!(mfm_status & STAT_CED))) {
456 printk("mfm_rw_intr: Apparent DMA read request when no more to DMA\n");
457 if (cont) {
458 cont->error();
459 cont->redo();
460 };
461 return;
462 };
463 DBG("Going to try read dma..............status=0x%x, buffer=%p\n", mfm_status, hdc63463_dataptr);
464 hdc63463_readdma();
465 }; /* Read */
466
467 if (hdc63463_dataptr != ((unsigned int) Copy_buffer + 256)) {
468 /* If we didn't actually manage to get any data on this interrupt - but why? We got the interrupt */
469 /* Ah - well looking at the status its just when we get command end; so no problem */
470 /*console_printf("mfm: dataptr mismatch. dataptr=0x%08x Copy_buffer+256=0x%08p\n",
471 hdc63463_dataptr,Copy_buffer+256);
472 print_status(); */
473 } else {
474 Sectors256LeftInCurrent--;
475 Copy_buffer += 256;
476 Copy_Sector++;
477
478 /* We have come to the end of this request */
479 if (!Sectors256LeftInCurrent) {
480 DBG("mfm: end_request for CURRENT=0x%p CURRENT(sector=%d current_nr_sectors=%d nr_sectors=%d)\n",
481 CURRENT, CURRENT->sector, CURRENT->current_nr_sectors, CURRENT->nr_sectors);
482
483 CURRENT->nr_sectors -= CURRENT->current_nr_sectors;
484 CURRENT->sector += CURRENT->current_nr_sectors;
485 SectorsLeftInRequest -= CURRENT->current_nr_sectors;
486
487 end_request(CURRENT, 1);
488 if (SectorsLeftInRequest) {
489 hdc63463_dataptr = (unsigned int) CURRENT->buffer;
490 Copy_buffer = CURRENT->buffer;
491 Sectors256LeftInCurrent = CURRENT->current_nr_sectors * 2;
492 errors = &(CURRENT->errors);
493 /* These should match the present calculations of the next logical sector
494 on the device
495 Copy_Sector=CURRENT->sector*2; */
496
497 if (Copy_Sector != CURRENT->sector * 2)
498#ifdef DEBUG
499 /*console_printf*/printk("mfm: Copy_Sector mismatch. Copy_Sector=%d CURRENT->sector*2=%d\n",
500 Copy_Sector, CURRENT->sector * 2);
501#else
502 printk("mfm: Copy_Sector mismatch! Eek!\n");
503#endif
504 }; /* CURRENT */
505 }; /* Sectors256LeftInCurrent */
506 };
507
508 old_status = mfm_status;
509 mfm_status = inw(MFM_STATUS);
510 if (mfm_status & (STAT_DER | STAT_ABN)) {
511 /* Something has gone wrong - let's try that again */
512 if (cont) {
513 DBG("mfm_rw_intr: DER/ABN error\n");
514 cont->error();
515 cont->redo();
516 };
517 return;
518 };
519
520 /* If this code wasn't entered due to command_end but there is
521 now a command end we must read the command results out. If it was
522 entered like this then mfm_interrupt_handler would have done the
523 job. */
524 if ((!((old_status & (STAT_CPR | STAT_BSY)) == STAT_CPR)) &&
525 ((mfm_status & (STAT_CPR | STAT_BSY)) == STAT_CPR)) {
526 int len = 0;
527 while (len < 16) {
528 int in;
529 in = inw(MFM_DATAIN);
530 result[len++] = in >> 8;
531 result[len++] = in;
532 };
533 }; /* Result read */
534
535 /*console_printf ("mfm_rw_intr nearexit [%02X]\n", __raw_readb(mfm_IRQPollLoc)); */
536
537 /* If end of command move on */
538 if (mfm_status & (STAT_CED)) {
539 outw(CMD_RCAL, MFM_COMMAND); /* Clear interrupt condition */
540 /* End of command - trigger the next command */
541 if (cont) {
542 cont->done(1);
543 }
544 DBG("mfm_rw_intr: returned from cont->done\n");
545 } else {
546 /* Its going to generate another interrupt */
547 do_mfm = mfm_rw_intr;
548 };
549}
550
551static void mfm_setup_rw(void)
552{
553 DBG("setting up for rw...\n");
554
555 do_mfm = mfm_rw_intr;
556 issue_command(raw_cmd.cmdcode, raw_cmd.cmddata, raw_cmd.cmdlen);
557}
558
559static void mfm_recal_intr(void)
560{
561#ifdef DEBUG
562 console_printf("recal intr - status = ");
563 print_status();
564#endif
565 outw(CMD_RCAL, MFM_COMMAND); /* Clear interrupt condition */
566 if (mfm_status & (STAT_DER | STAT_ABN)) {
567 printk("recal failed\n");
568 MFM_DRV_INFO.cylinder = NEED_2_RECAL;
569 if (cont) {
570 cont->error();
571 cont->redo();
572 }
573 return;
574 }
575 /* Thats seek end - we are finished */
576 if (mfm_status & STAT_SED) {
577 issue_command(CMD_POD, NULL, 0);
578 MFM_DRV_INFO.cylinder = 0;
579 mfm_seek();
580 return;
581 }
582 /* Command end without seek end (see data sheet p.20) for parallel seek
583 - we have to send a POL command to wait for the seek */
584 if (mfm_status & STAT_CED) {
585 do_mfm = mfm_recal_intr;
586 issue_command(CMD_POL, NULL, 0);
587 return;
588 }
589 printk("recal: unknown status\n");
590}
591
592static void mfm_seek_intr(void)
593{
594#ifdef DEBUG
595 console_printf("seek intr - status = ");
596 print_status();
597#endif
598 outw(CMD_RCAL, MFM_COMMAND); /* Clear interrupt condition */
599 if (mfm_status & (STAT_DER | STAT_ABN)) {
600 printk("seek failed\n");
601 MFM_DRV_INFO.cylinder = NEED_2_RECAL;
602 if (cont) {
603 cont->error();
604 cont->redo();
605 }
606 return;
607 }
608 if (mfm_status & STAT_SED) {
609 issue_command(CMD_POD, NULL, 0);
610 MFM_DRV_INFO.cylinder = raw_cmd.cylinder;
611 mfm_seek();
612 return;
613 }
614 if (mfm_status & STAT_CED) {
615 do_mfm = mfm_seek_intr;
616 issue_command(CMD_POL, NULL, 0);
617 return;
618 }
619 printk("seek: unknown status\n");
620}
621
622/* IDEA2 seems to work better - its what RiscOS sets my
623 * disc to - on its SECOND call to specify!
624 */
625#define IDEA2
626#ifndef IDEA2
627#define SPEC_SL 0x16
628#define SPEC_SH 0xa9 /* Step pulse high=21, Record Length=001 (256 bytes) */
629#else
630#define SPEC_SL 0x00 /* OM2 - SL - step pulse low */
631#define SPEC_SH 0x21 /* Step pulse high=4, Record Length=001 (256 bytes) */
632#endif
633
634static void mfm_setupspecify (int drive, unsigned char *cmdb)
635{
636 cmdb[0] = 0x1f; /* OM0 - !SECT,!MOD,!DIF,PADP,ECD,CRCP,CRCI,ACOR */
637 cmdb[1] = 0xc3; /* OM1 - DTM,BRST,!CEDM,!SEDM,!DERM,0,AMEX,PSK */
638 cmdb[2] = SPEC_SL; /* OM2 - SL - step pulse low */
639 cmdb[3] = (number_mfm_drives == 1) ? 0x02 : 0x06; /* 1 or 2 drives */
640 cmdb[4] = 0xfc | ((mfm_info[drive].cylinders - 1) >> 8);/* RW time over/high part of number of cylinders */
641 cmdb[5] = mfm_info[drive].cylinders - 1; /* low part of number of cylinders */
642 cmdb[6] = mfm_info[drive].heads - 1; /* Number of heads */
643 cmdb[7] = mfm_info[drive].sectors - 1; /* Number of sectors */
644 cmdb[8] = SPEC_SH;
645 cmdb[9] = 0x0a; /* gap length 1 */
646 cmdb[10] = 0x0d; /* gap length 2 */
647 cmdb[11] = 0x0c; /* gap length 3 */
648 cmdb[12] = (mfm_info[drive].precomp - 1) >> 8; /* pre comp cylinder */
649 cmdb[13] = mfm_info[drive].precomp - 1;
650 cmdb[14] = (mfm_info[drive].lowcurrent - 1) >> 8; /* Low current cylinder */
651 cmdb[15] = mfm_info[drive].lowcurrent - 1;
652}
653
654static void mfm_specify (void)
655{
656 unsigned char cmdb[16];
657
658 DBG("specify...dev=%d lastspecified=%d\n", raw_cmd.dev, lastspecifieddrive);
659 mfm_setupspecify (raw_cmd.dev, cmdb);
660
661 issue_command (CMD_SPC, cmdb, 16);
662 /* Ensure that we will do another specify if we move to the other drive */
663 lastspecifieddrive = raw_cmd.dev;
664 wait_for_completion();
665}
666
667static void mfm_seek(void)
668{
669 unsigned char cmdb[4];
670
671 DBG("seeking...\n");
672 if (MFM_DRV_INFO.cylinder < 0) {
673 do_mfm = mfm_recal_intr;
674 DBG("mfm_seek: about to call specify\n");
675 mfm_specify (); /* DAG added this */
676
677 cmdb[0] = raw_cmd.dev + 1;
678 cmdb[1] = 0;
679
680 issue_command(CMD_RCLB, cmdb, 2);
681 return;
682 }
683 if (MFM_DRV_INFO.cylinder != raw_cmd.cylinder) {
684 cmdb[0] = raw_cmd.dev + 1;
685 cmdb[1] = 0; /* raw_cmd.head; DAG: My data sheet says this should be 0 */
686 cmdb[2] = raw_cmd.cylinder >> 8;
687 cmdb[3] = raw_cmd.cylinder;
688
689 do_mfm = mfm_seek_intr;
690 issue_command(CMD_SEK, cmdb, 4);
691 } else
692 mfm_setup_rw();
693}
694
695static void mfm_initialise(void)
696{
697 DBG("init...\n");
698 mfm_seek();
699}
700
701static void request_done(int uptodate)
702{
703 DBG("mfm:request_done\n");
704 if (uptodate) {
705 unsigned char block[2] = {0, 0};
706
707 /* Apparently worked - let's check bytes left to DMA */
708 if (hdc63463_dataleft != (PartFragRead_SectorsLeft * 256)) {
709 printk("mfm: request_done - dataleft=%d - should be %d - Eek!\n", hdc63463_dataleft, PartFragRead_SectorsLeft * 256);
710 end_request(CURRENT, 0);
711 Busy = 0;
712 };
713 /* Potentially this means that we've done; but we might be doing
714 a partial access, (over two cylinders) or we may have a number
715 of fragments in an image file. First let's deal with partial accesss
716 */
717 if (PartFragRead) {
718 /* Yep - a partial access */
719
720 /* and issue the remainder */
721 issue_request(PartFragRead_RestartBlock, PartFragRead_SectorsLeft, CURRENT);
722 return;
723 }
724
725 /* ah well - perhaps there is another fragment to go */
726
727 /* Increment pointers/counts to start of next fragment */
728 if (SectorsLeftInRequest > 0) printk("mfm: SectorsLeftInRequest>0 - Eek! Shouldn't happen!\n");
729
730 /* No - its the end of the line */
731 /* end_request's should have happened at the end of sector DMAs */
732 /* Turns Drive LEDs off - may slow it down? */
733 if (!elv_next_request(QUEUE))
734 issue_command(CMD_CKV, block, 2);
735
736 Busy = 0;
737 DBG("request_done: About to mfm_request\n");
738 /* Next one please */
739 mfm_request(); /* Moved from mfm_rw_intr */
740 DBG("request_done: returned from mfm_request\n");
741 } else {
742 printk("mfm:request_done: update=0\n");
743 end_request(CURRENT, 0);
744 Busy = 0;
745 }
746}
747
748static void error_handler(void)
749{
750 printk("error detected... status = ");
751 print_status();
752 (*errors)++;
753 if (*errors > MFM_DRV_INFO.errors.abort)
754 cont->done(0);
755 if (*errors > MFM_DRV_INFO.errors.recal)
756 MFM_DRV_INFO.cylinder = NEED_2_RECAL;
757}
758
759static void rw_interrupt(void)
760{
761 printk("rw_interrupt\n");
762}
763
764static struct cont rw_cont =
765{
766 rw_interrupt,
767 error_handler,
768 mfm_rerequest,
769 request_done
770};
771
772/*
773 * Actually gets round to issuing the request - note everything at this
774 * point is in 256 byte sectors not Linux 512 byte blocks
775 */
776static void issue_request(unsigned int block, unsigned int nsect,
777 struct request *req)
778{
779 struct gendisk *disk = req->rq_disk;
780 struct mfm_info *p = disk->private_data;
781 int track, start_head, start_sector;
782 int sectors_to_next_cyl;
783 dev = p - mfm_info;
784
785 track = block / p->sectors;
786 start_sector = block % p->sectors;
787 start_head = track % p->heads;
788
789 /* First get the number of whole tracks which are free before the next
790 track */
791 sectors_to_next_cyl = (p->heads - (start_head + 1)) * p->sectors;
792 /* Then add in the number of sectors left on this track */
793 sectors_to_next_cyl += (p->sectors - start_sector);
794
795 DBG("issue_request: mfm_info[dev].sectors=%d track=%d\n", p->sectors, track);
796
797 raw_cmd.dev = dev;
798 raw_cmd.sector = start_sector;
799 raw_cmd.head = start_head;
800 raw_cmd.cylinder = track / p->heads;
801 raw_cmd.cmdtype = CURRENT->cmd;
802 raw_cmd.cmdcode = rq_data_dir(CURRENT) == WRITE ? CMD_WD : CMD_RD;
803 raw_cmd.cmddata[0] = dev + 1; /* DAG: +1 to get US */
804 raw_cmd.cmddata[1] = raw_cmd.head;
805 raw_cmd.cmddata[2] = raw_cmd.cylinder >> 8;
806 raw_cmd.cmddata[3] = raw_cmd.cylinder;
807 raw_cmd.cmddata[4] = raw_cmd.head;
808 raw_cmd.cmddata[5] = raw_cmd.sector;
809
810 /* Was == and worked - how the heck??? */
811 if (lastspecifieddrive != raw_cmd.dev)
812 mfm_specify ();
813
814 if (nsect <= sectors_to_next_cyl) {
815 raw_cmd.cmddata[6] = nsect >> 8;
816 raw_cmd.cmddata[7] = nsect;
817 PartFragRead = 0; /* All in one */
818 PartFragRead_SectorsLeft = 0; /* Must set this - used in DMA calcs */
819 } else {
820 raw_cmd.cmddata[6] = sectors_to_next_cyl >> 8;
821 raw_cmd.cmddata[7] = sectors_to_next_cyl;
822 PartFragRead = sectors_to_next_cyl; /* only do this many this time */
823 PartFragRead_RestartBlock = block + sectors_to_next_cyl; /* Where to restart from */
824 PartFragRead_SectorsLeft = nsect - sectors_to_next_cyl;
825 }
826 raw_cmd.cmdlen = 8;
827
828 /* Setup DMA pointers */
829 hdc63463_dataptr = (unsigned int) Copy_buffer;
830 hdc63463_dataleft = nsect * 256; /* Better way? */
831
832 DBG("mfm%c: %sing: CHS=%d/%d/%d, sectors=%d, buffer=0x%08lx (%p)\n",
833 raw_cmd.dev + 'a', rq_data_dir(CURRENT) == READ ? "read" : "writ",
834 raw_cmd.cylinder,
835 raw_cmd.head,
836 raw_cmd.sector, nsect, (unsigned long) Copy_buffer, CURRENT);
837
838 cont = &rw_cont;
839 errors = &(CURRENT->errors);
840#if 0
841 mfm_tq.routine = (void (*)(void *)) mfm_initialise;
842 queue_task(&mfm_tq, &tq_immediate);
843 mark_bh(IMMEDIATE_BH);
844#else
845 mfm_initialise();
846#endif
847} /* issue_request */
848
849/*
850 * Called when an error has just happened - need to trick mfm_request
851 * into thinking we weren't busy
852 *
853 * Turn off ints - mfm_request expects them this way
854 */
855static void mfm_rerequest(void)
856{
857 DBG("mfm_rerequest\n");
858 cli();
859 Busy = 0;
860 mfm_request();
861}
862
863static struct gendisk *mfm_gendisk[2];
864
865static void mfm_request(void)
866{
867 DBG("mfm_request CURRENT=%p Busy=%d\n", CURRENT, Busy);
868
869 /* If we are still processing then return; we will get called again */
870 if (Busy) {
871 /* Again seems to be common in 1.3.45 */
872 /*DBG*/printk("mfm_request: Exiting due to busy\n");
873 return;
874 }
875 Busy = 1;
876
877 while (1) {
878 unsigned int block, nsect;
879 struct gendisk *disk;
880
881 DBG("mfm_request: loop start\n");
882 sti();
883
884 DBG("mfm_request: before !CURRENT\n");
885
886 if (!CURRENT) {
887 printk("mfm_request: Exiting due to empty queue (pre)\n");
888 do_mfm = NULL;
889 Busy = 0;
890 return;
891 }
892
893 DBG("mfm_request: before arg extraction\n");
894
895 disk = CURRENT->rq_disk;
896 block = CURRENT->sector;
897 nsect = CURRENT->nr_sectors;
898 if (block >= get_capacity(disk) ||
899 block+nsect > get_capacity(disk)) {
900 printk("%s: bad access: block=%d, count=%d, nr_sects=%ld\n",
901 disk->disk_name, block, nsect, get_capacity(disk));
902 printk("mfm: continue 1\n");
903 end_request(CURRENT, 0);
904 Busy = 0;
905 continue;
906 }
907
908 /* DAG: Linux doesn't cope with this - even though it has an array telling
909 it the hardware block size - silly */
910 block <<= 1; /* Now in 256 byte sectors */
911 nsect <<= 1; /* Ditto */
912
913 SectorsLeftInRequest = nsect >> 1;
914 Sectors256LeftInCurrent = CURRENT->current_nr_sectors * 2;
915 Copy_buffer = CURRENT->buffer;
916 Copy_Sector = CURRENT->sector << 1;
917
918 DBG("mfm_request: block after offset=%d\n", block);
919
920 issue_request(block, nsect, CURRENT);
921
922 break;
923 }
924 DBG("mfm_request: Dropping out bottom\n");
925}
926
927static void do_mfm_request(struct request_queue *q)
928{
929 DBG("do_mfm_request: about to mfm_request\n");
930 mfm_request();
931}
932
933static void mfm_interrupt_handler(int unused, void *dev_id)
934{
935 void (*handler) (void) = do_mfm;
936
937 do_mfm = NULL;
938
939 DBG("mfm_interrupt_handler (handler=0x%p)\n", handler);
940
941 mfm_status = inw(MFM_STATUS);
942
943 /* If CPR (Command Parameter Reject) and not busy it means that the command
944 has some return message to give us */
945 if ((mfm_status & (STAT_CPR | STAT_BSY)) == STAT_CPR) {
946 int len = 0;
947 while (len < 16) {
948 int in;
949 in = inw(MFM_DATAIN);
950 result[len++] = in >> 8;
951 result[len++] = in;
952 }
953 }
954 if (handler) {
955 handler();
956 return;
957 }
958 outw (CMD_RCAL, MFM_COMMAND); /* Clear interrupt condition */
959 printk ("mfm: unexpected interrupt - status = ");
960 print_status ();
961 while (1);
962}
963
964
965
966
967
968/*
969 * Tell the user about the drive if we decided it exists.
970 */
971static void mfm_geometry(int drive)
972{
973 struct mfm_info *p = mfm_info + drive;
974 struct gendisk *disk = mfm_gendisk[drive];
975 disk->private_data = p;
976 if (p->cylinders)
977 printk ("%s: %dMB CHS=%d/%d/%d LCC=%d RECOMP=%d\n",
978 disk->disk_name,
979 p->cylinders * p->heads * p->sectors / 4096,
980 p->cylinders, p->heads, p->sectors,
981 p->lowcurrent, p->precomp);
982 set_capacity(disk, p->cylinders * p->heads * p->sectors / 2);
983}
984
985#ifdef CONFIG_BLK_DEV_MFM_AUTODETECT
986/*
987 * Attempt to detect a drive and find its geometry. The drive has already been
988 * specified...
989 *
990 * We first recalibrate the disk, then try to probe sectors, heads and then
991 * cylinders. NOTE! the cylinder probe may break drives. The xd disk driver
992 * does something along these lines, so I assume that most drives are up to
993 * this mistreatment...
994 */
995static int mfm_detectdrive (int drive)
996{
997 unsigned int mingeo[3], maxgeo[3];
998 unsigned int attribute, need_recal = 1;
999 unsigned char cmdb[8];
1000
1001 memset (mingeo, 0, sizeof (mingeo));
1002 maxgeo[0] = mfm_info[drive].sectors;
1003 maxgeo[1] = mfm_info[drive].heads;
1004 maxgeo[2] = mfm_info[drive].cylinders;
1005
1006 cmdb[0] = drive + 1;
1007 cmdb[6] = 0;
1008 cmdb[7] = 1;
1009 for (attribute = 0; attribute < 3; attribute++) {
1010 while (mingeo[attribute] != maxgeo[attribute]) {
1011 unsigned int variable;
1012
1013 variable = (maxgeo[attribute] + mingeo[attribute]) >> 1;
1014 cmdb[1] = cmdb[2] = cmdb[3] = cmdb[4] = cmdb[5] = 0;
1015
1016 if (need_recal) {
1017 int tries = 5;
1018
1019 do {
1020 issue_command (CMD_RCLB, cmdb, 2);
1021 wait_for_completion ();
1022 wait_for_command_end ();
1023 if (result[1] == 0x20)
1024 break;
1025 } while (result[1] && --tries);
1026 if (result[1]) {
1027 outw (CMD_RCAL, MFM_COMMAND);
1028 return 0;
1029 }
1030 need_recal = 0;
1031 }
1032
1033 switch (attribute) {
1034 case 0:
1035 cmdb[5] = variable;
1036 issue_command (CMD_CMPD, cmdb, 8);
1037 break;
1038 case 1:
1039 cmdb[1] = variable;
1040 cmdb[4] = variable;
1041 issue_command (CMD_CMPD, cmdb, 8);
1042 break;
1043 case 2:
1044 cmdb[2] = variable >> 8;
1045 cmdb[3] = variable;
1046 issue_command (CMD_SEK, cmdb, 4);
1047 break;
1048 }
1049 wait_for_completion ();
1050 wait_for_command_end ();
1051
1052 switch (result[1]) {
1053 case 0x00:
1054 case 0x50:
1055 mingeo[attribute] = variable + 1;
1056 break;
1057
1058 case 0x20:
1059 outw (CMD_RCAL, MFM_COMMAND);
1060 return 0;
1061
1062 case 0x24:
1063 need_recal = 1;
1064 default:
1065 maxgeo[attribute] = variable;
1066 break;
1067 }
1068 }
1069 }
1070 mfm_info[drive].cylinders = mingeo[2];
1071 mfm_info[drive].lowcurrent = mingeo[2];
1072 mfm_info[drive].precomp = mingeo[2] / 2;
1073 mfm_info[drive].heads = mingeo[1];
1074 mfm_info[drive].sectors = mingeo[0];
1075 outw (CMD_RCAL, MFM_COMMAND);
1076 return 1;
1077}
1078#endif
1079
1080/*
1081 * Initialise all drive information for this controller.
1082 */
1083static int mfm_initdrives(void)
1084{
1085 int drive;
1086
1087 if (number_mfm_drives > MFM_MAXDRIVES) {
1088 number_mfm_drives = MFM_MAXDRIVES;
1089 printk("No. of ADFS MFM drives is greater than MFM_MAXDRIVES - you can't have that many!\n");
1090 }
1091
1092 for (drive = 0; drive < number_mfm_drives; drive++) {
1093 mfm_info[drive].lowcurrent = 1;
1094 mfm_info[drive].precomp = 1;
1095 mfm_info[drive].cylinder = -1;
1096 mfm_info[drive].errors.recal = 0;
1097 mfm_info[drive].errors.report = 0;
1098 mfm_info[drive].errors.abort = 4;
1099
1100#ifdef CONFIG_BLK_DEV_MFM_AUTODETECT
1101 mfm_info[drive].cylinders = 1024;
1102 mfm_info[drive].heads = 8;
1103 mfm_info[drive].sectors = 64;
1104 {
1105 unsigned char cmdb[16];
1106
1107 mfm_setupspecify (drive, cmdb);
1108 cmdb[1] &= ~0x81;
1109 issue_command (CMD_SPC, cmdb, 16);
1110 wait_for_completion ();
1111 if (!mfm_detectdrive (drive)) {
1112 mfm_info[drive].cylinders = 0;
1113 mfm_info[drive].heads = 0;
1114 mfm_info[drive].sectors = 0;
1115 }
1116 cmdb[0] = cmdb[1] = 0;
1117 issue_command (CMD_CKV, cmdb, 2);
1118 }
1119#else
1120 mfm_info[drive].cylinders = 1; /* its going to have to figure it out from the partition info */
1121 mfm_info[drive].heads = 4;
1122 mfm_info[drive].sectors = 32;
1123#endif
1124 }
1125 return number_mfm_drives;
1126}
1127
1128
1129
1130/*
1131 * The 'front' end of the mfm driver follows...
1132 */
1133
1134static int mfm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1135{
1136 struct mfm_info *p = bdev->bd_disk->private_data;
1137
1138 geo->heads = p->heads;
1139 geo->sectors = p->sectors;
1140 geo->cylinders = p->cylinders;
1141 return 0;
1142}
1143
1144/*
1145 * This is to handle various kernel command line parameters
1146 * specific to this driver.
1147 */
1148void mfm_setup(char *str, int *ints)
1149{
1150 return;
1151}
1152
1153/*
1154 * Set the CHS from the ADFS boot block if it is present. This is not ideal
1155 * since if there are any non-ADFS partitions on the disk, this won't work!
1156 * Hence, I want to get rid of this...
1157 */
1158void xd_set_geometry(struct block_device *bdev, unsigned char secsptrack,
1159 unsigned char heads, unsigned int secsize)
1160{
1161 struct mfm_info *p = bdev->bd_disk->private_data;
1162 int drive = p - mfm_info;
1163 unsigned long disksize = bdev->bd_inode->i_size;
1164
1165 if (p->cylinders == 1) {
1166 p->sectors = secsptrack;
1167 p->heads = heads;
1168 p->cylinders = discsize / (secsptrack * heads * secsize);
1169
1170 if ((heads < 1) || (p->cylinders > 1024)) {
1171 printk("%s: Insane disc shape! Setting to 512/4/32\n",
1172 bdev->bd_disk->disk_name);
1173
1174 /* These values are fairly arbitary, but are there so that if your
1175 * lucky you can pick apart your disc to find out what is going on -
1176 * I reckon these figures won't hurt MOST drives
1177 */
1178 p->sectors = 32;
1179 p->heads = 4;
1180 p->cylinders = 512;
1181 }
1182 if (raw_cmd.dev == drive)
1183 mfm_specify ();
1184 mfm_geometry (drive);
1185 }
1186}
1187
1188static struct block_device_operations mfm_fops =
1189{
1190 .owner = THIS_MODULE,
1191 .getgeo = mfm_getgeo,
1192};
1193
1194/*
1195 * See if there is a controller at the address presently at mfm_addr
1196 *
1197 * We check to see if the controller is busy - if it is, we abort it first,
1198 * and check that the chip is no longer busy after at least 180 clock cycles.
1199 * We then issue a command and check that the BSY or CPR bits are set.
1200 */
1201static int mfm_probecontroller (unsigned int mfm_addr)
1202{
1203 if (inw (MFM_STATUS) & STAT_BSY) {
1204 outw (CMD_ABT, MFM_COMMAND);
1205 udelay (50);
1206 if (inw (MFM_STATUS) & STAT_BSY)
1207 return 0;
1208 }
1209
1210 if (inw (MFM_STATUS) & STAT_CED)
1211 outw (CMD_RCAL, MFM_COMMAND);
1212
1213 outw (CMD_SEK, MFM_COMMAND);
1214
1215 if (inw (MFM_STATUS) & (STAT_BSY | STAT_CPR)) {
1216 unsigned int count = 2000;
1217 while (inw (MFM_STATUS) & STAT_BSY) {
1218 udelay (500);
1219 if (!--count)
1220 return 0;
1221 }
1222
1223 outw (CMD_RCAL, MFM_COMMAND);
1224 }
1225 return 1;
1226}
1227
1228static int mfm_do_init(unsigned char irqmask)
1229{
1230 int i, ret;
1231
1232 printk("mfm: found at address %08X, interrupt %d\n", mfm_addr, mfm_irq);
1233
1234 ret = -EBUSY;
1235 if (!request_region (mfm_addr, 10, "mfm"))
1236 goto out1;
1237
1238 ret = register_blkdev(MAJOR_NR, "mfm");
1239 if (ret)
1240 goto out2;
1241
1242 /* Stuff for the assembler routines to get to */
1243 hdc63463_baseaddress = ioaddr(mfm_addr);
1244 hdc63463_irqpolladdress = mfm_IRQPollLoc;
1245 hdc63463_irqpollmask = irqmask;
1246
1247 mfm_queue = blk_init_queue(do_mfm_request, &mfm_lock);
1248 if (!mfm_queue)
1249 goto out2a;
1250
1251 Busy = 0;
1252 lastspecifieddrive = -1;
1253
1254 mfm_drives = mfm_initdrives();
1255 if (!mfm_drives) {
1256 ret = -ENODEV;
1257 goto out3;
1258 }
1259
1260 for (i = 0; i < mfm_drives; i++) {
1261 struct gendisk *disk = alloc_disk(64);
1262 if (!disk)
1263 goto Enomem;
1264 disk->major = MAJOR_NR;
1265 disk->first_minor = i << 6;
1266 disk->fops = &mfm_fops;
1267 sprintf(disk->disk_name, "mfm%c", 'a'+i);
1268 mfm_gendisk[i] = disk;
1269 }
1270
1271 printk("mfm: detected %d hard drive%s\n", mfm_drives,
1272 mfm_drives == 1 ? "" : "s");
1273 ret = request_irq(mfm_irq, mfm_interrupt_handler, IRQF_DISABLED, "MFM harddisk", NULL);
1274 if (ret) {
1275 printk("mfm: unable to get IRQ%d\n", mfm_irq);
1276 goto out4;
1277 }
1278
1279 if (mfm_irqenable)
1280 outw(0x80, mfm_irqenable); /* Required to enable IRQs from MFM podule */
1281
1282 for (i = 0; i < mfm_drives; i++) {
1283 mfm_geometry(i);
1284 mfm_gendisk[i]->queue = mfm_queue;
1285 add_disk(mfm_gendisk[i]);
1286 }
1287 return 0;
1288
1289out4:
1290 for (i = 0; i < mfm_drives; i++)
1291 put_disk(mfm_gendisk[i]);
1292out3:
1293 blk_cleanup_queue(mfm_queue);
1294out2a:
1295 unregister_blkdev(MAJOR_NR, "mfm");
1296out2:
1297 release_region(mfm_addr, 10);
1298out1:
1299 return ret;
1300Enomem:
1301 while (i--)
1302 put_disk(mfm_gendisk[i]);
1303 goto out3;
1304}
1305
1306static void mfm_do_exit(void)
1307{
1308 int i;
1309
1310 free_irq(mfm_irq, NULL);
1311 for (i = 0; i < mfm_drives; i++) {
1312 del_gendisk(mfm_gendisk[i]);
1313 put_disk(mfm_gendisk[i]);
1314 }
1315 blk_cleanup_queue(mfm_queue);
1316 unregister_blkdev(MAJOR_NR, "mfm");
1317 if (mfm_addr)
1318 release_region(mfm_addr, 10);
1319}
1320
1321static int __devinit mfm_probe(struct expansion_card *ec, struct ecard_id *id)
1322{
1323 if (mfm_addr)
1324 return -EBUSY;
1325
1326 mfm_addr = ecard_address(ec, ECARD_IOC, ECARD_MEDIUM) + 0x800;
1327 mfm_IRQPollLoc = ioaddr(mfm_addr + 0x400);
1328 mfm_irqenable = mfm_IRQPollLoc;
1329 mfm_irq = ec->irq;
1330
1331 return mfm_do_init(0x08);
1332}
1333
1334static void __devexit mfm_remove(struct expansion_card *ec)
1335{
1336 outw (0, mfm_irqenable); /* Required to enable IRQs from MFM podule */
1337 mfm_do_exit();
1338}
1339
1340static const struct ecard_id mfm_cids[] = {
1341 { MANU_ACORN, PROD_ACORN_MFM },
1342 { 0xffff, 0xffff },
1343};
1344
1345static struct ecard_driver mfm_driver = {
1346 .probe = mfm_probe,
1347 .remove = __devexit(mfm_remove),
1348 .id_table = mfm_cids,
1349 .drv = {
1350 .name = "mfm",
1351 },
1352};
1353
1354/*
1355 * Look for a MFM controller - first check the motherboard, then the podules
1356 * The podules have an extra interrupt enable that needs to be played with
1357 *
1358 * The HDC is accessed at MEDIUM IOC speeds.
1359 */
1360static int __init mfm_init (void)
1361{
1362 unsigned char irqmask;
1363
1364 if (mfm_probecontroller(ONBOARD_MFM_ADDRESS)) {
1365 mfm_addr = ONBOARD_MFM_ADDRESS;
1366 mfm_IRQPollLoc = IOC_IRQSTATB;
1367 mfm_irqenable = 0;
1368 mfm_irq = IRQ_HARDDISK;
1369 return mfm_do_init(0x08); /* IL3 pin */
1370 } else {
1371 return ecard_register_driver(&mfm_driver);
1372 }
1373}
1374
1375static void __exit mfm_exit(void)
1376{
1377 if (mfm_addr == ONBOARD_MFM_ADDRESS)
1378 mfm_do_exit();
1379 else
1380 ecard_unregister_driver(&mfm_driver);
1381}
1382
1383module_init(mfm_init)
1384module_exit(mfm_exit)
1385MODULE_LICENSE("GPL");
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
index 934d639b3684..f1372de4ce79 100644
--- a/drivers/acpi/Kconfig
+++ b/drivers/acpi/Kconfig
@@ -68,14 +68,6 @@ config ACPI_PROCFS
68 68
69 Say N to delete /proc/acpi/ files that have moved to /sys/ 69 Say N to delete /proc/acpi/ files that have moved to /sys/
70 70
71config ACPI_PROCFS_SLEEP
72 bool "/proc/acpi/sleep (deprecated)"
73 depends on PM_SLEEP && ACPI_PROCFS
74 default n
75 ---help---
76 Create /proc/acpi/sleep
77 Deprecated by /sys/power/state
78
79config ACPI_AC 71config ACPI_AC
80 tristate "AC Adapter" 72 tristate "AC Adapter"
81 depends on X86 73 depends on X86
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index ad070861bb53..a78832ea81fa 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -890,37 +890,46 @@ static void ich_set_dmamode (struct ata_port *ap, struct ata_device *adev)
890} 890}
891 891
892#ifdef CONFIG_PM 892#ifdef CONFIG_PM
893static struct dmi_system_id piix_broken_suspend_dmi_table[] = { 893static int piix_broken_suspend(void)
894 { 894{
895 .ident = "TECRA M5", 895 static struct dmi_system_id sysids[] = {
896 .matches = { 896 {
897 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 897 .ident = "TECRA M5",
898 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M5"), 898 .matches = {
899 }, 899 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
900 }, 900 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M5"),
901 { 901 },
902 .ident = "Satellite U200",
903 .matches = {
904 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
905 DMI_MATCH(DMI_PRODUCT_NAME, "Satellite U200"),
906 }, 902 },
907 }, 903 {
908 { 904 .ident = "Satellite U205",
909 .ident = "Satellite U205", 905 .matches = {
910 .matches = { 906 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
911 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 907 DMI_MATCH(DMI_PRODUCT_NAME, "Satellite U205"),
912 DMI_MATCH(DMI_PRODUCT_NAME, "Satellite U205"), 908 },
913 }, 909 },
914 }, 910 {
915 { 911 .ident = "Portege M500",
916 .ident = "Portege M500", 912 .matches = {
917 .matches = { 913 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
918 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 914 DMI_MATCH(DMI_PRODUCT_NAME, "PORTEGE M500"),
919 DMI_MATCH(DMI_PRODUCT_NAME, "PORTEGE M500"), 915 },
920 }, 916 },
921 }, 917 { }
922 { } 918 };
923}; 919 static const char *oemstrs[] = {
920 "Tecra M3,",
921 };
922 int i;
923
924 if (dmi_check_system(sysids))
925 return 1;
926
927 for (i = 0; i < ARRAY_SIZE(oemstrs); i++)
928 if (dmi_find_device(DMI_DEV_TYPE_OEM_STRING, oemstrs[i], NULL))
929 return 1;
930
931 return 0;
932}
924 933
925static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) 934static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
926{ 935{
@@ -937,8 +946,7 @@ static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
937 * cycles and power trying to do something to the sleeping 946 * cycles and power trying to do something to the sleeping
938 * beauty. 947 * beauty.
939 */ 948 */
940 if (dmi_check_system(piix_broken_suspend_dmi_table) && 949 if (piix_broken_suspend() && mesg.event == PM_EVENT_SUSPEND) {
941 mesg.event == PM_EVENT_SUSPEND) {
942 pci_save_state(pdev); 950 pci_save_state(pdev);
943 951
944 /* mark its power state as "unknown", since we don't 952 /* mark its power state as "unknown", since we don't
@@ -973,10 +981,10 @@ static int piix_pci_device_resume(struct pci_dev *pdev)
973 pci_restore_state(pdev); 981 pci_restore_state(pdev);
974 982
975 /* PCI device wasn't disabled during suspend. Use 983 /* PCI device wasn't disabled during suspend. Use
976 * __pci_reenable_device() to avoid affecting the 984 * pci_reenable_device() to avoid affecting the enable
977 * enable count. 985 * count.
978 */ 986 */
979 rc = __pci_reenable_device(pdev); 987 rc = pci_reenable_device(pdev);
980 if (rc) 988 if (rc)
981 dev_printk(KERN_ERR, &pdev->dev, "failed to enable " 989 dev_printk(KERN_ERR, &pdev->dev, "failed to enable "
982 "device after resume (%d)\n", rc); 990 "device after resume (%d)\n", rc);
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 6001aae0b884..60e78bef469f 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -3788,6 +3788,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
3788 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, 3788 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
3789 { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, }, 3789 { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, },
3790 { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, }, 3790 { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, },
3791 { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, },
3791 3792
3792 /* Devices with NCQ limits */ 3793 /* Devices with NCQ limits */
3793 3794
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index 6c289c7b1322..1cce2198baaf 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -573,6 +573,10 @@ int ata_pci_init_bmdma(struct ata_host *host)
573 struct pci_dev *pdev = to_pci_dev(gdev); 573 struct pci_dev *pdev = to_pci_dev(gdev);
574 int i, rc; 574 int i, rc;
575 575
576 /* No BAR4 allocation: No DMA */
577 if (pci_resource_start(pdev, 4) == 0)
578 return 0;
579
576 /* TODO: If we get no DMA mask we should fall back to PIO */ 580 /* TODO: If we get no DMA mask we should fall back to PIO */
577 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); 581 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
578 if (rc) 582 if (rc)
diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c
index dc443e7dc37c..e34b632487d7 100644
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -31,7 +31,7 @@
31#include <linux/libata.h> 31#include <linux/libata.h>
32 32
33#define DRV_NAME "pata_cmd64x" 33#define DRV_NAME "pata_cmd64x"
34#define DRV_VERSION "0.2.3" 34#define DRV_VERSION "0.2.4"
35 35
36/* 36/*
37 * CMD64x specific registers definition. 37 * CMD64x specific registers definition.
@@ -397,7 +397,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
397 .flags = ATA_FLAG_SLAVE_POSS, 397 .flags = ATA_FLAG_SLAVE_POSS,
398 .pio_mask = 0x1f, 398 .pio_mask = 0x1f,
399 .mwdma_mask = 0x07, 399 .mwdma_mask = 0x07,
400 .udma_mask = ATA_UDMA1, 400 .udma_mask = ATA_UDMA2,
401 .port_ops = &cmd64x_port_ops 401 .port_ops = &cmd64x_port_ops
402 }, 402 },
403 { /* CMD 646 rev 1 */ 403 { /* CMD 646 rev 1 */
@@ -412,7 +412,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
412 .flags = ATA_FLAG_SLAVE_POSS, 412 .flags = ATA_FLAG_SLAVE_POSS,
413 .pio_mask = 0x1f, 413 .pio_mask = 0x1f,
414 .mwdma_mask = 0x07, 414 .mwdma_mask = 0x07,
415 .udma_mask = ATA_UDMA2, 415 .udma_mask = ATA_UDMA4,
416 .port_ops = &cmd648_port_ops 416 .port_ops = &cmd648_port_ops
417 }, 417 },
418 { /* CMD 649 */ 418 { /* CMD 649 */
@@ -420,7 +420,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
420 .flags = ATA_FLAG_SLAVE_POSS, 420 .flags = ATA_FLAG_SLAVE_POSS,
421 .pio_mask = 0x1f, 421 .pio_mask = 0x1f,
422 .mwdma_mask = 0x07, 422 .mwdma_mask = 0x07,
423 .udma_mask = ATA_UDMA3, 423 .udma_mask = ATA_UDMA5,
424 .port_ops = &cmd648_port_ops 424 .port_ops = &cmd648_port_ops
425 } 425 }
426 }; 426 };
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c
index 9a829a7cbc60..66bd0e83ac07 100644
--- a/drivers/ata/pata_sis.c
+++ b/drivers/ata/pata_sis.c
@@ -2,6 +2,7 @@
2 * pata_sis.c - SiS ATA driver 2 * pata_sis.c - SiS ATA driver
3 * 3 *
4 * (C) 2005 Red Hat <alan@redhat.com> 4 * (C) 2005 Red Hat <alan@redhat.com>
5 * (C) 2007 Bartlomiej Zolnierkiewicz
5 * 6 *
6 * Based upon linux/drivers/ide/pci/sis5513.c 7 * Based upon linux/drivers/ide/pci/sis5513.c
7 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> 8 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
@@ -35,7 +36,7 @@
35#include "sis.h" 36#include "sis.h"
36 37
37#define DRV_NAME "pata_sis" 38#define DRV_NAME "pata_sis"
38#define DRV_VERSION "0.5.1" 39#define DRV_VERSION "0.5.2"
39 40
40struct sis_chipset { 41struct sis_chipset {
41 u16 device; /* PCI host ID */ 42 u16 device; /* PCI host ID */
@@ -237,7 +238,7 @@ static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev)
237} 238}
238 239
239/** 240/**
240 * sis_100_set_pioode - Initialize host controller PATA PIO timings 241 * sis_100_set_piomode - Initialize host controller PATA PIO timings
241 * @ap: Port whose timings we are configuring 242 * @ap: Port whose timings we are configuring
242 * @adev: Device we are configuring for. 243 * @adev: Device we are configuring for.
243 * 244 *
@@ -262,7 +263,7 @@ static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev)
262} 263}
263 264
264/** 265/**
265 * sis_133_set_pioode - Initialize host controller PATA PIO timings 266 * sis_133_set_piomode - Initialize host controller PATA PIO timings
266 * @ap: Port whose timings we are configuring 267 * @ap: Port whose timings we are configuring
267 * @adev: Device we are configuring for. 268 * @adev: Device we are configuring for.
268 * 269 *
@@ -334,7 +335,7 @@ static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
334 int drive_pci = sis_old_port_base(adev); 335 int drive_pci = sis_old_port_base(adev);
335 u16 timing; 336 u16 timing;
336 337
337 const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; 338 const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 };
338 const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 }; 339 const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 };
339 340
340 pci_read_config_word(pdev, drive_pci, &timing); 341 pci_read_config_word(pdev, drive_pci, &timing);
@@ -342,15 +343,15 @@ static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
342 if (adev->dma_mode < XFER_UDMA_0) { 343 if (adev->dma_mode < XFER_UDMA_0) {
343 /* bits 3-0 hold recovery timing bits 8-10 active timing and 344 /* bits 3-0 hold recovery timing bits 8-10 active timing and
344 the higer bits are dependant on the device */ 345 the higer bits are dependant on the device */
345 timing &= ~ 0x870F; 346 timing &= ~0x870F;
346 timing |= mwdma_bits[speed]; 347 timing |= mwdma_bits[speed];
347 pci_write_config_word(pdev, drive_pci, timing);
348 } else { 348 } else {
349 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */ 349 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */
350 speed = adev->dma_mode - XFER_UDMA_0; 350 speed = adev->dma_mode - XFER_UDMA_0;
351 timing &= ~0x6000; 351 timing &= ~0x6000;
352 timing |= udma_bits[speed]; 352 timing |= udma_bits[speed];
353 } 353 }
354 pci_write_config_word(pdev, drive_pci, timing);
354} 355}
355 356
356/** 357/**
@@ -373,7 +374,7 @@ static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev)
373 int drive_pci = sis_old_port_base(adev); 374 int drive_pci = sis_old_port_base(adev);
374 u16 timing; 375 u16 timing;
375 376
376 const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; 377 const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 };
377 const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000}; 378 const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000};
378 379
379 pci_read_config_word(pdev, drive_pci, &timing); 380 pci_read_config_word(pdev, drive_pci, &timing);
@@ -432,8 +433,7 @@ static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev)
432 * @adev: Device to program 433 * @adev: Device to program
433 * 434 *
434 * Set UDMA/MWDMA mode for device, in host controller PCI config space. 435 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
435 * Handles early SiS 961 bridges. Supports MWDMA as well unlike 436 * Handles early SiS 961 bridges.
436 * the old ide/pci driver.
437 * 437 *
438 * LOCKING: 438 * LOCKING:
439 * None (inherited from caller). 439 * None (inherited from caller).
@@ -467,8 +467,6 @@ static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *a
467 * @adev: Device to program 467 * @adev: Device to program
468 * 468 *
469 * Set UDMA/MWDMA mode for device, in host controller PCI config space. 469 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
470 * Handles early SiS 961 bridges. Supports MWDMA as well unlike
471 * the old ide/pci driver.
472 * 470 *
473 * LOCKING: 471 * LOCKING:
474 * None (inherited from caller). 472 * None (inherited from caller).
diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c
index fe7ef3394144..40545071e3c9 100644
--- a/drivers/base/cpu.c
+++ b/drivers/base/cpu.c
@@ -53,7 +53,7 @@ static ssize_t store_online(struct sys_device *dev, const char *buf,
53 ret = count; 53 ret = count;
54 return ret; 54 return ret;
55} 55}
56static SYSDEV_ATTR(online, 0600, show_online, store_online); 56static SYSDEV_ATTR(online, 0644, show_online, store_online);
57 57
58static void __devinit register_cpu_control(struct cpu *cpu) 58static void __devinit register_cpu_control(struct cpu *cpu)
59{ 59{
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index 1be82d544dc3..a11b2bd54bbe 100644
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -3227,12 +3227,15 @@ static int alloc_cciss_hba(void)
3227 for (i = 0; i < MAX_CTLR; i++) { 3227 for (i = 0; i < MAX_CTLR; i++) {
3228 if (!hba[i]) { 3228 if (!hba[i]) {
3229 ctlr_info_t *p; 3229 ctlr_info_t *p;
3230
3230 p = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL); 3231 p = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
3231 if (!p) 3232 if (!p)
3232 goto Enomem; 3233 goto Enomem;
3233 p->gendisk[0] = alloc_disk(1 << NWD_SHIFT); 3234 p->gendisk[0] = alloc_disk(1 << NWD_SHIFT);
3234 if (!p->gendisk[0]) 3235 if (!p->gendisk[0]) {
3236 kfree(p);
3235 goto Enomem; 3237 goto Enomem;
3238 }
3236 hba[i] = p; 3239 hba[i] = p;
3237 return i; 3240 return i;
3238 } 3241 }
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index 23b26b87cc32..d68ddbe70f73 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -97,7 +97,6 @@ obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o
97obj-$(CONFIG_GPIO_TB0219) += tb0219.o 97obj-$(CONFIG_GPIO_TB0219) += tb0219.o
98obj-$(CONFIG_TELCLOCK) += tlclk.o 98obj-$(CONFIG_TELCLOCK) += tlclk.o
99 99
100obj-$(CONFIG_WATCHDOG) += watchdog/
101obj-$(CONFIG_MWAVE) += mwave/ 100obj-$(CONFIG_MWAVE) += mwave/
102obj-$(CONFIG_AGP) += agp/ 101obj-$(CONFIG_AGP) += agp/
103obj-$(CONFIG_DRM) += drm/ 102obj-$(CONFIG_DRM) += drm/
diff --git a/drivers/char/drm/i915_dma.c b/drivers/char/drm/i915_dma.c
index 3359cc2b9736..8e7d713a5a15 100644
--- a/drivers/char/drm/i915_dma.c
+++ b/drivers/char/drm/i915_dma.c
@@ -184,6 +184,8 @@ static int i915_initialize(struct drm_device * dev,
184 * private backbuffer/depthbuffer usage. 184 * private backbuffer/depthbuffer usage.
185 */ 185 */
186 dev_priv->use_mi_batchbuffer_start = 0; 186 dev_priv->use_mi_batchbuffer_start = 0;
187 if (IS_I965G(dev)) /* 965 doesn't support older method */
188 dev_priv->use_mi_batchbuffer_start = 1;
187 189
188 /* Allow hardware batchbuffers unless told otherwise. 190 /* Allow hardware batchbuffers unless told otherwise.
189 */ 191 */
@@ -517,8 +519,13 @@ static int i915_dispatch_batchbuffer(struct drm_device * dev,
517 519
518 if (dev_priv->use_mi_batchbuffer_start) { 520 if (dev_priv->use_mi_batchbuffer_start) {
519 BEGIN_LP_RING(2); 521 BEGIN_LP_RING(2);
520 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6)); 522 if (IS_I965G(dev)) {
521 OUT_RING(batch->start | MI_BATCH_NON_SECURE); 523 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
524 OUT_RING(batch->start);
525 } else {
526 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
527 OUT_RING(batch->start | MI_BATCH_NON_SECURE);
528 }
522 ADVANCE_LP_RING(); 529 ADVANCE_LP_RING();
523 } else { 530 } else {
524 BEGIN_LP_RING(4); 531 BEGIN_LP_RING(4);
@@ -735,7 +742,8 @@ static int i915_setparam(DRM_IOCTL_ARGS)
735 742
736 switch (param.param) { 743 switch (param.param) {
737 case I915_SETPARAM_USE_MI_BATCHBUFFER_START: 744 case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
738 dev_priv->use_mi_batchbuffer_start = param.value; 745 if (!IS_I965G(dev))
746 dev_priv->use_mi_batchbuffer_start = param.value;
739 break; 747 break;
740 case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY: 748 case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
741 dev_priv->tex_lru_log_granularity = param.value; 749 dev_priv->tex_lru_log_granularity = param.value;
diff --git a/drivers/char/drm/i915_drv.h b/drivers/char/drm/i915_drv.h
index fd918565f4e5..737088bd0780 100644
--- a/drivers/char/drm/i915_drv.h
+++ b/drivers/char/drm/i915_drv.h
@@ -282,6 +282,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
282#define MI_BATCH_BUFFER_START (0x31<<23) 282#define MI_BATCH_BUFFER_START (0x31<<23)
283#define MI_BATCH_BUFFER_END (0xA<<23) 283#define MI_BATCH_BUFFER_END (0xA<<23)
284#define MI_BATCH_NON_SECURE (1) 284#define MI_BATCH_NON_SECURE (1)
285#define MI_BATCH_NON_SECURE_I965 (1<<8)
285 286
286#define MI_WAIT_FOR_EVENT ((0x3<<23)) 287#define MI_WAIT_FOR_EVENT ((0x3<<23))
287#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2) 288#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2)
diff --git a/drivers/char/ip2/ip2main.c b/drivers/char/ip2/ip2main.c
index 6005b5225772..8d74b8745e60 100644
--- a/drivers/char/ip2/ip2main.c
+++ b/drivers/char/ip2/ip2main.c
@@ -500,7 +500,6 @@ ip2_loadmain(int *iop, int *irqp, unsigned char *firmware, int firmsize)
500{ 500{
501 int i, j, box; 501 int i, j, box;
502 int err = 0; 502 int err = 0;
503 int status = 0;
504 static int loaded; 503 static int loaded;
505 i2eBordStrPtr pB = NULL; 504 i2eBordStrPtr pB = NULL;
506 int rc = -1; 505 int rc = -1;
@@ -588,6 +587,8 @@ ip2_loadmain(int *iop, int *irqp, unsigned char *firmware, int firmsize)
588 case PCI: 587 case PCI:
589#ifdef CONFIG_PCI 588#ifdef CONFIG_PCI
590 { 589 {
590 int status;
591
591 pci_dev_i = pci_get_device(PCI_VENDOR_ID_COMPUTONE, 592 pci_dev_i = pci_get_device(PCI_VENDOR_ID_COMPUTONE,
592 PCI_DEVICE_ID_COMPUTONE_IP2EX, pci_dev_i); 593 PCI_DEVICE_ID_COMPUTONE_IP2EX, pci_dev_i);
593 if (pci_dev_i != NULL) { 594 if (pci_dev_i != NULL) {
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
index 4edfdda0cf99..96d2f9ee42d6 100644
--- a/drivers/char/ipmi/ipmi_si_intf.c
+++ b/drivers/char/ipmi/ipmi_si_intf.c
@@ -2050,6 +2050,7 @@ static __devinit void try_init_dmi(struct dmi_ipmi_data *ipmi_data)
2050 info->si_type = SI_BT; 2050 info->si_type = SI_BT;
2051 break; 2051 break;
2052 default: 2052 default:
2053 kfree(info);
2053 return; 2054 return;
2054 } 2055 }
2055 2056
diff --git a/drivers/char/synclink_gt.c b/drivers/char/synclink_gt.c
index 372a37e25620..bbb7f1292665 100644
--- a/drivers/char/synclink_gt.c
+++ b/drivers/char/synclink_gt.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * $Id: synclink_gt.c,v 4.36 2006/08/28 20:47:14 paulkf Exp $ 2 * $Id: synclink_gt.c,v 4.50 2007/07/25 19:29:25 paulkf Exp $
3 * 3 *
4 * Device driver for Microgate SyncLink GT serial adapters. 4 * Device driver for Microgate SyncLink GT serial adapters.
5 * 5 *
@@ -93,7 +93,7 @@
93 * module identification 93 * module identification
94 */ 94 */
95static char *driver_name = "SyncLink GT"; 95static char *driver_name = "SyncLink GT";
96static char *driver_version = "$Revision: 4.36 $"; 96static char *driver_version = "$Revision: 4.50 $";
97static char *tty_driver_name = "synclink_gt"; 97static char *tty_driver_name = "synclink_gt";
98static char *tty_dev_prefix = "ttySLG"; 98static char *tty_dev_prefix = "ttySLG";
99MODULE_LICENSE("GPL"); 99MODULE_LICENSE("GPL");
@@ -477,6 +477,7 @@ static void tx_set_idle(struct slgt_info *info);
477static unsigned int free_tbuf_count(struct slgt_info *info); 477static unsigned int free_tbuf_count(struct slgt_info *info);
478static void reset_tbufs(struct slgt_info *info); 478static void reset_tbufs(struct slgt_info *info);
479static void tdma_reset(struct slgt_info *info); 479static void tdma_reset(struct slgt_info *info);
480static void tdma_start(struct slgt_info *info);
480static void tx_load(struct slgt_info *info, const char *buf, unsigned int count); 481static void tx_load(struct slgt_info *info, const char *buf, unsigned int count);
481 482
482static void get_signals(struct slgt_info *info); 483static void get_signals(struct slgt_info *info);
@@ -904,6 +905,8 @@ start:
904 spin_lock_irqsave(&info->lock,flags); 905 spin_lock_irqsave(&info->lock,flags);
905 if (!info->tx_active) 906 if (!info->tx_active)
906 tx_start(info); 907 tx_start(info);
908 else
909 tdma_start(info);
907 spin_unlock_irqrestore(&info->lock,flags); 910 spin_unlock_irqrestore(&info->lock,flags);
908 } 911 }
909 912
@@ -3871,44 +3874,58 @@ static void tx_start(struct slgt_info *info)
3871 slgt_irq_on(info, IRQ_TXUNDER + IRQ_TXIDLE); 3874 slgt_irq_on(info, IRQ_TXUNDER + IRQ_TXIDLE);
3872 /* clear tx idle and underrun status bits */ 3875 /* clear tx idle and underrun status bits */
3873 wr_reg16(info, SSR, (unsigned short)(IRQ_TXIDLE + IRQ_TXUNDER)); 3876 wr_reg16(info, SSR, (unsigned short)(IRQ_TXIDLE + IRQ_TXUNDER));
3874
3875 if (!(rd_reg32(info, TDCSR) & BIT0)) {
3876 /* tx DMA stopped, restart tx DMA */
3877 tdma_reset(info);
3878 /* set 1st descriptor address */
3879 wr_reg32(info, TDDAR, info->tbufs[info->tbuf_start].pdesc);
3880 switch(info->params.mode) {
3881 case MGSL_MODE_RAW:
3882 case MGSL_MODE_MONOSYNC:
3883 case MGSL_MODE_BISYNC:
3884 wr_reg32(info, TDCSR, BIT2 + BIT0); /* IRQ + DMA enable */
3885 break;
3886 default:
3887 wr_reg32(info, TDCSR, BIT0); /* DMA enable */
3888 }
3889 }
3890
3891 if (info->params.mode == MGSL_MODE_HDLC) 3877 if (info->params.mode == MGSL_MODE_HDLC)
3892 mod_timer(&info->tx_timer, jiffies + 3878 mod_timer(&info->tx_timer, jiffies +
3893 msecs_to_jiffies(5000)); 3879 msecs_to_jiffies(5000));
3894 } else { 3880 } else {
3895 tdma_reset(info);
3896 /* set 1st descriptor address */
3897 wr_reg32(info, TDDAR, info->tbufs[info->tbuf_start].pdesc);
3898
3899 slgt_irq_off(info, IRQ_TXDATA); 3881 slgt_irq_off(info, IRQ_TXDATA);
3900 slgt_irq_on(info, IRQ_TXIDLE); 3882 slgt_irq_on(info, IRQ_TXIDLE);
3901 /* clear tx idle status bit */ 3883 /* clear tx idle status bit */
3902 wr_reg16(info, SSR, IRQ_TXIDLE); 3884 wr_reg16(info, SSR, IRQ_TXIDLE);
3903
3904 /* enable tx DMA */
3905 wr_reg32(info, TDCSR, BIT0);
3906 } 3885 }
3907 3886 tdma_start(info);
3908 info->tx_active = 1; 3887 info->tx_active = 1;
3909 } 3888 }
3910} 3889}
3911 3890
3891/*
3892 * start transmit DMA if inactive and there are unsent buffers
3893 */
3894static void tdma_start(struct slgt_info *info)
3895{
3896 unsigned int i;
3897
3898 if (rd_reg32(info, TDCSR) & BIT0)
3899 return;
3900
3901 /* transmit DMA inactive, check for unsent buffers */
3902 i = info->tbuf_start;
3903 while (!desc_count(info->tbufs[i])) {
3904 if (++i == info->tbuf_count)
3905 i = 0;
3906 if (i == info->tbuf_current)
3907 return;
3908 }
3909 info->tbuf_start = i;
3910
3911 /* there are unsent buffers, start transmit DMA */
3912
3913 /* reset needed if previous error condition */
3914 tdma_reset(info);
3915
3916 /* set 1st descriptor address */
3917 wr_reg32(info, TDDAR, info->tbufs[info->tbuf_start].pdesc);
3918 switch(info->params.mode) {
3919 case MGSL_MODE_RAW:
3920 case MGSL_MODE_MONOSYNC:
3921 case MGSL_MODE_BISYNC:
3922 wr_reg32(info, TDCSR, BIT2 + BIT0); /* IRQ + DMA enable */
3923 break;
3924 default:
3925 wr_reg32(info, TDCSR, BIT0); /* DMA enable */
3926 }
3927}
3928
3912static void tx_stop(struct slgt_info *info) 3929static void tx_stop(struct slgt_info *info)
3913{ 3930{
3914 unsigned short val; 3931 unsigned short val;
@@ -4642,8 +4659,8 @@ static unsigned int free_tbuf_count(struct slgt_info *info)
4642 i=0; 4659 i=0;
4643 } while (i != info->tbuf_current); 4660 } while (i != info->tbuf_current);
4644 4661
4645 /* last buffer with zero count may be in use, assume it is */ 4662 /* if tx DMA active, last zero count buffer is in use */
4646 if (count) 4663 if (count && (rd_reg32(info, TDCSR) & BIT0))
4647 --count; 4664 --count;
4648 4665
4649 return count; 4666 return count;
diff --git a/drivers/char/watchdog/Kconfig b/drivers/char/watchdog/Kconfig
index 16fb23125e96..37bddc1802de 100644
--- a/drivers/char/watchdog/Kconfig
+++ b/drivers/char/watchdog/Kconfig
@@ -55,6 +55,8 @@ config SOFT_WATCHDOG
55 To compile this driver as a module, choose M here: the 55 To compile this driver as a module, choose M here: the
56 module will be called softdog. 56 module will be called softdog.
57 57
58# ALPHA Architecture
59
58# ARM Architecture 60# ARM Architecture
59 61
60config AT91RM9200_WATCHDOG 62config AT91RM9200_WATCHDOG
@@ -189,7 +191,7 @@ config PNX4008_WATCHDOG
189 191
190config IOP_WATCHDOG 192config IOP_WATCHDOG
191 tristate "IOP Watchdog" 193 tristate "IOP Watchdog"
192 depends on WATCHDOG && PLAT_IOP 194 depends on PLAT_IOP
193 select WATCHDOG_NOWAYOUT if (ARCH_IOP32X || ARCH_IOP33X) 195 select WATCHDOG_NOWAYOUT if (ARCH_IOP32X || ARCH_IOP33X)
194 help 196 help
195 Say Y here if to include support for the watchdog timer 197 Say Y here if to include support for the watchdog timer
@@ -203,15 +205,48 @@ config IOP_WATCHDOG
203 operating as an Root Complex and/or Central Resource, the PCI-X 205 operating as an Root Complex and/or Central Resource, the PCI-X
204 and/or PCIe busses will also be reset. THIS IS A VERY BIG HAMMER. 206 and/or PCIe busses will also be reset. THIS IS A VERY BIG HAMMER.
205 207
208config DAVINCI_WATCHDOG
209 tristate "DaVinci watchdog"
210 depends on ARCH_DAVINCI
211 help
212 Say Y here if to include support for the watchdog timer
213 in the DaVinci DM644x/DM646x processors.
214 To compile this driver as a module, choose M here: the
215 module will be called davinci_wdt.
216
217 NOTE: once enabled, this timer cannot be disabled.
218 Say N if you are unsure.
219
220# ARM26 Architecture
221
206# AVR32 Architecture 222# AVR32 Architecture
207 223
208config AT32AP700X_WDT 224config AT32AP700X_WDT
209 tristate "AT32AP700x watchdog" 225 tristate "AT32AP700x watchdog"
210 depends on WATCHDOG && CPU_AT32AP7000 226 depends on CPU_AT32AP7000
211 help 227 help
212 Watchdog timer embedded into AT32AP700x devices. This will reboot 228 Watchdog timer embedded into AT32AP700x devices. This will reboot
213 your system when the timeout is reached. 229 your system when the timeout is reached.
214 230
231# BLACKFIN Architecture
232
233config BFIN_WDT
234 tristate "Blackfin On-Chip Watchdog Timer"
235 depends on BLACKFIN
236 ---help---
237 If you say yes here you will get support for the Blackfin On-Chip
238 Watchdog Timer. If you have one of these processors and wish to
239 have watchdog support enabled, say Y, otherwise say N.
240
241 To compile this driver as a module, choose M here: the
242 module will be called bfin_wdt.
243
244# CRIS Architecture
245
246# FRV Architecture
247
248# H8300 Architecture
249
215# X86 (i386 + ia64 + x86_64) Architecture 250# X86 (i386 + ia64 + x86_64) Architecture
216 251
217config ACQUIRE_WDT 252config ACQUIRE_WDT
@@ -540,37 +575,11 @@ config SBC_EPX_C3_WATCHDOG
540 To compile this driver as a module, choose M here: the 575 To compile this driver as a module, choose M here: the
541 module will be called sbc_epx_c3. 576 module will be called sbc_epx_c3.
542 577
543# PowerPC Architecture 578# M32R Architecture
544 579
545config 8xx_WDT 580# M68K Architecture
546 tristate "MPC8xx Watchdog Timer"
547 depends on 8xx
548 581
549config 83xx_WDT 582# M68KNOMMU Architecture
550 tristate "MPC83xx Watchdog Timer"
551 depends on PPC_83xx
552
553config MV64X60_WDT
554 tristate "MV64X60 (Marvell Discovery) Watchdog Timer"
555 depends on MV64X60
556
557config BOOKE_WDT
558 bool "PowerPC Book-E Watchdog Timer"
559 depends on BOOKE || 4xx
560 ---help---
561 Please see Documentation/watchdog/watchdog-api.txt for
562 more information.
563
564# PPC64 Architecture
565
566config WATCHDOG_RTAS
567 tristate "RTAS watchdog"
568 depends on PPC_RTAS
569 help
570 This driver adds watchdog support for the RTAS watchdog.
571
572 To compile this driver as a module, choose M here. The module
573 will be called wdrtas.
574 583
575# MIPS Architecture 584# MIPS Architecture
576 585
@@ -600,6 +609,44 @@ config WDT_RM9K_GPI
600 To compile this driver as a module, choose M here: the 609 To compile this driver as a module, choose M here: the
601 module will be called rm9k_wdt. 610 module will be called rm9k_wdt.
602 611
612# PARISC Architecture
613
614# POWERPC Architecture
615
616config MPC5200_WDT
617 tristate "MPC5200 Watchdog Timer"
618 depends on PPC_MPC52xx
619
620config 8xx_WDT
621 tristate "MPC8xx Watchdog Timer"
622 depends on 8xx
623
624config 83xx_WDT
625 tristate "MPC83xx Watchdog Timer"
626 depends on PPC_83xx
627
628config MV64X60_WDT
629 tristate "MV64X60 (Marvell Discovery) Watchdog Timer"
630 depends on MV64X60
631
632config BOOKE_WDT
633 bool "PowerPC Book-E Watchdog Timer"
634 depends on BOOKE || 4xx
635 ---help---
636 Please see Documentation/watchdog/watchdog-api.txt for
637 more information.
638
639# PPC64 Architecture
640
641config WATCHDOG_RTAS
642 tristate "RTAS watchdog"
643 depends on PPC_RTAS
644 help
645 This driver adds watchdog support for the RTAS watchdog.
646
647 To compile this driver as a module, choose M here. The module
648 will be called wdrtas.
649
603# S390 Architecture 650# S390 Architecture
604 651
605config ZVM_WATCHDOG 652config ZVM_WATCHDOG
@@ -614,7 +661,7 @@ config ZVM_WATCHDOG
614 To compile this driver as a module, choose M here. The module 661 To compile this driver as a module, choose M here. The module
615 will be called vmwatchdog. 662 will be called vmwatchdog.
616 663
617# SUPERH Architecture 664# SUPERH (sh + sh64) Architecture
618 665
619config SH_WDT 666config SH_WDT
620 tristate "SuperH Watchdog" 667 tristate "SuperH Watchdog"
@@ -641,6 +688,8 @@ config SH_WDT_MMAP
641 If you say Y here, user applications will be able to mmap the 688 If you say Y here, user applications will be able to mmap the
642 WDT/CPG registers. 689 WDT/CPG registers.
643 690
691# SPARC Architecture
692
644# SPARC64 Architecture 693# SPARC64 Architecture
645 694
646config WATCHDOG_CP1XXX 695config WATCHDOG_CP1XXX
@@ -665,6 +714,10 @@ config WATCHDOG_RIO
665 machines. The watchdog timeout period is normally one minute but 714 machines. The watchdog timeout period is normally one minute but
666 can be changed with a boot-time parameter. 715 can be changed with a boot-time parameter.
667 716
717# V850 Architecture
718
719# XTENSA Architecture
720
668# 721#
669# ISA-based Watchdog Cards 722# ISA-based Watchdog Cards
670# 723#
diff --git a/drivers/char/watchdog/Makefile b/drivers/char/watchdog/Makefile
index bdb9d5e3bb41..389f8b14ccc4 100644
--- a/drivers/char/watchdog/Makefile
+++ b/drivers/char/watchdog/Makefile
@@ -22,6 +22,8 @@ obj-$(CONFIG_WDTPCI) += wdt_pci.o
22# USB-based Watchdog Cards 22# USB-based Watchdog Cards
23obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o 23obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o
24 24
25# ALPHA Architecture
26
25# ARM Architecture 27# ARM Architecture
26obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o 28obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o
27obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o 29obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
@@ -36,10 +38,22 @@ obj-$(CONFIG_MPCORE_WATCHDOG) += mpcore_wdt.o
36obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o 38obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o
37obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o 39obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o
38obj-$(CONFIG_IOP_WATCHDOG) += iop_wdt.o 40obj-$(CONFIG_IOP_WATCHDOG) += iop_wdt.o
41obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o
42
43# ARM26 Architecture
39 44
40# AVR32 Architecture 45# AVR32 Architecture
41obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o 46obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
42 47
48# BLACKFIN Architecture
49obj-$(CONFIG_BFIN_WDT) += bfin_wdt.o
50
51# CRIS Architecture
52
53# FRV Architecture
54
55# H8300 Architecture
56
43# X86 (i386 + ia64 + x86_64) Architecture 57# X86 (i386 + ia64 + x86_64) Architecture
44obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o 58obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o
45obj-$(CONFIG_ADVANTECH_WDT) += advantechwdt.o 59obj-$(CONFIG_ADVANTECH_WDT) += advantechwdt.o
@@ -66,8 +80,22 @@ obj-$(CONFIG_W83977F_WDT) += w83977f_wdt.o
66obj-$(CONFIG_MACHZ_WDT) += machzwd.o 80obj-$(CONFIG_MACHZ_WDT) += machzwd.o
67obj-$(CONFIG_SBC_EPX_C3_WATCHDOG) += sbc_epx_c3.o 81obj-$(CONFIG_SBC_EPX_C3_WATCHDOG) += sbc_epx_c3.o
68 82
69# PowerPC Architecture 83# M32R Architecture
84
85# M68K Architecture
86
87# M68KNOMMU Architecture
88
89# MIPS Architecture
90obj-$(CONFIG_INDYDOG) += indydog.o
91obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
92obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
93
94# PARISC Architecture
95
96# POWERPC Architecture
70obj-$(CONFIG_8xx_WDT) += mpc8xx_wdt.o 97obj-$(CONFIG_8xx_WDT) += mpc8xx_wdt.o
98obj-$(CONFIG_MPC5200_WDT) += mpc5200_wdt.o
71obj-$(CONFIG_83xx_WDT) += mpc83xx_wdt.o 99obj-$(CONFIG_83xx_WDT) += mpc83xx_wdt.o
72obj-$(CONFIG_MV64X60_WDT) += mv64x60_wdt.o 100obj-$(CONFIG_MV64X60_WDT) += mv64x60_wdt.o
73obj-$(CONFIG_BOOKE_WDT) += booke_wdt.o 101obj-$(CONFIG_BOOKE_WDT) += booke_wdt.o
@@ -75,17 +103,18 @@ obj-$(CONFIG_BOOKE_WDT) += booke_wdt.o
75# PPC64 Architecture 103# PPC64 Architecture
76obj-$(CONFIG_WATCHDOG_RTAS) += wdrtas.o 104obj-$(CONFIG_WATCHDOG_RTAS) += wdrtas.o
77 105
78# MIPS Architecture
79obj-$(CONFIG_INDYDOG) += indydog.o
80obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
81obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
82
83# S390 Architecture 106# S390 Architecture
84 107
85# SUPERH Architecture 108# SUPERH (sh + sh64) Architecture
86obj-$(CONFIG_SH_WDT) += shwdt.o 109obj-$(CONFIG_SH_WDT) += shwdt.o
87 110
111# SPARC Architecture
112
88# SPARC64 Architecture 113# SPARC64 Architecture
89 114
115# V850 Architecture
116
117# XTENSA Architecture
118
90# Architecture Independant 119# Architecture Independant
91obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o 120obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o
diff --git a/drivers/char/watchdog/bfin_wdt.c b/drivers/char/watchdog/bfin_wdt.c
new file mode 100644
index 000000000000..309d27913fc1
--- /dev/null
+++ b/drivers/char/watchdog/bfin_wdt.c
@@ -0,0 +1,490 @@
1/*
2 * Blackfin On-Chip Watchdog Driver
3 * Supports BF53[123]/BF53[467]/BF54[2489]/BF561
4 *
5 * Originally based on softdog.c
6 * Copyright 2006-2007 Analog Devices Inc.
7 * Copyright 2006-2007 Michele d'Amico
8 * Copyright 1996 Alan Cox <alan@redhat.com>
9 *
10 * Enter bugs at http://blackfin.uclinux.org/
11 *
12 * Licensed under the GPL-2 or later.
13 */
14
15#include <linux/platform_device.h>
16#include <linux/module.h>
17#include <linux/moduleparam.h>
18#include <linux/types.h>
19#include <linux/timer.h>
20#include <linux/miscdevice.h>
21#include <linux/watchdog.h>
22#include <linux/fs.h>
23#include <linux/notifier.h>
24#include <linux/reboot.h>
25#include <linux/init.h>
26#include <linux/interrupt.h>
27#include <asm/blackfin.h>
28#include <asm/uaccess.h>
29
30#define stamp(fmt, args...) pr_debug("%s:%i: " fmt "\n", __func__, __LINE__, ## args)
31#define stampit() stamp("here i am")
32
33#define WATCHDOG_NAME "bfin-wdt"
34#define PFX WATCHDOG_NAME ": "
35
36/* The BF561 has two watchdogs (one per core), but since Linux
37 * only runs on core A, we'll just work with that one.
38 */
39#ifdef BF561_FAMILY
40# define bfin_read_WDOG_CTL() bfin_read_WDOGA_CTL()
41# define bfin_read_WDOG_CNT() bfin_read_WDOGA_CNT()
42# define bfin_read_WDOG_STAT() bfin_read_WDOGA_STAT()
43# define bfin_write_WDOG_CTL(x) bfin_write_WDOGA_CTL(x)
44# define bfin_write_WDOG_CNT(x) bfin_write_WDOGA_CNT(x)
45# define bfin_write_WDOG_STAT(x) bfin_write_WDOGA_STAT(x)
46#endif
47
48/* Bit in SWRST that indicates boot caused by watchdog */
49#define SWRST_RESET_WDOG 0x4000
50
51/* Bit in WDOG_CTL that indicates watchdog has expired (WDR0) */
52#define WDOG_EXPIRED 0x8000
53
54/* Masks for WDEV field in WDOG_CTL register */
55#define ICTL_RESET 0x0
56#define ICTL_NMI 0x2
57#define ICTL_GPI 0x4
58#define ICTL_NONE 0x6
59#define ICTL_MASK 0x6
60
61/* Masks for WDEN field in WDOG_CTL register */
62#define WDEN_MASK 0x0FF0
63#define WDEN_ENABLE 0x0000
64#define WDEN_DISABLE 0x0AD0
65
66/* some defaults */
67#define WATCHDOG_TIMEOUT 20
68
69static unsigned int timeout = WATCHDOG_TIMEOUT;
70static int nowayout = WATCHDOG_NOWAYOUT;
71static struct watchdog_info bfin_wdt_info;
72static unsigned long open_check;
73static char expect_close;
74static spinlock_t bfin_wdt_spinlock = SPIN_LOCK_UNLOCKED;
75
76/**
77 * bfin_wdt_keepalive - Keep the Userspace Watchdog Alive
78 *
79 * The Userspace watchdog got a KeepAlive: schedule the next timeout.
80 */
81static int bfin_wdt_keepalive(void)
82{
83 stampit();
84 bfin_write_WDOG_STAT(0);
85 return 0;
86}
87
88/**
89 * bfin_wdt_stop - Stop the Watchdog
90 *
91 * Stops the on-chip watchdog.
92 */
93static int bfin_wdt_stop(void)
94{
95 stampit();
96 bfin_write_WDOG_CTL(WDEN_DISABLE);
97 return 0;
98}
99
100/**
101 * bfin_wdt_start - Start the Watchdog
102 *
103 * Starts the on-chip watchdog. Automatically loads WDOG_CNT
104 * into WDOG_STAT for us.
105 */
106static int bfin_wdt_start(void)
107{
108 stampit();
109 bfin_write_WDOG_CTL(WDEN_ENABLE | ICTL_RESET);
110 return 0;
111}
112
113/**
114 * bfin_wdt_running - Check Watchdog status
115 *
116 * See if the watchdog is running.
117 */
118static int bfin_wdt_running(void)
119{
120 stampit();
121 return ((bfin_read_WDOG_CTL() & WDEN_MASK) != WDEN_DISABLE);
122}
123
124/**
125 * bfin_wdt_set_timeout - Set the Userspace Watchdog timeout
126 * @t: new timeout value (in seconds)
127 *
128 * Translate the specified timeout in seconds into System Clock
129 * terms which is what the on-chip Watchdog requires.
130 */
131static int bfin_wdt_set_timeout(unsigned long t)
132{
133 u32 cnt;
134 unsigned long flags;
135
136 stampit();
137
138 cnt = t * get_sclk();
139 if (cnt < get_sclk()) {
140 printk(KERN_WARNING PFX "timeout value is too large\n");
141 return -EINVAL;
142 }
143
144 spin_lock_irqsave(&bfin_wdt_spinlock, flags);
145 {
146 int run = bfin_wdt_running();
147 bfin_wdt_stop();
148 bfin_write_WDOG_CNT(cnt);
149 if (run) bfin_wdt_start();
150 }
151 spin_unlock_irqrestore(&bfin_wdt_spinlock, flags);
152
153 timeout = t;
154
155 return 0;
156}
157
158/**
159 * bfin_wdt_open - Open the Device
160 * @inode: inode of device
161 * @file: file handle of device
162 *
163 * Watchdog device is opened and started.
164 */
165static int bfin_wdt_open(struct inode *inode, struct file *file)
166{
167 stampit();
168
169 if (test_and_set_bit(0, &open_check))
170 return -EBUSY;
171
172 if (nowayout)
173 __module_get(THIS_MODULE);
174
175 bfin_wdt_keepalive();
176 bfin_wdt_start();
177
178 return nonseekable_open(inode, file);
179}
180
181/**
182 * bfin_wdt_close - Close the Device
183 * @inode: inode of device
184 * @file: file handle of device
185 *
186 * Watchdog device is closed and stopped.
187 */
188static int bfin_wdt_release(struct inode *inode, struct file *file)
189{
190 stampit();
191
192 if (expect_close == 42) {
193 bfin_wdt_stop();
194 } else {
195 printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
196 bfin_wdt_keepalive();
197 }
198
199 expect_close = 0;
200 clear_bit(0, &open_check);
201
202 return 0;
203}
204
205/**
206 * bfin_wdt_write - Write to Device
207 * @file: file handle of device
208 * @buf: buffer to write
209 * @count: length of buffer
210 * @ppos: offset
211 *
212 * Pings the watchdog on write.
213 */
214static ssize_t bfin_wdt_write(struct file *file, const char __user *data,
215 size_t len, loff_t *ppos)
216{
217 stampit();
218
219 if (len) {
220 if (!nowayout) {
221 size_t i;
222
223 /* In case it was set long ago */
224 expect_close = 0;
225
226 for (i = 0; i != len; i++) {
227 char c;
228 if (get_user(c, data + i))
229 return -EFAULT;
230 if (c == 'V')
231 expect_close = 42;
232 }
233 }
234 bfin_wdt_keepalive();
235 }
236
237 return len;
238}
239
240/**
241 * bfin_wdt_ioctl - Query Device
242 * @inode: inode of device
243 * @file: file handle of device
244 * @cmd: watchdog command
245 * @arg: argument
246 *
247 * Query basic information from the device or ping it, as outlined by the
248 * watchdog API.
249 */
250static int bfin_wdt_ioctl(struct inode *inode, struct file *file,
251 unsigned int cmd, unsigned long arg)
252{
253 void __user *argp = (void __user *)arg;
254 int __user *p = argp;
255
256 stampit();
257
258 switch (cmd) {
259 default:
260 return -ENOTTY;
261
262 case WDIOC_GETSUPPORT:
263 if (copy_to_user(argp, &bfin_wdt_info, sizeof(bfin_wdt_info)))
264 return -EFAULT;
265 else
266 return 0;
267
268 case WDIOC_GETSTATUS:
269 case WDIOC_GETBOOTSTATUS:
270 return put_user(!!(_bfin_swrst & SWRST_RESET_WDOG), p);
271
272 case WDIOC_KEEPALIVE:
273 bfin_wdt_keepalive();
274 return 0;
275
276 case WDIOC_SETTIMEOUT: {
277 int new_timeout;
278
279 if (get_user(new_timeout, p))
280 return -EFAULT;
281
282 if (bfin_wdt_set_timeout(new_timeout))
283 return -EINVAL;
284 }
285 /* Fall */
286 case WDIOC_GETTIMEOUT:
287 return put_user(timeout, p);
288
289 case WDIOC_SETOPTIONS: {
290 unsigned long flags;
291 int options, ret = -EINVAL;
292
293 if (get_user(options, p))
294 return -EFAULT;
295
296 spin_lock_irqsave(&bfin_wdt_spinlock, flags);
297
298 if (options & WDIOS_DISABLECARD) {
299 bfin_wdt_stop();
300 ret = 0;
301 }
302
303 if (options & WDIOS_ENABLECARD) {
304 bfin_wdt_start();
305 ret = 0;
306 }
307
308 spin_unlock_irqrestore(&bfin_wdt_spinlock, flags);
309
310 return ret;
311 }
312 }
313}
314
315/**
316 * bfin_wdt_notify_sys - Notifier Handler
317 * @this: notifier block
318 * @code: notifier event
319 * @unused: unused
320 *
321 * Handles specific events, such as turning off the watchdog during a
322 * shutdown event.
323 */
324static int bfin_wdt_notify_sys(struct notifier_block *this, unsigned long code,
325 void *unused)
326{
327 stampit();
328
329 if (code == SYS_DOWN || code == SYS_HALT)
330 bfin_wdt_stop();
331
332 return NOTIFY_DONE;
333}
334
335#ifdef CONFIG_PM
336static int state_before_suspend;
337
338/**
339 * bfin_wdt_suspend - suspend the watchdog
340 * @pdev: device being suspended
341 * @state: requested suspend state
342 *
343 * Remember if the watchdog was running and stop it.
344 * TODO: is this even right? Doesn't seem to be any
345 * standard in the watchdog world ...
346 */
347static int bfin_wdt_suspend(struct platform_device *pdev, pm_message_t state)
348{
349 stampit();
350
351 state_before_suspend = bfin_wdt_running();
352 bfin_wdt_stop();
353
354 return 0;
355}
356
357/**
358 * bfin_wdt_resume - resume the watchdog
359 * @pdev: device being resumed
360 *
361 * If the watchdog was running, turn it back on.
362 */
363static int bfin_wdt_resume(struct platform_device *pdev)
364{
365 stampit();
366
367 if (state_before_suspend) {
368 bfin_wdt_set_timeout(timeout);
369 bfin_wdt_start();
370 }
371
372 return 0;
373}
374#else
375# define bfin_wdt_suspend NULL
376# define bfin_wdt_resume NULL
377#endif
378
379static struct platform_device bfin_wdt_device = {
380 .name = WATCHDOG_NAME,
381 .id = -1,
382};
383
384static struct platform_driver bfin_wdt_driver = {
385 .driver = {
386 .name = WATCHDOG_NAME,
387 .owner = THIS_MODULE,
388 },
389 .suspend = bfin_wdt_suspend,
390 .resume = bfin_wdt_resume,
391};
392
393static struct file_operations bfin_wdt_fops = {
394 .owner = THIS_MODULE,
395 .llseek = no_llseek,
396 .write = bfin_wdt_write,
397 .ioctl = bfin_wdt_ioctl,
398 .open = bfin_wdt_open,
399 .release = bfin_wdt_release,
400};
401
402static struct miscdevice bfin_wdt_miscdev = {
403 .minor = WATCHDOG_MINOR,
404 .name = "watchdog",
405 .fops = &bfin_wdt_fops,
406};
407
408static struct watchdog_info bfin_wdt_info = {
409 .identity = "Blackfin Watchdog",
410 .options = WDIOF_SETTIMEOUT |
411 WDIOF_KEEPALIVEPING |
412 WDIOF_MAGICCLOSE,
413};
414
415static struct notifier_block bfin_wdt_notifier = {
416 .notifier_call = bfin_wdt_notify_sys,
417};
418
419/**
420 * bfin_wdt_init - Initialize module
421 *
422 * Registers the device and notifier handler. Actual device
423 * initialization is handled by bfin_wdt_open().
424 */
425static int __init bfin_wdt_init(void)
426{
427 int ret;
428
429 stampit();
430
431 /* Check that the timeout value is within range */
432 if (bfin_wdt_set_timeout(timeout))
433 return -EINVAL;
434
435 /* Since this is an on-chip device and needs no board-specific
436 * resources, we'll handle all the platform device stuff here.
437 */
438 ret = platform_device_register(&bfin_wdt_device);
439 if (ret)
440 return ret;
441
442 ret = platform_driver_probe(&bfin_wdt_driver, NULL);
443 if (ret)
444 return ret;
445
446 ret = register_reboot_notifier(&bfin_wdt_notifier);
447 if (ret) {
448 printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n", ret);
449 return ret;
450 }
451
452 ret = misc_register(&bfin_wdt_miscdev);
453 if (ret) {
454 printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
455 WATCHDOG_MINOR, ret);
456 unregister_reboot_notifier(&bfin_wdt_notifier);
457 return ret;
458 }
459
460 printk(KERN_INFO PFX "initialized: timeout=%d sec (nowayout=%d)\n",
461 timeout, nowayout);
462
463 return 0;
464}
465
466/**
467 * bfin_wdt_exit - Deinitialize module
468 *
469 * Unregisters the device and notifier handler. Actual device
470 * deinitialization is handled by bfin_wdt_close().
471 */
472static void __exit bfin_wdt_exit(void)
473{
474 misc_deregister(&bfin_wdt_miscdev);
475 unregister_reboot_notifier(&bfin_wdt_notifier);
476}
477
478module_init(bfin_wdt_init);
479module_exit(bfin_wdt_exit);
480
481MODULE_AUTHOR("Michele d'Amico, Mike Frysinger <vapier@gentoo.org>");
482MODULE_DESCRIPTION("Blackfin Watchdog Device Driver");
483MODULE_LICENSE("GPL");
484MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
485
486module_param(timeout, uint, 0);
487MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (1<=timeout<=((2^32)/SCLK), default=" __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
488
489module_param(nowayout, int, 0);
490MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
diff --git a/drivers/char/watchdog/booke_wdt.c b/drivers/char/watchdog/booke_wdt.c
index 0f5c77ddd39d..d362f5bf658a 100644
--- a/drivers/char/watchdog/booke_wdt.c
+++ b/drivers/char/watchdog/booke_wdt.c
@@ -144,7 +144,7 @@ static int booke_wdt_open (struct inode *inode, struct file *file)
144 booke_wdt_period); 144 booke_wdt_period);
145 } 145 }
146 146
147 return 0; 147 return nonseekable_open(inode, file);
148} 148}
149 149
150static const struct file_operations booke_wdt_fops = { 150static const struct file_operations booke_wdt_fops = {
diff --git a/drivers/char/watchdog/cpu5wdt.c b/drivers/char/watchdog/cpu5wdt.c
index d0d45a8b09f0..5941ca601a3a 100644
--- a/drivers/char/watchdog/cpu5wdt.c
+++ b/drivers/char/watchdog/cpu5wdt.c
@@ -162,6 +162,10 @@ static int cpu5wdt_ioctl(struct inode *inode, struct file *file, unsigned int cm
162 if ( copy_to_user(argp, &value, sizeof(int)) ) 162 if ( copy_to_user(argp, &value, sizeof(int)) )
163 return -EFAULT; 163 return -EFAULT;
164 break; 164 break;
165 case WDIOC_GETBOOTSTATUS:
166 if ( copy_to_user(argp, &value, sizeof(int)) )
167 return -EFAULT;
168 break;
165 case WDIOC_GETSUPPORT: 169 case WDIOC_GETSUPPORT:
166 if ( copy_to_user(argp, &ident, sizeof(ident)) ) 170 if ( copy_to_user(argp, &ident, sizeof(ident)) )
167 return -EFAULT; 171 return -EFAULT;
diff --git a/drivers/char/watchdog/davinci_wdt.c b/drivers/char/watchdog/davinci_wdt.c
new file mode 100644
index 000000000000..19db5302ba6e
--- /dev/null
+++ b/drivers/char/watchdog/davinci_wdt.c
@@ -0,0 +1,281 @@
1/*
2 * drivers/char/watchdog/davinci_wdt.c
3 *
4 * Watchdog driver for DaVinci DM644x/DM646x processors
5 *
6 * Copyright (C) 2006 Texas Instruments.
7 *
8 * 2007 (c) MontaVista Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License version 2. This program
10 * is licensed "as is" without any warranty of any kind, whether express
11 * or implied.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/types.h>
17#include <linux/kernel.h>
18#include <linux/fs.h>
19#include <linux/miscdevice.h>
20#include <linux/watchdog.h>
21#include <linux/init.h>
22#include <linux/bitops.h>
23#include <linux/platform_device.h>
24#include <linux/spinlock.h>
25
26#include <asm/hardware.h>
27#include <asm/uaccess.h>
28#include <asm/io.h>
29
30#define MODULE_NAME "DAVINCI-WDT: "
31
32#define DEFAULT_HEARTBEAT 60
33#define MAX_HEARTBEAT 600 /* really the max margin is 264/27MHz*/
34
35/* Timer register set definition */
36#define PID12 (0x0)
37#define EMUMGT (0x4)
38#define TIM12 (0x10)
39#define TIM34 (0x14)
40#define PRD12 (0x18)
41#define PRD34 (0x1C)
42#define TCR (0x20)
43#define TGCR (0x24)
44#define WDTCR (0x28)
45
46/* TCR bit definitions */
47#define ENAMODE12_DISABLED (0 << 6)
48#define ENAMODE12_ONESHOT (1 << 6)
49#define ENAMODE12_PERIODIC (2 << 6)
50
51/* TGCR bit definitions */
52#define TIM12RS_UNRESET (1 << 0)
53#define TIM34RS_UNRESET (1 << 1)
54#define TIMMODE_64BIT_WDOG (2 << 2)
55
56/* WDTCR bit definitions */
57#define WDEN (1 << 14)
58#define WDFLAG (1 << 15)
59#define WDKEY_SEQ0 (0xa5c6 << 16)
60#define WDKEY_SEQ1 (0xda7e << 16)
61
62static int heartbeat = DEFAULT_HEARTBEAT;
63
64static spinlock_t io_lock;
65static unsigned long wdt_status;
66#define WDT_IN_USE 0
67#define WDT_OK_TO_CLOSE 1
68#define WDT_REGION_INITED 2
69#define WDT_DEVICE_INITED 3
70
71static struct resource *wdt_mem;
72static void __iomem *wdt_base;
73
74static void wdt_service(void)
75{
76 spin_lock(&io_lock);
77
78 /* put watchdog in service state */
79 davinci_writel(WDKEY_SEQ0, wdt_base + WDTCR);
80 /* put watchdog in active state */
81 davinci_writel(WDKEY_SEQ1, wdt_base + WDTCR);
82
83 spin_unlock(&io_lock);
84}
85
86static void wdt_enable(void)
87{
88 u32 tgcr;
89 u32 timer_margin;
90
91 spin_lock(&io_lock);
92
93 /* disable, internal clock source */
94 davinci_writel(0, wdt_base + TCR);
95 /* reset timer, set mode to 64-bit watchdog, and unreset */
96 davinci_writel(0, wdt_base + TGCR);
97 tgcr = TIMMODE_64BIT_WDOG | TIM12RS_UNRESET | TIM34RS_UNRESET;
98 davinci_writel(tgcr, wdt_base + TGCR);
99 /* clear counter regs */
100 davinci_writel(0, wdt_base + TIM12);
101 davinci_writel(0, wdt_base + TIM34);
102 /* set timeout period */
103 timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) & 0xffffffff);
104 davinci_writel(timer_margin, wdt_base + PRD12);
105 timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) >> 32);
106 davinci_writel(timer_margin, wdt_base + PRD34);
107 /* enable run continuously */
108 davinci_writel(ENAMODE12_PERIODIC, wdt_base + TCR);
109 /* Once the WDT is in pre-active state write to
110 * TIM12, TIM34, PRD12, PRD34, TCR, TGCR, WDTCR are
111 * write protected (except for the WDKEY field)
112 */
113 /* put watchdog in pre-active state */
114 davinci_writel(WDKEY_SEQ0 | WDEN, wdt_base + WDTCR);
115 /* put watchdog in active state */
116 davinci_writel(WDKEY_SEQ1 | WDEN, wdt_base + WDTCR);
117
118 spin_unlock(&io_lock);
119}
120
121static int davinci_wdt_open(struct inode *inode, struct file *file)
122{
123 if (test_and_set_bit(WDT_IN_USE, &wdt_status))
124 return -EBUSY;
125
126 wdt_enable();
127
128 return nonseekable_open(inode, file);
129}
130
131static ssize_t
132davinci_wdt_write(struct file *file, const char *data, size_t len,
133 loff_t *ppos)
134{
135 if (len)
136 wdt_service();
137
138 return len;
139}
140
141static struct watchdog_info ident = {
142 .options = WDIOF_KEEPALIVEPING,
143 .identity = "DaVinci Watchdog",
144};
145
146static int
147davinci_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
148 unsigned long arg)
149{
150 int ret = -ENOTTY;
151
152 switch (cmd) {
153 case WDIOC_GETSUPPORT:
154 ret = copy_to_user((struct watchdog_info *)arg, &ident,
155 sizeof(ident)) ? -EFAULT : 0;
156 break;
157
158 case WDIOC_GETSTATUS:
159 case WDIOC_GETBOOTSTATUS:
160 ret = put_user(0, (int *)arg);
161 break;
162
163 case WDIOC_GETTIMEOUT:
164 ret = put_user(heartbeat, (int *)arg);
165 break;
166
167 case WDIOC_KEEPALIVE:
168 wdt_service();
169 ret = 0;
170 break;
171 }
172 return ret;
173}
174
175static int davinci_wdt_release(struct inode *inode, struct file *file)
176{
177 wdt_service();
178 clear_bit(WDT_IN_USE, &wdt_status);
179
180 return 0;
181}
182
183static const struct file_operations davinci_wdt_fops = {
184 .owner = THIS_MODULE,
185 .llseek = no_llseek,
186 .write = davinci_wdt_write,
187 .ioctl = davinci_wdt_ioctl,
188 .open = davinci_wdt_open,
189 .release = davinci_wdt_release,
190};
191
192static struct miscdevice davinci_wdt_miscdev = {
193 .minor = WATCHDOG_MINOR,
194 .name = "watchdog",
195 .fops = &davinci_wdt_fops,
196};
197
198static int davinci_wdt_probe(struct platform_device *pdev)
199{
200 int ret = 0, size;
201 struct resource *res;
202
203 spin_lock_init(&io_lock);
204
205 if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
206 heartbeat = DEFAULT_HEARTBEAT;
207
208 printk(KERN_INFO MODULE_NAME
209 "DaVinci Watchdog Timer: heartbeat %d sec\n", heartbeat);
210
211 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
212 if (res == NULL) {
213 printk(KERN_INFO MODULE_NAME
214 "failed to get memory region resource\n");
215 return -ENOENT;
216 }
217
218 size = res->end - res->start + 1;
219 wdt_mem = request_mem_region(res->start, size, pdev->name);
220
221 if (wdt_mem == NULL) {
222 printk(KERN_INFO MODULE_NAME "failed to get memory region\n");
223 return -ENOENT;
224 }
225 wdt_base = (void __iomem *)(res->start);
226
227 ret = misc_register(&davinci_wdt_miscdev);
228 if (ret < 0) {
229 printk(KERN_ERR MODULE_NAME "cannot register misc device\n");
230 release_resource(wdt_mem);
231 kfree(wdt_mem);
232 } else {
233 set_bit(WDT_DEVICE_INITED, &wdt_status);
234 }
235
236 return ret;
237}
238
239static int davinci_wdt_remove(struct platform_device *pdev)
240{
241 misc_deregister(&davinci_wdt_miscdev);
242 if (wdt_mem) {
243 release_resource(wdt_mem);
244 kfree(wdt_mem);
245 wdt_mem = NULL;
246 }
247 return 0;
248}
249
250static struct platform_driver platform_wdt_driver = {
251 .driver = {
252 .name = "watchdog",
253 },
254 .probe = davinci_wdt_probe,
255 .remove = davinci_wdt_remove,
256};
257
258static int __init davinci_wdt_init(void)
259{
260 return platform_driver_register(&platform_wdt_driver);
261}
262
263static void __exit davinci_wdt_exit(void)
264{
265 return platform_driver_unregister(&platform_wdt_driver);
266}
267
268module_init(davinci_wdt_init);
269module_exit(davinci_wdt_exit);
270
271MODULE_AUTHOR("Texas Instruments");
272MODULE_DESCRIPTION("DaVinci Watchdog Driver");
273
274module_param(heartbeat, int, 0);
275MODULE_PARM_DESC(heartbeat,
276 "Watchdog heartbeat period in seconds from 1 to "
277 __MODULE_STRING(MAX_HEARTBEAT) ", default "
278 __MODULE_STRING(DEFAULT_HEARTBEAT));
279
280MODULE_LICENSE("GPL");
281MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
diff --git a/drivers/char/watchdog/iTCO_wdt.c b/drivers/char/watchdog/iTCO_wdt.c
index eac4f9b9f007..cd5a565bc3a0 100644
--- a/drivers/char/watchdog/iTCO_wdt.c
+++ b/drivers/char/watchdog/iTCO_wdt.c
@@ -39,7 +39,12 @@
39 * 82801HR (ICH8R) : document number 313056-002, 313057-004, 39 * 82801HR (ICH8R) : document number 313056-002, 313057-004,
40 * 82801HH (ICH8DH) : document number 313056-002, 313057-004, 40 * 82801HH (ICH8DH) : document number 313056-002, 313057-004,
41 * 82801HO (ICH8DO) : document number 313056-002, 313057-004, 41 * 82801HO (ICH8DO) : document number 313056-002, 313057-004,
42 * 6300ESB (6300ESB) : document number 300641-003 42 * 82801IB (ICH9) : document number 316972-001, 316973-001,
43 * 82801IR (ICH9R) : document number 316972-001, 316973-001,
44 * 82801IH (ICH9DH) : document number 316972-001, 316973-001,
45 * 6300ESB (6300ESB) : document number 300641-003, 300884-010,
46 * 631xESB (631xESB) : document number 313082-001, 313075-005,
47 * 632xESB (632xESB) : document number 313082-001, 313075-005
43 */ 48 */
44 49
45/* 50/*
@@ -48,8 +53,8 @@
48 53
49/* Module and version information */ 54/* Module and version information */
50#define DRV_NAME "iTCO_wdt" 55#define DRV_NAME "iTCO_wdt"
51#define DRV_VERSION "1.01" 56#define DRV_VERSION "1.02"
52#define DRV_RELDATE "21-Jan-2007" 57#define DRV_RELDATE "26-Jul-2007"
53#define PFX DRV_NAME ": " 58#define PFX DRV_NAME ": "
54 59
55/* Includes */ 60/* Includes */
@@ -92,6 +97,10 @@ enum iTCO_chipsets {
92 TCO_ICH8, /* ICH8 & ICH8R */ 97 TCO_ICH8, /* ICH8 & ICH8R */
93 TCO_ICH8DH, /* ICH8DH */ 98 TCO_ICH8DH, /* ICH8DH */
94 TCO_ICH8DO, /* ICH8DO */ 99 TCO_ICH8DO, /* ICH8DO */
100 TCO_ICH9, /* ICH9 */
101 TCO_ICH9R, /* ICH9R */
102 TCO_ICH9DH, /* ICH9DH */
103 TCO_631XESB, /* 631xESB/632xESB */
95}; 104};
96 105
97static struct { 106static struct {
@@ -118,6 +127,10 @@ static struct {
118 {"ICH8 or ICH8R", 2}, 127 {"ICH8 or ICH8R", 2},
119 {"ICH8DH", 2}, 128 {"ICH8DH", 2},
120 {"ICH8DO", 2}, 129 {"ICH8DO", 2},
130 {"ICH9", 2},
131 {"ICH9R", 2},
132 {"ICH9DH", 2},
133 {"631xESB/632xESB", 2},
121 {NULL,0} 134 {NULL,0}
122}; 135};
123 136
@@ -148,6 +161,25 @@ static struct pci_device_id iTCO_wdt_pci_tbl[] = {
148 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH8 }, 161 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH8 },
149 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH8DH }, 162 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH8DH },
150 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH8DO }, 163 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH8DO },
164 { PCI_VENDOR_ID_INTEL, 0x2918, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH9 },
165 { PCI_VENDOR_ID_INTEL, 0x2916, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH9R },
166 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_ICH9DH },
167 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
168 { PCI_VENDOR_ID_INTEL, 0x2671, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
169 { PCI_VENDOR_ID_INTEL, 0x2672, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
170 { PCI_VENDOR_ID_INTEL, 0x2673, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
171 { PCI_VENDOR_ID_INTEL, 0x2674, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
172 { PCI_VENDOR_ID_INTEL, 0x2675, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
173 { PCI_VENDOR_ID_INTEL, 0x2676, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
174 { PCI_VENDOR_ID_INTEL, 0x2677, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
175 { PCI_VENDOR_ID_INTEL, 0x2678, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
176 { PCI_VENDOR_ID_INTEL, 0x2679, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
177 { PCI_VENDOR_ID_INTEL, 0x267a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
178 { PCI_VENDOR_ID_INTEL, 0x267b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
179 { PCI_VENDOR_ID_INTEL, 0x267c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
180 { PCI_VENDOR_ID_INTEL, 0x267d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
181 { PCI_VENDOR_ID_INTEL, 0x267e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
182 { PCI_VENDOR_ID_INTEL, 0x267f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TCO_631XESB },
151 { 0, }, /* End of list */ 183 { 0, }, /* End of list */
152}; 184};
153MODULE_DEVICE_TABLE (pci, iTCO_wdt_pci_tbl); 185MODULE_DEVICE_TABLE (pci, iTCO_wdt_pci_tbl);
diff --git a/drivers/char/watchdog/machzwd.c b/drivers/char/watchdog/machzwd.c
index a0d27160c80e..6d35bb112a5f 100644
--- a/drivers/char/watchdog/machzwd.c
+++ b/drivers/char/watchdog/machzwd.c
@@ -321,6 +321,7 @@ static int zf_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
321 break; 321 break;
322 322
323 case WDIOC_GETSTATUS: 323 case WDIOC_GETSTATUS:
324 case WDIOC_GETBOOTSTATUS:
324 return put_user(0, p); 325 return put_user(0, p);
325 326
326 case WDIOC_KEEPALIVE: 327 case WDIOC_KEEPALIVE:
diff --git a/drivers/char/watchdog/mixcomwd.c b/drivers/char/watchdog/mixcomwd.c
index db2ccb864412..1adf1d56027d 100644
--- a/drivers/char/watchdog/mixcomwd.c
+++ b/drivers/char/watchdog/mixcomwd.c
@@ -215,6 +215,11 @@ static int mixcomwd_ioctl(struct inode *inode, struct file *file,
215 return -EFAULT; 215 return -EFAULT;
216 } 216 }
217 break; 217 break;
218 case WDIOC_GETBOOTSTATUS:
219 if (copy_to_user(p, &status, sizeof(int))) {
220 return -EFAULT;
221 }
222 break;
218 case WDIOC_GETSUPPORT: 223 case WDIOC_GETSUPPORT:
219 if (copy_to_user(argp, &ident, sizeof(ident))) { 224 if (copy_to_user(argp, &ident, sizeof(ident))) {
220 return -EFAULT; 225 return -EFAULT;
diff --git a/drivers/char/watchdog/mpc5200_wdt.c b/drivers/char/watchdog/mpc5200_wdt.c
new file mode 100644
index 000000000000..564143d40610
--- /dev/null
+++ b/drivers/char/watchdog/mpc5200_wdt.c
@@ -0,0 +1,286 @@
1#include <linux/init.h>
2#include <linux/module.h>
3#include <linux/miscdevice.h>
4#include <linux/watchdog.h>
5#include <linux/io.h>
6#include <linux/spinlock.h>
7#include <asm/of_platform.h>
8#include <asm/uaccess.h>
9#include <asm/mpc52xx.h>
10
11
12#define GPT_MODE_WDT (1<<15)
13#define GPT_MODE_CE (1<<12)
14#define GPT_MODE_MS_TIMER (0x4)
15
16
17struct mpc5200_wdt {
18 unsigned count; /* timer ticks before watchdog kicks in */
19 long ipb_freq;
20 struct miscdevice miscdev;
21 struct resource mem;
22 struct mpc52xx_gpt __iomem *regs;
23 spinlock_t io_lock;
24};
25
26/* is_active stores wether or not the /dev/watchdog device is opened */
27static unsigned long is_active;
28
29/* misc devices don't provide a way, to get back to 'dev' or 'miscdev' from
30 * file operations, which sucks. But there can be max 1 watchdog anyway, so...
31 */
32static struct mpc5200_wdt *wdt_global;
33
34
35/* helper to calculate timeout in timer counts */
36static void mpc5200_wdt_set_timeout(struct mpc5200_wdt *wdt, int timeout)
37{
38 /* use biggest prescaler of 64k */
39 wdt->count = (wdt->ipb_freq + 0xffff) / 0x10000 * timeout;
40
41 if (wdt->count > 0xffff)
42 wdt->count = 0xffff;
43}
44/* return timeout in seconds (calculated from timer count) */
45static int mpc5200_wdt_get_timeout(struct mpc5200_wdt *wdt)
46{
47 return wdt->count * 0x10000 / wdt->ipb_freq;
48}
49
50
51/* watchdog operations */
52static int mpc5200_wdt_start(struct mpc5200_wdt *wdt)
53{
54 spin_lock(&wdt->io_lock);
55 /* disable */
56 out_be32(&wdt->regs->mode, 0);
57 /* set timeout, with maximum prescaler */
58 out_be32(&wdt->regs->count, 0x0 | wdt->count);
59 /* enable watchdog */
60 out_be32(&wdt->regs->mode, GPT_MODE_CE | GPT_MODE_WDT | GPT_MODE_MS_TIMER);
61 spin_unlock(&wdt->io_lock);
62
63 return 0;
64}
65static int mpc5200_wdt_ping(struct mpc5200_wdt *wdt)
66{
67 spin_lock(&wdt->io_lock);
68 /* writing A5 to OCPW resets the watchdog */
69 out_be32(&wdt->regs->mode, 0xA5000000 | (0xffffff & in_be32(&wdt->regs->mode)));
70 spin_unlock(&wdt->io_lock);
71 return 0;
72}
73static int mpc5200_wdt_stop(struct mpc5200_wdt *wdt)
74{
75 spin_lock(&wdt->io_lock);
76 /* disable */
77 out_be32(&wdt->regs->mode, 0);
78 spin_unlock(&wdt->io_lock);
79 return 0;
80}
81
82
83/* file operations */
84static ssize_t mpc5200_wdt_write(struct file *file, const char *data,
85 size_t len, loff_t *ppos)
86{
87 struct mpc5200_wdt *wdt = file->private_data;
88 mpc5200_wdt_ping(wdt);
89 return 0;
90}
91static struct watchdog_info mpc5200_wdt_info = {
92 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
93 .identity = "mpc5200 watchdog on GPT0",
94};
95static int mpc5200_wdt_ioctl(struct inode *inode, struct file *file,
96 unsigned int cmd, unsigned long arg)
97{
98 struct mpc5200_wdt *wdt = file->private_data;
99 int __user *data = (int __user *)arg;
100 int timeout;
101 int ret = 0;
102
103 switch (cmd) {
104 case WDIOC_GETSUPPORT:
105 ret = copy_to_user(data, &mpc5200_wdt_info,
106 sizeof(mpc5200_wdt_info));
107 if (ret)
108 ret = -EFAULT;
109 break;
110
111 case WDIOC_GETSTATUS:
112 case WDIOC_GETBOOTSTATUS:
113 ret = put_user(0, data);
114 break;
115
116 case WDIOC_KEEPALIVE:
117 mpc5200_wdt_ping(wdt);
118 break;
119
120 case WDIOC_SETTIMEOUT:
121 ret = get_user(timeout, data);
122 if (ret)
123 break;
124 mpc5200_wdt_set_timeout(wdt, timeout);
125 mpc5200_wdt_start(wdt);
126 /* fall through and return the timeout */
127
128 case WDIOC_GETTIMEOUT:
129 timeout = mpc5200_wdt_get_timeout(wdt);
130 ret = put_user(timeout, data);
131 break;
132
133 default:
134 ret = -ENOTTY;
135 }
136 return ret;
137}
138static int mpc5200_wdt_open(struct inode *inode, struct file *file)
139{
140 /* /dev/watchdog can only be opened once */
141 if (test_and_set_bit(0, &is_active))
142 return -EBUSY;
143
144 /* Set and activate the watchdog */
145 mpc5200_wdt_set_timeout(wdt_global, 30);
146 mpc5200_wdt_start(wdt_global);
147 file->private_data = wdt_global;
148 return nonseekable_open(inode, file);
149}
150static int mpc5200_wdt_release(struct inode *inode, struct file *file)
151{
152#if WATCHDOG_NOWAYOUT == 0
153 struct mpc5200_wdt *wdt = file->private_data;
154 mpc5200_wdt_stop(wdt);
155 wdt->count = 0; /* == disabled */
156#endif
157 clear_bit(0, &is_active);
158 return 0;
159}
160
161static struct file_operations mpc5200_wdt_fops = {
162 .owner = THIS_MODULE,
163 .write = mpc5200_wdt_write,
164 .ioctl = mpc5200_wdt_ioctl,
165 .open = mpc5200_wdt_open,
166 .release = mpc5200_wdt_release,
167};
168
169/* module operations */
170static int mpc5200_wdt_probe(struct of_device *op, const struct of_device_id *match)
171{
172 struct mpc5200_wdt *wdt;
173 int err;
174 const void *has_wdt;
175 int size;
176
177 has_wdt = of_get_property(op->node, "has-wdt", NULL);
178 if (!has_wdt)
179 return -ENODEV;
180
181 wdt = kzalloc(sizeof(*wdt), GFP_KERNEL);
182 if (!wdt)
183 return -ENOMEM;
184
185 wdt->ipb_freq = mpc52xx_find_ipb_freq(op->node);
186
187 err = of_address_to_resource(op->node, 0, &wdt->mem);
188 if (err)
189 goto out_free;
190 size = wdt->mem.end - wdt->mem.start + 1;
191 if (!request_mem_region(wdt->mem.start, size, "mpc5200_wdt")) {
192 err = -ENODEV;
193 goto out_free;
194 }
195 wdt->regs = ioremap(wdt->mem.start, size);
196 if (!wdt->regs) {
197 err = -ENODEV;
198 goto out_release;
199 }
200
201 dev_set_drvdata(&op->dev, wdt);
202 spin_lock_init(&wdt->io_lock);
203
204 wdt->miscdev = (struct miscdevice) {
205 .minor = WATCHDOG_MINOR,
206 .name = "watchdog",
207 .fops = &mpc5200_wdt_fops,
208 .parent = &op->dev,
209 };
210 wdt_global = wdt;
211 err = misc_register(&wdt->miscdev);
212 if (!err)
213 return 0;
214
215 iounmap(wdt->regs);
216 out_release:
217 release_mem_region(wdt->mem.start, size);
218 out_free:
219 kfree(wdt);
220 return err;
221}
222
223static int mpc5200_wdt_remove(struct of_device *op)
224{
225 struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
226
227 mpc5200_wdt_stop(wdt);
228 misc_deregister(&wdt->miscdev);
229 iounmap(wdt->regs);
230 release_mem_region(wdt->mem.start, wdt->mem.end - wdt->mem.start + 1);
231 kfree(wdt);
232
233 return 0;
234}
235static int mpc5200_wdt_suspend(struct of_device *op, pm_message_t state)
236{
237 struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
238 mpc5200_wdt_stop(wdt);
239 return 0;
240}
241static int mpc5200_wdt_resume(struct of_device *op)
242{
243 struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
244 if (wdt->count)
245 mpc5200_wdt_start(wdt);
246 return 0;
247}
248static int mpc5200_wdt_shutdown(struct of_device *op)
249{
250 struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
251 mpc5200_wdt_stop(wdt);
252 return 0;
253}
254
255static struct of_device_id mpc5200_wdt_match[] = {
256 { .compatible = "mpc5200-gpt", },
257 {},
258};
259static struct of_platform_driver mpc5200_wdt_driver = {
260 .owner = THIS_MODULE,
261 .name = "mpc5200-gpt-wdt",
262 .match_table = mpc5200_wdt_match,
263 .probe = mpc5200_wdt_probe,
264 .remove = mpc5200_wdt_remove,
265 .suspend = mpc5200_wdt_suspend,
266 .resume = mpc5200_wdt_resume,
267 .shutdown = mpc5200_wdt_shutdown,
268};
269
270
271static int __init mpc5200_wdt_init(void)
272{
273 return of_register_platform_driver(&mpc5200_wdt_driver);
274}
275
276static void __exit mpc5200_wdt_exit(void)
277{
278 of_unregister_platform_driver(&mpc5200_wdt_driver);
279}
280
281module_init(mpc5200_wdt_init);
282module_exit(mpc5200_wdt_exit);
283
284MODULE_AUTHOR("Domen Puncer <domen.puncer@telargo.com>");
285MODULE_LICENSE("Dual BSD/GPL");
286MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
diff --git a/drivers/char/watchdog/mpc83xx_wdt.c b/drivers/char/watchdog/mpc83xx_wdt.c
index 18ca752e2f90..a0bf95fb9763 100644
--- a/drivers/char/watchdog/mpc83xx_wdt.c
+++ b/drivers/char/watchdog/mpc83xx_wdt.c
@@ -119,6 +119,9 @@ static int mpc83xx_wdt_ioctl(struct inode *inode, struct file *file,
119 switch (cmd) { 119 switch (cmd) {
120 case WDIOC_GETSUPPORT: 120 case WDIOC_GETSUPPORT:
121 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0; 121 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
122 case WDIOC_GETSTATUS:
123 case WDIOC_GETBOOTSTATUS:
124 return put_user(0, p);
122 case WDIOC_KEEPALIVE: 125 case WDIOC_KEEPALIVE:
123 mpc83xx_wdt_keepalive(); 126 mpc83xx_wdt_keepalive();
124 return 0; 127 return 0;
diff --git a/drivers/char/watchdog/mpc8xx_wdt.c b/drivers/char/watchdog/mpc8xx_wdt.c
index 8aaed10dd499..85b5734403a5 100644
--- a/drivers/char/watchdog/mpc8xx_wdt.c
+++ b/drivers/char/watchdog/mpc8xx_wdt.c
@@ -57,7 +57,7 @@ static int mpc8xx_wdt_open(struct inode *inode, struct file *file)
57 m8xx_wdt_reset(); 57 m8xx_wdt_reset();
58 mpc8xx_wdt_handler_disable(); 58 mpc8xx_wdt_handler_disable();
59 59
60 return 0; 60 return nonseekable_open(inode, file);
61} 61}
62 62
63static int mpc8xx_wdt_release(struct inode *inode, struct file *file) 63static int mpc8xx_wdt_release(struct inode *inode, struct file *file)
diff --git a/drivers/char/watchdog/mtx-1_wdt.c b/drivers/char/watchdog/mtx-1_wdt.c
index 419ab445c944..dcfd401a7ad7 100644
--- a/drivers/char/watchdog/mtx-1_wdt.c
+++ b/drivers/char/watchdog/mtx-1_wdt.c
@@ -143,6 +143,7 @@ static int mtx1_wdt_ioctl(struct inode *inode, struct file *file, unsigned int c
143 mtx1_wdt_reset(); 143 mtx1_wdt_reset();
144 break; 144 break;
145 case WDIOC_GETSTATUS: 145 case WDIOC_GETSTATUS:
146 case WDIOC_GETBOOTSTATUS:
146 if ( copy_to_user(argp, &value, sizeof(int)) ) 147 if ( copy_to_user(argp, &value, sizeof(int)) )
147 return -EFAULT; 148 return -EFAULT;
148 break; 149 break;
diff --git a/drivers/char/watchdog/mv64x60_wdt.c b/drivers/char/watchdog/mv64x60_wdt.c
index b887cdb01334..0365c317f7e1 100644
--- a/drivers/char/watchdog/mv64x60_wdt.c
+++ b/drivers/char/watchdog/mv64x60_wdt.c
@@ -23,61 +23,101 @@
23#include <linux/watchdog.h> 23#include <linux/watchdog.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25 25
26#include <asm/mv64x60.h> 26#include <linux/mv643xx.h>
27#include <asm/uaccess.h> 27#include <asm/uaccess.h>
28#include <asm/io.h> 28#include <asm/io.h>
29 29
30/* MV64x60 WDC (config) register access definitions */ 30#define MV64x60_WDT_WDC_OFFSET 0
31#define MV64x60_WDC_CTL1_MASK (3 << 24) 31
32#define MV64x60_WDC_CTL1(val) ((val & 3) << 24) 32/*
33#define MV64x60_WDC_CTL2_MASK (3 << 26) 33 * The watchdog configuration register contains a pair of 2-bit fields,
34#define MV64x60_WDC_CTL2(val) ((val & 3) << 26) 34 * 1. a reload field, bits 27-26, which triggers a reload of
35 * the countdown register, and
36 * 2. an enable field, bits 25-24, which toggles between
37 * enabling and disabling the watchdog timer.
38 * Bit 31 is a read-only field which indicates whether the
39 * watchdog timer is currently enabled.
40 *
41 * The low 24 bits contain the timer reload value.
42 */
43#define MV64x60_WDC_ENABLE_SHIFT 24
44#define MV64x60_WDC_SERVICE_SHIFT 26
45#define MV64x60_WDC_ENABLED_SHIFT 31
46
47#define MV64x60_WDC_ENABLED_TRUE 1
48#define MV64x60_WDC_ENABLED_FALSE 0
35 49
36/* Flags bits */ 50/* Flags bits */
37#define MV64x60_WDOG_FLAG_OPENED 0 51#define MV64x60_WDOG_FLAG_OPENED 0
38#define MV64x60_WDOG_FLAG_ENABLED 1
39 52
40static unsigned long wdt_flags; 53static unsigned long wdt_flags;
41static int wdt_status; 54static int wdt_status;
42static void __iomem *mv64x60_regs; 55static void __iomem *mv64x60_wdt_regs;
43static int mv64x60_wdt_timeout; 56static int mv64x60_wdt_timeout;
57static int mv64x60_wdt_count;
58static unsigned int bus_clk;
59static char expect_close;
60static DEFINE_SPINLOCK(mv64x60_wdt_spinlock);
61
62static int nowayout = WATCHDOG_NOWAYOUT;
63module_param(nowayout, int, 0);
64MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
44 65
45static void mv64x60_wdt_reg_write(u32 val) 66static int mv64x60_wdt_toggle_wdc(int enabled_predicate, int field_shift)
46{ 67{
47 /* Allow write only to CTL1 / CTL2 fields, retaining values in 68 u32 data;
48 * other fields. 69 u32 enabled;
49 */ 70 int ret = 0;
50 u32 data = readl(mv64x60_regs + MV64x60_WDT_WDC); 71
51 data &= ~(MV64x60_WDC_CTL1_MASK | MV64x60_WDC_CTL2_MASK); 72 spin_lock(&mv64x60_wdt_spinlock);
52 data |= val; 73 data = readl(mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
53 writel(data, mv64x60_regs + MV64x60_WDT_WDC); 74 enabled = (data >> MV64x60_WDC_ENABLED_SHIFT) & 1;
75
76 /* only toggle the requested field if enabled state matches predicate */
77 if ((enabled ^ enabled_predicate) == 0) {
78 /* We write a 1, then a 2 -- to the appropriate field */
79 data = (1 << field_shift) | mv64x60_wdt_count;
80 writel(data, mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
81
82 data = (2 << field_shift) | mv64x60_wdt_count;
83 writel(data, mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET);
84 ret = 1;
85 }
86 spin_unlock(&mv64x60_wdt_spinlock);
87
88 return ret;
54} 89}
55 90
56static void mv64x60_wdt_service(void) 91static void mv64x60_wdt_service(void)
57{ 92{
58 /* Write 01 followed by 10 to CTL2 */ 93 mv64x60_wdt_toggle_wdc(MV64x60_WDC_ENABLED_TRUE,
59 mv64x60_wdt_reg_write(MV64x60_WDC_CTL2(0x01)); 94 MV64x60_WDC_SERVICE_SHIFT);
60 mv64x60_wdt_reg_write(MV64x60_WDC_CTL2(0x02)); 95}
96
97static void mv64x60_wdt_handler_enable(void)
98{
99 if (mv64x60_wdt_toggle_wdc(MV64x60_WDC_ENABLED_FALSE,
100 MV64x60_WDC_ENABLE_SHIFT)) {
101 mv64x60_wdt_service();
102 printk(KERN_NOTICE "mv64x60_wdt: watchdog activated\n");
103 }
61} 104}
62 105
63static void mv64x60_wdt_handler_disable(void) 106static void mv64x60_wdt_handler_disable(void)
64{ 107{
65 if (test_and_clear_bit(MV64x60_WDOG_FLAG_ENABLED, &wdt_flags)) { 108 if (mv64x60_wdt_toggle_wdc(MV64x60_WDC_ENABLED_TRUE,
66 /* Write 01 followed by 10 to CTL1 */ 109 MV64x60_WDC_ENABLE_SHIFT))
67 mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x01));
68 mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x02));
69 printk(KERN_NOTICE "mv64x60_wdt: watchdog deactivated\n"); 110 printk(KERN_NOTICE "mv64x60_wdt: watchdog deactivated\n");
70 }
71} 111}
72 112
73static void mv64x60_wdt_handler_enable(void) 113static void mv64x60_wdt_set_timeout(unsigned int timeout)
74{ 114{
75 if (!test_and_set_bit(MV64x60_WDOG_FLAG_ENABLED, &wdt_flags)) { 115 /* maximum bus cycle count is 0xFFFFFFFF */
76 /* Write 01 followed by 10 to CTL1 */ 116 if (timeout > 0xFFFFFFFF / bus_clk)
77 mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x01)); 117 timeout = 0xFFFFFFFF / bus_clk;
78 mv64x60_wdt_reg_write(MV64x60_WDC_CTL1(0x02)); 118
79 printk(KERN_NOTICE "mv64x60_wdt: watchdog activated\n"); 119 mv64x60_wdt_count = timeout * bus_clk >> 8;
80 } 120 mv64x60_wdt_timeout = timeout;
81} 121}
82 122
83static int mv64x60_wdt_open(struct inode *inode, struct file *file) 123static int mv64x60_wdt_open(struct inode *inode, struct file *file)
@@ -85,21 +125,24 @@ static int mv64x60_wdt_open(struct inode *inode, struct file *file)
85 if (test_and_set_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags)) 125 if (test_and_set_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags))
86 return -EBUSY; 126 return -EBUSY;
87 127
88 mv64x60_wdt_service(); 128 if (nowayout)
89 mv64x60_wdt_handler_enable(); 129 __module_get(THIS_MODULE);
90 130
91 nonseekable_open(inode, file); 131 mv64x60_wdt_handler_enable();
92 132
93 return 0; 133 return nonseekable_open(inode, file);
94} 134}
95 135
96static int mv64x60_wdt_release(struct inode *inode, struct file *file) 136static int mv64x60_wdt_release(struct inode *inode, struct file *file)
97{ 137{
98 mv64x60_wdt_service(); 138 if (expect_close == 42)
99 139 mv64x60_wdt_handler_disable();
100#if !defined(CONFIG_WATCHDOG_NOWAYOUT) 140 else {
101 mv64x60_wdt_handler_disable(); 141 printk(KERN_CRIT
102#endif 142 "mv64x60_wdt: unexpected close, not stopping timer!\n");
143 mv64x60_wdt_service();
144 }
145 expect_close = 0;
103 146
104 clear_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags); 147 clear_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags);
105 148
@@ -109,8 +152,22 @@ static int mv64x60_wdt_release(struct inode *inode, struct file *file)
109static ssize_t mv64x60_wdt_write(struct file *file, const char __user *data, 152static ssize_t mv64x60_wdt_write(struct file *file, const char __user *data,
110 size_t len, loff_t * ppos) 153 size_t len, loff_t * ppos)
111{ 154{
112 if (len) 155 if (len) {
156 if (!nowayout) {
157 size_t i;
158
159 expect_close = 0;
160
161 for (i = 0; i != len; i++) {
162 char c;
163 if(get_user(c, data + i))
164 return -EFAULT;
165 if (c == 'V')
166 expect_close = 42;
167 }
168 }
113 mv64x60_wdt_service(); 169 mv64x60_wdt_service();
170 }
114 171
115 return len; 172 return len;
116} 173}
@@ -119,9 +176,12 @@ static int mv64x60_wdt_ioctl(struct inode *inode, struct file *file,
119 unsigned int cmd, unsigned long arg) 176 unsigned int cmd, unsigned long arg)
120{ 177{
121 int timeout; 178 int timeout;
179 int options;
122 void __user *argp = (void __user *)arg; 180 void __user *argp = (void __user *)arg;
123 static struct watchdog_info info = { 181 static struct watchdog_info info = {
124 .options = WDIOF_KEEPALIVEPING, 182 .options = WDIOF_SETTIMEOUT |
183 WDIOF_MAGICCLOSE |
184 WDIOF_KEEPALIVEPING,
125 .firmware_version = 0, 185 .firmware_version = 0,
126 .identity = "MV64x60 watchdog", 186 .identity = "MV64x60 watchdog",
127 }; 187 };
@@ -143,7 +203,15 @@ static int mv64x60_wdt_ioctl(struct inode *inode, struct file *file,
143 return -EOPNOTSUPP; 203 return -EOPNOTSUPP;
144 204
145 case WDIOC_SETOPTIONS: 205 case WDIOC_SETOPTIONS:
146 return -EOPNOTSUPP; 206 if (get_user(options, (int __user *)argp))
207 return -EFAULT;
208
209 if (options & WDIOS_DISABLECARD)
210 mv64x60_wdt_handler_disable();
211
212 if (options & WDIOS_ENABLECARD)
213 mv64x60_wdt_handler_enable();
214 break;
147 215
148 case WDIOC_KEEPALIVE: 216 case WDIOC_KEEPALIVE:
149 mv64x60_wdt_service(); 217 mv64x60_wdt_service();
@@ -151,11 +219,13 @@ static int mv64x60_wdt_ioctl(struct inode *inode, struct file *file,
151 break; 219 break;
152 220
153 case WDIOC_SETTIMEOUT: 221 case WDIOC_SETTIMEOUT:
154 return -EOPNOTSUPP; 222 if (get_user(timeout, (int __user *)argp))
223 return -EFAULT;
224 mv64x60_wdt_set_timeout(timeout);
225 /* Fall through */
155 226
156 case WDIOC_GETTIMEOUT: 227 case WDIOC_GETTIMEOUT:
157 timeout = mv64x60_wdt_timeout * HZ; 228 if (put_user(mv64x60_wdt_timeout, (int __user *)argp))
158 if (put_user(timeout, (int __user *)argp))
159 return -EFAULT; 229 return -EFAULT;
160 break; 230 break;
161 231
@@ -184,18 +254,33 @@ static struct miscdevice mv64x60_wdt_miscdev = {
184static int __devinit mv64x60_wdt_probe(struct platform_device *dev) 254static int __devinit mv64x60_wdt_probe(struct platform_device *dev)
185{ 255{
186 struct mv64x60_wdt_pdata *pdata = dev->dev.platform_data; 256 struct mv64x60_wdt_pdata *pdata = dev->dev.platform_data;
187 int bus_clk = 133; 257 struct resource *r;
258 int timeout = 10;
188 259
189 mv64x60_wdt_timeout = 10; 260 bus_clk = 133; /* in MHz */
190 if (pdata) { 261 if (pdata) {
191 mv64x60_wdt_timeout = pdata->timeout; 262 timeout = pdata->timeout;
192 bus_clk = pdata->bus_clk; 263 bus_clk = pdata->bus_clk;
193 } 264 }
194 265
195 mv64x60_regs = mv64x60_get_bridge_vbase(); 266 /* Since bus_clk is truncated MHz, actual frequency could be
267 * up to 1MHz higher. Round up, since it's better to time out
268 * too late than too soon.
269 */
270 bus_clk++;
271 bus_clk *= 1000000; /* convert to Hz */
272
273 r = platform_get_resource(dev, IORESOURCE_MEM, 0);
274 if (!r)
275 return -ENODEV;
196 276
197 writel((mv64x60_wdt_timeout * (bus_clk * 1000000)) >> 8, 277 mv64x60_wdt_regs = ioremap(r->start, r->end - r->start + 1);
198 mv64x60_regs + MV64x60_WDT_WDC); 278 if (mv64x60_wdt_regs == NULL)
279 return -ENOMEM;
280
281 mv64x60_wdt_set_timeout(timeout);
282
283 mv64x60_wdt_handler_disable(); /* in case timer was already running */
199 284
200 return misc_register(&mv64x60_wdt_miscdev); 285 return misc_register(&mv64x60_wdt_miscdev);
201} 286}
@@ -204,9 +289,10 @@ static int __devexit mv64x60_wdt_remove(struct platform_device *dev)
204{ 289{
205 misc_deregister(&mv64x60_wdt_miscdev); 290 misc_deregister(&mv64x60_wdt_miscdev);
206 291
207 mv64x60_wdt_service();
208 mv64x60_wdt_handler_disable(); 292 mv64x60_wdt_handler_disable();
209 293
294 iounmap(mv64x60_wdt_regs);
295
210 return 0; 296 return 0;
211} 297}
212 298
@@ -219,40 +305,16 @@ static struct platform_driver mv64x60_wdt_driver = {
219 }, 305 },
220}; 306};
221 307
222static struct platform_device *mv64x60_wdt_dev;
223
224static int __init mv64x60_wdt_init(void) 308static int __init mv64x60_wdt_init(void)
225{ 309{
226 int ret;
227
228 printk(KERN_INFO "MV64x60 watchdog driver\n"); 310 printk(KERN_INFO "MV64x60 watchdog driver\n");
229 311
230 mv64x60_wdt_dev = platform_device_alloc(MV64x60_WDT_NAME, -1); 312 return platform_driver_register(&mv64x60_wdt_driver);
231 if (!mv64x60_wdt_dev) {
232 ret = -ENOMEM;
233 goto out;
234 }
235
236 ret = platform_device_add(mv64x60_wdt_dev);
237 if (ret) {
238 platform_device_put(mv64x60_wdt_dev);
239 goto out;
240 }
241
242 ret = platform_driver_register(&mv64x60_wdt_driver);
243 if (ret) {
244 platform_device_unregister(mv64x60_wdt_dev);
245 goto out;
246 }
247
248 out:
249 return ret;
250} 313}
251 314
252static void __exit mv64x60_wdt_exit(void) 315static void __exit mv64x60_wdt_exit(void)
253{ 316{
254 platform_driver_unregister(&mv64x60_wdt_driver); 317 platform_driver_unregister(&mv64x60_wdt_driver);
255 platform_device_unregister(mv64x60_wdt_dev);
256} 318}
257 319
258module_init(mv64x60_wdt_init); 320module_init(mv64x60_wdt_init);
diff --git a/drivers/char/watchdog/omap_wdt.c b/drivers/char/watchdog/omap_wdt.c
index b36fa8de2131..719b066f73c4 100644
--- a/drivers/char/watchdog/omap_wdt.c
+++ b/drivers/char/watchdog/omap_wdt.c
@@ -142,7 +142,7 @@ static int omap_wdt_open(struct inode *inode, struct file *file)
142 142
143 omap_wdt_set_timeout(); 143 omap_wdt_set_timeout();
144 omap_wdt_enable(); 144 omap_wdt_enable();
145 return 0; 145 return nonseekable_open(inode, file);
146} 146}
147 147
148static int omap_wdt_release(struct inode *inode, struct file *file) 148static int omap_wdt_release(struct inode *inode, struct file *file)
@@ -197,7 +197,7 @@ omap_wdt_ioctl(struct inode *inode, struct file *file,
197 197
198 switch (cmd) { 198 switch (cmd) {
199 default: 199 default:
200 return -ENOIOCTLCMD; 200 return -ENOTTY;
201 case WDIOC_GETSUPPORT: 201 case WDIOC_GETSUPPORT:
202 return copy_to_user((struct watchdog_info __user *)arg, &ident, 202 return copy_to_user((struct watchdog_info __user *)arg, &ident,
203 sizeof(ident)); 203 sizeof(ident));
diff --git a/drivers/char/watchdog/s3c2410_wdt.c b/drivers/char/watchdog/s3c2410_wdt.c
index 50430bced2f2..5d1c15f83d23 100644
--- a/drivers/char/watchdog/s3c2410_wdt.c
+++ b/drivers/char/watchdog/s3c2410_wdt.c
@@ -52,10 +52,10 @@
52 52
53#include <asm/arch/map.h> 53#include <asm/arch/map.h>
54 54
55#undef S3C24XX_VA_WATCHDOG 55#undef S3C_VA_WATCHDOG
56#define S3C24XX_VA_WATCHDOG (0) 56#define S3C_VA_WATCHDOG (0)
57 57
58#include <asm/arch/regs-watchdog.h> 58#include <asm/plat-s3c/regs-watchdog.h>
59 59
60#define PFX "s3c2410-wdt: " 60#define PFX "s3c2410-wdt: "
61 61
diff --git a/drivers/char/watchdog/sa1100_wdt.c b/drivers/char/watchdog/sa1100_wdt.c
index 33c1137f17d6..3475f47aaa45 100644
--- a/drivers/char/watchdog/sa1100_wdt.c
+++ b/drivers/char/watchdog/sa1100_wdt.c
@@ -45,7 +45,6 @@ static int boot_status;
45 */ 45 */
46static int sa1100dog_open(struct inode *inode, struct file *file) 46static int sa1100dog_open(struct inode *inode, struct file *file)
47{ 47{
48 nonseekable_open(inode, file);
49 if (test_and_set_bit(1,&sa1100wdt_users)) 48 if (test_and_set_bit(1,&sa1100wdt_users))
50 return -EBUSY; 49 return -EBUSY;
51 50
@@ -54,7 +53,7 @@ static int sa1100dog_open(struct inode *inode, struct file *file)
54 OSSR = OSSR_M3; 53 OSSR = OSSR_M3;
55 OWER = OWER_WME; 54 OWER = OWER_WME;
56 OIER |= OIER_E3; 55 OIER |= OIER_E3;
57 return 0; 56 return nonseekable_open(inode, file);
58} 57}
59 58
60/* 59/*
diff --git a/drivers/char/watchdog/sbc60xxwdt.c b/drivers/char/watchdog/sbc60xxwdt.c
index b6282039198c..e4f3cb6090bc 100644
--- a/drivers/char/watchdog/sbc60xxwdt.c
+++ b/drivers/char/watchdog/sbc60xxwdt.c
@@ -191,8 +191,6 @@ static ssize_t fop_write(struct file * file, const char __user * buf, size_t cou
191 191
192static int fop_open(struct inode * inode, struct file * file) 192static int fop_open(struct inode * inode, struct file * file)
193{ 193{
194 nonseekable_open(inode, file);
195
196 /* Just in case we're already talking to someone... */ 194 /* Just in case we're already talking to someone... */
197 if(test_and_set_bit(0, &wdt_is_open)) 195 if(test_and_set_bit(0, &wdt_is_open))
198 return -EBUSY; 196 return -EBUSY;
@@ -202,7 +200,7 @@ static int fop_open(struct inode * inode, struct file * file)
202 200
203 /* Good, fire up the show */ 201 /* Good, fire up the show */
204 wdt_startup(); 202 wdt_startup();
205 return 0; 203 return nonseekable_open(inode, file);
206} 204}
207 205
208static int fop_close(struct inode * inode, struct file * file) 206static int fop_close(struct inode * inode, struct file * file)
diff --git a/drivers/char/watchdog/sc1200wdt.c b/drivers/char/watchdog/sc1200wdt.c
index 2f7ba7a514fe..9670d47190d0 100644
--- a/drivers/char/watchdog/sc1200wdt.c
+++ b/drivers/char/watchdog/sc1200wdt.c
@@ -150,8 +150,6 @@ static inline int sc1200wdt_status(void)
150 150
151static int sc1200wdt_open(struct inode *inode, struct file *file) 151static int sc1200wdt_open(struct inode *inode, struct file *file)
152{ 152{
153 nonseekable_open(inode, file);
154
155 /* allow one at a time */ 153 /* allow one at a time */
156 if (down_trylock(&open_sem)) 154 if (down_trylock(&open_sem))
157 return -EBUSY; 155 return -EBUSY;
@@ -162,7 +160,7 @@ static int sc1200wdt_open(struct inode *inode, struct file *file)
162 sc1200wdt_start(); 160 sc1200wdt_start();
163 printk(KERN_INFO PFX "Watchdog enabled, timeout = %d min(s)", timeout); 161 printk(KERN_INFO PFX "Watchdog enabled, timeout = %d min(s)", timeout);
164 162
165 return 0; 163 return nonseekable_open(inode, file);
166} 164}
167 165
168 166
diff --git a/drivers/char/watchdog/sc520_wdt.c b/drivers/char/watchdog/sc520_wdt.c
index 2676a43895a7..e8594c64d1e6 100644
--- a/drivers/char/watchdog/sc520_wdt.c
+++ b/drivers/char/watchdog/sc520_wdt.c
@@ -248,8 +248,6 @@ static ssize_t fop_write(struct file * file, const char __user * buf, size_t cou
248 248
249static int fop_open(struct inode * inode, struct file * file) 249static int fop_open(struct inode * inode, struct file * file)
250{ 250{
251 nonseekable_open(inode, file);
252
253 /* Just in case we're already talking to someone... */ 251 /* Just in case we're already talking to someone... */
254 if(test_and_set_bit(0, &wdt_is_open)) 252 if(test_and_set_bit(0, &wdt_is_open))
255 return -EBUSY; 253 return -EBUSY;
@@ -258,7 +256,7 @@ static int fop_open(struct inode * inode, struct file * file)
258 256
259 /* Good, fire up the show */ 257 /* Good, fire up the show */
260 wdt_startup(); 258 wdt_startup();
261 return 0; 259 return nonseekable_open(inode, file);
262} 260}
263 261
264static int fop_close(struct inode * inode, struct file * file) 262static int fop_close(struct inode * inode, struct file * file)
diff --git a/drivers/char/watchdog/w83627hf_wdt.c b/drivers/char/watchdog/w83627hf_wdt.c
index b46e7f47d705..df33b3b5a53c 100644
--- a/drivers/char/watchdog/w83627hf_wdt.c
+++ b/drivers/char/watchdog/w83627hf_wdt.c
@@ -4,7 +4,7 @@
4 * (c) Copyright 2007 Vlad Drukker <vlad@storewiz.com> 4 * (c) Copyright 2007 Vlad Drukker <vlad@storewiz.com>
5 * added support for W83627THF. 5 * added support for W83627THF.
6 * 6 *
7 * (c) Copyright 2003 Pádraig Brady <P@draigBrady.com> 7 * (c) Copyright 2003,2007 Pádraig Brady <P@draigBrady.com>
8 * 8 *
9 * Based on advantechwdt.c which is based on wdt.c. 9 * Based on advantechwdt.c which is based on wdt.c.
10 * Original copyright messages: 10 * Original copyright messages:
@@ -42,7 +42,7 @@
42#include <asm/uaccess.h> 42#include <asm/uaccess.h>
43#include <asm/system.h> 43#include <asm/system.h>
44 44
45#define WATCHDOG_NAME "w83627hf/thf WDT" 45#define WATCHDOG_NAME "w83627hf/thf/hg WDT"
46#define PFX WATCHDOG_NAME ": " 46#define PFX WATCHDOG_NAME ": "
47#define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */ 47#define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */
48 48
@@ -57,7 +57,7 @@ MODULE_PARM_DESC(wdt_io, "w83627hf/thf WDT io port (default 0x2E)");
57 57
58static int timeout = WATCHDOG_TIMEOUT; /* in seconds */ 58static int timeout = WATCHDOG_TIMEOUT; /* in seconds */
59module_param(timeout, int, 0); 59module_param(timeout, int, 0);
60MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. 1<= timeout <=63, default=" __MODULE_STRING(WATCHDOG_TIMEOUT) "."); 60MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. 1<= timeout <=255, default=" __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
61 61
62static int nowayout = WATCHDOG_NOWAYOUT; 62static int nowayout = WATCHDOG_NOWAYOUT;
63module_param(nowayout, int, 0); 63module_param(nowayout, int, 0);
@@ -78,9 +78,9 @@ w83627hf_select_wd_register(void)
78 outb_p(0x87, WDT_EFER); /* Enter extended function mode */ 78 outb_p(0x87, WDT_EFER); /* Enter extended function mode */
79 outb_p(0x87, WDT_EFER); /* Again according to manual */ 79 outb_p(0x87, WDT_EFER); /* Again according to manual */
80 80
81 outb(0x20, WDT_EFER); /* check chip version */ 81 outb(0x20, WDT_EFER); /* check chip version */
82 c = inb(WDT_EFDR); 82 c = inb(WDT_EFDR);
83 if (c == 0x82) { /* W83627THF */ 83 if (c == 0x82) { /* W83627THF */
84 outb_p(0x2b, WDT_EFER); /* select GPIO3 */ 84 outb_p(0x2b, WDT_EFER); /* select GPIO3 */
85 c = ((inb_p(WDT_EFDR) & 0xf7) | 0x04); /* select WDT0 */ 85 c = ((inb_p(WDT_EFDR) & 0xf7) | 0x04); /* select WDT0 */
86 outb_p(0x2b, WDT_EFER); 86 outb_p(0x2b, WDT_EFER);
@@ -114,11 +114,17 @@ w83627hf_init(void)
114 printk (KERN_INFO PFX "Watchdog already running. Resetting timeout to %d sec\n", timeout); 114 printk (KERN_INFO PFX "Watchdog already running. Resetting timeout to %d sec\n", timeout);
115 outb_p(timeout, WDT_EFDR); /* Write back to CRF6 */ 115 outb_p(timeout, WDT_EFDR); /* Write back to CRF6 */
116 } 116 }
117
117 outb_p(0xF5, WDT_EFER); /* Select CRF5 */ 118 outb_p(0xF5, WDT_EFER); /* Select CRF5 */
118 t=inb_p(WDT_EFDR); /* read CRF5 */ 119 t=inb_p(WDT_EFDR); /* read CRF5 */
119 t&=~0x0C; /* set second mode & disable keyboard turning off watchdog */ 120 t&=~0x0C; /* set second mode & disable keyboard turning off watchdog */
120 outb_p(t, WDT_EFDR); /* Write back to CRF5 */ 121 outb_p(t, WDT_EFDR); /* Write back to CRF5 */
121 122
123 outb_p(0xF7, WDT_EFER); /* Select CRF7 */
124 t=inb_p(WDT_EFDR); /* read CRF7 */
125 t&=~0xC0; /* disable keyboard & mouse turning off watchdog */
126 outb_p(t, WDT_EFDR); /* Write back to CRF7 */
127
122 w83627hf_unselect_wd_register(); 128 w83627hf_unselect_wd_register();
123} 129}
124 130
@@ -126,7 +132,7 @@ static void
126wdt_ctrl(int timeout) 132wdt_ctrl(int timeout)
127{ 133{
128 spin_lock(&io_lock); 134 spin_lock(&io_lock);
129 135
130 w83627hf_select_wd_register(); 136 w83627hf_select_wd_register();
131 137
132 outb_p(0xF6, WDT_EFER); /* Select CRF6 */ 138 outb_p(0xF6, WDT_EFER); /* Select CRF6 */
@@ -154,7 +160,7 @@ wdt_disable(void)
154static int 160static int
155wdt_set_heartbeat(int t) 161wdt_set_heartbeat(int t)
156{ 162{
157 if ((t < 1) || (t > 63)) 163 if ((t < 1) || (t > 255))
158 return -EINVAL; 164 return -EINVAL;
159 165
160 timeout = t; 166 timeout = t;
@@ -324,11 +330,11 @@ wdt_init(void)
324 330
325 spin_lock_init(&io_lock); 331 spin_lock_init(&io_lock);
326 332
327 printk(KERN_INFO "WDT driver for the Winbond(TM) W83627HF/THF Super I/O chip initialising.\n"); 333 printk(KERN_INFO "WDT driver for the Winbond(TM) W83627HF/THF/HG Super I/O chip initialising.\n");
328 334
329 if (wdt_set_heartbeat(timeout)) { 335 if (wdt_set_heartbeat(timeout)) {
330 wdt_set_heartbeat(WATCHDOG_TIMEOUT); 336 wdt_set_heartbeat(WATCHDOG_TIMEOUT);
331 printk (KERN_INFO PFX "timeout value must be 1<=timeout<=63, using %d\n", 337 printk (KERN_INFO PFX "timeout value must be 1<=timeout<=255, using %d\n",
332 WATCHDOG_TIMEOUT); 338 WATCHDOG_TIMEOUT);
333 } 339 }
334 340
diff --git a/drivers/dma/iovlock.c b/drivers/dma/iovlock.c
index d637555a833b..e763d723e4cf 100644
--- a/drivers/dma/iovlock.c
+++ b/drivers/dma/iovlock.c
@@ -143,29 +143,6 @@ void dma_unpin_iovec_pages(struct dma_pinned_list *pinned_list)
143 kfree(pinned_list); 143 kfree(pinned_list);
144} 144}
145 145
146static dma_cookie_t dma_memcpy_to_kernel_iovec(struct dma_chan *chan, struct
147 iovec *iov, unsigned char *kdata, size_t len)
148{
149 dma_cookie_t dma_cookie = 0;
150
151 while (len > 0) {
152 if (iov->iov_len) {
153 int copy = min_t(unsigned int, iov->iov_len, len);
154 dma_cookie = dma_async_memcpy_buf_to_buf(
155 chan,
156 iov->iov_base,
157 kdata,
158 copy);
159 kdata += copy;
160 len -= copy;
161 iov->iov_len -= copy;
162 iov->iov_base += copy;
163 }
164 iov++;
165 }
166
167 return dma_cookie;
168}
169 146
170/* 147/*
171 * We have already pinned down the pages we will be using in the iovecs. 148 * We have already pinned down the pages we will be using in the iovecs.
@@ -187,10 +164,6 @@ dma_cookie_t dma_memcpy_to_iovec(struct dma_chan *chan, struct iovec *iov,
187 if (!chan) 164 if (!chan)
188 return memcpy_toiovec(iov, kdata, len); 165 return memcpy_toiovec(iov, kdata, len);
189 166
190 /* -> kernel copies (e.g. smbfs) */
191 if (!pinned_list)
192 return dma_memcpy_to_kernel_iovec(chan, iov, kdata, len);
193
194 iovec_idx = 0; 167 iovec_idx = 0;
195 while (iovec_idx < pinned_list->nr_iovecs) { 168 while (iovec_idx < pinned_list->nr_iovecs) {
196 struct dma_page_list *page_list; 169 struct dma_page_list *page_list;
diff --git a/drivers/firewire/fw-ohci.c b/drivers/firewire/fw-ohci.c
index db703758db98..7e427b4c74b5 100644
--- a/drivers/firewire/fw-ohci.c
+++ b/drivers/firewire/fw-ohci.c
@@ -907,6 +907,8 @@ static void bus_reset_tasklet(unsigned long data)
907 int self_id_count, i, j, reg; 907 int self_id_count, i, j, reg;
908 int generation, new_generation; 908 int generation, new_generation;
909 unsigned long flags; 909 unsigned long flags;
910 void *free_rom = NULL;
911 dma_addr_t free_rom_bus = 0;
910 912
911 reg = reg_read(ohci, OHCI1394_NodeID); 913 reg = reg_read(ohci, OHCI1394_NodeID);
912 if (!(reg & OHCI1394_NodeID_idValid)) { 914 if (!(reg & OHCI1394_NodeID_idValid)) {
@@ -970,8 +972,8 @@ static void bus_reset_tasklet(unsigned long data)
970 */ 972 */
971 973
972 if (ohci->next_config_rom != NULL) { 974 if (ohci->next_config_rom != NULL) {
973 dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, 975 free_rom = ohci->config_rom;
974 ohci->config_rom, ohci->config_rom_bus); 976 free_rom_bus = ohci->config_rom_bus;
975 ohci->config_rom = ohci->next_config_rom; 977 ohci->config_rom = ohci->next_config_rom;
976 ohci->config_rom_bus = ohci->next_config_rom_bus; 978 ohci->config_rom_bus = ohci->next_config_rom_bus;
977 ohci->next_config_rom = NULL; 979 ohci->next_config_rom = NULL;
@@ -990,6 +992,10 @@ static void bus_reset_tasklet(unsigned long data)
990 992
991 spin_unlock_irqrestore(&ohci->lock, flags); 993 spin_unlock_irqrestore(&ohci->lock, flags);
992 994
995 if (free_rom)
996 dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE,
997 free_rom, free_rom_bus);
998
993 fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation, 999 fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation,
994 self_id_count, ohci->self_id_buffer); 1000 self_id_count, ohci->self_id_buffer);
995} 1001}
@@ -1186,7 +1192,7 @@ ohci_set_config_rom(struct fw_card *card, u32 *config_rom, size_t length)
1186{ 1192{
1187 struct fw_ohci *ohci; 1193 struct fw_ohci *ohci;
1188 unsigned long flags; 1194 unsigned long flags;
1189 int retval = 0; 1195 int retval = -EBUSY;
1190 __be32 *next_config_rom; 1196 __be32 *next_config_rom;
1191 dma_addr_t next_config_rom_bus; 1197 dma_addr_t next_config_rom_bus;
1192 1198
@@ -1240,10 +1246,7 @@ ohci_set_config_rom(struct fw_card *card, u32 *config_rom, size_t length)
1240 1246
1241 reg_write(ohci, OHCI1394_ConfigROMmap, 1247 reg_write(ohci, OHCI1394_ConfigROMmap,
1242 ohci->next_config_rom_bus); 1248 ohci->next_config_rom_bus);
1243 } else { 1249 retval = 0;
1244 dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE,
1245 next_config_rom, next_config_rom_bus);
1246 retval = -EBUSY;
1247 } 1250 }
1248 1251
1249 spin_unlock_irqrestore(&ohci->lock, flags); 1252 spin_unlock_irqrestore(&ohci->lock, flags);
@@ -1257,6 +1260,9 @@ ohci_set_config_rom(struct fw_card *card, u32 *config_rom, size_t length)
1257 */ 1260 */
1258 if (retval == 0) 1261 if (retval == 0)
1259 fw_core_initiate_bus_reset(&ohci->card, 1); 1262 fw_core_initiate_bus_reset(&ohci->card, 1);
1263 else
1264 dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE,
1265 next_config_rom, next_config_rom_bus);
1260 1266
1261 return retval; 1267 return retval;
1262} 1268}
diff --git a/drivers/firewire/fw-sbp2.c b/drivers/firewire/fw-sbp2.c
index 3e4a369d0057..ba816ef6def1 100644
--- a/drivers/firewire/fw-sbp2.c
+++ b/drivers/firewire/fw-sbp2.c
@@ -984,6 +984,7 @@ static int sbp2_scsi_queuecommand(struct scsi_cmnd *cmd, scsi_done_fn_t done)
984 struct fw_unit *unit = sd->unit; 984 struct fw_unit *unit = sd->unit;
985 struct fw_device *device = fw_device(unit->device.parent); 985 struct fw_device *device = fw_device(unit->device.parent);
986 struct sbp2_command_orb *orb; 986 struct sbp2_command_orb *orb;
987 unsigned max_payload;
987 988
988 /* 989 /*
989 * Bidirectional commands are not yet implemented, and unknown 990 * Bidirectional commands are not yet implemented, and unknown
@@ -1017,8 +1018,10 @@ static int sbp2_scsi_queuecommand(struct scsi_cmnd *cmd, scsi_done_fn_t done)
1017 * specifies the max payload size as 2 ^ (max_payload + 2), so 1018 * specifies the max payload size as 2 ^ (max_payload + 2), so
1018 * if we set this to max_speed + 7, we get the right value. 1019 * if we set this to max_speed + 7, we get the right value.
1019 */ 1020 */
1021 max_payload = min(device->max_speed + 7,
1022 device->card->max_receive - 1);
1020 orb->request.misc = 1023 orb->request.misc =
1021 COMMAND_ORB_MAX_PAYLOAD(device->max_speed + 7) | 1024 COMMAND_ORB_MAX_PAYLOAD(max_payload) |
1022 COMMAND_ORB_SPEED(device->max_speed) | 1025 COMMAND_ORB_SPEED(device->max_speed) |
1023 COMMAND_ORB_NOTIFY; 1026 COMMAND_ORB_NOTIFY;
1024 1027
diff --git a/drivers/firewire/fw-transaction.c b/drivers/firewire/fw-transaction.c
index 3ce8e2fbe15f..3e1cb12e43cd 100644
--- a/drivers/firewire/fw-transaction.c
+++ b/drivers/firewire/fw-transaction.c
@@ -734,7 +734,7 @@ fw_core_handle_response(struct fw_card *card, struct fw_packet *p)
734} 734}
735EXPORT_SYMBOL(fw_core_handle_response); 735EXPORT_SYMBOL(fw_core_handle_response);
736 736
737const struct fw_address_region topology_map_region = 737static const struct fw_address_region topology_map_region =
738 { .start = 0xfffff0001000ull, .end = 0xfffff0001400ull, }; 738 { .start = 0xfffff0001000ull, .end = 0xfffff0001400ull, };
739 739
740static void 740static void
@@ -772,7 +772,7 @@ static struct fw_address_handler topology_map = {
772 .address_callback = handle_topology_map, 772 .address_callback = handle_topology_map,
773}; 773};
774 774
775const struct fw_address_region registers_region = 775static const struct fw_address_region registers_region =
776 { .start = 0xfffff0000000ull, .end = 0xfffff0000400ull, }; 776 { .start = 0xfffff0000000ull, .end = 0xfffff0000400ull, };
777 777
778static void 778static void
diff --git a/drivers/firewire/fw-transaction.h b/drivers/firewire/fw-transaction.h
index 5ceaccd10564..fa7967b57408 100644
--- a/drivers/firewire/fw-transaction.h
+++ b/drivers/firewire/fw-transaction.h
@@ -231,7 +231,7 @@ struct fw_card {
231 unsigned long reset_jiffies; 231 unsigned long reset_jiffies;
232 232
233 unsigned long long guid; 233 unsigned long long guid;
234 int max_receive; 234 unsigned max_receive;
235 int link_speed; 235 int link_speed;
236 int config_rom_generation; 236 int config_rom_generation;
237 237
diff --git a/drivers/hid/usbhid/hid-core.c b/drivers/hid/usbhid/hid-core.c
index b2baeaeba9be..0a1f2b52a12f 100644
--- a/drivers/hid/usbhid/hid-core.c
+++ b/drivers/hid/usbhid/hid-core.c
@@ -743,7 +743,7 @@ static struct hid_device *usb_hid_configure(struct usb_interface *intf)
743 hid->quirks = quirks; 743 hid->quirks = quirks;
744 744
745 if (!(usbhid = kzalloc(sizeof(struct usbhid_device), GFP_KERNEL))) 745 if (!(usbhid = kzalloc(sizeof(struct usbhid_device), GFP_KERNEL)))
746 goto fail; 746 goto fail_no_usbhid;
747 747
748 hid->driver_data = usbhid; 748 hid->driver_data = usbhid;
749 usbhid->hid = hid; 749 usbhid->hid = hid;
@@ -878,6 +878,8 @@ fail:
878 usb_free_urb(usbhid->urbout); 878 usb_free_urb(usbhid->urbout);
879 usb_free_urb(usbhid->urbctrl); 879 usb_free_urb(usbhid->urbctrl);
880 hid_free_buffers(dev, hid); 880 hid_free_buffers(dev, hid);
881 kfree(usbhid);
882fail_no_usbhid:
881 hid_free_device(hid); 883 hid_free_device(hid);
882 884
883 return NULL; 885 return NULL;
@@ -913,6 +915,7 @@ static void hid_disconnect(struct usb_interface *intf)
913 usb_free_urb(usbhid->urbout); 915 usb_free_urb(usbhid->urbout);
914 916
915 hid_free_buffers(hid_to_usb_dev(hid), hid); 917 hid_free_buffers(hid_to_usb_dev(hid), hid);
918 kfree(usbhid);
916 hid_free_device(hid); 919 hid_free_device(hid);
917} 920}
918 921
diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c
index 775b9f3b8ce3..6b21a214f419 100644
--- a/drivers/hid/usbhid/hid-quirks.c
+++ b/drivers/hid/usbhid/hid-quirks.c
@@ -61,7 +61,9 @@
61#define USB_DEVICE_ID_APPLE_GEYSER4_JIS 0x021c 61#define USB_DEVICE_ID_APPLE_GEYSER4_JIS 0x021c
62#define USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY 0x030a 62#define USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY 0x030a
63#define USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY 0x030b 63#define USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY 0x030b
64#define USB_DEVICE_ID_APPLE_IR 0x8240 64
65#define USB_VENDOR_ID_ASUS 0x0b05
66#define USB_DEVICE_ID_ASUS_LCM 0x1726
65 67
66#define USB_VENDOR_ID_ATEN 0x0557 68#define USB_VENDOR_ID_ATEN 0x0557
67#define USB_DEVICE_ID_ATEN_UC100KM 0x2004 69#define USB_DEVICE_ID_ATEN_UC100KM 0x2004
@@ -198,6 +200,70 @@
198 200
199#define USB_VENDOR_ID_LOGITECH 0x046d 201#define USB_VENDOR_ID_LOGITECH 0x046d
200#define USB_DEVICE_ID_LOGITECH_RECEIVER 0xc101 202#define USB_DEVICE_ID_LOGITECH_RECEIVER 0xc101
203#define USB_DEVICE_ID_LOGITECH_HARMONY 0xc110
204#define USB_DEVICE_ID_LOGITECH_HARMONY_2 0xc111
205#define USB_DEVICE_ID_LOGITECH_HARMONY_3 0xc112
206#define USB_DEVICE_ID_LOGITECH_HARMONY_4 0xc113
207#define USB_DEVICE_ID_LOGITECH_HARMONY_5 0xc114
208#define USB_DEVICE_ID_LOGITECH_HARMONY_6 0xc115
209#define USB_DEVICE_ID_LOGITECH_HARMONY_7 0xc116
210#define USB_DEVICE_ID_LOGITECH_HARMONY_8 0xc117
211#define USB_DEVICE_ID_LOGITECH_HARMONY_9 0xc118
212#define USB_DEVICE_ID_LOGITECH_HARMONY_10 0xc119
213#define USB_DEVICE_ID_LOGITECH_HARMONY_11 0xc11a
214#define USB_DEVICE_ID_LOGITECH_HARMONY_12 0xc11b
215#define USB_DEVICE_ID_LOGITECH_HARMONY_13 0xc11c
216#define USB_DEVICE_ID_LOGITECH_HARMONY_14 0xc11d
217#define USB_DEVICE_ID_LOGITECH_HARMONY_15 0xc11e
218#define USB_DEVICE_ID_LOGITECH_HARMONY_16 0xc11f
219#define USB_DEVICE_ID_LOGITECH_HARMONY_17 0xc120
220#define USB_DEVICE_ID_LOGITECH_HARMONY_18 0xc121
221#define USB_DEVICE_ID_LOGITECH_HARMONY_19 0xc122
222#define USB_DEVICE_ID_LOGITECH_HARMONY_20 0xc123
223#define USB_DEVICE_ID_LOGITECH_HARMONY_21 0xc124
224#define USB_DEVICE_ID_LOGITECH_HARMONY_22 0xc125
225#define USB_DEVICE_ID_LOGITECH_HARMONY_23 0xc126
226#define USB_DEVICE_ID_LOGITECH_HARMONY_24 0xc127
227#define USB_DEVICE_ID_LOGITECH_HARMONY_25 0xc128
228#define USB_DEVICE_ID_LOGITECH_HARMONY_26 0xc129
229#define USB_DEVICE_ID_LOGITECH_HARMONY_27 0xc12a
230#define USB_DEVICE_ID_LOGITECH_HARMONY_28 0xc12b
231#define USB_DEVICE_ID_LOGITECH_HARMONY_29 0xc12c
232#define USB_DEVICE_ID_LOGITECH_HARMONY_30 0xc12d
233#define USB_DEVICE_ID_LOGITECH_HARMONY_31 0xc12e
234#define USB_DEVICE_ID_LOGITECH_HARMONY_32 0xc12f
235#define USB_DEVICE_ID_LOGITECH_HARMONY_33 0xc130
236#define USB_DEVICE_ID_LOGITECH_HARMONY_34 0xc131
237#define USB_DEVICE_ID_LOGITECH_HARMONY_35 0xc132
238#define USB_DEVICE_ID_LOGITECH_HARMONY_36 0xc133
239#define USB_DEVICE_ID_LOGITECH_HARMONY_37 0xc134
240#define USB_DEVICE_ID_LOGITECH_HARMONY_38 0xc135
241#define USB_DEVICE_ID_LOGITECH_HARMONY_39 0xc136
242#define USB_DEVICE_ID_LOGITECH_HARMONY_40 0xc137
243#define USB_DEVICE_ID_LOGITECH_HARMONY_41 0xc138
244#define USB_DEVICE_ID_LOGITECH_HARMONY_42 0xc139
245#define USB_DEVICE_ID_LOGITECH_HARMONY_43 0xc13a
246#define USB_DEVICE_ID_LOGITECH_HARMONY_44 0xc13b
247#define USB_DEVICE_ID_LOGITECH_HARMONY_45 0xc13c
248#define USB_DEVICE_ID_LOGITECH_HARMONY_46 0xc13d
249#define USB_DEVICE_ID_LOGITECH_HARMONY_47 0xc13e
250#define USB_DEVICE_ID_LOGITECH_HARMONY_48 0xc13f
251#define USB_DEVICE_ID_LOGITECH_HARMONY_49 0xc140
252#define USB_DEVICE_ID_LOGITECH_HARMONY_50 0xc141
253#define USB_DEVICE_ID_LOGITECH_HARMONY_51 0xc142
254#define USB_DEVICE_ID_LOGITECH_HARMONY_52 0xc143
255#define USB_DEVICE_ID_LOGITECH_HARMONY_53 0xc144
256#define USB_DEVICE_ID_LOGITECH_HARMONY_54 0xc145
257#define USB_DEVICE_ID_LOGITECH_HARMONY_55 0xc146
258#define USB_DEVICE_ID_LOGITECH_HARMONY_56 0xc147
259#define USB_DEVICE_ID_LOGITECH_HARMONY_57 0xc148
260#define USB_DEVICE_ID_LOGITECH_HARMONY_58 0xc149
261#define USB_DEVICE_ID_LOGITECH_HARMONY_59 0xc14a
262#define USB_DEVICE_ID_LOGITECH_HARMONY_60 0xc14b
263#define USB_DEVICE_ID_LOGITECH_HARMONY_61 0xc14c
264#define USB_DEVICE_ID_LOGITECH_HARMONY_62 0xc14d
265#define USB_DEVICE_ID_LOGITECH_HARMONY_63 0xc14e
266#define USB_DEVICE_ID_LOGITECH_HARMONY_64 0xc14f
201#define USB_DEVICE_ID_LOGITECH_WHEEL 0xc294 267#define USB_DEVICE_ID_LOGITECH_WHEEL 0xc294
202#define USB_DEVICE_ID_LOGITECH_KBD 0xc311 268#define USB_DEVICE_ID_LOGITECH_KBD 0xc311
203#define USB_DEVICE_ID_S510_RECEIVER 0xc50c 269#define USB_DEVICE_ID_S510_RECEIVER 0xc50c
@@ -221,6 +287,9 @@
221#define USB_DEVICE_ID_NCR_FIRST 0x0300 287#define USB_DEVICE_ID_NCR_FIRST 0x0300
222#define USB_DEVICE_ID_NCR_LAST 0x03ff 288#define USB_DEVICE_ID_NCR_LAST 0x03ff
223 289
290#define USB_VENDOR_ID_NATIONAL_SEMICONDUCTOR 0x0400
291#define USB_DEVICE_ID_N_S_HARMONY 0xc359
292
224#define USB_VENDOR_ID_NEC 0x073e 293#define USB_VENDOR_ID_NEC 0x073e
225#define USB_DEVICE_ID_NEC_USB_GAME_PAD 0x0301 294#define USB_DEVICE_ID_NEC_USB_GAME_PAD 0x0301
226 295
@@ -315,7 +384,7 @@ static const struct hid_blacklist {
315 { USB_VENDOR_ID_AIPTEK, USB_DEVICE_ID_AIPTEK_24, HID_QUIRK_IGNORE }, 384 { USB_VENDOR_ID_AIPTEK, USB_DEVICE_ID_AIPTEK_24, HID_QUIRK_IGNORE },
316 { USB_VENDOR_ID_AIRCABLE, USB_DEVICE_ID_AIRCABLE1, HID_QUIRK_IGNORE }, 385 { USB_VENDOR_ID_AIRCABLE, USB_DEVICE_ID_AIRCABLE1, HID_QUIRK_IGNORE },
317 { USB_VENDOR_ID_ALCOR, USB_DEVICE_ID_ALCOR_USBRS232, HID_QUIRK_IGNORE }, 386 { USB_VENDOR_ID_ALCOR, USB_DEVICE_ID_ALCOR_USBRS232, HID_QUIRK_IGNORE },
318 { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IR, HID_QUIRK_IGNORE }, 387 { USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUS_LCM, HID_QUIRK_IGNORE},
319 { USB_VENDOR_ID_BERKSHIRE, USB_DEVICE_ID_BERKSHIRE_PCWD, HID_QUIRK_IGNORE }, 388 { USB_VENDOR_ID_BERKSHIRE, USB_DEVICE_ID_BERKSHIRE_PCWD, HID_QUIRK_IGNORE },
320 { USB_VENDOR_ID_CIDC, 0x0103, HID_QUIRK_IGNORE }, 389 { USB_VENDOR_ID_CIDC, 0x0103, HID_QUIRK_IGNORE },
321 { USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_HIDCOM, HID_QUIRK_IGNORE }, 390 { USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_HIDCOM, HID_QUIRK_IGNORE },
@@ -463,6 +532,71 @@ static const struct hid_blacklist {
463 532
464 { USB_VENDOR_ID_DELL, USB_DEVICE_ID_DELL_W7658, HID_QUIRK_RESET_LEDS }, 533 { USB_VENDOR_ID_DELL, USB_DEVICE_ID_DELL_W7658, HID_QUIRK_RESET_LEDS },
465 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_KBD, HID_QUIRK_RESET_LEDS }, 534 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_KBD, HID_QUIRK_RESET_LEDS },
535 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY, HID_QUIRK_IGNORE },
536 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_2, HID_QUIRK_IGNORE },
537 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_3, HID_QUIRK_IGNORE },
538 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_4, HID_QUIRK_IGNORE },
539 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_5, HID_QUIRK_IGNORE },
540 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_6, HID_QUIRK_IGNORE },
541 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_7, HID_QUIRK_IGNORE },
542 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_8, HID_QUIRK_IGNORE },
543 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_9, HID_QUIRK_IGNORE },
544 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_10, HID_QUIRK_IGNORE },
545 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_11, HID_QUIRK_IGNORE },
546 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_12, HID_QUIRK_IGNORE },
547 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_13, HID_QUIRK_IGNORE },
548 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_14, HID_QUIRK_IGNORE },
549 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_15, HID_QUIRK_IGNORE },
550 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_16, HID_QUIRK_IGNORE },
551 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_17, HID_QUIRK_IGNORE },
552 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_18, HID_QUIRK_IGNORE },
553 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_19, HID_QUIRK_IGNORE },
554 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_20, HID_QUIRK_IGNORE },
555 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_21, HID_QUIRK_IGNORE },
556 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_22, HID_QUIRK_IGNORE },
557 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_23, HID_QUIRK_IGNORE },
558 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_24, HID_QUIRK_IGNORE },
559 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_25, HID_QUIRK_IGNORE },
560 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_26, HID_QUIRK_IGNORE },
561 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_27, HID_QUIRK_IGNORE },
562 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_28, HID_QUIRK_IGNORE },
563 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_29, HID_QUIRK_IGNORE },
564 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_30, HID_QUIRK_IGNORE },
565 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_31, HID_QUIRK_IGNORE },
566 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_32, HID_QUIRK_IGNORE },
567 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_33, HID_QUIRK_IGNORE },
568 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_34, HID_QUIRK_IGNORE },
569 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_35, HID_QUIRK_IGNORE },
570 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_36, HID_QUIRK_IGNORE },
571 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_37, HID_QUIRK_IGNORE },
572 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_38, HID_QUIRK_IGNORE },
573 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_39, HID_QUIRK_IGNORE },
574 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_40, HID_QUIRK_IGNORE },
575 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_41, HID_QUIRK_IGNORE },
576 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_42, HID_QUIRK_IGNORE },
577 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_43, HID_QUIRK_IGNORE },
578 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_44, HID_QUIRK_IGNORE },
579 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_45, HID_QUIRK_IGNORE },
580 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_46, HID_QUIRK_IGNORE },
581 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_47, HID_QUIRK_IGNORE },
582 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_48, HID_QUIRK_IGNORE },
583 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_49, HID_QUIRK_IGNORE },
584 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_50, HID_QUIRK_IGNORE },
585 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_51, HID_QUIRK_IGNORE },
586 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_52, HID_QUIRK_IGNORE },
587 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_53, HID_QUIRK_IGNORE },
588 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_54, HID_QUIRK_IGNORE },
589 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_55, HID_QUIRK_IGNORE },
590 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_56, HID_QUIRK_IGNORE },
591 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_57, HID_QUIRK_IGNORE },
592 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_58, HID_QUIRK_IGNORE },
593 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_59, HID_QUIRK_IGNORE },
594 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_60, HID_QUIRK_IGNORE },
595 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_61, HID_QUIRK_IGNORE },
596 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_62, HID_QUIRK_IGNORE },
597 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_63, HID_QUIRK_IGNORE },
598 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_64, HID_QUIRK_IGNORE },
599 { USB_VENDOR_ID_NATIONAL_SEMICONDUCTOR, USB_DEVICE_ID_N_S_HARMONY, HID_QUIRK_IGNORE },
466 600
467 { 0, 0 } 601 { 0, 0 }
468}; 602};
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index dbdca6f10e46..192953b29b28 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -520,6 +520,16 @@ config SENSORS_SMSC47B397
520 This driver can also be built as a module. If so, the module 520 This driver can also be built as a module. If so, the module
521 will be called smsc47b397. 521 will be called smsc47b397.
522 522
523config SENSORS_THMC50
524 tristate "Texas Instruments THMC50 / Analog Devices ADM1022"
525 depends on I2C && EXPERIMENTAL
526 help
527 If you say yes here you get support for Texas Instruments THMC50
528 sensor chips and clones: the Analog Devices ADM1022.
529
530 This driver can also be built as a module. If so, the module
531 will be called thmc50.
532
523config SENSORS_VIA686A 533config SENSORS_VIA686A
524 tristate "VIA686A" 534 tristate "VIA686A"
525 depends on PCI 535 depends on PCI
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 59f81fae40a0..d04f90031ebf 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_SENSORS_SIS5595) += sis5595.o
56obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o 56obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o
57obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o 57obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o
58obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o 58obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o
59obj-$(CONFIG_SENSORS_THMC50) += thmc50.o
59obj-$(CONFIG_SENSORS_VIA686A) += via686a.o 60obj-$(CONFIG_SENSORS_VIA686A) += via686a.o
60obj-$(CONFIG_SENSORS_VT1211) += vt1211.o 61obj-$(CONFIG_SENSORS_VT1211) += vt1211.o
61obj-$(CONFIG_SENSORS_VT8231) += vt8231.o 62obj-$(CONFIG_SENSORS_VT8231) += vt8231.o
diff --git a/drivers/hwmon/abituguru3.c b/drivers/hwmon/abituguru3.c
index a003d104ca45..cdd8b6dea16d 100644
--- a/drivers/hwmon/abituguru3.c
+++ b/drivers/hwmon/abituguru3.c
@@ -691,8 +691,9 @@ static int abituguru3_read(struct abituguru3_data *data, u8 bank, u8 offset,
691 691
692/* Sensor settings are stored 1 byte per offset with the bytes 692/* Sensor settings are stored 1 byte per offset with the bytes
693 placed add consecutive offsets. */ 693 placed add consecutive offsets. */
694int abituguru3_read_increment_offset(struct abituguru3_data *data, u8 bank, 694static int abituguru3_read_increment_offset(struct abituguru3_data *data,
695 u8 offset, u8 count, u8 *buf, int offset_count) 695 u8 bank, u8 offset, u8 count,
696 u8 *buf, int offset_count)
696{ 697{
697 int i, x; 698 int i, x;
698 699
diff --git a/drivers/hwmon/ams/ams-core.c b/drivers/hwmon/ams/ams-core.c
index 6db973739725..a112a03e8f29 100644
--- a/drivers/hwmon/ams/ams-core.c
+++ b/drivers/hwmon/ams/ams-core.c
@@ -23,7 +23,6 @@
23#include <linux/types.h> 23#include <linux/types.h>
24#include <linux/errno.h> 24#include <linux/errno.h>
25#include <linux/init.h> 25#include <linux/init.h>
26#include <linux/module.h>
27#include <asm/pmac_pfunc.h> 26#include <asm/pmac_pfunc.h>
28#include <asm/of_platform.h> 27#include <asm/of_platform.h>
29 28
diff --git a/drivers/hwmon/applesmc.c b/drivers/hwmon/applesmc.c
index fd1281f42209..941729a131f5 100644
--- a/drivers/hwmon/applesmc.c
+++ b/drivers/hwmon/applesmc.c
@@ -79,11 +79,15 @@
79 79
80/* 80/*
81 * Temperature sensors keys (sp78 - 2 bytes). 81 * Temperature sensors keys (sp78 - 2 bytes).
82 * First set for Macbook(Pro), second for Macmini.
83 */ 82 */
84static const char* temperature_sensors_sets[][13] = { 83static const char* temperature_sensors_sets[][13] = {
84/* Set 0: Macbook Pro */
85 { "TA0P", "TB0T", "TC0D", "TC0P", "TG0H", "TG0P", "TG0T", "Th0H", 85 { "TA0P", "TB0T", "TC0D", "TC0P", "TG0H", "TG0P", "TG0T", "Th0H",
86 "Th1H", "Tm0P", "Ts0P", "Ts1P", NULL }, 86 "Th1H", "Tm0P", "Ts0P", "Ts1P", NULL },
87/* Set 1: Macbook set */
88 { "TB0T", "TC0D", "TC0P", "TM0P", "TN0P", "TN1P", "Th0H", "Th0S",
89 "Th1H", "Ts0P", NULL },
90/* Set 2: Macmini set */
87 { "TC0D", "TC0P", NULL } 91 { "TC0D", "TC0P", NULL }
88}; 92};
89 93
@@ -1150,10 +1154,10 @@ static void applesmc_release_accelerometer(void)
1150static __initdata struct dmi_match_data applesmc_dmi_data[] = { 1154static __initdata struct dmi_match_data applesmc_dmi_data[] = {
1151/* MacBook Pro: accelerometer, backlight and temperature set 0 */ 1155/* MacBook Pro: accelerometer, backlight and temperature set 0 */
1152 { .accelerometer = 1, .light = 1, .temperature_set = 0 }, 1156 { .accelerometer = 1, .light = 1, .temperature_set = 0 },
1153/* MacBook: accelerometer and temperature set 0 */ 1157/* MacBook: accelerometer and temperature set 1 */
1154 { .accelerometer = 1, .light = 0, .temperature_set = 0 }, 1158 { .accelerometer = 1, .light = 0, .temperature_set = 1 },
1155/* MacBook: temperature set 1 */ 1159/* MacMini: temperature set 2 */
1156 { .accelerometer = 0, .light = 0, .temperature_set = 1 } 1160 { .accelerometer = 0, .light = 0, .temperature_set = 2 },
1157}; 1161};
1158 1162
1159/* Note that DMI_MATCH(...,"MacBook") will match "MacBookPro1,1". 1163/* Note that DMI_MATCH(...,"MacBook") will match "MacBookPro1,1".
diff --git a/drivers/hwmon/dme1737.c b/drivers/hwmon/dme1737.c
index be3aaa5d0b91..e9cbc727664d 100644
--- a/drivers/hwmon/dme1737.c
+++ b/drivers/hwmon/dme1737.c
@@ -750,7 +750,7 @@ static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
750 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01; 750 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01;
751 break; 751 break;
752 case SYS_TEMP_FAULT: 752 case SYS_TEMP_FAULT:
753 res = (data->temp[ix] == 0x0800); 753 res = (((u16)data->temp[ix] & 0xff00) == 0x8000);
754 break; 754 break;
755 default: 755 default:
756 res = 0; 756 res = 0;
diff --git a/drivers/hwmon/fscher.c b/drivers/hwmon/fscher.c
index 19717752cfca..b34b546c68b8 100644
--- a/drivers/hwmon/fscher.c
+++ b/drivers/hwmon/fscher.c
@@ -441,6 +441,8 @@ static struct fscher_data *fscher_update_device(struct device *dev)
441 data->watchdog[2] = fscher_read_value(client, FSCHER_REG_WDOG_CONTROL); 441 data->watchdog[2] = fscher_read_value(client, FSCHER_REG_WDOG_CONTROL);
442 442
443 data->global_event = fscher_read_value(client, FSCHER_REG_EVENT_STATE); 443 data->global_event = fscher_read_value(client, FSCHER_REG_EVENT_STATE);
444 data->global_control = fscher_read_value(client,
445 FSCHER_REG_CONTROL);
444 446
445 data->last_updated = jiffies; 447 data->last_updated = jiffies;
446 data->valid = 1; 448 data->valid = 1;
@@ -599,7 +601,7 @@ static ssize_t set_control(struct i2c_client *client, struct fscher_data *data,
599 unsigned long v = simple_strtoul(buf, NULL, 10) & 0x01; 601 unsigned long v = simple_strtoul(buf, NULL, 10) & 0x01;
600 602
601 mutex_lock(&data->update_lock); 603 mutex_lock(&data->update_lock);
602 data->global_control &= ~v; 604 data->global_control = v;
603 fscher_write_value(client, reg, v); 605 fscher_write_value(client, reg, v);
604 mutex_unlock(&data->update_lock); 606 mutex_unlock(&data->update_lock);
605 return count; 607 return count;
diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c
index eff6036e15c0..d75dba9b810b 100644
--- a/drivers/hwmon/it87.c
+++ b/drivers/hwmon/it87.c
@@ -252,7 +252,7 @@ struct it87_data {
252 252
253 253
254static int it87_probe(struct platform_device *pdev); 254static int it87_probe(struct platform_device *pdev);
255static int it87_remove(struct platform_device *pdev); 255static int __devexit it87_remove(struct platform_device *pdev);
256 256
257static int it87_read_value(struct it87_data *data, u8 reg); 257static int it87_read_value(struct it87_data *data, u8 reg);
258static void it87_write_value(struct it87_data *data, u8 reg, u8 value); 258static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
diff --git a/drivers/hwmon/lm78.c b/drivers/hwmon/lm78.c
index 9fb572f03ba5..565c4e679b8d 100644
--- a/drivers/hwmon/lm78.c
+++ b/drivers/hwmon/lm78.c
@@ -864,7 +864,7 @@ static int __init lm78_isa_found(unsigned short address)
864 /* Determine the chip type */ 864 /* Determine the chip type */
865 outb_p(LM78_REG_CHIPID, address + LM78_ADDR_REG_OFFSET); 865 outb_p(LM78_REG_CHIPID, address + LM78_ADDR_REG_OFFSET);
866 val = inb_p(address + LM78_DATA_REG_OFFSET); 866 val = inb_p(address + LM78_DATA_REG_OFFSET);
867 if (val == 0x00 /* LM78 */ 867 if (val == 0x00 || val == 0x20 /* LM78 */
868 || val == 0x40 /* LM78-J */ 868 || val == 0x40 /* LM78-J */
869 || (val & 0xfe) == 0xc0) /* LM79 */ 869 || (val & 0xfe) == 0xc0) /* LM79 */
870 found = 1; 870 found = 1;
diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c
index 48833fff4920..af541d67245d 100644
--- a/drivers/hwmon/lm90.c
+++ b/drivers/hwmon/lm90.c
@@ -585,7 +585,7 @@ static int lm90_detect(struct i2c_adapter *adapter, int address, int kind)
585 * those of the man_id register. 585 * those of the man_id register.
586 */ 586 */
587 if (chip_id == man_id 587 if (chip_id == man_id
588 && (address == 0x4F || address == 0x4D) 588 && (address == 0x4C || address == 0x4D)
589 && (reg_config1 & 0x1F) == (man_id & 0x0F) 589 && (reg_config1 & 0x1F) == (man_id & 0x0F)
590 && reg_convrate <= 0x09) { 590 && reg_convrate <= 0x09) {
591 kind = max6657; 591 kind = max6657;
diff --git a/drivers/hwmon/lm93.c b/drivers/hwmon/lm93.c
index 23edf4fe4221..d84f8bf6f284 100644
--- a/drivers/hwmon/lm93.c
+++ b/drivers/hwmon/lm93.c
@@ -234,7 +234,7 @@ struct lm93_data {
234 struct { 234 struct {
235 u8 min; 235 u8 min;
236 u8 max; 236 u8 max;
237 } temp_lim[3]; 237 } temp_lim[4];
238 238
239 /* vin1 - vin16: low and high limits */ 239 /* vin1 - vin16: low and high limits */
240 struct { 240 struct {
diff --git a/drivers/hwmon/pc87360.c b/drivers/hwmon/pc87360.c
index cb72526c346a..f57c75d59a5b 100644
--- a/drivers/hwmon/pc87360.c
+++ b/drivers/hwmon/pc87360.c
@@ -220,7 +220,7 @@ struct pc87360_data {
220 */ 220 */
221 221
222static int pc87360_probe(struct platform_device *pdev); 222static int pc87360_probe(struct platform_device *pdev);
223static int pc87360_remove(struct platform_device *pdev); 223static int __devexit pc87360_remove(struct platform_device *pdev);
224 224
225static int pc87360_read_value(struct pc87360_data *data, u8 ldi, u8 bank, 225static int pc87360_read_value(struct pc87360_data *data, u8 ldi, u8 bank,
226 u8 reg); 226 u8 reg);
diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c
index 83321b28cf0e..92956eb3f3c1 100644
--- a/drivers/hwmon/sis5595.c
+++ b/drivers/hwmon/sis5595.c
@@ -187,7 +187,7 @@ struct sis5595_data {
187static struct pci_dev *s_bridge; /* pointer to the (only) sis5595 */ 187static struct pci_dev *s_bridge; /* pointer to the (only) sis5595 */
188 188
189static int sis5595_probe(struct platform_device *pdev); 189static int sis5595_probe(struct platform_device *pdev);
190static int sis5595_remove(struct platform_device *pdev); 190static int __devexit sis5595_remove(struct platform_device *pdev);
191 191
192static int sis5595_read_value(struct sis5595_data *data, u8 reg); 192static int sis5595_read_value(struct sis5595_data *data, u8 reg);
193static void sis5595_write_value(struct sis5595_data *data, u8 reg, u8 value); 193static void sis5595_write_value(struct sis5595_data *data, u8 reg, u8 value);
diff --git a/drivers/hwmon/smsc47m1.c b/drivers/hwmon/smsc47m1.c
index 1de2f2be8708..338ee4f54614 100644
--- a/drivers/hwmon/smsc47m1.c
+++ b/drivers/hwmon/smsc47m1.c
@@ -134,7 +134,7 @@ struct smsc47m1_sio_data {
134 134
135 135
136static int smsc47m1_probe(struct platform_device *pdev); 136static int smsc47m1_probe(struct platform_device *pdev);
137static int smsc47m1_remove(struct platform_device *pdev); 137static int __devexit smsc47m1_remove(struct platform_device *pdev);
138static struct smsc47m1_data *smsc47m1_update_device(struct device *dev, 138static struct smsc47m1_data *smsc47m1_update_device(struct device *dev,
139 int init); 139 int init);
140 140
diff --git a/drivers/hwmon/thmc50.c b/drivers/hwmon/thmc50.c
new file mode 100644
index 000000000000..9395b52d9b99
--- /dev/null
+++ b/drivers/hwmon/thmc50.c
@@ -0,0 +1,440 @@
1/*
2 thmc50.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (C) 2007 Krzysztof Helt <krzysztof.h1@wp.pl>
5 Based on 2.4 driver by Frodo Looijaard <frodol@dds.nl> and
6 Philip Edelbrock <phil@netroedge.com>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21*/
22
23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/slab.h>
26#include <linux/i2c.h>
27#include <linux/hwmon.h>
28#include <linux/hwmon-sysfs.h>
29#include <linux/err.h>
30#include <linux/mutex.h>
31
32MODULE_LICENSE("GPL");
33
34/* Addresses to scan */
35static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
36
37/* Insmod parameters */
38I2C_CLIENT_INSMOD_2(thmc50, adm1022);
39I2C_CLIENT_MODULE_PARM(adm1022_temp3, "List of adapter,address pairs "
40 "to enable 3rd temperature (ADM1022 only)");
41
42/* Many THMC50 constants specified below */
43
44/* The THMC50 registers */
45#define THMC50_REG_CONF 0x40
46#define THMC50_REG_COMPANY_ID 0x3E
47#define THMC50_REG_DIE_CODE 0x3F
48#define THMC50_REG_ANALOG_OUT 0x19
49
50const static u8 THMC50_REG_TEMP[] = { 0x27, 0x26, 0x20 };
51const static u8 THMC50_REG_TEMP_MIN[] = { 0x3A, 0x38, 0x2C };
52const static u8 THMC50_REG_TEMP_MAX[] = { 0x39, 0x37, 0x2B };
53
54#define THMC50_REG_CONF_nFANOFF 0x20
55
56/* Each client has this additional data */
57struct thmc50_data {
58 struct i2c_client client;
59 struct class_device *class_dev;
60
61 struct mutex update_lock;
62 enum chips type;
63 unsigned long last_updated; /* In jiffies */
64 char has_temp3; /* !=0 if it is ADM1022 in temp3 mode */
65 char valid; /* !=0 if following fields are valid */
66
67 /* Register values */
68 s8 temp_input[3];
69 s8 temp_max[3];
70 s8 temp_min[3];
71 u8 analog_out;
72};
73
74static int thmc50_attach_adapter(struct i2c_adapter *adapter);
75static int thmc50_detach_client(struct i2c_client *client);
76static void thmc50_init_client(struct i2c_client *client);
77static struct thmc50_data *thmc50_update_device(struct device *dev);
78
79static struct i2c_driver thmc50_driver = {
80 .driver = {
81 .name = "thmc50",
82 },
83 .attach_adapter = thmc50_attach_adapter,
84 .detach_client = thmc50_detach_client,
85};
86
87static ssize_t show_analog_out(struct device *dev,
88 struct device_attribute *attr, char *buf)
89{
90 struct thmc50_data *data = thmc50_update_device(dev);
91 return sprintf(buf, "%d\n", data->analog_out);
92}
93
94static ssize_t set_analog_out(struct device *dev,
95 struct device_attribute *attr,
96 const char *buf, size_t count)
97{
98 struct i2c_client *client = to_i2c_client(dev);
99 struct thmc50_data *data = i2c_get_clientdata(client);
100 int tmp = simple_strtoul(buf, NULL, 10);
101 int config;
102
103 mutex_lock(&data->update_lock);
104 data->analog_out = SENSORS_LIMIT(tmp, 0, 255);
105 i2c_smbus_write_byte_data(client, THMC50_REG_ANALOG_OUT,
106 data->analog_out);
107
108 config = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
109 if (data->analog_out == 0)
110 config &= ~THMC50_REG_CONF_nFANOFF;
111 else
112 config |= THMC50_REG_CONF_nFANOFF;
113 i2c_smbus_write_byte_data(client, THMC50_REG_CONF, config);
114
115 mutex_unlock(&data->update_lock);
116 return count;
117}
118
119/* There is only one PWM mode = DC */
120static ssize_t show_pwm_mode(struct device *dev, struct device_attribute *attr,
121 char *buf)
122{
123 return sprintf(buf, "0\n");
124}
125
126/* Temperatures */
127static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
128 char *buf)
129{
130 int nr = to_sensor_dev_attr(attr)->index;
131 struct thmc50_data *data = thmc50_update_device(dev);
132 return sprintf(buf, "%d\n", data->temp_input[nr] * 1000);
133}
134
135static ssize_t show_temp_min(struct device *dev, struct device_attribute *attr,
136 char *buf)
137{
138 int nr = to_sensor_dev_attr(attr)->index;
139 struct thmc50_data *data = thmc50_update_device(dev);
140 return sprintf(buf, "%d\n", data->temp_min[nr] * 1000);
141}
142
143static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
144 const char *buf, size_t count)
145{
146 int nr = to_sensor_dev_attr(attr)->index;
147 struct i2c_client *client = to_i2c_client(dev);
148 struct thmc50_data *data = i2c_get_clientdata(client);
149 int val = simple_strtol(buf, NULL, 10);
150
151 mutex_lock(&data->update_lock);
152 data->temp_min[nr] = SENSORS_LIMIT(val / 1000, -128, 127);
153 i2c_smbus_write_byte_data(client, THMC50_REG_TEMP_MIN[nr],
154 data->temp_min[nr]);
155 mutex_unlock(&data->update_lock);
156 return count;
157}
158
159static ssize_t show_temp_max(struct device *dev, struct device_attribute *attr,
160 char *buf)
161{
162 int nr = to_sensor_dev_attr(attr)->index;
163 struct thmc50_data *data = thmc50_update_device(dev);
164 return sprintf(buf, "%d\n", data->temp_max[nr] * 1000);
165}
166
167static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
168 const char *buf, size_t count)
169{
170 int nr = to_sensor_dev_attr(attr)->index;
171 struct i2c_client *client = to_i2c_client(dev);
172 struct thmc50_data *data = i2c_get_clientdata(client);
173 int val = simple_strtol(buf, NULL, 10);
174
175 mutex_lock(&data->update_lock);
176 data->temp_max[nr] = SENSORS_LIMIT(val / 1000, -128, 127);
177 i2c_smbus_write_byte_data(client, THMC50_REG_TEMP_MAX[nr],
178 data->temp_max[nr]);
179 mutex_unlock(&data->update_lock);
180 return count;
181}
182
183#define temp_reg(offset) \
184static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_temp, \
185 NULL, offset - 1); \
186static SENSOR_DEVICE_ATTR(temp##offset##_min, S_IRUGO | S_IWUSR, \
187 show_temp_min, set_temp_min, offset - 1); \
188static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
189 show_temp_max, set_temp_max, offset - 1);
190
191temp_reg(1);
192temp_reg(2);
193temp_reg(3);
194
195static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_analog_out,
196 set_analog_out, 0);
197static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
198
199static struct attribute *thmc50_attributes[] = {
200 &sensor_dev_attr_temp1_max.dev_attr.attr,
201 &sensor_dev_attr_temp1_min.dev_attr.attr,
202 &sensor_dev_attr_temp1_input.dev_attr.attr,
203 &sensor_dev_attr_temp2_max.dev_attr.attr,
204 &sensor_dev_attr_temp2_min.dev_attr.attr,
205 &sensor_dev_attr_temp2_input.dev_attr.attr,
206 &sensor_dev_attr_pwm1.dev_attr.attr,
207 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
208 NULL
209};
210
211static const struct attribute_group thmc50_group = {
212 .attrs = thmc50_attributes,
213};
214
215/* for ADM1022 3rd temperature mode */
216static struct attribute *adm1022_attributes[] = {
217 &sensor_dev_attr_temp3_max.dev_attr.attr,
218 &sensor_dev_attr_temp3_min.dev_attr.attr,
219 &sensor_dev_attr_temp3_input.dev_attr.attr,
220 NULL
221};
222
223static const struct attribute_group adm1022_group = {
224 .attrs = adm1022_attributes,
225};
226
227static int thmc50_detect(struct i2c_adapter *adapter, int address, int kind)
228{
229 unsigned company;
230 unsigned revision;
231 unsigned config;
232 struct i2c_client *client;
233 struct thmc50_data *data;
234 struct device *dev;
235 int err = 0;
236 const char *type_name = "";
237
238 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
239 pr_debug("thmc50: detect failed, "
240 "smbus byte data not supported!\n");
241 goto exit;
242 }
243
244 /* OK. For now, we presume we have a valid client. We now create the
245 client structure, even though we cannot fill it completely yet.
246 But it allows us to access thmc50 registers. */
247 if (!(data = kzalloc(sizeof(struct thmc50_data), GFP_KERNEL))) {
248 pr_debug("thmc50: detect failed, kzalloc failed!\n");
249 err = -ENOMEM;
250 goto exit;
251 }
252
253 client = &data->client;
254 i2c_set_clientdata(client, data);
255 client->addr = address;
256 client->adapter = adapter;
257 client->driver = &thmc50_driver;
258 dev = &client->dev;
259
260 pr_debug("thmc50: Probing for THMC50 at 0x%2X on bus %d\n",
261 client->addr, i2c_adapter_id(client->adapter));
262
263 /* Now, we do the remaining detection. */
264 company = i2c_smbus_read_byte_data(client, THMC50_REG_COMPANY_ID);
265 revision = i2c_smbus_read_byte_data(client, THMC50_REG_DIE_CODE);
266 config = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
267
268 if (kind == 0)
269 kind = thmc50;
270 else if (kind < 0) {
271 err = -ENODEV;
272 if (revision >= 0xc0 && ((config & 0x10) == 0)) {
273 if (company == 0x49) {
274 kind = thmc50;
275 err = 0;
276 } else if (company == 0x41) {
277 kind = adm1022;
278 err = 0;
279 }
280 }
281 }
282 if (err == -ENODEV) {
283 pr_debug("thmc50: Detection of THMC50/ADM1022 failed\n");
284 goto exit_free;
285 }
286 pr_debug("thmc50: Detected %s (version %x, revision %x)\n",
287 type_name, (revision >> 4) - 0xc, revision & 0xf);
288 data->type = kind;
289
290 if (kind == thmc50)
291 type_name = "thmc50";
292 else if (kind == adm1022) {
293 int id = i2c_adapter_id(client->adapter);
294 int i;
295
296 type_name = "adm1022";
297 data->has_temp3 = (config >> 7) & 1; /* config MSB */
298 for (i = 0; i + 1 < adm1022_temp3_num; i += 2)
299 if (adm1022_temp3[i] == id &&
300 adm1022_temp3[i + 1] == address) {
301 /* enable 2nd remote temp */
302 data->has_temp3 = 1;
303 break;
304 }
305 }
306
307 /* Fill in the remaining client fields & put it into the global list */
308 strlcpy(client->name, type_name, I2C_NAME_SIZE);
309 mutex_init(&data->update_lock);
310
311 /* Tell the I2C layer a new client has arrived */
312 if ((err = i2c_attach_client(client)))
313 goto exit_free;
314
315 thmc50_init_client(client);
316
317 /* Register sysfs hooks */
318 if ((err = sysfs_create_group(&client->dev.kobj, &thmc50_group)))
319 goto exit_detach;
320
321 /* Register ADM1022 sysfs hooks */
322 if (data->type == adm1022)
323 if ((err = sysfs_create_group(&client->dev.kobj,
324 &adm1022_group)))
325 goto exit_remove_sysfs_thmc50;
326
327 /* Register a new directory entry with module sensors */
328 data->class_dev = hwmon_device_register(&client->dev);
329 if (IS_ERR(data->class_dev)) {
330 err = PTR_ERR(data->class_dev);
331 goto exit_remove_sysfs;
332 }
333
334 return 0;
335
336exit_remove_sysfs:
337 if (data->type == adm1022)
338 sysfs_remove_group(&client->dev.kobj, &adm1022_group);
339exit_remove_sysfs_thmc50:
340 sysfs_remove_group(&client->dev.kobj, &thmc50_group);
341exit_detach:
342 i2c_detach_client(client);
343exit_free:
344 kfree(data);
345exit:
346 return err;
347}
348
349static int thmc50_attach_adapter(struct i2c_adapter *adapter)
350{
351 if (!(adapter->class & I2C_CLASS_HWMON))
352 return 0;
353 return i2c_probe(adapter, &addr_data, thmc50_detect);
354}
355
356static int thmc50_detach_client(struct i2c_client *client)
357{
358 struct thmc50_data *data = i2c_get_clientdata(client);
359 int err;
360
361 hwmon_device_unregister(data->class_dev);
362 sysfs_remove_group(&client->dev.kobj, &thmc50_group);
363 if (data->type == adm1022)
364 sysfs_remove_group(&client->dev.kobj, &adm1022_group);
365
366 if ((err = i2c_detach_client(client)))
367 return err;
368
369 kfree(data);
370
371 return 0;
372}
373
374static void thmc50_init_client(struct i2c_client *client)
375{
376 struct thmc50_data *data = i2c_get_clientdata(client);
377 int config;
378
379 data->analog_out = i2c_smbus_read_byte_data(client,
380 THMC50_REG_ANALOG_OUT);
381 /* set up to at least 1 */
382 if (data->analog_out == 0) {
383 data->analog_out = 1;
384 i2c_smbus_write_byte_data(client, THMC50_REG_ANALOG_OUT,
385 data->analog_out);
386 }
387 config = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
388 config |= 0x1; /* start the chip if it is in standby mode */
389 if (data->has_temp3)
390 config |= 0x80; /* enable 2nd remote temp */
391 i2c_smbus_write_byte_data(client, THMC50_REG_CONF, config);
392}
393
394static struct thmc50_data *thmc50_update_device(struct device *dev)
395{
396 struct i2c_client *client = to_i2c_client(dev);
397 struct thmc50_data *data = i2c_get_clientdata(client);
398 int timeout = HZ / 5 + (data->type == thmc50 ? HZ : 0);
399
400 mutex_lock(&data->update_lock);
401
402 if (time_after(jiffies, data->last_updated + timeout)
403 || !data->valid) {
404
405 int temps = data->has_temp3 ? 3 : 2;
406 int i;
407 for (i = 0; i < temps; i++) {
408 data->temp_input[i] = i2c_smbus_read_byte_data(client,
409 THMC50_REG_TEMP[i]);
410 data->temp_max[i] = i2c_smbus_read_byte_data(client,
411 THMC50_REG_TEMP_MAX[i]);
412 data->temp_min[i] = i2c_smbus_read_byte_data(client,
413 THMC50_REG_TEMP_MIN[i]);
414 }
415 data->analog_out =
416 i2c_smbus_read_byte_data(client, THMC50_REG_ANALOG_OUT);
417 data->last_updated = jiffies;
418 data->valid = 1;
419 }
420
421 mutex_unlock(&data->update_lock);
422
423 return data;
424}
425
426static int __init sm_thmc50_init(void)
427{
428 return i2c_add_driver(&thmc50_driver);
429}
430
431static void __exit sm_thmc50_exit(void)
432{
433 i2c_del_driver(&thmc50_driver);
434}
435
436MODULE_AUTHOR("Krzysztof Helt <krzysztof.h1@wp.pl>");
437MODULE_DESCRIPTION("THMC50 driver");
438
439module_init(sm_thmc50_init);
440module_exit(sm_thmc50_exit);
diff --git a/drivers/hwmon/via686a.c b/drivers/hwmon/via686a.c
index 24a6851491d0..696c8a2e5374 100644
--- a/drivers/hwmon/via686a.c
+++ b/drivers/hwmon/via686a.c
@@ -314,7 +314,7 @@ struct via686a_data {
314static struct pci_dev *s_bridge; /* pointer to the (only) via686a */ 314static struct pci_dev *s_bridge; /* pointer to the (only) via686a */
315 315
316static int via686a_probe(struct platform_device *pdev); 316static int via686a_probe(struct platform_device *pdev);
317static int via686a_remove(struct platform_device *pdev); 317static int __devexit via686a_remove(struct platform_device *pdev);
318 318
319static inline int via686a_read_value(struct via686a_data *data, u8 reg) 319static inline int via686a_read_value(struct via686a_data *data, u8 reg)
320{ 320{
diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c
index c604972f0186..3e63eaf19041 100644
--- a/drivers/hwmon/vt8231.c
+++ b/drivers/hwmon/vt8231.c
@@ -167,7 +167,7 @@ struct vt8231_data {
167 167
168static struct pci_dev *s_bridge; 168static struct pci_dev *s_bridge;
169static int vt8231_probe(struct platform_device *pdev); 169static int vt8231_probe(struct platform_device *pdev);
170static int vt8231_remove(struct platform_device *pdev); 170static int __devexit vt8231_remove(struct platform_device *pdev);
171static struct vt8231_data *vt8231_update_device(struct device *dev); 171static struct vt8231_data *vt8231_update_device(struct device *dev);
172static void vt8231_init_device(struct vt8231_data *data); 172static void vt8231_init_device(struct vt8231_data *data);
173 173
@@ -751,7 +751,7 @@ exit_release:
751 return err; 751 return err;
752} 752}
753 753
754static int vt8231_remove(struct platform_device *pdev) 754static int __devexit vt8231_remove(struct platform_device *pdev)
755{ 755{
756 struct vt8231_data *data = platform_get_drvdata(pdev); 756 struct vt8231_data *data = platform_get_drvdata(pdev);
757 int i; 757 int i;
diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c
index 1ce78179b005..7a4a15f4bf8b 100644
--- a/drivers/hwmon/w83627hf.c
+++ b/drivers/hwmon/w83627hf.c
@@ -387,7 +387,7 @@ struct w83627hf_sio_data {
387 387
388 388
389static int w83627hf_probe(struct platform_device *pdev); 389static int w83627hf_probe(struct platform_device *pdev);
390static int w83627hf_remove(struct platform_device *pdev); 390static int __devexit w83627hf_remove(struct platform_device *pdev);
391 391
392static int w83627hf_read_value(struct w83627hf_data *data, u16 reg); 392static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
393static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value); 393static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index b1a9b81c211f..e049f65bc3a2 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -833,7 +833,7 @@ config BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ
833 depends on BLK_DEV_IDE_AU1XXX 833 depends on BLK_DEV_IDE_AU1XXX
834 834
835config IDE_ARM 835config IDE_ARM
836 def_bool ARM && (ARCH_A5K || ARCH_CLPS7500 || ARCH_RPC || ARCH_SHARK) 836 def_bool ARM && (ARCH_CLPS7500 || ARCH_RPC || ARCH_SHARK)
837 837
838config BLK_DEV_IDE_ICSIDE 838config BLK_DEV_IDE_ICSIDE
839 tristate "ICS IDE interface support" 839 tristate "ICS IDE interface support"
diff --git a/drivers/ide/arm/icside.c b/drivers/ide/arm/icside.c
index c89b5f4b2d04..8a9b98fcb66d 100644
--- a/drivers/ide/arm/icside.c
+++ b/drivers/ide/arm/icside.c
@@ -693,13 +693,12 @@ icside_probe(struct expansion_card *ec, const struct ecard_id *id)
693 if (ret) 693 if (ret)
694 goto out; 694 goto out;
695 695
696 state = kmalloc(sizeof(struct icside_state), GFP_KERNEL); 696 state = kzalloc(sizeof(struct icside_state), GFP_KERNEL);
697 if (!state) { 697 if (!state) {
698 ret = -ENOMEM; 698 ret = -ENOMEM;
699 goto release; 699 goto release;
700 } 700 }
701 701
702 memset(state, 0, sizeof(state));
703 state->type = ICS_TYPE_NOTYPE; 702 state->type = ICS_TYPE_NOTYPE;
704 state->dev = &ec->dev; 703 state->dev = &ec->dev;
705 704
diff --git a/drivers/ide/arm/ide_arm.c b/drivers/ide/arm/ide_arm.c
index a3d6744e870a..bce2bec81413 100644
--- a/drivers/ide/arm/ide_arm.c
+++ b/drivers/ide/arm/ide_arm.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * ARM/ARM26 default IDE host driver 2 * ARM default IDE host driver
3 * 3 *
4 * Copyright (C) 2004 Bartlomiej Zolnierkiewicz 4 * Copyright (C) 2004 Bartlomiej Zolnierkiewicz
5 * Based on code by: Russell King, Ian Molton and Alexander Schulz. 5 * Based on code by: Russell King, Ian Molton and Alexander Schulz.
@@ -14,12 +14,6 @@
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
15#include <asm/irq.h> 15#include <asm/irq.h>
16 16
17#ifdef CONFIG_ARM26
18# define IDE_ARM_HOST (machine_is_a5k())
19#else
20# define IDE_ARM_HOST (1)
21#endif
22
23#ifdef CONFIG_ARCH_CLPS7500 17#ifdef CONFIG_ARCH_CLPS7500
24# include <asm/arch/hardware.h> 18# include <asm/arch/hardware.h>
25# 19#
@@ -32,12 +26,10 @@
32 26
33void __init ide_arm_init(void) 27void __init ide_arm_init(void)
34{ 28{
35 if (IDE_ARM_HOST) { 29 hw_regs_t hw;
36 hw_regs_t hw;
37 30
38 memset(&hw, 0, sizeof(hw)); 31 memset(&hw, 0, sizeof(hw));
39 ide_std_init_ports(&hw, IDE_ARM_IO, IDE_ARM_IO + 0x206); 32 ide_std_init_ports(&hw, IDE_ARM_IO, IDE_ARM_IO + 0x206);
40 hw.irq = IDE_ARM_IRQ; 33 hw.irq = IDE_ARM_IRQ;
41 ide_register_hw(&hw, 1, NULL); 34 ide_register_hw(&hw, 1, NULL);
42 }
43} 35}
diff --git a/drivers/ide/ide-tape.c b/drivers/ide/ide-tape.c
index e82bfa5e0ab8..1fa57947bca0 100644
--- a/drivers/ide/ide-tape.c
+++ b/drivers/ide/ide-tape.c
@@ -640,7 +640,7 @@ typedef enum {
640} idetape_chrdev_direction_t; 640} idetape_chrdev_direction_t;
641 641
642struct idetape_bh { 642struct idetape_bh {
643 unsigned short b_size; 643 u32 b_size;
644 atomic_t b_count; 644 atomic_t b_count;
645 struct idetape_bh *b_reqnext; 645 struct idetape_bh *b_reqnext;
646 char *b_data; 646 char *b_data;
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index 5511c86733dc..025689de50e9 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -593,7 +593,7 @@ static struct dmi_system_id cable_dmi_table[] = {
593 .ident = "HP Pavilion N5430", 593 .ident = "HP Pavilion N5430",
594 .matches = { 594 .matches = {
595 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 595 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
596 DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"), 596 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
597 }, 597 },
598 }, 598 },
599 { } 599 { }
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 19633c5aba15..0e3b5de26e69 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -475,11 +475,11 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
475 switch (rev) { 475 switch (rev) {
476 case 0x07: 476 case 0x07:
477 case 0x05: 477 case 0x05:
478 printk("%s: UltraDMA capable", name); 478 printk("%s: UltraDMA capable\n", name);
479 break; 479 break;
480 case 0x03: 480 case 0x03:
481 default: 481 default:
482 printk("%s: MultiWord DMA force limited", name); 482 printk("%s: MultiWord DMA force limited\n", name);
483 break; 483 break;
484 case 0x01: 484 case 0x01:
485 printk("%s: MultiWord DMA limited, " 485 printk("%s: MultiWord DMA limited, "
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index bccedf9b8b28..b89e81656875 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -133,7 +133,7 @@ static void cs5520_tune_drive(ide_drive_t *drive, u8 pio)
133static int cs5520_config_drive_xfer_rate(ide_drive_t *drive) 133static int cs5520_config_drive_xfer_rate(ide_drive_t *drive)
134{ 134{
135 /* Tune the drive for PIO modes up to PIO 4 */ 135 /* Tune the drive for PIO modes up to PIO 4 */
136 cs5520_tune_drive(drive, 4); 136 cs5520_tune_drive(drive, 255);
137 137
138 /* Then tell the core to use DMA operations */ 138 /* Then tell the core to use DMA operations */
139 return 0; 139 return 0;
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c
index ce44e38390aa..082ca7da2cbc 100644
--- a/drivers/ide/pci/cs5535.c
+++ b/drivers/ide/pci/cs5535.c
@@ -2,6 +2,7 @@
2 * linux/drivers/ide/pci/cs5535.c 2 * linux/drivers/ide/pci/cs5535.c
3 * 3 *
4 * Copyright (C) 2004-2005 Advanced Micro Devices, Inc. 4 * Copyright (C) 2004-2005 Advanced Micro Devices, Inc.
5 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
5 * 6 *
6 * History: 7 * History:
7 * 09/20/2005 - Jaya Kumar <jayakumar.ide@gmail.com> 8 * 09/20/2005 - Jaya Kumar <jayakumar.ide@gmail.com>
@@ -83,14 +84,17 @@ static void cs5535_set_speed(ide_drive_t *drive, u8 speed)
83 84
84 /* Set the PIO timings */ 85 /* Set the PIO timings */
85 if ((speed & XFER_MODE) == XFER_PIO) { 86 if ((speed & XFER_MODE) == XFER_PIO) {
86 u8 pioa; 87 ide_drive_t *pair = &drive->hwif->drives[drive->dn ^ 1];
87 u8 piob; 88 u8 cmd, pioa;
88 u8 cmd;
89 89
90 pioa = speed - XFER_PIO_0; 90 cmd = pioa = speed - XFER_PIO_0;
91 piob = ide_get_best_pio_mode(&(drive->hwif->drives[!unit]), 91
92 255, 4); 92 if (pair->present) {
93 cmd = pioa < piob ? pioa : piob; 93 u8 piob = ide_get_best_pio_mode(pair, 255, 4);
94
95 if (piob < cmd)
96 cmd = piob;
97 }
94 98
95 /* Write the speed of the current drive */ 99 /* Write the speed of the current drive */
96 reg = (cs5535_pio_cmd_timings[cmd] << 16) | 100 reg = (cs5535_pio_cmd_timings[cmd] << 16) |
@@ -116,7 +120,7 @@ static void cs5535_set_speed(ide_drive_t *drive, u8 speed)
116 120
117 reg &= 0x80000000UL; /* Preserve the PIO format bit */ 121 reg &= 0x80000000UL; /* Preserve the PIO format bit */
118 122
119 if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_7) 123 if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_4)
120 reg |= cs5535_udma_timings[speed - XFER_UDMA_0]; 124 reg |= cs5535_udma_timings[speed - XFER_UDMA_0];
121 else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) 125 else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
122 reg |= cs5535_mwdma_timings[speed - XFER_MW_DMA_0]; 126 reg |= cs5535_mwdma_timings[speed - XFER_MW_DMA_0];
@@ -151,32 +155,22 @@ static int cs5535_set_drive(ide_drive_t *drive, u8 speed)
151 * 155 *
152 * A callback from the upper layers for PIO-only tuning. 156 * A callback from the upper layers for PIO-only tuning.
153 */ 157 */
154static void cs5535_tuneproc(ide_drive_t *drive, u8 xferspeed) 158static void cs5535_tuneproc(ide_drive_t *drive, u8 pio)
155{ 159{
156 u8 modes[] = { XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3, 160 pio = ide_get_best_pio_mode(drive, pio, 4);
157 XFER_PIO_4 }; 161 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
158 162 cs5535_set_speed(drive, XFER_PIO_0 + pio);
159 /* cs5535 max pio is pio 4, best_pio will check the blacklist.
160 i think we don't need to rate_filter the incoming xferspeed
161 since we know we're only going to choose pio */
162 xferspeed = ide_get_best_pio_mode(drive, xferspeed, 4);
163 ide_config_drive_speed(drive, modes[xferspeed]);
164 cs5535_set_speed(drive, xferspeed);
165} 163}
166 164
167static int cs5535_dma_check(ide_drive_t *drive) 165static int cs5535_dma_check(ide_drive_t *drive)
168{ 166{
169 u8 speed;
170
171 drive->init_speed = 0; 167 drive->init_speed = 0;
172 168
173 if (ide_tune_dma(drive)) 169 if (ide_tune_dma(drive))
174 return 0; 170 return 0;
175 171
176 if (ide_use_fast_pio(drive)) { 172 if (ide_use_fast_pio(drive))
177 speed = ide_get_best_pio_mode(drive, 255, 4); 173 cs5535_tuneproc(drive, 255);
178 cs5535_set_drive(drive, speed);
179 }
180 174
181 return -1; 175 return -1;
182} 176}
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index 95dbed7e6022..70b3245dbf62 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -21,7 +21,7 @@
21 * it8213_dma_2_pio - return the PIO mode matching DMA 21 * it8213_dma_2_pio - return the PIO mode matching DMA
22 * @xfer_rate: transfer speed 22 * @xfer_rate: transfer speed
23 * 23 *
24 * Returns the nearest equivalent PIO timing for the PIO or DMA 24 * Returns the nearest equivalent PIO timing for the DMA
25 * mode requested by the controller. 25 * mode requested by the controller.
26 */ 26 */
27 27
@@ -35,34 +35,28 @@ static u8 it8213_dma_2_pio (u8 xfer_rate) {
35 case XFER_UDMA_1: 35 case XFER_UDMA_1:
36 case XFER_UDMA_0: 36 case XFER_UDMA_0:
37 case XFER_MW_DMA_2: 37 case XFER_MW_DMA_2:
38 case XFER_PIO_4:
39 return 4; 38 return 4;
40 case XFER_MW_DMA_1: 39 case XFER_MW_DMA_1:
41 case XFER_PIO_3:
42 return 3; 40 return 3;
43 case XFER_SW_DMA_2: 41 case XFER_SW_DMA_2:
44 case XFER_PIO_2:
45 return 2; 42 return 2;
46 case XFER_MW_DMA_0: 43 case XFER_MW_DMA_0:
47 case XFER_SW_DMA_1: 44 case XFER_SW_DMA_1:
48 case XFER_SW_DMA_0: 45 case XFER_SW_DMA_0:
49 case XFER_PIO_1:
50 case XFER_PIO_0:
51 case XFER_PIO_SLOW:
52 default: 46 default:
53 return 0; 47 return 0;
54 } 48 }
55} 49}
56 50
57/* 51/*
58 * it8213_tuneproc - tune a drive 52 * it8213_tune_pio - tune a drive
59 * @drive: drive to tune 53 * @drive: drive to tune
60 * @pio: desired PIO mode 54 * @pio: desired PIO mode
61 * 55 *
62 * Set the interface PIO mode. 56 * Set the interface PIO mode.
63 */ 57 */
64 58
65static void it8213_tuneproc (ide_drive_t *drive, u8 pio) 59static void it8213_tune_pio(ide_drive_t *drive, const u8 pio)
66{ 60{
67 ide_hwif_t *hwif = HWIF(drive); 61 ide_hwif_t *hwif = HWIF(drive);
68 struct pci_dev *dev = hwif->pci_dev; 62 struct pci_dev *dev = hwif->pci_dev;
@@ -82,8 +76,6 @@ static void it8213_tuneproc (ide_drive_t *drive, u8 pio)
82 { 2, 1 }, 76 { 2, 1 },
83 { 2, 3 }, }; 77 { 2, 3 }, };
84 78
85 pio = ide_get_best_pio_mode(drive, pio, 4);
86
87 spin_lock_irqsave(&tune_lock, flags); 79 spin_lock_irqsave(&tune_lock, flags);
88 pci_read_config_word(dev, master_port, &master_data); 80 pci_read_config_word(dev, master_port, &master_data);
89 81
@@ -113,6 +105,13 @@ static void it8213_tuneproc (ide_drive_t *drive, u8 pio)
113 spin_unlock_irqrestore(&tune_lock, flags); 105 spin_unlock_irqrestore(&tune_lock, flags);
114} 106}
115 107
108static void it8213_tuneproc(ide_drive_t *drive, u8 pio)
109{
110 pio = ide_get_best_pio_mode(drive, pio, 4);
111 it8213_tune_pio(drive, pio);
112 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
113}
114
116/** 115/**
117 * it8213_tune_chipset - set controller timings 116 * it8213_tune_chipset - set controller timings
118 * @drive: Drive to set up 117 * @drive: Drive to set up
@@ -193,7 +192,12 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
193 if (reg55 & w_flag) 192 if (reg55 & w_flag)
194 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); 193 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
195 } 194 }
196 it8213_tuneproc(drive, it8213_dma_2_pio(speed)); 195
196 if (speed > XFER_PIO_4)
197 it8213_tune_pio(drive, it8213_dma_2_pio(speed));
198 else
199 it8213_tune_pio(drive, speed - XFER_PIO_0);
200
197 return ide_config_drive_speed(drive, speed); 201 return ide_config_drive_speed(drive, speed);
198} 202}
199 203
@@ -209,13 +213,10 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
209 213
210static int it8213_config_drive_for_dma (ide_drive_t *drive) 214static int it8213_config_drive_for_dma (ide_drive_t *drive)
211{ 215{
212 u8 pio;
213
214 if (ide_tune_dma(drive)) 216 if (ide_tune_dma(drive))
215 return 0; 217 return 0;
216 218
217 pio = ide_get_best_pio_mode(drive, 255, 4); 219 it8213_tuneproc(drive, 255);
218 it8213_tune_chipset(drive, XFER_PIO_0 + pio);
219 220
220 return -1; 221 return -1;
221} 222}
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
index d7ce9dd8de16..65a0ff352b98 100644
--- a/drivers/ide/pci/jmicron.c
+++ b/drivers/ide/pci/jmicron.c
@@ -83,23 +83,10 @@ static u8 __devinit ata66_jmicron(ide_hwif_t *hwif)
83 return ATA_CBL_PATA80; 83 return ATA_CBL_PATA80;
84} 84}
85 85
86static void jmicron_tuneproc (ide_drive_t *drive, byte mode_wanted) 86static void jmicron_tuneproc(ide_drive_t *drive, u8 pio)
87{ 87{
88 return; 88 pio = ide_get_best_pio_mode(drive, pio, 5);
89} 89 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
90
91/**
92 * config_jmicron_chipset_for_pio - set drive timings
93 * @drive: drive to tune
94 * @speed we want
95 *
96 */
97
98static void config_jmicron_chipset_for_pio (ide_drive_t *drive, byte set_speed)
99{
100 u8 speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5);
101 if (set_speed)
102 (void) ide_config_drive_speed(drive, speed);
103} 90}
104 91
105/** 92/**
@@ -132,7 +119,7 @@ static int jmicron_config_drive_for_dma (ide_drive_t *drive)
132 if (ide_tune_dma(drive)) 119 if (ide_tune_dma(drive))
133 return 0; 120 return 0;
134 121
135 config_jmicron_chipset_for_pio(drive, 1); 122 jmicron_tuneproc(drive, 255);
136 123
137 return -1; 124 return -1;
138} 125}
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index 4f69cd067e5e..5cfa9378bbb8 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/piix.c Version 0.50 Jun 10, 2007 2 * linux/drivers/ide/pci/piix.c Version 0.51 Jul 6, 2007
3 * 3 *
4 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer 4 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
5 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> 5 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
@@ -109,7 +109,7 @@ static int no_piix_dma;
109 * piix_dma_2_pio - return the PIO mode matching DMA 109 * piix_dma_2_pio - return the PIO mode matching DMA
110 * @xfer_rate: transfer speed 110 * @xfer_rate: transfer speed
111 * 111 *
112 * Returns the nearest equivalent PIO timing for the PIO or DMA 112 * Returns the nearest equivalent PIO timing for the DMA
113 * mode requested by the controller. 113 * mode requested by the controller.
114 */ 114 */
115 115
@@ -123,20 +123,14 @@ static u8 piix_dma_2_pio (u8 xfer_rate) {
123 case XFER_UDMA_1: 123 case XFER_UDMA_1:
124 case XFER_UDMA_0: 124 case XFER_UDMA_0:
125 case XFER_MW_DMA_2: 125 case XFER_MW_DMA_2:
126 case XFER_PIO_4:
127 return 4; 126 return 4;
128 case XFER_MW_DMA_1: 127 case XFER_MW_DMA_1:
129 case XFER_PIO_3:
130 return 3; 128 return 3;
131 case XFER_SW_DMA_2: 129 case XFER_SW_DMA_2:
132 case XFER_PIO_2:
133 return 2; 130 return 2;
134 case XFER_MW_DMA_0: 131 case XFER_MW_DMA_0:
135 case XFER_SW_DMA_1: 132 case XFER_SW_DMA_1:
136 case XFER_SW_DMA_0: 133 case XFER_SW_DMA_0:
137 case XFER_PIO_1:
138 case XFER_PIO_0:
139 case XFER_PIO_SLOW:
140 default: 134 default:
141 return 0; 135 return 0;
142 } 136 }
@@ -269,6 +263,7 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed)
269 case XFER_PIO_4: 263 case XFER_PIO_4:
270 case XFER_PIO_3: 264 case XFER_PIO_3:
271 case XFER_PIO_2: 265 case XFER_PIO_2:
266 case XFER_PIO_1:
272 case XFER_PIO_0: break; 267 case XFER_PIO_0: break;
273 default: return -1; 268 default: return -1;
274 } 269 }
@@ -299,7 +294,11 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed)
299 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); 294 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
300 } 295 }
301 296
302 piix_tune_pio(drive, piix_dma_2_pio(speed)); 297 if (speed > XFER_PIO_4)
298 piix_tune_pio(drive, piix_dma_2_pio(speed));
299 else
300 piix_tune_pio(drive, speed - XFER_PIO_0);
301
303 return ide_config_drive_speed(drive, speed); 302 return ide_config_drive_speed(drive, speed);
304} 303}
305 304
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index bf19ddfa6cda..eeb0a6d434aa 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -190,7 +190,7 @@ scc_ide_outsl(unsigned long port, void *addr, u32 count)
190} 190}
191 191
192/** 192/**
193 * scc_tuneproc - tune a drive PIO mode 193 * scc_tune_pio - tune a drive PIO mode
194 * @drive: drive to tune 194 * @drive: drive to tune
195 * @mode_wanted: the target operating mode 195 * @mode_wanted: the target operating mode
196 * 196 *
@@ -198,7 +198,7 @@ scc_ide_outsl(unsigned long port, void *addr, u32 count)
198 * controller. 198 * controller.
199 */ 199 */
200 200
201static void scc_tuneproc(ide_drive_t *drive, byte mode_wanted) 201static void scc_tune_pio(ide_drive_t *drive, const u8 pio)
202{ 202{
203 ide_hwif_t *hwif = HWIF(drive); 203 ide_hwif_t *hwif = HWIF(drive);
204 struct scc_ports *ports = ide_get_hwifdata(hwif); 204 struct scc_ports *ports = ide_get_hwifdata(hwif);
@@ -207,41 +207,25 @@ static void scc_tuneproc(ide_drive_t *drive, byte mode_wanted)
207 unsigned long piosht_port = ctl_base + 0x000; 207 unsigned long piosht_port = ctl_base + 0x000;
208 unsigned long pioct_port = ctl_base + 0x004; 208 unsigned long pioct_port = ctl_base + 0x004;
209 unsigned long reg; 209 unsigned long reg;
210 unsigned char speed = XFER_PIO_0;
211 int offset; 210 int offset;
212 211
213 mode_wanted = ide_get_best_pio_mode(drive, mode_wanted, 4);
214 switch (mode_wanted) {
215 case 4:
216 speed = XFER_PIO_4;
217 break;
218 case 3:
219 speed = XFER_PIO_3;
220 break;
221 case 2:
222 speed = XFER_PIO_2;
223 break;
224 case 1:
225 speed = XFER_PIO_1;
226 break;
227 case 0:
228 default:
229 speed = XFER_PIO_0;
230 break;
231 }
232
233 reg = in_be32((void __iomem *)cckctrl_port); 212 reg = in_be32((void __iomem *)cckctrl_port);
234 if (reg & CCKCTRL_ATACLKOEN) { 213 if (reg & CCKCTRL_ATACLKOEN) {
235 offset = 1; /* 133MHz */ 214 offset = 1; /* 133MHz */
236 } else { 215 } else {
237 offset = 0; /* 100MHz */ 216 offset = 0; /* 100MHz */
238 } 217 }
239 reg = JCHSTtbl[offset][mode_wanted] << 16 | JCHHTtbl[offset][mode_wanted]; 218 reg = JCHSTtbl[offset][pio] << 16 | JCHHTtbl[offset][pio];
240 out_be32((void __iomem *)piosht_port, reg); 219 out_be32((void __iomem *)piosht_port, reg);
241 reg = JCHCTtbl[offset][mode_wanted]; 220 reg = JCHCTtbl[offset][pio];
242 out_be32((void __iomem *)pioct_port, reg); 221 out_be32((void __iomem *)pioct_port, reg);
222}
243 223
244 ide_config_drive_speed(drive, speed); 224static void scc_tuneproc(ide_drive_t *drive, u8 pio)
225{
226 pio = ide_get_best_pio_mode(drive, pio, 4);
227 scc_tune_pio(drive, pio);
228 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
245} 229}
246 230
247/** 231/**
@@ -280,26 +264,21 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed)
280 264
281 switch (speed) { 265 switch (speed) {
282 case XFER_UDMA_6: 266 case XFER_UDMA_6:
283 idx = 6;
284 break;
285 case XFER_UDMA_5: 267 case XFER_UDMA_5:
286 idx = 5;
287 break;
288 case XFER_UDMA_4: 268 case XFER_UDMA_4:
289 idx = 4;
290 break;
291 case XFER_UDMA_3: 269 case XFER_UDMA_3:
292 idx = 3;
293 break;
294 case XFER_UDMA_2: 270 case XFER_UDMA_2:
295 idx = 2;
296 break;
297 case XFER_UDMA_1: 271 case XFER_UDMA_1:
298 idx = 1;
299 break;
300 case XFER_UDMA_0: 272 case XFER_UDMA_0:
301 idx = 0; 273 idx = speed - XFER_UDMA_0;
302 break; 274 break;
275 case XFER_PIO_4:
276 case XFER_PIO_3:
277 case XFER_PIO_2:
278 case XFER_PIO_1:
279 case XFER_PIO_0:
280 scc_tune_pio(drive, speed - XFER_PIO_0);
281 return ide_config_drive_speed(drive, speed);
303 default: 282 default:
304 return 1; 283 return 1;
305 } 284 }
@@ -329,7 +308,7 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed)
329 * required. 308 * required.
330 * If the drive isn't suitable for DMA or we hit other problems 309 * If the drive isn't suitable for DMA or we hit other problems
331 * then we will drop down to PIO and set up PIO appropriately. 310 * then we will drop down to PIO and set up PIO appropriately.
332 * (return 1) 311 * (return -1)
333 */ 312 */
334 313
335static int scc_config_drive_for_dma(ide_drive_t *drive) 314static int scc_config_drive_for_dma(ide_drive_t *drive)
@@ -338,7 +317,7 @@ static int scc_config_drive_for_dma(ide_drive_t *drive)
338 return 0; 317 return 0;
339 318
340 if (ide_use_fast_pio(drive)) 319 if (ide_use_fast_pio(drive))
341 scc_tuneproc(drive, 4); 320 scc_tuneproc(drive, 255);
342 321
343 return -1; 322 return -1;
344} 323}
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index 63fbb79e8178..26f24802d3e8 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -801,6 +801,7 @@ struct sis_laptop {
801static const struct sis_laptop sis_laptop[] = { 801static const struct sis_laptop sis_laptop[] = {
802 /* devid, subvendor, subdev */ 802 /* devid, subvendor, subdev */
803 { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */ 803 { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
804 { 0x5513, 0x1734, 0x105f }, /* FSC Amilo A1630 */
804 /* end marker */ 805 /* end marker */
805 { 0, } 806 { 0, }
806}; 807};
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index 8e655f2db5cb..628b0664f576 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/slc90e66.c Version 0.14 February 8, 2007 2 * linux/drivers/ide/pci/slc90e66.c Version 0.15 Jul 6, 2007
3 * 3 *
4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com> 5 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
@@ -29,20 +29,14 @@ static u8 slc90e66_dma_2_pio (u8 xfer_rate) {
29 case XFER_UDMA_1: 29 case XFER_UDMA_1:
30 case XFER_UDMA_0: 30 case XFER_UDMA_0:
31 case XFER_MW_DMA_2: 31 case XFER_MW_DMA_2:
32 case XFER_PIO_4:
33 return 4; 32 return 4;
34 case XFER_MW_DMA_1: 33 case XFER_MW_DMA_1:
35 case XFER_PIO_3:
36 return 3; 34 return 3;
37 case XFER_SW_DMA_2: 35 case XFER_SW_DMA_2:
38 case XFER_PIO_2:
39 return 2; 36 return 2;
40 case XFER_MW_DMA_0: 37 case XFER_MW_DMA_0:
41 case XFER_SW_DMA_1: 38 case XFER_SW_DMA_1:
42 case XFER_SW_DMA_0: 39 case XFER_SW_DMA_0:
43 case XFER_PIO_1:
44 case XFER_PIO_0:
45 case XFER_PIO_SLOW:
46 default: 40 default:
47 return 0; 41 return 0;
48 } 42 }
@@ -136,6 +130,7 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
136 case XFER_PIO_4: 130 case XFER_PIO_4:
137 case XFER_PIO_3: 131 case XFER_PIO_3:
138 case XFER_PIO_2: 132 case XFER_PIO_2:
133 case XFER_PIO_1:
139 case XFER_PIO_0: break; 134 case XFER_PIO_0: break;
140 default: return -1; 135 default: return -1;
141 } 136 }
@@ -156,7 +151,11 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
156 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); 151 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
157 } 152 }
158 153
159 slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed)); 154 if (speed > XFER_PIO_4)
155 slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed));
156 else
157 slc90e66_tune_pio(drive, speed - XFER_PIO_0);
158
160 return ide_config_drive_speed(drive, speed); 159 return ide_config_drive_speed(drive, speed);
161} 160}
162 161
diff --git a/drivers/ieee1394/Kconfig b/drivers/ieee1394/Kconfig
index 8012b3b0ce75..545663ef820b 100644
--- a/drivers/ieee1394/Kconfig
+++ b/drivers/ieee1394/Kconfig
@@ -97,7 +97,7 @@ config IEEE1394_SBP2
97 97
98config IEEE1394_SBP2_PHYS_DMA 98config IEEE1394_SBP2_PHYS_DMA
99 bool "Enable replacement for physical DMA in SBP2" 99 bool "Enable replacement for physical DMA in SBP2"
100 depends on IEEE1394 && IEEE1394_SBP2 && EXPERIMENTAL && (X86_32 || PPC_32) 100 depends on IEEE1394_SBP2 && VIRT_TO_BUS && EXPERIMENTAL
101 help 101 help
102 This builds sbp2 for use with non-OHCI host adapters which do not 102 This builds sbp2 for use with non-OHCI host adapters which do not
103 support physical DMA or for when ohci1394 is run with phys_dma=0. 103 support physical DMA or for when ohci1394 is run with phys_dma=0.
diff --git a/drivers/ieee1394/sbp2.c b/drivers/ieee1394/sbp2.c
index e882cb951b47..47dbe8f17e82 100644
--- a/drivers/ieee1394/sbp2.c
+++ b/drivers/ieee1394/sbp2.c
@@ -773,11 +773,6 @@ static struct sbp2_lu *sbp2_alloc_device(struct unit_directory *ud)
773 SBP2_ERR("failed to register lower 4GB address range"); 773 SBP2_ERR("failed to register lower 4GB address range");
774 goto failed_alloc; 774 goto failed_alloc;
775 } 775 }
776#else
777 if (dma_set_mask(hi->host->device.parent, DMA_32BIT_MASK)) {
778 SBP2_ERR("failed to set 4GB DMA mask");
779 goto failed_alloc;
780 }
781#endif 776#endif
782 } 777 }
783 778
diff --git a/drivers/infiniband/hw/ehca/ehca_irq.c b/drivers/infiniband/hw/ehca/ehca_irq.c
index 71c0799b3500..ee06d8bd7396 100644
--- a/drivers/infiniband/hw/ehca/ehca_irq.c
+++ b/drivers/infiniband/hw/ehca/ehca_irq.c
@@ -116,7 +116,7 @@ static void print_error_data(struct ehca_shca *shca, void *data,
116 } 116 }
117 default: 117 default:
118 ehca_err(&shca->ib_device, 118 ehca_err(&shca->ib_device,
119 "Unknown errror type: %lx on %s.", 119 "Unknown error type: %lx on %s.",
120 type, shca->ib_device.name); 120 type, shca->ib_device.name);
121 break; 121 break;
122 } 122 }
diff --git a/drivers/input/evdev.c b/drivers/input/evdev.c
index ab4b2d9b5327..f1c3d6cebd58 100644
--- a/drivers/input/evdev.c
+++ b/drivers/input/evdev.c
@@ -186,7 +186,7 @@ struct input_event_compat {
186#elif defined(CONFIG_S390) 186#elif defined(CONFIG_S390)
187# define COMPAT_TEST test_thread_flag(TIF_31BIT) 187# define COMPAT_TEST test_thread_flag(TIF_31BIT)
188#elif defined(CONFIG_MIPS) 188#elif defined(CONFIG_MIPS)
189# define COMPAT_TEST (current->thread.mflags & MF_32BIT_ADDR) 189# define COMPAT_TEST test_thread_flag(TIF_32BIT_ADDR)
190#else 190#else
191# define COMPAT_TEST test_thread_flag(TIF_32BIT) 191# define COMPAT_TEST test_thread_flag(TIF_32BIT)
192#endif 192#endif
diff --git a/drivers/isdn/divert/divert_procfs.c b/drivers/isdn/divert/divert_procfs.c
index be77ee625bb7..559a0d0244cf 100644
--- a/drivers/isdn/divert/divert_procfs.c
+++ b/drivers/isdn/divert/divert_procfs.c
@@ -70,6 +70,8 @@ put_info_buffer(char *cp)
70 wake_up_interruptible(&(rd_queue)); 70 wake_up_interruptible(&(rd_queue));
71} /* put_info_buffer */ 71} /* put_info_buffer */
72 72
73#ifdef CONFIG_PROC_FS
74
73/**********************************/ 75/**********************************/
74/* deflection device read routine */ 76/* deflection device read routine */
75/**********************************/ 77/**********************************/
@@ -253,8 +255,6 @@ isdn_divert_ioctl(struct inode *inode, struct file *file,
253 return copy_to_user((void __user *)arg, &dioctl, sizeof(dioctl)) ? -EFAULT : 0; 255 return copy_to_user((void __user *)arg, &dioctl, sizeof(dioctl)) ? -EFAULT : 0;
254} /* isdn_divert_ioctl */ 256} /* isdn_divert_ioctl */
255 257
256
257#ifdef CONFIG_PROC_FS
258static const struct file_operations isdn_fops = 258static const struct file_operations isdn_fops =
259{ 259{
260 .owner = THIS_MODULE, 260 .owner = THIS_MODULE,
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c
index f730a144baf1..4e53792aa520 100644
--- a/drivers/md/raid10.c
+++ b/drivers/md/raid10.c
@@ -917,6 +917,13 @@ static int make_request(struct request_queue *q, struct bio * bio)
917 bio_list_add(&bl, mbio); 917 bio_list_add(&bl, mbio);
918 } 918 }
919 919
920 if (unlikely(!atomic_read(&r10_bio->remaining))) {
921 /* the array is dead */
922 md_write_end(mddev);
923 raid_end_bio_io(r10_bio);
924 return 0;
925 }
926
920 bitmap_startwrite(mddev->bitmap, bio->bi_sector, r10_bio->sectors, 0); 927 bitmap_startwrite(mddev->bitmap, bio->bi_sector, r10_bio->sectors, 0);
921 spin_lock_irqsave(&conf->device_lock, flags); 928 spin_lock_irqsave(&conf->device_lock, flags);
922 bio_list_merge(&conf->pending_bio_list, &bl); 929 bio_list_merge(&conf->pending_bio_list, &bl);
@@ -1557,7 +1564,6 @@ static void raid10d(mddev_t *mddev)
1557 bio = r10_bio->devs[r10_bio->read_slot].bio; 1564 bio = r10_bio->devs[r10_bio->read_slot].bio;
1558 r10_bio->devs[r10_bio->read_slot].bio = 1565 r10_bio->devs[r10_bio->read_slot].bio =
1559 mddev->ro ? IO_BLOCKED : NULL; 1566 mddev->ro ? IO_BLOCKED : NULL;
1560 bio_put(bio);
1561 mirror = read_balance(conf, r10_bio); 1567 mirror = read_balance(conf, r10_bio);
1562 if (mirror == -1) { 1568 if (mirror == -1) {
1563 printk(KERN_ALERT "raid10: %s: unrecoverable I/O" 1569 printk(KERN_ALERT "raid10: %s: unrecoverable I/O"
@@ -1565,8 +1571,10 @@ static void raid10d(mddev_t *mddev)
1565 bdevname(bio->bi_bdev,b), 1571 bdevname(bio->bi_bdev,b),
1566 (unsigned long long)r10_bio->sector); 1572 (unsigned long long)r10_bio->sector);
1567 raid_end_bio_io(r10_bio); 1573 raid_end_bio_io(r10_bio);
1574 bio_put(bio);
1568 } else { 1575 } else {
1569 const int do_sync = bio_sync(r10_bio->master_bio); 1576 const int do_sync = bio_sync(r10_bio->master_bio);
1577 bio_put(bio);
1570 rdev = conf->mirrors[mirror].rdev; 1578 rdev = conf->mirrors[mirror].rdev;
1571 if (printk_ratelimit()) 1579 if (printk_ratelimit())
1572 printk(KERN_ERR "raid10: %s: redirecting sector %llu to" 1580 printk(KERN_ERR "raid10: %s: redirecting sector %llu to"
diff --git a/drivers/message/i2o/i2o_block.c b/drivers/message/i2o/i2o_block.c
index 5e1c99f83ab5..50b2c7334410 100644
--- a/drivers/message/i2o/i2o_block.c
+++ b/drivers/message/i2o/i2o_block.c
@@ -744,7 +744,7 @@ static int i2o_block_transfer(struct request *req)
744{ 744{
745 struct i2o_block_device *dev = req->rq_disk->private_data; 745 struct i2o_block_device *dev = req->rq_disk->private_data;
746 struct i2o_controller *c; 746 struct i2o_controller *c;
747 int tid = dev->i2o_dev->lct_data.tid; 747 u32 tid = dev->i2o_dev->lct_data.tid;
748 struct i2o_message *msg; 748 struct i2o_message *msg;
749 u32 *mptr; 749 u32 *mptr;
750 struct i2o_block_request *ireq = req->special; 750 struct i2o_block_request *ireq = req->special;
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index 451adcc52b3c..6d958a4566ff 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -3,9 +3,9 @@
3# 3#
4 4
5# Core functionality. 5# Core functionality.
6obj-$(CONFIG_MTD) += mtd.o
6mtd-y := mtdcore.o mtdsuper.o 7mtd-y := mtdcore.o mtdsuper.o
7mtd-$(CONFIG_MTD_PARTITIONS) += mtdpart.o 8mtd-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
8obj-$(CONFIG_MTD) += $(mtd-y)
9 9
10obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o 10obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
11obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o 11obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
diff --git a/drivers/mtd/devices/docprobe.c b/drivers/mtd/devices/docprobe.c
index b96ac8e119dc..54aa75907640 100644
--- a/drivers/mtd/devices/docprobe.c
+++ b/drivers/mtd/devices/docprobe.c
@@ -81,9 +81,6 @@ static unsigned long __initdata doc_locations[] = {
81#endif /* CONFIG_MTD_DOCPROBE_HIGH */ 81#endif /* CONFIG_MTD_DOCPROBE_HIGH */
82#elif defined(__PPC__) 82#elif defined(__PPC__)
83 0xe4000000, 83 0xe4000000,
84#elif defined(CONFIG_MOMENCO_OCELOT)
85 0x2f000000,
86 0xff000000,
87#elif defined(CONFIG_MOMENCO_OCELOT_G) 84#elif defined(CONFIG_MOMENCO_OCELOT_G)
88 0xff000000, 85 0xff000000,
89##else 86##else
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index 9c6236852942..6174a97d7902 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -560,7 +560,3 @@ int parse_mtd_partitions(struct mtd_info *master, const char **types,
560EXPORT_SYMBOL_GPL(parse_mtd_partitions); 560EXPORT_SYMBOL_GPL(parse_mtd_partitions);
561EXPORT_SYMBOL_GPL(register_mtd_parser); 561EXPORT_SYMBOL_GPL(register_mtd_parser);
562EXPORT_SYMBOL_GPL(deregister_mtd_parser); 562EXPORT_SYMBOL_GPL(deregister_mtd_parser);
563
564MODULE_LICENSE("GPL");
565MODULE_AUTHOR("Nicolas Pitre <nico@cam.org>");
566MODULE_DESCRIPTION("Generic support for partitioning of MTD devices");
diff --git a/drivers/mtd/nand/at91_nand.c b/drivers/mtd/nand/at91_nand.c
index 512e999177f7..b2a5672df6e0 100644
--- a/drivers/mtd/nand/at91_nand.c
+++ b/drivers/mtd/nand/at91_nand.c
@@ -128,7 +128,10 @@ static int __init at91_nand_probe(struct platform_device *pdev)
128 nand_chip->IO_ADDR_R = host->io_base; 128 nand_chip->IO_ADDR_R = host->io_base;
129 nand_chip->IO_ADDR_W = host->io_base; 129 nand_chip->IO_ADDR_W = host->io_base;
130 nand_chip->cmd_ctrl = at91_nand_cmd_ctrl; 130 nand_chip->cmd_ctrl = at91_nand_cmd_ctrl;
131 nand_chip->dev_ready = at91_nand_device_ready; 131
132 if (host->board->rdy_pin)
133 nand_chip->dev_ready = at91_nand_device_ready;
134
132 nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */ 135 nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */
133 nand_chip->chip_delay = 20; /* 20us command delay time */ 136 nand_chip->chip_delay = 20; /* 20us command delay time */
134 137
diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c
index 17c868034aad..e96259f22cca 100644
--- a/drivers/mtd/nand/diskonchip.c
+++ b/drivers/mtd/nand/diskonchip.c
@@ -56,9 +56,6 @@ static unsigned long __initdata doc_locations[] = {
56#endif /* CONFIG_MTD_DOCPROBE_HIGH */ 56#endif /* CONFIG_MTD_DOCPROBE_HIGH */
57#elif defined(__PPC__) 57#elif defined(__PPC__)
58 0xe4000000, 58 0xe4000000,
59#elif defined(CONFIG_MOMENCO_OCELOT)
60 0x2f000000,
61 0xff000000,
62#elif defined(CONFIG_MOMENCO_OCELOT_G) 59#elif defined(CONFIG_MOMENCO_OCELOT_G)
63 0xff000000, 60 0xff000000,
64#else 61#else
diff --git a/drivers/mtd/nand/edb7312.c b/drivers/mtd/nand/edb7312.c
index 1daf8231aaef..0146cdc48039 100644
--- a/drivers/mtd/nand/edb7312.c
+++ b/drivers/mtd/nand/edb7312.c
@@ -74,7 +74,7 @@ static struct mtd_partition partition_info[] = {
74/* 74/*
75 * hardware specific access to control-lines 75 * hardware specific access to control-lines
76 * 76 *
77 * NAND_NCE: bit 0 -> bit 7 77 * NAND_NCE: bit 0 -> bit 6 (bit 7 = 1)
78 * NAND_CLE: bit 1 -> bit 4 78 * NAND_CLE: bit 1 -> bit 4
79 * NAND_ALE: bit 2 -> bit 5 79 * NAND_ALE: bit 2 -> bit 5
80 */ 80 */
@@ -83,12 +83,12 @@ static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
83 struct nand_chip *chip = mtd->priv; 83 struct nand_chip *chip = mtd->priv;
84 84
85 if (ctrl & NAND_CTRL_CHANGE) { 85 if (ctrl & NAND_CTRL_CHANGE) {
86 unsigned char bits; 86 unsigned char bits = 0x80;
87 87
88 bits = (ctrl & (NAND_CLE | NAND_ALE)) << 3; 88 bits |= (ctrl & (NAND_CLE | NAND_ALE)) << 3;
89 bits = (ctrl & NAND_NCE) << 7; 89 bits |= (ctrl & NAND_NCE) ? 0x00 : 0x40;
90 90
91 clps_writeb((clps_readb(ep7312_pxdr) & 0xB0) | 0x10, 91 clps_writeb((clps_readb(ep7312_pxdr) & 0xF0) | bits,
92 ep7312_pxdr); 92 ep7312_pxdr);
93 } 93 }
94 if (cmd != NAND_CMD_NONE) 94 if (cmd != NAND_CMD_NONE)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 7e68203fe1ba..24ac6778b1a8 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -24,6 +24,7 @@
24 * if we have HW ecc support. 24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement, 25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go. 26 * which are not supported yet. Read / program 4 pages in one go.
27 * BBT table is not serialized, has to be fixed
27 * 28 *
28 * This program is free software; you can redistribute it and/or modify 29 * This program is free software; you can redistribute it and/or modify
29 * it under the terms of the GNU General Public License version 2 as 30 * it under the terms of the GNU General Public License version 2 as
@@ -360,6 +361,7 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
360 /* We write two bytes, so we dont have to mess with 16 bit 361 /* We write two bytes, so we dont have to mess with 16 bit
361 * access 362 * access
362 */ 363 */
364 nand_get_device(chip, mtd, FL_WRITING);
363 ofs += mtd->oobsize; 365 ofs += mtd->oobsize;
364 chip->ops.len = chip->ops.ooblen = 2; 366 chip->ops.len = chip->ops.ooblen = 2;
365 chip->ops.datbuf = NULL; 367 chip->ops.datbuf = NULL;
@@ -367,9 +369,11 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
367 chip->ops.ooboffs = chip->badblockpos & ~0x01; 369 chip->ops.ooboffs = chip->badblockpos & ~0x01;
368 370
369 ret = nand_do_write_oob(mtd, ofs, &chip->ops); 371 ret = nand_do_write_oob(mtd, ofs, &chip->ops);
372 nand_release_device(mtd);
370 } 373 }
371 if (!ret) 374 if (!ret)
372 mtd->ecc_stats.badblocks++; 375 mtd->ecc_stats.badblocks++;
376
373 return ret; 377 return ret;
374} 378}
375 379
@@ -768,7 +772,7 @@ static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
768 uint8_t *p = buf; 772 uint8_t *p = buf;
769 uint8_t *ecc_calc = chip->buffers->ecccalc; 773 uint8_t *ecc_calc = chip->buffers->ecccalc;
770 uint8_t *ecc_code = chip->buffers->ecccode; 774 uint8_t *ecc_code = chip->buffers->ecccode;
771 int *eccpos = chip->ecc.layout->eccpos; 775 uint32_t *eccpos = chip->ecc.layout->eccpos;
772 776
773 chip->ecc.read_page_raw(mtd, chip, buf); 777 chip->ecc.read_page_raw(mtd, chip, buf);
774 778
@@ -810,7 +814,7 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
810 uint8_t *p = buf; 814 uint8_t *p = buf;
811 uint8_t *ecc_calc = chip->buffers->ecccalc; 815 uint8_t *ecc_calc = chip->buffers->ecccalc;
812 uint8_t *ecc_code = chip->buffers->ecccode; 816 uint8_t *ecc_code = chip->buffers->ecccode;
813 int *eccpos = chip->ecc.layout->eccpos; 817 uint32_t *eccpos = chip->ecc.layout->eccpos;
814 818
815 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { 819 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
816 chip->ecc.hwctl(mtd, NAND_ECC_READ); 820 chip->ecc.hwctl(mtd, NAND_ECC_READ);
@@ -1416,7 +1420,7 @@ static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1416 int eccsteps = chip->ecc.steps; 1420 int eccsteps = chip->ecc.steps;
1417 uint8_t *ecc_calc = chip->buffers->ecccalc; 1421 uint8_t *ecc_calc = chip->buffers->ecccalc;
1418 const uint8_t *p = buf; 1422 const uint8_t *p = buf;
1419 int *eccpos = chip->ecc.layout->eccpos; 1423 uint32_t *eccpos = chip->ecc.layout->eccpos;
1420 1424
1421 /* Software ecc calculation */ 1425 /* Software ecc calculation */
1422 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) 1426 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
@@ -1442,7 +1446,7 @@ static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
1442 int eccsteps = chip->ecc.steps; 1446 int eccsteps = chip->ecc.steps;
1443 uint8_t *ecc_calc = chip->buffers->ecccalc; 1447 uint8_t *ecc_calc = chip->buffers->ecccalc;
1444 const uint8_t *p = buf; 1448 const uint8_t *p = buf;
1445 int *eccpos = chip->ecc.layout->eccpos; 1449 uint32_t *eccpos = chip->ecc.layout->eccpos;
1446 1450
1447 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { 1451 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1448 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); 1452 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
diff --git a/drivers/mtd/rfd_ftl.c b/drivers/mtd/rfd_ftl.c
index d4b1ba8f23ef..006c03aacb55 100644
--- a/drivers/mtd/rfd_ftl.c
+++ b/drivers/mtd/rfd_ftl.c
@@ -779,6 +779,7 @@ static void rfd_ftl_add_mtd(struct mtd_blktrans_ops *tr, struct mtd_info *mtd)
779 else { 779 else {
780 if (!mtd->erasesize) { 780 if (!mtd->erasesize) {
781 printk(KERN_WARNING PREFIX "please provide block_size"); 781 printk(KERN_WARNING PREFIX "please provide block_size");
782 kfree(part);
782 return; 783 return;
783 } 784 }
784 else 785 else
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c
index 6deb20fc7a08..001c66dd3a94 100644
--- a/drivers/net/3c59x.c
+++ b/drivers/net/3c59x.c
@@ -2886,7 +2886,6 @@ static const struct ethtool_ops vortex_ethtool_ops = {
2886 .set_settings = vortex_set_settings, 2886 .set_settings = vortex_set_settings,
2887 .get_link = ethtool_op_get_link, 2887 .get_link = ethtool_op_get_link,
2888 .nway_reset = vortex_nway_reset, 2888 .nway_reset = vortex_nway_reset,
2889 .get_perm_addr = ethtool_op_get_perm_addr,
2890}; 2889};
2891 2890
2892#ifdef CONFIG_PCI 2891#ifdef CONFIG_PCI
diff --git a/drivers/net/8139cp.c b/drivers/net/8139cp.c
index e970e64bf966..a79f28c7a100 100644
--- a/drivers/net/8139cp.c
+++ b/drivers/net/8139cp.c
@@ -1578,7 +1578,6 @@ static const struct ethtool_ops cp_ethtool_ops = {
1578 .set_wol = cp_set_wol, 1578 .set_wol = cp_set_wol,
1579 .get_strings = cp_get_strings, 1579 .get_strings = cp_get_strings,
1580 .get_ethtool_stats = cp_get_ethtool_stats, 1580 .get_ethtool_stats = cp_get_ethtool_stats,
1581 .get_perm_addr = ethtool_op_get_perm_addr,
1582 .get_eeprom_len = cp_get_eeprom_len, 1581 .get_eeprom_len = cp_get_eeprom_len,
1583 .get_eeprom = cp_get_eeprom, 1582 .get_eeprom = cp_get_eeprom,
1584 .set_eeprom = cp_set_eeprom, 1583 .set_eeprom = cp_set_eeprom,
diff --git a/drivers/net/8139too.c b/drivers/net/8139too.c
index 327eaa7b4999..f4e4298d24b9 100644
--- a/drivers/net/8139too.c
+++ b/drivers/net/8139too.c
@@ -2452,7 +2452,6 @@ static const struct ethtool_ops rtl8139_ethtool_ops = {
2452 .get_strings = rtl8139_get_strings, 2452 .get_strings = rtl8139_get_strings,
2453 .get_stats_count = rtl8139_get_stats_count, 2453 .get_stats_count = rtl8139_get_stats_count,
2454 .get_ethtool_stats = rtl8139_get_ethtool_stats, 2454 .get_ethtool_stats = rtl8139_get_ethtool_stats,
2455 .get_perm_addr = ethtool_op_get_perm_addr,
2456}; 2455};
2457 2456
2458static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 2457static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index f8a602caabcb..81ef81c9a584 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -2851,7 +2851,7 @@ config PPPOATM
2851 2851
2852config PPPOL2TP 2852config PPPOL2TP
2853 tristate "PPP over L2TP (EXPERIMENTAL)" 2853 tristate "PPP over L2TP (EXPERIMENTAL)"
2854 depends on EXPERIMENTAL && PPP 2854 depends on EXPERIMENTAL && PPP && INET
2855 help 2855 help
2856 Support for PPP-over-L2TP socket family. L2TP is a protocol 2856 Support for PPP-over-L2TP socket family. L2TP is a protocol
2857 used by ISPs and enterprises to tunnel PPP traffic over UDP 2857 used by ISPs and enterprises to tunnel PPP traffic over UDP
diff --git a/drivers/net/ax88796.c b/drivers/net/ax88796.c
index e43e8047b90e..83da1770bafb 100644
--- a/drivers/net/ax88796.c
+++ b/drivers/net/ax88796.c
@@ -580,7 +580,6 @@ static const struct ethtool_ops ax_ethtool_ops = {
580 .set_settings = ax_set_settings, 580 .set_settings = ax_set_settings,
581 .nway_reset = ax_nway_reset, 581 .nway_reset = ax_nway_reset,
582 .get_link = ax_get_link, 582 .get_link = ax_get_link,
583 .get_perm_addr = ethtool_op_get_perm_addr,
584}; 583};
585 584
586/* setup code */ 585/* setup code */
diff --git a/drivers/net/b44.c b/drivers/net/b44.c
index 37f1b6ff5c12..0795df235492 100644
--- a/drivers/net/b44.c
+++ b/drivers/net/b44.c
@@ -2033,7 +2033,6 @@ static const struct ethtool_ops b44_ethtool_ops = {
2033 .get_strings = b44_get_strings, 2033 .get_strings = b44_get_strings,
2034 .get_stats_count = b44_get_stats_count, 2034 .get_stats_count = b44_get_stats_count,
2035 .get_ethtool_stats = b44_get_ethtool_stats, 2035 .get_ethtool_stats = b44_get_ethtool_stats,
2036 .get_perm_addr = ethtool_op_get_perm_addr,
2037}; 2036};
2038 2037
2039static int b44_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 2038static int b44_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index a729da061bbb..d53dfc5bbae0 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -6269,7 +6269,6 @@ static const struct ethtool_ops bnx2_ethtool_ops = {
6269 .phys_id = bnx2_phys_id, 6269 .phys_id = bnx2_phys_id,
6270 .get_stats_count = bnx2_get_stats_count, 6270 .get_stats_count = bnx2_get_stats_count,
6271 .get_ethtool_stats = bnx2_get_ethtool_stats, 6271 .get_ethtool_stats = bnx2_get_ethtool_stats,
6272 .get_perm_addr = ethtool_op_get_perm_addr,
6273}; 6272};
6274 6273
6275/* Called with rtnl_lock */ 6274/* Called with rtnl_lock */
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index cb9cb3013f42..070b78d959cc 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -613,38 +613,20 @@ down:
613static int bond_update_speed_duplex(struct slave *slave) 613static int bond_update_speed_duplex(struct slave *slave)
614{ 614{
615 struct net_device *slave_dev = slave->dev; 615 struct net_device *slave_dev = slave->dev;
616 static int (* ioctl)(struct net_device *, struct ifreq *, int);
617 struct ifreq ifr;
618 struct ethtool_cmd etool; 616 struct ethtool_cmd etool;
617 int res;
619 618
620 /* Fake speed and duplex */ 619 /* Fake speed and duplex */
621 slave->speed = SPEED_100; 620 slave->speed = SPEED_100;
622 slave->duplex = DUPLEX_FULL; 621 slave->duplex = DUPLEX_FULL;
623 622
624 if (slave_dev->ethtool_ops) { 623 if (!slave_dev->ethtool_ops || !slave_dev->ethtool_ops->get_settings)
625 int res; 624 return -1;
626
627 if (!slave_dev->ethtool_ops->get_settings) {
628 return -1;
629 }
630
631 res = slave_dev->ethtool_ops->get_settings(slave_dev, &etool);
632 if (res < 0) {
633 return -1;
634 }
635
636 goto verify;
637 }
638 625
639 ioctl = slave_dev->do_ioctl; 626 res = slave_dev->ethtool_ops->get_settings(slave_dev, &etool);
640 strncpy(ifr.ifr_name, slave_dev->name, IFNAMSIZ); 627 if (res < 0)
641 etool.cmd = ETHTOOL_GSET;
642 ifr.ifr_data = (char*)&etool;
643 if (!ioctl || (IOCTL(slave_dev, &ifr, SIOCETHTOOL) < 0)) {
644 return -1; 628 return -1;
645 }
646 629
647verify:
648 switch (etool.speed) { 630 switch (etool.speed) {
649 case SPEED_10: 631 case SPEED_10:
650 case SPEED_100: 632 case SPEED_100:
@@ -690,7 +672,6 @@ static int bond_check_dev_link(struct bonding *bond, struct net_device *slave_de
690 static int (* ioctl)(struct net_device *, struct ifreq *, int); 672 static int (* ioctl)(struct net_device *, struct ifreq *, int);
691 struct ifreq ifr; 673 struct ifreq ifr;
692 struct mii_ioctl_data *mii; 674 struct mii_ioctl_data *mii;
693 struct ethtool_value etool;
694 675
695 if (bond->params.use_carrier) { 676 if (bond->params.use_carrier) {
696 return netif_carrier_ok(slave_dev) ? BMSR_LSTATUS : 0; 677 return netif_carrier_ok(slave_dev) ? BMSR_LSTATUS : 0;
@@ -721,9 +702,10 @@ static int bond_check_dev_link(struct bonding *bond, struct net_device *slave_de
721 } 702 }
722 } 703 }
723 704
724 /* try SIOCETHTOOL ioctl, some drivers cache ETHTOOL_GLINK */ 705 /*
725 /* for a period of time so we attempt to get link status */ 706 * Some drivers cache ETHTOOL_GLINK for a period of time so we only
726 /* from it last if the above MII ioctls fail... */ 707 * attempt to get link status from it if the above MII ioctls fail.
708 */
727 if (slave_dev->ethtool_ops) { 709 if (slave_dev->ethtool_ops) {
728 if (slave_dev->ethtool_ops->get_link) { 710 if (slave_dev->ethtool_ops->get_link) {
729 u32 link; 711 u32 link;
@@ -734,23 +716,9 @@ static int bond_check_dev_link(struct bonding *bond, struct net_device *slave_de
734 } 716 }
735 } 717 }
736 718
737 if (ioctl) {
738 strncpy(ifr.ifr_name, slave_dev->name, IFNAMSIZ);
739 etool.cmd = ETHTOOL_GLINK;
740 ifr.ifr_data = (char*)&etool;
741 if (IOCTL(slave_dev, &ifr, SIOCETHTOOL) == 0) {
742 if (etool.data == 1) {
743 return BMSR_LSTATUS;
744 } else {
745 dprintk("SIOCETHTOOL shows link down\n");
746 return 0;
747 }
748 }
749 }
750
751 /* 719 /*
752 * If reporting, report that either there's no dev->do_ioctl, 720 * If reporting, report that either there's no dev->do_ioctl,
753 * or both SIOCGMIIREG and SIOCETHTOOL failed (meaning that we 721 * or both SIOCGMIIREG and get_link failed (meaning that we
754 * cannot report link status). If not reporting, pretend 722 * cannot report link status). If not reporting, pretend
755 * we're ok. 723 * we're ok.
756 */ 724 */
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c
index 6fd1e5241833..dc5d26988bb3 100644
--- a/drivers/net/cxgb3/cxgb3_main.c
+++ b/drivers/net/cxgb3/cxgb3_main.c
@@ -1583,7 +1583,6 @@ static const struct ethtool_ops cxgb_ethtool_ops = {
1583 .get_wol = get_wol, 1583 .get_wol = get_wol,
1584 .get_tso = ethtool_op_get_tso, 1584 .get_tso = ethtool_op_get_tso,
1585 .set_tso = ethtool_op_set_tso, 1585 .set_tso = ethtool_op_set_tso,
1586 .get_perm_addr = ethtool_op_get_perm_addr
1587}; 1586};
1588 1587
1589static int in_range(int val, int lo, int hi) 1588static int in_range(int val, int lo, int hi)
diff --git a/drivers/net/e100.c b/drivers/net/e100.c
index 6b6401e9304e..280313b9b069 100644
--- a/drivers/net/e100.c
+++ b/drivers/net/e100.c
@@ -2506,7 +2506,6 @@ static const struct ethtool_ops e100_ethtool_ops = {
2506 .phys_id = e100_phys_id, 2506 .phys_id = e100_phys_id,
2507 .get_stats_count = e100_get_stats_count, 2507 .get_stats_count = e100_get_stats_count,
2508 .get_ethtool_stats = e100_get_ethtool_stats, 2508 .get_ethtool_stats = e100_get_ethtool_stats,
2509 .get_perm_addr = ethtool_op_get_perm_addr,
2510}; 2509};
2511 2510
2512static int e100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 2511static int e100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c
index bb08375b5f13..c90c92e72d2a 100644
--- a/drivers/net/e1000/e1000_ethtool.c
+++ b/drivers/net/e1000/e1000_ethtool.c
@@ -1973,7 +1973,6 @@ static const struct ethtool_ops e1000_ethtool_ops = {
1973 .phys_id = e1000_phys_id, 1973 .phys_id = e1000_phys_id,
1974 .get_stats_count = e1000_get_stats_count, 1974 .get_stats_count = e1000_get_stats_count,
1975 .get_ethtool_stats = e1000_get_ethtool_stats, 1975 .get_ethtool_stats = e1000_get_ethtool_stats,
1976 .get_perm_addr = ethtool_op_get_perm_addr,
1977}; 1976};
1978 1977
1979void e1000_set_ethtool_ops(struct net_device *netdev) 1978void e1000_set_ethtool_ops(struct net_device *netdev)
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 51e1cb472738..69f5f365239a 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -4707,7 +4707,6 @@ static const struct ethtool_ops ops = {
4707 .get_regs_len = nv_get_regs_len, 4707 .get_regs_len = nv_get_regs_len,
4708 .get_regs = nv_get_regs, 4708 .get_regs = nv_get_regs,
4709 .nway_reset = nv_nway_reset, 4709 .nway_reset = nv_nway_reset,
4710 .get_perm_addr = ethtool_op_get_perm_addr,
4711 .get_tso = ethtool_op_get_tso, 4710 .get_tso = ethtool_op_get_tso,
4712 .set_tso = nv_set_tso, 4711 .set_tso = nv_set_tso,
4713 .get_ringparam = nv_get_ringparam, 4712 .get_ringparam = nv_get_ringparam,
diff --git a/drivers/net/hamradio/bpqether.c b/drivers/net/hamradio/bpqether.c
index 656f2789c9ba..cc0ee93669ea 100644
--- a/drivers/net/hamradio/bpqether.c
+++ b/drivers/net/hamradio/bpqether.c
@@ -413,12 +413,12 @@ static void *bpq_seq_next(struct seq_file *seq, void *v, loff_t *pos)
413 ++*pos; 413 ++*pos;
414 414
415 if (v == SEQ_START_TOKEN) 415 if (v == SEQ_START_TOKEN)
416 p = bpq_devices.next; 416 p = rcu_dereference(bpq_devices.next);
417 else 417 else
418 p = ((struct bpqdev *)v)->bpq_list.next; 418 p = rcu_dereference(((struct bpqdev *)v)->bpq_list.next);
419 419
420 return (p == &bpq_devices) ? NULL 420 return (p == &bpq_devices) ? NULL
421 : rcu_dereference(list_entry(p, struct bpqdev, bpq_list)); 421 : list_entry(p, struct bpqdev, bpq_list);
422} 422}
423 423
424static void bpq_seq_stop(struct seq_file *seq, void *v) 424static void bpq_seq_stop(struct seq_file *seq, void *v)
diff --git a/drivers/net/ixgb/ixgb_ethtool.c b/drivers/net/ixgb/ixgb_ethtool.c
index afde84868bea..0413cd95eda7 100644
--- a/drivers/net/ixgb/ixgb_ethtool.c
+++ b/drivers/net/ixgb/ixgb_ethtool.c
@@ -724,7 +724,6 @@ static const struct ethtool_ops ixgb_ethtool_ops = {
724 .phys_id = ixgb_phys_id, 724 .phys_id = ixgb_phys_id,
725 .get_stats_count = ixgb_get_stats_count, 725 .get_stats_count = ixgb_get_stats_count,
726 .get_ethtool_stats = ixgb_get_ethtool_stats, 726 .get_ethtool_stats = ixgb_get_ethtool_stats,
727 .get_perm_addr = ethtool_op_get_perm_addr,
728}; 727};
729 728
730void ixgb_set_ethtool_ops(struct net_device *netdev) 729void ixgb_set_ethtool_ops(struct net_device *netdev)
diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c
index 6ba6ed2b480a..5106c2328d12 100644
--- a/drivers/net/loopback.c
+++ b/drivers/net/loopback.c
@@ -229,7 +229,12 @@ struct net_device loopback_dev = {
229/* Setup and register the loopback device. */ 229/* Setup and register the loopback device. */
230static int __init loopback_init(void) 230static int __init loopback_init(void)
231{ 231{
232 return register_netdev(&loopback_dev); 232 int err = register_netdev(&loopback_dev);
233
234 if (err)
235 panic("loopback: Failed to register netdevice: %d\n", err);
236
237 return err;
233}; 238};
234 239
235module_init(loopback_init); 240module_init(loopback_init);
diff --git a/drivers/net/ne2k-pci.c b/drivers/net/ne2k-pci.c
index cfdeaf7aa163..f81d9398d605 100644
--- a/drivers/net/ne2k-pci.c
+++ b/drivers/net/ne2k-pci.c
@@ -638,7 +638,6 @@ static const struct ethtool_ops ne2k_pci_ethtool_ops = {
638 .get_drvinfo = ne2k_pci_get_drvinfo, 638 .get_drvinfo = ne2k_pci_get_drvinfo,
639 .get_tx_csum = ethtool_op_get_tx_csum, 639 .get_tx_csum = ethtool_op_get_tx_csum,
640 .get_sg = ethtool_op_get_sg, 640 .get_sg = ethtool_op_get_sg,
641 .get_perm_addr = ethtool_op_get_perm_addr,
642}; 641};
643 642
644static void __devexit ne2k_pci_remove_one (struct pci_dev *pdev) 643static void __devexit ne2k_pci_remove_one (struct pci_dev *pdev)
diff --git a/drivers/net/netxen/netxen_nic_ethtool.c b/drivers/net/netxen/netxen_nic_ethtool.c
index 0175f6c353f6..a6138b474b4a 100644
--- a/drivers/net/netxen/netxen_nic_ethtool.c
+++ b/drivers/net/netxen/netxen_nic_ethtool.c
@@ -755,5 +755,4 @@ struct ethtool_ops netxen_nic_ethtool_ops = {
755 .get_strings = netxen_nic_get_strings, 755 .get_strings = netxen_nic_get_strings,
756 .get_stats_count = netxen_nic_get_stats_count, 756 .get_stats_count = netxen_nic_get_stats_count,
757 .get_ethtool_stats = netxen_nic_get_ethtool_stats, 757 .get_ethtool_stats = netxen_nic_get_ethtool_stats,
758 .get_perm_addr = ethtool_op_get_perm_addr,
759}; 758};
diff --git a/drivers/net/pcnet32.c b/drivers/net/pcnet32.c
index 465485a3fbc6..e6a67531de99 100644
--- a/drivers/net/pcnet32.c
+++ b/drivers/net/pcnet32.c
@@ -1515,7 +1515,6 @@ static const struct ethtool_ops pcnet32_ethtool_ops = {
1515 .phys_id = pcnet32_phys_id, 1515 .phys_id = pcnet32_phys_id,
1516 .get_regs_len = pcnet32_get_regs_len, 1516 .get_regs_len = pcnet32_get_regs_len,
1517 .get_regs = pcnet32_get_regs, 1517 .get_regs = pcnet32_get_regs,
1518 .get_perm_addr = ethtool_op_get_perm_addr,
1519}; 1518};
1520 1519
1521/* only probes for non-PCI devices, the rest are handled by 1520/* only probes for non-PCI devices, the rest are handled by
diff --git a/drivers/net/pppoe.c b/drivers/net/pppoe.c
index 6f98834e6ace..68631a5721ac 100644
--- a/drivers/net/pppoe.c
+++ b/drivers/net/pppoe.c
@@ -108,19 +108,24 @@ static inline int cmp_addr(struct pppoe_addr *a, unsigned long sid, char *addr)
108 (memcmp(a->remote,addr,ETH_ALEN) == 0)); 108 (memcmp(a->remote,addr,ETH_ALEN) == 0));
109} 109}
110 110
111static int hash_item(unsigned long sid, unsigned char *addr) 111#if 8%PPPOE_HASH_BITS
112#error 8 must be a multiple of PPPOE_HASH_BITS
113#endif
114
115static int hash_item(unsigned int sid, unsigned char *addr)
112{ 116{
113 char hash = 0; 117 unsigned char hash = 0;
114 int i, j; 118 unsigned int i;
115 119
116 for (i = 0; i < ETH_ALEN ; ++i) { 120 for (i = 0 ; i < ETH_ALEN ; i++) {
117 for (j = 0; j < 8/PPPOE_HASH_BITS ; ++j) { 121 hash ^= addr[i];
118 hash ^= addr[i] >> ( j * PPPOE_HASH_BITS ); 122 }
119 } 123 for (i = 0 ; i < sizeof(sid_t)*8 ; i += 8 ){
124 hash ^= sid>>i;
125 }
126 for (i = 8 ; (i>>=1) >= PPPOE_HASH_BITS ; ) {
127 hash ^= hash>>i;
120 } 128 }
121
122 for (i = 0; i < (sizeof(unsigned long)*8) / PPPOE_HASH_BITS ; ++i)
123 hash ^= sid >> (i*PPPOE_HASH_BITS);
124 129
125 return hash & ( PPPOE_HASH_SIZE - 1 ); 130 return hash & ( PPPOE_HASH_SIZE - 1 );
126} 131}
@@ -664,8 +669,8 @@ static int pppoe_ioctl(struct socket *sock, unsigned int cmd,
664{ 669{
665 struct sock *sk = sock->sk; 670 struct sock *sk = sock->sk;
666 struct pppox_sock *po = pppox_sk(sk); 671 struct pppox_sock *po = pppox_sk(sk);
667 int val = 0; 672 int val;
668 int err = 0; 673 int err;
669 674
670 switch (cmd) { 675 switch (cmd) {
671 case PPPIOCGMRU: 676 case PPPIOCGMRU:
@@ -754,8 +759,9 @@ static int pppoe_ioctl(struct socket *sock, unsigned int cmd,
754 err = 0; 759 err = 0;
755 break; 760 break;
756 761
757 default:; 762 default:
758 }; 763 err = -ENOTTY;
764 }
759 765
760 return err; 766 return err;
761} 767}
@@ -773,6 +779,7 @@ static int pppoe_sendmsg(struct kiocb *iocb, struct socket *sock,
773 struct net_device *dev; 779 struct net_device *dev;
774 char *start; 780 char *start;
775 781
782 lock_sock(sk);
776 if (sock_flag(sk, SOCK_DEAD) || !(sk->sk_state & PPPOX_CONNECTED)) { 783 if (sock_flag(sk, SOCK_DEAD) || !(sk->sk_state & PPPOX_CONNECTED)) {
777 error = -ENOTCONN; 784 error = -ENOTCONN;
778 goto end; 785 goto end;
@@ -783,8 +790,6 @@ static int pppoe_sendmsg(struct kiocb *iocb, struct socket *sock,
783 hdr.code = 0; 790 hdr.code = 0;
784 hdr.sid = po->num; 791 hdr.sid = po->num;
785 792
786 lock_sock(sk);
787
788 dev = po->pppoe_dev; 793 dev = po->pppoe_dev;
789 794
790 error = -EMSGSIZE; 795 error = -EMSGSIZE;
diff --git a/drivers/net/pppox.c b/drivers/net/pppox.c
index f3e47d0c2b3c..25c52b55c38f 100644
--- a/drivers/net/pppox.c
+++ b/drivers/net/pppox.c
@@ -73,7 +73,7 @@ int pppox_ioctl(struct socket *sock, unsigned int cmd, unsigned long arg)
73{ 73{
74 struct sock *sk = sock->sk; 74 struct sock *sk = sock->sk;
75 struct pppox_sock *po = pppox_sk(sk); 75 struct pppox_sock *po = pppox_sk(sk);
76 int rc = 0; 76 int rc;
77 77
78 lock_sock(sk); 78 lock_sock(sk);
79 79
@@ -94,12 +94,9 @@ int pppox_ioctl(struct socket *sock, unsigned int cmd, unsigned long arg)
94 break; 94 break;
95 } 95 }
96 default: 96 default:
97 if (pppox_protos[sk->sk_protocol]->ioctl) 97 rc = pppox_protos[sk->sk_protocol]->ioctl ?
98 rc = pppox_protos[sk->sk_protocol]->ioctl(sock, cmd, 98 pppox_protos[sk->sk_protocol]->ioctl(sock, cmd, arg) : -ENOTTY;
99 arg); 99 }
100
101 break;
102 };
103 100
104 release_sock(sk); 101 release_sock(sk);
105 return rc; 102 return rc;
diff --git a/drivers/net/qla3xxx.c b/drivers/net/qla3xxx.c
index 8be8be451ada..69da95b5ad0c 100755
--- a/drivers/net/qla3xxx.c
+++ b/drivers/net/qla3xxx.c
@@ -1904,7 +1904,6 @@ static void ql_get_pauseparam(struct net_device *ndev,
1904static const struct ethtool_ops ql3xxx_ethtool_ops = { 1904static const struct ethtool_ops ql3xxx_ethtool_ops = {
1905 .get_settings = ql_get_settings, 1905 .get_settings = ql_get_settings,
1906 .get_drvinfo = ql_get_drvinfo, 1906 .get_drvinfo = ql_get_drvinfo,
1907 .get_perm_addr = ethtool_op_get_perm_addr,
1908 .get_link = ethtool_op_get_link, 1907 .get_link = ethtool_op_get_link,
1909 .get_msglevel = ql_get_msglevel, 1908 .get_msglevel = ql_get_msglevel,
1910 .set_msglevel = ql_set_msglevel, 1909 .set_msglevel = ql_set_msglevel,
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index bb6896ae3151..c9333b9dd51a 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -1066,7 +1066,6 @@ static const struct ethtool_ops rtl8169_ethtool_ops = {
1066 .get_strings = rtl8169_get_strings, 1066 .get_strings = rtl8169_get_strings,
1067 .get_stats_count = rtl8169_get_stats_count, 1067 .get_stats_count = rtl8169_get_stats_count,
1068 .get_ethtool_stats = rtl8169_get_ethtool_stats, 1068 .get_ethtool_stats = rtl8169_get_ethtool_stats,
1069 .get_perm_addr = ethtool_op_get_perm_addr,
1070}; 1069};
1071 1070
1072static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, 1071static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg,
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c
index 2be0a0f1b48f..24feb00600ee 100644
--- a/drivers/net/s2io.c
+++ b/drivers/net/s2io.c
@@ -2430,7 +2430,7 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
2430 (rxdp3->Buffer1_ptr == DMA_ERROR_CODE)) { 2430 (rxdp3->Buffer1_ptr == DMA_ERROR_CODE)) {
2431 pci_unmap_single 2431 pci_unmap_single
2432 (nic->pdev, 2432 (nic->pdev,
2433 (dma_addr_t)skb->data, 2433 (dma_addr_t)rxdp3->Buffer2_ptr,
2434 dev->mtu + 4, 2434 dev->mtu + 4,
2435 PCI_DMA_FROMDEVICE); 2435 PCI_DMA_FROMDEVICE);
2436 goto pci_map_failed; 2436 goto pci_map_failed;
@@ -6211,7 +6211,7 @@ static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp,
6211 if( (rxdp3->Buffer0_ptr == 0) || 6211 if( (rxdp3->Buffer0_ptr == 0) ||
6212 (rxdp3->Buffer0_ptr == DMA_ERROR_CODE)) { 6212 (rxdp3->Buffer0_ptr == DMA_ERROR_CODE)) {
6213 pci_unmap_single (sp->pdev, 6213 pci_unmap_single (sp->pdev,
6214 (dma_addr_t)(*skb)->data, 6214 (dma_addr_t)rxdp3->Buffer2_ptr,
6215 dev->mtu + 4, PCI_DMA_FROMDEVICE); 6215 dev->mtu + 4, PCI_DMA_FROMDEVICE);
6216 goto memalloc_failed; 6216 goto memalloc_failed;
6217 } 6217 }
@@ -6224,7 +6224,10 @@ static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp,
6224 if( (rxdp3->Buffer1_ptr == 0) || 6224 if( (rxdp3->Buffer1_ptr == 0) ||
6225 (rxdp3->Buffer1_ptr == DMA_ERROR_CODE)) { 6225 (rxdp3->Buffer1_ptr == DMA_ERROR_CODE)) {
6226 pci_unmap_single (sp->pdev, 6226 pci_unmap_single (sp->pdev,
6227 (dma_addr_t)(*skb)->data, 6227 (dma_addr_t)rxdp3->Buffer0_ptr,
6228 BUF0_LEN, PCI_DMA_FROMDEVICE);
6229 pci_unmap_single (sp->pdev,
6230 (dma_addr_t)rxdp3->Buffer2_ptr,
6228 dev->mtu + 4, PCI_DMA_FROMDEVICE); 6231 dev->mtu + 4, PCI_DMA_FROMDEVICE);
6229 goto memalloc_failed; 6232 goto memalloc_failed;
6230 } 6233 }
diff --git a/drivers/net/sc92031.c b/drivers/net/sc92031.c
index 5b7284c955dc..872cb1cc9c41 100644
--- a/drivers/net/sc92031.c
+++ b/drivers/net/sc92031.c
@@ -1402,7 +1402,6 @@ static struct ethtool_ops sc92031_ethtool_ops = {
1402 .get_strings = sc92031_ethtool_get_strings, 1402 .get_strings = sc92031_ethtool_get_strings,
1403 .get_stats_count = sc92031_ethtool_get_stats_count, 1403 .get_stats_count = sc92031_ethtool_get_stats_count,
1404 .get_ethtool_stats = sc92031_ethtool_get_ethtool_stats, 1404 .get_ethtool_stats = sc92031_ethtool_get_ethtool_stats,
1405 .get_perm_addr = ethtool_op_get_perm_addr,
1406 .get_ufo = ethtool_op_get_ufo, 1405 .get_ufo = ethtool_op_get_ufo,
1407}; 1406};
1408 1407
diff --git a/drivers/net/skfp/pmf.c b/drivers/net/skfp/pmf.c
index efc639c013fd..ea85de918233 100644
--- a/drivers/net/skfp/pmf.c
+++ b/drivers/net/skfp/pmf.c
@@ -575,7 +575,7 @@ void smt_add_para(struct s_smc *smc, struct s_pcon *pcon, u_short para,
575 int sp_len ; 575 int sp_len ;
576 576
577 /* 577 /*
578 * skip if errror 578 * skip if error
579 */ 579 */
580 if (pcon->pc_err) 580 if (pcon->pc_err)
581 return ; 581 return ;
diff --git a/drivers/net/skge.c b/drivers/net/skge.c
index 776692946562..e3d8520209b8 100644
--- a/drivers/net/skge.c
+++ b/drivers/net/skge.c
@@ -821,7 +821,6 @@ static const struct ethtool_ops skge_ethtool_ops = {
821 .phys_id = skge_phys_id, 821 .phys_id = skge_phys_id,
822 .get_stats_count = skge_get_stats_count, 822 .get_stats_count = skge_get_stats_count,
823 .get_ethtool_stats = skge_get_ethtool_stats, 823 .get_ethtool_stats = skge_get_ethtool_stats,
824 .get_perm_addr = ethtool_op_get_perm_addr,
825}; 824};
826 825
827/* 826/*
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 13f08a390e1f..e7a2eadcc3b0 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -3548,7 +3548,6 @@ static const struct ethtool_ops sky2_ethtool_ops = {
3548 .phys_id = sky2_phys_id, 3548 .phys_id = sky2_phys_id,
3549 .get_stats_count = sky2_get_stats_count, 3549 .get_stats_count = sky2_get_stats_count,
3550 .get_ethtool_stats = sky2_get_ethtool_stats, 3550 .get_ethtool_stats = sky2_get_ethtool_stats,
3551 .get_perm_addr = ethtool_op_get_perm_addr,
3552}; 3551};
3553 3552
3554#ifdef CONFIG_SKY2_DEBUG 3553#ifdef CONFIG_SKY2_DEBUG
diff --git a/drivers/net/sundance.c b/drivers/net/sundance.c
index af0c9831074c..a8f2af8f778a 100644
--- a/drivers/net/sundance.c
+++ b/drivers/net/sundance.c
@@ -1586,7 +1586,6 @@ static const struct ethtool_ops ethtool_ops = {
1586 .get_link = get_link, 1586 .get_link = get_link,
1587 .get_msglevel = get_msglevel, 1587 .get_msglevel = get_msglevel,
1588 .set_msglevel = set_msglevel, 1588 .set_msglevel = set_msglevel,
1589 .get_perm_addr = ethtool_op_get_perm_addr,
1590}; 1589};
1591 1590
1592static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1591static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
diff --git a/drivers/net/sunlance.c b/drivers/net/sunlance.c
index 053b7cb0d944..68e4f660367d 100644
--- a/drivers/net/sunlance.c
+++ b/drivers/net/sunlance.c
@@ -99,8 +99,7 @@ static char lancestr[] = "LANCE";
99#include <asm/byteorder.h> /* Used by the checksum routines */ 99#include <asm/byteorder.h> /* Used by the checksum routines */
100#include <asm/idprom.h> 100#include <asm/idprom.h>
101#include <asm/sbus.h> 101#include <asm/sbus.h>
102#include <asm/openprom.h> 102#include <asm/prom.h>
103#include <asm/oplib.h>
104#include <asm/auxio.h> /* For tpe-link-test? setting */ 103#include <asm/auxio.h> /* For tpe-link-test? setting */
105#include <asm/irq.h> 104#include <asm/irq.h>
106 105
@@ -1326,6 +1325,7 @@ static int __devinit sparc_lance_probe_one(struct sbus_dev *sdev,
1326 struct sbus_dev *lebuffer) 1325 struct sbus_dev *lebuffer)
1327{ 1326{
1328 static unsigned version_printed; 1327 static unsigned version_printed;
1328 struct device_node *dp = sdev->ofdev.node;
1329 struct net_device *dev; 1329 struct net_device *dev;
1330 struct lance_private *lp; 1330 struct lance_private *lp;
1331 int i; 1331 int i;
@@ -1389,54 +1389,46 @@ static int __devinit sparc_lance_probe_one(struct sbus_dev *sdev,
1389 lp->rx = lance_rx_dvma; 1389 lp->rx = lance_rx_dvma;
1390 lp->tx = lance_tx_dvma; 1390 lp->tx = lance_tx_dvma;
1391 } 1391 }
1392 lp->busmaster_regval = prom_getintdefault(sdev->prom_node, 1392 lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval",
1393 "busmaster-regval", 1393 (LE_C3_BSWP |
1394 (LE_C3_BSWP | LE_C3_ACON | 1394 LE_C3_ACON |
1395 LE_C3_BCON)); 1395 LE_C3_BCON));
1396 1396
1397 lp->name = lancestr; 1397 lp->name = lancestr;
1398 lp->ledma = ledma; 1398 lp->ledma = ledma;
1399 1399
1400 lp->burst_sizes = 0; 1400 lp->burst_sizes = 0;
1401 if (lp->ledma) { 1401 if (lp->ledma) {
1402 char prop[6]; 1402 struct device_node *ledma_dp = ledma->sdev->ofdev.node;
1403 const char *prop;
1403 unsigned int sbmask; 1404 unsigned int sbmask;
1404 u32 csr; 1405 u32 csr;
1405 1406
1406 /* Find burst-size property for ledma */ 1407 /* Find burst-size property for ledma */
1407 lp->burst_sizes = prom_getintdefault(ledma->sdev->prom_node, 1408 lp->burst_sizes = of_getintprop_default(ledma_dp,
1408 "burst-sizes", 0); 1409 "burst-sizes", 0);
1409 1410
1410 /* ledma may be capable of fast bursts, but sbus may not. */ 1411 /* ledma may be capable of fast bursts, but sbus may not. */
1411 sbmask = prom_getintdefault(ledma->sdev->bus->prom_node, 1412 sbmask = of_getintprop_default(ledma_dp, "burst-sizes",
1412 "burst-sizes", DMA_BURSTBITS); 1413 DMA_BURSTBITS);
1413 lp->burst_sizes &= sbmask; 1414 lp->burst_sizes &= sbmask;
1414 1415
1415 /* Get the cable-selection property */ 1416 /* Get the cable-selection property */
1416 memset(prop, 0, sizeof(prop)); 1417 prop = of_get_property(ledma_dp, "cable-selection", NULL);
1417 prom_getstring(ledma->sdev->prom_node, "cable-selection", 1418 if (!prop || prop[0] == '\0') {
1418 prop, sizeof(prop)); 1419 struct device_node *nd;
1419 if (prop[0] == 0) {
1420 int topnd, nd;
1421 1420
1422 printk(KERN_INFO "SunLance: using auto-carrier-detection.\n"); 1421 printk(KERN_INFO "SunLance: using "
1422 "auto-carrier-detection.\n");
1423 1423
1424 /* Is this found at /options .attributes in all 1424 nd = of_find_node_by_path("/options");
1425 * Prom versions? XXX
1426 */
1427 topnd = prom_getchild(prom_root_node);
1428
1429 nd = prom_searchsiblings(topnd, "options");
1430 if (!nd) 1425 if (!nd)
1431 goto no_link_test; 1426 goto no_link_test;
1432 1427
1433 if (!prom_node_has_property(nd, "tpe-link-test?")) 1428 prop = of_get_property(nd, "tpe-link-test?", NULL);
1429 if (!prop)
1434 goto no_link_test; 1430 goto no_link_test;
1435 1431
1436 memset(prop, 0, sizeof(prop));
1437 prom_getstring(nd, "tpe-link-test?", prop,
1438 sizeof(prop));
1439
1440 if (strcmp(prop, "true")) { 1432 if (strcmp(prop, "true")) {
1441 printk(KERN_NOTICE "SunLance: warning: overriding option " 1433 printk(KERN_NOTICE "SunLance: warning: overriding option "
1442 "'tpe-link-test?'\n"); 1434 "'tpe-link-test?'\n");
diff --git a/drivers/net/sunvnet.c b/drivers/net/sunvnet.c
index 61f98251feab..ff1028a597df 100644
--- a/drivers/net/sunvnet.c
+++ b/drivers/net/sunvnet.c
@@ -906,7 +906,6 @@ static const struct ethtool_ops vnet_ethtool_ops = {
906 .get_msglevel = vnet_get_msglevel, 906 .get_msglevel = vnet_get_msglevel,
907 .set_msglevel = vnet_set_msglevel, 907 .set_msglevel = vnet_set_msglevel,
908 .get_link = ethtool_op_get_link, 908 .get_link = ethtool_op_get_link,
909 .get_perm_addr = ethtool_op_get_perm_addr,
910}; 909};
911 910
912static void vnet_port_free_tx_bufs(struct vnet_port *port) 911static void vnet_port_free_tx_bufs(struct vnet_port *port)
diff --git a/drivers/net/tc35815.c b/drivers/net/tc35815.c
index 7f94ca930988..ec41469eee82 100644
--- a/drivers/net/tc35815.c
+++ b/drivers/net/tc35815.c
@@ -2198,7 +2198,6 @@ static const struct ethtool_ops tc35815_ethtool_ops = {
2198 .get_strings = tc35815_get_strings, 2198 .get_strings = tc35815_get_strings,
2199 .get_stats_count = tc35815_get_stats_count, 2199 .get_stats_count = tc35815_get_stats_count,
2200 .get_ethtool_stats = tc35815_get_ethtool_stats, 2200 .get_ethtool_stats = tc35815_get_ethtool_stats,
2201 .get_perm_addr = ethtool_op_get_perm_addr,
2202}; 2201};
2203 2202
2204static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 2203static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 887b9a5cfe48..dc41c055ebb5 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -9294,7 +9294,6 @@ static const struct ethtool_ops tg3_ethtool_ops = {
9294 .get_ethtool_stats = tg3_get_ethtool_stats, 9294 .get_ethtool_stats = tg3_get_ethtool_stats,
9295 .get_coalesce = tg3_get_coalesce, 9295 .get_coalesce = tg3_get_coalesce,
9296 .set_coalesce = tg3_set_coalesce, 9296 .set_coalesce = tg3_set_coalesce,
9297 .get_perm_addr = ethtool_op_get_perm_addr,
9298}; 9297};
9299 9298
9300static void __devinit tg3_get_eeprom_size(struct tg3 *tp) 9299static void __devinit tg3_get_eeprom_size(struct tg3 *tp)
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c
index f87d76981ab7..eca984f89bbf 100644
--- a/drivers/net/tulip/tulip_core.c
+++ b/drivers/net/tulip/tulip_core.c
@@ -1471,14 +1471,6 @@ static int __devinit tulip_init_one (struct pci_dev *pdev,
1471 sa_offset = 2; /* Grrr, damn Matrox boards. */ 1471 sa_offset = 2; /* Grrr, damn Matrox boards. */
1472 multiport_cnt = 4; 1472 multiport_cnt = 4;
1473 } 1473 }
1474#ifdef CONFIG_DDB5477
1475 if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 4)) {
1476 /* DDB5477 MAC address in first EEPROM locations. */
1477 sa_offset = 0;
1478 /* No media table either */
1479 tp->flags &= ~HAS_MEDIA_TABLE;
1480 }
1481#endif
1482#ifdef CONFIG_MIPS_COBALT 1474#ifdef CONFIG_MIPS_COBALT
1483 if ((pdev->bus->number == 0) && 1475 if ((pdev->bus->number == 0) &&
1484 ((PCI_SLOT(pdev->devfn) == 7) || 1476 ((PCI_SLOT(pdev->devfn) == 7) ||
diff --git a/drivers/net/via-rhine.c b/drivers/net/via-rhine.c
index f51c2c138f10..c3fe230695a0 100644
--- a/drivers/net/via-rhine.c
+++ b/drivers/net/via-rhine.c
@@ -1805,7 +1805,6 @@ static const struct ethtool_ops netdev_ethtool_ops = {
1805 .set_wol = rhine_set_wol, 1805 .set_wol = rhine_set_wol,
1806 .get_sg = ethtool_op_get_sg, 1806 .get_sg = ethtool_op_get_sg,
1807 .get_tx_csum = ethtool_op_get_tx_csum, 1807 .get_tx_csum = ethtool_op_get_tx_csum,
1808 .get_perm_addr = ethtool_op_get_perm_addr,
1809}; 1808};
1810 1809
1811static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1810static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c
index f331843d1102..93574add4063 100644
--- a/drivers/net/via-velocity.c
+++ b/drivers/net/via-velocity.c
@@ -1613,7 +1613,7 @@ static void velocity_error(struct velocity_info *vptr, int status)
1613 if (status & ISR_TXSTLI) { 1613 if (status & ISR_TXSTLI) {
1614 struct mac_regs __iomem * regs = vptr->mac_regs; 1614 struct mac_regs __iomem * regs = vptr->mac_regs;
1615 1615
1616 printk(KERN_ERR "TD structure errror TDindex=%hx\n", readw(&regs->TDIdx[0])); 1616 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1617 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR); 1617 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1618 writew(TRDCSR_RUN, &regs->TDCSRClr); 1618 writew(TRDCSR_RUN, &regs->TDCSRClr);
1619 netif_stop_queue(vptr->dev); 1619 netif_stop_queue(vptr->dev);
diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c
index 5d58ad55d85c..e2be84001105 100644
--- a/drivers/parport/parport_pc.c
+++ b/drivers/parport/parport_pc.c
@@ -3445,7 +3445,6 @@ static void __exit parport_pc_exit(void)
3445 pnp_unregister_driver (&parport_pc_pnp_driver); 3445 pnp_unregister_driver (&parport_pc_pnp_driver);
3446 platform_driver_unregister(&parport_pc_platform_driver); 3446 platform_driver_unregister(&parport_pc_platform_driver);
3447 3447
3448 spin_lock(&ports_lock);
3449 while (!list_empty(&ports_list)) { 3448 while (!list_empty(&ports_list)) {
3450 struct parport_pc_private *priv; 3449 struct parport_pc_private *priv;
3451 struct parport *port; 3450 struct parport *port;
@@ -3455,11 +3454,8 @@ static void __exit parport_pc_exit(void)
3455 if (port->dev && port->dev->bus == &platform_bus_type) 3454 if (port->dev && port->dev->bus == &platform_bus_type)
3456 platform_device_unregister( 3455 platform_device_unregister(
3457 to_platform_device(port->dev)); 3456 to_platform_device(port->dev));
3458 spin_unlock(&ports_lock);
3459 parport_pc_unregister_port(port); 3457 parport_pc_unregister_port(port);
3460 spin_lock(&ports_lock);
3461 } 3458 }
3462 spin_unlock(&ports_lock);
3463} 3459}
3464 3460
3465MODULE_AUTHOR("Phil Blundell, Tim Waugh, others"); 3461MODULE_AUTHOR("Phil Blundell, Tim Waugh, others");
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 8e58ea3d95c0..004bc2487270 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -310,7 +310,7 @@ static int pci_default_resume(struct pci_dev *pci_dev)
310 /* restore the PCI config space */ 310 /* restore the PCI config space */
311 pci_restore_state(pci_dev); 311 pci_restore_state(pci_dev);
312 /* if the device was enabled before suspend, reenable */ 312 /* if the device was enabled before suspend, reenable */
313 retval = __pci_reenable_device(pci_dev); 313 retval = pci_reenable_device(pci_dev);
314 /* if the device was busmaster before the suspend, make it busmaster again */ 314 /* if the device was busmaster before the suspend, make it busmaster again */
315 if (pci_dev->is_busmaster) 315 if (pci_dev->is_busmaster)
316 pci_set_master(pci_dev); 316 pci_set_master(pci_dev);
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 1ee9cd9c86e2..37c00f6fd801 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -695,14 +695,13 @@ static int do_pci_enable_device(struct pci_dev *dev, int bars)
695} 695}
696 696
697/** 697/**
698 * __pci_reenable_device - Resume abandoned device 698 * pci_reenable_device - Resume abandoned device
699 * @dev: PCI device to be resumed 699 * @dev: PCI device to be resumed
700 * 700 *
701 * Note this function is a backend of pci_default_resume and is not supposed 701 * Note this function is a backend of pci_default_resume and is not supposed
702 * to be called by normal code, write proper resume handler and use it instead. 702 * to be called by normal code, write proper resume handler and use it instead.
703 */ 703 */
704int 704int pci_reenable_device(struct pci_dev *dev)
705__pci_reenable_device(struct pci_dev *dev)
706{ 705{
707 if (atomic_read(&dev->enable_cnt)) 706 if (atomic_read(&dev->enable_cnt))
708 return do_pci_enable_device(dev, (1 << PCI_NUM_RESOURCES) - 1); 707 return do_pci_enable_device(dev, (1 << PCI_NUM_RESOURCES) - 1);
@@ -1604,7 +1603,7 @@ early_param("pci", pci_setup);
1604device_initcall(pci_init); 1603device_initcall(pci_init);
1605 1604
1606EXPORT_SYMBOL_GPL(pci_restore_bars); 1605EXPORT_SYMBOL_GPL(pci_restore_bars);
1607EXPORT_SYMBOL(__pci_reenable_device); 1606EXPORT_SYMBOL(pci_reenable_device);
1608EXPORT_SYMBOL(pci_enable_device_bars); 1607EXPORT_SYMBOL(pci_enable_device_bars);
1609EXPORT_SYMBOL(pci_enable_device); 1608EXPORT_SYMBOL(pci_enable_device);
1610EXPORT_SYMBOL(pcim_enable_device); 1609EXPORT_SYMBOL(pcim_enable_device);
diff --git a/drivers/pcmcia/cs.c b/drivers/pcmcia/cs.c
index 7c93a108f9b8..f8b13f0270d7 100644
--- a/drivers/pcmcia/cs.c
+++ b/drivers/pcmcia/cs.c
@@ -409,6 +409,9 @@ static void socket_shutdown(struct pcmcia_socket *s)
409#endif 409#endif
410 s->functions = 0; 410 s->functions = 0;
411 411
412 /* give socket some time to power down */
413 msleep(100);
414
412 s->ops->get_status(s, &status); 415 s->ops->get_status(s, &status);
413 if (status & SS_POWERON) { 416 if (status & SS_POWERON) {
414 printk(KERN_ERR "PCMCIA: socket %p: *** DANGER *** unable to remove socket power\n", s); 417 printk(KERN_ERR "PCMCIA: socket %p: *** DANGER *** unable to remove socket power\n", s);
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 3f6e176e6ea1..58c806e9c58a 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -38,7 +38,7 @@ config BATTERY_DS2760
38 38
39config BATTERY_PMU 39config BATTERY_PMU
40 tristate "Apple PMU battery" 40 tristate "Apple PMU battery"
41 depends on ADB_PMU 41 depends on PPC32 && ADB_PMU
42 help 42 help
43 Say Y here to expose battery information on Apple machines 43 Say Y here to expose battery information on Apple machines
44 through the generic battery class. 44 through the generic battery class.
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 9d8d40d5c8f7..ff9e35cb308d 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -2,15 +2,13 @@
2# RTC class/drivers configuration 2# RTC class/drivers configuration
3# 3#
4 4
5menu "Real Time Clock"
6 depends on !S390
7
8config RTC_LIB 5config RTC_LIB
9 tristate 6 tristate
10 7
11config RTC_CLASS 8menuconfig RTC_CLASS
12 tristate "RTC class" 9 tristate "Real Time Clock"
13 default n 10 default n
11 depends on !S390
14 select RTC_LIB 12 select RTC_LIB
15 help 13 help
16 Generic RTC class support. If you say yes here, you will 14 Generic RTC class support. If you say yes here, you will
@@ -20,6 +18,8 @@ config RTC_CLASS
20 This driver can also be built as a module. If so, the module 18 This driver can also be built as a module. If so, the module
21 will be called rtc-class. 19 will be called rtc-class.
22 20
21if RTC_CLASS
22
23config RTC_HCTOSYS 23config RTC_HCTOSYS
24 bool "Set system time from RTC on startup and resume" 24 bool "Set system time from RTC on startup and resume"
25 depends on RTC_CLASS = y 25 depends on RTC_CLASS = y
@@ -58,11 +58,10 @@ config RTC_DEBUG
58 and individual RTC drivers. 58 and individual RTC drivers.
59 59
60comment "RTC interfaces" 60comment "RTC interfaces"
61 depends on RTC_CLASS
62 61
63config RTC_INTF_SYSFS 62config RTC_INTF_SYSFS
64 boolean "/sys/class/rtc/rtcN (sysfs)" 63 boolean "/sys/class/rtc/rtcN (sysfs)"
65 depends on RTC_CLASS && SYSFS 64 depends on SYSFS
66 default RTC_CLASS 65 default RTC_CLASS
67 help 66 help
68 Say yes here if you want to use your RTCs using sysfs interfaces, 67 Say yes here if you want to use your RTCs using sysfs interfaces,
@@ -73,7 +72,7 @@ config RTC_INTF_SYSFS
73 72
74config RTC_INTF_PROC 73config RTC_INTF_PROC
75 boolean "/proc/driver/rtc (procfs for rtc0)" 74 boolean "/proc/driver/rtc (procfs for rtc0)"
76 depends on RTC_CLASS && PROC_FS 75 depends on PROC_FS
77 default RTC_CLASS 76 default RTC_CLASS
78 help 77 help
79 Say yes here if you want to use your first RTC through the proc 78 Say yes here if you want to use your first RTC through the proc
@@ -85,7 +84,6 @@ config RTC_INTF_PROC
85 84
86config RTC_INTF_DEV 85config RTC_INTF_DEV
87 boolean "/dev/rtcN (character devices)" 86 boolean "/dev/rtcN (character devices)"
88 depends on RTC_CLASS
89 default RTC_CLASS 87 default RTC_CLASS
90 help 88 help
91 Say yes here if you want to use your RTCs using the /dev 89 Say yes here if you want to use your RTCs using the /dev
@@ -107,7 +105,6 @@ config RTC_INTF_DEV_UIE_EMUL
107 105
108config RTC_DRV_TEST 106config RTC_DRV_TEST
109 tristate "Test driver/device" 107 tristate "Test driver/device"
110 depends on RTC_CLASS
111 help 108 help
112 If you say yes here you get support for the 109 If you say yes here you get support for the
113 RTC test driver. It's a software RTC which can be 110 RTC test driver. It's a software RTC which can be
@@ -121,11 +118,12 @@ config RTC_DRV_TEST
121 will be called rtc-test. 118 will be called rtc-test.
122 119
123comment "I2C RTC drivers" 120comment "I2C RTC drivers"
124 depends on RTC_CLASS && I2C 121 depends on I2C
122
123if I2C
125 124
126config RTC_DRV_DS1307 125config RTC_DRV_DS1307
127 tristate "Dallas/Maxim DS1307/37/38/39/40, ST M41T00" 126 tristate "Dallas/Maxim DS1307/37/38/39/40, ST M41T00"
128 depends on RTC_CLASS && I2C
129 help 127 help
130 If you say yes here you get support for various compatible RTC 128 If you say yes here you get support for various compatible RTC
131 chips (often with battery backup) connected with I2C. This driver 129 chips (often with battery backup) connected with I2C. This driver
@@ -143,7 +141,6 @@ config RTC_DRV_DS1307
143 141
144config RTC_DRV_DS1672 142config RTC_DRV_DS1672
145 tristate "Dallas/Maxim DS1672" 143 tristate "Dallas/Maxim DS1672"
146 depends on RTC_CLASS && I2C
147 help 144 help
148 If you say yes here you get support for the 145 If you say yes here you get support for the
149 Dallas/Maxim DS1672 timekeeping chip. 146 Dallas/Maxim DS1672 timekeeping chip.
@@ -153,7 +150,6 @@ config RTC_DRV_DS1672
153 150
154config RTC_DRV_MAX6900 151config RTC_DRV_MAX6900
155 tristate "Maxim 6900" 152 tristate "Maxim 6900"
156 depends on RTC_CLASS && I2C
157 help 153 help
158 If you say yes here you will get support for the 154 If you say yes here you will get support for the
159 Maxim MAX6900 I2C RTC chip. 155 Maxim MAX6900 I2C RTC chip.
@@ -163,7 +159,6 @@ config RTC_DRV_MAX6900
163 159
164config RTC_DRV_RS5C372 160config RTC_DRV_RS5C372
165 tristate "Ricoh RS5C372A/B, RV5C386, RV5C387A" 161 tristate "Ricoh RS5C372A/B, RV5C386, RV5C387A"
166 depends on RTC_CLASS && I2C
167 help 162 help
168 If you say yes here you get support for the 163 If you say yes here you get support for the
169 Ricoh RS5C372A, RS5C372B, RV5C386, and RV5C387A RTC chips. 164 Ricoh RS5C372A, RS5C372B, RV5C386, and RV5C387A RTC chips.
@@ -173,7 +168,6 @@ config RTC_DRV_RS5C372
173 168
174config RTC_DRV_ISL1208 169config RTC_DRV_ISL1208
175 tristate "Intersil 1208" 170 tristate "Intersil 1208"
176 depends on RTC_CLASS && I2C
177 help 171 help
178 If you say yes here you get support for the 172 If you say yes here you get support for the
179 Intersil 1208 RTC chip. 173 Intersil 1208 RTC chip.
@@ -183,7 +177,6 @@ config RTC_DRV_ISL1208
183 177
184config RTC_DRV_X1205 178config RTC_DRV_X1205
185 tristate "Xicor/Intersil X1205" 179 tristate "Xicor/Intersil X1205"
186 depends on RTC_CLASS && I2C
187 help 180 help
188 If you say yes here you get support for the 181 If you say yes here you get support for the
189 Xicor/Intersil X1205 RTC chip. 182 Xicor/Intersil X1205 RTC chip.
@@ -193,7 +186,6 @@ config RTC_DRV_X1205
193 186
194config RTC_DRV_PCF8563 187config RTC_DRV_PCF8563
195 tristate "Philips PCF8563/Epson RTC8564" 188 tristate "Philips PCF8563/Epson RTC8564"
196 depends on RTC_CLASS && I2C
197 help 189 help
198 If you say yes here you get support for the 190 If you say yes here you get support for the
199 Philips PCF8563 RTC chip. The Epson RTC8564 191 Philips PCF8563 RTC chip. The Epson RTC8564
@@ -204,7 +196,6 @@ config RTC_DRV_PCF8563
204 196
205config RTC_DRV_PCF8583 197config RTC_DRV_PCF8583
206 tristate "Philips PCF8583" 198 tristate "Philips PCF8583"
207 depends on RTC_CLASS && I2C
208 help 199 help
209 If you say yes here you get support for the Philips PCF8583 200 If you say yes here you get support for the Philips PCF8583
210 RTC chip found on Acorn RiscPCs. This driver supports the 201 RTC chip found on Acorn RiscPCs. This driver supports the
@@ -217,7 +208,6 @@ config RTC_DRV_PCF8583
217 208
218config RTC_DRV_M41T80 209config RTC_DRV_M41T80
219 tristate "ST M41T80 series RTC" 210 tristate "ST M41T80 series RTC"
220 depends on RTC_CLASS && I2C
221 help 211 help
222 If you say Y here you will get support for the 212 If you say Y here you will get support for the
223 ST M41T80 RTC chips series. Currently following chips are 213 ST M41T80 RTC chips series. Currently following chips are
@@ -236,19 +226,21 @@ config RTC_DRV_M41T80_WDT
236 226
237config RTC_DRV_TWL92330 227config RTC_DRV_TWL92330
238 boolean "TI TWL92330/Menelaus" 228 boolean "TI TWL92330/Menelaus"
239 depends on RTC_CLASS && I2C && MENELAUS 229 depends on MENELAUS
240 help 230 help
241 If you say yes here you get support for the RTC on the 231 If you say yes here you get support for the RTC on the
242 TWL92330 "Menelaus" power mangement chip, used with OMAP2 232 TWL92330 "Menelaus" power mangement chip, used with OMAP2
243 platforms. The support is integrated with the rest of 233 platforms. The support is integrated with the rest of
244 the Menelaus driver; it's not separate module. 234 the Menelaus driver; it's not separate module.
245 235
236endif # I2C
237
246comment "SPI RTC drivers" 238comment "SPI RTC drivers"
247 depends on RTC_CLASS && SPI_MASTER 239
240if SPI_MASTER
248 241
249config RTC_DRV_RS5C348 242config RTC_DRV_RS5C348
250 tristate "Ricoh RS5C348A/B" 243 tristate "Ricoh RS5C348A/B"
251 depends on RTC_CLASS && SPI_MASTER
252 help 244 help
253 If you say yes here you get support for the 245 If you say yes here you get support for the
254 Ricoh RS5C348A and RS5C348B RTC chips. 246 Ricoh RS5C348A and RS5C348B RTC chips.
@@ -258,7 +250,6 @@ config RTC_DRV_RS5C348
258 250
259config RTC_DRV_MAX6902 251config RTC_DRV_MAX6902
260 tristate "Maxim 6902" 252 tristate "Maxim 6902"
261 depends on RTC_CLASS && SPI_MASTER
262 help 253 help
263 If you say yes here you will get support for the 254 If you say yes here you will get support for the
264 Maxim MAX6902 SPI RTC chip. 255 Maxim MAX6902 SPI RTC chip.
@@ -266,8 +257,9 @@ config RTC_DRV_MAX6902
266 This driver can also be built as a module. If so, the module 257 This driver can also be built as a module. If so, the module
267 will be called rtc-max6902. 258 will be called rtc-max6902.
268 259
260endif # SPI_MASTER
261
269comment "Platform RTC drivers" 262comment "Platform RTC drivers"
270 depends on RTC_CLASS
271 263
272# this 'CMOS' RTC driver is arch dependent because <asm-generic/rtc.h> 264# this 'CMOS' RTC driver is arch dependent because <asm-generic/rtc.h>
273# requires <asm/mc146818rtc.h> defining CMOS_READ/CMOS_WRITE, and a 265# requires <asm/mc146818rtc.h> defining CMOS_READ/CMOS_WRITE, and a
@@ -275,8 +267,7 @@ comment "Platform RTC drivers"
275 267
276config RTC_DRV_CMOS 268config RTC_DRV_CMOS
277 tristate "PC-style 'CMOS'" 269 tristate "PC-style 'CMOS'"
278 depends on RTC_CLASS && (X86 || ALPHA || ARM26 || ARM \ 270 depends on X86 || ALPHA || ARM || M32R || ATARI || PPC || MIPS
279 || M32R || ATARI || PPC || MIPS)
280 help 271 help
281 Say "yes" here to get direct support for the real time clock 272 Say "yes" here to get direct support for the real time clock
282 found in every PC or ACPI-based system, and some other boards. 273 found in every PC or ACPI-based system, and some other boards.
@@ -294,13 +285,12 @@ config RTC_DRV_CMOS
294 285
295config RTC_DRV_DS1216 286config RTC_DRV_DS1216
296 tristate "Dallas DS1216" 287 tristate "Dallas DS1216"
297 depends on RTC_CLASS && SNI_RM 288 depends on SNI_RM
298 help 289 help
299 If you say yes here you get support for the Dallas DS1216 RTC chips. 290 If you say yes here you get support for the Dallas DS1216 RTC chips.
300 291
301config RTC_DRV_DS1553 292config RTC_DRV_DS1553
302 tristate "Dallas DS1553" 293 tristate "Dallas DS1553"
303 depends on RTC_CLASS
304 help 294 help
305 If you say yes here you get support for the 295 If you say yes here you get support for the
306 Dallas DS1553 timekeeping chip. 296 Dallas DS1553 timekeeping chip.
@@ -320,7 +310,6 @@ config RTC_DRV_STK17TA8
320 310
321config RTC_DRV_DS1742 311config RTC_DRV_DS1742
322 tristate "Dallas DS1742/1743" 312 tristate "Dallas DS1742/1743"
323 depends on RTC_CLASS
324 help 313 help
325 If you say yes here you get support for the 314 If you say yes here you get support for the
326 Dallas DS1742/1743 timekeeping chip. 315 Dallas DS1742/1743 timekeeping chip.
@@ -330,7 +319,6 @@ config RTC_DRV_DS1742
330 319
331config RTC_DRV_M48T86 320config RTC_DRV_M48T86
332 tristate "ST M48T86/Dallas DS12887" 321 tristate "ST M48T86/Dallas DS12887"
333 depends on RTC_CLASS
334 help 322 help
335 If you say Y here you will get support for the 323 If you say Y here you will get support for the
336 ST M48T86 and Dallas DS12887 RTC chips. 324 ST M48T86 and Dallas DS12887 RTC chips.
@@ -340,7 +328,6 @@ config RTC_DRV_M48T86
340 328
341config RTC_DRV_M48T59 329config RTC_DRV_M48T59
342 tristate "ST M48T59" 330 tristate "ST M48T59"
343 depends on RTC_CLASS
344 help 331 help
345 If you say Y here you will get support for the 332 If you say Y here you will get support for the
346 ST M48T59 RTC chip. 333 ST M48T59 RTC chip.
@@ -350,7 +337,6 @@ config RTC_DRV_M48T59
350 337
351config RTC_DRV_V3020 338config RTC_DRV_V3020
352 tristate "EM Microelectronic V3020" 339 tristate "EM Microelectronic V3020"
353 depends on RTC_CLASS
354 help 340 help
355 If you say yes here you will get support for the 341 If you say yes here you will get support for the
356 EM Microelectronic v3020 RTC chip. 342 EM Microelectronic v3020 RTC chip.
@@ -359,19 +345,17 @@ config RTC_DRV_V3020
359 will be called rtc-v3020. 345 will be called rtc-v3020.
360 346
361comment "on-CPU RTC drivers" 347comment "on-CPU RTC drivers"
362 depends on RTC_CLASS
363 348
364config RTC_DRV_OMAP 349config RTC_DRV_OMAP
365 tristate "TI OMAP1" 350 tristate "TI OMAP1"
366 depends on RTC_CLASS && ( \ 351 depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730
367 ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 )
368 help 352 help
369 Say "yes" here to support the real time clock on TI OMAP1 chips. 353 Say "yes" here to support the real time clock on TI OMAP1 chips.
370 This driver can also be built as a module called rtc-omap. 354 This driver can also be built as a module called rtc-omap.
371 355
372config RTC_DRV_S3C 356config RTC_DRV_S3C
373 tristate "Samsung S3C series SoC RTC" 357 tristate "Samsung S3C series SoC RTC"
374 depends on RTC_CLASS && ARCH_S3C2410 358 depends on ARCH_S3C2410
375 help 359 help
376 RTC (Realtime Clock) driver for the clock inbuilt into the 360 RTC (Realtime Clock) driver for the clock inbuilt into the
377 Samsung S3C24XX series of SoCs. This can provide periodic 361 Samsung S3C24XX series of SoCs. This can provide periodic
@@ -387,7 +371,7 @@ config RTC_DRV_S3C
387 371
388config RTC_DRV_EP93XX 372config RTC_DRV_EP93XX
389 tristate "Cirrus Logic EP93XX" 373 tristate "Cirrus Logic EP93XX"
390 depends on RTC_CLASS && ARCH_EP93XX 374 depends on ARCH_EP93XX
391 help 375 help
392 If you say yes here you get support for the 376 If you say yes here you get support for the
393 RTC embedded in the Cirrus Logic EP93XX processors. 377 RTC embedded in the Cirrus Logic EP93XX processors.
@@ -397,7 +381,7 @@ config RTC_DRV_EP93XX
397 381
398config RTC_DRV_SA1100 382config RTC_DRV_SA1100
399 tristate "SA11x0/PXA2xx" 383 tristate "SA11x0/PXA2xx"
400 depends on RTC_CLASS && (ARCH_SA1100 || ARCH_PXA) 384 depends on ARCH_SA1100 || ARCH_PXA
401 help 385 help
402 If you say Y here you will get access to the real time clock 386 If you say Y here you will get access to the real time clock
403 built into your SA11x0 or PXA2xx CPU. 387 built into your SA11x0 or PXA2xx CPU.
@@ -407,7 +391,7 @@ config RTC_DRV_SA1100
407 391
408config RTC_DRV_SH 392config RTC_DRV_SH
409 tristate "SuperH On-Chip RTC" 393 tristate "SuperH On-Chip RTC"
410 depends on RTC_CLASS && SUPERH && (CPU_SH3 || CPU_SH4) 394 depends on RTC_CLASS && (CPU_SH3 || CPU_SH4)
411 help 395 help
412 Say Y here to enable support for the on-chip RTC found in 396 Say Y here to enable support for the on-chip RTC found in
413 most SuperH processors. 397 most SuperH processors.
@@ -417,7 +401,7 @@ config RTC_DRV_SH
417 401
418config RTC_DRV_VR41XX 402config RTC_DRV_VR41XX
419 tristate "NEC VR41XX" 403 tristate "NEC VR41XX"
420 depends on RTC_CLASS && CPU_VR41XX 404 depends on CPU_VR41XX
421 help 405 help
422 If you say Y here you will get access to the real time clock 406 If you say Y here you will get access to the real time clock
423 built into your NEC VR41XX CPU. 407 built into your NEC VR41XX CPU.
@@ -427,7 +411,7 @@ config RTC_DRV_VR41XX
427 411
428config RTC_DRV_PL031 412config RTC_DRV_PL031
429 tristate "ARM AMBA PL031 RTC" 413 tristate "ARM AMBA PL031 RTC"
430 depends on RTC_CLASS && ARM_AMBA 414 depends on ARM_AMBA
431 help 415 help
432 If you say Y here you will get access to ARM AMBA 416 If you say Y here you will get access to ARM AMBA
433 PrimeCell PL031 RTC found on certain ARM SOCs. 417 PrimeCell PL031 RTC found on certain ARM SOCs.
@@ -437,20 +421,20 @@ config RTC_DRV_PL031
437 421
438config RTC_DRV_AT32AP700X 422config RTC_DRV_AT32AP700X
439 tristate "AT32AP700X series RTC" 423 tristate "AT32AP700X series RTC"
440 depends on RTC_CLASS && PLATFORM_AT32AP 424 depends on PLATFORM_AT32AP
441 help 425 help
442 Driver for the internal RTC (Realtime Clock) on Atmel AVR32 426 Driver for the internal RTC (Realtime Clock) on Atmel AVR32
443 AT32AP700x family processors. 427 AT32AP700x family processors.
444 428
445config RTC_DRV_AT91RM9200 429config RTC_DRV_AT91RM9200
446 tristate "AT91RM9200" 430 tristate "AT91RM9200"
447 depends on RTC_CLASS && ARCH_AT91RM9200 431 depends on ARCH_AT91RM9200
448 help 432 help
449 Driver for the Atmel AT91RM9200's internal RTC (Realtime Clock). 433 Driver for the Atmel AT91RM9200's internal RTC (Realtime Clock).
450 434
451config RTC_DRV_BFIN 435config RTC_DRV_BFIN
452 tristate "Blackfin On-Chip RTC" 436 tristate "Blackfin On-Chip RTC"
453 depends on RTC_CLASS && BFIN 437 depends on BFIN
454 help 438 help
455 If you say yes here you will get support for the 439 If you say yes here you will get support for the
456 Blackfin On-Chip Real Time Clock. 440 Blackfin On-Chip Real Time Clock.
@@ -460,8 +444,8 @@ config RTC_DRV_BFIN
460 444
461config RTC_DRV_RS5C313 445config RTC_DRV_RS5C313
462 tristate "Ricoh RS5C313" 446 tristate "Ricoh RS5C313"
463 depends on RTC_CLASS && SH_LANDISK 447 depends on SH_LANDISK
464 help 448 help
465 If you say yes here you get support for the Ricoh RS5C313 RTC chips. 449 If you say yes here you get support for the Ricoh RS5C313 RTC chips.
466 450
467endmenu 451endif # RTC_CLASS
diff --git a/drivers/rtc/rtc-dev.c b/drivers/rtc/rtc-dev.c
index 304535942de2..005fff3a3508 100644
--- a/drivers/rtc/rtc-dev.c
+++ b/drivers/rtc/rtc-dev.c
@@ -348,6 +348,8 @@ static int rtc_dev_ioctl(struct inode *inode, struct file *file,
348 case RTC_IRQP_SET: 348 case RTC_IRQP_SET:
349 if (ops->irq_set_freq) 349 if (ops->irq_set_freq)
350 err = rtc_irq_set_freq(rtc, rtc->irq_task, arg); 350 err = rtc_irq_set_freq(rtc, rtc->irq_task, arg);
351 else
352 err = -ENOTTY;
351 break; 353 break;
352 354
353#if 0 355#if 0
diff --git a/drivers/rtc/rtc-m48t59.c b/drivers/rtc/rtc-m48t59.c
index 33b752350ab5..bf60d35f580b 100644
--- a/drivers/rtc/rtc-m48t59.c
+++ b/drivers/rtc/rtc-m48t59.c
@@ -35,7 +35,7 @@
35struct m48t59_private { 35struct m48t59_private {
36 void __iomem *ioaddr; 36 void __iomem *ioaddr;
37 unsigned int size; /* iomem size */ 37 unsigned int size; /* iomem size */
38 unsigned int irq; 38 int irq;
39 struct rtc_device *rtc; 39 struct rtc_device *rtc;
40 spinlock_t lock; /* serialize the NVRAM and RTC access */ 40 spinlock_t lock; /* serialize the NVRAM and RTC access */
41}; 41};
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 54b613053468..8c1012b432bb 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -29,7 +29,7 @@
29 29
30#include <asm/mach/time.h> 30#include <asm/mach/time.h>
31 31
32#include <asm/arch/regs-rtc.h> 32#include <asm/plat-s3c/regs-rtc.h>
33 33
34/* I have yet to find an S3C implementation with more than one 34/* I have yet to find an S3C implementation with more than one
35 * of these rtc blocks in */ 35 * of these rtc blocks in */
diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c
index 418b4e63a4fa..ea63ba7828f9 100644
--- a/drivers/s390/block/dasd_eckd.c
+++ b/drivers/s390/block/dasd_eckd.c
@@ -555,7 +555,7 @@ dasd_eckd_read_conf(struct dasd_device *device)
555 if (conf_data == NULL) { 555 if (conf_data == NULL) {
556 MESSAGE(KERN_WARNING, "%s", "No configuration " 556 MESSAGE(KERN_WARNING, "%s", "No configuration "
557 "data retrieved"); 557 "data retrieved");
558 continue; /* no errror */ 558 continue; /* no error */
559 } 559 }
560 if (conf_len != sizeof (struct dasd_eckd_confdata)) { 560 if (conf_len != sizeof (struct dasd_eckd_confdata)) {
561 MESSAGE(KERN_WARNING, 561 MESSAGE(KERN_WARNING,
@@ -564,7 +564,7 @@ dasd_eckd_read_conf(struct dasd_device *device)
564 conf_len, 564 conf_len,
565 sizeof (struct dasd_eckd_confdata)); 565 sizeof (struct dasd_eckd_confdata));
566 kfree(conf_data); 566 kfree(conf_data);
567 continue; /* no errror */ 567 continue; /* no error */
568 } 568 }
569 /* save first valid configuration data */ 569 /* save first valid configuration data */
570 if (!conf_data_saved){ 570 if (!conf_data_saved){
diff --git a/drivers/sbus/char/bbc_envctrl.c b/drivers/sbus/char/bbc_envctrl.c
index e821a155b658..0bde26989a23 100644
--- a/drivers/sbus/char/bbc_envctrl.c
+++ b/drivers/sbus/char/bbc_envctrl.c
@@ -479,11 +479,12 @@ static int kenvctrld(void *__unused)
479 479
480static void attach_one_temp(struct linux_ebus_child *echild, int temp_idx) 480static void attach_one_temp(struct linux_ebus_child *echild, int temp_idx)
481{ 481{
482 struct bbc_cpu_temperature *tp = kmalloc(sizeof(*tp), GFP_KERNEL); 482 struct bbc_cpu_temperature *tp;
483 483
484 tp = kzalloc(sizeof(*tp), GFP_KERNEL);
484 if (!tp) 485 if (!tp)
485 return; 486 return;
486 memset(tp, 0, sizeof(*tp)); 487
487 tp->client = bbc_i2c_attach(echild); 488 tp->client = bbc_i2c_attach(echild);
488 if (!tp->client) { 489 if (!tp->client) {
489 kfree(tp); 490 kfree(tp);
@@ -525,11 +526,12 @@ static void attach_one_temp(struct linux_ebus_child *echild, int temp_idx)
525 526
526static void attach_one_fan(struct linux_ebus_child *echild, int fan_idx) 527static void attach_one_fan(struct linux_ebus_child *echild, int fan_idx)
527{ 528{
528 struct bbc_fan_control *fp = kmalloc(sizeof(*fp), GFP_KERNEL); 529 struct bbc_fan_control *fp;
529 530
531 fp = kzalloc(sizeof(*fp), GFP_KERNEL);
530 if (!fp) 532 if (!fp)
531 return; 533 return;
532 memset(fp, 0, sizeof(*fp)); 534
533 fp->client = bbc_i2c_attach(echild); 535 fp->client = bbc_i2c_attach(echild);
534 if (!fp->client) { 536 if (!fp->client) {
535 kfree(fp); 537 kfree(fp);
diff --git a/drivers/sbus/char/bbc_i2c.c b/drivers/sbus/char/bbc_i2c.c
index fbadd4d761f3..ac8ef2ce07fb 100644
--- a/drivers/sbus/char/bbc_i2c.c
+++ b/drivers/sbus/char/bbc_i2c.c
@@ -357,13 +357,13 @@ static void __init reset_one_i2c(struct bbc_i2c_bus *bp)
357 357
358static int __init attach_one_i2c(struct linux_ebus_device *edev, int index) 358static int __init attach_one_i2c(struct linux_ebus_device *edev, int index)
359{ 359{
360 struct bbc_i2c_bus *bp = kmalloc(sizeof(*bp), GFP_KERNEL); 360 struct bbc_i2c_bus *bp;
361 struct linux_ebus_child *echild; 361 struct linux_ebus_child *echild;
362 int entry; 362 int entry;
363 363
364 bp = kzalloc(sizeof(*bp), GFP_KERNEL);
364 if (!bp) 365 if (!bp)
365 return -ENOMEM; 366 return -ENOMEM;
366 memset(bp, 0, sizeof(*bp));
367 367
368 bp->i2c_control_regs = ioremap(edev->resource[0].start, 0x2); 368 bp->i2c_control_regs = ioremap(edev->resource[0].start, 0x2);
369 if (!bp->i2c_control_regs) 369 if (!bp->i2c_control_regs)
diff --git a/drivers/sbus/char/vfc_dev.c b/drivers/sbus/char/vfc_dev.c
index 26b1d2a17ed2..9269f7fbd363 100644
--- a/drivers/sbus/char/vfc_dev.c
+++ b/drivers/sbus/char/vfc_dev.c
@@ -248,6 +248,7 @@ static int vfc_debug(struct vfc_dev *dev, int cmd, void __user *argp)
248 buffer,inout.len); 248 buffer,inout.len);
249 249
250 if (copy_to_user(argp,&inout,sizeof(inout))) { 250 if (copy_to_user(argp,&inout,sizeof(inout))) {
251 vfc_unlock_device(dev);
251 kfree(buffer); 252 kfree(buffer);
252 return -EFAULT; 253 return -EFAULT;
253 } 254 }
diff --git a/drivers/scsi/arm/Kconfig b/drivers/scsi/arm/Kconfig
index d006a8cb4a74..7236143941f3 100644
--- a/drivers/scsi/arm/Kconfig
+++ b/drivers/scsi/arm/Kconfig
@@ -74,15 +74,6 @@ config SCSI_CUMANA_1
74 This enables support for the Cumana SCSI I card. If you have an 74 This enables support for the Cumana SCSI I card. If you have an
75 Acorn system with one of these, say Y. If unsure, say N. 75 Acorn system with one of these, say Y. If unsure, say N.
76 76
77config SCSI_ECOSCSI
78 tristate "EcoScsi support (EXPERIMENTAL)"
79 depends on ARCH_ACORN && EXPERIMENTAL && (ARCH_ARC || ARCH_A5K) && SCSI
80 select SCSI_SPI_ATTRS
81 help
82 This enables support for the EcoSCSI card -- a small card that sits
83 in the Econet socket. If you have an Acorn system with one of these,
84 say Y. If unsure, say N.
85
86config SCSI_OAK1 77config SCSI_OAK1
87 tristate "Oak SCSI support (EXPERIMENTAL)" 78 tristate "Oak SCSI support (EXPERIMENTAL)"
88 depends on ARCH_ACORN && EXPERIMENTAL && SCSI 79 depends on ARCH_ACORN && EXPERIMENTAL && SCSI
diff --git a/drivers/scsi/arm/Makefile b/drivers/scsi/arm/Makefile
index e8db17924c1d..16c3e86a6b1b 100644
--- a/drivers/scsi/arm/Makefile
+++ b/drivers/scsi/arm/Makefile
@@ -8,7 +8,6 @@ obj-$(CONFIG_SCSI_ACORNSCSI_3) += acornscsi_mod.o queue.o msgqueue.o
8obj-$(CONFIG_SCSI_ARXESCSI) += arxescsi.o fas216.o queue.o msgqueue.o 8obj-$(CONFIG_SCSI_ARXESCSI) += arxescsi.o fas216.o queue.o msgqueue.o
9obj-$(CONFIG_SCSI_CUMANA_1) += cumana_1.o 9obj-$(CONFIG_SCSI_CUMANA_1) += cumana_1.o
10obj-$(CONFIG_SCSI_CUMANA_2) += cumana_2.o fas216.o queue.o msgqueue.o 10obj-$(CONFIG_SCSI_CUMANA_2) += cumana_2.o fas216.o queue.o msgqueue.o
11obj-$(CONFIG_SCSI_ECOSCSI) += ecoscsi.o
12obj-$(CONFIG_SCSI_OAK1) += oak.o 11obj-$(CONFIG_SCSI_OAK1) += oak.o
13obj-$(CONFIG_SCSI_POWERTECSCSI) += powertec.o fas216.o queue.o msgqueue.o 12obj-$(CONFIG_SCSI_POWERTECSCSI) += powertec.o fas216.o queue.o msgqueue.o
14obj-$(CONFIG_SCSI_EESOXSCSI) += eesox.o fas216.o queue.o msgqueue.o 13obj-$(CONFIG_SCSI_EESOXSCSI) += eesox.o fas216.o queue.o msgqueue.o
diff --git a/drivers/scsi/arm/ecoscsi.c b/drivers/scsi/arm/ecoscsi.c
deleted file mode 100644
index 5265a9884338..000000000000
--- a/drivers/scsi/arm/ecoscsi.c
+++ /dev/null
@@ -1,166 +0,0 @@
1#define AUTOSENSE
2/* #define PSEUDO_DMA */
3
4/*
5 * EcoSCSI Generic NCR5380 driver
6 *
7 * Copyright 1995, Russell King
8 *
9 * ALPHA RELEASE 1.
10 *
11 * For more information, please consult
12 *
13 * NCR 5380 Family
14 * SCSI Protocol Controller
15 * Databook
16 *
17 * NCR Microelectronics
18 * 1635 Aeroplaza Drive
19 * Colorado Springs, CO 80916
20 * 1+ (719) 578-3400
21 * 1+ (800) 334-5454
22 */
23
24#include <linux/module.h>
25#include <linux/signal.h>
26#include <linux/ioport.h>
27#include <linux/delay.h>
28#include <linux/init.h>
29#include <linux/blkdev.h>
30
31#include <asm/io.h>
32#include <asm/system.h>
33
34#include "../scsi.h"
35#include <scsi/scsi_host.h>
36
37#define priv(host) ((struct NCR5380_hostdata *)(host)->hostdata)
38
39#define NCR5380_local_declare() void __iomem *_base
40#define NCR5380_setup(host) _base = priv(host)->base
41
42#define NCR5380_read(reg) ({ writeb(reg | 8, _base); readb(_base + 4); })
43#define NCR5380_write(reg, value) ({ writeb(reg | 8, _base); writeb(value, _base + 4); })
44
45#define NCR5380_intr ecoscsi_intr
46#define NCR5380_queue_command ecoscsi_queue_command
47#define NCR5380_proc_info ecoscsi_proc_info
48
49#define NCR5380_implementation_fields \
50 void __iomem *base
51
52#include "../NCR5380.h"
53
54#define ECOSCSI_PUBLIC_RELEASE 1
55
56/*
57 * Function : ecoscsi_setup(char *str, int *ints)
58 *
59 * Purpose : LILO command line initialization of the overrides array,
60 *
61 * Inputs : str - unused, ints - array of integer parameters with ints[0]
62 * equal to the number of ints.
63 *
64 */
65
66void ecoscsi_setup(char *str, int *ints)
67{
68}
69
70const char * ecoscsi_info (struct Scsi_Host *spnt)
71{
72 return "";
73}
74
75#define BOARD_NORMAL 0
76#define BOARD_NCR53C400 1
77
78#include "../NCR5380.c"
79
80static struct scsi_host_template ecoscsi_template = {
81 .module = THIS_MODULE,
82 .name = "Serial Port EcoSCSI NCR5380",
83 .proc_name = "ecoscsi",
84 .info = ecoscsi_info,
85 .queuecommand = ecoscsi_queue_command,
86 .eh_abort_handler = NCR5380_abort,
87 .eh_bus_reset_handler = NCR5380_bus_reset,
88 .can_queue = 16,
89 .this_id = 7,
90 .sg_tablesize = SG_ALL,
91 .cmd_per_lun = 2,
92 .use_clustering = DISABLE_CLUSTERING
93};
94
95static struct Scsi_Host *host;
96
97static int __init ecoscsi_init(void)
98{
99 void __iomem *_base;
100 int ret;
101
102 if (!request_mem_region(0x33a0000, 4096, "ecoscsi")) {
103 ret = -EBUSY;
104 goto out;
105 }
106
107 _base = ioremap(0x33a0000, 4096);
108 if (!_base) {
109 ret = -ENOMEM;
110 goto out_release;
111 }
112
113 NCR5380_write(MODE_REG, 0x20); /* Is it really SCSI? */
114 if (NCR5380_read(MODE_REG) != 0x20) /* Write to a reg. */
115 goto out_unmap;
116
117 NCR5380_write(MODE_REG, 0x00); /* it back. */
118 if (NCR5380_read(MODE_REG) != 0x00)
119 goto out_unmap;
120
121 host = scsi_host_alloc(tpnt, sizeof(struct NCR5380_hostdata));
122 if (!host) {
123 ret = -ENOMEM;
124 goto out_unmap;
125 }
126
127 priv(host)->base = _base;
128 host->irq = IRQ_NONE;
129
130 NCR5380_init(host, 0);
131
132 printk("scsi%d: at port 0x%08lx irqs disabled", host->host_no, host->io_port);
133 printk(" options CAN_QUEUE=%d CMD_PER_LUN=%d release=%d",
134 host->can_queue, host->cmd_per_lun, ECOSCSI_PUBLIC_RELEASE);
135 printk("\nscsi%d:", host->host_no);
136 NCR5380_print_options(host);
137 printk("\n");
138
139 scsi_add_host(host, NULL); /* XXX handle failure */
140 scsi_scan_host(host);
141 return 0;
142
143 out_unmap:
144 iounmap(_base);
145 out_release:
146 release_mem_region(0x33a0000, 4096);
147 out:
148 return ret;
149}
150
151static void __exit ecoscsi_exit(void)
152{
153 scsi_remove_host(host);
154 NCR5380_exit(host);
155 scsi_host_put(host);
156 release_mem_region(0x33a0000, 4096);
157 return 0;
158}
159
160module_init(ecoscsi_init);
161module_exit(ecoscsi_exit);
162
163MODULE_AUTHOR("Russell King");
164MODULE_DESCRIPTION("Econet-SCSI driver for Acorn machines");
165MODULE_LICENSE("GPL");
166
diff --git a/drivers/scsi/ide-scsi.c b/drivers/scsi/ide-scsi.c
index bb90df8bdce4..1cc01acc2808 100644
--- a/drivers/scsi/ide-scsi.c
+++ b/drivers/scsi/ide-scsi.c
@@ -328,17 +328,15 @@ static int idescsi_check_condition(ide_drive_t *drive, struct request *failed_co
328 u8 *buf; 328 u8 *buf;
329 329
330 /* stuff a sense request in front of our current request */ 330 /* stuff a sense request in front of our current request */
331 pc = kmalloc (sizeof (idescsi_pc_t), GFP_ATOMIC); 331 pc = kzalloc(sizeof(idescsi_pc_t), GFP_ATOMIC);
332 rq = kmalloc (sizeof (struct request), GFP_ATOMIC); 332 rq = kmalloc(sizeof(struct request), GFP_ATOMIC);
333 buf = kmalloc(SCSI_SENSE_BUFFERSIZE, GFP_ATOMIC); 333 buf = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_ATOMIC);
334 if (pc == NULL || rq == NULL || buf == NULL) { 334 if (!pc || !rq || !buf) {
335 kfree(buf); 335 kfree(buf);
336 kfree(rq); 336 kfree(rq);
337 kfree(pc); 337 kfree(pc);
338 return -ENOMEM; 338 return -ENOMEM;
339 } 339 }
340 memset (pc, 0, sizeof (idescsi_pc_t));
341 memset (buf, 0, SCSI_SENSE_BUFFERSIZE);
342 ide_init_drive_cmd(rq); 340 ide_init_drive_cmd(rq);
343 rq->special = (char *) pc; 341 rq->special = (char *) pc;
344 pc->rq = rq; 342 pc->rq = rq;
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 2f5a5ac1b271..301313002f6b 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -2514,7 +2514,7 @@ static int __init serial8250_console_setup(struct console *co, char *options)
2514 return uart_set_options(port, co, baud, parity, bits, flow); 2514 return uart_set_options(port, co, baud, parity, bits, flow);
2515} 2515}
2516 2516
2517static int __init serial8250_console_early_setup(void) 2517static int serial8250_console_early_setup(void)
2518{ 2518{
2519 return serial8250_find_port_for_earlycon(); 2519 return serial8250_find_port_for_earlycon();
2520} 2520}
diff --git a/drivers/serial/8250_early.c b/drivers/serial/8250_early.c
index 150cad5c2eba..4d4c9f01be8d 100644
--- a/drivers/serial/8250_early.c
+++ b/drivers/serial/8250_early.c
@@ -227,7 +227,7 @@ int __init setup_early_serial8250_console(char *cmdline)
227 return 0; 227 return 0;
228} 228}
229 229
230int __init serial8250_find_port_for_earlycon(void) 230int serial8250_find_port_for_earlycon(void)
231{ 231{
232 struct early_serial8250_device *device = &early_device; 232 struct early_serial8250_device *device = &early_device;
233 struct uart_port *port = &device->port; 233 struct uart_port *port = &device->port;
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index 6d7d616e9ccd..5e485876f54c 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -976,7 +976,6 @@ enum pci_board_num_t {
976 pbn_oxsemi, 976 pbn_oxsemi,
977 pbn_intel_i960, 977 pbn_intel_i960,
978 pbn_sgi_ioc3, 978 pbn_sgi_ioc3,
979 pbn_nec_nile4,
980 pbn_computone_4, 979 pbn_computone_4,
981 pbn_computone_6, 980 pbn_computone_6,
982 pbn_computone_8, 981 pbn_computone_8,
@@ -1443,18 +1442,6 @@ static struct pciserial_board pci_boards[] __devinitdata = {
1443 }, 1442 },
1444 1443
1445 /* 1444 /*
1446 * NEC Vrc-5074 (Nile 4) builtin UART.
1447 */
1448 [pbn_nec_nile4] = {
1449 .flags = FL_BASE0,
1450 .num_ports = 1,
1451 .base_baud = 520833,
1452 .uart_offset = 8 << 3,
1453 .reg_shift = 3,
1454 .first_offset = 0x300,
1455 },
1456
1457 /*
1458 * Computone - uses IOMEM. 1445 * Computone - uses IOMEM.
1459 */ 1446 */
1460 [pbn_computone_4] = { 1447 [pbn_computone_4] = {
@@ -2345,13 +2332,6 @@ static struct pci_device_id serial_pci_tbl[] = {
2345 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2332 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2346 pbn_b2_1_115200 }, 2333 pbn_b2_1_115200 },
2347 2334
2348 /*
2349 * NEC Vrc-5074 (Nile 4) builtin UART.
2350 */
2351 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NILE4,
2352 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2353 pbn_nec_nile4 },
2354
2355 { PCI_VENDOR_ID_DCI, PCI_DEVICE_ID_DCI_PCCOM2, 2335 { PCI_VENDOR_ID_DCI, PCI_DEVICE_ID_DCI_PCCOM2,
2356 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2336 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
2357 pbn_b3_2_115200 }, 2337 pbn_b3_2_115200 },
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 18f629706448..64ff6a5f6afd 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -88,21 +88,17 @@ config SERIAL_8250_PCI
88 depends on SERIAL_8250 && PCI 88 depends on SERIAL_8250 && PCI
89 default SERIAL_8250 89 default SERIAL_8250
90 help 90 help
91 Say Y here if you have PCI serial ports. 91 This builds standard PCI serial support. You may be able to
92 92 disable this feature if you only need legacy serial support.
93 To compile this driver as a module, choose M here: the module 93 Saves about 9K.
94 will be called 8250_pci.
95 94
96config SERIAL_8250_PNP 95config SERIAL_8250_PNP
97 tristate "8250/16550 PNP device support" if EMBEDDED 96 tristate "8250/16550 PNP device support" if EMBEDDED
98 depends on SERIAL_8250 && PNP 97 depends on SERIAL_8250 && PNP
99 default SERIAL_8250 98 default SERIAL_8250
100 help 99 help
101 Say Y here if you have serial ports described by PNPBIOS or ACPI. 100 This builds standard PNP serial support. You may be able to
102 These are typically ports built into the system board. 101 disable this feature if you only need legacy serial support.
103
104 To compile this driver as a module, choose M here: the module
105 will be called 8250_pnp.
106 102
107config SERIAL_8250_HP300 103config SERIAL_8250_HP300
108 tristate 104 tristate
@@ -1195,7 +1191,7 @@ config SERIAL_VR41XX
1195 1191
1196config SERIAL_VR41XX_CONSOLE 1192config SERIAL_VR41XX_CONSOLE
1197 bool "Enable NEC VR4100 series Serial Interface Unit console" 1193 bool "Enable NEC VR4100 series Serial Interface Unit console"
1198 depends on SERIAL_VR41XX 1194 depends on SERIAL_VR41XX=y
1199 select SERIAL_CORE_CONSOLE 1195 select SERIAL_CORE_CONSOLE
1200 help 1196 help
1201 If you have a NEC VR4100 series processor and you want to use 1197 If you have a NEC VR4100 series processor and you want to use
diff --git a/drivers/serial/mpsc.c b/drivers/serial/mpsc.c
index 00924feaf621..4d643c926657 100644
--- a/drivers/serial/mpsc.c
+++ b/drivers/serial/mpsc.c
@@ -74,10 +74,6 @@
74#include <asm/io.h> 74#include <asm/io.h>
75#include <asm/irq.h> 75#include <asm/irq.h>
76 76
77#if defined(CONFIG_SERIAL_MPSC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
78#define SUPPORT_SYSRQ
79#endif
80
81#define MPSC_NUM_CTLRS 2 77#define MPSC_NUM_CTLRS 2
82 78
83/* 79/*
@@ -97,9 +93,8 @@
97#define MPSC_TXBE_SIZE dma_get_cache_alignment() 93#define MPSC_TXBE_SIZE dma_get_cache_alignment()
98#define MPSC_TXB_SIZE (MPSC_TXR_ENTRIES * MPSC_TXBE_SIZE) 94#define MPSC_TXB_SIZE (MPSC_TXR_ENTRIES * MPSC_TXBE_SIZE)
99 95
100#define MPSC_DMA_ALLOC_SIZE (MPSC_RXR_SIZE + MPSC_RXB_SIZE + \ 96#define MPSC_DMA_ALLOC_SIZE (MPSC_RXR_SIZE + MPSC_RXB_SIZE + MPSC_TXR_SIZE \
101 MPSC_TXR_SIZE + MPSC_TXB_SIZE + \ 97 + MPSC_TXB_SIZE + dma_get_cache_alignment() /* for alignment */)
102 dma_get_cache_alignment() /* for alignment */)
103 98
104/* Rx and Tx Ring entry descriptors -- assume entry size is <= cacheline size */ 99/* Rx and Tx Ring entry descriptors -- assume entry size is <= cacheline size */
105struct mpsc_rx_desc { 100struct mpsc_rx_desc {
@@ -270,8 +265,8 @@ struct mpsc_port_info *mpsc_device_remove(int index);
270#define SDMA_DESC_CMDSTAT_EI (1<<23) 265#define SDMA_DESC_CMDSTAT_EI (1<<23)
271#define SDMA_DESC_CMDSTAT_O (1<<31) 266#define SDMA_DESC_CMDSTAT_O (1<<31)
272 267
273#define SDMA_DESC_DFLT (SDMA_DESC_CMDSTAT_O | \ 268#define SDMA_DESC_DFLT (SDMA_DESC_CMDSTAT_O \
274 SDMA_DESC_CMDSTAT_EI) 269 | SDMA_DESC_CMDSTAT_EI)
275 270
276#define SDMA_SDC_RFT (1<<0) 271#define SDMA_SDC_RFT (1<<0)
277#define SDMA_SDC_SFM (1<<1) 272#define SDMA_SDC_SFM (1<<1)
@@ -295,10 +290,10 @@ struct mpsc_port_info *mpsc_device_remove(int index);
295#define SDMA_1_CAUSE_TXBUF (1<<10) 290#define SDMA_1_CAUSE_TXBUF (1<<10)
296#define SDMA_1_CAUSE_TXEND (1<<11) 291#define SDMA_1_CAUSE_TXEND (1<<11)
297 292
298#define SDMA_CAUSE_RX_MASK (SDMA_0_CAUSE_RXBUF | SDMA_0_CAUSE_RXERR | \ 293#define SDMA_CAUSE_RX_MASK (SDMA_0_CAUSE_RXBUF | SDMA_0_CAUSE_RXERR \
299 SDMA_1_CAUSE_RXBUF | SDMA_1_CAUSE_RXERR) 294 | SDMA_1_CAUSE_RXBUF | SDMA_1_CAUSE_RXERR)
300#define SDMA_CAUSE_TX_MASK (SDMA_0_CAUSE_TXBUF | SDMA_0_CAUSE_TXEND | \ 295#define SDMA_CAUSE_TX_MASK (SDMA_0_CAUSE_TXBUF | SDMA_0_CAUSE_TXEND \
301 SDMA_1_CAUSE_TXBUF | SDMA_1_CAUSE_TXEND) 296 | SDMA_1_CAUSE_TXBUF | SDMA_1_CAUSE_TXEND)
302 297
303/* SDMA Interrupt registers */ 298/* SDMA Interrupt registers */
304#define SDMA_INTR_CAUSE 0x0000 299#define SDMA_INTR_CAUSE 0x0000
@@ -312,11 +307,11 @@ struct mpsc_port_info *mpsc_device_remove(int index);
312 * Define how this driver is known to the outside (we've been assigned a 307 * Define how this driver is known to the outside (we've been assigned a
313 * range on the "Low-density serial ports" major). 308 * range on the "Low-density serial ports" major).
314 */ 309 */
315#define MPSC_MAJOR 204 310#define MPSC_MAJOR 204
316#define MPSC_MINOR_START 44 311#define MPSC_MINOR_START 44
317#define MPSC_DRIVER_NAME "MPSC" 312#define MPSC_DRIVER_NAME "MPSC"
318#define MPSC_DEV_NAME "ttyMM" 313#define MPSC_DEV_NAME "ttyMM"
319#define MPSC_VERSION "1.00" 314#define MPSC_VERSION "1.00"
320 315
321static struct mpsc_port_info mpsc_ports[MPSC_NUM_CTLRS]; 316static struct mpsc_port_info mpsc_ports[MPSC_NUM_CTLRS];
322static struct mpsc_shared_regs mpsc_shared_regs; 317static struct mpsc_shared_regs mpsc_shared_regs;
@@ -332,8 +327,7 @@ static void mpsc_release_port(struct uart_port *port);
332 * 327 *
333 ****************************************************************************** 328 ******************************************************************************
334 */ 329 */
335static void 330static void mpsc_brg_init(struct mpsc_port_info *pi, u32 clk_src)
336mpsc_brg_init(struct mpsc_port_info *pi, u32 clk_src)
337{ 331{
338 u32 v; 332 u32 v;
339 333
@@ -349,11 +343,9 @@ mpsc_brg_init(struct mpsc_port_info *pi, u32 clk_src)
349 343
350 writel(readl(pi->brg_base + BRG_BTR) & 0xffff0000, 344 writel(readl(pi->brg_base + BRG_BTR) & 0xffff0000,
351 pi->brg_base + BRG_BTR); 345 pi->brg_base + BRG_BTR);
352 return;
353} 346}
354 347
355static void 348static void mpsc_brg_enable(struct mpsc_port_info *pi)
356mpsc_brg_enable(struct mpsc_port_info *pi)
357{ 349{
358 u32 v; 350 u32 v;
359 351
@@ -363,11 +355,9 @@ mpsc_brg_enable(struct mpsc_port_info *pi)
363 if (pi->mirror_regs) 355 if (pi->mirror_regs)
364 pi->BRG_BCR_m = v; 356 pi->BRG_BCR_m = v;
365 writel(v, pi->brg_base + BRG_BCR); 357 writel(v, pi->brg_base + BRG_BCR);
366 return;
367} 358}
368 359
369static void 360static void mpsc_brg_disable(struct mpsc_port_info *pi)
370mpsc_brg_disable(struct mpsc_port_info *pi)
371{ 361{
372 u32 v; 362 u32 v;
373 363
@@ -377,21 +367,19 @@ mpsc_brg_disable(struct mpsc_port_info *pi)
377 if (pi->mirror_regs) 367 if (pi->mirror_regs)
378 pi->BRG_BCR_m = v; 368 pi->BRG_BCR_m = v;
379 writel(v, pi->brg_base + BRG_BCR); 369 writel(v, pi->brg_base + BRG_BCR);
380 return;
381} 370}
382 371
383static inline void 372/*
384mpsc_set_baudrate(struct mpsc_port_info *pi, u32 baud) 373 * To set the baud, we adjust the CDV field in the BRG_BCR reg.
374 * From manual: Baud = clk / ((CDV+1)*2) ==> CDV = (clk / (baud*2)) - 1.
375 * However, the input clock is divided by 16 in the MPSC b/c of how
376 * 'MPSC_MMCRH' was set up so we have to divide the 'clk' used in our
377 * calculation by 16 to account for that. So the real calculation
378 * that accounts for the way the mpsc is set up is:
379 * CDV = (clk / (baud*2*16)) - 1 ==> CDV = (clk / (baud << 5)) - 1.
380 */
381static void mpsc_set_baudrate(struct mpsc_port_info *pi, u32 baud)
385{ 382{
386 /*
387 * To set the baud, we adjust the CDV field in the BRG_BCR reg.
388 * From manual: Baud = clk / ((CDV+1)*2) ==> CDV = (clk / (baud*2)) - 1.
389 * However, the input clock is divided by 16 in the MPSC b/c of how
390 * 'MPSC_MMCRH' was set up so we have to divide the 'clk' used in our
391 * calculation by 16 to account for that. So the real calculation
392 * that accounts for the way the mpsc is set up is:
393 * CDV = (clk / (baud*2*16)) - 1 ==> CDV = (clk / (baud << 5)) - 1.
394 */
395 u32 cdv = (pi->port.uartclk / (baud << 5)) - 1; 383 u32 cdv = (pi->port.uartclk / (baud << 5)) - 1;
396 u32 v; 384 u32 v;
397 385
@@ -403,8 +391,6 @@ mpsc_set_baudrate(struct mpsc_port_info *pi, u32 baud)
403 pi->BRG_BCR_m = v; 391 pi->BRG_BCR_m = v;
404 writel(v, pi->brg_base + BRG_BCR); 392 writel(v, pi->brg_base + BRG_BCR);
405 mpsc_brg_enable(pi); 393 mpsc_brg_enable(pi);
406
407 return;
408} 394}
409 395
410/* 396/*
@@ -415,13 +401,12 @@ mpsc_set_baudrate(struct mpsc_port_info *pi, u32 baud)
415 ****************************************************************************** 401 ******************************************************************************
416 */ 402 */
417 403
418static void 404static void mpsc_sdma_burstsize(struct mpsc_port_info *pi, u32 burst_size)
419mpsc_sdma_burstsize(struct mpsc_port_info *pi, u32 burst_size)
420{ 405{
421 u32 v; 406 u32 v;
422 407
423 pr_debug("mpsc_sdma_burstsize[%d]: burst_size: %d\n", 408 pr_debug("mpsc_sdma_burstsize[%d]: burst_size: %d\n",
424 pi->port.line, burst_size); 409 pi->port.line, burst_size);
425 410
426 burst_size >>= 3; /* Divide by 8 b/c reg values are 8-byte chunks */ 411 burst_size >>= 3; /* Divide by 8 b/c reg values are 8-byte chunks */
427 412
@@ -436,11 +421,9 @@ mpsc_sdma_burstsize(struct mpsc_port_info *pi, u32 burst_size)
436 421
437 writel((readl(pi->sdma_base + SDMA_SDC) & (0x3 << 12)) | (v << 12), 422 writel((readl(pi->sdma_base + SDMA_SDC) & (0x3 << 12)) | (v << 12),
438 pi->sdma_base + SDMA_SDC); 423 pi->sdma_base + SDMA_SDC);
439 return;
440} 424}
441 425
442static void 426static void mpsc_sdma_init(struct mpsc_port_info *pi, u32 burst_size)
443mpsc_sdma_init(struct mpsc_port_info *pi, u32 burst_size)
444{ 427{
445 pr_debug("mpsc_sdma_init[%d]: burst_size: %d\n", pi->port.line, 428 pr_debug("mpsc_sdma_init[%d]: burst_size: %d\n", pi->port.line,
446 burst_size); 429 burst_size);
@@ -448,11 +431,9 @@ mpsc_sdma_init(struct mpsc_port_info *pi, u32 burst_size)
448 writel((readl(pi->sdma_base + SDMA_SDC) & 0x3ff) | 0x03f, 431 writel((readl(pi->sdma_base + SDMA_SDC) & 0x3ff) | 0x03f,
449 pi->sdma_base + SDMA_SDC); 432 pi->sdma_base + SDMA_SDC);
450 mpsc_sdma_burstsize(pi, burst_size); 433 mpsc_sdma_burstsize(pi, burst_size);
451 return;
452} 434}
453 435
454static inline u32 436static u32 mpsc_sdma_intr_mask(struct mpsc_port_info *pi, u32 mask)
455mpsc_sdma_intr_mask(struct mpsc_port_info *pi, u32 mask)
456{ 437{
457 u32 old, v; 438 u32 old, v;
458 439
@@ -475,15 +456,14 @@ mpsc_sdma_intr_mask(struct mpsc_port_info *pi, u32 mask)
475 return old & 0xf; 456 return old & 0xf;
476} 457}
477 458
478static inline void 459static void mpsc_sdma_intr_unmask(struct mpsc_port_info *pi, u32 mask)
479mpsc_sdma_intr_unmask(struct mpsc_port_info *pi, u32 mask)
480{ 460{
481 u32 v; 461 u32 v;
482 462
483 pr_debug("mpsc_sdma_intr_unmask[%d]: mask: 0x%x\n", pi->port.line,mask); 463 pr_debug("mpsc_sdma_intr_unmask[%d]: mask: 0x%x\n", pi->port.line,mask);
484 464
485 v = (pi->mirror_regs) ? pi->shared_regs->SDMA_INTR_MASK_m : 465 v = (pi->mirror_regs) ? pi->shared_regs->SDMA_INTR_MASK_m
486 readl(pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 466 : readl(pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK);
487 467
488 mask &= 0xf; 468 mask &= 0xf;
489 if (pi->port.line) 469 if (pi->port.line)
@@ -493,41 +473,35 @@ mpsc_sdma_intr_unmask(struct mpsc_port_info *pi, u32 mask)
493 if (pi->mirror_regs) 473 if (pi->mirror_regs)
494 pi->shared_regs->SDMA_INTR_MASK_m = v; 474 pi->shared_regs->SDMA_INTR_MASK_m = v;
495 writel(v, pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK); 475 writel(v, pi->shared_regs->sdma_intr_base + SDMA_INTR_MASK);
496 return;
497} 476}
498 477
499static inline void 478static void mpsc_sdma_intr_ack(struct mpsc_port_info *pi)
500mpsc_sdma_intr_ack(struct mpsc_port_info *pi)
501{ 479{
502 pr_debug("mpsc_sdma_intr_ack[%d]: Acknowledging IRQ\n", pi->port.line); 480 pr_debug("mpsc_sdma_intr_ack[%d]: Acknowledging IRQ\n", pi->port.line);
503 481
504 if (pi->mirror_regs) 482 if (pi->mirror_regs)
505 pi->shared_regs->SDMA_INTR_CAUSE_m = 0; 483 pi->shared_regs->SDMA_INTR_CAUSE_m = 0;
506 writeb(0x00, pi->shared_regs->sdma_intr_base + SDMA_INTR_CAUSE + 484 writeb(0x00, pi->shared_regs->sdma_intr_base + SDMA_INTR_CAUSE
507 pi->port.line); 485 + pi->port.line);
508 return;
509} 486}
510 487
511static inline void 488static void mpsc_sdma_set_rx_ring(struct mpsc_port_info *pi,
512mpsc_sdma_set_rx_ring(struct mpsc_port_info *pi, struct mpsc_rx_desc *rxre_p) 489 struct mpsc_rx_desc *rxre_p)
513{ 490{
514 pr_debug("mpsc_sdma_set_rx_ring[%d]: rxre_p: 0x%x\n", 491 pr_debug("mpsc_sdma_set_rx_ring[%d]: rxre_p: 0x%x\n",
515 pi->port.line, (u32) rxre_p); 492 pi->port.line, (u32)rxre_p);
516 493
517 writel((u32)rxre_p, pi->sdma_base + SDMA_SCRDP); 494 writel((u32)rxre_p, pi->sdma_base + SDMA_SCRDP);
518 return;
519} 495}
520 496
521static inline void 497static void mpsc_sdma_set_tx_ring(struct mpsc_port_info *pi,
522mpsc_sdma_set_tx_ring(struct mpsc_port_info *pi, struct mpsc_tx_desc *txre_p) 498 struct mpsc_tx_desc *txre_p)
523{ 499{
524 writel((u32)txre_p, pi->sdma_base + SDMA_SFTDP); 500 writel((u32)txre_p, pi->sdma_base + SDMA_SFTDP);
525 writel((u32)txre_p, pi->sdma_base + SDMA_SCTDP); 501 writel((u32)txre_p, pi->sdma_base + SDMA_SCTDP);
526 return;
527} 502}
528 503
529static inline void 504static void mpsc_sdma_cmd(struct mpsc_port_info *pi, u32 val)
530mpsc_sdma_cmd(struct mpsc_port_info *pi, u32 val)
531{ 505{
532 u32 v; 506 u32 v;
533 507
@@ -539,46 +513,40 @@ mpsc_sdma_cmd(struct mpsc_port_info *pi, u32 val)
539 wmb(); 513 wmb();
540 writel(v, pi->sdma_base + SDMA_SDCM); 514 writel(v, pi->sdma_base + SDMA_SDCM);
541 wmb(); 515 wmb();
542 return;
543} 516}
544 517
545static inline uint 518static uint mpsc_sdma_tx_active(struct mpsc_port_info *pi)
546mpsc_sdma_tx_active(struct mpsc_port_info *pi)
547{ 519{
548 return readl(pi->sdma_base + SDMA_SDCM) & SDMA_SDCM_TXD; 520 return readl(pi->sdma_base + SDMA_SDCM) & SDMA_SDCM_TXD;
549} 521}
550 522
551static inline void 523static void mpsc_sdma_start_tx(struct mpsc_port_info *pi)
552mpsc_sdma_start_tx(struct mpsc_port_info *pi)
553{ 524{
554 struct mpsc_tx_desc *txre, *txre_p; 525 struct mpsc_tx_desc *txre, *txre_p;
555 526
556 /* If tx isn't running & there's a desc ready to go, start it */ 527 /* If tx isn't running & there's a desc ready to go, start it */
557 if (!mpsc_sdma_tx_active(pi)) { 528 if (!mpsc_sdma_tx_active(pi)) {
558 txre = (struct mpsc_tx_desc *)(pi->txr + 529 txre = (struct mpsc_tx_desc *)(pi->txr
559 (pi->txr_tail * MPSC_TXRE_SIZE)); 530 + (pi->txr_tail * MPSC_TXRE_SIZE));
560 dma_cache_sync(pi->port.dev, (void *) txre, MPSC_TXRE_SIZE, DMA_FROM_DEVICE); 531 dma_cache_sync(pi->port.dev, (void *)txre, MPSC_TXRE_SIZE,
532 DMA_FROM_DEVICE);
561#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 533#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
562 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 534 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
563 invalidate_dcache_range((ulong)txre, 535 invalidate_dcache_range((ulong)txre,
564 (ulong)txre + MPSC_TXRE_SIZE); 536 (ulong)txre + MPSC_TXRE_SIZE);
565#endif 537#endif
566 538
567 if (be32_to_cpu(txre->cmdstat) & SDMA_DESC_CMDSTAT_O) { 539 if (be32_to_cpu(txre->cmdstat) & SDMA_DESC_CMDSTAT_O) {
568 txre_p = (struct mpsc_tx_desc *)(pi->txr_p + 540 txre_p = (struct mpsc_tx_desc *)
569 (pi->txr_tail * 541 (pi->txr_p + (pi->txr_tail * MPSC_TXRE_SIZE));
570 MPSC_TXRE_SIZE));
571 542
572 mpsc_sdma_set_tx_ring(pi, txre_p); 543 mpsc_sdma_set_tx_ring(pi, txre_p);
573 mpsc_sdma_cmd(pi, SDMA_SDCM_STD | SDMA_SDCM_TXD); 544 mpsc_sdma_cmd(pi, SDMA_SDCM_STD | SDMA_SDCM_TXD);
574 } 545 }
575 } 546 }
576
577 return;
578} 547}
579 548
580static inline void 549static void mpsc_sdma_stop(struct mpsc_port_info *pi)
581mpsc_sdma_stop(struct mpsc_port_info *pi)
582{ 550{
583 pr_debug("mpsc_sdma_stop[%d]: Stopping SDMA\n", pi->port.line); 551 pr_debug("mpsc_sdma_stop[%d]: Stopping SDMA\n", pi->port.line);
584 552
@@ -593,8 +561,6 @@ mpsc_sdma_stop(struct mpsc_port_info *pi)
593 /* Disable interrupts */ 561 /* Disable interrupts */
594 mpsc_sdma_intr_mask(pi, 0xf); 562 mpsc_sdma_intr_mask(pi, 0xf);
595 mpsc_sdma_intr_ack(pi); 563 mpsc_sdma_intr_ack(pi);
596
597 return;
598} 564}
599 565
600/* 566/*
@@ -605,8 +571,7 @@ mpsc_sdma_stop(struct mpsc_port_info *pi)
605 ****************************************************************************** 571 ******************************************************************************
606 */ 572 */
607 573
608static void 574static void mpsc_hw_init(struct mpsc_port_info *pi)
609mpsc_hw_init(struct mpsc_port_info *pi)
610{ 575{
611 u32 v; 576 u32 v;
612 577
@@ -628,8 +593,7 @@ mpsc_hw_init(struct mpsc_port_info *pi)
628 v = (v & ~0xf0f) | 0x100; 593 v = (v & ~0xf0f) | 0x100;
629 pi->shared_regs->MPSC_TCRR_m = v; 594 pi->shared_regs->MPSC_TCRR_m = v;
630 writel(v, pi->shared_regs->mpsc_routing_base + MPSC_TCRR); 595 writel(v, pi->shared_regs->mpsc_routing_base + MPSC_TCRR);
631 } 596 } else {
632 else {
633 v = readl(pi->shared_regs->mpsc_routing_base + MPSC_MRR); 597 v = readl(pi->shared_regs->mpsc_routing_base + MPSC_MRR);
634 v &= ~0x1c7; 598 v &= ~0x1c7;
635 writel(v, pi->shared_regs->mpsc_routing_base + MPSC_MRR); 599 writel(v, pi->shared_regs->mpsc_routing_base + MPSC_MRR);
@@ -646,7 +610,7 @@ mpsc_hw_init(struct mpsc_port_info *pi)
646 /* Put MPSC in UART mode & enabel Tx/Rx egines */ 610 /* Put MPSC in UART mode & enabel Tx/Rx egines */
647 writel(0x000004c4, pi->mpsc_base + MPSC_MMCRL); 611 writel(0x000004c4, pi->mpsc_base + MPSC_MMCRL);
648 612
649 /* No preamble, 16x divider, low-latency, */ 613 /* No preamble, 16x divider, low-latency, */
650 writel(0x04400400, pi->mpsc_base + MPSC_MMCRH); 614 writel(0x04400400, pi->mpsc_base + MPSC_MMCRH);
651 615
652 if (pi->mirror_regs) { 616 if (pi->mirror_regs) {
@@ -663,12 +627,9 @@ mpsc_hw_init(struct mpsc_port_info *pi)
663 writel(0, pi->mpsc_base + MPSC_CHR_8); 627 writel(0, pi->mpsc_base + MPSC_CHR_8);
664 writel(0, pi->mpsc_base + MPSC_CHR_9); 628 writel(0, pi->mpsc_base + MPSC_CHR_9);
665 writel(0, pi->mpsc_base + MPSC_CHR_10); 629 writel(0, pi->mpsc_base + MPSC_CHR_10);
666
667 return;
668} 630}
669 631
670static inline void 632static void mpsc_enter_hunt(struct mpsc_port_info *pi)
671mpsc_enter_hunt(struct mpsc_port_info *pi)
672{ 633{
673 pr_debug("mpsc_enter_hunt[%d]: Hunting...\n", pi->port.line); 634 pr_debug("mpsc_enter_hunt[%d]: Hunting...\n", pi->port.line);
674 635
@@ -677,20 +638,16 @@ mpsc_enter_hunt(struct mpsc_port_info *pi)
677 pi->mpsc_base + MPSC_CHR_2); 638 pi->mpsc_base + MPSC_CHR_2);
678 /* Erratum prevents reading CHR_2 so just delay for a while */ 639 /* Erratum prevents reading CHR_2 so just delay for a while */
679 udelay(100); 640 udelay(100);
680 } 641 } else {
681 else {
682 writel(readl(pi->mpsc_base + MPSC_CHR_2) | MPSC_CHR_2_EH, 642 writel(readl(pi->mpsc_base + MPSC_CHR_2) | MPSC_CHR_2_EH,
683 pi->mpsc_base + MPSC_CHR_2); 643 pi->mpsc_base + MPSC_CHR_2);
684 644
685 while (readl(pi->mpsc_base + MPSC_CHR_2) & MPSC_CHR_2_EH) 645 while (readl(pi->mpsc_base + MPSC_CHR_2) & MPSC_CHR_2_EH)
686 udelay(10); 646 udelay(10);
687 } 647 }
688
689 return;
690} 648}
691 649
692static inline void 650static void mpsc_freeze(struct mpsc_port_info *pi)
693mpsc_freeze(struct mpsc_port_info *pi)
694{ 651{
695 u32 v; 652 u32 v;
696 653
@@ -703,11 +660,9 @@ mpsc_freeze(struct mpsc_port_info *pi)
703 if (pi->mirror_regs) 660 if (pi->mirror_regs)
704 pi->MPSC_MPCR_m = v; 661 pi->MPSC_MPCR_m = v;
705 writel(v, pi->mpsc_base + MPSC_MPCR); 662 writel(v, pi->mpsc_base + MPSC_MPCR);
706 return;
707} 663}
708 664
709static inline void 665static void mpsc_unfreeze(struct mpsc_port_info *pi)
710mpsc_unfreeze(struct mpsc_port_info *pi)
711{ 666{
712 u32 v; 667 u32 v;
713 668
@@ -720,11 +675,9 @@ mpsc_unfreeze(struct mpsc_port_info *pi)
720 writel(v, pi->mpsc_base + MPSC_MPCR); 675 writel(v, pi->mpsc_base + MPSC_MPCR);
721 676
722 pr_debug("mpsc_unfreeze[%d]: Unfrozen\n", pi->port.line); 677 pr_debug("mpsc_unfreeze[%d]: Unfrozen\n", pi->port.line);
723 return;
724} 678}
725 679
726static inline void 680static void mpsc_set_char_length(struct mpsc_port_info *pi, u32 len)
727mpsc_set_char_length(struct mpsc_port_info *pi, u32 len)
728{ 681{
729 u32 v; 682 u32 v;
730 683
@@ -737,11 +690,9 @@ mpsc_set_char_length(struct mpsc_port_info *pi, u32 len)
737 if (pi->mirror_regs) 690 if (pi->mirror_regs)
738 pi->MPSC_MPCR_m = v; 691 pi->MPSC_MPCR_m = v;
739 writel(v, pi->mpsc_base + MPSC_MPCR); 692 writel(v, pi->mpsc_base + MPSC_MPCR);
740 return;
741} 693}
742 694
743static inline void 695static void mpsc_set_stop_bit_length(struct mpsc_port_info *pi, u32 len)
744mpsc_set_stop_bit_length(struct mpsc_port_info *pi, u32 len)
745{ 696{
746 u32 v; 697 u32 v;
747 698
@@ -756,11 +707,9 @@ mpsc_set_stop_bit_length(struct mpsc_port_info *pi, u32 len)
756 if (pi->mirror_regs) 707 if (pi->mirror_regs)
757 pi->MPSC_MPCR_m = v; 708 pi->MPSC_MPCR_m = v;
758 writel(v, pi->mpsc_base + MPSC_MPCR); 709 writel(v, pi->mpsc_base + MPSC_MPCR);
759 return;
760} 710}
761 711
762static inline void 712static void mpsc_set_parity(struct mpsc_port_info *pi, u32 p)
763mpsc_set_parity(struct mpsc_port_info *pi, u32 p)
764{ 713{
765 u32 v; 714 u32 v;
766 715
@@ -775,7 +724,6 @@ mpsc_set_parity(struct mpsc_port_info *pi, u32 p)
775 if (pi->mirror_regs) 724 if (pi->mirror_regs)
776 pi->MPSC_CHR_2_m = v; 725 pi->MPSC_CHR_2_m = v;
777 writel(v, pi->mpsc_base + MPSC_CHR_2); 726 writel(v, pi->mpsc_base + MPSC_CHR_2);
778 return;
779} 727}
780 728
781/* 729/*
@@ -786,8 +734,7 @@ mpsc_set_parity(struct mpsc_port_info *pi, u32 p)
786 ****************************************************************************** 734 ******************************************************************************
787 */ 735 */
788 736
789static void 737static void mpsc_init_hw(struct mpsc_port_info *pi)
790mpsc_init_hw(struct mpsc_port_info *pi)
791{ 738{
792 pr_debug("mpsc_init_hw[%d]: Initializing\n", pi->port.line); 739 pr_debug("mpsc_init_hw[%d]: Initializing\n", pi->port.line);
793 740
@@ -796,12 +743,9 @@ mpsc_init_hw(struct mpsc_port_info *pi)
796 mpsc_sdma_init(pi, dma_get_cache_alignment()); /* burst a cacheline */ 743 mpsc_sdma_init(pi, dma_get_cache_alignment()); /* burst a cacheline */
797 mpsc_sdma_stop(pi); 744 mpsc_sdma_stop(pi);
798 mpsc_hw_init(pi); 745 mpsc_hw_init(pi);
799
800 return;
801} 746}
802 747
803static int 748static int mpsc_alloc_ring_mem(struct mpsc_port_info *pi)
804mpsc_alloc_ring_mem(struct mpsc_port_info *pi)
805{ 749{
806 int rc = 0; 750 int rc = 0;
807 751
@@ -812,11 +756,10 @@ mpsc_alloc_ring_mem(struct mpsc_port_info *pi)
812 if (!dma_supported(pi->port.dev, 0xffffffff)) { 756 if (!dma_supported(pi->port.dev, 0xffffffff)) {
813 printk(KERN_ERR "MPSC: Inadequate DMA support\n"); 757 printk(KERN_ERR "MPSC: Inadequate DMA support\n");
814 rc = -ENXIO; 758 rc = -ENXIO;
815 } 759 } else if ((pi->dma_region = dma_alloc_noncoherent(pi->port.dev,
816 else if ((pi->dma_region = dma_alloc_noncoherent(pi->port.dev, 760 MPSC_DMA_ALLOC_SIZE,
817 MPSC_DMA_ALLOC_SIZE, &pi->dma_region_p, GFP_KERNEL)) 761 &pi->dma_region_p, GFP_KERNEL))
818 == NULL) { 762 == NULL) {
819
820 printk(KERN_ERR "MPSC: Can't alloc Desc region\n"); 763 printk(KERN_ERR "MPSC: Can't alloc Desc region\n");
821 rc = -ENOMEM; 764 rc = -ENOMEM;
822 } 765 }
@@ -825,23 +768,19 @@ mpsc_alloc_ring_mem(struct mpsc_port_info *pi)
825 return rc; 768 return rc;
826} 769}
827 770
828static void 771static void mpsc_free_ring_mem(struct mpsc_port_info *pi)
829mpsc_free_ring_mem(struct mpsc_port_info *pi)
830{ 772{
831 pr_debug("mpsc_free_ring_mem[%d]: Freeing ring mem\n", pi->port.line); 773 pr_debug("mpsc_free_ring_mem[%d]: Freeing ring mem\n", pi->port.line);
832 774
833 if (pi->dma_region) { 775 if (pi->dma_region) {
834 dma_free_noncoherent(pi->port.dev, MPSC_DMA_ALLOC_SIZE, 776 dma_free_noncoherent(pi->port.dev, MPSC_DMA_ALLOC_SIZE,
835 pi->dma_region, pi->dma_region_p); 777 pi->dma_region, pi->dma_region_p);
836 pi->dma_region = NULL; 778 pi->dma_region = NULL;
837 pi->dma_region_p = (dma_addr_t) NULL; 779 pi->dma_region_p = (dma_addr_t)NULL;
838 } 780 }
839
840 return;
841} 781}
842 782
843static void 783static void mpsc_init_rings(struct mpsc_port_info *pi)
844mpsc_init_rings(struct mpsc_port_info *pi)
845{ 784{
846 struct mpsc_rx_desc *rxre; 785 struct mpsc_rx_desc *rxre;
847 struct mpsc_tx_desc *txre; 786 struct mpsc_tx_desc *txre;
@@ -859,8 +798,8 @@ mpsc_init_rings(struct mpsc_port_info *pi)
859 * Descriptors & buffers are multiples of cacheline size and must be 798 * Descriptors & buffers are multiples of cacheline size and must be
860 * cacheline aligned. 799 * cacheline aligned.
861 */ 800 */
862 dp = ALIGN((u32) pi->dma_region, dma_get_cache_alignment()); 801 dp = ALIGN((u32)pi->dma_region, dma_get_cache_alignment());
863 dp_p = ALIGN((u32) pi->dma_region_p, dma_get_cache_alignment()); 802 dp_p = ALIGN((u32)pi->dma_region_p, dma_get_cache_alignment());
864 803
865 /* 804 /*
866 * Partition dma region into rx ring descriptor, rx buffers, 805 * Partition dma region into rx ring descriptor, rx buffers,
@@ -871,8 +810,8 @@ mpsc_init_rings(struct mpsc_port_info *pi)
871 dp += MPSC_RXR_SIZE; 810 dp += MPSC_RXR_SIZE;
872 dp_p += MPSC_RXR_SIZE; 811 dp_p += MPSC_RXR_SIZE;
873 812
874 pi->rxb = (u8 *) dp; 813 pi->rxb = (u8 *)dp;
875 pi->rxb_p = (u8 *) dp_p; 814 pi->rxb_p = (u8 *)dp_p;
876 dp += MPSC_RXB_SIZE; 815 dp += MPSC_RXB_SIZE;
877 dp_p += MPSC_RXB_SIZE; 816 dp_p += MPSC_RXB_SIZE;
878 817
@@ -883,8 +822,8 @@ mpsc_init_rings(struct mpsc_port_info *pi)
883 dp += MPSC_TXR_SIZE; 822 dp += MPSC_TXR_SIZE;
884 dp_p += MPSC_TXR_SIZE; 823 dp_p += MPSC_TXR_SIZE;
885 824
886 pi->txb = (u8 *) dp; 825 pi->txb = (u8 *)dp;
887 pi->txb_p = (u8 *) dp_p; 826 pi->txb_p = (u8 *)dp_p;
888 827
889 pi->txr_head = 0; 828 pi->txr_head = 0;
890 pi->txr_tail = 0; 829 pi->txr_tail = 0;
@@ -900,10 +839,9 @@ mpsc_init_rings(struct mpsc_port_info *pi)
900 839
901 rxre->bufsize = cpu_to_be16(MPSC_RXBE_SIZE); 840 rxre->bufsize = cpu_to_be16(MPSC_RXBE_SIZE);
902 rxre->bytecnt = cpu_to_be16(0); 841 rxre->bytecnt = cpu_to_be16(0);
903 rxre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O | 842 rxre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O
904 SDMA_DESC_CMDSTAT_EI | 843 | SDMA_DESC_CMDSTAT_EI | SDMA_DESC_CMDSTAT_F
905 SDMA_DESC_CMDSTAT_F | 844 | SDMA_DESC_CMDSTAT_L);
906 SDMA_DESC_CMDSTAT_L);
907 rxre->link = cpu_to_be32(dp_p + MPSC_RXRE_SIZE); 845 rxre->link = cpu_to_be32(dp_p + MPSC_RXRE_SIZE);
908 rxre->buf_ptr = cpu_to_be32(bp_p); 846 rxre->buf_ptr = cpu_to_be32(bp_p);
909 847
@@ -933,19 +871,19 @@ mpsc_init_rings(struct mpsc_port_info *pi)
933 } 871 }
934 txre->link = cpu_to_be32(pi->txr_p); /* Wrap last back to first */ 872 txre->link = cpu_to_be32(pi->txr_p); /* Wrap last back to first */
935 873
936 dma_cache_sync(pi->port.dev, (void *) pi->dma_region, MPSC_DMA_ALLOC_SIZE, 874 dma_cache_sync(pi->port.dev, (void *)pi->dma_region,
937 DMA_BIDIRECTIONAL); 875 MPSC_DMA_ALLOC_SIZE, DMA_BIDIRECTIONAL);
938#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 876#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
939 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 877 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
940 flush_dcache_range((ulong)pi->dma_region, 878 flush_dcache_range((ulong)pi->dma_region,
941 (ulong)pi->dma_region + MPSC_DMA_ALLOC_SIZE); 879 (ulong)pi->dma_region
880 + MPSC_DMA_ALLOC_SIZE);
942#endif 881#endif
943 882
944 return; 883 return;
945} 884}
946 885
947static void 886static void mpsc_uninit_rings(struct mpsc_port_info *pi)
948mpsc_uninit_rings(struct mpsc_port_info *pi)
949{ 887{
950 pr_debug("mpsc_uninit_rings[%d]: Uninitializing rings\n",pi->port.line); 888 pr_debug("mpsc_uninit_rings[%d]: Uninitializing rings\n",pi->port.line);
951 889
@@ -963,12 +901,9 @@ mpsc_uninit_rings(struct mpsc_port_info *pi)
963 pi->txb_p = NULL; 901 pi->txb_p = NULL;
964 pi->txr_head = 0; 902 pi->txr_head = 0;
965 pi->txr_tail = 0; 903 pi->txr_tail = 0;
966
967 return;
968} 904}
969 905
970static int 906static int mpsc_make_ready(struct mpsc_port_info *pi)
971mpsc_make_ready(struct mpsc_port_info *pi)
972{ 907{
973 int rc; 908 int rc;
974 909
@@ -993,8 +928,7 @@ mpsc_make_ready(struct mpsc_port_info *pi)
993 ****************************************************************************** 928 ******************************************************************************
994 */ 929 */
995 930
996static inline int 931static int mpsc_rx_intr(struct mpsc_port_info *pi)
997mpsc_rx_intr(struct mpsc_port_info *pi)
998{ 932{
999 struct mpsc_rx_desc *rxre; 933 struct mpsc_rx_desc *rxre;
1000 struct tty_struct *tty = pi->port.info->tty; 934 struct tty_struct *tty = pi->port.info->tty;
@@ -1007,21 +941,24 @@ mpsc_rx_intr(struct mpsc_port_info *pi)
1007 941
1008 rxre = (struct mpsc_rx_desc *)(pi->rxr + (pi->rxr_posn*MPSC_RXRE_SIZE)); 942 rxre = (struct mpsc_rx_desc *)(pi->rxr + (pi->rxr_posn*MPSC_RXRE_SIZE));
1009 943
1010 dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE, DMA_FROM_DEVICE); 944 dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE,
945 DMA_FROM_DEVICE);
1011#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 946#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1012 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 947 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1013 invalidate_dcache_range((ulong)rxre, 948 invalidate_dcache_range((ulong)rxre,
1014 (ulong)rxre + MPSC_RXRE_SIZE); 949 (ulong)rxre + MPSC_RXRE_SIZE);
1015#endif 950#endif
1016 951
1017 /* 952 /*
1018 * Loop through Rx descriptors handling ones that have been completed. 953 * Loop through Rx descriptors handling ones that have been completed.
1019 */ 954 */
1020 while (!((cmdstat = be32_to_cpu(rxre->cmdstat)) & SDMA_DESC_CMDSTAT_O)){ 955 while (!((cmdstat = be32_to_cpu(rxre->cmdstat))
956 & SDMA_DESC_CMDSTAT_O)) {
1021 bytes_in = be16_to_cpu(rxre->bytecnt); 957 bytes_in = be16_to_cpu(rxre->bytecnt);
1022 958
1023 /* Following use of tty struct directly is deprecated */ 959 /* Following use of tty struct directly is deprecated */
1024 if (unlikely(tty_buffer_request_room(tty, bytes_in) < bytes_in)) { 960 if (unlikely(tty_buffer_request_room(tty, bytes_in)
961 < bytes_in)) {
1025 if (tty->low_latency) 962 if (tty->low_latency)
1026 tty_flip_buffer_push(tty); 963 tty_flip_buffer_push(tty);
1027 /* 964 /*
@@ -1031,11 +968,12 @@ mpsc_rx_intr(struct mpsc_port_info *pi)
1031 } 968 }
1032 969
1033 bp = pi->rxb + (pi->rxr_posn * MPSC_RXBE_SIZE); 970 bp = pi->rxb + (pi->rxr_posn * MPSC_RXBE_SIZE);
1034 dma_cache_sync(pi->port.dev, (void *) bp, MPSC_RXBE_SIZE, DMA_FROM_DEVICE); 971 dma_cache_sync(pi->port.dev, (void *)bp, MPSC_RXBE_SIZE,
972 DMA_FROM_DEVICE);
1035#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 973#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1036 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 974 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1037 invalidate_dcache_range((ulong)bp, 975 invalidate_dcache_range((ulong)bp,
1038 (ulong)bp + MPSC_RXBE_SIZE); 976 (ulong)bp + MPSC_RXBE_SIZE);
1039#endif 977#endif
1040 978
1041 /* 979 /*
@@ -1046,8 +984,9 @@ mpsc_rx_intr(struct mpsc_port_info *pi)
1046 * we'll assume there is no data in the buffer. 984 * we'll assume there is no data in the buffer.
1047 * If there is...it gets lost. 985 * If there is...it gets lost.
1048 */ 986 */
1049 if (unlikely(cmdstat & (SDMA_DESC_CMDSTAT_BR | 987 if (unlikely(cmdstat & (SDMA_DESC_CMDSTAT_BR
1050 SDMA_DESC_CMDSTAT_FR | SDMA_DESC_CMDSTAT_OR))) { 988 | SDMA_DESC_CMDSTAT_FR
989 | SDMA_DESC_CMDSTAT_OR))) {
1051 990
1052 pi->port.icount.rx++; 991 pi->port.icount.rx++;
1053 992
@@ -1056,11 +995,11 @@ mpsc_rx_intr(struct mpsc_port_info *pi)
1056 995
1057 if (uart_handle_break(&pi->port)) 996 if (uart_handle_break(&pi->port))
1058 goto next_frame; 997 goto next_frame;
1059 } 998 } else if (cmdstat & SDMA_DESC_CMDSTAT_FR) {
1060 else if (cmdstat & SDMA_DESC_CMDSTAT_FR)/* Framing */
1061 pi->port.icount.frame++; 999 pi->port.icount.frame++;
1062 else if (cmdstat & SDMA_DESC_CMDSTAT_OR) /* Overrun */ 1000 } else if (cmdstat & SDMA_DESC_CMDSTAT_OR) {
1063 pi->port.icount.overrun++; 1001 pi->port.icount.overrun++;
1002 }
1064 1003
1065 cmdstat &= pi->port.read_status_mask; 1004 cmdstat &= pi->port.read_status_mask;
1066 1005
@@ -1080,12 +1019,12 @@ mpsc_rx_intr(struct mpsc_port_info *pi)
1080 goto next_frame; 1019 goto next_frame;
1081 } 1020 }
1082 1021
1083 if ((unlikely(cmdstat & (SDMA_DESC_CMDSTAT_BR | 1022 if ((unlikely(cmdstat & (SDMA_DESC_CMDSTAT_BR
1084 SDMA_DESC_CMDSTAT_FR | SDMA_DESC_CMDSTAT_OR))) && 1023 | SDMA_DESC_CMDSTAT_FR
1085 !(cmdstat & pi->port.ignore_status_mask)) 1024 | SDMA_DESC_CMDSTAT_OR)))
1086 1025 && !(cmdstat & pi->port.ignore_status_mask)) {
1087 tty_insert_flip_char(tty, *bp, flag); 1026 tty_insert_flip_char(tty, *bp, flag);
1088 else { 1027 } else {
1089 for (i=0; i<bytes_in; i++) 1028 for (i=0; i<bytes_in; i++)
1090 tty_insert_flip_char(tty, *bp++, TTY_NORMAL); 1029 tty_insert_flip_char(tty, *bp++, TTY_NORMAL);
1091 1030
@@ -1095,29 +1034,29 @@ mpsc_rx_intr(struct mpsc_port_info *pi)
1095next_frame: 1034next_frame:
1096 rxre->bytecnt = cpu_to_be16(0); 1035 rxre->bytecnt = cpu_to_be16(0);
1097 wmb(); 1036 wmb();
1098 rxre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O | 1037 rxre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O
1099 SDMA_DESC_CMDSTAT_EI | 1038 | SDMA_DESC_CMDSTAT_EI | SDMA_DESC_CMDSTAT_F
1100 SDMA_DESC_CMDSTAT_F | 1039 | SDMA_DESC_CMDSTAT_L);
1101 SDMA_DESC_CMDSTAT_L);
1102 wmb(); 1040 wmb();
1103 dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE, DMA_BIDIRECTIONAL); 1041 dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE,
1042 DMA_BIDIRECTIONAL);
1104#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1043#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1105 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1044 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1106 flush_dcache_range((ulong)rxre, 1045 flush_dcache_range((ulong)rxre,
1107 (ulong)rxre + MPSC_RXRE_SIZE); 1046 (ulong)rxre + MPSC_RXRE_SIZE);
1108#endif 1047#endif
1109 1048
1110 /* Advance to next descriptor */ 1049 /* Advance to next descriptor */
1111 pi->rxr_posn = (pi->rxr_posn + 1) & (MPSC_RXR_ENTRIES - 1); 1050 pi->rxr_posn = (pi->rxr_posn + 1) & (MPSC_RXR_ENTRIES - 1);
1112 rxre = (struct mpsc_rx_desc *)(pi->rxr + 1051 rxre = (struct mpsc_rx_desc *)
1113 (pi->rxr_posn * MPSC_RXRE_SIZE)); 1052 (pi->rxr + (pi->rxr_posn * MPSC_RXRE_SIZE));
1114 dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE, DMA_FROM_DEVICE); 1053 dma_cache_sync(pi->port.dev, (void *)rxre, MPSC_RXRE_SIZE,
1054 DMA_FROM_DEVICE);
1115#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1055#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1116 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1056 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1117 invalidate_dcache_range((ulong)rxre, 1057 invalidate_dcache_range((ulong)rxre,
1118 (ulong)rxre + MPSC_RXRE_SIZE); 1058 (ulong)rxre + MPSC_RXRE_SIZE);
1119#endif 1059#endif
1120
1121 rc = 1; 1060 rc = 1;
1122 } 1061 }
1123 1062
@@ -1129,42 +1068,38 @@ next_frame:
1129 return rc; 1068 return rc;
1130} 1069}
1131 1070
1132static inline void 1071static void mpsc_setup_tx_desc(struct mpsc_port_info *pi, u32 count, u32 intr)
1133mpsc_setup_tx_desc(struct mpsc_port_info *pi, u32 count, u32 intr)
1134{ 1072{
1135 struct mpsc_tx_desc *txre; 1073 struct mpsc_tx_desc *txre;
1136 1074
1137 txre = (struct mpsc_tx_desc *)(pi->txr + 1075 txre = (struct mpsc_tx_desc *)(pi->txr
1138 (pi->txr_head * MPSC_TXRE_SIZE)); 1076 + (pi->txr_head * MPSC_TXRE_SIZE));
1139 1077
1140 txre->bytecnt = cpu_to_be16(count); 1078 txre->bytecnt = cpu_to_be16(count);
1141 txre->shadow = txre->bytecnt; 1079 txre->shadow = txre->bytecnt;
1142 wmb(); /* ensure cmdstat is last field updated */ 1080 wmb(); /* ensure cmdstat is last field updated */
1143 txre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O | SDMA_DESC_CMDSTAT_F | 1081 txre->cmdstat = cpu_to_be32(SDMA_DESC_CMDSTAT_O | SDMA_DESC_CMDSTAT_F
1144 SDMA_DESC_CMDSTAT_L | ((intr) ? 1082 | SDMA_DESC_CMDSTAT_L
1145 SDMA_DESC_CMDSTAT_EI 1083 | ((intr) ? SDMA_DESC_CMDSTAT_EI : 0));
1146 : 0));
1147 wmb(); 1084 wmb();
1148 dma_cache_sync(pi->port.dev, (void *) txre, MPSC_TXRE_SIZE, DMA_BIDIRECTIONAL); 1085 dma_cache_sync(pi->port.dev, (void *)txre, MPSC_TXRE_SIZE,
1086 DMA_BIDIRECTIONAL);
1149#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1087#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1150 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1088 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1151 flush_dcache_range((ulong)txre, 1089 flush_dcache_range((ulong)txre,
1152 (ulong)txre + MPSC_TXRE_SIZE); 1090 (ulong)txre + MPSC_TXRE_SIZE);
1153#endif 1091#endif
1154
1155 return;
1156} 1092}
1157 1093
1158static inline void 1094static void mpsc_copy_tx_data(struct mpsc_port_info *pi)
1159mpsc_copy_tx_data(struct mpsc_port_info *pi)
1160{ 1095{
1161 struct circ_buf *xmit = &pi->port.info->xmit; 1096 struct circ_buf *xmit = &pi->port.info->xmit;
1162 u8 *bp; 1097 u8 *bp;
1163 u32 i; 1098 u32 i;
1164 1099
1165 /* Make sure the desc ring isn't full */ 1100 /* Make sure the desc ring isn't full */
1166 while (CIRC_CNT(pi->txr_head, pi->txr_tail, MPSC_TXR_ENTRIES) < 1101 while (CIRC_CNT(pi->txr_head, pi->txr_tail, MPSC_TXR_ENTRIES)
1167 (MPSC_TXR_ENTRIES - 1)) { 1102 < (MPSC_TXR_ENTRIES - 1)) {
1168 if (pi->port.x_char) { 1103 if (pi->port.x_char) {
1169 /* 1104 /*
1170 * Ideally, we should use the TCS field in 1105 * Ideally, we should use the TCS field in
@@ -1178,11 +1113,11 @@ mpsc_copy_tx_data(struct mpsc_port_info *pi)
1178 *bp = pi->port.x_char; 1113 *bp = pi->port.x_char;
1179 pi->port.x_char = 0; 1114 pi->port.x_char = 0;
1180 i = 1; 1115 i = 1;
1181 } 1116 } else if (!uart_circ_empty(xmit)
1182 else if (!uart_circ_empty(xmit) && !uart_tx_stopped(&pi->port)){ 1117 && !uart_tx_stopped(&pi->port)) {
1183 i = min((u32) MPSC_TXBE_SIZE, 1118 i = min((u32)MPSC_TXBE_SIZE,
1184 (u32) uart_circ_chars_pending(xmit)); 1119 (u32)uart_circ_chars_pending(xmit));
1185 i = min(i, (u32) CIRC_CNT_TO_END(xmit->head, xmit->tail, 1120 i = min(i, (u32)CIRC_CNT_TO_END(xmit->head, xmit->tail,
1186 UART_XMIT_SIZE)); 1121 UART_XMIT_SIZE));
1187 bp = pi->txb + (pi->txr_head * MPSC_TXBE_SIZE); 1122 bp = pi->txb + (pi->txr_head * MPSC_TXBE_SIZE);
1188 memcpy(bp, &xmit->buf[xmit->tail], i); 1123 memcpy(bp, &xmit->buf[xmit->tail], i);
@@ -1190,27 +1125,25 @@ mpsc_copy_tx_data(struct mpsc_port_info *pi)
1190 1125
1191 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 1126 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1192 uart_write_wakeup(&pi->port); 1127 uart_write_wakeup(&pi->port);
1193 } 1128 } else { /* All tx data copied into ring bufs */
1194 else /* All tx data copied into ring bufs */
1195 return; 1129 return;
1130 }
1196 1131
1197 dma_cache_sync(pi->port.dev, (void *) bp, MPSC_TXBE_SIZE, DMA_BIDIRECTIONAL); 1132 dma_cache_sync(pi->port.dev, (void *)bp, MPSC_TXBE_SIZE,
1133 DMA_BIDIRECTIONAL);
1198#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1134#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1199 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1135 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1200 flush_dcache_range((ulong)bp, 1136 flush_dcache_range((ulong)bp,
1201 (ulong)bp + MPSC_TXBE_SIZE); 1137 (ulong)bp + MPSC_TXBE_SIZE);
1202#endif 1138#endif
1203 mpsc_setup_tx_desc(pi, i, 1); 1139 mpsc_setup_tx_desc(pi, i, 1);
1204 1140
1205 /* Advance to next descriptor */ 1141 /* Advance to next descriptor */
1206 pi->txr_head = (pi->txr_head + 1) & (MPSC_TXR_ENTRIES - 1); 1142 pi->txr_head = (pi->txr_head + 1) & (MPSC_TXR_ENTRIES - 1);
1207 } 1143 }
1208
1209 return;
1210} 1144}
1211 1145
1212static inline int 1146static int mpsc_tx_intr(struct mpsc_port_info *pi)
1213mpsc_tx_intr(struct mpsc_port_info *pi)
1214{ 1147{
1215 struct mpsc_tx_desc *txre; 1148 struct mpsc_tx_desc *txre;
1216 int rc = 0; 1149 int rc = 0;
@@ -1219,14 +1152,15 @@ mpsc_tx_intr(struct mpsc_port_info *pi)
1219 spin_lock_irqsave(&pi->tx_lock, iflags); 1152 spin_lock_irqsave(&pi->tx_lock, iflags);
1220 1153
1221 if (!mpsc_sdma_tx_active(pi)) { 1154 if (!mpsc_sdma_tx_active(pi)) {
1222 txre = (struct mpsc_tx_desc *)(pi->txr + 1155 txre = (struct mpsc_tx_desc *)(pi->txr
1223 (pi->txr_tail * MPSC_TXRE_SIZE)); 1156 + (pi->txr_tail * MPSC_TXRE_SIZE));
1224 1157
1225 dma_cache_sync(pi->port.dev, (void *) txre, MPSC_TXRE_SIZE, DMA_FROM_DEVICE); 1158 dma_cache_sync(pi->port.dev, (void *)txre, MPSC_TXRE_SIZE,
1159 DMA_FROM_DEVICE);
1226#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1160#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1227 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1161 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1228 invalidate_dcache_range((ulong)txre, 1162 invalidate_dcache_range((ulong)txre,
1229 (ulong)txre + MPSC_TXRE_SIZE); 1163 (ulong)txre + MPSC_TXRE_SIZE);
1230#endif 1164#endif
1231 1165
1232 while (!(be32_to_cpu(txre->cmdstat) & SDMA_DESC_CMDSTAT_O)) { 1166 while (!(be32_to_cpu(txre->cmdstat) & SDMA_DESC_CMDSTAT_O)) {
@@ -1238,14 +1172,14 @@ mpsc_tx_intr(struct mpsc_port_info *pi)
1238 if (pi->txr_head == pi->txr_tail) 1172 if (pi->txr_head == pi->txr_tail)
1239 break; 1173 break;
1240 1174
1241 txre = (struct mpsc_tx_desc *)(pi->txr + 1175 txre = (struct mpsc_tx_desc *)(pi->txr
1242 (pi->txr_tail * MPSC_TXRE_SIZE)); 1176 + (pi->txr_tail * MPSC_TXRE_SIZE));
1243 dma_cache_sync(pi->port.dev, (void *) txre, MPSC_TXRE_SIZE, 1177 dma_cache_sync(pi->port.dev, (void *)txre,
1244 DMA_FROM_DEVICE); 1178 MPSC_TXRE_SIZE, DMA_FROM_DEVICE);
1245#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1179#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1246 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1180 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1247 invalidate_dcache_range((ulong)txre, 1181 invalidate_dcache_range((ulong)txre,
1248 (ulong)txre + MPSC_TXRE_SIZE); 1182 (ulong)txre + MPSC_TXRE_SIZE);
1249#endif 1183#endif
1250 } 1184 }
1251 1185
@@ -1262,8 +1196,7 @@ mpsc_tx_intr(struct mpsc_port_info *pi)
1262 * the interrupt, then handle any completed Rx/Tx descriptors. When done 1196 * the interrupt, then handle any completed Rx/Tx descriptors. When done
1263 * handling those descriptors, we restart the Rx/Tx engines if they're stopped. 1197 * handling those descriptors, we restart the Rx/Tx engines if they're stopped.
1264 */ 1198 */
1265static irqreturn_t 1199static irqreturn_t mpsc_sdma_intr(int irq, void *dev_id)
1266mpsc_sdma_intr(int irq, void *dev_id)
1267{ 1200{
1268 struct mpsc_port_info *pi = dev_id; 1201 struct mpsc_port_info *pi = dev_id;
1269 ulong iflags; 1202 ulong iflags;
@@ -1290,8 +1223,7 @@ mpsc_sdma_intr(int irq, void *dev_id)
1290 * 1223 *
1291 ****************************************************************************** 1224 ******************************************************************************
1292 */ 1225 */
1293static uint 1226static uint mpsc_tx_empty(struct uart_port *port)
1294mpsc_tx_empty(struct uart_port *port)
1295{ 1227{
1296 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1228 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
1297 ulong iflags; 1229 ulong iflags;
@@ -1304,21 +1236,18 @@ mpsc_tx_empty(struct uart_port *port)
1304 return rc; 1236 return rc;
1305} 1237}
1306 1238
1307static void 1239static void mpsc_set_mctrl(struct uart_port *port, uint mctrl)
1308mpsc_set_mctrl(struct uart_port *port, uint mctrl)
1309{ 1240{
1310 /* Have no way to set modem control lines AFAICT */ 1241 /* Have no way to set modem control lines AFAICT */
1311 return;
1312} 1242}
1313 1243
1314static uint 1244static uint mpsc_get_mctrl(struct uart_port *port)
1315mpsc_get_mctrl(struct uart_port *port)
1316{ 1245{
1317 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1246 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
1318 u32 mflags, status; 1247 u32 mflags, status;
1319 1248
1320 status = (pi->mirror_regs) ? pi->MPSC_CHR_10_m : 1249 status = (pi->mirror_regs) ? pi->MPSC_CHR_10_m
1321 readl(pi->mpsc_base + MPSC_CHR_10); 1250 : readl(pi->mpsc_base + MPSC_CHR_10);
1322 1251
1323 mflags = 0; 1252 mflags = 0;
1324 if (status & 0x1) 1253 if (status & 0x1)
@@ -1329,19 +1258,16 @@ mpsc_get_mctrl(struct uart_port *port)
1329 return mflags | TIOCM_DSR; /* No way to tell if DSR asserted */ 1258 return mflags | TIOCM_DSR; /* No way to tell if DSR asserted */
1330} 1259}
1331 1260
1332static void 1261static void mpsc_stop_tx(struct uart_port *port)
1333mpsc_stop_tx(struct uart_port *port)
1334{ 1262{
1335 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1263 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
1336 1264
1337 pr_debug("mpsc_stop_tx[%d]\n", port->line); 1265 pr_debug("mpsc_stop_tx[%d]\n", port->line);
1338 1266
1339 mpsc_freeze(pi); 1267 mpsc_freeze(pi);
1340 return;
1341} 1268}
1342 1269
1343static void 1270static void mpsc_start_tx(struct uart_port *port)
1344mpsc_start_tx(struct uart_port *port)
1345{ 1271{
1346 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1272 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
1347 unsigned long iflags; 1273 unsigned long iflags;
@@ -1355,42 +1281,45 @@ mpsc_start_tx(struct uart_port *port)
1355 spin_unlock_irqrestore(&pi->tx_lock, iflags); 1281 spin_unlock_irqrestore(&pi->tx_lock, iflags);
1356 1282
1357 pr_debug("mpsc_start_tx[%d]\n", port->line); 1283 pr_debug("mpsc_start_tx[%d]\n", port->line);
1358 return;
1359} 1284}
1360 1285
1361static void 1286static void mpsc_start_rx(struct mpsc_port_info *pi)
1362mpsc_start_rx(struct mpsc_port_info *pi)
1363{ 1287{
1364 pr_debug("mpsc_start_rx[%d]: Starting...\n", pi->port.line); 1288 pr_debug("mpsc_start_rx[%d]: Starting...\n", pi->port.line);
1365 1289
1366 /* Issue a Receive Abort to clear any receive errors */
1367 writel(MPSC_CHR_2_RA, pi->mpsc_base + MPSC_CHR_2);
1368 if (pi->rcv_data) { 1290 if (pi->rcv_data) {
1369 mpsc_enter_hunt(pi); 1291 mpsc_enter_hunt(pi);
1370 mpsc_sdma_cmd(pi, SDMA_SDCM_ERD); 1292 mpsc_sdma_cmd(pi, SDMA_SDCM_ERD);
1371 } 1293 }
1372 return;
1373} 1294}
1374 1295
1375static void 1296static void mpsc_stop_rx(struct uart_port *port)
1376mpsc_stop_rx(struct uart_port *port)
1377{ 1297{
1378 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1298 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
1379 1299
1380 pr_debug("mpsc_stop_rx[%d]: Stopping...\n", port->line); 1300 pr_debug("mpsc_stop_rx[%d]: Stopping...\n", port->line);
1381 1301
1302 if (pi->mirror_regs) {
1303 writel(pi->MPSC_CHR_2_m | MPSC_CHR_2_RA,
1304 pi->mpsc_base + MPSC_CHR_2);
1305 /* Erratum prevents reading CHR_2 so just delay for a while */
1306 udelay(100);
1307 } else {
1308 writel(readl(pi->mpsc_base + MPSC_CHR_2) | MPSC_CHR_2_RA,
1309 pi->mpsc_base + MPSC_CHR_2);
1310
1311 while (readl(pi->mpsc_base + MPSC_CHR_2) & MPSC_CHR_2_RA)
1312 udelay(10);
1313 }
1314
1382 mpsc_sdma_cmd(pi, SDMA_SDCM_AR); 1315 mpsc_sdma_cmd(pi, SDMA_SDCM_AR);
1383 return;
1384} 1316}
1385 1317
1386static void 1318static void mpsc_enable_ms(struct uart_port *port)
1387mpsc_enable_ms(struct uart_port *port)
1388{ 1319{
1389 return; /* Not supported */
1390} 1320}
1391 1321
1392static void 1322static void mpsc_break_ctl(struct uart_port *port, int ctl)
1393mpsc_break_ctl(struct uart_port *port, int ctl)
1394{ 1323{
1395 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1324 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
1396 ulong flags; 1325 ulong flags;
@@ -1403,12 +1332,9 @@ mpsc_break_ctl(struct uart_port *port, int ctl)
1403 pi->MPSC_CHR_1_m = v; 1332 pi->MPSC_CHR_1_m = v;
1404 writel(v, pi->mpsc_base + MPSC_CHR_1); 1333 writel(v, pi->mpsc_base + MPSC_CHR_1);
1405 spin_unlock_irqrestore(&pi->port.lock, flags); 1334 spin_unlock_irqrestore(&pi->port.lock, flags);
1406
1407 return;
1408} 1335}
1409 1336
1410static int 1337static int mpsc_startup(struct uart_port *port)
1411mpsc_startup(struct uart_port *port)
1412{ 1338{
1413 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1339 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
1414 u32 flag = 0; 1340 u32 flag = 0;
@@ -1426,20 +1352,19 @@ mpsc_startup(struct uart_port *port)
1426 flag = IRQF_SHARED; 1352 flag = IRQF_SHARED;
1427 1353
1428 if (request_irq(pi->port.irq, mpsc_sdma_intr, flag, 1354 if (request_irq(pi->port.irq, mpsc_sdma_intr, flag,
1429 "mpsc-sdma", pi)) 1355 "mpsc-sdma", pi))
1430 printk(KERN_ERR "MPSC: Can't get SDMA IRQ %d\n", 1356 printk(KERN_ERR "MPSC: Can't get SDMA IRQ %d\n",
1431 pi->port.irq); 1357 pi->port.irq);
1432 1358
1433 mpsc_sdma_intr_unmask(pi, 0xf); 1359 mpsc_sdma_intr_unmask(pi, 0xf);
1434 mpsc_sdma_set_rx_ring(pi, (struct mpsc_rx_desc *)(pi->rxr_p + 1360 mpsc_sdma_set_rx_ring(pi, (struct mpsc_rx_desc *)(pi->rxr_p
1435 (pi->rxr_posn * MPSC_RXRE_SIZE))); 1361 + (pi->rxr_posn * MPSC_RXRE_SIZE)));
1436 } 1362 }
1437 1363
1438 return rc; 1364 return rc;
1439} 1365}
1440 1366
1441static void 1367static void mpsc_shutdown(struct uart_port *port)
1442mpsc_shutdown(struct uart_port *port)
1443{ 1368{
1444 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1369 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
1445 1370
@@ -1447,11 +1372,9 @@ mpsc_shutdown(struct uart_port *port)
1447 1372
1448 mpsc_sdma_stop(pi); 1373 mpsc_sdma_stop(pi);
1449 free_irq(pi->port.irq, pi); 1374 free_irq(pi->port.irq, pi);
1450 return;
1451} 1375}
1452 1376
1453static void 1377static void mpsc_set_termios(struct uart_port *port, struct ktermios *termios,
1454mpsc_set_termios(struct uart_port *port, struct ktermios *termios,
1455 struct ktermios *old) 1378 struct ktermios *old)
1456{ 1379{
1457 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1380 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
@@ -1508,12 +1431,11 @@ mpsc_set_termios(struct uart_port *port, struct ktermios *termios,
1508 mpsc_set_baudrate(pi, baud); 1431 mpsc_set_baudrate(pi, baud);
1509 1432
1510 /* Characters/events to read */ 1433 /* Characters/events to read */
1511 pi->rcv_data = 1;
1512 pi->port.read_status_mask = SDMA_DESC_CMDSTAT_OR; 1434 pi->port.read_status_mask = SDMA_DESC_CMDSTAT_OR;
1513 1435
1514 if (termios->c_iflag & INPCK) 1436 if (termios->c_iflag & INPCK)
1515 pi->port.read_status_mask |= SDMA_DESC_CMDSTAT_PE | 1437 pi->port.read_status_mask |= SDMA_DESC_CMDSTAT_PE
1516 SDMA_DESC_CMDSTAT_FR; 1438 | SDMA_DESC_CMDSTAT_FR;
1517 1439
1518 if (termios->c_iflag & (BRKINT | PARMRK)) 1440 if (termios->c_iflag & (BRKINT | PARMRK))
1519 pi->port.read_status_mask |= SDMA_DESC_CMDSTAT_BR; 1441 pi->port.read_status_mask |= SDMA_DESC_CMDSTAT_BR;
@@ -1522,8 +1444,8 @@ mpsc_set_termios(struct uart_port *port, struct ktermios *termios,
1522 pi->port.ignore_status_mask = 0; 1444 pi->port.ignore_status_mask = 0;
1523 1445
1524 if (termios->c_iflag & IGNPAR) 1446 if (termios->c_iflag & IGNPAR)
1525 pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_PE | 1447 pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_PE
1526 SDMA_DESC_CMDSTAT_FR; 1448 | SDMA_DESC_CMDSTAT_FR;
1527 1449
1528 if (termios->c_iflag & IGNBRK) { 1450 if (termios->c_iflag & IGNBRK) {
1529 pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_BR; 1451 pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_BR;
@@ -1532,32 +1454,32 @@ mpsc_set_termios(struct uart_port *port, struct ktermios *termios,
1532 pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_OR; 1454 pi->port.ignore_status_mask |= SDMA_DESC_CMDSTAT_OR;
1533 } 1455 }
1534 1456
1535 /* Ignore all chars if CREAD not set */ 1457 if ((termios->c_cflag & CREAD)) {
1536 if (!(termios->c_cflag & CREAD)) 1458 if (!pi->rcv_data) {
1459 pi->rcv_data = 1;
1460 mpsc_start_rx(pi);
1461 }
1462 } else if (pi->rcv_data) {
1463 mpsc_stop_rx(port);
1537 pi->rcv_data = 0; 1464 pi->rcv_data = 0;
1538 else 1465 }
1539 mpsc_start_rx(pi);
1540 1466
1541 spin_unlock_irqrestore(&pi->port.lock, flags); 1467 spin_unlock_irqrestore(&pi->port.lock, flags);
1542 return;
1543} 1468}
1544 1469
1545static const char * 1470static const char *mpsc_type(struct uart_port *port)
1546mpsc_type(struct uart_port *port)
1547{ 1471{
1548 pr_debug("mpsc_type[%d]: port type: %s\n", port->line,MPSC_DRIVER_NAME); 1472 pr_debug("mpsc_type[%d]: port type: %s\n", port->line,MPSC_DRIVER_NAME);
1549 return MPSC_DRIVER_NAME; 1473 return MPSC_DRIVER_NAME;
1550} 1474}
1551 1475
1552static int 1476static int mpsc_request_port(struct uart_port *port)
1553mpsc_request_port(struct uart_port *port)
1554{ 1477{
1555 /* Should make chip/platform specific call */ 1478 /* Should make chip/platform specific call */
1556 return 0; 1479 return 0;
1557} 1480}
1558 1481
1559static void 1482static void mpsc_release_port(struct uart_port *port)
1560mpsc_release_port(struct uart_port *port)
1561{ 1483{
1562 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1484 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
1563 1485
@@ -1566,18 +1488,13 @@ mpsc_release_port(struct uart_port *port)
1566 mpsc_free_ring_mem(pi); 1488 mpsc_free_ring_mem(pi);
1567 pi->ready = 0; 1489 pi->ready = 0;
1568 } 1490 }
1569
1570 return;
1571} 1491}
1572 1492
1573static void 1493static void mpsc_config_port(struct uart_port *port, int flags)
1574mpsc_config_port(struct uart_port *port, int flags)
1575{ 1494{
1576 return;
1577} 1495}
1578 1496
1579static int 1497static int mpsc_verify_port(struct uart_port *port, struct serial_struct *ser)
1580mpsc_verify_port(struct uart_port *port, struct serial_struct *ser)
1581{ 1498{
1582 struct mpsc_port_info *pi = (struct mpsc_port_info *)port; 1499 struct mpsc_port_info *pi = (struct mpsc_port_info *)port;
1583 int rc = 0; 1500 int rc = 0;
@@ -1603,22 +1520,22 @@ mpsc_verify_port(struct uart_port *port, struct serial_struct *ser)
1603} 1520}
1604 1521
1605static struct uart_ops mpsc_pops = { 1522static struct uart_ops mpsc_pops = {
1606 .tx_empty = mpsc_tx_empty, 1523 .tx_empty = mpsc_tx_empty,
1607 .set_mctrl = mpsc_set_mctrl, 1524 .set_mctrl = mpsc_set_mctrl,
1608 .get_mctrl = mpsc_get_mctrl, 1525 .get_mctrl = mpsc_get_mctrl,
1609 .stop_tx = mpsc_stop_tx, 1526 .stop_tx = mpsc_stop_tx,
1610 .start_tx = mpsc_start_tx, 1527 .start_tx = mpsc_start_tx,
1611 .stop_rx = mpsc_stop_rx, 1528 .stop_rx = mpsc_stop_rx,
1612 .enable_ms = mpsc_enable_ms, 1529 .enable_ms = mpsc_enable_ms,
1613 .break_ctl = mpsc_break_ctl, 1530 .break_ctl = mpsc_break_ctl,
1614 .startup = mpsc_startup, 1531 .startup = mpsc_startup,
1615 .shutdown = mpsc_shutdown, 1532 .shutdown = mpsc_shutdown,
1616 .set_termios = mpsc_set_termios, 1533 .set_termios = mpsc_set_termios,
1617 .type = mpsc_type, 1534 .type = mpsc_type,
1618 .release_port = mpsc_release_port, 1535 .release_port = mpsc_release_port,
1619 .request_port = mpsc_request_port, 1536 .request_port = mpsc_request_port,
1620 .config_port = mpsc_config_port, 1537 .config_port = mpsc_config_port,
1621 .verify_port = mpsc_verify_port, 1538 .verify_port = mpsc_verify_port,
1622}; 1539};
1623 1540
1624/* 1541/*
@@ -1630,8 +1547,7 @@ static struct uart_ops mpsc_pops = {
1630 */ 1547 */
1631 1548
1632#ifdef CONFIG_SERIAL_MPSC_CONSOLE 1549#ifdef CONFIG_SERIAL_MPSC_CONSOLE
1633static void 1550static void mpsc_console_write(struct console *co, const char *s, uint count)
1634mpsc_console_write(struct console *co, const char *s, uint count)
1635{ 1551{
1636 struct mpsc_port_info *pi = &mpsc_ports[co->index]; 1552 struct mpsc_port_info *pi = &mpsc_ports[co->index];
1637 u8 *bp, *dp, add_cr = 0; 1553 u8 *bp, *dp, add_cr = 0;
@@ -1660,8 +1576,7 @@ mpsc_console_write(struct console *co, const char *s, uint count)
1660 if (add_cr) { 1576 if (add_cr) {
1661 *(dp++) = '\r'; 1577 *(dp++) = '\r';
1662 add_cr = 0; 1578 add_cr = 0;
1663 } 1579 } else {
1664 else {
1665 *(dp++) = *s; 1580 *(dp++) = *s;
1666 1581
1667 if (*(s++) == '\n') { /* add '\r' after '\n' */ 1582 if (*(s++) == '\n') { /* add '\r' after '\n' */
@@ -1673,11 +1588,12 @@ mpsc_console_write(struct console *co, const char *s, uint count)
1673 count--; 1588 count--;
1674 } 1589 }
1675 1590
1676 dma_cache_sync(pi->port.dev, (void *) bp, MPSC_TXBE_SIZE, DMA_BIDIRECTIONAL); 1591 dma_cache_sync(pi->port.dev, (void *)bp, MPSC_TXBE_SIZE,
1592 DMA_BIDIRECTIONAL);
1677#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 1593#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
1678 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */ 1594 if (pi->cache_mgmt) /* GT642[46]0 Res #COMM-2 */
1679 flush_dcache_range((ulong)bp, 1595 flush_dcache_range((ulong)bp,
1680 (ulong)bp + MPSC_TXBE_SIZE); 1596 (ulong)bp + MPSC_TXBE_SIZE);
1681#endif 1597#endif
1682 mpsc_setup_tx_desc(pi, i, 0); 1598 mpsc_setup_tx_desc(pi, i, 0);
1683 pi->txr_head = (pi->txr_head + 1) & (MPSC_TXR_ENTRIES - 1); 1599 pi->txr_head = (pi->txr_head + 1) & (MPSC_TXR_ENTRIES - 1);
@@ -1690,11 +1606,9 @@ mpsc_console_write(struct console *co, const char *s, uint count)
1690 } 1606 }
1691 1607
1692 spin_unlock_irqrestore(&pi->tx_lock, iflags); 1608 spin_unlock_irqrestore(&pi->tx_lock, iflags);
1693 return;
1694} 1609}
1695 1610
1696static int __init 1611static int __init mpsc_console_setup(struct console *co, char *options)
1697mpsc_console_setup(struct console *co, char *options)
1698{ 1612{
1699 struct mpsc_port_info *pi; 1613 struct mpsc_port_info *pi;
1700 int baud, bits, parity, flow; 1614 int baud, bits, parity, flow;
@@ -1723,17 +1637,16 @@ mpsc_console_setup(struct console *co, char *options)
1723} 1637}
1724 1638
1725static struct console mpsc_console = { 1639static struct console mpsc_console = {
1726 .name = MPSC_DEV_NAME, 1640 .name = MPSC_DEV_NAME,
1727 .write = mpsc_console_write, 1641 .write = mpsc_console_write,
1728 .device = uart_console_device, 1642 .device = uart_console_device,
1729 .setup = mpsc_console_setup, 1643 .setup = mpsc_console_setup,
1730 .flags = CON_PRINTBUFFER, 1644 .flags = CON_PRINTBUFFER,
1731 .index = -1, 1645 .index = -1,
1732 .data = &mpsc_reg, 1646 .data = &mpsc_reg,
1733}; 1647};
1734 1648
1735static int __init 1649static int __init mpsc_late_console_init(void)
1736mpsc_late_console_init(void)
1737{ 1650{
1738 pr_debug("mpsc_late_console_init: Enter\n"); 1651 pr_debug("mpsc_late_console_init: Enter\n");
1739 1652
@@ -1755,43 +1668,40 @@ late_initcall(mpsc_late_console_init);
1755 * 1668 *
1756 ****************************************************************************** 1669 ******************************************************************************
1757 */ 1670 */
1758static void 1671static void mpsc_resource_err(char *s)
1759mpsc_resource_err(char *s)
1760{ 1672{
1761 printk(KERN_WARNING "MPSC: Platform device resource error in %s\n", s); 1673 printk(KERN_WARNING "MPSC: Platform device resource error in %s\n", s);
1762 return;
1763} 1674}
1764 1675
1765static int 1676static int mpsc_shared_map_regs(struct platform_device *pd)
1766mpsc_shared_map_regs(struct platform_device *pd)
1767{ 1677{
1768 struct resource *r; 1678 struct resource *r;
1769 1679
1770 if ((r = platform_get_resource(pd, IORESOURCE_MEM, 1680 if ((r = platform_get_resource(pd, IORESOURCE_MEM,
1771 MPSC_ROUTING_BASE_ORDER)) && request_mem_region(r->start, 1681 MPSC_ROUTING_BASE_ORDER))
1772 MPSC_ROUTING_REG_BLOCK_SIZE, "mpsc_routing_regs")) { 1682 && request_mem_region(r->start,
1773 1683 MPSC_ROUTING_REG_BLOCK_SIZE,
1684 "mpsc_routing_regs")) {
1774 mpsc_shared_regs.mpsc_routing_base = ioremap(r->start, 1685 mpsc_shared_regs.mpsc_routing_base = ioremap(r->start,
1775 MPSC_ROUTING_REG_BLOCK_SIZE); 1686 MPSC_ROUTING_REG_BLOCK_SIZE);
1776 mpsc_shared_regs.mpsc_routing_base_p = r->start; 1687 mpsc_shared_regs.mpsc_routing_base_p = r->start;
1777 } 1688 } else {
1778 else {
1779 mpsc_resource_err("MPSC routing base"); 1689 mpsc_resource_err("MPSC routing base");
1780 return -ENOMEM; 1690 return -ENOMEM;
1781 } 1691 }
1782 1692
1783 if ((r = platform_get_resource(pd, IORESOURCE_MEM, 1693 if ((r = platform_get_resource(pd, IORESOURCE_MEM,
1784 MPSC_SDMA_INTR_BASE_ORDER)) && request_mem_region(r->start, 1694 MPSC_SDMA_INTR_BASE_ORDER))
1785 MPSC_SDMA_INTR_REG_BLOCK_SIZE, "sdma_intr_regs")) { 1695 && request_mem_region(r->start,
1786 1696 MPSC_SDMA_INTR_REG_BLOCK_SIZE,
1697 "sdma_intr_regs")) {
1787 mpsc_shared_regs.sdma_intr_base = ioremap(r->start, 1698 mpsc_shared_regs.sdma_intr_base = ioremap(r->start,
1788 MPSC_SDMA_INTR_REG_BLOCK_SIZE); 1699 MPSC_SDMA_INTR_REG_BLOCK_SIZE);
1789 mpsc_shared_regs.sdma_intr_base_p = r->start; 1700 mpsc_shared_regs.sdma_intr_base_p = r->start;
1790 } 1701 } else {
1791 else {
1792 iounmap(mpsc_shared_regs.mpsc_routing_base); 1702 iounmap(mpsc_shared_regs.mpsc_routing_base);
1793 release_mem_region(mpsc_shared_regs.mpsc_routing_base_p, 1703 release_mem_region(mpsc_shared_regs.mpsc_routing_base_p,
1794 MPSC_ROUTING_REG_BLOCK_SIZE); 1704 MPSC_ROUTING_REG_BLOCK_SIZE);
1795 mpsc_resource_err("SDMA intr base"); 1705 mpsc_resource_err("SDMA intr base");
1796 return -ENOMEM; 1706 return -ENOMEM;
1797 } 1707 }
@@ -1799,18 +1709,17 @@ mpsc_shared_map_regs(struct platform_device *pd)
1799 return 0; 1709 return 0;
1800} 1710}
1801 1711
1802static void 1712static void mpsc_shared_unmap_regs(void)
1803mpsc_shared_unmap_regs(void)
1804{ 1713{
1805 if (!mpsc_shared_regs.mpsc_routing_base) { 1714 if (!mpsc_shared_regs.mpsc_routing_base) {
1806 iounmap(mpsc_shared_regs.mpsc_routing_base); 1715 iounmap(mpsc_shared_regs.mpsc_routing_base);
1807 release_mem_region(mpsc_shared_regs.mpsc_routing_base_p, 1716 release_mem_region(mpsc_shared_regs.mpsc_routing_base_p,
1808 MPSC_ROUTING_REG_BLOCK_SIZE); 1717 MPSC_ROUTING_REG_BLOCK_SIZE);
1809 } 1718 }
1810 if (!mpsc_shared_regs.sdma_intr_base) { 1719 if (!mpsc_shared_regs.sdma_intr_base) {
1811 iounmap(mpsc_shared_regs.sdma_intr_base); 1720 iounmap(mpsc_shared_regs.sdma_intr_base);
1812 release_mem_region(mpsc_shared_regs.sdma_intr_base_p, 1721 release_mem_region(mpsc_shared_regs.sdma_intr_base_p,
1813 MPSC_SDMA_INTR_REG_BLOCK_SIZE); 1722 MPSC_SDMA_INTR_REG_BLOCK_SIZE);
1814 } 1723 }
1815 1724
1816 mpsc_shared_regs.mpsc_routing_base = NULL; 1725 mpsc_shared_regs.mpsc_routing_base = NULL;
@@ -1818,19 +1727,17 @@ mpsc_shared_unmap_regs(void)
1818 1727
1819 mpsc_shared_regs.mpsc_routing_base_p = 0; 1728 mpsc_shared_regs.mpsc_routing_base_p = 0;
1820 mpsc_shared_regs.sdma_intr_base_p = 0; 1729 mpsc_shared_regs.sdma_intr_base_p = 0;
1821
1822 return;
1823} 1730}
1824 1731
1825static int 1732static int mpsc_shared_drv_probe(struct platform_device *dev)
1826mpsc_shared_drv_probe(struct platform_device *dev)
1827{ 1733{
1828 struct mpsc_shared_pdata *pdata; 1734 struct mpsc_shared_pdata *pdata;
1829 int rc = -ENODEV; 1735 int rc = -ENODEV;
1830 1736
1831 if (dev->id == 0) { 1737 if (dev->id == 0) {
1832 if (!(rc = mpsc_shared_map_regs(dev))) { 1738 if (!(rc = mpsc_shared_map_regs(dev))) {
1833 pdata = (struct mpsc_shared_pdata *)dev->dev.platform_data; 1739 pdata = (struct mpsc_shared_pdata *)
1740 dev->dev.platform_data;
1834 1741
1835 mpsc_shared_regs.MPSC_MRR_m = pdata->mrr_val; 1742 mpsc_shared_regs.MPSC_MRR_m = pdata->mrr_val;
1836 mpsc_shared_regs.MPSC_RCRR_m= pdata->rcrr_val; 1743 mpsc_shared_regs.MPSC_RCRR_m= pdata->rcrr_val;
@@ -1847,8 +1754,7 @@ mpsc_shared_drv_probe(struct platform_device *dev)
1847 return rc; 1754 return rc;
1848} 1755}
1849 1756
1850static int 1757static int mpsc_shared_drv_remove(struct platform_device *dev)
1851mpsc_shared_drv_remove(struct platform_device *dev)
1852{ 1758{
1853 int rc = -ENODEV; 1759 int rc = -ENODEV;
1854 1760
@@ -1869,7 +1775,7 @@ static struct platform_driver mpsc_shared_driver = {
1869 .probe = mpsc_shared_drv_probe, 1775 .probe = mpsc_shared_drv_probe,
1870 .remove = mpsc_shared_drv_remove, 1776 .remove = mpsc_shared_drv_remove,
1871 .driver = { 1777 .driver = {
1872 .name = MPSC_SHARED_NAME, 1778 .name = MPSC_SHARED_NAME,
1873 }, 1779 },
1874}; 1780};
1875 1781
@@ -1881,55 +1787,51 @@ static struct platform_driver mpsc_shared_driver = {
1881 ****************************************************************************** 1787 ******************************************************************************
1882 */ 1788 */
1883static struct uart_driver mpsc_reg = { 1789static struct uart_driver mpsc_reg = {
1884 .owner = THIS_MODULE, 1790 .owner = THIS_MODULE,
1885 .driver_name = MPSC_DRIVER_NAME, 1791 .driver_name = MPSC_DRIVER_NAME,
1886 .dev_name = MPSC_DEV_NAME, 1792 .dev_name = MPSC_DEV_NAME,
1887 .major = MPSC_MAJOR, 1793 .major = MPSC_MAJOR,
1888 .minor = MPSC_MINOR_START, 1794 .minor = MPSC_MINOR_START,
1889 .nr = MPSC_NUM_CTLRS, 1795 .nr = MPSC_NUM_CTLRS,
1890 .cons = MPSC_CONSOLE, 1796 .cons = MPSC_CONSOLE,
1891}; 1797};
1892 1798
1893static int 1799static int mpsc_drv_map_regs(struct mpsc_port_info *pi,
1894mpsc_drv_map_regs(struct mpsc_port_info *pi, struct platform_device *pd) 1800 struct platform_device *pd)
1895{ 1801{
1896 struct resource *r; 1802 struct resource *r;
1897 1803
1898 if ((r = platform_get_resource(pd, IORESOURCE_MEM, MPSC_BASE_ORDER)) && 1804 if ((r = platform_get_resource(pd, IORESOURCE_MEM, MPSC_BASE_ORDER))
1899 request_mem_region(r->start, MPSC_REG_BLOCK_SIZE, "mpsc_regs")){ 1805 && request_mem_region(r->start, MPSC_REG_BLOCK_SIZE,
1900 1806 "mpsc_regs")) {
1901 pi->mpsc_base = ioremap(r->start, MPSC_REG_BLOCK_SIZE); 1807 pi->mpsc_base = ioremap(r->start, MPSC_REG_BLOCK_SIZE);
1902 pi->mpsc_base_p = r->start; 1808 pi->mpsc_base_p = r->start;
1903 } 1809 } else {
1904 else {
1905 mpsc_resource_err("MPSC base"); 1810 mpsc_resource_err("MPSC base");
1906 return -ENOMEM; 1811 goto err;
1907 } 1812 }
1908 1813
1909 if ((r = platform_get_resource(pd, IORESOURCE_MEM, 1814 if ((r = platform_get_resource(pd, IORESOURCE_MEM,
1910 MPSC_SDMA_BASE_ORDER)) && request_mem_region(r->start, 1815 MPSC_SDMA_BASE_ORDER))
1911 MPSC_SDMA_REG_BLOCK_SIZE, "sdma_regs")) { 1816 && request_mem_region(r->start,
1912 1817 MPSC_SDMA_REG_BLOCK_SIZE, "sdma_regs")) {
1913 pi->sdma_base = ioremap(r->start,MPSC_SDMA_REG_BLOCK_SIZE); 1818 pi->sdma_base = ioremap(r->start,MPSC_SDMA_REG_BLOCK_SIZE);
1914 pi->sdma_base_p = r->start; 1819 pi->sdma_base_p = r->start;
1915 } 1820 } else {
1916 else {
1917 mpsc_resource_err("SDMA base"); 1821 mpsc_resource_err("SDMA base");
1918 if (pi->mpsc_base) { 1822 if (pi->mpsc_base) {
1919 iounmap(pi->mpsc_base); 1823 iounmap(pi->mpsc_base);
1920 pi->mpsc_base = NULL; 1824 pi->mpsc_base = NULL;
1921 } 1825 }
1922 return -ENOMEM; 1826 goto err;
1923 } 1827 }
1924 1828
1925 if ((r = platform_get_resource(pd,IORESOURCE_MEM,MPSC_BRG_BASE_ORDER)) 1829 if ((r = platform_get_resource(pd,IORESOURCE_MEM,MPSC_BRG_BASE_ORDER))
1926 && request_mem_region(r->start, MPSC_BRG_REG_BLOCK_SIZE, 1830 && request_mem_region(r->start,
1927 "brg_regs")) { 1831 MPSC_BRG_REG_BLOCK_SIZE, "brg_regs")) {
1928
1929 pi->brg_base = ioremap(r->start, MPSC_BRG_REG_BLOCK_SIZE); 1832 pi->brg_base = ioremap(r->start, MPSC_BRG_REG_BLOCK_SIZE);
1930 pi->brg_base_p = r->start; 1833 pi->brg_base_p = r->start;
1931 } 1834 } else {
1932 else {
1933 mpsc_resource_err("BRG base"); 1835 mpsc_resource_err("BRG base");
1934 if (pi->mpsc_base) { 1836 if (pi->mpsc_base) {
1935 iounmap(pi->mpsc_base); 1837 iounmap(pi->mpsc_base);
@@ -1939,14 +1841,15 @@ mpsc_drv_map_regs(struct mpsc_port_info *pi, struct platform_device *pd)
1939 iounmap(pi->sdma_base); 1841 iounmap(pi->sdma_base);
1940 pi->sdma_base = NULL; 1842 pi->sdma_base = NULL;
1941 } 1843 }
1942 return -ENOMEM; 1844 goto err;
1943 } 1845 }
1944
1945 return 0; 1846 return 0;
1847
1848err:
1849 return -ENOMEM;
1946} 1850}
1947 1851
1948static void 1852static void mpsc_drv_unmap_regs(struct mpsc_port_info *pi)
1949mpsc_drv_unmap_regs(struct mpsc_port_info *pi)
1950{ 1853{
1951 if (!pi->mpsc_base) { 1854 if (!pi->mpsc_base) {
1952 iounmap(pi->mpsc_base); 1855 iounmap(pi->mpsc_base);
@@ -1968,13 +1871,10 @@ mpsc_drv_unmap_regs(struct mpsc_port_info *pi)
1968 pi->mpsc_base_p = 0; 1871 pi->mpsc_base_p = 0;
1969 pi->sdma_base_p = 0; 1872 pi->sdma_base_p = 0;
1970 pi->brg_base_p = 0; 1873 pi->brg_base_p = 0;
1971
1972 return;
1973} 1874}
1974 1875
1975static void 1876static void mpsc_drv_get_platform_data(struct mpsc_port_info *pi,
1976mpsc_drv_get_platform_data(struct mpsc_port_info *pi, 1877 struct platform_device *pd, int num)
1977 struct platform_device *pd, int num)
1978{ 1878{
1979 struct mpsc_pdata *pdata; 1879 struct mpsc_pdata *pdata;
1980 1880
@@ -2009,12 +1909,9 @@ mpsc_drv_get_platform_data(struct mpsc_port_info *pi,
2009 pi->shared_regs = &mpsc_shared_regs; 1909 pi->shared_regs = &mpsc_shared_regs;
2010 1910
2011 pi->port.irq = platform_get_irq(pd, 0); 1911 pi->port.irq = platform_get_irq(pd, 0);
2012
2013 return;
2014} 1912}
2015 1913
2016static int 1914static int mpsc_drv_probe(struct platform_device *dev)
2017mpsc_drv_probe(struct platform_device *dev)
2018{ 1915{
2019 struct mpsc_port_info *pi; 1916 struct mpsc_port_info *pi;
2020 int rc = -ENODEV; 1917 int rc = -ENODEV;
@@ -2030,47 +1927,46 @@ mpsc_drv_probe(struct platform_device *dev)
2030 if (!(rc = mpsc_make_ready(pi))) { 1927 if (!(rc = mpsc_make_ready(pi))) {
2031 spin_lock_init(&pi->tx_lock); 1928 spin_lock_init(&pi->tx_lock);
2032 if (!(rc = uart_add_one_port(&mpsc_reg, 1929 if (!(rc = uart_add_one_port(&mpsc_reg,
2033 &pi->port))) 1930 &pi->port))) {
2034 rc = 0; 1931 rc = 0;
2035 else { 1932 } else {
2036 mpsc_release_port( 1933 mpsc_release_port((struct uart_port *)
2037 (struct uart_port *)pi); 1934 pi);
2038 mpsc_drv_unmap_regs(pi); 1935 mpsc_drv_unmap_regs(pi);
2039 } 1936 }
2040 } 1937 } else {
2041 else
2042 mpsc_drv_unmap_regs(pi); 1938 mpsc_drv_unmap_regs(pi);
1939 }
2043 } 1940 }
2044 } 1941 }
2045 1942
2046 return rc; 1943 return rc;
2047} 1944}
2048 1945
2049static int 1946static int mpsc_drv_remove(struct platform_device *dev)
2050mpsc_drv_remove(struct platform_device *dev)
2051{ 1947{
2052 pr_debug("mpsc_drv_exit: Removing MPSC %d\n", dev->id); 1948 pr_debug("mpsc_drv_exit: Removing MPSC %d\n", dev->id);
2053 1949
2054 if (dev->id < MPSC_NUM_CTLRS) { 1950 if (dev->id < MPSC_NUM_CTLRS) {
2055 uart_remove_one_port(&mpsc_reg, &mpsc_ports[dev->id].port); 1951 uart_remove_one_port(&mpsc_reg, &mpsc_ports[dev->id].port);
2056 mpsc_release_port((struct uart_port *)&mpsc_ports[dev->id].port); 1952 mpsc_release_port((struct uart_port *)
1953 &mpsc_ports[dev->id].port);
2057 mpsc_drv_unmap_regs(&mpsc_ports[dev->id]); 1954 mpsc_drv_unmap_regs(&mpsc_ports[dev->id]);
2058 return 0; 1955 return 0;
2059 } 1956 } else {
2060 else
2061 return -ENODEV; 1957 return -ENODEV;
1958 }
2062} 1959}
2063 1960
2064static struct platform_driver mpsc_driver = { 1961static struct platform_driver mpsc_driver = {
2065 .probe = mpsc_drv_probe, 1962 .probe = mpsc_drv_probe,
2066 .remove = mpsc_drv_remove, 1963 .remove = mpsc_drv_remove,
2067 .driver = { 1964 .driver = {
2068 .name = MPSC_CTLR_NAME, 1965 .name = MPSC_CTLR_NAME,
2069 }, 1966 },
2070}; 1967};
2071 1968
2072static int __init 1969static int __init mpsc_drv_init(void)
2073mpsc_drv_init(void)
2074{ 1970{
2075 int rc; 1971 int rc;
2076 1972
@@ -2085,24 +1981,21 @@ mpsc_drv_init(void)
2085 platform_driver_unregister(&mpsc_shared_driver); 1981 platform_driver_unregister(&mpsc_shared_driver);
2086 uart_unregister_driver(&mpsc_reg); 1982 uart_unregister_driver(&mpsc_reg);
2087 } 1983 }
2088 } 1984 } else {
2089 else
2090 uart_unregister_driver(&mpsc_reg); 1985 uart_unregister_driver(&mpsc_reg);
1986 }
2091 } 1987 }
2092 1988
2093 return rc; 1989 return rc;
2094
2095} 1990}
2096 1991
2097static void __exit 1992static void __exit mpsc_drv_exit(void)
2098mpsc_drv_exit(void)
2099{ 1993{
2100 platform_driver_unregister(&mpsc_driver); 1994 platform_driver_unregister(&mpsc_driver);
2101 platform_driver_unregister(&mpsc_shared_driver); 1995 platform_driver_unregister(&mpsc_shared_driver);
2102 uart_unregister_driver(&mpsc_reg); 1996 uart_unregister_driver(&mpsc_reg);
2103 memset(mpsc_ports, 0, sizeof(mpsc_ports)); 1997 memset(mpsc_ports, 0, sizeof(mpsc_ports));
2104 memset(&mpsc_shared_regs, 0, sizeof(mpsc_shared_regs)); 1998 memset(&mpsc_shared_regs, 0, sizeof(mpsc_shared_regs));
2105 return;
2106} 1999}
2107 2000
2108module_init(mpsc_drv_init); 2001module_init(mpsc_drv_init);
diff --git a/drivers/serial/sb1250-duart.c b/drivers/serial/sb1250-duart.c
index 1d9d7285172a..201253755011 100644
--- a/drivers/serial/sb1250-duart.c
+++ b/drivers/serial/sb1250-duart.c
@@ -25,6 +25,7 @@
25#define SUPPORT_SYSRQ 25#define SUPPORT_SYSRQ
26#endif 26#endif
27 27
28#include <linux/compiler.h>
28#include <linux/console.h> 29#include <linux/console.h>
29#include <linux/delay.h> 30#include <linux/delay.h>
30#include <linux/errno.h> 31#include <linux/errno.h>
@@ -103,8 +104,6 @@ struct sbd_duart {
103 104
104static struct sbd_duart sbd_duarts[DUART_MAX_CHIP]; 105static struct sbd_duart sbd_duarts[DUART_MAX_CHIP];
105 106
106#define __unused __attribute__((__unused__))
107
108 107
109/* 108/*
110 * Reading and writing SB1250 DUART registers. 109 * Reading and writing SB1250 DUART registers.
@@ -204,12 +203,12 @@ static int sbd_receive_drain(struct sbd_port *sport)
204 return loops; 203 return loops;
205} 204}
206 205
207static int __unused sbd_transmit_ready(struct sbd_port *sport) 206static int __maybe_unused sbd_transmit_ready(struct sbd_port *sport)
208{ 207{
209 return read_sbdchn(sport, R_DUART_STATUS) & M_DUART_TX_RDY; 208 return read_sbdchn(sport, R_DUART_STATUS) & M_DUART_TX_RDY;
210} 209}
211 210
212static int __unused sbd_transmit_drain(struct sbd_port *sport) 211static int __maybe_unused sbd_transmit_drain(struct sbd_port *sport)
213{ 212{
214 int loops = 10000; 213 int loops = 10000;
215 214
@@ -664,7 +663,7 @@ static void sbd_release_port(struct uart_port *uport)
664 663
665static int sbd_map_port(struct uart_port *uport) 664static int sbd_map_port(struct uart_port *uport)
666{ 665{
667 static const char *err = KERN_ERR "sbd: Cannot map MMIO\n"; 666 const char *err = KERN_ERR "sbd: Cannot map MMIO\n";
668 struct sbd_port *sport = to_sport(uport); 667 struct sbd_port *sport = to_sport(uport);
669 struct sbd_duart *duart = sport->duart; 668 struct sbd_duart *duart = sport->duart;
670 669
@@ -691,8 +690,7 @@ static int sbd_map_port(struct uart_port *uport)
691 690
692static int sbd_request_port(struct uart_port *uport) 691static int sbd_request_port(struct uart_port *uport)
693{ 692{
694 static const char *err = KERN_ERR 693 const char *err = KERN_ERR "sbd: Unable to reserve MMIO resource\n";
695 "sbd: Unable to reserve MMIO resource\n";
696 struct sbd_duart *duart = to_sport(uport)->duart; 694 struct sbd_duart *duart = to_sport(uport)->duart;
697 int map_guard; 695 int map_guard;
698 int ret = 0; 696 int ret = 0;
@@ -755,7 +753,7 @@ static int sbd_verify_port(struct uart_port *uport, struct serial_struct *ser)
755} 753}
756 754
757 755
758static struct uart_ops sbd_ops = { 756static const struct uart_ops sbd_ops = {
759 .tx_empty = sbd_tx_empty, 757 .tx_empty = sbd_tx_empty,
760 .set_mctrl = sbd_set_mctrl, 758 .set_mctrl = sbd_set_mctrl,
761 .get_mctrl = sbd_get_mctrl, 759 .get_mctrl = sbd_get_mctrl,
diff --git a/drivers/serial/serial_txx9.c b/drivers/serial/serial_txx9.c
index 1deb5764326d..b8f91e018b21 100644
--- a/drivers/serial/serial_txx9.c
+++ b/drivers/serial/serial_txx9.c
@@ -1043,8 +1043,9 @@ static int __devinit serial_txx9_probe(struct platform_device *dev)
1043 ret = serial_txx9_register_port(&port); 1043 ret = serial_txx9_register_port(&port);
1044 if (ret < 0) { 1044 if (ret < 0) {
1045 dev_err(&dev->dev, "unable to register port at index %d " 1045 dev_err(&dev->dev, "unable to register port at index %d "
1046 "(IO%x MEM%lx IRQ%d): %d\n", i, 1046 "(IO%x MEM%llx IRQ%d): %d\n", i,
1047 p->iobase, p->mapbase, p->irq, ret); 1047 p->iobase, (unsigned long long)p->mapbase,
1048 p->irq, ret);
1048 } 1049 }
1049 } 1050 }
1050 return 0; 1051 return 0;
diff --git a/drivers/serial/vr41xx_siu.c b/drivers/serial/vr41xx_siu.c
index 85309acb75f6..6fd51b0022ca 100644
--- a/drivers/serial/vr41xx_siu.c
+++ b/drivers/serial/vr41xx_siu.c
@@ -65,7 +65,9 @@ static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = {
65 }, 65 },
66}; 66};
67 67
68#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
68static uint8_t lsr_break_flag[SIU_PORTS_MAX]; 69static uint8_t lsr_break_flag[SIU_PORTS_MAX];
70#endif
69 71
70#define siu_read(port, offset) readb((port)->membase + (offset)) 72#define siu_read(port, offset) readb((port)->membase + (offset))
71#define siu_write(port, offset, value) writeb((value), (port)->membase + (offset)) 73#define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
@@ -782,7 +784,7 @@ static void siu_console_write(struct console *con, const char *s, unsigned count
782 siu_write(port, UART_IER, ier); 784 siu_write(port, UART_IER, ier);
783} 785}
784 786
785static int siu_console_setup(struct console *con, char *options) 787static int __init siu_console_setup(struct console *con, char *options)
786{ 788{
787 struct uart_port *port; 789 struct uart_port *port;
788 int baud = 9600; 790 int baud = 9600;
@@ -800,7 +802,8 @@ static int siu_console_setup(struct console *con, char *options)
800 port->membase = ioremap(port->mapbase, siu_port_size(port)); 802 port->membase = ioremap(port->mapbase, siu_port_size(port));
801 } 803 }
802 804
803 vr41xx_select_siu_interface(SIU_INTERFACE_RS232C); 805 if (port->type == PORT_VR41XX_SIU)
806 vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
804 807
805 if (options != NULL) 808 if (options != NULL)
806 uart_parse_options(options, &baud, &parity, &bits, &flow); 809 uart_parse_options(options, &baud, &parity, &bits, &flow);
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index b05de30b5d9b..e84d21597943 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -200,6 +200,8 @@ static DEFINE_MUTEX(board_lock);
200 * platforms may not be able to use spi_register_board_info though, and 200 * platforms may not be able to use spi_register_board_info though, and
201 * this is exported so that for example a USB or parport based adapter 201 * this is exported so that for example a USB or parport based adapter
202 * driver could add devices (which it would learn about out-of-band). 202 * driver could add devices (which it would learn about out-of-band).
203 *
204 * Returns the new device, or NULL.
203 */ 205 */
204struct spi_device *spi_new_device(struct spi_master *master, 206struct spi_device *spi_new_device(struct spi_master *master,
205 struct spi_board_info *chip) 207 struct spi_board_info *chip)
@@ -208,7 +210,20 @@ struct spi_device *spi_new_device(struct spi_master *master,
208 struct device *dev = master->cdev.dev; 210 struct device *dev = master->cdev.dev;
209 int status; 211 int status;
210 212
211 /* NOTE: caller did any chip->bus_num checks necessary */ 213 /* NOTE: caller did any chip->bus_num checks necessary.
214 *
215 * Also, unless we change the return value convention to use
216 * error-or-pointer (not NULL-or-pointer), troubleshootability
217 * suggests syslogged diagnostics are best here (ugh).
218 */
219
220 /* Chipselects are numbered 0..max; validate. */
221 if (chip->chip_select >= master->num_chipselect) {
222 dev_err(dev, "cs%d > max %d\n",
223 chip->chip_select,
224 master->num_chipselect);
225 return NULL;
226 }
212 227
213 if (!spi_master_get(master)) 228 if (!spi_master_get(master))
214 return NULL; 229 return NULL;
@@ -236,10 +251,10 @@ struct spi_device *spi_new_device(struct spi_master *master,
236 proxy->controller_state = NULL; 251 proxy->controller_state = NULL;
237 proxy->dev.release = spidev_release; 252 proxy->dev.release = spidev_release;
238 253
239 /* drivers may modify this default i/o setup */ 254 /* drivers may modify this initial i/o setup */
240 status = master->setup(proxy); 255 status = master->setup(proxy);
241 if (status < 0) { 256 if (status < 0) {
242 dev_dbg(dev, "can't %s %s, status %d\n", 257 dev_err(dev, "can't %s %s, status %d\n",
243 "setup", proxy->dev.bus_id, status); 258 "setup", proxy->dev.bus_id, status);
244 goto fail; 259 goto fail;
245 } 260 }
@@ -249,7 +264,7 @@ struct spi_device *spi_new_device(struct spi_master *master,
249 */ 264 */
250 status = device_register(&proxy->dev); 265 status = device_register(&proxy->dev);
251 if (status < 0) { 266 if (status < 0) {
252 dev_dbg(dev, "can't %s %s, status %d\n", 267 dev_err(dev, "can't %s %s, status %d\n",
253 "add", proxy->dev.bus_id, status); 268 "add", proxy->dev.bus_id, status);
254 goto fail; 269 goto fail;
255 } 270 }
@@ -306,7 +321,6 @@ spi_register_board_info(struct spi_board_info const *info, unsigned n)
306static void scan_boardinfo(struct spi_master *master) 321static void scan_boardinfo(struct spi_master *master)
307{ 322{
308 struct boardinfo *bi; 323 struct boardinfo *bi;
309 struct device *dev = master->cdev.dev;
310 324
311 mutex_lock(&board_lock); 325 mutex_lock(&board_lock);
312 list_for_each_entry(bi, &board_list, list) { 326 list_for_each_entry(bi, &board_list, list) {
@@ -316,17 +330,9 @@ static void scan_boardinfo(struct spi_master *master)
316 for (n = bi->n_board_info; n > 0; n--, chip++) { 330 for (n = bi->n_board_info; n > 0; n--, chip++) {
317 if (chip->bus_num != master->bus_num) 331 if (chip->bus_num != master->bus_num)
318 continue; 332 continue;
319 /* some controllers only have one chip, so they 333 /* NOTE: this relies on spi_new_device to
320 * might not use chipselects. otherwise, the 334 * issue diagnostics when given bogus inputs
321 * chipselects are numbered 0..max.
322 */ 335 */
323 if (chip->chip_select >= master->num_chipselect
324 && master->num_chipselect) {
325 dev_dbg(dev, "cs%d > max %d\n",
326 chip->chip_select,
327 master->num_chipselect);
328 continue;
329 }
330 (void) spi_new_device(master, chip); 336 (void) spi_new_device(master, chip);
331 } 337 }
332 } 338 }
@@ -419,8 +425,17 @@ int spi_register_master(struct spi_master *master)
419 if (!dev) 425 if (!dev)
420 return -ENODEV; 426 return -ENODEV;
421 427
428 /* even if it's just one always-selected device, there must
429 * be at least one chipselect
430 */
431 if (master->num_chipselect == 0)
432 return -EINVAL;
433
422 /* convention: dynamically assigned bus IDs count down from the max */ 434 /* convention: dynamically assigned bus IDs count down from the max */
423 if (master->bus_num < 0) { 435 if (master->bus_num < 0) {
436 /* FIXME switch to an IDR based scheme, something like
437 * I2C now uses, so we can't run out of "dynamic" IDs
438 */
424 master->bus_num = atomic_dec_return(&dyn_bus_id); 439 master->bus_num = atomic_dec_return(&dyn_bus_id);
425 dynamic = 1; 440 dynamic = 1;
426 } 441 }
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
index 3295cfcc9f20..0c16a2b39b41 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc83xx.c
@@ -39,6 +39,7 @@ struct mpc83xx_spi_reg {
39}; 39};
40 40
41/* SPI Controller mode register definitions */ 41/* SPI Controller mode register definitions */
42#define SPMODE_LOOP (1 << 30)
42#define SPMODE_CI_INACTIVEHIGH (1 << 29) 43#define SPMODE_CI_INACTIVEHIGH (1 << 29)
43#define SPMODE_CP_BEGIN_EDGECLK (1 << 28) 44#define SPMODE_CP_BEGIN_EDGECLK (1 << 28)
44#define SPMODE_DIV16 (1 << 27) 45#define SPMODE_DIV16 (1 << 27)
@@ -153,12 +154,18 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
153 len = len - 1; 154 len = len - 1;
154 155
155 /* mask out bits we are going to set */ 156 /* mask out bits we are going to set */
156 regval &= ~0x38ff0000; 157 regval &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH
158 | SPMODE_LEN(0xF) | SPMODE_DIV16
159 | SPMODE_PM(0xF) | SPMODE_REV | SPMODE_LOOP);
157 160
158 if (spi->mode & SPI_CPHA) 161 if (spi->mode & SPI_CPHA)
159 regval |= SPMODE_CP_BEGIN_EDGECLK; 162 regval |= SPMODE_CP_BEGIN_EDGECLK;
160 if (spi->mode & SPI_CPOL) 163 if (spi->mode & SPI_CPOL)
161 regval |= SPMODE_CI_INACTIVEHIGH; 164 regval |= SPMODE_CI_INACTIVEHIGH;
165 if (!(spi->mode & SPI_LSB_FIRST))
166 regval |= SPMODE_REV;
167 if (spi->mode & SPI_LOOP)
168 regval |= SPMODE_LOOP;
162 169
163 regval |= SPMODE_LEN(len); 170 regval |= SPMODE_LEN(len);
164 171
@@ -176,6 +183,8 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
176 regval |= SPMODE_PM(pm); 183 regval |= SPMODE_PM(pm);
177 } 184 }
178 185
186 /* Turn off SPI unit prior changing mode */
187 mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, 0);
179 mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval); 188 mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval);
180 if (mpc83xx_spi->activate_cs) 189 if (mpc83xx_spi->activate_cs)
181 mpc83xx_spi->activate_cs(spi->chip_select, pol); 190 mpc83xx_spi->activate_cs(spi->chip_select, pol);
@@ -231,6 +240,14 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
231 } else 240 } else
232 return -EINVAL; 241 return -EINVAL;
233 242
243 if (mpc83xx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) {
244 mpc83xx_spi->tx_shift = 0;
245 if (bits_per_word <= 8)
246 mpc83xx_spi->rx_shift = 8;
247 else
248 mpc83xx_spi->rx_shift = 0;
249 }
250
234 /* nsecs = (clock period)/2 */ 251 /* nsecs = (clock period)/2 */
235 if (!hz) 252 if (!hz)
236 hz = spi->max_speed_hz; 253 hz = spi->max_speed_hz;
@@ -245,17 +262,22 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
245 262
246 regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); 263 regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode);
247 264
248 /* Mask out bits_per_wordgth */ 265 /* mask out bits we are going to set */
249 regval &= 0xff0fffff; 266 regval &= ~(SPMODE_LEN(0xF) | SPMODE_REV);
250 regval |= SPMODE_LEN(bits_per_word); 267 regval |= SPMODE_LEN(bits_per_word);
268 if (!(spi->mode & SPI_LSB_FIRST))
269 regval |= SPMODE_REV;
251 270
271 /* Turn off SPI unit prior changing mode */
272 mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, 0);
252 mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval); 273 mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval);
253 274
254 return 0; 275 return 0;
255} 276}
256 277
257/* the spi->mode bits understood by this driver: */ 278/* the spi->mode bits understood by this driver: */
258#define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH) 279#define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \
280 | SPI_LSB_FIRST | SPI_LOOP)
259 281
260static int mpc83xx_spi_setup(struct spi_device *spi) 282static int mpc83xx_spi_setup(struct spi_device *spi)
261{ 283{
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 38b60ad0eda0..630f781aeb19 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -55,9 +55,16 @@
55static unsigned long minors[N_SPI_MINORS / BITS_PER_LONG]; 55static unsigned long minors[N_SPI_MINORS / BITS_PER_LONG];
56 56
57 57
58/* Bit masks for spi_device.mode management */ 58/* Bit masks for spi_device.mode management. Note that incorrect
59#define SPI_MODE_MASK (SPI_CPHA | SPI_CPOL) 59 * settings for CS_HIGH and 3WIRE can cause *lots* of trouble for other
60 60 * devices on a shared bus: CS_HIGH, because this device will be
61 * active when it shouldn't be; 3WIRE, because when active it won't
62 * behave as it should.
63 *
64 * REVISIT should changing those two modes be privileged?
65 */
66#define SPI_MODE_MASK (SPI_CPHA | SPI_CPOL | SPI_CS_HIGH \
67 | SPI_LSB_FIRST | SPI_3WIRE | SPI_LOOP)
61 68
62struct spidev_data { 69struct spidev_data {
63 struct device dev; 70 struct device dev;
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index a7231d171bd5..5216c11d4dec 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1645,18 +1645,6 @@ config FB_MAXINE
1645 DECstation series (Personal DECstation 5000/20, /25, /33, /50, 1645 DECstation series (Personal DECstation 5000/20, /25, /33, /50,
1646 Codename "Maxine"). 1646 Codename "Maxine").
1647 1647
1648config FB_TX3912
1649 bool "TMPTX3912/PR31700 frame buffer support"
1650 depends on (FB = y) && NINO
1651 select FB_CFB_FILLRECT
1652 select FB_CFB_COPYAREA
1653 select FB_CFB_IMAGEBLIT
1654 help
1655 The TX3912 is a Toshiba RISC processor based on the MIPS 3900 core
1656 see <http://www.toshiba.com/taec/components/Generic/risc/tx3912.htm>.
1657
1658 Say Y here to enable kernel support for the on-board framebuffer.
1659
1660config FB_G364 1648config FB_G364
1661 bool "G364 frame buffer support" 1649 bool "G364 frame buffer support"
1662 depends on (FB = y) && (MIPS_MAGNUM_4000 || OLIVETTI_M700) 1650 depends on (FB = y) && (MIPS_MAGNUM_4000 || OLIVETTI_M700)
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 518933d4905f..06eec7b182b7 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -103,7 +103,6 @@ obj-$(CONFIG_FB_PMAG_AA) += pmag-aa-fb.o
103obj-$(CONFIG_FB_PMAG_BA) += pmag-ba-fb.o 103obj-$(CONFIG_FB_PMAG_BA) += pmag-ba-fb.o
104obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o 104obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o
105obj-$(CONFIG_FB_MAXINE) += maxinefb.o 105obj-$(CONFIG_FB_MAXINE) += maxinefb.o
106obj-$(CONFIG_FB_TX3912) += tx3912fb.o
107obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o 106obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o
108obj-$(CONFIG_FB_IMX) += imxfb.o 107obj-$(CONFIG_FB_IMX) += imxfb.o
109obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o 108obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o
diff --git a/drivers/video/acornfb.c b/drivers/video/acornfb.c
index 61a8bf159cb0..eedb8285e32f 100644
--- a/drivers/video/acornfb.c
+++ b/drivers/video/acornfb.c
@@ -138,17 +138,6 @@ static struct pixclock arc_clocks[] = {
138 { 41250, 42083, VIDC_CTRL_DIV1, VID_CTL_24MHz }, /* 24.000MHz */ 138 { 41250, 42083, VIDC_CTRL_DIV1, VID_CTL_24MHz }, /* 24.000MHz */
139}; 139};
140 140
141#ifdef CONFIG_ARCH_A5K
142static struct pixclock a5k_clocks[] = {
143 { 117974, 120357, VIDC_CTRL_DIV3, VID_CTL_25MHz }, /* 8.392MHz */
144 { 78649, 80238, VIDC_CTRL_DIV2, VID_CTL_25MHz }, /* 12.588MHz */
145 { 58987, 60178, VIDC_CTRL_DIV1_5, VID_CTL_25MHz }, /* 16.588MHz */
146 { 55000, 56111, VIDC_CTRL_DIV2, VID_CTL_36MHz }, /* 18.000MHz */
147 { 39325, 40119, VIDC_CTRL_DIV1, VID_CTL_25MHz }, /* 25.175MHz */
148 { 27500, 28055, VIDC_CTRL_DIV1, VID_CTL_36MHz }, /* 36.000MHz */
149};
150#endif
151
152static struct pixclock * 141static struct pixclock *
153acornfb_valid_pixrate(struct fb_var_screeninfo *var) 142acornfb_valid_pixrate(struct fb_var_screeninfo *var)
154{ 143{
@@ -163,15 +152,6 @@ acornfb_valid_pixrate(struct fb_var_screeninfo *var)
163 pixclock < arc_clocks[i].max_clock) 152 pixclock < arc_clocks[i].max_clock)
164 return arc_clocks + i; 153 return arc_clocks + i;
165 154
166#ifdef CONFIG_ARCH_A5K
167 if (machine_is_a5k()) {
168 for (i = 0; i < ARRAY_SIZE(a5k_clocks); i++)
169 if (pixclock > a5k_clocks[i].min_clock &&
170 pixclock < a5k_clocks[i].max_clock)
171 return a5k_clocks + i;
172 }
173#endif
174
175 return NULL; 155 return NULL;
176} 156}
177 157
diff --git a/drivers/video/cg6.c b/drivers/video/cg6.c
index 87c747123538..ee9046db9c7d 100644
--- a/drivers/video/cg6.c
+++ b/drivers/video/cg6.c
@@ -677,6 +677,7 @@ static int __devinit cg6_probe(struct of_device *op, const struct of_device_id *
677 struct fb_info *info; 677 struct fb_info *info;
678 struct cg6_par *par; 678 struct cg6_par *par;
679 int linebytes, err; 679 int linebytes, err;
680 int dblbuf;
680 681
681 info = framebuffer_alloc(sizeof(struct cg6_par), &op->dev); 682 info = framebuffer_alloc(sizeof(struct cg6_par), &op->dev);
682 683
@@ -698,7 +699,9 @@ static int __devinit cg6_probe(struct of_device *op, const struct of_device_id *
698 linebytes = of_getintprop_default(dp, "linebytes", 699 linebytes = of_getintprop_default(dp, "linebytes",
699 info->var.xres); 700 info->var.xres);
700 par->fbsize = PAGE_ALIGN(linebytes * info->var.yres); 701 par->fbsize = PAGE_ALIGN(linebytes * info->var.yres);
701 if (of_find_property(dp, "dblbuf", NULL)) 702
703 dblbuf = of_getintprop_default(dp, "dblbuf", 0);
704 if (dblbuf)
702 par->fbsize *= 4; 705 par->fbsize *= 4;
703 706
704 par->fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET, 707 par->fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET,
diff --git a/drivers/video/console/fonts.c b/drivers/video/console/fonts.c
index a6828d0a4c56..96979c377518 100644
--- a/drivers/video/console/fonts.c
+++ b/drivers/video/console/fonts.c
@@ -133,8 +133,8 @@ const struct font_desc *get_default_font(int xres, int yres, u32 font_w,
133 if ((yres < 400) == (f->height <= 8)) 133 if ((yres < 400) == (f->height <= 8))
134 c += 1000; 134 c += 1000;
135 135
136 if (!(font_w & (1 << (f->width - 1))) || 136 if ((font_w & (1 << (f->width - 1))) &&
137 !(font_w & (1 << (f->height - 1)))) 137 (font_h & (1 << (f->height - 1))))
138 c += 1000; 138 c += 1000;
139 139
140 if (c > cc) { 140 if (c > cc) {
diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c
index 215ac579f901..074027204702 100644
--- a/drivers/video/fbmem.c
+++ b/drivers/video/fbmem.c
@@ -244,8 +244,17 @@ static void fb_set_logo(struct fb_info *info,
244 u8 xor = (info->fix.visual == FB_VISUAL_MONO01) ? 0xff : 0; 244 u8 xor = (info->fix.visual == FB_VISUAL_MONO01) ? 0xff : 0;
245 u8 fg = 1, d; 245 u8 fg = 1, d;
246 246
247 if (fb_get_color_depth(&info->var, &info->fix) == 3) 247 switch (fb_get_color_depth(&info->var, &info->fix)) {
248 case 1:
249 fg = 1;
250 break;
251 case 2:
252 fg = 3;
253 break;
254 default:
248 fg = 7; 255 fg = 7;
256 break;
257 }
249 258
250 if (info->fix.visual == FB_VISUAL_MONO01 || 259 if (info->fix.visual == FB_VISUAL_MONO01 ||
251 info->fix.visual == FB_VISUAL_MONO10) 260 info->fix.visual == FB_VISUAL_MONO10)
@@ -564,21 +573,6 @@ int fb_prepare_logo(struct fb_info *info, int rotate)
564 depth = 4; 573 depth = 4;
565 } 574 }
566 575
567 if (depth >= 8) {
568 switch (info->fix.visual) {
569 case FB_VISUAL_TRUECOLOR:
570 fb_logo.needs_truepalette = 1;
571 break;
572 case FB_VISUAL_DIRECTCOLOR:
573 fb_logo.needs_directpalette = 1;
574 fb_logo.needs_cmapreset = 1;
575 break;
576 case FB_VISUAL_PSEUDOCOLOR:
577 fb_logo.needs_cmapreset = 1;
578 break;
579 }
580 }
581
582 /* Return if no suitable logo was found */ 576 /* Return if no suitable logo was found */
583 fb_logo.logo = fb_find_logo(depth); 577 fb_logo.logo = fb_find_logo(depth);
584 578
@@ -604,6 +598,22 @@ int fb_prepare_logo(struct fb_info *info, int rotate)
604 else 598 else
605 fb_logo.depth = 1; 599 fb_logo.depth = 1;
606 600
601
602 if (fb_logo.depth > 4 && depth > 4) {
603 switch (info->fix.visual) {
604 case FB_VISUAL_TRUECOLOR:
605 fb_logo.needs_truepalette = 1;
606 break;
607 case FB_VISUAL_DIRECTCOLOR:
608 fb_logo.needs_directpalette = 1;
609 fb_logo.needs_cmapreset = 1;
610 break;
611 case FB_VISUAL_PSEUDOCOLOR:
612 fb_logo.needs_cmapreset = 1;
613 break;
614 }
615 }
616
607 return fb_prepare_extra_logos(info, fb_logo.logo->height, yres); 617 return fb_prepare_extra_logos(info, fb_logo.logo->height, yres);
608} 618}
609 619
diff --git a/drivers/video/geode/Kconfig b/drivers/video/geode/Kconfig
index a814b6c2605c..7608429b3943 100644
--- a/drivers/video/geode/Kconfig
+++ b/drivers/video/geode/Kconfig
@@ -8,6 +8,21 @@ config FB_GEODE
8 Say 'Y' here to allow you to select framebuffer drivers for 8 Say 'Y' here to allow you to select framebuffer drivers for
9 the AMD Geode family of processors. 9 the AMD Geode family of processors.
10 10
11config FB_GEODE_LX
12 tristate "AMD Geode LX framebuffer support (EXPERIMENTAL)"
13 depends on FB && FB_GEODE
14 select FB_CFB_FILLRECT
15 select FB_CFB_COPYAREA
16 select FB_CFB_IMAGEBLIT
17 ---help---
18 Framebuffer driver for the display controller integrated into the
19 AMD Geode LX processors.
20
21 To compile this driver as a module, choose M here: the module will
22 be called lxfb.
23
24 If unsure, say N.
25
11config FB_GEODE_GX 26config FB_GEODE_GX
12 tristate "AMD Geode GX framebuffer support (EXPERIMENTAL)" 27 tristate "AMD Geode GX framebuffer support (EXPERIMENTAL)"
13 depends on FB && FB_GEODE && EXPERIMENTAL 28 depends on FB && FB_GEODE && EXPERIMENTAL
diff --git a/drivers/video/geode/Makefile b/drivers/video/geode/Makefile
index f896565bc312..957304b45fba 100644
--- a/drivers/video/geode/Makefile
+++ b/drivers/video/geode/Makefile
@@ -2,6 +2,8 @@
2 2
3obj-$(CONFIG_FB_GEODE_GX1) += gx1fb.o 3obj-$(CONFIG_FB_GEODE_GX1) += gx1fb.o
4obj-$(CONFIG_FB_GEODE_GX) += gxfb.o 4obj-$(CONFIG_FB_GEODE_GX) += gxfb.o
5obj-$(CONFIG_FB_GEODE_LX) += lxfb.o
5 6
6gx1fb-objs := gx1fb_core.o display_gx1.o video_cs5530.o 7gx1fb-objs := gx1fb_core.o display_gx1.o video_cs5530.o
7gxfb-objs := gxfb_core.o display_gx.o video_gx.o 8gxfb-objs := gxfb_core.o display_gx.o video_gx.o
9lxfb-objs := lxfb_core.o lxfb_ops.o
diff --git a/drivers/video/geode/lxfb.h b/drivers/video/geode/lxfb.h
new file mode 100644
index 000000000000..6c227f9592a5
--- /dev/null
+++ b/drivers/video/geode/lxfb.h
@@ -0,0 +1,199 @@
1#ifndef _LXFB_H_
2#define _LXFB_H_
3
4#include <linux/fb.h>
5
6#define OUTPUT_CRT 0x01
7#define OUTPUT_PANEL 0x02
8
9struct lxfb_par {
10 int output;
11 int panel_width;
12 int panel_height;
13
14 void __iomem *gp_regs;
15 void __iomem *dc_regs;
16 void __iomem *df_regs;
17};
18
19static inline unsigned int lx_get_pitch(unsigned int xres, int bpp)
20{
21 return (((xres * (bpp >> 3)) + 7) & ~7);
22}
23
24void lx_set_mode(struct fb_info *);
25void lx_get_gamma(struct fb_info *, unsigned int *, int);
26void lx_set_gamma(struct fb_info *, unsigned int *, int);
27unsigned int lx_framebuffer_size(void);
28int lx_blank_display(struct fb_info *, int);
29void lx_set_palette_reg(struct fb_info *, unsigned int, unsigned int,
30 unsigned int, unsigned int);
31
32/* MSRS */
33
34#define MSR_LX_GLD_CONFIG 0x48002001
35#define MSR_LX_GLCP_DOTPLL 0x4c000015
36#define MSR_LX_DF_PADSEL 0x48000011
37#define MSR_LX_DC_SPARE 0x80000011
38#define MSR_LX_DF_GLCONFIG 0x48002001
39
40#define MSR_LX_GLIU0_P2D_RO0 0x10000029
41
42#define GLCP_DOTPLL_RESET (1 << 0)
43#define GLCP_DOTPLL_BYPASS (1 << 15)
44#define GLCP_DOTPLL_HALFPIX (1 << 24)
45#define GLCP_DOTPLL_LOCK (1 << 25)
46
47#define DF_CONFIG_OUTPUT_MASK 0x38
48#define DF_OUTPUT_PANEL 0x08
49#define DF_OUTPUT_CRT 0x00
50#define DF_SIMULTANEOUS_CRT_AND_FP (1 << 15)
51
52#define DF_DEFAULT_TFT_PAD_SEL_LOW 0xDFFFFFFF
53#define DF_DEFAULT_TFT_PAD_SEL_HIGH 0x0000003F
54
55#define DC_SPARE_DISABLE_CFIFO_HGO 0x00000800
56#define DC_SPARE_VFIFO_ARB_SELECT 0x00000400
57#define DC_SPARE_WM_LPEN_OVRD 0x00000200
58#define DC_SPARE_LOAD_WM_LPEN_MASK 0x00000100
59#define DC_SPARE_DISABLE_INIT_VID_PRI 0x00000080
60#define DC_SPARE_DISABLE_VFIFO_WM 0x00000040
61#define DC_SPARE_DISABLE_CWD_CHECK 0x00000020
62#define DC_SPARE_PIX8_PAN_FIX 0x00000010
63#define DC_SPARE_FIRST_REQ_MASK 0x00000002
64
65/* Registers */
66
67#define DC_UNLOCK 0x00
68#define DC_UNLOCK_CODE 0x4758
69
70#define DC_GENERAL_CFG 0x04
71#define DC_GCFG_DFLE (1 << 0)
72#define DC_GCFG_VIDE (1 << 3)
73#define DC_GCFG_VGAE (1 << 7)
74#define DC_GCFG_CMPE (1 << 5)
75#define DC_GCFG_DECE (1 << 6)
76#define DC_GCFG_FDTY (1 << 17)
77
78#define DC_DISPLAY_CFG 0x08
79#define DC_DCFG_TGEN (1 << 0)
80#define DC_DCFG_GDEN (1 << 3)
81#define DC_DCFG_VDEN (1 << 4)
82#define DC_DCFG_TRUP (1 << 6)
83#define DC_DCFG_DCEN (1 << 24)
84#define DC_DCFG_PALB (1 << 25)
85#define DC_DCFG_VISL (1 << 27)
86
87#define DC_DCFG_16BPP 0x0
88
89#define DC_DCFG_DISP_MODE_MASK 0x00000300
90#define DC_DCFG_DISP_MODE_8BPP 0x00000000
91#define DC_DCFG_DISP_MODE_16BPP 0x00000100
92#define DC_DCFG_DISP_MODE_24BPP 0x00000200
93#define DC_DCFG_DISP_MODE_32BPP 0x00000300
94
95
96#define DC_ARB_CFG 0x0C
97
98#define DC_FB_START 0x10
99#define DC_CB_START 0x14
100#define DC_CURSOR_START 0x18
101
102#define DC_DV_TOP 0x2C
103#define DC_DV_TOP_ENABLE (1 << 0)
104
105#define DC_LINE_SIZE 0x30
106#define DC_GRAPHICS_PITCH 0x34
107#define DC_H_ACTIVE_TIMING 0x40
108#define DC_H_BLANK_TIMING 0x44
109#define DC_H_SYNC_TIMING 0x48
110#define DC_V_ACTIVE_TIMING 0x50
111#define DC_V_BLANK_TIMING 0x54
112#define DC_V_SYNC_TIMING 0x58
113#define DC_FB_ACTIVE 0x5C
114
115#define DC_PAL_ADDRESS 0x70
116#define DC_PAL_DATA 0x74
117
118#define DC_PHY_MEM_OFFSET 0x84
119
120#define DC_DV_CTL 0x88
121#define DC_DV_LINE_SIZE_MASK 0x00000C00
122#define DC_DV_LINE_SIZE_1024 0x00000000
123#define DC_DV_LINE_SIZE_2048 0x00000400
124#define DC_DV_LINE_SIZE_4096 0x00000800
125#define DC_DV_LINE_SIZE_8192 0x00000C00
126
127
128#define DC_GFX_SCALE 0x90
129#define DC_IRQ_FILT_CTL 0x94
130
131
132#define DC_IRQ 0xC8
133#define DC_IRQ_MASK (1 << 0)
134#define DC_VSYNC_IRQ_MASK (1 << 1)
135#define DC_IRQ_STATUS (1 << 20)
136#define DC_VSYNC_IRQ_STATUS (1 << 21)
137
138#define DC_GENLCK_CTRL 0xD4
139#define DC_GENLCK_ENABLE (1 << 18)
140#define DC_GC_ALPHA_FLICK_ENABLE (1 << 25)
141#define DC_GC_FLICKER_FILTER_ENABLE (1 << 24)
142#define DC_GC_FLICKER_FILTER_MASK (0x0F << 28)
143
144#define DC_COLOR_KEY 0xB8
145#define DC_CLR_KEY_ENABLE (1 << 24)
146
147
148#define DC3_DV_LINE_SIZE_MASK 0x00000C00
149#define DC3_DV_LINE_SIZE_1024 0x00000000
150#define DC3_DV_LINE_SIZE_2048 0x00000400
151#define DC3_DV_LINE_SIZE_4096 0x00000800
152#define DC3_DV_LINE_SIZE_8192 0x00000C00
153
154#define DF_VIDEO_CFG 0x0
155#define DF_VCFG_VID_EN (1 << 0)
156
157#define DF_DISPLAY_CFG 0x08
158
159#define DF_DCFG_CRT_EN (1 << 0)
160#define DF_DCFG_HSYNC_EN (1 << 1)
161#define DF_DCFG_VSYNC_EN (1 << 2)
162#define DF_DCFG_DAC_BL_EN (1 << 3)
163#define DF_DCFG_CRT_HSYNC_POL (1 << 8)
164#define DF_DCFG_CRT_VSYNC_POL (1 << 9)
165#define DF_DCFG_GV_PAL_BYP (1 << 21)
166
167#define DF_DCFG_CRT_SYNC_SKW_INIT 0x10000
168#define DF_DCFG_CRT_SYNC_SKW_MASK 0x1c000
169
170#define DF_DCFG_PWR_SEQ_DLY_INIT 0x80000
171#define DF_DCFG_PWR_SEQ_DLY_MASK 0xe0000
172
173#define DF_MISC 0x50
174
175#define DF_MISC_GAM_BYPASS (1 << 0)
176#define DF_MISC_DAC_PWRDN (1 << 10)
177#define DF_MISC_A_PWRDN (1 << 11)
178
179#define DF_PAR 0x38
180#define DF_PDR 0x40
181#define DF_ALPHA_CONTROL_1 0xD8
182#define DF_VIDEO_REQUEST 0x120
183
184#define DF_PANEL_TIM1 0x400
185#define DF_DEFAULT_TFT_PMTIM1 0x0
186
187#define DF_PANEL_TIM2 0x408
188#define DF_DEFAULT_TFT_PMTIM2 0x08000000
189
190#define DF_FP_PM 0x410
191#define DF_FP_PM_P (1 << 24)
192
193#define DF_DITHER_CONTROL 0x418
194#define DF_DEFAULT_TFT_DITHCTL 0x00000070
195#define GP_BLT_STATUS 0x44
196#define GP_BS_BLT_BUSY (1 << 0)
197#define GP_BS_CB_EMPTY (1 << 4)
198
199#endif
diff --git a/drivers/video/geode/lxfb_core.c b/drivers/video/geode/lxfb_core.c
new file mode 100644
index 000000000000..5e30b40c8c0f
--- /dev/null
+++ b/drivers/video/geode/lxfb_core.c
@@ -0,0 +1,621 @@
1/*
2 * Geode LX framebuffer driver.
3 *
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
5 * Built from gxfb (which is Copyright (C) 2006 Arcom Control Systems Ltd.)
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/errno.h>
16#include <linux/string.h>
17#include <linux/console.h>
18#include <linux/mm.h>
19#include <linux/slab.h>
20#include <linux/delay.h>
21#include <linux/fb.h>
22#include <linux/init.h>
23#include <linux/pci.h>
24#include <linux/uaccess.h>
25
26#include "lxfb.h"
27
28static char *mode_option;
29static int noclear, nopanel, nocrt;
30static int fbsize;
31
32/* Most of these modes are sorted in ascending order, but
33 * since the first entry in this table is the "default" mode,
34 * we try to make it something sane - 640x480-60 is sane
35 */
36
37const struct fb_videomode geode_modedb[] __initdata = {
38 /* 640x480-60 */
39 { NULL, 60, 640, 480, 39682, 48, 8, 25, 2, 88, 2,
40 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
41 FB_VMODE_NONINTERLACED, 0 },
42 /* 640x400-70 */
43 { NULL, 70, 640, 400, 39770, 40, 8, 28, 5, 96, 2,
44 FB_SYNC_HOR_HIGH_ACT,
45 FB_VMODE_NONINTERLACED, 0 },
46 /* 640x480-70 */
47 { NULL, 70, 640, 480, 35014, 88, 24, 15, 2, 64, 3,
48 0, FB_VMODE_NONINTERLACED, 0 },
49 /* 640x480-72 */
50 { NULL, 72, 640, 480, 32102, 120, 16, 20, 1, 40, 3,
51 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
52 FB_VMODE_NONINTERLACED, 0 },
53 /* 640x480-75 */
54 { NULL, 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3,
55 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
56 FB_VMODE_NONINTERLACED, 0 },
57 /* 640x480-85 */
58 { NULL, 85, 640, 480, 27780, 80, 56, 25, 1, 56, 3,
59 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
60 FB_VMODE_NONINTERLACED, 0 },
61 /* 640x480-90 */
62 { NULL, 90, 640, 480, 26392, 96, 32, 22, 1, 64, 3,
63 0, FB_VMODE_NONINTERLACED, 0 },
64 /* 640x480-100 */
65 { NULL, 100, 640, 480, 23167, 104, 40, 25, 1, 64, 3,
66 0, FB_VMODE_NONINTERLACED, 0 },
67 /* 640x480-60 */
68 { NULL, 60, 640, 480, 39682, 48, 16, 25, 10, 88, 2,
69 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
70 FB_VMODE_NONINTERLACED, 0 },
71 /* 800x600-56 */
72 { NULL, 56, 800, 600, 27901, 128, 24, 22, 1, 72, 2,
73 0, FB_VMODE_NONINTERLACED, 0 },
74 /* 800x600-60 */
75 { NULL, 60, 800, 600, 25131, 72, 32, 23, 1, 136, 4,
76 0, FB_VMODE_NONINTERLACED, 0 },
77 /* 800x600-70 */
78 { NULL, 70, 800, 600, 21873, 120, 40, 21, 4, 80, 3,
79 0, FB_VMODE_NONINTERLACED, 0 },
80 /* 800x600-72 */
81 { NULL, 72, 800, 600, 20052, 64, 56, 23, 37, 120, 6,
82 0, FB_VMODE_NONINTERLACED, 0 },
83 /* 800x600-75 */
84 { NULL, 75, 800, 600, 20202, 160, 16, 21, 1, 80, 3,
85 0, FB_VMODE_NONINTERLACED, 0 },
86 /* 800x600-85 */
87 { NULL, 85, 800, 600, 17790, 152, 32, 27, 1, 64, 3,
88 0, FB_VMODE_NONINTERLACED, 0 },
89 /* 800x600-90 */
90 { NULL, 90, 800, 600, 16648, 128, 40, 28, 1, 88, 3,
91 0, FB_VMODE_NONINTERLACED, 0 },
92 /* 800x600-100 */
93 { NULL, 100, 800, 600, 14667, 136, 48, 27, 1, 88, 3,
94 0, FB_VMODE_NONINTERLACED, 0 },
95 /* 800x600-60 */
96 { NULL, 60, 800, 600, 25131, 88, 40, 23, 1, 128, 4,
97 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
98 FB_VMODE_NONINTERLACED, 0 },
99 /* 1024x768-60 */
100 { NULL, 60, 1024, 768, 15385, 160, 24, 29, 3, 136, 6,
101 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
102 FB_VMODE_NONINTERLACED, 0 },
103 /* 1024x768-70 */
104 { NULL, 70, 1024, 768, 13346, 144, 24, 29, 3, 136, 6,
105 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
106 FB_VMODE_NONINTERLACED, 0 },
107 /* 1024x768-72 */
108 { NULL, 72, 1024, 768, 12702, 168, 56, 29, 4, 112, 3,
109 0, FB_VMODE_NONINTERLACED, 0 },
110 /* 1024x768-75 */
111 { NULL, 75, 1024, 768, 12703, 176, 16, 28, 1, 96, 3,
112 0, FB_VMODE_NONINTERLACED, 0 },
113 /* 1024x768-85 */
114 { NULL, 85, 1024, 768, 10581, 208, 48, 36, 1, 96, 3,
115 0, FB_VMODE_NONINTERLACED, 0 },
116 /* 1024x768-90 */
117 { NULL, 90, 1024, 768, 9981, 176, 64, 37, 1, 112, 3,
118 0, FB_VMODE_NONINTERLACED, 0 },
119 /* 1024x768-100 */
120 { NULL, 100, 1024, 768, 8825, 184, 72, 42, 1, 112, 3,
121 0, FB_VMODE_NONINTERLACED, 0 },
122 /* 1024x768-60 */
123 { NULL, 60, 1024, 768, 15385, 160, 24, 29, 3, 136, 6,
124 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
125 FB_VMODE_NONINTERLACED, 0 },
126 /* 1152x864-60 */
127 { NULL, 60, 1152, 864, 12251, 184, 64, 27, 1, 120, 3,
128 0, FB_VMODE_NONINTERLACED, 0 },
129 /* 1152x864-70 */
130 { NULL, 70, 1152, 864, 10254, 192, 72, 32, 8, 120, 3,
131 0, FB_VMODE_NONINTERLACED, 0 },
132 /* 1152x864-72 */
133 { NULL, 72, 1152, 864, 9866, 200, 72, 33, 7, 128, 3,
134 0, FB_VMODE_NONINTERLACED, 0 },
135 /* 1152x864-75 */
136 { NULL, 75, 1152, 864, 9259, 256, 64, 32, 1, 128, 3,
137 0, FB_VMODE_NONINTERLACED, 0 },
138 /* 1152x864-85 */
139 { NULL, 85, 1152, 864, 8357, 200, 72, 37, 3, 128, 3,
140 0, FB_VMODE_NONINTERLACED, 0 },
141 /* 1152x864-90 */
142 { NULL, 90, 1152, 864, 7719, 208, 80, 42, 9, 128, 3,
143 0, FB_VMODE_NONINTERLACED, 0 },
144 /* 1152x864-100 */
145 { NULL, 100, 1152, 864, 6947, 208, 80, 48, 3, 128, 3,
146 0, FB_VMODE_NONINTERLACED, 0 },
147 /* 1152x864-60 */
148 { NULL, 60, 1152, 864, 12251, 184, 64, 27, 1, 120, 3,
149 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
150 FB_VMODE_NONINTERLACED, 0 },
151 /* 1280x1024-60 */
152 { NULL, 60, 1280, 1024, 9262, 248, 48, 38, 1, 112, 3,
153 0, FB_VMODE_NONINTERLACED, 0 },
154 /* 1280x1024-70 */
155 { NULL, 70, 1280, 1024, 7719, 224, 88, 38, 6, 136, 3,
156 0, FB_VMODE_NONINTERLACED, 0 },
157 /* 1280x1024-72 */
158 { NULL, 72, 1280, 1024, 7490, 224, 88, 39, 7, 136, 3,
159 0, FB_VMODE_NONINTERLACED, 0 },
160 /* 1280x1024-75 */
161 { NULL, 75, 1280, 1024, 7409, 248, 16, 38, 1, 144, 3,
162 0, FB_VMODE_NONINTERLACED, 0 },
163 /* 1280x1024-85 */
164 { NULL, 85, 1280, 1024, 6351, 224, 64, 44, 1, 160, 3,
165 0, FB_VMODE_NONINTERLACED, 0 },
166 /* 1280x1024-90 */
167 { NULL, 90, 1280, 1024, 5791, 240, 96, 51, 12, 144, 3,
168 0, FB_VMODE_NONINTERLACED, 0 },
169 /* 1280x1024-100 */
170 { NULL, 100, 1280, 1024, 5212, 240, 96, 57, 6, 144, 3,
171 0, FB_VMODE_NONINTERLACED, 0 },
172 /* 1280x1024-60 */
173 { NULL, 60, 1280, 1024, 9262, 248, 48, 38, 1, 112, 3,
174 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
175 FB_VMODE_NONINTERLACED, 0 },
176 /* 1600x1200-60 */
177 { NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
178 0, FB_VMODE_NONINTERLACED, 0 },
179 /* 1600x1200-70 */
180 { NULL, 70, 1600, 1200, 5291, 304, 64, 46, 1, 192, 3,
181 0, FB_VMODE_NONINTERLACED, 0 },
182 /* 1600x1200-72 */
183 { NULL, 72, 1600, 1200, 5053, 288, 112, 47, 13, 176, 3,
184 0, FB_VMODE_NONINTERLACED, 0 },
185 /* 1600x1200-75 */
186 { NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3,
187 0, FB_VMODE_NONINTERLACED, 0 },
188 /* 1600x1200-85 */
189 { NULL, 85, 1600, 1200, 4357, 304, 64, 46, 1, 192, 3,
190 0, FB_VMODE_NONINTERLACED, 0 },
191 /* 1600x1200-90 */
192 { NULL, 90, 1600, 1200, 3981, 304, 128, 60, 1, 176, 3,
193 0, FB_VMODE_NONINTERLACED, 0 },
194 /* 1600x1200-100 */
195 { NULL, 100, 1600, 1200, 3563, 304, 128, 67, 1, 176, 3,
196 0, FB_VMODE_NONINTERLACED, 0 },
197 /* 1600x1200-60 */
198 { NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
199 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
200 FB_VMODE_NONINTERLACED, 0 },
201 /* 1920x1440-60 */
202 { NULL, 60, 1920, 1440, 4273, 344, 128, 56, 1, 208, 3,
203 0, FB_VMODE_NONINTERLACED, 0 },
204 /* 1920x1440-70 */
205 { NULL, 70, 1920, 1440, 3593, 360, 152, 55, 8, 208, 3,
206 0, FB_VMODE_NONINTERLACED, 0 },
207 /* 1920x1440-72 */
208 { NULL, 72, 1920, 1440, 3472, 360, 152, 68, 4, 208, 3,
209 0, FB_VMODE_NONINTERLACED, 0 },
210 /* 1920x1440-75 */
211 { NULL, 75, 1920, 1440, 3367, 352, 144, 56, 1, 224, 3,
212 0, FB_VMODE_NONINTERLACED, 0 },
213 /* 1920x1440-85 */
214 { NULL, 85, 1920, 1440, 2929, 368, 152, 68, 1, 216, 3,
215 0, FB_VMODE_NONINTERLACED, 0 },
216};
217
218static int lxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
219{
220 if (var->xres > 1920 || var->yres > 1440)
221 return -EINVAL;
222
223 if (var->bits_per_pixel == 32) {
224 var->red.offset = 16; var->red.length = 8;
225 var->green.offset = 8; var->green.length = 8;
226 var->blue.offset = 0; var->blue.length = 8;
227 } else if (var->bits_per_pixel == 16) {
228 var->red.offset = 11; var->red.length = 5;
229 var->green.offset = 5; var->green.length = 6;
230 var->blue.offset = 0; var->blue.length = 5;
231 } else if (var->bits_per_pixel == 8) {
232 var->red.offset = 0; var->red.length = 8;
233 var->green.offset = 0; var->green.length = 8;
234 var->blue.offset = 0; var->blue.length = 8;
235 } else
236 return -EINVAL;
237
238 var->transp.offset = 0; var->transp.length = 0;
239
240 /* Enough video memory? */
241 if ((lx_get_pitch(var->xres, var->bits_per_pixel) * var->yres)
242 > info->fix.smem_len)
243 return -EINVAL;
244
245 return 0;
246}
247
248static int lxfb_set_par(struct fb_info *info)
249{
250 if (info->var.bits_per_pixel > 8) {
251 info->fix.visual = FB_VISUAL_TRUECOLOR;
252 fb_dealloc_cmap(&info->cmap);
253 } else {
254 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
255 fb_alloc_cmap(&info->cmap, 1<<info->var.bits_per_pixel, 0);
256 }
257
258 info->fix.line_length = lx_get_pitch(info->var.xres,
259 info->var.bits_per_pixel);
260
261 lx_set_mode(info);
262 return 0;
263}
264
265static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
266{
267 chan &= 0xffff;
268 chan >>= 16 - bf->length;
269 return chan << bf->offset;
270}
271
272static int lxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
273 unsigned blue, unsigned transp,
274 struct fb_info *info)
275{
276 if (info->var.grayscale) {
277 /* grayscale = 0.30*R + 0.59*G + 0.11*B */
278 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
279 }
280
281 /* Truecolor has hardware independent palette */
282 if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
283 u32 *pal = info->pseudo_palette;
284 u32 v;
285
286 if (regno >= 16)
287 return -EINVAL;
288
289 v = chan_to_field(red, &info->var.red);
290 v |= chan_to_field(green, &info->var.green);
291 v |= chan_to_field(blue, &info->var.blue);
292
293 pal[regno] = v;
294 } else {
295 if (regno >= 256)
296 return -EINVAL;
297
298 lx_set_palette_reg(info, regno, red, green, blue);
299 }
300
301 return 0;
302}
303
304static int lxfb_blank(int blank_mode, struct fb_info *info)
305{
306 return lx_blank_display(info, blank_mode);
307}
308
309
310static int __init lxfb_map_video_memory(struct fb_info *info,
311 struct pci_dev *dev)
312{
313 struct lxfb_par *par = info->par;
314 int ret;
315
316 ret = pci_enable_device(dev);
317
318 if (ret)
319 return ret;
320
321 ret = pci_request_region(dev, 0, "lxfb-framebuffer");
322
323 if (ret)
324 return ret;
325
326 ret = pci_request_region(dev, 1, "lxfb-gp");
327
328 if (ret)
329 return ret;
330
331 ret = pci_request_region(dev, 2, "lxfb-vg");
332
333 if (ret)
334 return ret;
335
336 ret = pci_request_region(dev, 3, "lxfb-vip");
337
338 if (ret)
339 return ret;
340
341 info->fix.smem_start = pci_resource_start(dev, 0);
342 info->fix.smem_len = fbsize ? fbsize : lx_framebuffer_size();
343
344 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
345
346 ret = -ENOMEM;
347
348 if (info->screen_base == NULL)
349 return ret;
350
351 par->gp_regs = ioremap(pci_resource_start(dev, 1),
352 pci_resource_len(dev, 1));
353
354 if (par->gp_regs == NULL)
355 return ret;
356
357 par->dc_regs = ioremap(pci_resource_start(dev, 2),
358 pci_resource_len(dev, 2));
359
360 if (par->dc_regs == NULL)
361 return ret;
362
363 par->df_regs = ioremap(pci_resource_start(dev, 3),
364 pci_resource_len(dev, 3));
365
366 if (par->df_regs == NULL)
367 return ret;
368
369 writel(DC_UNLOCK_CODE, par->dc_regs + DC_UNLOCK);
370
371 writel(info->fix.smem_start & 0xFF000000,
372 par->dc_regs + DC_PHY_MEM_OFFSET);
373
374 writel(0, par->dc_regs + DC_UNLOCK);
375
376 dev_info(&dev->dev, "%d KB of video memory at 0x%lx\n",
377 info->fix.smem_len / 1024, info->fix.smem_start);
378
379 return 0;
380}
381
382static struct fb_ops lxfb_ops = {
383 .owner = THIS_MODULE,
384 .fb_check_var = lxfb_check_var,
385 .fb_set_par = lxfb_set_par,
386 .fb_setcolreg = lxfb_setcolreg,
387 .fb_blank = lxfb_blank,
388 /* No HW acceleration for now. */
389 .fb_fillrect = cfb_fillrect,
390 .fb_copyarea = cfb_copyarea,
391 .fb_imageblit = cfb_imageblit,
392};
393
394static struct fb_info * __init lxfb_init_fbinfo(struct device *dev)
395{
396 struct lxfb_par *par;
397 struct fb_info *info;
398
399 /* Alloc enough space for the pseudo palette. */
400 info = framebuffer_alloc(sizeof(struct lxfb_par) + sizeof(u32) * 16,
401 dev);
402 if (!info)
403 return NULL;
404
405 par = info->par;
406
407 strcpy(info->fix.id, "Geode LX");
408
409 info->fix.type = FB_TYPE_PACKED_PIXELS;
410 info->fix.type_aux = 0;
411 info->fix.xpanstep = 0;
412 info->fix.ypanstep = 0;
413 info->fix.ywrapstep = 0;
414 info->fix.accel = FB_ACCEL_NONE;
415
416 info->var.nonstd = 0;
417 info->var.activate = FB_ACTIVATE_NOW;
418 info->var.height = -1;
419 info->var.width = -1;
420 info->var.accel_flags = 0;
421 info->var.vmode = FB_VMODE_NONINTERLACED;
422
423 info->fbops = &lxfb_ops;
424 info->flags = FBINFO_DEFAULT;
425 info->node = -1;
426
427 info->pseudo_palette = (void *)par + sizeof(struct lxfb_par);
428
429 info->var.grayscale = 0;
430
431 return info;
432}
433
434static int __init lxfb_probe(struct pci_dev *pdev,
435 const struct pci_device_id *id)
436{
437 struct lxfb_par *par;
438 struct fb_info *info;
439 int ret;
440
441 struct fb_videomode *modedb_ptr;
442 int modedb_size;
443
444 info = lxfb_init_fbinfo(&pdev->dev);
445
446 if (info == NULL)
447 return -ENOMEM;
448
449 par = info->par;
450
451 ret = lxfb_map_video_memory(info, pdev);
452
453 if (ret < 0) {
454 dev_err(&pdev->dev,
455 "failed to map frame buffer or controller registers\n");
456 goto err;
457 }
458
459 /* Set up the desired outputs */
460
461 par->output = 0;
462 par->output |= (nopanel) ? 0 : OUTPUT_PANEL;
463 par->output |= (nocrt) ? 0 : OUTPUT_CRT;
464
465 /* Set up the mode database */
466
467 modedb_ptr = (struct fb_videomode *) geode_modedb;
468 modedb_size = ARRAY_SIZE(geode_modedb);
469
470 ret = fb_find_mode(&info->var, info, mode_option,
471 modedb_ptr, modedb_size, NULL, 16);
472
473 if (ret == 0 || ret == 4) {
474 dev_err(&pdev->dev, "could not find valid video mode\n");
475 ret = -EINVAL;
476 goto err;
477 }
478
479 /* Clear the screen of garbage, unless noclear was specified,
480 * in which case we assume the user knows what he is doing */
481
482 if (!noclear)
483 memset_io(info->screen_base, 0, info->fix.smem_len);
484
485 /* Set the mode */
486
487 lxfb_check_var(&info->var, info);
488 lxfb_set_par(info);
489
490 if (register_framebuffer(info) < 0) {
491 ret = -EINVAL;
492 goto err;
493 }
494 pci_set_drvdata(pdev, info);
495 printk(KERN_INFO "fb%d: %s frame buffer device\n",
496 info->node, info->fix.id);
497
498 return 0;
499
500err:
501 if (info->screen_base) {
502 iounmap(info->screen_base);
503 pci_release_region(pdev, 0);
504 }
505 if (par->gp_regs) {
506 iounmap(par->gp_regs);
507 pci_release_region(pdev, 1);
508 }
509 if (par->dc_regs) {
510 iounmap(par->dc_regs);
511 pci_release_region(pdev, 2);
512 }
513 if (par->df_regs) {
514 iounmap(par->df_regs);
515 pci_release_region(pdev, 3);
516 }
517
518 if (info)
519 framebuffer_release(info);
520
521 return ret;
522}
523
524static void lxfb_remove(struct pci_dev *pdev)
525{
526 struct fb_info *info = pci_get_drvdata(pdev);
527 struct lxfb_par *par = info->par;
528
529 unregister_framebuffer(info);
530
531 iounmap(info->screen_base);
532 pci_release_region(pdev, 0);
533
534 iounmap(par->gp_regs);
535 pci_release_region(pdev, 1);
536
537 iounmap(par->dc_regs);
538 pci_release_region(pdev, 2);
539
540 iounmap(par->df_regs);
541 pci_release_region(pdev, 3);
542
543 pci_set_drvdata(pdev, NULL);
544 framebuffer_release(info);
545}
546
547static struct pci_device_id lxfb_id_table[] = {
548 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LX_VIDEO) },
549 { 0, }
550};
551
552MODULE_DEVICE_TABLE(pci, lxfb_id_table);
553
554static struct pci_driver lxfb_driver = {
555 .name = "lxfb",
556 .id_table = lxfb_id_table,
557 .probe = lxfb_probe,
558 .remove = lxfb_remove,
559};
560
561#ifndef MODULE
562static int __init lxfb_setup(char *options)
563{
564 char *opt;
565
566 if (!options || !*options)
567 return 0;
568
569 while (1) {
570 char *opt = strsep(&options, ",");
571
572 if (opt == NULL)
573 break;
574
575 if (!*opt)
576 continue;
577
578 if (!strncmp(opt, "fbsize:", 7))
579 fbsize = simple_strtoul(opt+7, NULL, 0);
580 else if (!strcmp(opt, "noclear"))
581 noclear = 1;
582 else if (!strcmp(opt, "nopanel"))
583 nopanel = 1;
584 else if (!strcmp(opt, "nocrt"))
585 nocrt = 1;
586 else
587 mode_option = opt;
588 }
589
590 return 0;
591}
592#endif
593
594static int __init lxfb_init(void)
595{
596#ifndef MODULE
597 char *option = NULL;
598
599 if (fb_get_options("lxfb", &option))
600 return -ENODEV;
601
602 lxfb_setup(option);
603#endif
604 return pci_register_driver(&lxfb_driver);
605}
606static void __exit lxfb_cleanup(void)
607{
608 pci_unregister_driver(&lxfb_driver);
609}
610
611module_init(lxfb_init);
612module_exit(lxfb_cleanup);
613
614module_param(mode_option, charp, 0);
615MODULE_PARM_DESC(mode_option, "video mode (<x>x<y>[-<bpp>][@<refr>])");
616
617module_param(fbsize, int, 0);
618MODULE_PARM_DESC(fbsize, "video memory size");
619
620MODULE_DESCRIPTION("Framebuffer driver for the AMD Geode LX");
621MODULE_LICENSE("GPL");
diff --git a/drivers/video/geode/lxfb_ops.c b/drivers/video/geode/lxfb_ops.c
new file mode 100644
index 000000000000..4fbc99be96ef
--- /dev/null
+++ b/drivers/video/geode/lxfb_ops.c
@@ -0,0 +1,536 @@
1/* Geode LX framebuffer driver
2 *
3 * Copyright (C) 2006-2007, Advanced Micro Devices,Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/fb.h>
14#include <linux/uaccess.h>
15#include <linux/delay.h>
16
17#include "lxfb.h"
18
19/* TODO
20 * Support panel scaling
21 * Add acceleration
22 * Add support for interlacing (TV out)
23 * Support compression
24 */
25
26/* This is the complete list of PLL frequencies that we can set -
27 * we will choose the closest match to the incoming clock.
28 * freq is the frequency of the dotclock * 1000 (for example,
29 * 24823 = 24.983 Mhz).
30 * pllval is the corresponding PLL value
31*/
32
33static const struct {
34 unsigned int pllval;
35 unsigned int freq;
36} pll_table[] = {
37 { 0x000031AC, 24923 },
38 { 0x0000215D, 25175 },
39 { 0x00001087, 27000 },
40 { 0x0000216C, 28322 },
41 { 0x0000218D, 28560 },
42 { 0x000010C9, 31200 },
43 { 0x00003147, 31500 },
44 { 0x000010A7, 33032 },
45 { 0x00002159, 35112 },
46 { 0x00004249, 35500 },
47 { 0x00000057, 36000 },
48 { 0x0000219A, 37889 },
49 { 0x00002158, 39168 },
50 { 0x00000045, 40000 },
51 { 0x00000089, 43163 },
52 { 0x000010E7, 44900 },
53 { 0x00002136, 45720 },
54 { 0x00003207, 49500 },
55 { 0x00002187, 50000 },
56 { 0x00004286, 56250 },
57 { 0x000010E5, 60065 },
58 { 0x00004214, 65000 },
59 { 0x00001105, 68179 },
60 { 0x000031E4, 74250 },
61 { 0x00003183, 75000 },
62 { 0x00004284, 78750 },
63 { 0x00001104, 81600 },
64 { 0x00006363, 94500 },
65 { 0x00005303, 97520 },
66 { 0x00002183, 100187 },
67 { 0x00002122, 101420 },
68 { 0x00001081, 108000 },
69 { 0x00006201, 113310 },
70 { 0x00000041, 119650 },
71 { 0x000041A1, 129600 },
72 { 0x00002182, 133500 },
73 { 0x000041B1, 135000 },
74 { 0x00000051, 144000 },
75 { 0x000041E1, 148500 },
76 { 0x000062D1, 157500 },
77 { 0x000031A1, 162000 },
78 { 0x00000061, 169203 },
79 { 0x00004231, 172800 },
80 { 0x00002151, 175500 },
81 { 0x000052E1, 189000 },
82 { 0x00000071, 192000 },
83 { 0x00003201, 198000 },
84 { 0x00004291, 202500 },
85 { 0x00001101, 204750 },
86 { 0x00007481, 218250 },
87 { 0x00004170, 229500 },
88 { 0x00006210, 234000 },
89 { 0x00003140, 251182 },
90 { 0x00006250, 261000 },
91 { 0x000041C0, 278400 },
92 { 0x00005220, 280640 },
93 { 0x00000050, 288000 },
94 { 0x000041E0, 297000 },
95 { 0x00002130, 320207 }
96};
97
98
99static void lx_set_dotpll(u32 pllval)
100{
101 u32 dotpll_lo, dotpll_hi;
102 int i;
103
104 rdmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
105
106 if ((dotpll_lo & GLCP_DOTPLL_LOCK) && (dotpll_hi == pllval))
107 return;
108
109 dotpll_hi = pllval;
110 dotpll_lo &= ~(GLCP_DOTPLL_BYPASS | GLCP_DOTPLL_HALFPIX);
111 dotpll_lo |= GLCP_DOTPLL_RESET;
112
113 wrmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
114
115 /* Wait 100us for the PLL to lock */
116
117 udelay(100);
118
119 /* Now, loop for the lock bit */
120
121 for (i = 0; i < 1000; i++) {
122 rdmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
123 if (dotpll_lo & GLCP_DOTPLL_LOCK)
124 break;
125 }
126
127 /* Clear the reset bit */
128
129 dotpll_lo &= ~GLCP_DOTPLL_RESET;
130 wrmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
131}
132
133/* Set the clock based on the frequency specified by the current mode */
134
135static void lx_set_clock(struct fb_info *info)
136{
137 unsigned int diff, min, best = 0;
138 unsigned int freq, i;
139
140 freq = (unsigned int) (0x3b9aca00 / info->var.pixclock);
141
142 min = abs(pll_table[0].freq - freq);
143
144 for (i = 0; i < ARRAY_SIZE(pll_table); i++) {
145 diff = abs(pll_table[i].freq - freq);
146 if (diff < min) {
147 min = diff;
148 best = i;
149 }
150 }
151
152 lx_set_dotpll(pll_table[best].pllval & 0x7FFF);
153}
154
155static void lx_graphics_disable(struct fb_info *info)
156{
157 struct lxfb_par *par = info->par;
158 unsigned int val, gcfg;
159
160 /* Note: This assumes that the video is in a quitet state */
161
162 writel(0, par->df_regs + DF_ALPHA_CONTROL_1);
163 writel(0, par->df_regs + DF_ALPHA_CONTROL_1 + 32);
164 writel(0, par->df_regs + DF_ALPHA_CONTROL_1 + 64);
165
166 /* Turn off the VGA and video enable */
167 val = readl (par->dc_regs + DC_GENERAL_CFG) &
168 ~(DC_GCFG_VGAE | DC_GCFG_VIDE);
169
170 writel(val, par->dc_regs + DC_GENERAL_CFG);
171
172 val = readl(par->df_regs + DF_VIDEO_CFG) & ~DF_VCFG_VID_EN;
173 writel(val, par->df_regs + DF_VIDEO_CFG);
174
175 writel( DC_IRQ_MASK | DC_VSYNC_IRQ_MASK |
176 DC_IRQ_STATUS | DC_VSYNC_IRQ_STATUS,
177 par->dc_regs + DC_IRQ);
178
179 val = readl(par->dc_regs + DC_GENLCK_CTRL) & ~DC_GENLCK_ENABLE;
180 writel(val, par->dc_regs + DC_GENLCK_CTRL);
181
182 val = readl(par->dc_regs + DC_COLOR_KEY) & ~DC_CLR_KEY_ENABLE;
183 writel(val & ~DC_CLR_KEY_ENABLE, par->dc_regs + DC_COLOR_KEY);
184
185 /* We don't actually blank the panel, due to the long latency
186 involved with bringing it back */
187
188 val = readl(par->df_regs + DF_MISC) | DF_MISC_DAC_PWRDN;
189 writel(val, par->df_regs + DF_MISC);
190
191 /* Turn off the display */
192
193 val = readl(par->df_regs + DF_DISPLAY_CFG);
194 writel(val & ~(DF_DCFG_CRT_EN | DF_DCFG_HSYNC_EN | DF_DCFG_VSYNC_EN |
195 DF_DCFG_DAC_BL_EN), par->df_regs + DF_DISPLAY_CFG);
196
197 gcfg = readl(par->dc_regs + DC_GENERAL_CFG);
198 gcfg &= ~(DC_GCFG_CMPE | DC_GCFG_DECE);
199 writel(gcfg, par->dc_regs + DC_GENERAL_CFG);
200
201 /* Turn off the TGEN */
202 val = readl(par->dc_regs + DC_DISPLAY_CFG);
203 val &= ~DC_DCFG_TGEN;
204 writel(val, par->dc_regs + DC_DISPLAY_CFG);
205
206 /* Wait 1000 usecs to ensure that the TGEN is clear */
207 udelay(1000);
208
209 /* Turn off the FIFO loader */
210
211 gcfg &= ~DC_GCFG_DFLE;
212 writel(gcfg, par->dc_regs + DC_GENERAL_CFG);
213
214 /* Lastly, wait for the GP to go idle */
215
216 do {
217 val = readl(par->gp_regs + GP_BLT_STATUS);
218 } while ((val & GP_BS_BLT_BUSY) || !(val & GP_BS_CB_EMPTY));
219}
220
221static void lx_graphics_enable(struct fb_info *info)
222{
223 struct lxfb_par *par = info->par;
224 u32 temp, config;
225
226 /* Set the video request register */
227 writel(0, par->df_regs + DF_VIDEO_REQUEST);
228
229 /* Set up the polarities */
230
231 config = readl(par->df_regs + DF_DISPLAY_CFG);
232
233 config &= ~(DF_DCFG_CRT_SYNC_SKW_MASK | DF_DCFG_PWR_SEQ_DLY_MASK |
234 DF_DCFG_CRT_HSYNC_POL | DF_DCFG_CRT_VSYNC_POL);
235
236 config |= (DF_DCFG_CRT_SYNC_SKW_INIT | DF_DCFG_PWR_SEQ_DLY_INIT |
237 DF_DCFG_GV_PAL_BYP);
238
239 if (info->var.sync & FB_SYNC_HOR_HIGH_ACT)
240 config |= DF_DCFG_CRT_HSYNC_POL;
241
242 if (info->var.sync & FB_SYNC_VERT_HIGH_ACT)
243 config |= DF_DCFG_CRT_VSYNC_POL;
244
245 if (par->output & OUTPUT_PANEL) {
246 u32 msrlo, msrhi;
247
248 writel(DF_DEFAULT_TFT_PMTIM1,
249 par->df_regs + DF_PANEL_TIM1);
250 writel(DF_DEFAULT_TFT_PMTIM2,
251 par->df_regs + DF_PANEL_TIM2);
252 writel(DF_DEFAULT_TFT_DITHCTL,
253 par->df_regs + DF_DITHER_CONTROL);
254
255 msrlo = DF_DEFAULT_TFT_PAD_SEL_LOW;
256 msrhi = DF_DEFAULT_TFT_PAD_SEL_HIGH;
257
258 wrmsr(MSR_LX_DF_PADSEL, msrlo, msrhi);
259 }
260
261 if (par->output & OUTPUT_CRT) {
262 config |= DF_DCFG_CRT_EN | DF_DCFG_HSYNC_EN |
263 DF_DCFG_VSYNC_EN | DF_DCFG_DAC_BL_EN;
264 }
265
266 writel(config, par->df_regs + DF_DISPLAY_CFG);
267
268 /* Turn the CRT dacs back on */
269
270 if (par->output & OUTPUT_CRT) {
271 temp = readl(par->df_regs + DF_MISC);
272 temp &= ~(DF_MISC_DAC_PWRDN | DF_MISC_A_PWRDN);
273 writel(temp, par->df_regs + DF_MISC);
274 }
275
276 /* Turn the panel on (if it isn't already) */
277
278 if (par->output & OUTPUT_PANEL) {
279 temp = readl(par->df_regs + DF_FP_PM);
280
281 if (!(temp & 0x09))
282 writel(temp | DF_FP_PM_P, par->df_regs + DF_FP_PM);
283 }
284
285 temp = readl(par->df_regs + DF_MISC);
286 temp = readl(par->df_regs + DF_DISPLAY_CFG);
287}
288
289unsigned int lx_framebuffer_size(void)
290{
291 unsigned int val;
292
293 /* The frame buffer size is reported by a VSM in VSA II */
294 /* Virtual Register Class = 0x02 */
295 /* VG_MEM_SIZE (1MB units) = 0x00 */
296
297 outw(0xFC53, 0xAC1C);
298 outw(0x0200, 0xAC1C);
299
300 val = (unsigned int)(inw(0xAC1E)) & 0xFE;
301 return (val << 20);
302}
303
304void lx_set_mode(struct fb_info *info)
305{
306 struct lxfb_par *par = info->par;
307 u64 msrval;
308
309 unsigned int max, dv, val, size;
310
311 unsigned int gcfg, dcfg;
312 int hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal;
313 int vactive, vblankstart, vsyncstart, vsyncend, vblankend, vtotal;
314
315 /* Unlock the DC registers */
316 writel(DC_UNLOCK_CODE, par->dc_regs + DC_UNLOCK);
317
318 lx_graphics_disable(info);
319
320 lx_set_clock(info);
321
322 /* Set output mode */
323
324 rdmsrl(MSR_LX_DF_GLCONFIG, msrval);
325 msrval &= ~DF_CONFIG_OUTPUT_MASK;
326
327 if (par->output & OUTPUT_PANEL) {
328 msrval |= DF_OUTPUT_PANEL;
329
330 if (par->output & OUTPUT_CRT)
331 msrval |= DF_SIMULTANEOUS_CRT_AND_FP;
332 else
333 msrval &= ~DF_SIMULTANEOUS_CRT_AND_FP;
334 } else {
335 msrval |= DF_OUTPUT_CRT;
336 }
337
338 wrmsrl(MSR_LX_DF_GLCONFIG, msrval);
339
340 /* Clear the various buffers */
341 /* FIXME: Adjust for panning here */
342
343 writel(0, par->dc_regs + DC_FB_START);
344 writel(0, par->dc_regs + DC_CB_START);
345 writel(0, par->dc_regs + DC_CURSOR_START);
346
347 /* FIXME: Add support for interlacing */
348 /* FIXME: Add support for scaling */
349
350 val = readl(par->dc_regs + DC_GENLCK_CTRL);
351 val &= ~(DC_GC_ALPHA_FLICK_ENABLE |
352 DC_GC_FLICKER_FILTER_ENABLE | DC_GC_FLICKER_FILTER_MASK);
353
354 /* Default scaling params */
355
356 writel((0x4000 << 16) | 0x4000, par->dc_regs + DC_GFX_SCALE);
357 writel(0, par->dc_regs + DC_IRQ_FILT_CTL);
358 writel(val, par->dc_regs + DC_GENLCK_CTRL);
359
360 /* FIXME: Support compression */
361
362 if (info->fix.line_length > 4096)
363 dv = DC_DV_LINE_SIZE_8192;
364 else if (info->fix.line_length > 2048)
365 dv = DC_DV_LINE_SIZE_4096;
366 else if (info->fix.line_length > 1024)
367 dv = DC_DV_LINE_SIZE_2048;
368 else
369 dv = DC_DV_LINE_SIZE_1024;
370
371 max = info->fix.line_length * info->var.yres;
372 max = (max + 0x3FF) & 0xFFFFFC00;
373
374 writel(max | DC_DV_TOP_ENABLE, par->dc_regs + DC_DV_TOP);
375
376 val = readl(par->dc_regs + DC_DV_CTL) & ~DC_DV_LINE_SIZE_MASK;
377 writel(val | dv, par->dc_regs + DC_DV_CTL);
378
379 size = info->var.xres * (info->var.bits_per_pixel >> 3);
380
381 writel(info->fix.line_length >> 3, par->dc_regs + DC_GRAPHICS_PITCH);
382 writel((size + 7) >> 3, par->dc_regs + DC_LINE_SIZE);
383
384 /* Set default watermark values */
385
386 rdmsrl(MSR_LX_DC_SPARE, msrval);
387
388 msrval &= ~(DC_SPARE_DISABLE_CFIFO_HGO | DC_SPARE_VFIFO_ARB_SELECT |
389 DC_SPARE_LOAD_WM_LPEN_MASK | DC_SPARE_WM_LPEN_OVRD |
390 DC_SPARE_DISABLE_INIT_VID_PRI | DC_SPARE_DISABLE_VFIFO_WM);
391 msrval |= DC_SPARE_DISABLE_VFIFO_WM | DC_SPARE_DISABLE_INIT_VID_PRI;
392 wrmsrl(MSR_LX_DC_SPARE, msrval);
393
394 gcfg = DC_GCFG_DFLE; /* Display fifo enable */
395 gcfg |= 0xB600; /* Set default priority */
396 gcfg |= DC_GCFG_FDTY; /* Set the frame dirty mode */
397
398 dcfg = DC_DCFG_VDEN; /* Enable video data */
399 dcfg |= DC_DCFG_GDEN; /* Enable graphics */
400 dcfg |= DC_DCFG_TGEN; /* Turn on the timing generator */
401 dcfg |= DC_DCFG_TRUP; /* Update timings immediately */
402 dcfg |= DC_DCFG_PALB; /* Palette bypass in > 8 bpp modes */
403 dcfg |= DC_DCFG_VISL;
404 dcfg |= DC_DCFG_DCEN; /* Always center the display */
405
406 /* Set the current BPP mode */
407
408 switch (info->var.bits_per_pixel) {
409 case 8:
410 dcfg |= DC_DCFG_DISP_MODE_8BPP;
411 break;
412
413 case 16:
414 dcfg |= DC_DCFG_DISP_MODE_16BPP | DC_DCFG_16BPP;
415 break;
416
417 case 32:
418 case 24:
419 dcfg |= DC_DCFG_DISP_MODE_24BPP;
420 break;
421 }
422
423 /* Now - set up the timings */
424
425 hactive = info->var.xres;
426 hblankstart = hactive;
427 hsyncstart = hblankstart + info->var.right_margin;
428 hsyncend = hsyncstart + info->var.hsync_len;
429 hblankend = hsyncend + info->var.left_margin;
430 htotal = hblankend;
431
432 vactive = info->var.yres;
433 vblankstart = vactive;
434 vsyncstart = vblankstart + info->var.lower_margin;
435 vsyncend = vsyncstart + info->var.vsync_len;
436 vblankend = vsyncend + info->var.upper_margin;
437 vtotal = vblankend;
438
439 writel((hactive - 1) | ((htotal - 1) << 16),
440 par->dc_regs + DC_H_ACTIVE_TIMING);
441 writel((hblankstart - 1) | ((hblankend - 1) << 16),
442 par->dc_regs + DC_H_BLANK_TIMING);
443 writel((hsyncstart - 1) | ((hsyncend - 1) << 16),
444 par->dc_regs + DC_H_SYNC_TIMING);
445
446 writel((vactive - 1) | ((vtotal - 1) << 16),
447 par->dc_regs + DC_V_ACTIVE_TIMING);
448
449 writel((vblankstart - 1) | ((vblankend - 1) << 16),
450 par->dc_regs + DC_V_BLANK_TIMING);
451
452 writel((vsyncstart - 1) | ((vsyncend - 1) << 16),
453 par->dc_regs + DC_V_SYNC_TIMING);
454
455 writel( (info->var.xres - 1) << 16 | (info->var.yres - 1),
456 par->dc_regs + DC_FB_ACTIVE);
457
458 /* And re-enable the graphics output */
459 lx_graphics_enable(info);
460
461 /* Write the two main configuration registers */
462 writel(dcfg, par->dc_regs + DC_DISPLAY_CFG);
463 writel(0, par->dc_regs + DC_ARB_CFG);
464 writel(gcfg, par->dc_regs + DC_GENERAL_CFG);
465
466 /* Lock the DC registers */
467 writel(0, par->dc_regs + DC_UNLOCK);
468}
469
470void lx_set_palette_reg(struct fb_info *info, unsigned regno,
471 unsigned red, unsigned green, unsigned blue)
472{
473 struct lxfb_par *par = info->par;
474 int val;
475
476 /* Hardware palette is in RGB 8-8-8 format. */
477
478 val = (red << 8) & 0xff0000;
479 val |= (green) & 0x00ff00;
480 val |= (blue >> 8) & 0x0000ff;
481
482 writel(regno, par->dc_regs + DC_PAL_ADDRESS);
483 writel(val, par->dc_regs + DC_PAL_DATA);
484}
485
486int lx_blank_display(struct fb_info *info, int blank_mode)
487{
488 struct lxfb_par *par = info->par;
489 u32 dcfg, fp_pm;
490 int blank, hsync, vsync;
491
492 /* CRT power saving modes. */
493 switch (blank_mode) {
494 case FB_BLANK_UNBLANK:
495 blank = 0; hsync = 1; vsync = 1;
496 break;
497 case FB_BLANK_NORMAL:
498 blank = 1; hsync = 1; vsync = 1;
499 break;
500 case FB_BLANK_VSYNC_SUSPEND:
501 blank = 1; hsync = 1; vsync = 0;
502 break;
503 case FB_BLANK_HSYNC_SUSPEND:
504 blank = 1; hsync = 0; vsync = 1;
505 break;
506 case FB_BLANK_POWERDOWN:
507 blank = 1; hsync = 0; vsync = 0;
508 break;
509 default:
510 return -EINVAL;
511 }
512
513 dcfg = readl(par->df_regs + DF_DISPLAY_CFG);
514 dcfg &= ~(DF_DCFG_DAC_BL_EN
515 | DF_DCFG_HSYNC_EN | DF_DCFG_VSYNC_EN);
516 if (!blank)
517 dcfg |= DF_DCFG_DAC_BL_EN;
518 if (hsync)
519 dcfg |= DF_DCFG_HSYNC_EN;
520 if (vsync)
521 dcfg |= DF_DCFG_VSYNC_EN;
522 writel(dcfg, par->df_regs + DF_DISPLAY_CFG);
523
524 /* Power on/off flat panel */
525
526 if (par->output & OUTPUT_PANEL) {
527 fp_pm = readl(par->df_regs + DF_FP_PM);
528 if (blank_mode == FB_BLANK_POWERDOWN)
529 fp_pm &= ~DF_FP_PM_P;
530 else
531 fp_pm |= DF_FP_PM_P;
532 writel(fp_pm, par->df_regs + DF_FP_PM);
533 }
534
535 return 0;
536}
diff --git a/drivers/video/s3c2410fb.c b/drivers/video/s3c2410fb.c
index ed3426062a8b..8a4c6470d799 100644
--- a/drivers/video/s3c2410fb.c
+++ b/drivers/video/s3c2410fb.c
@@ -474,6 +474,7 @@ static void schedule_palette_update(struct s3c2410fb_info *fbi,
474{ 474{
475 unsigned long flags; 475 unsigned long flags;
476 unsigned long irqen; 476 unsigned long irqen;
477 void __iomem *regs = fbi->io;
477 478
478 local_irq_save(flags); 479 local_irq_save(flags);
479 480
@@ -483,9 +484,9 @@ static void schedule_palette_update(struct s3c2410fb_info *fbi,
483 fbi->palette_ready = 1; 484 fbi->palette_ready = 1;
484 485
485 /* enable IRQ */ 486 /* enable IRQ */
486 irqen = readl(S3C2410_LCDINTMSK); 487 irqen = readl(regs + S3C2410_LCDINTMSK);
487 irqen &= ~S3C2410_LCDINT_FRSYNC; 488 irqen &= ~S3C2410_LCDINT_FRSYNC;
488 writel(irqen, S3C2410_LCDINTMSK); 489 writel(irqen, regs + S3C2410_LCDINTMSK);
489 } 490 }
490 491
491 local_irq_restore(flags); 492 local_irq_restore(flags);
@@ -680,6 +681,7 @@ static inline void modify_gpio(void __iomem *reg,
680static int s3c2410fb_init_registers(struct s3c2410fb_info *fbi) 681static int s3c2410fb_init_registers(struct s3c2410fb_info *fbi)
681{ 682{
682 unsigned long flags; 683 unsigned long flags;
684 void __iomem *regs = fbi->io;
683 685
684 /* Initialise LCD with values from haret */ 686 /* Initialise LCD with values from haret */
685 687
@@ -694,25 +696,25 @@ static int s3c2410fb_init_registers(struct s3c2410fb_info *fbi)
694 696
695 local_irq_restore(flags); 697 local_irq_restore(flags);
696 698
697 writel(fbi->regs.lcdcon1, S3C2410_LCDCON1); 699 writel(fbi->regs.lcdcon1, regs + S3C2410_LCDCON1);
698 writel(fbi->regs.lcdcon2, S3C2410_LCDCON2); 700 writel(fbi->regs.lcdcon2, regs + S3C2410_LCDCON2);
699 writel(fbi->regs.lcdcon3, S3C2410_LCDCON3); 701 writel(fbi->regs.lcdcon3, regs + S3C2410_LCDCON3);
700 writel(fbi->regs.lcdcon4, S3C2410_LCDCON4); 702 writel(fbi->regs.lcdcon4, regs + S3C2410_LCDCON4);
701 writel(fbi->regs.lcdcon5, S3C2410_LCDCON5); 703 writel(fbi->regs.lcdcon5, regs + S3C2410_LCDCON5);
702 704
703 s3c2410fb_set_lcdaddr(fbi); 705 s3c2410fb_set_lcdaddr(fbi);
704 706
705 dprintk("LPCSEL = 0x%08lx\n", mach_info->lpcsel); 707 dprintk("LPCSEL = 0x%08lx\n", mach_info->lpcsel);
706 writel(mach_info->lpcsel, S3C2410_LPCSEL); 708 writel(mach_info->lpcsel, regs + S3C2410_LPCSEL);
707 709
708 dprintk("replacing TPAL %08x\n", readl(S3C2410_TPAL)); 710 dprintk("replacing TPAL %08x\n", readl(regs + S3C2410_TPAL));
709 711
710 /* ensure temporary palette disabled */ 712 /* ensure temporary palette disabled */
711 writel(0x00, S3C2410_TPAL); 713 writel(0x00, regs + S3C2410_TPAL);
712 714
713 /* Enable video by setting the ENVID bit to 1 */ 715 /* Enable video by setting the ENVID bit to 1 */
714 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_ENVID; 716 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_ENVID;
715 writel(fbi->regs.lcdcon1, S3C2410_LCDCON1); 717 writel(fbi->regs.lcdcon1, regs + S3C2410_LCDCON1);
716 return 0; 718 return 0;
717} 719}
718 720
@@ -720,6 +722,7 @@ static void s3c2410fb_write_palette(struct s3c2410fb_info *fbi)
720{ 722{
721 unsigned int i; 723 unsigned int i;
722 unsigned long ent; 724 unsigned long ent;
725 void __iomem *regs = fbi->io;
723 726
724 fbi->palette_ready = 0; 727 fbi->palette_ready = 0;
725 728
@@ -727,14 +730,14 @@ static void s3c2410fb_write_palette(struct s3c2410fb_info *fbi)
727 if ((ent = fbi->palette_buffer[i]) == PALETTE_BUFF_CLEAR) 730 if ((ent = fbi->palette_buffer[i]) == PALETTE_BUFF_CLEAR)
728 continue; 731 continue;
729 732
730 writel(ent, S3C2410_TFTPAL(i)); 733 writel(ent, regs + S3C2410_TFTPAL(i));
731 734
732 /* it seems the only way to know exactly 735 /* it seems the only way to know exactly
733 * if the palette wrote ok, is to check 736 * if the palette wrote ok, is to check
734 * to see if the value verifies ok 737 * to see if the value verifies ok
735 */ 738 */
736 739
737 if (readw(S3C2410_TFTPAL(i)) == ent) 740 if (readw(regs + S3C2410_TFTPAL(i)) == ent)
738 fbi->palette_buffer[i] = PALETTE_BUFF_CLEAR; 741 fbi->palette_buffer[i] = PALETTE_BUFF_CLEAR;
739 else 742 else
740 fbi->palette_ready = 1; /* retry */ 743 fbi->palette_ready = 1; /* retry */
@@ -744,14 +747,15 @@ static void s3c2410fb_write_palette(struct s3c2410fb_info *fbi)
744static irqreturn_t s3c2410fb_irq(int irq, void *dev_id) 747static irqreturn_t s3c2410fb_irq(int irq, void *dev_id)
745{ 748{
746 struct s3c2410fb_info *fbi = dev_id; 749 struct s3c2410fb_info *fbi = dev_id;
747 unsigned long lcdirq = readl(S3C2410_LCDINTPND); 750 void __iomem *regs = fbi->io;
751 unsigned long lcdirq = readl(regs + S3C2410_LCDINTPND);
748 752
749 if (lcdirq & S3C2410_LCDINT_FRSYNC) { 753 if (lcdirq & S3C2410_LCDINT_FRSYNC) {
750 if (fbi->palette_ready) 754 if (fbi->palette_ready)
751 s3c2410fb_write_palette(fbi); 755 s3c2410fb_write_palette(fbi);
752 756
753 writel(S3C2410_LCDINT_FRSYNC, S3C2410_LCDINTPND); 757 writel(S3C2410_LCDINT_FRSYNC, regs + S3C2410_LCDINTPND);
754 writel(S3C2410_LCDINT_FRSYNC, S3C2410_LCDSRCPND); 758 writel(S3C2410_LCDINT_FRSYNC, regs + S3C2410_LCDSRCPND);
755 } 759 }
756 760
757 return IRQ_HANDLED; 761 return IRQ_HANDLED;
@@ -764,9 +768,11 @@ static int __init s3c2410fb_probe(struct platform_device *pdev)
764 struct s3c2410fb_info *info; 768 struct s3c2410fb_info *info;
765 struct fb_info *fbinfo; 769 struct fb_info *fbinfo;
766 struct s3c2410fb_hw *mregs; 770 struct s3c2410fb_hw *mregs;
771 struct resource *res;
767 int ret; 772 int ret;
768 int irq; 773 int irq;
769 int i; 774 int i;
775 int size;
770 u32 lcdcon1; 776 u32 lcdcon1;
771 777
772 mach_info = pdev->dev.platform_data; 778 mach_info = pdev->dev.platform_data;
@@ -788,11 +794,32 @@ static int __init s3c2410fb_probe(struct platform_device *pdev)
788 return -ENOMEM; 794 return -ENOMEM;
789 } 795 }
790 796
791
792 info = fbinfo->par; 797 info = fbinfo->par;
793 info->fb = fbinfo; 798 info->fb = fbinfo;
794 info->dev = &pdev->dev; 799 info->dev = &pdev->dev;
795 800
801 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
802 if (res == NULL) {
803 dev_err(&pdev->dev, "failed to get memory registersn");
804 ret = -ENXIO;
805 goto dealloc_fb;
806 }
807
808 size = (res->end - res->start)+1;
809 info->mem = request_mem_region(res->start, size, pdev->name);
810 if (info->mem == NULL) {
811 dev_err(&pdev->dev, "failed to get memory region\n");
812 ret = -ENOENT;
813 goto dealloc_fb;
814 }
815
816 info->io = ioremap(res->start, size);
817 if (info->io == NULL) {
818 dev_err(&pdev->dev, "ioremap() of registers failed\n");
819 ret = -ENXIO;
820 goto release_mem;
821 }
822
796 platform_set_drvdata(pdev, fbinfo); 823 platform_set_drvdata(pdev, fbinfo);
797 824
798 dprintk("devinit\n"); 825 dprintk("devinit\n");
@@ -803,8 +830,8 @@ static int __init s3c2410fb_probe(struct platform_device *pdev)
803 830
804 /* Stop the video and unset ENVID if set */ 831 /* Stop the video and unset ENVID if set */
805 info->regs.lcdcon1 &= ~S3C2410_LCDCON1_ENVID; 832 info->regs.lcdcon1 &= ~S3C2410_LCDCON1_ENVID;
806 lcdcon1 = readl(S3C2410_LCDCON1); 833 lcdcon1 = readl(info->io + S3C2410_LCDCON1);
807 writel(lcdcon1 & ~S3C2410_LCDCON1_ENVID, S3C2410_LCDCON1); 834 writel(lcdcon1 & ~S3C2410_LCDCON1_ENVID, info->io + S3C2410_LCDCON1);
808 835
809 info->mach_info = pdev->dev.platform_data; 836 info->mach_info = pdev->dev.platform_data;
810 837
@@ -855,19 +882,11 @@ static int __init s3c2410fb_probe(struct platform_device *pdev)
855 for (i = 0; i < 256; i++) 882 for (i = 0; i < 256; i++)
856 info->palette_buffer[i] = PALETTE_BUFF_CLEAR; 883 info->palette_buffer[i] = PALETTE_BUFF_CLEAR;
857 884
858 if (!request_mem_region((unsigned long)S3C24XX_VA_LCD, SZ_1M, "s3c2410-lcd")) {
859 ret = -EBUSY;
860 goto dealloc_fb;
861 }
862
863
864 dprintk("got LCD region\n");
865
866 ret = request_irq(irq, s3c2410fb_irq, IRQF_DISABLED, pdev->name, info); 885 ret = request_irq(irq, s3c2410fb_irq, IRQF_DISABLED, pdev->name, info);
867 if (ret) { 886 if (ret) {
868 dev_err(&pdev->dev, "cannot get irq %d - err %d\n", irq, ret); 887 dev_err(&pdev->dev, "cannot get irq %d - err %d\n", irq, ret);
869 ret = -EBUSY; 888 ret = -EBUSY;
870 goto release_mem; 889 goto release_regs;
871 } 890 }
872 891
873 info->clk = clk_get(NULL, "lcd"); 892 info->clk = clk_get(NULL, "lcd");
@@ -889,6 +908,7 @@ static int __init s3c2410fb_probe(struct platform_device *pdev)
889 ret = -ENOMEM; 908 ret = -ENOMEM;
890 goto release_clock; 909 goto release_clock;
891 } 910 }
911
892 dprintk("got video memory\n"); 912 dprintk("got video memory\n");
893 913
894 ret = s3c2410fb_init_registers(info); 914 ret = s3c2410fb_init_registers(info);
@@ -916,8 +936,11 @@ release_clock:
916 clk_put(info->clk); 936 clk_put(info->clk);
917release_irq: 937release_irq:
918 free_irq(irq,info); 938 free_irq(irq,info);
939release_regs:
940 iounmap(info->io);
919release_mem: 941release_mem:
920 release_mem_region((unsigned long)S3C24XX_VA_LCD, S3C24XX_SZ_LCD); 942 release_resource(info->mem);
943 kfree(info->mem);
921dealloc_fb: 944dealloc_fb:
922 framebuffer_release(fbinfo); 945 framebuffer_release(fbinfo);
923 return ret; 946 return ret;
@@ -935,7 +958,7 @@ static void s3c2410fb_stop_lcd(struct s3c2410fb_info *fbi)
935 local_irq_save(flags); 958 local_irq_save(flags);
936 959
937 fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_ENVID; 960 fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_ENVID;
938 writel(fbi->regs.lcdcon1, S3C2410_LCDCON1); 961 writel(fbi->regs.lcdcon1, fbi->io + S3C2410_LCDCON1);
939 962
940 local_irq_restore(flags); 963 local_irq_restore(flags);
941} 964}
@@ -962,7 +985,10 @@ static int s3c2410fb_remove(struct platform_device *pdev)
962 985
963 irq = platform_get_irq(pdev, 0); 986 irq = platform_get_irq(pdev, 0);
964 free_irq(irq,info); 987 free_irq(irq,info);
965 release_mem_region((unsigned long)S3C24XX_VA_LCD, S3C24XX_SZ_LCD); 988
989 release_resource(info->mem);
990 kfree(info->mem);
991 iounmap(info->io);
966 unregister_framebuffer(fbinfo); 992 unregister_framebuffer(fbinfo);
967 993
968 return 0; 994 return 0;
diff --git a/drivers/video/s3c2410fb.h b/drivers/video/s3c2410fb.h
index f3f8a8e15012..17c7915b7acd 100644
--- a/drivers/video/s3c2410fb.h
+++ b/drivers/video/s3c2410fb.h
@@ -30,6 +30,9 @@ struct s3c2410fb_info {
30 struct device *dev; 30 struct device *dev;
31 struct clk *clk; 31 struct clk *clk;
32 32
33 struct resource *mem;
34 void __iomem *io;
35
33 struct s3c2410fb_mach_info *mach_info; 36 struct s3c2410fb_mach_info *mach_info;
34 37
35 /* raw memory addresses */ 38 /* raw memory addresses */
diff --git a/drivers/video/tx3912fb.c b/drivers/video/tx3912fb.c
deleted file mode 100644
index e6f7c78da68b..000000000000
--- a/drivers/video/tx3912fb.c
+++ /dev/null
@@ -1,326 +0,0 @@
1/*
2 * drivers/video/tx3912fb.c
3 *
4 * Copyright (C) 1999 Harald Koerfgen
5 * Copyright (C) 2001 Steven Hill (sjhill@realitydiluted.com)
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
9 * more details.
10 *
11 * Framebuffer for LCD controller in TMPR3912/05 and PR31700 processors
12 */
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/errno.h>
16#include <linux/string.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19#include <linux/init.h>
20#include <linux/pm.h>
21#include <linux/fb.h>
22#include <asm/io.h>
23#include <asm/bootinfo.h>
24#include <asm/uaccess.h>
25#include <asm/tx3912.h>
26#include <video/tx3912.h>
27
28/*
29 * Frame buffer, palette and console structures
30 */
31static struct fb_info fb_info;
32static u32 cfb8[16];
33
34static struct fb_fix_screeninfo tx3912fb_fix __initdata = {
35 .id = "tx3912fb",
36 .smem_len = ((240 * 320)/2),
37 .type = FB_TYPE_PACKED_PIXELS,
38 .visual = FB_VISUAL_TRUECOLOR,
39 .xpanstep = 1,
40 .ypanstep = 1,
41 .ywrapstep = 1,
42 .accel = FB_ACCEL_NONE,
43};
44
45static struct fb_var_screeninfo tx3912fb_var = {
46 .xres = 240,
47 .yres = 320,
48 .xres_virtual = 240,
49 .yres_virtual = 320,
50 .bits_per_pixel =4,
51 .red = { 0, 4, 0 }, /* ??? */
52 .green = { 0, 4, 0 },
53 .blue = { 0, 4, 0 },
54 .activate = FB_ACTIVATE_NOW,
55 .width = -1,
56 .height = -1,
57 .pixclock = 20000,
58 .left_margin = 64,
59 .right_margin = 64,
60 .upper_margin = 32,
61 .lower_margin = 32,
62 .hsync_len = 64,
63 .vsync_len = 2,
64 .vmode = FB_VMODE_NONINTERLACED,
65};
66
67/*
68 * Interface used by the world
69 */
70int tx3912fb_init(void);
71
72static int tx3912fb_setcolreg(u_int regno, u_int red, u_int green,
73 u_int blue, u_int transp,
74 struct fb_info *info);
75
76/*
77 * Macros
78 */
79#define get_line_length(xres_virtual, bpp) \
80 (u_long) (((int) xres_virtual * (int) bpp + 7) >> 3)
81
82/*
83 * Frame buffer operations structure used by console driver
84 */
85static struct fb_ops tx3912fb_ops = {
86 .owner = THIS_MODULE,
87 .fb_setcolreg = tx3912fb_setcolreg,
88 .fb_fillrect = cfb_fillrect,
89 .fb_copyarea = cfb_copyarea,
90 .fb_imageblit = cfb_imageblit,
91};
92
93static int tx3912fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
94{
95 /*
96 * Memory limit
97 */
98 line_length =
99 get_line_length(var->xres_virtual, var->bits_per_pixel);
100 if ((line_length * var->yres_virtual) > info->fix.smem_len)
101 return -ENOMEM;
102
103 return 0;
104}
105
106static int tx3912fb_set_par(struct fb_info *info)
107{
108 u_long tx3912fb_paddr = 0;
109
110 /* Disable the video logic */
111 outl(inl(TX3912_VIDEO_CTRL1) &
112 ~(TX3912_VIDEO_CTRL1_ENVID | TX3912_VIDEO_CTRL1_DISPON),
113 TX3912_VIDEO_CTRL1);
114 udelay(200);
115
116 /* Set start address for DMA transfer */
117 outl(tx3912fb_paddr, TX3912_VIDEO_CTRL3);
118
119 /* Set end address for DMA transfer */
120 outl((tx3912fb_paddr + tx3912fb_fix.smem_len + 1), TX3912_VIDEO_CTRL4);
121
122 /* Set the pixel depth */
123 switch (info->var.bits_per_pixel) {
124 case 1:
125 /* Monochrome */
126 outl(inl(TX3912_VIDEO_CTRL1) &
127 ~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
128 info->fix.visual = FB_VISUAL_MONO10;
129 break;
130 case 4:
131 /* 4-bit gray */
132 outl(inl(TX3912_VIDEO_CTRL1) &
133 ~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
134 outl(inl(TX3912_VIDEO_CTRL1) |
135 TX3912_VIDEO_CTRL1_BITSEL_4BIT_GRAY,
136 TX3912_VIDEO_CTRL1);
137 info->fix.visual = FB_VISUAL_TRUECOLOR;
138 break;
139 case 8:
140 /* 8-bit color */
141 outl(inl(TX3912_VIDEO_CTRL1) &
142 ~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
143 outl(inl(TX3912_VIDEO_CTRL1) |
144 TX3912_VIDEO_CTRL1_BITSEL_8BIT_COLOR,
145 TX3912_VIDEO_CTRL1);
146 info->fix.visual = FB_VISUAL_TRUECOLOR;
147 break;
148 case 2:
149 default:
150 /* 2-bit gray */
151 outl(inl(TX3912_VIDEO_CTRL1) &
152 ~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
153 outl(inl(TX3912_VIDEO_CTRL1) |
154 TX3912_VIDEO_CTRL1_BITSEL_2BIT_GRAY,
155 TX3912_VIDEO_CTRL1);
156 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
157 break;
158 }
159
160 /* Enable the video clock */
161 outl(inl(TX3912_CLK_CTRL) | TX3912_CLK_CTRL_ENVIDCLK,
162 TX3912_CLK_CTRL);
163
164 /* Unfreeze video logic and enable DF toggle */
165 outl(inl(TX3912_VIDEO_CTRL1) &
166 ~(TX3912_VIDEO_CTRL1_ENFREEZEFRAME |
167 TX3912_VIDEO_CTRL1_DFMODE)
168 , TX3912_VIDEO_CTRL1);
169 udelay(200);
170
171 /* Enable the video logic */
172 outl(inl(TX3912_VIDEO_CTRL1) |
173 (TX3912_VIDEO_CTRL1_ENVID | TX3912_VIDEO_CTRL1_DISPON),
174 TX3912_VIDEO_CTRL1);
175
176 info->fix.line_length = get_line_length(var->xres_virtual,
177 var->bits_per_pixel);
178}
179
180/*
181 * Set a single color register
182 */
183static int tx3912fb_setcolreg(u_int regno, u_int red, u_int green,
184 u_int blue, u_int transp,
185 struct fb_info *info)
186{
187 if (regno > 255)
188 return 1;
189
190 if (regno < 16)
191 ((u32 *)(info->pseudo_palette))[regno] = ((red & 0xe000) >> 8)
192 | ((green & 0xe000) >> 11)
193 | ((blue & 0xc000) >> 14);
194 return 0;
195}
196
197int __init tx3912fb_setup(char *options);
198
199/*
200 * Initialization of the framebuffer
201 */
202int __init tx3912fb_init(void)
203{
204 u_long tx3912fb_paddr = 0;
205 int size = (info->var.bits_per_pixel == 8) ? 256 : 16;
206 char *option = NULL;
207
208 if (fb_get_options("tx3912fb", &option))
209 return -ENODEV;
210 tx3912fb_setup(option);
211
212 /* Disable the video logic */
213 outl(inl(TX3912_VIDEO_CTRL1) &
214 ~(TX3912_VIDEO_CTRL1_ENVID | TX3912_VIDEO_CTRL1_DISPON),
215 TX3912_VIDEO_CTRL1);
216 udelay(200);
217
218 /* Set start address for DMA transfer */
219 outl(tx3912fb_paddr, TX3912_VIDEO_CTRL3);
220
221 /* Set end address for DMA transfer */
222 outl((tx3912fb_paddr + tx3912fb_fix.smem_len + 1), TX3912_VIDEO_CTRL4);
223
224 /* Set the pixel depth */
225 switch (tx3912fb_var.bits_per_pixel) {
226 case 1:
227 /* Monochrome */
228 outl(inl(TX3912_VIDEO_CTRL1) &
229 ~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
230 tx3912fb_fix.visual = FB_VISUAL_MONO10;
231 break;
232 case 4:
233 /* 4-bit gray */
234 outl(inl(TX3912_VIDEO_CTRL1) &
235 ~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
236 outl(inl(TX3912_VIDEO_CTRL1) |
237 TX3912_VIDEO_CTRL1_BITSEL_4BIT_GRAY,
238 TX3912_VIDEO_CTRL1);
239 tx3912fb_fix.visual = FB_VISUAL_TRUECOLOR;
240 tx3912fb_fix.grayscale = 1;
241 break;
242 case 8:
243 /* 8-bit color */
244 outl(inl(TX3912_VIDEO_CTRL1) &
245 ~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
246 outl(inl(TX3912_VIDEO_CTRL1) |
247 TX3912_VIDEO_CTRL1_BITSEL_8BIT_COLOR,
248 TX3912_VIDEO_CTRL1);
249 tx3912fb_fix.visual = FB_VISUAL_TRUECOLOR;
250 break;
251 case 2:
252 default:
253 /* 2-bit gray */
254 outl(inl(TX3912_VIDEO_CTRL1) &
255 ~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
256 outl(inl(TX3912_VIDEO_CTRL1) |
257 TX3912_VIDEO_CTRL1_BITSEL_2BIT_GRAY,
258 TX3912_VIDEO_CTRL1);
259 tx3912fb_fix.visual = FB_VISUAL_PSEUDOCOLOR;
260 tx3912fb_fix.grayscale = 1;
261 break;
262 }
263
264 /* Enable the video clock */
265 outl(inl(TX3912_CLK_CTRL) | TX3912_CLK_CTRL_ENVIDCLK,
266 TX3912_CLK_CTRL);
267
268 /* Unfreeze video logic and enable DF toggle */
269 outl(inl(TX3912_VIDEO_CTRL1) &
270 ~(TX3912_VIDEO_CTRL1_ENFREEZEFRAME | TX3912_VIDEO_CTRL1_DFMODE),
271 TX3912_VIDEO_CTRL1);
272 udelay(200);
273
274 /* Clear the framebuffer */
275 memset((void *) tx3912fb_fix.smem_start, 0xff, tx3912fb_fix.smem_len);
276 udelay(200);
277
278 /* Enable the video logic */
279 outl(inl(TX3912_VIDEO_CTRL1) |
280 (TX3912_VIDEO_CTRL1_ENVID | TX3912_VIDEO_CTRL1_DISPON),
281 TX3912_VIDEO_CTRL1);
282
283 /*
284 * Memory limit
285 */
286 tx3912fb_fix.line_length =
287 get_line_length(tx3912fb_var.xres_virtual, tx3912fb_var.bits_per_pixel);
288 if ((tx3912fb_fix.line_length * tx3912fb_var.yres_virtual) > tx3912fb_fix.smem_len)
289 return -ENOMEM;
290
291 fb_info.fbops = &tx3912fb_ops;
292 fb_info.var = tx3912fb_var;
293 fb_info.fix = tx3912fb_fix;
294 fb_info.pseudo_palette = cfb8;
295 fb_info.flags = FBINFO_DEFAULT;
296
297 /* Clear the framebuffer */
298 memset((void *) fb_info.fix.smem_start, 0xff, fb_info.fix.smem_len);
299 udelay(200);
300
301 fb_alloc_cmap(&info->cmap, size, 0);
302
303 if (register_framebuffer(&fb_info) < 0)
304 return -1;
305
306 printk(KERN_INFO "fb%d: TX3912 frame buffer using %uKB.\n",
307 fb_info.node, (u_int) (fb_info.fix.smem_len >> 10));
308 return 0;
309}
310
311int __init tx3912fb_setup(char *options)
312{
313 char *this_opt;
314
315 if (!options || !*options)
316 return 0;
317
318 while ((this_opt = strsep(&options, ","))) {
319 if (!strncmp(options, "bpp:", 4))
320 tx3912fb_var.bits_per_pixel = simple_strtoul(options+4, NULL, 0);
321 }
322 return 0;
323}
324
325module_init(tx3912fb_init);
326MODULE_LICENSE("GPL");
diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
index 1d29a89a86b4..6ef9733a18d4 100644
--- a/drivers/video/xilinxfb.c
+++ b/drivers/video/xilinxfb.c
@@ -79,7 +79,7 @@
79/* 79/*
80 * Here are the default fb_fix_screeninfo and fb_var_screeninfo structures 80 * Here are the default fb_fix_screeninfo and fb_var_screeninfo structures
81 */ 81 */
82static struct fb_fix_screeninfo xilinx_fb_fix __initdata = { 82static struct fb_fix_screeninfo xilinx_fb_fix = {
83 .id = "Xilinx", 83 .id = "Xilinx",
84 .type = FB_TYPE_PACKED_PIXELS, 84 .type = FB_TYPE_PACKED_PIXELS,
85 .visual = FB_VISUAL_TRUECOLOR, 85 .visual = FB_VISUAL_TRUECOLOR,
@@ -88,7 +88,7 @@ static struct fb_fix_screeninfo xilinx_fb_fix __initdata = {
88 .accel = FB_ACCEL_NONE 88 .accel = FB_ACCEL_NONE
89}; 89};
90 90
91static struct fb_var_screeninfo xilinx_fb_var __initdata = { 91static struct fb_var_screeninfo xilinx_fb_var = {
92 .xres = XRES, 92 .xres = XRES,
93 .yres = YRES, 93 .yres = YRES,
94 .xres_virtual = XRES_VIRTUAL, 94 .xres_virtual = XRES_VIRTUAL,
@@ -212,11 +212,6 @@ xilinxfb_drv_probe(struct device *dev)
212 pdev = to_platform_device(dev); 212 pdev = to_platform_device(dev);
213 pdata = pdev->dev.platform_data; 213 pdata = pdev->dev.platform_data;
214 214
215 if (pdata == NULL) {
216 printk(KERN_ERR "Couldn't find platform data.\n");
217 return -EFAULT;
218 }
219
220 drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL); 215 drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
221 if (!drvdata) { 216 if (!drvdata) {
222 printk(KERN_ERR "Couldn't allocate device private record\n"); 217 printk(KERN_ERR "Couldn't allocate device private record\n");
@@ -258,11 +253,9 @@ xilinxfb_drv_probe(struct device *dev)
258 xilinx_fb_out_be32(drvdata, REG_FB_ADDR, drvdata->fb_phys); 253 xilinx_fb_out_be32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
259 254
260 /* Turn on the display */ 255 /* Turn on the display */
261 if (pdata->rotate_screen) { 256 drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
262 drvdata->reg_ctrl_default = REG_CTRL_ENABLE | REG_CTRL_ROTATE; 257 if (pdata && pdata->rotate_screen)
263 } else { 258 drvdata->reg_ctrl_default |= REG_CTRL_ROTATE;
264 drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
265 }
266 xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default); 259 xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
267 260
268 /* Fill struct fb_info */ 261 /* Fill struct fb_info */
@@ -281,8 +274,10 @@ xilinxfb_drv_probe(struct device *dev)
281 } 274 }
282 275
283 drvdata->info.flags = FBINFO_DEFAULT; 276 drvdata->info.flags = FBINFO_DEFAULT;
284 xilinx_fb_var.height = pdata->screen_height_mm; 277 if (pdata) {
285 xilinx_fb_var.width = pdata->screen_width_mm; 278 xilinx_fb_var.height = pdata->screen_height_mm;
279 xilinx_fb_var.width = pdata->screen_width_mm;
280 }
286 drvdata->info.var = xilinx_fb_var; 281 drvdata->info.var = xilinx_fb_var;
287 282
288 /* Register new frame buffer */ 283 /* Register new frame buffer */