diff options
Diffstat (limited to 'drivers')
34 files changed, 730 insertions, 362 deletions
diff --git a/drivers/isdn/i4l/isdn_net.h b/drivers/isdn/i4l/isdn_net.h index 74032d0881ef..7511f08effa5 100644 --- a/drivers/isdn/i4l/isdn_net.h +++ b/drivers/isdn/i4l/isdn_net.h | |||
@@ -83,19 +83,19 @@ static __inline__ isdn_net_local * isdn_net_get_locked_lp(isdn_net_dev *nd) | |||
83 | 83 | ||
84 | spin_lock_irqsave(&nd->queue_lock, flags); | 84 | spin_lock_irqsave(&nd->queue_lock, flags); |
85 | lp = nd->queue; /* get lp on top of queue */ | 85 | lp = nd->queue; /* get lp on top of queue */ |
86 | spin_lock(&nd->queue->xmit_lock); | ||
87 | while (isdn_net_lp_busy(nd->queue)) { | 86 | while (isdn_net_lp_busy(nd->queue)) { |
88 | spin_unlock(&nd->queue->xmit_lock); | ||
89 | nd->queue = nd->queue->next; | 87 | nd->queue = nd->queue->next; |
90 | if (nd->queue == lp) { /* not found -- should never happen */ | 88 | if (nd->queue == lp) { /* not found -- should never happen */ |
91 | lp = NULL; | 89 | lp = NULL; |
92 | goto errout; | 90 | goto errout; |
93 | } | 91 | } |
94 | spin_lock(&nd->queue->xmit_lock); | ||
95 | } | 92 | } |
96 | lp = nd->queue; | 93 | lp = nd->queue; |
97 | nd->queue = nd->queue->next; | 94 | nd->queue = nd->queue->next; |
95 | spin_unlock_irqrestore(&nd->queue_lock, flags); | ||
96 | spin_lock(&lp->xmit_lock); | ||
98 | local_bh_disable(); | 97 | local_bh_disable(); |
98 | return lp; | ||
99 | errout: | 99 | errout: |
100 | spin_unlock_irqrestore(&nd->queue_lock, flags); | 100 | spin_unlock_irqrestore(&nd->queue_lock, flags); |
101 | return lp; | 101 | return lp; |
diff --git a/drivers/net/au1000_eth.c b/drivers/net/au1000_eth.c index 04f63c77071d..ce6f1ac25df8 100644 --- a/drivers/net/au1000_eth.c +++ b/drivers/net/au1000_eth.c | |||
@@ -34,6 +34,7 @@ | |||
34 | * | 34 | * |
35 | * | 35 | * |
36 | */ | 36 | */ |
37 | #include <linux/capability.h> | ||
37 | #include <linux/dma-mapping.h> | 38 | #include <linux/dma-mapping.h> |
38 | #include <linux/module.h> | 39 | #include <linux/module.h> |
39 | #include <linux/kernel.h> | 40 | #include <linux/kernel.h> |
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index 6c7f795d12de..a4d83409f205 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h | |||
@@ -361,9 +361,12 @@ struct l2_fhdr { | |||
361 | #define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE (1<<28) | 361 | #define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE (1<<28) |
362 | 362 | ||
363 | #define BNX2_L2CTX_HOST_BDIDX 0x00000004 | 363 | #define BNX2_L2CTX_HOST_BDIDX 0x00000004 |
364 | #define BNX2_L2CTX_STATUSB_NUM_SHIFT 16 | 364 | #define BNX2_L2CTX_L5_STATUSB_NUM_SHIFT 16 |
365 | #define BNX2_L2CTX_STATUSB_NUM(sb_id) \ | 365 | #define BNX2_L2CTX_L2_STATUSB_NUM_SHIFT 24 |
366 | (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_STATUSB_NUM_SHIFT) : 0) | 366 | #define BNX2_L2CTX_L5_STATUSB_NUM(sb_id) \ |
367 | (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_L5_STATUSB_NUM_SHIFT) : 0) | ||
368 | #define BNX2_L2CTX_L2_STATUSB_NUM(sb_id) \ | ||
369 | (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT) : 0) | ||
367 | #define BNX2_L2CTX_HOST_BSEQ 0x00000008 | 370 | #define BNX2_L2CTX_HOST_BSEQ 0x00000008 |
368 | #define BNX2_L2CTX_NX_BSEQ 0x0000000c | 371 | #define BNX2_L2CTX_NX_BSEQ 0x0000000c |
369 | #define BNX2_L2CTX_NX_BDHADDR_HI 0x00000010 | 372 | #define BNX2_L2CTX_NX_BDHADDR_HI 0x00000010 |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index 69c5b15e22da..40fb5eefc72e 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -691,7 +691,7 @@ static int bond_check_dev_link(struct bonding *bond, | |||
691 | struct net_device *slave_dev, int reporting) | 691 | struct net_device *slave_dev, int reporting) |
692 | { | 692 | { |
693 | const struct net_device_ops *slave_ops = slave_dev->netdev_ops; | 693 | const struct net_device_ops *slave_ops = slave_dev->netdev_ops; |
694 | static int (*ioctl)(struct net_device *, struct ifreq *, int); | 694 | int (*ioctl)(struct net_device *, struct ifreq *, int); |
695 | struct ifreq ifr; | 695 | struct ifreq ifr; |
696 | struct mii_ioctl_data *mii; | 696 | struct mii_ioctl_data *mii; |
697 | 697 | ||
@@ -3665,10 +3665,10 @@ static int bond_xmit_hash_policy_l23(struct sk_buff *skb, | |||
3665 | 3665 | ||
3666 | if (skb->protocol == htons(ETH_P_IP)) { | 3666 | if (skb->protocol == htons(ETH_P_IP)) { |
3667 | return ((ntohl(iph->saddr ^ iph->daddr) & 0xffff) ^ | 3667 | return ((ntohl(iph->saddr ^ iph->daddr) & 0xffff) ^ |
3668 | (data->h_dest[5] ^ bond_dev->dev_addr[5])) % count; | 3668 | (data->h_dest[5] ^ data->h_source[5])) % count; |
3669 | } | 3669 | } |
3670 | 3670 | ||
3671 | return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; | 3671 | return (data->h_dest[5] ^ data->h_source[5]) % count; |
3672 | } | 3672 | } |
3673 | 3673 | ||
3674 | /* | 3674 | /* |
@@ -3695,7 +3695,7 @@ static int bond_xmit_hash_policy_l34(struct sk_buff *skb, | |||
3695 | 3695 | ||
3696 | } | 3696 | } |
3697 | 3697 | ||
3698 | return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; | 3698 | return (data->h_dest[5] ^ data->h_source[5]) % count; |
3699 | } | 3699 | } |
3700 | 3700 | ||
3701 | /* | 3701 | /* |
@@ -3706,7 +3706,7 @@ static int bond_xmit_hash_policy_l2(struct sk_buff *skb, | |||
3706 | { | 3706 | { |
3707 | struct ethhdr *data = (struct ethhdr *)skb->data; | 3707 | struct ethhdr *data = (struct ethhdr *)skb->data; |
3708 | 3708 | ||
3709 | return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; | 3709 | return (data->h_dest[5] ^ data->h_source[5]) % count; |
3710 | } | 3710 | } |
3711 | 3711 | ||
3712 | /*-------------------------- Device entry points ----------------------------*/ | 3712 | /*-------------------------- Device entry points ----------------------------*/ |
diff --git a/drivers/net/cnic.c b/drivers/net/cnic.c index 46c87ec7960c..3bf1b04f2cab 100644 --- a/drivers/net/cnic.c +++ b/drivers/net/cnic.c | |||
@@ -2264,9 +2264,9 @@ static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev) | |||
2264 | cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val); | 2264 | cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val); |
2265 | 2265 | ||
2266 | if (sb_id == 0) | 2266 | if (sb_id == 0) |
2267 | val = 2 << BNX2_L2CTX_STATUSB_NUM_SHIFT; | 2267 | val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT; |
2268 | else | 2268 | else |
2269 | val = BNX2_L2CTX_STATUSB_NUM(sb_id); | 2269 | val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id); |
2270 | cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val); | 2270 | cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val); |
2271 | 2271 | ||
2272 | rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE); | 2272 | rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE); |
@@ -2423,7 +2423,7 @@ static int cnic_start_bnx2_hw(struct cnic_dev *dev) | |||
2423 | cp->int_num = 0; | 2423 | cp->int_num = 0; |
2424 | if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { | 2424 | if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { |
2425 | u32 sb_id = cp->status_blk_num; | 2425 | u32 sb_id = cp->status_blk_num; |
2426 | u32 sb = BNX2_L2CTX_STATUSB_NUM(sb_id); | 2426 | u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id); |
2427 | 2427 | ||
2428 | cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT; | 2428 | cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT; |
2429 | cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb); | 2429 | cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb); |
diff --git a/drivers/net/dm9000.h b/drivers/net/dm9000.h index 80817c2edfb3..fb1c924d79b4 100644 --- a/drivers/net/dm9000.h +++ b/drivers/net/dm9000.h | |||
@@ -50,7 +50,7 @@ | |||
50 | #define DM9000_RCSR 0x32 | 50 | #define DM9000_RCSR 0x32 |
51 | 51 | ||
52 | #define CHIPR_DM9000A 0x19 | 52 | #define CHIPR_DM9000A 0x19 |
53 | #define CHIPR_DM9000B 0x1B | 53 | #define CHIPR_DM9000B 0x1A |
54 | 54 | ||
55 | #define DM9000_MRCMDX 0xF0 | 55 | #define DM9000_MRCMDX 0xF0 |
56 | #define DM9000_MRCMD 0xF2 | 56 | #define DM9000_MRCMD 0xF2 |
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h index 981936c1fb46..405a144ebcad 100644 --- a/drivers/net/e1000e/e1000.h +++ b/drivers/net/e1000e/e1000.h | |||
@@ -519,9 +519,13 @@ extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw); | |||
519 | extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw); | 519 | extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw); |
520 | extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw); | 520 | extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw); |
521 | extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data); | 521 | extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data); |
522 | extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, | ||
523 | u16 *data); | ||
522 | extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw); | 524 | extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw); |
523 | extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active); | 525 | extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active); |
524 | extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data); | 526 | extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data); |
527 | extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, | ||
528 | u16 data); | ||
525 | extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw); | 529 | extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw); |
526 | extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw); | 530 | extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw); |
527 | extern s32 e1000e_get_cfg_done(struct e1000_hw *hw); | 531 | extern s32 e1000e_get_cfg_done(struct e1000_hw *hw); |
@@ -538,7 +542,11 @@ extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data); | |||
538 | extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data); | 542 | extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data); |
539 | extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); | 543 | extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); |
540 | extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); | 544 | extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); |
545 | extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, | ||
546 | u16 data); | ||
541 | extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); | 547 | extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); |
548 | extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, | ||
549 | u16 *data); | ||
542 | extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, | 550 | extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, |
543 | u32 usec_interval, bool *success); | 551 | u32 usec_interval, bool *success); |
544 | extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw); | 552 | extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw); |
@@ -546,7 +554,11 @@ extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data); | |||
546 | extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); | 554 | extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); |
547 | extern s32 e1000e_check_downshift(struct e1000_hw *hw); | 555 | extern s32 e1000e_check_downshift(struct e1000_hw *hw); |
548 | extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data); | 556 | extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data); |
557 | extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, | ||
558 | u16 *data); | ||
549 | extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); | 559 | extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); |
560 | extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, | ||
561 | u16 data); | ||
550 | extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow); | 562 | extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow); |
551 | extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); | 563 | extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); |
552 | extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); | 564 | extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); |
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h index fd44d9f90769..7b05cf47f7f5 100644 --- a/drivers/net/e1000e/hw.h +++ b/drivers/net/e1000e/hw.h | |||
@@ -764,11 +764,13 @@ struct e1000_phy_operations { | |||
764 | s32 (*get_cable_length)(struct e1000_hw *); | 764 | s32 (*get_cable_length)(struct e1000_hw *); |
765 | s32 (*get_phy_info)(struct e1000_hw *); | 765 | s32 (*get_phy_info)(struct e1000_hw *); |
766 | s32 (*read_phy_reg)(struct e1000_hw *, u32, u16 *); | 766 | s32 (*read_phy_reg)(struct e1000_hw *, u32, u16 *); |
767 | s32 (*read_phy_reg_locked)(struct e1000_hw *, u32, u16 *); | ||
767 | void (*release_phy)(struct e1000_hw *); | 768 | void (*release_phy)(struct e1000_hw *); |
768 | s32 (*reset_phy)(struct e1000_hw *); | 769 | s32 (*reset_phy)(struct e1000_hw *); |
769 | s32 (*set_d0_lplu_state)(struct e1000_hw *, bool); | 770 | s32 (*set_d0_lplu_state)(struct e1000_hw *, bool); |
770 | s32 (*set_d3_lplu_state)(struct e1000_hw *, bool); | 771 | s32 (*set_d3_lplu_state)(struct e1000_hw *, bool); |
771 | s32 (*write_phy_reg)(struct e1000_hw *, u32, u16); | 772 | s32 (*write_phy_reg)(struct e1000_hw *, u32, u16); |
773 | s32 (*write_phy_reg_locked)(struct e1000_hw *, u32, u16); | ||
772 | s32 (*cfg_on_link_up)(struct e1000_hw *); | 774 | s32 (*cfg_on_link_up)(struct e1000_hw *); |
773 | }; | 775 | }; |
774 | 776 | ||
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index 99df2abf82a9..b6388b9535fd 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c | |||
@@ -122,6 +122,13 @@ | |||
122 | 122 | ||
123 | #define HV_LED_CONFIG PHY_REG(768, 30) /* LED Configuration */ | 123 | #define HV_LED_CONFIG PHY_REG(768, 30) /* LED Configuration */ |
124 | 124 | ||
125 | #define SW_FLAG_TIMEOUT 1000 /* SW Semaphore flag timeout in milliseconds */ | ||
126 | |||
127 | /* OEM Bits Phy Register */ | ||
128 | #define HV_OEM_BITS PHY_REG(768, 25) | ||
129 | #define HV_OEM_BITS_LPLU 0x0004 /* Low Power Link Up */ | ||
130 | #define HV_OEM_BITS_RESTART_AN 0x0400 /* Restart Auto-negotiation */ | ||
131 | |||
125 | /* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ | 132 | /* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ |
126 | /* Offset 04h HSFSTS */ | 133 | /* Offset 04h HSFSTS */ |
127 | union ich8_hws_flash_status { | 134 | union ich8_hws_flash_status { |
@@ -200,6 +207,7 @@ static s32 e1000_setup_led_pchlan(struct e1000_hw *hw); | |||
200 | static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw); | 207 | static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw); |
201 | static s32 e1000_led_on_pchlan(struct e1000_hw *hw); | 208 | static s32 e1000_led_on_pchlan(struct e1000_hw *hw); |
202 | static s32 e1000_led_off_pchlan(struct e1000_hw *hw); | 209 | static s32 e1000_led_off_pchlan(struct e1000_hw *hw); |
210 | static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active); | ||
203 | 211 | ||
204 | static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) | 212 | static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) |
205 | { | 213 | { |
@@ -242,7 +250,11 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) | |||
242 | 250 | ||
243 | phy->ops.check_polarity = e1000_check_polarity_ife_ich8lan; | 251 | phy->ops.check_polarity = e1000_check_polarity_ife_ich8lan; |
244 | phy->ops.read_phy_reg = e1000_read_phy_reg_hv; | 252 | phy->ops.read_phy_reg = e1000_read_phy_reg_hv; |
253 | phy->ops.read_phy_reg_locked = e1000_read_phy_reg_hv_locked; | ||
254 | phy->ops.set_d0_lplu_state = e1000_set_lplu_state_pchlan; | ||
255 | phy->ops.set_d3_lplu_state = e1000_set_lplu_state_pchlan; | ||
245 | phy->ops.write_phy_reg = e1000_write_phy_reg_hv; | 256 | phy->ops.write_phy_reg = e1000_write_phy_reg_hv; |
257 | phy->ops.write_phy_reg_locked = e1000_write_phy_reg_hv_locked; | ||
246 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; | 258 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; |
247 | 259 | ||
248 | phy->id = e1000_phy_unknown; | 260 | phy->id = e1000_phy_unknown; |
@@ -303,6 +315,8 @@ static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw) | |||
303 | case IGP03E1000_E_PHY_ID: | 315 | case IGP03E1000_E_PHY_ID: |
304 | phy->type = e1000_phy_igp_3; | 316 | phy->type = e1000_phy_igp_3; |
305 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; | 317 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; |
318 | phy->ops.read_phy_reg_locked = e1000e_read_phy_reg_igp_locked; | ||
319 | phy->ops.write_phy_reg_locked = e1000e_write_phy_reg_igp_locked; | ||
306 | break; | 320 | break; |
307 | case IFE_E_PHY_ID: | 321 | case IFE_E_PHY_ID: |
308 | case IFE_PLUS_E_PHY_ID: | 322 | case IFE_PLUS_E_PHY_ID: |
@@ -568,12 +582,39 @@ static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter) | |||
568 | static DEFINE_MUTEX(nvm_mutex); | 582 | static DEFINE_MUTEX(nvm_mutex); |
569 | 583 | ||
570 | /** | 584 | /** |
585 | * e1000_acquire_nvm_ich8lan - Acquire NVM mutex | ||
586 | * @hw: pointer to the HW structure | ||
587 | * | ||
588 | * Acquires the mutex for performing NVM operations. | ||
589 | **/ | ||
590 | static s32 e1000_acquire_nvm_ich8lan(struct e1000_hw *hw) | ||
591 | { | ||
592 | mutex_lock(&nvm_mutex); | ||
593 | |||
594 | return 0; | ||
595 | } | ||
596 | |||
597 | /** | ||
598 | * e1000_release_nvm_ich8lan - Release NVM mutex | ||
599 | * @hw: pointer to the HW structure | ||
600 | * | ||
601 | * Releases the mutex used while performing NVM operations. | ||
602 | **/ | ||
603 | static void e1000_release_nvm_ich8lan(struct e1000_hw *hw) | ||
604 | { | ||
605 | mutex_unlock(&nvm_mutex); | ||
606 | |||
607 | return; | ||
608 | } | ||
609 | |||
610 | static DEFINE_MUTEX(swflag_mutex); | ||
611 | |||
612 | /** | ||
571 | * e1000_acquire_swflag_ich8lan - Acquire software control flag | 613 | * e1000_acquire_swflag_ich8lan - Acquire software control flag |
572 | * @hw: pointer to the HW structure | 614 | * @hw: pointer to the HW structure |
573 | * | 615 | * |
574 | * Acquires the software control flag for performing NVM and PHY | 616 | * Acquires the software control flag for performing PHY and select |
575 | * operations. This is a function pointer entry point only called by | 617 | * MAC CSR accesses. |
576 | * read/write routines for the PHY and NVM parts. | ||
577 | **/ | 618 | **/ |
578 | static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) | 619 | static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) |
579 | { | 620 | { |
@@ -582,7 +623,7 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) | |||
582 | 623 | ||
583 | might_sleep(); | 624 | might_sleep(); |
584 | 625 | ||
585 | mutex_lock(&nvm_mutex); | 626 | mutex_lock(&swflag_mutex); |
586 | 627 | ||
587 | while (timeout) { | 628 | while (timeout) { |
588 | extcnf_ctrl = er32(EXTCNF_CTRL); | 629 | extcnf_ctrl = er32(EXTCNF_CTRL); |
@@ -599,7 +640,7 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) | |||
599 | goto out; | 640 | goto out; |
600 | } | 641 | } |
601 | 642 | ||
602 | timeout = PHY_CFG_TIMEOUT * 2; | 643 | timeout = SW_FLAG_TIMEOUT; |
603 | 644 | ||
604 | extcnf_ctrl |= E1000_EXTCNF_CTRL_SWFLAG; | 645 | extcnf_ctrl |= E1000_EXTCNF_CTRL_SWFLAG; |
605 | ew32(EXTCNF_CTRL, extcnf_ctrl); | 646 | ew32(EXTCNF_CTRL, extcnf_ctrl); |
@@ -623,7 +664,7 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) | |||
623 | 664 | ||
624 | out: | 665 | out: |
625 | if (ret_val) | 666 | if (ret_val) |
626 | mutex_unlock(&nvm_mutex); | 667 | mutex_unlock(&swflag_mutex); |
627 | 668 | ||
628 | return ret_val; | 669 | return ret_val; |
629 | } | 670 | } |
@@ -632,9 +673,8 @@ out: | |||
632 | * e1000_release_swflag_ich8lan - Release software control flag | 673 | * e1000_release_swflag_ich8lan - Release software control flag |
633 | * @hw: pointer to the HW structure | 674 | * @hw: pointer to the HW structure |
634 | * | 675 | * |
635 | * Releases the software control flag for performing NVM and PHY operations. | 676 | * Releases the software control flag for performing PHY and select |
636 | * This is a function pointer entry point only called by read/write | 677 | * MAC CSR accesses. |
637 | * routines for the PHY and NVM parts. | ||
638 | **/ | 678 | **/ |
639 | static void e1000_release_swflag_ich8lan(struct e1000_hw *hw) | 679 | static void e1000_release_swflag_ich8lan(struct e1000_hw *hw) |
640 | { | 680 | { |
@@ -644,7 +684,9 @@ static void e1000_release_swflag_ich8lan(struct e1000_hw *hw) | |||
644 | extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG; | 684 | extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG; |
645 | ew32(EXTCNF_CTRL, extcnf_ctrl); | 685 | ew32(EXTCNF_CTRL, extcnf_ctrl); |
646 | 686 | ||
647 | mutex_unlock(&nvm_mutex); | 687 | mutex_unlock(&swflag_mutex); |
688 | |||
689 | return; | ||
648 | } | 690 | } |
649 | 691 | ||
650 | /** | 692 | /** |
@@ -844,7 +886,7 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) | |||
844 | u32 i; | 886 | u32 i; |
845 | u32 data, cnf_size, cnf_base_addr, sw_cfg_mask; | 887 | u32 data, cnf_size, cnf_base_addr, sw_cfg_mask; |
846 | s32 ret_val; | 888 | s32 ret_val; |
847 | u16 word_addr, reg_data, reg_addr, phy_page = 0; | 889 | u16 reg, word_addr, reg_data, reg_addr, phy_page = 0; |
848 | 890 | ||
849 | ret_val = e1000e_phy_hw_reset_generic(hw); | 891 | ret_val = e1000e_phy_hw_reset_generic(hw); |
850 | if (ret_val) | 892 | if (ret_val) |
@@ -859,6 +901,10 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) | |||
859 | return ret_val; | 901 | return ret_val; |
860 | } | 902 | } |
861 | 903 | ||
904 | /* Dummy read to clear the phy wakeup bit after lcd reset */ | ||
905 | if (hw->mac.type == e1000_pchlan) | ||
906 | e1e_rphy(hw, BM_WUC, ®); | ||
907 | |||
862 | /* | 908 | /* |
863 | * Initialize the PHY from the NVM on ICH platforms. This | 909 | * Initialize the PHY from the NVM on ICH platforms. This |
864 | * is needed due to an issue where the NVM configuration is | 910 | * is needed due to an issue where the NVM configuration is |
@@ -1054,6 +1100,38 @@ static s32 e1000_check_polarity_ife_ich8lan(struct e1000_hw *hw) | |||
1054 | } | 1100 | } |
1055 | 1101 | ||
1056 | /** | 1102 | /** |
1103 | * e1000_set_lplu_state_pchlan - Set Low Power Link Up state | ||
1104 | * @hw: pointer to the HW structure | ||
1105 | * @active: true to enable LPLU, false to disable | ||
1106 | * | ||
1107 | * Sets the LPLU state according to the active flag. For PCH, if OEM write | ||
1108 | * bit are disabled in the NVM, writing the LPLU bits in the MAC will not set | ||
1109 | * the phy speed. This function will manually set the LPLU bit and restart | ||
1110 | * auto-neg as hw would do. D3 and D0 LPLU will call the same function | ||
1111 | * since it configures the same bit. | ||
1112 | **/ | ||
1113 | static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active) | ||
1114 | { | ||
1115 | s32 ret_val = 0; | ||
1116 | u16 oem_reg; | ||
1117 | |||
1118 | ret_val = e1e_rphy(hw, HV_OEM_BITS, &oem_reg); | ||
1119 | if (ret_val) | ||
1120 | goto out; | ||
1121 | |||
1122 | if (active) | ||
1123 | oem_reg |= HV_OEM_BITS_LPLU; | ||
1124 | else | ||
1125 | oem_reg &= ~HV_OEM_BITS_LPLU; | ||
1126 | |||
1127 | oem_reg |= HV_OEM_BITS_RESTART_AN; | ||
1128 | ret_val = e1e_wphy(hw, HV_OEM_BITS, oem_reg); | ||
1129 | |||
1130 | out: | ||
1131 | return ret_val; | ||
1132 | } | ||
1133 | |||
1134 | /** | ||
1057 | * e1000_set_d0_lplu_state_ich8lan - Set Low Power Linkup D0 state | 1135 | * e1000_set_d0_lplu_state_ich8lan - Set Low Power Linkup D0 state |
1058 | * @hw: pointer to the HW structure | 1136 | * @hw: pointer to the HW structure |
1059 | * @active: TRUE to enable LPLU, FALSE to disable | 1137 | * @active: TRUE to enable LPLU, FALSE to disable |
@@ -1314,12 +1392,11 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words, | |||
1314 | if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) || | 1392 | if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) || |
1315 | (words == 0)) { | 1393 | (words == 0)) { |
1316 | hw_dbg(hw, "nvm parameter(s) out of bounds\n"); | 1394 | hw_dbg(hw, "nvm parameter(s) out of bounds\n"); |
1317 | return -E1000_ERR_NVM; | 1395 | ret_val = -E1000_ERR_NVM; |
1396 | goto out; | ||
1318 | } | 1397 | } |
1319 | 1398 | ||
1320 | ret_val = e1000_acquire_swflag_ich8lan(hw); | 1399 | nvm->ops.acquire_nvm(hw); |
1321 | if (ret_val) | ||
1322 | goto out; | ||
1323 | 1400 | ||
1324 | ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); | 1401 | ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); |
1325 | if (ret_val) { | 1402 | if (ret_val) { |
@@ -1345,7 +1422,7 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words, | |||
1345 | } | 1422 | } |
1346 | } | 1423 | } |
1347 | 1424 | ||
1348 | e1000_release_swflag_ich8lan(hw); | 1425 | nvm->ops.release_nvm(hw); |
1349 | 1426 | ||
1350 | out: | 1427 | out: |
1351 | if (ret_val) | 1428 | if (ret_val) |
@@ -1603,11 +1680,15 @@ static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words, | |||
1603 | return -E1000_ERR_NVM; | 1680 | return -E1000_ERR_NVM; |
1604 | } | 1681 | } |
1605 | 1682 | ||
1683 | nvm->ops.acquire_nvm(hw); | ||
1684 | |||
1606 | for (i = 0; i < words; i++) { | 1685 | for (i = 0; i < words; i++) { |
1607 | dev_spec->shadow_ram[offset+i].modified = 1; | 1686 | dev_spec->shadow_ram[offset+i].modified = 1; |
1608 | dev_spec->shadow_ram[offset+i].value = data[i]; | 1687 | dev_spec->shadow_ram[offset+i].value = data[i]; |
1609 | } | 1688 | } |
1610 | 1689 | ||
1690 | nvm->ops.release_nvm(hw); | ||
1691 | |||
1611 | return 0; | 1692 | return 0; |
1612 | } | 1693 | } |
1613 | 1694 | ||
@@ -1637,9 +1718,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1637 | if (nvm->type != e1000_nvm_flash_sw) | 1718 | if (nvm->type != e1000_nvm_flash_sw) |
1638 | goto out; | 1719 | goto out; |
1639 | 1720 | ||
1640 | ret_val = e1000_acquire_swflag_ich8lan(hw); | 1721 | nvm->ops.acquire_nvm(hw); |
1641 | if (ret_val) | ||
1642 | goto out; | ||
1643 | 1722 | ||
1644 | /* | 1723 | /* |
1645 | * We're writing to the opposite bank so if we're on bank 1, | 1724 | * We're writing to the opposite bank so if we're on bank 1, |
@@ -1657,7 +1736,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1657 | old_bank_offset = 0; | 1736 | old_bank_offset = 0; |
1658 | ret_val = e1000_erase_flash_bank_ich8lan(hw, 1); | 1737 | ret_val = e1000_erase_flash_bank_ich8lan(hw, 1); |
1659 | if (ret_val) { | 1738 | if (ret_val) { |
1660 | e1000_release_swflag_ich8lan(hw); | 1739 | nvm->ops.release_nvm(hw); |
1661 | goto out; | 1740 | goto out; |
1662 | } | 1741 | } |
1663 | } else { | 1742 | } else { |
@@ -1665,7 +1744,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1665 | new_bank_offset = 0; | 1744 | new_bank_offset = 0; |
1666 | ret_val = e1000_erase_flash_bank_ich8lan(hw, 0); | 1745 | ret_val = e1000_erase_flash_bank_ich8lan(hw, 0); |
1667 | if (ret_val) { | 1746 | if (ret_val) { |
1668 | e1000_release_swflag_ich8lan(hw); | 1747 | nvm->ops.release_nvm(hw); |
1669 | goto out; | 1748 | goto out; |
1670 | } | 1749 | } |
1671 | } | 1750 | } |
@@ -1723,7 +1802,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1723 | if (ret_val) { | 1802 | if (ret_val) { |
1724 | /* Possibly read-only, see e1000e_write_protect_nvm_ich8lan() */ | 1803 | /* Possibly read-only, see e1000e_write_protect_nvm_ich8lan() */ |
1725 | hw_dbg(hw, "Flash commit failed.\n"); | 1804 | hw_dbg(hw, "Flash commit failed.\n"); |
1726 | e1000_release_swflag_ich8lan(hw); | 1805 | nvm->ops.release_nvm(hw); |
1727 | goto out; | 1806 | goto out; |
1728 | } | 1807 | } |
1729 | 1808 | ||
@@ -1736,7 +1815,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1736 | act_offset = new_bank_offset + E1000_ICH_NVM_SIG_WORD; | 1815 | act_offset = new_bank_offset + E1000_ICH_NVM_SIG_WORD; |
1737 | ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data); | 1816 | ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data); |
1738 | if (ret_val) { | 1817 | if (ret_val) { |
1739 | e1000_release_swflag_ich8lan(hw); | 1818 | nvm->ops.release_nvm(hw); |
1740 | goto out; | 1819 | goto out; |
1741 | } | 1820 | } |
1742 | data &= 0xBFFF; | 1821 | data &= 0xBFFF; |
@@ -1744,7 +1823,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1744 | act_offset * 2 + 1, | 1823 | act_offset * 2 + 1, |
1745 | (u8)(data >> 8)); | 1824 | (u8)(data >> 8)); |
1746 | if (ret_val) { | 1825 | if (ret_val) { |
1747 | e1000_release_swflag_ich8lan(hw); | 1826 | nvm->ops.release_nvm(hw); |
1748 | goto out; | 1827 | goto out; |
1749 | } | 1828 | } |
1750 | 1829 | ||
@@ -1757,7 +1836,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1757 | act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1; | 1836 | act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1; |
1758 | ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0); | 1837 | ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0); |
1759 | if (ret_val) { | 1838 | if (ret_val) { |
1760 | e1000_release_swflag_ich8lan(hw); | 1839 | nvm->ops.release_nvm(hw); |
1761 | goto out; | 1840 | goto out; |
1762 | } | 1841 | } |
1763 | 1842 | ||
@@ -1767,7 +1846,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1767 | dev_spec->shadow_ram[i].value = 0xFFFF; | 1846 | dev_spec->shadow_ram[i].value = 0xFFFF; |
1768 | } | 1847 | } |
1769 | 1848 | ||
1770 | e1000_release_swflag_ich8lan(hw); | 1849 | nvm->ops.release_nvm(hw); |
1771 | 1850 | ||
1772 | /* | 1851 | /* |
1773 | * Reload the EEPROM, or else modifications will not appear | 1852 | * Reload the EEPROM, or else modifications will not appear |
@@ -1831,14 +1910,12 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1831 | **/ | 1910 | **/ |
1832 | void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw) | 1911 | void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw) |
1833 | { | 1912 | { |
1913 | struct e1000_nvm_info *nvm = &hw->nvm; | ||
1834 | union ich8_flash_protected_range pr0; | 1914 | union ich8_flash_protected_range pr0; |
1835 | union ich8_hws_flash_status hsfsts; | 1915 | union ich8_hws_flash_status hsfsts; |
1836 | u32 gfpreg; | 1916 | u32 gfpreg; |
1837 | s32 ret_val; | ||
1838 | 1917 | ||
1839 | ret_val = e1000_acquire_swflag_ich8lan(hw); | 1918 | nvm->ops.acquire_nvm(hw); |
1840 | if (ret_val) | ||
1841 | return; | ||
1842 | 1919 | ||
1843 | gfpreg = er32flash(ICH_FLASH_GFPREG); | 1920 | gfpreg = er32flash(ICH_FLASH_GFPREG); |
1844 | 1921 | ||
@@ -1859,7 +1936,7 @@ void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw) | |||
1859 | hsfsts.hsf_status.flockdn = true; | 1936 | hsfsts.hsf_status.flockdn = true; |
1860 | ew32flash(ICH_FLASH_HSFSTS, hsfsts.regval); | 1937 | ew32flash(ICH_FLASH_HSFSTS, hsfsts.regval); |
1861 | 1938 | ||
1862 | e1000_release_swflag_ich8lan(hw); | 1939 | nvm->ops.release_nvm(hw); |
1863 | } | 1940 | } |
1864 | 1941 | ||
1865 | /** | 1942 | /** |
@@ -2229,6 +2306,7 @@ static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw) | |||
2229 | **/ | 2306 | **/ |
2230 | static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | 2307 | static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) |
2231 | { | 2308 | { |
2309 | u16 reg; | ||
2232 | u32 ctrl, icr, kab; | 2310 | u32 ctrl, icr, kab; |
2233 | s32 ret_val; | 2311 | s32 ret_val; |
2234 | 2312 | ||
@@ -2304,6 +2382,9 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | |||
2304 | hw_dbg(hw, "Auto Read Done did not complete\n"); | 2382 | hw_dbg(hw, "Auto Read Done did not complete\n"); |
2305 | } | 2383 | } |
2306 | } | 2384 | } |
2385 | /* Dummy read to clear the phy wakeup bit after lcd reset */ | ||
2386 | if (hw->mac.type == e1000_pchlan) | ||
2387 | e1e_rphy(hw, BM_WUC, ®); | ||
2307 | 2388 | ||
2308 | /* | 2389 | /* |
2309 | * For PCH, this write will make sure that any noise | 2390 | * For PCH, this write will make sure that any noise |
@@ -2843,9 +2924,8 @@ void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw) | |||
2843 | E1000_PHY_CTRL_GBE_DISABLE; | 2924 | E1000_PHY_CTRL_GBE_DISABLE; |
2844 | ew32(PHY_CTRL, phy_ctrl); | 2925 | ew32(PHY_CTRL, phy_ctrl); |
2845 | 2926 | ||
2846 | /* Workaround SWFLAG unexpectedly set during S0->Sx */ | ||
2847 | if (hw->mac.type == e1000_pchlan) | 2927 | if (hw->mac.type == e1000_pchlan) |
2848 | udelay(500); | 2928 | e1000_phy_hw_reset_ich8lan(hw); |
2849 | default: | 2929 | default: |
2850 | break; | 2930 | break; |
2851 | } | 2931 | } |
@@ -3113,9 +3193,9 @@ static struct e1000_phy_operations ich8_phy_ops = { | |||
3113 | }; | 3193 | }; |
3114 | 3194 | ||
3115 | static struct e1000_nvm_operations ich8_nvm_ops = { | 3195 | static struct e1000_nvm_operations ich8_nvm_ops = { |
3116 | .acquire_nvm = e1000_acquire_swflag_ich8lan, | 3196 | .acquire_nvm = e1000_acquire_nvm_ich8lan, |
3117 | .read_nvm = e1000_read_nvm_ich8lan, | 3197 | .read_nvm = e1000_read_nvm_ich8lan, |
3118 | .release_nvm = e1000_release_swflag_ich8lan, | 3198 | .release_nvm = e1000_release_nvm_ich8lan, |
3119 | .update_nvm = e1000_update_nvm_checksum_ich8lan, | 3199 | .update_nvm = e1000_update_nvm_checksum_ich8lan, |
3120 | .valid_led_default = e1000_valid_led_default_ich8lan, | 3200 | .valid_led_default = e1000_valid_led_default_ich8lan, |
3121 | .validate_nvm = e1000_validate_nvm_checksum_ich8lan, | 3201 | .validate_nvm = e1000_validate_nvm_checksum_ich8lan, |
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c index 994401fd0664..f9d33ab05e97 100644 --- a/drivers/net/e1000e/phy.c +++ b/drivers/net/e1000e/phy.c | |||
@@ -164,16 +164,25 @@ s32 e1000e_get_phy_id(struct e1000_hw *hw) | |||
164 | * MDIC mode. No harm in trying again in this case since | 164 | * MDIC mode. No harm in trying again in this case since |
165 | * the PHY ID is unknown at this point anyway | 165 | * the PHY ID is unknown at this point anyway |
166 | */ | 166 | */ |
167 | ret_val = phy->ops.acquire_phy(hw); | ||
168 | if (ret_val) | ||
169 | goto out; | ||
167 | ret_val = e1000_set_mdio_slow_mode_hv(hw, true); | 170 | ret_val = e1000_set_mdio_slow_mode_hv(hw, true); |
168 | if (ret_val) | 171 | if (ret_val) |
169 | goto out; | 172 | goto out; |
173 | phy->ops.release_phy(hw); | ||
170 | 174 | ||
171 | retry_count++; | 175 | retry_count++; |
172 | } | 176 | } |
173 | out: | 177 | out: |
174 | /* Revert to MDIO fast mode, if applicable */ | 178 | /* Revert to MDIO fast mode, if applicable */ |
175 | if (retry_count) | 179 | if (retry_count) { |
180 | ret_val = phy->ops.acquire_phy(hw); | ||
181 | if (ret_val) | ||
182 | return ret_val; | ||
176 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); | 183 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); |
184 | phy->ops.release_phy(hw); | ||
185 | } | ||
177 | 186 | ||
178 | return ret_val; | 187 | return ret_val; |
179 | } | 188 | } |
@@ -354,94 +363,173 @@ s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data) | |||
354 | } | 363 | } |
355 | 364 | ||
356 | /** | 365 | /** |
357 | * e1000e_read_phy_reg_igp - Read igp PHY register | 366 | * __e1000e_read_phy_reg_igp - Read igp PHY register |
358 | * @hw: pointer to the HW structure | 367 | * @hw: pointer to the HW structure |
359 | * @offset: register offset to be read | 368 | * @offset: register offset to be read |
360 | * @data: pointer to the read data | 369 | * @data: pointer to the read data |
370 | * @locked: semaphore has already been acquired or not | ||
361 | * | 371 | * |
362 | * Acquires semaphore, if necessary, then reads the PHY register at offset | 372 | * Acquires semaphore, if necessary, then reads the PHY register at offset |
363 | * and storing the retrieved information in data. Release any acquired | 373 | * and stores the retrieved information in data. Release any acquired |
364 | * semaphores before exiting. | 374 | * semaphores before exiting. |
365 | **/ | 375 | **/ |
366 | s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data) | 376 | static s32 __e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data, |
377 | bool locked) | ||
367 | { | 378 | { |
368 | s32 ret_val; | 379 | s32 ret_val = 0; |
369 | 380 | ||
370 | ret_val = hw->phy.ops.acquire_phy(hw); | 381 | if (!locked) { |
371 | if (ret_val) | 382 | if (!(hw->phy.ops.acquire_phy)) |
372 | return ret_val; | 383 | goto out; |
384 | |||
385 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
386 | if (ret_val) | ||
387 | goto out; | ||
388 | } | ||
373 | 389 | ||
374 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | 390 | if (offset > MAX_PHY_MULTI_PAGE_REG) { |
375 | ret_val = e1000e_write_phy_reg_mdic(hw, | 391 | ret_val = e1000e_write_phy_reg_mdic(hw, |
376 | IGP01E1000_PHY_PAGE_SELECT, | 392 | IGP01E1000_PHY_PAGE_SELECT, |
377 | (u16)offset); | 393 | (u16)offset); |
378 | if (ret_val) { | 394 | if (ret_val) |
379 | hw->phy.ops.release_phy(hw); | 395 | goto release; |
380 | return ret_val; | ||
381 | } | ||
382 | } | 396 | } |
383 | 397 | ||
384 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 398 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
385 | data); | 399 | data); |
386 | |||
387 | hw->phy.ops.release_phy(hw); | ||
388 | 400 | ||
401 | release: | ||
402 | if (!locked) | ||
403 | hw->phy.ops.release_phy(hw); | ||
404 | out: | ||
389 | return ret_val; | 405 | return ret_val; |
390 | } | 406 | } |
391 | 407 | ||
392 | /** | 408 | /** |
409 | * e1000e_read_phy_reg_igp - Read igp PHY register | ||
410 | * @hw: pointer to the HW structure | ||
411 | * @offset: register offset to be read | ||
412 | * @data: pointer to the read data | ||
413 | * | ||
414 | * Acquires semaphore then reads the PHY register at offset and stores the | ||
415 | * retrieved information in data. | ||
416 | * Release the acquired semaphore before exiting. | ||
417 | **/ | ||
418 | s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data) | ||
419 | { | ||
420 | return __e1000e_read_phy_reg_igp(hw, offset, data, false); | ||
421 | } | ||
422 | |||
423 | /** | ||
424 | * e1000e_read_phy_reg_igp_locked - Read igp PHY register | ||
425 | * @hw: pointer to the HW structure | ||
426 | * @offset: register offset to be read | ||
427 | * @data: pointer to the read data | ||
428 | * | ||
429 | * Reads the PHY register at offset and stores the retrieved information | ||
430 | * in data. Assumes semaphore already acquired. | ||
431 | **/ | ||
432 | s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data) | ||
433 | { | ||
434 | return __e1000e_read_phy_reg_igp(hw, offset, data, true); | ||
435 | } | ||
436 | |||
437 | /** | ||
393 | * e1000e_write_phy_reg_igp - Write igp PHY register | 438 | * e1000e_write_phy_reg_igp - Write igp PHY register |
394 | * @hw: pointer to the HW structure | 439 | * @hw: pointer to the HW structure |
395 | * @offset: register offset to write to | 440 | * @offset: register offset to write to |
396 | * @data: data to write at register offset | 441 | * @data: data to write at register offset |
442 | * @locked: semaphore has already been acquired or not | ||
397 | * | 443 | * |
398 | * Acquires semaphore, if necessary, then writes the data to PHY register | 444 | * Acquires semaphore, if necessary, then writes the data to PHY register |
399 | * at the offset. Release any acquired semaphores before exiting. | 445 | * at the offset. Release any acquired semaphores before exiting. |
400 | **/ | 446 | **/ |
401 | s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data) | 447 | static s32 __e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data, |
448 | bool locked) | ||
402 | { | 449 | { |
403 | s32 ret_val; | 450 | s32 ret_val = 0; |
404 | 451 | ||
405 | ret_val = hw->phy.ops.acquire_phy(hw); | 452 | if (!locked) { |
406 | if (ret_val) | 453 | if (!(hw->phy.ops.acquire_phy)) |
407 | return ret_val; | 454 | goto out; |
455 | |||
456 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
457 | if (ret_val) | ||
458 | goto out; | ||
459 | } | ||
408 | 460 | ||
409 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | 461 | if (offset > MAX_PHY_MULTI_PAGE_REG) { |
410 | ret_val = e1000e_write_phy_reg_mdic(hw, | 462 | ret_val = e1000e_write_phy_reg_mdic(hw, |
411 | IGP01E1000_PHY_PAGE_SELECT, | 463 | IGP01E1000_PHY_PAGE_SELECT, |
412 | (u16)offset); | 464 | (u16)offset); |
413 | if (ret_val) { | 465 | if (ret_val) |
414 | hw->phy.ops.release_phy(hw); | 466 | goto release; |
415 | return ret_val; | ||
416 | } | ||
417 | } | 467 | } |
418 | 468 | ||
419 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 469 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
420 | data); | 470 | data); |
421 | 471 | ||
422 | hw->phy.ops.release_phy(hw); | 472 | release: |
473 | if (!locked) | ||
474 | hw->phy.ops.release_phy(hw); | ||
423 | 475 | ||
476 | out: | ||
424 | return ret_val; | 477 | return ret_val; |
425 | } | 478 | } |
426 | 479 | ||
427 | /** | 480 | /** |
428 | * e1000e_read_kmrn_reg - Read kumeran register | 481 | * e1000e_write_phy_reg_igp - Write igp PHY register |
482 | * @hw: pointer to the HW structure | ||
483 | * @offset: register offset to write to | ||
484 | * @data: data to write at register offset | ||
485 | * | ||
486 | * Acquires semaphore then writes the data to PHY register | ||
487 | * at the offset. Release any acquired semaphores before exiting. | ||
488 | **/ | ||
489 | s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data) | ||
490 | { | ||
491 | return __e1000e_write_phy_reg_igp(hw, offset, data, false); | ||
492 | } | ||
493 | |||
494 | /** | ||
495 | * e1000e_write_phy_reg_igp_locked - Write igp PHY register | ||
496 | * @hw: pointer to the HW structure | ||
497 | * @offset: register offset to write to | ||
498 | * @data: data to write at register offset | ||
499 | * | ||
500 | * Writes the data to PHY register at the offset. | ||
501 | * Assumes semaphore already acquired. | ||
502 | **/ | ||
503 | s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data) | ||
504 | { | ||
505 | return __e1000e_write_phy_reg_igp(hw, offset, data, true); | ||
506 | } | ||
507 | |||
508 | /** | ||
509 | * __e1000_read_kmrn_reg - Read kumeran register | ||
429 | * @hw: pointer to the HW structure | 510 | * @hw: pointer to the HW structure |
430 | * @offset: register offset to be read | 511 | * @offset: register offset to be read |
431 | * @data: pointer to the read data | 512 | * @data: pointer to the read data |
513 | * @locked: semaphore has already been acquired or not | ||
432 | * | 514 | * |
433 | * Acquires semaphore, if necessary. Then reads the PHY register at offset | 515 | * Acquires semaphore, if necessary. Then reads the PHY register at offset |
434 | * using the kumeran interface. The information retrieved is stored in data. | 516 | * using the kumeran interface. The information retrieved is stored in data. |
435 | * Release any acquired semaphores before exiting. | 517 | * Release any acquired semaphores before exiting. |
436 | **/ | 518 | **/ |
437 | s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data) | 519 | static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data, |
520 | bool locked) | ||
438 | { | 521 | { |
439 | u32 kmrnctrlsta; | 522 | u32 kmrnctrlsta; |
440 | s32 ret_val; | 523 | s32 ret_val = 0; |
441 | 524 | ||
442 | ret_val = hw->phy.ops.acquire_phy(hw); | 525 | if (!locked) { |
443 | if (ret_val) | 526 | if (!(hw->phy.ops.acquire_phy)) |
444 | return ret_val; | 527 | goto out; |
528 | |||
529 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
530 | if (ret_val) | ||
531 | goto out; | ||
532 | } | ||
445 | 533 | ||
446 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & | 534 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & |
447 | E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN; | 535 | E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN; |
@@ -452,41 +540,111 @@ s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data) | |||
452 | kmrnctrlsta = er32(KMRNCTRLSTA); | 540 | kmrnctrlsta = er32(KMRNCTRLSTA); |
453 | *data = (u16)kmrnctrlsta; | 541 | *data = (u16)kmrnctrlsta; |
454 | 542 | ||
455 | hw->phy.ops.release_phy(hw); | 543 | if (!locked) |
544 | hw->phy.ops.release_phy(hw); | ||
456 | 545 | ||
546 | out: | ||
457 | return ret_val; | 547 | return ret_val; |
458 | } | 548 | } |
459 | 549 | ||
460 | /** | 550 | /** |
461 | * e1000e_write_kmrn_reg - Write kumeran register | 551 | * e1000e_read_kmrn_reg - Read kumeran register |
552 | * @hw: pointer to the HW structure | ||
553 | * @offset: register offset to be read | ||
554 | * @data: pointer to the read data | ||
555 | * | ||
556 | * Acquires semaphore then reads the PHY register at offset using the | ||
557 | * kumeran interface. The information retrieved is stored in data. | ||
558 | * Release the acquired semaphore before exiting. | ||
559 | **/ | ||
560 | s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data) | ||
561 | { | ||
562 | return __e1000_read_kmrn_reg(hw, offset, data, false); | ||
563 | } | ||
564 | |||
565 | /** | ||
566 | * e1000_read_kmrn_reg_locked - Read kumeran register | ||
567 | * @hw: pointer to the HW structure | ||
568 | * @offset: register offset to be read | ||
569 | * @data: pointer to the read data | ||
570 | * | ||
571 | * Reads the PHY register at offset using the kumeran interface. The | ||
572 | * information retrieved is stored in data. | ||
573 | * Assumes semaphore already acquired. | ||
574 | **/ | ||
575 | s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data) | ||
576 | { | ||
577 | return __e1000_read_kmrn_reg(hw, offset, data, true); | ||
578 | } | ||
579 | |||
580 | /** | ||
581 | * __e1000_write_kmrn_reg - Write kumeran register | ||
462 | * @hw: pointer to the HW structure | 582 | * @hw: pointer to the HW structure |
463 | * @offset: register offset to write to | 583 | * @offset: register offset to write to |
464 | * @data: data to write at register offset | 584 | * @data: data to write at register offset |
585 | * @locked: semaphore has already been acquired or not | ||
465 | * | 586 | * |
466 | * Acquires semaphore, if necessary. Then write the data to PHY register | 587 | * Acquires semaphore, if necessary. Then write the data to PHY register |
467 | * at the offset using the kumeran interface. Release any acquired semaphores | 588 | * at the offset using the kumeran interface. Release any acquired semaphores |
468 | * before exiting. | 589 | * before exiting. |
469 | **/ | 590 | **/ |
470 | s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data) | 591 | static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data, |
592 | bool locked) | ||
471 | { | 593 | { |
472 | u32 kmrnctrlsta; | 594 | u32 kmrnctrlsta; |
473 | s32 ret_val; | 595 | s32 ret_val = 0; |
474 | 596 | ||
475 | ret_val = hw->phy.ops.acquire_phy(hw); | 597 | if (!locked) { |
476 | if (ret_val) | 598 | if (!(hw->phy.ops.acquire_phy)) |
477 | return ret_val; | 599 | goto out; |
600 | |||
601 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
602 | if (ret_val) | ||
603 | goto out; | ||
604 | } | ||
478 | 605 | ||
479 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & | 606 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & |
480 | E1000_KMRNCTRLSTA_OFFSET) | data; | 607 | E1000_KMRNCTRLSTA_OFFSET) | data; |
481 | ew32(KMRNCTRLSTA, kmrnctrlsta); | 608 | ew32(KMRNCTRLSTA, kmrnctrlsta); |
482 | 609 | ||
483 | udelay(2); | 610 | udelay(2); |
484 | hw->phy.ops.release_phy(hw); | ||
485 | 611 | ||
612 | if (!locked) | ||
613 | hw->phy.ops.release_phy(hw); | ||
614 | |||
615 | out: | ||
486 | return ret_val; | 616 | return ret_val; |
487 | } | 617 | } |
488 | 618 | ||
489 | /** | 619 | /** |
620 | * e1000e_write_kmrn_reg - Write kumeran register | ||
621 | * @hw: pointer to the HW structure | ||
622 | * @offset: register offset to write to | ||
623 | * @data: data to write at register offset | ||
624 | * | ||
625 | * Acquires semaphore then writes the data to the PHY register at the offset | ||
626 | * using the kumeran interface. Release the acquired semaphore before exiting. | ||
627 | **/ | ||
628 | s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data) | ||
629 | { | ||
630 | return __e1000_write_kmrn_reg(hw, offset, data, false); | ||
631 | } | ||
632 | |||
633 | /** | ||
634 | * e1000_write_kmrn_reg_locked - Write kumeran register | ||
635 | * @hw: pointer to the HW structure | ||
636 | * @offset: register offset to write to | ||
637 | * @data: data to write at register offset | ||
638 | * | ||
639 | * Write the data to PHY register at the offset using the kumeran interface. | ||
640 | * Assumes semaphore already acquired. | ||
641 | **/ | ||
642 | s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data) | ||
643 | { | ||
644 | return __e1000_write_kmrn_reg(hw, offset, data, true); | ||
645 | } | ||
646 | |||
647 | /** | ||
490 | * e1000_copper_link_setup_82577 - Setup 82577 PHY for copper link | 648 | * e1000_copper_link_setup_82577 - Setup 82577 PHY for copper link |
491 | * @hw: pointer to the HW structure | 649 | * @hw: pointer to the HW structure |
492 | * | 650 | * |
@@ -2105,6 +2263,10 @@ s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) | |||
2105 | u32 page = offset >> IGP_PAGE_SHIFT; | 2263 | u32 page = offset >> IGP_PAGE_SHIFT; |
2106 | u32 page_shift = 0; | 2264 | u32 page_shift = 0; |
2107 | 2265 | ||
2266 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2267 | if (ret_val) | ||
2268 | return ret_val; | ||
2269 | |||
2108 | /* Page 800 works differently than the rest so it has its own func */ | 2270 | /* Page 800 works differently than the rest so it has its own func */ |
2109 | if (page == BM_WUC_PAGE) { | 2271 | if (page == BM_WUC_PAGE) { |
2110 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, | 2272 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, |
@@ -2112,10 +2274,6 @@ s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) | |||
2112 | goto out; | 2274 | goto out; |
2113 | } | 2275 | } |
2114 | 2276 | ||
2115 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2116 | if (ret_val) | ||
2117 | goto out; | ||
2118 | |||
2119 | hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); | 2277 | hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); |
2120 | 2278 | ||
2121 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | 2279 | if (offset > MAX_PHY_MULTI_PAGE_REG) { |
@@ -2135,18 +2293,15 @@ s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) | |||
2135 | /* Page is shifted left, PHY expects (page x 32) */ | 2293 | /* Page is shifted left, PHY expects (page x 32) */ |
2136 | ret_val = e1000e_write_phy_reg_mdic(hw, page_select, | 2294 | ret_val = e1000e_write_phy_reg_mdic(hw, page_select, |
2137 | (page << page_shift)); | 2295 | (page << page_shift)); |
2138 | if (ret_val) { | 2296 | if (ret_val) |
2139 | hw->phy.ops.release_phy(hw); | ||
2140 | goto out; | 2297 | goto out; |
2141 | } | ||
2142 | } | 2298 | } |
2143 | 2299 | ||
2144 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 2300 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
2145 | data); | 2301 | data); |
2146 | 2302 | ||
2147 | hw->phy.ops.release_phy(hw); | ||
2148 | |||
2149 | out: | 2303 | out: |
2304 | hw->phy.ops.release_phy(hw); | ||
2150 | return ret_val; | 2305 | return ret_val; |
2151 | } | 2306 | } |
2152 | 2307 | ||
@@ -2167,6 +2322,10 @@ s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2167 | u32 page = offset >> IGP_PAGE_SHIFT; | 2322 | u32 page = offset >> IGP_PAGE_SHIFT; |
2168 | u32 page_shift = 0; | 2323 | u32 page_shift = 0; |
2169 | 2324 | ||
2325 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2326 | if (ret_val) | ||
2327 | return ret_val; | ||
2328 | |||
2170 | /* Page 800 works differently than the rest so it has its own func */ | 2329 | /* Page 800 works differently than the rest so it has its own func */ |
2171 | if (page == BM_WUC_PAGE) { | 2330 | if (page == BM_WUC_PAGE) { |
2172 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, | 2331 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, |
@@ -2174,10 +2333,6 @@ s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2174 | goto out; | 2333 | goto out; |
2175 | } | 2334 | } |
2176 | 2335 | ||
2177 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2178 | if (ret_val) | ||
2179 | goto out; | ||
2180 | |||
2181 | hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); | 2336 | hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); |
2182 | 2337 | ||
2183 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | 2338 | if (offset > MAX_PHY_MULTI_PAGE_REG) { |
@@ -2197,17 +2352,14 @@ s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2197 | /* Page is shifted left, PHY expects (page x 32) */ | 2352 | /* Page is shifted left, PHY expects (page x 32) */ |
2198 | ret_val = e1000e_write_phy_reg_mdic(hw, page_select, | 2353 | ret_val = e1000e_write_phy_reg_mdic(hw, page_select, |
2199 | (page << page_shift)); | 2354 | (page << page_shift)); |
2200 | if (ret_val) { | 2355 | if (ret_val) |
2201 | hw->phy.ops.release_phy(hw); | ||
2202 | goto out; | 2356 | goto out; |
2203 | } | ||
2204 | } | 2357 | } |
2205 | 2358 | ||
2206 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 2359 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
2207 | data); | 2360 | data); |
2208 | hw->phy.ops.release_phy(hw); | ||
2209 | |||
2210 | out: | 2361 | out: |
2362 | hw->phy.ops.release_phy(hw); | ||
2211 | return ret_val; | 2363 | return ret_val; |
2212 | } | 2364 | } |
2213 | 2365 | ||
@@ -2226,17 +2378,17 @@ s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2226 | s32 ret_val; | 2378 | s32 ret_val; |
2227 | u16 page = (u16)(offset >> IGP_PAGE_SHIFT); | 2379 | u16 page = (u16)(offset >> IGP_PAGE_SHIFT); |
2228 | 2380 | ||
2381 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2382 | if (ret_val) | ||
2383 | return ret_val; | ||
2384 | |||
2229 | /* Page 800 works differently than the rest so it has its own func */ | 2385 | /* Page 800 works differently than the rest so it has its own func */ |
2230 | if (page == BM_WUC_PAGE) { | 2386 | if (page == BM_WUC_PAGE) { |
2231 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, | 2387 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, |
2232 | true); | 2388 | true); |
2233 | return ret_val; | 2389 | goto out; |
2234 | } | 2390 | } |
2235 | 2391 | ||
2236 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2237 | if (ret_val) | ||
2238 | return ret_val; | ||
2239 | |||
2240 | hw->phy.addr = 1; | 2392 | hw->phy.addr = 1; |
2241 | 2393 | ||
2242 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | 2394 | if (offset > MAX_PHY_MULTI_PAGE_REG) { |
@@ -2245,16 +2397,14 @@ s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2245 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT, | 2397 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT, |
2246 | page); | 2398 | page); |
2247 | 2399 | ||
2248 | if (ret_val) { | 2400 | if (ret_val) |
2249 | hw->phy.ops.release_phy(hw); | 2401 | goto out; |
2250 | return ret_val; | ||
2251 | } | ||
2252 | } | 2402 | } |
2253 | 2403 | ||
2254 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 2404 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
2255 | data); | 2405 | data); |
2406 | out: | ||
2256 | hw->phy.ops.release_phy(hw); | 2407 | hw->phy.ops.release_phy(hw); |
2257 | |||
2258 | return ret_val; | 2408 | return ret_val; |
2259 | } | 2409 | } |
2260 | 2410 | ||
@@ -2272,17 +2422,17 @@ s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data) | |||
2272 | s32 ret_val; | 2422 | s32 ret_val; |
2273 | u16 page = (u16)(offset >> IGP_PAGE_SHIFT); | 2423 | u16 page = (u16)(offset >> IGP_PAGE_SHIFT); |
2274 | 2424 | ||
2425 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2426 | if (ret_val) | ||
2427 | return ret_val; | ||
2428 | |||
2275 | /* Page 800 works differently than the rest so it has its own func */ | 2429 | /* Page 800 works differently than the rest so it has its own func */ |
2276 | if (page == BM_WUC_PAGE) { | 2430 | if (page == BM_WUC_PAGE) { |
2277 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, | 2431 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, |
2278 | false); | 2432 | false); |
2279 | return ret_val; | 2433 | goto out; |
2280 | } | 2434 | } |
2281 | 2435 | ||
2282 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2283 | if (ret_val) | ||
2284 | return ret_val; | ||
2285 | |||
2286 | hw->phy.addr = 1; | 2436 | hw->phy.addr = 1; |
2287 | 2437 | ||
2288 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | 2438 | if (offset > MAX_PHY_MULTI_PAGE_REG) { |
@@ -2290,17 +2440,15 @@ s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data) | |||
2290 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT, | 2440 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT, |
2291 | page); | 2441 | page); |
2292 | 2442 | ||
2293 | if (ret_val) { | 2443 | if (ret_val) |
2294 | hw->phy.ops.release_phy(hw); | 2444 | goto out; |
2295 | return ret_val; | ||
2296 | } | ||
2297 | } | 2445 | } |
2298 | 2446 | ||
2299 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 2447 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
2300 | data); | 2448 | data); |
2301 | 2449 | ||
2450 | out: | ||
2302 | hw->phy.ops.release_phy(hw); | 2451 | hw->phy.ops.release_phy(hw); |
2303 | |||
2304 | return ret_val; | 2452 | return ret_val; |
2305 | } | 2453 | } |
2306 | 2454 | ||
@@ -2320,6 +2468,8 @@ s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data) | |||
2320 | * 3) Write the address using the address opcode (0x11) | 2468 | * 3) Write the address using the address opcode (0x11) |
2321 | * 4) Read or write the data using the data opcode (0x12) | 2469 | * 4) Read or write the data using the data opcode (0x12) |
2322 | * 5) Restore 769_17.2 to its original value | 2470 | * 5) Restore 769_17.2 to its original value |
2471 | * | ||
2472 | * Assumes semaphore already acquired. | ||
2323 | **/ | 2473 | **/ |
2324 | static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, | 2474 | static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, |
2325 | u16 *data, bool read) | 2475 | u16 *data, bool read) |
@@ -2327,20 +2477,12 @@ static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, | |||
2327 | s32 ret_val; | 2477 | s32 ret_val; |
2328 | u16 reg = BM_PHY_REG_NUM(offset); | 2478 | u16 reg = BM_PHY_REG_NUM(offset); |
2329 | u16 phy_reg = 0; | 2479 | u16 phy_reg = 0; |
2330 | u8 phy_acquired = 1; | ||
2331 | |||
2332 | 2480 | ||
2333 | /* Gig must be disabled for MDIO accesses to page 800 */ | 2481 | /* Gig must be disabled for MDIO accesses to page 800 */ |
2334 | if ((hw->mac.type == e1000_pchlan) && | 2482 | if ((hw->mac.type == e1000_pchlan) && |
2335 | (!(er32(PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE))) | 2483 | (!(er32(PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE))) |
2336 | hw_dbg(hw, "Attempting to access page 800 while gig enabled\n"); | 2484 | hw_dbg(hw, "Attempting to access page 800 while gig enabled\n"); |
2337 | 2485 | ||
2338 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2339 | if (ret_val) { | ||
2340 | phy_acquired = 0; | ||
2341 | goto out; | ||
2342 | } | ||
2343 | |||
2344 | /* All operations in this function are phy address 1 */ | 2486 | /* All operations in this function are phy address 1 */ |
2345 | hw->phy.addr = 1; | 2487 | hw->phy.addr = 1; |
2346 | 2488 | ||
@@ -2397,8 +2539,6 @@ static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, | |||
2397 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg); | 2539 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg); |
2398 | 2540 | ||
2399 | out: | 2541 | out: |
2400 | if (phy_acquired == 1) | ||
2401 | hw->phy.ops.release_phy(hw); | ||
2402 | return ret_val; | 2542 | return ret_val; |
2403 | } | 2543 | } |
2404 | 2544 | ||
@@ -2439,52 +2579,63 @@ static s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active) | |||
2439 | return 0; | 2579 | return 0; |
2440 | } | 2580 | } |
2441 | 2581 | ||
2582 | /** | ||
2583 | * e1000_set_mdio_slow_mode_hv - Set slow MDIO access mode | ||
2584 | * @hw: pointer to the HW structure | ||
2585 | * @slow: true for slow mode, false for normal mode | ||
2586 | * | ||
2587 | * Assumes semaphore already acquired. | ||
2588 | **/ | ||
2442 | s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow) | 2589 | s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow) |
2443 | { | 2590 | { |
2444 | s32 ret_val = 0; | 2591 | s32 ret_val = 0; |
2445 | u16 data = 0; | 2592 | u16 data = 0; |
2446 | 2593 | ||
2447 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2448 | if (ret_val) | ||
2449 | return ret_val; | ||
2450 | |||
2451 | /* Set MDIO mode - page 769, register 16: 0x2580==slow, 0x2180==fast */ | 2594 | /* Set MDIO mode - page 769, register 16: 0x2580==slow, 0x2180==fast */ |
2452 | hw->phy.addr = 1; | 2595 | hw->phy.addr = 1; |
2453 | ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, | 2596 | ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, |
2454 | (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT)); | 2597 | (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT)); |
2455 | if (ret_val) { | 2598 | if (ret_val) |
2456 | hw->phy.ops.release_phy(hw); | 2599 | goto out; |
2457 | return ret_val; | 2600 | |
2458 | } | ||
2459 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_CS_CTRL1, | 2601 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_CS_CTRL1, |
2460 | (0x2180 | (slow << 10))); | 2602 | (0x2180 | (slow << 10))); |
2603 | if (ret_val) | ||
2604 | goto out; | ||
2461 | 2605 | ||
2462 | /* dummy read when reverting to fast mode - throw away result */ | 2606 | /* dummy read when reverting to fast mode - throw away result */ |
2463 | if (!slow) | 2607 | if (!slow) |
2464 | e1000e_read_phy_reg_mdic(hw, BM_CS_CTRL1, &data); | 2608 | ret_val = e1000e_read_phy_reg_mdic(hw, BM_CS_CTRL1, &data); |
2465 | |||
2466 | hw->phy.ops.release_phy(hw); | ||
2467 | 2609 | ||
2610 | out: | ||
2468 | return ret_val; | 2611 | return ret_val; |
2469 | } | 2612 | } |
2470 | 2613 | ||
2471 | /** | 2614 | /** |
2472 | * e1000_read_phy_reg_hv - Read HV PHY register | 2615 | * __e1000_read_phy_reg_hv - Read HV PHY register |
2473 | * @hw: pointer to the HW structure | 2616 | * @hw: pointer to the HW structure |
2474 | * @offset: register offset to be read | 2617 | * @offset: register offset to be read |
2475 | * @data: pointer to the read data | 2618 | * @data: pointer to the read data |
2619 | * @locked: semaphore has already been acquired or not | ||
2476 | * | 2620 | * |
2477 | * Acquires semaphore, if necessary, then reads the PHY register at offset | 2621 | * Acquires semaphore, if necessary, then reads the PHY register at offset |
2478 | * and storing the retrieved information in data. Release any acquired | 2622 | * and stores the retrieved information in data. Release any acquired |
2479 | * semaphore before exiting. | 2623 | * semaphore before exiting. |
2480 | **/ | 2624 | **/ |
2481 | s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) | 2625 | static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data, |
2626 | bool locked) | ||
2482 | { | 2627 | { |
2483 | s32 ret_val; | 2628 | s32 ret_val; |
2484 | u16 page = BM_PHY_REG_PAGE(offset); | 2629 | u16 page = BM_PHY_REG_PAGE(offset); |
2485 | u16 reg = BM_PHY_REG_NUM(offset); | 2630 | u16 reg = BM_PHY_REG_NUM(offset); |
2486 | bool in_slow_mode = false; | 2631 | bool in_slow_mode = false; |
2487 | 2632 | ||
2633 | if (!locked) { | ||
2634 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2635 | if (ret_val) | ||
2636 | return ret_val; | ||
2637 | } | ||
2638 | |||
2488 | /* Workaround failure in MDIO access while cable is disconnected */ | 2639 | /* Workaround failure in MDIO access while cable is disconnected */ |
2489 | if ((hw->phy.type == e1000_phy_82577) && | 2640 | if ((hw->phy.type == e1000_phy_82577) && |
2490 | !(er32(STATUS) & E1000_STATUS_LU)) { | 2641 | !(er32(STATUS) & E1000_STATUS_LU)) { |
@@ -2508,10 +2659,6 @@ s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2508 | goto out; | 2659 | goto out; |
2509 | } | 2660 | } |
2510 | 2661 | ||
2511 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2512 | if (ret_val) | ||
2513 | goto out; | ||
2514 | |||
2515 | hw->phy.addr = e1000_get_phy_addr_for_hv_page(page); | 2662 | hw->phy.addr = e1000_get_phy_addr_for_hv_page(page); |
2516 | 2663 | ||
2517 | if (page == HV_INTC_FC_PAGE_START) | 2664 | if (page == HV_INTC_FC_PAGE_START) |
@@ -2529,42 +2676,76 @@ s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2529 | ret_val = e1000e_write_phy_reg_mdic(hw, | 2676 | ret_val = e1000e_write_phy_reg_mdic(hw, |
2530 | IGP01E1000_PHY_PAGE_SELECT, | 2677 | IGP01E1000_PHY_PAGE_SELECT, |
2531 | (page << IGP_PAGE_SHIFT)); | 2678 | (page << IGP_PAGE_SHIFT)); |
2532 | if (ret_val) { | ||
2533 | hw->phy.ops.release_phy(hw); | ||
2534 | goto out; | ||
2535 | } | ||
2536 | hw->phy.addr = phy_addr; | 2679 | hw->phy.addr = phy_addr; |
2537 | } | 2680 | } |
2538 | } | 2681 | } |
2539 | 2682 | ||
2540 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, | 2683 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, |
2541 | data); | 2684 | data); |
2542 | hw->phy.ops.release_phy(hw); | ||
2543 | |||
2544 | out: | 2685 | out: |
2545 | /* Revert to MDIO fast mode, if applicable */ | 2686 | /* Revert to MDIO fast mode, if applicable */ |
2546 | if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) | 2687 | if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) |
2547 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); | 2688 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); |
2548 | 2689 | ||
2690 | if (!locked) | ||
2691 | hw->phy.ops.release_phy(hw); | ||
2692 | |||
2549 | return ret_val; | 2693 | return ret_val; |
2550 | } | 2694 | } |
2551 | 2695 | ||
2552 | /** | 2696 | /** |
2553 | * e1000_write_phy_reg_hv - Write HV PHY register | 2697 | * e1000_read_phy_reg_hv - Read HV PHY register |
2698 | * @hw: pointer to the HW structure | ||
2699 | * @offset: register offset to be read | ||
2700 | * @data: pointer to the read data | ||
2701 | * | ||
2702 | * Acquires semaphore then reads the PHY register at offset and stores | ||
2703 | * the retrieved information in data. Release the acquired semaphore | ||
2704 | * before exiting. | ||
2705 | **/ | ||
2706 | s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) | ||
2707 | { | ||
2708 | return __e1000_read_phy_reg_hv(hw, offset, data, false); | ||
2709 | } | ||
2710 | |||
2711 | /** | ||
2712 | * e1000_read_phy_reg_hv_locked - Read HV PHY register | ||
2713 | * @hw: pointer to the HW structure | ||
2714 | * @offset: register offset to be read | ||
2715 | * @data: pointer to the read data | ||
2716 | * | ||
2717 | * Reads the PHY register at offset and stores the retrieved information | ||
2718 | * in data. Assumes semaphore already acquired. | ||
2719 | **/ | ||
2720 | s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data) | ||
2721 | { | ||
2722 | return __e1000_read_phy_reg_hv(hw, offset, data, true); | ||
2723 | } | ||
2724 | |||
2725 | /** | ||
2726 | * __e1000_write_phy_reg_hv - Write HV PHY register | ||
2554 | * @hw: pointer to the HW structure | 2727 | * @hw: pointer to the HW structure |
2555 | * @offset: register offset to write to | 2728 | * @offset: register offset to write to |
2556 | * @data: data to write at register offset | 2729 | * @data: data to write at register offset |
2730 | * @locked: semaphore has already been acquired or not | ||
2557 | * | 2731 | * |
2558 | * Acquires semaphore, if necessary, then writes the data to PHY register | 2732 | * Acquires semaphore, if necessary, then writes the data to PHY register |
2559 | * at the offset. Release any acquired semaphores before exiting. | 2733 | * at the offset. Release any acquired semaphores before exiting. |
2560 | **/ | 2734 | **/ |
2561 | s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) | 2735 | static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, |
2736 | bool locked) | ||
2562 | { | 2737 | { |
2563 | s32 ret_val; | 2738 | s32 ret_val; |
2564 | u16 page = BM_PHY_REG_PAGE(offset); | 2739 | u16 page = BM_PHY_REG_PAGE(offset); |
2565 | u16 reg = BM_PHY_REG_NUM(offset); | 2740 | u16 reg = BM_PHY_REG_NUM(offset); |
2566 | bool in_slow_mode = false; | 2741 | bool in_slow_mode = false; |
2567 | 2742 | ||
2743 | if (!locked) { | ||
2744 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2745 | if (ret_val) | ||
2746 | return ret_val; | ||
2747 | } | ||
2748 | |||
2568 | /* Workaround failure in MDIO access while cable is disconnected */ | 2749 | /* Workaround failure in MDIO access while cable is disconnected */ |
2569 | if ((hw->phy.type == e1000_phy_82577) && | 2750 | if ((hw->phy.type == e1000_phy_82577) && |
2570 | !(er32(STATUS) & E1000_STATUS_LU)) { | 2751 | !(er32(STATUS) & E1000_STATUS_LU)) { |
@@ -2588,10 +2769,6 @@ s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) | |||
2588 | goto out; | 2769 | goto out; |
2589 | } | 2770 | } |
2590 | 2771 | ||
2591 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2592 | if (ret_val) | ||
2593 | goto out; | ||
2594 | |||
2595 | hw->phy.addr = e1000_get_phy_addr_for_hv_page(page); | 2772 | hw->phy.addr = e1000_get_phy_addr_for_hv_page(page); |
2596 | 2773 | ||
2597 | if (page == HV_INTC_FC_PAGE_START) | 2774 | if (page == HV_INTC_FC_PAGE_START) |
@@ -2607,15 +2784,10 @@ s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) | |||
2607 | ((MAX_PHY_REG_ADDRESS & reg) == 0) && | 2784 | ((MAX_PHY_REG_ADDRESS & reg) == 0) && |
2608 | (data & (1 << 11))) { | 2785 | (data & (1 << 11))) { |
2609 | u16 data2 = 0x7EFF; | 2786 | u16 data2 = 0x7EFF; |
2610 | hw->phy.ops.release_phy(hw); | ||
2611 | ret_val = e1000_access_phy_debug_regs_hv(hw, (1 << 6) | 0x3, | 2787 | ret_val = e1000_access_phy_debug_regs_hv(hw, (1 << 6) | 0x3, |
2612 | &data2, false); | 2788 | &data2, false); |
2613 | if (ret_val) | 2789 | if (ret_val) |
2614 | goto out; | 2790 | goto out; |
2615 | |||
2616 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2617 | if (ret_val) | ||
2618 | goto out; | ||
2619 | } | 2791 | } |
2620 | 2792 | ||
2621 | if (reg > MAX_PHY_MULTI_PAGE_REG) { | 2793 | if (reg > MAX_PHY_MULTI_PAGE_REG) { |
@@ -2630,27 +2802,53 @@ s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) | |||
2630 | ret_val = e1000e_write_phy_reg_mdic(hw, | 2802 | ret_val = e1000e_write_phy_reg_mdic(hw, |
2631 | IGP01E1000_PHY_PAGE_SELECT, | 2803 | IGP01E1000_PHY_PAGE_SELECT, |
2632 | (page << IGP_PAGE_SHIFT)); | 2804 | (page << IGP_PAGE_SHIFT)); |
2633 | if (ret_val) { | ||
2634 | hw->phy.ops.release_phy(hw); | ||
2635 | goto out; | ||
2636 | } | ||
2637 | hw->phy.addr = phy_addr; | 2805 | hw->phy.addr = phy_addr; |
2638 | } | 2806 | } |
2639 | } | 2807 | } |
2640 | 2808 | ||
2641 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, | 2809 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, |
2642 | data); | 2810 | data); |
2643 | hw->phy.ops.release_phy(hw); | ||
2644 | 2811 | ||
2645 | out: | 2812 | out: |
2646 | /* Revert to MDIO fast mode, if applicable */ | 2813 | /* Revert to MDIO fast mode, if applicable */ |
2647 | if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) | 2814 | if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) |
2648 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); | 2815 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); |
2649 | 2816 | ||
2817 | if (!locked) | ||
2818 | hw->phy.ops.release_phy(hw); | ||
2819 | |||
2650 | return ret_val; | 2820 | return ret_val; |
2651 | } | 2821 | } |
2652 | 2822 | ||
2653 | /** | 2823 | /** |
2824 | * e1000_write_phy_reg_hv - Write HV PHY register | ||
2825 | * @hw: pointer to the HW structure | ||
2826 | * @offset: register offset to write to | ||
2827 | * @data: data to write at register offset | ||
2828 | * | ||
2829 | * Acquires semaphore then writes the data to PHY register at the offset. | ||
2830 | * Release the acquired semaphores before exiting. | ||
2831 | **/ | ||
2832 | s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) | ||
2833 | { | ||
2834 | return __e1000_write_phy_reg_hv(hw, offset, data, false); | ||
2835 | } | ||
2836 | |||
2837 | /** | ||
2838 | * e1000_write_phy_reg_hv_locked - Write HV PHY register | ||
2839 | * @hw: pointer to the HW structure | ||
2840 | * @offset: register offset to write to | ||
2841 | * @data: data to write at register offset | ||
2842 | * | ||
2843 | * Writes the data to PHY register at the offset. Assumes semaphore | ||
2844 | * already acquired. | ||
2845 | **/ | ||
2846 | s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data) | ||
2847 | { | ||
2848 | return __e1000_write_phy_reg_hv(hw, offset, data, true); | ||
2849 | } | ||
2850 | |||
2851 | /** | ||
2654 | * e1000_get_phy_addr_for_hv_page - Get PHY adrress based on page | 2852 | * e1000_get_phy_addr_for_hv_page - Get PHY adrress based on page |
2655 | * @page: page to be accessed | 2853 | * @page: page to be accessed |
2656 | **/ | 2854 | **/ |
@@ -2671,10 +2869,9 @@ static u32 e1000_get_phy_addr_for_hv_page(u32 page) | |||
2671 | * @data: pointer to the data to be read or written | 2869 | * @data: pointer to the data to be read or written |
2672 | * @read: determines if operation is read or written | 2870 | * @read: determines if operation is read or written |
2673 | * | 2871 | * |
2674 | * Acquires semaphore, if necessary, then reads the PHY register at offset | 2872 | * Reads the PHY register at offset and stores the retreived information |
2675 | * and storing the retreived information in data. Release any acquired | 2873 | * in data. Assumes semaphore already acquired. Note that the procedure |
2676 | * semaphores before exiting. Note that the procedure to read these regs | 2874 | * to read these regs uses the address port and data port to read/write. |
2677 | * uses the address port and data port to read/write. | ||
2678 | **/ | 2875 | **/ |
2679 | static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, | 2876 | static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, |
2680 | u16 *data, bool read) | 2877 | u16 *data, bool read) |
@@ -2682,20 +2879,12 @@ static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, | |||
2682 | s32 ret_val; | 2879 | s32 ret_val; |
2683 | u32 addr_reg = 0; | 2880 | u32 addr_reg = 0; |
2684 | u32 data_reg = 0; | 2881 | u32 data_reg = 0; |
2685 | u8 phy_acquired = 1; | ||
2686 | 2882 | ||
2687 | /* This takes care of the difference with desktop vs mobile phy */ | 2883 | /* This takes care of the difference with desktop vs mobile phy */ |
2688 | addr_reg = (hw->phy.type == e1000_phy_82578) ? | 2884 | addr_reg = (hw->phy.type == e1000_phy_82578) ? |
2689 | I82578_ADDR_REG : I82577_ADDR_REG; | 2885 | I82578_ADDR_REG : I82577_ADDR_REG; |
2690 | data_reg = addr_reg + 1; | 2886 | data_reg = addr_reg + 1; |
2691 | 2887 | ||
2692 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2693 | if (ret_val) { | ||
2694 | hw_dbg(hw, "Could not acquire PHY\n"); | ||
2695 | phy_acquired = 0; | ||
2696 | goto out; | ||
2697 | } | ||
2698 | |||
2699 | /* All operations in this function are phy address 2 */ | 2888 | /* All operations in this function are phy address 2 */ |
2700 | hw->phy.addr = 2; | 2889 | hw->phy.addr = 2; |
2701 | 2890 | ||
@@ -2718,8 +2907,6 @@ static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, | |||
2718 | } | 2907 | } |
2719 | 2908 | ||
2720 | out: | 2909 | out: |
2721 | if (phy_acquired == 1) | ||
2722 | hw->phy.ops.release_phy(hw); | ||
2723 | return ret_val; | 2910 | return ret_val; |
2724 | } | 2911 | } |
2725 | 2912 | ||
diff --git a/drivers/net/ifb.c b/drivers/net/ifb.c index 801f088c134f..030913f8bd26 100644 --- a/drivers/net/ifb.c +++ b/drivers/net/ifb.c | |||
@@ -98,12 +98,13 @@ static void ri_tasklet(unsigned long dev) | |||
98 | stats->tx_packets++; | 98 | stats->tx_packets++; |
99 | stats->tx_bytes +=skb->len; | 99 | stats->tx_bytes +=skb->len; |
100 | 100 | ||
101 | skb->dev = __dev_get_by_index(&init_net, skb->iif); | 101 | skb->dev = dev_get_by_index(&init_net, skb->iif); |
102 | if (!skb->dev) { | 102 | if (!skb->dev) { |
103 | dev_kfree_skb(skb); | 103 | dev_kfree_skb(skb); |
104 | stats->tx_dropped++; | 104 | stats->tx_dropped++; |
105 | break; | 105 | break; |
106 | } | 106 | } |
107 | dev_put(skb->dev); | ||
107 | skb->iif = _dev->ifindex; | 108 | skb->iif = _dev->ifindex; |
108 | 109 | ||
109 | if (from & AT_EGRESS) { | 110 | if (from & AT_EGRESS) { |
diff --git a/drivers/net/igb/igb_ethtool.c b/drivers/net/igb/igb_ethtool.c index deaea8fa1032..b243ed3b0c36 100644 --- a/drivers/net/igb/igb_ethtool.c +++ b/drivers/net/igb/igb_ethtool.c | |||
@@ -732,7 +732,7 @@ static int igb_set_ringparam(struct net_device *netdev, | |||
732 | { | 732 | { |
733 | struct igb_adapter *adapter = netdev_priv(netdev); | 733 | struct igb_adapter *adapter = netdev_priv(netdev); |
734 | struct igb_ring *temp_ring; | 734 | struct igb_ring *temp_ring; |
735 | int i, err; | 735 | int i, err = 0; |
736 | u32 new_rx_count, new_tx_count; | 736 | u32 new_rx_count, new_tx_count; |
737 | 737 | ||
738 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) | 738 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) |
@@ -752,18 +752,30 @@ static int igb_set_ringparam(struct net_device *netdev, | |||
752 | return 0; | 752 | return 0; |
753 | } | 753 | } |
754 | 754 | ||
755 | while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) | ||
756 | msleep(1); | ||
757 | |||
758 | if (!netif_running(adapter->netdev)) { | ||
759 | for (i = 0; i < adapter->num_tx_queues; i++) | ||
760 | adapter->tx_ring[i].count = new_tx_count; | ||
761 | for (i = 0; i < adapter->num_rx_queues; i++) | ||
762 | adapter->rx_ring[i].count = new_rx_count; | ||
763 | adapter->tx_ring_count = new_tx_count; | ||
764 | adapter->rx_ring_count = new_rx_count; | ||
765 | goto clear_reset; | ||
766 | } | ||
767 | |||
755 | if (adapter->num_tx_queues > adapter->num_rx_queues) | 768 | if (adapter->num_tx_queues > adapter->num_rx_queues) |
756 | temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring)); | 769 | temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring)); |
757 | else | 770 | else |
758 | temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring)); | 771 | temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring)); |
759 | if (!temp_ring) | ||
760 | return -ENOMEM; | ||
761 | 772 | ||
762 | while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) | 773 | if (!temp_ring) { |
763 | msleep(1); | 774 | err = -ENOMEM; |
775 | goto clear_reset; | ||
776 | } | ||
764 | 777 | ||
765 | if (netif_running(adapter->netdev)) | 778 | igb_down(adapter); |
766 | igb_down(adapter); | ||
767 | 779 | ||
768 | /* | 780 | /* |
769 | * We can't just free everything and then setup again, | 781 | * We can't just free everything and then setup again, |
@@ -820,14 +832,11 @@ static int igb_set_ringparam(struct net_device *netdev, | |||
820 | 832 | ||
821 | adapter->rx_ring_count = new_rx_count; | 833 | adapter->rx_ring_count = new_rx_count; |
822 | } | 834 | } |
823 | |||
824 | err = 0; | ||
825 | err_setup: | 835 | err_setup: |
826 | if (netif_running(adapter->netdev)) | 836 | igb_up(adapter); |
827 | igb_up(adapter); | ||
828 | |||
829 | clear_bit(__IGB_RESETTING, &adapter->state); | ||
830 | vfree(temp_ring); | 837 | vfree(temp_ring); |
838 | clear_reset: | ||
839 | clear_bit(__IGB_RESETTING, &adapter->state); | ||
831 | return err; | 840 | return err; |
832 | } | 841 | } |
833 | 842 | ||
diff --git a/drivers/net/igbvf/ethtool.c b/drivers/net/igbvf/ethtool.c index ee17a097d1ca..c68265bd0d1a 100644 --- a/drivers/net/igbvf/ethtool.c +++ b/drivers/net/igbvf/ethtool.c | |||
@@ -279,7 +279,7 @@ static int igbvf_set_ringparam(struct net_device *netdev, | |||
279 | { | 279 | { |
280 | struct igbvf_adapter *adapter = netdev_priv(netdev); | 280 | struct igbvf_adapter *adapter = netdev_priv(netdev); |
281 | struct igbvf_ring *temp_ring; | 281 | struct igbvf_ring *temp_ring; |
282 | int err; | 282 | int err = 0; |
283 | u32 new_rx_count, new_tx_count; | 283 | u32 new_rx_count, new_tx_count; |
284 | 284 | ||
285 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) | 285 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) |
@@ -299,15 +299,22 @@ static int igbvf_set_ringparam(struct net_device *netdev, | |||
299 | return 0; | 299 | return 0; |
300 | } | 300 | } |
301 | 301 | ||
302 | temp_ring = vmalloc(sizeof(struct igbvf_ring)); | ||
303 | if (!temp_ring) | ||
304 | return -ENOMEM; | ||
305 | |||
306 | while (test_and_set_bit(__IGBVF_RESETTING, &adapter->state)) | 302 | while (test_and_set_bit(__IGBVF_RESETTING, &adapter->state)) |
307 | msleep(1); | 303 | msleep(1); |
308 | 304 | ||
309 | if (netif_running(adapter->netdev)) | 305 | if (!netif_running(adapter->netdev)) { |
310 | igbvf_down(adapter); | 306 | adapter->tx_ring->count = new_tx_count; |
307 | adapter->rx_ring->count = new_rx_count; | ||
308 | goto clear_reset; | ||
309 | } | ||
310 | |||
311 | temp_ring = vmalloc(sizeof(struct igbvf_ring)); | ||
312 | if (!temp_ring) { | ||
313 | err = -ENOMEM; | ||
314 | goto clear_reset; | ||
315 | } | ||
316 | |||
317 | igbvf_down(adapter); | ||
311 | 318 | ||
312 | /* | 319 | /* |
313 | * We can't just free everything and then setup again, | 320 | * We can't just free everything and then setup again, |
@@ -339,14 +346,11 @@ static int igbvf_set_ringparam(struct net_device *netdev, | |||
339 | 346 | ||
340 | memcpy(adapter->rx_ring, temp_ring,sizeof(struct igbvf_ring)); | 347 | memcpy(adapter->rx_ring, temp_ring,sizeof(struct igbvf_ring)); |
341 | } | 348 | } |
342 | |||
343 | err = 0; | ||
344 | err_setup: | 349 | err_setup: |
345 | if (netif_running(adapter->netdev)) | 350 | igbvf_up(adapter); |
346 | igbvf_up(adapter); | ||
347 | |||
348 | clear_bit(__IGBVF_RESETTING, &adapter->state); | ||
349 | vfree(temp_ring); | 351 | vfree(temp_ring); |
352 | clear_reset: | ||
353 | clear_bit(__IGBVF_RESETTING, &adapter->state); | ||
350 | return err; | 354 | return err; |
351 | } | 355 | } |
352 | 356 | ||
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c index fa314cb005a4..856c18c207f3 100644 --- a/drivers/net/ixgbe/ixgbe_ethtool.c +++ b/drivers/net/ixgbe/ixgbe_ethtool.c | |||
@@ -798,7 +798,7 @@ static int ixgbe_set_ringparam(struct net_device *netdev, | |||
798 | { | 798 | { |
799 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | 799 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
800 | struct ixgbe_ring *temp_tx_ring, *temp_rx_ring; | 800 | struct ixgbe_ring *temp_tx_ring, *temp_rx_ring; |
801 | int i, err; | 801 | int i, err = 0; |
802 | u32 new_rx_count, new_tx_count; | 802 | u32 new_rx_count, new_tx_count; |
803 | bool need_update = false; | 803 | bool need_update = false; |
804 | 804 | ||
@@ -822,6 +822,16 @@ static int ixgbe_set_ringparam(struct net_device *netdev, | |||
822 | while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) | 822 | while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) |
823 | msleep(1); | 823 | msleep(1); |
824 | 824 | ||
825 | if (!netif_running(adapter->netdev)) { | ||
826 | for (i = 0; i < adapter->num_tx_queues; i++) | ||
827 | adapter->tx_ring[i].count = new_tx_count; | ||
828 | for (i = 0; i < adapter->num_rx_queues; i++) | ||
829 | adapter->rx_ring[i].count = new_rx_count; | ||
830 | adapter->tx_ring_count = new_tx_count; | ||
831 | adapter->rx_ring_count = new_rx_count; | ||
832 | goto err_setup; | ||
833 | } | ||
834 | |||
825 | temp_tx_ring = kcalloc(adapter->num_tx_queues, | 835 | temp_tx_ring = kcalloc(adapter->num_tx_queues, |
826 | sizeof(struct ixgbe_ring), GFP_KERNEL); | 836 | sizeof(struct ixgbe_ring), GFP_KERNEL); |
827 | if (!temp_tx_ring) { | 837 | if (!temp_tx_ring) { |
@@ -879,8 +889,7 @@ static int ixgbe_set_ringparam(struct net_device *netdev, | |||
879 | 889 | ||
880 | /* if rings need to be updated, here's the place to do it in one shot */ | 890 | /* if rings need to be updated, here's the place to do it in one shot */ |
881 | if (need_update) { | 891 | if (need_update) { |
882 | if (netif_running(netdev)) | 892 | ixgbe_down(adapter); |
883 | ixgbe_down(adapter); | ||
884 | 893 | ||
885 | /* tx */ | 894 | /* tx */ |
886 | if (new_tx_count != adapter->tx_ring_count) { | 895 | if (new_tx_count != adapter->tx_ring_count) { |
@@ -897,13 +906,8 @@ static int ixgbe_set_ringparam(struct net_device *netdev, | |||
897 | temp_rx_ring = NULL; | 906 | temp_rx_ring = NULL; |
898 | adapter->rx_ring_count = new_rx_count; | 907 | adapter->rx_ring_count = new_rx_count; |
899 | } | 908 | } |
900 | } | ||
901 | |||
902 | /* success! */ | ||
903 | err = 0; | ||
904 | if (netif_running(netdev)) | ||
905 | ixgbe_up(adapter); | 909 | ixgbe_up(adapter); |
906 | 910 | } | |
907 | err_setup: | 911 | err_setup: |
908 | clear_bit(__IXGBE_RESETTING, &adapter->state); | 912 | clear_bit(__IXGBE_RESETTING, &adapter->state); |
909 | return err; | 913 | return err; |
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c index 6930c87f362e..f3624517cb0e 100644 --- a/drivers/net/myri10ge/myri10ge.c +++ b/drivers/net/myri10ge/myri10ge.c | |||
@@ -75,7 +75,7 @@ | |||
75 | #include "myri10ge_mcp.h" | 75 | #include "myri10ge_mcp.h" |
76 | #include "myri10ge_mcp_gen_header.h" | 76 | #include "myri10ge_mcp_gen_header.h" |
77 | 77 | ||
78 | #define MYRI10GE_VERSION_STR "1.5.0-1.432" | 78 | #define MYRI10GE_VERSION_STR "1.5.1-1.451" |
79 | 79 | ||
80 | MODULE_DESCRIPTION("Myricom 10G driver (10GbE)"); | 80 | MODULE_DESCRIPTION("Myricom 10G driver (10GbE)"); |
81 | MODULE_AUTHOR("Maintainer: help@myri.com"); | 81 | MODULE_AUTHOR("Maintainer: help@myri.com"); |
@@ -1624,10 +1624,21 @@ myri10ge_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd) | |||
1624 | return 0; | 1624 | return 0; |
1625 | } | 1625 | } |
1626 | } | 1626 | } |
1627 | if (*ptr == 'R' || *ptr == 'Q') { | 1627 | if (*ptr == '2') |
1628 | /* We've found either an XFP or quad ribbon fiber */ | 1628 | ptr++; |
1629 | if (*ptr == 'R' || *ptr == 'Q' || *ptr == 'S') { | ||
1630 | /* We've found either an XFP, quad ribbon fiber, or SFP+ */ | ||
1629 | cmd->port = PORT_FIBRE; | 1631 | cmd->port = PORT_FIBRE; |
1632 | cmd->supported |= SUPPORTED_FIBRE; | ||
1633 | cmd->advertising |= ADVERTISED_FIBRE; | ||
1634 | } else { | ||
1635 | cmd->port = PORT_OTHER; | ||
1630 | } | 1636 | } |
1637 | if (*ptr == 'R' || *ptr == 'S') | ||
1638 | cmd->transceiver = XCVR_EXTERNAL; | ||
1639 | else | ||
1640 | cmd->transceiver = XCVR_INTERNAL; | ||
1641 | |||
1631 | return 0; | 1642 | return 0; |
1632 | } | 1643 | } |
1633 | 1644 | ||
diff --git a/drivers/net/netxen/netxen_nic_hdr.h b/drivers/net/netxen/netxen_nic_hdr.h index 7a7177421d7c..1c46da632125 100644 --- a/drivers/net/netxen/netxen_nic_hdr.h +++ b/drivers/net/netxen/netxen_nic_hdr.h | |||
@@ -419,6 +419,7 @@ enum { | |||
419 | #define NETXEN_CRB_ROMUSB \ | 419 | #define NETXEN_CRB_ROMUSB \ |
420 | NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_ROMUSB) | 420 | NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_ROMUSB) |
421 | #define NETXEN_CRB_I2Q NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_I2Q) | 421 | #define NETXEN_CRB_I2Q NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_I2Q) |
422 | #define NETXEN_CRB_I2C0 NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_I2C0) | ||
422 | #define NETXEN_CRB_SMB NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_SMB) | 423 | #define NETXEN_CRB_SMB NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_SMB) |
423 | #define NETXEN_CRB_MAX NETXEN_PCI_CRB_WINDOW(64) | 424 | #define NETXEN_CRB_MAX NETXEN_PCI_CRB_WINDOW(64) |
424 | 425 | ||
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c index 32314000dfcd..3185a98b0917 100644 --- a/drivers/net/netxen/netxen_nic_hw.c +++ b/drivers/net/netxen/netxen_nic_hw.c | |||
@@ -1901,22 +1901,16 @@ netxen_setup_hwops(struct netxen_adapter *adapter) | |||
1901 | 1901 | ||
1902 | int netxen_nic_get_board_info(struct netxen_adapter *adapter) | 1902 | int netxen_nic_get_board_info(struct netxen_adapter *adapter) |
1903 | { | 1903 | { |
1904 | int offset, board_type, magic, header_version; | 1904 | int offset, board_type, magic; |
1905 | struct pci_dev *pdev = adapter->pdev; | 1905 | struct pci_dev *pdev = adapter->pdev; |
1906 | 1906 | ||
1907 | offset = NX_FW_MAGIC_OFFSET; | 1907 | offset = NX_FW_MAGIC_OFFSET; |
1908 | if (netxen_rom_fast_read(adapter, offset, &magic)) | 1908 | if (netxen_rom_fast_read(adapter, offset, &magic)) |
1909 | return -EIO; | 1909 | return -EIO; |
1910 | 1910 | ||
1911 | offset = NX_HDR_VERSION_OFFSET; | 1911 | if (magic != NETXEN_BDINFO_MAGIC) { |
1912 | if (netxen_rom_fast_read(adapter, offset, &header_version)) | 1912 | dev_err(&pdev->dev, "invalid board config, magic=%08x\n", |
1913 | return -EIO; | 1913 | magic); |
1914 | |||
1915 | if (magic != NETXEN_BDINFO_MAGIC || | ||
1916 | header_version != NETXEN_BDINFO_VERSION) { | ||
1917 | dev_err(&pdev->dev, | ||
1918 | "invalid board config, magic=%08x, version=%08x\n", | ||
1919 | magic, header_version); | ||
1920 | return -EIO; | 1914 | return -EIO; |
1921 | } | 1915 | } |
1922 | 1916 | ||
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c index 91c2bc61c8eb..e40b914d6faf 100644 --- a/drivers/net/netxen/netxen_nic_init.c +++ b/drivers/net/netxen/netxen_nic_init.c | |||
@@ -531,6 +531,8 @@ int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose) | |||
531 | continue; | 531 | continue; |
532 | 532 | ||
533 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { | 533 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { |
534 | if (off == (NETXEN_CRB_I2C0 + 0x1c)) | ||
535 | continue; | ||
534 | /* do not reset PCI */ | 536 | /* do not reset PCI */ |
535 | if (off == (ROMUSB_GLB + 0xbc)) | 537 | if (off == (ROMUSB_GLB + 0xbc)) |
536 | continue; | 538 | continue; |
@@ -553,12 +555,6 @@ int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose) | |||
553 | continue; | 555 | continue; |
554 | } | 556 | } |
555 | 557 | ||
556 | if (off == NETXEN_ADDR_ERROR) { | ||
557 | printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n", | ||
558 | netxen_nic_driver_name, buf[i].addr); | ||
559 | continue; | ||
560 | } | ||
561 | |||
562 | init_delay = 1; | 558 | init_delay = 1; |
563 | /* After writing this register, HW needs time for CRB */ | 559 | /* After writing this register, HW needs time for CRB */ |
564 | /* to quiet down (else crb_window returns 0xffffffff) */ | 560 | /* to quiet down (else crb_window returns 0xffffffff) */ |
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c index 7fc15e9e8adb..0b4a56a8c8d5 100644 --- a/drivers/net/netxen/netxen_nic_main.c +++ b/drivers/net/netxen/netxen_nic_main.c | |||
@@ -1919,6 +1919,7 @@ static void netxen_tx_timeout_task(struct work_struct *work) | |||
1919 | 1919 | ||
1920 | request_reset: | 1920 | request_reset: |
1921 | adapter->need_fw_reset = 1; | 1921 | adapter->need_fw_reset = 1; |
1922 | clear_bit(__NX_RESETTING, &adapter->state); | ||
1922 | } | 1923 | } |
1923 | 1924 | ||
1924 | struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev) | 1925 | struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev) |
diff --git a/drivers/net/pppoe.c b/drivers/net/pppoe.c index 7cbf6f9b51de..2559991eea6a 100644 --- a/drivers/net/pppoe.c +++ b/drivers/net/pppoe.c | |||
@@ -111,9 +111,6 @@ struct pppoe_net { | |||
111 | rwlock_t hash_lock; | 111 | rwlock_t hash_lock; |
112 | }; | 112 | }; |
113 | 113 | ||
114 | /* to eliminate a race btw pppoe_flush_dev and pppoe_release */ | ||
115 | static DEFINE_SPINLOCK(flush_lock); | ||
116 | |||
117 | /* | 114 | /* |
118 | * PPPoE could be in the following stages: | 115 | * PPPoE could be in the following stages: |
119 | * 1) Discovery stage (to obtain remote MAC and Session ID) | 116 | * 1) Discovery stage (to obtain remote MAC and Session ID) |
@@ -303,45 +300,48 @@ static void pppoe_flush_dev(struct net_device *dev) | |||
303 | write_lock_bh(&pn->hash_lock); | 300 | write_lock_bh(&pn->hash_lock); |
304 | for (i = 0; i < PPPOE_HASH_SIZE; i++) { | 301 | for (i = 0; i < PPPOE_HASH_SIZE; i++) { |
305 | struct pppox_sock *po = pn->hash_table[i]; | 302 | struct pppox_sock *po = pn->hash_table[i]; |
303 | struct sock *sk; | ||
306 | 304 | ||
307 | while (po != NULL) { | 305 | while (po) { |
308 | struct sock *sk; | 306 | while (po && po->pppoe_dev != dev) { |
309 | if (po->pppoe_dev != dev) { | ||
310 | po = po->next; | 307 | po = po->next; |
311 | continue; | ||
312 | } | 308 | } |
309 | |||
310 | if (!po) | ||
311 | break; | ||
312 | |||
313 | sk = sk_pppox(po); | 313 | sk = sk_pppox(po); |
314 | spin_lock(&flush_lock); | ||
315 | po->pppoe_dev = NULL; | ||
316 | spin_unlock(&flush_lock); | ||
317 | dev_put(dev); | ||
318 | 314 | ||
319 | /* We always grab the socket lock, followed by the | 315 | /* We always grab the socket lock, followed by the |
320 | * hash_lock, in that order. Since we should | 316 | * hash_lock, in that order. Since we should hold the |
321 | * hold the sock lock while doing any unbinding, | 317 | * sock lock while doing any unbinding, we need to |
322 | * we need to release the lock we're holding. | 318 | * release the lock we're holding. Hold a reference to |
323 | * Hold a reference to the sock so it doesn't disappear | 319 | * the sock so it doesn't disappear as we're jumping |
324 | * as we're jumping between locks. | 320 | * between locks. |
325 | */ | 321 | */ |
326 | 322 | ||
327 | sock_hold(sk); | 323 | sock_hold(sk); |
328 | |||
329 | write_unlock_bh(&pn->hash_lock); | 324 | write_unlock_bh(&pn->hash_lock); |
330 | lock_sock(sk); | 325 | lock_sock(sk); |
331 | 326 | ||
332 | if (sk->sk_state & (PPPOX_CONNECTED | PPPOX_BOUND)) { | 327 | if (po->pppoe_dev == dev |
328 | && sk->sk_state & (PPPOX_CONNECTED | PPPOX_BOUND)) { | ||
333 | pppox_unbind_sock(sk); | 329 | pppox_unbind_sock(sk); |
334 | sk->sk_state = PPPOX_ZOMBIE; | 330 | sk->sk_state = PPPOX_ZOMBIE; |
335 | sk->sk_state_change(sk); | 331 | sk->sk_state_change(sk); |
332 | po->pppoe_dev = NULL; | ||
333 | dev_put(dev); | ||
336 | } | 334 | } |
337 | 335 | ||
338 | release_sock(sk); | 336 | release_sock(sk); |
339 | sock_put(sk); | 337 | sock_put(sk); |
340 | 338 | ||
341 | /* Restart scan at the beginning of this hash chain. | 339 | /* Restart the process from the start of the current |
342 | * While the lock was dropped the chain contents may | 340 | * hash chain. We dropped locks so the world may have |
343 | * have changed. | 341 | * change from underneath us. |
344 | */ | 342 | */ |
343 | |||
344 | BUG_ON(pppoe_pernet(dev_net(dev)) == NULL); | ||
345 | write_lock_bh(&pn->hash_lock); | 345 | write_lock_bh(&pn->hash_lock); |
346 | po = pn->hash_table[i]; | 346 | po = pn->hash_table[i]; |
347 | } | 347 | } |
@@ -388,11 +388,16 @@ static int pppoe_rcv_core(struct sock *sk, struct sk_buff *skb) | |||
388 | struct pppox_sock *po = pppox_sk(sk); | 388 | struct pppox_sock *po = pppox_sk(sk); |
389 | struct pppox_sock *relay_po; | 389 | struct pppox_sock *relay_po; |
390 | 390 | ||
391 | /* Backlog receive. Semantics of backlog rcv preclude any code from | ||
392 | * executing in lock_sock()/release_sock() bounds; meaning sk->sk_state | ||
393 | * can't change. | ||
394 | */ | ||
395 | |||
391 | if (sk->sk_state & PPPOX_BOUND) { | 396 | if (sk->sk_state & PPPOX_BOUND) { |
392 | ppp_input(&po->chan, skb); | 397 | ppp_input(&po->chan, skb); |
393 | } else if (sk->sk_state & PPPOX_RELAY) { | 398 | } else if (sk->sk_state & PPPOX_RELAY) { |
394 | relay_po = get_item_by_addr(dev_net(po->pppoe_dev), | 399 | relay_po = get_item_by_addr(sock_net(sk), |
395 | &po->pppoe_relay); | 400 | &po->pppoe_relay); |
396 | if (relay_po == NULL) | 401 | if (relay_po == NULL) |
397 | goto abort_kfree; | 402 | goto abort_kfree; |
398 | 403 | ||
@@ -447,6 +452,10 @@ static int pppoe_rcv(struct sk_buff *skb, struct net_device *dev, | |||
447 | goto drop; | 452 | goto drop; |
448 | 453 | ||
449 | pn = pppoe_pernet(dev_net(dev)); | 454 | pn = pppoe_pernet(dev_net(dev)); |
455 | |||
456 | /* Note that get_item does a sock_hold(), so sk_pppox(po) | ||
457 | * is known to be safe. | ||
458 | */ | ||
450 | po = get_item(pn, ph->sid, eth_hdr(skb)->h_source, dev->ifindex); | 459 | po = get_item(pn, ph->sid, eth_hdr(skb)->h_source, dev->ifindex); |
451 | if (!po) | 460 | if (!po) |
452 | goto drop; | 461 | goto drop; |
@@ -561,6 +570,7 @@ static int pppoe_release(struct socket *sock) | |||
561 | struct sock *sk = sock->sk; | 570 | struct sock *sk = sock->sk; |
562 | struct pppox_sock *po; | 571 | struct pppox_sock *po; |
563 | struct pppoe_net *pn; | 572 | struct pppoe_net *pn; |
573 | struct net *net = NULL; | ||
564 | 574 | ||
565 | if (!sk) | 575 | if (!sk) |
566 | return 0; | 576 | return 0; |
@@ -571,44 +581,28 @@ static int pppoe_release(struct socket *sock) | |||
571 | return -EBADF; | 581 | return -EBADF; |
572 | } | 582 | } |
573 | 583 | ||
584 | po = pppox_sk(sk); | ||
585 | |||
586 | if (sk->sk_state & (PPPOX_CONNECTED | PPPOX_BOUND)) { | ||
587 | dev_put(po->pppoe_dev); | ||
588 | po->pppoe_dev = NULL; | ||
589 | } | ||
590 | |||
574 | pppox_unbind_sock(sk); | 591 | pppox_unbind_sock(sk); |
575 | 592 | ||
576 | /* Signal the death of the socket. */ | 593 | /* Signal the death of the socket. */ |
577 | sk->sk_state = PPPOX_DEAD; | 594 | sk->sk_state = PPPOX_DEAD; |
578 | 595 | ||
579 | /* | 596 | net = sock_net(sk); |
580 | * pppoe_flush_dev could lead to a race with | 597 | pn = pppoe_pernet(net); |
581 | * this routine so we use flush_lock to eliminate | ||
582 | * such a case (we only need per-net specific data) | ||
583 | */ | ||
584 | spin_lock(&flush_lock); | ||
585 | po = pppox_sk(sk); | ||
586 | if (!po->pppoe_dev) { | ||
587 | spin_unlock(&flush_lock); | ||
588 | goto out; | ||
589 | } | ||
590 | pn = pppoe_pernet(dev_net(po->pppoe_dev)); | ||
591 | spin_unlock(&flush_lock); | ||
592 | 598 | ||
593 | /* | 599 | /* |
594 | * protect "po" from concurrent updates | 600 | * protect "po" from concurrent updates |
595 | * on pppoe_flush_dev | 601 | * on pppoe_flush_dev |
596 | */ | 602 | */ |
597 | write_lock_bh(&pn->hash_lock); | 603 | delete_item(pn, po->pppoe_pa.sid, po->pppoe_pa.remote, |
604 | po->pppoe_ifindex); | ||
598 | 605 | ||
599 | po = pppox_sk(sk); | ||
600 | if (stage_session(po->pppoe_pa.sid)) | ||
601 | __delete_item(pn, po->pppoe_pa.sid, po->pppoe_pa.remote, | ||
602 | po->pppoe_ifindex); | ||
603 | |||
604 | if (po->pppoe_dev) { | ||
605 | dev_put(po->pppoe_dev); | ||
606 | po->pppoe_dev = NULL; | ||
607 | } | ||
608 | |||
609 | write_unlock_bh(&pn->hash_lock); | ||
610 | |||
611 | out: | ||
612 | sock_orphan(sk); | 606 | sock_orphan(sk); |
613 | sock->sk = NULL; | 607 | sock->sk = NULL; |
614 | 608 | ||
@@ -625,8 +619,9 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr, | |||
625 | struct sock *sk = sock->sk; | 619 | struct sock *sk = sock->sk; |
626 | struct sockaddr_pppox *sp = (struct sockaddr_pppox *)uservaddr; | 620 | struct sockaddr_pppox *sp = (struct sockaddr_pppox *)uservaddr; |
627 | struct pppox_sock *po = pppox_sk(sk); | 621 | struct pppox_sock *po = pppox_sk(sk); |
628 | struct net_device *dev; | 622 | struct net_device *dev = NULL; |
629 | struct pppoe_net *pn; | 623 | struct pppoe_net *pn; |
624 | struct net *net = NULL; | ||
630 | int error; | 625 | int error; |
631 | 626 | ||
632 | lock_sock(sk); | 627 | lock_sock(sk); |
@@ -652,12 +647,14 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr, | |||
652 | /* Delete the old binding */ | 647 | /* Delete the old binding */ |
653 | if (stage_session(po->pppoe_pa.sid)) { | 648 | if (stage_session(po->pppoe_pa.sid)) { |
654 | pppox_unbind_sock(sk); | 649 | pppox_unbind_sock(sk); |
650 | pn = pppoe_pernet(sock_net(sk)); | ||
651 | delete_item(pn, po->pppoe_pa.sid, | ||
652 | po->pppoe_pa.remote, po->pppoe_ifindex); | ||
655 | if (po->pppoe_dev) { | 653 | if (po->pppoe_dev) { |
656 | pn = pppoe_pernet(dev_net(po->pppoe_dev)); | ||
657 | delete_item(pn, po->pppoe_pa.sid, | ||
658 | po->pppoe_pa.remote, po->pppoe_ifindex); | ||
659 | dev_put(po->pppoe_dev); | 654 | dev_put(po->pppoe_dev); |
655 | po->pppoe_dev = NULL; | ||
660 | } | 656 | } |
657 | |||
661 | memset(sk_pppox(po) + 1, 0, | 658 | memset(sk_pppox(po) + 1, 0, |
662 | sizeof(struct pppox_sock) - sizeof(struct sock)); | 659 | sizeof(struct pppox_sock) - sizeof(struct sock)); |
663 | sk->sk_state = PPPOX_NONE; | 660 | sk->sk_state = PPPOX_NONE; |
@@ -666,16 +663,15 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr, | |||
666 | /* Re-bind in session stage only */ | 663 | /* Re-bind in session stage only */ |
667 | if (stage_session(sp->sa_addr.pppoe.sid)) { | 664 | if (stage_session(sp->sa_addr.pppoe.sid)) { |
668 | error = -ENODEV; | 665 | error = -ENODEV; |
669 | dev = dev_get_by_name(sock_net(sk), sp->sa_addr.pppoe.dev); | 666 | net = sock_net(sk); |
667 | dev = dev_get_by_name(net, sp->sa_addr.pppoe.dev); | ||
670 | if (!dev) | 668 | if (!dev) |
671 | goto end; | 669 | goto err_put; |
672 | 670 | ||
673 | po->pppoe_dev = dev; | 671 | po->pppoe_dev = dev; |
674 | po->pppoe_ifindex = dev->ifindex; | 672 | po->pppoe_ifindex = dev->ifindex; |
675 | pn = pppoe_pernet(dev_net(dev)); | 673 | pn = pppoe_pernet(net); |
676 | write_lock_bh(&pn->hash_lock); | ||
677 | if (!(dev->flags & IFF_UP)) { | 674 | if (!(dev->flags & IFF_UP)) { |
678 | write_unlock_bh(&pn->hash_lock); | ||
679 | goto err_put; | 675 | goto err_put; |
680 | } | 676 | } |
681 | 677 | ||
@@ -683,6 +679,7 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr, | |||
683 | &sp->sa_addr.pppoe, | 679 | &sp->sa_addr.pppoe, |
684 | sizeof(struct pppoe_addr)); | 680 | sizeof(struct pppoe_addr)); |
685 | 681 | ||
682 | write_lock_bh(&pn->hash_lock); | ||
686 | error = __set_item(pn, po); | 683 | error = __set_item(pn, po); |
687 | write_unlock_bh(&pn->hash_lock); | 684 | write_unlock_bh(&pn->hash_lock); |
688 | if (error < 0) | 685 | if (error < 0) |
@@ -696,8 +693,11 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr, | |||
696 | po->chan.ops = &pppoe_chan_ops; | 693 | po->chan.ops = &pppoe_chan_ops; |
697 | 694 | ||
698 | error = ppp_register_net_channel(dev_net(dev), &po->chan); | 695 | error = ppp_register_net_channel(dev_net(dev), &po->chan); |
699 | if (error) | 696 | if (error) { |
697 | delete_item(pn, po->pppoe_pa.sid, | ||
698 | po->pppoe_pa.remote, po->pppoe_ifindex); | ||
700 | goto err_put; | 699 | goto err_put; |
700 | } | ||
701 | 701 | ||
702 | sk->sk_state = PPPOX_CONNECTED; | 702 | sk->sk_state = PPPOX_CONNECTED; |
703 | } | 703 | } |
@@ -915,6 +915,14 @@ static int __pppoe_xmit(struct sock *sk, struct sk_buff *skb) | |||
915 | struct pppoe_hdr *ph; | 915 | struct pppoe_hdr *ph; |
916 | int data_len = skb->len; | 916 | int data_len = skb->len; |
917 | 917 | ||
918 | /* The higher-level PPP code (ppp_unregister_channel()) ensures the PPP | ||
919 | * xmit operations conclude prior to an unregistration call. Thus | ||
920 | * sk->sk_state cannot change, so we don't need to do lock_sock(). | ||
921 | * But, we also can't do a lock_sock since that introduces a potential | ||
922 | * deadlock as we'd reverse the lock ordering used when calling | ||
923 | * ppp_unregister_channel(). | ||
924 | */ | ||
925 | |||
918 | if (sock_flag(sk, SOCK_DEAD) || !(sk->sk_state & PPPOX_CONNECTED)) | 926 | if (sock_flag(sk, SOCK_DEAD) || !(sk->sk_state & PPPOX_CONNECTED)) |
919 | goto abort; | 927 | goto abort; |
920 | 928 | ||
@@ -944,7 +952,6 @@ static int __pppoe_xmit(struct sock *sk, struct sk_buff *skb) | |||
944 | po->pppoe_pa.remote, NULL, data_len); | 952 | po->pppoe_pa.remote, NULL, data_len); |
945 | 953 | ||
946 | dev_queue_xmit(skb); | 954 | dev_queue_xmit(skb); |
947 | |||
948 | return 1; | 955 | return 1; |
949 | 956 | ||
950 | abort: | 957 | abort: |
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h index e7285f01bd04..c2383adcd527 100644 --- a/drivers/net/qlge/qlge.h +++ b/drivers/net/qlge/qlge.h | |||
@@ -95,6 +95,7 @@ enum { | |||
95 | 95 | ||
96 | /* Misc. stuff */ | 96 | /* Misc. stuff */ |
97 | MAILBOX_COUNT = 16, | 97 | MAILBOX_COUNT = 16, |
98 | MAILBOX_TIMEOUT = 5, | ||
98 | 99 | ||
99 | PROC_ADDR_RDY = (1 << 31), | 100 | PROC_ADDR_RDY = (1 << 31), |
100 | PROC_ADDR_R = (1 << 30), | 101 | PROC_ADDR_R = (1 << 30), |
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c index 48b45df85ec9..cea7531f4f40 100644 --- a/drivers/net/qlge/qlge_main.c +++ b/drivers/net/qlge/qlge_main.c | |||
@@ -3916,6 +3916,7 @@ static int __devinit ql_init_device(struct pci_dev *pdev, | |||
3916 | goto err_out; | 3916 | goto err_out; |
3917 | } | 3917 | } |
3918 | 3918 | ||
3919 | pci_save_state(pdev); | ||
3919 | qdev->reg_base = | 3920 | qdev->reg_base = |
3920 | ioremap_nocache(pci_resource_start(pdev, 1), | 3921 | ioremap_nocache(pci_resource_start(pdev, 1), |
3921 | pci_resource_len(pdev, 1)); | 3922 | pci_resource_len(pdev, 1)); |
@@ -4070,6 +4071,33 @@ static void __devexit qlge_remove(struct pci_dev *pdev) | |||
4070 | free_netdev(ndev); | 4071 | free_netdev(ndev); |
4071 | } | 4072 | } |
4072 | 4073 | ||
4074 | /* Clean up resources without touching hardware. */ | ||
4075 | static void ql_eeh_close(struct net_device *ndev) | ||
4076 | { | ||
4077 | int i; | ||
4078 | struct ql_adapter *qdev = netdev_priv(ndev); | ||
4079 | |||
4080 | if (netif_carrier_ok(ndev)) { | ||
4081 | netif_carrier_off(ndev); | ||
4082 | netif_stop_queue(ndev); | ||
4083 | } | ||
4084 | |||
4085 | if (test_bit(QL_ADAPTER_UP, &qdev->flags)) | ||
4086 | cancel_delayed_work_sync(&qdev->asic_reset_work); | ||
4087 | cancel_delayed_work_sync(&qdev->mpi_reset_work); | ||
4088 | cancel_delayed_work_sync(&qdev->mpi_work); | ||
4089 | cancel_delayed_work_sync(&qdev->mpi_idc_work); | ||
4090 | cancel_delayed_work_sync(&qdev->mpi_port_cfg_work); | ||
4091 | |||
4092 | for (i = 0; i < qdev->rss_ring_count; i++) | ||
4093 | netif_napi_del(&qdev->rx_ring[i].napi); | ||
4094 | |||
4095 | clear_bit(QL_ADAPTER_UP, &qdev->flags); | ||
4096 | ql_tx_ring_clean(qdev); | ||
4097 | ql_free_rx_buffers(qdev); | ||
4098 | ql_release_adapter_resources(qdev); | ||
4099 | } | ||
4100 | |||
4073 | /* | 4101 | /* |
4074 | * This callback is called by the PCI subsystem whenever | 4102 | * This callback is called by the PCI subsystem whenever |
4075 | * a PCI bus error is detected. | 4103 | * a PCI bus error is detected. |
@@ -4078,17 +4106,21 @@ static pci_ers_result_t qlge_io_error_detected(struct pci_dev *pdev, | |||
4078 | enum pci_channel_state state) | 4106 | enum pci_channel_state state) |
4079 | { | 4107 | { |
4080 | struct net_device *ndev = pci_get_drvdata(pdev); | 4108 | struct net_device *ndev = pci_get_drvdata(pdev); |
4081 | struct ql_adapter *qdev = netdev_priv(ndev); | ||
4082 | |||
4083 | netif_device_detach(ndev); | ||
4084 | 4109 | ||
4085 | if (state == pci_channel_io_perm_failure) | 4110 | switch (state) { |
4111 | case pci_channel_io_normal: | ||
4112 | return PCI_ERS_RESULT_CAN_RECOVER; | ||
4113 | case pci_channel_io_frozen: | ||
4114 | netif_device_detach(ndev); | ||
4115 | if (netif_running(ndev)) | ||
4116 | ql_eeh_close(ndev); | ||
4117 | pci_disable_device(pdev); | ||
4118 | return PCI_ERS_RESULT_NEED_RESET; | ||
4119 | case pci_channel_io_perm_failure: | ||
4120 | dev_err(&pdev->dev, | ||
4121 | "%s: pci_channel_io_perm_failure.\n", __func__); | ||
4086 | return PCI_ERS_RESULT_DISCONNECT; | 4122 | return PCI_ERS_RESULT_DISCONNECT; |
4087 | 4123 | } | |
4088 | if (netif_running(ndev)) | ||
4089 | ql_adapter_down(qdev); | ||
4090 | |||
4091 | pci_disable_device(pdev); | ||
4092 | 4124 | ||
4093 | /* Request a slot reset. */ | 4125 | /* Request a slot reset. */ |
4094 | return PCI_ERS_RESULT_NEED_RESET; | 4126 | return PCI_ERS_RESULT_NEED_RESET; |
@@ -4105,25 +4137,15 @@ static pci_ers_result_t qlge_io_slot_reset(struct pci_dev *pdev) | |||
4105 | struct net_device *ndev = pci_get_drvdata(pdev); | 4137 | struct net_device *ndev = pci_get_drvdata(pdev); |
4106 | struct ql_adapter *qdev = netdev_priv(ndev); | 4138 | struct ql_adapter *qdev = netdev_priv(ndev); |
4107 | 4139 | ||
4140 | pdev->error_state = pci_channel_io_normal; | ||
4141 | |||
4142 | pci_restore_state(pdev); | ||
4108 | if (pci_enable_device(pdev)) { | 4143 | if (pci_enable_device(pdev)) { |
4109 | QPRINTK(qdev, IFUP, ERR, | 4144 | QPRINTK(qdev, IFUP, ERR, |
4110 | "Cannot re-enable PCI device after reset.\n"); | 4145 | "Cannot re-enable PCI device after reset.\n"); |
4111 | return PCI_ERS_RESULT_DISCONNECT; | 4146 | return PCI_ERS_RESULT_DISCONNECT; |
4112 | } | 4147 | } |
4113 | |||
4114 | pci_set_master(pdev); | 4148 | pci_set_master(pdev); |
4115 | |||
4116 | netif_carrier_off(ndev); | ||
4117 | ql_adapter_reset(qdev); | ||
4118 | |||
4119 | /* Make sure the EEPROM is good */ | ||
4120 | memcpy(ndev->perm_addr, ndev->dev_addr, ndev->addr_len); | ||
4121 | |||
4122 | if (!is_valid_ether_addr(ndev->perm_addr)) { | ||
4123 | QPRINTK(qdev, IFUP, ERR, "After reset, invalid MAC address.\n"); | ||
4124 | return PCI_ERS_RESULT_DISCONNECT; | ||
4125 | } | ||
4126 | |||
4127 | return PCI_ERS_RESULT_RECOVERED; | 4149 | return PCI_ERS_RESULT_RECOVERED; |
4128 | } | 4150 | } |
4129 | 4151 | ||
@@ -4131,17 +4153,21 @@ static void qlge_io_resume(struct pci_dev *pdev) | |||
4131 | { | 4153 | { |
4132 | struct net_device *ndev = pci_get_drvdata(pdev); | 4154 | struct net_device *ndev = pci_get_drvdata(pdev); |
4133 | struct ql_adapter *qdev = netdev_priv(ndev); | 4155 | struct ql_adapter *qdev = netdev_priv(ndev); |
4156 | int err = 0; | ||
4134 | 4157 | ||
4135 | pci_set_master(pdev); | 4158 | if (ql_adapter_reset(qdev)) |
4136 | 4159 | QPRINTK(qdev, DRV, ERR, "reset FAILED!\n"); | |
4137 | if (netif_running(ndev)) { | 4160 | if (netif_running(ndev)) { |
4138 | if (ql_adapter_up(qdev)) { | 4161 | err = qlge_open(ndev); |
4162 | if (err) { | ||
4139 | QPRINTK(qdev, IFUP, ERR, | 4163 | QPRINTK(qdev, IFUP, ERR, |
4140 | "Device initialization failed after reset.\n"); | 4164 | "Device initialization failed after reset.\n"); |
4141 | return; | 4165 | return; |
4142 | } | 4166 | } |
4167 | } else { | ||
4168 | QPRINTK(qdev, IFUP, ERR, | ||
4169 | "Device was not running prior to EEH.\n"); | ||
4143 | } | 4170 | } |
4144 | |||
4145 | netif_device_attach(ndev); | 4171 | netif_device_attach(ndev); |
4146 | } | 4172 | } |
4147 | 4173 | ||
diff --git a/drivers/net/qlge/qlge_mpi.c b/drivers/net/qlge/qlge_mpi.c index 99e58e3f8e22..bcf13c96f73f 100644 --- a/drivers/net/qlge/qlge_mpi.c +++ b/drivers/net/qlge/qlge_mpi.c | |||
@@ -470,7 +470,8 @@ end: | |||
470 | */ | 470 | */ |
471 | static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) | 471 | static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) |
472 | { | 472 | { |
473 | int status, count; | 473 | int status; |
474 | unsigned long count; | ||
474 | 475 | ||
475 | 476 | ||
476 | /* Begin polled mode for MPI */ | 477 | /* Begin polled mode for MPI */ |
@@ -491,9 +492,9 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) | |||
491 | /* Wait for the command to complete. We loop | 492 | /* Wait for the command to complete. We loop |
492 | * here because some AEN might arrive while | 493 | * here because some AEN might arrive while |
493 | * we're waiting for the mailbox command to | 494 | * we're waiting for the mailbox command to |
494 | * complete. If more than 5 arrive then we can | 495 | * complete. If more than 5 seconds expire we can |
495 | * assume something is wrong. */ | 496 | * assume something is wrong. */ |
496 | count = 5; | 497 | count = jiffies + HZ * MAILBOX_TIMEOUT; |
497 | do { | 498 | do { |
498 | /* Wait for the interrupt to come in. */ | 499 | /* Wait for the interrupt to come in. */ |
499 | status = ql_wait_mbx_cmd_cmplt(qdev); | 500 | status = ql_wait_mbx_cmd_cmplt(qdev); |
@@ -517,15 +518,15 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) | |||
517 | MB_CMD_STS_GOOD) || | 518 | MB_CMD_STS_GOOD) || |
518 | ((mbcp->mbox_out[0] & 0x0000f000) == | 519 | ((mbcp->mbox_out[0] & 0x0000f000) == |
519 | MB_CMD_STS_INTRMDT)) | 520 | MB_CMD_STS_INTRMDT)) |
520 | break; | 521 | goto done; |
521 | } while (--count); | 522 | } while (time_before(jiffies, count)); |
522 | 523 | ||
523 | if (!count) { | 524 | QPRINTK(qdev, DRV, ERR, |
524 | QPRINTK(qdev, DRV, ERR, | 525 | "Timed out waiting for mailbox complete.\n"); |
525 | "Timed out waiting for mailbox complete.\n"); | 526 | status = -ETIMEDOUT; |
526 | status = -ETIMEDOUT; | 527 | goto end; |
527 | goto end; | 528 | |
528 | } | 529 | done: |
529 | 530 | ||
530 | /* Now we can clear the interrupt condition | 531 | /* Now we can clear the interrupt condition |
531 | * and look at our status. | 532 | * and look at our status. |
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index 83c47d95c3aa..f98ef523f525 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -1029,7 +1029,10 @@ static void rtl8169_vlan_rx_register(struct net_device *dev, | |||
1029 | 1029 | ||
1030 | spin_lock_irqsave(&tp->lock, flags); | 1030 | spin_lock_irqsave(&tp->lock, flags); |
1031 | tp->vlgrp = grp; | 1031 | tp->vlgrp = grp; |
1032 | if (tp->vlgrp) | 1032 | /* |
1033 | * Do not disable RxVlan on 8110SCd. | ||
1034 | */ | ||
1035 | if (tp->vlgrp || (tp->mac_version == RTL_GIGA_MAC_VER_05)) | ||
1033 | tp->cp_cmd |= RxVlan; | 1036 | tp->cp_cmd |= RxVlan; |
1034 | else | 1037 | else |
1035 | tp->cp_cmd &= ~RxVlan; | 1038 | tp->cp_cmd &= ~RxVlan; |
@@ -3197,6 +3200,14 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3197 | } | 3200 | } |
3198 | 3201 | ||
3199 | rtl8169_init_phy(dev, tp); | 3202 | rtl8169_init_phy(dev, tp); |
3203 | |||
3204 | /* | ||
3205 | * Pretend we are using VLANs; This bypasses a nasty bug where | ||
3206 | * Interrupts stop flowing on high load on 8110SCd controllers. | ||
3207 | */ | ||
3208 | if (tp->mac_version == RTL_GIGA_MAC_VER_05) | ||
3209 | RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | RxVlan); | ||
3210 | |||
3200 | device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL); | 3211 | device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL); |
3201 | 3212 | ||
3202 | out: | 3213 | out: |
diff --git a/drivers/net/sfc/rx.c b/drivers/net/sfc/rx.c index 01f9432c31ef..98bff5ada09a 100644 --- a/drivers/net/sfc/rx.c +++ b/drivers/net/sfc/rx.c | |||
@@ -444,7 +444,8 @@ static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue, | |||
444 | * the appropriate LRO method | 444 | * the appropriate LRO method |
445 | */ | 445 | */ |
446 | static void efx_rx_packet_lro(struct efx_channel *channel, | 446 | static void efx_rx_packet_lro(struct efx_channel *channel, |
447 | struct efx_rx_buffer *rx_buf) | 447 | struct efx_rx_buffer *rx_buf, |
448 | bool checksummed) | ||
448 | { | 449 | { |
449 | struct napi_struct *napi = &channel->napi_str; | 450 | struct napi_struct *napi = &channel->napi_str; |
450 | 451 | ||
@@ -466,7 +467,8 @@ static void efx_rx_packet_lro(struct efx_channel *channel, | |||
466 | skb->len = rx_buf->len; | 467 | skb->len = rx_buf->len; |
467 | skb->data_len = rx_buf->len; | 468 | skb->data_len = rx_buf->len; |
468 | skb->truesize += rx_buf->len; | 469 | skb->truesize += rx_buf->len; |
469 | skb->ip_summed = CHECKSUM_UNNECESSARY; | 470 | skb->ip_summed = |
471 | checksummed ? CHECKSUM_UNNECESSARY : CHECKSUM_NONE; | ||
470 | 472 | ||
471 | napi_gro_frags(napi); | 473 | napi_gro_frags(napi); |
472 | 474 | ||
@@ -475,6 +477,7 @@ out: | |||
475 | rx_buf->page = NULL; | 477 | rx_buf->page = NULL; |
476 | } else { | 478 | } else { |
477 | EFX_BUG_ON_PARANOID(!rx_buf->skb); | 479 | EFX_BUG_ON_PARANOID(!rx_buf->skb); |
480 | EFX_BUG_ON_PARANOID(!checksummed); | ||
478 | 481 | ||
479 | napi_gro_receive(napi, rx_buf->skb); | 482 | napi_gro_receive(napi, rx_buf->skb); |
480 | rx_buf->skb = NULL; | 483 | rx_buf->skb = NULL; |
@@ -570,7 +573,7 @@ void __efx_rx_packet(struct efx_channel *channel, | |||
570 | } | 573 | } |
571 | 574 | ||
572 | if (likely(checksummed || rx_buf->page)) { | 575 | if (likely(checksummed || rx_buf->page)) { |
573 | efx_rx_packet_lro(channel, rx_buf); | 576 | efx_rx_packet_lro(channel, rx_buf, checksummed); |
574 | goto done; | 577 | goto done; |
575 | } | 578 | } |
576 | 579 | ||
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index f49d0800c1d1..528b912a4b0d 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/phy.h> | 30 | #include <linux/phy.h> |
31 | #include <linux/cache.h> | 31 | #include <linux/cache.h> |
32 | #include <linux/io.h> | 32 | #include <linux/io.h> |
33 | #include <asm/cacheflush.h> | ||
33 | 34 | ||
34 | #include "sh_eth.h" | 35 | #include "sh_eth.h" |
35 | 36 | ||
diff --git a/drivers/net/usb/dm9601.c b/drivers/net/usb/dm9601.c index 72470f77f556..a2b30a10064f 100644 --- a/drivers/net/usb/dm9601.c +++ b/drivers/net/usb/dm9601.c | |||
@@ -649,6 +649,10 @@ static const struct usb_device_id products[] = { | |||
649 | USB_DEVICE(0x0fe6, 0x8101), /* DM9601 USB to Fast Ethernet Adapter */ | 649 | USB_DEVICE(0x0fe6, 0x8101), /* DM9601 USB to Fast Ethernet Adapter */ |
650 | .driver_info = (unsigned long)&dm9601_info, | 650 | .driver_info = (unsigned long)&dm9601_info, |
651 | }, | 651 | }, |
652 | { | ||
653 | USB_DEVICE(0x0a46, 0x9000), /* DM9000E */ | ||
654 | .driver_info = (unsigned long)&dm9601_info, | ||
655 | }, | ||
652 | {}, // END | 656 | {}, // END |
653 | }; | 657 | }; |
654 | 658 | ||
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c index 3709d6af9abf..05630f2f6930 100644 --- a/drivers/net/virtio_net.c +++ b/drivers/net/virtio_net.c | |||
@@ -516,8 +516,7 @@ again: | |||
516 | /* Free up any pending old buffers before queueing new ones. */ | 516 | /* Free up any pending old buffers before queueing new ones. */ |
517 | free_old_xmit_skbs(vi); | 517 | free_old_xmit_skbs(vi); |
518 | 518 | ||
519 | /* Put new one in send queue and do transmit */ | 519 | /* Try to transmit */ |
520 | __skb_queue_head(&vi->send, skb); | ||
521 | capacity = xmit_skb(vi, skb); | 520 | capacity = xmit_skb(vi, skb); |
522 | 521 | ||
523 | /* This can happen with OOM and indirect buffers. */ | 522 | /* This can happen with OOM and indirect buffers. */ |
@@ -531,8 +530,17 @@ again: | |||
531 | } | 530 | } |
532 | return NETDEV_TX_BUSY; | 531 | return NETDEV_TX_BUSY; |
533 | } | 532 | } |
534 | |||
535 | vi->svq->vq_ops->kick(vi->svq); | 533 | vi->svq->vq_ops->kick(vi->svq); |
534 | |||
535 | /* | ||
536 | * Put new one in send queue. You'd expect we'd need this before | ||
537 | * xmit_skb calls add_buf(), since the callback can be triggered | ||
538 | * immediately after that. But since the callback just triggers | ||
539 | * another call back here, normal network xmit locking prevents the | ||
540 | * race. | ||
541 | */ | ||
542 | __skb_queue_head(&vi->send, skb); | ||
543 | |||
536 | /* Don't wait up for transmitted skbs to be freed. */ | 544 | /* Don't wait up for transmitted skbs to be freed. */ |
537 | skb_orphan(skb); | 545 | skb_orphan(skb); |
538 | nf_reset(skb); | 546 | nf_reset(skb); |
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c index 7116a1aa20ce..abf896a7390e 100644 --- a/drivers/net/wireless/airo.c +++ b/drivers/net/wireless/airo.c | |||
@@ -4790,9 +4790,8 @@ static int proc_stats_rid_open( struct inode *inode, | |||
4790 | static int get_dec_u16( char *buffer, int *start, int limit ) { | 4790 | static int get_dec_u16( char *buffer, int *start, int limit ) { |
4791 | u16 value; | 4791 | u16 value; |
4792 | int valid = 0; | 4792 | int valid = 0; |
4793 | for( value = 0; buffer[*start] >= '0' && | 4793 | for (value = 0; *start < limit && buffer[*start] >= '0' && |
4794 | buffer[*start] <= '9' && | 4794 | buffer[*start] <= '9'; (*start)++) { |
4795 | *start < limit; (*start)++ ) { | ||
4796 | valid = 1; | 4795 | valid = 1; |
4797 | value *= 10; | 4796 | value *= 10; |
4798 | value += buffer[*start] - '0'; | 4797 | value += buffer[*start] - '0'; |
diff --git a/drivers/net/wireless/b43/leds.h b/drivers/net/wireless/b43/leds.h index 4c56187810fc..32b66d53cdac 100644 --- a/drivers/net/wireless/b43/leds.h +++ b/drivers/net/wireless/b43/leds.h | |||
@@ -1,6 +1,7 @@ | |||
1 | #ifndef B43_LEDS_H_ | 1 | #ifndef B43_LEDS_H_ |
2 | #define B43_LEDS_H_ | 2 | #define B43_LEDS_H_ |
3 | 3 | ||
4 | struct b43_wl; | ||
4 | struct b43_wldev; | 5 | struct b43_wldev; |
5 | 6 | ||
6 | #ifdef CONFIG_B43_LEDS | 7 | #ifdef CONFIG_B43_LEDS |
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c index df6b26a0c05e..86f35827f008 100644 --- a/drivers/net/wireless/b43/main.c +++ b/drivers/net/wireless/b43/main.c | |||
@@ -4501,7 +4501,6 @@ static void b43_op_stop(struct ieee80211_hw *hw) | |||
4501 | 4501 | ||
4502 | cancel_work_sync(&(wl->beacon_update_trigger)); | 4502 | cancel_work_sync(&(wl->beacon_update_trigger)); |
4503 | 4503 | ||
4504 | wiphy_rfkill_stop_polling(hw->wiphy); | ||
4505 | mutex_lock(&wl->mutex); | 4504 | mutex_lock(&wl->mutex); |
4506 | if (b43_status(dev) >= B43_STAT_STARTED) { | 4505 | if (b43_status(dev) >= B43_STAT_STARTED) { |
4507 | dev = b43_wireless_core_stop(dev); | 4506 | dev = b43_wireless_core_stop(dev); |
diff --git a/drivers/net/wireless/b43/rfkill.c b/drivers/net/wireless/b43/rfkill.c index 7a3218c5ba7d..ffdce6f3c909 100644 --- a/drivers/net/wireless/b43/rfkill.c +++ b/drivers/net/wireless/b43/rfkill.c | |||
@@ -33,7 +33,8 @@ bool b43_is_hw_radio_enabled(struct b43_wldev *dev) | |||
33 | & B43_MMIO_RADIO_HWENABLED_HI_MASK)) | 33 | & B43_MMIO_RADIO_HWENABLED_HI_MASK)) |
34 | return 1; | 34 | return 1; |
35 | } else { | 35 | } else { |
36 | if (b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO) | 36 | if (b43_status(dev) >= B43_STAT_STARTED && |
37 | b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO) | ||
37 | & B43_MMIO_RADIO_HWENABLED_LO_MASK) | 38 | & B43_MMIO_RADIO_HWENABLED_LO_MASK) |
38 | return 1; | 39 | return 1; |
39 | } | 40 | } |
diff --git a/drivers/net/wireless/libertas/if_spi.c b/drivers/net/wireless/libertas/if_spi.c index cb8be8d7abc1..5b3672c4d0cc 100644 --- a/drivers/net/wireless/libertas/if_spi.c +++ b/drivers/net/wireless/libertas/if_spi.c | |||
@@ -134,7 +134,7 @@ static void spu_transaction_finish(struct if_spi_card *card) | |||
134 | static int spu_write(struct if_spi_card *card, u16 reg, const u8 *buf, int len) | 134 | static int spu_write(struct if_spi_card *card, u16 reg, const u8 *buf, int len) |
135 | { | 135 | { |
136 | int err = 0; | 136 | int err = 0; |
137 | u16 reg_out = cpu_to_le16(reg | IF_SPI_WRITE_OPERATION_MASK); | 137 | __le16 reg_out = cpu_to_le16(reg | IF_SPI_WRITE_OPERATION_MASK); |
138 | struct spi_message m; | 138 | struct spi_message m; |
139 | struct spi_transfer reg_trans; | 139 | struct spi_transfer reg_trans; |
140 | struct spi_transfer data_trans; | 140 | struct spi_transfer data_trans; |
@@ -166,7 +166,7 @@ static int spu_write(struct if_spi_card *card, u16 reg, const u8 *buf, int len) | |||
166 | 166 | ||
167 | static inline int spu_write_u16(struct if_spi_card *card, u16 reg, u16 val) | 167 | static inline int spu_write_u16(struct if_spi_card *card, u16 reg, u16 val) |
168 | { | 168 | { |
169 | u16 buff; | 169 | __le16 buff; |
170 | 170 | ||
171 | buff = cpu_to_le16(val); | 171 | buff = cpu_to_le16(val); |
172 | return spu_write(card, reg, (u8 *)&buff, sizeof(u16)); | 172 | return spu_write(card, reg, (u8 *)&buff, sizeof(u16)); |
@@ -188,7 +188,7 @@ static int spu_read(struct if_spi_card *card, u16 reg, u8 *buf, int len) | |||
188 | { | 188 | { |
189 | unsigned int delay; | 189 | unsigned int delay; |
190 | int err = 0; | 190 | int err = 0; |
191 | u16 reg_out = cpu_to_le16(reg | IF_SPI_READ_OPERATION_MASK); | 191 | __le16 reg_out = cpu_to_le16(reg | IF_SPI_READ_OPERATION_MASK); |
192 | struct spi_message m; | 192 | struct spi_message m; |
193 | struct spi_transfer reg_trans; | 193 | struct spi_transfer reg_trans; |
194 | struct spi_transfer dummy_trans; | 194 | struct spi_transfer dummy_trans; |
@@ -235,7 +235,7 @@ static int spu_read(struct if_spi_card *card, u16 reg, u8 *buf, int len) | |||
235 | /* Read 16 bits from an SPI register */ | 235 | /* Read 16 bits from an SPI register */ |
236 | static inline int spu_read_u16(struct if_spi_card *card, u16 reg, u16 *val) | 236 | static inline int spu_read_u16(struct if_spi_card *card, u16 reg, u16 *val) |
237 | { | 237 | { |
238 | u16 buf; | 238 | __le16 buf; |
239 | int ret; | 239 | int ret; |
240 | 240 | ||
241 | ret = spu_read(card, reg, (u8 *)&buf, sizeof(buf)); | 241 | ret = spu_read(card, reg, (u8 *)&buf, sizeof(buf)); |
@@ -248,7 +248,7 @@ static inline int spu_read_u16(struct if_spi_card *card, u16 reg, u16 *val) | |||
248 | * The low 16 bits are read first. */ | 248 | * The low 16 bits are read first. */ |
249 | static int spu_read_u32(struct if_spi_card *card, u16 reg, u32 *val) | 249 | static int spu_read_u32(struct if_spi_card *card, u16 reg, u32 *val) |
250 | { | 250 | { |
251 | u32 buf; | 251 | __le32 buf; |
252 | int err; | 252 | int err; |
253 | 253 | ||
254 | err = spu_read(card, reg, (u8 *)&buf, sizeof(buf)); | 254 | err = spu_read(card, reg, (u8 *)&buf, sizeof(buf)); |
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c index a084077a1c61..9fe770f7d7bb 100644 --- a/drivers/net/wireless/rt2x00/rt2800usb.c +++ b/drivers/net/wireless/rt2x00/rt2800usb.c | |||
@@ -1994,7 +1994,7 @@ static void rt2800usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1994 | rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->ba_size); | 1994 | rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->ba_size); |
1995 | rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID, | 1995 | rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID, |
1996 | test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ? | 1996 | test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ? |
1997 | (skbdesc->entry->entry_idx + 1) : 0xff); | 1997 | txdesc->key_idx : 0xff); |
1998 | rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT, | 1998 | rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT, |
1999 | skb->len - txdesc->l2pad); | 1999 | skb->len - txdesc->l2pad); |
2000 | rt2x00_set_field32(&word, TXWI_W1_PACKETID, | 2000 | rt2x00_set_field32(&word, TXWI_W1_PACKETID, |