diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/media/video/tvp5150.c | 493 | ||||
-rw-r--r-- | drivers/media/video/tvp5150_reg.h | 118 |
2 files changed, 238 insertions, 373 deletions
diff --git a/drivers/media/video/tvp5150.c b/drivers/media/video/tvp5150.c index a6330a351eaa..f7fa93c64d11 100644 --- a/drivers/media/video/tvp5150.c +++ b/drivers/media/video/tvp5150.c | |||
@@ -29,6 +29,9 @@ static int debug = 0; | |||
29 | module_param(debug, int, 0); | 29 | module_param(debug, int, 0); |
30 | MODULE_PARM_DESC(debug, "Debug level (0-1)"); | 30 | MODULE_PARM_DESC(debug, "Debug level (0-1)"); |
31 | 31 | ||
32 | #define tvp5150_err(fmt, arg...) do { \ | ||
33 | printk(KERN_ERR "%s %d-%04x: " fmt, c->driver->driver.name, \ | ||
34 | i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0) | ||
32 | #define tvp5150_info(fmt, arg...) do { \ | 35 | #define tvp5150_info(fmt, arg...) do { \ |
33 | printk(KERN_INFO "%s %d-%04x: " fmt, c->driver->driver.name, \ | 36 | printk(KERN_INFO "%s %d-%04x: " fmt, c->driver->driver.name, \ |
34 | i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0) | 37 | i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0) |
@@ -84,7 +87,7 @@ static struct v4l2_queryctrl tvp5150_qctrl[] = { | |||
84 | struct tvp5150 { | 87 | struct tvp5150 { |
85 | struct i2c_client *client; | 88 | struct i2c_client *client; |
86 | 89 | ||
87 | int norm; | 90 | v4l2_std_id norm; /* Current set standard */ |
88 | int input; | 91 | int input; |
89 | int enable; | 92 | int enable; |
90 | int bright; | 93 | int bright; |
@@ -125,310 +128,155 @@ static inline void tvp5150_write(struct i2c_client *c, unsigned char addr, | |||
125 | tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 2)\n", rc); | 128 | tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 2)\n", rc); |
126 | } | 129 | } |
127 | 130 | ||
131 | static void dump_reg_range(struct i2c_client *c, char *s, u8 init, const u8 end,int max_line) | ||
132 | { | ||
133 | int i=0; | ||
134 | |||
135 | while (init!=(u8)(end+1)) { | ||
136 | if ((i%max_line) == 0) { | ||
137 | if (i>0) | ||
138 | printk("\n"); | ||
139 | printk("tvp5150: %s reg 0x%02x = ",s,init); | ||
140 | } | ||
141 | printk("%02x ",tvp5150_read(c, init)); | ||
142 | |||
143 | init++; | ||
144 | i++; | ||
145 | } | ||
146 | printk("\n"); | ||
147 | } | ||
148 | |||
128 | static void dump_reg(struct i2c_client *c) | 149 | static void dump_reg(struct i2c_client *c) |
129 | { | 150 | { |
130 | printk("tvp5150: Video input source selection #1 = 0x%02x\n", | 151 | printk("tvp5150: Video input source selection #1 = 0x%02x\n", |
131 | tvp5150_read(c, TVP5150_VD_IN_SRC_SEL_1)); | 152 | tvp5150_read(c, TVP5150_VD_IN_SRC_SEL_1)); |
132 | printk("tvp5150: Analog channel controls = 0x%02x\n", | 153 | printk("tvp5150: Analog channel controls = 0x%02x\n", |
133 | tvp5150_read(c, TVP5150_ANAL_CHL_CTL)); | 154 | tvp5150_read(c, TVP5150_ANAL_CHL_CTL)); |
134 | printk("tvp5150: Operation mode controls = 0x%02x\n", | 155 | printk("tvp5150: Operation mode controls = 0x%02x\n", |
135 | tvp5150_read(c, TVP5150_OP_MODE_CTL)); | 156 | tvp5150_read(c, TVP5150_OP_MODE_CTL)); |
136 | printk("tvp5150: Miscellaneous controls = 0x%02x\n", | 157 | printk("tvp5150: Miscellaneous controls = 0x%02x\n", |
137 | tvp5150_read(c, TVP5150_MISC_CTL)); | 158 | tvp5150_read(c, TVP5150_MISC_CTL)); |
138 | printk("tvp5150: Autoswitch mask: TVP5150A / TVP5150AM = 0x%02x\n", | 159 | printk("tvp5150: Autoswitch mask= 0x%02x\n", |
139 | tvp5150_read(c, TVP5150_AUTOSW_MSK)); | 160 | tvp5150_read(c, TVP5150_AUTOSW_MSK)); |
140 | printk("tvp5150: Color killer threshold control = 0x%02x\n", | 161 | printk("tvp5150: Color killer threshold control = 0x%02x\n", |
141 | tvp5150_read(c, TVP5150_COLOR_KIL_THSH_CTL)); | 162 | tvp5150_read(c, TVP5150_COLOR_KIL_THSH_CTL)); |
142 | printk("tvp5150: Luminance processing control #1 = 0x%02x\n", | 163 | printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n", |
143 | tvp5150_read(c, TVP5150_LUMA_PROC_CTL_1)); | 164 | tvp5150_read(c, TVP5150_LUMA_PROC_CTL_1), |
144 | printk("tvp5150: Luminance processing control #2 = 0x%02x\n", | 165 | tvp5150_read(c, TVP5150_LUMA_PROC_CTL_2), |
145 | tvp5150_read(c, TVP5150_LUMA_PROC_CTL_2)); | 166 | tvp5150_read(c, TVP5150_LUMA_PROC_CTL_3)); |
146 | printk("tvp5150: Brightness control = 0x%02x\n", | 167 | printk("tvp5150: Brightness control = 0x%02x\n", |
147 | tvp5150_read(c, TVP5150_BRIGHT_CTL)); | 168 | tvp5150_read(c, TVP5150_BRIGHT_CTL)); |
148 | printk("tvp5150: Color saturation control = 0x%02x\n", | 169 | printk("tvp5150: Color saturation control = 0x%02x\n", |
149 | tvp5150_read(c, TVP5150_SATURATION_CTL)); | 170 | tvp5150_read(c, TVP5150_SATURATION_CTL)); |
150 | printk("tvp5150: Hue control = 0x%02x\n", | 171 | printk("tvp5150: Hue control = 0x%02x\n", |
151 | tvp5150_read(c, TVP5150_HUE_CTL)); | 172 | tvp5150_read(c, TVP5150_HUE_CTL)); |
152 | printk("tvp5150: Contrast control = 0x%02x\n", | 173 | printk("tvp5150: Contrast control = 0x%02x\n", |
153 | tvp5150_read(c, TVP5150_CONTRAST_CTL)); | 174 | tvp5150_read(c, TVP5150_CONTRAST_CTL)); |
154 | printk("tvp5150: Outputs and data rates select = 0x%02x\n", | 175 | printk("tvp5150: Outputs and data rates select = 0x%02x\n", |
155 | tvp5150_read(c, TVP5150_DATA_RATE_SEL)); | 176 | tvp5150_read(c, TVP5150_DATA_RATE_SEL)); |
156 | printk("tvp5150: Luminance processing control #3 = 0x%02x\n", | ||
157 | tvp5150_read(c, TVP5150_LUMA_PROC_CTL_3)); | ||
158 | printk("tvp5150: Configuration shared pins = 0x%02x\n", | 177 | printk("tvp5150: Configuration shared pins = 0x%02x\n", |
159 | tvp5150_read(c, TVP5150_CONF_SHARED_PIN)); | 178 | tvp5150_read(c, TVP5150_CONF_SHARED_PIN)); |
160 | printk("tvp5150: Active video cropping start MSB = 0x%02x\n", | 179 | printk("tvp5150: Active video cropping start = 0x%02x%02x\n", |
161 | tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_MSB)); | 180 | tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_MSB), |
162 | printk("tvp5150: Active video cropping start LSB = 0x%02x\n", | 181 | tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_LSB)); |
163 | tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_LSB)); | 182 | printk("tvp5150: Active video cropping stop = 0x%02x%02x\n", |
164 | printk("tvp5150: Active video cropping stop MSB = 0x%02x\n", | 183 | tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_MSB), |
165 | tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_MSB)); | 184 | tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_LSB)); |
166 | printk("tvp5150: Active video cropping stop LSB = 0x%02x\n", | ||
167 | tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_LSB)); | ||
168 | printk("tvp5150: Genlock/RTC = 0x%02x\n", | 185 | printk("tvp5150: Genlock/RTC = 0x%02x\n", |
169 | tvp5150_read(c, TVP5150_GENLOCK)); | 186 | tvp5150_read(c, TVP5150_GENLOCK)); |
170 | printk("tvp5150: Horizontal sync start = 0x%02x\n", | 187 | printk("tvp5150: Horizontal sync start = 0x%02x\n", |
171 | tvp5150_read(c, TVP5150_HORIZ_SYNC_START)); | 188 | tvp5150_read(c, TVP5150_HORIZ_SYNC_START)); |
172 | printk("tvp5150: Vertical blanking start = 0x%02x\n", | 189 | printk("tvp5150: Vertical blanking start = 0x%02x\n", |
173 | tvp5150_read(c, TVP5150_VERT_BLANKING_START)); | 190 | tvp5150_read(c, TVP5150_VERT_BLANKING_START)); |
174 | printk("tvp5150: Vertical blanking stop = 0x%02x\n", | 191 | printk("tvp5150: Vertical blanking stop = 0x%02x\n", |
175 | tvp5150_read(c, TVP5150_VERT_BLANKING_STOP)); | 192 | tvp5150_read(c, TVP5150_VERT_BLANKING_STOP)); |
176 | printk("tvp5150: Chrominance processing control #1 = 0x%02x\n", | 193 | printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n", |
177 | tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_1)); | 194 | tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_1), |
178 | printk("tvp5150: Chrominance processing control #2 = 0x%02x\n", | 195 | tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_2)); |
179 | tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_2)); | ||
180 | printk("tvp5150: Interrupt reset register B = 0x%02x\n", | 196 | printk("tvp5150: Interrupt reset register B = 0x%02x\n", |
181 | tvp5150_read(c, TVP5150_INT_RESET_REG_B)); | 197 | tvp5150_read(c, TVP5150_INT_RESET_REG_B)); |
182 | printk("tvp5150: Interrupt enable register B = 0x%02x\n", | 198 | printk("tvp5150: Interrupt enable register B = 0x%02x\n", |
183 | tvp5150_read(c, TVP5150_INT_ENABLE_REG_B)); | 199 | tvp5150_read(c, TVP5150_INT_ENABLE_REG_B)); |
184 | printk("tvp5150: Interrupt configuration register B = 0x%02x\n", | 200 | printk("tvp5150: Interrupt configuration register B = 0x%02x\n", |
185 | tvp5150_read(c, TVP5150_INTT_CONFIG_REG_B)); | 201 | tvp5150_read(c, TVP5150_INTT_CONFIG_REG_B)); |
186 | printk("tvp5150: Video standard = 0x%02x\n", | 202 | printk("tvp5150: Video standard = 0x%02x\n", |
187 | tvp5150_read(c, TVP5150_VIDEO_STD)); | 203 | tvp5150_read(c, TVP5150_VIDEO_STD)); |
188 | printk("tvp5150: Cb gain factor = 0x%02x\n", | 204 | printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n", |
189 | tvp5150_read(c, TVP5150_CB_GAIN_FACT)); | 205 | tvp5150_read(c, TVP5150_CB_GAIN_FACT), |
190 | printk("tvp5150: Cr gain factor = 0x%02x\n", | 206 | tvp5150_read(c, TVP5150_CR_GAIN_FACTOR)); |
191 | tvp5150_read(c, TVP5150_CR_GAIN_FACTOR)); | ||
192 | printk("tvp5150: Macrovision on counter = 0x%02x\n", | 207 | printk("tvp5150: Macrovision on counter = 0x%02x\n", |
193 | tvp5150_read(c, TVP5150_MACROVISION_ON_CTR)); | 208 | tvp5150_read(c, TVP5150_MACROVISION_ON_CTR)); |
194 | printk("tvp5150: Macrovision off counter = 0x%02x\n", | 209 | printk("tvp5150: Macrovision off counter = 0x%02x\n", |
195 | tvp5150_read(c, TVP5150_MACROVISION_OFF_CTR)); | 210 | tvp5150_read(c, TVP5150_MACROVISION_OFF_CTR)); |
196 | printk("tvp5150: revision select (TVP5150AM1 only) = 0x%02x\n", | 211 | printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n", |
197 | tvp5150_read(c, TVP5150_REV_SELECT)); | 212 | (tvp5150_read(c, TVP5150_REV_SELECT)&1)?3:4); |
198 | printk("tvp5150: MSB of device ID = 0x%02x\n", | 213 | printk("tvp5150: Device ID = %02x%02x\n", |
199 | tvp5150_read(c, TVP5150_MSB_DEV_ID)); | 214 | tvp5150_read(c, TVP5150_MSB_DEV_ID), |
200 | printk("tvp5150: LSB of device ID = 0x%02x\n", | 215 | tvp5150_read(c, TVP5150_LSB_DEV_ID)); |
201 | tvp5150_read(c, TVP5150_LSB_DEV_ID)); | 216 | printk("tvp5150: ROM version = (hex) %02x.%02x\n", |
202 | printk("tvp5150: ROM major version = 0x%02x\n", | 217 | tvp5150_read(c, TVP5150_ROM_MAJOR_VER), |
203 | tvp5150_read(c, TVP5150_ROM_MAJOR_VER)); | 218 | tvp5150_read(c, TVP5150_ROM_MINOR_VER)); |
204 | printk("tvp5150: ROM minor version = 0x%02x\n", | 219 | printk("tvp5150: Vertical line count = 0x%02x%02x\n", |
205 | tvp5150_read(c, TVP5150_ROM_MINOR_VER)); | 220 | tvp5150_read(c, TVP5150_VERT_LN_COUNT_MSB), |
206 | printk("tvp5150: Vertical line count MSB = 0x%02x\n", | 221 | tvp5150_read(c, TVP5150_VERT_LN_COUNT_LSB)); |
207 | tvp5150_read(c, TVP5150_VERT_LN_COUNT_MSB)); | ||
208 | printk("tvp5150: Vertical line count LSB = 0x%02x\n", | ||
209 | tvp5150_read(c, TVP5150_VERT_LN_COUNT_LSB)); | ||
210 | printk("tvp5150: Interrupt status register B = 0x%02x\n", | 222 | printk("tvp5150: Interrupt status register B = 0x%02x\n", |
211 | tvp5150_read(c, TVP5150_INT_STATUS_REG_B)); | 223 | tvp5150_read(c, TVP5150_INT_STATUS_REG_B)); |
212 | printk("tvp5150: Interrupt active register B = 0x%02x\n", | 224 | printk("tvp5150: Interrupt active register B = 0x%02x\n", |
213 | tvp5150_read(c, TVP5150_INT_ACTIVE_REG_B)); | 225 | tvp5150_read(c, TVP5150_INT_ACTIVE_REG_B)); |
214 | printk("tvp5150: Status register #1 = 0x%02x\n", | 226 | printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n", |
215 | tvp5150_read(c, TVP5150_STATUS_REG_1)); | 227 | tvp5150_read(c, TVP5150_STATUS_REG_1), |
216 | printk("tvp5150: Status register #2 = 0x%02x\n", | 228 | tvp5150_read(c, TVP5150_STATUS_REG_2), |
217 | tvp5150_read(c, TVP5150_STATUS_REG_2)); | 229 | tvp5150_read(c, TVP5150_STATUS_REG_3), |
218 | printk("tvp5150: Status register #3 = 0x%02x\n", | 230 | tvp5150_read(c, TVP5150_STATUS_REG_4), |
219 | tvp5150_read(c, TVP5150_STATUS_REG_3)); | 231 | tvp5150_read(c, TVP5150_STATUS_REG_5)); |
220 | printk("tvp5150: Status register #4 = 0x%02x\n", | 232 | |
221 | tvp5150_read(c, TVP5150_STATUS_REG_4)); | 233 | dump_reg_range(c,"Teletext filter 1", TVP5150_TELETEXT_FIL1_INI, |
222 | printk("tvp5150: Status register #5 = 0x%02x\n", | 234 | TVP5150_TELETEXT_FIL1_END,8); |
223 | tvp5150_read(c, TVP5150_STATUS_REG_5)); | 235 | dump_reg_range(c,"Teletext filter 2", TVP5150_TELETEXT_FIL2_INI, |
224 | printk("tvp5150: Closed caption data registers = 0x%02x\n", | 236 | TVP5150_TELETEXT_FIL2_END,8); |
225 | tvp5150_read(c, TVP5150_CC_DATA_REG1)); | 237 | |
226 | printk("tvp5150: Closed caption data registers = 0x%02x\n", | ||
227 | tvp5150_read(c, TVP5150_CC_DATA_REG2)); | ||
228 | printk("tvp5150: Closed caption data registers = 0x%02x\n", | ||
229 | tvp5150_read(c, TVP5150_CC_DATA_REG3)); | ||
230 | printk("tvp5150: Closed caption data registers = 0x%02x\n", | ||
231 | tvp5150_read(c, TVP5150_CC_DATA_REG4)); | ||
232 | printk("tvp5150: WSS data registers = 0x%02x\n", | ||
233 | tvp5150_read(c, TVP5150_WSS_DATA_REG1)); | ||
234 | printk("tvp5150: WSS data registers = 0x%02x\n", | ||
235 | tvp5150_read(c, TVP5150_WSS_DATA_REG2)); | ||
236 | printk("tvp5150: WSS data registers = 0x%02x\n", | ||
237 | tvp5150_read(c, TVP5150_WSS_DATA_REG3)); | ||
238 | printk("tvp5150: WSS data registers = 0x%02x\n", | ||
239 | tvp5150_read(c, TVP5150_WSS_DATA_REG4)); | ||
240 | printk("tvp5150: WSS data registers = 0x%02x\n", | ||
241 | tvp5150_read(c, TVP5150_WSS_DATA_REG5)); | ||
242 | printk("tvp5150: WSS data registers = 0x%02x\n", | ||
243 | tvp5150_read(c, TVP5150_WSS_DATA_REG6)); | ||
244 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
245 | tvp5150_read(c, TVP5150_VPS_DATA_REG1)); | ||
246 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
247 | tvp5150_read(c, TVP5150_VPS_DATA_REG2)); | ||
248 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
249 | tvp5150_read(c, TVP5150_VPS_DATA_REG3)); | ||
250 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
251 | tvp5150_read(c, TVP5150_VPS_DATA_REG4)); | ||
252 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
253 | tvp5150_read(c, TVP5150_VPS_DATA_REG5)); | ||
254 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
255 | tvp5150_read(c, TVP5150_VPS_DATA_REG6)); | ||
256 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
257 | tvp5150_read(c, TVP5150_VPS_DATA_REG7)); | ||
258 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
259 | tvp5150_read(c, TVP5150_VPS_DATA_REG8)); | ||
260 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
261 | tvp5150_read(c, TVP5150_VPS_DATA_REG9)); | ||
262 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
263 | tvp5150_read(c, TVP5150_VPS_DATA_REG10)); | ||
264 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
265 | tvp5150_read(c, TVP5150_VPS_DATA_REG11)); | ||
266 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
267 | tvp5150_read(c, TVP5150_VPS_DATA_REG12)); | ||
268 | printk("tvp5150: VPS data registers = 0x%02x\n", | ||
269 | tvp5150_read(c, TVP5150_VPS_DATA_REG13)); | ||
270 | printk("tvp5150: VITC data registers = 0x%02x\n", | ||
271 | tvp5150_read(c, TVP5150_VITC_DATA_REG1)); | ||
272 | printk("tvp5150: VITC data registers = 0x%02x\n", | ||
273 | tvp5150_read(c, TVP5150_VITC_DATA_REG2)); | ||
274 | printk("tvp5150: VITC data registers = 0x%02x\n", | ||
275 | tvp5150_read(c, TVP5150_VITC_DATA_REG3)); | ||
276 | printk("tvp5150: VITC data registers = 0x%02x\n", | ||
277 | tvp5150_read(c, TVP5150_VITC_DATA_REG4)); | ||
278 | printk("tvp5150: VITC data registers = 0x%02x\n", | ||
279 | tvp5150_read(c, TVP5150_VITC_DATA_REG5)); | ||
280 | printk("tvp5150: VITC data registers = 0x%02x\n", | ||
281 | tvp5150_read(c, TVP5150_VITC_DATA_REG6)); | ||
282 | printk("tvp5150: VITC data registers = 0x%02x\n", | ||
283 | tvp5150_read(c, TVP5150_VITC_DATA_REG7)); | ||
284 | printk("tvp5150: VITC data registers = 0x%02x\n", | ||
285 | tvp5150_read(c, TVP5150_VITC_DATA_REG8)); | ||
286 | printk("tvp5150: VITC data registers = 0x%02x\n", | ||
287 | tvp5150_read(c, TVP5150_VITC_DATA_REG9)); | ||
288 | printk("tvp5150: VBI FIFO read data = 0x%02x\n", | ||
289 | tvp5150_read(c, TVP5150_VBI_FIFO_READ_DATA)); | ||
290 | printk("tvp5150: Teletext filter 1 = 0x%02x\n", | ||
291 | tvp5150_read(c, TVP5150_TELETEXT_FIL_1_1)); | ||
292 | printk("tvp5150: Teletext filter 1 = 0x%02x\n", | ||
293 | tvp5150_read(c, TVP5150_TELETEXT_FIL_1_2)); | ||
294 | printk("tvp5150: Teletext filter 1 = 0x%02x\n", | ||
295 | tvp5150_read(c, TVP5150_TELETEXT_FIL_1_3)); | ||
296 | printk("tvp5150: Teletext filter 1 = 0x%02x\n", | ||
297 | tvp5150_read(c, TVP5150_TELETEXT_FIL_1_4)); | ||
298 | printk("tvp5150: Teletext filter 1 = 0x%02x\n", | ||
299 | tvp5150_read(c, TVP5150_TELETEXT_FIL_1_5)); | ||
300 | printk("tvp5150: Teletext filter 2 = 0x%02x\n", | ||
301 | tvp5150_read(c, TVP5150_TELETEXT_FIL_2_1)); | ||
302 | printk("tvp5150: Teletext filter 2 = 0x%02x\n", | ||
303 | tvp5150_read(c, TVP5150_TELETEXT_FIL_2_2)); | ||
304 | printk("tvp5150: Teletext filter 2 = 0x%02x\n", | ||
305 | tvp5150_read(c, TVP5150_TELETEXT_FIL_2_3)); | ||
306 | printk("tvp5150: Teletext filter 2 = 0x%02x\n", | ||
307 | tvp5150_read(c, TVP5150_TELETEXT_FIL_2_4)); | ||
308 | printk("tvp5150: Teletext filter 2 = 0x%02x\n", | ||
309 | tvp5150_read(c, TVP5150_TELETEXT_FIL_2_5)); | ||
310 | printk("tvp5150: Teletext filter enable = 0x%02x\n", | 238 | printk("tvp5150: Teletext filter enable = 0x%02x\n", |
311 | tvp5150_read(c, TVP5150_TELETEXT_FIL_ENA)); | 239 | tvp5150_read(c, TVP5150_TELETEXT_FIL_ENA)); |
312 | printk("tvp5150: Interrupt status register A = 0x%02x\n", | 240 | printk("tvp5150: Interrupt status register A = 0x%02x\n", |
313 | tvp5150_read(c, TVP5150_INT_STATUS_REG_A)); | 241 | tvp5150_read(c, TVP5150_INT_STATUS_REG_A)); |
314 | printk("tvp5150: Interrupt enable register A = 0x%02x\n", | 242 | printk("tvp5150: Interrupt enable register A = 0x%02x\n", |
315 | tvp5150_read(c, TVP5150_INT_ENABLE_REG_A)); | 243 | tvp5150_read(c, TVP5150_INT_ENABLE_REG_A)); |
316 | printk("tvp5150: Interrupt configuration = 0x%02x\n", | 244 | printk("tvp5150: Interrupt configuration = 0x%02x\n", |
317 | tvp5150_read(c, TVP5150_INT_CONF)); | 245 | tvp5150_read(c, TVP5150_INT_CONF)); |
318 | printk("tvp5150: VDP configuration RAM data = 0x%02x\n", | ||
319 | tvp5150_read(c, TVP5150_VDP_CONF_RAM_DATA)); | ||
320 | printk("tvp5150: Configuration RAM address low byte = 0x%02x\n", | ||
321 | tvp5150_read(c, TVP5150_CONF_RAM_ADDR_LOW)); | ||
322 | printk("tvp5150: Configuration RAM address high byte = 0x%02x\n", | ||
323 | tvp5150_read(c, TVP5150_CONF_RAM_ADDR_HIGH)); | ||
324 | printk("tvp5150: VDP status register = 0x%02x\n", | 246 | printk("tvp5150: VDP status register = 0x%02x\n", |
325 | tvp5150_read(c, TVP5150_VDP_STATUS_REG)); | 247 | tvp5150_read(c, TVP5150_VDP_STATUS_REG)); |
326 | printk("tvp5150: FIFO word count = 0x%02x\n", | 248 | printk("tvp5150: FIFO word count = 0x%02x\n", |
327 | tvp5150_read(c, TVP5150_FIFO_WORD_COUNT)); | 249 | tvp5150_read(c, TVP5150_FIFO_WORD_COUNT)); |
328 | printk("tvp5150: FIFO interrupt threshold = 0x%02x\n", | 250 | printk("tvp5150: FIFO interrupt threshold = 0x%02x\n", |
329 | tvp5150_read(c, TVP5150_FIFO_INT_THRESHOLD)); | 251 | tvp5150_read(c, TVP5150_FIFO_INT_THRESHOLD)); |
330 | printk("tvp5150: FIFO reset = 0x%02x\n", | 252 | printk("tvp5150: FIFO reset = 0x%02x\n", |
331 | tvp5150_read(c, TVP5150_FIFO_RESET)); | 253 | tvp5150_read(c, TVP5150_FIFO_RESET)); |
332 | printk("tvp5150: Line number interrupt = 0x%02x\n", | 254 | printk("tvp5150: Line number interrupt = 0x%02x\n", |
333 | tvp5150_read(c, TVP5150_LINE_NUMBER_INT)); | 255 | tvp5150_read(c, TVP5150_LINE_NUMBER_INT)); |
334 | printk("tvp5150: Pixel alignment register low byte = 0x%02x\n", | 256 | printk("tvp5150: Pixel alignment register = 0x%02x%02x\n", |
335 | tvp5150_read(c, TVP5150_PIX_ALIGN_REG_LOW)); | 257 | tvp5150_read(c, TVP5150_PIX_ALIGN_REG_HIGH), |
336 | printk("tvp5150: Pixel alignment register high byte = 0x%02x\n", | 258 | tvp5150_read(c, TVP5150_PIX_ALIGN_REG_LOW)); |
337 | tvp5150_read(c, TVP5150_PIX_ALIGN_REG_HIGH)); | ||
338 | printk("tvp5150: FIFO output control = 0x%02x\n", | 259 | printk("tvp5150: FIFO output control = 0x%02x\n", |
339 | tvp5150_read(c, TVP5150_FIFO_OUT_CTRL)); | 260 | tvp5150_read(c, TVP5150_FIFO_OUT_CTRL)); |
340 | printk("tvp5150: Full field enable 1 = 0x%02x\n", | 261 | printk("tvp5150: Full field enable = 0x%02x\n", |
341 | tvp5150_read(c, TVP5150_FULL_FIELD_ENA_1)); | 262 | tvp5150_read(c, TVP5150_FULL_FIELD_ENA)); |
342 | printk("tvp5150: Full field enable 2 = 0x%02x\n", | ||
343 | tvp5150_read(c, TVP5150_FULL_FIELD_ENA_2)); | ||
344 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
345 | tvp5150_read(c, TVP5150_LINE_MODE_REG_1)); | ||
346 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
347 | tvp5150_read(c, TVP5150_LINE_MODE_REG_2)); | ||
348 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
349 | tvp5150_read(c, TVP5150_LINE_MODE_REG_3)); | ||
350 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
351 | tvp5150_read(c, TVP5150_LINE_MODE_REG_4)); | ||
352 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
353 | tvp5150_read(c, TVP5150_LINE_MODE_REG_5)); | ||
354 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
355 | tvp5150_read(c, TVP5150_LINE_MODE_REG_6)); | ||
356 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
357 | tvp5150_read(c, TVP5150_LINE_MODE_REG_7)); | ||
358 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
359 | tvp5150_read(c, TVP5150_LINE_MODE_REG_8)); | ||
360 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
361 | tvp5150_read(c, TVP5150_LINE_MODE_REG_9)); | ||
362 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
363 | tvp5150_read(c, TVP5150_LINE_MODE_REG_10)); | ||
364 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
365 | tvp5150_read(c, TVP5150_LINE_MODE_REG_11)); | ||
366 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
367 | tvp5150_read(c, TVP5150_LINE_MODE_REG_12)); | ||
368 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
369 | tvp5150_read(c, TVP5150_LINE_MODE_REG_13)); | ||
370 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
371 | tvp5150_read(c, TVP5150_LINE_MODE_REG_14)); | ||
372 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
373 | tvp5150_read(c, TVP5150_LINE_MODE_REG_15)); | ||
374 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
375 | tvp5150_read(c, TVP5150_LINE_MODE_REG_16)); | ||
376 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
377 | tvp5150_read(c, TVP5150_LINE_MODE_REG_17)); | ||
378 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
379 | tvp5150_read(c, TVP5150_LINE_MODE_REG_18)); | ||
380 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
381 | tvp5150_read(c, TVP5150_LINE_MODE_REG_19)); | ||
382 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
383 | tvp5150_read(c, TVP5150_LINE_MODE_REG_20)); | ||
384 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
385 | tvp5150_read(c, TVP5150_LINE_MODE_REG_21)); | ||
386 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
387 | tvp5150_read(c, TVP5150_LINE_MODE_REG_22)); | ||
388 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
389 | tvp5150_read(c, TVP5150_LINE_MODE_REG_23)); | ||
390 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
391 | tvp5150_read(c, TVP5150_LINE_MODE_REG_24)); | ||
392 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
393 | tvp5150_read(c, TVP5150_LINE_MODE_REG_25)); | ||
394 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
395 | tvp5150_read(c, TVP5150_LINE_MODE_REG_27)); | ||
396 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
397 | tvp5150_read(c, TVP5150_LINE_MODE_REG_28)); | ||
398 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
399 | tvp5150_read(c, TVP5150_LINE_MODE_REG_29)); | ||
400 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
401 | tvp5150_read(c, TVP5150_LINE_MODE_REG_30)); | ||
402 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
403 | tvp5150_read(c, TVP5150_LINE_MODE_REG_31)); | ||
404 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
405 | tvp5150_read(c, TVP5150_LINE_MODE_REG_32)); | ||
406 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
407 | tvp5150_read(c, TVP5150_LINE_MODE_REG_33)); | ||
408 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
409 | tvp5150_read(c, TVP5150_LINE_MODE_REG_34)); | ||
410 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
411 | tvp5150_read(c, TVP5150_LINE_MODE_REG_35)); | ||
412 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
413 | tvp5150_read(c, TVP5150_LINE_MODE_REG_36)); | ||
414 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
415 | tvp5150_read(c, TVP5150_LINE_MODE_REG_37)); | ||
416 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
417 | tvp5150_read(c, TVP5150_LINE_MODE_REG_38)); | ||
418 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
419 | tvp5150_read(c, TVP5150_LINE_MODE_REG_39)); | ||
420 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
421 | tvp5150_read(c, TVP5150_LINE_MODE_REG_40)); | ||
422 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
423 | tvp5150_read(c, TVP5150_LINE_MODE_REG_41)); | ||
424 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
425 | tvp5150_read(c, TVP5150_LINE_MODE_REG_42)); | ||
426 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
427 | tvp5150_read(c, TVP5150_LINE_MODE_REG_43)); | ||
428 | printk("tvp5150: Line mode registers = 0x%02x\n", | ||
429 | tvp5150_read(c, TVP5150_LINE_MODE_REG_44)); | ||
430 | printk("tvp5150: Full field mode register = 0x%02x\n", | 263 | printk("tvp5150: Full field mode register = 0x%02x\n", |
431 | tvp5150_read(c, TVP5150_FULL_FIELD_MODE_REG)); | 264 | tvp5150_read(c, TVP5150_FULL_FIELD_MODE_REG)); |
265 | |||
266 | dump_reg_range(c,"CC data", TVP5150_CC_DATA_INI, | ||
267 | TVP5150_CC_DATA_END,8); | ||
268 | |||
269 | dump_reg_range(c,"WSS data", TVP5150_WSS_DATA_INI, | ||
270 | TVP5150_WSS_DATA_END,8); | ||
271 | |||
272 | dump_reg_range(c,"VPS data", TVP5150_VPS_DATA_INI, | ||
273 | TVP5150_VPS_DATA_END,8); | ||
274 | |||
275 | dump_reg_range(c,"VITC data", TVP5150_VITC_DATA_INI, | ||
276 | TVP5150_VITC_DATA_END,10); | ||
277 | |||
278 | dump_reg_range(c,"Line mode", TVP5150_LINE_MODE_INI, | ||
279 | TVP5150_LINE_MODE_END,8); | ||
432 | } | 280 | } |
433 | 281 | ||
434 | /**************************************************************************** | 282 | /**************************************************************************** |
@@ -593,10 +441,10 @@ static const struct i2c_reg_value tvp5150_init_default[] = { | |||
593 | TVP5150_FIFO_OUT_CTRL,0x01 | 441 | TVP5150_FIFO_OUT_CTRL,0x01 |
594 | }, | 442 | }, |
595 | { /* 0xcf */ | 443 | { /* 0xcf */ |
596 | TVP5150_FULL_FIELD_ENA_1,0x00 | 444 | TVP5150_FULL_FIELD_ENA,0x00 |
597 | }, | 445 | }, |
598 | { /* 0xd0 */ | 446 | { /* 0xd0 */ |
599 | TVP5150_FULL_FIELD_ENA_2,0x00 | 447 | TVP5150_LINE_MODE_INI,0x00 |
600 | }, | 448 | }, |
601 | { /* 0xfc */ | 449 | { /* 0xfc */ |
602 | TVP5150_FULL_FIELD_MODE_REG,0x7f | 450 | TVP5150_FULL_FIELD_MODE_REG,0x7f |
@@ -634,45 +482,73 @@ struct i2c_vbi_ram_value { | |||
634 | unsigned char values[26]; | 482 | unsigned char values[26]; |
635 | }; | 483 | }; |
636 | 484 | ||
485 | /* tvp5150_vbi_types should follow the same order as vbi_ram_default | ||
486 | * value 0 means rom position 0x10, value 1 means rom position 0x30 | ||
487 | * and so on. There are 16 possible locations from 0 to 15. | ||
488 | */ | ||
489 | enum tvp5150_vbi_types { /* Video line number Description */ | ||
490 | VBI_WST_SECAM, /* 6-23 (field 1,2) Teletext, SECAM */ | ||
491 | VBI_WST_PAL_B, /* 6-22 (field 1,2) Teletext, PAL, System B */ | ||
492 | VBI_WST_PAL_C, /* 6-22 (field 1,2) Teletext, PAL, System C */ | ||
493 | VBI_WST_NTSC_B, /* 10-21 (field 1,2) Teletext, NTSC, System B */ | ||
494 | VBI_NABTS_NTSC_C, /* 10-21 (field 1,2) Teletext, NTSC, System C */ | ||
495 | VBI_NABTS_NTSC_D, /* 10-21 (field 1,2) Teletext, NTSC, System D */ | ||
496 | VBI_CC_PAL_SECAM, /* 22 (field 1,2) Closed Caption PAL/SECAM */ | ||
497 | VBI_CC_NTSC, /* 21 (field 1,2) Closed Caption NTSC */ | ||
498 | VBI_WSS_PAL_SECAM, /* 23 (field 1,2) Wide Screen Signal PAL/SECAM */ | ||
499 | VBI_WSS_NTSC, /* 20 (field 1,2) Wide Screen Signal NTSC */ | ||
500 | VBI_VITC_PAL_SECAM, /* 6-22 Vertical Interval Timecode PAL/SECAM */ | ||
501 | VBI_VITC_NTSC, /* 10-20 Vertical Interval Timecode NTSC */ | ||
502 | VBI_VPS_PAL, /* 16 Video Program System PAL */ | ||
503 | VBI_EPG_GEMSTAR, /* EPG/Gemstar Electronic program guide */ | ||
504 | VBI_RESERVED, /* not in use on vbi_ram_default table */ | ||
505 | VBI_FULL_FIELD /* Active video/Full Field */ | ||
506 | }; | ||
507 | |||
637 | static struct i2c_vbi_ram_value vbi_ram_default[] = | 508 | static struct i2c_vbi_ram_value vbi_ram_default[] = |
638 | { | 509 | { |
639 | {0x010, /* WST SECAM 6 */ | 510 | {0x010, /* WST SECAM */ |
640 | { 0xaa, 0xaa, 0xff, 0xff , 0xe7, 0x2e, 0x20, 0x26, 0xe6, 0xb4, 0x0e, 0x0, 0x0, 0x0, 0x10, 0x0 } | 511 | { 0xaa, 0xaa, 0xff, 0xff , 0xe7, 0x2e, 0x20, 0x26, 0xe6, 0xb4, 0x0e, 0x0, 0x0, 0x0, 0x10, 0x0 } |
641 | }, | 512 | }, |
642 | {0x030, /* WST PAL B 6 */ | 513 | {0x030, /* WST PAL B */ |
643 | { 0xaa, 0xaa, 0xff, 0xff , 0x27, 0x2e, 0x20, 0x2b, 0xa6, 0x72, 0x10, 0x0, 0x0, 0x0, 0x10, 0x0 } | 514 | { 0xaa, 0xaa, 0xff, 0xff , 0x27, 0x2e, 0x20, 0x2b, 0xa6, 0x72, 0x10, 0x0, 0x0, 0x0, 0x10, 0x0 } |
644 | }, | 515 | }, |
645 | {0x050, /* WST PAL C 6 */ | 516 | {0x050, /* WST PAL C */ |
646 | { 0xaa, 0xaa, 0xff, 0xff , 0xe7, 0x2e, 0x20, 0x22, 0xa6, 0x98, 0x0d, 0x0, 0x0, 0x0, 0x10, 0x0 } | 517 | { 0xaa, 0xaa, 0xff, 0xff , 0xe7, 0x2e, 0x20, 0x22, 0xa6, 0x98, 0x0d, 0x0, 0x0, 0x0, 0x10, 0x0 } |
647 | }, | 518 | }, |
648 | {0x070, /* WST NTSC 6 */ | 519 | {0x070, /* WST NTSC B */ |
649 | { 0xaa, 0xaa, 0xff, 0xff , 0x27, 0x2e, 0x20, 0x23, 0x69, 0x93, 0x0d, 0x0, 0x0, 0x0, 0x10, 0x0 } | 520 | { 0xaa, 0xaa, 0xff, 0xff , 0x27, 0x2e, 0x20, 0x23, 0x69, 0x93, 0x0d, 0x0, 0x0, 0x0, 0x10, 0x0 } |
650 | }, | 521 | }, |
651 | {0x090, /* NABTS, NTSC 6 */ | 522 | {0x090, /* NABTS, NTSC */ |
652 | { 0xaa, 0xaa, 0xff, 0xff , 0xe7, 0x2e, 0x20, 0x22, 0x69, 0x93, 0x0d, 0x0, 0x0, 0x0, 0x15, 0x0 } | 523 | { 0xaa, 0xaa, 0xff, 0xff , 0xe7, 0x2e, 0x20, 0x22, 0x69, 0x93, 0x0d, 0x0, 0x0, 0x0, 0x15, 0x0 } |
653 | }, | 524 | }, |
654 | {0x0b0, /* NABTS, NTSC-J 6 */ | 525 | {0x0b0, /* NABTS, NTSC-J */ |
655 | { 0xaa, 0xaa, 0xff, 0xff , 0xa7, 0x2e, 0x20, 0x23, 0x69, 0x93, 0x0d, 0x0, 0x0, 0x0, 0x10, 0x0 } | 526 | { 0xaa, 0xaa, 0xff, 0xff , 0xa7, 0x2e, 0x20, 0x23, 0x69, 0x93, 0x0d, 0x0, 0x0, 0x0, 0x10, 0x0 } |
656 | }, | 527 | }, |
657 | {0x0d0, /* CC, PAL/SECAM 6 */ | 528 | {0x0d0, /* CC, PAL/SECAM */ |
658 | { 0xaa, 0x2a, 0xff, 0x3f , 0x04, 0x51, 0x6e, 0x02, 0xa6, 0x7b, 0x09, 0x0, 0x0, 0x0, 0x27, 0x0 } | 529 | { 0xaa, 0x2a, 0xff, 0x3f , 0x04, 0x51, 0x6e, 0x02, 0xa6, 0x7b, 0x09, 0x0, 0x0, 0x0, 0x27, 0x0 } |
659 | }, | 530 | }, |
660 | {0x0f0, /* CC, NTSC 6 */ | 531 | {0x0f0, /* CC, NTSC */ |
661 | { 0xaa, 0x2a, 0xff, 0x3f , 0x04, 0x51, 0x6e, 0x02, 0x69, 0x8c, 0x09, 0x0, 0x0, 0x0, 0x27, 0x0 } | 532 | { 0xaa, 0x2a, 0xff, 0x3f , 0x04, 0x51, 0x6e, 0x02, 0x69, 0x8c, 0x09, 0x0, 0x0, 0x0, 0x27, 0x0 } |
662 | }, | 533 | }, |
663 | {0x110, /* WSS, PAL/SECAM 6 */ | 534 | {0x110, /* WSS, PAL/SECAM */ |
664 | { 0x5b, 0x55, 0xc5, 0xff , 0x0, 0x71, 0x6e, 0x42, 0xa6, 0xcd, 0x0f, 0x0, 0x0, 0x0, 0x3a, 0x0 } | 535 | { 0x5b, 0x55, 0xc5, 0xff , 0x0, 0x71, 0x6e, 0x42, 0xa6, 0xcd, 0x0f, 0x0, 0x0, 0x0, 0x3a, 0x0 } |
665 | }, | 536 | }, |
666 | {0x130, /* WSS, NTSC C */ | 537 | {0x130, /* WSS, NTSC C */ |
667 | { 0x38, 0x00, 0x3f, 0x00 , 0x0, 0x71, 0x6e, 0x43, 0x69, 0x7c, 0x08, 0x0, 0x0, 0x0, 0x39, 0x0 } | 538 | { 0x38, 0x00, 0x3f, 0x00 , 0x0, 0x71, 0x6e, 0x43, 0x69, 0x7c, 0x08, 0x0, 0x0, 0x0, 0x39, 0x0 } |
668 | }, | 539 | }, |
669 | {0x150, /* VITC, PAL/SECAM 6 */ | 540 | {0x150, /* VITC, PAL/SECAM */ |
670 | { 0x0, 0x0, 0x0, 0x0 , 0x0, 0x8f, 0x6d, 0x49, 0xa6, 0x85, 0x08, 0x0, 0x0, 0x0, 0x4c, 0x0 } | 541 | { 0x0, 0x0, 0x0, 0x0 , 0x0, 0x8f, 0x6d, 0x49, 0xa6, 0x85, 0x08, 0x0, 0x0, 0x0, 0x4c, 0x0 } |
671 | }, | 542 | }, |
672 | {0x170, /* VITC, NTSC 6 */ | 543 | {0x170, /* VITC, NTSC */ |
673 | { 0x0, 0x0, 0x0, 0x0 , 0x0, 0x8f, 0x6d, 0x49, 0x69, 0x94, 0x08, 0x0, 0x0, 0x0, 0x4c, 0x0 } | 544 | { 0x0, 0x0, 0x0, 0x0 , 0x0, 0x8f, 0x6d, 0x49, 0x69, 0x94, 0x08, 0x0, 0x0, 0x0, 0x4c, 0x0 } |
674 | }, | 545 | }, |
675 | { (u16)-1 } | 546 | {0x190, /* VPS, PAL */ |
547 | { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d, 0xa6, 0xda, 0x0b, 0x0, 0x0, 0x0, 0x60, 0x0 } | ||
548 | }, | ||
549 | {0x1b0, /* Gemstar Custom 1 */ | ||
550 | { 0xcc, 0xcc, 0xff, 0xff, 0x05, 0x51, 0x6e, 0x05, 0x69, 0x19, 0x13, 0x0, 0x0, 0x0, 0x60, 0x0 } | ||
551 | }, | ||
676 | }; | 552 | }; |
677 | 553 | ||
678 | static int tvp5150_write_inittab(struct i2c_client *c, | 554 | static int tvp5150_write_inittab(struct i2c_client *c, |
@@ -691,10 +567,10 @@ static int tvp5150_vdp_init(struct i2c_client *c, | |||
691 | unsigned int i; | 567 | unsigned int i; |
692 | 568 | ||
693 | /* Disable Full Field */ | 569 | /* Disable Full Field */ |
694 | tvp5150_write(c, TVP5150_FULL_FIELD_ENA_1, 0); | 570 | tvp5150_write(c, TVP5150_FULL_FIELD_ENA, 0); |
695 | 571 | ||
696 | /* Before programming, Line mode should be at 0xff */ | 572 | /* Before programming, Line mode should be at 0xff */ |
697 | for (i=TVP5150_FULL_FIELD_ENA_2; i<=TVP5150_LINE_MODE_REG_44; i++) | 573 | for (i=TVP5150_LINE_MODE_INI; i<=TVP5150_LINE_MODE_END; i++) |
698 | tvp5150_write(c, i, 0xff); | 574 | tvp5150_write(c, i, 0xff); |
699 | 575 | ||
700 | /* Load Ram Table */ | 576 | /* Load Ram Table */ |
@@ -710,6 +586,51 @@ static int tvp5150_vdp_init(struct i2c_client *c, | |||
710 | return 0; | 586 | return 0; |
711 | } | 587 | } |
712 | 588 | ||
589 | /* Set vbi processing | ||
590 | * type - one of tvp5150_vbi_types | ||
591 | * line - line to gather data | ||
592 | * fields: bit 0 field1, bit 1, field2 | ||
593 | * flags (default=0xf0) is a bitmask, were set means: | ||
594 | * bit 7: enable filtering null bytes on CC | ||
595 | * bit 6: send data also to FIFO | ||
596 | * bit 5: don't allow data with errors on FIFO | ||
597 | * bit 4: enable ECC when possible | ||
598 | * pix_align = pix alignment: | ||
599 | * LSB = field1 | ||
600 | * MSB = field2 | ||
601 | */ | ||
602 | static int tvp5150_set_vbi(struct i2c_client *c, enum tvp5150_vbi_types type, | ||
603 | u8 flags, int line, const int fields) | ||
604 | { | ||
605 | struct tvp5150 *decoder = i2c_get_clientdata(c); | ||
606 | v4l2_std_id std=decoder->norm; | ||
607 | u8 reg; | ||
608 | |||
609 | if (std == V4L2_STD_ALL) { | ||
610 | tvp5150_err("VBI can't be configured without knowing number of lines\n"); | ||
611 | return -EINVAL; | ||
612 | } else if (std && V4L2_STD_625_50) { | ||
613 | /* Don't follow NTSC Line number convension */ | ||
614 | line += 3; | ||
615 | } | ||
616 | |||
617 | if (line<6||line>27) | ||
618 | return -EINVAL; | ||
619 | |||
620 | type=type | (flags & 0xf0); | ||
621 | reg=((line-6)<<1)+TVP5150_LINE_MODE_INI; | ||
622 | |||
623 | if (fields&1) { | ||
624 | tvp5150_write(c, reg, type); | ||
625 | } | ||
626 | |||
627 | if (fields&2) { | ||
628 | tvp5150_write(c, reg+1, type); | ||
629 | } | ||
630 | |||
631 | return 0; | ||
632 | } | ||
633 | |||
713 | static int tvp5150_set_std(struct i2c_client *c, v4l2_std_id std) | 634 | static int tvp5150_set_std(struct i2c_client *c, v4l2_std_id std) |
714 | { | 635 | { |
715 | struct tvp5150 *decoder = i2c_get_clientdata(c); | 636 | struct tvp5150 *decoder = i2c_get_clientdata(c); |
@@ -1086,7 +1007,7 @@ static int tvp5150_detect_client(struct i2c_adapter *adapter, | |||
1086 | 1007 | ||
1087 | rv = i2c_attach_client(c); | 1008 | rv = i2c_attach_client(c); |
1088 | 1009 | ||
1089 | core->norm = V4L2_STD_ALL; | 1010 | core->norm = V4L2_STD_ALL; /* Default is autodetect */ |
1090 | core->input = 2; | 1011 | core->input = 2; |
1091 | core->enable = 1; | 1012 | core->enable = 1; |
1092 | core->bright = 32768; | 1013 | core->bright = 32768; |
diff --git a/drivers/media/video/tvp5150_reg.h b/drivers/media/video/tvp5150_reg.h index cd45c1ded786..c81587e06e37 100644 --- a/drivers/media/video/tvp5150_reg.h +++ b/drivers/media/video/tvp5150_reg.h | |||
@@ -64,49 +64,32 @@ | |||
64 | #define TVP5150_STATUS_REG_4 0x8b /* Status register #4 */ | 64 | #define TVP5150_STATUS_REG_4 0x8b /* Status register #4 */ |
65 | #define TVP5150_STATUS_REG_5 0x8c /* Status register #5 */ | 65 | #define TVP5150_STATUS_REG_5 0x8c /* Status register #5 */ |
66 | /* Reserved 8Dh-8Fh */ | 66 | /* Reserved 8Dh-8Fh */ |
67 | #define TVP5150_CC_DATA_REG1 0x90 /* Closed caption data registers */ | 67 | /* Closed caption data registers */ |
68 | #define TVP5150_CC_DATA_REG2 0x91 /* Closed caption data registers */ | 68 | #define TVP5150_CC_DATA_INI 0x90 |
69 | #define TVP5150_CC_DATA_REG3 0x92 /* Closed caption data registers */ | 69 | #define TVP5150_CC_DATA_END 0x93 |
70 | #define TVP5150_CC_DATA_REG4 0x93 /* Closed caption data registers */ | 70 | |
71 | #define TVP5150_WSS_DATA_REG1 0X94 /* WSS data registers */ | 71 | /* WSS data registers */ |
72 | #define TVP5150_WSS_DATA_REG2 0X95 /* WSS data registers */ | 72 | #define TVP5150_WSS_DATA_INI 0x94 |
73 | #define TVP5150_WSS_DATA_REG3 0X96 /* WSS data registers */ | 73 | #define TVP5150_WSS_DATA_END 0x99 |
74 | #define TVP5150_WSS_DATA_REG4 0X97 /* WSS data registers */ | 74 | |
75 | #define TVP5150_WSS_DATA_REG5 0X98 /* WSS data registers */ | 75 | /* VPS data registers */ |
76 | #define TVP5150_WSS_DATA_REG6 0X99 /* WSS data registers */ | 76 | #define TVP5150_VPS_DATA_INI 0x9a |
77 | #define TVP5150_VPS_DATA_REG1 0x9a /* VPS data registers */ | 77 | #define TVP5150_VPS_DATA_END 0xa6 |
78 | #define TVP5150_VPS_DATA_REG2 0x9b /* VPS data registers */ | 78 | |
79 | #define TVP5150_VPS_DATA_REG3 0x9c /* VPS data registers */ | 79 | /* VITC data registers */ |
80 | #define TVP5150_VPS_DATA_REG4 0x9d /* VPS data registers */ | 80 | #define TVP5150_VITC_DATA_INI 0xa7 |
81 | #define TVP5150_VPS_DATA_REG5 0x9e /* VPS data registers */ | 81 | #define TVP5150_VITC_DATA_END 0xaf |
82 | #define TVP5150_VPS_DATA_REG6 0x9f /* VPS data registers */ | 82 | |
83 | #define TVP5150_VPS_DATA_REG7 0xa0 /* VPS data registers */ | ||
84 | #define TVP5150_VPS_DATA_REG8 0xa1 /* VPS data registers */ | ||
85 | #define TVP5150_VPS_DATA_REG9 0xa2 /* VPS data registers */ | ||
86 | #define TVP5150_VPS_DATA_REG10 0xa3 /* VPS data registers */ | ||
87 | #define TVP5150_VPS_DATA_REG11 0xa4 /* VPS data registers */ | ||
88 | #define TVP5150_VPS_DATA_REG12 0xa5 /* VPS data registers */ | ||
89 | #define TVP5150_VPS_DATA_REG13 0xa6 /* VPS data registers */ | ||
90 | #define TVP5150_VITC_DATA_REG1 0xa7 /* VITC data registers */ | ||
91 | #define TVP5150_VITC_DATA_REG2 0xa8 /* VITC data registers */ | ||
92 | #define TVP5150_VITC_DATA_REG3 0xa9 /* VITC data registers */ | ||
93 | #define TVP5150_VITC_DATA_REG4 0xaa /* VITC data registers */ | ||
94 | #define TVP5150_VITC_DATA_REG5 0xab /* VITC data registers */ | ||
95 | #define TVP5150_VITC_DATA_REG6 0xac /* VITC data registers */ | ||
96 | #define TVP5150_VITC_DATA_REG7 0xad /* VITC data registers */ | ||
97 | #define TVP5150_VITC_DATA_REG8 0xae /* VITC data registers */ | ||
98 | #define TVP5150_VITC_DATA_REG9 0xaf /* VITC data registers */ | ||
99 | #define TVP5150_VBI_FIFO_READ_DATA 0xb0 /* VBI FIFO read data */ | 83 | #define TVP5150_VBI_FIFO_READ_DATA 0xb0 /* VBI FIFO read data */ |
100 | #define TVP5150_TELETEXT_FIL_1_1 0xb1 /* Teletext filter 1 */ | 84 | |
101 | #define TVP5150_TELETEXT_FIL_1_2 0xb2 /* Teletext filter 1 */ | 85 | /* Teletext filter 1 */ |
102 | #define TVP5150_TELETEXT_FIL_1_3 0xb3 /* Teletext filter 1 */ | 86 | #define TVP5150_TELETEXT_FIL1_INI 0xb1 |
103 | #define TVP5150_TELETEXT_FIL_1_4 0xb4 /* Teletext filter 1 */ | 87 | #define TVP5150_TELETEXT_FIL1_END 0xb5 |
104 | #define TVP5150_TELETEXT_FIL_1_5 0xb5 /* Teletext filter 1 */ | 88 | |
105 | #define TVP5150_TELETEXT_FIL_2_1 0xb6 /* Teletext filter 2 */ | 89 | /* Teletext filter 2 */ |
106 | #define TVP5150_TELETEXT_FIL_2_2 0xb7 /* Teletext filter 2 */ | 90 | #define TVP5150_TELETEXT_FIL2_INI 0xb6 |
107 | #define TVP5150_TELETEXT_FIL_2_3 0xb8 /* Teletext filter 2 */ | 91 | #define TVP5150_TELETEXT_FIL2_END 0xba |
108 | #define TVP5150_TELETEXT_FIL_2_4 0xb9 /* Teletext filter 2 */ | 92 | |
109 | #define TVP5150_TELETEXT_FIL_2_5 0xba /* Teletext filter 2 */ | ||
110 | #define TVP5150_TELETEXT_FIL_ENA 0xbb /* Teletext filter enable */ | 93 | #define TVP5150_TELETEXT_FIL_ENA 0xbb /* Teletext filter enable */ |
111 | /* Reserved BCh-BFh */ | 94 | /* Reserved BCh-BFh */ |
112 | #define TVP5150_INT_STATUS_REG_A 0xc0 /* Interrupt status register A */ | 95 | #define TVP5150_INT_STATUS_REG_A 0xc0 /* Interrupt status register A */ |
@@ -124,50 +107,11 @@ | |||
124 | #define TVP5150_PIX_ALIGN_REG_HIGH 0xcc /* Pixel alignment register high byte */ | 107 | #define TVP5150_PIX_ALIGN_REG_HIGH 0xcc /* Pixel alignment register high byte */ |
125 | #define TVP5150_FIFO_OUT_CTRL 0xcd /* FIFO output control */ | 108 | #define TVP5150_FIFO_OUT_CTRL 0xcd /* FIFO output control */ |
126 | /* Reserved CEh */ | 109 | /* Reserved CEh */ |
127 | #define TVP5150_FULL_FIELD_ENA_1 0xcf /* Full field enable 1 */ | 110 | #define TVP5150_FULL_FIELD_ENA 0xcf /* Full field enable 1 */ |
128 | #define TVP5150_FULL_FIELD_ENA_2 0xd0 /* Full field enable 2 */ | 111 | |
129 | #define TVP5150_LINE_MODE_REG_1 0xd1 /* Line mode registers */ | 112 | /* Line mode registers */ |
130 | #define TVP5150_LINE_MODE_REG_2 0xd2 /* Line mode registers */ | 113 | #define TVP5150_LINE_MODE_INI 0xd0 |
131 | #define TVP5150_LINE_MODE_REG_3 0xd3 /* Line mode registers */ | 114 | #define TVP5150_LINE_MODE_END 0xfb |
132 | #define TVP5150_LINE_MODE_REG_4 0xd4 /* Line mode registers */ | 115 | |
133 | #define TVP5150_LINE_MODE_REG_5 0xd5 /* Line mode registers */ | ||
134 | #define TVP5150_LINE_MODE_REG_6 0xd6 /* Line mode registers */ | ||
135 | #define TVP5150_LINE_MODE_REG_7 0xd7 /* Line mode registers */ | ||
136 | #define TVP5150_LINE_MODE_REG_8 0xd8 /* Line mode registers */ | ||
137 | #define TVP5150_LINE_MODE_REG_9 0xd9 /* Line mode registers */ | ||
138 | #define TVP5150_LINE_MODE_REG_10 0xda /* Line mode registers */ | ||
139 | #define TVP5150_LINE_MODE_REG_11 0xdb /* Line mode registers */ | ||
140 | #define TVP5150_LINE_MODE_REG_12 0xdc /* Line mode registers */ | ||
141 | #define TVP5150_LINE_MODE_REG_13 0xdd /* Line mode registers */ | ||
142 | #define TVP5150_LINE_MODE_REG_14 0xde /* Line mode registers */ | ||
143 | #define TVP5150_LINE_MODE_REG_15 0xdf /* Line mode registers */ | ||
144 | #define TVP5150_LINE_MODE_REG_16 0xe0 /* Line mode registers */ | ||
145 | #define TVP5150_LINE_MODE_REG_17 0xe1 /* Line mode registers */ | ||
146 | #define TVP5150_LINE_MODE_REG_18 0xe2 /* Line mode registers */ | ||
147 | #define TVP5150_LINE_MODE_REG_19 0xe3 /* Line mode registers */ | ||
148 | #define TVP5150_LINE_MODE_REG_20 0xe4 /* Line mode registers */ | ||
149 | #define TVP5150_LINE_MODE_REG_21 0xe5 /* Line mode registers */ | ||
150 | #define TVP5150_LINE_MODE_REG_22 0xe6 /* Line mode registers */ | ||
151 | #define TVP5150_LINE_MODE_REG_23 0xe7 /* Line mode registers */ | ||
152 | #define TVP5150_LINE_MODE_REG_24 0xe8 /* Line mode registers */ | ||
153 | #define TVP5150_LINE_MODE_REG_25 0xe9 /* Line mode registers */ | ||
154 | #define TVP5150_LINE_MODE_REG_27 0xea /* Line mode registers */ | ||
155 | #define TVP5150_LINE_MODE_REG_28 0xeb /* Line mode registers */ | ||
156 | #define TVP5150_LINE_MODE_REG_29 0xec /* Line mode registers */ | ||
157 | #define TVP5150_LINE_MODE_REG_30 0xed /* Line mode registers */ | ||
158 | #define TVP5150_LINE_MODE_REG_31 0xee /* Line mode registers */ | ||
159 | #define TVP5150_LINE_MODE_REG_32 0xef /* Line mode registers */ | ||
160 | #define TVP5150_LINE_MODE_REG_33 0xf0 /* Line mode registers */ | ||
161 | #define TVP5150_LINE_MODE_REG_34 0xf1 /* Line mode registers */ | ||
162 | #define TVP5150_LINE_MODE_REG_35 0xf2 /* Line mode registers */ | ||
163 | #define TVP5150_LINE_MODE_REG_36 0xf3 /* Line mode registers */ | ||
164 | #define TVP5150_LINE_MODE_REG_37 0xf4 /* Line mode registers */ | ||
165 | #define TVP5150_LINE_MODE_REG_38 0xf5 /* Line mode registers */ | ||
166 | #define TVP5150_LINE_MODE_REG_39 0xf6 /* Line mode registers */ | ||
167 | #define TVP5150_LINE_MODE_REG_40 0xf7 /* Line mode registers */ | ||
168 | #define TVP5150_LINE_MODE_REG_41 0xf8 /* Line mode registers */ | ||
169 | #define TVP5150_LINE_MODE_REG_42 0xf9 /* Line mode registers */ | ||
170 | #define TVP5150_LINE_MODE_REG_43 0xfa /* Line mode registers */ | ||
171 | #define TVP5150_LINE_MODE_REG_44 0xfb /* Line mode registers */ | ||
172 | #define TVP5150_FULL_FIELD_MODE_REG 0xfc /* Full field mode register */ | 116 | #define TVP5150_FULL_FIELD_MODE_REG 0xfc /* Full field mode register */ |
173 | /* Reserved FDh-FFh */ | 117 | /* Reserved FDh-FFh */ |