diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/ata/pata_pcmcia.c | 12 | ||||
-rw-r--r-- | drivers/ata/pdc_adma.c | 12 | ||||
-rw-r--r-- | drivers/ata/sata_inic162x.c | 2 | ||||
-rw-r--r-- | drivers/ata/sata_mv.c | 7 | ||||
-rw-r--r-- | drivers/ata/sata_nv.c | 70 | ||||
-rw-r--r-- | drivers/ata/sata_promise.c | 38 | ||||
-rw-r--r-- | drivers/ata/sata_qstor.c | 3 | ||||
-rw-r--r-- | drivers/ata/sata_sil.c | 11 | ||||
-rw-r--r-- | drivers/ata/sata_sil24.c | 9 | ||||
-rw-r--r-- | drivers/ata/sata_sis.c | 64 | ||||
-rw-r--r-- | drivers/ata/sata_svw.c | 10 | ||||
-rw-r--r-- | drivers/ata/sata_sx4.c | 173 | ||||
-rw-r--r-- | drivers/ata/sata_uli.c | 18 | ||||
-rw-r--r-- | drivers/ata/sata_via.c | 20 | ||||
-rw-r--r-- | drivers/ata/sata_vsc.c | 15 |
15 files changed, 244 insertions, 220 deletions
diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c index 5db2013230b3..fd36099428a4 100644 --- a/drivers/ata/pata_pcmcia.c +++ b/drivers/ata/pata_pcmcia.c | |||
@@ -74,8 +74,7 @@ static int pcmcia_set_mode(struct ata_link *link, struct ata_device **r_failed_d | |||
74 | return ata_do_set_mode(link, r_failed_dev); | 74 | return ata_do_set_mode(link, r_failed_dev); |
75 | 75 | ||
76 | if (memcmp(master->id + ATA_ID_FW_REV, slave->id + ATA_ID_FW_REV, | 76 | if (memcmp(master->id + ATA_ID_FW_REV, slave->id + ATA_ID_FW_REV, |
77 | ATA_ID_FW_REV_LEN + ATA_ID_PROD_LEN) == 0) | 77 | ATA_ID_FW_REV_LEN + ATA_ID_PROD_LEN) == 0) { |
78 | { | ||
79 | /* Suspicious match, but could be two cards from | 78 | /* Suspicious match, but could be two cards from |
80 | the same vendor - check serial */ | 79 | the same vendor - check serial */ |
81 | if (memcmp(master->id + ATA_ID_SERNO, slave->id + ATA_ID_SERNO, | 80 | if (memcmp(master->id + ATA_ID_SERNO, slave->id + ATA_ID_SERNO, |
@@ -248,7 +247,8 @@ static int pcmcia_init_one(struct pcmcia_device *pdev) | |||
248 | goto next_entry; | 247 | goto next_entry; |
249 | io_base = pdev->io.BasePort1; | 248 | io_base = pdev->io.BasePort1; |
250 | ctl_base = pdev->io.BasePort1 + 0x0e; | 249 | ctl_base = pdev->io.BasePort1 + 0x0e; |
251 | } else goto next_entry; | 250 | } else |
251 | goto next_entry; | ||
252 | /* If we've got this far, we're done */ | 252 | /* If we've got this far, we're done */ |
253 | break; | 253 | break; |
254 | } | 254 | } |
@@ -285,8 +285,8 @@ next_entry: | |||
285 | printk(KERN_WARNING DRV_NAME ": second channel not yet supported.\n"); | 285 | printk(KERN_WARNING DRV_NAME ": second channel not yet supported.\n"); |
286 | 286 | ||
287 | /* | 287 | /* |
288 | * Having done the PCMCIA plumbing the ATA side is relatively | 288 | * Having done the PCMCIA plumbing the ATA side is relatively |
289 | * sane. | 289 | * sane. |
290 | */ | 290 | */ |
291 | ret = -ENOMEM; | 291 | ret = -ENOMEM; |
292 | host = ata_host_alloc(&pdev->dev, 1); | 292 | host = ata_host_alloc(&pdev->dev, 1); |
@@ -363,7 +363,7 @@ static struct pcmcia_device_id pcmcia_devices[] = { | |||
363 | PCMCIA_DEVICE_MANF_CARD(0x0098, 0x0000), /* Toshiba */ | 363 | PCMCIA_DEVICE_MANF_CARD(0x0098, 0x0000), /* Toshiba */ |
364 | PCMCIA_DEVICE_MANF_CARD(0x00a4, 0x002d), | 364 | PCMCIA_DEVICE_MANF_CARD(0x00a4, 0x002d), |
365 | PCMCIA_DEVICE_MANF_CARD(0x00ce, 0x0000), /* Samsung */ | 365 | PCMCIA_DEVICE_MANF_CARD(0x00ce, 0x0000), /* Samsung */ |
366 | PCMCIA_DEVICE_MANF_CARD(0x0319, 0x0000), /* Hitachi */ | 366 | PCMCIA_DEVICE_MANF_CARD(0x0319, 0x0000), /* Hitachi */ |
367 | PCMCIA_DEVICE_MANF_CARD(0x2080, 0x0001), | 367 | PCMCIA_DEVICE_MANF_CARD(0x2080, 0x0001), |
368 | PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0100), /* Viking CFA */ | 368 | PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0100), /* Viking CFA */ |
369 | PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0200), /* Lexar, Viking CFA */ | 369 | PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0200), /* Lexar, Viking CFA */ |
diff --git a/drivers/ata/pdc_adma.c b/drivers/ata/pdc_adma.c index 199f7e150eb3..bd4c2a3c88d7 100644 --- a/drivers/ata/pdc_adma.c +++ b/drivers/ata/pdc_adma.c | |||
@@ -47,10 +47,10 @@ | |||
47 | #define DRV_VERSION "1.0" | 47 | #define DRV_VERSION "1.0" |
48 | 48 | ||
49 | /* macro to calculate base address for ATA regs */ | 49 | /* macro to calculate base address for ATA regs */ |
50 | #define ADMA_ATA_REGS(base,port_no) ((base) + ((port_no) * 0x40)) | 50 | #define ADMA_ATA_REGS(base, port_no) ((base) + ((port_no) * 0x40)) |
51 | 51 | ||
52 | /* macro to calculate base address for ADMA regs */ | 52 | /* macro to calculate base address for ADMA regs */ |
53 | #define ADMA_REGS(base,port_no) ((base) + 0x80 + ((port_no) * 0x20)) | 53 | #define ADMA_REGS(base, port_no) ((base) + 0x80 + ((port_no) * 0x20)) |
54 | 54 | ||
55 | /* macro to obtain addresses from ata_port */ | 55 | /* macro to obtain addresses from ata_port */ |
56 | #define ADMA_PORT_REGS(ap) \ | 56 | #define ADMA_PORT_REGS(ap) \ |
@@ -128,7 +128,7 @@ struct adma_port_priv { | |||
128 | adma_state_t state; | 128 | adma_state_t state; |
129 | }; | 129 | }; |
130 | 130 | ||
131 | static int adma_ata_init_one (struct pci_dev *pdev, | 131 | static int adma_ata_init_one(struct pci_dev *pdev, |
132 | const struct pci_device_id *ent); | 132 | const struct pci_device_id *ent); |
133 | static int adma_port_start(struct ata_port *ap); | 133 | static int adma_port_start(struct ata_port *ap); |
134 | static void adma_host_stop(struct ata_host *host); | 134 | static void adma_host_stop(struct ata_host *host); |
@@ -340,8 +340,8 @@ static int adma_fill_sg(struct ata_queued_cmd *qc) | |||
340 | buf[i++] = 0; /* pPKLW */ | 340 | buf[i++] = 0; /* pPKLW */ |
341 | buf[i++] = 0; /* reserved */ | 341 | buf[i++] = 0; /* reserved */ |
342 | 342 | ||
343 | *(__le32 *)(buf + i) | 343 | *(__le32 *)(buf + i) = |
344 | = (pFLAGS & pEND) ? 0 : cpu_to_le32(pp->pkt_dma + i + 4); | 344 | (pFLAGS & pEND) ? 0 : cpu_to_le32(pp->pkt_dma + i + 4); |
345 | i += 4; | 345 | i += 4; |
346 | 346 | ||
347 | VPRINTK("PRD[%u] = (0x%lX, 0x%X)\n", i/4, | 347 | VPRINTK("PRD[%u] = (0x%lX, 0x%X)\n", i/4, |
@@ -617,7 +617,7 @@ static int adma_port_start(struct ata_port *ap) | |||
617 | return -ENOMEM; | 617 | return -ENOMEM; |
618 | /* paranoia? */ | 618 | /* paranoia? */ |
619 | if ((pp->pkt_dma & 7) != 0) { | 619 | if ((pp->pkt_dma & 7) != 0) { |
620 | printk("bad alignment for pp->pkt_dma: %08x\n", | 620 | printk(KERN_ERR "bad alignment for pp->pkt_dma: %08x\n", |
621 | (u32)pp->pkt_dma); | 621 | (u32)pp->pkt_dma); |
622 | return -ENOMEM; | 622 | return -ENOMEM; |
623 | } | 623 | } |
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c index b97d077e61b5..323c087e8cc1 100644 --- a/drivers/ata/sata_inic162x.c +++ b/drivers/ata/sata_inic162x.c | |||
@@ -143,7 +143,7 @@ static const int scr_map[] = { | |||
143 | [SCR_CONTROL] = 2, | 143 | [SCR_CONTROL] = 2, |
144 | }; | 144 | }; |
145 | 145 | ||
146 | static void __iomem * inic_port_base(struct ata_port *ap) | 146 | static void __iomem *inic_port_base(struct ata_port *ap) |
147 | { | 147 | { |
148 | return ap->host->iomap[MMIO_BAR] + ap->port_no * PORT_SIZE; | 148 | return ap->host->iomap[MMIO_BAR] + ap->port_no * PORT_SIZE; |
149 | } | 149 | } |
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index b39648f0914b..a43f64d2775b 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c | |||
@@ -1156,7 +1156,7 @@ static void mv_fill_sg(struct ata_queued_cmd *qc) | |||
1156 | last_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL); | 1156 | last_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL); |
1157 | } | 1157 | } |
1158 | 1158 | ||
1159 | static inline void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last) | 1159 | static void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last) |
1160 | { | 1160 | { |
1161 | u16 tmp = data | (addr << CRQB_CMD_ADDR_SHIFT) | CRQB_CMD_CS | | 1161 | u16 tmp = data | (addr << CRQB_CMD_ADDR_SHIFT) | CRQB_CMD_CS | |
1162 | (last ? CRQB_CMD_LAST : 0); | 1162 | (last ? CRQB_CMD_LAST : 0); |
@@ -2429,7 +2429,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) | |||
2429 | struct mv_host_priv *hpriv = host->private_data; | 2429 | struct mv_host_priv *hpriv = host->private_data; |
2430 | u32 hp_flags = hpriv->hp_flags; | 2430 | u32 hp_flags = hpriv->hp_flags; |
2431 | 2431 | ||
2432 | switch(board_idx) { | 2432 | switch (board_idx) { |
2433 | case chip_5080: | 2433 | case chip_5080: |
2434 | hpriv->ops = &mv5xxx_ops; | 2434 | hpriv->ops = &mv5xxx_ops; |
2435 | hp_flags |= MV_HP_GEN_I; | 2435 | hp_flags |= MV_HP_GEN_I; |
@@ -2510,7 +2510,8 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) | |||
2510 | break; | 2510 | break; |
2511 | 2511 | ||
2512 | default: | 2512 | default: |
2513 | printk(KERN_ERR DRV_NAME ": BUG: invalid board index %u\n", board_idx); | 2513 | dev_printk(KERN_ERR, &pdev->dev, |
2514 | "BUG: invalid board index %u\n", board_idx); | ||
2514 | return 1; | 2515 | return 1; |
2515 | } | 2516 | } |
2516 | 2517 | ||
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c index 8d55f7fb50af..fea8d8d448e8 100644 --- a/drivers/ata/sata_nv.c +++ b/drivers/ata/sata_nv.c | |||
@@ -291,7 +291,7 @@ struct nv_swncq_port_priv { | |||
291 | }; | 291 | }; |
292 | 292 | ||
293 | 293 | ||
294 | #define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) & ( 1 << (19 + (12 * (PORT))))) | 294 | #define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) & (1 << (19 + (12 * (PORT))))) |
295 | 295 | ||
296 | static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | 296 | static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
297 | #ifdef CONFIG_PM | 297 | #ifdef CONFIG_PM |
@@ -884,8 +884,9 @@ static int nv_adma_check_cpb(struct ata_port *ap, int cpb_num, int force_err) | |||
884 | /* Notifier bits set without a command may indicate the drive | 884 | /* Notifier bits set without a command may indicate the drive |
885 | is misbehaving. Raise host state machine violation on this | 885 | is misbehaving. Raise host state machine violation on this |
886 | condition. */ | 886 | condition. */ |
887 | ata_port_printk(ap, KERN_ERR, "notifier for tag %d with no command?\n", | 887 | ata_port_printk(ap, KERN_ERR, |
888 | cpb_num); | 888 | "notifier for tag %d with no cmd?\n", |
889 | cpb_num); | ||
889 | ehi->err_mask |= AC_ERR_HSM; | 890 | ehi->err_mask |= AC_ERR_HSM; |
890 | ehi->action |= ATA_EH_SOFTRESET; | 891 | ehi->action |= ATA_EH_SOFTRESET; |
891 | ata_port_freeze(ap); | 892 | ata_port_freeze(ap); |
@@ -1021,8 +1022,8 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance) | |||
1021 | while ((pos = ffs(check_commands)) && !error) { | 1022 | while ((pos = ffs(check_commands)) && !error) { |
1022 | pos--; | 1023 | pos--; |
1023 | error = nv_adma_check_cpb(ap, pos, | 1024 | error = nv_adma_check_cpb(ap, pos, |
1024 | notifier_error & (1 << pos) ); | 1025 | notifier_error & (1 << pos)); |
1025 | check_commands &= ~(1 << pos ); | 1026 | check_commands &= ~(1 << pos); |
1026 | } | 1027 | } |
1027 | } | 1028 | } |
1028 | } | 1029 | } |
@@ -1061,7 +1062,7 @@ static void nv_adma_freeze(struct ata_port *ap) | |||
1061 | tmp = readw(mmio + NV_ADMA_CTL); | 1062 | tmp = readw(mmio + NV_ADMA_CTL); |
1062 | writew(tmp & ~(NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN), | 1063 | writew(tmp & ~(NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN), |
1063 | mmio + NV_ADMA_CTL); | 1064 | mmio + NV_ADMA_CTL); |
1064 | readw(mmio + NV_ADMA_CTL ); /* flush posted write */ | 1065 | readw(mmio + NV_ADMA_CTL); /* flush posted write */ |
1065 | } | 1066 | } |
1066 | 1067 | ||
1067 | static void nv_adma_thaw(struct ata_port *ap) | 1068 | static void nv_adma_thaw(struct ata_port *ap) |
@@ -1079,7 +1080,7 @@ static void nv_adma_thaw(struct ata_port *ap) | |||
1079 | tmp = readw(mmio + NV_ADMA_CTL); | 1080 | tmp = readw(mmio + NV_ADMA_CTL); |
1080 | writew(tmp | (NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN), | 1081 | writew(tmp | (NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN), |
1081 | mmio + NV_ADMA_CTL); | 1082 | mmio + NV_ADMA_CTL); |
1082 | readw(mmio + NV_ADMA_CTL ); /* flush posted write */ | 1083 | readw(mmio + NV_ADMA_CTL); /* flush posted write */ |
1083 | } | 1084 | } |
1084 | 1085 | ||
1085 | static void nv_adma_irq_clear(struct ata_port *ap) | 1086 | static void nv_adma_irq_clear(struct ata_port *ap) |
@@ -1165,7 +1166,7 @@ static int nv_adma_port_start(struct ata_port *ap) | |||
1165 | pp->cpb_dma = mem_dma; | 1166 | pp->cpb_dma = mem_dma; |
1166 | 1167 | ||
1167 | writel(mem_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW); | 1168 | writel(mem_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW); |
1168 | writel((mem_dma >> 16 ) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH); | 1169 | writel((mem_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH); |
1169 | 1170 | ||
1170 | mem += NV_ADMA_MAX_CPBS * NV_ADMA_CPB_SZ; | 1171 | mem += NV_ADMA_MAX_CPBS * NV_ADMA_CPB_SZ; |
1171 | mem_dma += NV_ADMA_MAX_CPBS * NV_ADMA_CPB_SZ; | 1172 | mem_dma += NV_ADMA_MAX_CPBS * NV_ADMA_CPB_SZ; |
@@ -1189,15 +1190,15 @@ static int nv_adma_port_start(struct ata_port *ap) | |||
1189 | 1190 | ||
1190 | /* clear GO for register mode, enable interrupt */ | 1191 | /* clear GO for register mode, enable interrupt */ |
1191 | tmp = readw(mmio + NV_ADMA_CTL); | 1192 | tmp = readw(mmio + NV_ADMA_CTL); |
1192 | writew( (tmp & ~NV_ADMA_CTL_GO) | NV_ADMA_CTL_AIEN | | 1193 | writew((tmp & ~NV_ADMA_CTL_GO) | NV_ADMA_CTL_AIEN | |
1193 | NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL); | 1194 | NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL); |
1194 | 1195 | ||
1195 | tmp = readw(mmio + NV_ADMA_CTL); | 1196 | tmp = readw(mmio + NV_ADMA_CTL); |
1196 | writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); | 1197 | writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); |
1197 | readw(mmio + NV_ADMA_CTL ); /* flush posted write */ | 1198 | readw(mmio + NV_ADMA_CTL); /* flush posted write */ |
1198 | udelay(1); | 1199 | udelay(1); |
1199 | writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); | 1200 | writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); |
1200 | readw(mmio + NV_ADMA_CTL ); /* flush posted write */ | 1201 | readw(mmio + NV_ADMA_CTL); /* flush posted write */ |
1201 | 1202 | ||
1202 | return 0; | 1203 | return 0; |
1203 | } | 1204 | } |
@@ -1237,7 +1238,7 @@ static int nv_adma_port_resume(struct ata_port *ap) | |||
1237 | 1238 | ||
1238 | /* set CPB block location */ | 1239 | /* set CPB block location */ |
1239 | writel(pp->cpb_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW); | 1240 | writel(pp->cpb_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW); |
1240 | writel((pp->cpb_dma >> 16 ) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH); | 1241 | writel((pp->cpb_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH); |
1241 | 1242 | ||
1242 | /* clear any outstanding interrupt conditions */ | 1243 | /* clear any outstanding interrupt conditions */ |
1243 | writew(0xffff, mmio + NV_ADMA_STAT); | 1244 | writew(0xffff, mmio + NV_ADMA_STAT); |
@@ -1250,15 +1251,15 @@ static int nv_adma_port_resume(struct ata_port *ap) | |||
1250 | 1251 | ||
1251 | /* clear GO for register mode, enable interrupt */ | 1252 | /* clear GO for register mode, enable interrupt */ |
1252 | tmp = readw(mmio + NV_ADMA_CTL); | 1253 | tmp = readw(mmio + NV_ADMA_CTL); |
1253 | writew( (tmp & ~NV_ADMA_CTL_GO) | NV_ADMA_CTL_AIEN | | 1254 | writew((tmp & ~NV_ADMA_CTL_GO) | NV_ADMA_CTL_AIEN | |
1254 | NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL); | 1255 | NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL); |
1255 | 1256 | ||
1256 | tmp = readw(mmio + NV_ADMA_CTL); | 1257 | tmp = readw(mmio + NV_ADMA_CTL); |
1257 | writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); | 1258 | writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); |
1258 | readw(mmio + NV_ADMA_CTL ); /* flush posted write */ | 1259 | readw(mmio + NV_ADMA_CTL); /* flush posted write */ |
1259 | udelay(1); | 1260 | udelay(1); |
1260 | writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); | 1261 | writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); |
1261 | readw(mmio + NV_ADMA_CTL ); /* flush posted write */ | 1262 | readw(mmio + NV_ADMA_CTL); /* flush posted write */ |
1262 | 1263 | ||
1263 | return 0; | 1264 | return 0; |
1264 | } | 1265 | } |
@@ -1342,7 +1343,8 @@ static void nv_adma_fill_sg(struct ata_queued_cmd *qc, struct nv_adma_cpb *cpb) | |||
1342 | idx = 0; | 1343 | idx = 0; |
1343 | 1344 | ||
1344 | ata_for_each_sg(sg, qc) { | 1345 | ata_for_each_sg(sg, qc) { |
1345 | aprd = (idx < 5) ? &cpb->aprd[idx] : &pp->aprd[NV_ADMA_SGTBL_LEN * qc->tag + (idx-5)]; | 1346 | aprd = (idx < 5) ? &cpb->aprd[idx] : |
1347 | &pp->aprd[NV_ADMA_SGTBL_LEN * qc->tag + (idx-5)]; | ||
1346 | nv_adma_fill_aprd(qc, sg, idx, aprd); | 1348 | nv_adma_fill_aprd(qc, sg, idx, aprd); |
1347 | idx++; | 1349 | idx++; |
1348 | } | 1350 | } |
@@ -1407,8 +1409,8 @@ static void nv_adma_qc_prep(struct ata_queued_cmd *qc) | |||
1407 | } else | 1409 | } else |
1408 | memset(&cpb->aprd[0], 0, sizeof(struct nv_adma_prd) * 5); | 1410 | memset(&cpb->aprd[0], 0, sizeof(struct nv_adma_prd) * 5); |
1409 | 1411 | ||
1410 | /* Be paranoid and don't let the device see NV_CPB_CTL_CPB_VALID until we are | 1412 | /* Be paranoid and don't let the device see NV_CPB_CTL_CPB_VALID |
1411 | finished filling in all of the contents */ | 1413 | until we are finished filling in all of the contents */ |
1412 | wmb(); | 1414 | wmb(); |
1413 | cpb->ctl_flags = ctl_flags; | 1415 | cpb->ctl_flags = ctl_flags; |
1414 | wmb(); | 1416 | wmb(); |
@@ -1436,15 +1438,15 @@ static unsigned int nv_adma_qc_issue(struct ata_queued_cmd *qc) | |||
1436 | wmb(); | 1438 | wmb(); |
1437 | 1439 | ||
1438 | if (curr_ncq != pp->last_issue_ncq) { | 1440 | if (curr_ncq != pp->last_issue_ncq) { |
1439 | /* Seems to need some delay before switching between NCQ and non-NCQ | 1441 | /* Seems to need some delay before switching between NCQ and |
1440 | commands, else we get command timeouts and such. */ | 1442 | non-NCQ commands, else we get command timeouts and such. */ |
1441 | udelay(20); | 1443 | udelay(20); |
1442 | pp->last_issue_ncq = curr_ncq; | 1444 | pp->last_issue_ncq = curr_ncq; |
1443 | } | 1445 | } |
1444 | 1446 | ||
1445 | writew(qc->tag, mmio + NV_ADMA_APPEND); | 1447 | writew(qc->tag, mmio + NV_ADMA_APPEND); |
1446 | 1448 | ||
1447 | DPRINTK("Issued tag %u\n",qc->tag); | 1449 | DPRINTK("Issued tag %u\n", qc->tag); |
1448 | 1450 | ||
1449 | return 0; | 1451 | return 0; |
1450 | } | 1452 | } |
@@ -1654,7 +1656,8 @@ static void nv_adma_error_handler(struct ata_port *ap) | |||
1654 | u8 cpb_count = readb(mmio + NV_ADMA_CPB_COUNT); | 1656 | u8 cpb_count = readb(mmio + NV_ADMA_CPB_COUNT); |
1655 | u8 next_cpb_idx = readb(mmio + NV_ADMA_NEXT_CPB_IDX); | 1657 | u8 next_cpb_idx = readb(mmio + NV_ADMA_NEXT_CPB_IDX); |
1656 | 1658 | ||
1657 | ata_port_printk(ap, KERN_ERR, "EH in ADMA mode, notifier 0x%X " | 1659 | ata_port_printk(ap, KERN_ERR, |
1660 | "EH in ADMA mode, notifier 0x%X " | ||
1658 | "notifier_error 0x%X gen_ctl 0x%X status 0x%X " | 1661 | "notifier_error 0x%X gen_ctl 0x%X status 0x%X " |
1659 | "next cpb count 0x%X next cpb idx 0x%x\n", | 1662 | "next cpb count 0x%X next cpb idx 0x%x\n", |
1660 | notifier, notifier_error, gen_ctl, status, | 1663 | notifier, notifier_error, gen_ctl, status, |
@@ -1663,7 +1666,7 @@ static void nv_adma_error_handler(struct ata_port *ap) | |||
1663 | for (i = 0; i < NV_ADMA_MAX_CPBS; i++) { | 1666 | for (i = 0; i < NV_ADMA_MAX_CPBS; i++) { |
1664 | struct nv_adma_cpb *cpb = &pp->cpb[i]; | 1667 | struct nv_adma_cpb *cpb = &pp->cpb[i]; |
1665 | if ((ata_tag_valid(ap->link.active_tag) && i == ap->link.active_tag) || | 1668 | if ((ata_tag_valid(ap->link.active_tag) && i == ap->link.active_tag) || |
1666 | ap->link.sactive & (1 << i) ) | 1669 | ap->link.sactive & (1 << i)) |
1667 | ata_port_printk(ap, KERN_ERR, | 1670 | ata_port_printk(ap, KERN_ERR, |
1668 | "CPB %d: ctl_flags 0x%x, resp_flags 0x%x\n", | 1671 | "CPB %d: ctl_flags 0x%x, resp_flags 0x%x\n", |
1669 | i, cpb->ctl_flags, cpb->resp_flags); | 1672 | i, cpb->ctl_flags, cpb->resp_flags); |
@@ -1673,7 +1676,8 @@ static void nv_adma_error_handler(struct ata_port *ap) | |||
1673 | /* Push us back into port register mode for error handling. */ | 1676 | /* Push us back into port register mode for error handling. */ |
1674 | nv_adma_register_mode(ap); | 1677 | nv_adma_register_mode(ap); |
1675 | 1678 | ||
1676 | /* Mark all of the CPBs as invalid to prevent them from being executed */ | 1679 | /* Mark all of the CPBs as invalid to prevent them from |
1680 | being executed */ | ||
1677 | for (i = 0; i < NV_ADMA_MAX_CPBS; i++) | 1681 | for (i = 0; i < NV_ADMA_MAX_CPBS; i++) |
1678 | pp->cpb[i].ctl_flags &= ~NV_CPB_CTL_CPB_VALID; | 1682 | pp->cpb[i].ctl_flags &= ~NV_CPB_CTL_CPB_VALID; |
1679 | 1683 | ||
@@ -2350,9 +2354,9 @@ static irqreturn_t nv_swncq_interrupt(int irq, void *dev_instance) | |||
2350 | return IRQ_RETVAL(handled); | 2354 | return IRQ_RETVAL(handled); |
2351 | } | 2355 | } |
2352 | 2356 | ||
2353 | static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 2357 | static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
2354 | { | 2358 | { |
2355 | static int printed_version = 0; | 2359 | static int printed_version; |
2356 | const struct ata_port_info *ppi[] = { NULL, NULL }; | 2360 | const struct ata_port_info *ppi[] = { NULL, NULL }; |
2357 | struct ata_host *host; | 2361 | struct ata_host *host; |
2358 | struct nv_host_priv *hpriv; | 2362 | struct nv_host_priv *hpriv; |
@@ -2364,7 +2368,7 @@ static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
2364 | // Make sure this is a SATA controller by counting the number of bars | 2368 | // Make sure this is a SATA controller by counting the number of bars |
2365 | // (NVIDIA SATA controllers will always have six bars). Otherwise, | 2369 | // (NVIDIA SATA controllers will always have six bars). Otherwise, |
2366 | // it's an IDE controller and we ignore it. | 2370 | // it's an IDE controller and we ignore it. |
2367 | for (bar=0; bar<6; bar++) | 2371 | for (bar = 0; bar < 6; bar++) |
2368 | if (pci_resource_start(pdev, bar) == 0) | 2372 | if (pci_resource_start(pdev, bar) == 0) |
2369 | return -ENODEV; | 2373 | return -ENODEV; |
2370 | 2374 | ||
@@ -2460,17 +2464,17 @@ static int nv_pci_device_resume(struct pci_dev *pdev) | |||
2460 | pp = host->ports[0]->private_data; | 2464 | pp = host->ports[0]->private_data; |
2461 | if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) | 2465 | if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) |
2462 | tmp32 &= ~(NV_MCP_SATA_CFG_20_PORT0_EN | | 2466 | tmp32 &= ~(NV_MCP_SATA_CFG_20_PORT0_EN | |
2463 | NV_MCP_SATA_CFG_20_PORT0_PWB_EN); | 2467 | NV_MCP_SATA_CFG_20_PORT0_PWB_EN); |
2464 | else | 2468 | else |
2465 | tmp32 |= (NV_MCP_SATA_CFG_20_PORT0_EN | | 2469 | tmp32 |= (NV_MCP_SATA_CFG_20_PORT0_EN | |
2466 | NV_MCP_SATA_CFG_20_PORT0_PWB_EN); | 2470 | NV_MCP_SATA_CFG_20_PORT0_PWB_EN); |
2467 | pp = host->ports[1]->private_data; | 2471 | pp = host->ports[1]->private_data; |
2468 | if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) | 2472 | if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) |
2469 | tmp32 &= ~(NV_MCP_SATA_CFG_20_PORT1_EN | | 2473 | tmp32 &= ~(NV_MCP_SATA_CFG_20_PORT1_EN | |
2470 | NV_MCP_SATA_CFG_20_PORT1_PWB_EN); | 2474 | NV_MCP_SATA_CFG_20_PORT1_PWB_EN); |
2471 | else | 2475 | else |
2472 | tmp32 |= (NV_MCP_SATA_CFG_20_PORT1_EN | | 2476 | tmp32 |= (NV_MCP_SATA_CFG_20_PORT1_EN | |
2473 | NV_MCP_SATA_CFG_20_PORT1_PWB_EN); | 2477 | NV_MCP_SATA_CFG_20_PORT1_PWB_EN); |
2474 | 2478 | ||
2475 | pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, tmp32); | 2479 | pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, tmp32); |
2476 | } | 2480 | } |
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c index 903213153b5d..deb26f04f2d7 100644 --- a/drivers/ata/sata_promise.c +++ b/drivers/ata/sata_promise.c | |||
@@ -83,10 +83,12 @@ enum { | |||
83 | PDC_PCI_SYS_ERR = (1 << 22), /* PCI system error */ | 83 | PDC_PCI_SYS_ERR = (1 << 22), /* PCI system error */ |
84 | PDC1_PCI_PARITY_ERR = (1 << 23), /* PCI parity error (from SATA150 driver) */ | 84 | PDC1_PCI_PARITY_ERR = (1 << 23), /* PCI parity error (from SATA150 driver) */ |
85 | PDC1_ERR_MASK = PDC1_PCI_PARITY_ERR, | 85 | PDC1_ERR_MASK = PDC1_PCI_PARITY_ERR, |
86 | PDC2_ERR_MASK = PDC2_HTO_ERR | PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR, | 86 | PDC2_ERR_MASK = PDC2_HTO_ERR | PDC2_ATA_HBA_ERR | |
87 | PDC_ERR_MASK = (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC_OVERRUN_ERR | 87 | PDC2_ATA_DMA_CNT_ERR, |
88 | | PDC_UNDERRUN_ERR | PDC_DRIVE_ERR | PDC_PCI_SYS_ERR | 88 | PDC_ERR_MASK = PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | |
89 | | PDC1_ERR_MASK | PDC2_ERR_MASK), | 89 | PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR | |
90 | PDC_DRIVE_ERR | PDC_PCI_SYS_ERR | | ||
91 | PDC1_ERR_MASK | PDC2_ERR_MASK, | ||
90 | 92 | ||
91 | board_2037x = 0, /* FastTrak S150 TX2plus */ | 93 | board_2037x = 0, /* FastTrak S150 TX2plus */ |
92 | board_2037x_pata = 1, /* FastTrak S150 TX2plus PATA port */ | 94 | board_2037x_pata = 1, /* FastTrak S150 TX2plus PATA port */ |
@@ -695,19 +697,20 @@ static void pdc_irq_clear(struct ata_port *ap) | |||
695 | readl(mmio + PDC_INT_SEQMASK); | 697 | readl(mmio + PDC_INT_SEQMASK); |
696 | } | 698 | } |
697 | 699 | ||
698 | static inline int pdc_is_sataii_tx4(unsigned long flags) | 700 | static int pdc_is_sataii_tx4(unsigned long flags) |
699 | { | 701 | { |
700 | const unsigned long mask = PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS; | 702 | const unsigned long mask = PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS; |
701 | return (flags & mask) == mask; | 703 | return (flags & mask) == mask; |
702 | } | 704 | } |
703 | 705 | ||
704 | static inline unsigned int pdc_port_no_to_ata_no(unsigned int port_no, int is_sataii_tx4) | 706 | static unsigned int pdc_port_no_to_ata_no(unsigned int port_no, |
707 | int is_sataii_tx4) | ||
705 | { | 708 | { |
706 | static const unsigned char sataii_tx4_port_remap[4] = { 3, 1, 0, 2}; | 709 | static const unsigned char sataii_tx4_port_remap[4] = { 3, 1, 0, 2}; |
707 | return is_sataii_tx4 ? sataii_tx4_port_remap[port_no] : port_no; | 710 | return is_sataii_tx4 ? sataii_tx4_port_remap[port_no] : port_no; |
708 | } | 711 | } |
709 | 712 | ||
710 | static irqreturn_t pdc_interrupt (int irq, void *dev_instance) | 713 | static irqreturn_t pdc_interrupt(int irq, void *dev_instance) |
711 | { | 714 | { |
712 | struct ata_host *host = dev_instance; | 715 | struct ata_host *host = dev_instance; |
713 | struct ata_port *ap; | 716 | struct ata_port *ap; |
@@ -839,15 +842,16 @@ static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc) | |||
839 | 842 | ||
840 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) | 843 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
841 | { | 844 | { |
842 | WARN_ON (tf->protocol == ATA_PROT_DMA || | 845 | WARN_ON(tf->protocol == ATA_PROT_DMA || |
843 | tf->protocol == ATA_PROT_ATAPI_DMA); | 846 | tf->protocol == ATA_PROT_ATAPI_DMA); |
844 | ata_tf_load(ap, tf); | 847 | ata_tf_load(ap, tf); |
845 | } | 848 | } |
846 | 849 | ||
847 | static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) | 850 | static void pdc_exec_command_mmio(struct ata_port *ap, |
851 | const struct ata_taskfile *tf) | ||
848 | { | 852 | { |
849 | WARN_ON (tf->protocol == ATA_PROT_DMA || | 853 | WARN_ON(tf->protocol == ATA_PROT_DMA || |
850 | tf->protocol == ATA_PROT_ATAPI_DMA); | 854 | tf->protocol == ATA_PROT_ATAPI_DMA); |
851 | ata_exec_command(ap, tf); | 855 | ata_exec_command(ap, tf); |
852 | } | 856 | } |
853 | 857 | ||
@@ -870,8 +874,11 @@ static int pdc_check_atapi_dma(struct ata_queued_cmd *qc) | |||
870 | } | 874 | } |
871 | /* -45150 (FFFF4FA2) to -1 (FFFFFFFF) shall use PIO mode */ | 875 | /* -45150 (FFFF4FA2) to -1 (FFFFFFFF) shall use PIO mode */ |
872 | if (scsicmd[0] == WRITE_10) { | 876 | if (scsicmd[0] == WRITE_10) { |
873 | unsigned int lba; | 877 | unsigned int lba = |
874 | lba = (scsicmd[2] << 24) | (scsicmd[3] << 16) | (scsicmd[4] << 8) | scsicmd[5]; | 878 | (scsicmd[2] << 24) | |
879 | (scsicmd[3] << 16) | | ||
880 | (scsicmd[4] << 8) | | ||
881 | scsicmd[5]; | ||
875 | if (lba >= 0xFFFF4FA2) | 882 | if (lba >= 0xFFFF4FA2) |
876 | pio = 1; | 883 | pio = 1; |
877 | } | 884 | } |
@@ -956,7 +963,8 @@ static void pdc_host_init(struct ata_host *host) | |||
956 | writel(tmp, mmio + PDC_SLEW_CTL); | 963 | writel(tmp, mmio + PDC_SLEW_CTL); |
957 | } | 964 | } |
958 | 965 | ||
959 | static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 966 | static int pdc_ata_init_one(struct pci_dev *pdev, |
967 | const struct pci_device_id *ent) | ||
960 | { | 968 | { |
961 | static int printed_version; | 969 | static int printed_version; |
962 | const struct ata_port_info *pi = &pdc_port_info[ent->driver_data]; | 970 | const struct ata_port_info *pi = &pdc_port_info[ent->driver_data]; |
diff --git a/drivers/ata/sata_qstor.c b/drivers/ata/sata_qstor.c index c4c4cd29eebb..6d43ba79e154 100644 --- a/drivers/ata/sata_qstor.c +++ b/drivers/ata/sata_qstor.c | |||
@@ -113,7 +113,7 @@ struct qs_port_priv { | |||
113 | 113 | ||
114 | static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | 114 | static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); |
115 | static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | 115 | static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); |
116 | static int qs_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | 116 | static int qs_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
117 | static int qs_port_start(struct ata_port *ap); | 117 | static int qs_port_start(struct ata_port *ap); |
118 | static void qs_host_stop(struct ata_host *host); | 118 | static void qs_host_stop(struct ata_host *host); |
119 | static void qs_phy_reset(struct ata_port *ap); | 119 | static void qs_phy_reset(struct ata_port *ap); |
@@ -135,7 +135,6 @@ static struct scsi_host_template qs_ata_sht = { | |||
135 | .sg_tablesize = QS_MAX_PRD, | 135 | .sg_tablesize = QS_MAX_PRD, |
136 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, | 136 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
137 | .emulated = ATA_SHT_EMULATED, | 137 | .emulated = ATA_SHT_EMULATED, |
138 | //FIXME .use_clustering = ATA_SHT_USE_CLUSTERING, | ||
139 | .use_clustering = ENABLE_CLUSTERING, | 138 | .use_clustering = ENABLE_CLUSTERING, |
140 | .proc_name = DRV_NAME, | 139 | .proc_name = DRV_NAME, |
141 | .dma_boundary = QS_DMA_BOUNDARY, | 140 | .dma_boundary = QS_DMA_BOUNDARY, |
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c index ea3a0ab7e027..4e6e381279cc 100644 --- a/drivers/ata/sata_sil.c +++ b/drivers/ata/sata_sil.c | |||
@@ -111,7 +111,7 @@ enum { | |||
111 | SIL_QUIRK_UDMA5MAX = (1 << 1), | 111 | SIL_QUIRK_UDMA5MAX = (1 << 1), |
112 | }; | 112 | }; |
113 | 113 | ||
114 | static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | 114 | static int sil_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
115 | #ifdef CONFIG_PM | 115 | #ifdef CONFIG_PM |
116 | static int sil_pci_device_resume(struct pci_dev *pdev); | 116 | static int sil_pci_device_resume(struct pci_dev *pdev); |
117 | #endif | 117 | #endif |
@@ -138,7 +138,7 @@ static const struct pci_device_id sil_pci_tbl[] = { | |||
138 | 138 | ||
139 | /* TODO firmware versions should be added - eric */ | 139 | /* TODO firmware versions should be added - eric */ |
140 | static const struct sil_drivelist { | 140 | static const struct sil_drivelist { |
141 | const char * product; | 141 | const char *product; |
142 | unsigned int quirk; | 142 | unsigned int quirk; |
143 | } sil_blacklist [] = { | 143 | } sil_blacklist [] = { |
144 | { "ST320012AS", SIL_QUIRK_MOD15WRITE }, | 144 | { "ST320012AS", SIL_QUIRK_MOD15WRITE }, |
@@ -279,7 +279,7 @@ MODULE_LICENSE("GPL"); | |||
279 | MODULE_DEVICE_TABLE(pci, sil_pci_tbl); | 279 | MODULE_DEVICE_TABLE(pci, sil_pci_tbl); |
280 | MODULE_VERSION(DRV_VERSION); | 280 | MODULE_VERSION(DRV_VERSION); |
281 | 281 | ||
282 | static int slow_down = 0; | 282 | static int slow_down; |
283 | module_param(slow_down, int, 0444); | 283 | module_param(slow_down, int, 0444); |
284 | MODULE_PARM_DESC(slow_down, "Sledgehammer used to work around random problems, by limiting commands to 15 sectors (0=off, 1=on)"); | 284 | MODULE_PARM_DESC(slow_down, "Sledgehammer used to work around random problems, by limiting commands to 15 sectors (0=off, 1=on)"); |
285 | 285 | ||
@@ -332,7 +332,8 @@ static int sil_set_mode(struct ata_link *link, struct ata_device **r_failed) | |||
332 | return 0; | 332 | return 0; |
333 | } | 333 | } |
334 | 334 | ||
335 | static inline void __iomem *sil_scr_addr(struct ata_port *ap, unsigned int sc_reg) | 335 | static inline void __iomem *sil_scr_addr(struct ata_port *ap, |
336 | unsigned int sc_reg) | ||
336 | { | 337 | { |
337 | void __iomem *offset = ap->ioaddr.scr_addr; | 338 | void __iomem *offset = ap->ioaddr.scr_addr; |
338 | 339 | ||
@@ -643,7 +644,7 @@ static void sil_init_controller(struct ata_host *host) | |||
643 | } | 644 | } |
644 | } | 645 | } |
645 | 646 | ||
646 | static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 647 | static int sil_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
647 | { | 648 | { |
648 | static int printed_version; | 649 | static int printed_version; |
649 | int board_id = ent->driver_data; | 650 | int board_id = ent->driver_data; |
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c index 26ebffc10f3e..3c481e0e0c03 100644 --- a/drivers/ata/sata_sil24.c +++ b/drivers/ata/sata_sil24.c | |||
@@ -674,7 +674,7 @@ static int sil24_do_softreset(struct ata_link *link, unsigned int *class, | |||
674 | 674 | ||
675 | /* put the port into known state */ | 675 | /* put the port into known state */ |
676 | if (sil24_init_port(ap)) { | 676 | if (sil24_init_port(ap)) { |
677 | reason ="port not ready"; | 677 | reason = "port not ready"; |
678 | goto err; | 678 | goto err; |
679 | } | 679 | } |
680 | 680 | ||
@@ -756,7 +756,8 @@ static int sil24_hardreset(struct ata_link *link, unsigned int *class, | |||
756 | 756 | ||
757 | writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT); | 757 | writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT); |
758 | tmp = ata_wait_register(port + PORT_CTRL_STAT, | 758 | tmp = ata_wait_register(port + PORT_CTRL_STAT, |
759 | PORT_CS_DEV_RST, PORT_CS_DEV_RST, 10, tout_msec); | 759 | PORT_CS_DEV_RST, PORT_CS_DEV_RST, 10, |
760 | tout_msec); | ||
760 | 761 | ||
761 | /* SStatus oscillates between zero and valid status after | 762 | /* SStatus oscillates between zero and valid status after |
762 | * DEV_RST, debounce it. | 763 | * DEV_RST, debounce it. |
@@ -1270,7 +1271,7 @@ static void sil24_init_controller(struct ata_host *host) | |||
1270 | PORT_CS_PORT_RST, 10, 100); | 1271 | PORT_CS_PORT_RST, 10, 100); |
1271 | if (tmp & PORT_CS_PORT_RST) | 1272 | if (tmp & PORT_CS_PORT_RST) |
1272 | dev_printk(KERN_ERR, host->dev, | 1273 | dev_printk(KERN_ERR, host->dev, |
1273 | "failed to clear port RST\n"); | 1274 | "failed to clear port RST\n"); |
1274 | } | 1275 | } |
1275 | 1276 | ||
1276 | /* configure port */ | 1277 | /* configure port */ |
@@ -1283,7 +1284,7 @@ static void sil24_init_controller(struct ata_host *host) | |||
1283 | 1284 | ||
1284 | static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | 1285 | static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
1285 | { | 1286 | { |
1286 | static int printed_version = 0; | 1287 | static int printed_version; |
1287 | struct ata_port_info pi = sil24_port_info[ent->driver_data]; | 1288 | struct ata_port_info pi = sil24_port_info[ent->driver_data]; |
1288 | const struct ata_port_info *ppi[] = { &pi, NULL }; | 1289 | const struct ata_port_info *ppi[] = { &pi, NULL }; |
1289 | void __iomem * const *iomap; | 1290 | void __iomem * const *iomap; |
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c index f147dc7bf464..a01260a56432 100644 --- a/drivers/ata/sata_sis.c +++ b/drivers/ata/sata_sis.c | |||
@@ -63,17 +63,17 @@ enum { | |||
63 | GENCTL_IOMAPPED_SCR = (1 << 26), /* if set, SCRs are in IO space */ | 63 | GENCTL_IOMAPPED_SCR = (1 << 26), /* if set, SCRs are in IO space */ |
64 | }; | 64 | }; |
65 | 65 | ||
66 | static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | 66 | static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
67 | static int sis_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val); | 67 | static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); |
68 | static int sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | 68 | static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); |
69 | 69 | ||
70 | static const struct pci_device_id sis_pci_tbl[] = { | 70 | static const struct pci_device_id sis_pci_tbl[] = { |
71 | { PCI_VDEVICE(SI, 0x0180), sis_180 }, /* SiS 964/180 */ | 71 | { PCI_VDEVICE(SI, 0x0180), sis_180 }, /* SiS 964/180 */ |
72 | { PCI_VDEVICE(SI, 0x0181), sis_180 }, /* SiS 964/180 */ | 72 | { PCI_VDEVICE(SI, 0x0181), sis_180 }, /* SiS 964/180 */ |
73 | { PCI_VDEVICE(SI, 0x0182), sis_180 }, /* SiS 965/965L */ | 73 | { PCI_VDEVICE(SI, 0x0182), sis_180 }, /* SiS 965/965L */ |
74 | { PCI_VDEVICE(SI, 0x0183), sis_180 }, /* SiS 965/965L */ | 74 | { PCI_VDEVICE(SI, 0x0183), sis_180 }, /* SiS 965/965L */ |
75 | { PCI_VDEVICE(SI, 0x1182), sis_180 }, /* SiS 966/680 */ | 75 | { PCI_VDEVICE(SI, 0x1182), sis_180 }, /* SiS 966/680 */ |
76 | { PCI_VDEVICE(SI, 0x1183), sis_180 }, /* SiS 966/966L/968/680 */ | 76 | { PCI_VDEVICE(SI, 0x1183), sis_180 }, /* SiS 966/966L/968/680 */ |
77 | 77 | ||
78 | { } /* terminate list */ | 78 | { } /* terminate list */ |
79 | }; | 79 | }; |
@@ -149,24 +149,24 @@ static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg) | |||
149 | 149 | ||
150 | if (ap->port_no) { | 150 | if (ap->port_no) { |
151 | switch (pdev->device) { | 151 | switch (pdev->device) { |
152 | case 0x0180: | 152 | case 0x0180: |
153 | case 0x0181: | 153 | case 0x0181: |
154 | pci_read_config_byte(pdev, SIS_PMR, &pmr); | 154 | pci_read_config_byte(pdev, SIS_PMR, &pmr); |
155 | if ((pmr & SIS_PMR_COMBINED) == 0) | 155 | if ((pmr & SIS_PMR_COMBINED) == 0) |
156 | addr += SIS180_SATA1_OFS; | 156 | addr += SIS180_SATA1_OFS; |
157 | break; | 157 | break; |
158 | 158 | ||
159 | case 0x0182: | 159 | case 0x0182: |
160 | case 0x0183: | 160 | case 0x0183: |
161 | case 0x1182: | 161 | case 0x1182: |
162 | addr += SIS182_SATA1_OFS; | 162 | addr += SIS182_SATA1_OFS; |
163 | break; | 163 | break; |
164 | } | 164 | } |
165 | } | 165 | } |
166 | return addr; | 166 | return addr; |
167 | } | 167 | } |
168 | 168 | ||
169 | static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg, u32 *val) | 169 | static u32 sis_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) |
170 | { | 170 | { |
171 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 171 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
172 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); | 172 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); |
@@ -190,7 +190,7 @@ static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg, u32 *val) | |||
190 | return 0; | 190 | return 0; |
191 | } | 191 | } |
192 | 192 | ||
193 | static void sis_scr_cfg_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | 193 | static void sis_scr_cfg_write(struct ata_port *ap, unsigned int sc_reg, u32 val) |
194 | { | 194 | { |
195 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 195 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
196 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); | 196 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); |
@@ -253,7 +253,7 @@ static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |||
253 | return 0; | 253 | return 0; |
254 | } | 254 | } |
255 | 255 | ||
256 | static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 256 | static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
257 | { | 257 | { |
258 | static int printed_version; | 258 | static int printed_version; |
259 | struct ata_port_info pi = sis_port_info; | 259 | struct ata_port_info pi = sis_port_info; |
@@ -309,29 +309,33 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
309 | } else { | 309 | } else { |
310 | dev_printk(KERN_INFO, &pdev->dev, | 310 | dev_printk(KERN_INFO, &pdev->dev, |
311 | "Detected SiS 180/181 chipset in combined mode\n"); | 311 | "Detected SiS 180/181 chipset in combined mode\n"); |
312 | port2_start=0; | 312 | port2_start = 0; |
313 | pi.flags |= ATA_FLAG_SLAVE_POSS; | 313 | pi.flags |= ATA_FLAG_SLAVE_POSS; |
314 | } | 314 | } |
315 | break; | 315 | break; |
316 | 316 | ||
317 | case 0x0182: | 317 | case 0x0182: |
318 | case 0x0183: | 318 | case 0x0183: |
319 | pci_read_config_dword ( pdev, 0x6C, &val); | 319 | pci_read_config_dword(pdev, 0x6C, &val); |
320 | if (val & (1L << 31)) { | 320 | if (val & (1L << 31)) { |
321 | dev_printk(KERN_INFO, &pdev->dev, "Detected SiS 182/965 chipset\n"); | 321 | dev_printk(KERN_INFO, &pdev->dev, |
322 | "Detected SiS 182/965 chipset\n"); | ||
322 | pi.flags |= ATA_FLAG_SLAVE_POSS; | 323 | pi.flags |= ATA_FLAG_SLAVE_POSS; |
323 | } else { | 324 | } else { |
324 | dev_printk(KERN_INFO, &pdev->dev, "Detected SiS 182/965L chipset\n"); | 325 | dev_printk(KERN_INFO, &pdev->dev, |
326 | "Detected SiS 182/965L chipset\n"); | ||
325 | } | 327 | } |
326 | break; | 328 | break; |
327 | 329 | ||
328 | case 0x1182: | 330 | case 0x1182: |
329 | dev_printk(KERN_INFO, &pdev->dev, "Detected SiS 1182/966/680 SATA controller\n"); | 331 | dev_printk(KERN_INFO, &pdev->dev, |
332 | "Detected SiS 1182/966/680 SATA controller\n"); | ||
330 | pi.flags |= ATA_FLAG_SLAVE_POSS; | 333 | pi.flags |= ATA_FLAG_SLAVE_POSS; |
331 | break; | 334 | break; |
332 | 335 | ||
333 | case 0x1183: | 336 | case 0x1183: |
334 | dev_printk(KERN_INFO, &pdev->dev, "Detected SiS 1183/966/966L/968/680 controller in PATA mode\n"); | 337 | dev_printk(KERN_INFO, &pdev->dev, |
338 | "Detected SiS 1183/966/966L/968/680 controller in PATA mode\n"); | ||
335 | ppi[0] = &sis_info133_for_sata; | 339 | ppi[0] = &sis_info133_for_sata; |
336 | ppi[1] = &sis_info133_for_sata; | 340 | ppi[1] = &sis_info133_for_sata; |
337 | break; | 341 | break; |
diff --git a/drivers/ata/sata_svw.c b/drivers/ata/sata_svw.c index 12d613c48c19..69f651e0bc98 100644 --- a/drivers/ata/sata_svw.c +++ b/drivers/ata/sata_svw.c | |||
@@ -182,7 +182,7 @@ static void k2_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) | |||
182 | tf->hob_lbal = lbal >> 8; | 182 | tf->hob_lbal = lbal >> 8; |
183 | tf->hob_lbam = lbam >> 8; | 183 | tf->hob_lbam = lbam >> 8; |
184 | tf->hob_lbah = lbah >> 8; | 184 | tf->hob_lbah = lbah >> 8; |
185 | } | 185 | } |
186 | } | 186 | } |
187 | 187 | ||
188 | /** | 188 | /** |
@@ -193,7 +193,7 @@ static void k2_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) | |||
193 | * spin_lock_irqsave(host lock) | 193 | * spin_lock_irqsave(host lock) |
194 | */ | 194 | */ |
195 | 195 | ||
196 | static void k2_bmdma_setup_mmio (struct ata_queued_cmd *qc) | 196 | static void k2_bmdma_setup_mmio(struct ata_queued_cmd *qc) |
197 | { | 197 | { |
198 | struct ata_port *ap = qc->ap; | 198 | struct ata_port *ap = qc->ap; |
199 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | 199 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); |
@@ -224,7 +224,7 @@ static void k2_bmdma_setup_mmio (struct ata_queued_cmd *qc) | |||
224 | * spin_lock_irqsave(host lock) | 224 | * spin_lock_irqsave(host lock) |
225 | */ | 225 | */ |
226 | 226 | ||
227 | static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc) | 227 | static void k2_bmdma_start_mmio(struct ata_queued_cmd *qc) |
228 | { | 228 | { |
229 | struct ata_port *ap = qc->ap; | 229 | struct ata_port *ap = qc->ap; |
230 | void __iomem *mmio = ap->ioaddr.bmdma_addr; | 230 | void __iomem *mmio = ap->ioaddr.bmdma_addr; |
@@ -255,7 +255,7 @@ static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc) | |||
255 | 255 | ||
256 | static u8 k2_stat_check_status(struct ata_port *ap) | 256 | static u8 k2_stat_check_status(struct ata_port *ap) |
257 | { | 257 | { |
258 | return readl(ap->ioaddr.status_addr); | 258 | return readl(ap->ioaddr.status_addr); |
259 | } | 259 | } |
260 | 260 | ||
261 | #ifdef CONFIG_PPC_OF | 261 | #ifdef CONFIG_PPC_OF |
@@ -395,7 +395,7 @@ static void k2_sata_setup_port(struct ata_ioports *port, void __iomem *base) | |||
395 | } | 395 | } |
396 | 396 | ||
397 | 397 | ||
398 | static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 398 | static int k2_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
399 | { | 399 | { |
400 | static int printed_version; | 400 | static int printed_version; |
401 | const struct ata_port_info *ppi[] = | 401 | const struct ata_port_info *ppi[] = |
diff --git a/drivers/ata/sata_sx4.c b/drivers/ata/sata_sx4.c index 16b3b8a7924b..4d857185f33b 100644 --- a/drivers/ata/sata_sx4.c +++ b/drivers/ata/sata_sx4.c | |||
@@ -212,9 +212,9 @@ struct pdc_host_priv { | |||
212 | }; | 212 | }; |
213 | 213 | ||
214 | 214 | ||
215 | static int pdc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | 215 | static int pdc_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
216 | static void pdc_eng_timeout(struct ata_port *ap); | 216 | static void pdc_eng_timeout(struct ata_port *ap); |
217 | static void pdc_20621_phy_reset (struct ata_port *ap); | 217 | static void pdc_20621_phy_reset(struct ata_port *ap); |
218 | static int pdc_port_start(struct ata_port *ap); | 218 | static int pdc_port_start(struct ata_port *ap); |
219 | static void pdc20621_qc_prep(struct ata_queued_cmd *qc); | 219 | static void pdc20621_qc_prep(struct ata_queued_cmd *qc); |
220 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); | 220 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); |
@@ -320,16 +320,16 @@ static int pdc_port_start(struct ata_port *ap) | |||
320 | return 0; | 320 | return 0; |
321 | } | 321 | } |
322 | 322 | ||
323 | static void pdc_20621_phy_reset (struct ata_port *ap) | 323 | static void pdc_20621_phy_reset(struct ata_port *ap) |
324 | { | 324 | { |
325 | VPRINTK("ENTER\n"); | 325 | VPRINTK("ENTER\n"); |
326 | ap->cbl = ATA_CBL_SATA; | 326 | ap->cbl = ATA_CBL_SATA; |
327 | ata_port_probe(ap); | 327 | ata_port_probe(ap); |
328 | ata_bus_reset(ap); | 328 | ata_bus_reset(ap); |
329 | } | 329 | } |
330 | 330 | ||
331 | static inline void pdc20621_ata_sg(struct ata_taskfile *tf, u8 *buf, | 331 | static inline void pdc20621_ata_sg(struct ata_taskfile *tf, u8 *buf, |
332 | unsigned int portno, | 332 | unsigned int portno, |
333 | unsigned int total_len) | 333 | unsigned int total_len) |
334 | { | 334 | { |
335 | u32 addr; | 335 | u32 addr; |
@@ -351,7 +351,7 @@ static inline void pdc20621_ata_sg(struct ata_taskfile *tf, u8 *buf, | |||
351 | } | 351 | } |
352 | 352 | ||
353 | static inline void pdc20621_host_sg(struct ata_taskfile *tf, u8 *buf, | 353 | static inline void pdc20621_host_sg(struct ata_taskfile *tf, u8 *buf, |
354 | unsigned int portno, | 354 | unsigned int portno, |
355 | unsigned int total_len) | 355 | unsigned int total_len) |
356 | { | 356 | { |
357 | u32 addr; | 357 | u32 addr; |
@@ -711,8 +711,8 @@ static unsigned int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc) | |||
711 | return ata_qc_issue_prot(qc); | 711 | return ata_qc_issue_prot(qc); |
712 | } | 712 | } |
713 | 713 | ||
714 | static inline unsigned int pdc20621_host_intr( struct ata_port *ap, | 714 | static inline unsigned int pdc20621_host_intr(struct ata_port *ap, |
715 | struct ata_queued_cmd *qc, | 715 | struct ata_queued_cmd *qc, |
716 | unsigned int doing_hdma, | 716 | unsigned int doing_hdma, |
717 | void __iomem *mmio) | 717 | void __iomem *mmio) |
718 | { | 718 | { |
@@ -803,7 +803,7 @@ static void pdc20621_irq_clear(struct ata_port *ap) | |||
803 | readl(mmio + PDC_20621_SEQMASK); | 803 | readl(mmio + PDC_20621_SEQMASK); |
804 | } | 804 | } |
805 | 805 | ||
806 | static irqreturn_t pdc20621_interrupt (int irq, void *dev_instance) | 806 | static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance) |
807 | { | 807 | { |
808 | struct ata_host *host = dev_instance; | 808 | struct ata_host *host = dev_instance; |
809 | struct ata_port *ap; | 809 | struct ata_port *ap; |
@@ -836,9 +836,9 @@ static irqreturn_t pdc20621_interrupt (int irq, void *dev_instance) | |||
836 | return IRQ_NONE; | 836 | return IRQ_NONE; |
837 | } | 837 | } |
838 | 838 | ||
839 | spin_lock(&host->lock); | 839 | spin_lock(&host->lock); |
840 | 840 | ||
841 | for (i = 1; i < 9; i++) { | 841 | for (i = 1; i < 9; i++) { |
842 | port_no = i - 1; | 842 | port_no = i - 1; |
843 | if (port_no > 3) | 843 | if (port_no > 3) |
844 | port_no -= 4; | 844 | port_no -= 4; |
@@ -859,7 +859,7 @@ static irqreturn_t pdc20621_interrupt (int irq, void *dev_instance) | |||
859 | } | 859 | } |
860 | } | 860 | } |
861 | 861 | ||
862 | spin_unlock(&host->lock); | 862 | spin_unlock(&host->lock); |
863 | 863 | ||
864 | VPRINTK("mask == 0x%x\n", mask); | 864 | VPRINTK("mask == 0x%x\n", mask); |
865 | 865 | ||
@@ -906,16 +906,16 @@ static void pdc_eng_timeout(struct ata_port *ap) | |||
906 | 906 | ||
907 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) | 907 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
908 | { | 908 | { |
909 | WARN_ON (tf->protocol == ATA_PROT_DMA || | 909 | WARN_ON(tf->protocol == ATA_PROT_DMA || |
910 | tf->protocol == ATA_PROT_NODATA); | 910 | tf->protocol == ATA_PROT_NODATA); |
911 | ata_tf_load(ap, tf); | 911 | ata_tf_load(ap, tf); |
912 | } | 912 | } |
913 | 913 | ||
914 | 914 | ||
915 | static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) | 915 | static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
916 | { | 916 | { |
917 | WARN_ON (tf->protocol == ATA_PROT_DMA || | 917 | WARN_ON(tf->protocol == ATA_PROT_DMA || |
918 | tf->protocol == ATA_PROT_NODATA); | 918 | tf->protocol == ATA_PROT_NODATA); |
919 | ata_exec_command(ap, tf); | 919 | ata_exec_command(ap, tf); |
920 | } | 920 | } |
921 | 921 | ||
@@ -953,7 +953,7 @@ static void pdc20621_get_from_dimm(struct ata_host *host, void *psource, | |||
953 | mmio += PDC_CHIP0_OFS; | 953 | mmio += PDC_CHIP0_OFS; |
954 | 954 | ||
955 | page_mask = 0x00; | 955 | page_mask = 0x00; |
956 | window_size = 0x2000 * 4; /* 32K byte uchar size */ | 956 | window_size = 0x2000 * 4; /* 32K byte uchar size */ |
957 | idx = (u16) (offset / window_size); | 957 | idx = (u16) (offset / window_size); |
958 | 958 | ||
959 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 959 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
@@ -979,7 +979,7 @@ static void pdc20621_get_from_dimm(struct ata_host *host, void *psource, | |||
979 | window_size / 4); | 979 | window_size / 4); |
980 | psource += window_size; | 980 | psource += window_size; |
981 | size -= window_size; | 981 | size -= window_size; |
982 | idx ++; | 982 | idx++; |
983 | } | 983 | } |
984 | 984 | ||
985 | if (size) { | 985 | if (size) { |
@@ -1008,7 +1008,7 @@ static void pdc20621_put_to_dimm(struct ata_host *host, void *psource, | |||
1008 | mmio += PDC_CHIP0_OFS; | 1008 | mmio += PDC_CHIP0_OFS; |
1009 | 1009 | ||
1010 | page_mask = 0x00; | 1010 | page_mask = 0x00; |
1011 | window_size = 0x2000 * 4; /* 32K byte uchar size */ | 1011 | window_size = 0x2000 * 4; /* 32K byte uchar size */ |
1012 | idx = (u16) (offset / window_size); | 1012 | idx = (u16) (offset / window_size); |
1013 | 1013 | ||
1014 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 1014 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
@@ -1031,7 +1031,7 @@ static void pdc20621_put_to_dimm(struct ata_host *host, void *psource, | |||
1031 | readl(mmio + PDC_GENERAL_CTLR); | 1031 | readl(mmio + PDC_GENERAL_CTLR); |
1032 | psource += window_size; | 1032 | psource += window_size; |
1033 | size -= window_size; | 1033 | size -= window_size; |
1034 | idx ++; | 1034 | idx++; |
1035 | } | 1035 | } |
1036 | 1036 | ||
1037 | if (size) { | 1037 | if (size) { |
@@ -1050,7 +1050,7 @@ static unsigned int pdc20621_i2c_read(struct ata_host *host, u32 device, | |||
1050 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; | 1050 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
1051 | u32 i2creg = 0; | 1051 | u32 i2creg = 0; |
1052 | u32 status; | 1052 | u32 status; |
1053 | u32 count =0; | 1053 | u32 count = 0; |
1054 | 1054 | ||
1055 | /* hard-code chip #0 */ | 1055 | /* hard-code chip #0 */ |
1056 | mmio += PDC_CHIP0_OFS; | 1056 | mmio += PDC_CHIP0_OFS; |
@@ -1082,21 +1082,21 @@ static unsigned int pdc20621_i2c_read(struct ata_host *host, u32 device, | |||
1082 | 1082 | ||
1083 | static int pdc20621_detect_dimm(struct ata_host *host) | 1083 | static int pdc20621_detect_dimm(struct ata_host *host) |
1084 | { | 1084 | { |
1085 | u32 data=0 ; | 1085 | u32 data = 0; |
1086 | if (pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, | 1086 | if (pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, |
1087 | PDC_DIMM_SPD_SYSTEM_FREQ, &data)) { | 1087 | PDC_DIMM_SPD_SYSTEM_FREQ, &data)) { |
1088 | if (data == 100) | 1088 | if (data == 100) |
1089 | return 100; | 1089 | return 100; |
1090 | } else | 1090 | } else |
1091 | return 0; | 1091 | return 0; |
1092 | 1092 | ||
1093 | if (pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) { | 1093 | if (pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) { |
1094 | if (data <= 0x75) | 1094 | if (data <= 0x75) |
1095 | return 133; | 1095 | return 133; |
1096 | } else | 1096 | } else |
1097 | return 0; | 1097 | return 0; |
1098 | 1098 | ||
1099 | return 0; | 1099 | return 0; |
1100 | } | 1100 | } |
1101 | 1101 | ||
1102 | 1102 | ||
@@ -1104,8 +1104,8 @@ static int pdc20621_prog_dimm0(struct ata_host *host) | |||
1104 | { | 1104 | { |
1105 | u32 spd0[50]; | 1105 | u32 spd0[50]; |
1106 | u32 data = 0; | 1106 | u32 data = 0; |
1107 | int size, i; | 1107 | int size, i; |
1108 | u8 bdimmsize; | 1108 | u8 bdimmsize; |
1109 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; | 1109 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
1110 | static const struct { | 1110 | static const struct { |
1111 | unsigned int reg; | 1111 | unsigned int reg; |
@@ -1128,40 +1128,40 @@ static int pdc20621_prog_dimm0(struct ata_host *host) | |||
1128 | /* hard-code chip #0 */ | 1128 | /* hard-code chip #0 */ |
1129 | mmio += PDC_CHIP0_OFS; | 1129 | mmio += PDC_CHIP0_OFS; |
1130 | 1130 | ||
1131 | for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++) | 1131 | for (i = 0; i < ARRAY_SIZE(pdc_i2c_read_data); i++) |
1132 | pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, | 1132 | pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, |
1133 | pdc_i2c_read_data[i].reg, | 1133 | pdc_i2c_read_data[i].reg, |
1134 | &spd0[pdc_i2c_read_data[i].ofs]); | 1134 | &spd0[pdc_i2c_read_data[i].ofs]); |
1135 | 1135 | ||
1136 | data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4); | 1136 | data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4); |
1137 | data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) | | 1137 | data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) | |
1138 | ((((spd0[27] + 9) / 10) - 1) << 8) ; | 1138 | ((((spd0[27] + 9) / 10) - 1) << 8) ; |
1139 | data |= (((((spd0[29] > spd0[28]) | 1139 | data |= (((((spd0[29] > spd0[28]) |
1140 | ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10; | 1140 | ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10; |
1141 | data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12; | 1141 | data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12; |
1142 | 1142 | ||
1143 | if (spd0[18] & 0x08) | 1143 | if (spd0[18] & 0x08) |
1144 | data |= ((0x03) << 14); | 1144 | data |= ((0x03) << 14); |
1145 | else if (spd0[18] & 0x04) | 1145 | else if (spd0[18] & 0x04) |
1146 | data |= ((0x02) << 14); | 1146 | data |= ((0x02) << 14); |
1147 | else if (spd0[18] & 0x01) | 1147 | else if (spd0[18] & 0x01) |
1148 | data |= ((0x01) << 14); | 1148 | data |= ((0x01) << 14); |
1149 | else | 1149 | else |
1150 | data |= (0 << 14); | 1150 | data |= (0 << 14); |
1151 | 1151 | ||
1152 | /* | 1152 | /* |
1153 | Calculate the size of bDIMMSize (power of 2) and | 1153 | Calculate the size of bDIMMSize (power of 2) and |
1154 | merge the DIMM size by program start/end address. | 1154 | merge the DIMM size by program start/end address. |
1155 | */ | 1155 | */ |
1156 | 1156 | ||
1157 | bdimmsize = spd0[4] + (spd0[5] / 2) + spd0[3] + (spd0[17] / 2) + 3; | 1157 | bdimmsize = spd0[4] + (spd0[5] / 2) + spd0[3] + (spd0[17] / 2) + 3; |
1158 | size = (1 << bdimmsize) >> 20; /* size = xxx(MB) */ | 1158 | size = (1 << bdimmsize) >> 20; /* size = xxx(MB) */ |
1159 | data |= (((size / 16) - 1) << 16); | 1159 | data |= (((size / 16) - 1) << 16); |
1160 | data |= (0 << 23); | 1160 | data |= (0 << 23); |
1161 | data |= 8; | 1161 | data |= 8; |
1162 | writel(data, mmio + PDC_DIMM0_CONTROL); | 1162 | writel(data, mmio + PDC_DIMM0_CONTROL); |
1163 | readl(mmio + PDC_DIMM0_CONTROL); | 1163 | readl(mmio + PDC_DIMM0_CONTROL); |
1164 | return size; | 1164 | return size; |
1165 | } | 1165 | } |
1166 | 1166 | ||
1167 | 1167 | ||
@@ -1172,9 +1172,9 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_host *host) | |||
1172 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; | 1172 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
1173 | 1173 | ||
1174 | /* hard-code chip #0 */ | 1174 | /* hard-code chip #0 */ |
1175 | mmio += PDC_CHIP0_OFS; | 1175 | mmio += PDC_CHIP0_OFS; |
1176 | 1176 | ||
1177 | /* | 1177 | /* |
1178 | Set To Default : DIMM Module Global Control Register (0x022259F1) | 1178 | Set To Default : DIMM Module Global Control Register (0x022259F1) |
1179 | DIMM Arbitration Disable (bit 20) | 1179 | DIMM Arbitration Disable (bit 20) |
1180 | DIMM Data/Control Output Driving Selection (bit12 - bit15) | 1180 | DIMM Data/Control Output Driving Selection (bit12 - bit15) |
@@ -1193,40 +1193,40 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_host *host) | |||
1193 | writel(data, mmio + PDC_SDRAM_CONTROL); | 1193 | writel(data, mmio + PDC_SDRAM_CONTROL); |
1194 | readl(mmio + PDC_SDRAM_CONTROL); | 1194 | readl(mmio + PDC_SDRAM_CONTROL); |
1195 | printk(KERN_ERR "Local DIMM ECC Enabled\n"); | 1195 | printk(KERN_ERR "Local DIMM ECC Enabled\n"); |
1196 | } | 1196 | } |
1197 | 1197 | ||
1198 | /* DIMM Initialization Select/Enable (bit 18/19) */ | 1198 | /* DIMM Initialization Select/Enable (bit 18/19) */ |
1199 | data &= (~(1<<18)); | 1199 | data &= (~(1<<18)); |
1200 | data |= (1<<19); | 1200 | data |= (1<<19); |
1201 | writel(data, mmio + PDC_SDRAM_CONTROL); | 1201 | writel(data, mmio + PDC_SDRAM_CONTROL); |
1202 | 1202 | ||
1203 | error = 1; | 1203 | error = 1; |
1204 | for (i = 1; i <= 10; i++) { /* polling ~5 secs */ | 1204 | for (i = 1; i <= 10; i++) { /* polling ~5 secs */ |
1205 | data = readl(mmio + PDC_SDRAM_CONTROL); | 1205 | data = readl(mmio + PDC_SDRAM_CONTROL); |
1206 | if (!(data & (1<<19))) { | 1206 | if (!(data & (1<<19))) { |
1207 | error = 0; | 1207 | error = 0; |
1208 | break; | 1208 | break; |
1209 | } | 1209 | } |
1210 | msleep(i*100); | 1210 | msleep(i*100); |
1211 | } | 1211 | } |
1212 | return error; | 1212 | return error; |
1213 | } | 1213 | } |
1214 | 1214 | ||
1215 | 1215 | ||
1216 | static unsigned int pdc20621_dimm_init(struct ata_host *host) | 1216 | static unsigned int pdc20621_dimm_init(struct ata_host *host) |
1217 | { | 1217 | { |
1218 | int speed, size, length; | 1218 | int speed, size, length; |
1219 | u32 addr,spd0,pci_status; | 1219 | u32 addr, spd0, pci_status; |
1220 | u32 tmp=0; | 1220 | u32 tmp = 0; |
1221 | u32 time_period=0; | 1221 | u32 time_period = 0; |
1222 | u32 tcount=0; | 1222 | u32 tcount = 0; |
1223 | u32 ticks=0; | 1223 | u32 ticks = 0; |
1224 | u32 clock=0; | 1224 | u32 clock = 0; |
1225 | u32 fparam=0; | 1225 | u32 fparam = 0; |
1226 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; | 1226 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
1227 | 1227 | ||
1228 | /* hard-code chip #0 */ | 1228 | /* hard-code chip #0 */ |
1229 | mmio += PDC_CHIP0_OFS; | 1229 | mmio += PDC_CHIP0_OFS; |
1230 | 1230 | ||
1231 | /* Initialize PLL based upon PCI Bus Frequency */ | 1231 | /* Initialize PLL based upon PCI Bus Frequency */ |
1232 | 1232 | ||
@@ -1285,41 +1285,43 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host) | |||
1285 | if (!(speed = pdc20621_detect_dimm(host))) { | 1285 | if (!(speed = pdc20621_detect_dimm(host))) { |
1286 | printk(KERN_ERR "Detect Local DIMM Fail\n"); | 1286 | printk(KERN_ERR "Detect Local DIMM Fail\n"); |
1287 | return 1; /* DIMM error */ | 1287 | return 1; /* DIMM error */ |
1288 | } | 1288 | } |
1289 | VPRINTK("Local DIMM Speed = %d\n", speed); | 1289 | VPRINTK("Local DIMM Speed = %d\n", speed); |
1290 | 1290 | ||
1291 | /* Programming DIMM0 Module Control Register (index_CID0:80h) */ | 1291 | /* Programming DIMM0 Module Control Register (index_CID0:80h) */ |
1292 | size = pdc20621_prog_dimm0(host); | 1292 | size = pdc20621_prog_dimm0(host); |
1293 | VPRINTK("Local DIMM Size = %dMB\n",size); | 1293 | VPRINTK("Local DIMM Size = %dMB\n", size); |
1294 | 1294 | ||
1295 | /* Programming DIMM Module Global Control Register (index_CID0:88h) */ | 1295 | /* Programming DIMM Module Global Control Register (index_CID0:88h) */ |
1296 | if (pdc20621_prog_dimm_global(host)) { | 1296 | if (pdc20621_prog_dimm_global(host)) { |
1297 | printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n"); | 1297 | printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n"); |
1298 | return 1; | 1298 | return 1; |
1299 | } | 1299 | } |
1300 | 1300 | ||
1301 | #ifdef ATA_VERBOSE_DEBUG | 1301 | #ifdef ATA_VERBOSE_DEBUG |
1302 | { | 1302 | { |
1303 | u8 test_parttern1[40] = {0x55,0xAA,'P','r','o','m','i','s','e',' ', | 1303 | u8 test_parttern1[40] = |
1304 | 'N','o','t',' ','Y','e','t',' ','D','e','f','i','n','e','d',' ', | 1304 | {0x55,0xAA,'P','r','o','m','i','s','e',' ', |
1305 | '1','.','1','0', | 1305 | 'N','o','t',' ','Y','e','t',' ', |
1306 | '9','8','0','3','1','6','1','2',0,0}; | 1306 | 'D','e','f','i','n','e','d',' ', |
1307 | '1','.','1','0', | ||
1308 | '9','8','0','3','1','6','1','2',0,0}; | ||
1307 | u8 test_parttern2[40] = {0}; | 1309 | u8 test_parttern2[40] = {0}; |
1308 | 1310 | ||
1309 | pdc20621_put_to_dimm(host, (void *) test_parttern2, 0x10040, 40); | 1311 | pdc20621_put_to_dimm(host, test_parttern2, 0x10040, 40); |
1310 | pdc20621_put_to_dimm(host, (void *) test_parttern2, 0x40, 40); | 1312 | pdc20621_put_to_dimm(host, test_parttern2, 0x40, 40); |
1311 | 1313 | ||
1312 | pdc20621_put_to_dimm(host, (void *) test_parttern1, 0x10040, 40); | 1314 | pdc20621_put_to_dimm(host, test_parttern1, 0x10040, 40); |
1313 | pdc20621_get_from_dimm(host, (void *) test_parttern2, 0x40, 40); | 1315 | pdc20621_get_from_dimm(host, test_parttern2, 0x40, 40); |
1314 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], | 1316 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
1315 | test_parttern2[1], &(test_parttern2[2])); | 1317 | test_parttern2[1], &(test_parttern2[2])); |
1316 | pdc20621_get_from_dimm(host, (void *) test_parttern2, 0x10040, | 1318 | pdc20621_get_from_dimm(host, test_parttern2, 0x10040, |
1317 | 40); | 1319 | 40); |
1318 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], | 1320 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
1319 | test_parttern2[1], &(test_parttern2[2])); | 1321 | test_parttern2[1], &(test_parttern2[2])); |
1320 | 1322 | ||
1321 | pdc20621_put_to_dimm(host, (void *) test_parttern1, 0x40, 40); | 1323 | pdc20621_put_to_dimm(host, test_parttern1, 0x40, 40); |
1322 | pdc20621_get_from_dimm(host, (void *) test_parttern2, 0x40, 40); | 1324 | pdc20621_get_from_dimm(host, test_parttern2, 0x40, 40); |
1323 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], | 1325 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
1324 | test_parttern2[1], &(test_parttern2[2])); | 1326 | test_parttern2[1], &(test_parttern2[2])); |
1325 | } | 1327 | } |
@@ -1375,7 +1377,8 @@ static void pdc_20621_init(struct ata_host *host) | |||
1375 | readl(mmio + PDC_HDMA_CTLSTAT); /* flush */ | 1377 | readl(mmio + PDC_HDMA_CTLSTAT); /* flush */ |
1376 | } | 1378 | } |
1377 | 1379 | ||
1378 | static int pdc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 1380 | static int pdc_sata_init_one(struct pci_dev *pdev, |
1381 | const struct pci_device_id *ent) | ||
1379 | { | 1382 | { |
1380 | static int printed_version; | 1383 | static int printed_version; |
1381 | const struct ata_port_info *ppi[] = | 1384 | const struct ata_port_info *ppi[] = |
diff --git a/drivers/ata/sata_uli.c b/drivers/ata/sata_uli.c index d394da085ae4..e710e71b7b92 100644 --- a/drivers/ata/sata_uli.c +++ b/drivers/ata/sata_uli.c | |||
@@ -56,9 +56,9 @@ struct uli_priv { | |||
56 | unsigned int scr_cfg_addr[uli_max_ports]; | 56 | unsigned int scr_cfg_addr[uli_max_ports]; |
57 | }; | 57 | }; |
58 | 58 | ||
59 | static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | 59 | static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
60 | static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val); | 60 | static int uli_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); |
61 | static int uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | 61 | static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); |
62 | 62 | ||
63 | static const struct pci_device_id uli_pci_tbl[] = { | 63 | static const struct pci_device_id uli_pci_tbl[] = { |
64 | { PCI_VDEVICE(AL, 0x5289), uli_5289 }, | 64 | { PCI_VDEVICE(AL, 0x5289), uli_5289 }, |
@@ -143,7 +143,7 @@ static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg) | |||
143 | return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg); | 143 | return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg); |
144 | } | 144 | } |
145 | 145 | ||
146 | static u32 uli_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg) | 146 | static u32 uli_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg) |
147 | { | 147 | { |
148 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 148 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
149 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); | 149 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); |
@@ -153,7 +153,7 @@ static u32 uli_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg) | |||
153 | return val; | 153 | return val; |
154 | } | 154 | } |
155 | 155 | ||
156 | static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val) | 156 | static void uli_scr_cfg_write(struct ata_port *ap, unsigned int scr, u32 val) |
157 | { | 157 | { |
158 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 158 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
159 | unsigned int cfg_addr = get_scr_cfg_addr(ap, scr); | 159 | unsigned int cfg_addr = get_scr_cfg_addr(ap, scr); |
@@ -161,7 +161,7 @@ static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val) | |||
161 | pci_write_config_dword(pdev, cfg_addr, val); | 161 | pci_write_config_dword(pdev, cfg_addr, val); |
162 | } | 162 | } |
163 | 163 | ||
164 | static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val) | 164 | static int uli_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) |
165 | { | 165 | { |
166 | if (sc_reg > SCR_CONTROL) | 166 | if (sc_reg > SCR_CONTROL) |
167 | return -EINVAL; | 167 | return -EINVAL; |
@@ -170,16 +170,16 @@ static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val) | |||
170 | return 0; | 170 | return 0; |
171 | } | 171 | } |
172 | 172 | ||
173 | static int uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | 173 | static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) |
174 | { | 174 | { |
175 | if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 | 175 | if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 |
176 | return -EINVAL; | 176 | return -EINVAL; |
177 | 177 | ||
178 | uli_scr_cfg_write(ap, sc_reg, val); | 178 | uli_scr_cfg_write(ap, sc_reg, val); |
179 | return 0; | 179 | return 0; |
180 | } | 180 | } |
181 | 181 | ||
182 | static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 182 | static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
183 | { | 183 | { |
184 | static int printed_version; | 184 | static int printed_version; |
185 | const struct ata_port_info *ppi[] = { &uli_port_info, NULL }; | 185 | const struct ata_port_info *ppi[] = { &uli_port_info, NULL }; |
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c index cc6ee0890f56..3ef072ff319d 100644 --- a/drivers/ata/sata_via.c +++ b/drivers/ata/sata_via.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | 4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | 5 | * Please ALWAYS copy linux-ide@vger.kernel.org |
6 | on emails. | 6 | * on emails. |
7 | * | 7 | * |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | 8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. |
9 | * Copyright 2003-2004 Jeff Garzik | 9 | * Copyright 2003-2004 Jeff Garzik |
@@ -69,7 +69,7 @@ enum { | |||
69 | SATA_EXT_PHY = (1 << 6), /* 0==use PATA, 1==ext phy */ | 69 | SATA_EXT_PHY = (1 << 6), /* 0==use PATA, 1==ext phy */ |
70 | }; | 70 | }; |
71 | 71 | ||
72 | static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | 72 | static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
73 | static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | 73 | static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); |
74 | static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | 74 | static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); |
75 | static void svia_noop_freeze(struct ata_port *ap); | 75 | static void svia_noop_freeze(struct ata_port *ap); |
@@ -372,12 +372,12 @@ static const unsigned int vt6421_bar_sizes[] = { | |||
372 | 16, 16, 16, 16, 32, 128 | 372 | 16, 16, 16, 16, 32, 128 |
373 | }; | 373 | }; |
374 | 374 | ||
375 | static void __iomem * svia_scr_addr(void __iomem *addr, unsigned int port) | 375 | static void __iomem *svia_scr_addr(void __iomem *addr, unsigned int port) |
376 | { | 376 | { |
377 | return addr + (port * 128); | 377 | return addr + (port * 128); |
378 | } | 378 | } |
379 | 379 | ||
380 | static void __iomem * vt6421_scr_addr(void __iomem *addr, unsigned int port) | 380 | static void __iomem *vt6421_scr_addr(void __iomem *addr, unsigned int port) |
381 | { | 381 | { |
382 | return addr + (port * 64); | 382 | return addr + (port * 64); |
383 | } | 383 | } |
@@ -472,7 +472,7 @@ static void svia_configure(struct pci_dev *pdev) | |||
472 | if ((tmp8 & ALL_PORTS) != ALL_PORTS) { | 472 | if ((tmp8 & ALL_PORTS) != ALL_PORTS) { |
473 | dev_printk(KERN_DEBUG, &pdev->dev, | 473 | dev_printk(KERN_DEBUG, &pdev->dev, |
474 | "enabling SATA channels (0x%x)\n", | 474 | "enabling SATA channels (0x%x)\n", |
475 | (int) tmp8); | 475 | (int) tmp8); |
476 | tmp8 |= ALL_PORTS; | 476 | tmp8 |= ALL_PORTS; |
477 | pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8); | 477 | pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8); |
478 | } | 478 | } |
@@ -482,7 +482,7 @@ static void svia_configure(struct pci_dev *pdev) | |||
482 | if ((tmp8 & ALL_PORTS) != ALL_PORTS) { | 482 | if ((tmp8 & ALL_PORTS) != ALL_PORTS) { |
483 | dev_printk(KERN_DEBUG, &pdev->dev, | 483 | dev_printk(KERN_DEBUG, &pdev->dev, |
484 | "enabling SATA channel interrupts (0x%x)\n", | 484 | "enabling SATA channel interrupts (0x%x)\n", |
485 | (int) tmp8); | 485 | (int) tmp8); |
486 | tmp8 |= ALL_PORTS; | 486 | tmp8 |= ALL_PORTS; |
487 | pci_write_config_byte(pdev, SATA_INT_GATE, tmp8); | 487 | pci_write_config_byte(pdev, SATA_INT_GATE, tmp8); |
488 | } | 488 | } |
@@ -492,13 +492,13 @@ static void svia_configure(struct pci_dev *pdev) | |||
492 | if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) { | 492 | if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) { |
493 | dev_printk(KERN_DEBUG, &pdev->dev, | 493 | dev_printk(KERN_DEBUG, &pdev->dev, |
494 | "enabling SATA channel native mode (0x%x)\n", | 494 | "enabling SATA channel native mode (0x%x)\n", |
495 | (int) tmp8); | 495 | (int) tmp8); |
496 | tmp8 |= NATIVE_MODE_ALL; | 496 | tmp8 |= NATIVE_MODE_ALL; |
497 | pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8); | 497 | pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8); |
498 | } | 498 | } |
499 | } | 499 | } |
500 | 500 | ||
501 | static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 501 | static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
502 | { | 502 | { |
503 | static int printed_version; | 503 | static int printed_version; |
504 | unsigned int i; | 504 | unsigned int i; |
@@ -525,8 +525,8 @@ static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
525 | dev_printk(KERN_ERR, &pdev->dev, | 525 | dev_printk(KERN_ERR, &pdev->dev, |
526 | "invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n", | 526 | "invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n", |
527 | i, | 527 | i, |
528 | (unsigned long long)pci_resource_start(pdev, i), | 528 | (unsigned long long)pci_resource_start(pdev, i), |
529 | (unsigned long long)pci_resource_len(pdev, i)); | 529 | (unsigned long long)pci_resource_len(pdev, i)); |
530 | return -ENODEV; | 530 | return -ENODEV; |
531 | } | 531 | } |
532 | 532 | ||
diff --git a/drivers/ata/sata_vsc.c b/drivers/ata/sata_vsc.c index 0d9be1684873..95ae3ed24a9d 100644 --- a/drivers/ata/sata_vsc.c +++ b/drivers/ata/sata_vsc.c | |||
@@ -162,7 +162,8 @@ static void vsc_sata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) | |||
162 | /* | 162 | /* |
163 | * The only thing the ctl register is used for is SRST. | 163 | * The only thing the ctl register is used for is SRST. |
164 | * That is not enabled or disabled via tf_load. | 164 | * That is not enabled or disabled via tf_load. |
165 | * However, if ATA_NIEN is changed, then we need to change the interrupt register. | 165 | * However, if ATA_NIEN is changed, then we need to change |
166 | * the interrupt register. | ||
166 | */ | 167 | */ |
167 | if ((tf->ctl & ATA_NIEN) != (ap->last_ctl & ATA_NIEN)) { | 168 | if ((tf->ctl & ATA_NIEN) != (ap->last_ctl & ATA_NIEN)) { |
168 | ap->last_ctl = tf->ctl; | 169 | ap->last_ctl = tf->ctl; |
@@ -219,7 +220,7 @@ static void vsc_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) | |||
219 | tf->hob_lbal = lbal >> 8; | 220 | tf->hob_lbal = lbal >> 8; |
220 | tf->hob_lbam = lbam >> 8; | 221 | tf->hob_lbam = lbam >> 8; |
221 | tf->hob_lbah = lbah >> 8; | 222 | tf->hob_lbah = lbah >> 8; |
222 | } | 223 | } |
223 | } | 224 | } |
224 | 225 | ||
225 | static inline void vsc_error_intr(u8 port_status, struct ata_port *ap) | 226 | static inline void vsc_error_intr(u8 port_status, struct ata_port *ap) |
@@ -256,9 +257,10 @@ static void vsc_port_intr(u8 port_status, struct ata_port *ap) | |||
256 | /* | 257 | /* |
257 | * vsc_sata_interrupt | 258 | * vsc_sata_interrupt |
258 | * | 259 | * |
259 | * Read the interrupt register and process for the devices that have them pending. | 260 | * Read the interrupt register and process for the devices that have |
261 | * them pending. | ||
260 | */ | 262 | */ |
261 | static irqreturn_t vsc_sata_interrupt (int irq, void *dev_instance) | 263 | static irqreturn_t vsc_sata_interrupt(int irq, void *dev_instance) |
262 | { | 264 | { |
263 | struct ata_host *host = dev_instance; | 265 | struct ata_host *host = dev_instance; |
264 | unsigned int i; | 266 | unsigned int i; |
@@ -287,7 +289,7 @@ static irqreturn_t vsc_sata_interrupt (int irq, void *dev_instance) | |||
287 | handled++; | 289 | handled++; |
288 | } else | 290 | } else |
289 | dev_printk(KERN_ERR, host->dev, | 291 | dev_printk(KERN_ERR, host->dev, |
290 | ": interrupt from disabled port %d\n", i); | 292 | "interrupt from disabled port %d\n", i); |
291 | } | 293 | } |
292 | } | 294 | } |
293 | 295 | ||
@@ -363,7 +365,8 @@ static void __devinit vsc_sata_setup_port(struct ata_ioports *port, | |||
363 | } | 365 | } |
364 | 366 | ||
365 | 367 | ||
366 | static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | 368 | static int __devinit vsc_sata_init_one(struct pci_dev *pdev, |
369 | const struct pci_device_id *ent) | ||
367 | { | 370 | { |
368 | static const struct ata_port_info pi = { | 371 | static const struct ata_port_info pi = { |
369 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | | 372 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | |