diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/serial/mpc52xx_uart.c | 116 |
1 files changed, 57 insertions, 59 deletions
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c index 4f80c5b4a753..8e24133166af 100644 --- a/drivers/serial/mpc52xx_uart.c +++ b/drivers/serial/mpc52xx_uart.c | |||
@@ -1,6 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * drivers/serial/mpc52xx_uart.c | ||
3 | * | ||
4 | * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs. | 2 | * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs. |
5 | * | 3 | * |
6 | * FIXME According to the usermanual the status bits in the status register | 4 | * FIXME According to the usermanual the status bits in the status register |
@@ -14,18 +12,18 @@ | |||
14 | * | 12 | * |
15 | * | 13 | * |
16 | * Maintainer : Sylvain Munaut <tnt@246tNt.com> | 14 | * Maintainer : Sylvain Munaut <tnt@246tNt.com> |
17 | * | 15 | * |
18 | * Some of the code has been inspired/copied from the 2.4 code written | 16 | * Some of the code has been inspired/copied from the 2.4 code written |
19 | * by Dale Farnsworth <dfarnsworth@mvista.com>. | 17 | * by Dale Farnsworth <dfarnsworth@mvista.com>. |
20 | * | 18 | * |
21 | * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com> | 19 | * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com> |
22 | * Copyright (C) 2003 MontaVista, Software, Inc. | 20 | * Copyright (C) 2003 MontaVista, Software, Inc. |
23 | * | 21 | * |
24 | * This file is licensed under the terms of the GNU General Public License | 22 | * This file is licensed under the terms of the GNU General Public License |
25 | * version 2. This program is licensed "as is" without any warranty of any | 23 | * version 2. This program is licensed "as is" without any warranty of any |
26 | * kind, whether express or implied. | 24 | * kind, whether express or implied. |
27 | */ | 25 | */ |
28 | 26 | ||
29 | /* Platform device Usage : | 27 | /* Platform device Usage : |
30 | * | 28 | * |
31 | * Since PSCs can have multiple function, the correct driver for each one | 29 | * Since PSCs can have multiple function, the correct driver for each one |
@@ -101,27 +99,27 @@ static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id); | |||
101 | /* UART operations */ | 99 | /* UART operations */ |
102 | /* ======================================================================== */ | 100 | /* ======================================================================== */ |
103 | 101 | ||
104 | static unsigned int | 102 | static unsigned int |
105 | mpc52xx_uart_tx_empty(struct uart_port *port) | 103 | mpc52xx_uart_tx_empty(struct uart_port *port) |
106 | { | 104 | { |
107 | int status = in_be16(&PSC(port)->mpc52xx_psc_status); | 105 | int status = in_be16(&PSC(port)->mpc52xx_psc_status); |
108 | return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0; | 106 | return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0; |
109 | } | 107 | } |
110 | 108 | ||
111 | static void | 109 | static void |
112 | mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) | 110 | mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) |
113 | { | 111 | { |
114 | /* Not implemented */ | 112 | /* Not implemented */ |
115 | } | 113 | } |
116 | 114 | ||
117 | static unsigned int | 115 | static unsigned int |
118 | mpc52xx_uart_get_mctrl(struct uart_port *port) | 116 | mpc52xx_uart_get_mctrl(struct uart_port *port) |
119 | { | 117 | { |
120 | /* Not implemented */ | 118 | /* Not implemented */ |
121 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | 119 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; |
122 | } | 120 | } |
123 | 121 | ||
124 | static void | 122 | static void |
125 | mpc52xx_uart_stop_tx(struct uart_port *port) | 123 | mpc52xx_uart_stop_tx(struct uart_port *port) |
126 | { | 124 | { |
127 | /* port->lock taken by caller */ | 125 | /* port->lock taken by caller */ |
@@ -129,7 +127,7 @@ mpc52xx_uart_stop_tx(struct uart_port *port) | |||
129 | out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask); | 127 | out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask); |
130 | } | 128 | } |
131 | 129 | ||
132 | static void | 130 | static void |
133 | mpc52xx_uart_start_tx(struct uart_port *port) | 131 | mpc52xx_uart_start_tx(struct uart_port *port) |
134 | { | 132 | { |
135 | /* port->lock taken by caller */ | 133 | /* port->lock taken by caller */ |
@@ -137,12 +135,12 @@ mpc52xx_uart_start_tx(struct uart_port *port) | |||
137 | out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask); | 135 | out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask); |
138 | } | 136 | } |
139 | 137 | ||
140 | static void | 138 | static void |
141 | mpc52xx_uart_send_xchar(struct uart_port *port, char ch) | 139 | mpc52xx_uart_send_xchar(struct uart_port *port, char ch) |
142 | { | 140 | { |
143 | unsigned long flags; | 141 | unsigned long flags; |
144 | spin_lock_irqsave(&port->lock, flags); | 142 | spin_lock_irqsave(&port->lock, flags); |
145 | 143 | ||
146 | port->x_char = ch; | 144 | port->x_char = ch; |
147 | if (ch) { | 145 | if (ch) { |
148 | /* Make sure tx interrupts are on */ | 146 | /* Make sure tx interrupts are on */ |
@@ -150,7 +148,7 @@ mpc52xx_uart_send_xchar(struct uart_port *port, char ch) | |||
150 | port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY; | 148 | port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY; |
151 | out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask); | 149 | out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask); |
152 | } | 150 | } |
153 | 151 | ||
154 | spin_unlock_irqrestore(&port->lock, flags); | 152 | spin_unlock_irqrestore(&port->lock, flags); |
155 | } | 153 | } |
156 | 154 | ||
@@ -178,7 +176,7 @@ mpc52xx_uart_break_ctl(struct uart_port *port, int ctl) | |||
178 | out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK); | 176 | out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK); |
179 | else | 177 | else |
180 | out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK); | 178 | out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK); |
181 | 179 | ||
182 | spin_unlock_irqrestore(&port->lock, flags); | 180 | spin_unlock_irqrestore(&port->lock, flags); |
183 | } | 181 | } |
184 | 182 | ||
@@ -197,11 +195,11 @@ mpc52xx_uart_startup(struct uart_port *port) | |||
197 | /* Reset/activate the port, clear and enable interrupts */ | 195 | /* Reset/activate the port, clear and enable interrupts */ |
198 | out_8(&psc->command,MPC52xx_PSC_RST_RX); | 196 | out_8(&psc->command,MPC52xx_PSC_RST_RX); |
199 | out_8(&psc->command,MPC52xx_PSC_RST_TX); | 197 | out_8(&psc->command,MPC52xx_PSC_RST_TX); |
200 | 198 | ||
201 | out_be32(&psc->sicr,0); /* UART mode DCD ignored */ | 199 | out_be32(&psc->sicr,0); /* UART mode DCD ignored */ |
202 | 200 | ||
203 | out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */ | 201 | out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */ |
204 | 202 | ||
205 | out_8(&psc->rfcntl, 0x00); | 203 | out_8(&psc->rfcntl, 0x00); |
206 | out_be16(&psc->rfalarm, 0x1ff); | 204 | out_be16(&psc->rfalarm, 0x1ff); |
207 | out_8(&psc->tfcntl, 0x07); | 205 | out_8(&psc->tfcntl, 0x07); |
@@ -209,10 +207,10 @@ mpc52xx_uart_startup(struct uart_port *port) | |||
209 | 207 | ||
210 | port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY; | 208 | port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY; |
211 | out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask); | 209 | out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask); |
212 | 210 | ||
213 | out_8(&psc->command,MPC52xx_PSC_TX_ENABLE); | 211 | out_8(&psc->command,MPC52xx_PSC_TX_ENABLE); |
214 | out_8(&psc->command,MPC52xx_PSC_RX_ENABLE); | 212 | out_8(&psc->command,MPC52xx_PSC_RX_ENABLE); |
215 | 213 | ||
216 | return 0; | 214 | return 0; |
217 | } | 215 | } |
218 | 216 | ||
@@ -220,19 +218,19 @@ static void | |||
220 | mpc52xx_uart_shutdown(struct uart_port *port) | 218 | mpc52xx_uart_shutdown(struct uart_port *port) |
221 | { | 219 | { |
222 | struct mpc52xx_psc __iomem *psc = PSC(port); | 220 | struct mpc52xx_psc __iomem *psc = PSC(port); |
223 | 221 | ||
224 | /* Shut down the port, interrupt and all */ | 222 | /* Shut down the port, interrupt and all */ |
225 | out_8(&psc->command,MPC52xx_PSC_RST_RX); | 223 | out_8(&psc->command,MPC52xx_PSC_RST_RX); |
226 | out_8(&psc->command,MPC52xx_PSC_RST_TX); | 224 | out_8(&psc->command,MPC52xx_PSC_RST_TX); |
227 | 225 | ||
228 | port->read_status_mask = 0; | 226 | port->read_status_mask = 0; |
229 | out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask); | 227 | out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask); |
230 | 228 | ||
231 | /* Release interrupt */ | 229 | /* Release interrupt */ |
232 | free_irq(port->irq, port); | 230 | free_irq(port->irq, port); |
233 | } | 231 | } |
234 | 232 | ||
235 | static void | 233 | static void |
236 | mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new, | 234 | mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new, |
237 | struct termios *old) | 235 | struct termios *old) |
238 | { | 236 | { |
@@ -241,10 +239,10 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new, | |||
241 | unsigned char mr1, mr2; | 239 | unsigned char mr1, mr2; |
242 | unsigned short ctr; | 240 | unsigned short ctr; |
243 | unsigned int j, baud, quot; | 241 | unsigned int j, baud, quot; |
244 | 242 | ||
245 | /* Prepare what we're gonna write */ | 243 | /* Prepare what we're gonna write */ |
246 | mr1 = 0; | 244 | mr1 = 0; |
247 | 245 | ||
248 | switch (new->c_cflag & CSIZE) { | 246 | switch (new->c_cflag & CSIZE) { |
249 | case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS; | 247 | case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS; |
250 | break; | 248 | break; |
@@ -261,8 +259,8 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new, | |||
261 | MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN; | 259 | MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN; |
262 | } else | 260 | } else |
263 | mr1 |= MPC52xx_PSC_MODE_PARNONE; | 261 | mr1 |= MPC52xx_PSC_MODE_PARNONE; |
264 | 262 | ||
265 | 263 | ||
266 | mr2 = 0; | 264 | mr2 = 0; |
267 | 265 | ||
268 | if (new->c_cflag & CSTOPB) | 266 | if (new->c_cflag & CSTOPB) |
@@ -276,7 +274,7 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new, | |||
276 | baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16); | 274 | baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16); |
277 | quot = uart_get_divisor(port, baud); | 275 | quot = uart_get_divisor(port, baud); |
278 | ctr = quot & 0xffff; | 276 | ctr = quot & 0xffff; |
279 | 277 | ||
280 | /* Get the lock */ | 278 | /* Get the lock */ |
281 | spin_lock_irqsave(&port->lock, flags); | 279 | spin_lock_irqsave(&port->lock, flags); |
282 | 280 | ||
@@ -290,14 +288,14 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new, | |||
290 | * boot for the console, all stuff is not yet ready to receive at that | 288 | * boot for the console, all stuff is not yet ready to receive at that |
291 | * time and that just makes the kernel oops */ | 289 | * time and that just makes the kernel oops */ |
292 | /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */ | 290 | /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */ |
293 | while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) && | 291 | while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) && |
294 | --j) | 292 | --j) |
295 | udelay(1); | 293 | udelay(1); |
296 | 294 | ||
297 | if (!j) | 295 | if (!j) |
298 | printk( KERN_ERR "mpc52xx_uart.c: " | 296 | printk( KERN_ERR "mpc52xx_uart.c: " |
299 | "Unable to flush RX & TX fifos in-time in set_termios." | 297 | "Unable to flush RX & TX fifos in-time in set_termios." |
300 | "Some chars may have been lost.\n" ); | 298 | "Some chars may have been lost.\n" ); |
301 | 299 | ||
302 | /* Reset the TX & RX */ | 300 | /* Reset the TX & RX */ |
303 | out_8(&psc->command,MPC52xx_PSC_RST_RX); | 301 | out_8(&psc->command,MPC52xx_PSC_RST_RX); |
@@ -309,7 +307,7 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new, | |||
309 | out_8(&psc->mode,mr2); | 307 | out_8(&psc->mode,mr2); |
310 | out_8(&psc->ctur,ctr >> 8); | 308 | out_8(&psc->ctur,ctr >> 8); |
311 | out_8(&psc->ctlr,ctr & 0xff); | 309 | out_8(&psc->ctlr,ctr & 0xff); |
312 | 310 | ||
313 | /* Reenable TX & RX */ | 311 | /* Reenable TX & RX */ |
314 | out_8(&psc->command,MPC52xx_PSC_TX_ENABLE); | 312 | out_8(&psc->command,MPC52xx_PSC_TX_ENABLE); |
315 | out_8(&psc->command,MPC52xx_PSC_RX_ENABLE); | 313 | out_8(&psc->command,MPC52xx_PSC_RX_ENABLE); |
@@ -373,7 +371,7 @@ mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser) | |||
373 | 371 | ||
374 | if ( (ser->irq != port->irq) || | 372 | if ( (ser->irq != port->irq) || |
375 | (ser->io_type != SERIAL_IO_MEM) || | 373 | (ser->io_type != SERIAL_IO_MEM) || |
376 | (ser->baud_base != port->uartclk) || | 374 | (ser->baud_base != port->uartclk) || |
377 | (ser->iomem_base != (void*)port->mapbase) || | 375 | (ser->iomem_base != (void*)port->mapbase) || |
378 | (ser->hub6 != 0 ) ) | 376 | (ser->hub6 != 0 ) ) |
379 | return -EINVAL; | 377 | return -EINVAL; |
@@ -404,11 +402,11 @@ static struct uart_ops mpc52xx_uart_ops = { | |||
404 | .verify_port = mpc52xx_uart_verify_port | 402 | .verify_port = mpc52xx_uart_verify_port |
405 | }; | 403 | }; |
406 | 404 | ||
407 | 405 | ||
408 | /* ======================================================================== */ | 406 | /* ======================================================================== */ |
409 | /* Interrupt handling */ | 407 | /* Interrupt handling */ |
410 | /* ======================================================================== */ | 408 | /* ======================================================================== */ |
411 | 409 | ||
412 | static inline int | 410 | static inline int |
413 | mpc52xx_uart_int_rx_chars(struct uart_port *port) | 411 | mpc52xx_uart_int_rx_chars(struct uart_port *port) |
414 | { | 412 | { |
@@ -435,11 +433,11 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port) | |||
435 | 433 | ||
436 | flag = TTY_NORMAL; | 434 | flag = TTY_NORMAL; |
437 | port->icount.rx++; | 435 | port->icount.rx++; |
438 | 436 | ||
439 | if ( status & (MPC52xx_PSC_SR_PE | | 437 | if ( status & (MPC52xx_PSC_SR_PE | |
440 | MPC52xx_PSC_SR_FE | | 438 | MPC52xx_PSC_SR_FE | |
441 | MPC52xx_PSC_SR_RB) ) { | 439 | MPC52xx_PSC_SR_RB) ) { |
442 | 440 | ||
443 | if (status & MPC52xx_PSC_SR_RB) { | 441 | if (status & MPC52xx_PSC_SR_RB) { |
444 | flag = TTY_BREAK; | 442 | flag = TTY_BREAK; |
445 | uart_handle_break(port); | 443 | uart_handle_break(port); |
@@ -464,7 +462,7 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port) | |||
464 | } | 462 | } |
465 | 463 | ||
466 | tty_flip_buffer_push(tty); | 464 | tty_flip_buffer_push(tty); |
467 | 465 | ||
468 | return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY; | 466 | return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY; |
469 | } | 467 | } |
470 | 468 | ||
@@ -509,25 +507,25 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port) | |||
509 | return 1; | 507 | return 1; |
510 | } | 508 | } |
511 | 509 | ||
512 | static irqreturn_t | 510 | static irqreturn_t |
513 | mpc52xx_uart_int(int irq, void *dev_id) | 511 | mpc52xx_uart_int(int irq, void *dev_id) |
514 | { | 512 | { |
515 | struct uart_port *port = dev_id; | 513 | struct uart_port *port = dev_id; |
516 | unsigned long pass = ISR_PASS_LIMIT; | 514 | unsigned long pass = ISR_PASS_LIMIT; |
517 | unsigned int keepgoing; | 515 | unsigned int keepgoing; |
518 | unsigned short status; | 516 | unsigned short status; |
519 | 517 | ||
520 | spin_lock(&port->lock); | 518 | spin_lock(&port->lock); |
521 | 519 | ||
522 | /* While we have stuff to do, we continue */ | 520 | /* While we have stuff to do, we continue */ |
523 | do { | 521 | do { |
524 | /* If we don't find anything to do, we stop */ | 522 | /* If we don't find anything to do, we stop */ |
525 | keepgoing = 0; | 523 | keepgoing = 0; |
526 | 524 | ||
527 | /* Read status */ | 525 | /* Read status */ |
528 | status = in_be16(&PSC(port)->mpc52xx_psc_isr); | 526 | status = in_be16(&PSC(port)->mpc52xx_psc_isr); |
529 | status &= port->read_status_mask; | 527 | status &= port->read_status_mask; |
530 | 528 | ||
531 | /* Do we need to receive chars ? */ | 529 | /* Do we need to receive chars ? */ |
532 | /* For this RX interrupts must be on and some chars waiting */ | 530 | /* For this RX interrupts must be on and some chars waiting */ |
533 | if ( status & MPC52xx_PSC_IMR_RXRDY ) | 531 | if ( status & MPC52xx_PSC_IMR_RXRDY ) |
@@ -537,15 +535,15 @@ mpc52xx_uart_int(int irq, void *dev_id) | |||
537 | /* For this, TX must be ready and TX interrupt enabled */ | 535 | /* For this, TX must be ready and TX interrupt enabled */ |
538 | if ( status & MPC52xx_PSC_IMR_TXRDY ) | 536 | if ( status & MPC52xx_PSC_IMR_TXRDY ) |
539 | keepgoing |= mpc52xx_uart_int_tx_chars(port); | 537 | keepgoing |= mpc52xx_uart_int_tx_chars(port); |
540 | 538 | ||
541 | /* Limit number of iteration */ | 539 | /* Limit number of iteration */ |
542 | if ( !(--pass) ) | 540 | if ( !(--pass) ) |
543 | keepgoing = 0; | 541 | keepgoing = 0; |
544 | 542 | ||
545 | } while (keepgoing); | 543 | } while (keepgoing); |
546 | 544 | ||
547 | spin_unlock(&port->lock); | 545 | spin_unlock(&port->lock); |
548 | 546 | ||
549 | return IRQ_HANDLED; | 547 | return IRQ_HANDLED; |
550 | } | 548 | } |
551 | 549 | ||
@@ -566,7 +564,7 @@ mpc52xx_console_get_options(struct uart_port *port, | |||
566 | /* Read the mode registers */ | 564 | /* Read the mode registers */ |
567 | out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1); | 565 | out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1); |
568 | mr1 = in_8(&psc->mode); | 566 | mr1 = in_8(&psc->mode); |
569 | 567 | ||
570 | /* CT{U,L}R are write-only ! */ | 568 | /* CT{U,L}R are write-only ! */ |
571 | *baud = __res.bi_baudrate ? | 569 | *baud = __res.bi_baudrate ? |
572 | __res.bi_baudrate : CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD; | 570 | __res.bi_baudrate : CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD; |
@@ -579,26 +577,26 @@ mpc52xx_console_get_options(struct uart_port *port, | |||
579 | case MPC52xx_PSC_MODE_8_BITS: | 577 | case MPC52xx_PSC_MODE_8_BITS: |
580 | default: *bits = 8; | 578 | default: *bits = 8; |
581 | } | 579 | } |
582 | 580 | ||
583 | if (mr1 & MPC52xx_PSC_MODE_PARNONE) | 581 | if (mr1 & MPC52xx_PSC_MODE_PARNONE) |
584 | *parity = 'n'; | 582 | *parity = 'n'; |
585 | else | 583 | else |
586 | *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e'; | 584 | *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e'; |
587 | } | 585 | } |
588 | 586 | ||
589 | static void | 587 | static void |
590 | mpc52xx_console_write(struct console *co, const char *s, unsigned int count) | 588 | mpc52xx_console_write(struct console *co, const char *s, unsigned int count) |
591 | { | 589 | { |
592 | struct uart_port *port = &mpc52xx_uart_ports[co->index]; | 590 | struct uart_port *port = &mpc52xx_uart_ports[co->index]; |
593 | struct mpc52xx_psc __iomem *psc = PSC(port); | 591 | struct mpc52xx_psc __iomem *psc = PSC(port); |
594 | unsigned int i, j; | 592 | unsigned int i, j; |
595 | 593 | ||
596 | /* Disable interrupts */ | 594 | /* Disable interrupts */ |
597 | out_be16(&psc->mpc52xx_psc_imr, 0); | 595 | out_be16(&psc->mpc52xx_psc_imr, 0); |
598 | 596 | ||
599 | /* Wait the TX buffer to be empty */ | 597 | /* Wait the TX buffer to be empty */ |
600 | j = 5000000; /* Maximum wait */ | 598 | j = 5000000; /* Maximum wait */ |
601 | while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) && | 599 | while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) && |
602 | --j) | 600 | --j) |
603 | udelay(1); | 601 | udelay(1); |
604 | 602 | ||
@@ -607,13 +605,13 @@ mpc52xx_console_write(struct console *co, const char *s, unsigned int count) | |||
607 | /* Line return handling */ | 605 | /* Line return handling */ |
608 | if (*s == '\n') | 606 | if (*s == '\n') |
609 | out_8(&psc->mpc52xx_psc_buffer_8, '\r'); | 607 | out_8(&psc->mpc52xx_psc_buffer_8, '\r'); |
610 | 608 | ||
611 | /* Send the char */ | 609 | /* Send the char */ |
612 | out_8(&psc->mpc52xx_psc_buffer_8, *s); | 610 | out_8(&psc->mpc52xx_psc_buffer_8, *s); |
613 | 611 | ||
614 | /* Wait the TX buffer to be empty */ | 612 | /* Wait the TX buffer to be empty */ |
615 | j = 20000; /* Maximum wait */ | 613 | j = 20000; /* Maximum wait */ |
616 | while (!(in_be16(&psc->mpc52xx_psc_status) & | 614 | while (!(in_be16(&psc->mpc52xx_psc_status) & |
617 | MPC52xx_PSC_SR_TXEMP) && --j) | 615 | MPC52xx_PSC_SR_TXEMP) && --j) |
618 | udelay(1); | 616 | udelay(1); |
619 | } | 617 | } |
@@ -634,7 +632,7 @@ mpc52xx_console_setup(struct console *co, char *options) | |||
634 | 632 | ||
635 | if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM) | 633 | if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM) |
636 | return -EINVAL; | 634 | return -EINVAL; |
637 | 635 | ||
638 | /* Basic port init. Needed since we use some uart_??? func before | 636 | /* Basic port init. Needed since we use some uart_??? func before |
639 | * real init for early access */ | 637 | * real init for early access */ |
640 | spin_lock_init(&port->lock); | 638 | spin_lock_init(&port->lock); |
@@ -669,8 +667,8 @@ static struct console mpc52xx_console = { | |||
669 | .data = &mpc52xx_uart_driver, | 667 | .data = &mpc52xx_uart_driver, |
670 | }; | 668 | }; |
671 | 669 | ||
672 | 670 | ||
673 | static int __init | 671 | static int __init |
674 | mpc52xx_console_init(void) | 672 | mpc52xx_console_init(void) |
675 | { | 673 | { |
676 | register_console(&mpc52xx_console); | 674 | register_console(&mpc52xx_console); |
@@ -771,7 +769,7 @@ mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state) | |||
771 | { | 769 | { |
772 | struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev); | 770 | struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev); |
773 | 771 | ||
774 | if (sport) | 772 | if (port) |
775 | uart_suspend_port(&mpc52xx_uart_driver, port); | 773 | uart_suspend_port(&mpc52xx_uart_driver, port); |
776 | 774 | ||
777 | return 0; | 775 | return 0; |