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-rw-r--r--drivers/accessibility/Kconfig12
-rw-r--r--drivers/ata/Kconfig13
-rw-r--r--drivers/ata/Makefile1
-rw-r--r--drivers/ata/ahci.c4
-rw-r--r--drivers/ata/ata_generic.c6
-rw-r--r--drivers/ata/ata_piix.c25
-rw-r--r--drivers/ata/libata-core.c1
-rw-r--r--drivers/ata/libata-eh.c2
-rw-r--r--drivers/ata/libata-sff.c6
-rw-r--r--drivers/ata/pata_acpi.c6
-rw-r--r--drivers/ata/pata_sch.c206
-rw-r--r--drivers/ata/sata_inic162x.c646
-rw-r--r--drivers/ata/sata_mv.c690
-rw-r--r--drivers/base/sys.c3
-rw-r--r--drivers/block/aoe/aoecmd.c10
-rw-r--r--drivers/char/serial167.c2
-rw-r--r--drivers/char/sx.c9
-rw-r--r--drivers/char/vt.c6
-rw-r--r--drivers/edac/edac_core.h2
-rw-r--r--drivers/edac/edac_device.c6
-rw-r--r--drivers/edac/edac_mc.c6
-rw-r--r--drivers/edac/edac_pci.c6
-rw-r--r--drivers/ide/ide-probe.c12
-rw-r--r--drivers/ide/legacy/falconide.c2
-rw-r--r--drivers/infiniband/hw/cxgb3/cxio_hal.c103
-rw-r--r--drivers/infiniband/hw/cxgb3/cxio_hal.h12
-rw-r--r--drivers/infiniband/hw/cxgb3/cxio_resource.c36
-rw-r--r--drivers/infiniband/hw/cxgb3/iwch_cm.c6
-rw-r--r--drivers/infiniband/hw/cxgb3/iwch_mem.c75
-rw-r--r--drivers/infiniband/hw/cxgb3/iwch_provider.c68
-rw-r--r--drivers/infiniband/hw/cxgb3/iwch_provider.h8
-rw-r--r--drivers/infiniband/hw/cxgb3/iwch_qp.c13
-rw-r--r--drivers/infiniband/hw/ehca/ehca_classes.h2
-rw-r--r--drivers/infiniband/hw/ehca/ehca_hca.c7
-rw-r--r--drivers/infiniband/hw/ehca/ehca_irq.c4
-rw-r--r--drivers/infiniband/hw/ehca/ehca_qp.c5
-rw-r--r--drivers/infiniband/hw/ipath/ipath_driver.c138
-rw-r--r--drivers/infiniband/hw/ipath/ipath_file_ops.c72
-rw-r--r--drivers/infiniband/hw/ipath/ipath_iba7220.c26
-rw-r--r--drivers/infiniband/hw/ipath/ipath_init_chip.c95
-rw-r--r--drivers/infiniband/hw/ipath/ipath_intr.c80
-rw-r--r--drivers/infiniband/hw/ipath/ipath_kernel.h8
-rw-r--r--drivers/infiniband/hw/ipath/ipath_rc.c6
-rw-r--r--drivers/infiniband/hw/ipath/ipath_ruc.c7
-rw-r--r--drivers/infiniband/hw/ipath/ipath_sdma.c44
-rw-r--r--drivers/infiniband/hw/ipath/ipath_verbs.c2
-rw-r--r--drivers/infiniband/hw/mlx4/cq.c4
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib.h2
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib_ib.c47
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib_verbs.c3
-rw-r--r--drivers/input/misc/Kconfig2
-rw-r--r--drivers/input/serio/hp_sdc.c1
-rw-r--r--drivers/input/serio/i8042-io.h2
-rw-r--r--drivers/macintosh/adb.c30
-rw-r--r--drivers/macintosh/therm_pm72.c31
-rw-r--r--drivers/macintosh/windfarm_smu_sat.c10
-rw-r--r--drivers/md/raid10.c2
-rw-r--r--drivers/media/Makefile2
-rw-r--r--drivers/media/video/cx18/cx18-driver.c2
-rw-r--r--drivers/media/video/saa7134/saa7134-video.c2
-rw-r--r--drivers/misc/kgdbts.c75
-rw-r--r--drivers/mmc/host/mmci.c14
-rw-r--r--drivers/mtd/maps/Kconfig9
-rw-r--r--drivers/mtd/maps/Makefile1
-rw-r--r--drivers/mtd/maps/mpc1211.c80
-rw-r--r--drivers/net/3c59x.c73
-rw-r--r--drivers/net/Kconfig14
-rw-r--r--drivers/net/appletalk/cops.c16
-rw-r--r--drivers/net/bonding/bond_main.c24
-rw-r--r--drivers/net/bonding/bond_sysfs.c16
-rw-r--r--drivers/net/cxgb3/cxgb3_main.c4
-rw-r--r--drivers/net/e1000e/defines.h10
-rw-r--r--drivers/net/e1000e/e1000.h7
-rw-r--r--drivers/net/e1000e/ethtool.c45
-rw-r--r--drivers/net/e1000e/hw.h22
-rw-r--r--drivers/net/e1000e/ich8lan.c83
-rw-r--r--drivers/net/e1000e/netdev.c330
-rw-r--r--drivers/net/e1000e/phy.c278
-rw-r--r--drivers/net/eexpress.c11
-rw-r--r--drivers/net/fs_enet/mii-fec.c3
-rw-r--r--drivers/net/gianfar.c5
-rw-r--r--drivers/net/gianfar.h3
-rw-r--r--drivers/net/gianfar_sysfs.c10
-rw-r--r--drivers/net/irda/nsc-ircc.c6
-rw-r--r--drivers/net/irda/smsc-ircc2.c5
-rw-r--r--drivers/net/macvlan.c2
-rw-r--r--drivers/net/mlx4/mr.c2
-rw-r--r--drivers/net/mv643xx_eth.c160
-rw-r--r--drivers/net/niu.c11
-rw-r--r--drivers/net/pcnet32.c61
-rw-r--r--drivers/net/phy/phy.c2
-rw-r--r--drivers/net/tulip/uli526x.c38
-rw-r--r--drivers/net/ucc_geth.c278
-rw-r--r--drivers/net/ucc_geth.h48
-rw-r--r--drivers/net/ucc_geth_ethtool.c6
-rw-r--r--drivers/net/ucc_geth_mii.c4
-rw-r--r--drivers/net/usb/asix.c4
-rw-r--r--drivers/net/wan/lapbether.c1
-rw-r--r--drivers/net/wireless/iwlwifi/Kconfig3
-rw-r--r--drivers/pci/probe.c33
-rw-r--r--drivers/rtc/rtc-ds1511.c4
-rw-r--r--drivers/rtc/rtc-sh.c14
-rw-r--r--drivers/s390/char/tty3270.c15
-rw-r--r--drivers/s390/cio/blacklist.c323
-rw-r--r--drivers/s390/cio/cio.c39
-rw-r--r--drivers/s390/cio/cio.h2
-rw-r--r--drivers/s390/cio/cio_debug.h6
-rw-r--r--drivers/s390/cio/css.c4
-rw-r--r--drivers/s390/cio/device.c25
-rw-r--r--drivers/s390/cio/device_fsm.c44
-rw-r--r--drivers/s390/cio/device_id.c4
-rw-r--r--drivers/s390/cio/device_pgid.c12
-rw-r--r--drivers/s390/s390mach.c3
-rw-r--r--drivers/scsi/Kconfig1
-rw-r--r--drivers/scsi/dpt_i2o.c78
-rw-r--r--drivers/scsi/dpti.h13
-rw-r--r--drivers/serial/bfin_5xx.c98
-rw-r--r--drivers/serial/serial_core.c3
-rw-r--r--drivers/serial/sh-sci.c32
-rw-r--r--drivers/serial/sh-sci.h27
-rw-r--r--drivers/usb/serial/iuu_phoenix.c6
-rw-r--r--drivers/video/pxafb.c8
122 files changed, 3428 insertions, 1769 deletions
diff --git a/drivers/accessibility/Kconfig b/drivers/accessibility/Kconfig
index 1264c4b98094..ef3b65bfdd0a 100644
--- a/drivers/accessibility/Kconfig
+++ b/drivers/accessibility/Kconfig
@@ -1,7 +1,17 @@
1menuconfig ACCESSIBILITY 1menuconfig ACCESSIBILITY
2 bool "Accessibility support" 2 bool "Accessibility support"
3 ---help--- 3 ---help---
4 Enable a submenu where accessibility items may be enabled. 4 Accessibility handles all special kinds of hardware devices or
5 software adapters which help people with disabilities (e.g.
6 blindness) to use computers.
7
8 That includes braille devices, speech synthesis, keyboard
9 remapping, etc.
10
11 Say Y here to get to see options for accessibility.
12 This option alone does not add any kernel code.
13
14 If you say N, all options in this submenu will be skipped and disabled.
5 15
6 If unsure, say N. 16 If unsure, say N.
7 17
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 1c11df9a5f32..9bf2986a2788 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -205,8 +205,8 @@ config SATA_VITESSE
205 If unsure, say N. 205 If unsure, say N.
206 206
207config SATA_INIC162X 207config SATA_INIC162X
208 tristate "Initio 162x SATA support (HIGHLY EXPERIMENTAL)" 208 tristate "Initio 162x SATA support"
209 depends on PCI && EXPERIMENTAL 209 depends on PCI
210 help 210 help
211 This option enables support for Initio 162x Serial ATA. 211 This option enables support for Initio 162x Serial ATA.
212 212
@@ -697,6 +697,15 @@ config PATA_SCC
697 697
698 If unsure, say N. 698 If unsure, say N.
699 699
700config PATA_SCH
701 tristate "Intel SCH PATA support"
702 depends on PCI
703 help
704 This option enables support for Intel SCH PATA on the Intel
705 SCH (US15W, US15L, UL11L) series host controllers.
706
707 If unsure, say N.
708
700config PATA_BF54X 709config PATA_BF54X
701 tristate "Blackfin 54x ATAPI support" 710 tristate "Blackfin 54x ATAPI support"
702 depends on BF542 || BF548 || BF549 711 depends on BF542 || BF548 || BF549
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index b693d829383a..674965fa326d 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -67,6 +67,7 @@ obj-$(CONFIG_PATA_SIS) += pata_sis.o
67obj-$(CONFIG_PATA_TRIFLEX) += pata_triflex.o 67obj-$(CONFIG_PATA_TRIFLEX) += pata_triflex.o
68obj-$(CONFIG_PATA_IXP4XX_CF) += pata_ixp4xx_cf.o 68obj-$(CONFIG_PATA_IXP4XX_CF) += pata_ixp4xx_cf.o
69obj-$(CONFIG_PATA_SCC) += pata_scc.o 69obj-$(CONFIG_PATA_SCC) += pata_scc.o
70obj-$(CONFIG_PATA_SCH) += pata_sch.o
70obj-$(CONFIG_PATA_BF54X) += pata_bf54x.o 71obj-$(CONFIG_PATA_BF54X) += pata_bf54x.o
71obj-$(CONFIG_PATA_PLATFORM) += pata_platform.o 72obj-$(CONFIG_PATA_PLATFORM) += pata_platform.o
72obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o 73obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 8cace9aa9c03..97f83fb2ee2e 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1267,9 +1267,7 @@ static int ahci_check_ready(struct ata_link *link)
1267 void __iomem *port_mmio = ahci_port_base(link->ap); 1267 void __iomem *port_mmio = ahci_port_base(link->ap);
1268 u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF; 1268 u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
1269 1269
1270 if (!(status & ATA_BUSY)) 1270 return ata_check_ready(status);
1271 return 1;
1272 return 0;
1273} 1271}
1274 1272
1275static int ahci_softreset(struct ata_link *link, unsigned int *class, 1273static int ahci_softreset(struct ata_link *link, unsigned int *class,
diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c
index 47aeccd52fa9..75a406f5e694 100644
--- a/drivers/ata/ata_generic.c
+++ b/drivers/ata/ata_generic.c
@@ -152,6 +152,12 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id
152 if (dev->vendor == PCI_VENDOR_ID_AL) 152 if (dev->vendor == PCI_VENDOR_ID_AL)
153 ata_pci_bmdma_clear_simplex(dev); 153 ata_pci_bmdma_clear_simplex(dev);
154 154
155 if (dev->vendor == PCI_VENDOR_ID_ATI) {
156 int rc = pcim_enable_device(dev);
157 if (rc < 0)
158 return rc;
159 pcim_pin_device(dev);
160 }
155 return ata_pci_sff_init_one(dev, ppi, &generic_sht, NULL); 161 return ata_pci_sff_init_one(dev, ppi, &generic_sht, NULL);
156} 162}
157 163
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index ea2c7649d399..a9027b8fbdd5 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -1348,6 +1348,8 @@ static void __devinit piix_init_sidpr(struct ata_host *host)
1348{ 1348{
1349 struct pci_dev *pdev = to_pci_dev(host->dev); 1349 struct pci_dev *pdev = to_pci_dev(host->dev);
1350 struct piix_host_priv *hpriv = host->private_data; 1350 struct piix_host_priv *hpriv = host->private_data;
1351 struct ata_device *dev0 = &host->ports[0]->link.device[0];
1352 u32 scontrol;
1351 int i; 1353 int i;
1352 1354
1353 /* check for availability */ 1355 /* check for availability */
@@ -1366,6 +1368,29 @@ static void __devinit piix_init_sidpr(struct ata_host *host)
1366 return; 1368 return;
1367 1369
1368 hpriv->sidpr = pcim_iomap_table(pdev)[PIIX_SIDPR_BAR]; 1370 hpriv->sidpr = pcim_iomap_table(pdev)[PIIX_SIDPR_BAR];
1371
1372 /* SCR access via SIDPR doesn't work on some configurations.
1373 * Give it a test drive by inhibiting power save modes which
1374 * we'll do anyway.
1375 */
1376 scontrol = piix_sidpr_read(dev0, SCR_CONTROL);
1377
1378 /* if IPM is already 3, SCR access is probably working. Don't
1379 * un-inhibit power save modes as BIOS might have inhibited
1380 * them for a reason.
1381 */
1382 if ((scontrol & 0xf00) != 0x300) {
1383 scontrol |= 0x300;
1384 piix_sidpr_write(dev0, SCR_CONTROL, scontrol);
1385 scontrol = piix_sidpr_read(dev0, SCR_CONTROL);
1386
1387 if ((scontrol & 0xf00) != 0x300) {
1388 dev_printk(KERN_INFO, host->dev, "SCR access via "
1389 "SIDPR is available but doesn't work\n");
1390 return;
1391 }
1392 }
1393
1369 host->ports[0]->ops = &piix_sidpr_sata_ops; 1394 host->ports[0]->ops = &piix_sidpr_sata_ops;
1370 host->ports[1]->ops = &piix_sidpr_sata_ops; 1395 host->ports[1]->ops = &piix_sidpr_sata_ops;
1371} 1396}
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 3bc488538204..927b692d723c 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -6292,6 +6292,7 @@ EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6292EXPORT_SYMBOL_GPL(ata_eh_thaw_port); 6292EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6293EXPORT_SYMBOL_GPL(ata_eh_qc_complete); 6293EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6294EXPORT_SYMBOL_GPL(ata_eh_qc_retry); 6294EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6295EXPORT_SYMBOL_GPL(ata_eh_analyze_ncq_error);
6295EXPORT_SYMBOL_GPL(ata_do_eh); 6296EXPORT_SYMBOL_GPL(ata_do_eh);
6296EXPORT_SYMBOL_GPL(ata_std_error_handler); 6297EXPORT_SYMBOL_GPL(ata_std_error_handler);
6297 6298
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index 61dcd0026c64..62e033146bed 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -1357,7 +1357,7 @@ static void ata_eh_analyze_serror(struct ata_link *link)
1357 * LOCKING: 1357 * LOCKING:
1358 * Kernel thread context (may sleep). 1358 * Kernel thread context (may sleep).
1359 */ 1359 */
1360static void ata_eh_analyze_ncq_error(struct ata_link *link) 1360void ata_eh_analyze_ncq_error(struct ata_link *link)
1361{ 1361{
1362 struct ata_port *ap = link->ap; 1362 struct ata_port *ap = link->ap;
1363 struct ata_eh_context *ehc = &link->eh_context; 1363 struct ata_eh_context *ehc = &link->eh_context;
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index 2ec65a8fda79..3c2d2289f85e 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -314,11 +314,7 @@ static int ata_sff_check_ready(struct ata_link *link)
314{ 314{
315 u8 status = link->ap->ops->sff_check_status(link->ap); 315 u8 status = link->ap->ops->sff_check_status(link->ap);
316 316
317 if (!(status & ATA_BUSY)) 317 return ata_check_ready(status);
318 return 1;
319 if (status == 0xff)
320 return -ENODEV;
321 return 0;
322} 318}
323 319
324/** 320/**
diff --git a/drivers/ata/pata_acpi.c b/drivers/ata/pata_acpi.c
index c5f91e629945..fbe605711554 100644
--- a/drivers/ata/pata_acpi.c
+++ b/drivers/ata/pata_acpi.c
@@ -259,6 +259,12 @@ static int pacpi_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
259 .port_ops = &pacpi_ops, 259 .port_ops = &pacpi_ops,
260 }; 260 };
261 const struct ata_port_info *ppi[] = { &info, NULL }; 261 const struct ata_port_info *ppi[] = { &info, NULL };
262 if (pdev->vendor == PCI_VENDOR_ID_ATI) {
263 int rc = pcim_enable_device(pdev);
264 if (rc < 0)
265 return rc;
266 pcim_pin_device(pdev);
267 }
262 return ata_pci_sff_init_one(pdev, ppi, &pacpi_sht, NULL); 268 return ata_pci_sff_init_one(pdev, ppi, &pacpi_sht, NULL);
263} 269}
264 270
diff --git a/drivers/ata/pata_sch.c b/drivers/ata/pata_sch.c
new file mode 100644
index 000000000000..c8cc027789fe
--- /dev/null
+++ b/drivers/ata/pata_sch.c
@@ -0,0 +1,206 @@
1/*
2 * pata_sch.c - Intel SCH PATA controllers
3 *
4 * Copyright (c) 2008 Alek Du <alek.du@intel.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License 2 as published
8 * by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; see the file COPYING. If not, write to
17 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 */
20
21/*
22 * Supports:
23 * Intel SCH (AF82US15W, AF82US15L, AF82UL11L) chipsets -- see spec at:
24 * http://download.intel.com/design/chipsets/embedded/datashts/319537.pdf
25 */
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/pci.h>
30#include <linux/init.h>
31#include <linux/blkdev.h>
32#include <linux/delay.h>
33#include <linux/device.h>
34#include <scsi/scsi_host.h>
35#include <linux/libata.h>
36#include <linux/dmi.h>
37
38#define DRV_NAME "pata_sch"
39#define DRV_VERSION "0.2"
40
41/* see SCH datasheet page 351 */
42enum {
43 D0TIM = 0x80, /* Device 0 Timing Register */
44 D1TIM = 0x84, /* Device 1 Timing Register */
45 PM = 0x07, /* PIO Mode Bit Mask */
46 MDM = (0x03 << 8), /* Multi-word DMA Mode Bit Mask */
47 UDM = (0x07 << 16), /* Ultra DMA Mode Bit Mask */
48 PPE = (1 << 30), /* Prefetch/Post Enable */
49 USD = (1 << 31), /* Use Synchronous DMA */
50};
51
52static int sch_init_one(struct pci_dev *pdev,
53 const struct pci_device_id *ent);
54static void sch_set_piomode(struct ata_port *ap, struct ata_device *adev);
55static void sch_set_dmamode(struct ata_port *ap, struct ata_device *adev);
56
57static const struct pci_device_id sch_pci_tbl[] = {
58 /* Intel SCH PATA Controller */
59 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_IDE), 0 },
60 { } /* terminate list */
61};
62
63static struct pci_driver sch_pci_driver = {
64 .name = DRV_NAME,
65 .id_table = sch_pci_tbl,
66 .probe = sch_init_one,
67 .remove = ata_pci_remove_one,
68#ifdef CONFIG_PM
69 .suspend = ata_pci_device_suspend,
70 .resume = ata_pci_device_resume,
71#endif
72};
73
74static struct scsi_host_template sch_sht = {
75 ATA_BMDMA_SHT(DRV_NAME),
76};
77
78static struct ata_port_operations sch_pata_ops = {
79 .inherits = &ata_bmdma_port_ops,
80 .cable_detect = ata_cable_unknown,
81 .set_piomode = sch_set_piomode,
82 .set_dmamode = sch_set_dmamode,
83};
84
85static struct ata_port_info sch_port_info = {
86 .flags = 0,
87 .pio_mask = ATA_PIO4, /* pio0-4 */
88 .mwdma_mask = ATA_MWDMA2, /* mwdma0-2 */
89 .udma_mask = ATA_UDMA5, /* udma0-5 */
90 .port_ops = &sch_pata_ops,
91};
92
93MODULE_AUTHOR("Alek Du <alek.du@intel.com>");
94MODULE_DESCRIPTION("SCSI low-level driver for Intel SCH PATA controllers");
95MODULE_LICENSE("GPL");
96MODULE_DEVICE_TABLE(pci, sch_pci_tbl);
97MODULE_VERSION(DRV_VERSION);
98
99/**
100 * sch_set_piomode - Initialize host controller PATA PIO timings
101 * @ap: Port whose timings we are configuring
102 * @adev: ATA device
103 *
104 * Set PIO mode for device, in host controller PCI config space.
105 *
106 * LOCKING:
107 * None (inherited from caller).
108 */
109
110static void sch_set_piomode(struct ata_port *ap, struct ata_device *adev)
111{
112 unsigned int pio = adev->pio_mode - XFER_PIO_0;
113 struct pci_dev *dev = to_pci_dev(ap->host->dev);
114 unsigned int port = adev->devno ? D1TIM : D0TIM;
115 unsigned int data;
116
117 pci_read_config_dword(dev, port, &data);
118 /* see SCH datasheet page 351 */
119 /* set PIO mode */
120 data &= ~(PM | PPE);
121 data |= pio;
122 /* enable PPE for block device */
123 if (adev->class == ATA_DEV_ATA)
124 data |= PPE;
125 pci_write_config_dword(dev, port, data);
126}
127
128/**
129 * sch_set_dmamode - Initialize host controller PATA DMA timings
130 * @ap: Port whose timings we are configuring
131 * @adev: ATA device
132 *
133 * Set MW/UDMA mode for device, in host controller PCI config space.
134 *
135 * LOCKING:
136 * None (inherited from caller).
137 */
138
139static void sch_set_dmamode(struct ata_port *ap, struct ata_device *adev)
140{
141 unsigned int dma_mode = adev->dma_mode;
142 struct pci_dev *dev = to_pci_dev(ap->host->dev);
143 unsigned int port = adev->devno ? D1TIM : D0TIM;
144 unsigned int data;
145
146 pci_read_config_dword(dev, port, &data);
147 /* see SCH datasheet page 351 */
148 if (dma_mode >= XFER_UDMA_0) {
149 /* enable Synchronous DMA mode */
150 data |= USD;
151 data &= ~UDM;
152 data |= (dma_mode - XFER_UDMA_0) << 16;
153 } else { /* must be MWDMA mode, since we masked SWDMA already */
154 data &= ~(USD | MDM);
155 data |= (dma_mode - XFER_MW_DMA_0) << 8;
156 }
157 pci_write_config_dword(dev, port, data);
158}
159
160/**
161 * sch_init_one - Register SCH ATA PCI device with kernel services
162 * @pdev: PCI device to register
163 * @ent: Entry in sch_pci_tbl matching with @pdev
164 *
165 * LOCKING:
166 * Inherited from PCI layer (may sleep).
167 *
168 * RETURNS:
169 * Zero on success, or -ERRNO value.
170 */
171
172static int __devinit sch_init_one(struct pci_dev *pdev,
173 const struct pci_device_id *ent)
174{
175 static int printed_version;
176 const struct ata_port_info *ppi[] = { &sch_port_info, NULL };
177 struct ata_host *host;
178 int rc;
179
180 if (!printed_version++)
181 dev_printk(KERN_DEBUG, &pdev->dev,
182 "version " DRV_VERSION "\n");
183
184 /* enable device and prepare host */
185 rc = pcim_enable_device(pdev);
186 if (rc)
187 return rc;
188 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
189 if (rc)
190 return rc;
191 pci_set_master(pdev);
192 return ata_pci_sff_activate_host(host, ata_sff_interrupt, &sch_sht);
193}
194
195static int __init sch_init(void)
196{
197 return pci_register_driver(&sch_pci_driver);
198}
199
200static void __exit sch_exit(void)
201{
202 pci_unregister_driver(&sch_pci_driver);
203}
204
205module_init(sch_init);
206module_exit(sch_exit);
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index d27bb9a2568f..3ead02fe379e 100644
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -10,13 +10,33 @@
10 * right. Documentation is available at initio's website but it only 10 * right. Documentation is available at initio's website but it only
11 * documents registers (not programming model). 11 * documents registers (not programming model).
12 * 12 *
13 * - ATA disks work. 13 * This driver has interesting history. The first version was written
14 * - Hotplug works. 14 * from the documentation and a 2.4 IDE driver posted on a Taiwan
15 * - ATAPI read works but burning doesn't. This thing is really 15 * company, which didn't use any IDMA features and couldn't handle
16 * peculiar about ATAPI and I couldn't figure out how ATAPI PIO and 16 * LBA48. The resulting driver couldn't handle LBA48 devices either
17 * ATAPI DMA WRITE should be programmed. If you've got a clue, be 17 * making it pretty useless.
18 * my guest. 18 *
19 * - Both STR and STD work. 19 * After a while, initio picked the driver up, renamed it to
20 * sata_initio162x, updated it to use IDMA for ATA DMA commands and
21 * posted it on their website. It only used ATA_PROT_DMA for IDMA and
22 * attaching both devices and issuing IDMA and !IDMA commands
23 * simultaneously broke it due to PIRQ masking interaction but it did
24 * show how to use the IDMA (ADMA + some initio specific twists)
25 * engine.
26 *
27 * Then, I picked up their changes again and here's the usable driver
28 * which uses IDMA for everything. Everything works now including
29 * LBA48, CD/DVD burning, suspend/resume and hotplug. There are some
30 * issues tho. Result Tf is not resported properly, NCQ isn't
31 * supported yet and CD/DVD writing works with DMA assisted PIO
32 * protocol (which, for native SATA devices, shouldn't cause any
33 * noticeable difference).
34 *
35 * Anyways, so, here's finally a working driver for inic162x. Enjoy!
36 *
37 * initio: If you guys wanna improve the driver regarding result TF
38 * access and other stuff, please feel free to contact me. I'll be
39 * happy to assist.
20 */ 40 */
21 41
22#include <linux/kernel.h> 42#include <linux/kernel.h>
@@ -28,13 +48,19 @@
28#include <scsi/scsi_device.h> 48#include <scsi/scsi_device.h>
29 49
30#define DRV_NAME "sata_inic162x" 50#define DRV_NAME "sata_inic162x"
31#define DRV_VERSION "0.3" 51#define DRV_VERSION "0.4"
32 52
33enum { 53enum {
34 MMIO_BAR = 5, 54 MMIO_BAR_PCI = 5,
55 MMIO_BAR_CARDBUS = 1,
35 56
36 NR_PORTS = 2, 57 NR_PORTS = 2,
37 58
59 IDMA_CPB_TBL_SIZE = 4 * 32,
60
61 INIC_DMA_BOUNDARY = 0xffffff,
62
63 HOST_ACTRL = 0x08,
38 HOST_CTL = 0x7c, 64 HOST_CTL = 0x7c,
39 HOST_STAT = 0x7e, 65 HOST_STAT = 0x7e,
40 HOST_IRQ_STAT = 0xbc, 66 HOST_IRQ_STAT = 0xbc,
@@ -43,22 +69,37 @@ enum {
43 PORT_SIZE = 0x40, 69 PORT_SIZE = 0x40,
44 70
45 /* registers for ATA TF operation */ 71 /* registers for ATA TF operation */
46 PORT_TF = 0x00, 72 PORT_TF_DATA = 0x00,
47 PORT_ALT_STAT = 0x08, 73 PORT_TF_FEATURE = 0x01,
74 PORT_TF_NSECT = 0x02,
75 PORT_TF_LBAL = 0x03,
76 PORT_TF_LBAM = 0x04,
77 PORT_TF_LBAH = 0x05,
78 PORT_TF_DEVICE = 0x06,
79 PORT_TF_COMMAND = 0x07,
80 PORT_TF_ALT_STAT = 0x08,
48 PORT_IRQ_STAT = 0x09, 81 PORT_IRQ_STAT = 0x09,
49 PORT_IRQ_MASK = 0x0a, 82 PORT_IRQ_MASK = 0x0a,
50 PORT_PRD_CTL = 0x0b, 83 PORT_PRD_CTL = 0x0b,
51 PORT_PRD_ADDR = 0x0c, 84 PORT_PRD_ADDR = 0x0c,
52 PORT_PRD_XFERLEN = 0x10, 85 PORT_PRD_XFERLEN = 0x10,
86 PORT_CPB_CPBLAR = 0x18,
87 PORT_CPB_PTQFIFO = 0x1c,
53 88
54 /* IDMA register */ 89 /* IDMA register */
55 PORT_IDMA_CTL = 0x14, 90 PORT_IDMA_CTL = 0x14,
91 PORT_IDMA_STAT = 0x16,
92
93 PORT_RPQ_FIFO = 0x1e,
94 PORT_RPQ_CNT = 0x1f,
56 95
57 PORT_SCR = 0x20, 96 PORT_SCR = 0x20,
58 97
59 /* HOST_CTL bits */ 98 /* HOST_CTL bits */
60 HCTL_IRQOFF = (1 << 8), /* global IRQ off */ 99 HCTL_IRQOFF = (1 << 8), /* global IRQ off */
61 HCTL_PWRDWN = (1 << 13), /* power down PHYs */ 100 HCTL_FTHD0 = (1 << 10), /* fifo threshold 0 */
101 HCTL_FTHD1 = (1 << 11), /* fifo threshold 1*/
102 HCTL_PWRDWN = (1 << 12), /* power down PHYs */
62 HCTL_SOFTRST = (1 << 13), /* global reset (no phy reset) */ 103 HCTL_SOFTRST = (1 << 13), /* global reset (no phy reset) */
63 HCTL_RPGSEL = (1 << 15), /* register page select */ 104 HCTL_RPGSEL = (1 << 15), /* register page select */
64 105
@@ -81,9 +122,7 @@ enum {
81 PIRQ_PENDING = (1 << 7), /* port IRQ pending (STAT only) */ 122 PIRQ_PENDING = (1 << 7), /* port IRQ pending (STAT only) */
82 123
83 PIRQ_ERR = PIRQ_OFFLINE | PIRQ_ONLINE | PIRQ_FATAL, 124 PIRQ_ERR = PIRQ_OFFLINE | PIRQ_ONLINE | PIRQ_FATAL,
84 125 PIRQ_MASK_DEFAULT = PIRQ_REPLY | PIRQ_ATA,
85 PIRQ_MASK_DMA_READ = PIRQ_REPLY | PIRQ_ATA,
86 PIRQ_MASK_OTHER = PIRQ_REPLY | PIRQ_COMPLETE,
87 PIRQ_MASK_FREEZE = 0xff, 126 PIRQ_MASK_FREEZE = 0xff,
88 127
89 /* PORT_PRD_CTL bits */ 128 /* PORT_PRD_CTL bits */
@@ -96,20 +135,104 @@ enum {
96 IDMA_CTL_RST_IDMA = (1 << 5), /* reset IDMA machinary */ 135 IDMA_CTL_RST_IDMA = (1 << 5), /* reset IDMA machinary */
97 IDMA_CTL_GO = (1 << 7), /* IDMA mode go */ 136 IDMA_CTL_GO = (1 << 7), /* IDMA mode go */
98 IDMA_CTL_ATA_NIEN = (1 << 8), /* ATA IRQ disable */ 137 IDMA_CTL_ATA_NIEN = (1 << 8), /* ATA IRQ disable */
138
139 /* PORT_IDMA_STAT bits */
140 IDMA_STAT_PERR = (1 << 0), /* PCI ERROR MODE */
141 IDMA_STAT_CPBERR = (1 << 1), /* ADMA CPB error */
142 IDMA_STAT_LGCY = (1 << 3), /* ADMA legacy */
143 IDMA_STAT_UIRQ = (1 << 4), /* ADMA unsolicited irq */
144 IDMA_STAT_STPD = (1 << 5), /* ADMA stopped */
145 IDMA_STAT_PSD = (1 << 6), /* ADMA pause */
146 IDMA_STAT_DONE = (1 << 7), /* ADMA done */
147
148 IDMA_STAT_ERR = IDMA_STAT_PERR | IDMA_STAT_CPBERR,
149
150 /* CPB Control Flags*/
151 CPB_CTL_VALID = (1 << 0), /* CPB valid */
152 CPB_CTL_QUEUED = (1 << 1), /* queued command */
153 CPB_CTL_DATA = (1 << 2), /* data, rsvd in datasheet */
154 CPB_CTL_IEN = (1 << 3), /* PCI interrupt enable */
155 CPB_CTL_DEVDIR = (1 << 4), /* device direction control */
156
157 /* CPB Response Flags */
158 CPB_RESP_DONE = (1 << 0), /* ATA command complete */
159 CPB_RESP_REL = (1 << 1), /* ATA release */
160 CPB_RESP_IGNORED = (1 << 2), /* CPB ignored */
161 CPB_RESP_ATA_ERR = (1 << 3), /* ATA command error */
162 CPB_RESP_SPURIOUS = (1 << 4), /* ATA spurious interrupt error */
163 CPB_RESP_UNDERFLOW = (1 << 5), /* APRD deficiency length error */
164 CPB_RESP_OVERFLOW = (1 << 6), /* APRD exccess length error */
165 CPB_RESP_CPB_ERR = (1 << 7), /* CPB error flag */
166
167 /* PRD Control Flags */
168 PRD_DRAIN = (1 << 1), /* ignore data excess */
169 PRD_CDB = (1 << 2), /* atapi packet command pointer */
170 PRD_DIRECT_INTR = (1 << 3), /* direct interrupt */
171 PRD_DMA = (1 << 4), /* data transfer method */
172 PRD_WRITE = (1 << 5), /* data dir, rsvd in datasheet */
173 PRD_IOM = (1 << 6), /* io/memory transfer */
174 PRD_END = (1 << 7), /* APRD chain end */
99}; 175};
100 176
177/* Comman Parameter Block */
178struct inic_cpb {
179 u8 resp_flags; /* Response Flags */
180 u8 error; /* ATA Error */
181 u8 status; /* ATA Status */
182 u8 ctl_flags; /* Control Flags */
183 __le32 len; /* Total Transfer Length */
184 __le32 prd; /* First PRD pointer */
185 u8 rsvd[4];
186 /* 16 bytes */
187 u8 feature; /* ATA Feature */
188 u8 hob_feature; /* ATA Ex. Feature */
189 u8 device; /* ATA Device/Head */
190 u8 mirctl; /* Mirror Control */
191 u8 nsect; /* ATA Sector Count */
192 u8 hob_nsect; /* ATA Ex. Sector Count */
193 u8 lbal; /* ATA Sector Number */
194 u8 hob_lbal; /* ATA Ex. Sector Number */
195 u8 lbam; /* ATA Cylinder Low */
196 u8 hob_lbam; /* ATA Ex. Cylinder Low */
197 u8 lbah; /* ATA Cylinder High */
198 u8 hob_lbah; /* ATA Ex. Cylinder High */
199 u8 command; /* ATA Command */
200 u8 ctl; /* ATA Control */
201 u8 slave_error; /* Slave ATA Error */
202 u8 slave_status; /* Slave ATA Status */
203 /* 32 bytes */
204} __packed;
205
206/* Physical Region Descriptor */
207struct inic_prd {
208 __le32 mad; /* Physical Memory Address */
209 __le16 len; /* Transfer Length */
210 u8 rsvd;
211 u8 flags; /* Control Flags */
212} __packed;
213
214struct inic_pkt {
215 struct inic_cpb cpb;
216 struct inic_prd prd[LIBATA_MAX_PRD + 1]; /* + 1 for cdb */
217 u8 cdb[ATAPI_CDB_LEN];
218} __packed;
219
101struct inic_host_priv { 220struct inic_host_priv {
102 u16 cached_hctl; 221 void __iomem *mmio_base;
222 u16 cached_hctl;
103}; 223};
104 224
105struct inic_port_priv { 225struct inic_port_priv {
106 u8 dfl_prdctl; 226 struct inic_pkt *pkt;
107 u8 cached_prdctl; 227 dma_addr_t pkt_dma;
108 u8 cached_pirq_mask; 228 u32 *cpb_tbl;
229 dma_addr_t cpb_tbl_dma;
109}; 230};
110 231
111static struct scsi_host_template inic_sht = { 232static struct scsi_host_template inic_sht = {
112 ATA_BMDMA_SHT(DRV_NAME), 233 ATA_BASE_SHT(DRV_NAME),
234 .sg_tablesize = LIBATA_MAX_PRD, /* maybe it can be larger? */
235 .dma_boundary = INIC_DMA_BOUNDARY,
113}; 236};
114 237
115static const int scr_map[] = { 238static const int scr_map[] = {
@@ -120,54 +243,34 @@ static const int scr_map[] = {
120 243
121static void __iomem *inic_port_base(struct ata_port *ap) 244static void __iomem *inic_port_base(struct ata_port *ap)
122{ 245{
123 return ap->host->iomap[MMIO_BAR] + ap->port_no * PORT_SIZE; 246 struct inic_host_priv *hpriv = ap->host->private_data;
124}
125
126static void __inic_set_pirq_mask(struct ata_port *ap, u8 mask)
127{
128 void __iomem *port_base = inic_port_base(ap);
129 struct inic_port_priv *pp = ap->private_data;
130 247
131 writeb(mask, port_base + PORT_IRQ_MASK); 248 return hpriv->mmio_base + ap->port_no * PORT_SIZE;
132 pp->cached_pirq_mask = mask;
133}
134
135static void inic_set_pirq_mask(struct ata_port *ap, u8 mask)
136{
137 struct inic_port_priv *pp = ap->private_data;
138
139 if (pp->cached_pirq_mask != mask)
140 __inic_set_pirq_mask(ap, mask);
141} 249}
142 250
143static void inic_reset_port(void __iomem *port_base) 251static void inic_reset_port(void __iomem *port_base)
144{ 252{
145 void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; 253 void __iomem *idma_ctl = port_base + PORT_IDMA_CTL;
146 u16 ctl;
147 254
148 ctl = readw(idma_ctl); 255 /* stop IDMA engine */
149 ctl &= ~(IDMA_CTL_RST_IDMA | IDMA_CTL_ATA_NIEN | IDMA_CTL_GO); 256 readw(idma_ctl); /* flush */
257 msleep(1);
150 258
151 /* mask IRQ and assert reset */ 259 /* mask IRQ and assert reset */
152 writew(ctl | IDMA_CTL_RST_IDMA | IDMA_CTL_ATA_NIEN, idma_ctl); 260 writew(IDMA_CTL_RST_IDMA, idma_ctl);
153 readw(idma_ctl); /* flush */ 261 readw(idma_ctl); /* flush */
154
155 /* give it some time */
156 msleep(1); 262 msleep(1);
157 263
158 /* release reset */ 264 /* release reset */
159 writew(ctl | IDMA_CTL_ATA_NIEN, idma_ctl); 265 writew(0, idma_ctl);
160 266
161 /* clear irq */ 267 /* clear irq */
162 writeb(0xff, port_base + PORT_IRQ_STAT); 268 writeb(0xff, port_base + PORT_IRQ_STAT);
163
164 /* reenable ATA IRQ, turn off IDMA mode */
165 writew(ctl, idma_ctl);
166} 269}
167 270
168static int inic_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) 271static int inic_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val)
169{ 272{
170 void __iomem *scr_addr = ap->ioaddr.scr_addr; 273 void __iomem *scr_addr = inic_port_base(ap) + PORT_SCR;
171 void __iomem *addr; 274 void __iomem *addr;
172 275
173 if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) 276 if (unlikely(sc_reg >= ARRAY_SIZE(scr_map)))
@@ -184,120 +287,126 @@ static int inic_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val)
184 287
185static int inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) 288static int inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val)
186{ 289{
187 void __iomem *scr_addr = ap->ioaddr.scr_addr; 290 void __iomem *scr_addr = inic_port_base(ap) + PORT_SCR;
188 void __iomem *addr;
189 291
190 if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) 292 if (unlikely(sc_reg >= ARRAY_SIZE(scr_map)))
191 return -EINVAL; 293 return -EINVAL;
192 294
193 addr = scr_addr + scr_map[sc_reg] * 4;
194 writel(val, scr_addr + scr_map[sc_reg] * 4); 295 writel(val, scr_addr + scr_map[sc_reg] * 4);
195 return 0; 296 return 0;
196} 297}
197 298
198/* 299static void inic_stop_idma(struct ata_port *ap)
199 * In TF mode, inic162x is very similar to SFF device. TF registers
200 * function the same. DMA engine behaves similary using the same PRD
201 * format as BMDMA but different command register, interrupt and event
202 * notification methods are used. The following inic_bmdma_*()
203 * functions do the impedance matching.
204 */
205static void inic_bmdma_setup(struct ata_queued_cmd *qc)
206{ 300{
207 struct ata_port *ap = qc->ap;
208 struct inic_port_priv *pp = ap->private_data;
209 void __iomem *port_base = inic_port_base(ap); 301 void __iomem *port_base = inic_port_base(ap);
210 int rw = qc->tf.flags & ATA_TFLAG_WRITE;
211
212 /* make sure device sees PRD table writes */
213 wmb();
214
215 /* load transfer length */
216 writel(qc->nbytes, port_base + PORT_PRD_XFERLEN);
217
218 /* turn on DMA and specify data direction */
219 pp->cached_prdctl = pp->dfl_prdctl | PRD_CTL_DMAEN;
220 if (!rw)
221 pp->cached_prdctl |= PRD_CTL_WR;
222 writeb(pp->cached_prdctl, port_base + PORT_PRD_CTL);
223 302
224 /* issue r/w command */ 303 readb(port_base + PORT_RPQ_FIFO);
225 ap->ops->sff_exec_command(ap, &qc->tf); 304 readb(port_base + PORT_RPQ_CNT);
305 writew(0, port_base + PORT_IDMA_CTL);
226} 306}
227 307
228static void inic_bmdma_start(struct ata_queued_cmd *qc) 308static void inic_host_err_intr(struct ata_port *ap, u8 irq_stat, u16 idma_stat)
229{ 309{
230 struct ata_port *ap = qc->ap; 310 struct ata_eh_info *ehi = &ap->link.eh_info;
231 struct inic_port_priv *pp = ap->private_data; 311 struct inic_port_priv *pp = ap->private_data;
232 void __iomem *port_base = inic_port_base(ap); 312 struct inic_cpb *cpb = &pp->pkt->cpb;
313 bool freeze = false;
233 314
234 /* start host DMA transaction */ 315 ata_ehi_clear_desc(ehi);
235 pp->cached_prdctl |= PRD_CTL_START; 316 ata_ehi_push_desc(ehi, "irq_stat=0x%x idma_stat=0x%x",
236 writeb(pp->cached_prdctl, port_base + PORT_PRD_CTL); 317 irq_stat, idma_stat);
237}
238 318
239static void inic_bmdma_stop(struct ata_queued_cmd *qc) 319 inic_stop_idma(ap);
240{
241 struct ata_port *ap = qc->ap;
242 struct inic_port_priv *pp = ap->private_data;
243 void __iomem *port_base = inic_port_base(ap);
244 320
245 /* stop DMA engine */ 321 if (irq_stat & (PIRQ_OFFLINE | PIRQ_ONLINE)) {
246 writeb(pp->dfl_prdctl, port_base + PORT_PRD_CTL); 322 ata_ehi_push_desc(ehi, "hotplug");
247} 323 ata_ehi_hotplugged(ehi);
324 freeze = true;
325 }
248 326
249static u8 inic_bmdma_status(struct ata_port *ap) 327 if (idma_stat & IDMA_STAT_PERR) {
250{ 328 ata_ehi_push_desc(ehi, "PCI error");
251 /* event is already verified by the interrupt handler */ 329 freeze = true;
252 return ATA_DMA_INTR; 330 }
331
332 if (idma_stat & IDMA_STAT_CPBERR) {
333 ata_ehi_push_desc(ehi, "CPB error");
334
335 if (cpb->resp_flags & CPB_RESP_IGNORED) {
336 __ata_ehi_push_desc(ehi, " ignored");
337 ehi->err_mask |= AC_ERR_INVALID;
338 freeze = true;
339 }
340
341 if (cpb->resp_flags & CPB_RESP_ATA_ERR)
342 ehi->err_mask |= AC_ERR_DEV;
343
344 if (cpb->resp_flags & CPB_RESP_SPURIOUS) {
345 __ata_ehi_push_desc(ehi, " spurious-intr");
346 ehi->err_mask |= AC_ERR_HSM;
347 freeze = true;
348 }
349
350 if (cpb->resp_flags &
351 (CPB_RESP_UNDERFLOW | CPB_RESP_OVERFLOW)) {
352 __ata_ehi_push_desc(ehi, " data-over/underflow");
353 ehi->err_mask |= AC_ERR_HSM;
354 freeze = true;
355 }
356 }
357
358 if (freeze)
359 ata_port_freeze(ap);
360 else
361 ata_port_abort(ap);
253} 362}
254 363
255static void inic_host_intr(struct ata_port *ap) 364static void inic_host_intr(struct ata_port *ap)
256{ 365{
257 void __iomem *port_base = inic_port_base(ap); 366 void __iomem *port_base = inic_port_base(ap);
258 struct ata_eh_info *ehi = &ap->link.eh_info; 367 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->link.active_tag);
259 u8 irq_stat; 368 u8 irq_stat;
369 u16 idma_stat;
260 370
261 /* fetch and clear irq */ 371 /* read and clear IRQ status */
262 irq_stat = readb(port_base + PORT_IRQ_STAT); 372 irq_stat = readb(port_base + PORT_IRQ_STAT);
263 writeb(irq_stat, port_base + PORT_IRQ_STAT); 373 writeb(irq_stat, port_base + PORT_IRQ_STAT);
374 idma_stat = readw(port_base + PORT_IDMA_STAT);
264 375
265 if (likely(!(irq_stat & PIRQ_ERR))) { 376 if (unlikely((irq_stat & PIRQ_ERR) || (idma_stat & IDMA_STAT_ERR)))
266 struct ata_queued_cmd *qc = 377 inic_host_err_intr(ap, irq_stat, idma_stat);
267 ata_qc_from_tag(ap, ap->link.active_tag);
268 378
269 if (unlikely(!qc || (qc->tf.flags & ATA_TFLAG_POLLING))) { 379 if (unlikely(!qc))
270 ap->ops->sff_check_status(ap); /* clear ATA interrupt */ 380 goto spurious;
271 return;
272 }
273 381
274 if (likely(ata_sff_host_intr(ap, qc))) 382 if (likely(idma_stat & IDMA_STAT_DONE)) {
275 return; 383 inic_stop_idma(ap);
276 384
277 ap->ops->sff_check_status(ap); /* clear ATA interrupt */ 385 /* Depending on circumstances, device error
278 ata_port_printk(ap, KERN_WARNING, "unhandled " 386 * isn't reported by IDMA, check it explicitly.
279 "interrupt, irq_stat=%x\n", irq_stat); 387 */
388 if (unlikely(readb(port_base + PORT_TF_COMMAND) &
389 (ATA_DF | ATA_ERR)))
390 qc->err_mask |= AC_ERR_DEV;
391
392 ata_qc_complete(qc);
280 return; 393 return;
281 } 394 }
282 395
283 /* error */ 396 spurious:
284 ata_ehi_push_desc(ehi, "irq_stat=0x%x", irq_stat); 397 ata_port_printk(ap, KERN_WARNING, "unhandled interrupt: "
285 398 "cmd=0x%x irq_stat=0x%x idma_stat=0x%x\n",
286 if (irq_stat & (PIRQ_OFFLINE | PIRQ_ONLINE)) { 399 qc ? qc->tf.command : 0xff, irq_stat, idma_stat);
287 ata_ehi_hotplugged(ehi);
288 ata_port_freeze(ap);
289 } else
290 ata_port_abort(ap);
291} 400}
292 401
293static irqreturn_t inic_interrupt(int irq, void *dev_instance) 402static irqreturn_t inic_interrupt(int irq, void *dev_instance)
294{ 403{
295 struct ata_host *host = dev_instance; 404 struct ata_host *host = dev_instance;
296 void __iomem *mmio_base = host->iomap[MMIO_BAR]; 405 struct inic_host_priv *hpriv = host->private_data;
297 u16 host_irq_stat; 406 u16 host_irq_stat;
298 int i, handled = 0;; 407 int i, handled = 0;;
299 408
300 host_irq_stat = readw(mmio_base + HOST_IRQ_STAT); 409 host_irq_stat = readw(hpriv->mmio_base + HOST_IRQ_STAT);
301 410
302 if (unlikely(!(host_irq_stat & HIRQ_GLOBAL))) 411 if (unlikely(!(host_irq_stat & HIRQ_GLOBAL)))
303 goto out; 412 goto out;
@@ -327,60 +436,173 @@ static irqreturn_t inic_interrupt(int irq, void *dev_instance)
327 return IRQ_RETVAL(handled); 436 return IRQ_RETVAL(handled);
328} 437}
329 438
439static int inic_check_atapi_dma(struct ata_queued_cmd *qc)
440{
441 /* For some reason ATAPI_PROT_DMA doesn't work for some
442 * commands including writes and other misc ops. Use PIO
443 * protocol instead, which BTW is driven by the DMA engine
444 * anyway, so it shouldn't make much difference for native
445 * SATA devices.
446 */
447 if (atapi_cmd_type(qc->cdb[0]) == READ)
448 return 0;
449 return 1;
450}
451
452static void inic_fill_sg(struct inic_prd *prd, struct ata_queued_cmd *qc)
453{
454 struct scatterlist *sg;
455 unsigned int si;
456 u8 flags = 0;
457
458 if (qc->tf.flags & ATA_TFLAG_WRITE)
459 flags |= PRD_WRITE;
460
461 if (ata_is_dma(qc->tf.protocol))
462 flags |= PRD_DMA;
463
464 for_each_sg(qc->sg, sg, qc->n_elem, si) {
465 prd->mad = cpu_to_le32(sg_dma_address(sg));
466 prd->len = cpu_to_le16(sg_dma_len(sg));
467 prd->flags = flags;
468 prd++;
469 }
470
471 WARN_ON(!si);
472 prd[-1].flags |= PRD_END;
473}
474
475static void inic_qc_prep(struct ata_queued_cmd *qc)
476{
477 struct inic_port_priv *pp = qc->ap->private_data;
478 struct inic_pkt *pkt = pp->pkt;
479 struct inic_cpb *cpb = &pkt->cpb;
480 struct inic_prd *prd = pkt->prd;
481 bool is_atapi = ata_is_atapi(qc->tf.protocol);
482 bool is_data = ata_is_data(qc->tf.protocol);
483 unsigned int cdb_len = 0;
484
485 VPRINTK("ENTER\n");
486
487 if (is_atapi)
488 cdb_len = qc->dev->cdb_len;
489
490 /* prepare packet, based on initio driver */
491 memset(pkt, 0, sizeof(struct inic_pkt));
492
493 cpb->ctl_flags = CPB_CTL_VALID | CPB_CTL_IEN;
494 if (is_atapi || is_data)
495 cpb->ctl_flags |= CPB_CTL_DATA;
496
497 cpb->len = cpu_to_le32(qc->nbytes + cdb_len);
498 cpb->prd = cpu_to_le32(pp->pkt_dma + offsetof(struct inic_pkt, prd));
499
500 cpb->device = qc->tf.device;
501 cpb->feature = qc->tf.feature;
502 cpb->nsect = qc->tf.nsect;
503 cpb->lbal = qc->tf.lbal;
504 cpb->lbam = qc->tf.lbam;
505 cpb->lbah = qc->tf.lbah;
506
507 if (qc->tf.flags & ATA_TFLAG_LBA48) {
508 cpb->hob_feature = qc->tf.hob_feature;
509 cpb->hob_nsect = qc->tf.hob_nsect;
510 cpb->hob_lbal = qc->tf.hob_lbal;
511 cpb->hob_lbam = qc->tf.hob_lbam;
512 cpb->hob_lbah = qc->tf.hob_lbah;
513 }
514
515 cpb->command = qc->tf.command;
516 /* don't load ctl - dunno why. it's like that in the initio driver */
517
518 /* setup PRD for CDB */
519 if (is_atapi) {
520 memcpy(pkt->cdb, qc->cdb, ATAPI_CDB_LEN);
521 prd->mad = cpu_to_le32(pp->pkt_dma +
522 offsetof(struct inic_pkt, cdb));
523 prd->len = cpu_to_le16(cdb_len);
524 prd->flags = PRD_CDB | PRD_WRITE;
525 if (!is_data)
526 prd->flags |= PRD_END;
527 prd++;
528 }
529
530 /* setup sg table */
531 if (is_data)
532 inic_fill_sg(prd, qc);
533
534 pp->cpb_tbl[0] = pp->pkt_dma;
535}
536
330static unsigned int inic_qc_issue(struct ata_queued_cmd *qc) 537static unsigned int inic_qc_issue(struct ata_queued_cmd *qc)
331{ 538{
332 struct ata_port *ap = qc->ap; 539 struct ata_port *ap = qc->ap;
540 void __iomem *port_base = inic_port_base(ap);
333 541
334 /* ATA IRQ doesn't wait for DMA transfer completion and vice 542 /* fire up the ADMA engine */
335 * versa. Mask IRQ selectively to detect command completion. 543 writew(HCTL_FTHD0, port_base + HOST_CTL);
336 * Without it, ATA DMA read command can cause data corruption. 544 writew(IDMA_CTL_GO, port_base + PORT_IDMA_CTL);
337 * 545 writeb(0, port_base + PORT_CPB_PTQFIFO);
338 * Something similar might be needed for ATAPI writes. I 546
339 * tried a lot of combinations but couldn't find the solution. 547 return 0;
340 */ 548}
341 if (qc->tf.protocol == ATA_PROT_DMA && 549
342 !(qc->tf.flags & ATA_TFLAG_WRITE)) 550static void inic_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
343 inic_set_pirq_mask(ap, PIRQ_MASK_DMA_READ); 551{
344 else 552 void __iomem *port_base = inic_port_base(ap);
345 inic_set_pirq_mask(ap, PIRQ_MASK_OTHER); 553
554 tf->feature = readb(port_base + PORT_TF_FEATURE);
555 tf->nsect = readb(port_base + PORT_TF_NSECT);
556 tf->lbal = readb(port_base + PORT_TF_LBAL);
557 tf->lbam = readb(port_base + PORT_TF_LBAM);
558 tf->lbah = readb(port_base + PORT_TF_LBAH);
559 tf->device = readb(port_base + PORT_TF_DEVICE);
560 tf->command = readb(port_base + PORT_TF_COMMAND);
561}
346 562
347 /* Issuing a command to yet uninitialized port locks up the 563static bool inic_qc_fill_rtf(struct ata_queued_cmd *qc)
348 * controller. Most of the time, this happens for the first 564{
349 * command after reset which are ATA and ATAPI IDENTIFYs. 565 struct ata_taskfile *rtf = &qc->result_tf;
350 * Fast fail if stat is 0x7f or 0xff for those commands. 566 struct ata_taskfile tf;
567
568 /* FIXME: Except for status and error, result TF access
569 * doesn't work. I tried reading from BAR0/2, CPB and BAR5.
570 * None works regardless of which command interface is used.
571 * For now return true iff status indicates device error.
572 * This means that we're reporting bogus sector for RW
573 * failures. Eeekk....
351 */ 574 */
352 if (unlikely(qc->tf.command == ATA_CMD_ID_ATA || 575 inic_tf_read(qc->ap, &tf);
353 qc->tf.command == ATA_CMD_ID_ATAPI)) {
354 u8 stat = ap->ops->sff_check_status(ap);
355 if (stat == 0x7f || stat == 0xff)
356 return AC_ERR_HSM;
357 }
358 576
359 return ata_sff_qc_issue(qc); 577 if (!(tf.command & ATA_ERR))
578 return false;
579
580 rtf->command = tf.command;
581 rtf->feature = tf.feature;
582 return true;
360} 583}
361 584
362static void inic_freeze(struct ata_port *ap) 585static void inic_freeze(struct ata_port *ap)
363{ 586{
364 void __iomem *port_base = inic_port_base(ap); 587 void __iomem *port_base = inic_port_base(ap);
365 588
366 __inic_set_pirq_mask(ap, PIRQ_MASK_FREEZE); 589 writeb(PIRQ_MASK_FREEZE, port_base + PORT_IRQ_MASK);
367
368 ap->ops->sff_check_status(ap);
369 writeb(0xff, port_base + PORT_IRQ_STAT); 590 writeb(0xff, port_base + PORT_IRQ_STAT);
370
371 readb(port_base + PORT_IRQ_STAT); /* flush */
372} 591}
373 592
374static void inic_thaw(struct ata_port *ap) 593static void inic_thaw(struct ata_port *ap)
375{ 594{
376 void __iomem *port_base = inic_port_base(ap); 595 void __iomem *port_base = inic_port_base(ap);
377 596
378 ap->ops->sff_check_status(ap);
379 writeb(0xff, port_base + PORT_IRQ_STAT); 597 writeb(0xff, port_base + PORT_IRQ_STAT);
598 writeb(PIRQ_MASK_DEFAULT, port_base + PORT_IRQ_MASK);
599}
380 600
381 __inic_set_pirq_mask(ap, PIRQ_MASK_OTHER); 601static int inic_check_ready(struct ata_link *link)
602{
603 void __iomem *port_base = inic_port_base(link->ap);
382 604
383 readb(port_base + PORT_IRQ_STAT); /* flush */ 605 return ata_check_ready(readb(port_base + PORT_TF_COMMAND));
384} 606}
385 607
386/* 608/*
@@ -394,17 +616,15 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class,
394 void __iomem *port_base = inic_port_base(ap); 616 void __iomem *port_base = inic_port_base(ap);
395 void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; 617 void __iomem *idma_ctl = port_base + PORT_IDMA_CTL;
396 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); 618 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
397 u16 val;
398 int rc; 619 int rc;
399 620
400 /* hammer it into sane state */ 621 /* hammer it into sane state */
401 inic_reset_port(port_base); 622 inic_reset_port(port_base);
402 623
403 val = readw(idma_ctl); 624 writew(IDMA_CTL_RST_ATA, idma_ctl);
404 writew(val | IDMA_CTL_RST_ATA, idma_ctl);
405 readw(idma_ctl); /* flush */ 625 readw(idma_ctl); /* flush */
406 msleep(1); 626 msleep(1);
407 writew(val & ~IDMA_CTL_RST_ATA, idma_ctl); 627 writew(0, idma_ctl);
408 628
409 rc = sata_link_resume(link, timing, deadline); 629 rc = sata_link_resume(link, timing, deadline);
410 if (rc) { 630 if (rc) {
@@ -418,7 +638,7 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class,
418 struct ata_taskfile tf; 638 struct ata_taskfile tf;
419 639
420 /* wait for link to become ready */ 640 /* wait for link to become ready */
421 rc = ata_sff_wait_after_reset(link, 1, deadline); 641 rc = ata_wait_after_reset(link, deadline, inic_check_ready);
422 /* link occupied, -ENODEV too is an error */ 642 /* link occupied, -ENODEV too is an error */
423 if (rc) { 643 if (rc) {
424 ata_link_printk(link, KERN_WARNING, "device not ready " 644 ata_link_printk(link, KERN_WARNING, "device not ready "
@@ -426,7 +646,7 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class,
426 return rc; 646 return rc;
427 } 647 }
428 648
429 ata_sff_tf_read(ap, &tf); 649 inic_tf_read(ap, &tf);
430 *class = ata_dev_classify(&tf); 650 *class = ata_dev_classify(&tf);
431 } 651 }
432 652
@@ -436,18 +656,8 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class,
436static void inic_error_handler(struct ata_port *ap) 656static void inic_error_handler(struct ata_port *ap)
437{ 657{
438 void __iomem *port_base = inic_port_base(ap); 658 void __iomem *port_base = inic_port_base(ap);
439 struct inic_port_priv *pp = ap->private_data;
440 unsigned long flags;
441 659
442 /* reset PIO HSM and stop DMA engine */
443 inic_reset_port(port_base); 660 inic_reset_port(port_base);
444
445 spin_lock_irqsave(ap->lock, flags);
446 ap->hsm_task_state = HSM_ST_IDLE;
447 writeb(pp->dfl_prdctl, port_base + PORT_PRD_CTL);
448 spin_unlock_irqrestore(ap->lock, flags);
449
450 /* PIO and DMA engines have been stopped, perform recovery */
451 ata_std_error_handler(ap); 661 ata_std_error_handler(ap);
452} 662}
453 663
@@ -458,26 +668,18 @@ static void inic_post_internal_cmd(struct ata_queued_cmd *qc)
458 inic_reset_port(inic_port_base(qc->ap)); 668 inic_reset_port(inic_port_base(qc->ap));
459} 669}
460 670
461static void inic_dev_config(struct ata_device *dev)
462{
463 /* inic can only handle upto LBA28 max sectors */
464 if (dev->max_sectors > ATA_MAX_SECTORS)
465 dev->max_sectors = ATA_MAX_SECTORS;
466
467 if (dev->n_sectors >= 1 << 28) {
468 ata_dev_printk(dev, KERN_ERR,
469 "ERROR: This driver doesn't support LBA48 yet and may cause\n"
470 " data corruption on such devices. Disabling.\n");
471 ata_dev_disable(dev);
472 }
473}
474
475static void init_port(struct ata_port *ap) 671static void init_port(struct ata_port *ap)
476{ 672{
477 void __iomem *port_base = inic_port_base(ap); 673 void __iomem *port_base = inic_port_base(ap);
674 struct inic_port_priv *pp = ap->private_data;
478 675
479 /* Setup PRD address */ 676 /* clear packet and CPB table */
677 memset(pp->pkt, 0, sizeof(struct inic_pkt));
678 memset(pp->cpb_tbl, 0, IDMA_CPB_TBL_SIZE);
679
680 /* setup PRD and CPB lookup table addresses */
480 writel(ap->prd_dma, port_base + PORT_PRD_ADDR); 681 writel(ap->prd_dma, port_base + PORT_PRD_ADDR);
682 writel(pp->cpb_tbl_dma, port_base + PORT_CPB_CPBLAR);
481} 683}
482 684
483static int inic_port_resume(struct ata_port *ap) 685static int inic_port_resume(struct ata_port *ap)
@@ -488,28 +690,30 @@ static int inic_port_resume(struct ata_port *ap)
488 690
489static int inic_port_start(struct ata_port *ap) 691static int inic_port_start(struct ata_port *ap)
490{ 692{
491 void __iomem *port_base = inic_port_base(ap); 693 struct device *dev = ap->host->dev;
492 struct inic_port_priv *pp; 694 struct inic_port_priv *pp;
493 u8 tmp;
494 int rc; 695 int rc;
495 696
496 /* alloc and initialize private data */ 697 /* alloc and initialize private data */
497 pp = devm_kzalloc(ap->host->dev, sizeof(*pp), GFP_KERNEL); 698 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL);
498 if (!pp) 699 if (!pp)
499 return -ENOMEM; 700 return -ENOMEM;
500 ap->private_data = pp; 701 ap->private_data = pp;
501 702
502 /* default PRD_CTL value, DMAEN, WR and START off */
503 tmp = readb(port_base + PORT_PRD_CTL);
504 tmp &= ~(PRD_CTL_DMAEN | PRD_CTL_WR | PRD_CTL_START);
505 pp->dfl_prdctl = tmp;
506
507 /* Alloc resources */ 703 /* Alloc resources */
508 rc = ata_port_start(ap); 704 rc = ata_port_start(ap);
509 if (rc) { 705 if (rc)
510 kfree(pp);
511 return rc; 706 return rc;
512 } 707
708 pp->pkt = dmam_alloc_coherent(dev, sizeof(struct inic_pkt),
709 &pp->pkt_dma, GFP_KERNEL);
710 if (!pp->pkt)
711 return -ENOMEM;
712
713 pp->cpb_tbl = dmam_alloc_coherent(dev, IDMA_CPB_TBL_SIZE,
714 &pp->cpb_tbl_dma, GFP_KERNEL);
715 if (!pp->cpb_tbl)
716 return -ENOMEM;
513 717
514 init_port(ap); 718 init_port(ap);
515 719
@@ -517,21 +721,18 @@ static int inic_port_start(struct ata_port *ap)
517} 721}
518 722
519static struct ata_port_operations inic_port_ops = { 723static struct ata_port_operations inic_port_ops = {
520 .inherits = &ata_sff_port_ops, 724 .inherits = &sata_port_ops,
521 725
522 .bmdma_setup = inic_bmdma_setup, 726 .check_atapi_dma = inic_check_atapi_dma,
523 .bmdma_start = inic_bmdma_start, 727 .qc_prep = inic_qc_prep,
524 .bmdma_stop = inic_bmdma_stop,
525 .bmdma_status = inic_bmdma_status,
526 .qc_issue = inic_qc_issue, 728 .qc_issue = inic_qc_issue,
729 .qc_fill_rtf = inic_qc_fill_rtf,
527 730
528 .freeze = inic_freeze, 731 .freeze = inic_freeze,
529 .thaw = inic_thaw, 732 .thaw = inic_thaw,
530 .softreset = ATA_OP_NULL, /* softreset is broken */
531 .hardreset = inic_hardreset, 733 .hardreset = inic_hardreset,
532 .error_handler = inic_error_handler, 734 .error_handler = inic_error_handler,
533 .post_internal_cmd = inic_post_internal_cmd, 735 .post_internal_cmd = inic_post_internal_cmd,
534 .dev_config = inic_dev_config,
535 736
536 .scr_read = inic_scr_read, 737 .scr_read = inic_scr_read,
537 .scr_write = inic_scr_write, 738 .scr_write = inic_scr_write,
@@ -541,12 +742,6 @@ static struct ata_port_operations inic_port_ops = {
541}; 742};
542 743
543static struct ata_port_info inic_port_info = { 744static struct ata_port_info inic_port_info = {
544 /* For some reason, ATAPI_PROT_PIO is broken on this
545 * controller, and no, PIO_POLLING does't fix it. It somehow
546 * manages to report the wrong ireason and ignoring ireason
547 * results in machine lock up. Tell libata to always prefer
548 * DMA.
549 */
550 .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA, 745 .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA,
551 .pio_mask = 0x1f, /* pio0-4 */ 746 .pio_mask = 0x1f, /* pio0-4 */
552 .mwdma_mask = 0x07, /* mwdma0-2 */ 747 .mwdma_mask = 0x07, /* mwdma0-2 */
@@ -599,7 +794,6 @@ static int inic_pci_device_resume(struct pci_dev *pdev)
599{ 794{
600 struct ata_host *host = dev_get_drvdata(&pdev->dev); 795 struct ata_host *host = dev_get_drvdata(&pdev->dev);
601 struct inic_host_priv *hpriv = host->private_data; 796 struct inic_host_priv *hpriv = host->private_data;
602 void __iomem *mmio_base = host->iomap[MMIO_BAR];
603 int rc; 797 int rc;
604 798
605 rc = ata_pci_device_do_resume(pdev); 799 rc = ata_pci_device_do_resume(pdev);
@@ -607,7 +801,7 @@ static int inic_pci_device_resume(struct pci_dev *pdev)
607 return rc; 801 return rc;
608 802
609 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { 803 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) {
610 rc = init_controller(mmio_base, hpriv->cached_hctl); 804 rc = init_controller(hpriv->mmio_base, hpriv->cached_hctl);
611 if (rc) 805 if (rc)
612 return rc; 806 return rc;
613 } 807 }
@@ -625,6 +819,7 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
625 struct ata_host *host; 819 struct ata_host *host;
626 struct inic_host_priv *hpriv; 820 struct inic_host_priv *hpriv;
627 void __iomem * const *iomap; 821 void __iomem * const *iomap;
822 int mmio_bar;
628 int i, rc; 823 int i, rc;
629 824
630 if (!printed_version++) 825 if (!printed_version++)
@@ -638,38 +833,31 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
638 833
639 host->private_data = hpriv; 834 host->private_data = hpriv;
640 835
641 /* acquire resources and fill host */ 836 /* Acquire resources and fill host. Note that PCI and cardbus
837 * use different BARs.
838 */
642 rc = pcim_enable_device(pdev); 839 rc = pcim_enable_device(pdev);
643 if (rc) 840 if (rc)
644 return rc; 841 return rc;
645 842
646 rc = pcim_iomap_regions(pdev, 0x3f, DRV_NAME); 843 if (pci_resource_flags(pdev, MMIO_BAR_PCI) & IORESOURCE_MEM)
844 mmio_bar = MMIO_BAR_PCI;
845 else
846 mmio_bar = MMIO_BAR_CARDBUS;
847
848 rc = pcim_iomap_regions(pdev, 1 << mmio_bar, DRV_NAME);
647 if (rc) 849 if (rc)
648 return rc; 850 return rc;
649 host->iomap = iomap = pcim_iomap_table(pdev); 851 host->iomap = iomap = pcim_iomap_table(pdev);
852 hpriv->mmio_base = iomap[mmio_bar];
853 hpriv->cached_hctl = readw(hpriv->mmio_base + HOST_CTL);
650 854
651 for (i = 0; i < NR_PORTS; i++) { 855 for (i = 0; i < NR_PORTS; i++) {
652 struct ata_port *ap = host->ports[i]; 856 struct ata_port *ap = host->ports[i];
653 struct ata_ioports *port = &ap->ioaddr;
654 unsigned int offset = i * PORT_SIZE;
655
656 port->cmd_addr = iomap[2 * i];
657 port->altstatus_addr =
658 port->ctl_addr = (void __iomem *)
659 ((unsigned long)iomap[2 * i + 1] | ATA_PCI_CTL_OFS);
660 port->scr_addr = iomap[MMIO_BAR] + offset + PORT_SCR;
661
662 ata_sff_std_ports(port);
663
664 ata_port_pbar_desc(ap, MMIO_BAR, -1, "mmio");
665 ata_port_pbar_desc(ap, MMIO_BAR, offset, "port");
666 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
667 (unsigned long long)pci_resource_start(pdev, 2 * i),
668 (unsigned long long)pci_resource_start(pdev, (2 * i + 1)) |
669 ATA_PCI_CTL_OFS);
670 }
671 857
672 hpriv->cached_hctl = readw(iomap[MMIO_BAR] + HOST_CTL); 858 ata_port_pbar_desc(ap, mmio_bar, -1, "mmio");
859 ata_port_pbar_desc(ap, mmio_bar, i * PORT_SIZE, "port");
860 }
673 861
674 /* Set dma_mask. This devices doesn't support 64bit addressing. */ 862 /* Set dma_mask. This devices doesn't support 64bit addressing. */
675 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 863 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
@@ -698,7 +886,7 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
698 return rc; 886 return rc;
699 } 887 }
700 888
701 rc = init_controller(iomap[MMIO_BAR], hpriv->cached_hctl); 889 rc = init_controller(hpriv->mmio_base, hpriv->cached_hctl);
702 if (rc) { 890 if (rc) {
703 dev_printk(KERN_ERR, &pdev->dev, 891 dev_printk(KERN_ERR, &pdev->dev,
704 "failed to initialize controller\n"); 892 "failed to initialize controller\n");
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 842b1a15b78c..bb73b2222627 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -65,6 +65,7 @@
65#include <linux/platform_device.h> 65#include <linux/platform_device.h>
66#include <linux/ata_platform.h> 66#include <linux/ata_platform.h>
67#include <linux/mbus.h> 67#include <linux/mbus.h>
68#include <linux/bitops.h>
68#include <scsi/scsi_host.h> 69#include <scsi/scsi_host.h>
69#include <scsi/scsi_cmnd.h> 70#include <scsi/scsi_cmnd.h>
70#include <scsi/scsi_device.h> 71#include <scsi/scsi_device.h>
@@ -91,9 +92,9 @@ enum {
91 MV_IRQ_COAL_TIME_THRESHOLD = (MV_IRQ_COAL_REG_BASE + 0xd0), 92 MV_IRQ_COAL_TIME_THRESHOLD = (MV_IRQ_COAL_REG_BASE + 0xd0),
92 93
93 MV_SATAHC0_REG_BASE = 0x20000, 94 MV_SATAHC0_REG_BASE = 0x20000,
94 MV_FLASH_CTL = 0x1046c, 95 MV_FLASH_CTL_OFS = 0x1046c,
95 MV_GPIO_PORT_CTL = 0x104f0, 96 MV_GPIO_PORT_CTL_OFS = 0x104f0,
96 MV_RESET_CFG = 0x180d8, 97 MV_RESET_CFG_OFS = 0x180d8,
97 98
98 MV_PCI_REG_SZ = MV_MAJOR_REG_AREA_SZ, 99 MV_PCI_REG_SZ = MV_MAJOR_REG_AREA_SZ,
99 MV_SATAHC_REG_SZ = MV_MAJOR_REG_AREA_SZ, 100 MV_SATAHC_REG_SZ = MV_MAJOR_REG_AREA_SZ,
@@ -147,18 +148,21 @@ enum {
147 /* PCI interface registers */ 148 /* PCI interface registers */
148 149
149 PCI_COMMAND_OFS = 0xc00, 150 PCI_COMMAND_OFS = 0xc00,
151 PCI_COMMAND_MRDTRIG = (1 << 7), /* PCI Master Read Trigger */
150 152
151 PCI_MAIN_CMD_STS_OFS = 0xd30, 153 PCI_MAIN_CMD_STS_OFS = 0xd30,
152 STOP_PCI_MASTER = (1 << 2), 154 STOP_PCI_MASTER = (1 << 2),
153 PCI_MASTER_EMPTY = (1 << 3), 155 PCI_MASTER_EMPTY = (1 << 3),
154 GLOB_SFT_RST = (1 << 4), 156 GLOB_SFT_RST = (1 << 4),
155 157
156 MV_PCI_MODE = 0xd00, 158 MV_PCI_MODE_OFS = 0xd00,
159 MV_PCI_MODE_MASK = 0x30,
160
157 MV_PCI_EXP_ROM_BAR_CTL = 0xd2c, 161 MV_PCI_EXP_ROM_BAR_CTL = 0xd2c,
158 MV_PCI_DISC_TIMER = 0xd04, 162 MV_PCI_DISC_TIMER = 0xd04,
159 MV_PCI_MSI_TRIGGER = 0xc38, 163 MV_PCI_MSI_TRIGGER = 0xc38,
160 MV_PCI_SERR_MASK = 0xc28, 164 MV_PCI_SERR_MASK = 0xc28,
161 MV_PCI_XBAR_TMOUT = 0x1d04, 165 MV_PCI_XBAR_TMOUT_OFS = 0x1d04,
162 MV_PCI_ERR_LOW_ADDRESS = 0x1d40, 166 MV_PCI_ERR_LOW_ADDRESS = 0x1d40,
163 MV_PCI_ERR_HIGH_ADDRESS = 0x1d44, 167 MV_PCI_ERR_HIGH_ADDRESS = 0x1d44,
164 MV_PCI_ERR_ATTRIBUTE = 0x1d48, 168 MV_PCI_ERR_ATTRIBUTE = 0x1d48,
@@ -225,16 +229,18 @@ enum {
225 PHY_MODE4 = 0x314, 229 PHY_MODE4 = 0x314,
226 PHY_MODE2 = 0x330, 230 PHY_MODE2 = 0x330,
227 SATA_IFCTL_OFS = 0x344, 231 SATA_IFCTL_OFS = 0x344,
232 SATA_TESTCTL_OFS = 0x348,
228 SATA_IFSTAT_OFS = 0x34c, 233 SATA_IFSTAT_OFS = 0x34c,
229 VENDOR_UNIQUE_FIS_OFS = 0x35c, 234 VENDOR_UNIQUE_FIS_OFS = 0x35c,
230 235
231 FIS_CFG_OFS = 0x360, 236 FISCFG_OFS = 0x360,
232 FIS_CFG_SINGLE_SYNC = (1 << 16), /* SYNC on DMA activation */ 237 FISCFG_WAIT_DEV_ERR = (1 << 8), /* wait for host on DevErr */
238 FISCFG_SINGLE_SYNC = (1 << 16), /* SYNC on DMA activation */
233 239
234 MV5_PHY_MODE = 0x74, 240 MV5_PHY_MODE = 0x74,
235 MV5_LT_MODE = 0x30, 241 MV5_LTMODE_OFS = 0x30,
236 MV5_PHY_CTL = 0x0C, 242 MV5_PHY_CTL_OFS = 0x0C,
237 SATA_INTERFACE_CFG = 0x050, 243 SATA_INTERFACE_CFG_OFS = 0x050,
238 244
239 MV_M2_PREAMP_MASK = 0x7e0, 245 MV_M2_PREAMP_MASK = 0x7e0,
240 246
@@ -332,10 +338,16 @@ enum {
332 EDMA_CMD_OFS = 0x28, /* EDMA command register */ 338 EDMA_CMD_OFS = 0x28, /* EDMA command register */
333 EDMA_EN = (1 << 0), /* enable EDMA */ 339 EDMA_EN = (1 << 0), /* enable EDMA */
334 EDMA_DS = (1 << 1), /* disable EDMA; self-negated */ 340 EDMA_DS = (1 << 1), /* disable EDMA; self-negated */
335 ATA_RST = (1 << 2), /* reset trans/link/phy */ 341 EDMA_RESET = (1 << 2), /* reset eng/trans/link/phy */
342
343 EDMA_STATUS_OFS = 0x30, /* EDMA engine status */
344 EDMA_STATUS_CACHE_EMPTY = (1 << 6), /* GenIIe command cache empty */
345 EDMA_STATUS_IDLE = (1 << 7), /* GenIIe EDMA enabled/idle */
336 346
337 EDMA_IORDY_TMOUT = 0x34, 347 EDMA_IORDY_TMOUT_OFS = 0x34,
338 EDMA_ARB_CFG = 0x38, 348 EDMA_ARB_CFG_OFS = 0x38,
349
350 EDMA_HALTCOND_OFS = 0x60, /* GenIIe halt conditions */
339 351
340 GEN_II_NCQ_MAX_SECTORS = 256, /* max sects/io on Gen2 w/NCQ */ 352 GEN_II_NCQ_MAX_SECTORS = 256, /* max sects/io on Gen2 w/NCQ */
341 353
@@ -350,15 +362,19 @@ enum {
350 MV_HP_GEN_II = (1 << 7), /* Generation II: 60xx */ 362 MV_HP_GEN_II = (1 << 7), /* Generation II: 60xx */
351 MV_HP_GEN_IIE = (1 << 8), /* Generation IIE: 6042/7042 */ 363 MV_HP_GEN_IIE = (1 << 8), /* Generation IIE: 6042/7042 */
352 MV_HP_PCIE = (1 << 9), /* PCIe bus/regs: 7042 */ 364 MV_HP_PCIE = (1 << 9), /* PCIe bus/regs: 7042 */
365 MV_HP_CUT_THROUGH = (1 << 10), /* can use EDMA cut-through */
353 366
354 /* Port private flags (pp_flags) */ 367 /* Port private flags (pp_flags) */
355 MV_PP_FLAG_EDMA_EN = (1 << 0), /* is EDMA engine enabled? */ 368 MV_PP_FLAG_EDMA_EN = (1 << 0), /* is EDMA engine enabled? */
356 MV_PP_FLAG_NCQ_EN = (1 << 1), /* is EDMA set up for NCQ? */ 369 MV_PP_FLAG_NCQ_EN = (1 << 1), /* is EDMA set up for NCQ? */
370 MV_PP_FLAG_FBS_EN = (1 << 2), /* is EDMA set up for FBS? */
371 MV_PP_FLAG_DELAYED_EH = (1 << 3), /* delayed dev err handling */
357}; 372};
358 373
359#define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I) 374#define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I)
360#define IS_GEN_II(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_II) 375#define IS_GEN_II(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_II)
361#define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE) 376#define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE)
377#define IS_PCIE(hpriv) ((hpriv)->hp_flags & MV_HP_PCIE)
362#define HAS_PCI(host) (!((host)->ports[0]->flags & MV_FLAG_SOC)) 378#define HAS_PCI(host) (!((host)->ports[0]->flags & MV_FLAG_SOC))
363 379
364#define WINDOW_CTRL(i) (0x20030 + ((i) << 4)) 380#define WINDOW_CTRL(i) (0x20030 + ((i) << 4))
@@ -433,6 +449,7 @@ struct mv_port_priv {
433 unsigned int resp_idx; 449 unsigned int resp_idx;
434 450
435 u32 pp_flags; 451 u32 pp_flags;
452 unsigned int delayed_eh_pmp_map;
436}; 453};
437 454
438struct mv_port_signal { 455struct mv_port_signal {
@@ -479,6 +496,7 @@ static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val);
479static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); 496static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val);
480static int mv_port_start(struct ata_port *ap); 497static int mv_port_start(struct ata_port *ap);
481static void mv_port_stop(struct ata_port *ap); 498static void mv_port_stop(struct ata_port *ap);
499static int mv_qc_defer(struct ata_queued_cmd *qc);
482static void mv_qc_prep(struct ata_queued_cmd *qc); 500static void mv_qc_prep(struct ata_queued_cmd *qc);
483static void mv_qc_prep_iie(struct ata_queued_cmd *qc); 501static void mv_qc_prep_iie(struct ata_queued_cmd *qc);
484static unsigned int mv_qc_issue(struct ata_queued_cmd *qc); 502static unsigned int mv_qc_issue(struct ata_queued_cmd *qc);
@@ -527,6 +545,9 @@ static int mv_pmp_hardreset(struct ata_link *link, unsigned int *class,
527 unsigned long deadline); 545 unsigned long deadline);
528static int mv_softreset(struct ata_link *link, unsigned int *class, 546static int mv_softreset(struct ata_link *link, unsigned int *class,
529 unsigned long deadline); 547 unsigned long deadline);
548static void mv_pmp_error_handler(struct ata_port *ap);
549static void mv_process_crpb_entries(struct ata_port *ap,
550 struct mv_port_priv *pp);
530 551
531/* .sg_tablesize is (MV_MAX_SG_CT / 2) in the structures below 552/* .sg_tablesize is (MV_MAX_SG_CT / 2) in the structures below
532 * because we have to allow room for worst case splitting of 553 * because we have to allow room for worst case splitting of
@@ -548,6 +569,7 @@ static struct scsi_host_template mv6_sht = {
548static struct ata_port_operations mv5_ops = { 569static struct ata_port_operations mv5_ops = {
549 .inherits = &ata_sff_port_ops, 570 .inherits = &ata_sff_port_ops,
550 571
572 .qc_defer = mv_qc_defer,
551 .qc_prep = mv_qc_prep, 573 .qc_prep = mv_qc_prep,
552 .qc_issue = mv_qc_issue, 574 .qc_issue = mv_qc_issue,
553 575
@@ -566,7 +588,6 @@ static struct ata_port_operations mv5_ops = {
566 588
567static struct ata_port_operations mv6_ops = { 589static struct ata_port_operations mv6_ops = {
568 .inherits = &mv5_ops, 590 .inherits = &mv5_ops,
569 .qc_defer = sata_pmp_qc_defer_cmd_switch,
570 .dev_config = mv6_dev_config, 591 .dev_config = mv6_dev_config,
571 .scr_read = mv_scr_read, 592 .scr_read = mv_scr_read,
572 .scr_write = mv_scr_write, 593 .scr_write = mv_scr_write,
@@ -574,12 +595,11 @@ static struct ata_port_operations mv6_ops = {
574 .pmp_hardreset = mv_pmp_hardreset, 595 .pmp_hardreset = mv_pmp_hardreset,
575 .pmp_softreset = mv_softreset, 596 .pmp_softreset = mv_softreset,
576 .softreset = mv_softreset, 597 .softreset = mv_softreset,
577 .error_handler = sata_pmp_error_handler, 598 .error_handler = mv_pmp_error_handler,
578}; 599};
579 600
580static struct ata_port_operations mv_iie_ops = { 601static struct ata_port_operations mv_iie_ops = {
581 .inherits = &mv6_ops, 602 .inherits = &mv6_ops,
582 .qc_defer = ata_std_qc_defer, /* FIS-based switching */
583 .dev_config = ATA_OP_NULL, 603 .dev_config = ATA_OP_NULL,
584 .qc_prep = mv_qc_prep_iie, 604 .qc_prep = mv_qc_prep_iie,
585}; 605};
@@ -875,6 +895,29 @@ static void mv_start_dma(struct ata_port *ap, void __iomem *port_mmio,
875 } 895 }
876} 896}
877 897
898static void mv_wait_for_edma_empty_idle(struct ata_port *ap)
899{
900 void __iomem *port_mmio = mv_ap_base(ap);
901 const u32 empty_idle = (EDMA_STATUS_CACHE_EMPTY | EDMA_STATUS_IDLE);
902 const int per_loop = 5, timeout = (15 * 1000 / per_loop);
903 int i;
904
905 /*
906 * Wait for the EDMA engine to finish transactions in progress.
907 * No idea what a good "timeout" value might be, but measurements
908 * indicate that it often requires hundreds of microseconds
909 * with two drives in-use. So we use the 15msec value above
910 * as a rough guess at what even more drives might require.
911 */
912 for (i = 0; i < timeout; ++i) {
913 u32 edma_stat = readl(port_mmio + EDMA_STATUS_OFS);
914 if ((edma_stat & empty_idle) == empty_idle)
915 break;
916 udelay(per_loop);
917 }
918 /* ata_port_printk(ap, KERN_INFO, "%s: %u+ usecs\n", __func__, i); */
919}
920
878/** 921/**
879 * mv_stop_edma_engine - Disable eDMA engine 922 * mv_stop_edma_engine - Disable eDMA engine
880 * @port_mmio: io base address 923 * @port_mmio: io base address
@@ -907,6 +950,7 @@ static int mv_stop_edma(struct ata_port *ap)
907 if (!(pp->pp_flags & MV_PP_FLAG_EDMA_EN)) 950 if (!(pp->pp_flags & MV_PP_FLAG_EDMA_EN))
908 return 0; 951 return 0;
909 pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN; 952 pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN;
953 mv_wait_for_edma_empty_idle(ap);
910 if (mv_stop_edma_engine(port_mmio)) { 954 if (mv_stop_edma_engine(port_mmio)) {
911 ata_port_printk(ap, KERN_ERR, "Unable to stop eDMA\n"); 955 ata_port_printk(ap, KERN_ERR, "Unable to stop eDMA\n");
912 return -EIO; 956 return -EIO;
@@ -1057,26 +1101,95 @@ static void mv6_dev_config(struct ata_device *adev)
1057 } 1101 }
1058} 1102}
1059 1103
1060static void mv_config_fbs(void __iomem *port_mmio, int enable_fbs) 1104static int mv_qc_defer(struct ata_queued_cmd *qc)
1061{ 1105{
1062 u32 old_fcfg, new_fcfg, old_ltmode, new_ltmode; 1106 struct ata_link *link = qc->dev->link;
1107 struct ata_port *ap = link->ap;
1108 struct mv_port_priv *pp = ap->private_data;
1109
1110 /*
1111 * Don't allow new commands if we're in a delayed EH state
1112 * for NCQ and/or FIS-based switching.
1113 */
1114 if (pp->pp_flags & MV_PP_FLAG_DELAYED_EH)
1115 return ATA_DEFER_PORT;
1063 /* 1116 /*
1064 * Various bit settings required for operation 1117 * If the port is completely idle, then allow the new qc.
1065 * in FIS-based switching (fbs) mode on GenIIe:
1066 */ 1118 */
1067 old_fcfg = readl(port_mmio + FIS_CFG_OFS); 1119 if (ap->nr_active_links == 0)
1068 old_ltmode = readl(port_mmio + LTMODE_OFS); 1120 return 0;
1069 if (enable_fbs) { 1121
1070 new_fcfg = old_fcfg | FIS_CFG_SINGLE_SYNC; 1122 if (pp->pp_flags & MV_PP_FLAG_EDMA_EN) {
1071 new_ltmode = old_ltmode | LTMODE_BIT8; 1123 /*
1072 } else { /* disable fbs */ 1124 * The port is operating in host queuing mode (EDMA).
1073 new_fcfg = old_fcfg & ~FIS_CFG_SINGLE_SYNC; 1125 * It can accomodate a new qc if the qc protocol
1074 new_ltmode = old_ltmode & ~LTMODE_BIT8; 1126 * is compatible with the current host queue mode.
1075 } 1127 */
1076 if (new_fcfg != old_fcfg) 1128 if (pp->pp_flags & MV_PP_FLAG_NCQ_EN) {
1077 writelfl(new_fcfg, port_mmio + FIS_CFG_OFS); 1129 /*
1130 * The host queue (EDMA) is in NCQ mode.
1131 * If the new qc is also an NCQ command,
1132 * then allow the new qc.
1133 */
1134 if (qc->tf.protocol == ATA_PROT_NCQ)
1135 return 0;
1136 } else {
1137 /*
1138 * The host queue (EDMA) is in non-NCQ, DMA mode.
1139 * If the new qc is also a non-NCQ, DMA command,
1140 * then allow the new qc.
1141 */
1142 if (qc->tf.protocol == ATA_PROT_DMA)
1143 return 0;
1144 }
1145 }
1146 return ATA_DEFER_PORT;
1147}
1148
1149static void mv_config_fbs(void __iomem *port_mmio, int want_ncq, int want_fbs)
1150{
1151 u32 new_fiscfg, old_fiscfg;
1152 u32 new_ltmode, old_ltmode;
1153 u32 new_haltcond, old_haltcond;
1154
1155 old_fiscfg = readl(port_mmio + FISCFG_OFS);
1156 old_ltmode = readl(port_mmio + LTMODE_OFS);
1157 old_haltcond = readl(port_mmio + EDMA_HALTCOND_OFS);
1158
1159 new_fiscfg = old_fiscfg & ~(FISCFG_SINGLE_SYNC | FISCFG_WAIT_DEV_ERR);
1160 new_ltmode = old_ltmode & ~LTMODE_BIT8;
1161 new_haltcond = old_haltcond | EDMA_ERR_DEV;
1162
1163 if (want_fbs) {
1164 new_fiscfg = old_fiscfg | FISCFG_SINGLE_SYNC;
1165 new_ltmode = old_ltmode | LTMODE_BIT8;
1166 if (want_ncq)
1167 new_haltcond &= ~EDMA_ERR_DEV;
1168 else
1169 new_fiscfg |= FISCFG_WAIT_DEV_ERR;
1170 }
1171
1172 if (new_fiscfg != old_fiscfg)
1173 writelfl(new_fiscfg, port_mmio + FISCFG_OFS);
1078 if (new_ltmode != old_ltmode) 1174 if (new_ltmode != old_ltmode)
1079 writelfl(new_ltmode, port_mmio + LTMODE_OFS); 1175 writelfl(new_ltmode, port_mmio + LTMODE_OFS);
1176 if (new_haltcond != old_haltcond)
1177 writelfl(new_haltcond, port_mmio + EDMA_HALTCOND_OFS);
1178}
1179
1180static void mv_60x1_errata_sata25(struct ata_port *ap, int want_ncq)
1181{
1182 struct mv_host_priv *hpriv = ap->host->private_data;
1183 u32 old, new;
1184
1185 /* workaround for 88SX60x1 FEr SATA#25 (part 1) */
1186 old = readl(hpriv->base + MV_GPIO_PORT_CTL_OFS);
1187 if (want_ncq)
1188 new = old | (1 << 22);
1189 else
1190 new = old & ~(1 << 22);
1191 if (new != old)
1192 writel(new, hpriv->base + MV_GPIO_PORT_CTL_OFS);
1080} 1193}
1081 1194
1082static void mv_edma_cfg(struct ata_port *ap, int want_ncq) 1195static void mv_edma_cfg(struct ata_port *ap, int want_ncq)
@@ -1088,25 +1201,40 @@ static void mv_edma_cfg(struct ata_port *ap, int want_ncq)
1088 1201
1089 /* set up non-NCQ EDMA configuration */ 1202 /* set up non-NCQ EDMA configuration */
1090 cfg = EDMA_CFG_Q_DEPTH; /* always 0x1f for *all* chips */ 1203 cfg = EDMA_CFG_Q_DEPTH; /* always 0x1f for *all* chips */
1204 pp->pp_flags &= ~MV_PP_FLAG_FBS_EN;
1091 1205
1092 if (IS_GEN_I(hpriv)) 1206 if (IS_GEN_I(hpriv))
1093 cfg |= (1 << 8); /* enab config burst size mask */ 1207 cfg |= (1 << 8); /* enab config burst size mask */
1094 1208
1095 else if (IS_GEN_II(hpriv)) 1209 else if (IS_GEN_II(hpriv)) {
1096 cfg |= EDMA_CFG_RD_BRST_EXT | EDMA_CFG_WR_BUFF_LEN; 1210 cfg |= EDMA_CFG_RD_BRST_EXT | EDMA_CFG_WR_BUFF_LEN;
1211 mv_60x1_errata_sata25(ap, want_ncq);
1097 1212
1098 else if (IS_GEN_IIE(hpriv)) { 1213 } else if (IS_GEN_IIE(hpriv)) {
1099 cfg |= (1 << 23); /* do not mask PM field in rx'd FIS */ 1214 int want_fbs = sata_pmp_attached(ap);
1100 cfg |= (1 << 22); /* enab 4-entry host queue cache */ 1215 /*
1101 cfg |= (1 << 18); /* enab early completion */ 1216 * Possible future enhancement:
1102 cfg |= (1 << 17); /* enab cut-through (dis stor&forwrd) */ 1217 *
1218 * The chip can use FBS with non-NCQ, if we allow it,
1219 * But first we need to have the error handling in place
1220 * for this mode (datasheet section 7.3.15.4.2.3).
1221 * So disallow non-NCQ FBS for now.
1222 */
1223 want_fbs &= want_ncq;
1224
1225 mv_config_fbs(port_mmio, want_ncq, want_fbs);
1103 1226
1104 if (want_ncq && sata_pmp_attached(ap)) { 1227 if (want_fbs) {
1228 pp->pp_flags |= MV_PP_FLAG_FBS_EN;
1105 cfg |= EDMA_CFG_EDMA_FBS; /* FIS-based switching */ 1229 cfg |= EDMA_CFG_EDMA_FBS; /* FIS-based switching */
1106 mv_config_fbs(port_mmio, 1);
1107 } else {
1108 mv_config_fbs(port_mmio, 0);
1109 } 1230 }
1231
1232 cfg |= (1 << 23); /* do not mask PM field in rx'd FIS */
1233 cfg |= (1 << 22); /* enab 4-entry host queue cache */
1234 if (HAS_PCI(ap->host))
1235 cfg |= (1 << 18); /* enab early completion */
1236 if (hpriv->hp_flags & MV_HP_CUT_THROUGH)
1237 cfg |= (1 << 17); /* enab cut-thru (dis stor&forwrd) */
1110 } 1238 }
1111 1239
1112 if (want_ncq) { 1240 if (want_ncq) {
@@ -1483,25 +1611,186 @@ static struct ata_queued_cmd *mv_get_active_qc(struct ata_port *ap)
1483 return qc; 1611 return qc;
1484} 1612}
1485 1613
1486static void mv_unexpected_intr(struct ata_port *ap) 1614static void mv_pmp_error_handler(struct ata_port *ap)
1487{ 1615{
1616 unsigned int pmp, pmp_map;
1488 struct mv_port_priv *pp = ap->private_data; 1617 struct mv_port_priv *pp = ap->private_data;
1489 struct ata_eh_info *ehi = &ap->link.eh_info;
1490 char *when = "";
1491 1618
1619 if (pp->pp_flags & MV_PP_FLAG_DELAYED_EH) {
1620 /*
1621 * Perform NCQ error analysis on failed PMPs
1622 * before we freeze the port entirely.
1623 *
1624 * The failed PMPs are marked earlier by mv_pmp_eh_prep().
1625 */
1626 pmp_map = pp->delayed_eh_pmp_map;
1627 pp->pp_flags &= ~MV_PP_FLAG_DELAYED_EH;
1628 for (pmp = 0; pmp_map != 0; pmp++) {
1629 unsigned int this_pmp = (1 << pmp);
1630 if (pmp_map & this_pmp) {
1631 struct ata_link *link = &ap->pmp_link[pmp];
1632 pmp_map &= ~this_pmp;
1633 ata_eh_analyze_ncq_error(link);
1634 }
1635 }
1636 ata_port_freeze(ap);
1637 }
1638 sata_pmp_error_handler(ap);
1639}
1640
1641static unsigned int mv_get_err_pmp_map(struct ata_port *ap)
1642{
1643 void __iomem *port_mmio = mv_ap_base(ap);
1644
1645 return readl(port_mmio + SATA_TESTCTL_OFS) >> 16;
1646}
1647
1648static void mv_pmp_eh_prep(struct ata_port *ap, unsigned int pmp_map)
1649{
1650 struct ata_eh_info *ehi;
1651 unsigned int pmp;
1652
1653 /*
1654 * Initialize EH info for PMPs which saw device errors
1655 */
1656 ehi = &ap->link.eh_info;
1657 for (pmp = 0; pmp_map != 0; pmp++) {
1658 unsigned int this_pmp = (1 << pmp);
1659 if (pmp_map & this_pmp) {
1660 struct ata_link *link = &ap->pmp_link[pmp];
1661
1662 pmp_map &= ~this_pmp;
1663 ehi = &link->eh_info;
1664 ata_ehi_clear_desc(ehi);
1665 ata_ehi_push_desc(ehi, "dev err");
1666 ehi->err_mask |= AC_ERR_DEV;
1667 ehi->action |= ATA_EH_RESET;
1668 ata_link_abort(link);
1669 }
1670 }
1671}
1672
1673static int mv_handle_fbs_ncq_dev_err(struct ata_port *ap)
1674{
1675 struct mv_port_priv *pp = ap->private_data;
1676 int failed_links;
1677 unsigned int old_map, new_map;
1678
1679 /*
1680 * Device error during FBS+NCQ operation:
1681 *
1682 * Set a port flag to prevent further I/O being enqueued.
1683 * Leave the EDMA running to drain outstanding commands from this port.
1684 * Perform the post-mortem/EH only when all responses are complete.
1685 * Follow recovery sequence from 6042/7042 datasheet (7.3.15.4.2.2).
1686 */
1687 if (!(pp->pp_flags & MV_PP_FLAG_DELAYED_EH)) {
1688 pp->pp_flags |= MV_PP_FLAG_DELAYED_EH;
1689 pp->delayed_eh_pmp_map = 0;
1690 }
1691 old_map = pp->delayed_eh_pmp_map;
1692 new_map = old_map | mv_get_err_pmp_map(ap);
1693
1694 if (old_map != new_map) {
1695 pp->delayed_eh_pmp_map = new_map;
1696 mv_pmp_eh_prep(ap, new_map & ~old_map);
1697 }
1698 failed_links = hweight16(new_map);
1699
1700 ata_port_printk(ap, KERN_INFO, "%s: pmp_map=%04x qc_map=%04x "
1701 "failed_links=%d nr_active_links=%d\n",
1702 __func__, pp->delayed_eh_pmp_map,
1703 ap->qc_active, failed_links,
1704 ap->nr_active_links);
1705
1706 if (ap->nr_active_links <= failed_links) {
1707 mv_process_crpb_entries(ap, pp);
1708 mv_stop_edma(ap);
1709 mv_eh_freeze(ap);
1710 ata_port_printk(ap, KERN_INFO, "%s: done\n", __func__);
1711 return 1; /* handled */
1712 }
1713 ata_port_printk(ap, KERN_INFO, "%s: waiting\n", __func__);
1714 return 1; /* handled */
1715}
1716
1717static int mv_handle_fbs_non_ncq_dev_err(struct ata_port *ap)
1718{
1492 /* 1719 /*
1493 * We got a device interrupt from something that 1720 * Possible future enhancement:
1494 * was supposed to be using EDMA or polling. 1721 *
1722 * FBS+non-NCQ operation is not yet implemented.
1723 * See related notes in mv_edma_cfg().
1724 *
1725 * Device error during FBS+non-NCQ operation:
1726 *
1727 * We need to snapshot the shadow registers for each failed command.
1728 * Follow recovery sequence from 6042/7042 datasheet (7.3.15.4.2.3).
1495 */ 1729 */
1730 return 0; /* not handled */
1731}
1732
1733static int mv_handle_dev_err(struct ata_port *ap, u32 edma_err_cause)
1734{
1735 struct mv_port_priv *pp = ap->private_data;
1736
1737 if (!(pp->pp_flags & MV_PP_FLAG_EDMA_EN))
1738 return 0; /* EDMA was not active: not handled */
1739 if (!(pp->pp_flags & MV_PP_FLAG_FBS_EN))
1740 return 0; /* FBS was not active: not handled */
1741
1742 if (!(edma_err_cause & EDMA_ERR_DEV))
1743 return 0; /* non DEV error: not handled */
1744 edma_err_cause &= ~EDMA_ERR_IRQ_TRANSIENT;
1745 if (edma_err_cause & ~(EDMA_ERR_DEV | EDMA_ERR_SELF_DIS))
1746 return 0; /* other problems: not handled */
1747
1748 if (pp->pp_flags & MV_PP_FLAG_NCQ_EN) {
1749 /*
1750 * EDMA should NOT have self-disabled for this case.
1751 * If it did, then something is wrong elsewhere,
1752 * and we cannot handle it here.
1753 */
1754 if (edma_err_cause & EDMA_ERR_SELF_DIS) {
1755 ata_port_printk(ap, KERN_WARNING,
1756 "%s: err_cause=0x%x pp_flags=0x%x\n",
1757 __func__, edma_err_cause, pp->pp_flags);
1758 return 0; /* not handled */
1759 }
1760 return mv_handle_fbs_ncq_dev_err(ap);
1761 } else {
1762 /*
1763 * EDMA should have self-disabled for this case.
1764 * If it did not, then something is wrong elsewhere,
1765 * and we cannot handle it here.
1766 */
1767 if (!(edma_err_cause & EDMA_ERR_SELF_DIS)) {
1768 ata_port_printk(ap, KERN_WARNING,
1769 "%s: err_cause=0x%x pp_flags=0x%x\n",
1770 __func__, edma_err_cause, pp->pp_flags);
1771 return 0; /* not handled */
1772 }
1773 return mv_handle_fbs_non_ncq_dev_err(ap);
1774 }
1775 return 0; /* not handled */
1776}
1777
1778static void mv_unexpected_intr(struct ata_port *ap, int edma_was_enabled)
1779{
1780 struct ata_eh_info *ehi = &ap->link.eh_info;
1781 char *when = "idle";
1782
1496 ata_ehi_clear_desc(ehi); 1783 ata_ehi_clear_desc(ehi);
1497 if (pp->pp_flags & MV_PP_FLAG_EDMA_EN) { 1784 if (!ap || (ap->flags & ATA_FLAG_DISABLED)) {
1498 when = " while EDMA enabled"; 1785 when = "disabled";
1786 } else if (edma_was_enabled) {
1787 when = "EDMA enabled";
1499 } else { 1788 } else {
1500 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->link.active_tag); 1789 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->link.active_tag);
1501 if (qc && (qc->tf.flags & ATA_TFLAG_POLLING)) 1790 if (qc && (qc->tf.flags & ATA_TFLAG_POLLING))
1502 when = " while polling"; 1791 when = "polling";
1503 } 1792 }
1504 ata_ehi_push_desc(ehi, "unexpected device interrupt%s", when); 1793 ata_ehi_push_desc(ehi, "unexpected device interrupt while %s", when);
1505 ehi->err_mask |= AC_ERR_OTHER; 1794 ehi->err_mask |= AC_ERR_OTHER;
1506 ehi->action |= ATA_EH_RESET; 1795 ehi->action |= ATA_EH_RESET;
1507 ata_port_freeze(ap); 1796 ata_port_freeze(ap);
@@ -1519,7 +1808,7 @@ static void mv_unexpected_intr(struct ata_port *ap)
1519 * LOCKING: 1808 * LOCKING:
1520 * Inherited from caller. 1809 * Inherited from caller.
1521 */ 1810 */
1522static void mv_err_intr(struct ata_port *ap, struct ata_queued_cmd *qc) 1811static void mv_err_intr(struct ata_port *ap)
1523{ 1812{
1524 void __iomem *port_mmio = mv_ap_base(ap); 1813 void __iomem *port_mmio = mv_ap_base(ap);
1525 u32 edma_err_cause, eh_freeze_mask, serr = 0; 1814 u32 edma_err_cause, eh_freeze_mask, serr = 0;
@@ -1527,24 +1816,42 @@ static void mv_err_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
1527 struct mv_host_priv *hpriv = ap->host->private_data; 1816 struct mv_host_priv *hpriv = ap->host->private_data;
1528 unsigned int action = 0, err_mask = 0; 1817 unsigned int action = 0, err_mask = 0;
1529 struct ata_eh_info *ehi = &ap->link.eh_info; 1818 struct ata_eh_info *ehi = &ap->link.eh_info;
1530 1819 struct ata_queued_cmd *qc;
1531 ata_ehi_clear_desc(ehi); 1820 int abort = 0;
1532 1821
1533 /* 1822 /*
1534 * Read and clear the err_cause bits. This won't actually 1823 * Read and clear the SError and err_cause bits.
1535 * clear for some errors (eg. SError), but we will be doing
1536 * a hard reset in those cases regardless, which *will* clear it.
1537 */ 1824 */
1825 sata_scr_read(&ap->link, SCR_ERROR, &serr);
1826 sata_scr_write_flush(&ap->link, SCR_ERROR, serr);
1827
1538 edma_err_cause = readl(port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); 1828 edma_err_cause = readl(port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);
1539 writelfl(~edma_err_cause, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); 1829 writelfl(~edma_err_cause, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);
1540 1830
1541 ata_ehi_push_desc(ehi, "edma_err_cause=%08x", edma_err_cause); 1831 ata_port_printk(ap, KERN_INFO, "%s: err_cause=%08x pp_flags=0x%x\n",
1832 __func__, edma_err_cause, pp->pp_flags);
1833
1834 if (edma_err_cause & EDMA_ERR_DEV) {
1835 /*
1836 * Device errors during FIS-based switching operation
1837 * require special handling.
1838 */
1839 if (mv_handle_dev_err(ap, edma_err_cause))
1840 return;
1841 }
1542 1842
1843 qc = mv_get_active_qc(ap);
1844 ata_ehi_clear_desc(ehi);
1845 ata_ehi_push_desc(ehi, "edma_err_cause=%08x pp_flags=%08x",
1846 edma_err_cause, pp->pp_flags);
1543 /* 1847 /*
1544 * All generations share these EDMA error cause bits: 1848 * All generations share these EDMA error cause bits:
1545 */ 1849 */
1546 if (edma_err_cause & EDMA_ERR_DEV) 1850 if (edma_err_cause & EDMA_ERR_DEV) {
1547 err_mask |= AC_ERR_DEV; 1851 err_mask |= AC_ERR_DEV;
1852 action |= ATA_EH_RESET;
1853 ata_ehi_push_desc(ehi, "dev error");
1854 }
1548 if (edma_err_cause & (EDMA_ERR_D_PAR | EDMA_ERR_PRD_PAR | 1855 if (edma_err_cause & (EDMA_ERR_D_PAR | EDMA_ERR_PRD_PAR |
1549 EDMA_ERR_CRQB_PAR | EDMA_ERR_CRPB_PAR | 1856 EDMA_ERR_CRQB_PAR | EDMA_ERR_CRPB_PAR |
1550 EDMA_ERR_INTRL_PAR)) { 1857 EDMA_ERR_INTRL_PAR)) {
@@ -1576,13 +1883,6 @@ static void mv_err_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
1576 ata_ehi_push_desc(ehi, "EDMA self-disable"); 1883 ata_ehi_push_desc(ehi, "EDMA self-disable");
1577 } 1884 }
1578 if (edma_err_cause & EDMA_ERR_SERR) { 1885 if (edma_err_cause & EDMA_ERR_SERR) {
1579 /*
1580 * Ensure that we read our own SCR, not a pmp link SCR:
1581 */
1582 ap->ops->scr_read(ap, SCR_ERROR, &serr);
1583 /*
1584 * Don't clear SError here; leave it for libata-eh:
1585 */
1586 ata_ehi_push_desc(ehi, "SError=%08x", serr); 1886 ata_ehi_push_desc(ehi, "SError=%08x", serr);
1587 err_mask |= AC_ERR_ATA_BUS; 1887 err_mask |= AC_ERR_ATA_BUS;
1588 action |= ATA_EH_RESET; 1888 action |= ATA_EH_RESET;
@@ -1602,10 +1902,29 @@ static void mv_err_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
1602 else 1902 else
1603 ehi->err_mask |= err_mask; 1903 ehi->err_mask |= err_mask;
1604 1904
1605 if (edma_err_cause & eh_freeze_mask) 1905 if (err_mask == AC_ERR_DEV) {
1906 /*
1907 * Cannot do ata_port_freeze() here,
1908 * because it would kill PIO access,
1909 * which is needed for further diagnosis.
1910 */
1911 mv_eh_freeze(ap);
1912 abort = 1;
1913 } else if (edma_err_cause & eh_freeze_mask) {
1914 /*
1915 * Note to self: ata_port_freeze() calls ata_port_abort()
1916 */
1606 ata_port_freeze(ap); 1917 ata_port_freeze(ap);
1607 else 1918 } else {
1608 ata_port_abort(ap); 1919 abort = 1;
1920 }
1921
1922 if (abort) {
1923 if (qc)
1924 ata_link_abort(qc->dev->link);
1925 else
1926 ata_port_abort(ap);
1927 }
1609} 1928}
1610 1929
1611static void mv_process_crpb_response(struct ata_port *ap, 1930static void mv_process_crpb_response(struct ata_port *ap,
@@ -1632,8 +1951,9 @@ static void mv_process_crpb_response(struct ata_port *ap,
1632 } 1951 }
1633 } 1952 }
1634 ata_status = edma_status >> CRPB_FLAG_STATUS_SHIFT; 1953 ata_status = edma_status >> CRPB_FLAG_STATUS_SHIFT;
1635 qc->err_mask |= ac_err_mask(ata_status); 1954 if (!ac_err_mask(ata_status))
1636 ata_qc_complete(qc); 1955 ata_qc_complete(qc);
1956 /* else: leave it for mv_err_intr() */
1637 } else { 1957 } else {
1638 ata_port_printk(ap, KERN_ERR, "%s: no qc for tag=%d\n", 1958 ata_port_printk(ap, KERN_ERR, "%s: no qc for tag=%d\n",
1639 __func__, tag); 1959 __func__, tag);
@@ -1677,6 +1997,44 @@ static void mv_process_crpb_entries(struct ata_port *ap, struct mv_port_priv *pp
1677 port_mmio + EDMA_RSP_Q_OUT_PTR_OFS); 1997 port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);
1678} 1998}
1679 1999
2000static void mv_port_intr(struct ata_port *ap, u32 port_cause)
2001{
2002 struct mv_port_priv *pp;
2003 int edma_was_enabled;
2004
2005 if (!ap || (ap->flags & ATA_FLAG_DISABLED)) {
2006 mv_unexpected_intr(ap, 0);
2007 return;
2008 }
2009 /*
2010 * Grab a snapshot of the EDMA_EN flag setting,
2011 * so that we have a consistent view for this port,
2012 * even if something we call of our routines changes it.
2013 */
2014 pp = ap->private_data;
2015 edma_was_enabled = (pp->pp_flags & MV_PP_FLAG_EDMA_EN);
2016 /*
2017 * Process completed CRPB response(s) before other events.
2018 */
2019 if (edma_was_enabled && (port_cause & DONE_IRQ)) {
2020 mv_process_crpb_entries(ap, pp);
2021 if (pp->pp_flags & MV_PP_FLAG_DELAYED_EH)
2022 mv_handle_fbs_ncq_dev_err(ap);
2023 }
2024 /*
2025 * Handle chip-reported errors, or continue on to handle PIO.
2026 */
2027 if (unlikely(port_cause & ERR_IRQ)) {
2028 mv_err_intr(ap);
2029 } else if (!edma_was_enabled) {
2030 struct ata_queued_cmd *qc = mv_get_active_qc(ap);
2031 if (qc)
2032 ata_sff_host_intr(ap, qc);
2033 else
2034 mv_unexpected_intr(ap, edma_was_enabled);
2035 }
2036}
2037
1680/** 2038/**
1681 * mv_host_intr - Handle all interrupts on the given host controller 2039 * mv_host_intr - Handle all interrupts on the given host controller
1682 * @host: host specific structure 2040 * @host: host specific structure
@@ -1688,66 +2046,58 @@ static void mv_process_crpb_entries(struct ata_port *ap, struct mv_port_priv *pp
1688static int mv_host_intr(struct ata_host *host, u32 main_irq_cause) 2046static int mv_host_intr(struct ata_host *host, u32 main_irq_cause)
1689{ 2047{
1690 struct mv_host_priv *hpriv = host->private_data; 2048 struct mv_host_priv *hpriv = host->private_data;
1691 void __iomem *mmio = hpriv->base, *hc_mmio = NULL; 2049 void __iomem *mmio = hpriv->base, *hc_mmio;
1692 u32 hc_irq_cause = 0;
1693 unsigned int handled = 0, port; 2050 unsigned int handled = 0, port;
1694 2051
1695 for (port = 0; port < hpriv->n_ports; port++) { 2052 for (port = 0; port < hpriv->n_ports; port++) {
1696 struct ata_port *ap = host->ports[port]; 2053 struct ata_port *ap = host->ports[port];
1697 struct mv_port_priv *pp; 2054 unsigned int p, shift, hardport, port_cause;
1698 unsigned int shift, hardport, port_cause; 2055
1699 /*
1700 * When we move to the second hc, flag our cached
1701 * copies of hc_mmio (and hc_irq_cause) as invalid again.
1702 */
1703 if (port == MV_PORTS_PER_HC)
1704 hc_mmio = NULL;
1705 /*
1706 * Do nothing if port is not interrupting or is disabled:
1707 */
1708 MV_PORT_TO_SHIFT_AND_HARDPORT(port, shift, hardport); 2056 MV_PORT_TO_SHIFT_AND_HARDPORT(port, shift, hardport);
1709 port_cause = (main_irq_cause >> shift) & (DONE_IRQ | ERR_IRQ);
1710 if (!port_cause || !ap || (ap->flags & ATA_FLAG_DISABLED))
1711 continue;
1712 /* 2057 /*
1713 * Each hc within the host has its own hc_irq_cause register. 2058 * Each hc within the host has its own hc_irq_cause register,
1714 * We defer reading it until we know we need it, right now: 2059 * where the interrupting ports bits get ack'd.
1715 *
1716 * FIXME later: we don't really need to read this register
1717 * (some logic changes required below if we go that way),
1718 * because it doesn't tell us anything new. But we do need
1719 * to write to it, outside the top of this loop,
1720 * to reset the interrupt triggers for next time.
1721 */ 2060 */
1722 if (!hc_mmio) { 2061 if (hardport == 0) { /* first port on this hc ? */
2062 u32 hc_cause = (main_irq_cause >> shift) & HC0_IRQ_PEND;
2063 u32 port_mask, ack_irqs;
2064 /*
2065 * Skip this entire hc if nothing pending for any ports
2066 */
2067 if (!hc_cause) {
2068 port += MV_PORTS_PER_HC - 1;
2069 continue;
2070 }
2071 /*
2072 * We don't need/want to read the hc_irq_cause register,
2073 * because doing so hurts performance, and
2074 * main_irq_cause already gives us everything we need.
2075 *
2076 * But we do have to *write* to the hc_irq_cause to ack
2077 * the ports that we are handling this time through.
2078 *
2079 * This requires that we create a bitmap for those
2080 * ports which interrupted us, and use that bitmap
2081 * to ack (only) those ports via hc_irq_cause.
2082 */
2083 ack_irqs = 0;
2084 for (p = 0; p < MV_PORTS_PER_HC; ++p) {
2085 if ((port + p) >= hpriv->n_ports)
2086 break;
2087 port_mask = (DONE_IRQ | ERR_IRQ) << (p * 2);
2088 if (hc_cause & port_mask)
2089 ack_irqs |= (DMA_IRQ | DEV_IRQ) << p;
2090 }
1723 hc_mmio = mv_hc_base_from_port(mmio, port); 2091 hc_mmio = mv_hc_base_from_port(mmio, port);
1724 hc_irq_cause = readl(hc_mmio + HC_IRQ_CAUSE_OFS); 2092 writelfl(~ack_irqs, hc_mmio + HC_IRQ_CAUSE_OFS);
1725 writelfl(~hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS);
1726 handled = 1; 2093 handled = 1;
1727 } 2094 }
1728 /* 2095 /*
1729 * Process completed CRPB response(s) before other events. 2096 * Handle interrupts signalled for this port:
1730 */
1731 pp = ap->private_data;
1732 if (hc_irq_cause & (DMA_IRQ << hardport)) {
1733 if (pp->pp_flags & MV_PP_FLAG_EDMA_EN)
1734 mv_process_crpb_entries(ap, pp);
1735 }
1736 /*
1737 * Handle chip-reported errors, or continue on to handle PIO.
1738 */ 2097 */
1739 if (unlikely(port_cause & ERR_IRQ)) { 2098 port_cause = (main_irq_cause >> shift) & (DONE_IRQ | ERR_IRQ);
1740 mv_err_intr(ap, mv_get_active_qc(ap)); 2099 if (port_cause)
1741 } else if (hc_irq_cause & (DEV_IRQ << hardport)) { 2100 mv_port_intr(ap, port_cause);
1742 if (!(pp->pp_flags & MV_PP_FLAG_EDMA_EN)) {
1743 struct ata_queued_cmd *qc = mv_get_active_qc(ap);
1744 if (qc) {
1745 ata_sff_host_intr(ap, qc);
1746 continue;
1747 }
1748 }
1749 mv_unexpected_intr(ap);
1750 }
1751 } 2101 }
1752 return handled; 2102 return handled;
1753} 2103}
@@ -1894,7 +2244,7 @@ static void mv5_reset_bus(struct ata_host *host, void __iomem *mmio)
1894 2244
1895static void mv5_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio) 2245static void mv5_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio)
1896{ 2246{
1897 writel(0x0fcfffff, mmio + MV_FLASH_CTL); 2247 writel(0x0fcfffff, mmio + MV_FLASH_CTL_OFS);
1898} 2248}
1899 2249
1900static void mv5_read_preamp(struct mv_host_priv *hpriv, int idx, 2250static void mv5_read_preamp(struct mv_host_priv *hpriv, int idx,
@@ -1913,7 +2263,7 @@ static void mv5_enable_leds(struct mv_host_priv *hpriv, void __iomem *mmio)
1913{ 2263{
1914 u32 tmp; 2264 u32 tmp;
1915 2265
1916 writel(0, mmio + MV_GPIO_PORT_CTL); 2266 writel(0, mmio + MV_GPIO_PORT_CTL_OFS);
1917 2267
1918 /* FIXME: handle MV_HP_ERRATA_50XXB2 errata */ 2268 /* FIXME: handle MV_HP_ERRATA_50XXB2 errata */
1919 2269
@@ -1931,14 +2281,14 @@ static void mv5_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio,
1931 int fix_apm_sq = (hpriv->hp_flags & MV_HP_ERRATA_50XXB0); 2281 int fix_apm_sq = (hpriv->hp_flags & MV_HP_ERRATA_50XXB0);
1932 2282
1933 if (fix_apm_sq) { 2283 if (fix_apm_sq) {
1934 tmp = readl(phy_mmio + MV5_LT_MODE); 2284 tmp = readl(phy_mmio + MV5_LTMODE_OFS);
1935 tmp |= (1 << 19); 2285 tmp |= (1 << 19);
1936 writel(tmp, phy_mmio + MV5_LT_MODE); 2286 writel(tmp, phy_mmio + MV5_LTMODE_OFS);
1937 2287
1938 tmp = readl(phy_mmio + MV5_PHY_CTL); 2288 tmp = readl(phy_mmio + MV5_PHY_CTL_OFS);
1939 tmp &= ~0x3; 2289 tmp &= ~0x3;
1940 tmp |= 0x1; 2290 tmp |= 0x1;
1941 writel(tmp, phy_mmio + MV5_PHY_CTL); 2291 writel(tmp, phy_mmio + MV5_PHY_CTL_OFS);
1942 } 2292 }
1943 2293
1944 tmp = readl(phy_mmio + MV5_PHY_MODE); 2294 tmp = readl(phy_mmio + MV5_PHY_MODE);
@@ -1956,11 +2306,6 @@ static void mv5_reset_hc_port(struct mv_host_priv *hpriv, void __iomem *mmio,
1956{ 2306{
1957 void __iomem *port_mmio = mv_port_base(mmio, port); 2307 void __iomem *port_mmio = mv_port_base(mmio, port);
1958 2308
1959 /*
1960 * The datasheet warns against setting ATA_RST when EDMA is active
1961 * (but doesn't say what the problem might be). So we first try
1962 * to disable the EDMA engine before doing the ATA_RST operation.
1963 */
1964 mv_reset_channel(hpriv, mmio, port); 2309 mv_reset_channel(hpriv, mmio, port);
1965 2310
1966 ZERO(0x028); /* command */ 2311 ZERO(0x028); /* command */
@@ -1975,7 +2320,7 @@ static void mv5_reset_hc_port(struct mv_host_priv *hpriv, void __iomem *mmio,
1975 ZERO(0x024); /* respq outp */ 2320 ZERO(0x024); /* respq outp */
1976 ZERO(0x020); /* respq inp */ 2321 ZERO(0x020); /* respq inp */
1977 ZERO(0x02c); /* test control */ 2322 ZERO(0x02c); /* test control */
1978 writel(0xbc, port_mmio + EDMA_IORDY_TMOUT); 2323 writel(0xbc, port_mmio + EDMA_IORDY_TMOUT_OFS);
1979} 2324}
1980#undef ZERO 2325#undef ZERO
1981 2326
@@ -2021,13 +2366,13 @@ static void mv_reset_pci_bus(struct ata_host *host, void __iomem *mmio)
2021 struct mv_host_priv *hpriv = host->private_data; 2366 struct mv_host_priv *hpriv = host->private_data;
2022 u32 tmp; 2367 u32 tmp;
2023 2368
2024 tmp = readl(mmio + MV_PCI_MODE); 2369 tmp = readl(mmio + MV_PCI_MODE_OFS);
2025 tmp &= 0xff00ffff; 2370 tmp &= 0xff00ffff;
2026 writel(tmp, mmio + MV_PCI_MODE); 2371 writel(tmp, mmio + MV_PCI_MODE_OFS);
2027 2372
2028 ZERO(MV_PCI_DISC_TIMER); 2373 ZERO(MV_PCI_DISC_TIMER);
2029 ZERO(MV_PCI_MSI_TRIGGER); 2374 ZERO(MV_PCI_MSI_TRIGGER);
2030 writel(0x000100ff, mmio + MV_PCI_XBAR_TMOUT); 2375 writel(0x000100ff, mmio + MV_PCI_XBAR_TMOUT_OFS);
2031 ZERO(PCI_HC_MAIN_IRQ_MASK_OFS); 2376 ZERO(PCI_HC_MAIN_IRQ_MASK_OFS);
2032 ZERO(MV_PCI_SERR_MASK); 2377 ZERO(MV_PCI_SERR_MASK);
2033 ZERO(hpriv->irq_cause_ofs); 2378 ZERO(hpriv->irq_cause_ofs);
@@ -2045,10 +2390,10 @@ static void mv6_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio)
2045 2390
2046 mv5_reset_flash(hpriv, mmio); 2391 mv5_reset_flash(hpriv, mmio);
2047 2392
2048 tmp = readl(mmio + MV_GPIO_PORT_CTL); 2393 tmp = readl(mmio + MV_GPIO_PORT_CTL_OFS);
2049 tmp &= 0x3; 2394 tmp &= 0x3;
2050 tmp |= (1 << 5) | (1 << 6); 2395 tmp |= (1 << 5) | (1 << 6);
2051 writel(tmp, mmio + MV_GPIO_PORT_CTL); 2396 writel(tmp, mmio + MV_GPIO_PORT_CTL_OFS);
2052} 2397}
2053 2398
2054/** 2399/**
@@ -2121,7 +2466,7 @@ static void mv6_read_preamp(struct mv_host_priv *hpriv, int idx,
2121 void __iomem *port_mmio; 2466 void __iomem *port_mmio;
2122 u32 tmp; 2467 u32 tmp;
2123 2468
2124 tmp = readl(mmio + MV_RESET_CFG); 2469 tmp = readl(mmio + MV_RESET_CFG_OFS);
2125 if ((tmp & (1 << 0)) == 0) { 2470 if ((tmp & (1 << 0)) == 0) {
2126 hpriv->signal[idx].amps = 0x7 << 8; 2471 hpriv->signal[idx].amps = 0x7 << 8;
2127 hpriv->signal[idx].pre = 0x1 << 5; 2472 hpriv->signal[idx].pre = 0x1 << 5;
@@ -2137,7 +2482,7 @@ static void mv6_read_preamp(struct mv_host_priv *hpriv, int idx,
2137 2482
2138static void mv6_enable_leds(struct mv_host_priv *hpriv, void __iomem *mmio) 2483static void mv6_enable_leds(struct mv_host_priv *hpriv, void __iomem *mmio)
2139{ 2484{
2140 writel(0x00000060, mmio + MV_GPIO_PORT_CTL); 2485 writel(0x00000060, mmio + MV_GPIO_PORT_CTL_OFS);
2141} 2486}
2142 2487
2143static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio, 2488static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio,
@@ -2235,11 +2580,6 @@ static void mv_soc_reset_hc_port(struct mv_host_priv *hpriv,
2235{ 2580{
2236 void __iomem *port_mmio = mv_port_base(mmio, port); 2581 void __iomem *port_mmio = mv_port_base(mmio, port);
2237 2582
2238 /*
2239 * The datasheet warns against setting ATA_RST when EDMA is active
2240 * (but doesn't say what the problem might be). So we first try
2241 * to disable the EDMA engine before doing the ATA_RST operation.
2242 */
2243 mv_reset_channel(hpriv, mmio, port); 2583 mv_reset_channel(hpriv, mmio, port);
2244 2584
2245 ZERO(0x028); /* command */ 2585 ZERO(0x028); /* command */
@@ -2254,7 +2594,7 @@ static void mv_soc_reset_hc_port(struct mv_host_priv *hpriv,
2254 ZERO(0x024); /* respq outp */ 2594 ZERO(0x024); /* respq outp */
2255 ZERO(0x020); /* respq inp */ 2595 ZERO(0x020); /* respq inp */
2256 ZERO(0x02c); /* test control */ 2596 ZERO(0x02c); /* test control */
2257 writel(0xbc, port_mmio + EDMA_IORDY_TMOUT); 2597 writel(0xbc, port_mmio + EDMA_IORDY_TMOUT_OFS);
2258} 2598}
2259 2599
2260#undef ZERO 2600#undef ZERO
@@ -2297,38 +2637,39 @@ static void mv_soc_reset_bus(struct ata_host *host, void __iomem *mmio)
2297 return; 2637 return;
2298} 2638}
2299 2639
2300static void mv_setup_ifctl(void __iomem *port_mmio, int want_gen2i) 2640static void mv_setup_ifcfg(void __iomem *port_mmio, int want_gen2i)
2301{ 2641{
2302 u32 ifctl = readl(port_mmio + SATA_INTERFACE_CFG); 2642 u32 ifcfg = readl(port_mmio + SATA_INTERFACE_CFG_OFS);
2303 2643
2304 ifctl = (ifctl & 0xf7f) | 0x9b1000; /* from chip spec */ 2644 ifcfg = (ifcfg & 0xf7f) | 0x9b1000; /* from chip spec */
2305 if (want_gen2i) 2645 if (want_gen2i)
2306 ifctl |= (1 << 7); /* enable gen2i speed */ 2646 ifcfg |= (1 << 7); /* enable gen2i speed */
2307 writelfl(ifctl, port_mmio + SATA_INTERFACE_CFG); 2647 writelfl(ifcfg, port_mmio + SATA_INTERFACE_CFG_OFS);
2308} 2648}
2309 2649
2310/*
2311 * Caller must ensure that EDMA is not active,
2312 * by first doing mv_stop_edma() where needed.
2313 */
2314static void mv_reset_channel(struct mv_host_priv *hpriv, void __iomem *mmio, 2650static void mv_reset_channel(struct mv_host_priv *hpriv, void __iomem *mmio,
2315 unsigned int port_no) 2651 unsigned int port_no)
2316{ 2652{
2317 void __iomem *port_mmio = mv_port_base(mmio, port_no); 2653 void __iomem *port_mmio = mv_port_base(mmio, port_no);
2318 2654
2655 /*
2656 * The datasheet warns against setting EDMA_RESET when EDMA is active
2657 * (but doesn't say what the problem might be). So we first try
2658 * to disable the EDMA engine before doing the EDMA_RESET operation.
2659 */
2319 mv_stop_edma_engine(port_mmio); 2660 mv_stop_edma_engine(port_mmio);
2320 writelfl(ATA_RST, port_mmio + EDMA_CMD_OFS); 2661 writelfl(EDMA_RESET, port_mmio + EDMA_CMD_OFS);
2321 2662
2322 if (!IS_GEN_I(hpriv)) { 2663 if (!IS_GEN_I(hpriv)) {
2323 /* Enable 3.0gb/s link speed */ 2664 /* Enable 3.0gb/s link speed: this survives EDMA_RESET */
2324 mv_setup_ifctl(port_mmio, 1); 2665 mv_setup_ifcfg(port_mmio, 1);
2325 } 2666 }
2326 /* 2667 /*
2327 * Strobing ATA_RST here causes a hard reset of the SATA transport, 2668 * Strobing EDMA_RESET here causes a hard reset of the SATA transport,
2328 * link, and physical layers. It resets all SATA interface registers 2669 * link, and physical layers. It resets all SATA interface registers
2329 * (except for SATA_INTERFACE_CFG), and issues a COMRESET to the dev. 2670 * (except for SATA_INTERFACE_CFG), and issues a COMRESET to the dev.
2330 */ 2671 */
2331 writelfl(ATA_RST, port_mmio + EDMA_CMD_OFS); 2672 writelfl(EDMA_RESET, port_mmio + EDMA_CMD_OFS);
2332 udelay(25); /* allow reset propagation */ 2673 udelay(25); /* allow reset propagation */
2333 writelfl(0, port_mmio + EDMA_CMD_OFS); 2674 writelfl(0, port_mmio + EDMA_CMD_OFS);
2334 2675
@@ -2392,7 +2733,7 @@ static int mv_hardreset(struct ata_link *link, unsigned int *class,
2392 sata_scr_read(link, SCR_STATUS, &sstatus); 2733 sata_scr_read(link, SCR_STATUS, &sstatus);
2393 if (!IS_GEN_I(hpriv) && ++attempts >= 5 && sstatus == 0x121) { 2734 if (!IS_GEN_I(hpriv) && ++attempts >= 5 && sstatus == 0x121) {
2394 /* Force 1.5gb/s link speed and try again */ 2735 /* Force 1.5gb/s link speed and try again */
2395 mv_setup_ifctl(mv_ap_base(ap), 0); 2736 mv_setup_ifcfg(mv_ap_base(ap), 0);
2396 if (time_after(jiffies + HZ, deadline)) 2737 if (time_after(jiffies + HZ, deadline))
2397 extra = HZ; /* only extend it once, max */ 2738 extra = HZ; /* only extend it once, max */
2398 } 2739 }
@@ -2493,6 +2834,34 @@ static void mv_port_init(struct ata_ioports *port, void __iomem *port_mmio)
2493 readl(port_mmio + EDMA_ERR_IRQ_MASK_OFS)); 2834 readl(port_mmio + EDMA_ERR_IRQ_MASK_OFS));
2494} 2835}
2495 2836
2837static unsigned int mv_in_pcix_mode(struct ata_host *host)
2838{
2839 struct mv_host_priv *hpriv = host->private_data;
2840 void __iomem *mmio = hpriv->base;
2841 u32 reg;
2842
2843 if (!HAS_PCI(host) || !IS_PCIE(hpriv))
2844 return 0; /* not PCI-X capable */
2845 reg = readl(mmio + MV_PCI_MODE_OFS);
2846 if ((reg & MV_PCI_MODE_MASK) == 0)
2847 return 0; /* conventional PCI mode */
2848 return 1; /* chip is in PCI-X mode */
2849}
2850
2851static int mv_pci_cut_through_okay(struct ata_host *host)
2852{
2853 struct mv_host_priv *hpriv = host->private_data;
2854 void __iomem *mmio = hpriv->base;
2855 u32 reg;
2856
2857 if (!mv_in_pcix_mode(host)) {
2858 reg = readl(mmio + PCI_COMMAND_OFS);
2859 if (reg & PCI_COMMAND_MRDTRIG)
2860 return 0; /* not okay */
2861 }
2862 return 1; /* okay */
2863}
2864
2496static int mv_chip_id(struct ata_host *host, unsigned int board_idx) 2865static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
2497{ 2866{
2498 struct pci_dev *pdev = to_pci_dev(host->dev); 2867 struct pci_dev *pdev = to_pci_dev(host->dev);
@@ -2560,7 +2929,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
2560 break; 2929 break;
2561 2930
2562 case chip_7042: 2931 case chip_7042:
2563 hp_flags |= MV_HP_PCIE; 2932 hp_flags |= MV_HP_PCIE | MV_HP_CUT_THROUGH;
2564 if (pdev->vendor == PCI_VENDOR_ID_TTI && 2933 if (pdev->vendor == PCI_VENDOR_ID_TTI &&
2565 (pdev->device == 0x2300 || pdev->device == 0x2310)) 2934 (pdev->device == 0x2300 || pdev->device == 0x2310))
2566 { 2935 {
@@ -2590,9 +2959,12 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
2590 " and avoid the final two gigabytes on" 2959 " and avoid the final two gigabytes on"
2591 " all RocketRAID BIOS initialized drives.\n"); 2960 " all RocketRAID BIOS initialized drives.\n");
2592 } 2961 }
2962 /* drop through */
2593 case chip_6042: 2963 case chip_6042:
2594 hpriv->ops = &mv6xxx_ops; 2964 hpriv->ops = &mv6xxx_ops;
2595 hp_flags |= MV_HP_GEN_IIE; 2965 hp_flags |= MV_HP_GEN_IIE;
2966 if (board_idx == chip_6042 && mv_pci_cut_through_okay(host))
2967 hp_flags |= MV_HP_CUT_THROUGH;
2596 2968
2597 switch (pdev->revision) { 2969 switch (pdev->revision) {
2598 case 0x0: 2970 case 0x0:
diff --git a/drivers/base/sys.c b/drivers/base/sys.c
index 4fbb56bcb1ee..358bb0be3c08 100644
--- a/drivers/base/sys.c
+++ b/drivers/base/sys.c
@@ -175,8 +175,7 @@ int sysdev_driver_register(struct sysdev_class *cls, struct sysdev_driver *drv)
175 } 175 }
176 176
177 /* Check whether this driver has already been added to a class. */ 177 /* Check whether this driver has already been added to a class. */
178 if ((drv->entry.next != drv->entry.prev) || 178 if (drv->entry.next && !list_empty(&drv->entry)) {
179 (drv->entry.next != NULL)) {
180 printk(KERN_WARNING "sysdev: class %s: driver (%p) has already" 179 printk(KERN_WARNING "sysdev: class %s: driver (%p) has already"
181 " been registered to a class, something is wrong, but " 180 " been registered to a class, something is wrong, but "
182 "will forge on!\n", cls->name, drv); 181 "will forge on!\n", cls->name, drv);
diff --git a/drivers/block/aoe/aoecmd.c b/drivers/block/aoe/aoecmd.c
index 8fc429cf82b6..41f818be2f7e 100644
--- a/drivers/block/aoe/aoecmd.c
+++ b/drivers/block/aoe/aoecmd.c
@@ -755,11 +755,13 @@ diskstats(struct gendisk *disk, struct bio *bio, ulong duration, sector_t sector
755{ 755{
756 unsigned long n_sect = bio->bi_size >> 9; 756 unsigned long n_sect = bio->bi_size >> 9;
757 const int rw = bio_data_dir(bio); 757 const int rw = bio_data_dir(bio);
758 struct hd_struct *part;
758 759
759 all_stat_inc(disk, ios[rw], sector); 760 part = get_part(disk, sector);
760 all_stat_add(disk, ticks[rw], duration, sector); 761 all_stat_inc(disk, part, ios[rw], sector);
761 all_stat_add(disk, sectors[rw], n_sect, sector); 762 all_stat_add(disk, part, ticks[rw], duration, sector);
762 all_stat_add(disk, io_ticks, duration, sector); 763 all_stat_add(disk, part, sectors[rw], n_sect, sector);
764 all_stat_add(disk, part, io_ticks, duration, sector);
763} 765}
764 766
765void 767void
diff --git a/drivers/char/serial167.c b/drivers/char/serial167.c
index fd2db07a50fc..3b23270eaa65 100644
--- a/drivers/char/serial167.c
+++ b/drivers/char/serial167.c
@@ -1073,7 +1073,7 @@ static int cy_put_char(struct tty_struct *tty, unsigned char ch)
1073 return 0; 1073 return 0;
1074 1074
1075 if (!info->xmit_buf) 1075 if (!info->xmit_buf)
1076 return; 1076 return 0;
1077 1077
1078 local_irq_save(flags); 1078 local_irq_save(flags);
1079 if (info->xmit_cnt >= PAGE_SIZE - 1) { 1079 if (info->xmit_cnt >= PAGE_SIZE - 1) {
diff --git a/drivers/char/sx.c b/drivers/char/sx.c
index f39f6fd89350..b1a7a8cb65ea 100644
--- a/drivers/char/sx.c
+++ b/drivers/char/sx.c
@@ -970,7 +970,8 @@ static int sx_set_real_termios(void *ptr)
970 sx_write_channel_byte(port, hi_mask, 0x1f); 970 sx_write_channel_byte(port, hi_mask, 0x1f);
971 break; 971 break;
972 default: 972 default:
973 printk(KERN_INFO "sx: Invalid wordsize: %u\n", CFLAG & CSIZE); 973 printk(KERN_INFO "sx: Invalid wordsize: %u\n",
974 (unsigned int)CFLAG & CSIZE);
974 break; 975 break;
975 } 976 }
976 977
@@ -997,7 +998,8 @@ static int sx_set_real_termios(void *ptr)
997 set_bit(TTY_HW_COOK_IN, &port->gs.tty->flags); 998 set_bit(TTY_HW_COOK_IN, &port->gs.tty->flags);
998 } 999 }
999 sx_dprintk(SX_DEBUG_TERMIOS, "iflags: %x(%d) ", 1000 sx_dprintk(SX_DEBUG_TERMIOS, "iflags: %x(%d) ",
1000 port->gs.tty->termios->c_iflag, I_OTHER(port->gs.tty)); 1001 (unsigned int)port->gs.tty->termios->c_iflag,
1002 I_OTHER(port->gs.tty));
1001 1003
1002/* Tell line discipline whether we will do output cooking. 1004/* Tell line discipline whether we will do output cooking.
1003 * If OPOST is set and no other output flags are set then we can do output 1005 * If OPOST is set and no other output flags are set then we can do output
@@ -1010,7 +1012,8 @@ static int sx_set_real_termios(void *ptr)
1010 clear_bit(TTY_HW_COOK_OUT, &port->gs.tty->flags); 1012 clear_bit(TTY_HW_COOK_OUT, &port->gs.tty->flags);
1011 } 1013 }
1012 sx_dprintk(SX_DEBUG_TERMIOS, "oflags: %x(%d)\n", 1014 sx_dprintk(SX_DEBUG_TERMIOS, "oflags: %x(%d)\n",
1013 port->gs.tty->termios->c_oflag, O_OTHER(port->gs.tty)); 1015 (unsigned int)port->gs.tty->termios->c_oflag,
1016 O_OTHER(port->gs.tty));
1014 /* port->c_dcd = sx_get_CD (port); */ 1017 /* port->c_dcd = sx_get_CD (port); */
1015 func_exit(); 1018 func_exit();
1016 return 0; 1019 return 0;
diff --git a/drivers/char/vt.c b/drivers/char/vt.c
index e458b08139af..fa1ffbf2c621 100644
--- a/drivers/char/vt.c
+++ b/drivers/char/vt.c
@@ -2742,6 +2742,10 @@ static int con_open(struct tty_struct *tty, struct file *filp)
2742 tty->winsize.ws_row = vc_cons[currcons].d->vc_rows; 2742 tty->winsize.ws_row = vc_cons[currcons].d->vc_rows;
2743 tty->winsize.ws_col = vc_cons[currcons].d->vc_cols; 2743 tty->winsize.ws_col = vc_cons[currcons].d->vc_cols;
2744 } 2744 }
2745 if (vc->vc_utf)
2746 tty->termios->c_iflag |= IUTF8;
2747 else
2748 tty->termios->c_iflag &= ~IUTF8;
2745 release_console_sem(); 2749 release_console_sem();
2746 vcs_make_sysfs(tty); 2750 vcs_make_sysfs(tty);
2747 return ret; 2751 return ret;
@@ -2918,6 +2922,8 @@ int __init vty_init(void)
2918 console_driver->minor_start = 1; 2922 console_driver->minor_start = 1;
2919 console_driver->type = TTY_DRIVER_TYPE_CONSOLE; 2923 console_driver->type = TTY_DRIVER_TYPE_CONSOLE;
2920 console_driver->init_termios = tty_std_termios; 2924 console_driver->init_termios = tty_std_termios;
2925 if (default_utf8)
2926 console_driver->init_termios.c_iflag |= IUTF8;
2921 console_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_RESET_TERMIOS; 2927 console_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_RESET_TERMIOS;
2922 tty_set_operations(console_driver, &con_ops); 2928 tty_set_operations(console_driver, &con_ops);
2923 if (tty_register_driver(console_driver)) 2929 if (tty_register_driver(console_driver))
diff --git a/drivers/edac/edac_core.h b/drivers/edac/edac_core.h
index a9aa845dbe74..b27b13c5eb5a 100644
--- a/drivers/edac/edac_core.h
+++ b/drivers/edac/edac_core.h
@@ -97,7 +97,7 @@ extern int edac_debug_level;
97#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \ 97#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \
98 PCI_DEVICE_ID_ ## vend ## _ ## dev 98 PCI_DEVICE_ID_ ## vend ## _ ## dev
99 99
100#define dev_name(dev) (dev)->dev_name 100#define edac_dev_name(dev) (dev)->dev_name
101 101
102/* memory devices */ 102/* memory devices */
103enum dev_type { 103enum dev_type {
diff --git a/drivers/edac/edac_device.c b/drivers/edac/edac_device.c
index 63372fa7ecfe..5fcd3d89c75d 100644
--- a/drivers/edac/edac_device.c
+++ b/drivers/edac/edac_device.c
@@ -333,7 +333,7 @@ static int add_edac_dev_to_global_list(struct edac_device_ctl_info *edac_dev)
333fail0: 333fail0:
334 edac_printk(KERN_WARNING, EDAC_MC, 334 edac_printk(KERN_WARNING, EDAC_MC,
335 "%s (%s) %s %s already assigned %d\n", 335 "%s (%s) %s %s already assigned %d\n",
336 rover->dev->bus_id, dev_name(rover), 336 rover->dev->bus_id, edac_dev_name(rover),
337 rover->mod_name, rover->ctl_name, rover->dev_idx); 337 rover->mod_name, rover->ctl_name, rover->dev_idx);
338 return 1; 338 return 1;
339 339
@@ -538,7 +538,7 @@ int edac_device_add_device(struct edac_device_ctl_info *edac_dev)
538 "'%s': DEV '%s' (%s)\n", 538 "'%s': DEV '%s' (%s)\n",
539 edac_dev->mod_name, 539 edac_dev->mod_name,
540 edac_dev->ctl_name, 540 edac_dev->ctl_name,
541 dev_name(edac_dev), 541 edac_dev_name(edac_dev),
542 edac_op_state_to_string(edac_dev->op_state)); 542 edac_op_state_to_string(edac_dev->op_state));
543 543
544 mutex_unlock(&device_ctls_mutex); 544 mutex_unlock(&device_ctls_mutex);
@@ -599,7 +599,7 @@ struct edac_device_ctl_info *edac_device_del_device(struct device *dev)
599 edac_printk(KERN_INFO, EDAC_MC, 599 edac_printk(KERN_INFO, EDAC_MC,
600 "Removed device %d for %s %s: DEV %s\n", 600 "Removed device %d for %s %s: DEV %s\n",
601 edac_dev->dev_idx, 601 edac_dev->dev_idx,
602 edac_dev->mod_name, edac_dev->ctl_name, dev_name(edac_dev)); 602 edac_dev->mod_name, edac_dev->ctl_name, edac_dev_name(edac_dev));
603 603
604 return edac_dev; 604 return edac_dev;
605} 605}
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index a4cf1645f588..d110392d48f4 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -402,7 +402,7 @@ static int add_mc_to_global_list(struct mem_ctl_info *mci)
402fail0: 402fail0:
403 edac_printk(KERN_WARNING, EDAC_MC, 403 edac_printk(KERN_WARNING, EDAC_MC,
404 "%s (%s) %s %s already assigned %d\n", p->dev->bus_id, 404 "%s (%s) %s %s already assigned %d\n", p->dev->bus_id,
405 dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx); 405 edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
406 return 1; 406 return 1;
407 407
408fail1: 408fail1:
@@ -517,7 +517,7 @@ int edac_mc_add_mc(struct mem_ctl_info *mci)
517 517
518 /* Report action taken */ 518 /* Report action taken */
519 edac_mc_printk(mci, KERN_INFO, "Giving out device to '%s' '%s':" 519 edac_mc_printk(mci, KERN_INFO, "Giving out device to '%s' '%s':"
520 " DEV %s\n", mci->mod_name, mci->ctl_name, dev_name(mci)); 520 " DEV %s\n", mci->mod_name, mci->ctl_name, edac_dev_name(mci));
521 521
522 mutex_unlock(&mem_ctls_mutex); 522 mutex_unlock(&mem_ctls_mutex);
523 return 0; 523 return 0;
@@ -565,7 +565,7 @@ struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
565 565
566 edac_printk(KERN_INFO, EDAC_MC, 566 edac_printk(KERN_INFO, EDAC_MC,
567 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx, 567 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
568 mci->mod_name, mci->ctl_name, dev_name(mci)); 568 mci->mod_name, mci->ctl_name, edac_dev_name(mci));
569 569
570 return mci; 570 return mci;
571} 571}
diff --git a/drivers/edac/edac_pci.c b/drivers/edac/edac_pci.c
index 9b24340b52e1..22ec9d5d4312 100644
--- a/drivers/edac/edac_pci.c
+++ b/drivers/edac/edac_pci.c
@@ -150,7 +150,7 @@ static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci)
150fail0: 150fail0:
151 edac_printk(KERN_WARNING, EDAC_PCI, 151 edac_printk(KERN_WARNING, EDAC_PCI,
152 "%s (%s) %s %s already assigned %d\n", 152 "%s (%s) %s %s already assigned %d\n",
153 rover->dev->bus_id, dev_name(rover), 153 rover->dev->bus_id, edac_dev_name(rover),
154 rover->mod_name, rover->ctl_name, rover->pci_idx); 154 rover->mod_name, rover->ctl_name, rover->pci_idx);
155 return 1; 155 return 1;
156 156
@@ -360,7 +360,7 @@ int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)
360 " DEV '%s' (%s)\n", 360 " DEV '%s' (%s)\n",
361 pci->mod_name, 361 pci->mod_name,
362 pci->ctl_name, 362 pci->ctl_name,
363 dev_name(pci), edac_op_state_to_string(pci->op_state)); 363 edac_dev_name(pci), edac_op_state_to_string(pci->op_state));
364 364
365 mutex_unlock(&edac_pci_ctls_mutex); 365 mutex_unlock(&edac_pci_ctls_mutex);
366 return 0; 366 return 0;
@@ -415,7 +415,7 @@ struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev)
415 415
416 edac_printk(KERN_INFO, EDAC_PCI, 416 edac_printk(KERN_INFO, EDAC_PCI,
417 "Removed device %d for %s %s: DEV %s\n", 417 "Removed device %d for %s %s: DEV %s\n",
418 pci->pci_idx, pci->mod_name, pci->ctl_name, dev_name(pci)); 418 pci->pci_idx, pci->mod_name, pci->ctl_name, edac_dev_name(pci));
419 419
420 return pci; 420 return pci;
421} 421}
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index 591deda3f86a..34b0d4f26b58 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -1355,12 +1355,6 @@ static void ide_init_port(ide_hwif_t *hwif, unsigned int port,
1355 if (hwif->chipset != ide_dtc2278 || hwif->channel == 0) 1355 if (hwif->chipset != ide_dtc2278 || hwif->channel == 0)
1356 hwif->port_ops = d->port_ops; 1356 hwif->port_ops = d->port_ops;
1357 1357
1358 if ((d->host_flags & IDE_HFLAG_SERIALIZE) ||
1359 ((d->host_flags & IDE_HFLAG_SERIALIZE_DMA) && hwif->dma_base)) {
1360 if (hwif->mate)
1361 hwif->mate->serialized = hwif->serialized = 1;
1362 }
1363
1364 hwif->swdma_mask = d->swdma_mask; 1358 hwif->swdma_mask = d->swdma_mask;
1365 hwif->mwdma_mask = d->mwdma_mask; 1359 hwif->mwdma_mask = d->mwdma_mask;
1366 hwif->ultra_mask = d->udma_mask; 1360 hwif->ultra_mask = d->udma_mask;
@@ -1382,6 +1376,12 @@ static void ide_init_port(ide_hwif_t *hwif, unsigned int port,
1382 hwif->dma_ops = d->dma_ops; 1376 hwif->dma_ops = d->dma_ops;
1383 } 1377 }
1384 1378
1379 if ((d->host_flags & IDE_HFLAG_SERIALIZE) ||
1380 ((d->host_flags & IDE_HFLAG_SERIALIZE_DMA) && hwif->dma_base)) {
1381 if (hwif->mate)
1382 hwif->mate->serialized = hwif->serialized = 1;
1383 }
1384
1385 if (d->host_flags & IDE_HFLAG_RQSIZE_256) 1385 if (d->host_flags & IDE_HFLAG_RQSIZE_256)
1386 hwif->rqsize = 256; 1386 hwif->rqsize = 256;
1387 1387
diff --git a/drivers/ide/legacy/falconide.c b/drivers/ide/legacy/falconide.c
index 83555ca513b5..9e449a0c623f 100644
--- a/drivers/ide/legacy/falconide.c
+++ b/drivers/ide/legacy/falconide.c
@@ -61,7 +61,7 @@ static void falconide_output_data(ide_drive_t *drive, struct request *rq,
61 unsigned long data_addr = drive->hwif->io_ports.data_addr; 61 unsigned long data_addr = drive->hwif->io_ports.data_addr;
62 62
63 if (drive->media == ide_disk && rq && rq->cmd_type == REQ_TYPE_FS) 63 if (drive->media == ide_disk && rq && rq->cmd_type == REQ_TYPE_FS)
64 return outsw(data_adr, buf, (len + 1) / 2); 64 return outsw(data_addr, buf, (len + 1) / 2);
65 65
66 outsw_swapw(data_addr, buf, (len + 1) / 2); 66 outsw_swapw(data_addr, buf, (len + 1) / 2);
67} 67}
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.c b/drivers/infiniband/hw/cxgb3/cxio_hal.c
index ed2ee4ba4b7c..ebf9d3043f80 100644
--- a/drivers/infiniband/hw/cxgb3/cxio_hal.c
+++ b/drivers/infiniband/hw/cxgb3/cxio_hal.c
@@ -359,9 +359,10 @@ static void insert_recv_cqe(struct t3_wq *wq, struct t3_cq *cq)
359 cq->sw_wptr++; 359 cq->sw_wptr++;
360} 360}
361 361
362void cxio_flush_rq(struct t3_wq *wq, struct t3_cq *cq, int count) 362int cxio_flush_rq(struct t3_wq *wq, struct t3_cq *cq, int count)
363{ 363{
364 u32 ptr; 364 u32 ptr;
365 int flushed = 0;
365 366
366 PDBG("%s wq %p cq %p\n", __func__, wq, cq); 367 PDBG("%s wq %p cq %p\n", __func__, wq, cq);
367 368
@@ -369,8 +370,11 @@ void cxio_flush_rq(struct t3_wq *wq, struct t3_cq *cq, int count)
369 PDBG("%s rq_rptr %u rq_wptr %u skip count %u\n", __func__, 370 PDBG("%s rq_rptr %u rq_wptr %u skip count %u\n", __func__,
370 wq->rq_rptr, wq->rq_wptr, count); 371 wq->rq_rptr, wq->rq_wptr, count);
371 ptr = wq->rq_rptr + count; 372 ptr = wq->rq_rptr + count;
372 while (ptr++ != wq->rq_wptr) 373 while (ptr++ != wq->rq_wptr) {
373 insert_recv_cqe(wq, cq); 374 insert_recv_cqe(wq, cq);
375 flushed++;
376 }
377 return flushed;
374} 378}
375 379
376static void insert_sq_cqe(struct t3_wq *wq, struct t3_cq *cq, 380static void insert_sq_cqe(struct t3_wq *wq, struct t3_cq *cq,
@@ -394,9 +398,10 @@ static void insert_sq_cqe(struct t3_wq *wq, struct t3_cq *cq,
394 cq->sw_wptr++; 398 cq->sw_wptr++;
395} 399}
396 400
397void cxio_flush_sq(struct t3_wq *wq, struct t3_cq *cq, int count) 401int cxio_flush_sq(struct t3_wq *wq, struct t3_cq *cq, int count)
398{ 402{
399 __u32 ptr; 403 __u32 ptr;
404 int flushed = 0;
400 struct t3_swsq *sqp = wq->sq + Q_PTR2IDX(wq->sq_rptr, wq->sq_size_log2); 405 struct t3_swsq *sqp = wq->sq + Q_PTR2IDX(wq->sq_rptr, wq->sq_size_log2);
401 406
402 ptr = wq->sq_rptr + count; 407 ptr = wq->sq_rptr + count;
@@ -405,7 +410,9 @@ void cxio_flush_sq(struct t3_wq *wq, struct t3_cq *cq, int count)
405 insert_sq_cqe(wq, cq, sqp); 410 insert_sq_cqe(wq, cq, sqp);
406 sqp++; 411 sqp++;
407 ptr++; 412 ptr++;
413 flushed++;
408 } 414 }
415 return flushed;
409} 416}
410 417
411/* 418/*
@@ -581,7 +588,7 @@ static int cxio_hal_destroy_ctrl_qp(struct cxio_rdev *rdev_p)
581 * caller aquires the ctrl_qp lock before the call 588 * caller aquires the ctrl_qp lock before the call
582 */ 589 */
583static int cxio_hal_ctrl_qp_write_mem(struct cxio_rdev *rdev_p, u32 addr, 590static int cxio_hal_ctrl_qp_write_mem(struct cxio_rdev *rdev_p, u32 addr,
584 u32 len, void *data, int completion) 591 u32 len, void *data)
585{ 592{
586 u32 i, nr_wqe, copy_len; 593 u32 i, nr_wqe, copy_len;
587 u8 *copy_data; 594 u8 *copy_data;
@@ -617,7 +624,7 @@ static int cxio_hal_ctrl_qp_write_mem(struct cxio_rdev *rdev_p, u32 addr,
617 flag = 0; 624 flag = 0;
618 if (i == (nr_wqe - 1)) { 625 if (i == (nr_wqe - 1)) {
619 /* last WQE */ 626 /* last WQE */
620 flag = completion ? T3_COMPLETION_FLAG : 0; 627 flag = T3_COMPLETION_FLAG;
621 if (len % 32) 628 if (len % 32)
622 utx_len = len / 32 + 1; 629 utx_len = len / 32 + 1;
623 else 630 else
@@ -676,21 +683,20 @@ static int cxio_hal_ctrl_qp_write_mem(struct cxio_rdev *rdev_p, u32 addr,
676 return 0; 683 return 0;
677} 684}
678 685
679/* IN: stag key, pdid, perm, zbva, to, len, page_size, pbl, and pbl_size 686/* IN: stag key, pdid, perm, zbva, to, len, page_size, pbl_size and pbl_addr
680 * OUT: stag index, actual pbl_size, pbl_addr allocated. 687 * OUT: stag index
681 * TBD: shared memory region support 688 * TBD: shared memory region support
682 */ 689 */
683static int __cxio_tpt_op(struct cxio_rdev *rdev_p, u32 reset_tpt_entry, 690static int __cxio_tpt_op(struct cxio_rdev *rdev_p, u32 reset_tpt_entry,
684 u32 *stag, u8 stag_state, u32 pdid, 691 u32 *stag, u8 stag_state, u32 pdid,
685 enum tpt_mem_type type, enum tpt_mem_perm perm, 692 enum tpt_mem_type type, enum tpt_mem_perm perm,
686 u32 zbva, u64 to, u32 len, u8 page_size, __be64 *pbl, 693 u32 zbva, u64 to, u32 len, u8 page_size,
687 u32 *pbl_size, u32 *pbl_addr) 694 u32 pbl_size, u32 pbl_addr)
688{ 695{
689 int err; 696 int err;
690 struct tpt_entry tpt; 697 struct tpt_entry tpt;
691 u32 stag_idx; 698 u32 stag_idx;
692 u32 wptr; 699 u32 wptr;
693 int rereg = (*stag != T3_STAG_UNSET);
694 700
695 stag_state = stag_state > 0; 701 stag_state = stag_state > 0;
696 stag_idx = (*stag) >> 8; 702 stag_idx = (*stag) >> 8;
@@ -704,30 +710,8 @@ static int __cxio_tpt_op(struct cxio_rdev *rdev_p, u32 reset_tpt_entry,
704 PDBG("%s stag_state 0x%0x type 0x%0x pdid 0x%0x, stag_idx 0x%x\n", 710 PDBG("%s stag_state 0x%0x type 0x%0x pdid 0x%0x, stag_idx 0x%x\n",
705 __func__, stag_state, type, pdid, stag_idx); 711 __func__, stag_state, type, pdid, stag_idx);
706 712
707 if (reset_tpt_entry)
708 cxio_hal_pblpool_free(rdev_p, *pbl_addr, *pbl_size << 3);
709 else if (!rereg) {
710 *pbl_addr = cxio_hal_pblpool_alloc(rdev_p, *pbl_size << 3);
711 if (!*pbl_addr) {
712 return -ENOMEM;
713 }
714 }
715
716 mutex_lock(&rdev_p->ctrl_qp.lock); 713 mutex_lock(&rdev_p->ctrl_qp.lock);
717 714
718 /* write PBL first if any - update pbl only if pbl list exist */
719 if (pbl) {
720
721 PDBG("%s *pdb_addr 0x%x, pbl_base 0x%x, pbl_size %d\n",
722 __func__, *pbl_addr, rdev_p->rnic_info.pbl_base,
723 *pbl_size);
724 err = cxio_hal_ctrl_qp_write_mem(rdev_p,
725 (*pbl_addr >> 5),
726 (*pbl_size << 3), pbl, 0);
727 if (err)
728 goto ret;
729 }
730
731 /* write TPT entry */ 715 /* write TPT entry */
732 if (reset_tpt_entry) 716 if (reset_tpt_entry)
733 memset(&tpt, 0, sizeof(tpt)); 717 memset(&tpt, 0, sizeof(tpt));
@@ -742,23 +726,23 @@ static int __cxio_tpt_op(struct cxio_rdev *rdev_p, u32 reset_tpt_entry,
742 V_TPT_ADDR_TYPE((zbva ? TPT_ZBTO : TPT_VATO)) | 726 V_TPT_ADDR_TYPE((zbva ? TPT_ZBTO : TPT_VATO)) |
743 V_TPT_PAGE_SIZE(page_size)); 727 V_TPT_PAGE_SIZE(page_size));
744 tpt.rsvd_pbl_addr = reset_tpt_entry ? 0 : 728 tpt.rsvd_pbl_addr = reset_tpt_entry ? 0 :
745 cpu_to_be32(V_TPT_PBL_ADDR(PBL_OFF(rdev_p, *pbl_addr)>>3)); 729 cpu_to_be32(V_TPT_PBL_ADDR(PBL_OFF(rdev_p, pbl_addr)>>3));
746 tpt.len = cpu_to_be32(len); 730 tpt.len = cpu_to_be32(len);
747 tpt.va_hi = cpu_to_be32((u32) (to >> 32)); 731 tpt.va_hi = cpu_to_be32((u32) (to >> 32));
748 tpt.va_low_or_fbo = cpu_to_be32((u32) (to & 0xFFFFFFFFULL)); 732 tpt.va_low_or_fbo = cpu_to_be32((u32) (to & 0xFFFFFFFFULL));
749 tpt.rsvd_bind_cnt_or_pstag = 0; 733 tpt.rsvd_bind_cnt_or_pstag = 0;
750 tpt.rsvd_pbl_size = reset_tpt_entry ? 0 : 734 tpt.rsvd_pbl_size = reset_tpt_entry ? 0 :
751 cpu_to_be32(V_TPT_PBL_SIZE((*pbl_size) >> 2)); 735 cpu_to_be32(V_TPT_PBL_SIZE(pbl_size >> 2));
752 } 736 }
753 err = cxio_hal_ctrl_qp_write_mem(rdev_p, 737 err = cxio_hal_ctrl_qp_write_mem(rdev_p,
754 stag_idx + 738 stag_idx +
755 (rdev_p->rnic_info.tpt_base >> 5), 739 (rdev_p->rnic_info.tpt_base >> 5),
756 sizeof(tpt), &tpt, 1); 740 sizeof(tpt), &tpt);
757 741
758 /* release the stag index to free pool */ 742 /* release the stag index to free pool */
759 if (reset_tpt_entry) 743 if (reset_tpt_entry)
760 cxio_hal_put_stag(rdev_p->rscp, stag_idx); 744 cxio_hal_put_stag(rdev_p->rscp, stag_idx);
761ret: 745
762 wptr = rdev_p->ctrl_qp.wptr; 746 wptr = rdev_p->ctrl_qp.wptr;
763 mutex_unlock(&rdev_p->ctrl_qp.lock); 747 mutex_unlock(&rdev_p->ctrl_qp.lock);
764 if (!err) 748 if (!err)
@@ -769,44 +753,67 @@ ret:
769 return err; 753 return err;
770} 754}
771 755
756int cxio_write_pbl(struct cxio_rdev *rdev_p, __be64 *pbl,
757 u32 pbl_addr, u32 pbl_size)
758{
759 u32 wptr;
760 int err;
761
762 PDBG("%s *pdb_addr 0x%x, pbl_base 0x%x, pbl_size %d\n",
763 __func__, pbl_addr, rdev_p->rnic_info.pbl_base,
764 pbl_size);
765
766 mutex_lock(&rdev_p->ctrl_qp.lock);
767 err = cxio_hal_ctrl_qp_write_mem(rdev_p, pbl_addr >> 5, pbl_size << 3,
768 pbl);
769 wptr = rdev_p->ctrl_qp.wptr;
770 mutex_unlock(&rdev_p->ctrl_qp.lock);
771 if (err)
772 return err;
773
774 if (wait_event_interruptible(rdev_p->ctrl_qp.waitq,
775 SEQ32_GE(rdev_p->ctrl_qp.rptr,
776 wptr)))
777 return -ERESTARTSYS;
778
779 return 0;
780}
781
772int cxio_register_phys_mem(struct cxio_rdev *rdev_p, u32 *stag, u32 pdid, 782int cxio_register_phys_mem(struct cxio_rdev *rdev_p, u32 *stag, u32 pdid,
773 enum tpt_mem_perm perm, u32 zbva, u64 to, u32 len, 783 enum tpt_mem_perm perm, u32 zbva, u64 to, u32 len,
774 u8 page_size, __be64 *pbl, u32 *pbl_size, 784 u8 page_size, u32 pbl_size, u32 pbl_addr)
775 u32 *pbl_addr)
776{ 785{
777 *stag = T3_STAG_UNSET; 786 *stag = T3_STAG_UNSET;
778 return __cxio_tpt_op(rdev_p, 0, stag, 1, pdid, TPT_NON_SHARED_MR, perm, 787 return __cxio_tpt_op(rdev_p, 0, stag, 1, pdid, TPT_NON_SHARED_MR, perm,
779 zbva, to, len, page_size, pbl, pbl_size, pbl_addr); 788 zbva, to, len, page_size, pbl_size, pbl_addr);
780} 789}
781 790
782int cxio_reregister_phys_mem(struct cxio_rdev *rdev_p, u32 *stag, u32 pdid, 791int cxio_reregister_phys_mem(struct cxio_rdev *rdev_p, u32 *stag, u32 pdid,
783 enum tpt_mem_perm perm, u32 zbva, u64 to, u32 len, 792 enum tpt_mem_perm perm, u32 zbva, u64 to, u32 len,
784 u8 page_size, __be64 *pbl, u32 *pbl_size, 793 u8 page_size, u32 pbl_size, u32 pbl_addr)
785 u32 *pbl_addr)
786{ 794{
787 return __cxio_tpt_op(rdev_p, 0, stag, 1, pdid, TPT_NON_SHARED_MR, perm, 795 return __cxio_tpt_op(rdev_p, 0, stag, 1, pdid, TPT_NON_SHARED_MR, perm,
788 zbva, to, len, page_size, pbl, pbl_size, pbl_addr); 796 zbva, to, len, page_size, pbl_size, pbl_addr);
789} 797}
790 798
791int cxio_dereg_mem(struct cxio_rdev *rdev_p, u32 stag, u32 pbl_size, 799int cxio_dereg_mem(struct cxio_rdev *rdev_p, u32 stag, u32 pbl_size,
792 u32 pbl_addr) 800 u32 pbl_addr)
793{ 801{
794 return __cxio_tpt_op(rdev_p, 1, &stag, 0, 0, 0, 0, 0, 0ULL, 0, 0, NULL, 802 return __cxio_tpt_op(rdev_p, 1, &stag, 0, 0, 0, 0, 0, 0ULL, 0, 0,
795 &pbl_size, &pbl_addr); 803 pbl_size, pbl_addr);
796} 804}
797 805
798int cxio_allocate_window(struct cxio_rdev *rdev_p, u32 * stag, u32 pdid) 806int cxio_allocate_window(struct cxio_rdev *rdev_p, u32 * stag, u32 pdid)
799{ 807{
800 u32 pbl_size = 0;
801 *stag = T3_STAG_UNSET; 808 *stag = T3_STAG_UNSET;
802 return __cxio_tpt_op(rdev_p, 0, stag, 0, pdid, TPT_MW, 0, 0, 0ULL, 0, 0, 809 return __cxio_tpt_op(rdev_p, 0, stag, 0, pdid, TPT_MW, 0, 0, 0ULL, 0, 0,
803 NULL, &pbl_size, NULL); 810 0, 0);
804} 811}
805 812
806int cxio_deallocate_window(struct cxio_rdev *rdev_p, u32 stag) 813int cxio_deallocate_window(struct cxio_rdev *rdev_p, u32 stag)
807{ 814{
808 return __cxio_tpt_op(rdev_p, 1, &stag, 0, 0, 0, 0, 0, 0ULL, 0, 0, NULL, 815 return __cxio_tpt_op(rdev_p, 1, &stag, 0, 0, 0, 0, 0, 0ULL, 0, 0,
809 NULL, NULL); 816 0, 0);
810} 817}
811 818
812int cxio_rdma_init(struct cxio_rdev *rdev_p, struct t3_rdma_init_attr *attr) 819int cxio_rdma_init(struct cxio_rdev *rdev_p, struct t3_rdma_init_attr *attr)
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.h b/drivers/infiniband/hw/cxgb3/cxio_hal.h
index 2bcff7f5046e..6e128f6bab05 100644
--- a/drivers/infiniband/hw/cxgb3/cxio_hal.h
+++ b/drivers/infiniband/hw/cxgb3/cxio_hal.h
@@ -154,14 +154,14 @@ int cxio_create_qp(struct cxio_rdev *rdev, u32 kernel_domain, struct t3_wq *wq,
154int cxio_destroy_qp(struct cxio_rdev *rdev, struct t3_wq *wq, 154int cxio_destroy_qp(struct cxio_rdev *rdev, struct t3_wq *wq,
155 struct cxio_ucontext *uctx); 155 struct cxio_ucontext *uctx);
156int cxio_peek_cq(struct t3_wq *wr, struct t3_cq *cq, int opcode); 156int cxio_peek_cq(struct t3_wq *wr, struct t3_cq *cq, int opcode);
157int cxio_write_pbl(struct cxio_rdev *rdev_p, __be64 *pbl,
158 u32 pbl_addr, u32 pbl_size);
157int cxio_register_phys_mem(struct cxio_rdev *rdev, u32 * stag, u32 pdid, 159int cxio_register_phys_mem(struct cxio_rdev *rdev, u32 * stag, u32 pdid,
158 enum tpt_mem_perm perm, u32 zbva, u64 to, u32 len, 160 enum tpt_mem_perm perm, u32 zbva, u64 to, u32 len,
159 u8 page_size, __be64 *pbl, u32 *pbl_size, 161 u8 page_size, u32 pbl_size, u32 pbl_addr);
160 u32 *pbl_addr);
161int cxio_reregister_phys_mem(struct cxio_rdev *rdev, u32 * stag, u32 pdid, 162int cxio_reregister_phys_mem(struct cxio_rdev *rdev, u32 * stag, u32 pdid,
162 enum tpt_mem_perm perm, u32 zbva, u64 to, u32 len, 163 enum tpt_mem_perm perm, u32 zbva, u64 to, u32 len,
163 u8 page_size, __be64 *pbl, u32 *pbl_size, 164 u8 page_size, u32 pbl_size, u32 pbl_addr);
164 u32 *pbl_addr);
165int cxio_dereg_mem(struct cxio_rdev *rdev, u32 stag, u32 pbl_size, 165int cxio_dereg_mem(struct cxio_rdev *rdev, u32 stag, u32 pbl_size,
166 u32 pbl_addr); 166 u32 pbl_addr);
167int cxio_allocate_window(struct cxio_rdev *rdev, u32 * stag, u32 pdid); 167int cxio_allocate_window(struct cxio_rdev *rdev, u32 * stag, u32 pdid);
@@ -173,8 +173,8 @@ u32 cxio_hal_get_pdid(struct cxio_hal_resource *rscp);
173void cxio_hal_put_pdid(struct cxio_hal_resource *rscp, u32 pdid); 173void cxio_hal_put_pdid(struct cxio_hal_resource *rscp, u32 pdid);
174int __init cxio_hal_init(void); 174int __init cxio_hal_init(void);
175void __exit cxio_hal_exit(void); 175void __exit cxio_hal_exit(void);
176void cxio_flush_rq(struct t3_wq *wq, struct t3_cq *cq, int count); 176int cxio_flush_rq(struct t3_wq *wq, struct t3_cq *cq, int count);
177void cxio_flush_sq(struct t3_wq *wq, struct t3_cq *cq, int count); 177int cxio_flush_sq(struct t3_wq *wq, struct t3_cq *cq, int count);
178void cxio_count_rcqes(struct t3_cq *cq, struct t3_wq *wq, int *count); 178void cxio_count_rcqes(struct t3_cq *cq, struct t3_wq *wq, int *count);
179void cxio_count_scqes(struct t3_cq *cq, struct t3_wq *wq, int *count); 179void cxio_count_scqes(struct t3_cq *cq, struct t3_wq *wq, int *count);
180void cxio_flush_hw_cq(struct t3_cq *cq); 180void cxio_flush_hw_cq(struct t3_cq *cq);
diff --git a/drivers/infiniband/hw/cxgb3/cxio_resource.c b/drivers/infiniband/hw/cxgb3/cxio_resource.c
index 45ed4f25ef78..bd233c087653 100644
--- a/drivers/infiniband/hw/cxgb3/cxio_resource.c
+++ b/drivers/infiniband/hw/cxgb3/cxio_resource.c
@@ -250,7 +250,6 @@ void cxio_hal_destroy_resource(struct cxio_hal_resource *rscp)
250 */ 250 */
251 251
252#define MIN_PBL_SHIFT 8 /* 256B == min PBL size (32 entries) */ 252#define MIN_PBL_SHIFT 8 /* 256B == min PBL size (32 entries) */
253#define PBL_CHUNK 2*1024*1024
254 253
255u32 cxio_hal_pblpool_alloc(struct cxio_rdev *rdev_p, int size) 254u32 cxio_hal_pblpool_alloc(struct cxio_rdev *rdev_p, int size)
256{ 255{
@@ -267,14 +266,35 @@ void cxio_hal_pblpool_free(struct cxio_rdev *rdev_p, u32 addr, int size)
267 266
268int cxio_hal_pblpool_create(struct cxio_rdev *rdev_p) 267int cxio_hal_pblpool_create(struct cxio_rdev *rdev_p)
269{ 268{
270 unsigned long i; 269 unsigned pbl_start, pbl_chunk;
270
271 rdev_p->pbl_pool = gen_pool_create(MIN_PBL_SHIFT, -1); 271 rdev_p->pbl_pool = gen_pool_create(MIN_PBL_SHIFT, -1);
272 if (rdev_p->pbl_pool) 272 if (!rdev_p->pbl_pool)
273 for (i = rdev_p->rnic_info.pbl_base; 273 return -ENOMEM;
274 i <= rdev_p->rnic_info.pbl_top - PBL_CHUNK + 1; 274
275 i += PBL_CHUNK) 275 pbl_start = rdev_p->rnic_info.pbl_base;
276 gen_pool_add(rdev_p->pbl_pool, i, PBL_CHUNK, -1); 276 pbl_chunk = rdev_p->rnic_info.pbl_top - pbl_start + 1;
277 return rdev_p->pbl_pool ? 0 : -ENOMEM; 277
278 while (pbl_start < rdev_p->rnic_info.pbl_top) {
279 pbl_chunk = min(rdev_p->rnic_info.pbl_top - pbl_start + 1,
280 pbl_chunk);
281 if (gen_pool_add(rdev_p->pbl_pool, pbl_start, pbl_chunk, -1)) {
282 PDBG("%s failed to add PBL chunk (%x/%x)\n",
283 __func__, pbl_start, pbl_chunk);
284 if (pbl_chunk <= 1024 << MIN_PBL_SHIFT) {
285 printk(KERN_WARNING MOD "%s: Failed to add all PBL chunks (%x/%x)\n",
286 __func__, pbl_start, rdev_p->rnic_info.pbl_top - pbl_start);
287 return 0;
288 }
289 pbl_chunk >>= 1;
290 } else {
291 PDBG("%s added PBL chunk (%x/%x)\n",
292 __func__, pbl_start, pbl_chunk);
293 pbl_start += pbl_chunk;
294 }
295 }
296
297 return 0;
278} 298}
279 299
280void cxio_hal_pblpool_destroy(struct cxio_rdev *rdev_p) 300void cxio_hal_pblpool_destroy(struct cxio_rdev *rdev_p)
diff --git a/drivers/infiniband/hw/cxgb3/iwch_cm.c b/drivers/infiniband/hw/cxgb3/iwch_cm.c
index d44a6df9ad8c..c325c44807e8 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_cm.c
+++ b/drivers/infiniband/hw/cxgb3/iwch_cm.c
@@ -67,10 +67,10 @@ int peer2peer = 0;
67module_param(peer2peer, int, 0644); 67module_param(peer2peer, int, 0644);
68MODULE_PARM_DESC(peer2peer, "Support peer2peer ULPs (default=0)"); 68MODULE_PARM_DESC(peer2peer, "Support peer2peer ULPs (default=0)");
69 69
70static int ep_timeout_secs = 10; 70static int ep_timeout_secs = 60;
71module_param(ep_timeout_secs, int, 0644); 71module_param(ep_timeout_secs, int, 0644);
72MODULE_PARM_DESC(ep_timeout_secs, "CM Endpoint operation timeout " 72MODULE_PARM_DESC(ep_timeout_secs, "CM Endpoint operation timeout "
73 "in seconds (default=10)"); 73 "in seconds (default=60)");
74 74
75static int mpa_rev = 1; 75static int mpa_rev = 1;
76module_param(mpa_rev, int, 0644); 76module_param(mpa_rev, int, 0644);
@@ -1650,8 +1650,8 @@ static int close_con_rpl(struct t3cdev *tdev, struct sk_buff *skb, void *ctx)
1650 release = 1; 1650 release = 1;
1651 break; 1651 break;
1652 case ABORTING: 1652 case ABORTING:
1653 break;
1654 case DEAD: 1653 case DEAD:
1654 break;
1655 default: 1655 default:
1656 BUG_ON(1); 1656 BUG_ON(1);
1657 break; 1657 break;
diff --git a/drivers/infiniband/hw/cxgb3/iwch_mem.c b/drivers/infiniband/hw/cxgb3/iwch_mem.c
index 58c3d61bcd14..ec49a5cbdebb 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_mem.c
+++ b/drivers/infiniband/hw/cxgb3/iwch_mem.c
@@ -35,17 +35,26 @@
35#include <rdma/ib_verbs.h> 35#include <rdma/ib_verbs.h>
36 36
37#include "cxio_hal.h" 37#include "cxio_hal.h"
38#include "cxio_resource.h"
38#include "iwch.h" 39#include "iwch.h"
39#include "iwch_provider.h" 40#include "iwch_provider.h"
40 41
41int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php, 42static void iwch_finish_mem_reg(struct iwch_mr *mhp, u32 stag)
42 struct iwch_mr *mhp,
43 int shift,
44 __be64 *page_list)
45{ 43{
46 u32 stag;
47 u32 mmid; 44 u32 mmid;
48 45
46 mhp->attr.state = 1;
47 mhp->attr.stag = stag;
48 mmid = stag >> 8;
49 mhp->ibmr.rkey = mhp->ibmr.lkey = stag;
50 insert_handle(mhp->rhp, &mhp->rhp->mmidr, mhp, mmid);
51 PDBG("%s mmid 0x%x mhp %p\n", __func__, mmid, mhp);
52}
53
54int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
55 struct iwch_mr *mhp, int shift)
56{
57 u32 stag;
49 58
50 if (cxio_register_phys_mem(&rhp->rdev, 59 if (cxio_register_phys_mem(&rhp->rdev,
51 &stag, mhp->attr.pdid, 60 &stag, mhp->attr.pdid,
@@ -53,28 +62,21 @@ int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
53 mhp->attr.zbva, 62 mhp->attr.zbva,
54 mhp->attr.va_fbo, 63 mhp->attr.va_fbo,
55 mhp->attr.len, 64 mhp->attr.len,
56 shift-12, 65 shift - 12,
57 page_list, 66 mhp->attr.pbl_size, mhp->attr.pbl_addr))
58 &mhp->attr.pbl_size, &mhp->attr.pbl_addr))
59 return -ENOMEM; 67 return -ENOMEM;
60 mhp->attr.state = 1; 68
61 mhp->attr.stag = stag; 69 iwch_finish_mem_reg(mhp, stag);
62 mmid = stag >> 8; 70
63 mhp->ibmr.rkey = mhp->ibmr.lkey = stag;
64 insert_handle(rhp, &rhp->mmidr, mhp, mmid);
65 PDBG("%s mmid 0x%x mhp %p\n", __func__, mmid, mhp);
66 return 0; 71 return 0;
67} 72}
68 73
69int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php, 74int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,
70 struct iwch_mr *mhp, 75 struct iwch_mr *mhp,
71 int shift, 76 int shift,
72 __be64 *page_list,
73 int npages) 77 int npages)
74{ 78{
75 u32 stag; 79 u32 stag;
76 u32 mmid;
77
78 80
79 /* We could support this... */ 81 /* We could support this... */
80 if (npages > mhp->attr.pbl_size) 82 if (npages > mhp->attr.pbl_size)
@@ -87,19 +89,40 @@ int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,
87 mhp->attr.zbva, 89 mhp->attr.zbva,
88 mhp->attr.va_fbo, 90 mhp->attr.va_fbo,
89 mhp->attr.len, 91 mhp->attr.len,
90 shift-12, 92 shift - 12,
91 page_list, 93 mhp->attr.pbl_size, mhp->attr.pbl_addr))
92 &mhp->attr.pbl_size, &mhp->attr.pbl_addr))
93 return -ENOMEM; 94 return -ENOMEM;
94 mhp->attr.state = 1; 95
95 mhp->attr.stag = stag; 96 iwch_finish_mem_reg(mhp, stag);
96 mmid = stag >> 8; 97
97 mhp->ibmr.rkey = mhp->ibmr.lkey = stag; 98 return 0;
98 insert_handle(rhp, &rhp->mmidr, mhp, mmid); 99}
99 PDBG("%s mmid 0x%x mhp %p\n", __func__, mmid, mhp); 100
101int iwch_alloc_pbl(struct iwch_mr *mhp, int npages)
102{
103 mhp->attr.pbl_addr = cxio_hal_pblpool_alloc(&mhp->rhp->rdev,
104 npages << 3);
105
106 if (!mhp->attr.pbl_addr)
107 return -ENOMEM;
108
109 mhp->attr.pbl_size = npages;
110
100 return 0; 111 return 0;
101} 112}
102 113
114void iwch_free_pbl(struct iwch_mr *mhp)
115{
116 cxio_hal_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr,
117 mhp->attr.pbl_size << 3);
118}
119
120int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset)
121{
122 return cxio_write_pbl(&mhp->rhp->rdev, pages,
123 mhp->attr.pbl_addr + (offset << 3), npages);
124}
125
103int build_phys_page_list(struct ib_phys_buf *buffer_list, 126int build_phys_page_list(struct ib_phys_buf *buffer_list,
104 int num_phys_buf, 127 int num_phys_buf,
105 u64 *iova_start, 128 u64 *iova_start,
diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.c b/drivers/infiniband/hw/cxgb3/iwch_provider.c
index d07d3a377b5f..8934178a23ee 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_provider.c
+++ b/drivers/infiniband/hw/cxgb3/iwch_provider.c
@@ -442,6 +442,7 @@ static int iwch_dereg_mr(struct ib_mr *ib_mr)
442 mmid = mhp->attr.stag >> 8; 442 mmid = mhp->attr.stag >> 8;
443 cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size, 443 cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
444 mhp->attr.pbl_addr); 444 mhp->attr.pbl_addr);
445 iwch_free_pbl(mhp);
445 remove_handle(rhp, &rhp->mmidr, mmid); 446 remove_handle(rhp, &rhp->mmidr, mmid);
446 if (mhp->kva) 447 if (mhp->kva)
447 kfree((void *) (unsigned long) mhp->kva); 448 kfree((void *) (unsigned long) mhp->kva);
@@ -475,6 +476,8 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
475 if (!mhp) 476 if (!mhp)
476 return ERR_PTR(-ENOMEM); 477 return ERR_PTR(-ENOMEM);
477 478
479 mhp->rhp = rhp;
480
478 /* First check that we have enough alignment */ 481 /* First check that we have enough alignment */
479 if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK)) { 482 if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK)) {
480 ret = -EINVAL; 483 ret = -EINVAL;
@@ -492,7 +495,17 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
492 if (ret) 495 if (ret)
493 goto err; 496 goto err;
494 497
495 mhp->rhp = rhp; 498 ret = iwch_alloc_pbl(mhp, npages);
499 if (ret) {
500 kfree(page_list);
501 goto err_pbl;
502 }
503
504 ret = iwch_write_pbl(mhp, page_list, npages, 0);
505 kfree(page_list);
506 if (ret)
507 goto err_pbl;
508
496 mhp->attr.pdid = php->pdid; 509 mhp->attr.pdid = php->pdid;
497 mhp->attr.zbva = 0; 510 mhp->attr.zbva = 0;
498 511
@@ -502,12 +515,15 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
502 515
503 mhp->attr.len = (u32) total_size; 516 mhp->attr.len = (u32) total_size;
504 mhp->attr.pbl_size = npages; 517 mhp->attr.pbl_size = npages;
505 ret = iwch_register_mem(rhp, php, mhp, shift, page_list); 518 ret = iwch_register_mem(rhp, php, mhp, shift);
506 kfree(page_list); 519 if (ret)
507 if (ret) { 520 goto err_pbl;
508 goto err; 521
509 }
510 return &mhp->ibmr; 522 return &mhp->ibmr;
523
524err_pbl:
525 iwch_free_pbl(mhp);
526
511err: 527err:
512 kfree(mhp); 528 kfree(mhp);
513 return ERR_PTR(ret); 529 return ERR_PTR(ret);
@@ -560,7 +576,7 @@ static int iwch_reregister_phys_mem(struct ib_mr *mr,
560 return ret; 576 return ret;
561 } 577 }
562 578
563 ret = iwch_reregister_mem(rhp, php, &mh, shift, page_list, npages); 579 ret = iwch_reregister_mem(rhp, php, &mh, shift, npages);
564 kfree(page_list); 580 kfree(page_list);
565 if (ret) { 581 if (ret) {
566 return ret; 582 return ret;
@@ -602,6 +618,8 @@ static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
602 if (!mhp) 618 if (!mhp)
603 return ERR_PTR(-ENOMEM); 619 return ERR_PTR(-ENOMEM);
604 620
621 mhp->rhp = rhp;
622
605 mhp->umem = ib_umem_get(pd->uobject->context, start, length, acc, 0); 623 mhp->umem = ib_umem_get(pd->uobject->context, start, length, acc, 0);
606 if (IS_ERR(mhp->umem)) { 624 if (IS_ERR(mhp->umem)) {
607 err = PTR_ERR(mhp->umem); 625 err = PTR_ERR(mhp->umem);
@@ -615,10 +633,14 @@ static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
615 list_for_each_entry(chunk, &mhp->umem->chunk_list, list) 633 list_for_each_entry(chunk, &mhp->umem->chunk_list, list)
616 n += chunk->nents; 634 n += chunk->nents;
617 635
618 pages = kmalloc(n * sizeof(u64), GFP_KERNEL); 636 err = iwch_alloc_pbl(mhp, n);
637 if (err)
638 goto err;
639
640 pages = (__be64 *) __get_free_page(GFP_KERNEL);
619 if (!pages) { 641 if (!pages) {
620 err = -ENOMEM; 642 err = -ENOMEM;
621 goto err; 643 goto err_pbl;
622 } 644 }
623 645
624 i = n = 0; 646 i = n = 0;
@@ -630,25 +652,38 @@ static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
630 pages[i++] = cpu_to_be64(sg_dma_address( 652 pages[i++] = cpu_to_be64(sg_dma_address(
631 &chunk->page_list[j]) + 653 &chunk->page_list[j]) +
632 mhp->umem->page_size * k); 654 mhp->umem->page_size * k);
655 if (i == PAGE_SIZE / sizeof *pages) {
656 err = iwch_write_pbl(mhp, pages, i, n);
657 if (err)
658 goto pbl_done;
659 n += i;
660 i = 0;
661 }
633 } 662 }
634 } 663 }
635 664
636 mhp->rhp = rhp; 665 if (i)
666 err = iwch_write_pbl(mhp, pages, i, n);
667
668pbl_done:
669 free_page((unsigned long) pages);
670 if (err)
671 goto err_pbl;
672
637 mhp->attr.pdid = php->pdid; 673 mhp->attr.pdid = php->pdid;
638 mhp->attr.zbva = 0; 674 mhp->attr.zbva = 0;
639 mhp->attr.perms = iwch_ib_to_tpt_access(acc); 675 mhp->attr.perms = iwch_ib_to_tpt_access(acc);
640 mhp->attr.va_fbo = virt; 676 mhp->attr.va_fbo = virt;
641 mhp->attr.page_size = shift - 12; 677 mhp->attr.page_size = shift - 12;
642 mhp->attr.len = (u32) length; 678 mhp->attr.len = (u32) length;
643 mhp->attr.pbl_size = i; 679
644 err = iwch_register_mem(rhp, php, mhp, shift, pages); 680 err = iwch_register_mem(rhp, php, mhp, shift);
645 kfree(pages);
646 if (err) 681 if (err)
647 goto err; 682 goto err_pbl;
648 683
649 if (udata && !t3a_device(rhp)) { 684 if (udata && !t3a_device(rhp)) {
650 uresp.pbl_addr = (mhp->attr.pbl_addr - 685 uresp.pbl_addr = (mhp->attr.pbl_addr -
651 rhp->rdev.rnic_info.pbl_base) >> 3; 686 rhp->rdev.rnic_info.pbl_base) >> 3;
652 PDBG("%s user resp pbl_addr 0x%x\n", __func__, 687 PDBG("%s user resp pbl_addr 0x%x\n", __func__,
653 uresp.pbl_addr); 688 uresp.pbl_addr);
654 689
@@ -661,6 +696,9 @@ static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
661 696
662 return &mhp->ibmr; 697 return &mhp->ibmr;
663 698
699err_pbl:
700 iwch_free_pbl(mhp);
701
664err: 702err:
665 ib_umem_release(mhp->umem); 703 ib_umem_release(mhp->umem);
666 kfree(mhp); 704 kfree(mhp);
diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.h b/drivers/infiniband/hw/cxgb3/iwch_provider.h
index db5100d27ca2..836163fc5429 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_provider.h
+++ b/drivers/infiniband/hw/cxgb3/iwch_provider.h
@@ -340,14 +340,14 @@ int iwch_quiesce_qps(struct iwch_cq *chp);
340int iwch_resume_qps(struct iwch_cq *chp); 340int iwch_resume_qps(struct iwch_cq *chp);
341void stop_read_rep_timer(struct iwch_qp *qhp); 341void stop_read_rep_timer(struct iwch_qp *qhp);
342int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php, 342int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
343 struct iwch_mr *mhp, 343 struct iwch_mr *mhp, int shift);
344 int shift,
345 __be64 *page_list);
346int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php, 344int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,
347 struct iwch_mr *mhp, 345 struct iwch_mr *mhp,
348 int shift, 346 int shift,
349 __be64 *page_list,
350 int npages); 347 int npages);
348int iwch_alloc_pbl(struct iwch_mr *mhp, int npages);
349void iwch_free_pbl(struct iwch_mr *mhp);
350int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset);
351int build_phys_page_list(struct ib_phys_buf *buffer_list, 351int build_phys_page_list(struct ib_phys_buf *buffer_list,
352 int num_phys_buf, 352 int num_phys_buf,
353 u64 *iova_start, 353 u64 *iova_start,
diff --git a/drivers/infiniband/hw/cxgb3/iwch_qp.c b/drivers/infiniband/hw/cxgb3/iwch_qp.c
index 9b4be889c58e..79dbe5beae52 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_qp.c
+++ b/drivers/infiniband/hw/cxgb3/iwch_qp.c
@@ -655,6 +655,7 @@ static void __flush_qp(struct iwch_qp *qhp, unsigned long *flag)
655{ 655{
656 struct iwch_cq *rchp, *schp; 656 struct iwch_cq *rchp, *schp;
657 int count; 657 int count;
658 int flushed;
658 659
659 rchp = get_chp(qhp->rhp, qhp->attr.rcq); 660 rchp = get_chp(qhp->rhp, qhp->attr.rcq);
660 schp = get_chp(qhp->rhp, qhp->attr.scq); 661 schp = get_chp(qhp->rhp, qhp->attr.scq);
@@ -669,20 +670,22 @@ static void __flush_qp(struct iwch_qp *qhp, unsigned long *flag)
669 spin_lock(&qhp->lock); 670 spin_lock(&qhp->lock);
670 cxio_flush_hw_cq(&rchp->cq); 671 cxio_flush_hw_cq(&rchp->cq);
671 cxio_count_rcqes(&rchp->cq, &qhp->wq, &count); 672 cxio_count_rcqes(&rchp->cq, &qhp->wq, &count);
672 cxio_flush_rq(&qhp->wq, &rchp->cq, count); 673 flushed = cxio_flush_rq(&qhp->wq, &rchp->cq, count);
673 spin_unlock(&qhp->lock); 674 spin_unlock(&qhp->lock);
674 spin_unlock_irqrestore(&rchp->lock, *flag); 675 spin_unlock_irqrestore(&rchp->lock, *flag);
675 (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); 676 if (flushed)
677 (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context);
676 678
677 /* locking heirarchy: cq lock first, then qp lock. */ 679 /* locking heirarchy: cq lock first, then qp lock. */
678 spin_lock_irqsave(&schp->lock, *flag); 680 spin_lock_irqsave(&schp->lock, *flag);
679 spin_lock(&qhp->lock); 681 spin_lock(&qhp->lock);
680 cxio_flush_hw_cq(&schp->cq); 682 cxio_flush_hw_cq(&schp->cq);
681 cxio_count_scqes(&schp->cq, &qhp->wq, &count); 683 cxio_count_scqes(&schp->cq, &qhp->wq, &count);
682 cxio_flush_sq(&qhp->wq, &schp->cq, count); 684 flushed = cxio_flush_sq(&qhp->wq, &schp->cq, count);
683 spin_unlock(&qhp->lock); 685 spin_unlock(&qhp->lock);
684 spin_unlock_irqrestore(&schp->lock, *flag); 686 spin_unlock_irqrestore(&schp->lock, *flag);
685 (*schp->ibcq.comp_handler)(&schp->ibcq, schp->ibcq.cq_context); 687 if (flushed)
688 (*schp->ibcq.comp_handler)(&schp->ibcq, schp->ibcq.cq_context);
686 689
687 /* deref */ 690 /* deref */
688 if (atomic_dec_and_test(&qhp->refcnt)) 691 if (atomic_dec_and_test(&qhp->refcnt))
@@ -880,7 +883,6 @@ int iwch_modify_qp(struct iwch_dev *rhp, struct iwch_qp *qhp,
880 ep = qhp->ep; 883 ep = qhp->ep;
881 get_ep(&ep->com); 884 get_ep(&ep->com);
882 } 885 }
883 flush_qp(qhp, &flag);
884 break; 886 break;
885 case IWCH_QP_STATE_TERMINATE: 887 case IWCH_QP_STATE_TERMINATE:
886 qhp->attr.state = IWCH_QP_STATE_TERMINATE; 888 qhp->attr.state = IWCH_QP_STATE_TERMINATE;
@@ -911,6 +913,7 @@ int iwch_modify_qp(struct iwch_dev *rhp, struct iwch_qp *qhp,
911 } 913 }
912 switch (attrs->next_state) { 914 switch (attrs->next_state) {
913 case IWCH_QP_STATE_IDLE: 915 case IWCH_QP_STATE_IDLE:
916 flush_qp(qhp, &flag);
914 qhp->attr.state = IWCH_QP_STATE_IDLE; 917 qhp->attr.state = IWCH_QP_STATE_IDLE;
915 qhp->attr.llp_stream_handle = NULL; 918 qhp->attr.llp_stream_handle = NULL;
916 put_ep(&qhp->ep->com); 919 put_ep(&qhp->ep->com);
diff --git a/drivers/infiniband/hw/ehca/ehca_classes.h b/drivers/infiniband/hw/ehca/ehca_classes.h
index 00bab60f6de4..1e9e99a13933 100644
--- a/drivers/infiniband/hw/ehca/ehca_classes.h
+++ b/drivers/infiniband/hw/ehca/ehca_classes.h
@@ -192,6 +192,8 @@ struct ehca_qp {
192 int mtu_shift; 192 int mtu_shift;
193 u32 message_count; 193 u32 message_count;
194 u32 packet_count; 194 u32 packet_count;
195 atomic_t nr_events; /* events seen */
196 wait_queue_head_t wait_completion;
195}; 197};
196 198
197#define IS_SRQ(qp) (qp->ext_type == EQPT_SRQ) 199#define IS_SRQ(qp) (qp->ext_type == EQPT_SRQ)
diff --git a/drivers/infiniband/hw/ehca/ehca_hca.c b/drivers/infiniband/hw/ehca/ehca_hca.c
index 2515cbde7e65..bc3b37d2070f 100644
--- a/drivers/infiniband/hw/ehca/ehca_hca.c
+++ b/drivers/infiniband/hw/ehca/ehca_hca.c
@@ -101,7 +101,6 @@ int ehca_query_device(struct ib_device *ibdev, struct ib_device_attr *props)
101 props->max_ee = limit_uint(rblock->max_rd_ee_context); 101 props->max_ee = limit_uint(rblock->max_rd_ee_context);
102 props->max_rdd = limit_uint(rblock->max_rd_domain); 102 props->max_rdd = limit_uint(rblock->max_rd_domain);
103 props->max_fmr = limit_uint(rblock->max_mr); 103 props->max_fmr = limit_uint(rblock->max_mr);
104 props->local_ca_ack_delay = limit_uint(rblock->local_ca_ack_delay);
105 props->max_qp_rd_atom = limit_uint(rblock->max_rr_qp); 104 props->max_qp_rd_atom = limit_uint(rblock->max_rr_qp);
106 props->max_ee_rd_atom = limit_uint(rblock->max_rr_ee_context); 105 props->max_ee_rd_atom = limit_uint(rblock->max_rr_ee_context);
107 props->max_res_rd_atom = limit_uint(rblock->max_rr_hca); 106 props->max_res_rd_atom = limit_uint(rblock->max_rr_hca);
@@ -115,7 +114,7 @@ int ehca_query_device(struct ib_device *ibdev, struct ib_device_attr *props)
115 } 114 }
116 115
117 props->max_pkeys = 16; 116 props->max_pkeys = 16;
118 props->local_ca_ack_delay = limit_uint(rblock->local_ca_ack_delay); 117 props->local_ca_ack_delay = min_t(u8, rblock->local_ca_ack_delay, 255);
119 props->max_raw_ipv6_qp = limit_uint(rblock->max_raw_ipv6_qp); 118 props->max_raw_ipv6_qp = limit_uint(rblock->max_raw_ipv6_qp);
120 props->max_raw_ethy_qp = limit_uint(rblock->max_raw_ethy_qp); 119 props->max_raw_ethy_qp = limit_uint(rblock->max_raw_ethy_qp);
121 props->max_mcast_grp = limit_uint(rblock->max_mcast_grp); 120 props->max_mcast_grp = limit_uint(rblock->max_mcast_grp);
@@ -136,7 +135,7 @@ query_device1:
136 return ret; 135 return ret;
137} 136}
138 137
139static int map_mtu(struct ehca_shca *shca, u32 fw_mtu) 138static enum ib_mtu map_mtu(struct ehca_shca *shca, u32 fw_mtu)
140{ 139{
141 switch (fw_mtu) { 140 switch (fw_mtu) {
142 case 0x1: 141 case 0x1:
@@ -156,7 +155,7 @@ static int map_mtu(struct ehca_shca *shca, u32 fw_mtu)
156 } 155 }
157} 156}
158 157
159static int map_number_of_vls(struct ehca_shca *shca, u32 vl_cap) 158static u8 map_number_of_vls(struct ehca_shca *shca, u32 vl_cap)
160{ 159{
161 switch (vl_cap) { 160 switch (vl_cap) {
162 case 0x1: 161 case 0x1:
diff --git a/drivers/infiniband/hw/ehca/ehca_irq.c b/drivers/infiniband/hw/ehca/ehca_irq.c
index ca5eb0cb628c..ce1ab0571be3 100644
--- a/drivers/infiniband/hw/ehca/ehca_irq.c
+++ b/drivers/infiniband/hw/ehca/ehca_irq.c
@@ -204,6 +204,8 @@ static void qp_event_callback(struct ehca_shca *shca, u64 eqe,
204 204
205 read_lock(&ehca_qp_idr_lock); 205 read_lock(&ehca_qp_idr_lock);
206 qp = idr_find(&ehca_qp_idr, token); 206 qp = idr_find(&ehca_qp_idr, token);
207 if (qp)
208 atomic_inc(&qp->nr_events);
207 read_unlock(&ehca_qp_idr_lock); 209 read_unlock(&ehca_qp_idr_lock);
208 210
209 if (!qp) 211 if (!qp)
@@ -223,6 +225,8 @@ static void qp_event_callback(struct ehca_shca *shca, u64 eqe,
223 if (fatal && qp->ext_type == EQPT_SRQBASE) 225 if (fatal && qp->ext_type == EQPT_SRQBASE)
224 dispatch_qp_event(shca, qp, IB_EVENT_QP_LAST_WQE_REACHED); 226 dispatch_qp_event(shca, qp, IB_EVENT_QP_LAST_WQE_REACHED);
225 227
228 if (atomic_dec_and_test(&qp->nr_events))
229 wake_up(&qp->wait_completion);
226 return; 230 return;
227} 231}
228 232
diff --git a/drivers/infiniband/hw/ehca/ehca_qp.c b/drivers/infiniband/hw/ehca/ehca_qp.c
index 18fba92fa7ae..3f59587338ea 100644
--- a/drivers/infiniband/hw/ehca/ehca_qp.c
+++ b/drivers/infiniband/hw/ehca/ehca_qp.c
@@ -566,6 +566,8 @@ static struct ehca_qp *internal_create_qp(
566 return ERR_PTR(-ENOMEM); 566 return ERR_PTR(-ENOMEM);
567 } 567 }
568 568
569 atomic_set(&my_qp->nr_events, 0);
570 init_waitqueue_head(&my_qp->wait_completion);
569 spin_lock_init(&my_qp->spinlock_s); 571 spin_lock_init(&my_qp->spinlock_s);
570 spin_lock_init(&my_qp->spinlock_r); 572 spin_lock_init(&my_qp->spinlock_r);
571 my_qp->qp_type = qp_type; 573 my_qp->qp_type = qp_type;
@@ -1934,6 +1936,9 @@ static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1934 idr_remove(&ehca_qp_idr, my_qp->token); 1936 idr_remove(&ehca_qp_idr, my_qp->token);
1935 write_unlock_irqrestore(&ehca_qp_idr_lock, flags); 1937 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1936 1938
1939 /* now wait until all pending events have completed */
1940 wait_event(my_qp->wait_completion, !atomic_read(&my_qp->nr_events));
1941
1937 h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp); 1942 h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1938 if (h_ret != H_SUCCESS) { 1943 if (h_ret != H_SUCCESS) {
1939 ehca_err(dev, "hipz_h_destroy_qp() failed h_ret=%li " 1944 ehca_err(dev, "hipz_h_destroy_qp() failed h_ret=%li "
diff --git a/drivers/infiniband/hw/ipath/ipath_driver.c b/drivers/infiniband/hw/ipath/ipath_driver.c
index acf30c06a0c0..ce7b7c34360e 100644
--- a/drivers/infiniband/hw/ipath/ipath_driver.c
+++ b/drivers/infiniband/hw/ipath/ipath_driver.c
@@ -1197,7 +1197,7 @@ void ipath_kreceive(struct ipath_portdata *pd)
1197 } 1197 }
1198 1198
1199reloop: 1199reloop:
1200 for (last = 0, i = 1; !last; i++) { 1200 for (last = 0, i = 1; !last; i += !last) {
1201 hdr = dd->ipath_f_get_msgheader(dd, rhf_addr); 1201 hdr = dd->ipath_f_get_msgheader(dd, rhf_addr);
1202 eflags = ipath_hdrget_err_flags(rhf_addr); 1202 eflags = ipath_hdrget_err_flags(rhf_addr);
1203 etype = ipath_hdrget_rcv_type(rhf_addr); 1203 etype = ipath_hdrget_rcv_type(rhf_addr);
@@ -1428,6 +1428,40 @@ static void ipath_update_pio_bufs(struct ipath_devdata *dd)
1428 spin_unlock_irqrestore(&ipath_pioavail_lock, flags); 1428 spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1429} 1429}
1430 1430
1431/*
1432 * used to force update of pioavailshadow if we can't get a pio buffer.
1433 * Needed primarily due to exitting freeze mode after recovering
1434 * from errors. Done lazily, because it's safer (known to not
1435 * be writing pio buffers).
1436 */
1437static void ipath_reset_availshadow(struct ipath_devdata *dd)
1438{
1439 int i, im;
1440 unsigned long flags;
1441
1442 spin_lock_irqsave(&ipath_pioavail_lock, flags);
1443 for (i = 0; i < dd->ipath_pioavregs; i++) {
1444 u64 val, oldval;
1445 /* deal with 6110 chip bug on high register #s */
1446 im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
1447 i ^ 1 : i;
1448 val = le64_to_cpu(dd->ipath_pioavailregs_dma[im]);
1449 /*
1450 * busy out the buffers not in the kernel avail list,
1451 * without changing the generation bits.
1452 */
1453 oldval = dd->ipath_pioavailshadow[i];
1454 dd->ipath_pioavailshadow[i] = val |
1455 ((~dd->ipath_pioavailkernel[i] <<
1456 INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT) &
1457 0xaaaaaaaaaaaaaaaaULL); /* All BUSY bits in qword */
1458 if (oldval != dd->ipath_pioavailshadow[i])
1459 ipath_dbg("shadow[%d] was %Lx, now %lx\n",
1460 i, oldval, dd->ipath_pioavailshadow[i]);
1461 }
1462 spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1463}
1464
1431/** 1465/**
1432 * ipath_setrcvhdrsize - set the receive header size 1466 * ipath_setrcvhdrsize - set the receive header size
1433 * @dd: the infinipath device 1467 * @dd: the infinipath device
@@ -1482,9 +1516,12 @@ static noinline void no_pio_bufs(struct ipath_devdata *dd)
1482 */ 1516 */
1483 ipath_stats.sps_nopiobufs++; 1517 ipath_stats.sps_nopiobufs++;
1484 if (!(++dd->ipath_consec_nopiobuf % 100000)) { 1518 if (!(++dd->ipath_consec_nopiobuf % 100000)) {
1485 ipath_dbg("%u pio sends with no bufavail; dmacopy: " 1519 ipath_force_pio_avail_update(dd); /* at start */
1486 "%llx %llx %llx %llx; shadow: %lx %lx %lx %lx\n", 1520 ipath_dbg("%u tries no piobufavail ts%lx; dmacopy: "
1521 "%llx %llx %llx %llx\n"
1522 "ipath shadow: %lx %lx %lx %lx\n",
1487 dd->ipath_consec_nopiobuf, 1523 dd->ipath_consec_nopiobuf,
1524 (unsigned long)get_cycles(),
1488 (unsigned long long) le64_to_cpu(dma[0]), 1525 (unsigned long long) le64_to_cpu(dma[0]),
1489 (unsigned long long) le64_to_cpu(dma[1]), 1526 (unsigned long long) le64_to_cpu(dma[1]),
1490 (unsigned long long) le64_to_cpu(dma[2]), 1527 (unsigned long long) le64_to_cpu(dma[2]),
@@ -1496,14 +1533,17 @@ static noinline void no_pio_bufs(struct ipath_devdata *dd)
1496 */ 1533 */
1497 if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) > 1534 if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) >
1498 (sizeof(shadow[0]) * 4 * 4)) 1535 (sizeof(shadow[0]) * 4 * 4))
1499 ipath_dbg("2nd group: dmacopy: %llx %llx " 1536 ipath_dbg("2nd group: dmacopy: "
1500 "%llx %llx; shadow: %lx %lx %lx %lx\n", 1537 "%llx %llx %llx %llx\n"
1538 "ipath shadow: %lx %lx %lx %lx\n",
1501 (unsigned long long)le64_to_cpu(dma[4]), 1539 (unsigned long long)le64_to_cpu(dma[4]),
1502 (unsigned long long)le64_to_cpu(dma[5]), 1540 (unsigned long long)le64_to_cpu(dma[5]),
1503 (unsigned long long)le64_to_cpu(dma[6]), 1541 (unsigned long long)le64_to_cpu(dma[6]),
1504 (unsigned long long)le64_to_cpu(dma[7]), 1542 (unsigned long long)le64_to_cpu(dma[7]),
1505 shadow[4], shadow[5], shadow[6], 1543 shadow[4], shadow[5], shadow[6], shadow[7]);
1506 shadow[7]); 1544
1545 /* at end, so update likely happened */
1546 ipath_reset_availshadow(dd);
1507 } 1547 }
1508} 1548}
1509 1549
@@ -1652,19 +1692,46 @@ void ipath_chg_pioavailkernel(struct ipath_devdata *dd, unsigned start,
1652 unsigned len, int avail) 1692 unsigned len, int avail)
1653{ 1693{
1654 unsigned long flags; 1694 unsigned long flags;
1655 unsigned end; 1695 unsigned end, cnt = 0, next;
1656 1696
1657 /* There are two bits per send buffer (busy and generation) */ 1697 /* There are two bits per send buffer (busy and generation) */
1658 start *= 2; 1698 start *= 2;
1659 len *= 2; 1699 end = start + len * 2;
1660 end = start + len;
1661 1700
1662 /* Set or clear the generation bits. */
1663 spin_lock_irqsave(&ipath_pioavail_lock, flags); 1701 spin_lock_irqsave(&ipath_pioavail_lock, flags);
1702 /* Set or clear the busy bit in the shadow. */
1664 while (start < end) { 1703 while (start < end) {
1665 if (avail) { 1704 if (avail) {
1666 __clear_bit(start + INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT, 1705 unsigned long dma;
1667 dd->ipath_pioavailshadow); 1706 int i, im;
1707 /*
1708 * the BUSY bit will never be set, because we disarm
1709 * the user buffers before we hand them back to the
1710 * kernel. We do have to make sure the generation
1711 * bit is set correctly in shadow, since it could
1712 * have changed many times while allocated to user.
1713 * We can't use the bitmap functions on the full
1714 * dma array because it is always little-endian, so
1715 * we have to flip to host-order first.
1716 * BITS_PER_LONG is slightly wrong, since it's
1717 * always 64 bits per register in chip...
1718 * We only work on 64 bit kernels, so that's OK.
1719 */
1720 /* deal with 6110 chip bug on high register #s */
1721 i = start / BITS_PER_LONG;
1722 im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
1723 i ^ 1 : i;
1724 __clear_bit(INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT
1725 + start, dd->ipath_pioavailshadow);
1726 dma = (unsigned long) le64_to_cpu(
1727 dd->ipath_pioavailregs_dma[im]);
1728 if (test_bit((INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1729 + start) % BITS_PER_LONG, &dma))
1730 __set_bit(INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1731 + start, dd->ipath_pioavailshadow);
1732 else
1733 __clear_bit(INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1734 + start, dd->ipath_pioavailshadow);
1668 __set_bit(start, dd->ipath_pioavailkernel); 1735 __set_bit(start, dd->ipath_pioavailkernel);
1669 } else { 1736 } else {
1670 __set_bit(start + INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT, 1737 __set_bit(start + INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT,
@@ -1673,7 +1740,44 @@ void ipath_chg_pioavailkernel(struct ipath_devdata *dd, unsigned start,
1673 } 1740 }
1674 start += 2; 1741 start += 2;
1675 } 1742 }
1743
1744 if (dd->ipath_pioupd_thresh) {
1745 end = 2 * (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k);
1746 next = find_first_bit(dd->ipath_pioavailkernel, end);
1747 while (next < end) {
1748 cnt++;
1749 next = find_next_bit(dd->ipath_pioavailkernel, end,
1750 next + 1);
1751 }
1752 }
1676 spin_unlock_irqrestore(&ipath_pioavail_lock, flags); 1753 spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1754
1755 /*
1756 * When moving buffers from kernel to user, if number assigned to
1757 * the user is less than the pio update threshold, and threshold
1758 * is supported (cnt was computed > 0), drop the update threshold
1759 * so we update at least once per allocated number of buffers.
1760 * In any case, if the kernel buffers are less than the threshold,
1761 * drop the threshold. We don't bother increasing it, having once
1762 * decreased it, since it would typically just cycle back and forth.
1763 * If we don't decrease below buffers in use, we can wait a long
1764 * time for an update, until some other context uses PIO buffers.
1765 */
1766 if (!avail && len < cnt)
1767 cnt = len;
1768 if (cnt < dd->ipath_pioupd_thresh) {
1769 dd->ipath_pioupd_thresh = cnt;
1770 ipath_dbg("Decreased pio update threshold to %u\n",
1771 dd->ipath_pioupd_thresh);
1772 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1773 dd->ipath_sendctrl &= ~(INFINIPATH_S_UPDTHRESH_MASK
1774 << INFINIPATH_S_UPDTHRESH_SHIFT);
1775 dd->ipath_sendctrl |= dd->ipath_pioupd_thresh
1776 << INFINIPATH_S_UPDTHRESH_SHIFT;
1777 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1778 dd->ipath_sendctrl);
1779 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1780 }
1677} 1781}
1678 1782
1679/** 1783/**
@@ -1794,8 +1898,8 @@ void ipath_cancel_sends(struct ipath_devdata *dd, int restore_sendctrl)
1794 1898
1795 spin_lock_irqsave(&dd->ipath_sdma_lock, flags); 1899 spin_lock_irqsave(&dd->ipath_sdma_lock, flags);
1796 skip_cancel = 1900 skip_cancel =
1797 !test_bit(IPATH_SDMA_DISABLED, statp) && 1901 test_and_set_bit(IPATH_SDMA_ABORTING, statp)
1798 test_and_set_bit(IPATH_SDMA_ABORTING, statp); 1902 && !test_bit(IPATH_SDMA_DISABLED, statp);
1799 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags); 1903 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
1800 if (skip_cancel) 1904 if (skip_cancel)
1801 goto bail; 1905 goto bail;
@@ -1826,6 +1930,9 @@ void ipath_cancel_sends(struct ipath_devdata *dd, int restore_sendctrl)
1826 ipath_disarm_piobufs(dd, 0, 1930 ipath_disarm_piobufs(dd, 0,
1827 dd->ipath_piobcnt2k + dd->ipath_piobcnt4k); 1931 dd->ipath_piobcnt2k + dd->ipath_piobcnt4k);
1828 1932
1933 if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
1934 set_bit(IPATH_SDMA_DISARMED, &dd->ipath_sdma_status);
1935
1829 if (restore_sendctrl) { 1936 if (restore_sendctrl) {
1830 /* else done by caller later if needed */ 1937 /* else done by caller later if needed */
1831 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags); 1938 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
@@ -1845,7 +1952,6 @@ void ipath_cancel_sends(struct ipath_devdata *dd, int restore_sendctrl)
1845 /* only wait so long for intr */ 1952 /* only wait so long for intr */
1846 dd->ipath_sdma_abort_intr_timeout = jiffies + HZ; 1953 dd->ipath_sdma_abort_intr_timeout = jiffies + HZ;
1847 dd->ipath_sdma_reset_wait = 200; 1954 dd->ipath_sdma_reset_wait = 200;
1848 __set_bit(IPATH_SDMA_DISARMED, &dd->ipath_sdma_status);
1849 if (!test_bit(IPATH_SDMA_SHUTDOWN, &dd->ipath_sdma_status)) 1955 if (!test_bit(IPATH_SDMA_SHUTDOWN, &dd->ipath_sdma_status))
1850 tasklet_hi_schedule(&dd->ipath_sdma_abort_task); 1956 tasklet_hi_schedule(&dd->ipath_sdma_abort_task);
1851 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags); 1957 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
diff --git a/drivers/infiniband/hw/ipath/ipath_file_ops.c b/drivers/infiniband/hw/ipath/ipath_file_ops.c
index 8b1752202e78..3295177c937e 100644
--- a/drivers/infiniband/hw/ipath/ipath_file_ops.c
+++ b/drivers/infiniband/hw/ipath/ipath_file_ops.c
@@ -173,47 +173,25 @@ static int ipath_get_base_info(struct file *fp,
173 (void *) dd->ipath_statusp - 173 (void *) dd->ipath_statusp -
174 (void *) dd->ipath_pioavailregs_dma; 174 (void *) dd->ipath_pioavailregs_dma;
175 if (!shared) { 175 if (!shared) {
176 kinfo->spi_piocnt = dd->ipath_pbufsport; 176 kinfo->spi_piocnt = pd->port_piocnt;
177 kinfo->spi_piobufbase = (u64) pd->port_piobufs; 177 kinfo->spi_piobufbase = (u64) pd->port_piobufs;
178 kinfo->__spi_uregbase = (u64) dd->ipath_uregbase + 178 kinfo->__spi_uregbase = (u64) dd->ipath_uregbase +
179 dd->ipath_ureg_align * pd->port_port; 179 dd->ipath_ureg_align * pd->port_port;
180 } else if (master) { 180 } else if (master) {
181 kinfo->spi_piocnt = (dd->ipath_pbufsport / subport_cnt) + 181 kinfo->spi_piocnt = (pd->port_piocnt / subport_cnt) +
182 (dd->ipath_pbufsport % subport_cnt); 182 (pd->port_piocnt % subport_cnt);
183 /* Master's PIO buffers are after all the slave's */ 183 /* Master's PIO buffers are after all the slave's */
184 kinfo->spi_piobufbase = (u64) pd->port_piobufs + 184 kinfo->spi_piobufbase = (u64) pd->port_piobufs +
185 dd->ipath_palign * 185 dd->ipath_palign *
186 (dd->ipath_pbufsport - kinfo->spi_piocnt); 186 (pd->port_piocnt - kinfo->spi_piocnt);
187 } else { 187 } else {
188 unsigned slave = subport_fp(fp) - 1; 188 unsigned slave = subport_fp(fp) - 1;
189 189
190 kinfo->spi_piocnt = dd->ipath_pbufsport / subport_cnt; 190 kinfo->spi_piocnt = pd->port_piocnt / subport_cnt;
191 kinfo->spi_piobufbase = (u64) pd->port_piobufs + 191 kinfo->spi_piobufbase = (u64) pd->port_piobufs +
192 dd->ipath_palign * kinfo->spi_piocnt * slave; 192 dd->ipath_palign * kinfo->spi_piocnt * slave;
193 } 193 }
194 194
195 /*
196 * Set the PIO avail update threshold to no larger
197 * than the number of buffers per process. Note that
198 * we decrease it here, but won't ever increase it.
199 */
200 if (dd->ipath_pioupd_thresh &&
201 kinfo->spi_piocnt < dd->ipath_pioupd_thresh) {
202 unsigned long flags;
203
204 dd->ipath_pioupd_thresh = kinfo->spi_piocnt;
205 ipath_dbg("Decreased pio update threshold to %u\n",
206 dd->ipath_pioupd_thresh);
207 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
208 dd->ipath_sendctrl &= ~(INFINIPATH_S_UPDTHRESH_MASK
209 << INFINIPATH_S_UPDTHRESH_SHIFT);
210 dd->ipath_sendctrl |= dd->ipath_pioupd_thresh
211 << INFINIPATH_S_UPDTHRESH_SHIFT;
212 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
213 dd->ipath_sendctrl);
214 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
215 }
216
217 if (shared) { 195 if (shared) {
218 kinfo->spi_port_uregbase = (u64) dd->ipath_uregbase + 196 kinfo->spi_port_uregbase = (u64) dd->ipath_uregbase +
219 dd->ipath_ureg_align * pd->port_port; 197 dd->ipath_ureg_align * pd->port_port;
@@ -1309,19 +1287,19 @@ static int ipath_mmap(struct file *fp, struct vm_area_struct *vma)
1309 ureg = dd->ipath_uregbase + dd->ipath_ureg_align * pd->port_port; 1287 ureg = dd->ipath_uregbase + dd->ipath_ureg_align * pd->port_port;
1310 if (!pd->port_subport_cnt) { 1288 if (!pd->port_subport_cnt) {
1311 /* port is not shared */ 1289 /* port is not shared */
1312 piocnt = dd->ipath_pbufsport; 1290 piocnt = pd->port_piocnt;
1313 piobufs = pd->port_piobufs; 1291 piobufs = pd->port_piobufs;
1314 } else if (!subport_fp(fp)) { 1292 } else if (!subport_fp(fp)) {
1315 /* caller is the master */ 1293 /* caller is the master */
1316 piocnt = (dd->ipath_pbufsport / pd->port_subport_cnt) + 1294 piocnt = (pd->port_piocnt / pd->port_subport_cnt) +
1317 (dd->ipath_pbufsport % pd->port_subport_cnt); 1295 (pd->port_piocnt % pd->port_subport_cnt);
1318 piobufs = pd->port_piobufs + 1296 piobufs = pd->port_piobufs +
1319 dd->ipath_palign * (dd->ipath_pbufsport - piocnt); 1297 dd->ipath_palign * (pd->port_piocnt - piocnt);
1320 } else { 1298 } else {
1321 unsigned slave = subport_fp(fp) - 1; 1299 unsigned slave = subport_fp(fp) - 1;
1322 1300
1323 /* caller is a slave */ 1301 /* caller is a slave */
1324 piocnt = dd->ipath_pbufsport / pd->port_subport_cnt; 1302 piocnt = pd->port_piocnt / pd->port_subport_cnt;
1325 piobufs = pd->port_piobufs + dd->ipath_palign * piocnt * slave; 1303 piobufs = pd->port_piobufs + dd->ipath_palign * piocnt * slave;
1326 } 1304 }
1327 1305
@@ -1633,9 +1611,6 @@ static int try_alloc_port(struct ipath_devdata *dd, int port,
1633 port_fp(fp) = pd; 1611 port_fp(fp) = pd;
1634 pd->port_pid = current->pid; 1612 pd->port_pid = current->pid;
1635 strncpy(pd->port_comm, current->comm, sizeof(pd->port_comm)); 1613 strncpy(pd->port_comm, current->comm, sizeof(pd->port_comm));
1636 ipath_chg_pioavailkernel(dd,
1637 dd->ipath_pbufsport * (pd->port_port - 1),
1638 dd->ipath_pbufsport, 0);
1639 ipath_stats.sps_ports++; 1614 ipath_stats.sps_ports++;
1640 ret = 0; 1615 ret = 0;
1641 } else 1616 } else
@@ -1938,11 +1913,25 @@ static int ipath_do_user_init(struct file *fp,
1938 1913
1939 /* for now we do nothing with rcvhdrcnt: uinfo->spu_rcvhdrcnt */ 1914 /* for now we do nothing with rcvhdrcnt: uinfo->spu_rcvhdrcnt */
1940 1915
1916 /* some ports may get extra buffers, calculate that here */
1917 if (pd->port_port <= dd->ipath_ports_extrabuf)
1918 pd->port_piocnt = dd->ipath_pbufsport + 1;
1919 else
1920 pd->port_piocnt = dd->ipath_pbufsport;
1921
1941 /* for right now, kernel piobufs are at end, so port 1 is at 0 */ 1922 /* for right now, kernel piobufs are at end, so port 1 is at 0 */
1923 if (pd->port_port <= dd->ipath_ports_extrabuf)
1924 pd->port_pio_base = (dd->ipath_pbufsport + 1)
1925 * (pd->port_port - 1);
1926 else
1927 pd->port_pio_base = dd->ipath_ports_extrabuf +
1928 dd->ipath_pbufsport * (pd->port_port - 1);
1942 pd->port_piobufs = dd->ipath_piobufbase + 1929 pd->port_piobufs = dd->ipath_piobufbase +
1943 dd->ipath_pbufsport * (pd->port_port - 1) * dd->ipath_palign; 1930 pd->port_pio_base * dd->ipath_palign;
1944 ipath_cdbg(VERBOSE, "Set base of piobufs for port %u to 0x%x\n", 1931 ipath_cdbg(VERBOSE, "piobuf base for port %u is 0x%x, piocnt %u,"
1945 pd->port_port, pd->port_piobufs); 1932 " first pio %u\n", pd->port_port, pd->port_piobufs,
1933 pd->port_piocnt, pd->port_pio_base);
1934 ipath_chg_pioavailkernel(dd, pd->port_pio_base, pd->port_piocnt, 0);
1946 1935
1947 /* 1936 /*
1948 * Now allocate the rcvhdr Q and eager TIDs; skip the TID 1937 * Now allocate the rcvhdr Q and eager TIDs; skip the TID
@@ -2107,7 +2096,6 @@ static int ipath_close(struct inode *in, struct file *fp)
2107 } 2096 }
2108 2097
2109 if (dd->ipath_kregbase) { 2098 if (dd->ipath_kregbase) {
2110 int i;
2111 /* atomically clear receive enable port and intr avail. */ 2099 /* atomically clear receive enable port and intr avail. */
2112 clear_bit(dd->ipath_r_portenable_shift + port, 2100 clear_bit(dd->ipath_r_portenable_shift + port,
2113 &dd->ipath_rcvctrl); 2101 &dd->ipath_rcvctrl);
@@ -2136,9 +2124,9 @@ static int ipath_close(struct inode *in, struct file *fp)
2136 ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr, 2124 ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr,
2137 pd->port_port, dd->ipath_dummy_hdrq_phys); 2125 pd->port_port, dd->ipath_dummy_hdrq_phys);
2138 2126
2139 i = dd->ipath_pbufsport * (port - 1); 2127 ipath_disarm_piobufs(dd, pd->port_pio_base, pd->port_piocnt);
2140 ipath_disarm_piobufs(dd, i, dd->ipath_pbufsport); 2128 ipath_chg_pioavailkernel(dd, pd->port_pio_base,
2141 ipath_chg_pioavailkernel(dd, i, dd->ipath_pbufsport, 1); 2129 pd->port_piocnt, 1);
2142 2130
2143 dd->ipath_f_clear_tids(dd, pd->port_port); 2131 dd->ipath_f_clear_tids(dd, pd->port_port);
2144 2132
diff --git a/drivers/infiniband/hw/ipath/ipath_iba7220.c b/drivers/infiniband/hw/ipath/ipath_iba7220.c
index e3ec0d1bdf50..8eee7830f042 100644
--- a/drivers/infiniband/hw/ipath/ipath_iba7220.c
+++ b/drivers/infiniband/hw/ipath/ipath_iba7220.c
@@ -595,7 +595,7 @@ static void ipath_7220_txe_recover(struct ipath_devdata *dd)
595 595
596 dev_info(&dd->pcidev->dev, 596 dev_info(&dd->pcidev->dev,
597 "Recovering from TXE PIO parity error\n"); 597 "Recovering from TXE PIO parity error\n");
598 ipath_disarm_senderrbufs(dd, 1); 598 ipath_disarm_senderrbufs(dd);
599} 599}
600 600
601 601
@@ -675,10 +675,8 @@ static void ipath_7220_handle_hwerrors(struct ipath_devdata *dd, char *msg,
675 ctrl = ipath_read_kreg32(dd, dd->ipath_kregs->kr_control); 675 ctrl = ipath_read_kreg32(dd, dd->ipath_kregs->kr_control);
676 if ((ctrl & INFINIPATH_C_FREEZEMODE) && !ipath_diag_inuse) { 676 if ((ctrl & INFINIPATH_C_FREEZEMODE) && !ipath_diag_inuse) {
677 /* 677 /*
678 * Parity errors in send memory are recoverable, 678 * Parity errors in send memory are recoverable by h/w
679 * just cancel the send (if indicated in * sendbuffererror), 679 * just do housekeeping, exit freeze mode and continue.
680 * count the occurrence, unfreeze (if no other handled
681 * hardware error bits are set), and continue.
682 */ 680 */
683 if (hwerrs & ((INFINIPATH_HWE_TXEMEMPARITYERR_PIOBUF | 681 if (hwerrs & ((INFINIPATH_HWE_TXEMEMPARITYERR_PIOBUF |
684 INFINIPATH_HWE_TXEMEMPARITYERR_PIOPBC) 682 INFINIPATH_HWE_TXEMEMPARITYERR_PIOPBC)
@@ -687,13 +685,6 @@ static void ipath_7220_handle_hwerrors(struct ipath_devdata *dd, char *msg,
687 hwerrs &= ~((INFINIPATH_HWE_TXEMEMPARITYERR_PIOBUF | 685 hwerrs &= ~((INFINIPATH_HWE_TXEMEMPARITYERR_PIOBUF |
688 INFINIPATH_HWE_TXEMEMPARITYERR_PIOPBC) 686 INFINIPATH_HWE_TXEMEMPARITYERR_PIOPBC)
689 << INFINIPATH_HWE_TXEMEMPARITYERR_SHIFT); 687 << INFINIPATH_HWE_TXEMEMPARITYERR_SHIFT);
690 if (!hwerrs) {
691 /* else leave in freeze mode */
692 ipath_write_kreg(dd,
693 dd->ipath_kregs->kr_control,
694 dd->ipath_control);
695 goto bail;
696 }
697 } 688 }
698 if (hwerrs) { 689 if (hwerrs) {
699 /* 690 /*
@@ -723,8 +714,8 @@ static void ipath_7220_handle_hwerrors(struct ipath_devdata *dd, char *msg,
723 *dd->ipath_statusp |= IPATH_STATUS_HWERROR; 714 *dd->ipath_statusp |= IPATH_STATUS_HWERROR;
724 dd->ipath_flags &= ~IPATH_INITTED; 715 dd->ipath_flags &= ~IPATH_INITTED;
725 } else { 716 } else {
726 ipath_dbg("Clearing freezemode on ignored hardware " 717 ipath_dbg("Clearing freezemode on ignored or "
727 "error\n"); 718 "recovered hardware error\n");
728 ipath_clear_freeze(dd); 719 ipath_clear_freeze(dd);
729 } 720 }
730 } 721 }
@@ -870,8 +861,9 @@ static int ipath_7220_boardname(struct ipath_devdata *dd, char *name,
870 "revision %u.%u!\n", 861 "revision %u.%u!\n",
871 dd->ipath_majrev, dd->ipath_minrev); 862 dd->ipath_majrev, dd->ipath_minrev);
872 ret = 1; 863 ret = 1;
873 } else if (dd->ipath_minrev == 1) { 864 } else if (dd->ipath_minrev == 1 &&
874 /* Rev1 chips are prototype. Complain, but allow use */ 865 !(dd->ipath_flags & IPATH_INITTED)) {
866 /* Rev1 chips are prototype. Complain at init, but allow use */
875 ipath_dev_err(dd, "Unsupported hardware " 867 ipath_dev_err(dd, "Unsupported hardware "
876 "revision %u.%u, Contact support@qlogic.com\n", 868 "revision %u.%u, Contact support@qlogic.com\n",
877 dd->ipath_majrev, dd->ipath_minrev); 869 dd->ipath_majrev, dd->ipath_minrev);
@@ -1966,7 +1958,7 @@ static void ipath_7220_config_ports(struct ipath_devdata *dd, ushort cfgports)
1966 dd->ipath_rcvctrl); 1958 dd->ipath_rcvctrl);
1967 dd->ipath_p0_rcvegrcnt = 2048; /* always */ 1959 dd->ipath_p0_rcvegrcnt = 2048; /* always */
1968 if (dd->ipath_flags & IPATH_HAS_SEND_DMA) 1960 if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
1969 dd->ipath_pioreserved = 1; /* reserve a buffer */ 1961 dd->ipath_pioreserved = 3; /* kpiobufs used for PIO */
1970} 1962}
1971 1963
1972 1964
diff --git a/drivers/infiniband/hw/ipath/ipath_init_chip.c b/drivers/infiniband/hw/ipath/ipath_init_chip.c
index 27dd89476660..3e5baa43fc82 100644
--- a/drivers/infiniband/hw/ipath/ipath_init_chip.c
+++ b/drivers/infiniband/hw/ipath/ipath_init_chip.c
@@ -41,7 +41,7 @@
41/* 41/*
42 * min buffers we want to have per port, after driver 42 * min buffers we want to have per port, after driver
43 */ 43 */
44#define IPATH_MIN_USER_PORT_BUFCNT 8 44#define IPATH_MIN_USER_PORT_BUFCNT 7
45 45
46/* 46/*
47 * Number of ports we are configured to use (to allow for more pio 47 * Number of ports we are configured to use (to allow for more pio
@@ -54,13 +54,9 @@ MODULE_PARM_DESC(cfgports, "Set max number of ports to use");
54 54
55/* 55/*
56 * Number of buffers reserved for driver (verbs and layered drivers.) 56 * Number of buffers reserved for driver (verbs and layered drivers.)
57 * Reserved at end of buffer list. Initialized based on 57 * Initialized based on number of PIO buffers if not set via module interface.
58 * number of PIO buffers if not set via module interface.
59 * The problem with this is that it's global, but we'll use different 58 * The problem with this is that it's global, but we'll use different
60 * numbers for different chip types. So the default value is not 59 * numbers for different chip types.
61 * very useful. I've redefined it for the 1.3 release so that it's
62 * zero unless set by the user to something else, in which case we
63 * try to respect it.
64 */ 60 */
65static ushort ipath_kpiobufs; 61static ushort ipath_kpiobufs;
66 62
@@ -546,9 +542,12 @@ static void enable_chip(struct ipath_devdata *dd, int reinit)
546 pioavail = dd->ipath_pioavailregs_dma[i ^ 1]; 542 pioavail = dd->ipath_pioavailregs_dma[i ^ 1];
547 else 543 else
548 pioavail = dd->ipath_pioavailregs_dma[i]; 544 pioavail = dd->ipath_pioavailregs_dma[i];
549 dd->ipath_pioavailshadow[i] = le64_to_cpu(pioavail) | 545 /*
550 (~dd->ipath_pioavailkernel[i] << 546 * don't need to worry about ipath_pioavailkernel here
551 INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT); 547 * because we will call ipath_chg_pioavailkernel() later
548 * in initialization, to busy out buffers as needed
549 */
550 dd->ipath_pioavailshadow[i] = le64_to_cpu(pioavail);
552 } 551 }
553 /* can get counters, stats, etc. */ 552 /* can get counters, stats, etc. */
554 dd->ipath_flags |= IPATH_PRESENT; 553 dd->ipath_flags |= IPATH_PRESENT;
@@ -708,12 +707,11 @@ static void verify_interrupt(unsigned long opaque)
708int ipath_init_chip(struct ipath_devdata *dd, int reinit) 707int ipath_init_chip(struct ipath_devdata *dd, int reinit)
709{ 708{
710 int ret = 0; 709 int ret = 0;
711 u32 val32, kpiobufs; 710 u32 kpiobufs, defkbufs;
712 u32 piobufs, uports; 711 u32 piobufs, uports;
713 u64 val; 712 u64 val;
714 struct ipath_portdata *pd; 713 struct ipath_portdata *pd;
715 gfp_t gfp_flags = GFP_USER | __GFP_COMP; 714 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
716 unsigned long flags;
717 715
718 ret = init_housekeeping(dd, reinit); 716 ret = init_housekeeping(dd, reinit);
719 if (ret) 717 if (ret)
@@ -753,56 +751,46 @@ int ipath_init_chip(struct ipath_devdata *dd, int reinit)
753 dd->ipath_pioavregs = ALIGN(piobufs, sizeof(u64) * BITS_PER_BYTE / 2) 751 dd->ipath_pioavregs = ALIGN(piobufs, sizeof(u64) * BITS_PER_BYTE / 2)
754 / (sizeof(u64) * BITS_PER_BYTE / 2); 752 / (sizeof(u64) * BITS_PER_BYTE / 2);
755 uports = dd->ipath_cfgports ? dd->ipath_cfgports - 1 : 0; 753 uports = dd->ipath_cfgports ? dd->ipath_cfgports - 1 : 0;
756 if (ipath_kpiobufs == 0) { 754 if (piobufs > 144)
757 /* not set by user (this is default) */ 755 defkbufs = 32 + dd->ipath_pioreserved;
758 if (piobufs > 144)
759 kpiobufs = 32;
760 else
761 kpiobufs = 16;
762 }
763 else 756 else
764 kpiobufs = ipath_kpiobufs; 757 defkbufs = 16 + dd->ipath_pioreserved;
765 758
766 if (kpiobufs + (uports * IPATH_MIN_USER_PORT_BUFCNT) > piobufs) { 759 if (ipath_kpiobufs && (ipath_kpiobufs +
760 (uports * IPATH_MIN_USER_PORT_BUFCNT)) > piobufs) {
767 int i = (int) piobufs - 761 int i = (int) piobufs -
768 (int) (uports * IPATH_MIN_USER_PORT_BUFCNT); 762 (int) (uports * IPATH_MIN_USER_PORT_BUFCNT);
769 if (i < 1) 763 if (i < 1)
770 i = 1; 764 i = 1;
771 dev_info(&dd->pcidev->dev, "Allocating %d PIO bufs of " 765 dev_info(&dd->pcidev->dev, "Allocating %d PIO bufs of "
772 "%d for kernel leaves too few for %d user ports " 766 "%d for kernel leaves too few for %d user ports "
773 "(%d each); using %u\n", kpiobufs, 767 "(%d each); using %u\n", ipath_kpiobufs,
774 piobufs, uports, IPATH_MIN_USER_PORT_BUFCNT, i); 768 piobufs, uports, IPATH_MIN_USER_PORT_BUFCNT, i);
775 /* 769 /*
776 * shouldn't change ipath_kpiobufs, because could be 770 * shouldn't change ipath_kpiobufs, because could be
777 * different for different devices... 771 * different for different devices...
778 */ 772 */
779 kpiobufs = i; 773 kpiobufs = i;
780 } 774 } else if (ipath_kpiobufs)
775 kpiobufs = ipath_kpiobufs;
776 else
777 kpiobufs = defkbufs;
781 dd->ipath_lastport_piobuf = piobufs - kpiobufs; 778 dd->ipath_lastport_piobuf = piobufs - kpiobufs;
782 dd->ipath_pbufsport = 779 dd->ipath_pbufsport =
783 uports ? dd->ipath_lastport_piobuf / uports : 0; 780 uports ? dd->ipath_lastport_piobuf / uports : 0;
784 val32 = dd->ipath_lastport_piobuf - (dd->ipath_pbufsport * uports); 781 /* if not an even divisor, some user ports get extra buffers */
785 if (val32 > 0) { 782 dd->ipath_ports_extrabuf = dd->ipath_lastport_piobuf -
786 ipath_dbg("allocating %u pbufs/port leaves %u unused, " 783 (dd->ipath_pbufsport * uports);
787 "add to kernel\n", dd->ipath_pbufsport, val32); 784 if (dd->ipath_ports_extrabuf)
788 dd->ipath_lastport_piobuf -= val32; 785 ipath_dbg("%u pbufs/port leaves some unused, add 1 buffer to "
789 kpiobufs += val32; 786 "ports <= %u\n", dd->ipath_pbufsport,
790 ipath_dbg("%u pbufs/port leaves %u unused, add to kernel\n", 787 dd->ipath_ports_extrabuf);
791 dd->ipath_pbufsport, val32);
792 }
793 dd->ipath_lastpioindex = 0; 788 dd->ipath_lastpioindex = 0;
794 dd->ipath_lastpioindexl = dd->ipath_piobcnt2k; 789 dd->ipath_lastpioindexl = dd->ipath_piobcnt2k;
795 ipath_chg_pioavailkernel(dd, 0, piobufs, 1); 790 /* ipath_pioavailshadow initialized earlier */
796 ipath_cdbg(VERBOSE, "%d PIO bufs for kernel out of %d total %u " 791 ipath_cdbg(VERBOSE, "%d PIO bufs for kernel out of %d total %u "
797 "each for %u user ports\n", kpiobufs, 792 "each for %u user ports\n", kpiobufs,
798 piobufs, dd->ipath_pbufsport, uports); 793 piobufs, dd->ipath_pbufsport, uports);
799 if (dd->ipath_pioupd_thresh) {
800 if (dd->ipath_pbufsport < dd->ipath_pioupd_thresh)
801 dd->ipath_pioupd_thresh = dd->ipath_pbufsport;
802 if (kpiobufs < dd->ipath_pioupd_thresh)
803 dd->ipath_pioupd_thresh = kpiobufs;
804 }
805
806 ret = dd->ipath_f_early_init(dd); 794 ret = dd->ipath_f_early_init(dd);
807 if (ret) { 795 if (ret) {
808 ipath_dev_err(dd, "Early initialization failure\n"); 796 ipath_dev_err(dd, "Early initialization failure\n");
@@ -810,13 +798,6 @@ int ipath_init_chip(struct ipath_devdata *dd, int reinit)
810 } 798 }
811 799
812 /* 800 /*
813 * Cancel any possible active sends from early driver load.
814 * Follows early_init because some chips have to initialize
815 * PIO buffers in early_init to avoid false parity errors.
816 */
817 ipath_cancel_sends(dd, 0);
818
819 /*
820 * Early_init sets rcvhdrentsize and rcvhdrsize, so this must be 801 * Early_init sets rcvhdrentsize and rcvhdrsize, so this must be
821 * done after early_init. 802 * done after early_init.
822 */ 803 */
@@ -836,6 +817,7 @@ int ipath_init_chip(struct ipath_devdata *dd, int reinit)
836 817
837 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendpioavailaddr, 818 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendpioavailaddr,
838 dd->ipath_pioavailregs_phys); 819 dd->ipath_pioavailregs_phys);
820
839 /* 821 /*
840 * this is to detect s/w errors, which the h/w works around by 822 * this is to detect s/w errors, which the h/w works around by
841 * ignoring the low 6 bits of address, if it wasn't aligned. 823 * ignoring the low 6 bits of address, if it wasn't aligned.
@@ -862,12 +844,6 @@ int ipath_init_chip(struct ipath_devdata *dd, int reinit)
862 ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED); 844 ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
863 ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0ULL); 845 ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0ULL);
864 846
865 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
866 dd->ipath_sendctrl = INFINIPATH_S_PIOENABLE;
867 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl);
868 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
869 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
870
871 /* 847 /*
872 * before error clears, since we expect serdes pll errors during 848 * before error clears, since we expect serdes pll errors during
873 * this, the first time after reset 849 * this, the first time after reset
@@ -940,6 +916,19 @@ int ipath_init_chip(struct ipath_devdata *dd, int reinit)
940 else 916 else
941 enable_chip(dd, reinit); 917 enable_chip(dd, reinit);
942 918
919 /* after enable_chip, so pioavailshadow setup */
920 ipath_chg_pioavailkernel(dd, 0, piobufs, 1);
921
922 /*
923 * Cancel any possible active sends from early driver load.
924 * Follows early_init because some chips have to initialize
925 * PIO buffers in early_init to avoid false parity errors.
926 * After enable and ipath_chg_pioavailkernel so we can safely
927 * enable pioavail updates and PIOENABLE; packets are now
928 * ready to go out.
929 */
930 ipath_cancel_sends(dd, 1);
931
943 if (!reinit) { 932 if (!reinit) {
944 /* 933 /*
945 * Used when we close a port, for DMA already in flight 934 * Used when we close a port, for DMA already in flight
diff --git a/drivers/infiniband/hw/ipath/ipath_intr.c b/drivers/infiniband/hw/ipath/ipath_intr.c
index 1b58f4737c71..26900b3b7a4e 100644
--- a/drivers/infiniband/hw/ipath/ipath_intr.c
+++ b/drivers/infiniband/hw/ipath/ipath_intr.c
@@ -38,42 +38,12 @@
38#include "ipath_verbs.h" 38#include "ipath_verbs.h"
39#include "ipath_common.h" 39#include "ipath_common.h"
40 40
41/*
42 * clear (write) a pio buffer, to clear a parity error. This routine
43 * should only be called when in freeze mode, and the buffer should be
44 * canceled afterwards.
45 */
46static void ipath_clrpiobuf(struct ipath_devdata *dd, u32 pnum)
47{
48 u32 __iomem *pbuf;
49 u32 dwcnt; /* dword count to write */
50 if (pnum < dd->ipath_piobcnt2k) {
51 pbuf = (u32 __iomem *) (dd->ipath_pio2kbase + pnum *
52 dd->ipath_palign);
53 dwcnt = dd->ipath_piosize2k >> 2;
54 }
55 else {
56 pbuf = (u32 __iomem *) (dd->ipath_pio4kbase +
57 (pnum - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
58 dwcnt = dd->ipath_piosize4k >> 2;
59 }
60 dev_info(&dd->pcidev->dev,
61 "Rewrite PIO buffer %u, to recover from parity error\n",
62 pnum);
63
64 /* no flush required, since already in freeze */
65 writel(dwcnt + 1, pbuf);
66 while (--dwcnt)
67 writel(0, pbuf++);
68}
69 41
70/* 42/*
71 * Called when we might have an error that is specific to a particular 43 * Called when we might have an error that is specific to a particular
72 * PIO buffer, and may need to cancel that buffer, so it can be re-used. 44 * PIO buffer, and may need to cancel that buffer, so it can be re-used.
73 * If rewrite is true, and bits are set in the sendbufferror registers,
74 * we'll write to the buffer, for error recovery on parity errors.
75 */ 45 */
76void ipath_disarm_senderrbufs(struct ipath_devdata *dd, int rewrite) 46void ipath_disarm_senderrbufs(struct ipath_devdata *dd)
77{ 47{
78 u32 piobcnt; 48 u32 piobcnt;
79 unsigned long sbuf[4]; 49 unsigned long sbuf[4];
@@ -109,11 +79,8 @@ void ipath_disarm_senderrbufs(struct ipath_devdata *dd, int rewrite)
109 } 79 }
110 80
111 for (i = 0; i < piobcnt; i++) 81 for (i = 0; i < piobcnt; i++)
112 if (test_bit(i, sbuf)) { 82 if (test_bit(i, sbuf))
113 if (rewrite)
114 ipath_clrpiobuf(dd, i);
115 ipath_disarm_piobufs(dd, i, 1); 83 ipath_disarm_piobufs(dd, i, 1);
116 }
117 /* ignore armlaunch errs for a bit */ 84 /* ignore armlaunch errs for a bit */
118 dd->ipath_lastcancel = jiffies+3; 85 dd->ipath_lastcancel = jiffies+3;
119 } 86 }
@@ -164,7 +131,7 @@ static u64 handle_e_sum_errs(struct ipath_devdata *dd, ipath_err_t errs)
164{ 131{
165 u64 ignore_this_time = 0; 132 u64 ignore_this_time = 0;
166 133
167 ipath_disarm_senderrbufs(dd, 0); 134 ipath_disarm_senderrbufs(dd);
168 if ((errs & E_SUM_LINK_PKTERRS) && 135 if ((errs & E_SUM_LINK_PKTERRS) &&
169 !(dd->ipath_flags & IPATH_LINKACTIVE)) { 136 !(dd->ipath_flags & IPATH_LINKACTIVE)) {
170 /* 137 /*
@@ -909,8 +876,8 @@ static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
909 * processes (causing armlaunch), send errors due to going into freeze mode, 876 * processes (causing armlaunch), send errors due to going into freeze mode,
910 * etc., and try to avoid causing extra interrupts while doing so. 877 * etc., and try to avoid causing extra interrupts while doing so.
911 * Forcibly update the in-memory pioavail register copies after cleanup 878 * Forcibly update the in-memory pioavail register copies after cleanup
912 * because the chip won't do it for anything changing while in freeze mode 879 * because the chip won't do it while in freeze mode (the register values
913 * (we don't want to wait for the next pio buffer state change). 880 * themselves are kept correct).
914 * Make sure that we don't lose any important interrupts by using the chip 881 * Make sure that we don't lose any important interrupts by using the chip
915 * feature that says that writing 0 to a bit in *clear that is set in 882 * feature that says that writing 0 to a bit in *clear that is set in
916 * *status will cause an interrupt to be generated again (if allowed by 883 * *status will cause an interrupt to be generated again (if allowed by
@@ -918,44 +885,23 @@ static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
918 */ 885 */
919void ipath_clear_freeze(struct ipath_devdata *dd) 886void ipath_clear_freeze(struct ipath_devdata *dd)
920{ 887{
921 int i, im;
922 u64 val;
923
924 /* disable error interrupts, to avoid confusion */ 888 /* disable error interrupts, to avoid confusion */
925 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask, 0ULL); 889 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask, 0ULL);
926 890
927 /* also disable interrupts; errormask is sometimes overwriten */ 891 /* also disable interrupts; errormask is sometimes overwriten */
928 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL); 892 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
929 893
930 /* 894 ipath_cancel_sends(dd, 1);
931 * clear all sends, because they have may been 895
932 * completed by usercode while in freeze mode, and 896 /* clear the freeze, and be sure chip saw it */
933 * therefore would not be sent, and eventually
934 * might cause the process to run out of bufs
935 */
936 ipath_cancel_sends(dd, 0);
937 ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 897 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
938 dd->ipath_control); 898 dd->ipath_control);
899 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
939 900
940 /* ensure pio avail updates continue */ 901 /* force in-memory update now we are out of freeze */
941 ipath_force_pio_avail_update(dd); 902 ipath_force_pio_avail_update(dd);
942 903
943 /* 904 /*
944 * We just enabled pioavailupdate, so dma copy is almost certainly
945 * not yet right, so read the registers directly. Similar to init
946 */
947 for (i = 0; i < dd->ipath_pioavregs; i++) {
948 /* deal with 6110 chip bug */
949 im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
950 i ^ 1 : i;
951 val = ipath_read_kreg64(dd, (0x1000 / sizeof(u64)) + im);
952 dd->ipath_pioavailregs_dma[i] = cpu_to_le64(val);
953 dd->ipath_pioavailshadow[i] = val |
954 (~dd->ipath_pioavailkernel[i] <<
955 INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT);
956 }
957
958 /*
959 * force new interrupt if any hwerr, error or interrupt bits are 905 * force new interrupt if any hwerr, error or interrupt bits are
960 * still set, and clear "safe" send packet errors related to freeze 906 * still set, and clear "safe" send packet errors related to freeze
961 * and cancelling sends. Re-enable error interrupts before possible 907 * and cancelling sends. Re-enable error interrupts before possible
@@ -1312,10 +1258,8 @@ irqreturn_t ipath_intr(int irq, void *data)
1312 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch); 1258 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1313 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags); 1259 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1314 1260
1315 if (!(dd->ipath_flags & IPATH_HAS_SEND_DMA)) 1261 /* always process; sdma verbs uses PIO for acks and VL15 */
1316 handle_layer_pioavail(dd); 1262 handle_layer_pioavail(dd);
1317 else
1318 ipath_dbg("unexpected BUFAVAIL intr\n");
1319 } 1263 }
1320 1264
1321 ret = IRQ_HANDLED; 1265 ret = IRQ_HANDLED;
diff --git a/drivers/infiniband/hw/ipath/ipath_kernel.h b/drivers/infiniband/hw/ipath/ipath_kernel.h
index 202337ae90dc..02b24a340599 100644
--- a/drivers/infiniband/hw/ipath/ipath_kernel.h
+++ b/drivers/infiniband/hw/ipath/ipath_kernel.h
@@ -117,6 +117,10 @@ struct ipath_portdata {
117 u16 port_subport_cnt; 117 u16 port_subport_cnt;
118 /* non-zero if port is being shared. */ 118 /* non-zero if port is being shared. */
119 u16 port_subport_id; 119 u16 port_subport_id;
120 /* number of pio bufs for this port (all procs, if shared) */
121 u32 port_piocnt;
122 /* first pio buffer for this port */
123 u32 port_pio_base;
120 /* chip offset of PIO buffers for this port */ 124 /* chip offset of PIO buffers for this port */
121 u32 port_piobufs; 125 u32 port_piobufs;
122 /* how many alloc_pages() chunks in port_rcvegrbuf_pages */ 126 /* how many alloc_pages() chunks in port_rcvegrbuf_pages */
@@ -384,6 +388,8 @@ struct ipath_devdata {
384 u32 ipath_lastrpkts; 388 u32 ipath_lastrpkts;
385 /* pio bufs allocated per port */ 389 /* pio bufs allocated per port */
386 u32 ipath_pbufsport; 390 u32 ipath_pbufsport;
391 /* if remainder on bufs/port, ports < extrabuf get 1 extra */
392 u32 ipath_ports_extrabuf;
387 u32 ipath_pioupd_thresh; /* update threshold, some chips */ 393 u32 ipath_pioupd_thresh; /* update threshold, some chips */
388 /* 394 /*
389 * number of ports configured as max; zero is set to number chip 395 * number of ports configured as max; zero is set to number chip
@@ -1011,7 +1017,7 @@ void ipath_get_eeprom_info(struct ipath_devdata *);
1011int ipath_update_eeprom_log(struct ipath_devdata *dd); 1017int ipath_update_eeprom_log(struct ipath_devdata *dd);
1012void ipath_inc_eeprom_err(struct ipath_devdata *dd, u32 eidx, u32 incr); 1018void ipath_inc_eeprom_err(struct ipath_devdata *dd, u32 eidx, u32 incr);
1013u64 ipath_snap_cntr(struct ipath_devdata *, ipath_creg); 1019u64 ipath_snap_cntr(struct ipath_devdata *, ipath_creg);
1014void ipath_disarm_senderrbufs(struct ipath_devdata *, int); 1020void ipath_disarm_senderrbufs(struct ipath_devdata *);
1015void ipath_force_pio_avail_update(struct ipath_devdata *); 1021void ipath_force_pio_avail_update(struct ipath_devdata *);
1016void signal_ib_event(struct ipath_devdata *dd, enum ib_event_type ev); 1022void signal_ib_event(struct ipath_devdata *dd, enum ib_event_type ev);
1017 1023
diff --git a/drivers/infiniband/hw/ipath/ipath_rc.c b/drivers/infiniband/hw/ipath/ipath_rc.c
index c405dfba5531..08b11b567614 100644
--- a/drivers/infiniband/hw/ipath/ipath_rc.c
+++ b/drivers/infiniband/hw/ipath/ipath_rc.c
@@ -1746,7 +1746,11 @@ void ipath_rc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr,
1746 qp->r_wrid_valid = 0; 1746 qp->r_wrid_valid = 0;
1747 wc.wr_id = qp->r_wr_id; 1747 wc.wr_id = qp->r_wr_id;
1748 wc.status = IB_WC_SUCCESS; 1748 wc.status = IB_WC_SUCCESS;
1749 wc.opcode = IB_WC_RECV; 1749 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
1750 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
1751 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
1752 else
1753 wc.opcode = IB_WC_RECV;
1750 wc.vendor_err = 0; 1754 wc.vendor_err = 0;
1751 wc.qp = &qp->ibqp; 1755 wc.qp = &qp->ibqp;
1752 wc.src_qp = qp->remote_qpn; 1756 wc.src_qp = qp->remote_qpn;
diff --git a/drivers/infiniband/hw/ipath/ipath_ruc.c b/drivers/infiniband/hw/ipath/ipath_ruc.c
index 8ac5c1d82ccd..9e3fe61cbd08 100644
--- a/drivers/infiniband/hw/ipath/ipath_ruc.c
+++ b/drivers/infiniband/hw/ipath/ipath_ruc.c
@@ -481,9 +481,10 @@ done:
481 wake_up(&qp->wait); 481 wake_up(&qp->wait);
482} 482}
483 483
484static void want_buffer(struct ipath_devdata *dd) 484static void want_buffer(struct ipath_devdata *dd, struct ipath_qp *qp)
485{ 485{
486 if (!(dd->ipath_flags & IPATH_HAS_SEND_DMA)) { 486 if (!(dd->ipath_flags & IPATH_HAS_SEND_DMA) ||
487 qp->ibqp.qp_type == IB_QPT_SMI) {
487 unsigned long flags; 488 unsigned long flags;
488 489
489 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags); 490 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
@@ -519,7 +520,7 @@ static void ipath_no_bufs_available(struct ipath_qp *qp,
519 spin_lock_irqsave(&dev->pending_lock, flags); 520 spin_lock_irqsave(&dev->pending_lock, flags);
520 list_add_tail(&qp->piowait, &dev->piowait); 521 list_add_tail(&qp->piowait, &dev->piowait);
521 spin_unlock_irqrestore(&dev->pending_lock, flags); 522 spin_unlock_irqrestore(&dev->pending_lock, flags);
522 want_buffer(dev->dd); 523 want_buffer(dev->dd, qp);
523 dev->n_piowait++; 524 dev->n_piowait++;
524} 525}
525 526
diff --git a/drivers/infiniband/hw/ipath/ipath_sdma.c b/drivers/infiniband/hw/ipath/ipath_sdma.c
index 1974df7a9f78..3697449c1ba4 100644
--- a/drivers/infiniband/hw/ipath/ipath_sdma.c
+++ b/drivers/infiniband/hw/ipath/ipath_sdma.c
@@ -308,13 +308,15 @@ static void sdma_abort_task(unsigned long opaque)
308 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags); 308 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
309 309
310 /* 310 /*
311 * Don't restart sdma here. Wait until link is up to ACTIVE. 311 * Don't restart sdma here (with the exception
312 * VL15 MADs used to bring the link up use PIO, and multiple 312 * below). Wait until link is up to ACTIVE. VL15 MADs
313 * link transitions otherwise cause the sdma engine to be 313 * used to bring the link up use PIO, and multiple link
314 * transitions otherwise cause the sdma engine to be
314 * stopped and started multiple times. 315 * stopped and started multiple times.
315 * The disable is done here, including the shadow, so the 316 * The disable is done here, including the shadow,
316 * state is kept consistent. 317 * so the state is kept consistent.
317 * See ipath_restart_sdma() for the actual starting of sdma. 318 * See ipath_restart_sdma() for the actual starting
319 * of sdma.
318 */ 320 */
319 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags); 321 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
320 dd->ipath_sendctrl &= ~INFINIPATH_S_SDMAENABLE; 322 dd->ipath_sendctrl &= ~INFINIPATH_S_SDMAENABLE;
@@ -326,6 +328,13 @@ static void sdma_abort_task(unsigned long opaque)
326 /* make sure I see next message */ 328 /* make sure I see next message */
327 dd->ipath_sdma_abort_jiffies = 0; 329 dd->ipath_sdma_abort_jiffies = 0;
328 330
331 /*
332 * Not everything that takes SDMA offline is a link
333 * status change. If the link was up, restart SDMA.
334 */
335 if (dd->ipath_flags & IPATH_LINKACTIVE)
336 ipath_restart_sdma(dd);
337
329 goto done; 338 goto done;
330 } 339 }
331 340
@@ -427,7 +436,12 @@ int setup_sdma(struct ipath_devdata *dd)
427 goto done; 436 goto done;
428 } 437 }
429 438
430 dd->ipath_sdma_status = 0; 439 /*
440 * Set initial status as if we had been up, then gone down.
441 * This lets initial start on transition to ACTIVE be the
442 * same as restart after link flap.
443 */
444 dd->ipath_sdma_status = IPATH_SDMA_ABORT_ABORTED;
431 dd->ipath_sdma_abort_jiffies = 0; 445 dd->ipath_sdma_abort_jiffies = 0;
432 dd->ipath_sdma_generation = 0; 446 dd->ipath_sdma_generation = 0;
433 dd->ipath_sdma_descq_tail = 0; 447 dd->ipath_sdma_descq_tail = 0;
@@ -449,16 +463,19 @@ int setup_sdma(struct ipath_devdata *dd)
449 ipath_write_kreg(dd, dd->ipath_kregs->kr_senddmaheadaddr, 463 ipath_write_kreg(dd, dd->ipath_kregs->kr_senddmaheadaddr,
450 dd->ipath_sdma_head_phys); 464 dd->ipath_sdma_head_phys);
451 465
452 /* Reserve all the former "kernel" piobufs */ 466 /*
453 n = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k - dd->ipath_pioreserved; 467 * Reserve all the former "kernel" piobufs, using high number range
454 for (i = dd->ipath_lastport_piobuf; i < n; ++i) { 468 * so we get as many 4K buffers as possible
469 */
470 n = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
471 i = dd->ipath_lastport_piobuf + dd->ipath_pioreserved;
472 ipath_chg_pioavailkernel(dd, i, n - i , 0);
473 for (; i < n; ++i) {
455 unsigned word = i / 64; 474 unsigned word = i / 64;
456 unsigned bit = i & 63; 475 unsigned bit = i & 63;
457 BUG_ON(word >= 3); 476 BUG_ON(word >= 3);
458 senddmabufmask[word] |= 1ULL << bit; 477 senddmabufmask[word] |= 1ULL << bit;
459 } 478 }
460 ipath_chg_pioavailkernel(dd, dd->ipath_lastport_piobuf,
461 n - dd->ipath_lastport_piobuf, 0);
462 ipath_write_kreg(dd, dd->ipath_kregs->kr_senddmabufmask0, 479 ipath_write_kreg(dd, dd->ipath_kregs->kr_senddmabufmask0,
463 senddmabufmask[0]); 480 senddmabufmask[0]);
464 ipath_write_kreg(dd, dd->ipath_kregs->kr_senddmabufmask1, 481 ipath_write_kreg(dd, dd->ipath_kregs->kr_senddmabufmask1,
@@ -615,6 +632,9 @@ void ipath_restart_sdma(struct ipath_devdata *dd)
615 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch); 632 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
616 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags); 633 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
617 634
635 /* notify upper layers */
636 ipath_ib_piobufavail(dd->verbs_dev);
637
618bail: 638bail:
619 return; 639 return;
620} 640}
diff --git a/drivers/infiniband/hw/ipath/ipath_verbs.c b/drivers/infiniband/hw/ipath/ipath_verbs.c
index e63927cce5b5..5015cd2e57bd 100644
--- a/drivers/infiniband/hw/ipath/ipath_verbs.c
+++ b/drivers/infiniband/hw/ipath/ipath_verbs.c
@@ -396,7 +396,6 @@ static int ipath_post_one_send(struct ipath_qp *qp, struct ib_send_wr *wr)
396 396
397 wqe = get_swqe_ptr(qp, qp->s_head); 397 wqe = get_swqe_ptr(qp, qp->s_head);
398 wqe->wr = *wr; 398 wqe->wr = *wr;
399 wqe->ssn = qp->s_ssn++;
400 wqe->length = 0; 399 wqe->length = 0;
401 if (wr->num_sge) { 400 if (wr->num_sge) {
402 acc = wr->opcode >= IB_WR_RDMA_READ ? 401 acc = wr->opcode >= IB_WR_RDMA_READ ?
@@ -422,6 +421,7 @@ static int ipath_post_one_send(struct ipath_qp *qp, struct ib_send_wr *wr)
422 goto bail_inval; 421 goto bail_inval;
423 } else if (wqe->length > to_idev(qp->ibqp.device)->dd->ipath_ibmtu) 422 } else if (wqe->length > to_idev(qp->ibqp.device)->dd->ipath_ibmtu)
424 goto bail_inval; 423 goto bail_inval;
424 wqe->ssn = qp->s_ssn++;
425 qp->s_head = next; 425 qp->s_head = next;
426 426
427 ret = 0; 427 ret = 0;
diff --git a/drivers/infiniband/hw/mlx4/cq.c b/drivers/infiniband/hw/mlx4/cq.c
index 2f199c5c4a72..4521319b1406 100644
--- a/drivers/infiniband/hw/mlx4/cq.c
+++ b/drivers/infiniband/hw/mlx4/cq.c
@@ -246,7 +246,7 @@ err_mtt:
246 if (context) 246 if (context)
247 ib_umem_release(cq->umem); 247 ib_umem_release(cq->umem);
248 else 248 else
249 mlx4_ib_free_cq_buf(dev, &cq->buf, entries); 249 mlx4_ib_free_cq_buf(dev, &cq->buf, cq->ibcq.cqe);
250 250
251err_db: 251err_db:
252 if (!context) 252 if (!context)
@@ -434,7 +434,7 @@ int mlx4_ib_destroy_cq(struct ib_cq *cq)
434 mlx4_ib_db_unmap_user(to_mucontext(cq->uobject->context), &mcq->db); 434 mlx4_ib_db_unmap_user(to_mucontext(cq->uobject->context), &mcq->db);
435 ib_umem_release(mcq->umem); 435 ib_umem_release(mcq->umem);
436 } else { 436 } else {
437 mlx4_ib_free_cq_buf(dev, &mcq->buf, cq->cqe + 1); 437 mlx4_ib_free_cq_buf(dev, &mcq->buf, cq->cqe);
438 mlx4_db_free(dev->dev, &mcq->db); 438 mlx4_db_free(dev->dev, &mcq->db);
439 } 439 }
440 440
diff --git a/drivers/infiniband/ulp/ipoib/ipoib.h b/drivers/infiniband/ulp/ipoib/ipoib.h
index 9044f8803532..ca126fc2b853 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib.h
+++ b/drivers/infiniband/ulp/ipoib/ipoib.h
@@ -334,6 +334,7 @@ struct ipoib_dev_priv {
334#endif 334#endif
335 int hca_caps; 335 int hca_caps;
336 struct ipoib_ethtool_st ethtool; 336 struct ipoib_ethtool_st ethtool;
337 struct timer_list poll_timer;
337}; 338};
338 339
339struct ipoib_ah { 340struct ipoib_ah {
@@ -404,6 +405,7 @@ extern struct workqueue_struct *ipoib_workqueue;
404 405
405int ipoib_poll(struct napi_struct *napi, int budget); 406int ipoib_poll(struct napi_struct *napi, int budget);
406void ipoib_ib_completion(struct ib_cq *cq, void *dev_ptr); 407void ipoib_ib_completion(struct ib_cq *cq, void *dev_ptr);
408void ipoib_send_comp_handler(struct ib_cq *cq, void *dev_ptr);
407 409
408struct ipoib_ah *ipoib_create_ah(struct net_device *dev, 410struct ipoib_ah *ipoib_create_ah(struct net_device *dev,
409 struct ib_pd *pd, struct ib_ah_attr *attr); 411 struct ib_pd *pd, struct ib_ah_attr *attr);
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_ib.c b/drivers/infiniband/ulp/ipoib/ipoib_ib.c
index 97b815c1a3fc..f429bce24c20 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_ib.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_ib.c
@@ -461,6 +461,26 @@ void ipoib_ib_completion(struct ib_cq *cq, void *dev_ptr)
461 netif_rx_schedule(dev, &priv->napi); 461 netif_rx_schedule(dev, &priv->napi);
462} 462}
463 463
464static void drain_tx_cq(struct net_device *dev)
465{
466 struct ipoib_dev_priv *priv = netdev_priv(dev);
467 unsigned long flags;
468
469 spin_lock_irqsave(&priv->tx_lock, flags);
470 while (poll_tx(priv))
471 ; /* nothing */
472
473 if (netif_queue_stopped(dev))
474 mod_timer(&priv->poll_timer, jiffies + 1);
475
476 spin_unlock_irqrestore(&priv->tx_lock, flags);
477}
478
479void ipoib_send_comp_handler(struct ib_cq *cq, void *dev_ptr)
480{
481 drain_tx_cq((struct net_device *)dev_ptr);
482}
483
464static inline int post_send(struct ipoib_dev_priv *priv, 484static inline int post_send(struct ipoib_dev_priv *priv,
465 unsigned int wr_id, 485 unsigned int wr_id,
466 struct ib_ah *address, u32 qpn, 486 struct ib_ah *address, u32 qpn,
@@ -555,12 +575,22 @@ void ipoib_send(struct net_device *dev, struct sk_buff *skb,
555 else 575 else
556 priv->tx_wr.send_flags &= ~IB_SEND_IP_CSUM; 576 priv->tx_wr.send_flags &= ~IB_SEND_IP_CSUM;
557 577
578 if (++priv->tx_outstanding == ipoib_sendq_size) {
579 ipoib_dbg(priv, "TX ring full, stopping kernel net queue\n");
580 if (ib_req_notify_cq(priv->send_cq, IB_CQ_NEXT_COMP))
581 ipoib_warn(priv, "request notify on send CQ failed\n");
582 netif_stop_queue(dev);
583 }
584
558 if (unlikely(post_send(priv, priv->tx_head & (ipoib_sendq_size - 1), 585 if (unlikely(post_send(priv, priv->tx_head & (ipoib_sendq_size - 1),
559 address->ah, qpn, tx_req, phead, hlen))) { 586 address->ah, qpn, tx_req, phead, hlen))) {
560 ipoib_warn(priv, "post_send failed\n"); 587 ipoib_warn(priv, "post_send failed\n");
561 ++dev->stats.tx_errors; 588 ++dev->stats.tx_errors;
589 --priv->tx_outstanding;
562 ipoib_dma_unmap_tx(priv->ca, tx_req); 590 ipoib_dma_unmap_tx(priv->ca, tx_req);
563 dev_kfree_skb_any(skb); 591 dev_kfree_skb_any(skb);
592 if (netif_queue_stopped(dev))
593 netif_wake_queue(dev);
564 } else { 594 } else {
565 dev->trans_start = jiffies; 595 dev->trans_start = jiffies;
566 596
@@ -568,14 +598,11 @@ void ipoib_send(struct net_device *dev, struct sk_buff *skb,
568 ++priv->tx_head; 598 ++priv->tx_head;
569 skb_orphan(skb); 599 skb_orphan(skb);
570 600
571 if (++priv->tx_outstanding == ipoib_sendq_size) {
572 ipoib_dbg(priv, "TX ring full, stopping kernel net queue\n");
573 netif_stop_queue(dev);
574 }
575 } 601 }
576 602
577 if (unlikely(priv->tx_outstanding > MAX_SEND_CQE)) 603 if (unlikely(priv->tx_outstanding > MAX_SEND_CQE))
578 poll_tx(priv); 604 while (poll_tx(priv))
605 ; /* nothing */
579} 606}
580 607
581static void __ipoib_reap_ah(struct net_device *dev) 608static void __ipoib_reap_ah(struct net_device *dev)
@@ -609,6 +636,11 @@ void ipoib_reap_ah(struct work_struct *work)
609 round_jiffies_relative(HZ)); 636 round_jiffies_relative(HZ));
610} 637}
611 638
639static void ipoib_ib_tx_timer_func(unsigned long ctx)
640{
641 drain_tx_cq((struct net_device *)ctx);
642}
643
612int ipoib_ib_dev_open(struct net_device *dev) 644int ipoib_ib_dev_open(struct net_device *dev)
613{ 645{
614 struct ipoib_dev_priv *priv = netdev_priv(dev); 646 struct ipoib_dev_priv *priv = netdev_priv(dev);
@@ -645,6 +677,10 @@ int ipoib_ib_dev_open(struct net_device *dev)
645 queue_delayed_work(ipoib_workqueue, &priv->ah_reap_task, 677 queue_delayed_work(ipoib_workqueue, &priv->ah_reap_task,
646 round_jiffies_relative(HZ)); 678 round_jiffies_relative(HZ));
647 679
680 init_timer(&priv->poll_timer);
681 priv->poll_timer.function = ipoib_ib_tx_timer_func;
682 priv->poll_timer.data = (unsigned long)dev;
683
648 set_bit(IPOIB_FLAG_INITIALIZED, &priv->flags); 684 set_bit(IPOIB_FLAG_INITIALIZED, &priv->flags);
649 685
650 return 0; 686 return 0;
@@ -810,6 +846,7 @@ int ipoib_ib_dev_stop(struct net_device *dev, int flush)
810 ipoib_dbg(priv, "All sends and receives done.\n"); 846 ipoib_dbg(priv, "All sends and receives done.\n");
811 847
812timeout: 848timeout:
849 del_timer_sync(&priv->poll_timer);
813 qp_attr.qp_state = IB_QPS_RESET; 850 qp_attr.qp_state = IB_QPS_RESET;
814 if (ib_modify_qp(priv->qp, &qp_attr, IB_QP_STATE)) 851 if (ib_modify_qp(priv->qp, &qp_attr, IB_QP_STATE))
815 ipoib_warn(priv, "Failed to modify QP to RESET state\n"); 852 ipoib_warn(priv, "Failed to modify QP to RESET state\n");
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_verbs.c b/drivers/infiniband/ulp/ipoib/ipoib_verbs.c
index c1e7ece1fd44..8766d29ce3b7 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_verbs.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_verbs.c
@@ -187,7 +187,8 @@ int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca)
187 goto out_free_mr; 187 goto out_free_mr;
188 } 188 }
189 189
190 priv->send_cq = ib_create_cq(priv->ca, NULL, NULL, dev, ipoib_sendq_size, 0); 190 priv->send_cq = ib_create_cq(priv->ca, ipoib_send_comp_handler, NULL,
191 dev, ipoib_sendq_size, 0);
191 if (IS_ERR(priv->send_cq)) { 192 if (IS_ERR(priv->send_cq)) {
192 printk(KERN_WARNING "%s: failed to create send CQ\n", ca->name); 193 printk(KERN_WARNING "%s: failed to create send CQ\n", ca->name);
193 goto out_free_recv_cq; 194 goto out_free_recv_cq;
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index 92b683411d5a..3ad8bd9f7543 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@ -14,7 +14,7 @@ if INPUT_MISC
14 14
15config INPUT_PCSPKR 15config INPUT_PCSPKR
16 tristate "PC Speaker support" 16 tristate "PC Speaker support"
17 depends on ALPHA || X86 || MIPS || PPC_PREP || PPC_CHRP || PPC_PSERIES 17 depends on PCSPKR_PLATFORM
18 depends on SND_PCSP=n 18 depends on SND_PCSP=n
19 help 19 help
20 Say Y here if you want the standard PC Speaker to be used for 20 Say Y here if you want the standard PC Speaker to be used for
diff --git a/drivers/input/serio/hp_sdc.c b/drivers/input/serio/hp_sdc.c
index 02b3ad8c0826..edfedd9a166c 100644
--- a/drivers/input/serio/hp_sdc.c
+++ b/drivers/input/serio/hp_sdc.c
@@ -69,6 +69,7 @@
69#include <linux/time.h> 69#include <linux/time.h>
70#include <linux/slab.h> 70#include <linux/slab.h>
71#include <linux/hil.h> 71#include <linux/hil.h>
72#include <linux/semaphore.h>
72#include <asm/io.h> 73#include <asm/io.h>
73#include <asm/system.h> 74#include <asm/system.h>
74 75
diff --git a/drivers/input/serio/i8042-io.h b/drivers/input/serio/i8042-io.h
index 3b4e13b9ce1b..f451c7351a9d 100644
--- a/drivers/input/serio/i8042-io.h
+++ b/drivers/input/serio/i8042-io.h
@@ -25,7 +25,7 @@
25#elif defined(__arm__) 25#elif defined(__arm__)
26/* defined in include/asm-arm/arch-xxx/irqs.h */ 26/* defined in include/asm-arm/arch-xxx/irqs.h */
27#include <asm/irq.h> 27#include <asm/irq.h>
28#elif defined(CONFIG_SUPERH64) 28#elif defined(CONFIG_SH_CAYMAN)
29#include <asm/irq.h> 29#include <asm/irq.h>
30#else 30#else
31# define I8042_KBD_IRQ 1 31# define I8042_KBD_IRQ 1
diff --git a/drivers/macintosh/adb.c b/drivers/macintosh/adb.c
index 20978205cd02..b8b9e44f7f4e 100644
--- a/drivers/macintosh/adb.c
+++ b/drivers/macintosh/adb.c
@@ -37,7 +37,7 @@
37#include <linux/device.h> 37#include <linux/device.h>
38#include <linux/kthread.h> 38#include <linux/kthread.h>
39#include <linux/platform_device.h> 39#include <linux/platform_device.h>
40#include <linux/semaphore.h> 40#include <linux/mutex.h>
41 41
42#include <asm/uaccess.h> 42#include <asm/uaccess.h>
43#ifdef CONFIG_PPC 43#ifdef CONFIG_PPC
@@ -102,7 +102,7 @@ static struct adb_handler {
102} adb_handler[16]; 102} adb_handler[16];
103 103
104/* 104/*
105 * The adb_handler_sem mutex protects all accesses to the original_address 105 * The adb_handler_mutex mutex protects all accesses to the original_address
106 * and handler_id fields of adb_handler[i] for all i, and changes to the 106 * and handler_id fields of adb_handler[i] for all i, and changes to the
107 * handler field. 107 * handler field.
108 * Accesses to the handler field are protected by the adb_handler_lock 108 * Accesses to the handler field are protected by the adb_handler_lock
@@ -110,7 +110,7 @@ static struct adb_handler {
110 * time adb_unregister returns, we know that the old handler isn't being 110 * time adb_unregister returns, we know that the old handler isn't being
111 * called. 111 * called.
112 */ 112 */
113static DECLARE_MUTEX(adb_handler_sem); 113static DEFINE_MUTEX(adb_handler_mutex);
114static DEFINE_RWLOCK(adb_handler_lock); 114static DEFINE_RWLOCK(adb_handler_lock);
115 115
116#if 0 116#if 0
@@ -355,7 +355,7 @@ do_adb_reset_bus(void)
355 msleep(500); 355 msleep(500);
356 } 356 }
357 357
358 down(&adb_handler_sem); 358 mutex_lock(&adb_handler_mutex);
359 write_lock_irq(&adb_handler_lock); 359 write_lock_irq(&adb_handler_lock);
360 memset(adb_handler, 0, sizeof(adb_handler)); 360 memset(adb_handler, 0, sizeof(adb_handler));
361 write_unlock_irq(&adb_handler_lock); 361 write_unlock_irq(&adb_handler_lock);
@@ -376,7 +376,7 @@ do_adb_reset_bus(void)
376 if (adb_controller->autopoll) 376 if (adb_controller->autopoll)
377 adb_controller->autopoll(autopoll_devs); 377 adb_controller->autopoll(autopoll_devs);
378 } 378 }
379 up(&adb_handler_sem); 379 mutex_unlock(&adb_handler_mutex);
380 380
381 blocking_notifier_call_chain(&adb_client_list, 381 blocking_notifier_call_chain(&adb_client_list,
382 ADB_MSG_POST_RESET, NULL); 382 ADB_MSG_POST_RESET, NULL);
@@ -454,7 +454,7 @@ adb_register(int default_id, int handler_id, struct adb_ids *ids,
454{ 454{
455 int i; 455 int i;
456 456
457 down(&adb_handler_sem); 457 mutex_lock(&adb_handler_mutex);
458 ids->nids = 0; 458 ids->nids = 0;
459 for (i = 1; i < 16; i++) { 459 for (i = 1; i < 16; i++) {
460 if ((adb_handler[i].original_address == default_id) && 460 if ((adb_handler[i].original_address == default_id) &&
@@ -472,7 +472,7 @@ adb_register(int default_id, int handler_id, struct adb_ids *ids,
472 ids->id[ids->nids++] = i; 472 ids->id[ids->nids++] = i;
473 } 473 }
474 } 474 }
475 up(&adb_handler_sem); 475 mutex_unlock(&adb_handler_mutex);
476 return ids->nids; 476 return ids->nids;
477} 477}
478 478
@@ -481,7 +481,7 @@ adb_unregister(int index)
481{ 481{
482 int ret = -ENODEV; 482 int ret = -ENODEV;
483 483
484 down(&adb_handler_sem); 484 mutex_lock(&adb_handler_mutex);
485 write_lock_irq(&adb_handler_lock); 485 write_lock_irq(&adb_handler_lock);
486 if (adb_handler[index].handler) { 486 if (adb_handler[index].handler) {
487 while(adb_handler[index].busy) { 487 while(adb_handler[index].busy) {
@@ -493,7 +493,7 @@ adb_unregister(int index)
493 adb_handler[index].handler = NULL; 493 adb_handler[index].handler = NULL;
494 } 494 }
495 write_unlock_irq(&adb_handler_lock); 495 write_unlock_irq(&adb_handler_lock);
496 up(&adb_handler_sem); 496 mutex_unlock(&adb_handler_mutex);
497 return ret; 497 return ret;
498} 498}
499 499
@@ -557,19 +557,19 @@ adb_try_handler_change(int address, int new_id)
557{ 557{
558 int ret; 558 int ret;
559 559
560 down(&adb_handler_sem); 560 mutex_lock(&adb_handler_mutex);
561 ret = try_handler_change(address, new_id); 561 ret = try_handler_change(address, new_id);
562 up(&adb_handler_sem); 562 mutex_unlock(&adb_handler_mutex);
563 return ret; 563 return ret;
564} 564}
565 565
566int 566int
567adb_get_infos(int address, int *original_address, int *handler_id) 567adb_get_infos(int address, int *original_address, int *handler_id)
568{ 568{
569 down(&adb_handler_sem); 569 mutex_lock(&adb_handler_mutex);
570 *original_address = adb_handler[address].original_address; 570 *original_address = adb_handler[address].original_address;
571 *handler_id = adb_handler[address].handler_id; 571 *handler_id = adb_handler[address].handler_id;
572 up(&adb_handler_sem); 572 mutex_unlock(&adb_handler_mutex);
573 573
574 return (*original_address != 0); 574 return (*original_address != 0);
575} 575}
@@ -628,10 +628,10 @@ do_adb_query(struct adb_request *req)
628 case ADB_QUERY_GETDEVINFO: 628 case ADB_QUERY_GETDEVINFO:
629 if (req->nbytes < 3) 629 if (req->nbytes < 3)
630 break; 630 break;
631 down(&adb_handler_sem); 631 mutex_lock(&adb_handler_mutex);
632 req->reply[0] = adb_handler[req->data[2]].original_address; 632 req->reply[0] = adb_handler[req->data[2]].original_address;
633 req->reply[1] = adb_handler[req->data[2]].handler_id; 633 req->reply[1] = adb_handler[req->data[2]].handler_id;
634 up(&adb_handler_sem); 634 mutex_unlock(&adb_handler_mutex);
635 req->complete = 1; 635 req->complete = 1;
636 req->reply_len = 2; 636 req->reply_len = 2;
637 adb_write_done(req); 637 adb_write_done(req);
diff --git a/drivers/macintosh/therm_pm72.c b/drivers/macintosh/therm_pm72.c
index 1e0a69a5e815..ddfb426a9abd 100644
--- a/drivers/macintosh/therm_pm72.c
+++ b/drivers/macintosh/therm_pm72.c
@@ -122,6 +122,7 @@
122#include <linux/kmod.h> 122#include <linux/kmod.h>
123#include <linux/i2c.h> 123#include <linux/i2c.h>
124#include <linux/kthread.h> 124#include <linux/kthread.h>
125#include <linux/mutex.h>
125#include <asm/prom.h> 126#include <asm/prom.h>
126#include <asm/machdep.h> 127#include <asm/machdep.h>
127#include <asm/io.h> 128#include <asm/io.h>
@@ -169,7 +170,7 @@ static int rackmac;
169static s32 dimm_output_clamp; 170static s32 dimm_output_clamp;
170static int fcu_rpm_shift; 171static int fcu_rpm_shift;
171static int fcu_tickle_ticks; 172static int fcu_tickle_ticks;
172static DECLARE_MUTEX(driver_lock); 173static DEFINE_MUTEX(driver_lock);
173 174
174/* 175/*
175 * We have 3 types of CPU PID control. One is "split" old style control 176 * We have 3 types of CPU PID control. One is "split" old style control
@@ -729,9 +730,9 @@ static void fetch_cpu_pumps_minmax(void)
729static ssize_t show_##name(struct device *dev, struct device_attribute *attr, char *buf) \ 730static ssize_t show_##name(struct device *dev, struct device_attribute *attr, char *buf) \
730{ \ 731{ \
731 ssize_t r; \ 732 ssize_t r; \
732 down(&driver_lock); \ 733 mutex_lock(&driver_lock); \
733 r = sprintf(buf, "%d.%03d", FIX32TOPRINT(data)); \ 734 r = sprintf(buf, "%d.%03d", FIX32TOPRINT(data)); \
734 up(&driver_lock); \ 735 mutex_unlock(&driver_lock); \
735 return r; \ 736 return r; \
736} 737}
737#define BUILD_SHOW_FUNC_INT(name, data) \ 738#define BUILD_SHOW_FUNC_INT(name, data) \
@@ -1803,11 +1804,11 @@ static int main_control_loop(void *x)
1803{ 1804{
1804 DBG("main_control_loop started\n"); 1805 DBG("main_control_loop started\n");
1805 1806
1806 down(&driver_lock); 1807 mutex_lock(&driver_lock);
1807 1808
1808 if (start_fcu() < 0) { 1809 if (start_fcu() < 0) {
1809 printk(KERN_ERR "kfand: failed to start FCU\n"); 1810 printk(KERN_ERR "kfand: failed to start FCU\n");
1810 up(&driver_lock); 1811 mutex_unlock(&driver_lock);
1811 goto out; 1812 goto out;
1812 } 1813 }
1813 1814
@@ -1822,14 +1823,14 @@ static int main_control_loop(void *x)
1822 1823
1823 fcu_tickle_ticks = FCU_TICKLE_TICKS; 1824 fcu_tickle_ticks = FCU_TICKLE_TICKS;
1824 1825
1825 up(&driver_lock); 1826 mutex_unlock(&driver_lock);
1826 1827
1827 while (state == state_attached) { 1828 while (state == state_attached) {
1828 unsigned long elapsed, start; 1829 unsigned long elapsed, start;
1829 1830
1830 start = jiffies; 1831 start = jiffies;
1831 1832
1832 down(&driver_lock); 1833 mutex_lock(&driver_lock);
1833 1834
1834 /* Tickle the FCU just in case */ 1835 /* Tickle the FCU just in case */
1835 if (--fcu_tickle_ticks < 0) { 1836 if (--fcu_tickle_ticks < 0) {
@@ -1861,7 +1862,7 @@ static int main_control_loop(void *x)
1861 do_monitor_slots(&slots_state); 1862 do_monitor_slots(&slots_state);
1862 else 1863 else
1863 do_monitor_drives(&drives_state); 1864 do_monitor_drives(&drives_state);
1864 up(&driver_lock); 1865 mutex_unlock(&driver_lock);
1865 1866
1866 if (critical_state == 1) { 1867 if (critical_state == 1) {
1867 printk(KERN_WARNING "Temperature control detected a critical condition\n"); 1868 printk(KERN_WARNING "Temperature control detected a critical condition\n");
@@ -2019,13 +2020,13 @@ static void detach_fcu(void)
2019 */ 2020 */
2020static int therm_pm72_attach(struct i2c_adapter *adapter) 2021static int therm_pm72_attach(struct i2c_adapter *adapter)
2021{ 2022{
2022 down(&driver_lock); 2023 mutex_lock(&driver_lock);
2023 2024
2024 /* Check state */ 2025 /* Check state */
2025 if (state == state_detached) 2026 if (state == state_detached)
2026 state = state_attaching; 2027 state = state_attaching;
2027 if (state != state_attaching) { 2028 if (state != state_attaching) {
2028 up(&driver_lock); 2029 mutex_unlock(&driver_lock);
2029 return 0; 2030 return 0;
2030 } 2031 }
2031 2032
@@ -2054,7 +2055,7 @@ static int therm_pm72_attach(struct i2c_adapter *adapter)
2054 state = state_attached; 2055 state = state_attached;
2055 start_control_loops(); 2056 start_control_loops();
2056 } 2057 }
2057 up(&driver_lock); 2058 mutex_unlock(&driver_lock);
2058 2059
2059 return 0; 2060 return 0;
2060} 2061}
@@ -2065,16 +2066,16 @@ static int therm_pm72_attach(struct i2c_adapter *adapter)
2065 */ 2066 */
2066static int therm_pm72_detach(struct i2c_adapter *adapter) 2067static int therm_pm72_detach(struct i2c_adapter *adapter)
2067{ 2068{
2068 down(&driver_lock); 2069 mutex_lock(&driver_lock);
2069 2070
2070 if (state != state_detached) 2071 if (state != state_detached)
2071 state = state_detaching; 2072 state = state_detaching;
2072 2073
2073 /* Stop control loops if any */ 2074 /* Stop control loops if any */
2074 DBG("stopping control loops\n"); 2075 DBG("stopping control loops\n");
2075 up(&driver_lock); 2076 mutex_unlock(&driver_lock);
2076 stop_control_loops(); 2077 stop_control_loops();
2077 down(&driver_lock); 2078 mutex_lock(&driver_lock);
2078 2079
2079 if (u3_0 != NULL && !strcmp(adapter->name, "u3 0")) { 2080 if (u3_0 != NULL && !strcmp(adapter->name, "u3 0")) {
2080 DBG("lost U3-0, disposing control loops\n"); 2081 DBG("lost U3-0, disposing control loops\n");
@@ -2090,7 +2091,7 @@ static int therm_pm72_detach(struct i2c_adapter *adapter)
2090 if (u3_0 == NULL && u3_1 == NULL) 2091 if (u3_0 == NULL && u3_1 == NULL)
2091 state = state_detached; 2092 state = state_detached;
2092 2093
2093 up(&driver_lock); 2094 mutex_unlock(&driver_lock);
2094 2095
2095 return 0; 2096 return 0;
2096} 2097}
diff --git a/drivers/macintosh/windfarm_smu_sat.c b/drivers/macintosh/windfarm_smu_sat.c
index 797918d0e59c..7f2be4baaeda 100644
--- a/drivers/macintosh/windfarm_smu_sat.c
+++ b/drivers/macintosh/windfarm_smu_sat.c
@@ -13,7 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/wait.h> 14#include <linux/wait.h>
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/semaphore.h> 16#include <linux/mutex.h>
17#include <asm/prom.h> 17#include <asm/prom.h>
18#include <asm/smu.h> 18#include <asm/smu.h>
19#include <asm/pmac_low_i2c.h> 19#include <asm/pmac_low_i2c.h>
@@ -36,7 +36,7 @@
36struct wf_sat { 36struct wf_sat {
37 int nr; 37 int nr;
38 atomic_t refcnt; 38 atomic_t refcnt;
39 struct semaphore mutex; 39 struct mutex mutex;
40 unsigned long last_read; /* jiffies when cache last updated */ 40 unsigned long last_read; /* jiffies when cache last updated */
41 u8 cache[16]; 41 u8 cache[16];
42 struct i2c_client i2c; 42 struct i2c_client i2c;
@@ -163,7 +163,7 @@ static int wf_sat_get(struct wf_sensor *sr, s32 *value)
163 if (sat->i2c.adapter == NULL) 163 if (sat->i2c.adapter == NULL)
164 return -ENODEV; 164 return -ENODEV;
165 165
166 down(&sat->mutex); 166 mutex_lock(&sat->mutex);
167 if (time_after(jiffies, (sat->last_read + MAX_AGE))) { 167 if (time_after(jiffies, (sat->last_read + MAX_AGE))) {
168 err = wf_sat_read_cache(sat); 168 err = wf_sat_read_cache(sat);
169 if (err) 169 if (err)
@@ -182,7 +182,7 @@ static int wf_sat_get(struct wf_sensor *sr, s32 *value)
182 err = 0; 182 err = 0;
183 183
184 fail: 184 fail:
185 up(&sat->mutex); 185 mutex_unlock(&sat->mutex);
186 return err; 186 return err;
187} 187}
188 188
@@ -233,7 +233,7 @@ static void wf_sat_create(struct i2c_adapter *adapter, struct device_node *dev)
233 sat->nr = -1; 233 sat->nr = -1;
234 sat->node = of_node_get(dev); 234 sat->node = of_node_get(dev);
235 atomic_set(&sat->refcnt, 0); 235 atomic_set(&sat->refcnt, 0);
236 init_MUTEX(&sat->mutex); 236 mutex_init(&sat->mutex);
237 sat->i2c.addr = (addr >> 1) & 0x7f; 237 sat->i2c.addr = (addr >> 1) & 0x7f;
238 sat->i2c.adapter = adapter; 238 sat->i2c.adapter = adapter;
239 sat->i2c.driver = &wf_sat_driver; 239 sat->i2c.driver = &wf_sat_driver;
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c
index 5938fa962922..faf3d8912979 100644
--- a/drivers/md/raid10.c
+++ b/drivers/md/raid10.c
@@ -886,7 +886,7 @@ static int make_request(struct request_queue *q, struct bio * bio)
886 */ 886 */
887 raid10_find_phys(conf, r10_bio); 887 raid10_find_phys(conf, r10_bio);
888 retry_write: 888 retry_write:
889 blocked_rdev = 0; 889 blocked_rdev = NULL;
890 rcu_read_lock(); 890 rcu_read_lock();
891 for (i = 0; i < conf->copies; i++) { 891 for (i = 0; i < conf->copies; i++) {
892 int d = r10_bio->devs[i].devnum; 892 int d = r10_bio->devs[i].devnum;
diff --git a/drivers/media/Makefile b/drivers/media/Makefile
index 73f742c7e818..cc11c4c0e7e7 100644
--- a/drivers/media/Makefile
+++ b/drivers/media/Makefile
@@ -2,6 +2,8 @@
2# Makefile for the kernel multimedia device drivers. 2# Makefile for the kernel multimedia device drivers.
3# 3#
4 4
5obj-y := common/
6
5obj-$(CONFIG_VIDEO_MEDIA) += common/ 7obj-$(CONFIG_VIDEO_MEDIA) += common/
6 8
7# Since hybrid devices are here, should be compiled if DVB and/or V4L 9# Since hybrid devices are here, should be compiled if DVB and/or V4L
diff --git a/drivers/media/video/cx18/cx18-driver.c b/drivers/media/video/cx18/cx18-driver.c
index 8f5ed9b4bf83..3f55d47bc4b9 100644
--- a/drivers/media/video/cx18/cx18-driver.c
+++ b/drivers/media/video/cx18/cx18-driver.c
@@ -613,7 +613,7 @@ static int __devinit cx18_probe(struct pci_dev *dev,
613 } 613 }
614 614
615 cx = kzalloc(sizeof(struct cx18), GFP_ATOMIC); 615 cx = kzalloc(sizeof(struct cx18), GFP_ATOMIC);
616 if (cx == 0) { 616 if (!cx) {
617 spin_unlock(&cx18_cards_lock); 617 spin_unlock(&cx18_cards_lock);
618 return -ENOMEM; 618 return -ENOMEM;
619 } 619 }
diff --git a/drivers/media/video/saa7134/saa7134-video.c b/drivers/media/video/saa7134/saa7134-video.c
index a0baf2d0ba7f..48e1a01718ec 100644
--- a/drivers/media/video/saa7134/saa7134-video.c
+++ b/drivers/media/video/saa7134/saa7134-video.c
@@ -1634,7 +1634,7 @@ static int saa7134_s_fmt_overlay(struct file *file, void *priv,
1634 struct saa7134_fh *fh = priv; 1634 struct saa7134_fh *fh = priv;
1635 struct saa7134_dev *dev = fh->dev; 1635 struct saa7134_dev *dev = fh->dev;
1636 int err; 1636 int err;
1637 unsigned int flags; 1637 unsigned long flags;
1638 1638
1639 if (saa7134_no_overlay > 0) { 1639 if (saa7134_no_overlay > 0) {
1640 printk(KERN_ERR "V4L2_BUF_TYPE_VIDEO_OVERLAY: no_overlay\n"); 1640 printk(KERN_ERR "V4L2_BUF_TYPE_VIDEO_OVERLAY: no_overlay\n");
diff --git a/drivers/misc/kgdbts.c b/drivers/misc/kgdbts.c
index 30a1af857c7a..fa394104339c 100644
--- a/drivers/misc/kgdbts.c
+++ b/drivers/misc/kgdbts.c
@@ -47,6 +47,7 @@
47 * to test the HW NMI watchdog 47 * to test the HW NMI watchdog
48 * F## = Break at do_fork for ## iterations 48 * F## = Break at do_fork for ## iterations
49 * S## = Break at sys_open for ## iterations 49 * S## = Break at sys_open for ## iterations
50 * I## = Run the single step test ## iterations
50 * 51 *
51 * NOTE: that the do_fork and sys_open tests are mutually exclusive. 52 * NOTE: that the do_fork and sys_open tests are mutually exclusive.
52 * 53 *
@@ -375,7 +376,7 @@ static void emul_sstep_get(char *arg)
375 break; 376 break;
376 case 1: 377 case 1:
377 /* set breakpoint */ 378 /* set breakpoint */
378 break_helper("Z0", 0, sstep_addr); 379 break_helper("Z0", NULL, sstep_addr);
379 break; 380 break;
380 case 2: 381 case 2:
381 /* Continue */ 382 /* Continue */
@@ -383,7 +384,7 @@ static void emul_sstep_get(char *arg)
383 break; 384 break;
384 case 3: 385 case 3:
385 /* Clear breakpoint */ 386 /* Clear breakpoint */
386 break_helper("z0", 0, sstep_addr); 387 break_helper("z0", NULL, sstep_addr);
387 break; 388 break;
388 default: 389 default:
389 eprintk("kgdbts: ERROR failed sstep get emulation\n"); 390 eprintk("kgdbts: ERROR failed sstep get emulation\n");
@@ -465,11 +466,11 @@ static struct test_struct sw_breakpoint_test[] = {
465 { "?", "S0*" }, /* Clear break points */ 466 { "?", "S0*" }, /* Clear break points */
466 { "kgdbts_break_test", "OK", sw_break, }, /* set sw breakpoint */ 467 { "kgdbts_break_test", "OK", sw_break, }, /* set sw breakpoint */
467 { "c", "T0*", }, /* Continue */ 468 { "c", "T0*", }, /* Continue */
468 { "g", "kgdbts_break_test", 0, check_and_rewind_pc }, 469 { "g", "kgdbts_break_test", NULL, check_and_rewind_pc },
469 { "write", "OK", write_regs }, 470 { "write", "OK", write_regs },
470 { "kgdbts_break_test", "OK", sw_rem_break }, /*remove breakpoint */ 471 { "kgdbts_break_test", "OK", sw_rem_break }, /*remove breakpoint */
471 { "D", "OK" }, /* Detach */ 472 { "D", "OK" }, /* Detach */
472 { "D", "OK", 0, got_break }, /* If the test worked we made it here */ 473 { "D", "OK", NULL, got_break }, /* On success we made it here */
473 { "", "" }, 474 { "", "" },
474}; 475};
475 476
@@ -499,14 +500,14 @@ static struct test_struct singlestep_break_test[] = {
499 { "?", "S0*" }, /* Clear break points */ 500 { "?", "S0*" }, /* Clear break points */
500 { "kgdbts_break_test", "OK", sw_break, }, /* set sw breakpoint */ 501 { "kgdbts_break_test", "OK", sw_break, }, /* set sw breakpoint */
501 { "c", "T0*", }, /* Continue */ 502 { "c", "T0*", }, /* Continue */
502 { "g", "kgdbts_break_test", 0, check_and_rewind_pc }, 503 { "g", "kgdbts_break_test", NULL, check_and_rewind_pc },
503 { "write", "OK", write_regs }, /* Write registers */ 504 { "write", "OK", write_regs }, /* Write registers */
504 { "kgdbts_break_test", "OK", sw_rem_break }, /*remove breakpoint */ 505 { "kgdbts_break_test", "OK", sw_rem_break }, /*remove breakpoint */
505 { "s", "T0*", emul_sstep_get, emul_sstep_put }, /* Single step */ 506 { "s", "T0*", emul_sstep_get, emul_sstep_put }, /* Single step */
506 { "g", "kgdbts_break_test", 0, check_single_step }, 507 { "g", "kgdbts_break_test", NULL, check_single_step },
507 { "kgdbts_break_test", "OK", sw_break, }, /* set sw breakpoint */ 508 { "kgdbts_break_test", "OK", sw_break, }, /* set sw breakpoint */
508 { "c", "T0*", }, /* Continue */ 509 { "c", "T0*", }, /* Continue */
509 { "g", "kgdbts_break_test", 0, check_and_rewind_pc }, 510 { "g", "kgdbts_break_test", NULL, check_and_rewind_pc },
510 { "write", "OK", write_regs }, /* Write registers */ 511 { "write", "OK", write_regs }, /* Write registers */
511 { "D", "OK" }, /* Remove all breakpoints and continues */ 512 { "D", "OK" }, /* Remove all breakpoints and continues */
512 { "", "" }, 513 { "", "" },
@@ -520,14 +521,14 @@ static struct test_struct do_fork_test[] = {
520 { "?", "S0*" }, /* Clear break points */ 521 { "?", "S0*" }, /* Clear break points */
521 { "do_fork", "OK", sw_break, }, /* set sw breakpoint */ 522 { "do_fork", "OK", sw_break, }, /* set sw breakpoint */
522 { "c", "T0*", }, /* Continue */ 523 { "c", "T0*", }, /* Continue */
523 { "g", "do_fork", 0, check_and_rewind_pc }, /* check location */ 524 { "g", "do_fork", NULL, check_and_rewind_pc }, /* check location */
524 { "write", "OK", write_regs }, /* Write registers */ 525 { "write", "OK", write_regs }, /* Write registers */
525 { "do_fork", "OK", sw_rem_break }, /*remove breakpoint */ 526 { "do_fork", "OK", sw_rem_break }, /*remove breakpoint */
526 { "s", "T0*", emul_sstep_get, emul_sstep_put }, /* Single step */ 527 { "s", "T0*", emul_sstep_get, emul_sstep_put }, /* Single step */
527 { "g", "do_fork", 0, check_single_step }, 528 { "g", "do_fork", NULL, check_single_step },
528 { "do_fork", "OK", sw_break, }, /* set sw breakpoint */ 529 { "do_fork", "OK", sw_break, }, /* set sw breakpoint */
529 { "7", "T0*", skip_back_repeat_test }, /* Loop based on repeat_test */ 530 { "7", "T0*", skip_back_repeat_test }, /* Loop based on repeat_test */
530 { "D", "OK", 0, final_ack_set }, /* detach and unregister I/O */ 531 { "D", "OK", NULL, final_ack_set }, /* detach and unregister I/O */
531 { "", "" }, 532 { "", "" },
532}; 533};
533 534
@@ -538,14 +539,14 @@ static struct test_struct sys_open_test[] = {
538 { "?", "S0*" }, /* Clear break points */ 539 { "?", "S0*" }, /* Clear break points */
539 { "sys_open", "OK", sw_break, }, /* set sw breakpoint */ 540 { "sys_open", "OK", sw_break, }, /* set sw breakpoint */
540 { "c", "T0*", }, /* Continue */ 541 { "c", "T0*", }, /* Continue */
541 { "g", "sys_open", 0, check_and_rewind_pc }, /* check location */ 542 { "g", "sys_open", NULL, check_and_rewind_pc }, /* check location */
542 { "write", "OK", write_regs }, /* Write registers */ 543 { "write", "OK", write_regs }, /* Write registers */
543 { "sys_open", "OK", sw_rem_break }, /*remove breakpoint */ 544 { "sys_open", "OK", sw_rem_break }, /*remove breakpoint */
544 { "s", "T0*", emul_sstep_get, emul_sstep_put }, /* Single step */ 545 { "s", "T0*", emul_sstep_get, emul_sstep_put }, /* Single step */
545 { "g", "sys_open", 0, check_single_step }, 546 { "g", "sys_open", NULL, check_single_step },
546 { "sys_open", "OK", sw_break, }, /* set sw breakpoint */ 547 { "sys_open", "OK", sw_break, }, /* set sw breakpoint */
547 { "7", "T0*", skip_back_repeat_test }, /* Loop based on repeat_test */ 548 { "7", "T0*", skip_back_repeat_test }, /* Loop based on repeat_test */
548 { "D", "OK", 0, final_ack_set }, /* detach and unregister I/O */ 549 { "D", "OK", NULL, final_ack_set }, /* detach and unregister I/O */
549 { "", "" }, 550 { "", "" },
550}; 551};
551 552
@@ -556,11 +557,11 @@ static struct test_struct hw_breakpoint_test[] = {
556 { "?", "S0*" }, /* Clear break points */ 557 { "?", "S0*" }, /* Clear break points */
557 { "kgdbts_break_test", "OK", hw_break, }, /* set hw breakpoint */ 558 { "kgdbts_break_test", "OK", hw_break, }, /* set hw breakpoint */
558 { "c", "T0*", }, /* Continue */ 559 { "c", "T0*", }, /* Continue */
559 { "g", "kgdbts_break_test", 0, check_and_rewind_pc }, 560 { "g", "kgdbts_break_test", NULL, check_and_rewind_pc },
560 { "write", "OK", write_regs }, 561 { "write", "OK", write_regs },
561 { "kgdbts_break_test", "OK", hw_rem_break }, /*remove breakpoint */ 562 { "kgdbts_break_test", "OK", hw_rem_break }, /*remove breakpoint */
562 { "D", "OK" }, /* Detach */ 563 { "D", "OK" }, /* Detach */
563 { "D", "OK", 0, got_break }, /* If the test worked we made it here */ 564 { "D", "OK", NULL, got_break }, /* On success we made it here */
564 { "", "" }, 565 { "", "" },
565}; 566};
566 567
@@ -570,12 +571,12 @@ static struct test_struct hw_breakpoint_test[] = {
570static struct test_struct hw_write_break_test[] = { 571static struct test_struct hw_write_break_test[] = {
571 { "?", "S0*" }, /* Clear break points */ 572 { "?", "S0*" }, /* Clear break points */
572 { "hw_break_val", "OK", hw_write_break, }, /* set hw breakpoint */ 573 { "hw_break_val", "OK", hw_write_break, }, /* set hw breakpoint */
573 { "c", "T0*", 0, got_break }, /* Continue */ 574 { "c", "T0*", NULL, got_break }, /* Continue */
574 { "g", "silent", 0, check_and_rewind_pc }, 575 { "g", "silent", NULL, check_and_rewind_pc },
575 { "write", "OK", write_regs }, 576 { "write", "OK", write_regs },
576 { "hw_break_val", "OK", hw_rem_write_break }, /*remove breakpoint */ 577 { "hw_break_val", "OK", hw_rem_write_break }, /*remove breakpoint */
577 { "D", "OK" }, /* Detach */ 578 { "D", "OK" }, /* Detach */
578 { "D", "OK", 0, got_break }, /* If the test worked we made it here */ 579 { "D", "OK", NULL, got_break }, /* On success we made it here */
579 { "", "" }, 580 { "", "" },
580}; 581};
581 582
@@ -585,12 +586,12 @@ static struct test_struct hw_write_break_test[] = {
585static struct test_struct hw_access_break_test[] = { 586static struct test_struct hw_access_break_test[] = {
586 { "?", "S0*" }, /* Clear break points */ 587 { "?", "S0*" }, /* Clear break points */
587 { "hw_break_val", "OK", hw_access_break, }, /* set hw breakpoint */ 588 { "hw_break_val", "OK", hw_access_break, }, /* set hw breakpoint */
588 { "c", "T0*", 0, got_break }, /* Continue */ 589 { "c", "T0*", NULL, got_break }, /* Continue */
589 { "g", "silent", 0, check_and_rewind_pc }, 590 { "g", "silent", NULL, check_and_rewind_pc },
590 { "write", "OK", write_regs }, 591 { "write", "OK", write_regs },
591 { "hw_break_val", "OK", hw_rem_access_break }, /*remove breakpoint */ 592 { "hw_break_val", "OK", hw_rem_access_break }, /*remove breakpoint */
592 { "D", "OK" }, /* Detach */ 593 { "D", "OK" }, /* Detach */
593 { "D", "OK", 0, got_break }, /* If the test worked we made it here */ 594 { "D", "OK", NULL, got_break }, /* On success we made it here */
594 { "", "" }, 595 { "", "" },
595}; 596};
596 597
@@ -599,9 +600,9 @@ static struct test_struct hw_access_break_test[] = {
599 */ 600 */
600static struct test_struct nmi_sleep_test[] = { 601static struct test_struct nmi_sleep_test[] = {
601 { "?", "S0*" }, /* Clear break points */ 602 { "?", "S0*" }, /* Clear break points */
602 { "c", "T0*", 0, got_break }, /* Continue */ 603 { "c", "T0*", NULL, got_break }, /* Continue */
603 { "D", "OK" }, /* Detach */ 604 { "D", "OK" }, /* Detach */
604 { "D", "OK", 0, got_break }, /* If the test worked we made it here */ 605 { "D", "OK", NULL, got_break }, /* On success we made it here */
605 { "", "" }, 606 { "", "" },
606}; 607};
607 608
@@ -874,18 +875,23 @@ static void kgdbts_run_tests(void)
874{ 875{
875 char *ptr; 876 char *ptr;
876 int fork_test = 0; 877 int fork_test = 0;
877 int sys_open_test = 0; 878 int do_sys_open_test = 0;
879 int sstep_test = 1000;
878 int nmi_sleep = 0; 880 int nmi_sleep = 0;
881 int i;
879 882
880 ptr = strstr(config, "F"); 883 ptr = strstr(config, "F");
881 if (ptr) 884 if (ptr)
882 fork_test = simple_strtol(ptr+1, NULL, 10); 885 fork_test = simple_strtol(ptr + 1, NULL, 10);
883 ptr = strstr(config, "S"); 886 ptr = strstr(config, "S");
884 if (ptr) 887 if (ptr)
885 sys_open_test = simple_strtol(ptr+1, NULL, 10); 888 do_sys_open_test = simple_strtol(ptr + 1, NULL, 10);
886 ptr = strstr(config, "N"); 889 ptr = strstr(config, "N");
887 if (ptr) 890 if (ptr)
888 nmi_sleep = simple_strtol(ptr+1, NULL, 10); 891 nmi_sleep = simple_strtol(ptr+1, NULL, 10);
892 ptr = strstr(config, "I");
893 if (ptr)
894 sstep_test = simple_strtol(ptr+1, NULL, 10);
889 895
890 /* required internal KGDB tests */ 896 /* required internal KGDB tests */
891 v1printk("kgdbts:RUN plant and detach test\n"); 897 v1printk("kgdbts:RUN plant and detach test\n");
@@ -894,8 +900,13 @@ static void kgdbts_run_tests(void)
894 run_breakpoint_test(0); 900 run_breakpoint_test(0);
895 v1printk("kgdbts:RUN bad memory access test\n"); 901 v1printk("kgdbts:RUN bad memory access test\n");
896 run_bad_read_test(); 902 run_bad_read_test();
897 v1printk("kgdbts:RUN singlestep breakpoint test\n"); 903 v1printk("kgdbts:RUN singlestep test %i iterations\n", sstep_test);
898 run_singlestep_break_test(); 904 for (i = 0; i < sstep_test; i++) {
905 run_singlestep_break_test();
906 if (i % 100 == 0)
907 v1printk("kgdbts:RUN singlestep [%i/%i]\n",
908 i, sstep_test);
909 }
899 910
900 /* ===Optional tests=== */ 911 /* ===Optional tests=== */
901 912
@@ -922,7 +933,7 @@ static void kgdbts_run_tests(void)
922 repeat_test = fork_test; 933 repeat_test = fork_test;
923 printk(KERN_INFO "kgdbts:RUN do_fork for %i breakpoints\n", 934 printk(KERN_INFO "kgdbts:RUN do_fork for %i breakpoints\n",
924 repeat_test); 935 repeat_test);
925 kthread_run(kgdbts_unreg_thread, 0, "kgdbts_unreg"); 936 kthread_run(kgdbts_unreg_thread, NULL, "kgdbts_unreg");
926 run_do_fork_test(); 937 run_do_fork_test();
927 return; 938 return;
928 } 939 }
@@ -931,11 +942,11 @@ static void kgdbts_run_tests(void)
931 * executed because a kernel thread will be spawned at the very 942 * executed because a kernel thread will be spawned at the very
932 * end to unregister the debug hooks. 943 * end to unregister the debug hooks.
933 */ 944 */
934 if (sys_open_test) { 945 if (do_sys_open_test) {
935 repeat_test = sys_open_test; 946 repeat_test = do_sys_open_test;
936 printk(KERN_INFO "kgdbts:RUN sys_open for %i breakpoints\n", 947 printk(KERN_INFO "kgdbts:RUN sys_open for %i breakpoints\n",
937 repeat_test); 948 repeat_test);
938 kthread_run(kgdbts_unreg_thread, 0, "kgdbts_unreg"); 949 kthread_run(kgdbts_unreg_thread, NULL, "kgdbts_unreg");
939 run_sys_open_test(); 950 run_sys_open_test();
940 return; 951 return;
941 } 952 }
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 626ac083f4e0..da5fecad74d9 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -425,7 +425,7 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
425 host->cclk = host->mclk; 425 host->cclk = host->mclk;
426 } else { 426 } else {
427 clk = host->mclk / (2 * ios->clock) - 1; 427 clk = host->mclk / (2 * ios->clock) - 1;
428 if (clk > 256) 428 if (clk >= 256)
429 clk = 255; 429 clk = 255;
430 host->cclk = host->mclk / (2 * (clk + 1)); 430 host->cclk = host->mclk / (2 * (clk + 1));
431 } 431 }
@@ -512,6 +512,18 @@ static int mmci_probe(struct amba_device *dev, void *id)
512 512
513 host->plat = plat; 513 host->plat = plat;
514 host->mclk = clk_get_rate(host->clk); 514 host->mclk = clk_get_rate(host->clk);
515 /*
516 * According to the spec, mclk is max 100 MHz,
517 * so we try to adjust the clock down to this,
518 * (if possible).
519 */
520 if (host->mclk > 100000000) {
521 ret = clk_set_rate(host->clk, 100000000);
522 if (ret < 0)
523 goto clk_disable;
524 host->mclk = clk_get_rate(host->clk);
525 DBG(host, "eventual mclk rate: %u Hz\n", host->mclk);
526 }
515 host->mmc = mmc; 527 host->mmc = mmc;
516 host->base = ioremap(dev->res.start, SZ_4K); 528 host->base = ioremap(dev->res.start, SZ_4K);
517 if (!host->base) { 529 if (!host->base) {
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 1bd69aa9e22a..17bc87a43ff4 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -374,7 +374,7 @@ config MTD_REDWOOD
374 374
375config MTD_SOLUTIONENGINE 375config MTD_SOLUTIONENGINE
376 tristate "CFI Flash device mapped on Hitachi SolutionEngine" 376 tristate "CFI Flash device mapped on Hitachi SolutionEngine"
377 depends on SUPERH && MTD_CFI && MTD_REDBOOT_PARTS 377 depends on SUPERH && SOLUTION_ENGINE && MTD_CFI && MTD_REDBOOT_PARTS
378 help 378 help
379 This enables access to the flash chips on the Hitachi SolutionEngine and 379 This enables access to the flash chips on the Hitachi SolutionEngine and
380 similar boards. Say 'Y' if you are building a kernel for such a board. 380 similar boards. Say 'Y' if you are building a kernel for such a board.
@@ -480,13 +480,6 @@ config MTD_H720X
480 This enables access to the flash chips on the Hynix evaluation boards. 480 This enables access to the flash chips on the Hynix evaluation boards.
481 If you have such a board, say 'Y'. 481 If you have such a board, say 'Y'.
482 482
483config MTD_MPC1211
484 tristate "CFI Flash device mapped on Interface MPC-1211"
485 depends on SH_MPC1211 && MTD_CFI
486 help
487 This enables access to the flash chips on the Interface MPC-1211(CTP/PCI/MPC-SH02).
488 If you have such a board, say 'Y'.
489
490config MTD_OMAP_NOR 483config MTD_OMAP_NOR
491 tristate "TI OMAP board mappings" 484 tristate "TI OMAP board mappings"
492 depends on MTD_CFI && ARCH_OMAP 485 depends on MTD_CFI && ARCH_OMAP
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index a9cbe80f99a0..957fb5f70f5e 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -58,7 +58,6 @@ obj-$(CONFIG_MTD_WALNUT) += walnut.o
58obj-$(CONFIG_MTD_H720X) += h720x-flash.o 58obj-$(CONFIG_MTD_H720X) += h720x-flash.o
59obj-$(CONFIG_MTD_SBC8240) += sbc8240.o 59obj-$(CONFIG_MTD_SBC8240) += sbc8240.o
60obj-$(CONFIG_MTD_NOR_TOTO) += omap-toto-flash.o 60obj-$(CONFIG_MTD_NOR_TOTO) += omap-toto-flash.o
61obj-$(CONFIG_MTD_MPC1211) += mpc1211.o
62obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o 61obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o
63obj-$(CONFIG_MTD_IXP2000) += ixp2000.o 62obj-$(CONFIG_MTD_IXP2000) += ixp2000.o
64obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o 63obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o
diff --git a/drivers/mtd/maps/mpc1211.c b/drivers/mtd/maps/mpc1211.c
deleted file mode 100644
index 45a00fac88ac..000000000000
--- a/drivers/mtd/maps/mpc1211.c
+++ /dev/null
@@ -1,80 +0,0 @@
1/*
2 * Flash on MPC-1211
3 *
4 * $Id: mpc1211.c,v 1.4 2004/09/16 23:27:13 gleixner Exp $
5 *
6 * (C) 2002 Interface, Saito.K & Jeanne
7 *
8 * GPL'd
9 */
10
11#include <linux/module.h>
12#include <linux/types.h>
13#include <linux/kernel.h>
14#include <asm/io.h>
15#include <linux/mtd/mtd.h>
16#include <linux/mtd/map.h>
17#include <linux/mtd/partitions.h>
18
19static struct mtd_info *flash_mtd;
20static struct mtd_partition *parsed_parts;
21
22struct map_info mpc1211_flash_map = {
23 .name = "MPC-1211 FLASH",
24 .size = 0x80000,
25 .bankwidth = 1,
26};
27
28static struct mtd_partition mpc1211_partitions[] = {
29 {
30 .name = "IPL & ETH-BOOT",
31 .offset = 0x00000000,
32 .size = 0x10000,
33 },
34 {
35 .name = "Flash FS",
36 .offset = 0x00010000,
37 .size = MTDPART_SIZ_FULL,
38 }
39};
40
41static int __init init_mpc1211_maps(void)
42{
43 int nr_parts;
44
45 mpc1211_flash_map.phys = 0;
46 mpc1211_flash_map.virt = (void __iomem *)P2SEGADDR(0);
47
48 simple_map_init(&mpc1211_flash_map);
49
50 printk(KERN_NOTICE "Probing for flash chips at 0x00000000:\n");
51 flash_mtd = do_map_probe("jedec_probe", &mpc1211_flash_map);
52 if (!flash_mtd) {
53 printk(KERN_NOTICE "Flash chips not detected at either possible location.\n");
54 return -ENXIO;
55 }
56 printk(KERN_NOTICE "MPC-1211: Flash at 0x%08lx\n", mpc1211_flash_map.virt & 0x1fffffff);
57 flash_mtd->module = THIS_MODULE;
58
59 parsed_parts = mpc1211_partitions;
60 nr_parts = ARRAY_SIZE(mpc1211_partitions);
61
62 add_mtd_partitions(flash_mtd, parsed_parts, nr_parts);
63 return 0;
64}
65
66static void __exit cleanup_mpc1211_maps(void)
67{
68 if (parsed_parts)
69 del_mtd_partitions(flash_mtd);
70 else
71 del_mtd_device(flash_mtd);
72 map_destroy(flash_mtd);
73}
74
75module_init(init_mpc1211_maps);
76module_exit(cleanup_mpc1211_maps);
77
78MODULE_LICENSE("GPL");
79MODULE_AUTHOR("Saito.K & Jeanne <ksaito@interface.co.jp>");
80MODULE_DESCRIPTION("MTD map driver for MPC-1211 boards. Interface");
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c
index 6f8e7d4cf74d..2edda8cc7f99 100644
--- a/drivers/net/3c59x.c
+++ b/drivers/net/3c59x.c
@@ -319,7 +319,7 @@ static struct vortex_chip_info {
319 {"3c920B-EMB-WNM (ATI Radeon 9100 IGP)", 319 {"3c920B-EMB-WNM (ATI Radeon 9100 IGP)",
320 PCI_USES_MASTER, IS_TORNADO|HAS_MII|HAS_HWCKSM, 128, }, 320 PCI_USES_MASTER, IS_TORNADO|HAS_MII|HAS_HWCKSM, 128, },
321 {"3c980 Cyclone", 321 {"3c980 Cyclone",
322 PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, }, 322 PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
323 323
324 {"3c980C Python-T", 324 {"3c980C Python-T",
325 PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, }, 325 PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
@@ -600,7 +600,6 @@ struct vortex_private {
600 struct sk_buff* tx_skbuff[TX_RING_SIZE]; 600 struct sk_buff* tx_skbuff[TX_RING_SIZE];
601 unsigned int cur_rx, cur_tx; /* The next free ring entry */ 601 unsigned int cur_rx, cur_tx; /* The next free ring entry */
602 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */ 602 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
603 struct net_device_stats stats; /* Generic stats */
604 struct vortex_extra_stats xstats; /* NIC-specific extra stats */ 603 struct vortex_extra_stats xstats; /* NIC-specific extra stats */
605 struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */ 604 struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
606 dma_addr_t tx_skb_dma; /* Allocated DMA address for bus master ctrl DMA. */ 605 dma_addr_t tx_skb_dma; /* Allocated DMA address for bus master ctrl DMA. */
@@ -1875,7 +1874,7 @@ static void vortex_tx_timeout(struct net_device *dev)
1875 1874
1876 issue_and_wait(dev, TxReset); 1875 issue_and_wait(dev, TxReset);
1877 1876
1878 vp->stats.tx_errors++; 1877 dev->stats.tx_errors++;
1879 if (vp->full_bus_master_tx) { 1878 if (vp->full_bus_master_tx) {
1880 printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name); 1879 printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name);
1881 if (vp->cur_tx - vp->dirty_tx > 0 && ioread32(ioaddr + DownListPtr) == 0) 1880 if (vp->cur_tx - vp->dirty_tx > 0 && ioread32(ioaddr + DownListPtr) == 0)
@@ -1887,7 +1886,7 @@ static void vortex_tx_timeout(struct net_device *dev)
1887 iowrite8(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold); 1886 iowrite8(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold);
1888 iowrite16(DownUnstall, ioaddr + EL3_CMD); 1887 iowrite16(DownUnstall, ioaddr + EL3_CMD);
1889 } else { 1888 } else {
1890 vp->stats.tx_dropped++; 1889 dev->stats.tx_dropped++;
1891 netif_wake_queue(dev); 1890 netif_wake_queue(dev);
1892 } 1891 }
1893 1892
@@ -1928,8 +1927,8 @@ vortex_error(struct net_device *dev, int status)
1928 } 1927 }
1929 dump_tx_ring(dev); 1928 dump_tx_ring(dev);
1930 } 1929 }
1931 if (tx_status & 0x14) vp->stats.tx_fifo_errors++; 1930 if (tx_status & 0x14) dev->stats.tx_fifo_errors++;
1932 if (tx_status & 0x38) vp->stats.tx_aborted_errors++; 1931 if (tx_status & 0x38) dev->stats.tx_aborted_errors++;
1933 if (tx_status & 0x08) vp->xstats.tx_max_collisions++; 1932 if (tx_status & 0x08) vp->xstats.tx_max_collisions++;
1934 iowrite8(0, ioaddr + TxStatus); 1933 iowrite8(0, ioaddr + TxStatus);
1935 if (tx_status & 0x30) { /* txJabber or txUnderrun */ 1934 if (tx_status & 0x30) { /* txJabber or txUnderrun */
@@ -2051,8 +2050,8 @@ vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)
2051 if (vortex_debug > 2) 2050 if (vortex_debug > 2)
2052 printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n", 2051 printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n",
2053 dev->name, tx_status); 2052 dev->name, tx_status);
2054 if (tx_status & 0x04) vp->stats.tx_fifo_errors++; 2053 if (tx_status & 0x04) dev->stats.tx_fifo_errors++;
2055 if (tx_status & 0x38) vp->stats.tx_aborted_errors++; 2054 if (tx_status & 0x38) dev->stats.tx_aborted_errors++;
2056 if (tx_status & 0x30) { 2055 if (tx_status & 0x30) {
2057 issue_and_wait(dev, TxReset); 2056 issue_and_wait(dev, TxReset);
2058 } 2057 }
@@ -2350,7 +2349,7 @@ boomerang_interrupt(int irq, void *dev_id)
2350 } else { 2349 } else {
2351 printk(KERN_DEBUG "boomerang_interrupt: no skb!\n"); 2350 printk(KERN_DEBUG "boomerang_interrupt: no skb!\n");
2352 } 2351 }
2353 /* vp->stats.tx_packets++; Counted below. */ 2352 /* dev->stats.tx_packets++; Counted below. */
2354 dirty_tx++; 2353 dirty_tx++;
2355 } 2354 }
2356 vp->dirty_tx = dirty_tx; 2355 vp->dirty_tx = dirty_tx;
@@ -2409,12 +2408,12 @@ static int vortex_rx(struct net_device *dev)
2409 unsigned char rx_error = ioread8(ioaddr + RxErrors); 2408 unsigned char rx_error = ioread8(ioaddr + RxErrors);
2410 if (vortex_debug > 2) 2409 if (vortex_debug > 2)
2411 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error); 2410 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2412 vp->stats.rx_errors++; 2411 dev->stats.rx_errors++;
2413 if (rx_error & 0x01) vp->stats.rx_over_errors++; 2412 if (rx_error & 0x01) dev->stats.rx_over_errors++;
2414 if (rx_error & 0x02) vp->stats.rx_length_errors++; 2413 if (rx_error & 0x02) dev->stats.rx_length_errors++;
2415 if (rx_error & 0x04) vp->stats.rx_frame_errors++; 2414 if (rx_error & 0x04) dev->stats.rx_frame_errors++;
2416 if (rx_error & 0x08) vp->stats.rx_crc_errors++; 2415 if (rx_error & 0x08) dev->stats.rx_crc_errors++;
2417 if (rx_error & 0x10) vp->stats.rx_length_errors++; 2416 if (rx_error & 0x10) dev->stats.rx_length_errors++;
2418 } else { 2417 } else {
2419 /* The packet length: up to 4.5K!. */ 2418 /* The packet length: up to 4.5K!. */
2420 int pkt_len = rx_status & 0x1fff; 2419 int pkt_len = rx_status & 0x1fff;
@@ -2446,7 +2445,7 @@ static int vortex_rx(struct net_device *dev)
2446 skb->protocol = eth_type_trans(skb, dev); 2445 skb->protocol = eth_type_trans(skb, dev);
2447 netif_rx(skb); 2446 netif_rx(skb);
2448 dev->last_rx = jiffies; 2447 dev->last_rx = jiffies;
2449 vp->stats.rx_packets++; 2448 dev->stats.rx_packets++;
2450 /* Wait a limited time to go to next packet. */ 2449 /* Wait a limited time to go to next packet. */
2451 for (i = 200; i >= 0; i--) 2450 for (i = 200; i >= 0; i--)
2452 if ( ! (ioread16(ioaddr + EL3_STATUS) & CmdInProgress)) 2451 if ( ! (ioread16(ioaddr + EL3_STATUS) & CmdInProgress))
@@ -2455,7 +2454,7 @@ static int vortex_rx(struct net_device *dev)
2455 } else if (vortex_debug > 0) 2454 } else if (vortex_debug > 0)
2456 printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of " 2455 printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of "
2457 "size %d.\n", dev->name, pkt_len); 2456 "size %d.\n", dev->name, pkt_len);
2458 vp->stats.rx_dropped++; 2457 dev->stats.rx_dropped++;
2459 } 2458 }
2460 issue_and_wait(dev, RxDiscard); 2459 issue_and_wait(dev, RxDiscard);
2461 } 2460 }
@@ -2482,12 +2481,12 @@ boomerang_rx(struct net_device *dev)
2482 unsigned char rx_error = rx_status >> 16; 2481 unsigned char rx_error = rx_status >> 16;
2483 if (vortex_debug > 2) 2482 if (vortex_debug > 2)
2484 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error); 2483 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2485 vp->stats.rx_errors++; 2484 dev->stats.rx_errors++;
2486 if (rx_error & 0x01) vp->stats.rx_over_errors++; 2485 if (rx_error & 0x01) dev->stats.rx_over_errors++;
2487 if (rx_error & 0x02) vp->stats.rx_length_errors++; 2486 if (rx_error & 0x02) dev->stats.rx_length_errors++;
2488 if (rx_error & 0x04) vp->stats.rx_frame_errors++; 2487 if (rx_error & 0x04) dev->stats.rx_frame_errors++;
2489 if (rx_error & 0x08) vp->stats.rx_crc_errors++; 2488 if (rx_error & 0x08) dev->stats.rx_crc_errors++;
2490 if (rx_error & 0x10) vp->stats.rx_length_errors++; 2489 if (rx_error & 0x10) dev->stats.rx_length_errors++;
2491 } else { 2490 } else {
2492 /* The packet length: up to 4.5K!. */ 2491 /* The packet length: up to 4.5K!. */
2493 int pkt_len = rx_status & 0x1fff; 2492 int pkt_len = rx_status & 0x1fff;
@@ -2529,7 +2528,7 @@ boomerang_rx(struct net_device *dev)
2529 } 2528 }
2530 netif_rx(skb); 2529 netif_rx(skb);
2531 dev->last_rx = jiffies; 2530 dev->last_rx = jiffies;
2532 vp->stats.rx_packets++; 2531 dev->stats.rx_packets++;
2533 } 2532 }
2534 entry = (++vp->cur_rx) % RX_RING_SIZE; 2533 entry = (++vp->cur_rx) % RX_RING_SIZE;
2535 } 2534 }
@@ -2591,7 +2590,7 @@ vortex_down(struct net_device *dev, int final_down)
2591 del_timer_sync(&vp->rx_oom_timer); 2590 del_timer_sync(&vp->rx_oom_timer);
2592 del_timer_sync(&vp->timer); 2591 del_timer_sync(&vp->timer);
2593 2592
2594 /* Turn off statistics ASAP. We update vp->stats below. */ 2593 /* Turn off statistics ASAP. We update dev->stats below. */
2595 iowrite16(StatsDisable, ioaddr + EL3_CMD); 2594 iowrite16(StatsDisable, ioaddr + EL3_CMD);
2596 2595
2597 /* Disable the receiver and transmitter. */ 2596 /* Disable the receiver and transmitter. */
@@ -2728,7 +2727,7 @@ static struct net_device_stats *vortex_get_stats(struct net_device *dev)
2728 update_stats(ioaddr, dev); 2727 update_stats(ioaddr, dev);
2729 spin_unlock_irqrestore (&vp->lock, flags); 2728 spin_unlock_irqrestore (&vp->lock, flags);
2730 } 2729 }
2731 return &vp->stats; 2730 return &dev->stats;
2732} 2731}
2733 2732
2734/* Update statistics. 2733/* Update statistics.
@@ -2748,18 +2747,18 @@ static void update_stats(void __iomem *ioaddr, struct net_device *dev)
2748 /* Unlike the 3c5x9 we need not turn off stats updates while reading. */ 2747 /* Unlike the 3c5x9 we need not turn off stats updates while reading. */
2749 /* Switch to the stats window, and read everything. */ 2748 /* Switch to the stats window, and read everything. */
2750 EL3WINDOW(6); 2749 EL3WINDOW(6);
2751 vp->stats.tx_carrier_errors += ioread8(ioaddr + 0); 2750 dev->stats.tx_carrier_errors += ioread8(ioaddr + 0);
2752 vp->stats.tx_heartbeat_errors += ioread8(ioaddr + 1); 2751 dev->stats.tx_heartbeat_errors += ioread8(ioaddr + 1);
2753 vp->stats.tx_window_errors += ioread8(ioaddr + 4); 2752 dev->stats.tx_window_errors += ioread8(ioaddr + 4);
2754 vp->stats.rx_fifo_errors += ioread8(ioaddr + 5); 2753 dev->stats.rx_fifo_errors += ioread8(ioaddr + 5);
2755 vp->stats.tx_packets += ioread8(ioaddr + 6); 2754 dev->stats.tx_packets += ioread8(ioaddr + 6);
2756 vp->stats.tx_packets += (ioread8(ioaddr + 9)&0x30) << 4; 2755 dev->stats.tx_packets += (ioread8(ioaddr + 9)&0x30) << 4;
2757 /* Rx packets */ ioread8(ioaddr + 7); /* Must read to clear */ 2756 /* Rx packets */ ioread8(ioaddr + 7); /* Must read to clear */
2758 /* Don't bother with register 9, an extension of registers 6&7. 2757 /* Don't bother with register 9, an extension of registers 6&7.
2759 If we do use the 6&7 values the atomic update assumption above 2758 If we do use the 6&7 values the atomic update assumption above
2760 is invalid. */ 2759 is invalid. */
2761 vp->stats.rx_bytes += ioread16(ioaddr + 10); 2760 dev->stats.rx_bytes += ioread16(ioaddr + 10);
2762 vp->stats.tx_bytes += ioread16(ioaddr + 12); 2761 dev->stats.tx_bytes += ioread16(ioaddr + 12);
2763 /* Extra stats for get_ethtool_stats() */ 2762 /* Extra stats for get_ethtool_stats() */
2764 vp->xstats.tx_multiple_collisions += ioread8(ioaddr + 2); 2763 vp->xstats.tx_multiple_collisions += ioread8(ioaddr + 2);
2765 vp->xstats.tx_single_collisions += ioread8(ioaddr + 3); 2764 vp->xstats.tx_single_collisions += ioread8(ioaddr + 3);
@@ -2767,14 +2766,14 @@ static void update_stats(void __iomem *ioaddr, struct net_device *dev)
2767 EL3WINDOW(4); 2766 EL3WINDOW(4);
2768 vp->xstats.rx_bad_ssd += ioread8(ioaddr + 12); 2767 vp->xstats.rx_bad_ssd += ioread8(ioaddr + 12);
2769 2768
2770 vp->stats.collisions = vp->xstats.tx_multiple_collisions 2769 dev->stats.collisions = vp->xstats.tx_multiple_collisions
2771 + vp->xstats.tx_single_collisions 2770 + vp->xstats.tx_single_collisions
2772 + vp->xstats.tx_max_collisions; 2771 + vp->xstats.tx_max_collisions;
2773 2772
2774 { 2773 {
2775 u8 up = ioread8(ioaddr + 13); 2774 u8 up = ioread8(ioaddr + 13);
2776 vp->stats.rx_bytes += (up & 0x0f) << 16; 2775 dev->stats.rx_bytes += (up & 0x0f) << 16;
2777 vp->stats.tx_bytes += (up & 0xf0) << 12; 2776 dev->stats.tx_bytes += (up & 0xf0) << 12;
2778 } 2777 }
2779 2778
2780 EL3WINDOW(old_window >> 13); 2779 EL3WINDOW(old_window >> 13);
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index af46341827f2..d27f54a2df77 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1273,20 +1273,6 @@ config PCNET32
1273 To compile this driver as a module, choose M here. The module 1273 To compile this driver as a module, choose M here. The module
1274 will be called pcnet32. 1274 will be called pcnet32.
1275 1275
1276config PCNET32_NAPI
1277 bool "Use RX polling (NAPI)"
1278 depends on PCNET32
1279 help
1280 NAPI is a new driver API designed to reduce CPU and interrupt load
1281 when the driver is receiving lots of packets from the card. It is
1282 still somewhat experimental and thus not yet enabled by default.
1283
1284 If your estimated Rx load is 10kpps or more, or if the card will be
1285 deployed on potentially unfriendly networks (e.g. in a firewall),
1286 then say Y here.
1287
1288 If in doubt, say N.
1289
1290config AMD8111_ETH 1276config AMD8111_ETH
1291 tristate "AMD 8111 (new PCI lance) support" 1277 tristate "AMD 8111 (new PCI lance) support"
1292 depends on NET_PCI && PCI 1278 depends on NET_PCI && PCI
diff --git a/drivers/net/appletalk/cops.c b/drivers/net/appletalk/cops.c
index 82e9a5bd0dd2..a0b4c8516073 100644
--- a/drivers/net/appletalk/cops.c
+++ b/drivers/net/appletalk/cops.c
@@ -499,19 +499,13 @@ static void cops_reset(struct net_device *dev, int sleep)
499 { 499 {
500 outb(0, ioaddr+DAYNA_RESET); /* Assert the reset port */ 500 outb(0, ioaddr+DAYNA_RESET); /* Assert the reset port */
501 inb(ioaddr+DAYNA_RESET); /* Clear the reset */ 501 inb(ioaddr+DAYNA_RESET); /* Clear the reset */
502 if(sleep) 502 if (sleep)
503 { 503 msleep(333);
504 long snap=jiffies; 504 else
505 505 mdelay(333);
506 /* Let card finish initializing, about 1/3 second */
507 while (time_before(jiffies, snap + HZ/3))
508 schedule();
509 }
510 else
511 mdelay(333);
512 } 506 }
507
513 netif_wake_queue(dev); 508 netif_wake_queue(dev);
514 return;
515} 509}
516 510
517static void cops_load (struct net_device *dev) 511static void cops_load (struct net_device *dev)
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index 6425603bc379..50a40e433154 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -1425,13 +1425,13 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1425 res = netdev_set_master(slave_dev, bond_dev); 1425 res = netdev_set_master(slave_dev, bond_dev);
1426 if (res) { 1426 if (res) {
1427 dprintk("Error %d calling netdev_set_master\n", res); 1427 dprintk("Error %d calling netdev_set_master\n", res);
1428 goto err_close; 1428 goto err_restore_mac;
1429 } 1429 }
1430 /* open the slave since the application closed it */ 1430 /* open the slave since the application closed it */
1431 res = dev_open(slave_dev); 1431 res = dev_open(slave_dev);
1432 if (res) { 1432 if (res) {
1433 dprintk("Openning slave %s failed\n", slave_dev->name); 1433 dprintk("Openning slave %s failed\n", slave_dev->name);
1434 goto err_restore_mac; 1434 goto err_unset_master;
1435 } 1435 }
1436 1436
1437 new_slave->dev = slave_dev; 1437 new_slave->dev = slave_dev;
@@ -1444,7 +1444,7 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1444 */ 1444 */
1445 res = bond_alb_init_slave(bond, new_slave); 1445 res = bond_alb_init_slave(bond, new_slave);
1446 if (res) { 1446 if (res) {
1447 goto err_unset_master; 1447 goto err_close;
1448 } 1448 }
1449 } 1449 }
1450 1450
@@ -1619,7 +1619,7 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1619 1619
1620 res = bond_create_slave_symlinks(bond_dev, slave_dev); 1620 res = bond_create_slave_symlinks(bond_dev, slave_dev);
1621 if (res) 1621 if (res)
1622 goto err_unset_master; 1622 goto err_close;
1623 1623
1624 printk(KERN_INFO DRV_NAME 1624 printk(KERN_INFO DRV_NAME
1625 ": %s: enslaving %s as a%s interface with a%s link.\n", 1625 ": %s: enslaving %s as a%s interface with a%s link.\n",
@@ -1631,12 +1631,12 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1631 return 0; 1631 return 0;
1632 1632
1633/* Undo stages on error */ 1633/* Undo stages on error */
1634err_unset_master:
1635 netdev_set_master(slave_dev, NULL);
1636
1637err_close: 1634err_close:
1638 dev_close(slave_dev); 1635 dev_close(slave_dev);
1639 1636
1637err_unset_master:
1638 netdev_set_master(slave_dev, NULL);
1639
1640err_restore_mac: 1640err_restore_mac:
1641 if (!bond->params.fail_over_mac) { 1641 if (!bond->params.fail_over_mac) {
1642 memcpy(addr.sa_data, new_slave->perm_hwaddr, ETH_ALEN); 1642 memcpy(addr.sa_data, new_slave->perm_hwaddr, ETH_ALEN);
@@ -4936,7 +4936,9 @@ int bond_create(char *name, struct bond_params *params, struct bonding **newbond
4936 if (res < 0) { 4936 if (res < 0) {
4937 rtnl_lock(); 4937 rtnl_lock();
4938 down_write(&bonding_rwsem); 4938 down_write(&bonding_rwsem);
4939 goto out_bond; 4939 bond_deinit(bond_dev);
4940 unregister_netdevice(bond_dev);
4941 goto out_rtnl;
4940 } 4942 }
4941 4943
4942 return 0; 4944 return 0;
@@ -4990,9 +4992,10 @@ err:
4990 destroy_workqueue(bond->wq); 4992 destroy_workqueue(bond->wq);
4991 } 4993 }
4992 4994
4995 bond_destroy_sysfs();
4996
4993 rtnl_lock(); 4997 rtnl_lock();
4994 bond_free_all(); 4998 bond_free_all();
4995 bond_destroy_sysfs();
4996 rtnl_unlock(); 4999 rtnl_unlock();
4997out: 5000out:
4998 return res; 5001 return res;
@@ -5004,9 +5007,10 @@ static void __exit bonding_exit(void)
5004 unregister_netdevice_notifier(&bond_netdev_notifier); 5007 unregister_netdevice_notifier(&bond_netdev_notifier);
5005 unregister_inetaddr_notifier(&bond_inetaddr_notifier); 5008 unregister_inetaddr_notifier(&bond_inetaddr_notifier);
5006 5009
5010 bond_destroy_sysfs();
5011
5007 rtnl_lock(); 5012 rtnl_lock();
5008 bond_free_all(); 5013 bond_free_all();
5009 bond_destroy_sysfs();
5010 rtnl_unlock(); 5014 rtnl_unlock();
5011} 5015}
5012 5016
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c
index 979c2d05ff9c..68c41a00d93d 100644
--- a/drivers/net/bonding/bond_sysfs.c
+++ b/drivers/net/bonding/bond_sysfs.c
@@ -146,29 +146,29 @@ static ssize_t bonding_store_bonds(struct class *cls, const char *buffer, size_t
146 ": Unable remove bond %s due to open references.\n", 146 ": Unable remove bond %s due to open references.\n",
147 ifname); 147 ifname);
148 res = -EPERM; 148 res = -EPERM;
149 goto out; 149 goto out_unlock;
150 } 150 }
151 printk(KERN_INFO DRV_NAME 151 printk(KERN_INFO DRV_NAME
152 ": %s is being deleted...\n", 152 ": %s is being deleted...\n",
153 bond->dev->name); 153 bond->dev->name);
154 bond_destroy(bond); 154 bond_destroy(bond);
155 up_write(&bonding_rwsem); 155 goto out_unlock;
156 rtnl_unlock();
157 goto out;
158 } 156 }
159 157
160 printk(KERN_ERR DRV_NAME 158 printk(KERN_ERR DRV_NAME
161 ": unable to delete non-existent bond %s\n", ifname); 159 ": unable to delete non-existent bond %s\n", ifname);
162 res = -ENODEV; 160 res = -ENODEV;
163 up_write(&bonding_rwsem); 161 goto out_unlock;
164 rtnl_unlock();
165 goto out;
166 } 162 }
167 163
168err_no_cmd: 164err_no_cmd:
169 printk(KERN_ERR DRV_NAME 165 printk(KERN_ERR DRV_NAME
170 ": no command found in bonding_masters. Use +ifname or -ifname.\n"); 166 ": no command found in bonding_masters. Use +ifname or -ifname.\n");
171 res = -EPERM; 167 return -EPERM;
168
169out_unlock:
170 up_write(&bonding_rwsem);
171 rtnl_unlock();
172 172
173 /* Always return either count or an error. If you return 0, you'll 173 /* Always return either count or an error. If you return 0, you'll
174 * get called forever, which is bad. 174 * get called forever, which is bad.
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c
index 05e5f59e87fa..ce949d5fae39 100644
--- a/drivers/net/cxgb3/cxgb3_main.c
+++ b/drivers/net/cxgb3/cxgb3_main.c
@@ -1894,11 +1894,11 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
1894 u8 *fw_data; 1894 u8 *fw_data;
1895 struct ch_mem_range t; 1895 struct ch_mem_range t;
1896 1896
1897 if (!capable(CAP_NET_ADMIN)) 1897 if (!capable(CAP_SYS_RAWIO))
1898 return -EPERM; 1898 return -EPERM;
1899 if (copy_from_user(&t, useraddr, sizeof(t))) 1899 if (copy_from_user(&t, useraddr, sizeof(t)))
1900 return -EFAULT; 1900 return -EFAULT;
1901 1901 /* Check t.len sanity ? */
1902 fw_data = kmalloc(t.len, GFP_KERNEL); 1902 fw_data = kmalloc(t.len, GFP_KERNEL);
1903 if (!fw_data) 1903 if (!fw_data)
1904 return -ENOMEM; 1904 return -ENOMEM;
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h
index 2a53875cddbf..f823b8ba5785 100644
--- a/drivers/net/e1000e/defines.h
+++ b/drivers/net/e1000e/defines.h
@@ -648,6 +648,8 @@
648#define IFE_E_PHY_ID 0x02A80330 648#define IFE_E_PHY_ID 0x02A80330
649#define IFE_PLUS_E_PHY_ID 0x02A80320 649#define IFE_PLUS_E_PHY_ID 0x02A80320
650#define IFE_C_E_PHY_ID 0x02A80310 650#define IFE_C_E_PHY_ID 0x02A80310
651#define BME1000_E_PHY_ID 0x01410CB0
652#define BME1000_E_PHY_ID_R2 0x01410CB1
651 653
652/* M88E1000 Specific Registers */ 654/* M88E1000 Specific Registers */
653#define M88E1000_PHY_SPEC_CTRL 0x10 /* PHY Specific Control Register */ 655#define M88E1000_PHY_SPEC_CTRL 0x10 /* PHY Specific Control Register */
@@ -701,6 +703,14 @@
701#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK 0x0E00 703#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK 0x0E00
702#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X 0x0800 704#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X 0x0800
703 705
706/* BME1000 PHY Specific Control Register */
707#define BME1000_PSCR_ENABLE_DOWNSHIFT 0x0800 /* 1 = enable downshift */
708
709
710#define PHY_PAGE_SHIFT 5
711#define PHY_REG(page, reg) (((page) << PHY_PAGE_SHIFT) | \
712 ((reg) & MAX_PHY_REG_ADDRESS))
713
704/* 714/*
705 * Bits... 715 * Bits...
706 * 15-5: page 716 * 15-5: page
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h
index 38bfd0d261fe..d3bc6f8101fa 100644
--- a/drivers/net/e1000e/e1000.h
+++ b/drivers/net/e1000e/e1000.h
@@ -127,7 +127,7 @@ struct e1000_buffer {
127 /* arrays of page information for packet split */ 127 /* arrays of page information for packet split */
128 struct e1000_ps_page *ps_pages; 128 struct e1000_ps_page *ps_pages;
129 }; 129 };
130 130 struct page *page;
131}; 131};
132 132
133struct e1000_ring { 133struct e1000_ring {
@@ -304,6 +304,7 @@ struct e1000_info {
304#define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5) 304#define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5)
305#define FLAG_HAS_SWSM_ON_LOAD (1 << 6) 305#define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
306#define FLAG_HAS_JUMBO_FRAMES (1 << 7) 306#define FLAG_HAS_JUMBO_FRAMES (1 << 7)
307#define FLAG_IS_ICH (1 << 9)
307#define FLAG_HAS_SMART_POWER_DOWN (1 << 11) 308#define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
308#define FLAG_IS_QUAD_PORT_A (1 << 12) 309#define FLAG_IS_QUAD_PORT_A (1 << 12)
309#define FLAG_IS_QUAD_PORT (1 << 13) 310#define FLAG_IS_QUAD_PORT (1 << 13)
@@ -386,6 +387,7 @@ extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
386 bool state); 387 bool state);
387extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw); 388extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
388extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw); 389extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
390extern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw);
389 391
390extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw); 392extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
391extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw); 393extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
@@ -443,6 +445,9 @@ extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
443extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data); 445extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
444extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data); 446extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
445extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id); 447extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
448extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
449extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
450extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
446extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); 451extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
447extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); 452extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
448extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); 453extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
diff --git a/drivers/net/e1000e/ethtool.c b/drivers/net/e1000e/ethtool.c
index ce045acce63e..a14561f40db0 100644
--- a/drivers/net/e1000e/ethtool.c
+++ b/drivers/net/e1000e/ethtool.c
@@ -494,8 +494,12 @@ static int e1000_get_eeprom(struct net_device *netdev,
494 for (i = 0; i < last_word - first_word + 1; i++) { 494 for (i = 0; i < last_word - first_word + 1; i++) {
495 ret_val = e1000_read_nvm(hw, first_word + i, 1, 495 ret_val = e1000_read_nvm(hw, first_word + i, 1,
496 &eeprom_buff[i]); 496 &eeprom_buff[i]);
497 if (ret_val) 497 if (ret_val) {
498 /* a read error occurred, throw away the
499 * result */
500 memset(eeprom_buff, 0xff, sizeof(eeprom_buff));
498 break; 501 break;
502 }
499 } 503 }
500 } 504 }
501 505
@@ -803,8 +807,7 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
803 /* restore previous status */ 807 /* restore previous status */
804 ew32(STATUS, before); 808 ew32(STATUS, before);
805 809
806 if ((mac->type != e1000_ich8lan) && 810 if (!(adapter->flags & FLAG_IS_ICH)) {
807 (mac->type != e1000_ich9lan)) {
808 REG_PATTERN_TEST(E1000_FCAL, 0xFFFFFFFF, 0xFFFFFFFF); 811 REG_PATTERN_TEST(E1000_FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
809 REG_PATTERN_TEST(E1000_FCAH, 0x0000FFFF, 0xFFFFFFFF); 812 REG_PATTERN_TEST(E1000_FCAH, 0x0000FFFF, 0xFFFFFFFF);
810 REG_PATTERN_TEST(E1000_FCT, 0x0000FFFF, 0xFFFFFFFF); 813 REG_PATTERN_TEST(E1000_FCT, 0x0000FFFF, 0xFFFFFFFF);
@@ -824,15 +827,13 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
824 827
825 REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000); 828 REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000);
826 829
827 before = (((mac->type == e1000_ich8lan) || 830 before = ((adapter->flags & FLAG_IS_ICH) ? 0x06C3B33E : 0x06DFB3FE);
828 (mac->type == e1000_ich9lan)) ? 0x06C3B33E : 0x06DFB3FE);
829 REG_SET_AND_CHECK(E1000_RCTL, before, 0x003FFFFB); 831 REG_SET_AND_CHECK(E1000_RCTL, before, 0x003FFFFB);
830 REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000); 832 REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000);
831 833
832 REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF); 834 REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF);
833 REG_PATTERN_TEST(E1000_RDBAL, 0xFFFFFFF0, 0xFFFFFFFF); 835 REG_PATTERN_TEST(E1000_RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
834 if ((mac->type != e1000_ich8lan) && 836 if (!(adapter->flags & FLAG_IS_ICH))
835 (mac->type != e1000_ich9lan))
836 REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF); 837 REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF);
837 REG_PATTERN_TEST(E1000_TDBAL, 0xFFFFFFF0, 0xFFFFFFFF); 838 REG_PATTERN_TEST(E1000_TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
838 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF); 839 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);
@@ -911,9 +912,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
911 912
912 /* Test each interrupt */ 913 /* Test each interrupt */
913 for (i = 0; i < 10; i++) { 914 for (i = 0; i < 10; i++) {
914 915 if ((adapter->flags & FLAG_IS_ICH) && (i == 8))
915 if (((adapter->hw.mac.type == e1000_ich8lan) ||
916 (adapter->hw.mac.type == e1000_ich9lan)) && i == 8)
917 continue; 916 continue;
918 917
919 /* Interrupt to test */ 918 /* Interrupt to test */
@@ -1184,6 +1183,7 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1184 struct e1000_hw *hw = &adapter->hw; 1183 struct e1000_hw *hw = &adapter->hw;
1185 u32 ctrl_reg = 0; 1184 u32 ctrl_reg = 0;
1186 u32 stat_reg = 0; 1185 u32 stat_reg = 0;
1186 u16 phy_reg = 0;
1187 1187
1188 hw->mac.autoneg = 0; 1188 hw->mac.autoneg = 0;
1189 1189
@@ -1211,6 +1211,28 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1211 E1000_CTRL_SPD_100 |/* Force Speed to 100 */ 1211 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1212 E1000_CTRL_FD); /* Force Duplex to FULL */ 1212 E1000_CTRL_FD); /* Force Duplex to FULL */
1213 break; 1213 break;
1214 case e1000_phy_bm:
1215 /* Set Default MAC Interface speed to 1GB */
1216 e1e_rphy(hw, PHY_REG(2, 21), &phy_reg);
1217 phy_reg &= ~0x0007;
1218 phy_reg |= 0x006;
1219 e1e_wphy(hw, PHY_REG(2, 21), phy_reg);
1220 /* Assert SW reset for above settings to take effect */
1221 e1000e_commit_phy(hw);
1222 mdelay(1);
1223 /* Force Full Duplex */
1224 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1225 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C);
1226 /* Set Link Up (in force link) */
1227 e1e_rphy(hw, PHY_REG(776, 16), &phy_reg);
1228 e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040);
1229 /* Force Link */
1230 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1231 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x0040);
1232 /* Set Early Link Enable */
1233 e1e_rphy(hw, PHY_REG(769, 20), &phy_reg);
1234 e1e_wphy(hw, PHY_REG(769, 20), phy_reg | 0x0400);
1235 /* fall through */
1214 default: 1236 default:
1215 /* force 1000, set loopback */ 1237 /* force 1000, set loopback */
1216 e1e_wphy(hw, PHY_CONTROL, 0x4140); 1238 e1e_wphy(hw, PHY_CONTROL, 0x4140);
@@ -1224,8 +1246,7 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1224 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */ 1246 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1225 E1000_CTRL_FD); /* Force Duplex to FULL */ 1247 E1000_CTRL_FD); /* Force Duplex to FULL */
1226 1248
1227 if ((adapter->hw.mac.type == e1000_ich8lan) || 1249 if (adapter->flags & FLAG_IS_ICH)
1228 (adapter->hw.mac.type == e1000_ich9lan))
1229 ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */ 1250 ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */
1230 } 1251 }
1231 1252
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h
index a930e6d9cf02..74f263acb172 100644
--- a/drivers/net/e1000e/hw.h
+++ b/drivers/net/e1000e/hw.h
@@ -216,6 +216,21 @@ enum e1e_registers {
216#define IGP01E1000_PHY_LINK_HEALTH 0x13 /* PHY Link Health */ 216#define IGP01E1000_PHY_LINK_HEALTH 0x13 /* PHY Link Health */
217#define IGP02E1000_PHY_POWER_MGMT 0x19 /* Power Management */ 217#define IGP02E1000_PHY_POWER_MGMT 0x19 /* Power Management */
218#define IGP01E1000_PHY_PAGE_SELECT 0x1F /* Page Select */ 218#define IGP01E1000_PHY_PAGE_SELECT 0x1F /* Page Select */
219#define BM_PHY_PAGE_SELECT 22 /* Page Select for BM */
220#define IGP_PAGE_SHIFT 5
221#define PHY_REG_MASK 0x1F
222
223#define BM_WUC_PAGE 800
224#define BM_WUC_ADDRESS_OPCODE 0x11
225#define BM_WUC_DATA_OPCODE 0x12
226#define BM_WUC_ENABLE_PAGE 769
227#define BM_WUC_ENABLE_REG 17
228#define BM_WUC_ENABLE_BIT (1 << 2)
229#define BM_WUC_HOST_WU_BIT (1 << 4)
230
231#define BM_WUC PHY_REG(BM_WUC_PAGE, 1)
232#define BM_WUFC PHY_REG(BM_WUC_PAGE, 2)
233#define BM_WUS PHY_REG(BM_WUC_PAGE, 3)
219 234
220#define IGP01E1000_PHY_PCS_INIT_REG 0x00B4 235#define IGP01E1000_PHY_PCS_INIT_REG 0x00B4
221#define IGP01E1000_PHY_POLARITY_MASK 0x0078 236#define IGP01E1000_PHY_POLARITY_MASK 0x0078
@@ -331,10 +346,16 @@ enum e1e_registers {
331#define E1000_DEV_ID_ICH8_IFE_G 0x10C5 346#define E1000_DEV_ID_ICH8_IFE_G 0x10C5
332#define E1000_DEV_ID_ICH8_IGP_M 0x104D 347#define E1000_DEV_ID_ICH8_IGP_M 0x104D
333#define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD 348#define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD
349#define E1000_DEV_ID_ICH9_IGP_M_AMT 0x10F5
350#define E1000_DEV_ID_ICH9_IGP_M 0x10BF
351#define E1000_DEV_ID_ICH9_IGP_M_V 0x10CB
334#define E1000_DEV_ID_ICH9_IGP_C 0x294C 352#define E1000_DEV_ID_ICH9_IGP_C 0x294C
335#define E1000_DEV_ID_ICH9_IFE 0x10C0 353#define E1000_DEV_ID_ICH9_IFE 0x10C0
336#define E1000_DEV_ID_ICH9_IFE_GT 0x10C3 354#define E1000_DEV_ID_ICH9_IFE_GT 0x10C3
337#define E1000_DEV_ID_ICH9_IFE_G 0x10C2 355#define E1000_DEV_ID_ICH9_IFE_G 0x10C2
356#define E1000_DEV_ID_ICH10_R_BM_LM 0x10CC
357#define E1000_DEV_ID_ICH10_R_BM_LF 0x10CD
358#define E1000_DEV_ID_ICH10_R_BM_V 0x10CE
338 359
339#define E1000_FUNC_1 1 360#define E1000_FUNC_1 1
340 361
@@ -378,6 +399,7 @@ enum e1000_phy_type {
378 e1000_phy_gg82563, 399 e1000_phy_gg82563,
379 e1000_phy_igp_3, 400 e1000_phy_igp_3,
380 e1000_phy_ife, 401 e1000_phy_ife,
402 e1000_phy_bm,
381}; 403};
382 404
383enum e1000_bus_width { 405enum e1000_bus_width {
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index 768485dbb2c6..9e38452a738c 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -38,6 +38,12 @@
38 * 82566DM Gigabit Network Connection 38 * 82566DM Gigabit Network Connection
39 * 82566MC Gigabit Network Connection 39 * 82566MC Gigabit Network Connection
40 * 82566MM Gigabit Network Connection 40 * 82566MM Gigabit Network Connection
41 * 82567LM Gigabit Network Connection
42 * 82567LF Gigabit Network Connection
43 * 82567LM-2 Gigabit Network Connection
44 * 82567LF-2 Gigabit Network Connection
45 * 82567V-2 Gigabit Network Connection
46 * 82562GT-3 10/100 Network Connection
41 */ 47 */
42 48
43#include <linux/netdevice.h> 49#include <linux/netdevice.h>
@@ -198,6 +204,19 @@ static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw)
198 phy->addr = 1; 204 phy->addr = 1;
199 phy->reset_delay_us = 100; 205 phy->reset_delay_us = 100;
200 206
207 /*
208 * We may need to do this twice - once for IGP and if that fails,
209 * we'll set BM func pointers and try again
210 */
211 ret_val = e1000e_determine_phy_address(hw);
212 if (ret_val) {
213 hw->phy.ops.write_phy_reg = e1000e_write_phy_reg_bm;
214 hw->phy.ops.read_phy_reg = e1000e_read_phy_reg_bm;
215 ret_val = e1000e_determine_phy_address(hw);
216 if (ret_val)
217 return ret_val;
218 }
219
201 phy->id = 0; 220 phy->id = 0;
202 while ((e1000_phy_unknown == e1000e_get_phy_type_from_id(phy->id)) && 221 while ((e1000_phy_unknown == e1000e_get_phy_type_from_id(phy->id)) &&
203 (i++ < 100)) { 222 (i++ < 100)) {
@@ -219,6 +238,13 @@ static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw)
219 phy->type = e1000_phy_ife; 238 phy->type = e1000_phy_ife;
220 phy->autoneg_mask = E1000_ALL_NOT_GIG; 239 phy->autoneg_mask = E1000_ALL_NOT_GIG;
221 break; 240 break;
241 case BME1000_E_PHY_ID:
242 phy->type = e1000_phy_bm;
243 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
244 hw->phy.ops.read_phy_reg = e1000e_read_phy_reg_bm;
245 hw->phy.ops.write_phy_reg = e1000e_write_phy_reg_bm;
246 hw->phy.ops.commit_phy = e1000e_phy_sw_reset;
247 break;
222 default: 248 default:
223 return -E1000_ERR_PHY; 249 return -E1000_ERR_PHY;
224 break; 250 break;
@@ -664,6 +690,7 @@ static s32 e1000_get_phy_info_ich8lan(struct e1000_hw *hw)
664 return e1000_get_phy_info_ife_ich8lan(hw); 690 return e1000_get_phy_info_ife_ich8lan(hw);
665 break; 691 break;
666 case e1000_phy_igp_3: 692 case e1000_phy_igp_3:
693 case e1000_phy_bm:
667 return e1000e_get_phy_info_igp(hw); 694 return e1000e_get_phy_info_igp(hw);
668 break; 695 break;
669 default: 696 default:
@@ -728,7 +755,7 @@ static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw, bool active)
728 s32 ret_val = 0; 755 s32 ret_val = 0;
729 u16 data; 756 u16 data;
730 757
731 if (phy->type != e1000_phy_igp_3) 758 if (phy->type == e1000_phy_ife)
732 return ret_val; 759 return ret_val;
733 760
734 phy_ctrl = er32(PHY_CTRL); 761 phy_ctrl = er32(PHY_CTRL);
@@ -1918,8 +1945,35 @@ static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw)
1918 ret_val = e1000e_copper_link_setup_igp(hw); 1945 ret_val = e1000e_copper_link_setup_igp(hw);
1919 if (ret_val) 1946 if (ret_val)
1920 return ret_val; 1947 return ret_val;
1948 } else if (hw->phy.type == e1000_phy_bm) {
1949 ret_val = e1000e_copper_link_setup_m88(hw);
1950 if (ret_val)
1951 return ret_val;
1921 } 1952 }
1922 1953
1954 if (hw->phy.type == e1000_phy_ife) {
1955 ret_val = e1e_rphy(hw, IFE_PHY_MDIX_CONTROL, &reg_data);
1956 if (ret_val)
1957 return ret_val;
1958
1959 reg_data &= ~IFE_PMC_AUTO_MDIX;
1960
1961 switch (hw->phy.mdix) {
1962 case 1:
1963 reg_data &= ~IFE_PMC_FORCE_MDIX;
1964 break;
1965 case 2:
1966 reg_data |= IFE_PMC_FORCE_MDIX;
1967 break;
1968 case 0:
1969 default:
1970 reg_data |= IFE_PMC_AUTO_MDIX;
1971 break;
1972 }
1973 ret_val = e1e_wphy(hw, IFE_PHY_MDIX_CONTROL, reg_data);
1974 if (ret_val)
1975 return ret_val;
1976 }
1923 return e1000e_setup_copper_link(hw); 1977 return e1000e_setup_copper_link(hw);
1924} 1978}
1925 1979
@@ -2127,6 +2181,31 @@ void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw)
2127} 2181}
2128 2182
2129/** 2183/**
2184 * e1000e_disable_gig_wol_ich8lan - disable gig during WoL
2185 * @hw: pointer to the HW structure
2186 *
2187 * During S0 to Sx transition, it is possible the link remains at gig
2188 * instead of negotiating to a lower speed. Before going to Sx, set
2189 * 'LPLU Enabled' and 'Gig Disable' to force link speed negotiation
2190 * to a lower speed.
2191 *
2192 * Should only be called for ICH9 devices.
2193 **/
2194void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw)
2195{
2196 u32 phy_ctrl;
2197
2198 if (hw->mac.type == e1000_ich9lan) {
2199 phy_ctrl = er32(PHY_CTRL);
2200 phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU |
2201 E1000_PHY_CTRL_GBE_DISABLE;
2202 ew32(PHY_CTRL, phy_ctrl);
2203 }
2204
2205 return;
2206}
2207
2208/**
2130 * e1000_cleanup_led_ich8lan - Restore the default LED operation 2209 * e1000_cleanup_led_ich8lan - Restore the default LED operation
2131 * @hw: pointer to the HW structure 2210 * @hw: pointer to the HW structure
2132 * 2211 *
@@ -2247,6 +2326,7 @@ static struct e1000_nvm_operations ich8_nvm_ops = {
2247struct e1000_info e1000_ich8_info = { 2326struct e1000_info e1000_ich8_info = {
2248 .mac = e1000_ich8lan, 2327 .mac = e1000_ich8lan,
2249 .flags = FLAG_HAS_WOL 2328 .flags = FLAG_HAS_WOL
2329 | FLAG_IS_ICH
2250 | FLAG_RX_CSUM_ENABLED 2330 | FLAG_RX_CSUM_ENABLED
2251 | FLAG_HAS_CTRLEXT_ON_LOAD 2331 | FLAG_HAS_CTRLEXT_ON_LOAD
2252 | FLAG_HAS_AMT 2332 | FLAG_HAS_AMT
@@ -2262,6 +2342,7 @@ struct e1000_info e1000_ich8_info = {
2262struct e1000_info e1000_ich9_info = { 2342struct e1000_info e1000_ich9_info = {
2263 .mac = e1000_ich9lan, 2343 .mac = e1000_ich9lan,
2264 .flags = FLAG_HAS_JUMBO_FRAMES 2344 .flags = FLAG_HAS_JUMBO_FRAMES
2345 | FLAG_IS_ICH
2265 | FLAG_HAS_WOL 2346 | FLAG_HAS_WOL
2266 | FLAG_RX_CSUM_ENABLED 2347 | FLAG_RX_CSUM_ENABLED
2267 | FLAG_HAS_CTRLEXT_ON_LOAD 2348 | FLAG_HAS_CTRLEXT_ON_LOAD
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index 8991ab8911e2..8cbb40f3a506 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -43,10 +43,11 @@
43#include <linux/if_vlan.h> 43#include <linux/if_vlan.h>
44#include <linux/cpu.h> 44#include <linux/cpu.h>
45#include <linux/smp.h> 45#include <linux/smp.h>
46#include <linux/pm_qos_params.h>
46 47
47#include "e1000.h" 48#include "e1000.h"
48 49
49#define DRV_VERSION "0.2.1" 50#define DRV_VERSION "0.3.3.3-k2"
50char e1000e_driver_name[] = "e1000e"; 51char e1000e_driver_name[] = "e1000e";
51const char e1000e_driver_version[] = DRV_VERSION; 52const char e1000e_driver_version[] = DRV_VERSION;
52 53
@@ -341,6 +342,89 @@ no_buffers:
341} 342}
342 343
343/** 344/**
345 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
346 * @adapter: address of board private structure
347 * @rx_ring: pointer to receive ring structure
348 * @cleaned_count: number of buffers to allocate this pass
349 **/
350
351static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
352 int cleaned_count)
353{
354 struct net_device *netdev = adapter->netdev;
355 struct pci_dev *pdev = adapter->pdev;
356 struct e1000_rx_desc *rx_desc;
357 struct e1000_ring *rx_ring = adapter->rx_ring;
358 struct e1000_buffer *buffer_info;
359 struct sk_buff *skb;
360 unsigned int i;
361 unsigned int bufsz = 256 -
362 16 /* for skb_reserve */ -
363 NET_IP_ALIGN;
364
365 i = rx_ring->next_to_use;
366 buffer_info = &rx_ring->buffer_info[i];
367
368 while (cleaned_count--) {
369 skb = buffer_info->skb;
370 if (skb) {
371 skb_trim(skb, 0);
372 goto check_page;
373 }
374
375 skb = netdev_alloc_skb(netdev, bufsz);
376 if (unlikely(!skb)) {
377 /* Better luck next round */
378 adapter->alloc_rx_buff_failed++;
379 break;
380 }
381
382 /* Make buffer alignment 2 beyond a 16 byte boundary
383 * this will result in a 16 byte aligned IP header after
384 * the 14 byte MAC header is removed
385 */
386 skb_reserve(skb, NET_IP_ALIGN);
387
388 buffer_info->skb = skb;
389check_page:
390 /* allocate a new page if necessary */
391 if (!buffer_info->page) {
392 buffer_info->page = alloc_page(GFP_ATOMIC);
393 if (unlikely(!buffer_info->page)) {
394 adapter->alloc_rx_buff_failed++;
395 break;
396 }
397 }
398
399 if (!buffer_info->dma)
400 buffer_info->dma = pci_map_page(pdev,
401 buffer_info->page, 0,
402 PAGE_SIZE,
403 PCI_DMA_FROMDEVICE);
404
405 rx_desc = E1000_RX_DESC(*rx_ring, i);
406 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
407
408 if (unlikely(++i == rx_ring->count))
409 i = 0;
410 buffer_info = &rx_ring->buffer_info[i];
411 }
412
413 if (likely(rx_ring->next_to_use != i)) {
414 rx_ring->next_to_use = i;
415 if (unlikely(i-- == 0))
416 i = (rx_ring->count - 1);
417
418 /* Force memory writes to complete before letting h/w
419 * know there are new descriptors to fetch. (Only
420 * applicable for weak-ordered memory model archs,
421 * such as IA-64). */
422 wmb();
423 writel(i, adapter->hw.hw_addr + rx_ring->tail);
424 }
425}
426
427/**
344 * e1000_clean_rx_irq - Send received data up the network stack; legacy 428 * e1000_clean_rx_irq - Send received data up the network stack; legacy
345 * @adapter: board private structure 429 * @adapter: board private structure
346 * 430 *
@@ -783,6 +867,186 @@ next_desc:
783} 867}
784 868
785/** 869/**
870 * e1000_consume_page - helper function
871 **/
872static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
873 u16 length)
874{
875 bi->page = NULL;
876 skb->len += length;
877 skb->data_len += length;
878 skb->truesize += length;
879}
880
881/**
882 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
883 * @adapter: board private structure
884 *
885 * the return value indicates whether actual cleaning was done, there
886 * is no guarantee that everything was cleaned
887 **/
888
889static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
890 int *work_done, int work_to_do)
891{
892 struct net_device *netdev = adapter->netdev;
893 struct pci_dev *pdev = adapter->pdev;
894 struct e1000_ring *rx_ring = adapter->rx_ring;
895 struct e1000_rx_desc *rx_desc, *next_rxd;
896 struct e1000_buffer *buffer_info, *next_buffer;
897 u32 length;
898 unsigned int i;
899 int cleaned_count = 0;
900 bool cleaned = false;
901 unsigned int total_rx_bytes=0, total_rx_packets=0;
902
903 i = rx_ring->next_to_clean;
904 rx_desc = E1000_RX_DESC(*rx_ring, i);
905 buffer_info = &rx_ring->buffer_info[i];
906
907 while (rx_desc->status & E1000_RXD_STAT_DD) {
908 struct sk_buff *skb;
909 u8 status;
910
911 if (*work_done >= work_to_do)
912 break;
913 (*work_done)++;
914
915 status = rx_desc->status;
916 skb = buffer_info->skb;
917 buffer_info->skb = NULL;
918
919 ++i;
920 if (i == rx_ring->count)
921 i = 0;
922 next_rxd = E1000_RX_DESC(*rx_ring, i);
923 prefetch(next_rxd);
924
925 next_buffer = &rx_ring->buffer_info[i];
926
927 cleaned = true;
928 cleaned_count++;
929 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
930 PCI_DMA_FROMDEVICE);
931 buffer_info->dma = 0;
932
933 length = le16_to_cpu(rx_desc->length);
934
935 /* errors is only valid for DD + EOP descriptors */
936 if (unlikely((status & E1000_RXD_STAT_EOP) &&
937 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
938 /* recycle both page and skb */
939 buffer_info->skb = skb;
940 /* an error means any chain goes out the window
941 * too */
942 if (rx_ring->rx_skb_top)
943 dev_kfree_skb(rx_ring->rx_skb_top);
944 rx_ring->rx_skb_top = NULL;
945 goto next_desc;
946 }
947
948#define rxtop rx_ring->rx_skb_top
949 if (!(status & E1000_RXD_STAT_EOP)) {
950 /* this descriptor is only the beginning (or middle) */
951 if (!rxtop) {
952 /* this is the beginning of a chain */
953 rxtop = skb;
954 skb_fill_page_desc(rxtop, 0, buffer_info->page,
955 0, length);
956 } else {
957 /* this is the middle of a chain */
958 skb_fill_page_desc(rxtop,
959 skb_shinfo(rxtop)->nr_frags,
960 buffer_info->page, 0, length);
961 /* re-use the skb, only consumed the page */
962 buffer_info->skb = skb;
963 }
964 e1000_consume_page(buffer_info, rxtop, length);
965 goto next_desc;
966 } else {
967 if (rxtop) {
968 /* end of the chain */
969 skb_fill_page_desc(rxtop,
970 skb_shinfo(rxtop)->nr_frags,
971 buffer_info->page, 0, length);
972 /* re-use the current skb, we only consumed the
973 * page */
974 buffer_info->skb = skb;
975 skb = rxtop;
976 rxtop = NULL;
977 e1000_consume_page(buffer_info, skb, length);
978 } else {
979 /* no chain, got EOP, this buf is the packet
980 * copybreak to save the put_page/alloc_page */
981 if (length <= copybreak &&
982 skb_tailroom(skb) >= length) {
983 u8 *vaddr;
984 vaddr = kmap_atomic(buffer_info->page,
985 KM_SKB_DATA_SOFTIRQ);
986 memcpy(skb_tail_pointer(skb), vaddr,
987 length);
988 kunmap_atomic(vaddr,
989 KM_SKB_DATA_SOFTIRQ);
990 /* re-use the page, so don't erase
991 * buffer_info->page */
992 skb_put(skb, length);
993 } else {
994 skb_fill_page_desc(skb, 0,
995 buffer_info->page, 0,
996 length);
997 e1000_consume_page(buffer_info, skb,
998 length);
999 }
1000 }
1001 }
1002
1003 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1004 e1000_rx_checksum(adapter,
1005 (u32)(status) |
1006 ((u32)(rx_desc->errors) << 24),
1007 le16_to_cpu(rx_desc->csum), skb);
1008
1009 /* probably a little skewed due to removing CRC */
1010 total_rx_bytes += skb->len;
1011 total_rx_packets++;
1012
1013 /* eth type trans needs skb->data to point to something */
1014 if (!pskb_may_pull(skb, ETH_HLEN)) {
1015 ndev_err(netdev, "pskb_may_pull failed.\n");
1016 dev_kfree_skb(skb);
1017 goto next_desc;
1018 }
1019
1020 e1000_receive_skb(adapter, netdev, skb, status,
1021 rx_desc->special);
1022
1023next_desc:
1024 rx_desc->status = 0;
1025
1026 /* return some buffers to hardware, one at a time is too slow */
1027 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1028 adapter->alloc_rx_buf(adapter, cleaned_count);
1029 cleaned_count = 0;
1030 }
1031
1032 /* use prefetched values */
1033 rx_desc = next_rxd;
1034 buffer_info = next_buffer;
1035 }
1036 rx_ring->next_to_clean = i;
1037
1038 cleaned_count = e1000_desc_unused(rx_ring);
1039 if (cleaned_count)
1040 adapter->alloc_rx_buf(adapter, cleaned_count);
1041
1042 adapter->total_rx_bytes += total_rx_bytes;
1043 adapter->total_rx_packets += total_rx_packets;
1044 adapter->net_stats.rx_bytes += total_rx_bytes;
1045 adapter->net_stats.rx_packets += total_rx_packets;
1046 return cleaned;
1047}
1048
1049/**
786 * e1000_clean_rx_ring - Free Rx Buffers per Queue 1050 * e1000_clean_rx_ring - Free Rx Buffers per Queue
787 * @adapter: board private structure 1051 * @adapter: board private structure
788 **/ 1052 **/
@@ -802,6 +1066,10 @@ static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
802 pci_unmap_single(pdev, buffer_info->dma, 1066 pci_unmap_single(pdev, buffer_info->dma,
803 adapter->rx_buffer_len, 1067 adapter->rx_buffer_len,
804 PCI_DMA_FROMDEVICE); 1068 PCI_DMA_FROMDEVICE);
1069 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1070 pci_unmap_page(pdev, buffer_info->dma,
1071 PAGE_SIZE,
1072 PCI_DMA_FROMDEVICE);
805 else if (adapter->clean_rx == e1000_clean_rx_irq_ps) 1073 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
806 pci_unmap_single(pdev, buffer_info->dma, 1074 pci_unmap_single(pdev, buffer_info->dma,
807 adapter->rx_ps_bsize0, 1075 adapter->rx_ps_bsize0,
@@ -809,6 +1077,11 @@ static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
809 buffer_info->dma = 0; 1077 buffer_info->dma = 0;
810 } 1078 }
811 1079
1080 if (buffer_info->page) {
1081 put_page(buffer_info->page);
1082 buffer_info->page = NULL;
1083 }
1084
812 if (buffer_info->skb) { 1085 if (buffer_info->skb) {
813 dev_kfree_skb(buffer_info->skb); 1086 dev_kfree_skb(buffer_info->skb);
814 buffer_info->skb = NULL; 1087 buffer_info->skb = NULL;
@@ -1755,10 +2028,12 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)
1755 * a lot of memory, since we allocate 3 pages at all times 2028 * a lot of memory, since we allocate 3 pages at all times
1756 * per packet. 2029 * per packet.
1757 */ 2030 */
1758 adapter->rx_ps_pages = 0;
1759 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 2031 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1760 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) 2032 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2033 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
1761 adapter->rx_ps_pages = pages; 2034 adapter->rx_ps_pages = pages;
2035 else
2036 adapter->rx_ps_pages = 0;
1762 2037
1763 if (adapter->rx_ps_pages) { 2038 if (adapter->rx_ps_pages) {
1764 /* Configure extra packet-split registers */ 2039 /* Configure extra packet-split registers */
@@ -1819,9 +2094,12 @@ static void e1000_configure_rx(struct e1000_adapter *adapter)
1819 sizeof(union e1000_rx_desc_packet_split); 2094 sizeof(union e1000_rx_desc_packet_split);
1820 adapter->clean_rx = e1000_clean_rx_irq_ps; 2095 adapter->clean_rx = e1000_clean_rx_irq_ps;
1821 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 2096 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2097 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2098 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2099 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2100 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1822 } else { 2101 } else {
1823 rdlen = rx_ring->count * 2102 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
1824 sizeof(struct e1000_rx_desc);
1825 adapter->clean_rx = e1000_clean_rx_irq; 2103 adapter->clean_rx = e1000_clean_rx_irq;
1826 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 2104 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1827 } 2105 }
@@ -1885,8 +2163,21 @@ static void e1000_configure_rx(struct e1000_adapter *adapter)
1885 * units), e.g. using jumbo frames when setting to E1000_ERT_2048 2163 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
1886 */ 2164 */
1887 if ((adapter->flags & FLAG_HAS_ERT) && 2165 if ((adapter->flags & FLAG_HAS_ERT) &&
1888 (adapter->netdev->mtu > ETH_DATA_LEN)) 2166 (adapter->netdev->mtu > ETH_DATA_LEN)) {
1889 ew32(ERT, E1000_ERT_2048); 2167 u32 rxdctl = er32(RXDCTL(0));
2168 ew32(RXDCTL(0), rxdctl | 0x3);
2169 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2170 /*
2171 * With jumbo frames and early-receive enabled, excessive
2172 * C4->C2 latencies result in dropped transactions.
2173 */
2174 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2175 e1000e_driver_name, 55);
2176 } else {
2177 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2178 e1000e_driver_name,
2179 PM_QOS_DEFAULT_VALUE);
2180 }
1890 2181
1891 /* Enable Receives */ 2182 /* Enable Receives */
1892 ew32(RCTL, rctl); 2183 ew32(RCTL, rctl);
@@ -2155,6 +2446,14 @@ void e1000e_reset(struct e1000_adapter *adapter)
2155 2446
2156 /* Allow time for pending master requests to run */ 2447 /* Allow time for pending master requests to run */
2157 mac->ops.reset_hw(hw); 2448 mac->ops.reset_hw(hw);
2449
2450 /*
2451 * For parts with AMT enabled, let the firmware know
2452 * that the network interface is in control
2453 */
2454 if ((adapter->flags & FLAG_HAS_AMT) && e1000e_check_mng_mode(hw))
2455 e1000_get_hw_control(adapter);
2456
2158 ew32(WUC, 0); 2457 ew32(WUC, 0);
2159 2458
2160 if (mac->ops.init_hw(hw)) 2459 if (mac->ops.init_hw(hw))
@@ -3469,6 +3768,8 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
3469 * means we reserve 2 more, this pushes us to allocate from the next 3768 * means we reserve 2 more, this pushes us to allocate from the next
3470 * larger slab size. 3769 * larger slab size.
3471 * i.e. RXBUFFER_2048 --> size-4096 slab 3770 * i.e. RXBUFFER_2048 --> size-4096 slab
3771 * However with the new *_jumbo_rx* routines, jumbo receives will use
3772 * fragmented skbs
3472 */ 3773 */
3473 3774
3474 if (max_frame <= 256) 3775 if (max_frame <= 256)
@@ -3626,6 +3927,9 @@ static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
3626 ew32(CTRL_EXT, ctrl_ext); 3927 ew32(CTRL_EXT, ctrl_ext);
3627 } 3928 }
3628 3929
3930 if (adapter->flags & FLAG_IS_ICH)
3931 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
3932
3629 /* Allow time for pending master requests to run */ 3933 /* Allow time for pending master requests to run */
3630 e1000e_disable_pcie_master(&adapter->hw); 3934 e1000e_disable_pcie_master(&adapter->hw);
3631 3935
@@ -4292,6 +4596,13 @@ static struct pci_device_id e1000_pci_tbl[] = {
4292 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 4596 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
4293 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 4597 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
4294 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 4598 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
4599 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
4600 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
4601 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
4602
4603 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
4604 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
4605 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
4295 4606
4296 { } /* terminate list */ 4607 { } /* terminate list */
4297}; 4608};
@@ -4326,7 +4637,9 @@ static int __init e1000_init_module(void)
4326 printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n", 4637 printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n",
4327 e1000e_driver_name); 4638 e1000e_driver_name);
4328 ret = pci_register_driver(&e1000_driver); 4639 ret = pci_register_driver(&e1000_driver);
4329 4640 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name,
4641 PM_QOS_DEFAULT_VALUE);
4642
4330 return ret; 4643 return ret;
4331} 4644}
4332module_init(e1000_init_module); 4645module_init(e1000_init_module);
@@ -4340,6 +4653,7 @@ module_init(e1000_init_module);
4340static void __exit e1000_exit_module(void) 4653static void __exit e1000_exit_module(void)
4341{ 4654{
4342 pci_unregister_driver(&e1000_driver); 4655 pci_unregister_driver(&e1000_driver);
4656 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name);
4343} 4657}
4344module_exit(e1000_exit_module); 4658module_exit(e1000_exit_module);
4345 4659
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c
index e102332a6bee..b133dcf0e950 100644
--- a/drivers/net/e1000e/phy.c
+++ b/drivers/net/e1000e/phy.c
@@ -34,6 +34,9 @@ static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw);
34static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw); 34static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw);
35static s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active); 35static s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active);
36static s32 e1000_wait_autoneg(struct e1000_hw *hw); 36static s32 e1000_wait_autoneg(struct e1000_hw *hw);
37static u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg);
38static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
39 u16 *data, bool read);
37 40
38/* Cable length tables */ 41/* Cable length tables */
39static const u16 e1000_m88_cable_length_table[] = 42static const u16 e1000_m88_cable_length_table[] =
@@ -465,6 +468,10 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw)
465 if (phy->disable_polarity_correction == 1) 468 if (phy->disable_polarity_correction == 1)
466 phy_data |= M88E1000_PSCR_POLARITY_REVERSAL; 469 phy_data |= M88E1000_PSCR_POLARITY_REVERSAL;
467 470
471 /* Enable downshift on BM (disabled by default) */
472 if (phy->type == e1000_phy_bm)
473 phy_data |= BME1000_PSCR_ENABLE_DOWNSHIFT;
474
468 ret_val = e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, phy_data); 475 ret_val = e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
469 if (ret_val) 476 if (ret_val)
470 return ret_val; 477 return ret_val;
@@ -1776,6 +1783,10 @@ enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id)
1776 case IFE_C_E_PHY_ID: 1783 case IFE_C_E_PHY_ID:
1777 phy_type = e1000_phy_ife; 1784 phy_type = e1000_phy_ife;
1778 break; 1785 break;
1786 case BME1000_E_PHY_ID:
1787 case BME1000_E_PHY_ID_R2:
1788 phy_type = e1000_phy_bm;
1789 break;
1779 default: 1790 default:
1780 phy_type = e1000_phy_unknown; 1791 phy_type = e1000_phy_unknown;
1781 break; 1792 break;
@@ -1784,6 +1795,273 @@ enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id)
1784} 1795}
1785 1796
1786/** 1797/**
1798 * e1000e_determine_phy_address - Determines PHY address.
1799 * @hw: pointer to the HW structure
1800 *
1801 * This uses a trial and error method to loop through possible PHY
1802 * addresses. It tests each by reading the PHY ID registers and
1803 * checking for a match.
1804 **/
1805s32 e1000e_determine_phy_address(struct e1000_hw *hw)
1806{
1807 s32 ret_val = -E1000_ERR_PHY_TYPE;
1808 u32 phy_addr= 0;
1809 u32 i = 0;
1810 enum e1000_phy_type phy_type = e1000_phy_unknown;
1811
1812 do {
1813 for (phy_addr = 0; phy_addr < 4; phy_addr++) {
1814 hw->phy.addr = phy_addr;
1815 e1000e_get_phy_id(hw);
1816 phy_type = e1000e_get_phy_type_from_id(hw->phy.id);
1817
1818 /*
1819 * If phy_type is valid, break - we found our
1820 * PHY address
1821 */
1822 if (phy_type != e1000_phy_unknown) {
1823 ret_val = 0;
1824 break;
1825 }
1826 }
1827 i++;
1828 } while ((ret_val != 0) && (i < 100));
1829
1830 return ret_val;
1831}
1832
1833/**
1834 * e1000_get_phy_addr_for_bm_page - Retrieve PHY page address
1835 * @page: page to access
1836 *
1837 * Returns the phy address for the page requested.
1838 **/
1839static u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg)
1840{
1841 u32 phy_addr = 2;
1842
1843 if ((page >= 768) || (page == 0 && reg == 25) || (reg == 31))
1844 phy_addr = 1;
1845
1846 return phy_addr;
1847}
1848
1849/**
1850 * e1000e_write_phy_reg_bm - Write BM PHY register
1851 * @hw: pointer to the HW structure
1852 * @offset: register offset to write to
1853 * @data: data to write at register offset
1854 *
1855 * Acquires semaphore, if necessary, then writes the data to PHY register
1856 * at the offset. Release any acquired semaphores before exiting.
1857 **/
1858s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data)
1859{
1860 s32 ret_val;
1861 u32 page_select = 0;
1862 u32 page = offset >> IGP_PAGE_SHIFT;
1863 u32 page_shift = 0;
1864
1865 /* Page 800 works differently than the rest so it has its own func */
1866 if (page == BM_WUC_PAGE) {
1867 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
1868 false);
1869 goto out;
1870 }
1871
1872 ret_val = hw->phy.ops.acquire_phy(hw);
1873 if (ret_val)
1874 goto out;
1875
1876 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset);
1877
1878 if (offset > MAX_PHY_MULTI_PAGE_REG) {
1879 /*
1880 * Page select is register 31 for phy address 1 and 22 for
1881 * phy address 2 and 3. Page select is shifted only for
1882 * phy address 1.
1883 */
1884 if (hw->phy.addr == 1) {
1885 page_shift = IGP_PAGE_SHIFT;
1886 page_select = IGP01E1000_PHY_PAGE_SELECT;
1887 } else {
1888 page_shift = 0;
1889 page_select = BM_PHY_PAGE_SELECT;
1890 }
1891
1892 /* Page is shifted left, PHY expects (page x 32) */
1893 ret_val = e1000e_write_phy_reg_mdic(hw, page_select,
1894 (page << page_shift));
1895 if (ret_val) {
1896 hw->phy.ops.release_phy(hw);
1897 goto out;
1898 }
1899 }
1900
1901 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
1902 data);
1903
1904 hw->phy.ops.release_phy(hw);
1905
1906out:
1907 return ret_val;
1908}
1909
1910/**
1911 * e1000e_read_phy_reg_bm - Read BM PHY register
1912 * @hw: pointer to the HW structure
1913 * @offset: register offset to be read
1914 * @data: pointer to the read data
1915 *
1916 * Acquires semaphore, if necessary, then reads the PHY register at offset
1917 * and storing the retrieved information in data. Release any acquired
1918 * semaphores before exiting.
1919 **/
1920s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data)
1921{
1922 s32 ret_val;
1923 u32 page_select = 0;
1924 u32 page = offset >> IGP_PAGE_SHIFT;
1925 u32 page_shift = 0;
1926
1927 /* Page 800 works differently than the rest so it has its own func */
1928 if (page == BM_WUC_PAGE) {
1929 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
1930 true);
1931 goto out;
1932 }
1933
1934 ret_val = hw->phy.ops.acquire_phy(hw);
1935 if (ret_val)
1936 goto out;
1937
1938 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset);
1939
1940 if (offset > MAX_PHY_MULTI_PAGE_REG) {
1941 /*
1942 * Page select is register 31 for phy address 1 and 22 for
1943 * phy address 2 and 3. Page select is shifted only for
1944 * phy address 1.
1945 */
1946 if (hw->phy.addr == 1) {
1947 page_shift = IGP_PAGE_SHIFT;
1948 page_select = IGP01E1000_PHY_PAGE_SELECT;
1949 } else {
1950 page_shift = 0;
1951 page_select = BM_PHY_PAGE_SELECT;
1952 }
1953
1954 /* Page is shifted left, PHY expects (page x 32) */
1955 ret_val = e1000e_write_phy_reg_mdic(hw, page_select,
1956 (page << page_shift));
1957 if (ret_val) {
1958 hw->phy.ops.release_phy(hw);
1959 goto out;
1960 }
1961 }
1962
1963 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
1964 data);
1965 hw->phy.ops.release_phy(hw);
1966
1967out:
1968 return ret_val;
1969}
1970
1971/**
1972 * e1000_access_phy_wakeup_reg_bm - Read BM PHY wakeup register
1973 * @hw: pointer to the HW structure
1974 * @offset: register offset to be read or written
1975 * @data: pointer to the data to read or write
1976 * @read: determines if operation is read or write
1977 *
1978 * Acquires semaphore, if necessary, then reads the PHY register at offset
1979 * and storing the retrieved information in data. Release any acquired
1980 * semaphores before exiting. Note that procedure to read the wakeup
1981 * registers are different. It works as such:
1982 * 1) Set page 769, register 17, bit 2 = 1
1983 * 2) Set page to 800 for host (801 if we were manageability)
1984 * 3) Write the address using the address opcode (0x11)
1985 * 4) Read or write the data using the data opcode (0x12)
1986 * 5) Restore 769_17.2 to its original value
1987 **/
1988static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
1989 u16 *data, bool read)
1990{
1991 s32 ret_val;
1992 u16 reg = ((u16)offset) & PHY_REG_MASK;
1993 u16 phy_reg = 0;
1994 u8 phy_acquired = 1;
1995
1996
1997 ret_val = hw->phy.ops.acquire_phy(hw);
1998 if (ret_val) {
1999 phy_acquired = 0;
2000 goto out;
2001 }
2002
2003 /* All operations in this function are phy address 1 */
2004 hw->phy.addr = 1;
2005
2006 /* Set page 769 */
2007 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
2008 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
2009
2010 ret_val = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
2011 if (ret_val)
2012 goto out;
2013
2014 /* First clear bit 4 to avoid a power state change */
2015 phy_reg &= ~(BM_WUC_HOST_WU_BIT);
2016 ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
2017 if (ret_val)
2018 goto out;
2019
2020 /* Write bit 2 = 1, and clear bit 4 to 769_17 */
2021 ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG,
2022 phy_reg | BM_WUC_ENABLE_BIT);
2023 if (ret_val)
2024 goto out;
2025
2026 /* Select page 800 */
2027 ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
2028 (BM_WUC_PAGE << IGP_PAGE_SHIFT));
2029
2030 /* Write the page 800 offset value using opcode 0x11 */
2031 ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ADDRESS_OPCODE, reg);
2032 if (ret_val)
2033 goto out;
2034
2035 if (read) {
2036 /* Read the page 800 value using opcode 0x12 */
2037 ret_val = e1000e_read_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,
2038 data);
2039 } else {
2040 /* Read the page 800 value using opcode 0x12 */
2041 ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,
2042 *data);
2043 }
2044
2045 if (ret_val)
2046 goto out;
2047
2048 /*
2049 * Restore 769_17.2 to its original value
2050 * Set page 769
2051 */
2052 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
2053 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
2054
2055 /* Clear 769_17.2 */
2056 ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
2057
2058out:
2059 if (phy_acquired == 1)
2060 hw->phy.ops.release_phy(hw);
2061 return ret_val;
2062}
2063
2064/**
1787 * e1000e_commit_phy - Soft PHY reset 2065 * e1000e_commit_phy - Soft PHY reset
1788 * @hw: pointer to the HW structure 2066 * @hw: pointer to the HW structure
1789 * 2067 *
diff --git a/drivers/net/eexpress.c b/drivers/net/eexpress.c
index 2eb82aba4a8b..795c594a4b7c 100644
--- a/drivers/net/eexpress.c
+++ b/drivers/net/eexpress.c
@@ -202,7 +202,7 @@ static unsigned short start_code[] = {
202 0x0000,Cmd_MCast, 202 0x0000,Cmd_MCast,
203 0x0076, /* link to next command */ 203 0x0076, /* link to next command */
204#define CONF_NR_MULTICAST 0x44 204#define CONF_NR_MULTICAST 0x44
205 0x0000, /* number of multicast addresses */ 205 0x0000, /* number of bytes in multicast address(es) */
206#define CONF_MULTICAST 0x46 206#define CONF_MULTICAST 0x46
207 0x0000, 0x0000, 0x0000, /* some addresses */ 207 0x0000, 0x0000, 0x0000, /* some addresses */
208 0x0000, 0x0000, 0x0000, 208 0x0000, 0x0000, 0x0000,
@@ -1569,7 +1569,7 @@ static void eexp_hw_init586(struct net_device *dev)
1569 1569
1570static void eexp_setup_filter(struct net_device *dev) 1570static void eexp_setup_filter(struct net_device *dev)
1571{ 1571{
1572 struct dev_mc_list *dmi = dev->mc_list; 1572 struct dev_mc_list *dmi;
1573 unsigned short ioaddr = dev->base_addr; 1573 unsigned short ioaddr = dev->base_addr;
1574 int count = dev->mc_count; 1574 int count = dev->mc_count;
1575 int i; 1575 int i;
@@ -1580,9 +1580,9 @@ static void eexp_setup_filter(struct net_device *dev)
1580 } 1580 }
1581 1581
1582 outw(CONF_NR_MULTICAST & ~31, ioaddr+SM_PTR); 1582 outw(CONF_NR_MULTICAST & ~31, ioaddr+SM_PTR);
1583 outw(count, ioaddr+SHADOW(CONF_NR_MULTICAST)); 1583 outw(6*count, ioaddr+SHADOW(CONF_NR_MULTICAST));
1584 for (i = 0; i < count; i++) { 1584 for (i = 0, dmi = dev->mc_list; i < count; i++, dmi = dmi->next) {
1585 unsigned short *data = (unsigned short *)dmi->dmi_addr; 1585 unsigned short *data;
1586 if (!dmi) { 1586 if (!dmi) {
1587 printk(KERN_INFO "%s: too few multicast addresses\n", dev->name); 1587 printk(KERN_INFO "%s: too few multicast addresses\n", dev->name);
1588 break; 1588 break;
@@ -1591,6 +1591,7 @@ static void eexp_setup_filter(struct net_device *dev)
1591 printk(KERN_INFO "%s: invalid multicast address length given.\n", dev->name); 1591 printk(KERN_INFO "%s: invalid multicast address length given.\n", dev->name);
1592 continue; 1592 continue;
1593 } 1593 }
1594 data = (unsigned short *)dmi->dmi_addr;
1594 outw((CONF_MULTICAST+(6*i)) & ~31, ioaddr+SM_PTR); 1595 outw((CONF_MULTICAST+(6*i)) & ~31, ioaddr+SM_PTR);
1595 outw(data[0], ioaddr+SHADOW(CONF_MULTICAST+(6*i))); 1596 outw(data[0], ioaddr+SHADOW(CONF_MULTICAST+(6*i)));
1596 outw((CONF_MULTICAST+(6*i)+2) & ~31, ioaddr+SM_PTR); 1597 outw((CONF_MULTICAST+(6*i)+2) & ~31, ioaddr+SM_PTR);
diff --git a/drivers/net/fs_enet/mii-fec.c b/drivers/net/fs_enet/mii-fec.c
index ba75efc9f5b5..f0014cfbb275 100644
--- a/drivers/net/fs_enet/mii-fec.c
+++ b/drivers/net/fs_enet/mii-fec.c
@@ -194,7 +194,7 @@ static int __devinit fs_enet_mdio_probe(struct of_device *ofdev,
194 194
195 ret = of_address_to_resource(ofdev->node, 0, &res); 195 ret = of_address_to_resource(ofdev->node, 0, &res);
196 if (ret) 196 if (ret)
197 return ret; 197 goto out_res;
198 198
199 snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start); 199 snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start);
200 200
@@ -236,6 +236,7 @@ out_free_irqs:
236 kfree(new_bus->irq); 236 kfree(new_bus->irq);
237out_unmap_regs: 237out_unmap_regs:
238 iounmap(fec->fecp); 238 iounmap(fec->fecp);
239out_res:
239out_fec: 240out_fec:
240 kfree(fec); 241 kfree(fec);
241out_mii: 242out_mii:
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 587afe7be689..6f22f068d6ee 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -138,6 +138,7 @@ static int gfar_poll(struct napi_struct *napi, int budget);
138static void gfar_netpoll(struct net_device *dev); 138static void gfar_netpoll(struct net_device *dev);
139#endif 139#endif
140int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit); 140int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit);
141static int gfar_clean_tx_ring(struct net_device *dev);
141static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb, int length); 142static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb, int length);
142static void gfar_vlan_rx_register(struct net_device *netdev, 143static void gfar_vlan_rx_register(struct net_device *netdev,
143 struct vlan_group *grp); 144 struct vlan_group *grp);
@@ -1141,7 +1142,7 @@ static int gfar_close(struct net_device *dev)
1141} 1142}
1142 1143
1143/* Changes the mac address if the controller is not running. */ 1144/* Changes the mac address if the controller is not running. */
1144int gfar_set_mac_address(struct net_device *dev) 1145static int gfar_set_mac_address(struct net_device *dev)
1145{ 1146{
1146 gfar_set_mac_for_addr(dev, 0, dev->dev_addr); 1147 gfar_set_mac_for_addr(dev, 0, dev->dev_addr);
1147 1148
@@ -1260,7 +1261,7 @@ static void gfar_timeout(struct net_device *dev)
1260} 1261}
1261 1262
1262/* Interrupt Handler for Transmit complete */ 1263/* Interrupt Handler for Transmit complete */
1263int gfar_clean_tx_ring(struct net_device *dev) 1264static int gfar_clean_tx_ring(struct net_device *dev)
1264{ 1265{
1265 struct txbd8 *bdp; 1266 struct txbd8 *bdp;
1266 struct gfar_private *priv = netdev_priv(dev); 1267 struct gfar_private *priv = netdev_priv(dev);
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
index fd487be3993e..27f37c81e52c 100644
--- a/drivers/net/gianfar.h
+++ b/drivers/net/gianfar.h
@@ -782,5 +782,8 @@ extern void gfar_halt(struct net_device *dev);
782extern void gfar_phy_test(struct mii_bus *bus, struct phy_device *phydev, 782extern void gfar_phy_test(struct mii_bus *bus, struct phy_device *phydev,
783 int enable, u32 regnum, u32 read); 783 int enable, u32 regnum, u32 read);
784void gfar_init_sysfs(struct net_device *dev); 784void gfar_init_sysfs(struct net_device *dev);
785int gfar_local_mdio_write(struct gfar_mii __iomem *regs, int mii_id,
786 int regnum, u16 value);
787int gfar_local_mdio_read(struct gfar_mii __iomem *regs, int mii_id, int regnum);
785 788
786#endif /* __GIANFAR_H */ 789#endif /* __GIANFAR_H */
diff --git a/drivers/net/gianfar_sysfs.c b/drivers/net/gianfar_sysfs.c
index 230878b94190..5116f68e01b9 100644
--- a/drivers/net/gianfar_sysfs.c
+++ b/drivers/net/gianfar_sysfs.c
@@ -103,10 +103,10 @@ static ssize_t gfar_set_rx_stash_size(struct device *dev,
103 103
104 spin_lock_irqsave(&priv->rxlock, flags); 104 spin_lock_irqsave(&priv->rxlock, flags);
105 if (length > priv->rx_buffer_size) 105 if (length > priv->rx_buffer_size)
106 return count; 106 goto out;
107 107
108 if (length == priv->rx_stash_size) 108 if (length == priv->rx_stash_size)
109 return count; 109 goto out;
110 110
111 priv->rx_stash_size = length; 111 priv->rx_stash_size = length;
112 112
@@ -125,6 +125,7 @@ static ssize_t gfar_set_rx_stash_size(struct device *dev,
125 125
126 gfar_write(&priv->regs->attr, temp); 126 gfar_write(&priv->regs->attr, temp);
127 127
128out:
128 spin_unlock_irqrestore(&priv->rxlock, flags); 129 spin_unlock_irqrestore(&priv->rxlock, flags);
129 130
130 return count; 131 return count;
@@ -154,10 +155,10 @@ static ssize_t gfar_set_rx_stash_index(struct device *dev,
154 155
155 spin_lock_irqsave(&priv->rxlock, flags); 156 spin_lock_irqsave(&priv->rxlock, flags);
156 if (index > priv->rx_stash_size) 157 if (index > priv->rx_stash_size)
157 return count; 158 goto out;
158 159
159 if (index == priv->rx_stash_index) 160 if (index == priv->rx_stash_index)
160 return count; 161 goto out;
161 162
162 priv->rx_stash_index = index; 163 priv->rx_stash_index = index;
163 164
@@ -166,6 +167,7 @@ static ssize_t gfar_set_rx_stash_index(struct device *dev,
166 temp |= ATTRELI_EI(index); 167 temp |= ATTRELI_EI(index);
167 gfar_write(&priv->regs->attreli, flags); 168 gfar_write(&priv->regs->attreli, flags);
168 169
170out:
169 spin_unlock_irqrestore(&priv->rxlock, flags); 171 spin_unlock_irqrestore(&priv->rxlock, flags);
170 172
171 return count; 173 return count;
diff --git a/drivers/net/irda/nsc-ircc.c b/drivers/net/irda/nsc-ircc.c
index a873d2b315ca..a7714da7c283 100644
--- a/drivers/net/irda/nsc-ircc.c
+++ b/drivers/net/irda/nsc-ircc.c
@@ -100,7 +100,9 @@ static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
100static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info); 100static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
101static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info); 101static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
102static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info); 102static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
103#ifdef CONFIG_PNP
103static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id); 104static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
105#endif
104 106
105/* These are the known NSC chips */ 107/* These are the known NSC chips */
106static nsc_chip_t chips[] = { 108static nsc_chip_t chips[] = {
@@ -156,9 +158,11 @@ static const struct pnp_device_id nsc_ircc_pnp_table[] = {
156MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table); 158MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
157 159
158static struct pnp_driver nsc_ircc_pnp_driver = { 160static struct pnp_driver nsc_ircc_pnp_driver = {
161#ifdef CONFIG_PNP
159 .name = "nsc-ircc", 162 .name = "nsc-ircc",
160 .id_table = nsc_ircc_pnp_table, 163 .id_table = nsc_ircc_pnp_table,
161 .probe = nsc_ircc_pnp_probe, 164 .probe = nsc_ircc_pnp_probe,
165#endif
162}; 166};
163 167
164/* Some prototypes */ 168/* Some prototypes */
@@ -916,6 +920,7 @@ static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
916 return 0; 920 return 0;
917} 921}
918 922
923#ifdef CONFIG_PNP
919/* PNP probing */ 924/* PNP probing */
920static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id) 925static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
921{ 926{
@@ -952,6 +957,7 @@ static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *i
952 957
953 return 0; 958 return 0;
954} 959}
960#endif
955 961
956/* 962/*
957 * Function nsc_ircc_setup (info) 963 * Function nsc_ircc_setup (info)
diff --git a/drivers/net/irda/smsc-ircc2.c b/drivers/net/irda/smsc-ircc2.c
index 1f26da761e9f..cfe0194fef71 100644
--- a/drivers/net/irda/smsc-ircc2.c
+++ b/drivers/net/irda/smsc-ircc2.c
@@ -376,6 +376,7 @@ MODULE_DEVICE_TABLE(pnp, smsc_ircc_pnp_table);
376 376
377static int pnp_driver_registered; 377static int pnp_driver_registered;
378 378
379#ifdef CONFIG_PNP
379static int __init smsc_ircc_pnp_probe(struct pnp_dev *dev, 380static int __init smsc_ircc_pnp_probe(struct pnp_dev *dev,
380 const struct pnp_device_id *dev_id) 381 const struct pnp_device_id *dev_id)
381{ 382{
@@ -402,7 +403,9 @@ static struct pnp_driver smsc_ircc_pnp_driver = {
402 .id_table = smsc_ircc_pnp_table, 403 .id_table = smsc_ircc_pnp_table,
403 .probe = smsc_ircc_pnp_probe, 404 .probe = smsc_ircc_pnp_probe,
404}; 405};
405 406#else /* CONFIG_PNP */
407static struct pnp_driver smsc_ircc_pnp_driver;
408#endif
406 409
407/******************************************************************************* 410/*******************************************************************************
408 * 411 *
diff --git a/drivers/net/macvlan.c b/drivers/net/macvlan.c
index 2056cfc624dc..c36a03ae9bfb 100644
--- a/drivers/net/macvlan.c
+++ b/drivers/net/macvlan.c
@@ -450,7 +450,7 @@ static void macvlan_dellink(struct net_device *dev)
450 unregister_netdevice(dev); 450 unregister_netdevice(dev);
451 451
452 if (list_empty(&port->vlans)) 452 if (list_empty(&port->vlans))
453 macvlan_port_destroy(dev); 453 macvlan_port_destroy(port->dev);
454} 454}
455 455
456static struct rtnl_link_ops macvlan_link_ops __read_mostly = { 456static struct rtnl_link_ops macvlan_link_ops __read_mostly = {
diff --git a/drivers/net/mlx4/mr.c b/drivers/net/mlx4/mr.c
index cb46446b2691..03a9abcce524 100644
--- a/drivers/net/mlx4/mr.c
+++ b/drivers/net/mlx4/mr.c
@@ -551,7 +551,7 @@ int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages,
551 u64 mtt_seg; 551 u64 mtt_seg;
552 int err = -ENOMEM; 552 int err = -ENOMEM;
553 553
554 if (page_shift < 12 || page_shift >= 32) 554 if (page_shift < (ffs(dev->caps.page_size_cap) - 1) || page_shift >= 32)
555 return -EINVAL; 555 return -EINVAL;
556 556
557 /* All MTTs must fit in the same page */ 557 /* All MTTs must fit in the same page */
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index 381b36e5f64c..b7915cdcc6a5 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -91,6 +91,11 @@
91 */ 91 */
92#define PHY_ADDR_REG 0x0000 92#define PHY_ADDR_REG 0x0000
93#define SMI_REG 0x0004 93#define SMI_REG 0x0004
94#define WINDOW_BASE(i) (0x0200 + ((i) << 3))
95#define WINDOW_SIZE(i) (0x0204 + ((i) << 3))
96#define WINDOW_REMAP_HIGH(i) (0x0280 + ((i) << 2))
97#define WINDOW_BAR_ENABLE 0x0290
98#define WINDOW_PROTECT(i) (0x0294 + ((i) << 4))
94 99
95/* 100/*
96 * Per-port registers. 101 * Per-port registers.
@@ -507,9 +512,23 @@ struct mv643xx_mib_counters {
507 u32 late_collision; 512 u32 late_collision;
508}; 513};
509 514
515struct mv643xx_shared_private {
516 void __iomem *eth_base;
517
518 /* used to protect SMI_REG, which is shared across ports */
519 spinlock_t phy_lock;
520
521 u32 win_protect;
522
523 unsigned int t_clk;
524};
525
510struct mv643xx_private { 526struct mv643xx_private {
527 struct mv643xx_shared_private *shared;
511 int port_num; /* User Ethernet port number */ 528 int port_num; /* User Ethernet port number */
512 529
530 struct mv643xx_shared_private *shared_smi;
531
513 u32 rx_sram_addr; /* Base address of rx sram area */ 532 u32 rx_sram_addr; /* Base address of rx sram area */
514 u32 rx_sram_size; /* Size of rx sram area */ 533 u32 rx_sram_size; /* Size of rx sram area */
515 u32 tx_sram_addr; /* Base address of tx sram area */ 534 u32 tx_sram_addr; /* Base address of tx sram area */
@@ -614,19 +633,14 @@ static const struct ethtool_ops mv643xx_ethtool_ops;
614static char mv643xx_driver_name[] = "mv643xx_eth"; 633static char mv643xx_driver_name[] = "mv643xx_eth";
615static char mv643xx_driver_version[] = "1.0"; 634static char mv643xx_driver_version[] = "1.0";
616 635
617static void __iomem *mv643xx_eth_base;
618
619/* used to protect SMI_REG, which is shared across ports */
620static DEFINE_SPINLOCK(mv643xx_eth_phy_lock);
621
622static inline u32 rdl(struct mv643xx_private *mp, int offset) 636static inline u32 rdl(struct mv643xx_private *mp, int offset)
623{ 637{
624 return readl(mv643xx_eth_base + offset); 638 return readl(mp->shared->eth_base + offset);
625} 639}
626 640
627static inline void wrl(struct mv643xx_private *mp, int offset, u32 data) 641static inline void wrl(struct mv643xx_private *mp, int offset, u32 data)
628{ 642{
629 writel(data, mv643xx_eth_base + offset); 643 writel(data, mp->shared->eth_base + offset);
630} 644}
631 645
632/* 646/*
@@ -1119,7 +1133,6 @@ static irqreturn_t mv643xx_eth_int_handler(int irq, void *dev_id)
1119 * 1133 *
1120 * INPUT: 1134 * INPUT:
1121 * struct mv643xx_private *mp Ethernet port 1135 * struct mv643xx_private *mp Ethernet port
1122 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
1123 * unsigned int delay Delay in usec 1136 * unsigned int delay Delay in usec
1124 * 1137 *
1125 * OUTPUT: 1138 * OUTPUT:
@@ -1130,10 +1143,10 @@ static irqreturn_t mv643xx_eth_int_handler(int irq, void *dev_id)
1130 * 1143 *
1131 */ 1144 */
1132static unsigned int eth_port_set_rx_coal(struct mv643xx_private *mp, 1145static unsigned int eth_port_set_rx_coal(struct mv643xx_private *mp,
1133 unsigned int t_clk, unsigned int delay) 1146 unsigned int delay)
1134{ 1147{
1135 unsigned int port_num = mp->port_num; 1148 unsigned int port_num = mp->port_num;
1136 unsigned int coal = ((t_clk / 1000000) * delay) / 64; 1149 unsigned int coal = ((mp->shared->t_clk / 1000000) * delay) / 64;
1137 1150
1138 /* Set RX Coalescing mechanism */ 1151 /* Set RX Coalescing mechanism */
1139 wrl(mp, SDMA_CONFIG_REG(port_num), 1152 wrl(mp, SDMA_CONFIG_REG(port_num),
@@ -1158,7 +1171,6 @@ static unsigned int eth_port_set_rx_coal(struct mv643xx_private *mp,
1158 * 1171 *
1159 * INPUT: 1172 * INPUT:
1160 * struct mv643xx_private *mp Ethernet port 1173 * struct mv643xx_private *mp Ethernet port
1161 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
1162 * unsigned int delay Delay in uSeconds 1174 * unsigned int delay Delay in uSeconds
1163 * 1175 *
1164 * OUTPUT: 1176 * OUTPUT:
@@ -1169,9 +1181,9 @@ static unsigned int eth_port_set_rx_coal(struct mv643xx_private *mp,
1169 * 1181 *
1170 */ 1182 */
1171static unsigned int eth_port_set_tx_coal(struct mv643xx_private *mp, 1183static unsigned int eth_port_set_tx_coal(struct mv643xx_private *mp,
1172 unsigned int t_clk, unsigned int delay) 1184 unsigned int delay)
1173{ 1185{
1174 unsigned int coal = ((t_clk / 1000000) * delay) / 64; 1186 unsigned int coal = ((mp->shared->t_clk / 1000000) * delay) / 64;
1175 1187
1176 /* Set TX Coalescing mechanism */ 1188 /* Set TX Coalescing mechanism */
1177 wrl(mp, TX_FIFO_URGENT_THRESHOLD_REG(mp->port_num), coal << 4); 1189 wrl(mp, TX_FIFO_URGENT_THRESHOLD_REG(mp->port_num), coal << 4);
@@ -1413,11 +1425,11 @@ static int mv643xx_eth_open(struct net_device *dev)
1413 1425
1414#ifdef MV643XX_COAL 1426#ifdef MV643XX_COAL
1415 mp->rx_int_coal = 1427 mp->rx_int_coal =
1416 eth_port_set_rx_coal(mp, 133000000, MV643XX_RX_COAL); 1428 eth_port_set_rx_coal(mp, MV643XX_RX_COAL);
1417#endif 1429#endif
1418 1430
1419 mp->tx_int_coal = 1431 mp->tx_int_coal =
1420 eth_port_set_tx_coal(mp, 133000000, MV643XX_TX_COAL); 1432 eth_port_set_tx_coal(mp, MV643XX_TX_COAL);
1421 1433
1422 /* Unmask phy and link status changes interrupts */ 1434 /* Unmask phy and link status changes interrupts */
1423 wrl(mp, INTERRUPT_EXTEND_MASK_REG(port_num), ETH_INT_UNMASK_ALL_EXT); 1435 wrl(mp, INTERRUPT_EXTEND_MASK_REG(port_num), ETH_INT_UNMASK_ALL_EXT);
@@ -1827,6 +1839,11 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
1827 return -ENODEV; 1839 return -ENODEV;
1828 } 1840 }
1829 1841
1842 if (pd->shared == NULL) {
1843 printk(KERN_ERR "No mv643xx_eth_platform_data->shared\n");
1844 return -ENODEV;
1845 }
1846
1830 dev = alloc_etherdev(sizeof(struct mv643xx_private)); 1847 dev = alloc_etherdev(sizeof(struct mv643xx_private));
1831 if (!dev) 1848 if (!dev)
1832 return -ENOMEM; 1849 return -ENOMEM;
@@ -1877,8 +1894,16 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
1877 1894
1878 spin_lock_init(&mp->lock); 1895 spin_lock_init(&mp->lock);
1879 1896
1897 mp->shared = platform_get_drvdata(pd->shared);
1880 port_num = mp->port_num = pd->port_number; 1898 port_num = mp->port_num = pd->port_number;
1881 1899
1900 if (mp->shared->win_protect)
1901 wrl(mp, WINDOW_PROTECT(port_num), mp->shared->win_protect);
1902
1903 mp->shared_smi = mp->shared;
1904 if (pd->shared_smi != NULL)
1905 mp->shared_smi = platform_get_drvdata(pd->shared_smi);
1906
1882 /* set default config values */ 1907 /* set default config values */
1883 eth_port_uc_addr_get(mp, dev->dev_addr); 1908 eth_port_uc_addr_get(mp, dev->dev_addr);
1884 mp->rx_ring_size = PORT_DEFAULT_RECEIVE_QUEUE_SIZE; 1909 mp->rx_ring_size = PORT_DEFAULT_RECEIVE_QUEUE_SIZE;
@@ -1983,30 +2008,91 @@ static int mv643xx_eth_remove(struct platform_device *pdev)
1983 return 0; 2008 return 0;
1984} 2009}
1985 2010
2011static void mv643xx_eth_conf_mbus_windows(struct mv643xx_shared_private *msp,
2012 struct mbus_dram_target_info *dram)
2013{
2014 void __iomem *base = msp->eth_base;
2015 u32 win_enable;
2016 u32 win_protect;
2017 int i;
2018
2019 for (i = 0; i < 6; i++) {
2020 writel(0, base + WINDOW_BASE(i));
2021 writel(0, base + WINDOW_SIZE(i));
2022 if (i < 4)
2023 writel(0, base + WINDOW_REMAP_HIGH(i));
2024 }
2025
2026 win_enable = 0x3f;
2027 win_protect = 0;
2028
2029 for (i = 0; i < dram->num_cs; i++) {
2030 struct mbus_dram_window *cs = dram->cs + i;
2031
2032 writel((cs->base & 0xffff0000) |
2033 (cs->mbus_attr << 8) |
2034 dram->mbus_dram_target_id, base + WINDOW_BASE(i));
2035 writel((cs->size - 1) & 0xffff0000, base + WINDOW_SIZE(i));
2036
2037 win_enable &= ~(1 << i);
2038 win_protect |= 3 << (2 * i);
2039 }
2040
2041 writel(win_enable, base + WINDOW_BAR_ENABLE);
2042 msp->win_protect = win_protect;
2043}
2044
1986static int mv643xx_eth_shared_probe(struct platform_device *pdev) 2045static int mv643xx_eth_shared_probe(struct platform_device *pdev)
1987{ 2046{
1988 static int mv643xx_version_printed = 0; 2047 static int mv643xx_version_printed = 0;
2048 struct mv643xx_eth_shared_platform_data *pd = pdev->dev.platform_data;
2049 struct mv643xx_shared_private *msp;
1989 struct resource *res; 2050 struct resource *res;
2051 int ret;
1990 2052
1991 if (!mv643xx_version_printed++) 2053 if (!mv643xx_version_printed++)
1992 printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n"); 2054 printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n");
1993 2055
2056 ret = -EINVAL;
1994 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2057 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1995 if (res == NULL) 2058 if (res == NULL)
1996 return -ENODEV; 2059 goto out;
1997 2060
1998 mv643xx_eth_base = ioremap(res->start, res->end - res->start + 1); 2061 ret = -ENOMEM;
1999 if (mv643xx_eth_base == NULL) 2062 msp = kmalloc(sizeof(*msp), GFP_KERNEL);
2000 return -ENOMEM; 2063 if (msp == NULL)
2064 goto out;
2065 memset(msp, 0, sizeof(*msp));
2066
2067 msp->eth_base = ioremap(res->start, res->end - res->start + 1);
2068 if (msp->eth_base == NULL)
2069 goto out_free;
2070
2071 spin_lock_init(&msp->phy_lock);
2072 msp->t_clk = (pd != NULL && pd->t_clk != 0) ? pd->t_clk : 133000000;
2073
2074 platform_set_drvdata(pdev, msp);
2075
2076 /*
2077 * (Re-)program MBUS remapping windows if we are asked to.
2078 */
2079 if (pd != NULL && pd->dram != NULL)
2080 mv643xx_eth_conf_mbus_windows(msp, pd->dram);
2001 2081
2002 return 0; 2082 return 0;
2003 2083
2084out_free:
2085 kfree(msp);
2086out:
2087 return ret;
2004} 2088}
2005 2089
2006static int mv643xx_eth_shared_remove(struct platform_device *pdev) 2090static int mv643xx_eth_shared_remove(struct platform_device *pdev)
2007{ 2091{
2008 iounmap(mv643xx_eth_base); 2092 struct mv643xx_shared_private *msp = platform_get_drvdata(pdev);
2009 mv643xx_eth_base = NULL; 2093
2094 iounmap(msp->eth_base);
2095 kfree(msp);
2010 2096
2011 return 0; 2097 return 0;
2012} 2098}
@@ -2906,15 +2992,16 @@ static void eth_port_reset(struct mv643xx_private *mp)
2906static void eth_port_read_smi_reg(struct mv643xx_private *mp, 2992static void eth_port_read_smi_reg(struct mv643xx_private *mp,
2907 unsigned int phy_reg, unsigned int *value) 2993 unsigned int phy_reg, unsigned int *value)
2908{ 2994{
2995 void __iomem *smi_reg = mp->shared_smi->eth_base + SMI_REG;
2909 int phy_addr = ethernet_phy_get(mp); 2996 int phy_addr = ethernet_phy_get(mp);
2910 unsigned long flags; 2997 unsigned long flags;
2911 int i; 2998 int i;
2912 2999
2913 /* the SMI register is a shared resource */ 3000 /* the SMI register is a shared resource */
2914 spin_lock_irqsave(&mv643xx_eth_phy_lock, flags); 3001 spin_lock_irqsave(&mp->shared_smi->phy_lock, flags);
2915 3002
2916 /* wait for the SMI register to become available */ 3003 /* wait for the SMI register to become available */
2917 for (i = 0; rdl(mp, SMI_REG) & ETH_SMI_BUSY; i++) { 3004 for (i = 0; readl(smi_reg) & ETH_SMI_BUSY; i++) {
2918 if (i == PHY_WAIT_ITERATIONS) { 3005 if (i == PHY_WAIT_ITERATIONS) {
2919 printk("%s: PHY busy timeout\n", mp->dev->name); 3006 printk("%s: PHY busy timeout\n", mp->dev->name);
2920 goto out; 3007 goto out;
@@ -2922,11 +3009,11 @@ static void eth_port_read_smi_reg(struct mv643xx_private *mp,
2922 udelay(PHY_WAIT_MICRO_SECONDS); 3009 udelay(PHY_WAIT_MICRO_SECONDS);
2923 } 3010 }
2924 3011
2925 wrl(mp, SMI_REG, 3012 writel((phy_addr << 16) | (phy_reg << 21) | ETH_SMI_OPCODE_READ,
2926 (phy_addr << 16) | (phy_reg << 21) | ETH_SMI_OPCODE_READ); 3013 smi_reg);
2927 3014
2928 /* now wait for the data to be valid */ 3015 /* now wait for the data to be valid */
2929 for (i = 0; !(rdl(mp, SMI_REG) & ETH_SMI_READ_VALID); i++) { 3016 for (i = 0; !(readl(smi_reg) & ETH_SMI_READ_VALID); i++) {
2930 if (i == PHY_WAIT_ITERATIONS) { 3017 if (i == PHY_WAIT_ITERATIONS) {
2931 printk("%s: PHY read timeout\n", mp->dev->name); 3018 printk("%s: PHY read timeout\n", mp->dev->name);
2932 goto out; 3019 goto out;
@@ -2934,9 +3021,9 @@ static void eth_port_read_smi_reg(struct mv643xx_private *mp,
2934 udelay(PHY_WAIT_MICRO_SECONDS); 3021 udelay(PHY_WAIT_MICRO_SECONDS);
2935 } 3022 }
2936 3023
2937 *value = rdl(mp, SMI_REG) & 0xffff; 3024 *value = readl(smi_reg) & 0xffff;
2938out: 3025out:
2939 spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags); 3026 spin_unlock_irqrestore(&mp->shared_smi->phy_lock, flags);
2940} 3027}
2941 3028
2942/* 3029/*
@@ -2962,17 +3049,16 @@ out:
2962static void eth_port_write_smi_reg(struct mv643xx_private *mp, 3049static void eth_port_write_smi_reg(struct mv643xx_private *mp,
2963 unsigned int phy_reg, unsigned int value) 3050 unsigned int phy_reg, unsigned int value)
2964{ 3051{
2965 int phy_addr; 3052 void __iomem *smi_reg = mp->shared_smi->eth_base + SMI_REG;
2966 int i; 3053 int phy_addr = ethernet_phy_get(mp);
2967 unsigned long flags; 3054 unsigned long flags;
2968 3055 int i;
2969 phy_addr = ethernet_phy_get(mp);
2970 3056
2971 /* the SMI register is a shared resource */ 3057 /* the SMI register is a shared resource */
2972 spin_lock_irqsave(&mv643xx_eth_phy_lock, flags); 3058 spin_lock_irqsave(&mp->shared_smi->phy_lock, flags);
2973 3059
2974 /* wait for the SMI register to become available */ 3060 /* wait for the SMI register to become available */
2975 for (i = 0; rdl(mp, SMI_REG) & ETH_SMI_BUSY; i++) { 3061 for (i = 0; readl(smi_reg) & ETH_SMI_BUSY; i++) {
2976 if (i == PHY_WAIT_ITERATIONS) { 3062 if (i == PHY_WAIT_ITERATIONS) {
2977 printk("%s: PHY busy timeout\n", mp->dev->name); 3063 printk("%s: PHY busy timeout\n", mp->dev->name);
2978 goto out; 3064 goto out;
@@ -2980,10 +3066,10 @@ static void eth_port_write_smi_reg(struct mv643xx_private *mp,
2980 udelay(PHY_WAIT_MICRO_SECONDS); 3066 udelay(PHY_WAIT_MICRO_SECONDS);
2981 } 3067 }
2982 3068
2983 wrl(mp, SMI_REG, (phy_addr << 16) | (phy_reg << 21) | 3069 writel((phy_addr << 16) | (phy_reg << 21) |
2984 ETH_SMI_OPCODE_WRITE | (value & 0xffff)); 3070 ETH_SMI_OPCODE_WRITE | (value & 0xffff), smi_reg);
2985out: 3071out:
2986 spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags); 3072 spin_unlock_irqrestore(&mp->shared_smi->phy_lock, flags);
2987} 3073}
2988 3074
2989/* 3075/*
diff --git a/drivers/net/niu.c b/drivers/net/niu.c
index 4009c4ce96b4..57cfd72ffdf7 100644
--- a/drivers/net/niu.c
+++ b/drivers/net/niu.c
@@ -1,6 +1,6 @@
1/* niu.c: Neptune ethernet driver. 1/* niu.c: Neptune ethernet driver.
2 * 2 *
3 * Copyright (C) 2007 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 2007, 2008 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#include <linux/module.h> 6#include <linux/module.h>
@@ -33,8 +33,8 @@
33 33
34#define DRV_MODULE_NAME "niu" 34#define DRV_MODULE_NAME "niu"
35#define PFX DRV_MODULE_NAME ": " 35#define PFX DRV_MODULE_NAME ": "
36#define DRV_MODULE_VERSION "0.8" 36#define DRV_MODULE_VERSION "0.9"
37#define DRV_MODULE_RELDATE "April 24, 2008" 37#define DRV_MODULE_RELDATE "May 4, 2008"
38 38
39static char version[] __devinitdata = 39static char version[] __devinitdata =
40 DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n"; 40 DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
@@ -7264,8 +7264,11 @@ static int __devinit niu_get_and_validate_port(struct niu *np)
7264 parent->num_ports = nr64(ESPC_NUM_PORTS_MACS) & 7264 parent->num_ports = nr64(ESPC_NUM_PORTS_MACS) &
7265 ESPC_NUM_PORTS_MACS_VAL; 7265 ESPC_NUM_PORTS_MACS_VAL;
7266 7266
7267 /* All of the current probing methods fail on
7268 * Maramba on-board parts.
7269 */
7267 if (!parent->num_ports) 7270 if (!parent->num_ports)
7268 return -ENODEV; 7271 parent->num_ports = 4;
7269 } 7272 }
7270 } 7273 }
7271 } 7274 }
diff --git a/drivers/net/pcnet32.c b/drivers/net/pcnet32.c
index 4eb322e5273d..a1c454dbc164 100644
--- a/drivers/net/pcnet32.c
+++ b/drivers/net/pcnet32.c
@@ -22,12 +22,8 @@
22 *************************************************************************/ 22 *************************************************************************/
23 23
24#define DRV_NAME "pcnet32" 24#define DRV_NAME "pcnet32"
25#ifdef CONFIG_PCNET32_NAPI 25#define DRV_VERSION "1.35"
26#define DRV_VERSION "1.34-NAPI" 26#define DRV_RELDATE "21.Apr.2008"
27#else
28#define DRV_VERSION "1.34"
29#endif
30#define DRV_RELDATE "14.Aug.2007"
31#define PFX DRV_NAME ": " 27#define PFX DRV_NAME ": "
32 28
33static const char *const version = 29static const char *const version =
@@ -445,30 +441,24 @@ static struct pcnet32_access pcnet32_dwio = {
445 441
446static void pcnet32_netif_stop(struct net_device *dev) 442static void pcnet32_netif_stop(struct net_device *dev)
447{ 443{
448#ifdef CONFIG_PCNET32_NAPI
449 struct pcnet32_private *lp = netdev_priv(dev); 444 struct pcnet32_private *lp = netdev_priv(dev);
450#endif 445
451 dev->trans_start = jiffies; 446 dev->trans_start = jiffies;
452#ifdef CONFIG_PCNET32_NAPI
453 napi_disable(&lp->napi); 447 napi_disable(&lp->napi);
454#endif
455 netif_tx_disable(dev); 448 netif_tx_disable(dev);
456} 449}
457 450
458static void pcnet32_netif_start(struct net_device *dev) 451static void pcnet32_netif_start(struct net_device *dev)
459{ 452{
460#ifdef CONFIG_PCNET32_NAPI
461 struct pcnet32_private *lp = netdev_priv(dev); 453 struct pcnet32_private *lp = netdev_priv(dev);
462 ulong ioaddr = dev->base_addr; 454 ulong ioaddr = dev->base_addr;
463 u16 val; 455 u16 val;
464#endif 456
465 netif_wake_queue(dev); 457 netif_wake_queue(dev);
466#ifdef CONFIG_PCNET32_NAPI
467 val = lp->a.read_csr(ioaddr, CSR3); 458 val = lp->a.read_csr(ioaddr, CSR3);
468 val &= 0x00ff; 459 val &= 0x00ff;
469 lp->a.write_csr(ioaddr, CSR3, val); 460 lp->a.write_csr(ioaddr, CSR3, val);
470 napi_enable(&lp->napi); 461 napi_enable(&lp->napi);
471#endif
472} 462}
473 463
474/* 464/*
@@ -911,11 +901,7 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1)
911 rc = 1; /* default to fail */ 901 rc = 1; /* default to fail */
912 902
913 if (netif_running(dev)) 903 if (netif_running(dev))
914#ifdef CONFIG_PCNET32_NAPI
915 pcnet32_netif_stop(dev); 904 pcnet32_netif_stop(dev);
916#else
917 pcnet32_close(dev);
918#endif
919 905
920 spin_lock_irqsave(&lp->lock, flags); 906 spin_lock_irqsave(&lp->lock, flags);
921 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ 907 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */
@@ -1046,7 +1032,6 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1)
1046 x = a->read_bcr(ioaddr, 32); /* reset internal loopback */ 1032 x = a->read_bcr(ioaddr, 32); /* reset internal loopback */
1047 a->write_bcr(ioaddr, 32, (x & ~0x0002)); 1033 a->write_bcr(ioaddr, 32, (x & ~0x0002));
1048 1034
1049#ifdef CONFIG_PCNET32_NAPI
1050 if (netif_running(dev)) { 1035 if (netif_running(dev)) {
1051 pcnet32_netif_start(dev); 1036 pcnet32_netif_start(dev);
1052 pcnet32_restart(dev, CSR0_NORMAL); 1037 pcnet32_restart(dev, CSR0_NORMAL);
@@ -1055,16 +1040,6 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1)
1055 lp->a.write_bcr(ioaddr, 20, 4); /* return to 16bit mode */ 1040 lp->a.write_bcr(ioaddr, 20, 4); /* return to 16bit mode */
1056 } 1041 }
1057 spin_unlock_irqrestore(&lp->lock, flags); 1042 spin_unlock_irqrestore(&lp->lock, flags);
1058#else
1059 if (netif_running(dev)) {
1060 spin_unlock_irqrestore(&lp->lock, flags);
1061 pcnet32_open(dev);
1062 } else {
1063 pcnet32_purge_rx_ring(dev);
1064 lp->a.write_bcr(ioaddr, 20, 4); /* return to 16bit mode */
1065 spin_unlock_irqrestore(&lp->lock, flags);
1066 }
1067#endif
1068 1043
1069 return (rc); 1044 return (rc);
1070} /* end pcnet32_loopback_test */ 1045} /* end pcnet32_loopback_test */
@@ -1270,11 +1245,7 @@ static void pcnet32_rx_entry(struct net_device *dev,
1270 } 1245 }
1271 dev->stats.rx_bytes += skb->len; 1246 dev->stats.rx_bytes += skb->len;
1272 skb->protocol = eth_type_trans(skb, dev); 1247 skb->protocol = eth_type_trans(skb, dev);
1273#ifdef CONFIG_PCNET32_NAPI
1274 netif_receive_skb(skb); 1248 netif_receive_skb(skb);
1275#else
1276 netif_rx(skb);
1277#endif
1278 dev->last_rx = jiffies; 1249 dev->last_rx = jiffies;
1279 dev->stats.rx_packets++; 1250 dev->stats.rx_packets++;
1280 return; 1251 return;
@@ -1403,7 +1374,6 @@ static int pcnet32_tx(struct net_device *dev)
1403 return must_restart; 1374 return must_restart;
1404} 1375}
1405 1376
1406#ifdef CONFIG_PCNET32_NAPI
1407static int pcnet32_poll(struct napi_struct *napi, int budget) 1377static int pcnet32_poll(struct napi_struct *napi, int budget)
1408{ 1378{
1409 struct pcnet32_private *lp = container_of(napi, struct pcnet32_private, napi); 1379 struct pcnet32_private *lp = container_of(napi, struct pcnet32_private, napi);
@@ -1442,7 +1412,6 @@ static int pcnet32_poll(struct napi_struct *napi, int budget)
1442 } 1412 }
1443 return work_done; 1413 return work_done;
1444} 1414}
1445#endif
1446 1415
1447#define PCNET32_REGS_PER_PHY 32 1416#define PCNET32_REGS_PER_PHY 32
1448#define PCNET32_MAX_PHYS 32 1417#define PCNET32_MAX_PHYS 32
@@ -1864,9 +1833,7 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1864 /* napi.weight is used in both the napi and non-napi cases */ 1833 /* napi.weight is used in both the napi and non-napi cases */
1865 lp->napi.weight = lp->rx_ring_size / 2; 1834 lp->napi.weight = lp->rx_ring_size / 2;
1866 1835
1867#ifdef CONFIG_PCNET32_NAPI
1868 netif_napi_add(dev, &lp->napi, pcnet32_poll, lp->rx_ring_size / 2); 1836 netif_napi_add(dev, &lp->napi, pcnet32_poll, lp->rx_ring_size / 2);
1869#endif
1870 1837
1871 if (fdx && !(lp->options & PCNET32_PORT_ASEL) && 1838 if (fdx && !(lp->options & PCNET32_PORT_ASEL) &&
1872 ((cards_found >= MAX_UNITS) || full_duplex[cards_found])) 1839 ((cards_found >= MAX_UNITS) || full_duplex[cards_found]))
@@ -2297,9 +2264,7 @@ static int pcnet32_open(struct net_device *dev)
2297 goto err_free_ring; 2264 goto err_free_ring;
2298 } 2265 }
2299 2266
2300#ifdef CONFIG_PCNET32_NAPI
2301 napi_enable(&lp->napi); 2267 napi_enable(&lp->napi);
2302#endif
2303 2268
2304 /* Re-initialize the PCNET32, and start it when done. */ 2269 /* Re-initialize the PCNET32, and start it when done. */
2305 lp->a.write_csr(ioaddr, 1, (lp->init_dma_addr & 0xffff)); 2270 lp->a.write_csr(ioaddr, 1, (lp->init_dma_addr & 0xffff));
@@ -2623,7 +2588,6 @@ pcnet32_interrupt(int irq, void *dev_id)
2623 dev->name, csr0); 2588 dev->name, csr0);
2624 /* unlike for the lance, there is no restart needed */ 2589 /* unlike for the lance, there is no restart needed */
2625 } 2590 }
2626#ifdef CONFIG_PCNET32_NAPI
2627 if (netif_rx_schedule_prep(dev, &lp->napi)) { 2591 if (netif_rx_schedule_prep(dev, &lp->napi)) {
2628 u16 val; 2592 u16 val;
2629 /* set interrupt masks */ 2593 /* set interrupt masks */
@@ -2634,24 +2598,9 @@ pcnet32_interrupt(int irq, void *dev_id)
2634 __netif_rx_schedule(dev, &lp->napi); 2598 __netif_rx_schedule(dev, &lp->napi);
2635 break; 2599 break;
2636 } 2600 }
2637#else
2638 pcnet32_rx(dev, lp->napi.weight);
2639 if (pcnet32_tx(dev)) {
2640 /* reset the chip to clear the error condition, then restart */
2641 lp->a.reset(ioaddr);
2642 lp->a.write_csr(ioaddr, CSR4, 0x0915); /* auto tx pad */
2643 pcnet32_restart(dev, CSR0_START);
2644 netif_wake_queue(dev);
2645 }
2646#endif
2647 csr0 = lp->a.read_csr(ioaddr, CSR0); 2601 csr0 = lp->a.read_csr(ioaddr, CSR0);
2648 } 2602 }
2649 2603
2650#ifndef CONFIG_PCNET32_NAPI
2651 /* Set interrupt enable. */
2652 lp->a.write_csr(ioaddr, CSR0, CSR0_INTEN);
2653#endif
2654
2655 if (netif_msg_intr(lp)) 2604 if (netif_msg_intr(lp))
2656 printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n", 2605 printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n",
2657 dev->name, lp->a.read_csr(ioaddr, CSR0)); 2606 dev->name, lp->a.read_csr(ioaddr, CSR0));
@@ -2670,9 +2619,7 @@ static int pcnet32_close(struct net_device *dev)
2670 del_timer_sync(&lp->watchdog_timer); 2619 del_timer_sync(&lp->watchdog_timer);
2671 2620
2672 netif_stop_queue(dev); 2621 netif_stop_queue(dev);
2673#ifdef CONFIG_PCNET32_NAPI
2674 napi_disable(&lp->napi); 2622 napi_disable(&lp->napi);
2675#endif
2676 2623
2677 spin_lock_irqsave(&lp->lock, flags); 2624 spin_lock_irqsave(&lp->lock, flags);
2678 2625
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 3c18bb594957..45cc2914d347 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -547,7 +547,7 @@ static void phy_force_reduction(struct phy_device *phydev)
547 * Must not be called from interrupt context, or while the 547 * Must not be called from interrupt context, or while the
548 * phydev->lock is held. 548 * phydev->lock is held.
549 */ 549 */
550void phy_error(struct phy_device *phydev) 550static void phy_error(struct phy_device *phydev)
551{ 551{
552 mutex_lock(&phydev->lock); 552 mutex_lock(&phydev->lock);
553 phydev->state = PHY_HALTED; 553 phydev->state = PHY_HALTED;
diff --git a/drivers/net/tulip/uli526x.c b/drivers/net/tulip/uli526x.c
index a59c1f224aa8..2511ca7a12aa 100644
--- a/drivers/net/tulip/uli526x.c
+++ b/drivers/net/tulip/uli526x.c
@@ -434,10 +434,6 @@ static int uli526x_open(struct net_device *dev)
434 434
435 ULI526X_DBUG(0, "uli526x_open", 0); 435 ULI526X_DBUG(0, "uli526x_open", 0);
436 436
437 ret = request_irq(dev->irq, &uli526x_interrupt, IRQF_SHARED, dev->name, dev);
438 if (ret)
439 return ret;
440
441 /* system variable init */ 437 /* system variable init */
442 db->cr6_data = CR6_DEFAULT | uli526x_cr6_user_set; 438 db->cr6_data = CR6_DEFAULT | uli526x_cr6_user_set;
443 db->tx_packet_cnt = 0; 439 db->tx_packet_cnt = 0;
@@ -456,6 +452,10 @@ static int uli526x_open(struct net_device *dev)
456 /* Initialize ULI526X board */ 452 /* Initialize ULI526X board */
457 uli526x_init(dev); 453 uli526x_init(dev);
458 454
455 ret = request_irq(dev->irq, &uli526x_interrupt, IRQF_SHARED, dev->name, dev);
456 if (ret)
457 return ret;
458
459 /* Active System Interface */ 459 /* Active System Interface */
460 netif_wake_queue(dev); 460 netif_wake_queue(dev);
461 461
@@ -1368,6 +1368,12 @@ static void update_cr6(u32 cr6_data, unsigned long ioaddr)
1368 * This setup frame initialize ULI526X address filter mode 1368 * This setup frame initialize ULI526X address filter mode
1369 */ 1369 */
1370 1370
1371#ifdef __BIG_ENDIAN
1372#define FLT_SHIFT 16
1373#else
1374#define FLT_SHIFT 0
1375#endif
1376
1371static void send_filter_frame(struct net_device *dev, int mc_cnt) 1377static void send_filter_frame(struct net_device *dev, int mc_cnt)
1372{ 1378{
1373 struct uli526x_board_info *db = netdev_priv(dev); 1379 struct uli526x_board_info *db = netdev_priv(dev);
@@ -1384,27 +1390,27 @@ static void send_filter_frame(struct net_device *dev, int mc_cnt)
1384 1390
1385 /* Node address */ 1391 /* Node address */
1386 addrptr = (u16 *) dev->dev_addr; 1392 addrptr = (u16 *) dev->dev_addr;
1387 *suptr++ = addrptr[0]; 1393 *suptr++ = addrptr[0] << FLT_SHIFT;
1388 *suptr++ = addrptr[1]; 1394 *suptr++ = addrptr[1] << FLT_SHIFT;
1389 *suptr++ = addrptr[2]; 1395 *suptr++ = addrptr[2] << FLT_SHIFT;
1390 1396
1391 /* broadcast address */ 1397 /* broadcast address */
1392 *suptr++ = 0xffff; 1398 *suptr++ = 0xffff << FLT_SHIFT;
1393 *suptr++ = 0xffff; 1399 *suptr++ = 0xffff << FLT_SHIFT;
1394 *suptr++ = 0xffff; 1400 *suptr++ = 0xffff << FLT_SHIFT;
1395 1401
1396 /* fit the multicast address */ 1402 /* fit the multicast address */
1397 for (mcptr = dev->mc_list, i = 0; i < mc_cnt; i++, mcptr = mcptr->next) { 1403 for (mcptr = dev->mc_list, i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
1398 addrptr = (u16 *) mcptr->dmi_addr; 1404 addrptr = (u16 *) mcptr->dmi_addr;
1399 *suptr++ = addrptr[0]; 1405 *suptr++ = addrptr[0] << FLT_SHIFT;
1400 *suptr++ = addrptr[1]; 1406 *suptr++ = addrptr[1] << FLT_SHIFT;
1401 *suptr++ = addrptr[2]; 1407 *suptr++ = addrptr[2] << FLT_SHIFT;
1402 } 1408 }
1403 1409
1404 for (; i<14; i++) { 1410 for (; i<14; i++) {
1405 *suptr++ = 0xffff; 1411 *suptr++ = 0xffff << FLT_SHIFT;
1406 *suptr++ = 0xffff; 1412 *suptr++ = 0xffff << FLT_SHIFT;
1407 *suptr++ = 0xffff; 1413 *suptr++ = 0xffff << FLT_SHIFT;
1408 } 1414 }
1409 1415
1410 /* prepare the setup frame */ 1416 /* prepare the setup frame */
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index 281ce3d39532..ca0bdac07a78 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -62,7 +62,6 @@
62#endif /* UGETH_VERBOSE_DEBUG */ 62#endif /* UGETH_VERBOSE_DEBUG */
63#define UGETH_MSG_DEFAULT (NETIF_MSG_IFUP << 1 ) - 1 63#define UGETH_MSG_DEFAULT (NETIF_MSG_IFUP << 1 ) - 1
64 64
65void uec_set_ethtool_ops(struct net_device *netdev);
66 65
67static DEFINE_SPINLOCK(ugeth_lock); 66static DEFINE_SPINLOCK(ugeth_lock);
68 67
@@ -216,7 +215,8 @@ static struct list_head *dequeue(struct list_head *lh)
216 } 215 }
217} 216}
218 217
219static struct sk_buff *get_new_skb(struct ucc_geth_private *ugeth, u8 *bd) 218static struct sk_buff *get_new_skb(struct ucc_geth_private *ugeth,
219 u8 __iomem *bd)
220{ 220{
221 struct sk_buff *skb = NULL; 221 struct sk_buff *skb = NULL;
222 222
@@ -236,21 +236,22 @@ static struct sk_buff *get_new_skb(struct ucc_geth_private *ugeth, u8 *bd)
236 236
237 skb->dev = ugeth->dev; 237 skb->dev = ugeth->dev;
238 238
239 out_be32(&((struct qe_bd *)bd)->buf, 239 out_be32(&((struct qe_bd __iomem *)bd)->buf,
240 dma_map_single(NULL, 240 dma_map_single(NULL,
241 skb->data, 241 skb->data,
242 ugeth->ug_info->uf_info.max_rx_buf_length + 242 ugeth->ug_info->uf_info.max_rx_buf_length +
243 UCC_GETH_RX_DATA_BUF_ALIGNMENT, 243 UCC_GETH_RX_DATA_BUF_ALIGNMENT,
244 DMA_FROM_DEVICE)); 244 DMA_FROM_DEVICE));
245 245
246 out_be32((u32 *)bd, (R_E | R_I | (in_be32((u32 *)bd) & R_W))); 246 out_be32((u32 __iomem *)bd,
247 (R_E | R_I | (in_be32((u32 __iomem*)bd) & R_W)));
247 248
248 return skb; 249 return skb;
249} 250}
250 251
251static int rx_bd_buffer_set(struct ucc_geth_private *ugeth, u8 rxQ) 252static int rx_bd_buffer_set(struct ucc_geth_private *ugeth, u8 rxQ)
252{ 253{
253 u8 *bd; 254 u8 __iomem *bd;
254 u32 bd_status; 255 u32 bd_status;
255 struct sk_buff *skb; 256 struct sk_buff *skb;
256 int i; 257 int i;
@@ -259,7 +260,7 @@ static int rx_bd_buffer_set(struct ucc_geth_private *ugeth, u8 rxQ)
259 i = 0; 260 i = 0;
260 261
261 do { 262 do {
262 bd_status = in_be32((u32*)bd); 263 bd_status = in_be32((u32 __iomem *)bd);
263 skb = get_new_skb(ugeth, bd); 264 skb = get_new_skb(ugeth, bd);
264 265
265 if (!skb) /* If can not allocate data buffer, 266 if (!skb) /* If can not allocate data buffer,
@@ -277,7 +278,7 @@ static int rx_bd_buffer_set(struct ucc_geth_private *ugeth, u8 rxQ)
277} 278}
278 279
279static int fill_init_enet_entries(struct ucc_geth_private *ugeth, 280static int fill_init_enet_entries(struct ucc_geth_private *ugeth,
280 volatile u32 *p_start, 281 u32 *p_start,
281 u8 num_entries, 282 u8 num_entries,
282 u32 thread_size, 283 u32 thread_size,
283 u32 thread_alignment, 284 u32 thread_alignment,
@@ -316,7 +317,7 @@ static int fill_init_enet_entries(struct ucc_geth_private *ugeth,
316} 317}
317 318
318static int return_init_enet_entries(struct ucc_geth_private *ugeth, 319static int return_init_enet_entries(struct ucc_geth_private *ugeth,
319 volatile u32 *p_start, 320 u32 *p_start,
320 u8 num_entries, 321 u8 num_entries,
321 enum qe_risc_allocation risc, 322 enum qe_risc_allocation risc,
322 int skip_page_for_first_entry) 323 int skip_page_for_first_entry)
@@ -326,21 +327,22 @@ static int return_init_enet_entries(struct ucc_geth_private *ugeth,
326 int snum; 327 int snum;
327 328
328 for (i = 0; i < num_entries; i++) { 329 for (i = 0; i < num_entries; i++) {
330 u32 val = *p_start;
331
329 /* Check that this entry was actually valid -- 332 /* Check that this entry was actually valid --
330 needed in case failed in allocations */ 333 needed in case failed in allocations */
331 if ((*p_start & ENET_INIT_PARAM_RISC_MASK) == risc) { 334 if ((val & ENET_INIT_PARAM_RISC_MASK) == risc) {
332 snum = 335 snum =
333 (u32) (*p_start & ENET_INIT_PARAM_SNUM_MASK) >> 336 (u32) (val & ENET_INIT_PARAM_SNUM_MASK) >>
334 ENET_INIT_PARAM_SNUM_SHIFT; 337 ENET_INIT_PARAM_SNUM_SHIFT;
335 qe_put_snum((u8) snum); 338 qe_put_snum((u8) snum);
336 if (!((i == 0) && skip_page_for_first_entry)) { 339 if (!((i == 0) && skip_page_for_first_entry)) {
337 /* First entry of Rx does not have page */ 340 /* First entry of Rx does not have page */
338 init_enet_offset = 341 init_enet_offset =
339 (in_be32(p_start) & 342 (val & ENET_INIT_PARAM_PTR_MASK);
340 ENET_INIT_PARAM_PTR_MASK);
341 qe_muram_free(init_enet_offset); 343 qe_muram_free(init_enet_offset);
342 } 344 }
343 *(p_start++) = 0; /* Just for cosmetics */ 345 *p_start++ = 0;
344 } 346 }
345 } 347 }
346 348
@@ -349,7 +351,7 @@ static int return_init_enet_entries(struct ucc_geth_private *ugeth,
349 351
350#ifdef DEBUG 352#ifdef DEBUG
351static int dump_init_enet_entries(struct ucc_geth_private *ugeth, 353static int dump_init_enet_entries(struct ucc_geth_private *ugeth,
352 volatile u32 *p_start, 354 u32 __iomem *p_start,
353 u8 num_entries, 355 u8 num_entries,
354 u32 thread_size, 356 u32 thread_size,
355 enum qe_risc_allocation risc, 357 enum qe_risc_allocation risc,
@@ -360,11 +362,13 @@ static int dump_init_enet_entries(struct ucc_geth_private *ugeth,
360 int snum; 362 int snum;
361 363
362 for (i = 0; i < num_entries; i++) { 364 for (i = 0; i < num_entries; i++) {
365 u32 val = in_be32(p_start);
366
363 /* Check that this entry was actually valid -- 367 /* Check that this entry was actually valid --
364 needed in case failed in allocations */ 368 needed in case failed in allocations */
365 if ((*p_start & ENET_INIT_PARAM_RISC_MASK) == risc) { 369 if ((val & ENET_INIT_PARAM_RISC_MASK) == risc) {
366 snum = 370 snum =
367 (u32) (*p_start & ENET_INIT_PARAM_SNUM_MASK) >> 371 (u32) (val & ENET_INIT_PARAM_SNUM_MASK) >>
368 ENET_INIT_PARAM_SNUM_SHIFT; 372 ENET_INIT_PARAM_SNUM_SHIFT;
369 qe_put_snum((u8) snum); 373 qe_put_snum((u8) snum);
370 if (!((i == 0) && skip_page_for_first_entry)) { 374 if (!((i == 0) && skip_page_for_first_entry)) {
@@ -440,7 +444,7 @@ static int hw_add_addr_in_paddr(struct ucc_geth_private *ugeth,
440 444
441static int hw_clear_addr_in_paddr(struct ucc_geth_private *ugeth, u8 paddr_num) 445static int hw_clear_addr_in_paddr(struct ucc_geth_private *ugeth, u8 paddr_num)
442{ 446{
443 struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; 447 struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt;
444 448
445 if (!(paddr_num < NUM_OF_PADDRS)) { 449 if (!(paddr_num < NUM_OF_PADDRS)) {
446 ugeth_warn("%s: Illagel paddr_num.", __FUNCTION__); 450 ugeth_warn("%s: Illagel paddr_num.", __FUNCTION__);
@@ -448,7 +452,7 @@ static int hw_clear_addr_in_paddr(struct ucc_geth_private *ugeth, u8 paddr_num)
448 } 452 }
449 453
450 p_82xx_addr_filt = 454 p_82xx_addr_filt =
451 (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> 455 (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth->p_rx_glbl_pram->
452 addressfiltering; 456 addressfiltering;
453 457
454 /* Writing address ff.ff.ff.ff.ff.ff disables address 458 /* Writing address ff.ff.ff.ff.ff.ff disables address
@@ -463,11 +467,11 @@ static int hw_clear_addr_in_paddr(struct ucc_geth_private *ugeth, u8 paddr_num)
463static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth, 467static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth,
464 u8 *p_enet_addr) 468 u8 *p_enet_addr)
465{ 469{
466 struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; 470 struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt;
467 u32 cecr_subblock; 471 u32 cecr_subblock;
468 472
469 p_82xx_addr_filt = 473 p_82xx_addr_filt =
470 (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> 474 (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth->p_rx_glbl_pram->
471 addressfiltering; 475 addressfiltering;
472 476
473 cecr_subblock = 477 cecr_subblock =
@@ -487,7 +491,7 @@ static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth,
487static void magic_packet_detection_enable(struct ucc_geth_private *ugeth) 491static void magic_packet_detection_enable(struct ucc_geth_private *ugeth)
488{ 492{
489 struct ucc_fast_private *uccf; 493 struct ucc_fast_private *uccf;
490 struct ucc_geth *ug_regs; 494 struct ucc_geth __iomem *ug_regs;
491 u32 maccfg2, uccm; 495 u32 maccfg2, uccm;
492 496
493 uccf = ugeth->uccf; 497 uccf = ugeth->uccf;
@@ -507,7 +511,7 @@ static void magic_packet_detection_enable(struct ucc_geth_private *ugeth)
507static void magic_packet_detection_disable(struct ucc_geth_private *ugeth) 511static void magic_packet_detection_disable(struct ucc_geth_private *ugeth)
508{ 512{
509 struct ucc_fast_private *uccf; 513 struct ucc_fast_private *uccf;
510 struct ucc_geth *ug_regs; 514 struct ucc_geth __iomem *ug_regs;
511 u32 maccfg2, uccm; 515 u32 maccfg2, uccm;
512 516
513 uccf = ugeth->uccf; 517 uccf = ugeth->uccf;
@@ -538,13 +542,13 @@ static void get_statistics(struct ucc_geth_private *ugeth,
538 rx_firmware_statistics, 542 rx_firmware_statistics,
539 struct ucc_geth_hardware_statistics *hardware_statistics) 543 struct ucc_geth_hardware_statistics *hardware_statistics)
540{ 544{
541 struct ucc_fast *uf_regs; 545 struct ucc_fast __iomem *uf_regs;
542 struct ucc_geth *ug_regs; 546 struct ucc_geth __iomem *ug_regs;
543 struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram; 547 struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram;
544 struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram; 548 struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram;
545 549
546 ug_regs = ugeth->ug_regs; 550 ug_regs = ugeth->ug_regs;
547 uf_regs = (struct ucc_fast *) ug_regs; 551 uf_regs = (struct ucc_fast __iomem *) ug_regs;
548 p_tx_fw_statistics_pram = ugeth->p_tx_fw_statistics_pram; 552 p_tx_fw_statistics_pram = ugeth->p_tx_fw_statistics_pram;
549 p_rx_fw_statistics_pram = ugeth->p_rx_fw_statistics_pram; 553 p_rx_fw_statistics_pram = ugeth->p_rx_fw_statistics_pram;
550 554
@@ -1132,9 +1136,9 @@ static void dump_regs(struct ucc_geth_private *ugeth)
1132} 1136}
1133#endif /* DEBUG */ 1137#endif /* DEBUG */
1134 1138
1135static void init_default_reg_vals(volatile u32 *upsmr_register, 1139static void init_default_reg_vals(u32 __iomem *upsmr_register,
1136 volatile u32 *maccfg1_register, 1140 u32 __iomem *maccfg1_register,
1137 volatile u32 *maccfg2_register) 1141 u32 __iomem *maccfg2_register)
1138{ 1142{
1139 out_be32(upsmr_register, UCC_GETH_UPSMR_INIT); 1143 out_be32(upsmr_register, UCC_GETH_UPSMR_INIT);
1140 out_be32(maccfg1_register, UCC_GETH_MACCFG1_INIT); 1144 out_be32(maccfg1_register, UCC_GETH_MACCFG1_INIT);
@@ -1148,7 +1152,7 @@ static int init_half_duplex_params(int alt_beb,
1148 u8 alt_beb_truncation, 1152 u8 alt_beb_truncation,
1149 u8 max_retransmissions, 1153 u8 max_retransmissions,
1150 u8 collision_window, 1154 u8 collision_window,
1151 volatile u32 *hafdup_register) 1155 u32 __iomem *hafdup_register)
1152{ 1156{
1153 u32 value = 0; 1157 u32 value = 0;
1154 1158
@@ -1180,7 +1184,7 @@ static int init_inter_frame_gap_params(u8 non_btb_cs_ipg,
1180 u8 non_btb_ipg, 1184 u8 non_btb_ipg,
1181 u8 min_ifg, 1185 u8 min_ifg,
1182 u8 btb_ipg, 1186 u8 btb_ipg,
1183 volatile u32 *ipgifg_register) 1187 u32 __iomem *ipgifg_register)
1184{ 1188{
1185 u32 value = 0; 1189 u32 value = 0;
1186 1190
@@ -1215,9 +1219,9 @@ int init_flow_control_params(u32 automatic_flow_control_mode,
1215 int tx_flow_control_enable, 1219 int tx_flow_control_enable,
1216 u16 pause_period, 1220 u16 pause_period,
1217 u16 extension_field, 1221 u16 extension_field,
1218 volatile u32 *upsmr_register, 1222 u32 __iomem *upsmr_register,
1219 volatile u32 *uempr_register, 1223 u32 __iomem *uempr_register,
1220 volatile u32 *maccfg1_register) 1224 u32 __iomem *maccfg1_register)
1221{ 1225{
1222 u32 value = 0; 1226 u32 value = 0;
1223 1227
@@ -1243,8 +1247,8 @@ int init_flow_control_params(u32 automatic_flow_control_mode,
1243 1247
1244static int init_hw_statistics_gathering_mode(int enable_hardware_statistics, 1248static int init_hw_statistics_gathering_mode(int enable_hardware_statistics,
1245 int auto_zero_hardware_statistics, 1249 int auto_zero_hardware_statistics,
1246 volatile u32 *upsmr_register, 1250 u32 __iomem *upsmr_register,
1247 volatile u16 *uescr_register) 1251 u16 __iomem *uescr_register)
1248{ 1252{
1249 u32 upsmr_value = 0; 1253 u32 upsmr_value = 0;
1250 u16 uescr_value = 0; 1254 u16 uescr_value = 0;
@@ -1270,12 +1274,12 @@ static int init_hw_statistics_gathering_mode(int enable_hardware_statistics,
1270static int init_firmware_statistics_gathering_mode(int 1274static int init_firmware_statistics_gathering_mode(int
1271 enable_tx_firmware_statistics, 1275 enable_tx_firmware_statistics,
1272 int enable_rx_firmware_statistics, 1276 int enable_rx_firmware_statistics,
1273 volatile u32 *tx_rmon_base_ptr, 1277 u32 __iomem *tx_rmon_base_ptr,
1274 u32 tx_firmware_statistics_structure_address, 1278 u32 tx_firmware_statistics_structure_address,
1275 volatile u32 *rx_rmon_base_ptr, 1279 u32 __iomem *rx_rmon_base_ptr,
1276 u32 rx_firmware_statistics_structure_address, 1280 u32 rx_firmware_statistics_structure_address,
1277 volatile u16 *temoder_register, 1281 u16 __iomem *temoder_register,
1278 volatile u32 *remoder_register) 1282 u32 __iomem *remoder_register)
1279{ 1283{
1280 /* Note: this function does not check if */ 1284 /* Note: this function does not check if */
1281 /* the parameters it receives are NULL */ 1285 /* the parameters it receives are NULL */
@@ -1307,8 +1311,8 @@ static int init_mac_station_addr_regs(u8 address_byte_0,
1307 u8 address_byte_3, 1311 u8 address_byte_3,
1308 u8 address_byte_4, 1312 u8 address_byte_4,
1309 u8 address_byte_5, 1313 u8 address_byte_5,
1310 volatile u32 *macstnaddr1_register, 1314 u32 __iomem *macstnaddr1_register,
1311 volatile u32 *macstnaddr2_register) 1315 u32 __iomem *macstnaddr2_register)
1312{ 1316{
1313 u32 value = 0; 1317 u32 value = 0;
1314 1318
@@ -1344,7 +1348,7 @@ static int init_mac_station_addr_regs(u8 address_byte_0,
1344} 1348}
1345 1349
1346static int init_check_frame_length_mode(int length_check, 1350static int init_check_frame_length_mode(int length_check,
1347 volatile u32 *maccfg2_register) 1351 u32 __iomem *maccfg2_register)
1348{ 1352{
1349 u32 value = 0; 1353 u32 value = 0;
1350 1354
@@ -1360,7 +1364,7 @@ static int init_check_frame_length_mode(int length_check,
1360} 1364}
1361 1365
1362static int init_preamble_length(u8 preamble_length, 1366static int init_preamble_length(u8 preamble_length,
1363 volatile u32 *maccfg2_register) 1367 u32 __iomem *maccfg2_register)
1364{ 1368{
1365 u32 value = 0; 1369 u32 value = 0;
1366 1370
@@ -1376,7 +1380,7 @@ static int init_preamble_length(u8 preamble_length,
1376 1380
1377static int init_rx_parameters(int reject_broadcast, 1381static int init_rx_parameters(int reject_broadcast,
1378 int receive_short_frames, 1382 int receive_short_frames,
1379 int promiscuous, volatile u32 *upsmr_register) 1383 int promiscuous, u32 __iomem *upsmr_register)
1380{ 1384{
1381 u32 value = 0; 1385 u32 value = 0;
1382 1386
@@ -1403,7 +1407,7 @@ static int init_rx_parameters(int reject_broadcast,
1403} 1407}
1404 1408
1405static int init_max_rx_buff_len(u16 max_rx_buf_len, 1409static int init_max_rx_buff_len(u16 max_rx_buf_len,
1406 volatile u16 *mrblr_register) 1410 u16 __iomem *mrblr_register)
1407{ 1411{
1408 /* max_rx_buf_len value must be a multiple of 128 */ 1412 /* max_rx_buf_len value must be a multiple of 128 */
1409 if ((max_rx_buf_len == 0) 1413 if ((max_rx_buf_len == 0)
@@ -1415,8 +1419,8 @@ static int init_max_rx_buff_len(u16 max_rx_buf_len,
1415} 1419}
1416 1420
1417static int init_min_frame_len(u16 min_frame_length, 1421static int init_min_frame_len(u16 min_frame_length,
1418 volatile u16 *minflr_register, 1422 u16 __iomem *minflr_register,
1419 volatile u16 *mrblr_register) 1423 u16 __iomem *mrblr_register)
1420{ 1424{
1421 u16 mrblr_value = 0; 1425 u16 mrblr_value = 0;
1422 1426
@@ -1431,8 +1435,8 @@ static int init_min_frame_len(u16 min_frame_length,
1431static int adjust_enet_interface(struct ucc_geth_private *ugeth) 1435static int adjust_enet_interface(struct ucc_geth_private *ugeth)
1432{ 1436{
1433 struct ucc_geth_info *ug_info; 1437 struct ucc_geth_info *ug_info;
1434 struct ucc_geth *ug_regs; 1438 struct ucc_geth __iomem *ug_regs;
1435 struct ucc_fast *uf_regs; 1439 struct ucc_fast __iomem *uf_regs;
1436 int ret_val; 1440 int ret_val;
1437 u32 upsmr, maccfg2, tbiBaseAddress; 1441 u32 upsmr, maccfg2, tbiBaseAddress;
1438 u16 value; 1442 u16 value;
@@ -1517,8 +1521,8 @@ static int adjust_enet_interface(struct ucc_geth_private *ugeth)
1517static void adjust_link(struct net_device *dev) 1521static void adjust_link(struct net_device *dev)
1518{ 1522{
1519 struct ucc_geth_private *ugeth = netdev_priv(dev); 1523 struct ucc_geth_private *ugeth = netdev_priv(dev);
1520 struct ucc_geth *ug_regs; 1524 struct ucc_geth __iomem *ug_regs;
1521 struct ucc_fast *uf_regs; 1525 struct ucc_fast __iomem *uf_regs;
1522 struct phy_device *phydev = ugeth->phydev; 1526 struct phy_device *phydev = ugeth->phydev;
1523 unsigned long flags; 1527 unsigned long flags;
1524 int new_state = 0; 1528 int new_state = 0;
@@ -1678,9 +1682,9 @@ static int ugeth_graceful_stop_rx(struct ucc_geth_private * ugeth)
1678 uccf = ugeth->uccf; 1682 uccf = ugeth->uccf;
1679 1683
1680 /* Clear acknowledge bit */ 1684 /* Clear acknowledge bit */
1681 temp = ugeth->p_rx_glbl_pram->rxgstpack; 1685 temp = in_8(&ugeth->p_rx_glbl_pram->rxgstpack);
1682 temp &= ~GRACEFUL_STOP_ACKNOWLEDGE_RX; 1686 temp &= ~GRACEFUL_STOP_ACKNOWLEDGE_RX;
1683 ugeth->p_rx_glbl_pram->rxgstpack = temp; 1687 out_8(&ugeth->p_rx_glbl_pram->rxgstpack, temp);
1684 1688
1685 /* Keep issuing command and checking acknowledge bit until 1689 /* Keep issuing command and checking acknowledge bit until
1686 it is asserted, according to spec */ 1690 it is asserted, according to spec */
@@ -1692,7 +1696,7 @@ static int ugeth_graceful_stop_rx(struct ucc_geth_private * ugeth)
1692 qe_issue_cmd(QE_GRACEFUL_STOP_RX, cecr_subblock, 1696 qe_issue_cmd(QE_GRACEFUL_STOP_RX, cecr_subblock,
1693 QE_CR_PROTOCOL_ETHERNET, 0); 1697 QE_CR_PROTOCOL_ETHERNET, 0);
1694 1698
1695 temp = ugeth->p_rx_glbl_pram->rxgstpack; 1699 temp = in_8(&ugeth->p_rx_glbl_pram->rxgstpack);
1696 } while (!(temp & GRACEFUL_STOP_ACKNOWLEDGE_RX)); 1700 } while (!(temp & GRACEFUL_STOP_ACKNOWLEDGE_RX));
1697 1701
1698 uccf->stopped_rx = 1; 1702 uccf->stopped_rx = 1;
@@ -1991,19 +1995,20 @@ static int ugeth_82xx_filtering_clear_all_addr_in_hash(struct ucc_geth_private *
1991 enum enet_addr_type 1995 enum enet_addr_type
1992 enet_addr_type) 1996 enet_addr_type)
1993{ 1997{
1994 struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; 1998 struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt;
1995 struct ucc_fast_private *uccf; 1999 struct ucc_fast_private *uccf;
1996 enum comm_dir comm_dir; 2000 enum comm_dir comm_dir;
1997 struct list_head *p_lh; 2001 struct list_head *p_lh;
1998 u16 i, num; 2002 u16 i, num;
1999 u32 *addr_h, *addr_l; 2003 u32 __iomem *addr_h;
2004 u32 __iomem *addr_l;
2000 u8 *p_counter; 2005 u8 *p_counter;
2001 2006
2002 uccf = ugeth->uccf; 2007 uccf = ugeth->uccf;
2003 2008
2004 p_82xx_addr_filt = 2009 p_82xx_addr_filt =
2005 (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> 2010 (struct ucc_geth_82xx_address_filtering_pram __iomem *)
2006 addressfiltering; 2011 ugeth->p_rx_glbl_pram->addressfiltering;
2007 2012
2008 if (enet_addr_type == ENET_ADDR_TYPE_GROUP) { 2013 if (enet_addr_type == ENET_ADDR_TYPE_GROUP) {
2009 addr_h = &(p_82xx_addr_filt->gaddr_h); 2014 addr_h = &(p_82xx_addr_filt->gaddr_h);
@@ -2079,7 +2084,7 @@ static int ugeth_82xx_filtering_clear_addr_in_paddr(struct ucc_geth_private *uge
2079static void ucc_geth_memclean(struct ucc_geth_private *ugeth) 2084static void ucc_geth_memclean(struct ucc_geth_private *ugeth)
2080{ 2085{
2081 u16 i, j; 2086 u16 i, j;
2082 u8 *bd; 2087 u8 __iomem *bd;
2083 2088
2084 if (!ugeth) 2089 if (!ugeth)
2085 return; 2090 return;
@@ -2154,8 +2159,8 @@ static void ucc_geth_memclean(struct ucc_geth_private *ugeth)
2154 for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) { 2159 for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) {
2155 if (ugeth->tx_skbuff[i][j]) { 2160 if (ugeth->tx_skbuff[i][j]) {
2156 dma_unmap_single(NULL, 2161 dma_unmap_single(NULL,
2157 ((struct qe_bd *)bd)->buf, 2162 in_be32(&((struct qe_bd __iomem *)bd)->buf),
2158 (in_be32((u32 *)bd) & 2163 (in_be32((u32 __iomem *)bd) &
2159 BD_LENGTH_MASK), 2164 BD_LENGTH_MASK),
2160 DMA_TO_DEVICE); 2165 DMA_TO_DEVICE);
2161 dev_kfree_skb_any(ugeth->tx_skbuff[i][j]); 2166 dev_kfree_skb_any(ugeth->tx_skbuff[i][j]);
@@ -2182,7 +2187,7 @@ static void ucc_geth_memclean(struct ucc_geth_private *ugeth)
2182 for (j = 0; j < ugeth->ug_info->bdRingLenRx[i]; j++) { 2187 for (j = 0; j < ugeth->ug_info->bdRingLenRx[i]; j++) {
2183 if (ugeth->rx_skbuff[i][j]) { 2188 if (ugeth->rx_skbuff[i][j]) {
2184 dma_unmap_single(NULL, 2189 dma_unmap_single(NULL,
2185 ((struct qe_bd *)bd)->buf, 2190 in_be32(&((struct qe_bd __iomem *)bd)->buf),
2186 ugeth->ug_info-> 2191 ugeth->ug_info->
2187 uf_info.max_rx_buf_length + 2192 uf_info.max_rx_buf_length +
2188 UCC_GETH_RX_DATA_BUF_ALIGNMENT, 2193 UCC_GETH_RX_DATA_BUF_ALIGNMENT,
@@ -2218,8 +2223,8 @@ static void ucc_geth_set_multi(struct net_device *dev)
2218{ 2223{
2219 struct ucc_geth_private *ugeth; 2224 struct ucc_geth_private *ugeth;
2220 struct dev_mc_list *dmi; 2225 struct dev_mc_list *dmi;
2221 struct ucc_fast *uf_regs; 2226 struct ucc_fast __iomem *uf_regs;
2222 struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; 2227 struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt;
2223 int i; 2228 int i;
2224 2229
2225 ugeth = netdev_priv(dev); 2230 ugeth = netdev_priv(dev);
@@ -2228,14 +2233,14 @@ static void ucc_geth_set_multi(struct net_device *dev)
2228 2233
2229 if (dev->flags & IFF_PROMISC) { 2234 if (dev->flags & IFF_PROMISC) {
2230 2235
2231 uf_regs->upsmr |= UPSMR_PRO; 2236 out_be32(&uf_regs->upsmr, in_be32(&uf_regs->upsmr) | UPSMR_PRO);
2232 2237
2233 } else { 2238 } else {
2234 2239
2235 uf_regs->upsmr &= ~UPSMR_PRO; 2240 out_be32(&uf_regs->upsmr, in_be32(&uf_regs->upsmr)&~UPSMR_PRO);
2236 2241
2237 p_82xx_addr_filt = 2242 p_82xx_addr_filt =
2238 (struct ucc_geth_82xx_address_filtering_pram *) ugeth-> 2243 (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth->
2239 p_rx_glbl_pram->addressfiltering; 2244 p_rx_glbl_pram->addressfiltering;
2240 2245
2241 if (dev->flags & IFF_ALLMULTI) { 2246 if (dev->flags & IFF_ALLMULTI) {
@@ -2270,7 +2275,7 @@ static void ucc_geth_set_multi(struct net_device *dev)
2270 2275
2271static void ucc_geth_stop(struct ucc_geth_private *ugeth) 2276static void ucc_geth_stop(struct ucc_geth_private *ugeth)
2272{ 2277{
2273 struct ucc_geth *ug_regs = ugeth->ug_regs; 2278 struct ucc_geth __iomem *ug_regs = ugeth->ug_regs;
2274 struct phy_device *phydev = ugeth->phydev; 2279 struct phy_device *phydev = ugeth->phydev;
2275 u32 tempval; 2280 u32 tempval;
2276 2281
@@ -2419,20 +2424,20 @@ static int ucc_struct_init(struct ucc_geth_private *ugeth)
2419 return -ENOMEM; 2424 return -ENOMEM;
2420 } 2425 }
2421 2426
2422 ugeth->ug_regs = (struct ucc_geth *) ioremap(uf_info->regs, sizeof(struct ucc_geth)); 2427 ugeth->ug_regs = (struct ucc_geth __iomem *) ioremap(uf_info->regs, sizeof(struct ucc_geth));
2423 2428
2424 return 0; 2429 return 0;
2425} 2430}
2426 2431
2427static int ucc_geth_startup(struct ucc_geth_private *ugeth) 2432static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2428{ 2433{
2429 struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; 2434 struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt;
2430 struct ucc_geth_init_pram *p_init_enet_pram; 2435 struct ucc_geth_init_pram __iomem *p_init_enet_pram;
2431 struct ucc_fast_private *uccf; 2436 struct ucc_fast_private *uccf;
2432 struct ucc_geth_info *ug_info; 2437 struct ucc_geth_info *ug_info;
2433 struct ucc_fast_info *uf_info; 2438 struct ucc_fast_info *uf_info;
2434 struct ucc_fast *uf_regs; 2439 struct ucc_fast __iomem *uf_regs;
2435 struct ucc_geth *ug_regs; 2440 struct ucc_geth __iomem *ug_regs;
2436 int ret_val = -EINVAL; 2441 int ret_val = -EINVAL;
2437 u32 remoder = UCC_GETH_REMODER_INIT; 2442 u32 remoder = UCC_GETH_REMODER_INIT;
2438 u32 init_enet_pram_offset, cecr_subblock, command, maccfg1; 2443 u32 init_enet_pram_offset, cecr_subblock, command, maccfg1;
@@ -2440,7 +2445,8 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2440 u16 temoder = UCC_GETH_TEMODER_INIT; 2445 u16 temoder = UCC_GETH_TEMODER_INIT;
2441 u16 test; 2446 u16 test;
2442 u8 function_code = 0; 2447 u8 function_code = 0;
2443 u8 *bd, *endOfRing; 2448 u8 __iomem *bd;
2449 u8 __iomem *endOfRing;
2444 u8 numThreadsRxNumerical, numThreadsTxNumerical; 2450 u8 numThreadsRxNumerical, numThreadsTxNumerical;
2445 2451
2446 ugeth_vdbg("%s: IN", __FUNCTION__); 2452 ugeth_vdbg("%s: IN", __FUNCTION__);
@@ -2602,11 +2608,11 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2602 if (UCC_GETH_TX_BD_RING_ALIGNMENT > 4) 2608 if (UCC_GETH_TX_BD_RING_ALIGNMENT > 4)
2603 align = UCC_GETH_TX_BD_RING_ALIGNMENT; 2609 align = UCC_GETH_TX_BD_RING_ALIGNMENT;
2604 ugeth->tx_bd_ring_offset[j] = 2610 ugeth->tx_bd_ring_offset[j] =
2605 kmalloc((u32) (length + align), GFP_KERNEL); 2611 (u32) kmalloc((u32) (length + align), GFP_KERNEL);
2606 2612
2607 if (ugeth->tx_bd_ring_offset[j] != 0) 2613 if (ugeth->tx_bd_ring_offset[j] != 0)
2608 ugeth->p_tx_bd_ring[j] = 2614 ugeth->p_tx_bd_ring[j] =
2609 (void*)((ugeth->tx_bd_ring_offset[j] + 2615 (u8 __iomem *)((ugeth->tx_bd_ring_offset[j] +
2610 align) & ~(align - 1)); 2616 align) & ~(align - 1));
2611 } else if (uf_info->bd_mem_part == MEM_PART_MURAM) { 2617 } else if (uf_info->bd_mem_part == MEM_PART_MURAM) {
2612 ugeth->tx_bd_ring_offset[j] = 2618 ugeth->tx_bd_ring_offset[j] =
@@ -2614,7 +2620,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2614 UCC_GETH_TX_BD_RING_ALIGNMENT); 2620 UCC_GETH_TX_BD_RING_ALIGNMENT);
2615 if (!IS_ERR_VALUE(ugeth->tx_bd_ring_offset[j])) 2621 if (!IS_ERR_VALUE(ugeth->tx_bd_ring_offset[j]))
2616 ugeth->p_tx_bd_ring[j] = 2622 ugeth->p_tx_bd_ring[j] =
2617 (u8 *) qe_muram_addr(ugeth-> 2623 (u8 __iomem *) qe_muram_addr(ugeth->
2618 tx_bd_ring_offset[j]); 2624 tx_bd_ring_offset[j]);
2619 } 2625 }
2620 if (!ugeth->p_tx_bd_ring[j]) { 2626 if (!ugeth->p_tx_bd_ring[j]) {
@@ -2626,8 +2632,8 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2626 return -ENOMEM; 2632 return -ENOMEM;
2627 } 2633 }
2628 /* Zero unused end of bd ring, according to spec */ 2634 /* Zero unused end of bd ring, according to spec */
2629 memset(ugeth->p_tx_bd_ring[j] + 2635 memset_io((void __iomem *)(ugeth->p_tx_bd_ring[j] +
2630 ug_info->bdRingLenTx[j] * sizeof(struct qe_bd), 0, 2636 ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)), 0,
2631 length - ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)); 2637 length - ug_info->bdRingLenTx[j] * sizeof(struct qe_bd));
2632 } 2638 }
2633 2639
@@ -2639,10 +2645,10 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2639 if (UCC_GETH_RX_BD_RING_ALIGNMENT > 4) 2645 if (UCC_GETH_RX_BD_RING_ALIGNMENT > 4)
2640 align = UCC_GETH_RX_BD_RING_ALIGNMENT; 2646 align = UCC_GETH_RX_BD_RING_ALIGNMENT;
2641 ugeth->rx_bd_ring_offset[j] = 2647 ugeth->rx_bd_ring_offset[j] =
2642 kmalloc((u32) (length + align), GFP_KERNEL); 2648 (u32) kmalloc((u32) (length + align), GFP_KERNEL);
2643 if (ugeth->rx_bd_ring_offset[j] != 0) 2649 if (ugeth->rx_bd_ring_offset[j] != 0)
2644 ugeth->p_rx_bd_ring[j] = 2650 ugeth->p_rx_bd_ring[j] =
2645 (void*)((ugeth->rx_bd_ring_offset[j] + 2651 (u8 __iomem *)((ugeth->rx_bd_ring_offset[j] +
2646 align) & ~(align - 1)); 2652 align) & ~(align - 1));
2647 } else if (uf_info->bd_mem_part == MEM_PART_MURAM) { 2653 } else if (uf_info->bd_mem_part == MEM_PART_MURAM) {
2648 ugeth->rx_bd_ring_offset[j] = 2654 ugeth->rx_bd_ring_offset[j] =
@@ -2650,7 +2656,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2650 UCC_GETH_RX_BD_RING_ALIGNMENT); 2656 UCC_GETH_RX_BD_RING_ALIGNMENT);
2651 if (!IS_ERR_VALUE(ugeth->rx_bd_ring_offset[j])) 2657 if (!IS_ERR_VALUE(ugeth->rx_bd_ring_offset[j]))
2652 ugeth->p_rx_bd_ring[j] = 2658 ugeth->p_rx_bd_ring[j] =
2653 (u8 *) qe_muram_addr(ugeth-> 2659 (u8 __iomem *) qe_muram_addr(ugeth->
2654 rx_bd_ring_offset[j]); 2660 rx_bd_ring_offset[j]);
2655 } 2661 }
2656 if (!ugeth->p_rx_bd_ring[j]) { 2662 if (!ugeth->p_rx_bd_ring[j]) {
@@ -2685,14 +2691,14 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2685 bd = ugeth->confBd[j] = ugeth->txBd[j] = ugeth->p_tx_bd_ring[j]; 2691 bd = ugeth->confBd[j] = ugeth->txBd[j] = ugeth->p_tx_bd_ring[j];
2686 for (i = 0; i < ug_info->bdRingLenTx[j]; i++) { 2692 for (i = 0; i < ug_info->bdRingLenTx[j]; i++) {
2687 /* clear bd buffer */ 2693 /* clear bd buffer */
2688 out_be32(&((struct qe_bd *)bd)->buf, 0); 2694 out_be32(&((struct qe_bd __iomem *)bd)->buf, 0);
2689 /* set bd status and length */ 2695 /* set bd status and length */
2690 out_be32((u32 *)bd, 0); 2696 out_be32((u32 __iomem *)bd, 0);
2691 bd += sizeof(struct qe_bd); 2697 bd += sizeof(struct qe_bd);
2692 } 2698 }
2693 bd -= sizeof(struct qe_bd); 2699 bd -= sizeof(struct qe_bd);
2694 /* set bd status and length */ 2700 /* set bd status and length */
2695 out_be32((u32 *)bd, T_W); /* for last BD set Wrap bit */ 2701 out_be32((u32 __iomem *)bd, T_W); /* for last BD set Wrap bit */
2696 } 2702 }
2697 2703
2698 /* Init Rx bds */ 2704 /* Init Rx bds */
@@ -2717,14 +2723,14 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2717 bd = ugeth->rxBd[j] = ugeth->p_rx_bd_ring[j]; 2723 bd = ugeth->rxBd[j] = ugeth->p_rx_bd_ring[j];
2718 for (i = 0; i < ug_info->bdRingLenRx[j]; i++) { 2724 for (i = 0; i < ug_info->bdRingLenRx[j]; i++) {
2719 /* set bd status and length */ 2725 /* set bd status and length */
2720 out_be32((u32 *)bd, R_I); 2726 out_be32((u32 __iomem *)bd, R_I);
2721 /* clear bd buffer */ 2727 /* clear bd buffer */
2722 out_be32(&((struct qe_bd *)bd)->buf, 0); 2728 out_be32(&((struct qe_bd __iomem *)bd)->buf, 0);
2723 bd += sizeof(struct qe_bd); 2729 bd += sizeof(struct qe_bd);
2724 } 2730 }
2725 bd -= sizeof(struct qe_bd); 2731 bd -= sizeof(struct qe_bd);
2726 /* set bd status and length */ 2732 /* set bd status and length */
2727 out_be32((u32 *)bd, R_W); /* for last BD set Wrap bit */ 2733 out_be32((u32 __iomem *)bd, R_W); /* for last BD set Wrap bit */
2728 } 2734 }
2729 2735
2730 /* 2736 /*
@@ -2744,10 +2750,10 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2744 return -ENOMEM; 2750 return -ENOMEM;
2745 } 2751 }
2746 ugeth->p_tx_glbl_pram = 2752 ugeth->p_tx_glbl_pram =
2747 (struct ucc_geth_tx_global_pram *) qe_muram_addr(ugeth-> 2753 (struct ucc_geth_tx_global_pram __iomem *) qe_muram_addr(ugeth->
2748 tx_glbl_pram_offset); 2754 tx_glbl_pram_offset);
2749 /* Zero out p_tx_glbl_pram */ 2755 /* Zero out p_tx_glbl_pram */
2750 memset(ugeth->p_tx_glbl_pram, 0, sizeof(struct ucc_geth_tx_global_pram)); 2756 memset_io((void __iomem *)ugeth->p_tx_glbl_pram, 0, sizeof(struct ucc_geth_tx_global_pram));
2751 2757
2752 /* Fill global PRAM */ 2758 /* Fill global PRAM */
2753 2759
@@ -2768,7 +2774,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2768 } 2774 }
2769 2775
2770 ugeth->p_thread_data_tx = 2776 ugeth->p_thread_data_tx =
2771 (struct ucc_geth_thread_data_tx *) qe_muram_addr(ugeth-> 2777 (struct ucc_geth_thread_data_tx __iomem *) qe_muram_addr(ugeth->
2772 thread_dat_tx_offset); 2778 thread_dat_tx_offset);
2773 out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset); 2779 out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset);
2774 2780
@@ -2779,7 +2785,8 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2779 2785
2780 /* iphoffset */ 2786 /* iphoffset */
2781 for (i = 0; i < TX_IP_OFFSET_ENTRY_MAX; i++) 2787 for (i = 0; i < TX_IP_OFFSET_ENTRY_MAX; i++)
2782 ugeth->p_tx_glbl_pram->iphoffset[i] = ug_info->iphoffset[i]; 2788 out_8(&ugeth->p_tx_glbl_pram->iphoffset[i],
2789 ug_info->iphoffset[i]);
2783 2790
2784 /* SQPTR */ 2791 /* SQPTR */
2785 /* Size varies with number of Tx queues */ 2792 /* Size varies with number of Tx queues */
@@ -2797,7 +2804,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2797 } 2804 }
2798 2805
2799 ugeth->p_send_q_mem_reg = 2806 ugeth->p_send_q_mem_reg =
2800 (struct ucc_geth_send_queue_mem_region *) qe_muram_addr(ugeth-> 2807 (struct ucc_geth_send_queue_mem_region __iomem *) qe_muram_addr(ugeth->
2801 send_q_mem_reg_offset); 2808 send_q_mem_reg_offset);
2802 out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset); 2809 out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset);
2803 2810
@@ -2841,25 +2848,26 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2841 } 2848 }
2842 2849
2843 ugeth->p_scheduler = 2850 ugeth->p_scheduler =
2844 (struct ucc_geth_scheduler *) qe_muram_addr(ugeth-> 2851 (struct ucc_geth_scheduler __iomem *) qe_muram_addr(ugeth->
2845 scheduler_offset); 2852 scheduler_offset);
2846 out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer, 2853 out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer,
2847 ugeth->scheduler_offset); 2854 ugeth->scheduler_offset);
2848 /* Zero out p_scheduler */ 2855 /* Zero out p_scheduler */
2849 memset(ugeth->p_scheduler, 0, sizeof(struct ucc_geth_scheduler)); 2856 memset_io((void __iomem *)ugeth->p_scheduler, 0, sizeof(struct ucc_geth_scheduler));
2850 2857
2851 /* Set values in scheduler */ 2858 /* Set values in scheduler */
2852 out_be32(&ugeth->p_scheduler->mblinterval, 2859 out_be32(&ugeth->p_scheduler->mblinterval,
2853 ug_info->mblinterval); 2860 ug_info->mblinterval);
2854 out_be16(&ugeth->p_scheduler->nortsrbytetime, 2861 out_be16(&ugeth->p_scheduler->nortsrbytetime,
2855 ug_info->nortsrbytetime); 2862 ug_info->nortsrbytetime);
2856 ugeth->p_scheduler->fracsiz = ug_info->fracsiz; 2863 out_8(&ugeth->p_scheduler->fracsiz, ug_info->fracsiz);
2857 ugeth->p_scheduler->strictpriorityq = ug_info->strictpriorityq; 2864 out_8(&ugeth->p_scheduler->strictpriorityq,
2858 ugeth->p_scheduler->txasap = ug_info->txasap; 2865 ug_info->strictpriorityq);
2859 ugeth->p_scheduler->extrabw = ug_info->extrabw; 2866 out_8(&ugeth->p_scheduler->txasap, ug_info->txasap);
2867 out_8(&ugeth->p_scheduler->extrabw, ug_info->extrabw);
2860 for (i = 0; i < NUM_TX_QUEUES; i++) 2868 for (i = 0; i < NUM_TX_QUEUES; i++)
2861 ugeth->p_scheduler->weightfactor[i] = 2869 out_8(&ugeth->p_scheduler->weightfactor[i],
2862 ug_info->weightfactor[i]; 2870 ug_info->weightfactor[i]);
2863 2871
2864 /* Set pointers to cpucount registers in scheduler */ 2872 /* Set pointers to cpucount registers in scheduler */
2865 ugeth->p_cpucount[0] = &(ugeth->p_scheduler->cpucount0); 2873 ugeth->p_cpucount[0] = &(ugeth->p_scheduler->cpucount0);
@@ -2890,10 +2898,10 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2890 return -ENOMEM; 2898 return -ENOMEM;
2891 } 2899 }
2892 ugeth->p_tx_fw_statistics_pram = 2900 ugeth->p_tx_fw_statistics_pram =
2893 (struct ucc_geth_tx_firmware_statistics_pram *) 2901 (struct ucc_geth_tx_firmware_statistics_pram __iomem *)
2894 qe_muram_addr(ugeth->tx_fw_statistics_pram_offset); 2902 qe_muram_addr(ugeth->tx_fw_statistics_pram_offset);
2895 /* Zero out p_tx_fw_statistics_pram */ 2903 /* Zero out p_tx_fw_statistics_pram */
2896 memset(ugeth->p_tx_fw_statistics_pram, 2904 memset_io((void __iomem *)ugeth->p_tx_fw_statistics_pram,
2897 0, sizeof(struct ucc_geth_tx_firmware_statistics_pram)); 2905 0, sizeof(struct ucc_geth_tx_firmware_statistics_pram));
2898 } 2906 }
2899 2907
@@ -2930,10 +2938,10 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2930 return -ENOMEM; 2938 return -ENOMEM;
2931 } 2939 }
2932 ugeth->p_rx_glbl_pram = 2940 ugeth->p_rx_glbl_pram =
2933 (struct ucc_geth_rx_global_pram *) qe_muram_addr(ugeth-> 2941 (struct ucc_geth_rx_global_pram __iomem *) qe_muram_addr(ugeth->
2934 rx_glbl_pram_offset); 2942 rx_glbl_pram_offset);
2935 /* Zero out p_rx_glbl_pram */ 2943 /* Zero out p_rx_glbl_pram */
2936 memset(ugeth->p_rx_glbl_pram, 0, sizeof(struct ucc_geth_rx_global_pram)); 2944 memset_io((void __iomem *)ugeth->p_rx_glbl_pram, 0, sizeof(struct ucc_geth_rx_global_pram));
2937 2945
2938 /* Fill global PRAM */ 2946 /* Fill global PRAM */
2939 2947
@@ -2953,7 +2961,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2953 } 2961 }
2954 2962
2955 ugeth->p_thread_data_rx = 2963 ugeth->p_thread_data_rx =
2956 (struct ucc_geth_thread_data_rx *) qe_muram_addr(ugeth-> 2964 (struct ucc_geth_thread_data_rx __iomem *) qe_muram_addr(ugeth->
2957 thread_dat_rx_offset); 2965 thread_dat_rx_offset);
2958 out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset); 2966 out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset);
2959 2967
@@ -2976,10 +2984,10 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2976 return -ENOMEM; 2984 return -ENOMEM;
2977 } 2985 }
2978 ugeth->p_rx_fw_statistics_pram = 2986 ugeth->p_rx_fw_statistics_pram =
2979 (struct ucc_geth_rx_firmware_statistics_pram *) 2987 (struct ucc_geth_rx_firmware_statistics_pram __iomem *)
2980 qe_muram_addr(ugeth->rx_fw_statistics_pram_offset); 2988 qe_muram_addr(ugeth->rx_fw_statistics_pram_offset);
2981 /* Zero out p_rx_fw_statistics_pram */ 2989 /* Zero out p_rx_fw_statistics_pram */
2982 memset(ugeth->p_rx_fw_statistics_pram, 0, 2990 memset_io((void __iomem *)ugeth->p_rx_fw_statistics_pram, 0,
2983 sizeof(struct ucc_geth_rx_firmware_statistics_pram)); 2991 sizeof(struct ucc_geth_rx_firmware_statistics_pram));
2984 } 2992 }
2985 2993
@@ -3000,7 +3008,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
3000 } 3008 }
3001 3009
3002 ugeth->p_rx_irq_coalescing_tbl = 3010 ugeth->p_rx_irq_coalescing_tbl =
3003 (struct ucc_geth_rx_interrupt_coalescing_table *) 3011 (struct ucc_geth_rx_interrupt_coalescing_table __iomem *)
3004 qe_muram_addr(ugeth->rx_irq_coalescing_tbl_offset); 3012 qe_muram_addr(ugeth->rx_irq_coalescing_tbl_offset);
3005 out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr, 3013 out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr,
3006 ugeth->rx_irq_coalescing_tbl_offset); 3014 ugeth->rx_irq_coalescing_tbl_offset);
@@ -3069,11 +3077,11 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
3069 } 3077 }
3070 3078
3071 ugeth->p_rx_bd_qs_tbl = 3079 ugeth->p_rx_bd_qs_tbl =
3072 (struct ucc_geth_rx_bd_queues_entry *) qe_muram_addr(ugeth-> 3080 (struct ucc_geth_rx_bd_queues_entry __iomem *) qe_muram_addr(ugeth->
3073 rx_bd_qs_tbl_offset); 3081 rx_bd_qs_tbl_offset);
3074 out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset); 3082 out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset);
3075 /* Zero out p_rx_bd_qs_tbl */ 3083 /* Zero out p_rx_bd_qs_tbl */
3076 memset(ugeth->p_rx_bd_qs_tbl, 3084 memset_io((void __iomem *)ugeth->p_rx_bd_qs_tbl,
3077 0, 3085 0,
3078 ug_info->numQueuesRx * (sizeof(struct ucc_geth_rx_bd_queues_entry) + 3086 ug_info->numQueuesRx * (sizeof(struct ucc_geth_rx_bd_queues_entry) +
3079 sizeof(struct ucc_geth_rx_prefetched_bds))); 3087 sizeof(struct ucc_geth_rx_prefetched_bds)));
@@ -3133,7 +3141,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
3133 &ugeth->p_rx_glbl_pram->remoder); 3141 &ugeth->p_rx_glbl_pram->remoder);
3134 3142
3135 /* function code register */ 3143 /* function code register */
3136 ugeth->p_rx_glbl_pram->rstate = function_code; 3144 out_8(&ugeth->p_rx_glbl_pram->rstate, function_code);
3137 3145
3138 /* initialize extended filtering */ 3146 /* initialize extended filtering */
3139 if (ug_info->rxExtendedFiltering) { 3147 if (ug_info->rxExtendedFiltering) {
@@ -3160,7 +3168,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
3160 } 3168 }
3161 3169
3162 ugeth->p_exf_glbl_param = 3170 ugeth->p_exf_glbl_param =
3163 (struct ucc_geth_exf_global_pram *) qe_muram_addr(ugeth-> 3171 (struct ucc_geth_exf_global_pram __iomem *) qe_muram_addr(ugeth->
3164 exf_glbl_param_offset); 3172 exf_glbl_param_offset);
3165 out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam, 3173 out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam,
3166 ugeth->exf_glbl_param_offset); 3174 ugeth->exf_glbl_param_offset);
@@ -3175,7 +3183,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
3175 ugeth_82xx_filtering_clear_addr_in_paddr(ugeth, (u8) j); 3183 ugeth_82xx_filtering_clear_addr_in_paddr(ugeth, (u8) j);
3176 3184
3177 p_82xx_addr_filt = 3185 p_82xx_addr_filt =
3178 (struct ucc_geth_82xx_address_filtering_pram *) ugeth-> 3186 (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth->
3179 p_rx_glbl_pram->addressfiltering; 3187 p_rx_glbl_pram->addressfiltering;
3180 3188
3181 ugeth_82xx_filtering_clear_all_addr_in_hash(ugeth, 3189 ugeth_82xx_filtering_clear_all_addr_in_hash(ugeth,
@@ -3307,17 +3315,21 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
3307 return -ENOMEM; 3315 return -ENOMEM;
3308 } 3316 }
3309 p_init_enet_pram = 3317 p_init_enet_pram =
3310 (struct ucc_geth_init_pram *) qe_muram_addr(init_enet_pram_offset); 3318 (struct ucc_geth_init_pram __iomem *) qe_muram_addr(init_enet_pram_offset);
3311 3319
3312 /* Copy shadow InitEnet command parameter structure into PRAM */ 3320 /* Copy shadow InitEnet command parameter structure into PRAM */
3313 p_init_enet_pram->resinit1 = ugeth->p_init_enet_param_shadow->resinit1; 3321 out_8(&p_init_enet_pram->resinit1,
3314 p_init_enet_pram->resinit2 = ugeth->p_init_enet_param_shadow->resinit2; 3322 ugeth->p_init_enet_param_shadow->resinit1);
3315 p_init_enet_pram->resinit3 = ugeth->p_init_enet_param_shadow->resinit3; 3323 out_8(&p_init_enet_pram->resinit2,
3316 p_init_enet_pram->resinit4 = ugeth->p_init_enet_param_shadow->resinit4; 3324 ugeth->p_init_enet_param_shadow->resinit2);
3325 out_8(&p_init_enet_pram->resinit3,
3326 ugeth->p_init_enet_param_shadow->resinit3);
3327 out_8(&p_init_enet_pram->resinit4,
3328 ugeth->p_init_enet_param_shadow->resinit4);
3317 out_be16(&p_init_enet_pram->resinit5, 3329 out_be16(&p_init_enet_pram->resinit5,
3318 ugeth->p_init_enet_param_shadow->resinit5); 3330 ugeth->p_init_enet_param_shadow->resinit5);
3319 p_init_enet_pram->largestexternallookupkeysize = 3331 out_8(&p_init_enet_pram->largestexternallookupkeysize,
3320 ugeth->p_init_enet_param_shadow->largestexternallookupkeysize; 3332 ugeth->p_init_enet_param_shadow->largestexternallookupkeysize);
3321 out_be32(&p_init_enet_pram->rgftgfrxglobal, 3333 out_be32(&p_init_enet_pram->rgftgfrxglobal,
3322 ugeth->p_init_enet_param_shadow->rgftgfrxglobal); 3334 ugeth->p_init_enet_param_shadow->rgftgfrxglobal);
3323 for (i = 0; i < ENET_INIT_PARAM_MAX_ENTRIES_RX; i++) 3335 for (i = 0; i < ENET_INIT_PARAM_MAX_ENTRIES_RX; i++)
@@ -3371,7 +3383,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev)
3371#ifdef CONFIG_UGETH_TX_ON_DEMAND 3383#ifdef CONFIG_UGETH_TX_ON_DEMAND
3372 struct ucc_fast_private *uccf; 3384 struct ucc_fast_private *uccf;
3373#endif 3385#endif
3374 u8 *bd; /* BD pointer */ 3386 u8 __iomem *bd; /* BD pointer */
3375 u32 bd_status; 3387 u32 bd_status;
3376 u8 txQ = 0; 3388 u8 txQ = 0;
3377 3389
@@ -3383,7 +3395,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev)
3383 3395
3384 /* Start from the next BD that should be filled */ 3396 /* Start from the next BD that should be filled */
3385 bd = ugeth->txBd[txQ]; 3397 bd = ugeth->txBd[txQ];
3386 bd_status = in_be32((u32 *)bd); 3398 bd_status = in_be32((u32 __iomem *)bd);
3387 /* Save the skb pointer so we can free it later */ 3399 /* Save the skb pointer so we can free it later */
3388 ugeth->tx_skbuff[txQ][ugeth->skb_curtx[txQ]] = skb; 3400 ugeth->tx_skbuff[txQ][ugeth->skb_curtx[txQ]] = skb;
3389 3401
@@ -3393,7 +3405,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev)
3393 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]); 3405 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]);
3394 3406
3395 /* set up the buffer descriptor */ 3407 /* set up the buffer descriptor */
3396 out_be32(&((struct qe_bd *)bd)->buf, 3408 out_be32(&((struct qe_bd __iomem *)bd)->buf,
3397 dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE)); 3409 dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE));
3398 3410
3399 /* printk(KERN_DEBUG"skb->data is 0x%x\n",skb->data); */ 3411 /* printk(KERN_DEBUG"skb->data is 0x%x\n",skb->data); */
@@ -3401,7 +3413,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev)
3401 bd_status = (bd_status & T_W) | T_R | T_I | T_L | skb->len; 3413 bd_status = (bd_status & T_W) | T_R | T_I | T_L | skb->len;
3402 3414
3403 /* set bd status and length */ 3415 /* set bd status and length */
3404 out_be32((u32 *)bd, bd_status); 3416 out_be32((u32 __iomem *)bd, bd_status);
3405 3417
3406 dev->trans_start = jiffies; 3418 dev->trans_start = jiffies;
3407 3419
@@ -3441,7 +3453,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev)
3441static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit) 3453static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit)
3442{ 3454{
3443 struct sk_buff *skb; 3455 struct sk_buff *skb;
3444 u8 *bd; 3456 u8 __iomem *bd;
3445 u16 length, howmany = 0; 3457 u16 length, howmany = 0;
3446 u32 bd_status; 3458 u32 bd_status;
3447 u8 *bdBuffer; 3459 u8 *bdBuffer;
@@ -3454,11 +3466,11 @@ static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit
3454 /* collect received buffers */ 3466 /* collect received buffers */
3455 bd = ugeth->rxBd[rxQ]; 3467 bd = ugeth->rxBd[rxQ];
3456 3468
3457 bd_status = in_be32((u32 *)bd); 3469 bd_status = in_be32((u32 __iomem *)bd);
3458 3470
3459 /* while there are received buffers and BD is full (~R_E) */ 3471 /* while there are received buffers and BD is full (~R_E) */
3460 while (!((bd_status & (R_E)) || (--rx_work_limit < 0))) { 3472 while (!((bd_status & (R_E)) || (--rx_work_limit < 0))) {
3461 bdBuffer = (u8 *) in_be32(&((struct qe_bd *)bd)->buf); 3473 bdBuffer = (u8 *) in_be32(&((struct qe_bd __iomem *)bd)->buf);
3462 length = (u16) ((bd_status & BD_LENGTH_MASK) - 4); 3474 length = (u16) ((bd_status & BD_LENGTH_MASK) - 4);
3463 skb = ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]]; 3475 skb = ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]];
3464 3476
@@ -3516,7 +3528,7 @@ static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit
3516 else 3528 else
3517 bd += sizeof(struct qe_bd); 3529 bd += sizeof(struct qe_bd);
3518 3530
3519 bd_status = in_be32((u32 *)bd); 3531 bd_status = in_be32((u32 __iomem *)bd);
3520 } 3532 }
3521 3533
3522 ugeth->rxBd[rxQ] = bd; 3534 ugeth->rxBd[rxQ] = bd;
@@ -3527,11 +3539,11 @@ static int ucc_geth_tx(struct net_device *dev, u8 txQ)
3527{ 3539{
3528 /* Start from the next BD that should be filled */ 3540 /* Start from the next BD that should be filled */
3529 struct ucc_geth_private *ugeth = netdev_priv(dev); 3541 struct ucc_geth_private *ugeth = netdev_priv(dev);
3530 u8 *bd; /* BD pointer */ 3542 u8 __iomem *bd; /* BD pointer */
3531 u32 bd_status; 3543 u32 bd_status;
3532 3544
3533 bd = ugeth->confBd[txQ]; 3545 bd = ugeth->confBd[txQ];
3534 bd_status = in_be32((u32 *)bd); 3546 bd_status = in_be32((u32 __iomem *)bd);
3535 3547
3536 /* Normal processing. */ 3548 /* Normal processing. */
3537 while ((bd_status & T_R) == 0) { 3549 while ((bd_status & T_R) == 0) {
@@ -3561,7 +3573,7 @@ static int ucc_geth_tx(struct net_device *dev, u8 txQ)
3561 bd += sizeof(struct qe_bd); 3573 bd += sizeof(struct qe_bd);
3562 else 3574 else
3563 bd = ugeth->p_tx_bd_ring[txQ]; 3575 bd = ugeth->p_tx_bd_ring[txQ];
3564 bd_status = in_be32((u32 *)bd); 3576 bd_status = in_be32((u32 __iomem *)bd);
3565 } 3577 }
3566 ugeth->confBd[txQ] = bd; 3578 ugeth->confBd[txQ] = bd;
3567 return 0; 3579 return 0;
@@ -3910,7 +3922,7 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
3910 return -EINVAL; 3922 return -EINVAL;
3911 } 3923 }
3912 } else { 3924 } else {
3913 prop = of_get_property(np, "rx-clock", NULL); 3925 prop = of_get_property(np, "tx-clock", NULL);
3914 if (!prop) { 3926 if (!prop) {
3915 printk(KERN_ERR 3927 printk(KERN_ERR
3916 "ucc_geth: mising tx-clock-name property\n"); 3928 "ucc_geth: mising tx-clock-name property\n");
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index 9f8b7580a3a4..abc0e2242634 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -700,8 +700,8 @@ struct ucc_geth_82xx_address_filtering_pram {
700 u32 iaddr_l; /* individual address filter, low */ 700 u32 iaddr_l; /* individual address filter, low */
701 u32 gaddr_h; /* group address filter, high */ 701 u32 gaddr_h; /* group address filter, high */
702 u32 gaddr_l; /* group address filter, low */ 702 u32 gaddr_l; /* group address filter, low */
703 struct ucc_geth_82xx_enet_address taddr; 703 struct ucc_geth_82xx_enet_address __iomem taddr;
704 struct ucc_geth_82xx_enet_address paddr[NUM_OF_PADDRS]; 704 struct ucc_geth_82xx_enet_address __iomem paddr[NUM_OF_PADDRS];
705 u8 res0[0x40 - 0x38]; 705 u8 res0[0x40 - 0x38];
706} __attribute__ ((packed)); 706} __attribute__ ((packed));
707 707
@@ -1186,40 +1186,40 @@ struct ucc_geth_private {
1186 struct ucc_fast_private *uccf; 1186 struct ucc_fast_private *uccf;
1187 struct net_device *dev; 1187 struct net_device *dev;
1188 struct napi_struct napi; 1188 struct napi_struct napi;
1189 struct ucc_geth *ug_regs; 1189 struct ucc_geth __iomem *ug_regs;
1190 struct ucc_geth_init_pram *p_init_enet_param_shadow; 1190 struct ucc_geth_init_pram *p_init_enet_param_shadow;
1191 struct ucc_geth_exf_global_pram *p_exf_glbl_param; 1191 struct ucc_geth_exf_global_pram __iomem *p_exf_glbl_param;
1192 u32 exf_glbl_param_offset; 1192 u32 exf_glbl_param_offset;
1193 struct ucc_geth_rx_global_pram *p_rx_glbl_pram; 1193 struct ucc_geth_rx_global_pram __iomem *p_rx_glbl_pram;
1194 u32 rx_glbl_pram_offset; 1194 u32 rx_glbl_pram_offset;
1195 struct ucc_geth_tx_global_pram *p_tx_glbl_pram; 1195 struct ucc_geth_tx_global_pram __iomem *p_tx_glbl_pram;
1196 u32 tx_glbl_pram_offset; 1196 u32 tx_glbl_pram_offset;
1197 struct ucc_geth_send_queue_mem_region *p_send_q_mem_reg; 1197 struct ucc_geth_send_queue_mem_region __iomem *p_send_q_mem_reg;
1198 u32 send_q_mem_reg_offset; 1198 u32 send_q_mem_reg_offset;
1199 struct ucc_geth_thread_data_tx *p_thread_data_tx; 1199 struct ucc_geth_thread_data_tx __iomem *p_thread_data_tx;
1200 u32 thread_dat_tx_offset; 1200 u32 thread_dat_tx_offset;
1201 struct ucc_geth_thread_data_rx *p_thread_data_rx; 1201 struct ucc_geth_thread_data_rx __iomem *p_thread_data_rx;
1202 u32 thread_dat_rx_offset; 1202 u32 thread_dat_rx_offset;
1203 struct ucc_geth_scheduler *p_scheduler; 1203 struct ucc_geth_scheduler __iomem *p_scheduler;
1204 u32 scheduler_offset; 1204 u32 scheduler_offset;
1205 struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram; 1205 struct ucc_geth_tx_firmware_statistics_pram __iomem *p_tx_fw_statistics_pram;
1206 u32 tx_fw_statistics_pram_offset; 1206 u32 tx_fw_statistics_pram_offset;
1207 struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram; 1207 struct ucc_geth_rx_firmware_statistics_pram __iomem *p_rx_fw_statistics_pram;
1208 u32 rx_fw_statistics_pram_offset; 1208 u32 rx_fw_statistics_pram_offset;
1209 struct ucc_geth_rx_interrupt_coalescing_table *p_rx_irq_coalescing_tbl; 1209 struct ucc_geth_rx_interrupt_coalescing_table __iomem *p_rx_irq_coalescing_tbl;
1210 u32 rx_irq_coalescing_tbl_offset; 1210 u32 rx_irq_coalescing_tbl_offset;
1211 struct ucc_geth_rx_bd_queues_entry *p_rx_bd_qs_tbl; 1211 struct ucc_geth_rx_bd_queues_entry __iomem *p_rx_bd_qs_tbl;
1212 u32 rx_bd_qs_tbl_offset; 1212 u32 rx_bd_qs_tbl_offset;
1213 u8 *p_tx_bd_ring[NUM_TX_QUEUES]; 1213 u8 __iomem *p_tx_bd_ring[NUM_TX_QUEUES];
1214 u32 tx_bd_ring_offset[NUM_TX_QUEUES]; 1214 u32 tx_bd_ring_offset[NUM_TX_QUEUES];
1215 u8 *p_rx_bd_ring[NUM_RX_QUEUES]; 1215 u8 __iomem *p_rx_bd_ring[NUM_RX_QUEUES];
1216 u32 rx_bd_ring_offset[NUM_RX_QUEUES]; 1216 u32 rx_bd_ring_offset[NUM_RX_QUEUES];
1217 u8 *confBd[NUM_TX_QUEUES]; 1217 u8 __iomem *confBd[NUM_TX_QUEUES];
1218 u8 *txBd[NUM_TX_QUEUES]; 1218 u8 __iomem *txBd[NUM_TX_QUEUES];
1219 u8 *rxBd[NUM_RX_QUEUES]; 1219 u8 __iomem *rxBd[NUM_RX_QUEUES];
1220 int badFrame[NUM_RX_QUEUES]; 1220 int badFrame[NUM_RX_QUEUES];
1221 u16 cpucount[NUM_TX_QUEUES]; 1221 u16 cpucount[NUM_TX_QUEUES];
1222 volatile u16 *p_cpucount[NUM_TX_QUEUES]; 1222 u16 __iomem *p_cpucount[NUM_TX_QUEUES];
1223 int indAddrRegUsed[NUM_OF_PADDRS]; 1223 int indAddrRegUsed[NUM_OF_PADDRS];
1224 u8 paddr[NUM_OF_PADDRS][ENET_NUM_OCTETS_PER_ADDRESS]; /* ethernet address */ 1224 u8 paddr[NUM_OF_PADDRS][ENET_NUM_OCTETS_PER_ADDRESS]; /* ethernet address */
1225 u8 numGroupAddrInHash; 1225 u8 numGroupAddrInHash;
@@ -1251,4 +1251,12 @@ struct ucc_geth_private {
1251 int oldlink; 1251 int oldlink;
1252}; 1252};
1253 1253
1254void uec_set_ethtool_ops(struct net_device *netdev);
1255int init_flow_control_params(u32 automatic_flow_control_mode,
1256 int rx_flow_control_enable, int tx_flow_control_enable,
1257 u16 pause_period, u16 extension_field,
1258 u32 __iomem *upsmr_register, u32 __iomem *uempr_register,
1259 u32 __iomem *maccfg1_register);
1260
1261
1254#endif /* __UCC_GETH_H__ */ 1262#endif /* __UCC_GETH_H__ */
diff --git a/drivers/net/ucc_geth_ethtool.c b/drivers/net/ucc_geth_ethtool.c
index 9a9622c13e2b..299b7f176950 100644
--- a/drivers/net/ucc_geth_ethtool.c
+++ b/drivers/net/ucc_geth_ethtool.c
@@ -108,12 +108,6 @@ static char rx_fw_stat_gstrings[][ETH_GSTRING_LEN] = {
108#define UEC_TX_FW_STATS_LEN ARRAY_SIZE(tx_fw_stat_gstrings) 108#define UEC_TX_FW_STATS_LEN ARRAY_SIZE(tx_fw_stat_gstrings)
109#define UEC_RX_FW_STATS_LEN ARRAY_SIZE(rx_fw_stat_gstrings) 109#define UEC_RX_FW_STATS_LEN ARRAY_SIZE(rx_fw_stat_gstrings)
110 110
111extern int init_flow_control_params(u32 automatic_flow_control_mode,
112 int rx_flow_control_enable,
113 int tx_flow_control_enable, u16 pause_period,
114 u16 extension_field, volatile u32 *upsmr_register,
115 volatile u32 *uempr_register, volatile u32 *maccfg1_register);
116
117static int 111static int
118uec_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) 112uec_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
119{ 113{
diff --git a/drivers/net/ucc_geth_mii.c b/drivers/net/ucc_geth_mii.c
index 2af490781005..940474736922 100644
--- a/drivers/net/ucc_geth_mii.c
+++ b/drivers/net/ucc_geth_mii.c
@@ -104,7 +104,7 @@ int uec_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
104} 104}
105 105
106/* Reset the MIIM registers, and wait for the bus to free */ 106/* Reset the MIIM registers, and wait for the bus to free */
107int uec_mdio_reset(struct mii_bus *bus) 107static int uec_mdio_reset(struct mii_bus *bus)
108{ 108{
109 struct ucc_mii_mng __iomem *regs = (void __iomem *)bus->priv; 109 struct ucc_mii_mng __iomem *regs = (void __iomem *)bus->priv;
110 unsigned int timeout = PHY_INIT_TIMEOUT; 110 unsigned int timeout = PHY_INIT_TIMEOUT;
@@ -240,7 +240,7 @@ reg_map_fail:
240 return err; 240 return err;
241} 241}
242 242
243int uec_mdio_remove(struct of_device *ofdev) 243static int uec_mdio_remove(struct of_device *ofdev)
244{ 244{
245 struct device *device = &ofdev->dev; 245 struct device *device = &ofdev->dev;
246 struct mii_bus *bus = dev_get_drvdata(device); 246 struct mii_bus *bus = dev_get_drvdata(device);
diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c
index 6f245cfb6624..dc6f097062df 100644
--- a/drivers/net/usb/asix.c
+++ b/drivers/net/usb/asix.c
@@ -1381,6 +1381,10 @@ static const struct usb_device_id products [] = {
1381 USB_DEVICE (0x0411, 0x003d), 1381 USB_DEVICE (0x0411, 0x003d),
1382 .driver_info = (unsigned long) &ax8817x_info, 1382 .driver_info = (unsigned long) &ax8817x_info,
1383}, { 1383}, {
1384 // Buffalo LUA-U2-GT 10/100/1000
1385 USB_DEVICE (0x0411, 0x006e),
1386 .driver_info = (unsigned long) &ax88178_info,
1387}, {
1384 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter" 1388 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1385 USB_DEVICE (0x6189, 0x182d), 1389 USB_DEVICE (0x6189, 0x182d),
1386 .driver_info = (unsigned long) &ax8817x_info, 1390 .driver_info = (unsigned long) &ax8817x_info,
diff --git a/drivers/net/wan/lapbether.c b/drivers/net/wan/lapbether.c
index b5860b97a93e..24fd613466b7 100644
--- a/drivers/net/wan/lapbether.c
+++ b/drivers/net/wan/lapbether.c
@@ -459,6 +459,7 @@ static void __exit lapbeth_cleanup_driver(void)
459 list_for_each_safe(entry, tmp, &lapbeth_devices) { 459 list_for_each_safe(entry, tmp, &lapbeth_devices) {
460 lapbeth = list_entry(entry, struct lapbethdev, node); 460 lapbeth = list_entry(entry, struct lapbethdev, node);
461 461
462 dev_put(lapbeth->ethdev);
462 unregister_netdevice(lapbeth->axdev); 463 unregister_netdevice(lapbeth->axdev);
463 } 464 }
464 rtnl_unlock(); 465 rtnl_unlock();
diff --git a/drivers/net/wireless/iwlwifi/Kconfig b/drivers/net/wireless/iwlwifi/Kconfig
index d5b7a76fcaad..62fb89d82318 100644
--- a/drivers/net/wireless/iwlwifi/Kconfig
+++ b/drivers/net/wireless/iwlwifi/Kconfig
@@ -1,6 +1,5 @@
1config IWLWIFI 1config IWLWIFI
2 bool 2 tristate
3 default n
4 3
5config IWLCORE 4config IWLCORE
6 tristate "Intel Wireless Wifi Core" 5 tristate "Intel Wireless Wifi Core"
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 4a55bf380957..3706ce7972dd 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -842,13 +842,25 @@ static void set_pcie_port_type(struct pci_dev *pdev)
842 * reading the dword at 0x100 which must either be 0 or a valid extended 842 * reading the dword at 0x100 which must either be 0 or a valid extended
843 * capability header. 843 * capability header.
844 */ 844 */
845int pci_cfg_space_size_ext(struct pci_dev *dev, unsigned check_exp_pcix) 845int pci_cfg_space_size_ext(struct pci_dev *dev)
846{ 846{
847 int pos;
848 u32 status; 847 u32 status;
849 848
850 if (!check_exp_pcix) 849 if (pci_read_config_dword(dev, 256, &status) != PCIBIOS_SUCCESSFUL)
851 goto skip; 850 goto fail;
851 if (status == 0xffffffff)
852 goto fail;
853
854 return PCI_CFG_SPACE_EXP_SIZE;
855
856 fail:
857 return PCI_CFG_SPACE_SIZE;
858}
859
860int pci_cfg_space_size(struct pci_dev *dev)
861{
862 int pos;
863 u32 status;
852 864
853 pos = pci_find_capability(dev, PCI_CAP_ID_EXP); 865 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
854 if (!pos) { 866 if (!pos) {
@@ -861,23 +873,12 @@ int pci_cfg_space_size_ext(struct pci_dev *dev, unsigned check_exp_pcix)
861 goto fail; 873 goto fail;
862 } 874 }
863 875
864 skip: 876 return pci_cfg_space_size_ext(dev);
865 if (pci_read_config_dword(dev, 256, &status) != PCIBIOS_SUCCESSFUL)
866 goto fail;
867 if (status == 0xffffffff)
868 goto fail;
869
870 return PCI_CFG_SPACE_EXP_SIZE;
871 877
872 fail: 878 fail:
873 return PCI_CFG_SPACE_SIZE; 879 return PCI_CFG_SPACE_SIZE;
874} 880}
875 881
876int pci_cfg_space_size(struct pci_dev *dev)
877{
878 return pci_cfg_space_size_ext(dev, 1);
879}
880
881static void pci_release_bus_bridge_dev(struct device *dev) 882static void pci_release_bus_bridge_dev(struct device *dev)
882{ 883{
883 kfree(dev); 884 kfree(dev);
diff --git a/drivers/rtc/rtc-ds1511.c b/drivers/rtc/rtc-ds1511.c
index a83a40b3ebaa..0f0d27d1c4ca 100644
--- a/drivers/rtc/rtc-ds1511.c
+++ b/drivers/rtc/rtc-ds1511.c
@@ -184,7 +184,7 @@ ds1511_wdog_disable(void)
184static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm) 184static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
185{ 185{
186 u8 mon, day, dow, hrs, min, sec, yrs, cen; 186 u8 mon, day, dow, hrs, min, sec, yrs, cen;
187 unsigned int flags; 187 unsigned long flags;
188 188
189 /* 189 /*
190 * won't have to change this for a while 190 * won't have to change this for a while
@@ -247,7 +247,7 @@ static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
247static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm) 247static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
248{ 248{
249 unsigned int century; 249 unsigned int century;
250 unsigned int flags; 250 unsigned long flags;
251 251
252 spin_lock_irqsave(&ds1511_lock, flags); 252 spin_lock_irqsave(&ds1511_lock, flags);
253 rtc_disable_update(); 253 rtc_disable_update();
diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c
index 110699bb4787..1f88e9e914ec 100644
--- a/drivers/rtc/rtc-sh.c
+++ b/drivers/rtc/rtc-sh.c
@@ -616,7 +616,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
616 goto err_badres; 616 goto err_badres;
617 } 617 }
618 618
619 rtc->regbase = (void __iomem *)rtc->res->start; 619 rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
620 if (unlikely(!rtc->regbase)) { 620 if (unlikely(!rtc->regbase)) {
621 ret = -EINVAL; 621 ret = -EINVAL;
622 goto err_badmap; 622 goto err_badmap;
@@ -626,7 +626,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
626 &sh_rtc_ops, THIS_MODULE); 626 &sh_rtc_ops, THIS_MODULE);
627 if (IS_ERR(rtc->rtc_dev)) { 627 if (IS_ERR(rtc->rtc_dev)) {
628 ret = PTR_ERR(rtc->rtc_dev); 628 ret = PTR_ERR(rtc->rtc_dev);
629 goto err_badmap; 629 goto err_unmap;
630 } 630 }
631 631
632 rtc->capabilities = RTC_DEF_CAPABILITIES; 632 rtc->capabilities = RTC_DEF_CAPABILITIES;
@@ -653,7 +653,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
653 dev_err(&pdev->dev, 653 dev_err(&pdev->dev,
654 "request period IRQ failed with %d, IRQ %d\n", ret, 654 "request period IRQ failed with %d, IRQ %d\n", ret,
655 rtc->periodic_irq); 655 rtc->periodic_irq);
656 goto err_badmap; 656 goto err_unmap;
657 } 657 }
658 658
659 ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED, 659 ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED,
@@ -663,7 +663,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
663 "request carry IRQ failed with %d, IRQ %d\n", ret, 663 "request carry IRQ failed with %d, IRQ %d\n", ret,
664 rtc->carry_irq); 664 rtc->carry_irq);
665 free_irq(rtc->periodic_irq, rtc); 665 free_irq(rtc->periodic_irq, rtc);
666 goto err_badmap; 666 goto err_unmap;
667 } 667 }
668 668
669 ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED, 669 ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED,
@@ -674,7 +674,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
674 rtc->alarm_irq); 674 rtc->alarm_irq);
675 free_irq(rtc->carry_irq, rtc); 675 free_irq(rtc->carry_irq, rtc);
676 free_irq(rtc->periodic_irq, rtc); 676 free_irq(rtc->periodic_irq, rtc);
677 goto err_badmap; 677 goto err_unmap;
678 } 678 }
679 679
680 tmp = readb(rtc->regbase + RCR1); 680 tmp = readb(rtc->regbase + RCR1);
@@ -684,6 +684,8 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
684 684
685 return 0; 685 return 0;
686 686
687err_unmap:
688 iounmap(rtc->regbase);
687err_badmap: 689err_badmap:
688 release_resource(rtc->res); 690 release_resource(rtc->res);
689err_badres: 691err_badres:
@@ -708,6 +710,8 @@ static int __devexit sh_rtc_remove(struct platform_device *pdev)
708 710
709 release_resource(rtc->res); 711 release_resource(rtc->res);
710 712
713 iounmap(rtc->regbase);
714
711 platform_set_drvdata(pdev, NULL); 715 platform_set_drvdata(pdev, NULL);
712 716
713 kfree(rtc); 717 kfree(rtc);
diff --git a/drivers/s390/char/tty3270.c b/drivers/s390/char/tty3270.c
index c1f2adefad41..5043150019ac 100644
--- a/drivers/s390/char/tty3270.c
+++ b/drivers/s390/char/tty3270.c
@@ -965,8 +965,7 @@ tty3270_write_room(struct tty_struct *tty)
965 * Insert character into the screen at the current position with the 965 * Insert character into the screen at the current position with the
966 * current color and highlight. This function does NOT do cursor movement. 966 * current color and highlight. This function does NOT do cursor movement.
967 */ 967 */
968static int 968static void tty3270_put_character(struct tty3270 *tp, char ch)
969tty3270_put_character(struct tty3270 *tp, char ch)
970{ 969{
971 struct tty3270_line *line; 970 struct tty3270_line *line;
972 struct tty3270_cell *cell; 971 struct tty3270_cell *cell;
@@ -986,7 +985,6 @@ tty3270_put_character(struct tty3270 *tp, char ch)
986 cell->character = tp->view.ascebc[(unsigned int) ch]; 985 cell->character = tp->view.ascebc[(unsigned int) ch];
987 cell->highlight = tp->highlight; 986 cell->highlight = tp->highlight;
988 cell->f_color = tp->f_color; 987 cell->f_color = tp->f_color;
989 return 1;
990} 988}
991 989
992/* 990/*
@@ -1612,16 +1610,15 @@ tty3270_write(struct tty_struct * tty,
1612/* 1610/*
1613 * Put single characters to the ttys character buffer 1611 * Put single characters to the ttys character buffer
1614 */ 1612 */
1615static void 1613static int tty3270_put_char(struct tty_struct *tty, unsigned char ch)
1616tty3270_put_char(struct tty_struct *tty, unsigned char ch)
1617{ 1614{
1618 struct tty3270 *tp; 1615 struct tty3270 *tp;
1619 1616
1620 tp = tty->driver_data; 1617 tp = tty->driver_data;
1621 if (!tp) 1618 if (!tp || tp->char_count >= TTY3270_CHAR_BUF_SIZE)
1622 return; 1619 return 0;
1623 if (tp->char_count < TTY3270_CHAR_BUF_SIZE) 1620 tp->char_buf[tp->char_count++] = ch;
1624 tp->char_buf[tp->char_count++] = ch; 1621 return 1;
1625} 1622}
1626 1623
1627/* 1624/*
diff --git a/drivers/s390/cio/blacklist.c b/drivers/s390/cio/blacklist.c
index 40ef948fcb3a..9c21b8f43f9b 100644
--- a/drivers/s390/cio/blacklist.c
+++ b/drivers/s390/cio/blacklist.c
@@ -19,6 +19,7 @@
19 19
20#include <asm/cio.h> 20#include <asm/cio.h>
21#include <asm/uaccess.h> 21#include <asm/uaccess.h>
22#include <asm/cio.h>
22 23
23#include "blacklist.h" 24#include "blacklist.h"
24#include "cio.h" 25#include "cio.h"
@@ -43,164 +44,169 @@ typedef enum {add, free} range_action;
43 * Function: blacklist_range 44 * Function: blacklist_range
44 * (Un-)blacklist the devices from-to 45 * (Un-)blacklist the devices from-to
45 */ 46 */
46static void 47static int blacklist_range(range_action action, unsigned int from_ssid,
47blacklist_range (range_action action, unsigned int from, unsigned int to, 48 unsigned int to_ssid, unsigned int from,
48 unsigned int ssid) 49 unsigned int to, int msgtrigger)
49{ 50{
50 if (!to) 51 if ((from_ssid > to_ssid) || ((from_ssid == to_ssid) && (from > to))) {
51 to = from; 52 if (msgtrigger)
52 53 printk(KERN_WARNING "cio: Invalid cio_ignore range "
53 if (from > to || to > __MAX_SUBCHANNEL || ssid > __MAX_SSID) { 54 "0.%x.%04x-0.%x.%04x\n", from_ssid, from,
54 printk (KERN_WARNING "cio: Invalid blacklist range " 55 to_ssid, to);
55 "0.%x.%04x to 0.%x.%04x, skipping\n", 56 return 1;
56 ssid, from, ssid, to);
57 return;
58 } 57 }
59 for (; from <= to; from++) { 58
59 while ((from_ssid < to_ssid) || ((from_ssid == to_ssid) &&
60 (from <= to))) {
60 if (action == add) 61 if (action == add)
61 set_bit (from, bl_dev[ssid]); 62 set_bit(from, bl_dev[from_ssid]);
62 else 63 else
63 clear_bit (from, bl_dev[ssid]); 64 clear_bit(from, bl_dev[from_ssid]);
65 from++;
66 if (from > __MAX_SUBCHANNEL) {
67 from_ssid++;
68 from = 0;
69 }
64 } 70 }
71
72 return 0;
65} 73}
66 74
67/* 75static int pure_hex(char **cp, unsigned int *val, int min_digit,
68 * Function: blacklist_busid 76 int max_digit, int max_val)
69 * Get devno/busid from given string.
70 * Shamelessly grabbed from dasd_devmap.c.
71 */
72static int
73blacklist_busid(char **str, int *id0, int *ssid, int *devno)
74{ 77{
75 int val, old_style; 78 int diff;
76 char *sav; 79 unsigned int value;
77 80
78 sav = *str; 81 diff = 0;
82 *val = 0;
79 83
80 /* check for leading '0x' */ 84 while (isxdigit(**cp) && (diff <= max_digit)) {
81 old_style = 0; 85
82 if ((*str)[0] == '0' && (*str)[1] == 'x') { 86 if (isdigit(**cp))
83 *str += 2; 87 value = **cp - '0';
84 old_style = 1; 88 else
85 } 89 value = tolower(**cp) - 'a' + 10;
86 if (!isxdigit((*str)[0])) /* We require at least one hex digit */ 90 *val = *val * 16 + value;
87 goto confused; 91 (*cp)++;
88 val = simple_strtoul(*str, str, 16); 92 diff++;
89 if (old_style || (*str)[0] != '.') {
90 *id0 = *ssid = 0;
91 if (val < 0 || val > 0xffff)
92 goto confused;
93 *devno = val;
94 if ((*str)[0] != ',' && (*str)[0] != '-' &&
95 (*str)[0] != '\n' && (*str)[0] != '\0')
96 goto confused;
97 return 0;
98 } 93 }
99 /* New style x.y.z busid */ 94
100 if (val < 0 || val > 0xff) 95 if ((diff < min_digit) || (diff > max_digit) || (*val > max_val))
101 goto confused; 96 return 1;
102 *id0 = val; 97
103 (*str)++;
104 if (!isxdigit((*str)[0])) /* We require at least one hex digit */
105 goto confused;
106 val = simple_strtoul(*str, str, 16);
107 if (val < 0 || val > 0xff || (*str)++[0] != '.')
108 goto confused;
109 *ssid = val;
110 if (!isxdigit((*str)[0])) /* We require at least one hex digit */
111 goto confused;
112 val = simple_strtoul(*str, str, 16);
113 if (val < 0 || val > 0xffff)
114 goto confused;
115 *devno = val;
116 if ((*str)[0] != ',' && (*str)[0] != '-' &&
117 (*str)[0] != '\n' && (*str)[0] != '\0')
118 goto confused;
119 return 0; 98 return 0;
120confused:
121 strsep(str, ",\n");
122 printk(KERN_WARNING "cio: Invalid cio_ignore parameter '%s'\n", sav);
123 return 1;
124} 99}
125 100
126static int 101static int parse_busid(char *str, int *cssid, int *ssid, int *devno,
127blacklist_parse_parameters (char *str, range_action action) 102 int msgtrigger)
128{ 103{
129 int from, to, from_id0, to_id0, from_ssid, to_ssid; 104 char *str_work;
130 105 int val, rc, ret;
131 while (*str != 0 && *str != '\n') { 106
132 range_action ra = action; 107 rc = 1;
133 while(*str == ',') 108
134 str++; 109 if (*str == '\0')
135 if (*str == '!') { 110 goto out;
136 ra = !action; 111
137 ++str; 112 /* old style */
113 str_work = str;
114 val = simple_strtoul(str, &str_work, 16);
115
116 if (*str_work == '\0') {
117 if (val <= __MAX_SUBCHANNEL) {
118 *devno = val;
119 *ssid = 0;
120 *cssid = 0;
121 rc = 0;
138 } 122 }
123 goto out;
124 }
139 125
140 /* 126 /* new style */
141 * Since we have to parse the proc commands and the 127 str_work = str;
142 * kernel arguments we have to check four cases 128 ret = pure_hex(&str_work, cssid, 1, 2, __MAX_CSSID);
143 */ 129 if (ret || (str_work[0] != '.'))
144 if (strncmp(str,"all,",4) == 0 || strcmp(str,"all") == 0 || 130 goto out;
145 strncmp(str,"all\n",4) == 0 || strncmp(str,"all ",4) == 0) { 131 str_work++;
146 int j; 132 ret = pure_hex(&str_work, ssid, 1, 1, __MAX_SSID);
147 133 if (ret || (str_work[0] != '.'))
148 str += 3; 134 goto out;
149 for (j=0; j <= __MAX_SSID; j++) 135 str_work++;
150 blacklist_range(ra, 0, __MAX_SUBCHANNEL, j); 136 ret = pure_hex(&str_work, devno, 4, 4, __MAX_SUBCHANNEL);
151 } else { 137 if (ret || (str_work[0] != '\0'))
152 int rc; 138 goto out;
139
140 rc = 0;
141out:
142 if (rc && msgtrigger)
143 printk(KERN_WARNING "cio: Invalid cio_ignore device '%s'\n",
144 str);
145
146 return rc;
147}
153 148
154 rc = blacklist_busid(&str, &from_id0, 149static int blacklist_parse_parameters(char *str, range_action action,
155 &from_ssid, &from); 150 int msgtrigger)
156 if (rc) 151{
157 continue; 152 int from_cssid, to_cssid, from_ssid, to_ssid, from, to;
158 to = from; 153 int rc, totalrc;
159 to_id0 = from_id0; 154 char *parm;
160 to_ssid = from_ssid; 155 range_action ra;
161 if (*str == '-') { 156
162 str++; 157 totalrc = 0;
163 rc = blacklist_busid(&str, &to_id0, 158
164 &to_ssid, &to); 159 while ((parm = strsep(&str, ","))) {
165 if (rc) 160 rc = 0;
166 continue; 161 ra = action;
167 } 162 if (*parm == '!') {
168 if (*str == '-') { 163 if (ra == add)
169 printk(KERN_WARNING "cio: invalid cio_ignore " 164 ra = free;
170 "parameter '%s'\n", 165 else
171 strsep(&str, ",\n")); 166 ra = add;
172 continue; 167 parm++;
173 } 168 }
174 if ((from_id0 != to_id0) || 169 if (strcmp(parm, "all") == 0) {
175 (from_ssid != to_ssid)) { 170 from_cssid = 0;
176 printk(KERN_WARNING "cio: invalid cio_ignore " 171 from_ssid = 0;
177 "range %x.%x.%04x-%x.%x.%04x\n", 172 from = 0;
178 from_id0, from_ssid, from, 173 to_cssid = __MAX_CSSID;
179 to_id0, to_ssid, to); 174 to_ssid = __MAX_SSID;
180 continue; 175 to = __MAX_SUBCHANNEL;
176 } else {
177 rc = parse_busid(strsep(&parm, "-"), &from_cssid,
178 &from_ssid, &from, msgtrigger);
179 if (!rc) {
180 if (parm != NULL)
181 rc = parse_busid(parm, &to_cssid,
182 &to_ssid, &to,
183 msgtrigger);
184 else {
185 to_cssid = from_cssid;
186 to_ssid = from_ssid;
187 to = from;
188 }
181 } 189 }
182 blacklist_range (ra, from, to, to_ssid);
183 } 190 }
191 if (!rc) {
192 rc = blacklist_range(ra, from_ssid, to_ssid, from, to,
193 msgtrigger);
194 if (rc)
195 totalrc = 1;
196 } else
197 totalrc = 1;
184 } 198 }
185 return 1; 199
200 return totalrc;
186} 201}
187 202
188/* Parsing the commandline for blacklist parameters, e.g. to blacklist
189 * bus ids 0.0.1234, 0.0.1235 and 0.0.1236, you could use any of:
190 * - cio_ignore=1234-1236
191 * - cio_ignore=0x1234-0x1235,1236
192 * - cio_ignore=0x1234,1235-1236
193 * - cio_ignore=1236 cio_ignore=1234-0x1236
194 * - cio_ignore=1234 cio_ignore=1236 cio_ignore=0x1235
195 * - cio_ignore=0.0.1234-0.0.1236
196 * - cio_ignore=0.0.1234,0x1235,1236
197 * - ...
198 */
199static int __init 203static int __init
200blacklist_setup (char *str) 204blacklist_setup (char *str)
201{ 205{
202 CIO_MSG_EVENT(6, "Reading blacklist parameters\n"); 206 CIO_MSG_EVENT(6, "Reading blacklist parameters\n");
203 return blacklist_parse_parameters (str, add); 207 if (blacklist_parse_parameters(str, add, 1))
208 return 0;
209 return 1;
204} 210}
205 211
206__setup ("cio_ignore=", blacklist_setup); 212__setup ("cio_ignore=", blacklist_setup);
@@ -224,27 +230,23 @@ is_blacklisted (int ssid, int devno)
224 * Function: blacklist_parse_proc_parameters 230 * Function: blacklist_parse_proc_parameters
225 * parse the stuff which is piped to /proc/cio_ignore 231 * parse the stuff which is piped to /proc/cio_ignore
226 */ 232 */
227static void 233static int blacklist_parse_proc_parameters(char *buf)
228blacklist_parse_proc_parameters (char *buf)
229{ 234{
230 if (strncmp (buf, "free ", 5) == 0) { 235 int rc;
231 blacklist_parse_parameters (buf + 5, free); 236 char *parm;
232 } else if (strncmp (buf, "add ", 4) == 0) { 237
233 /* 238 parm = strsep(&buf, " ");
234 * We don't need to check for known devices since 239
235 * css_probe_device will handle this correctly. 240 if (strcmp("free", parm) == 0)
236 */ 241 rc = blacklist_parse_parameters(buf, free, 0);
237 blacklist_parse_parameters (buf + 4, add); 242 else if (strcmp("add", parm) == 0)
238 } else { 243 rc = blacklist_parse_parameters(buf, add, 0);
239 printk (KERN_WARNING "cio: cio_ignore: Parse error; \n" 244 else
240 KERN_WARNING "try using 'free all|<devno-range>," 245 return 1;
241 "<devno-range>,...'\n"
242 KERN_WARNING "or 'add <devno-range>,"
243 "<devno-range>,...'\n");
244 return;
245 }
246 246
247 css_schedule_reprobe(); 247 css_schedule_reprobe();
248
249 return rc;
248} 250}
249 251
250/* Iterator struct for all devices. */ 252/* Iterator struct for all devices. */
@@ -328,6 +330,8 @@ cio_ignore_write(struct file *file, const char __user *user_buf,
328 size_t user_len, loff_t *offset) 330 size_t user_len, loff_t *offset)
329{ 331{
330 char *buf; 332 char *buf;
333 size_t i;
334 ssize_t rc, ret;
331 335
332 if (*offset) 336 if (*offset)
333 return -EINVAL; 337 return -EINVAL;
@@ -336,16 +340,27 @@ cio_ignore_write(struct file *file, const char __user *user_buf,
336 buf = vmalloc (user_len + 1); /* maybe better use the stack? */ 340 buf = vmalloc (user_len + 1); /* maybe better use the stack? */
337 if (buf == NULL) 341 if (buf == NULL)
338 return -ENOMEM; 342 return -ENOMEM;
343 memset(buf, 0, user_len + 1);
344
339 if (strncpy_from_user (buf, user_buf, user_len) < 0) { 345 if (strncpy_from_user (buf, user_buf, user_len) < 0) {
340 vfree (buf); 346 rc = -EFAULT;
341 return -EFAULT; 347 goto out_free;
342 } 348 }
343 buf[user_len] = '\0';
344 349
345 blacklist_parse_proc_parameters (buf); 350 i = user_len - 1;
351 while ((i >= 0) && (isspace(buf[i]) || (buf[i] == 0))) {
352 buf[i] = '\0';
353 i--;
354 }
355 ret = blacklist_parse_proc_parameters(buf);
356 if (ret)
357 rc = -EINVAL;
358 else
359 rc = user_len;
346 360
361out_free:
347 vfree (buf); 362 vfree (buf);
348 return user_len; 363 return rc;
349} 364}
350 365
351static const struct seq_operations cio_ignore_proc_seq_ops = { 366static const struct seq_operations cio_ignore_proc_seq_ops = {
diff --git a/drivers/s390/cio/cio.c b/drivers/s390/cio/cio.c
index 08a578161306..82c6a2d45128 100644
--- a/drivers/s390/cio/cio.c
+++ b/drivers/s390/cio/cio.c
@@ -39,23 +39,6 @@ debug_info_t *cio_debug_msg_id;
39debug_info_t *cio_debug_trace_id; 39debug_info_t *cio_debug_trace_id;
40debug_info_t *cio_debug_crw_id; 40debug_info_t *cio_debug_crw_id;
41 41
42int cio_show_msg;
43
44static int __init
45cio_setup (char *parm)
46{
47 if (!strcmp (parm, "yes"))
48 cio_show_msg = 1;
49 else if (!strcmp (parm, "no"))
50 cio_show_msg = 0;
51 else
52 printk(KERN_ERR "cio: cio_setup: "
53 "invalid cio_msg parameter '%s'", parm);
54 return 1;
55}
56
57__setup ("cio_msg=", cio_setup);
58
59/* 42/*
60 * Function: cio_debug_init 43 * Function: cio_debug_init
61 * Initializes three debug logs for common I/O: 44 * Initializes three debug logs for common I/O:
@@ -166,7 +149,7 @@ cio_start_handle_notoper(struct subchannel *sch, __u8 lpm)
166 149
167 stsch (sch->schid, &sch->schib); 150 stsch (sch->schid, &sch->schib);
168 151
169 CIO_MSG_EVENT(0, "cio_start: 'not oper' status for " 152 CIO_MSG_EVENT(2, "cio_start: 'not oper' status for "
170 "subchannel 0.%x.%04x!\n", sch->schid.ssid, 153 "subchannel 0.%x.%04x!\n", sch->schid.ssid,
171 sch->schid.sch_no); 154 sch->schid.sch_no);
172 sprintf(dbf_text, "no%s", sch->dev.bus_id); 155 sprintf(dbf_text, "no%s", sch->dev.bus_id);
@@ -567,10 +550,9 @@ cio_validate_subchannel (struct subchannel *sch, struct subchannel_id schid)
567 * ... just being curious we check for non I/O subchannels 550 * ... just being curious we check for non I/O subchannels
568 */ 551 */
569 if (sch->st != 0) { 552 if (sch->st != 0) {
570 CIO_DEBUG(KERN_INFO, 0, 553 CIO_MSG_EVENT(4, "Subchannel 0.%x.%04x reports "
571 "Subchannel 0.%x.%04x reports " 554 "non-I/O subchannel type %04X\n",
572 "non-I/O subchannel type %04X\n", 555 sch->schid.ssid, sch->schid.sch_no, sch->st);
573 sch->schid.ssid, sch->schid.sch_no, sch->st);
574 /* We stop here for non-io subchannels. */ 556 /* We stop here for non-io subchannels. */
575 err = sch->st; 557 err = sch->st;
576 goto out; 558 goto out;
@@ -588,7 +570,7 @@ cio_validate_subchannel (struct subchannel *sch, struct subchannel_id schid)
588 * This device must not be known to Linux. So we simply 570 * This device must not be known to Linux. So we simply
589 * say that there is no device and return ENODEV. 571 * say that there is no device and return ENODEV.
590 */ 572 */
591 CIO_MSG_EVENT(4, "Blacklisted device detected " 573 CIO_MSG_EVENT(6, "Blacklisted device detected "
592 "at devno %04X, subchannel set %x\n", 574 "at devno %04X, subchannel set %x\n",
593 sch->schib.pmcw.dev, sch->schid.ssid); 575 sch->schib.pmcw.dev, sch->schid.ssid);
594 err = -ENODEV; 576 err = -ENODEV;
@@ -601,12 +583,11 @@ cio_validate_subchannel (struct subchannel *sch, struct subchannel_id schid)
601 sch->lpm = sch->schib.pmcw.pam & sch->opm; 583 sch->lpm = sch->schib.pmcw.pam & sch->opm;
602 sch->isc = 3; 584 sch->isc = 3;
603 585
604 CIO_DEBUG(KERN_INFO, 0, 586 CIO_MSG_EVENT(6, "Detected device %04x on subchannel 0.%x.%04X "
605 "Detected device %04x on subchannel 0.%x.%04X" 587 "- PIM = %02X, PAM = %02X, POM = %02X\n",
606 " - PIM = %02X, PAM = %02X, POM = %02X\n", 588 sch->schib.pmcw.dev, sch->schid.ssid,
607 sch->schib.pmcw.dev, sch->schid.ssid, 589 sch->schid.sch_no, sch->schib.pmcw.pim,
608 sch->schid.sch_no, sch->schib.pmcw.pim, 590 sch->schib.pmcw.pam, sch->schib.pmcw.pom);
609 sch->schib.pmcw.pam, sch->schib.pmcw.pom);
610 591
611 /* 592 /*
612 * We now have to initially ... 593 * We now have to initially ...
diff --git a/drivers/s390/cio/cio.h b/drivers/s390/cio/cio.h
index 3c75412904dc..6e933aebe013 100644
--- a/drivers/s390/cio/cio.h
+++ b/drivers/s390/cio/cio.h
@@ -118,6 +118,4 @@ extern void *cio_get_console_priv(void);
118#define cio_get_console_priv() NULL 118#define cio_get_console_priv() NULL
119#endif 119#endif
120 120
121extern int cio_show_msg;
122
123#endif 121#endif
diff --git a/drivers/s390/cio/cio_debug.h b/drivers/s390/cio/cio_debug.h
index d7429ef6c666..e64e8278c42e 100644
--- a/drivers/s390/cio/cio_debug.h
+++ b/drivers/s390/cio/cio_debug.h
@@ -31,10 +31,4 @@ static inline void CIO_HEX_EVENT(int level, void *data, int length)
31 } 31 }
32} 32}
33 33
34#define CIO_DEBUG(printk_level, event_level, msg...) do { \
35 if (cio_show_msg) \
36 printk(printk_level "cio: " msg); \
37 CIO_MSG_EVENT(event_level, msg); \
38 } while (0)
39
40#endif 34#endif
diff --git a/drivers/s390/cio/css.c b/drivers/s390/cio/css.c
index 595e327d2f76..a76956512b2d 100644
--- a/drivers/s390/cio/css.c
+++ b/drivers/s390/cio/css.c
@@ -570,7 +570,7 @@ static void reprobe_all(struct work_struct *unused)
570{ 570{
571 int ret; 571 int ret;
572 572
573 CIO_MSG_EVENT(2, "reprobe start\n"); 573 CIO_MSG_EVENT(4, "reprobe start\n");
574 574
575 need_reprobe = 0; 575 need_reprobe = 0;
576 /* Make sure initial subchannel scan is done. */ 576 /* Make sure initial subchannel scan is done. */
@@ -578,7 +578,7 @@ static void reprobe_all(struct work_struct *unused)
578 atomic_read(&ccw_device_init_count) == 0); 578 atomic_read(&ccw_device_init_count) == 0);
579 ret = for_each_subchannel_staged(NULL, reprobe_subchannel, NULL); 579 ret = for_each_subchannel_staged(NULL, reprobe_subchannel, NULL);
580 580
581 CIO_MSG_EVENT(2, "reprobe done (rc=%d, need_reprobe=%d)\n", ret, 581 CIO_MSG_EVENT(4, "reprobe done (rc=%d, need_reprobe=%d)\n", ret,
582 need_reprobe); 582 need_reprobe);
583} 583}
584 584
diff --git a/drivers/s390/cio/device.c b/drivers/s390/cio/device.c
index abfd601d237a..e22813db74a2 100644
--- a/drivers/s390/cio/device.c
+++ b/drivers/s390/cio/device.c
@@ -341,7 +341,7 @@ ccw_device_remove_disconnected(struct ccw_device *cdev)
341 rc = device_schedule_callback(&cdev->dev, 341 rc = device_schedule_callback(&cdev->dev,
342 ccw_device_remove_orphan_cb); 342 ccw_device_remove_orphan_cb);
343 if (rc) 343 if (rc)
344 CIO_MSG_EVENT(2, "Couldn't unregister orphan " 344 CIO_MSG_EVENT(0, "Couldn't unregister orphan "
345 "0.%x.%04x\n", 345 "0.%x.%04x\n",
346 cdev->private->dev_id.ssid, 346 cdev->private->dev_id.ssid,
347 cdev->private->dev_id.devno); 347 cdev->private->dev_id.devno);
@@ -351,7 +351,7 @@ ccw_device_remove_disconnected(struct ccw_device *cdev)
351 rc = device_schedule_callback(cdev->dev.parent, 351 rc = device_schedule_callback(cdev->dev.parent,
352 ccw_device_remove_sch_cb); 352 ccw_device_remove_sch_cb);
353 if (rc) 353 if (rc)
354 CIO_MSG_EVENT(2, "Couldn't unregister disconnected device " 354 CIO_MSG_EVENT(0, "Couldn't unregister disconnected device "
355 "0.%x.%04x\n", 355 "0.%x.%04x\n",
356 cdev->private->dev_id.ssid, 356 cdev->private->dev_id.ssid,
357 cdev->private->dev_id.devno); 357 cdev->private->dev_id.devno);
@@ -397,7 +397,7 @@ int ccw_device_set_offline(struct ccw_device *cdev)
397 if (ret == 0) 397 if (ret == 0)
398 wait_event(cdev->private->wait_q, dev_fsm_final_state(cdev)); 398 wait_event(cdev->private->wait_q, dev_fsm_final_state(cdev));
399 else { 399 else {
400 CIO_MSG_EVENT(2, "ccw_device_offline returned %d, " 400 CIO_MSG_EVENT(0, "ccw_device_offline returned %d, "
401 "device 0.%x.%04x\n", 401 "device 0.%x.%04x\n",
402 ret, cdev->private->dev_id.ssid, 402 ret, cdev->private->dev_id.ssid,
403 cdev->private->dev_id.devno); 403 cdev->private->dev_id.devno);
@@ -433,7 +433,7 @@ int ccw_device_set_online(struct ccw_device *cdev)
433 if (ret == 0) 433 if (ret == 0)
434 wait_event(cdev->private->wait_q, dev_fsm_final_state(cdev)); 434 wait_event(cdev->private->wait_q, dev_fsm_final_state(cdev));
435 else { 435 else {
436 CIO_MSG_EVENT(2, "ccw_device_online returned %d, " 436 CIO_MSG_EVENT(0, "ccw_device_online returned %d, "
437 "device 0.%x.%04x\n", 437 "device 0.%x.%04x\n",
438 ret, cdev->private->dev_id.ssid, 438 ret, cdev->private->dev_id.ssid,
439 cdev->private->dev_id.devno); 439 cdev->private->dev_id.devno);
@@ -451,7 +451,7 @@ int ccw_device_set_online(struct ccw_device *cdev)
451 if (ret == 0) 451 if (ret == 0)
452 wait_event(cdev->private->wait_q, dev_fsm_final_state(cdev)); 452 wait_event(cdev->private->wait_q, dev_fsm_final_state(cdev));
453 else 453 else
454 CIO_MSG_EVENT(2, "ccw_device_offline returned %d, " 454 CIO_MSG_EVENT(0, "ccw_device_offline returned %d, "
455 "device 0.%x.%04x\n", 455 "device 0.%x.%04x\n",
456 ret, cdev->private->dev_id.ssid, 456 ret, cdev->private->dev_id.ssid,
457 cdev->private->dev_id.devno); 457 cdev->private->dev_id.devno);
@@ -803,7 +803,7 @@ static void sch_attach_disconnected_device(struct subchannel *sch,
803 other_sch = to_subchannel(get_device(cdev->dev.parent)); 803 other_sch = to_subchannel(get_device(cdev->dev.parent));
804 ret = device_move(&cdev->dev, &sch->dev); 804 ret = device_move(&cdev->dev, &sch->dev);
805 if (ret) { 805 if (ret) {
806 CIO_MSG_EVENT(2, "Moving disconnected device 0.%x.%04x failed " 806 CIO_MSG_EVENT(0, "Moving disconnected device 0.%x.%04x failed "
807 "(ret=%d)!\n", cdev->private->dev_id.ssid, 807 "(ret=%d)!\n", cdev->private->dev_id.ssid,
808 cdev->private->dev_id.devno, ret); 808 cdev->private->dev_id.devno, ret);
809 put_device(&other_sch->dev); 809 put_device(&other_sch->dev);
@@ -933,7 +933,7 @@ io_subchannel_register(struct work_struct *work)
933 ret = device_reprobe(&cdev->dev); 933 ret = device_reprobe(&cdev->dev);
934 if (ret) 934 if (ret)
935 /* We can't do much here. */ 935 /* We can't do much here. */
936 CIO_MSG_EVENT(2, "device_reprobe() returned" 936 CIO_MSG_EVENT(0, "device_reprobe() returned"
937 " %d for 0.%x.%04x\n", ret, 937 " %d for 0.%x.%04x\n", ret,
938 cdev->private->dev_id.ssid, 938 cdev->private->dev_id.ssid,
939 cdev->private->dev_id.devno); 939 cdev->private->dev_id.devno);
@@ -1086,7 +1086,7 @@ static void ccw_device_move_to_sch(struct work_struct *work)
1086 rc = device_move(&cdev->dev, &sch->dev); 1086 rc = device_move(&cdev->dev, &sch->dev);
1087 mutex_unlock(&sch->reg_mutex); 1087 mutex_unlock(&sch->reg_mutex);
1088 if (rc) { 1088 if (rc) {
1089 CIO_MSG_EVENT(2, "Moving device 0.%x.%04x to subchannel " 1089 CIO_MSG_EVENT(0, "Moving device 0.%x.%04x to subchannel "
1090 "0.%x.%04x failed (ret=%d)!\n", 1090 "0.%x.%04x failed (ret=%d)!\n",
1091 cdev->private->dev_id.ssid, 1091 cdev->private->dev_id.ssid,
1092 cdev->private->dev_id.devno, sch->schid.ssid, 1092 cdev->private->dev_id.devno, sch->schid.ssid,
@@ -1446,8 +1446,7 @@ ccw_device_remove (struct device *dev)
1446 wait_event(cdev->private->wait_q, 1446 wait_event(cdev->private->wait_q,
1447 dev_fsm_final_state(cdev)); 1447 dev_fsm_final_state(cdev));
1448 else 1448 else
1449 //FIXME: we can't fail! 1449 CIO_MSG_EVENT(0, "ccw_device_offline returned %d, "
1450 CIO_MSG_EVENT(2, "ccw_device_offline returned %d, "
1451 "device 0.%x.%04x\n", 1450 "device 0.%x.%04x\n",
1452 ret, cdev->private->dev_id.ssid, 1451 ret, cdev->private->dev_id.ssid,
1453 cdev->private->dev_id.devno); 1452 cdev->private->dev_id.devno);
@@ -1524,7 +1523,7 @@ static int recovery_check(struct device *dev, void *data)
1524 spin_lock_irq(cdev->ccwlock); 1523 spin_lock_irq(cdev->ccwlock);
1525 switch (cdev->private->state) { 1524 switch (cdev->private->state) {
1526 case DEV_STATE_DISCONNECTED: 1525 case DEV_STATE_DISCONNECTED:
1527 CIO_MSG_EVENT(3, "recovery: trigger 0.%x.%04x\n", 1526 CIO_MSG_EVENT(4, "recovery: trigger 0.%x.%04x\n",
1528 cdev->private->dev_id.ssid, 1527 cdev->private->dev_id.ssid,
1529 cdev->private->dev_id.devno); 1528 cdev->private->dev_id.devno);
1530 dev_fsm_event(cdev, DEV_EVENT_VERIFY); 1529 dev_fsm_event(cdev, DEV_EVENT_VERIFY);
@@ -1554,7 +1553,7 @@ static void recovery_work_func(struct work_struct *unused)
1554 } 1553 }
1555 spin_unlock_irq(&recovery_lock); 1554 spin_unlock_irq(&recovery_lock);
1556 } else 1555 } else
1557 CIO_MSG_EVENT(2, "recovery: end\n"); 1556 CIO_MSG_EVENT(4, "recovery: end\n");
1558} 1557}
1559 1558
1560static DECLARE_WORK(recovery_work, recovery_work_func); 1559static DECLARE_WORK(recovery_work, recovery_work_func);
@@ -1572,7 +1571,7 @@ void ccw_device_schedule_recovery(void)
1572{ 1571{
1573 unsigned long flags; 1572 unsigned long flags;
1574 1573
1575 CIO_MSG_EVENT(2, "recovery: schedule\n"); 1574 CIO_MSG_EVENT(4, "recovery: schedule\n");
1576 spin_lock_irqsave(&recovery_lock, flags); 1575 spin_lock_irqsave(&recovery_lock, flags);
1577 if (!timer_pending(&recovery_timer) || (recovery_phase != 0)) { 1576 if (!timer_pending(&recovery_timer) || (recovery_phase != 0)) {
1578 recovery_phase = 0; 1577 recovery_phase = 0;
diff --git a/drivers/s390/cio/device_fsm.c b/drivers/s390/cio/device_fsm.c
index 99403b0a97a7..e268d5a77c12 100644
--- a/drivers/s390/cio/device_fsm.c
+++ b/drivers/s390/cio/device_fsm.c
@@ -322,10 +322,10 @@ ccw_device_recog_done(struct ccw_device *cdev, int state)
322 same_dev = 0; /* Keep the compiler quiet... */ 322 same_dev = 0; /* Keep the compiler quiet... */
323 switch (state) { 323 switch (state) {
324 case DEV_STATE_NOT_OPER: 324 case DEV_STATE_NOT_OPER:
325 CIO_DEBUG(KERN_WARNING, 2, 325 CIO_MSG_EVENT(2, "SenseID : unknown device %04x on "
326 "SenseID : unknown device %04x on subchannel " 326 "subchannel 0.%x.%04x\n",
327 "0.%x.%04x\n", cdev->private->dev_id.devno, 327 cdev->private->dev_id.devno,
328 sch->schid.ssid, sch->schid.sch_no); 328 sch->schid.ssid, sch->schid.sch_no);
329 break; 329 break;
330 case DEV_STATE_OFFLINE: 330 case DEV_STATE_OFFLINE:
331 if (cdev->private->state == DEV_STATE_DISCONNECTED_SENSE_ID) { 331 if (cdev->private->state == DEV_STATE_DISCONNECTED_SENSE_ID) {
@@ -348,20 +348,19 @@ ccw_device_recog_done(struct ccw_device *cdev, int state)
348 return; 348 return;
349 } 349 }
350 /* Issue device info message. */ 350 /* Issue device info message. */
351 CIO_DEBUG(KERN_INFO, 2, 351 CIO_MSG_EVENT(4, "SenseID : device 0.%x.%04x reports: "
352 "SenseID : device 0.%x.%04x reports: " 352 "CU Type/Mod = %04X/%02X, Dev Type/Mod = "
353 "CU Type/Mod = %04X/%02X, Dev Type/Mod = " 353 "%04X/%02X\n",
354 "%04X/%02X\n", 354 cdev->private->dev_id.ssid,
355 cdev->private->dev_id.ssid, 355 cdev->private->dev_id.devno,
356 cdev->private->dev_id.devno, 356 cdev->id.cu_type, cdev->id.cu_model,
357 cdev->id.cu_type, cdev->id.cu_model, 357 cdev->id.dev_type, cdev->id.dev_model);
358 cdev->id.dev_type, cdev->id.dev_model);
359 break; 358 break;
360 case DEV_STATE_BOXED: 359 case DEV_STATE_BOXED:
361 CIO_DEBUG(KERN_WARNING, 2, 360 CIO_MSG_EVENT(0, "SenseID : boxed device %04x on "
362 "SenseID : boxed device %04x on subchannel " 361 " subchannel 0.%x.%04x\n",
363 "0.%x.%04x\n", cdev->private->dev_id.devno, 362 cdev->private->dev_id.devno,
364 sch->schid.ssid, sch->schid.sch_no); 363 sch->schid.ssid, sch->schid.sch_no);
365 break; 364 break;
366 } 365 }
367 cdev->private->state = state; 366 cdev->private->state = state;
@@ -443,9 +442,8 @@ ccw_device_done(struct ccw_device *cdev, int state)
443 442
444 443
445 if (state == DEV_STATE_BOXED) 444 if (state == DEV_STATE_BOXED)
446 CIO_DEBUG(KERN_WARNING, 2, 445 CIO_MSG_EVENT(0, "Boxed device %04x on subchannel %04x\n",
447 "Boxed device %04x on subchannel %04x\n", 446 cdev->private->dev_id.devno, sch->schid.sch_no);
448 cdev->private->dev_id.devno, sch->schid.sch_no);
449 447
450 if (cdev->private->flags.donotify) { 448 if (cdev->private->flags.donotify) {
451 cdev->private->flags.donotify = 0; 449 cdev->private->flags.donotify = 0;
@@ -900,7 +898,7 @@ ccw_device_w4sense(struct ccw_device *cdev, enum dev_event dev_event)
900 /* Basic sense hasn't started. Try again. */ 898 /* Basic sense hasn't started. Try again. */
901 ccw_device_do_sense(cdev, irb); 899 ccw_device_do_sense(cdev, irb);
902 else { 900 else {
903 CIO_MSG_EVENT(2, "Huh? 0.%x.%04x: unsolicited " 901 CIO_MSG_EVENT(0, "0.%x.%04x: unsolicited "
904 "interrupt during w4sense...\n", 902 "interrupt during w4sense...\n",
905 cdev->private->dev_id.ssid, 903 cdev->private->dev_id.ssid,
906 cdev->private->dev_id.devno); 904 cdev->private->dev_id.devno);
@@ -1169,8 +1167,10 @@ ccw_device_nop(struct ccw_device *cdev, enum dev_event dev_event)
1169static void 1167static void
1170ccw_device_bug(struct ccw_device *cdev, enum dev_event dev_event) 1168ccw_device_bug(struct ccw_device *cdev, enum dev_event dev_event)
1171{ 1169{
1172 CIO_MSG_EVENT(0, "dev_jumptable[%i][%i] == NULL\n", 1170 CIO_MSG_EVENT(0, "Internal state [%i][%i] not handled for device "
1173 cdev->private->state, dev_event); 1171 "0.%x.%04x\n", cdev->private->state, dev_event,
1172 cdev->private->dev_id.ssid,
1173 cdev->private->dev_id.devno);
1174 BUG(); 1174 BUG();
1175} 1175}
1176 1176
diff --git a/drivers/s390/cio/device_id.c b/drivers/s390/cio/device_id.c
index dc4d87f77f6c..cba7020517ed 100644
--- a/drivers/s390/cio/device_id.c
+++ b/drivers/s390/cio/device_id.c
@@ -214,7 +214,7 @@ ccw_device_check_sense_id(struct ccw_device *cdev)
214 * sense id information. So, for intervention required, 214 * sense id information. So, for intervention required,
215 * we use the "whack it until it talks" strategy... 215 * we use the "whack it until it talks" strategy...
216 */ 216 */
217 CIO_MSG_EVENT(2, "SenseID : device %04x on Subchannel " 217 CIO_MSG_EVENT(0, "SenseID : device %04x on Subchannel "
218 "0.%x.%04x reports cmd reject\n", 218 "0.%x.%04x reports cmd reject\n",
219 cdev->private->dev_id.devno, sch->schid.ssid, 219 cdev->private->dev_id.devno, sch->schid.ssid,
220 sch->schid.sch_no); 220 sch->schid.sch_no);
@@ -239,7 +239,7 @@ ccw_device_check_sense_id(struct ccw_device *cdev)
239 239
240 lpm = to_io_private(sch)->orb.lpm; 240 lpm = to_io_private(sch)->orb.lpm;
241 if ((lpm & sch->schib.pmcw.pim & sch->schib.pmcw.pam) != 0) 241 if ((lpm & sch->schib.pmcw.pim & sch->schib.pmcw.pam) != 0)
242 CIO_MSG_EVENT(2, "SenseID : path %02X for device %04x " 242 CIO_MSG_EVENT(4, "SenseID : path %02X for device %04x "
243 "on subchannel 0.%x.%04x is " 243 "on subchannel 0.%x.%04x is "
244 "'not operational'\n", lpm, 244 "'not operational'\n", lpm,
245 cdev->private->dev_id.devno, 245 cdev->private->dev_id.devno,
diff --git a/drivers/s390/cio/device_pgid.c b/drivers/s390/cio/device_pgid.c
index c52449a1f9fc..ba559053402e 100644
--- a/drivers/s390/cio/device_pgid.c
+++ b/drivers/s390/cio/device_pgid.c
@@ -79,7 +79,7 @@ __ccw_device_sense_pgid_start(struct ccw_device *cdev)
79 /* ret is 0, -EBUSY, -EACCES or -ENODEV */ 79 /* ret is 0, -EBUSY, -EACCES or -ENODEV */
80 if (ret != -EACCES) 80 if (ret != -EACCES)
81 return ret; 81 return ret;
82 CIO_MSG_EVENT(2, "SNID - Device %04x on Subchannel " 82 CIO_MSG_EVENT(3, "SNID - Device %04x on Subchannel "
83 "0.%x.%04x, lpm %02X, became 'not " 83 "0.%x.%04x, lpm %02X, became 'not "
84 "operational'\n", 84 "operational'\n",
85 cdev->private->dev_id.devno, 85 cdev->private->dev_id.devno,
@@ -159,7 +159,7 @@ __ccw_device_check_sense_pgid(struct ccw_device *cdev)
159 u8 lpm; 159 u8 lpm;
160 160
161 lpm = to_io_private(sch)->orb.lpm; 161 lpm = to_io_private(sch)->orb.lpm;
162 CIO_MSG_EVENT(2, "SNID - Device %04x on Subchannel 0.%x.%04x," 162 CIO_MSG_EVENT(3, "SNID - Device %04x on Subchannel 0.%x.%04x,"
163 " lpm %02X, became 'not operational'\n", 163 " lpm %02X, became 'not operational'\n",
164 cdev->private->dev_id.devno, sch->schid.ssid, 164 cdev->private->dev_id.devno, sch->schid.ssid,
165 sch->schid.sch_no, lpm); 165 sch->schid.sch_no, lpm);
@@ -275,7 +275,7 @@ __ccw_device_do_pgid(struct ccw_device *cdev, __u8 func)
275 return ret; 275 return ret;
276 } 276 }
277 /* PGID command failed on this path. */ 277 /* PGID command failed on this path. */
278 CIO_MSG_EVENT(2, "SPID - Device %04x on Subchannel " 278 CIO_MSG_EVENT(3, "SPID - Device %04x on Subchannel "
279 "0.%x.%04x, lpm %02X, became 'not operational'\n", 279 "0.%x.%04x, lpm %02X, became 'not operational'\n",
280 cdev->private->dev_id.devno, sch->schid.ssid, 280 cdev->private->dev_id.devno, sch->schid.ssid,
281 sch->schid.sch_no, cdev->private->imask); 281 sch->schid.sch_no, cdev->private->imask);
@@ -317,7 +317,7 @@ static int __ccw_device_do_nop(struct ccw_device *cdev)
317 return ret; 317 return ret;
318 } 318 }
319 /* nop command failed on this path. */ 319 /* nop command failed on this path. */
320 CIO_MSG_EVENT(2, "NOP - Device %04x on Subchannel " 320 CIO_MSG_EVENT(3, "NOP - Device %04x on Subchannel "
321 "0.%x.%04x, lpm %02X, became 'not operational'\n", 321 "0.%x.%04x, lpm %02X, became 'not operational'\n",
322 cdev->private->dev_id.devno, sch->schid.ssid, 322 cdev->private->dev_id.devno, sch->schid.ssid,
323 sch->schid.sch_no, cdev->private->imask); 323 sch->schid.sch_no, cdev->private->imask);
@@ -362,7 +362,7 @@ __ccw_device_check_pgid(struct ccw_device *cdev)
362 return -EAGAIN; 362 return -EAGAIN;
363 } 363 }
364 if (irb->scsw.cc == 3) { 364 if (irb->scsw.cc == 3) {
365 CIO_MSG_EVENT(2, "SPID - Device %04x on Subchannel 0.%x.%04x," 365 CIO_MSG_EVENT(3, "SPID - Device %04x on Subchannel 0.%x.%04x,"
366 " lpm %02X, became 'not operational'\n", 366 " lpm %02X, became 'not operational'\n",
367 cdev->private->dev_id.devno, sch->schid.ssid, 367 cdev->private->dev_id.devno, sch->schid.ssid,
368 sch->schid.sch_no, cdev->private->imask); 368 sch->schid.sch_no, cdev->private->imask);
@@ -391,7 +391,7 @@ static int __ccw_device_check_nop(struct ccw_device *cdev)
391 return -ETIME; 391 return -ETIME;
392 } 392 }
393 if (irb->scsw.cc == 3) { 393 if (irb->scsw.cc == 3) {
394 CIO_MSG_EVENT(2, "NOP - Device %04x on Subchannel 0.%x.%04x," 394 CIO_MSG_EVENT(3, "NOP - Device %04x on Subchannel 0.%x.%04x,"
395 " lpm %02X, became 'not operational'\n", 395 " lpm %02X, became 'not operational'\n",
396 cdev->private->dev_id.devno, sch->schid.ssid, 396 cdev->private->dev_id.devno, sch->schid.ssid,
397 sch->schid.sch_no, cdev->private->imask); 397 sch->schid.sch_no, cdev->private->imask);
diff --git a/drivers/s390/s390mach.c b/drivers/s390/s390mach.c
index 4d4b54277c43..5080f343ad74 100644
--- a/drivers/s390/s390mach.c
+++ b/drivers/s390/s390mach.c
@@ -48,10 +48,11 @@ s390_collect_crw_info(void *param)
48 int ccode; 48 int ccode;
49 struct semaphore *sem; 49 struct semaphore *sem;
50 unsigned int chain; 50 unsigned int chain;
51 int ignore;
51 52
52 sem = (struct semaphore *)param; 53 sem = (struct semaphore *)param;
53repeat: 54repeat:
54 down_interruptible(sem); 55 ignore = down_interruptible(sem);
55 chain = 0; 56 chain = 0;
56 while (1) { 57 while (1) {
57 if (unlikely(chain > 1)) { 58 if (unlikely(chain > 1)) {
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index 46d7e400c8be..81ccbd7f9e34 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -1679,6 +1679,7 @@ config MAC_SCSI
1679config SCSI_MAC_ESP 1679config SCSI_MAC_ESP
1680 tristate "Macintosh NCR53c9[46] SCSI" 1680 tristate "Macintosh NCR53c9[46] SCSI"
1681 depends on MAC && SCSI 1681 depends on MAC && SCSI
1682 select SCSI_SPI_ATTRS
1682 help 1683 help
1683 This is the NCR 53c9x SCSI controller found on most of the 68040 1684 This is the NCR 53c9x SCSI controller found on most of the 68040
1684 based Macintoshes. 1685 based Macintoshes.
diff --git a/drivers/scsi/dpt_i2o.c b/drivers/scsi/dpt_i2o.c
index 0fb5bf4c43ac..8508816f303d 100644
--- a/drivers/scsi/dpt_i2o.c
+++ b/drivers/scsi/dpt_i2o.c
@@ -1967,45 +1967,6 @@ cleanup:
1967 return rcode; 1967 return rcode;
1968} 1968}
1969 1969
1970
1971/*
1972 * This routine returns information about the system. This does not effect
1973 * any logic and if the info is wrong - it doesn't matter.
1974 */
1975
1976/* Get all the info we can not get from kernel services */
1977static int adpt_system_info(void __user *buffer)
1978{
1979 sysInfo_S si;
1980
1981 memset(&si, 0, sizeof(si));
1982
1983 si.osType = OS_LINUX;
1984 si.osMajorVersion = 0;
1985 si.osMinorVersion = 0;
1986 si.osRevision = 0;
1987 si.busType = SI_PCI_BUS;
1988 si.processorFamily = DPTI_sig.dsProcessorFamily;
1989
1990#if defined __i386__
1991 adpt_i386_info(&si);
1992#elif defined (__ia64__)
1993 adpt_ia64_info(&si);
1994#elif defined(__sparc__)
1995 adpt_sparc_info(&si);
1996#elif defined (__alpha__)
1997 adpt_alpha_info(&si);
1998#else
1999 si.processorType = 0xff ;
2000#endif
2001 if(copy_to_user(buffer, &si, sizeof(si))){
2002 printk(KERN_WARNING"dpti: Could not copy buffer TO user\n");
2003 return -EFAULT;
2004 }
2005
2006 return 0;
2007}
2008
2009#if defined __ia64__ 1970#if defined __ia64__
2010static void adpt_ia64_info(sysInfo_S* si) 1971static void adpt_ia64_info(sysInfo_S* si)
2011{ 1972{
@@ -2016,7 +1977,6 @@ static void adpt_ia64_info(sysInfo_S* si)
2016} 1977}
2017#endif 1978#endif
2018 1979
2019
2020#if defined __sparc__ 1980#if defined __sparc__
2021static void adpt_sparc_info(sysInfo_S* si) 1981static void adpt_sparc_info(sysInfo_S* si)
2022{ 1982{
@@ -2026,7 +1986,6 @@ static void adpt_sparc_info(sysInfo_S* si)
2026 si->processorType = PROC_ULTRASPARC; 1986 si->processorType = PROC_ULTRASPARC;
2027} 1987}
2028#endif 1988#endif
2029
2030#if defined __alpha__ 1989#if defined __alpha__
2031static void adpt_alpha_info(sysInfo_S* si) 1990static void adpt_alpha_info(sysInfo_S* si)
2032{ 1991{
@@ -2038,7 +1997,6 @@ static void adpt_alpha_info(sysInfo_S* si)
2038#endif 1997#endif
2039 1998
2040#if defined __i386__ 1999#if defined __i386__
2041
2042static void adpt_i386_info(sysInfo_S* si) 2000static void adpt_i386_info(sysInfo_S* si)
2043{ 2001{
2044 // This is all the info we need for now 2002 // This is all the info we need for now
@@ -2059,9 +2017,45 @@ static void adpt_i386_info(sysInfo_S* si)
2059 break; 2017 break;
2060 } 2018 }
2061} 2019}
2020#endif
2021
2022/*
2023 * This routine returns information about the system. This does not effect
2024 * any logic and if the info is wrong - it doesn't matter.
2025 */
2062 2026
2027/* Get all the info we can not get from kernel services */
2028static int adpt_system_info(void __user *buffer)
2029{
2030 sysInfo_S si;
2031
2032 memset(&si, 0, sizeof(si));
2033
2034 si.osType = OS_LINUX;
2035 si.osMajorVersion = 0;
2036 si.osMinorVersion = 0;
2037 si.osRevision = 0;
2038 si.busType = SI_PCI_BUS;
2039 si.processorFamily = DPTI_sig.dsProcessorFamily;
2040
2041#if defined __i386__
2042 adpt_i386_info(&si);
2043#elif defined (__ia64__)
2044 adpt_ia64_info(&si);
2045#elif defined(__sparc__)
2046 adpt_sparc_info(&si);
2047#elif defined (__alpha__)
2048 adpt_alpha_info(&si);
2049#else
2050 si.processorType = 0xff ;
2063#endif 2051#endif
2052 if (copy_to_user(buffer, &si, sizeof(si))){
2053 printk(KERN_WARNING"dpti: Could not copy buffer TO user\n");
2054 return -EFAULT;
2055 }
2064 2056
2057 return 0;
2058}
2065 2059
2066static int adpt_ioctl(struct inode *inode, struct file *file, uint cmd, 2060static int adpt_ioctl(struct inode *inode, struct file *file, uint cmd,
2067 ulong arg) 2061 ulong arg)
diff --git a/drivers/scsi/dpti.h b/drivers/scsi/dpti.h
index 924cd5a51676..337746d46043 100644
--- a/drivers/scsi/dpti.h
+++ b/drivers/scsi/dpti.h
@@ -316,19 +316,6 @@ static int adpt_close(struct inode *inode, struct file *file);
316static void adpt_delay(int millisec); 316static void adpt_delay(int millisec);
317#endif 317#endif
318 318
319#if defined __ia64__
320static void adpt_ia64_info(sysInfo_S* si);
321#endif
322#if defined __sparc__
323static void adpt_sparc_info(sysInfo_S* si);
324#endif
325#if defined __alpha__
326static void adpt_sparc_info(sysInfo_S* si);
327#endif
328#if defined __i386__
329static void adpt_i386_info(sysInfo_S* si);
330#endif
331
332#define PRINT_BUFFER_SIZE 512 319#define PRINT_BUFFER_SIZE 512
333 320
334#define HBA_FLAGS_DBG_FLAGS_MASK 0xffff0000 // Mask for debug flags 321#define HBA_FLAGS_DBG_FLAGS_MASK 0xffff0000 // Mask for debug flags
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c
index 8a2f6a1baa74..d6b4ead693b7 100644
--- a/drivers/serial/bfin_5xx.c
+++ b/drivers/serial/bfin_5xx.c
@@ -65,9 +65,6 @@ static void bfin_serial_stop_tx(struct uart_port *port)
65{ 65{
66 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 66 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67 struct circ_buf *xmit = &uart->port.info->xmit; 67 struct circ_buf *xmit = &uart->port.info->xmit;
68#if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
69 unsigned short ier;
70#endif
71 68
72 while (!(UART_GET_LSR(uart) & TEMT)) 69 while (!(UART_GET_LSR(uart) & TEMT))
73 cpu_relax(); 70 cpu_relax();
@@ -82,12 +79,8 @@ static void bfin_serial_stop_tx(struct uart_port *port)
82#ifdef CONFIG_BF54x 79#ifdef CONFIG_BF54x
83 /* Clear TFI bit */ 80 /* Clear TFI bit */
84 UART_PUT_LSR(uart, TFI); 81 UART_PUT_LSR(uart, TFI);
85 UART_CLEAR_IER(uart, ETBEI);
86#else
87 ier = UART_GET_IER(uart);
88 ier &= ~ETBEI;
89 UART_PUT_IER(uart, ier);
90#endif 82#endif
83 UART_CLEAR_IER(uart, ETBEI);
91#endif 84#endif
92} 85}
93 86
@@ -102,14 +95,7 @@ static void bfin_serial_start_tx(struct uart_port *port)
102 if (uart->tx_done) 95 if (uart->tx_done)
103 bfin_serial_dma_tx_chars(uart); 96 bfin_serial_dma_tx_chars(uart);
104#else 97#else
105#ifdef CONFIG_BF54x
106 UART_SET_IER(uart, ETBEI); 98 UART_SET_IER(uart, ETBEI);
107#else
108 unsigned short ier;
109 ier = UART_GET_IER(uart);
110 ier |= ETBEI;
111 UART_PUT_IER(uart, ier);
112#endif
113 bfin_serial_tx_chars(uart); 99 bfin_serial_tx_chars(uart);
114#endif 100#endif
115} 101}
@@ -120,21 +106,10 @@ static void bfin_serial_start_tx(struct uart_port *port)
120static void bfin_serial_stop_rx(struct uart_port *port) 106static void bfin_serial_stop_rx(struct uart_port *port)
121{ 107{
122 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 108 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
123#ifdef CONFIG_KGDB_UART 109#ifdef CONFIG_KGDB_UART
124 if (uart->port.line != CONFIG_KGDB_UART_PORT) { 110 if (uart->port.line != CONFIG_KGDB_UART_PORT)
125#endif 111#endif
126#ifdef CONFIG_BF54x
127 UART_CLEAR_IER(uart, ERBFI); 112 UART_CLEAR_IER(uart, ERBFI);
128#else
129 unsigned short ier;
130
131 ier = UART_GET_IER(uart);
132 ier &= ~ERBFI;
133 UART_PUT_IER(uart, ier);
134#endif
135#ifdef CONFIG_KGDB_UART
136 }
137#endif
138} 113}
139 114
140/* 115/*
@@ -161,10 +136,7 @@ void kgdb_put_debug_char(int chr)
161 SSYNC(); 136 SSYNC();
162 } 137 }
163 138
164#ifndef CONFIG_BF54x 139 UART_CLEAR_DLAB(uart);
165 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
166 SSYNC();
167#endif
168 UART_PUT_CHAR(uart, (unsigned char)chr); 140 UART_PUT_CHAR(uart, (unsigned char)chr);
169 SSYNC(); 141 SSYNC();
170} 142}
@@ -183,10 +155,7 @@ int kgdb_get_debug_char(void)
183 while(!(UART_GET_LSR(uart) & DR)) { 155 while(!(UART_GET_LSR(uart) & DR)) {
184 SSYNC(); 156 SSYNC();
185 } 157 }
186#ifndef CONFIG_BF54x 158 UART_CLEAR_DLAB(uart);
187 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
188 SSYNC();
189#endif
190 chr = UART_GET_CHAR(uart); 159 chr = UART_GET_CHAR(uart);
191 SSYNC(); 160 SSYNC();
192 161
@@ -208,9 +177,6 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
208 struct tty_struct *tty = uart->port.info->tty; 177 struct tty_struct *tty = uart->port.info->tty;
209 unsigned int status, ch, flg; 178 unsigned int status, ch, flg;
210 static struct timeval anomaly_start = { .tv_sec = 0 }; 179 static struct timeval anomaly_start = { .tv_sec = 0 };
211#ifdef CONFIG_KGDB_UART
212 struct pt_regs *regs = get_irq_regs();
213#endif
214 180
215 status = UART_GET_LSR(uart); 181 status = UART_GET_LSR(uart);
216 UART_CLEAR_LSR(uart); 182 UART_CLEAR_LSR(uart);
@@ -220,6 +186,7 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
220 186
221#ifdef CONFIG_KGDB_UART 187#ifdef CONFIG_KGDB_UART
222 if (uart->port.line == CONFIG_KGDB_UART_PORT) { 188 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
189 struct pt_regs *regs = get_irq_regs();
223 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */ 190 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
224 kgdb_breakkey_pressed(regs); 191 kgdb_breakkey_pressed(regs);
225 return; 192 return;
@@ -391,7 +358,6 @@ static void bfin_serial_do_work(struct work_struct *work)
391static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart) 358static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
392{ 359{
393 struct circ_buf *xmit = &uart->port.info->xmit; 360 struct circ_buf *xmit = &uart->port.info->xmit;
394 unsigned short ier;
395 361
396 uart->tx_done = 0; 362 uart->tx_done = 0;
397 363
@@ -429,13 +395,7 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
429 set_dma_x_modify(uart->tx_dma_channel, 1); 395 set_dma_x_modify(uart->tx_dma_channel, 1);
430 enable_dma(uart->tx_dma_channel); 396 enable_dma(uart->tx_dma_channel);
431 397
432#ifdef CONFIG_BF54x
433 UART_SET_IER(uart, ETBEI); 398 UART_SET_IER(uart, ETBEI);
434#else
435 ier = UART_GET_IER(uart);
436 ier |= ETBEI;
437 UART_PUT_IER(uart, ier);
438#endif
439} 399}
440 400
441static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart) 401static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
@@ -513,19 +473,12 @@ static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
513{ 473{
514 struct bfin_serial_port *uart = dev_id; 474 struct bfin_serial_port *uart = dev_id;
515 struct circ_buf *xmit = &uart->port.info->xmit; 475 struct circ_buf *xmit = &uart->port.info->xmit;
516 unsigned short ier;
517 476
518 spin_lock(&uart->port.lock); 477 spin_lock(&uart->port.lock);
519 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) { 478 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
520 disable_dma(uart->tx_dma_channel); 479 disable_dma(uart->tx_dma_channel);
521 clear_dma_irqstat(uart->tx_dma_channel); 480 clear_dma_irqstat(uart->tx_dma_channel);
522#ifdef CONFIG_BF54x
523 UART_CLEAR_IER(uart, ETBEI); 481 UART_CLEAR_IER(uart, ETBEI);
524#else
525 ier = UART_GET_IER(uart);
526 ier &= ~ETBEI;
527 UART_PUT_IER(uart, ier);
528#endif
529 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1); 482 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
530 uart->port.icount.tx += uart->tx_count; 483 uart->port.icount.tx += uart->tx_count;
531 484
@@ -701,7 +654,6 @@ static int bfin_serial_startup(struct uart_port *port)
701# endif 654# endif
702 } 655 }
703 656
704
705 if (request_irq 657 if (request_irq
706 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED, 658 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
707 "BFIN_UART_TX", uart)) { 659 "BFIN_UART_TX", uart)) {
@@ -710,11 +662,7 @@ static int bfin_serial_startup(struct uart_port *port)
710 return -EBUSY; 662 return -EBUSY;
711 } 663 }
712#endif 664#endif
713#ifdef CONFIG_BF54x
714 UART_SET_IER(uart, ERBFI); 665 UART_SET_IER(uart, ERBFI);
715#else
716 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
717#endif
718 return 0; 666 return 0;
719} 667}
720 668
@@ -810,26 +758,15 @@ bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
810 UART_PUT_IER(uart, 0); 758 UART_PUT_IER(uart, 0);
811#endif 759#endif
812 760
813#ifndef CONFIG_BF54x
814 /* Set DLAB in LCR to Access DLL and DLH */ 761 /* Set DLAB in LCR to Access DLL and DLH */
815 val = UART_GET_LCR(uart); 762 UART_SET_DLAB(uart);
816 val |= DLAB;
817 UART_PUT_LCR(uart, val);
818 SSYNC();
819#endif
820 763
821 UART_PUT_DLL(uart, quot & 0xFF); 764 UART_PUT_DLL(uart, quot & 0xFF);
822 SSYNC();
823 UART_PUT_DLH(uart, (quot >> 8) & 0xFF); 765 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
824 SSYNC(); 766 SSYNC();
825 767
826#ifndef CONFIG_BF54x
827 /* Clear DLAB in LCR to Access THR RBR IER */ 768 /* Clear DLAB in LCR to Access THR RBR IER */
828 val = UART_GET_LCR(uart); 769 UART_CLEAR_DLAB(uart);
829 val &= ~DLAB;
830 UART_PUT_LCR(uart, val);
831 SSYNC();
832#endif
833 770
834 UART_PUT_LCR(uart, lcr); 771 UART_PUT_LCR(uart, lcr);
835 772
@@ -992,8 +929,7 @@ bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
992 status = UART_GET_IER(uart) & (ERBFI | ETBEI); 929 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
993 if (status == (ERBFI | ETBEI)) { 930 if (status == (ERBFI | ETBEI)) {
994 /* ok, the port was enabled */ 931 /* ok, the port was enabled */
995 unsigned short lcr, val; 932 u16 lcr, dlh, dll;
996 unsigned short dlh, dll;
997 933
998 lcr = UART_GET_LCR(uart); 934 lcr = UART_GET_LCR(uart);
999 935
@@ -1010,22 +946,14 @@ bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1010 case 2: *bits = 7; break; 946 case 2: *bits = 7; break;
1011 case 3: *bits = 8; break; 947 case 3: *bits = 8; break;
1012 } 948 }
1013#ifndef CONFIG_BF54x
1014 /* Set DLAB in LCR to Access DLL and DLH */ 949 /* Set DLAB in LCR to Access DLL and DLH */
1015 val = UART_GET_LCR(uart); 950 UART_SET_DLAB(uart);
1016 val |= DLAB;
1017 UART_PUT_LCR(uart, val);
1018#endif
1019 951
1020 dll = UART_GET_DLL(uart); 952 dll = UART_GET_DLL(uart);
1021 dlh = UART_GET_DLH(uart); 953 dlh = UART_GET_DLH(uart);
1022 954
1023#ifndef CONFIG_BF54x
1024 /* Clear DLAB in LCR to Access THR RBR IER */ 955 /* Clear DLAB in LCR to Access THR RBR IER */
1025 val = UART_GET_LCR(uart); 956 UART_CLEAR_DLAB(uart);
1026 val &= ~DLAB;
1027 UART_PUT_LCR(uart, val);
1028#endif
1029 957
1030 *baud = get_sclk() / (16*(dll | dlh << 8)); 958 *baud = get_sclk() / (16*(dll | dlh << 8));
1031 } 959 }
@@ -1290,11 +1218,7 @@ static int __init bfin_serial_init(void)
1290 request_irq(uart->port.irq, bfin_serial_rx_int, 1218 request_irq(uart->port.irq, bfin_serial_rx_int,
1291 IRQF_DISABLED, "BFIN_UART_RX", uart); 1219 IRQF_DISABLED, "BFIN_UART_RX", uart);
1292 pr_info("Request irq for kgdb uart port\n"); 1220 pr_info("Request irq for kgdb uart port\n");
1293#ifdef CONFIG_BF54x
1294 UART_SET_IER(uart, ERBFI); 1221 UART_SET_IER(uart, ERBFI);
1295#else
1296 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1297#endif
1298 SSYNC(); 1222 SSYNC();
1299 t.c_cflag = CS8|B57600; 1223 t.c_cflag = CS8|B57600;
1300 t.c_iflag = 0; 1224 t.c_iflag = 0;
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
index 1e2b9d826f69..eab032733790 100644
--- a/drivers/serial/serial_core.c
+++ b/drivers/serial/serial_core.c
@@ -556,7 +556,7 @@ static int uart_chars_in_buffer(struct tty_struct *tty)
556static void uart_flush_buffer(struct tty_struct *tty) 556static void uart_flush_buffer(struct tty_struct *tty)
557{ 557{
558 struct uart_state *state = tty->driver_data; 558 struct uart_state *state = tty->driver_data;
559 struct uart_port *port = state->port; 559 struct uart_port *port;
560 unsigned long flags; 560 unsigned long flags;
561 561
562 /* 562 /*
@@ -568,6 +568,7 @@ static void uart_flush_buffer(struct tty_struct *tty)
568 return; 568 return;
569 } 569 }
570 570
571 port = state->port;
571 pr_debug("uart_flush_buffer(%d) called\n", tty->index); 572 pr_debug("uart_flush_buffer(%d) called\n", tty->index);
572 573
573 spin_lock_irqsave(&port->lock, flags); 574 spin_lock_irqsave(&port->lock, flags);
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 969106187718..8fdafc27fce8 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -42,14 +42,12 @@
42#include <linux/console.h> 42#include <linux/console.h>
43#include <linux/platform_device.h> 43#include <linux/platform_device.h>
44#include <linux/serial_sci.h> 44#include <linux/serial_sci.h>
45
46#ifdef CONFIG_CPU_FREQ
47#include <linux/notifier.h> 45#include <linux/notifier.h>
48#include <linux/cpufreq.h> 46#include <linux/cpufreq.h>
49#endif 47#include <linux/clk.h>
50
51#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
52#include <linux/ctype.h> 48#include <linux/ctype.h>
49
50#ifdef CONFIG_SUPERH
53#include <asm/clock.h> 51#include <asm/clock.h>
54#include <asm/sh_bios.h> 52#include <asm/sh_bios.h>
55#include <asm/kgdb.h> 53#include <asm/kgdb.h>
@@ -80,7 +78,7 @@ struct sci_port {
80 struct timer_list break_timer; 78 struct timer_list break_timer;
81 int break_flag; 79 int break_flag;
82 80
83#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) 81#ifdef CONFIG_SUPERH
84 /* Port clock */ 82 /* Port clock */
85 struct clk *clk; 83 struct clk *clk;
86#endif 84#endif
@@ -365,21 +363,19 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
365static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) 363static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
366{ 364{
367 unsigned int fcr_val = 0; 365 unsigned int fcr_val = 0;
366 unsigned short data;
368 367
369 if (cflag & CRTSCTS) { 368 if (port->mapbase == 0xffe00000) {
370 fcr_val |= SCFCR_MCE; 369 data = ctrl_inw(PSCR);
371 370 data &= ~0x03cf;
372 ctrl_outw(0x0000, PORT_PSCR); 371 if (cflag & CRTSCTS)
373 } else { 372 fcr_val |= SCFCR_MCE;
374 unsigned short data; 373 else
375 374 data |= 0x0340;
376 data = ctrl_inw(PORT_PSCR);
377 data &= 0x033f;
378 data |= 0x0400;
379 ctrl_outw(data, PORT_PSCR);
380 375
381 ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0); 376 ctrl_outw(data, PSCR);
382 } 377 }
378 /* SCIF1 and SCIF2 should be setup by board code */
383 379
384 sci_out(port, SCFCR, fcr_val); 380 sci_out(port, SCFCR, fcr_val);
385} 381}
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index fa8700a968fc..eb84833233fd 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -76,12 +76,13 @@
76# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ 76# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */
77# define SCIF_ONLY 77# define SCIF_ONLY
78#elif defined(CONFIG_CPU_SUBTYPE_SH7722) 78#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
79# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ 79# define PADR 0xA4050120
80# define SCSPTR0 SCPDR0 80# define PSDR 0xA405013e
81# define PWDR 0xA4050166
82# define PSCR 0xA405011E
81# define SCIF_ORER 0x0001 /* overrun error bit */ 83# define SCIF_ORER 0x0001 /* overrun error bit */
82# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 84# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
83# define SCIF_ONLY 85# define SCIF_ONLY
84# define PORT_PSCR 0xA405011E
85#elif defined(CONFIG_CPU_SUBTYPE_SH7366) 86#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
86# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ 87# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */
87# define SCSPTR0 SCPDR0 88# define SCSPTR0 SCPDR0
@@ -320,7 +321,7 @@
320 unsigned int addr = port->mapbase + (offset); \ 321 unsigned int addr = port->mapbase + (offset); \
321 if ((size) == 8) { \ 322 if ((size) == 8) { \
322 ctrl_outb(value, addr); \ 323 ctrl_outb(value, addr); \
323 } else { \ 324 } else if ((size) == 16) { \
324 ctrl_outw(value, addr); \ 325 ctrl_outw(value, addr); \
325 } 326 }
326 327
@@ -451,7 +452,11 @@ SCIF_FNS(SCSPTR, 0, 0, 0x24, 16)
451SCIF_FNS(SCLSR, 0, 0, 0x28, 16) 452SCIF_FNS(SCLSR, 0, 0, 0x28, 16)
452#else 453#else
453SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) 454SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
455#if defined(CONFIG_CPU_SUBTYPE_SH7722)
456SCIF_FNS(SCSPTR, 0, 0, 0, 0)
457#else
454SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) 458SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
459#endif
455SCIF_FNS(SCLSR, 0, 0, 0x24, 16) 460SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
456#endif 461#endif
457#endif 462#endif
@@ -593,13 +598,25 @@ static inline int sci_rxd_in(struct uart_port *port)
593 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ 598 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
594 return 1; 599 return 1;
595} 600}
596#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366) 601#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
597static inline int sci_rxd_in(struct uart_port *port) 602static inline int sci_rxd_in(struct uart_port *port)
598{ 603{
599 if (port->mapbase == 0xffe00000) 604 if (port->mapbase == 0xffe00000)
600 return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ 605 return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */
601 return 1; 606 return 1;
602} 607}
608#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
609static inline int sci_rxd_in(struct uart_port *port)
610{
611 if (port->mapbase == 0xffe00000)
612 return ctrl_inb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */
613 if (port->mapbase == 0xffe10000)
614 return ctrl_inb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */
615 if (port->mapbase == 0xffe20000)
616 return ctrl_inb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */
617
618 return 1;
619}
603#elif defined(CONFIG_CPU_SUBTYPE_SH7723) 620#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
604static inline int sci_rxd_in(struct uart_port *port) 621static inline int sci_rxd_in(struct uart_port *port)
605{ 622{
diff --git a/drivers/usb/serial/iuu_phoenix.c b/drivers/usb/serial/iuu_phoenix.c
index 8a217648b250..a01e987c7d32 100644
--- a/drivers/usb/serial/iuu_phoenix.c
+++ b/drivers/usb/serial/iuu_phoenix.c
@@ -643,7 +643,7 @@ static void read_buf_callback(struct urb *urb)
643static int iuu_bulk_write(struct usb_serial_port *port) 643static int iuu_bulk_write(struct usb_serial_port *port)
644{ 644{
645 struct iuu_private *priv = usb_get_serial_port_data(port); 645 struct iuu_private *priv = usb_get_serial_port_data(port);
646 unsigned int flags; 646 unsigned long flags;
647 int result; 647 int result;
648 int i; 648 int i;
649 char *buf_ptr = port->write_urb->transfer_buffer; 649 char *buf_ptr = port->write_urb->transfer_buffer;
@@ -694,7 +694,7 @@ static void iuu_uart_read_callback(struct urb *urb)
694{ 694{
695 struct usb_serial_port *port = urb->context; 695 struct usb_serial_port *port = urb->context;
696 struct iuu_private *priv = usb_get_serial_port_data(port); 696 struct iuu_private *priv = usb_get_serial_port_data(port);
697 unsigned int flags; 697 unsigned long flags;
698 int status; 698 int status;
699 int error = 0; 699 int error = 0;
700 int len = 0; 700 int len = 0;
@@ -759,7 +759,7 @@ static int iuu_uart_write(struct usb_serial_port *port, const u8 *buf,
759 int count) 759 int count)
760{ 760{
761 struct iuu_private *priv = usb_get_serial_port_data(port); 761 struct iuu_private *priv = usb_get_serial_port_data(port);
762 unsigned int flags; 762 unsigned long flags;
763 dbg("%s - enter", __func__); 763 dbg("%s - enter", __func__);
764 764
765 if (count > 256) 765 if (count > 256)
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index 3ab6e3d973a1..48aea39c35a5 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -1301,8 +1301,8 @@ static void pxafb_decode_mode_info(struct pxafb_info *fbi,
1301 } 1301 }
1302} 1302}
1303 1303
1304static int pxafb_decode_mach_info(struct pxafb_info *fbi, 1304static void pxafb_decode_mach_info(struct pxafb_info *fbi,
1305 struct pxafb_mach_info *inf) 1305 struct pxafb_mach_info *inf)
1306{ 1306{
1307 unsigned int lcd_conn = inf->lcd_conn; 1307 unsigned int lcd_conn = inf->lcd_conn;
1308 1308
@@ -1333,7 +1333,7 @@ static int pxafb_decode_mach_info(struct pxafb_info *fbi,
1333 fbi->lccr0 = inf->lccr0; 1333 fbi->lccr0 = inf->lccr0;
1334 fbi->lccr3 = inf->lccr3; 1334 fbi->lccr3 = inf->lccr3;
1335 fbi->lccr4 = inf->lccr4; 1335 fbi->lccr4 = inf->lccr4;
1336 return -EINVAL; 1336 goto decode_mode;
1337 } 1337 }
1338 1338
1339 if (lcd_conn == LCD_MONO_STN_8BPP) 1339 if (lcd_conn == LCD_MONO_STN_8BPP)
@@ -1343,8 +1343,8 @@ static int pxafb_decode_mach_info(struct pxafb_info *fbi,
1343 fbi->lccr3 |= (lcd_conn & LCD_BIAS_ACTIVE_LOW) ? LCCR3_OEP : 0; 1343 fbi->lccr3 |= (lcd_conn & LCD_BIAS_ACTIVE_LOW) ? LCCR3_OEP : 0;
1344 fbi->lccr3 |= (lcd_conn & LCD_PCLK_EDGE_FALL) ? LCCR3_PCP : 0; 1344 fbi->lccr3 |= (lcd_conn & LCD_PCLK_EDGE_FALL) ? LCCR3_PCP : 0;
1345 1345
1346decode_mode:
1346 pxafb_decode_mode_info(fbi, inf->modes, inf->num_modes); 1347 pxafb_decode_mode_info(fbi, inf->modes, inf->num_modes);
1347 return 0;
1348} 1348}
1349 1349
1350static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev) 1350static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev)