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-rw-r--r--drivers/net/tg3.c34
-rw-r--r--drivers/net/tg3.h8
2 files changed, 31 insertions, 11 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 6d4ab1e333b5..13283c29f802 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -366,7 +366,7 @@ static void _tw32_flush(struct tg3 *tp, u32 off, u32 val)
366 } 366 }
367} 367}
368 368
369static inline void _tw32_rx_mbox(struct tg3 *tp, u32 off, u32 val) 369static void tg3_write32_rx_mbox(struct tg3 *tp, u32 off, u32 val)
370{ 370{
371 void __iomem *mbox = tp->regs + off; 371 void __iomem *mbox = tp->regs + off;
372 writel(val, mbox); 372 writel(val, mbox);
@@ -374,7 +374,7 @@ static inline void _tw32_rx_mbox(struct tg3 *tp, u32 off, u32 val)
374 readl(mbox); 374 readl(mbox);
375} 375}
376 376
377static inline void _tw32_tx_mbox(struct tg3 *tp, u32 off, u32 val) 377static void tg3_write32_tx_mbox(struct tg3 *tp, u32 off, u32 val)
378{ 378{
379 void __iomem *mbox = tp->regs + off; 379 void __iomem *mbox = tp->regs + off;
380 writel(val, mbox); 380 writel(val, mbox);
@@ -384,17 +384,23 @@ static inline void _tw32_tx_mbox(struct tg3 *tp, u32 off, u32 val)
384 readl(mbox); 384 readl(mbox);
385} 385}
386 386
387#define tw32_mailbox(reg, val) writel(((val) & 0xffffffff), tp->regs + (reg)) 387static void tg3_write32(struct tg3 *tp, u32 off, u32 val)
388#define tw32_rx_mbox(reg, val) _tw32_rx_mbox(tp, reg, val) 388{
389#define tw32_tx_mbox(reg, val) _tw32_tx_mbox(tp, reg, val) 389 writel(val, tp->regs + off);
390}
390 391
391#define tw32(reg,val) tg3_write_indirect_reg32(tp,(reg),(val)) 392static u32 tg3_read32(struct tg3 *tp, u32 off)
393{
394 return (readl(tp->regs + off));
395}
396
397#define tw32_mailbox(reg, val) tp->write32_mbox(tp, reg, val)
398#define tw32_rx_mbox(reg, val) tp->write32_rx_mbox(tp, reg, val)
399#define tw32_tx_mbox(reg, val) tp->write32_tx_mbox(tp, reg, val)
400
401#define tw32(reg,val) tp->write32(tp, reg, val)
392#define tw32_f(reg,val) _tw32_flush(tp,(reg),(val)) 402#define tw32_f(reg,val) _tw32_flush(tp,(reg),(val))
393#define tw16(reg,val) writew(((val) & 0xffff), tp->regs + (reg)) 403#define tr32(reg) tp->read32(tp, reg)
394#define tw8(reg,val) writeb(((val) & 0xff), tp->regs + (reg))
395#define tr32(reg) readl(tp->regs + (reg))
396#define tr16(reg) readw(tp->regs + (reg))
397#define tr8(reg) readb(tp->regs + (reg))
398 404
399static void tg3_write_mem(struct tg3 *tp, u32 off, u32 val) 405static void tg3_write_mem(struct tg3 *tp, u32 off, u32 val)
400{ 406{
@@ -9325,6 +9331,12 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
9325 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, pci_state_reg); 9331 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, pci_state_reg);
9326 } 9332 }
9327 9333
9334 tp->read32 = tg3_read32;
9335 tp->write32 = tg3_write_indirect_reg32;
9336 tp->write32_mbox = tg3_write32;
9337 tp->write32_tx_mbox = tg3_write32_tx_mbox;
9338 tp->write32_rx_mbox = tg3_write32_rx_mbox;
9339
9328 /* Get eeprom hw config before calling tg3_set_power_state(). 9340 /* Get eeprom hw config before calling tg3_set_power_state().
9329 * In particular, the TG3_FLAG_EEPROM_WRITE_PROT flag must be 9341 * In particular, the TG3_FLAG_EEPROM_WRITE_PROT flag must be
9330 * determined before calling tg3_set_power_state() so that 9342 * determined before calling tg3_set_power_state() so that
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 5c4433c147fa..394acddd53b3 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2049,6 +2049,10 @@ struct tg3 {
2049 spinlock_t lock; 2049 spinlock_t lock;
2050 spinlock_t indirect_lock; 2050 spinlock_t indirect_lock;
2051 2051
2052 u32 (*read32) (struct tg3 *, u32);
2053 void (*write32) (struct tg3 *, u32, u32);
2054 void (*write32_mbox) (struct tg3 *, u32,
2055 u32);
2052 void __iomem *regs; 2056 void __iomem *regs;
2053 struct net_device *dev; 2057 struct net_device *dev;
2054 struct pci_dev *pdev; 2058 struct pci_dev *pdev;
@@ -2060,6 +2064,8 @@ struct tg3 {
2060 u32 msg_enable; 2064 u32 msg_enable;
2061 2065
2062 /* begin "tx thread" cacheline section */ 2066 /* begin "tx thread" cacheline section */
2067 void (*write32_tx_mbox) (struct tg3 *, u32,
2068 u32);
2063 u32 tx_prod; 2069 u32 tx_prod;
2064 u32 tx_cons; 2070 u32 tx_cons;
2065 u32 tx_pending; 2071 u32 tx_pending;
@@ -2071,6 +2077,8 @@ struct tg3 {
2071 dma_addr_t tx_desc_mapping; 2077 dma_addr_t tx_desc_mapping;
2072 2078
2073 /* begin "rx thread" cacheline section */ 2079 /* begin "rx thread" cacheline section */
2080 void (*write32_rx_mbox) (struct tg3 *, u32,
2081 u32);
2074 u32 rx_rcb_ptr; 2082 u32 rx_rcb_ptr;
2075 u32 rx_std_ptr; 2083 u32 rx_std_ptr;
2076 u32 rx_jumbo_ptr; 2084 u32 rx_jumbo_ptr;