diff options
Diffstat (limited to 'drivers')
29 files changed, 120 insertions, 225 deletions
diff --git a/drivers/ide/arm/icside.c b/drivers/ide/arm/icside.c index 93f71fcfc04d..673402f4a295 100644 --- a/drivers/ide/arm/icside.c +++ b/drivers/ide/arm/icside.c | |||
@@ -272,8 +272,6 @@ static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode) | |||
272 | case XFER_SW_DMA_0: | 272 | case XFER_SW_DMA_0: |
273 | cycle_time = 480; | 273 | cycle_time = 480; |
274 | break; | 274 | break; |
275 | default: | ||
276 | return; | ||
277 | } | 275 | } |
278 | 276 | ||
279 | /* | 277 | /* |
diff --git a/drivers/ide/cris/ide-cris.c b/drivers/ide/cris/ide-cris.c index 476e0d65ed43..325e608d9e62 100644 --- a/drivers/ide/cris/ide-cris.c +++ b/drivers/ide/cris/ide-cris.c | |||
@@ -747,8 +747,6 @@ static void cris_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
747 | strobe = ATA_DMA2_STROBE; | 747 | strobe = ATA_DMA2_STROBE; |
748 | hold = ATA_DMA2_HOLD; | 748 | hold = ATA_DMA2_HOLD; |
749 | break; | 749 | break; |
750 | default: | ||
751 | return; | ||
752 | } | 750 | } |
753 | 751 | ||
754 | if (speed >= XFER_UDMA_0) | 752 | if (speed >= XFER_UDMA_0) |
diff --git a/drivers/ide/ide-lib.c b/drivers/ide/ide-lib.c index 8649db33f67d..a3bd8e8ed6b0 100644 --- a/drivers/ide/ide-lib.c +++ b/drivers/ide/ide-lib.c | |||
@@ -441,6 +441,12 @@ int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) | |||
441 | * case could happen iff the transfer mode has already been set on | 441 | * case could happen iff the transfer mode has already been set on |
442 | * the device by ide-proc.c::set_xfer_rate()). | 442 | * the device by ide-proc.c::set_xfer_rate()). |
443 | */ | 443 | */ |
444 | if (rate < XFER_PIO_0) { | ||
445 | if (hwif->host_flags & IDE_HFLAG_ABUSE_SET_DMA_MODE) | ||
446 | return ide_set_dma_mode(drive, rate); | ||
447 | else | ||
448 | return ide_config_drive_speed(drive, rate); | ||
449 | } | ||
444 | 450 | ||
445 | return ide_set_dma_mode(drive, rate); | 451 | return ide_set_dma_mode(drive, rate); |
446 | } | 452 | } |
diff --git a/drivers/ide/mips/au1xxx-ide.c b/drivers/ide/mips/au1xxx-ide.c index a4ce3ba15d61..a4d0d4ca73d0 100644 --- a/drivers/ide/mips/au1xxx-ide.c +++ b/drivers/ide/mips/au1xxx-ide.c | |||
@@ -198,8 +198,6 @@ static void auide_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
198 | 198 | ||
199 | break; | 199 | break; |
200 | #endif | 200 | #endif |
201 | default: | ||
202 | return; | ||
203 | } | 201 | } |
204 | 202 | ||
205 | au_writel(mem_sttime,MEM_STTIME2); | 203 | au_writel(mem_sttime,MEM_STTIME2); |
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c index 44268504ae43..7f4d1857d555 100644 --- a/drivers/ide/pci/aec62xx.c +++ b/drivers/ide/pci/aec62xx.c | |||
@@ -202,6 +202,7 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { | |||
202 | .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, | 202 | .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, |
203 | .host_flags = IDE_HFLAG_SERIALIZE | | 203 | .host_flags = IDE_HFLAG_SERIALIZE | |
204 | IDE_HFLAG_NO_ATAPI_DMA | | 204 | IDE_HFLAG_NO_ATAPI_DMA | |
205 | IDE_HFLAG_ABUSE_SET_DMA_MODE | | ||
205 | IDE_HFLAG_OFF_BOARD, | 206 | IDE_HFLAG_OFF_BOARD, |
206 | .pio_mask = ATA_PIO4, | 207 | .pio_mask = ATA_PIO4, |
207 | .mwdma_mask = ATA_MWDMA2, | 208 | .mwdma_mask = ATA_MWDMA2, |
@@ -211,6 +212,7 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { | |||
211 | .init_chipset = init_chipset_aec62xx, | 212 | .init_chipset = init_chipset_aec62xx, |
212 | .init_hwif = init_hwif_aec62xx, | 213 | .init_hwif = init_hwif_aec62xx, |
213 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_NO_AUTODMA | | 214 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_NO_AUTODMA | |
215 | IDE_HFLAG_ABUSE_SET_DMA_MODE | | ||
214 | IDE_HFLAG_OFF_BOARD, | 216 | IDE_HFLAG_OFF_BOARD, |
215 | .pio_mask = ATA_PIO4, | 217 | .pio_mask = ATA_PIO4, |
216 | .mwdma_mask = ATA_MWDMA2, | 218 | .mwdma_mask = ATA_MWDMA2, |
@@ -220,7 +222,8 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { | |||
220 | .init_chipset = init_chipset_aec62xx, | 222 | .init_chipset = init_chipset_aec62xx, |
221 | .init_hwif = init_hwif_aec62xx, | 223 | .init_hwif = init_hwif_aec62xx, |
222 | .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, | 224 | .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, |
223 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA, | 225 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | |
226 | IDE_HFLAG_ABUSE_SET_DMA_MODE, | ||
224 | .pio_mask = ATA_PIO4, | 227 | .pio_mask = ATA_PIO4, |
225 | .mwdma_mask = ATA_MWDMA2, | 228 | .mwdma_mask = ATA_MWDMA2, |
226 | .udma_mask = ATA_UDMA4, | 229 | .udma_mask = ATA_UDMA4, |
@@ -228,7 +231,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { | |||
228 | .name = "AEC6280", | 231 | .name = "AEC6280", |
229 | .init_chipset = init_chipset_aec62xx, | 232 | .init_chipset = init_chipset_aec62xx, |
230 | .init_hwif = init_hwif_aec62xx, | 233 | .init_hwif = init_hwif_aec62xx, |
231 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, | 234 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | |
235 | IDE_HFLAG_ABUSE_SET_DMA_MODE | | ||
236 | IDE_HFLAG_OFF_BOARD, | ||
232 | .pio_mask = ATA_PIO4, | 237 | .pio_mask = ATA_PIO4, |
233 | .mwdma_mask = ATA_MWDMA2, | 238 | .mwdma_mask = ATA_MWDMA2, |
234 | .udma_mask = ATA_UDMA5, | 239 | .udma_mask = ATA_UDMA5, |
@@ -237,7 +242,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { | |||
237 | .init_chipset = init_chipset_aec62xx, | 242 | .init_chipset = init_chipset_aec62xx, |
238 | .init_hwif = init_hwif_aec62xx, | 243 | .init_hwif = init_hwif_aec62xx, |
239 | .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, | 244 | .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, |
240 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, | 245 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | |
246 | IDE_HFLAG_ABUSE_SET_DMA_MODE | | ||
247 | IDE_HFLAG_OFF_BOARD, | ||
241 | .pio_mask = ATA_PIO4, | 248 | .pio_mask = ATA_PIO4, |
242 | .mwdma_mask = ATA_MWDMA2, | 249 | .mwdma_mask = ATA_MWDMA2, |
243 | .udma_mask = ATA_UDMA5, | 250 | .udma_mask = ATA_UDMA5, |
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c index ce293936af4b..49aa82e412b6 100644 --- a/drivers/ide/pci/alim15x3.c +++ b/drivers/ide/pci/alim15x3.c | |||
@@ -402,9 +402,6 @@ static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
402 | u8 tmpbyte = 0x00; | 402 | u8 tmpbyte = 0x00; |
403 | int m5229_udma = (hwif->channel) ? 0x57 : 0x56; | 403 | int m5229_udma = (hwif->channel) ? 0x57 : 0x56; |
404 | 404 | ||
405 | if (speed < XFER_PIO_0) | ||
406 | return; | ||
407 | |||
408 | if (speed == XFER_UDMA_6) | 405 | if (speed == XFER_UDMA_6) |
409 | speed1 = 0x47; | 406 | speed1 = 0x47; |
410 | 407 | ||
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c index 8d4125ec252c..cee51fdafcf6 100644 --- a/drivers/ide/pci/amd74xx.c +++ b/drivers/ide/pci/amd74xx.c | |||
@@ -266,6 +266,7 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) | |||
266 | #define IDE_HFLAGS_AMD \ | 266 | #define IDE_HFLAGS_AMD \ |
267 | (IDE_HFLAG_PIO_NO_BLACKLIST | \ | 267 | (IDE_HFLAG_PIO_NO_BLACKLIST | \ |
268 | IDE_HFLAG_PIO_NO_DOWNGRADE | \ | 268 | IDE_HFLAG_PIO_NO_DOWNGRADE | \ |
269 | IDE_HFLAG_ABUSE_SET_DMA_MODE | \ | ||
269 | IDE_HFLAG_POST_SET_MODE | \ | 270 | IDE_HFLAG_POST_SET_MODE | \ |
270 | IDE_HFLAG_IO_32BIT | \ | 271 | IDE_HFLAG_IO_32BIT | \ |
271 | IDE_HFLAG_UNMASK_IRQS | \ | 272 | IDE_HFLAG_UNMASK_IRQS | \ |
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c index ef8e0164ef7a..5ae26564fb72 100644 --- a/drivers/ide/pci/atiixp.c +++ b/drivers/ide/pci/atiixp.c | |||
@@ -133,9 +133,6 @@ static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
133 | u32 tmp32; | 133 | u32 tmp32; |
134 | u16 tmp16; | 134 | u16 tmp16; |
135 | 135 | ||
136 | if (speed < XFER_MW_DMA_0) | ||
137 | return; | ||
138 | |||
139 | spin_lock_irqsave(&atiixp_lock, flags); | 136 | spin_lock_irqsave(&atiixp_lock, flags); |
140 | 137 | ||
141 | save_mdma_mode[drive->dn] = 0; | 138 | save_mdma_mode[drive->dn] = 0; |
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c index f3613bac9dbe..0b1e9479f019 100644 --- a/drivers/ide/pci/cmd64x.c +++ b/drivers/ide/pci/cmd64x.c | |||
@@ -322,8 +322,6 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
322 | case XFER_MW_DMA_0: | 322 | case XFER_MW_DMA_0: |
323 | program_cycle_times(drive, 480, 215); | 323 | program_cycle_times(drive, 480, 215); |
324 | break; | 324 | break; |
325 | default: | ||
326 | return; | ||
327 | } | 325 | } |
328 | 326 | ||
329 | if (speed >= XFER_SW_DMA_0) | 327 | if (speed >= XFER_SW_DMA_0) |
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c index 0466462fd21b..d1a91bcb5b29 100644 --- a/drivers/ide/pci/cs5520.c +++ b/drivers/ide/pci/cs5520.c | |||
@@ -137,6 +137,7 @@ static void __devinit init_hwif_cs5520(ide_hwif_t *hwif) | |||
137 | IDE_HFLAG_CS5520 | \ | 137 | IDE_HFLAG_CS5520 | \ |
138 | IDE_HFLAG_VDMA | \ | 138 | IDE_HFLAG_VDMA | \ |
139 | IDE_HFLAG_NO_ATAPI_DMA | \ | 139 | IDE_HFLAG_NO_ATAPI_DMA | \ |
140 | IDE_HFLAG_ABUSE_SET_DMA_MODE |\ | ||
140 | IDE_HFLAG_BOOTABLE, \ | 141 | IDE_HFLAG_BOOTABLE, \ |
141 | .pio_mask = ATA_PIO4, \ | 142 | .pio_mask = ATA_PIO4, \ |
142 | } | 143 | } |
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c index 547690395eee..df5966b33460 100644 --- a/drivers/ide/pci/cs5530.c +++ b/drivers/ide/pci/cs5530.c | |||
@@ -116,8 +116,6 @@ static void cs5530_set_dma_mode(ide_drive_t *drive, const u8 mode) | |||
116 | case XFER_MW_DMA_0: timings = 0x00077771; break; | 116 | case XFER_MW_DMA_0: timings = 0x00077771; break; |
117 | case XFER_MW_DMA_1: timings = 0x00012121; break; | 117 | case XFER_MW_DMA_1: timings = 0x00012121; break; |
118 | case XFER_MW_DMA_2: timings = 0x00002020; break; | 118 | case XFER_MW_DMA_2: timings = 0x00002020; break; |
119 | default: | ||
120 | return; | ||
121 | } | 119 | } |
122 | basereg = CS5530_BASEREG(drive->hwif); | 120 | basereg = CS5530_BASEREG(drive->hwif); |
123 | reg = inl(basereg + 4); /* get drive0 config register */ | 121 | reg = inl(basereg + 4); /* get drive0 config register */ |
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c index ddcbeba671e1..50b3d7791f55 100644 --- a/drivers/ide/pci/cs5535.c +++ b/drivers/ide/pci/cs5535.c | |||
@@ -190,7 +190,7 @@ static const struct ide_port_info cs5535_chipset __devinitdata = { | |||
190 | .name = "CS5535", | 190 | .name = "CS5535", |
191 | .init_hwif = init_hwif_cs5535, | 191 | .init_hwif = init_hwif_cs5535, |
192 | .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE | | 192 | .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE | |
193 | IDE_HFLAG_BOOTABLE, | 193 | IDE_HFLAG_ABUSE_SET_DMA_MODE | IDE_HFLAG_BOOTABLE, |
194 | .pio_mask = ATA_PIO4, | 194 | .pio_mask = ATA_PIO4, |
195 | .mwdma_mask = ATA_MWDMA2, | 195 | .mwdma_mask = ATA_MWDMA2, |
196 | .udma_mask = ATA_UDMA4, | 196 | .udma_mask = ATA_UDMA4, |
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c index ae6307fae4f9..dfba0d13fcd3 100644 --- a/drivers/ide/pci/hpt34x.c +++ b/drivers/ide/pci/hpt34x.c | |||
@@ -129,14 +129,18 @@ static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif) | |||
129 | hwif->set_dma_mode = &hpt34x_set_mode; | 129 | hwif->set_dma_mode = &hpt34x_set_mode; |
130 | } | 130 | } |
131 | 131 | ||
132 | #define IDE_HFLAGS_HPT34X \ | ||
133 | (IDE_HFLAG_NO_ATAPI_DMA | \ | ||
134 | IDE_HFLAG_ABUSE_SET_DMA_MODE | \ | ||
135 | IDE_HFLAG_NO_AUTODMA) | ||
136 | |||
132 | static const struct ide_port_info hpt34x_chipsets[] __devinitdata = { | 137 | static const struct ide_port_info hpt34x_chipsets[] __devinitdata = { |
133 | { /* 0 */ | 138 | { /* 0 */ |
134 | .name = "HPT343", | 139 | .name = "HPT343", |
135 | .init_chipset = init_chipset_hpt34x, | 140 | .init_chipset = init_chipset_hpt34x, |
136 | .init_hwif = init_hwif_hpt34x, | 141 | .init_hwif = init_hwif_hpt34x, |
137 | .extra = 16, | 142 | .extra = 16, |
138 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | | 143 | .host_flags = IDE_HFLAGS_HPT34X, |
139 | IDE_HFLAG_NO_AUTODMA, | ||
140 | .pio_mask = ATA_PIO5, | 144 | .pio_mask = ATA_PIO5, |
141 | }, | 145 | }, |
142 | { /* 1 */ | 146 | { /* 1 */ |
@@ -144,9 +148,7 @@ static const struct ide_port_info hpt34x_chipsets[] __devinitdata = { | |||
144 | .init_chipset = init_chipset_hpt34x, | 148 | .init_chipset = init_chipset_hpt34x, |
145 | .init_hwif = init_hwif_hpt34x, | 149 | .init_hwif = init_hwif_hpt34x, |
146 | .extra = 16, | 150 | .extra = 16, |
147 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | | 151 | .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_OFF_BOARD, |
148 | IDE_HFLAG_NO_AUTODMA | | ||
149 | IDE_HFLAG_OFF_BOARD, | ||
150 | .pio_mask = ATA_PIO5, | 152 | .pio_mask = ATA_PIO5, |
151 | #ifdef CONFIG_HPT34X_AUTODMA | 153 | #ifdef CONFIG_HPT34X_AUTODMA |
152 | .swdma_mask = ATA_SWDMA2, | 154 | .swdma_mask = ATA_SWDMA2, |
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c index 24d645751e0f..3777fb8c8043 100644 --- a/drivers/ide/pci/hpt366.c +++ b/drivers/ide/pci/hpt366.c | |||
@@ -1461,6 +1461,11 @@ static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2) | |||
1461 | return 0; | 1461 | return 0; |
1462 | } | 1462 | } |
1463 | 1463 | ||
1464 | #define IDE_HFLAGS_HPT3XX \ | ||
1465 | (IDE_HFLAG_NO_ATAPI_DMA | \ | ||
1466 | IDE_HFLAG_ABUSE_SET_DMA_MODE | \ | ||
1467 | IDE_HFLAG_OFF_BOARD) | ||
1468 | |||
1464 | static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | 1469 | static const struct ide_port_info hpt366_chipsets[] __devinitdata = { |
1465 | { /* 0 */ | 1470 | { /* 0 */ |
1466 | .name = "HPT36x", | 1471 | .name = "HPT36x", |
@@ -1475,9 +1480,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | |||
1475 | */ | 1480 | */ |
1476 | .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}}, | 1481 | .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}}, |
1477 | .extra = 240, | 1482 | .extra = 240, |
1478 | .host_flags = IDE_HFLAG_SINGLE | | 1483 | .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE, |
1479 | IDE_HFLAG_NO_ATAPI_DMA | | ||
1480 | IDE_HFLAG_OFF_BOARD, | ||
1481 | .pio_mask = ATA_PIO4, | 1484 | .pio_mask = ATA_PIO4, |
1482 | .mwdma_mask = ATA_MWDMA2, | 1485 | .mwdma_mask = ATA_MWDMA2, |
1483 | },{ /* 1 */ | 1486 | },{ /* 1 */ |
@@ -1487,7 +1490,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | |||
1487 | .init_dma = init_dma_hpt366, | 1490 | .init_dma = init_dma_hpt366, |
1488 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1491 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1489 | .extra = 240, | 1492 | .extra = 240, |
1490 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, | 1493 | .host_flags = IDE_HFLAGS_HPT3XX, |
1491 | .pio_mask = ATA_PIO4, | 1494 | .pio_mask = ATA_PIO4, |
1492 | .mwdma_mask = ATA_MWDMA2, | 1495 | .mwdma_mask = ATA_MWDMA2, |
1493 | },{ /* 2 */ | 1496 | },{ /* 2 */ |
@@ -1497,7 +1500,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | |||
1497 | .init_dma = init_dma_hpt366, | 1500 | .init_dma = init_dma_hpt366, |
1498 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1501 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1499 | .extra = 240, | 1502 | .extra = 240, |
1500 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, | 1503 | .host_flags = IDE_HFLAGS_HPT3XX, |
1501 | .pio_mask = ATA_PIO4, | 1504 | .pio_mask = ATA_PIO4, |
1502 | .mwdma_mask = ATA_MWDMA2, | 1505 | .mwdma_mask = ATA_MWDMA2, |
1503 | },{ /* 3 */ | 1506 | },{ /* 3 */ |
@@ -1507,7 +1510,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | |||
1507 | .init_dma = init_dma_hpt366, | 1510 | .init_dma = init_dma_hpt366, |
1508 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1511 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1509 | .extra = 240, | 1512 | .extra = 240, |
1510 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, | 1513 | .host_flags = IDE_HFLAGS_HPT3XX, |
1511 | .pio_mask = ATA_PIO4, | 1514 | .pio_mask = ATA_PIO4, |
1512 | .mwdma_mask = ATA_MWDMA2, | 1515 | .mwdma_mask = ATA_MWDMA2, |
1513 | },{ /* 4 */ | 1516 | },{ /* 4 */ |
@@ -1518,7 +1521,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | |||
1518 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1521 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1519 | .udma_mask = ATA_UDMA5, | 1522 | .udma_mask = ATA_UDMA5, |
1520 | .extra = 240, | 1523 | .extra = 240, |
1521 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, | 1524 | .host_flags = IDE_HFLAGS_HPT3XX, |
1522 | .pio_mask = ATA_PIO4, | 1525 | .pio_mask = ATA_PIO4, |
1523 | .mwdma_mask = ATA_MWDMA2, | 1526 | .mwdma_mask = ATA_MWDMA2, |
1524 | },{ /* 5 */ | 1527 | },{ /* 5 */ |
@@ -1528,7 +1531,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | |||
1528 | .init_dma = init_dma_hpt366, | 1531 | .init_dma = init_dma_hpt366, |
1529 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1532 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1530 | .extra = 240, | 1533 | .extra = 240, |
1531 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, | 1534 | .host_flags = IDE_HFLAGS_HPT3XX, |
1532 | .pio_mask = ATA_PIO4, | 1535 | .pio_mask = ATA_PIO4, |
1533 | .mwdma_mask = ATA_MWDMA2, | 1536 | .mwdma_mask = ATA_MWDMA2, |
1534 | } | 1537 | } |
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c index 90b52ed37bfc..2a0f45c4f4c4 100644 --- a/drivers/ide/pci/it8213.c +++ b/drivers/ide/pci/it8213.c | |||
@@ -101,24 +101,11 @@ static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
101 | pci_read_config_byte(dev, 0x54, ®54); | 101 | pci_read_config_byte(dev, 0x54, ®54); |
102 | pci_read_config_byte(dev, 0x55, ®55); | 102 | pci_read_config_byte(dev, 0x55, ®55); |
103 | 103 | ||
104 | switch(speed) { | ||
105 | case XFER_UDMA_6: | ||
106 | case XFER_UDMA_4: | ||
107 | case XFER_UDMA_2: u_speed = 2 << (drive->dn * 4); break; | ||
108 | case XFER_UDMA_5: | ||
109 | case XFER_UDMA_3: | ||
110 | case XFER_UDMA_1: u_speed = 1 << (drive->dn * 4); break; | ||
111 | case XFER_UDMA_0: u_speed = 0 << (drive->dn * 4); break; | ||
112 | break; | ||
113 | case XFER_MW_DMA_2: | ||
114 | case XFER_MW_DMA_1: | ||
115 | case XFER_SW_DMA_2: | ||
116 | break; | ||
117 | default: | ||
118 | return; | ||
119 | } | ||
120 | |||
121 | if (speed >= XFER_UDMA_0) { | 104 | if (speed >= XFER_UDMA_0) { |
105 | u8 udma = speed - XFER_UDMA_0; | ||
106 | |||
107 | u_speed = min_t(u8, 2 - (udma & 1), udma) << (drive->dn * 4); | ||
108 | |||
122 | if (!(reg48 & u_flag)) | 109 | if (!(reg48 & u_flag)) |
123 | pci_write_config_byte(dev, 0x48, reg48 | u_flag); | 110 | pci_write_config_byte(dev, 0x48, reg48 | u_flag); |
124 | if (speed >= XFER_UDMA_5) { | 111 | if (speed >= XFER_UDMA_5) { |
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c index 79ba8eff3644..ef4a99b99d1f 100644 --- a/drivers/ide/pci/pdc202xx_new.c +++ b/drivers/ide/pci/pdc202xx_new.c | |||
@@ -162,32 +162,18 @@ static void pdcnew_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
162 | if (max_dma_rate(hwif->pci_dev) == 4) { | 162 | if (max_dma_rate(hwif->pci_dev) == 4) { |
163 | u8 mode = speed & 0x07; | 163 | u8 mode = speed & 0x07; |
164 | 164 | ||
165 | switch (speed) { | 165 | if (speed >= XFER_UDMA_0) { |
166 | case XFER_UDMA_6: | 166 | set_indexed_reg(hwif, 0x10 + adj, |
167 | case XFER_UDMA_5: | 167 | udma_timings[mode].reg10); |
168 | case XFER_UDMA_4: | 168 | set_indexed_reg(hwif, 0x11 + adj, |
169 | case XFER_UDMA_3: | 169 | udma_timings[mode].reg11); |
170 | case XFER_UDMA_2: | 170 | set_indexed_reg(hwif, 0x12 + adj, |
171 | case XFER_UDMA_1: | 171 | udma_timings[mode].reg12); |
172 | case XFER_UDMA_0: | 172 | } else { |
173 | set_indexed_reg(hwif, 0x10 + adj, | 173 | set_indexed_reg(hwif, 0x0e + adj, |
174 | udma_timings[mode].reg10); | 174 | mwdma_timings[mode].reg0e); |
175 | set_indexed_reg(hwif, 0x11 + adj, | 175 | set_indexed_reg(hwif, 0x0f + adj, |
176 | udma_timings[mode].reg11); | 176 | mwdma_timings[mode].reg0f); |
177 | set_indexed_reg(hwif, 0x12 + adj, | ||
178 | udma_timings[mode].reg12); | ||
179 | break; | ||
180 | case XFER_MW_DMA_2: | ||
181 | case XFER_MW_DMA_1: | ||
182 | case XFER_MW_DMA_0: | ||
183 | set_indexed_reg(hwif, 0x0e + adj, | ||
184 | mwdma_timings[mode].reg0e); | ||
185 | set_indexed_reg(hwif, 0x0f + adj, | ||
186 | mwdma_timings[mode].reg0f); | ||
187 | break; | ||
188 | default: | ||
189 | printk(KERN_ERR "pdc202xx_new: " | ||
190 | "Unknown speed %d ignored\n", speed); | ||
191 | } | 177 | } |
192 | } else if (speed == XFER_UDMA_2) { | 178 | } else if (speed == XFER_UDMA_2) { |
193 | /* Set tHOLD bit to 0 if using UDMA mode 2 */ | 179 | /* Set tHOLD bit to 0 if using UDMA mode 2 */ |
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c index 22c7a7533b69..67b2781e2213 100644 --- a/drivers/ide/pci/pdc202xx_old.c +++ b/drivers/ide/pci/pdc202xx_old.c | |||
@@ -375,6 +375,11 @@ static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev, | |||
375 | } | 375 | } |
376 | } | 376 | } |
377 | 377 | ||
378 | #define IDE_HFLAGS_PDC202XX \ | ||
379 | (IDE_HFLAG_ERROR_STOPS_FIFO | \ | ||
380 | IDE_HFLAG_ABUSE_SET_DMA_MODE | \ | ||
381 | IDE_HFLAG_OFF_BOARD) | ||
382 | |||
378 | #define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \ | 383 | #define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \ |
379 | { \ | 384 | { \ |
380 | .name = name_str, \ | 385 | .name = name_str, \ |
@@ -382,9 +387,7 @@ static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev, | |||
382 | .init_hwif = init_hwif_pdc202xx, \ | 387 | .init_hwif = init_hwif_pdc202xx, \ |
383 | .init_dma = init_dma_pdc202xx, \ | 388 | .init_dma = init_dma_pdc202xx, \ |
384 | .extra = 48, \ | 389 | .extra = 48, \ |
385 | .host_flags = IDE_HFLAG_ERROR_STOPS_FIFO | \ | 390 | .host_flags = IDE_HFLAGS_PDC202XX | extra_flags, \ |
386 | extra_flags | \ | ||
387 | IDE_HFLAG_OFF_BOARD, \ | ||
388 | .pio_mask = ATA_PIO4, \ | 391 | .pio_mask = ATA_PIO4, \ |
389 | .mwdma_mask = ATA_MWDMA2, \ | 392 | .mwdma_mask = ATA_MWDMA2, \ |
390 | .udma_mask = udma, \ | 393 | .udma_mask = udma, \ |
@@ -397,8 +400,7 @@ static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = { | |||
397 | .init_hwif = init_hwif_pdc202xx, | 400 | .init_hwif = init_hwif_pdc202xx, |
398 | .init_dma = init_dma_pdc202xx, | 401 | .init_dma = init_dma_pdc202xx, |
399 | .extra = 16, | 402 | .extra = 16, |
400 | .host_flags = IDE_HFLAG_ERROR_STOPS_FIFO | | 403 | .host_flags = IDE_HFLAGS_PDC202XX, |
401 | IDE_HFLAG_OFF_BOARD, | ||
402 | .pio_mask = ATA_PIO4, | 404 | .pio_mask = ATA_PIO4, |
403 | .mwdma_mask = ATA_MWDMA2, | 405 | .mwdma_mask = ATA_MWDMA2, |
404 | .udma_mask = ATA_UDMA2, | 406 | .udma_mask = ATA_UDMA2, |
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c index 27781d294cea..bd6d3f77d30c 100644 --- a/drivers/ide/pci/piix.c +++ b/drivers/ide/pci/piix.c | |||
@@ -203,20 +203,11 @@ static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
203 | pci_read_config_byte(dev, 0x54, ®54); | 203 | pci_read_config_byte(dev, 0x54, ®54); |
204 | pci_read_config_byte(dev, 0x55, ®55); | 204 | pci_read_config_byte(dev, 0x55, ®55); |
205 | 205 | ||
206 | switch(speed) { | ||
207 | case XFER_UDMA_4: | ||
208 | case XFER_UDMA_2: u_speed = 2 << (drive->dn * 4); break; | ||
209 | case XFER_UDMA_5: | ||
210 | case XFER_UDMA_3: | ||
211 | case XFER_UDMA_1: u_speed = 1 << (drive->dn * 4); break; | ||
212 | case XFER_UDMA_0: u_speed = 0 << (drive->dn * 4); break; | ||
213 | case XFER_MW_DMA_2: | ||
214 | case XFER_MW_DMA_1: | ||
215 | case XFER_SW_DMA_2: break; | ||
216 | default: return; | ||
217 | } | ||
218 | |||
219 | if (speed >= XFER_UDMA_0) { | 206 | if (speed >= XFER_UDMA_0) { |
207 | u8 udma = speed - XFER_UDMA_0; | ||
208 | |||
209 | u_speed = min_t(u8, 2 - (udma & 1), udma) << (drive->dn * 4); | ||
210 | |||
220 | if (!(reg48 & u_flag)) | 211 | if (!(reg48 & u_flag)) |
221 | pci_write_config_byte(dev, 0x48, reg48 | u_flag); | 212 | pci_write_config_byte(dev, 0x48, reg48 | u_flag); |
222 | if (speed == XFER_UDMA_5) { | 213 | if (speed == XFER_UDMA_5) { |
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c index f0029b364c57..569a8fe70d3e 100644 --- a/drivers/ide/pci/sc1200.c +++ b/drivers/ide/pci/sc1200.c | |||
@@ -185,8 +185,6 @@ static void sc1200_set_dma_mode(ide_drive_t *drive, const u8 mode) | |||
185 | case PCI_CLK_66: timings = 0x00015151; break; | 185 | case PCI_CLK_66: timings = 0x00015151; break; |
186 | } | 186 | } |
187 | break; | 187 | break; |
188 | default: | ||
189 | return; | ||
190 | } | 188 | } |
191 | 189 | ||
192 | if (unit == 0) { /* are we configuring drive0? */ | 190 | if (unit == 0) { /* are we configuring drive0? */ |
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c index ebb7132b9b84..24a85bbcd2a6 100644 --- a/drivers/ide/pci/scc_pata.c +++ b/drivers/ide/pci/scc_pata.c | |||
@@ -254,19 +254,7 @@ static void scc_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
254 | offset = 0; /* 100MHz */ | 254 | offset = 0; /* 100MHz */ |
255 | } | 255 | } |
256 | 256 | ||
257 | switch (speed) { | 257 | idx = speed - XFER_UDMA_0; |
258 | case XFER_UDMA_6: | ||
259 | case XFER_UDMA_5: | ||
260 | case XFER_UDMA_4: | ||
261 | case XFER_UDMA_3: | ||
262 | case XFER_UDMA_2: | ||
263 | case XFER_UDMA_1: | ||
264 | case XFER_UDMA_0: | ||
265 | idx = speed - XFER_UDMA_0; | ||
266 | break; | ||
267 | default: | ||
268 | return; | ||
269 | } | ||
270 | 258 | ||
271 | jcactsel = JCACTSELtbl[offset][idx]; | 259 | jcactsel = JCACTSELtbl[offset][idx]; |
272 | if (is_slave) { | 260 | if (is_slave) { |
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c index a7280311357b..e9bd269547bb 100644 --- a/drivers/ide/pci/serverworks.c +++ b/drivers/ide/pci/serverworks.c | |||
@@ -366,12 +366,17 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif) | |||
366 | } | 366 | } |
367 | } | 367 | } |
368 | 368 | ||
369 | #define IDE_HFLAGS_SVWKS \ | ||
370 | (IDE_HFLAG_LEGACY_IRQS | \ | ||
371 | IDE_HFLAG_ABUSE_SET_DMA_MODE | \ | ||
372 | IDE_HFLAG_BOOTABLE) | ||
373 | |||
369 | static const struct ide_port_info serverworks_chipsets[] __devinitdata = { | 374 | static const struct ide_port_info serverworks_chipsets[] __devinitdata = { |
370 | { /* 0 */ | 375 | { /* 0 */ |
371 | .name = "SvrWks OSB4", | 376 | .name = "SvrWks OSB4", |
372 | .init_chipset = init_chipset_svwks, | 377 | .init_chipset = init_chipset_svwks, |
373 | .init_hwif = init_hwif_svwks, | 378 | .init_hwif = init_hwif_svwks, |
374 | .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, | 379 | .host_flags = IDE_HFLAGS_SVWKS, |
375 | .pio_mask = ATA_PIO4, | 380 | .pio_mask = ATA_PIO4, |
376 | .mwdma_mask = ATA_MWDMA2, | 381 | .mwdma_mask = ATA_MWDMA2, |
377 | .udma_mask = 0x00, /* UDMA is problematic on OSB4 */ | 382 | .udma_mask = 0x00, /* UDMA is problematic on OSB4 */ |
@@ -379,7 +384,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = { | |||
379 | .name = "SvrWks CSB5", | 384 | .name = "SvrWks CSB5", |
380 | .init_chipset = init_chipset_svwks, | 385 | .init_chipset = init_chipset_svwks, |
381 | .init_hwif = init_hwif_svwks, | 386 | .init_hwif = init_hwif_svwks, |
382 | .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, | 387 | .host_flags = IDE_HFLAGS_SVWKS, |
383 | .pio_mask = ATA_PIO4, | 388 | .pio_mask = ATA_PIO4, |
384 | .mwdma_mask = ATA_MWDMA2, | 389 | .mwdma_mask = ATA_MWDMA2, |
385 | .udma_mask = ATA_UDMA5, | 390 | .udma_mask = ATA_UDMA5, |
@@ -387,7 +392,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = { | |||
387 | .name = "SvrWks CSB6", | 392 | .name = "SvrWks CSB6", |
388 | .init_chipset = init_chipset_svwks, | 393 | .init_chipset = init_chipset_svwks, |
389 | .init_hwif = init_hwif_svwks, | 394 | .init_hwif = init_hwif_svwks, |
390 | .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, | 395 | .host_flags = IDE_HFLAGS_SVWKS, |
391 | .pio_mask = ATA_PIO4, | 396 | .pio_mask = ATA_PIO4, |
392 | .mwdma_mask = ATA_MWDMA2, | 397 | .mwdma_mask = ATA_MWDMA2, |
393 | .udma_mask = ATA_UDMA5, | 398 | .udma_mask = ATA_UDMA5, |
@@ -395,8 +400,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = { | |||
395 | .name = "SvrWks CSB6", | 400 | .name = "SvrWks CSB6", |
396 | .init_chipset = init_chipset_svwks, | 401 | .init_chipset = init_chipset_svwks, |
397 | .init_hwif = init_hwif_svwks, | 402 | .init_hwif = init_hwif_svwks, |
398 | .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_SINGLE | | 403 | .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE, |
399 | IDE_HFLAG_BOOTABLE, | ||
400 | .pio_mask = ATA_PIO4, | 404 | .pio_mask = ATA_PIO4, |
401 | .mwdma_mask = ATA_MWDMA2, | 405 | .mwdma_mask = ATA_MWDMA2, |
402 | .udma_mask = ATA_UDMA5, | 406 | .udma_mask = ATA_UDMA5, |
@@ -404,8 +408,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = { | |||
404 | .name = "SvrWks HT1000", | 408 | .name = "SvrWks HT1000", |
405 | .init_chipset = init_chipset_svwks, | 409 | .init_chipset = init_chipset_svwks, |
406 | .init_hwif = init_hwif_svwks, | 410 | .init_hwif = init_hwif_svwks, |
407 | .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_SINGLE | | 411 | .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE, |
408 | IDE_HFLAG_BOOTABLE, | ||
409 | .pio_mask = ATA_PIO4, | 412 | .pio_mask = ATA_PIO4, |
410 | .mwdma_mask = ATA_MWDMA2, | 413 | .mwdma_mask = ATA_MWDMA2, |
411 | .udma_mask = ATA_UDMA5, | 414 | .udma_mask = ATA_UDMA5, |
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c index 5709c252543b..7b45eaf5afd9 100644 --- a/drivers/ide/pci/siimage.c +++ b/drivers/ide/pci/siimage.c | |||
@@ -278,27 +278,14 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
278 | 278 | ||
279 | scsc = is_sata(hwif) ? 1 : scsc; | 279 | scsc = is_sata(hwif) ? 1 : scsc; |
280 | 280 | ||
281 | switch(speed) { | 281 | if (speed >= XFER_UDMA_0) { |
282 | case XFER_MW_DMA_2: | 282 | multi = dma[2]; |
283 | case XFER_MW_DMA_1: | 283 | ultra |= (scsc ? ultra6[speed - XFER_UDMA_0] : |
284 | case XFER_MW_DMA_0: | 284 | ultra5[speed - XFER_UDMA_0]); |
285 | multi = dma[speed - XFER_MW_DMA_0]; | 285 | mode |= (unit ? 0x30 : 0x03); |
286 | mode |= ((unit) ? 0x20 : 0x02); | 286 | } else { |
287 | break; | 287 | multi = dma[speed - XFER_MW_DMA_0]; |
288 | case XFER_UDMA_6: | 288 | mode |= (unit ? 0x20 : 0x02); |
289 | case XFER_UDMA_5: | ||
290 | case XFER_UDMA_4: | ||
291 | case XFER_UDMA_3: | ||
292 | case XFER_UDMA_2: | ||
293 | case XFER_UDMA_1: | ||
294 | case XFER_UDMA_0: | ||
295 | multi = dma[2]; | ||
296 | ultra |= ((scsc) ? (ultra6[speed - XFER_UDMA_0]) : | ||
297 | (ultra5[speed - XFER_UDMA_0])); | ||
298 | mode |= ((unit) ? 0x30 : 0x03); | ||
299 | break; | ||
300 | default: | ||
301 | return; | ||
302 | } | 289 | } |
303 | 290 | ||
304 | if (hwif->mmio) { | 291 | if (hwif->mmio) { |
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c index 3f35386d9cad..85d36996e6af 100644 --- a/drivers/ide/pci/sis5513.c +++ b/drivers/ide/pci/sis5513.c | |||
@@ -351,25 +351,10 @@ static void sis_program_udma_timings(ide_drive_t *drive, const u8 mode) | |||
351 | 351 | ||
352 | static void sis_set_dma_mode(ide_drive_t *drive, const u8 speed) | 352 | static void sis_set_dma_mode(ide_drive_t *drive, const u8 speed) |
353 | { | 353 | { |
354 | /* Config chip for mode */ | 354 | if (speed >= XFER_UDMA_0) |
355 | switch(speed) { | 355 | sis_program_udma_timings(drive, speed); |
356 | case XFER_UDMA_6: | 356 | else |
357 | case XFER_UDMA_5: | 357 | sis_program_timings(drive, speed); |
358 | case XFER_UDMA_4: | ||
359 | case XFER_UDMA_3: | ||
360 | case XFER_UDMA_2: | ||
361 | case XFER_UDMA_1: | ||
362 | case XFER_UDMA_0: | ||
363 | sis_program_udma_timings(drive, speed); | ||
364 | break; | ||
365 | case XFER_MW_DMA_2: | ||
366 | case XFER_MW_DMA_1: | ||
367 | case XFER_MW_DMA_0: | ||
368 | sis_program_timings(drive, speed); | ||
369 | break; | ||
370 | default: | ||
371 | break; | ||
372 | } | ||
373 | } | 358 | } |
374 | 359 | ||
375 | static u8 sis5513_ata133_udma_filter(ide_drive_t *drive) | 360 | static u8 sis5513_ata133_udma_filter(ide_drive_t *drive) |
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c index 147d783f7529..069f104fdcea 100644 --- a/drivers/ide/pci/sl82c105.c +++ b/drivers/ide/pci/sl82c105.c | |||
@@ -115,32 +115,24 @@ static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
115 | DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n", | 115 | DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n", |
116 | drive->name, ide_xfer_verbose(speed))); | 116 | drive->name, ide_xfer_verbose(speed))); |
117 | 117 | ||
118 | switch (speed) { | 118 | drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0]; |
119 | case XFER_MW_DMA_2: | ||
120 | case XFER_MW_DMA_1: | ||
121 | case XFER_MW_DMA_0: | ||
122 | drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0]; | ||
123 | 119 | ||
124 | /* | 120 | /* |
125 | * Store the DMA timings so that we can actually program | 121 | * Store the DMA timings so that we can actually program |
126 | * them when DMA will be turned on... | 122 | * them when DMA will be turned on... |
127 | */ | 123 | */ |
128 | drive->drive_data &= 0x0000ffff; | 124 | drive->drive_data &= 0x0000ffff; |
129 | drive->drive_data |= (unsigned long)drv_ctrl << 16; | 125 | drive->drive_data |= (unsigned long)drv_ctrl << 16; |
130 | 126 | ||
131 | /* | 127 | /* |
132 | * If we are already using DMA, we just reprogram | 128 | * If we are already using DMA, we just reprogram |
133 | * the drive control register. | 129 | * the drive control register. |
134 | */ | 130 | */ |
135 | if (drive->using_dma) { | 131 | if (drive->using_dma) { |
136 | struct pci_dev *dev = HWIF(drive)->pci_dev; | 132 | struct pci_dev *dev = HWIF(drive)->pci_dev; |
137 | int reg = 0x44 + drive->dn * 4; | 133 | int reg = 0x44 + drive->dn * 4; |
138 | 134 | ||
139 | pci_write_config_word(dev, reg, drv_ctrl); | 135 | pci_write_config_word(dev, reg, drv_ctrl); |
140 | } | ||
141 | break; | ||
142 | default: | ||
143 | return; | ||
144 | } | 136 | } |
145 | } | 137 | } |
146 | 138 | ||
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c index eb4445b229ed..dbbb46819a2d 100644 --- a/drivers/ide/pci/slc90e66.c +++ b/drivers/ide/pci/slc90e66.c | |||
@@ -91,19 +91,9 @@ static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
91 | pci_read_config_word(dev, 0x48, ®48); | 91 | pci_read_config_word(dev, 0x48, ®48); |
92 | pci_read_config_word(dev, 0x4a, ®4a); | 92 | pci_read_config_word(dev, 0x4a, ®4a); |
93 | 93 | ||
94 | switch(speed) { | ||
95 | case XFER_UDMA_4: u_speed = 4 << (drive->dn * 4); break; | ||
96 | case XFER_UDMA_3: u_speed = 3 << (drive->dn * 4); break; | ||
97 | case XFER_UDMA_2: u_speed = 2 << (drive->dn * 4); break; | ||
98 | case XFER_UDMA_1: u_speed = 1 << (drive->dn * 4); break; | ||
99 | case XFER_UDMA_0: u_speed = 0 << (drive->dn * 4); break; | ||
100 | case XFER_MW_DMA_2: | ||
101 | case XFER_MW_DMA_1: | ||
102 | case XFER_SW_DMA_2: break; | ||
103 | default: return; | ||
104 | } | ||
105 | |||
106 | if (speed >= XFER_UDMA_0) { | 94 | if (speed >= XFER_UDMA_0) { |
95 | u_speed = (speed - XFER_UDMA_0) << (drive->dn * 4); | ||
96 | |||
107 | if (!(reg48 & u_flag)) | 97 | if (!(reg48 & u_flag)) |
108 | pci_write_config_word(dev, 0x48, reg48|u_flag); | 98 | pci_write_config_word(dev, 0x48, reg48|u_flag); |
109 | /* FIXME: (reg4a & a_speed) ? */ | 99 | /* FIXME: (reg4a & a_speed) ? */ |
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c index a66ebd14664e..e1faf6c2fe16 100644 --- a/drivers/ide/pci/tc86c001.c +++ b/drivers/ide/pci/tc86c001.c | |||
@@ -222,7 +222,8 @@ static const struct ide_port_info tc86c001_chipset __devinitdata = { | |||
222 | .name = "TC86C001", | 222 | .name = "TC86C001", |
223 | .init_chipset = init_chipset_tc86c001, | 223 | .init_chipset = init_chipset_tc86c001, |
224 | .init_hwif = init_hwif_tc86c001, | 224 | .init_hwif = init_hwif_tc86c001, |
225 | .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD, | 225 | .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD | |
226 | IDE_HFLAG_ABUSE_SET_DMA_MODE, | ||
226 | .pio_mask = ATA_PIO4, | 227 | .pio_mask = ATA_PIO4, |
227 | .mwdma_mask = ATA_MWDMA2, | 228 | .mwdma_mask = ATA_MWDMA2, |
228 | .udma_mask = ATA_UDMA4, | 229 | .udma_mask = ATA_UDMA4, |
diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c index a227c41d23a3..ae52a96a1cf9 100644 --- a/drivers/ide/pci/triflex.c +++ b/drivers/ide/pci/triflex.c | |||
@@ -81,8 +81,6 @@ static void triflex_set_mode(ide_drive_t *drive, const u8 speed) | |||
81 | case XFER_PIO_0: | 81 | case XFER_PIO_0: |
82 | timing = 0x0808; | 82 | timing = 0x0808; |
83 | break; | 83 | break; |
84 | default: | ||
85 | return; | ||
86 | } | 84 | } |
87 | 85 | ||
88 | triflex_timings &= ~(0xFFFF << (16 * unit)); | 86 | triflex_timings &= ~(0xFFFF << (16 * unit)); |
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c index a0d3c16b68ec..4b32c90f4896 100644 --- a/drivers/ide/pci/via82cxxx.c +++ b/drivers/ide/pci/via82cxxx.c | |||
@@ -439,6 +439,7 @@ static const struct ide_port_info via82cxxx_chipset __devinitdata = { | |||
439 | .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } }, | 439 | .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } }, |
440 | .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | | 440 | .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | |
441 | IDE_HFLAG_PIO_NO_DOWNGRADE | | 441 | IDE_HFLAG_PIO_NO_DOWNGRADE | |
442 | IDE_HFLAG_ABUSE_SET_DMA_MODE | | ||
442 | IDE_HFLAG_POST_SET_MODE | | 443 | IDE_HFLAG_POST_SET_MODE | |
443 | IDE_HFLAG_IO_32BIT | | 444 | IDE_HFLAG_IO_32BIT | |
444 | IDE_HFLAG_BOOTABLE, | 445 | IDE_HFLAG_BOOTABLE, |
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c index 4559e29446e9..3dce80092fff 100644 --- a/drivers/ide/ppc/pmac.c +++ b/drivers/ide/ppc/pmac.c | |||
@@ -828,38 +828,20 @@ static void pmac_ide_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
828 | tl[0] = *timings; | 828 | tl[0] = *timings; |
829 | tl[1] = *timings2; | 829 | tl[1] = *timings2; |
830 | 830 | ||
831 | switch(speed) { | ||
832 | #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC | 831 | #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC |
833 | case XFER_UDMA_6: | 832 | if (speed >= XFER_UDMA_0) { |
834 | case XFER_UDMA_5: | 833 | if (pmif->kind == controller_kl_ata4) |
835 | case XFER_UDMA_4: | 834 | ret = set_timings_udma_ata4(&tl[0], speed); |
836 | case XFER_UDMA_3: | 835 | else if (pmif->kind == controller_un_ata6 |
837 | case XFER_UDMA_2: | 836 | || pmif->kind == controller_k2_ata6) |
838 | case XFER_UDMA_1: | 837 | ret = set_timings_udma_ata6(&tl[0], &tl[1], speed); |
839 | case XFER_UDMA_0: | 838 | else if (pmif->kind == controller_sh_ata6) |
840 | if (pmif->kind == controller_kl_ata4) | 839 | ret = set_timings_udma_shasta(&tl[0], &tl[1], speed); |
841 | ret = set_timings_udma_ata4(&tl[0], speed); | 840 | else |
842 | else if (pmif->kind == controller_un_ata6 | 841 | ret = -1; |
843 | || pmif->kind == controller_k2_ata6) | 842 | } else |
844 | ret = set_timings_udma_ata6(&tl[0], &tl[1], speed); | 843 | set_timings_mdma(drive, pmif->kind, &tl[0], &tl[1], speed); |
845 | else if (pmif->kind == controller_sh_ata6) | ||
846 | ret = set_timings_udma_shasta(&tl[0], &tl[1], speed); | ||
847 | else | ||
848 | ret = 1; | ||
849 | break; | ||
850 | case XFER_MW_DMA_2: | ||
851 | case XFER_MW_DMA_1: | ||
852 | case XFER_MW_DMA_0: | ||
853 | set_timings_mdma(drive, pmif->kind, &tl[0], &tl[1], speed); | ||
854 | break; | ||
855 | case XFER_SW_DMA_2: | ||
856 | case XFER_SW_DMA_1: | ||
857 | case XFER_SW_DMA_0: | ||
858 | return; | ||
859 | #endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */ | 844 | #endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */ |
860 | default: | ||
861 | ret = 1; | ||
862 | } | ||
863 | if (ret) | 845 | if (ret) |
864 | return; | 846 | return; |
865 | 847 | ||