255 files changed, 21902 insertions, 3252 deletions

diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index 6318f6b57360..d8e8c49c0cbd 100644
--- a/drivers/base/Kconfig
+++ b/drivers/base/Kconfig
@@ -54,7 +54,7 @@ config FIRMWARE_IN_KERNEL
           such firmware, and do not wish to use an initrd.
 
           This single option controls the inclusion of firmware for
-          every driver which usees request_firmare() and ships its
+          every driver which uses request_firmare() and ships its
           firmware in the kernel source tree, to avoid a proliferation
           of 'Include firmware for xxx device' options.
 
diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c
index c9c92b00fd55..b7e571031ecd 100644
--- a/drivers/base/firmware_class.c
+++ b/drivers/base/firmware_class.c
@@ -164,8 +164,7 @@ static ssize_t firmware_loading_store(struct device *dev,
                 }
                 /* fallthrough */
         default:
-                printk(KERN_ERR "%s: unexpected value (%d)\n", __func__,
-                       loading);
+                dev_err(dev, "%s: unexpected value (%d)\n", __func__, loading);
                 /* fallthrough */
         case -1:
                 fw_load_abort(fw_priv);
@@ -309,7 +308,7 @@ static int fw_register_device(struct device **dev_p, const char *fw_name,
         *dev_p = NULL;
 
         if (!fw_priv || !f_dev) {
-                printk(KERN_ERR "%s: kmalloc failed\n", __func__);
+                dev_err(device, "%s: kmalloc failed\n", __func__);
                 retval = -ENOMEM;
                 goto error_kfree;
         }
@@ -329,8 +328,7 @@ static int fw_register_device(struct device **dev_p, const char *fw_name,
         f_dev->uevent_suppress = 1;
         retval = device_register(f_dev);
         if (retval) {
-                printk(KERN_ERR "%s: device_register failed\n",
-                       __func__);
+                dev_err(device, "%s: device_register failed\n", __func__);
                 goto error_kfree;
         }
         *dev_p = f_dev;
@@ -363,15 +361,13 @@ static int fw_setup_device(struct firmware *fw, struct device **dev_p,
         fw_priv->fw = fw;
         retval = sysfs_create_bin_file(&f_dev->kobj, &fw_priv->attr_data);
         if (retval) {
-                printk(KERN_ERR "%s: sysfs_create_bin_file failed\n",
-                       __func__);
+                dev_err(device, "%s: sysfs_create_bin_file failed\n", __func__);
                 goto error_unreg;
         }
 
         retval = device_create_file(f_dev, &dev_attr_loading);
         if (retval) {
-                printk(KERN_ERR "%s: device_create_file failed\n",
-                       __func__);
+                dev_err(device, "%s: device_create_file failed\n", __func__);
                 goto error_unreg;
         }
 
@@ -401,8 +397,8 @@ _request_firmware(const struct firmware **firmware_p, const char *name,
 
         *firmware_p = firmware = kzalloc(sizeof(*firmware), GFP_KERNEL);
         if (!firmware) {
-                printk(KERN_ERR "%s: kmalloc(struct firmware) failed\n",
-                       __func__);
+                dev_err(device, "%s: kmalloc(struct firmware) failed\n",
+                        __func__);
                 retval = -ENOMEM;
                 goto out;
         }
@@ -411,15 +407,15 @@ _request_firmware(const struct firmware **firmware_p, const char *name,
              builtin++) {
                 if (strcmp(name, builtin->name))
                         continue;
-                printk(KERN_INFO "firmware: using built-in firmware %s\n",
-                       name);
+                dev_info(device, "firmware: using built-in firmware %s\n",
+                         name);
                 firmware->size = builtin->size;
                 firmware->data = builtin->data;
                 return 0;
         }
 
         if (uevent)
-                printk(KERN_INFO "firmware: requesting %s\n", name);
+                dev_info(device, "firmware: requesting %s\n", name);
 
         retval = fw_setup_device(firmware, &f_dev, name, device, uevent);
         if (retval)
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index 9e60f7c739c6..dfcbfe504867 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -42,10 +42,8 @@ struct resource *platform_get_resource(struct platform_device *dev,
         for (i = 0; i < dev->num_resources; i++) {
                 struct resource *r = &dev->resource[i];
 
-                if ((r->flags & (IORESOURCE_IO|IORESOURCE_MEM|
-                                 IORESOURCE_IRQ|IORESOURCE_DMA)) == type)
-                        if (num-- == 0)
-                                return r;
+                if (type == resource_type(r) && num-- == 0)
+                        return r;
         }
         return NULL;
 }
@@ -78,10 +76,8 @@ struct resource *platform_get_resource_byname(struct platform_device *dev,
         for (i = 0; i < dev->num_resources; i++) {
                 struct resource *r = &dev->resource[i];
 
-                if ((r->flags & (IORESOURCE_IO|IORESOURCE_MEM|
-                                 IORESOURCE_IRQ|IORESOURCE_DMA)) == type)
-                        if (!strcmp(r->name, name))
-                                return r;
+                if (type == resource_type(r) && !strcmp(r->name, name))
+                        return r;
         }
         return NULL;
 }
@@ -259,9 +255,9 @@ int platform_device_add(struct platform_device *pdev)
 
                 p = r->parent;
                 if (!p) {
-                        if (r->flags & IORESOURCE_MEM)
+                        if (resource_type(r) == IORESOURCE_MEM)
                                 p = &iomem_resource;
-                        else if (r->flags & IORESOURCE_IO)
+                        else if (resource_type(r) == IORESOURCE_IO)
                                 p = &ioport_resource;
                 }
 
@@ -282,9 +278,14 @@ int platform_device_add(struct platform_device *pdev)
                 return ret;
 
  failed:
-        while (--i >= 0)
-                if (pdev->resource[i].flags & (IORESOURCE_MEM|IORESOURCE_IO))
-                        release_resource(&pdev->resource[i]);
+        while (--i >= 0) {
+                struct resource *r = &pdev->resource[i];
+                unsigned long type = resource_type(r);
+
+                if (type == IORESOURCE_MEM || type == IORESOURCE_IO)
+                        release_resource(r);
+        }
+
         return ret;
 }
 EXPORT_SYMBOL_GPL(platform_device_add);
@@ -306,7 +307,9 @@ void platform_device_del(struct platform_device *pdev)
 
                 for (i = 0; i < pdev->num_resources; i++) {
                         struct resource *r = &pdev->resource[i];
-                        if (r->flags & (IORESOURCE_MEM|IORESOURCE_IO))
+                        unsigned long type = resource_type(r);
+
+                        if (type == IORESOURCE_MEM || type == IORESOURCE_IO)
                                 release_resource(r);
                 }
         }
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index b0eb6afdd861..692c20ba5144 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -778,10 +778,7 @@ EXPORT_SYMBOL_GPL(device_suspend);
 
 void __suspend_report_result(const char *function, void *fn, int ret)
 {
-        if (ret) {
-                printk(KERN_ERR "%s(): ", function);
-                print_fn_descriptor_symbol("%s returns ", fn);
-                printk("%d\n", ret);
-        }
+        if (ret)
+                printk(KERN_ERR "%s(): %pF returns %d\n", function, fn, ret);
 }
 EXPORT_SYMBOL_GPL(__suspend_report_result);
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 700ff9679457..122254155ae1 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -1043,15 +1043,6 @@ config HPET
           open selects one of the timers supported by the HPET.  The timers are
           non-periodic and/or periodic.
 
-config HPET_RTC_IRQ
-        bool
-        default HPET_EMULATE_RTC
-        depends on RTC && HPET
-        help
-          If you say Y here, you will disable RTC_IRQ in drivers/char/rtc.c. It
-          is assumed the platform called hpet_alloc with the RTC IRQ values for
-          the HPET timers.
-
 config HPET_MMAP
         bool "Allow mmap of HPET"
         default y
diff --git a/drivers/char/applicom.c b/drivers/char/applicom.c
index b899d9182c7d..05674febb0c6 100644
--- a/drivers/char/applicom.c
+++ b/drivers/char/applicom.c
@@ -478,7 +478,7 @@ static int do_ac_read(int IndexCard, char __user *buf,
                 struct st_ram_io *st_loc, struct mailbox *mailbox)
 {
         void __iomem *from = apbs[IndexCard].RamIO + RAM_TO_PC;
-        unsigned char *to = (unsigned char *)&mailbox;
+        unsigned char *to = (unsigned char *)mailbox;
 #ifdef DEBUG
         int c;
 #endif
diff --git a/drivers/char/ds1286.c b/drivers/char/ds1286.c
index fb584938c9c3..5329d482b582 100644
--- a/drivers/char/ds1286.c
+++ b/drivers/char/ds1286.c
@@ -443,7 +443,6 @@ static void ds1286_get_time(struct rtc_time *rtc_tm)
 {
         unsigned char save_control;
         unsigned long flags;
-        unsigned long uip_watchdog = jiffies;
 
         /*
          * read RTC once any update in progress is done. The update
@@ -456,8 +455,7 @@ static void ds1286_get_time(struct rtc_time *rtc_tm)
          */
 
         if (ds1286_is_updating() != 0)
-                while (time_before(jiffies, uip_watchdog + 2*HZ/100))
-                        barrier();
+                msleep(20);
 
         /*
          * Only the values that we read from the RTC are set. We leave
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index 51738bdd834e..d4e7dca06e4f 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c
@@ -118,18 +118,21 @@ static int __init omap_rng_probe(struct platform_device *pdev)
 
         mem = request_mem_region(res->start, res->end - res->start + 1,
                                  pdev->name);
-        if (mem == NULL)
-                return -EBUSY;
+        if (mem == NULL) {
+                ret = -EBUSY;
+                goto err_region;
+        }
 
         dev_set_drvdata(&pdev->dev, mem);
-        rng_base = (u32 __force __iomem *)io_p2v(res->start);
+        rng_base = ioremap(res->start, res->end - res->start + 1);
+        if (!rng_base) {
+                ret = -ENOMEM;
+                goto err_ioremap;
+        }
 
         ret = hwrng_register(&omap_rng_ops);
-        if (ret) {
-                release_resource(mem);
-                rng_base = NULL;
-                return ret;
-        }
+        if (ret)
+                goto err_register;
 
         dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n",
                 omap_rng_read_reg(RNG_REV_REG));
@@ -138,6 +141,18 @@ static int __init omap_rng_probe(struct platform_device *pdev)
         rng_dev = pdev;
 
         return 0;
+
+err_register:
+        iounmap(rng_base);
+        rng_base = NULL;
+err_ioremap:
+        release_resource(mem);
+err_region:
+        if (cpu_is_omap24xx()) {
+                clk_disable(rng_ick);
+                clk_put(rng_ick);
+        }
+        return ret;
 }
 
 static int __exit omap_rng_remove(struct platform_device *pdev)
@@ -148,6 +163,8 @@ static int __exit omap_rng_remove(struct platform_device *pdev)
 
         omap_rng_write_reg(RNG_MASK_REG, 0x0);
 
+        iounmap(rng_base);
+
         if (cpu_is_omap24xx()) {
                 clk_disable(rng_ick);
                 clk_put(rng_ick);
diff --git a/drivers/char/keyboard.c b/drivers/char/keyboard.c
index 7b3a212c86b1..de26a978fbdd 100644
--- a/drivers/char/keyboard.c
+++ b/drivers/char/keyboard.c
@@ -1249,7 +1249,7 @@ static void kbd_keycode(unsigned int keycode, int down, int hw_raw)
                 return;
         }
 
-        if (keycode > NR_KEYS)
+        if (keycode >= NR_KEYS)
                 if (keycode >= KEY_BRL_DOT1 && keycode <= KEY_BRL_DOT8)
                         keysym = K(KT_BRL, keycode - KEY_BRL_DOT1 + 1);
                 else
diff --git a/drivers/char/moxa.c b/drivers/char/moxa.c
index 5df4003ad873..12d327a2c9ba 100644
--- a/drivers/char/moxa.c
+++ b/drivers/char/moxa.c
@@ -513,7 +513,7 @@ static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
                 size_t len)
 {
         void __iomem *baseAddr = brd->basemem;
-        const u16 *uptr = ptr;
+        const __le16 *uptr = ptr;
         size_t wlen, len2, j;
         unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
         unsigned int i, retry;
diff --git a/drivers/char/random.c b/drivers/char/random.c
index 6af435b89867..c8752eaad483 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -1205,7 +1205,7 @@ static int proc_do_uuid(ctl_table *table, int write, struct file *filp,
         return proc_dostring(&fake_table, write, filp, buffer, lenp, ppos);
 }
 
-static int uuid_strategy(ctl_table *table, int __user *name, int nlen,
+static int uuid_strategy(ctl_table *table,
                          void __user *oldval, size_t __user *oldlenp,
                          void __user *newval, size_t newlen)
 {
diff --git a/drivers/char/rtc.c b/drivers/char/rtc.c
index b47710c17885..17683de95717 100644
--- a/drivers/char/rtc.c
+++ b/drivers/char/rtc.c
@@ -96,7 +96,7 @@ static unsigned long rtc_port;
 static int rtc_irq;
 #endif
 
-#ifdef  CONFIG_HPET_RTC_IRQ
+#ifdef  CONFIG_HPET_EMULATE_RTC
 #undef  RTC_IRQ
 #endif
 
diff --git a/drivers/char/sysrq.c b/drivers/char/sysrq.c
index 8fdfe9c871e3..dce4cc0e6953 100644
--- a/drivers/char/sysrq.c
+++ b/drivers/char/sysrq.c
@@ -23,6 +23,7 @@
 #include <linux/reboot.h>
 #include <linux/sysrq.h>
 #include <linux/kbd_kern.h>
+#include <linux/proc_fs.h>
 #include <linux/quotaops.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
@@ -326,6 +327,7 @@ static struct sysrq_key_op sysrq_moom_op = {
         .handler        = sysrq_handle_moom,
         .help_msg       = "Full",
         .action_msg     = "Manual OOM execution",
+        .enable_mask    = SYSRQ_ENABLE_SIGNAL,
 };
 
 static void sysrq_handle_kill(int key, struct tty_struct *tty)
@@ -533,3 +535,32 @@ int unregister_sysrq_key(int key, struct sysrq_key_op *op_p)
         return __sysrq_swap_key_ops(key, NULL, op_p);
 }
 EXPORT_SYMBOL(unregister_sysrq_key);
+
+#ifdef CONFIG_PROC_FS
+/*
+ * writing 'C' to /proc/sysrq-trigger is like sysrq-C
+ */
+static ssize_t write_sysrq_trigger(struct file *file, const char __user *buf,
+                                   size_t count, loff_t *ppos)
+{
+        if (count) {
+                char c;
+
+                if (get_user(c, buf))
+                        return -EFAULT;
+                __handle_sysrq(c, NULL, 0);
+        }
+        return count;
+}
+
+static const struct file_operations proc_sysrq_trigger_operations = {
+        .write          = write_sysrq_trigger,
+};
+
+static int __init sysrq_init(void)
+{
+        proc_create("sysrq-trigger", S_IWUSR, NULL, &proc_sysrq_trigger_operations);
+        return 0;
+}
+module_init(sysrq_init);
+#endif
diff --git a/drivers/char/tpm/tpm.c b/drivers/char/tpm/tpm.c
index 1fee7034a386..e70d13defde4 100644
--- a/drivers/char/tpm/tpm.c
+++ b/drivers/char/tpm/tpm.c
@@ -525,19 +525,19 @@ void tpm_get_timeouts(struct tpm_chip *chip)
         timeout =
             be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_1_IDX)));
         if (timeout)
-                chip->vendor.timeout_a = msecs_to_jiffies(timeout);
+                chip->vendor.timeout_a = usecs_to_jiffies(timeout);
         timeout =
             be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_2_IDX)));
         if (timeout)
-                chip->vendor.timeout_b = msecs_to_jiffies(timeout);
+                chip->vendor.timeout_b = usecs_to_jiffies(timeout);
         timeout =
             be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_3_IDX)));
         if (timeout)
-                chip->vendor.timeout_c = msecs_to_jiffies(timeout);
+                chip->vendor.timeout_c = usecs_to_jiffies(timeout);
         timeout =
             be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_4_IDX)));
         if (timeout)
-                chip->vendor.timeout_d = msecs_to_jiffies(timeout);
+                chip->vendor.timeout_d = usecs_to_jiffies(timeout);
 
 duration:
         memcpy(data, tpm_cap, sizeof(tpm_cap));
@@ -554,15 +554,22 @@ duration:
                 return;
 
         chip->vendor.duration[TPM_SHORT] =
-            msecs_to_jiffies(be32_to_cpu
+            usecs_to_jiffies(be32_to_cpu
                              (*((__be32 *) (data +
                                             TPM_GET_CAP_RET_UINT32_1_IDX))));
+        /* The Broadcom BCM0102 chipset in a Dell Latitude D820 gets the above
+         * value wrong and apparently reports msecs rather than usecs. So we
+         * fix up the resulting too-small TPM_SHORT value to make things work.
+         */
+        if (chip->vendor.duration[TPM_SHORT] < (HZ/100))
+                chip->vendor.duration[TPM_SHORT] = HZ;
+
         chip->vendor.duration[TPM_MEDIUM] =
-            msecs_to_jiffies(be32_to_cpu
+            usecs_to_jiffies(be32_to_cpu
                              (*((__be32 *) (data +
                                             TPM_GET_CAP_RET_UINT32_2_IDX))));
         chip->vendor.duration[TPM_LONG] =
-            msecs_to_jiffies(be32_to_cpu
+            usecs_to_jiffies(be32_to_cpu
                              (*((__be32 *) (data +
                                             TPM_GET_CAP_RET_UINT32_3_IDX))));
 }
@@ -1180,11 +1187,8 @@ struct tpm_chip *tpm_register_hardware(struct device *dev,
         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
         devname = kmalloc(DEVNAME_SIZE, GFP_KERNEL);
 
-        if (chip == NULL || devname == NULL) {
-                kfree(chip);
-                kfree(devname);
-                return NULL;
-        }
+        if (chip == NULL || devname == NULL)
+                goto out_free;
 
         mutex_init(&chip->buffer_mutex);
         mutex_init(&chip->tpm_mutex);
@@ -1201,8 +1205,7 @@ struct tpm_chip *tpm_register_hardware(struct device *dev,
 
         if (chip->dev_num >= TPM_NUM_DEVICES) {
                 dev_err(dev, "No available tpm device numbers\n");
-                kfree(chip);
-                return NULL;
+                goto out_free;
         } else if (chip->dev_num == 0)
                 chip->vendor.miscdev.minor = TPM_MINOR;
         else
@@ -1243,6 +1246,11 @@ struct tpm_chip *tpm_register_hardware(struct device *dev,
         spin_unlock(&driver_lock);
 
         return chip;
+
+out_free:
+        kfree(chip);
+        kfree(devname);
+        return NULL;
 }
 EXPORT_SYMBOL_GPL(tpm_register_hardware);
 
diff --git a/drivers/char/vt.c b/drivers/char/vt.c
index a0f7ffb68087..d8f83e26e4a4 100644
--- a/drivers/char/vt.c
+++ b/drivers/char/vt.c
@@ -59,7 +59,7 @@
  * by Martin Mares <mj@atrey.karlin.mff.cuni.cz>, July 1998
  *
  * Removed old-style timers, introduced console_timer, made timer
- * deletion SMP-safe.  17Jun00, Andrew Morton <andrewm@uow.edu.au>
+ * deletion SMP-safe.  17Jun00, Andrew Morton
  *
  * Removed console_lock, enabled interrupts across all console operations
  * 13 March 2001, Andrew Morton
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index 4a16b5b61cfb..f0d9b415db50 100644
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -119,6 +119,7 @@
 #define                 FERR_NF_UNCORRECTABLE   (FERR_NF_M12ERR | \
                                                         FERR_NF_M11ERR | \
                                                         FERR_NF_M10ERR | \
+                                                        FERR_NF_M9ERR | \
                                                         FERR_NF_M8ERR | \
                                                         FERR_NF_M7ERR | \
                                                         FERR_NF_M6ERR | \
@@ -301,6 +302,9 @@ static char *numcol_toString[] = {
 };
 #endif
 
+/* enables the report of miscellaneous messages as CE errors - default off */
+static int misc_messages;
+
 /* Enumeration of supported devices */
 enum i5000_chips {
         I5000P = 0,
@@ -466,7 +470,8 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci,
                                         struct i5000_error_info *info,
                                         int handle_errors)
 {
-        char msg[EDAC_MC_LABEL_LEN + 1 + 90];
+        char msg[EDAC_MC_LABEL_LEN + 1 + 160];
+        char *specific = NULL;
         u32 allErrors;
         int branch;
         int channel;
@@ -480,11 +485,6 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci,
         if (!allErrors)
                 return;         /* if no error, return now */
 
-        /* ONLY ONE of the possible error bits will be set, as per the docs */
-        i5000_mc_printk(mci, KERN_ERR,
-                        "FATAL ERRORS Found!!! 1st FATAL Err Reg= 0x%x\n",
-                        allErrors);
-
         branch = EXTRACT_FBDCHAN_INDX(info->ferr_fat_fbd);
         channel = branch;
 
@@ -501,28 +501,42 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci,
                 rdwr ? "Write" : "Read", ras, cas);
 
         /* Only 1 bit will be on */
-        if (allErrors & FERR_FAT_M1ERR) {
-                i5000_mc_printk(mci, KERN_ERR,
-                                "Alert on non-redundant retry or fast "
-                                "reset timeout\n");
-
-        } else if (allErrors & FERR_FAT_M2ERR) {
-                i5000_mc_printk(mci, KERN_ERR,
-                                "Northbound CRC error on non-redundant "
-                                "retry\n");
-
-        } else if (allErrors & FERR_FAT_M3ERR) {
-                i5000_mc_printk(mci, KERN_ERR,
-                                ">Tmid Thermal event with intelligent "
-                                "throttling disabled\n");
+        switch (allErrors) {
+        case FERR_FAT_M1ERR:
+                specific = "Alert on non-redundant retry or fast "
+                                "reset timeout";
+                break;
+        case FERR_FAT_M2ERR:
+                specific = "Northbound CRC error on non-redundant "
+                                "retry";
+                break;
+        case FERR_FAT_M3ERR:
+                {
+                static int done;
+
+                /*
+                 * This error is generated to inform that the intelligent
+                 * throttling is disabled and the temperature passed the
+                 * specified middle point. Since this is something the BIOS
+                 * should take care of, we'll warn only once to avoid
+                 * worthlessly flooding the log.
+                 */
+                if (done)
+                        return;
+                done++;
+
+                specific = ">Tmid Thermal event with intelligent "
+                           "throttling disabled";
+                }
+                break;
         }
 
         /* Form out message */
         snprintf(msg, sizeof(msg),
                  "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d CAS=%d "
-                 "FATAL Err=0x%x)",
+                 "FATAL Err=0x%x (%s))",
                  branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas,
-                 allErrors);
+                 allErrors, specific);
 
         /* Call the helper to output message */
         edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg);
@@ -539,7 +553,8 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
                                         struct i5000_error_info *info,
                                         int handle_errors)
 {
-        char msg[EDAC_MC_LABEL_LEN + 1 + 90];
+        char msg[EDAC_MC_LABEL_LEN + 1 + 170];
+        char *specific = NULL;
         u32 allErrors;
         u32 ue_errors;
         u32 ce_errors;
@@ -557,10 +572,6 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
                 return;         /* if no error, return now */
 
         /* ONLY ONE of the possible error bits will be set, as per the docs */
-        i5000_mc_printk(mci, KERN_WARNING,
-                        "NON-FATAL ERRORS Found!!! 1st NON-FATAL Err "
-                        "Reg= 0x%x\n", allErrors);
-
         ue_errors = allErrors & FERR_NF_UNCORRECTABLE;
         if (ue_errors) {
                 debugf0("\tUncorrected bits= 0x%x\n", ue_errors);
@@ -579,12 +590,47 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
                         rank, channel, channel + 1, branch >> 1, bank,
                         rdwr ? "Write" : "Read", ras, cas);
 
+                switch (ue_errors) {
+                case FERR_NF_M12ERR:
+                        specific = "Non-Aliased Uncorrectable Patrol Data ECC";
+                        break;
+                case FERR_NF_M11ERR:
+                        specific = "Non-Aliased Uncorrectable Spare-Copy "
+                                        "Data ECC";
+                        break;
+                case FERR_NF_M10ERR:
+                        specific = "Non-Aliased Uncorrectable Mirrored Demand "
+                                        "Data ECC";
+                        break;
+                case FERR_NF_M9ERR:
+                        specific = "Non-Aliased Uncorrectable Non-Mirrored "
+                                        "Demand Data ECC";
+                        break;
+                case FERR_NF_M8ERR:
+                        specific = "Aliased Uncorrectable Patrol Data ECC";
+                        break;
+                case FERR_NF_M7ERR:
+                        specific = "Aliased Uncorrectable Spare-Copy Data ECC";
+                        break;
+                case FERR_NF_M6ERR:
+                        specific = "Aliased Uncorrectable Mirrored Demand "
+                                        "Data ECC";
+                        break;
+                case FERR_NF_M5ERR:
+                        specific = "Aliased Uncorrectable Non-Mirrored Demand "
+                                        "Data ECC";
+                        break;
+                case FERR_NF_M4ERR:
+                        specific = "Uncorrectable Data ECC on Replay";
+                        break;
+                }
+
                 /* Form out message */
                 snprintf(msg, sizeof(msg),
                          "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d "
-                         "CAS=%d, UE Err=0x%x)",
+                         "CAS=%d, UE Err=0x%x (%s))",
                          branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas,
-                         ue_errors);
+                         ue_errors, specific);
 
                 /* Call the helper to output message */
                 edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg);
@@ -616,51 +662,74 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
                         rank, channel, branch >> 1, bank,
                         rdwr ? "Write" : "Read", ras, cas);
 
+                switch (ce_errors) {
+                case FERR_NF_M17ERR:
+                        specific = "Correctable Non-Mirrored Demand Data ECC";
+                        break;
+                case FERR_NF_M18ERR:
+                        specific = "Correctable Mirrored Demand Data ECC";
+                        break;
+                case FERR_NF_M19ERR:
+                        specific = "Correctable Spare-Copy Data ECC";
+                        break;
+                case FERR_NF_M20ERR:
+                        specific = "Correctable Patrol Data ECC";
+                        break;
+                }
+
                 /* Form out message */
                 snprintf(msg, sizeof(msg),
                          "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d "
-                         "CAS=%d, CE Err=0x%x)", branch >> 1, bank,
-                         rdwr ? "Write" : "Read", ras, cas, ce_errors);
+                         "CAS=%d, CE Err=0x%x (%s))", branch >> 1, bank,
+                         rdwr ? "Write" : "Read", ras, cas, ce_errors,
+                         specific);
 
                 /* Call the helper to output message */
                 edac_mc_handle_fbd_ce(mci, rank, channel, msg);
         }
 
-        /* See if any of the thermal errors have fired */
-        misc_errors = allErrors & FERR_NF_THERMAL;
-        if (misc_errors) {
-                i5000_printk(KERN_WARNING, "\tTHERMAL Error, bits= 0x%x\n",
-                        misc_errors);
-        }
-
-        /* See if any of the thermal errors have fired */
-        misc_errors = allErrors & FERR_NF_NON_RETRY;
-        if (misc_errors) {
-                i5000_printk(KERN_WARNING, "\tNON-Retry  Errors, bits= 0x%x\n",
-                        misc_errors);
-        }
+        if (!misc_messages)
+                return;
 
-        /* See if any of the thermal errors have fired */
-        misc_errors = allErrors & FERR_NF_NORTH_CRC;
+        misc_errors = allErrors & (FERR_NF_NON_RETRY | FERR_NF_NORTH_CRC |
+                                   FERR_NF_SPD_PROTOCOL | FERR_NF_DIMM_SPARE);
         if (misc_errors) {
-                i5000_printk(KERN_WARNING,
-                        "\tNORTHBOUND CRC  Error, bits= 0x%x\n",
-                        misc_errors);
-        }
+                switch (misc_errors) {
+                case FERR_NF_M13ERR:
+                        specific = "Non-Retry or Redundant Retry FBD Memory "
+                                        "Alert or Redundant Fast Reset Timeout";
+                        break;
+                case FERR_NF_M14ERR:
+                        specific = "Non-Retry or Redundant Retry FBD "
+                                        "Configuration Alert";
+                        break;
+                case FERR_NF_M15ERR:
+                        specific = "Non-Retry or Redundant Retry FBD "
+                                        "Northbound CRC error on read data";
+                        break;
+                case FERR_NF_M21ERR:
+                        specific = "FBD Northbound CRC error on "
+                                        "FBD Sync Status";
+                        break;
+                case FERR_NF_M22ERR:
+                        specific = "SPD protocol error";
+                        break;
+                case FERR_NF_M27ERR:
+                        specific = "DIMM-spare copy started";
+                        break;
+                case FERR_NF_M28ERR:
+                        specific = "DIMM-spare copy completed";
+                        break;
+                }
+                branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd);
 
-        /* See if any of the thermal errors have fired */
-        misc_errors = allErrors & FERR_NF_SPD_PROTOCOL;
-        if (misc_errors) {
-                i5000_printk(KERN_WARNING,
-                        "\tSPD Protocol  Error, bits= 0x%x\n",
-                        misc_errors);
-        }
+                /* Form out message */
+                snprintf(msg, sizeof(msg),
+                         "(Branch=%d Err=%#x (%s))", branch >> 1,
+                         misc_errors, specific);
 
-        /* See if any of the thermal errors have fired */
-        misc_errors = allErrors & FERR_NF_DIMM_SPARE;
-        if (misc_errors) {
-                i5000_printk(KERN_WARNING, "\tDIMM-Spare  Error, bits= 0x%x\n",
-                        misc_errors);
+                /* Call the helper to output message */
+                edac_mc_handle_fbd_ce(mci, 0, 0, msg);
         }
 }
 
@@ -1497,3 +1566,6 @@ MODULE_DESCRIPTION("MC Driver for Intel I5000 memory controllers - "
 
 module_param(edac_op_state, int, 0444);
 MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
+module_param(misc_messages, int, 0444);
+MODULE_PARM_DESC(misc_messages, "Log miscellaneous non fatal messages");
+
diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c
index c5305e3ee434..577760a82a0f 100644
--- a/drivers/edac/i82443bxgx_edac.c
+++ b/drivers/edac/i82443bxgx_edac.c
@@ -114,6 +114,12 @@ struct i82443bxgx_edacmc_error_info {
 
 static struct edac_pci_ctl_info *i82443bxgx_pci;
 
+static struct pci_dev *mci_pdev;        /* init dev: in case that AGP code has
+                                         * already registered driver
+                                         */
+
+static int i82443bxgx_registered = 1;
+
 static void i82443bxgx_edacmc_get_error_info(struct mem_ctl_info *mci,
                                 struct i82443bxgx_edacmc_error_info
                                 *info)
@@ -345,10 +351,17 @@ EXPORT_SYMBOL_GPL(i82443bxgx_edacmc_probe1);
 static int __devinit i82443bxgx_edacmc_init_one(struct pci_dev *pdev,
                                                 const struct pci_device_id *ent)
 {
+        int rc;
+
         debugf0("MC: " __FILE__ ": %s()\n", __func__);
 
         /* don't need to call pci_device_enable() */
-        return i82443bxgx_edacmc_probe1(pdev, ent->driver_data);
+        rc = i82443bxgx_edacmc_probe1(pdev, ent->driver_data);
+
+        if (mci_pdev == NULL)
+                mci_pdev = pci_dev_get(pdev);
+
+        return rc;
 }
 
 static void __devexit i82443bxgx_edacmc_remove_one(struct pci_dev *pdev)
@@ -387,15 +400,61 @@ static struct pci_driver i82443bxgx_edacmc_driver = {
 
 static int __init i82443bxgx_edacmc_init(void)
 {
+        int pci_rc;
        /* Ensure that the OPSTATE is set correctly for POLL or NMI */
        opstate_init();
 
-        return pci_register_driver(&i82443bxgx_edacmc_driver);
+        pci_rc = pci_register_driver(&i82443bxgx_edacmc_driver);
+        if (pci_rc < 0)
+                goto fail0;
+
+        if (mci_pdev == NULL) {
+                const struct pci_device_id *id = &i82443bxgx_pci_tbl[0];
+                int i = 0;
+                i82443bxgx_registered = 0;
+
+                while (mci_pdev == NULL && id->vendor != 0) {
+                        mci_pdev = pci_get_device(id->vendor,
+                                        id->device, NULL);
+                        i++;
+                        id = &i82443bxgx_pci_tbl[i];
+                }
+                if (!mci_pdev) {
+                        debugf0("i82443bxgx pci_get_device fail\n");
+                        pci_rc = -ENODEV;
+                        goto fail1;
+                }
+
+                pci_rc = i82443bxgx_edacmc_init_one(mci_pdev, i82443bxgx_pci_tbl);
+
+                if (pci_rc < 0) {
+                        debugf0("i82443bxgx init fail\n");
+                        pci_rc = -ENODEV;
+                        goto fail1;
+                }
+        }
+
+        return 0;
+
+fail1:
+        pci_unregister_driver(&i82443bxgx_edacmc_driver);
+
+fail0:
+        if (mci_pdev != NULL)
+                pci_dev_put(mci_pdev);
+
+        return pci_rc;
 }
 
 static void __exit i82443bxgx_edacmc_exit(void)
 {
         pci_unregister_driver(&i82443bxgx_edacmc_driver);
+
+        if (!i82443bxgx_registered)
+                i82443bxgx_edacmc_remove_one(mci_pdev);
+
+        if (mci_pdev)
+                pci_dev_put(mci_pdev);
 }
 
 module_init(i82443bxgx_edacmc_init);
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 2265d9ca1535..0cfcb2d075a0 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -17,6 +17,7 @@
 #include <linux/io.h>
 #include <linux/mod_devicetable.h>
 #include <linux/edac.h>
+#include <linux/smp.h>
 
 #include <linux/of_platform.h>
 #include <linux/of_device.h>
@@ -40,7 +41,7 @@ static u32 orig_pci_err_en;
 #endif
 
 static u32 orig_l2_err_disable;
-static u32 orig_hid1;
+static u32 orig_hid1[2];
 
 /************************ MC SYSFS parts ***********************************/
 
@@ -647,6 +648,9 @@ static struct of_device_id mpc85xx_l2_err_of_match[] = {
         {
          .compatible = "fsl,8568-l2-cache-controller",
          },
+        {
+         .compatible = "fsl,mpc8572-l2-cache-controller",
+         },
         {},
 };
 
@@ -912,7 +916,8 @@ static int __devinit mpc85xx_mc_err_probe(struct of_device *op,
                 /* register interrupts */
                 pdata->irq = irq_of_parse_and_map(op->node, 0);
                 res = devm_request_irq(&op->dev, pdata->irq,
-                                       mpc85xx_mc_isr, IRQF_DISABLED,
+                                       mpc85xx_mc_isr,
+                                        IRQF_DISABLED | IRQF_SHARED,
                                        "[EDAC] MC err", mci);
                 if (res < 0) {
                         printk(KERN_ERR "%s: Unable to request irq %d for "
@@ -980,6 +985,9 @@ static struct of_device_id mpc85xx_mc_err_of_match[] = {
         {
          .compatible = "fsl,8568-memory-controller",
          },
+        {
+         .compatible = "fsl,mpc8572-memory-controller",
+         },
         {},
 };
 
@@ -995,6 +1003,14 @@ static struct of_platform_driver mpc85xx_mc_err_driver = {
                    },
 };
 
+
+static void __init mpc85xx_mc_clear_rfxe(void *data)
+{
+        orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1);
+        mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~0x20000));
+}
+
+
 static int __init mpc85xx_mc_init(void)
 {
         int res = 0;
@@ -1030,19 +1046,22 @@ static int __init mpc85xx_mc_init(void)
          * need to clear HID1[RFXE] to disable machine check int
          * so we can catch it
          */
-        if (edac_op_state == EDAC_OPSTATE_INT) {
-                orig_hid1 = mfspr(SPRN_HID1);
-                mtspr(SPRN_HID1, (orig_hid1 & ~0x20000));
-        }
+        if (edac_op_state == EDAC_OPSTATE_INT)
+                on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0);
 
         return 0;
 }
 
 module_init(mpc85xx_mc_init);
 
+static void __exit mpc85xx_mc_restore_hid1(void *data)
+{
+        mtspr(SPRN_HID1, orig_hid1[smp_processor_id()]);
+}
+
 static void __exit mpc85xx_mc_exit(void)
 {
-        mtspr(SPRN_HID1, orig_hid1);
+        on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
 #ifdef CONFIG_PCI
         of_unregister_platform_driver(&mpc85xx_pci_err_driver);
 #endif
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 8d2940517c99..9112830107a5 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -67,17 +67,28 @@ static inline void desc_set_label(struct gpio_desc *d, const char *label)
  * when setting direction, and otherwise illegal.  Until board setup code
  * and drivers use explicit requests everywhere (which won't happen when
  * those calls have no teeth) we can't avoid autorequesting.  This nag
- * message should motivate switching to explicit requests...
+ * message should motivate switching to explicit requests... so should
+ * the weaker cleanup after faults, compared to gpio_request().
  */
-static void gpio_ensure_requested(struct gpio_desc *desc)
+static int gpio_ensure_requested(struct gpio_desc *desc, unsigned offset)
 {
         if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
-                pr_warning("GPIO-%d autorequested\n", (int)(desc - gpio_desc));
+                struct gpio_chip *chip = desc->chip;
+                int gpio = chip->base + offset;
+
+                if (!try_module_get(chip->owner)) {
+                        pr_err("GPIO-%d: module can't be gotten \n", gpio);
+                        clear_bit(FLAG_REQUESTED, &desc->flags);
+                        /* lose */
+                        return -EIO;
+                }
+                pr_warning("GPIO-%d autorequested\n", gpio);
                 desc_set_label(desc, "[auto]");
-                if (!try_module_get(desc->chip->owner))
-                        pr_err("GPIO-%d: module can't be gotten \n",
-                                        (int)(desc - gpio_desc));
+                /* caller must chip->request() w/o spinlock */
+                if (chip->request)
+                        return 1;
         }
+        return 0;
 }
 
 /* caller holds gpio_lock *OR* gpio is marked as requested */
@@ -752,6 +763,7 @@ EXPORT_SYMBOL_GPL(gpiochip_remove);
 int gpio_request(unsigned gpio, const char *label)
 {
         struct gpio_desc        *desc;
+        struct gpio_chip        *chip;
         int                     status = -EINVAL;
         unsigned long           flags;
 
@@ -760,14 +772,15 @@ int gpio_request(unsigned gpio, const char *label)
         if (!gpio_is_valid(gpio))
                 goto done;
         desc = &gpio_desc[gpio];
-        if (desc->chip == NULL)
+        chip = desc->chip;
+        if (chip == NULL)
                 goto done;
 
-        if (!try_module_get(desc->chip->owner))
+        if (!try_module_get(chip->owner))
                 goto done;
 
         /* NOTE:  gpio_request() can be called in early boot,
-         * before IRQs are enabled.
+         * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
          */
 
         if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
@@ -775,7 +788,20 @@ int gpio_request(unsigned gpio, const char *label)
                 status = 0;
         } else {
                 status = -EBUSY;
-                module_put(desc->chip->owner);
+                module_put(chip->owner);
+        }
+
+        if (chip->request) {
+                /* chip->request may sleep */
+                spin_unlock_irqrestore(&gpio_lock, flags);
+                status = chip->request(chip, gpio - chip->base);
+                spin_lock_irqsave(&gpio_lock, flags);
+
+                if (status < 0) {
+                        desc_set_label(desc, NULL);
+                        module_put(chip->owner);
+                        clear_bit(FLAG_REQUESTED, &desc->flags);
+                }
         }
 
 done:
@@ -791,6 +817,9 @@ void gpio_free(unsigned gpio)
 {
         unsigned long           flags;
         struct gpio_desc        *desc;
+        struct gpio_chip        *chip;
+
+        might_sleep();
 
         if (!gpio_is_valid(gpio)) {
                 WARN_ON(extra_checks);
@@ -802,9 +831,17 @@ void gpio_free(unsigned gpio)
         spin_lock_irqsave(&gpio_lock, flags);
 
         desc = &gpio_desc[gpio];
-        if (desc->chip && test_and_clear_bit(FLAG_REQUESTED, &desc->flags)) {
+        chip = desc->chip;
+        if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) {
+                if (chip->free) {
+                        spin_unlock_irqrestore(&gpio_lock, flags);
+                        might_sleep_if(extra_checks && chip->can_sleep);
+                        chip->free(chip, gpio - chip->base);
+                        spin_lock_irqsave(&gpio_lock, flags);
+                }
                 desc_set_label(desc, NULL);
                 module_put(desc->chip->owner);
+                clear_bit(FLAG_REQUESTED, &desc->flags);
         } else
                 WARN_ON(extra_checks);
 
@@ -869,7 +906,9 @@ int gpio_direction_input(unsigned gpio)
         gpio -= chip->base;
         if (gpio >= chip->ngpio)
                 goto fail;
-        gpio_ensure_requested(desc);
+        status = gpio_ensure_requested(desc, gpio);
+        if (status < 0)
+                goto fail;
 
         /* now we know the gpio is valid and chip won't vanish */
 
@@ -877,9 +916,22 @@ int gpio_direction_input(unsigned gpio)
 
         might_sleep_if(extra_checks && chip->can_sleep);
 
+        if (status) {
+                status = chip->request(chip, gpio);
+                if (status < 0) {
+                        pr_debug("GPIO-%d: chip request fail, %d\n",
+                                chip->base + gpio, status);
+                        /* and it's not available to anyone else ...
+                         * gpio_request() is the fully clean solution.
+                         */
+                        goto lose;
+                }
+        }
+
         status = chip->direction_input(chip, gpio);
         if (status == 0)
                 clear_bit(FLAG_IS_OUT, &desc->flags);
+lose:
         return status;
 fail:
         spin_unlock_irqrestore(&gpio_lock, flags);
@@ -907,7 +959,9 @@ int gpio_direction_output(unsigned gpio, int value)
         gpio -= chip->base;
         if (gpio >= chip->ngpio)
                 goto fail;
-        gpio_ensure_requested(desc);
+        status = gpio_ensure_requested(desc, gpio);
+        if (status < 0)
+                goto fail;
 
         /* now we know the gpio is valid and chip won't vanish */
 
@@ -915,9 +969,22 @@ int gpio_direction_output(unsigned gpio, int value)
 
         might_sleep_if(extra_checks && chip->can_sleep);
 
+        if (status) {
+                status = chip->request(chip, gpio);
+                if (status < 0) {
+                        pr_debug("GPIO-%d: chip request fail, %d\n",
+                                chip->base + gpio, status);
+                        /* and it's not available to anyone else ...
+                         * gpio_request() is the fully clean solution.
+                         */
+                        goto lose;
+                }
+        }
+
         status = chip->direction_output(chip, gpio, value);
         if (status == 0)
                 set_bit(FLAG_IS_OUT, &desc->flags);
+lose:
         return status;
 fail:
         spin_unlock_irqrestore(&gpio_lock, flags);
@@ -1008,6 +1075,24 @@ int __gpio_cansleep(unsigned gpio)
 }
 EXPORT_SYMBOL_GPL(__gpio_cansleep);
 
+/**
+ * __gpio_to_irq() - return the IRQ corresponding to a GPIO
+ * @gpio: gpio whose IRQ will be returned (already requested)
+ * Context: any
+ *
+ * This is used directly or indirectly to implement gpio_to_irq().
+ * It returns the number of the IRQ signaled by this (input) GPIO,
+ * or a negative errno.
+ */
+int __gpio_to_irq(unsigned gpio)
+{
+        struct gpio_chip        *chip;
+
+        chip = gpio_to_chip(gpio);
+        return chip->to_irq ? chip->to_irq(chip, gpio - chip->base) : -ENXIO;
+}
+EXPORT_SYMBOL_GPL(__gpio_to_irq);
+
 
 
 /* There's no value in making it easy to inline GPIO calls that may sleep.
diff --git a/drivers/gpio/max7301.c b/drivers/gpio/max7301.c
index 39c795ad8312..8b24d784db93 100644
--- a/drivers/gpio/max7301.c
+++ b/drivers/gpio/max7301.c
@@ -255,10 +255,6 @@ static int __devinit max7301_probe(struct spi_device *spi)
         ts->chip.dev = &spi->dev;
         ts->chip.owner = THIS_MODULE;
 
-        ret = gpiochip_add(&ts->chip);
-        if (ret)
-                goto exit_destroy;
-
         /*
          * tristate all pins in hardware and cache the
          * register values for later use.
@@ -269,17 +265,19 @@ static int __devinit max7301_probe(struct spi_device *spi)
                 max7301_write(spi, 0x08 + i, 0xAA);
                 ts->port_config[i] = 0xAA;
                 for (j = 0; j < 4; j++) {
-                        int idx = ts->chip.base + (i - 1) * 4 + j;
-                        ret = gpio_direction_input(idx);
+                        int offset = (i - 1) * 4 + j;
+                        ret = max7301_direction_input(&ts->chip, offset);
                         if (ret)
-                                goto exit_remove;
-                        gpio_free(idx);
+                                goto exit_destroy;
                 }
         }
+
+        ret = gpiochip_add(&ts->chip);
+        if (ret)
+                goto exit_destroy;
+
         return ret;
 
-exit_remove:
-        gpiochip_remove(&ts->chip);
 exit_destroy:
         dev_set_drvdata(&spi->dev, NULL);
         mutex_destroy(&ts->lock);
@@ -325,13 +323,15 @@ static int __init max7301_init(void)
 {
         return spi_register_driver(&max7301_driver);
 }
+/* register after spi postcore initcall and before
+ * subsys initcalls that may rely on these GPIOs
+ */
+subsys_initcall(max7301_init);
 
 static void __exit max7301_exit(void)
 {
         spi_unregister_driver(&max7301_driver);
 }
-
-module_init(max7301_init);
 module_exit(max7301_exit);
 
 MODULE_AUTHOR("Juergen Beisert");
diff --git a/drivers/gpio/max732x.c b/drivers/gpio/max732x.c
index b51c8135ca28..55ae9a41897a 100644
--- a/drivers/gpio/max732x.c
+++ b/drivers/gpio/max732x.c
@@ -372,7 +372,10 @@ static int __init max732x_init(void)
 {
         return i2c_add_driver(&max732x_driver);
 }
-module_init(max732x_init);
+/* register after i2c postcore initcall and before
+ * subsys initcalls that may rely on these GPIOs
+ */
+subsys_initcall(max732x_init);
 
 static void __exit max732x_exit(void)
 {
diff --git a/drivers/gpio/mcp23s08.c b/drivers/gpio/mcp23s08.c
index 8a1b405fefda..89c1d222e9d1 100644
--- a/drivers/gpio/mcp23s08.c
+++ b/drivers/gpio/mcp23s08.c
@@ -419,7 +419,10 @@ static int __init mcp23s08_init(void)
 {
         return spi_register_driver(&mcp23s08_driver);
 }
-module_init(mcp23s08_init);
+/* register after spi postcore initcall and before
+ * subsys initcalls that may rely on these GPIOs
+ */
+subsys_initcall(mcp23s08_init);
 
 static void __exit mcp23s08_exit(void)
 {
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index cc8468692ae0..9ceeb89f1325 100644
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -289,7 +289,10 @@ static int __init pca953x_init(void)
 {
         return i2c_add_driver(&pca953x_driver);
 }
-module_init(pca953x_init);
+/* register after i2c postcore initcall and before
+ * subsys initcalls that may rely on these GPIOs
+ */
+subsys_initcall(pca953x_init);
 
 static void __exit pca953x_exit(void)
 {
diff --git a/drivers/gpio/pcf857x.c b/drivers/gpio/pcf857x.c
index fc9c6ae739ee..4bc2070dd4a1 100644
--- a/drivers/gpio/pcf857x.c
+++ b/drivers/gpio/pcf857x.c
@@ -351,7 +351,10 @@ static int __init pcf857x_init(void)
 {
         return i2c_add_driver(&pcf857x_driver);
 }
-module_init(pcf857x_init);
+/* register after i2c postcore initcall and before
+ * subsys initcalls that may rely on these GPIOs
+ */
+subsys_initcall(pcf857x_init);
 
 static void __exit pcf857x_exit(void)
 {
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 88974342933c..9ac4720e647b 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -517,7 +517,7 @@ static int i915_dispatch_flip(struct drm_device * dev)
         RING_LOCALS;
 
         DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
-                  __FUNCTION__,
+                  __func__,
                   dev_priv->current_page,
                   dev_priv->sarea_priv->pf_current_page);
 
@@ -642,7 +642,7 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data,
 static int i915_flip_bufs(struct drm_device *dev, void *data,
                           struct drm_file *file_priv)
 {
-        DRM_DEBUG("%s\n", __FUNCTION__);
+        DRM_DEBUG("%s\n", __func__);
 
         LOCK_TEST_WITH_RETURN(dev, file_priv);
 
diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig
index da64108de775..f5999a91614e 100644
--- a/drivers/hid/Kconfig
+++ b/drivers/hid/Kconfig
@@ -17,25 +17,6 @@ config HID
         tristate "Generic HID support"
         depends on INPUT
         default y
-        select HID_A4TECH if !EMBEDDED
-        select HID_APPLE if !EMBEDDED
-        select HID_BELKIN if !EMBEDDED
-        select HID_BRIGHT if !EMBEDDED
-        select HID_CHERRY if !EMBEDDED
-        select HID_CHICONY if !EMBEDDED
-        select HID_CYPRESS if !EMBEDDED
-        select HID_DELL if !EMBEDDED
-        select HID_EZKEY if !EMBEDDED
-        select HID_GYRATION if !EMBEDDED
-        select HID_LOGITECH if !EMBEDDED
-        select HID_MICROSOFT if !EMBEDDED
-        select HID_MONTEREY if !EMBEDDED
-        select HID_PANTHERLORD if !EMBEDDED
-        select HID_PETALYNX if !EMBEDDED
-        select HID_SAMSUNG if !EMBEDDED
-        select HID_SONY if !EMBEDDED
-        select HID_SUNPLUS if !EMBEDDED
-
         ---help---
           A human interface device (HID) is a type of computer device that
           interacts directly with and takes input from humans. The term "HID"
@@ -102,89 +83,86 @@ config HID_COMPAT
         If unsure, say Y.
 
 config HID_A4TECH
-        tristate "A4 tech"
-        default m
+        tristate "A4 tech" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
         Support for A4 tech X5 and WOP-35 / Trust 450L mice.
 
 config HID_APPLE
-        tristate "Apple"
-        default m
+        tristate "Apple" if EMBEDDED
         depends on (USB_HID || BT_HIDP)
+        default y
         ---help---
         Support for some Apple devices which less or more break
         HID specification.
 
-        Say Y here if you want support for the special keys (Fn, Numlock) on
-        Apple iBooks, PowerBooks, MacBooks, MacBook Pros and aluminum USB
-        keyboards.
-
-        If unsure, say M.
+        Say Y here if you want support for keyboards of Apple iBooks, PowerBooks,
+        MacBooks, MacBook Pros and Apple Aluminum.
 
 config HID_BELKIN
-        tristate "Belkin"
-        default m
+        tristate "Belkin" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
         Support for Belkin Flip KVM and Wireless keyboard.
 
 config HID_BRIGHT
-        tristate "Bright"
-        default m
+        tristate "Bright" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
         Support for Bright ABNT-2 keyboard.
 
 config HID_CHERRY
-        tristate "Cherry"
-        default m
+        tristate "Cherry" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
-        Support for Cherry Cymotion.
+        Support for Cherry Cymotion keyboard.
 
 config HID_CHICONY
-        tristate "Chicony"
-        default m
+        tristate "Chicony" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
         Support for Chicony Tactical pad.
 
 config HID_CYPRESS
-        tristate "Cypress"
-        default m
+        tristate "Cypress" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
-        Support for Cypress mouse and barcodes.
+        Support for cypress mouse and barcode readers.
 
 config HID_DELL
-        tristate "Dell"
-        default m
+        tristate "Dell" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
-        Support for Dell W7658.
+        Support for quirky Dell HID hardware that require
+        special LED handling (W7658 and SK8115 models)
 
 config HID_EZKEY
-        tristate "Ezkey"
-        default m
+        tristate "Ezkey" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
-        Support for Ezkey mouse and barcodes.
+        Support for Ezkey BTC 8193 keyboard.
 
 config HID_GYRATION
-        tristate "Gyration"
-        default m
+        tristate "Gyration" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
-        Support for Gyration remote.
+        Support for Gyration remote control.
 
 config HID_LOGITECH
-        tristate "Logitech"
-        default m
+        tristate "Logitech" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
-        Support for some Logitech devices which breaks less or more
-        HID specification.
+        Support for Logitech devices that are not fully compliant with HID standard.
 
 config LOGITECH_FF
         bool "Logitech force feedback"
@@ -211,28 +189,26 @@ config LOGIRUMBLEPAD2_FF
           Rumblepad 2 devices.
 
 config HID_MICROSOFT
-        tristate "Microsoft"
-        default m
+        tristate "Microsoft" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
-        Support for some Microsoft devices which breaks less or more
-        HID specification.
+        Support for Microsoft devices that are not fully compliant with HID standard.
 
 config HID_MONTEREY
-        tristate "Monterey"
-        default m
+        tristate "Monterey" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
         Support for Monterey Genius KB29E.
 
 config HID_PANTHERLORD
-        tristate "Pantherlord devices support"
-        default m
+        tristate "Pantherlord devices support" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
         Support for PantherLord/GreenAsia based device support.
 
-
 config PANTHERLORD_FF
         bool "Pantherlord force feedback support"
         depends on HID_PANTHERLORD
@@ -242,32 +218,32 @@ config PANTHERLORD_FF
           or adapter and want to enable force feedback support for it.
 
 config HID_PETALYNX
-        tristate "Petalynx"
-        default m
+        tristate "Petalynx" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
-        Support for Petalynx Maxter remote.
+        Support for Petalynx Maxter remote control.
 
 config HID_SAMSUNG
-        tristate "Samsung"
-        default m
+        tristate "Samsung" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
-        Support for Samsung IR remote.
+        Support for Samsung InfraRed remote control.
 
 config HID_SONY
-        tristate "Sony"
-        default m
+        tristate "Sony" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
         Support for Sony PS3 controller.
 
 config HID_SUNPLUS
-        tristate "Sunplus"
-        default m
+        tristate "Sunplus" if EMBEDDED
         depends on USB_HID
+        default y
         ---help---
-        Support for Sunplus WDesktop input device.
+        Support for Sunplus wireless desktop.
 
 config THRUSTMASTER_FF
         tristate "ThrustMaster devices support"
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index 8a7d9dbb4d07..721a36d97582 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -1518,6 +1518,8 @@ static const struct hid_device_id hid_ignore_list[] = {
         { HID_USB_DEVICE(USB_VENDOR_ID_PANJIT, 0x0003) },
         { HID_USB_DEVICE(USB_VENDOR_ID_PANJIT, 0x0004) },
         { HID_USB_DEVICE(USB_VENDOR_ID_SOUNDGRAPH, USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD) },
+        { HID_USB_DEVICE(USB_VENDOR_ID_SOUNDGRAPH, USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD2) },
+        { HID_USB_DEVICE(USB_VENDOR_ID_SOUNDGRAPH, USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD3) },
         { HID_USB_DEVICE(USB_VENDOR_ID_TENX, USB_DEVICE_ID_TENX_IBUDDY1) },
         { HID_USB_DEVICE(USB_VENDOR_ID_TENX, USB_DEVICE_ID_TENX_IBUDDY2) },
         { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb300) },
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index aad9ed1b406e..d9a1ba920c23 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -354,6 +354,8 @@
 
 #define USB_VENDOR_ID_SOUNDGRAPH        0x15c2
 #define USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD       0x0038
+#define USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD2      0x0036
+#define USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD3      0x0034
 
 #define USB_VENDOR_ID_SUN               0x0430
 #define USB_DEVICE_ID_RARITAN_KVM_DONGLE        0xcdab
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index e7eb7bf9ddec..608038d64f81 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -589,11 +589,16 @@ omap_i2c_probe(struct platform_device *pdev)
 
         dev->dev = &pdev->dev;
         dev->irq = irq->start;
-        dev->base = (void __iomem *) IO_ADDRESS(mem->start);
+        dev->base = ioremap(mem->start, mem->end - mem->start + 1);
+        if (!dev->base) {
+                r = -ENOMEM;
+                goto err_free_mem;
+        }
+
         platform_set_drvdata(pdev, dev);
 
         if ((r = omap_i2c_get_clocks(dev)) != 0)
-                goto err_free_mem;
+                goto err_iounmap;
 
         omap_i2c_unidle(dev);
 
@@ -640,6 +645,8 @@ err_unuse_clocks:
         omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
         omap_i2c_idle(dev);
         omap_i2c_put_clocks(dev);
+err_iounmap:
+        iounmap(dev->base);
 err_free_mem:
         platform_set_drvdata(pdev, NULL);
         kfree(dev);
@@ -661,6 +668,7 @@ omap_i2c_remove(struct platform_device *pdev)
         i2c_del_adapter(&dev->adapter);
         omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
         omap_i2c_put_clocks(dev);
+        iounmap(dev->base);
         kfree(dev);
         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         release_mem_region(mem->start, (mem->end - mem->start) + 1);
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index 6c6dd2facede..74a369a6116f 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -4,7 +4,7 @@
 
 # Select HAVE_IDE if IDE is supported
 config HAVE_IDE
-        def_bool n
+        bool
 
 menuconfig IDE
         tristate "ATA/ATAPI/MFM/RLL support"
diff --git a/drivers/input/gameport/gameport.c b/drivers/input/gameport/gameport.c
index 078e4eed0894..2880eaae157a 100644
--- a/drivers/input/gameport/gameport.c
+++ b/drivers/input/gameport/gameport.c
@@ -231,6 +231,7 @@ static void gameport_find_driver(struct gameport *gameport)
 enum gameport_event_type {
         GAMEPORT_REGISTER_PORT,
         GAMEPORT_REGISTER_DRIVER,
+        GAMEPORT_ATTACH_DRIVER,
 };
 
 struct gameport_event {
@@ -245,11 +246,12 @@ static LIST_HEAD(gameport_event_list);
 static DECLARE_WAIT_QUEUE_HEAD(gameport_wait);
 static struct task_struct *gameport_task;
 
-static void gameport_queue_event(void *object, struct module *owner,
-                              enum gameport_event_type event_type)
+static int gameport_queue_event(void *object, struct module *owner,
+                                enum gameport_event_type event_type)
 {
         unsigned long flags;
         struct gameport_event *event;
+        int retval = 0;
 
         spin_lock_irqsave(&gameport_event_lock, flags);
 
@@ -268,24 +270,34 @@ static void gameport_queue_event(void *object, struct module *owner,
                 }
         }
 
-        if ((event = kmalloc(sizeof(struct gameport_event), GFP_ATOMIC))) {
-                if (!try_module_get(owner)) {
-                        printk(KERN_WARNING "gameport: Can't get module reference, dropping event %d\n", event_type);
-                        kfree(event);
-                        goto out;
-                }
-
-                event->type = event_type;
-                event->object = object;
-                event->owner = owner;
+        event = kmalloc(sizeof(struct gameport_event), GFP_ATOMIC);
+        if (!event) {
+                printk(KERN_ERR
+                        "gameport: Not enough memory to queue event %d\n",
+                        event_type);
+                retval = -ENOMEM;
+                goto out;
+        }
 
-                list_add_tail(&event->node, &gameport_event_list);
-                wake_up(&gameport_wait);
-        } else {
-                printk(KERN_ERR "gameport: Not enough memory to queue event %d\n", event_type);
+        if (!try_module_get(owner)) {
+                printk(KERN_WARNING
+                        "gameport: Can't get module reference, dropping event %d\n",
+                        event_type);
+                kfree(event);
+                retval = -EINVAL;
+                goto out;
         }
+
+        event->type = event_type;
+        event->object = object;
+        event->owner = owner;
+
+        list_add_tail(&event->node, &gameport_event_list);
+        wake_up(&gameport_wait);
+
 out:
         spin_unlock_irqrestore(&gameport_event_lock, flags);
+        return retval;
 }
 
 static void gameport_free_event(struct gameport_event *event)
@@ -378,9 +390,10 @@ static void gameport_handle_event(void)
 }
 
 /*
- * Remove all events that have been submitted for a given gameport port.
+ * Remove all events that have been submitted for a given object,
+ * be it a gameport port or a driver.
  */
-static void gameport_remove_pending_events(struct gameport *gameport)
+static void gameport_remove_pending_events(void *object)
 {
         struct list_head *node, *next;
         struct gameport_event *event;
@@ -390,7 +403,7 @@ static void gameport_remove_pending_events(struct gameport *gameport)
 
         list_for_each_safe(node, next, &gameport_event_list) {
                 event = list_entry(node, struct gameport_event, node);
-                if (event->object == gameport) {
+                if (event->object == object) {
                         list_del_init(node);
                         gameport_free_event(event);
                 }
@@ -705,10 +718,40 @@ static void gameport_add_driver(struct gameport_driver *drv)
                         drv->driver.name, error);
 }
 
-void __gameport_register_driver(struct gameport_driver *drv, struct module *owner)
+int __gameport_register_driver(struct gameport_driver *drv, struct module *owner,
+                                const char *mod_name)
 {
+        int error;
+
         drv->driver.bus = &gameport_bus;
-        gameport_queue_event(drv, owner, GAMEPORT_REGISTER_DRIVER);
+        drv->driver.owner = owner;
+        drv->driver.mod_name = mod_name;
+
+        /*
+         * Temporarily disable automatic binding because probing
+         * takes long time and we are better off doing it in kgameportd
+         */
+        drv->ignore = 1;
+
+        error = driver_register(&drv->driver);
+        if (error) {
+                printk(KERN_ERR
+                        "gameport: driver_register() failed for %s, error: %d\n",
+                        drv->driver.name, error);
+                return error;
+        }
+
+        /*
+         * Reset ignore flag and let kgameportd bind the driver to free ports
+         */
+        drv->ignore = 0;
+        error = gameport_queue_event(drv, NULL, GAMEPORT_ATTACH_DRIVER);
+        if (error) {
+                driver_unregister(&drv->driver);
+                return error;
+        }
+
+        return 0;
 }
 
 void gameport_unregister_driver(struct gameport_driver *drv)
@@ -716,7 +759,9 @@ void gameport_unregister_driver(struct gameport_driver *drv)
         struct gameport *gameport;
 
         mutex_lock(&gameport_mutex);
+
         drv->ignore = 1;        /* so gameport_find_driver ignores it */
+        gameport_remove_pending_events(drv);
 
 start_over:
         list_for_each_entry(gameport, &gameport_list, node) {
@@ -729,6 +774,7 @@ start_over:
         }
 
         driver_unregister(&drv->driver);
+
         mutex_unlock(&gameport_mutex);
 }
 
diff --git a/drivers/input/joystick/a3d.c b/drivers/input/joystick/a3d.c
index 92498d470b1f..6489f4010c4f 100644
--- a/drivers/input/joystick/a3d.c
+++ b/drivers/input/joystick/a3d.c
@@ -414,8 +414,7 @@ static struct gameport_driver a3d_drv = {
 
 static int __init a3d_init(void)
 {
-        gameport_register_driver(&a3d_drv);
-        return 0;
+        return gameport_register_driver(&a3d_drv);
 }
 
 static void __exit a3d_exit(void)
diff --git a/drivers/input/joystick/adi.c b/drivers/input/joystick/adi.c
index d1ca8a14950f..89c4c084d4ad 100644
--- a/drivers/input/joystick/adi.c
+++ b/drivers/input/joystick/adi.c
@@ -572,8 +572,7 @@ static struct gameport_driver adi_drv = {
 
 static int __init adi_init(void)
 {
-        gameport_register_driver(&adi_drv);
-        return 0;
+        return gameport_register_driver(&adi_drv);
 }
 
 static void __exit adi_exit(void)
diff --git a/drivers/input/joystick/analog.c b/drivers/input/joystick/analog.c
index 708c5ae13b24..356b3a25efa2 100644
--- a/drivers/input/joystick/analog.c
+++ b/drivers/input/joystick/analog.c
@@ -761,9 +761,7 @@ static struct gameport_driver analog_drv = {
 static int __init analog_init(void)
 {
         analog_parse_options();
-        gameport_register_driver(&analog_drv);
-
-        return 0;
+        return gameport_register_driver(&analog_drv);
 }
 
 static void __exit analog_exit(void)
diff --git a/drivers/input/joystick/cobra.c b/drivers/input/joystick/cobra.c
index 639b975a8ed7..3497b87c3d05 100644
--- a/drivers/input/joystick/cobra.c
+++ b/drivers/input/joystick/cobra.c
@@ -263,8 +263,7 @@ static struct gameport_driver cobra_drv = {
 
 static int __init cobra_init(void)
 {
-        gameport_register_driver(&cobra_drv);
-        return 0;
+        return gameport_register_driver(&cobra_drv);
 }
 
 static void __exit cobra_exit(void)
diff --git a/drivers/input/joystick/gf2k.c b/drivers/input/joystick/gf2k.c
index cb6eef1f2d99..67c207f5b1a1 100644
--- a/drivers/input/joystick/gf2k.c
+++ b/drivers/input/joystick/gf2k.c
@@ -375,8 +375,7 @@ static struct gameport_driver gf2k_drv = {
 
 static int __init gf2k_init(void)
 {
-        gameport_register_driver(&gf2k_drv);
-        return 0;
+        return gameport_register_driver(&gf2k_drv);
 }
 
 static void __exit gf2k_exit(void)
diff --git a/drivers/input/joystick/grip.c b/drivers/input/joystick/grip.c
index 684e07cfccc8..fc55899ba6c5 100644
--- a/drivers/input/joystick/grip.c
+++ b/drivers/input/joystick/grip.c
@@ -426,8 +426,7 @@ static struct gameport_driver grip_drv = {
 
 static int __init grip_init(void)
 {
-        gameport_register_driver(&grip_drv);
-        return 0;
+        return gameport_register_driver(&grip_drv);
 }
 
 static void __exit grip_exit(void)
diff --git a/drivers/input/joystick/grip_mp.c b/drivers/input/joystick/grip_mp.c
index 8279481b16e7..2d47baf47769 100644
--- a/drivers/input/joystick/grip_mp.c
+++ b/drivers/input/joystick/grip_mp.c
@@ -689,8 +689,7 @@ static struct gameport_driver grip_drv = {
 
 static int __init grip_init(void)
 {
-        gameport_register_driver(&grip_drv);
-        return 0;
+        return gameport_register_driver(&grip_drv);
 }
 
 static void __exit grip_exit(void)
diff --git a/drivers/input/joystick/guillemot.c b/drivers/input/joystick/guillemot.c
index 25ec3fad9f27..4058d4b272fe 100644
--- a/drivers/input/joystick/guillemot.c
+++ b/drivers/input/joystick/guillemot.c
@@ -283,8 +283,7 @@ static struct gameport_driver guillemot_drv = {
 
 static int __init guillemot_init(void)
 {
-        gameport_register_driver(&guillemot_drv);
-        return 0;
+        return gameport_register_driver(&guillemot_drv);
 }
 
 static void __exit guillemot_exit(void)
diff --git a/drivers/input/joystick/interact.c b/drivers/input/joystick/interact.c
index 8c3290b68205..2478289aeeea 100644
--- a/drivers/input/joystick/interact.c
+++ b/drivers/input/joystick/interact.c
@@ -317,8 +317,7 @@ static struct gameport_driver interact_drv = {
 
 static int __init interact_init(void)
 {
-        gameport_register_driver(&interact_drv);
-        return 0;
+        return gameport_register_driver(&interact_drv);
 }
 
 static void __exit interact_exit(void)
diff --git a/drivers/input/joystick/joydump.c b/drivers/input/joystick/joydump.c
index 2a1b82c8b31c..cd894a0564a2 100644
--- a/drivers/input/joystick/joydump.c
+++ b/drivers/input/joystick/joydump.c
@@ -161,8 +161,7 @@ static struct gameport_driver joydump_drv = {
 
 static int __init joydump_init(void)
 {
-        gameport_register_driver(&joydump_drv);
-        return 0;
+        return gameport_register_driver(&joydump_drv);
 }
 
 static void __exit joydump_exit(void)
diff --git a/drivers/input/joystick/sidewinder.c b/drivers/input/joystick/sidewinder.c
index 7b4865fdee54..ca13a6bec33e 100644
--- a/drivers/input/joystick/sidewinder.c
+++ b/drivers/input/joystick/sidewinder.c
@@ -818,8 +818,7 @@ static struct gameport_driver sw_drv = {
 
 static int __init sw_init(void)
 {
-        gameport_register_driver(&sw_drv);
-        return 0;
+        return gameport_register_driver(&sw_drv);
 }
 
 static void __exit sw_exit(void)
diff --git a/drivers/input/joystick/tmdc.c b/drivers/input/joystick/tmdc.c
index 60c37bcb938d..d6c609807115 100644
--- a/drivers/input/joystick/tmdc.c
+++ b/drivers/input/joystick/tmdc.c
@@ -438,8 +438,7 @@ static struct gameport_driver tmdc_drv = {
 
 static int __init tmdc_init(void)
 {
-        gameport_register_driver(&tmdc_drv);
-        return 0;
+        return gameport_register_driver(&tmdc_drv);
 }
 
 static void __exit tmdc_exit(void)
diff --git a/drivers/input/joystick/xpad.c b/drivers/input/joystick/xpad.c
index 6791be81eb29..839d1c9622f6 100644
--- a/drivers/input/joystick/xpad.c
+++ b/drivers/input/joystick/xpad.c
@@ -455,10 +455,10 @@ static void xpad_bulk_out(struct urb *urb)
         case -ENOENT:
         case -ESHUTDOWN:
                 /* this urb is terminated, clean up */
-                dbg("%s - urb shutting down with status: %d", __FUNCTION__, urb->status);
+                dbg("%s - urb shutting down with status: %d", __func__, urb->status);
                 break;
         default:
-                dbg("%s - nonzero urb status received: %d", __FUNCTION__, urb->status);
+                dbg("%s - nonzero urb status received: %d", __func__, urb->status);
         }
 }
 
diff --git a/drivers/input/keyboard/atkbd.c b/drivers/input/keyboard/atkbd.c
index b1ce10f50bcf..22016ca15351 100644
--- a/drivers/input/keyboard/atkbd.c
+++ b/drivers/input/keyboard/atkbd.c
@@ -834,10 +834,10 @@ static void atkbd_disconnect(struct serio *serio)
 }
 
 /*
- * Most special keys (Fn+F?) on Dell Latitudes do not generate release
+ * Most special keys (Fn+F?) on Dell laptops do not generate release
  * events so we have to do it ourselves.
  */
-static void atkbd_latitude_keymap_fixup(struct atkbd *atkbd)
+static void atkbd_dell_laptop_keymap_fixup(struct atkbd *atkbd)
 {
         const unsigned int forced_release_keys[] = {
                 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8f, 0x93,
@@ -1207,15 +1207,13 @@ static ssize_t atkbd_set_extra(struct atkbd *atkbd, const char *buf, size_t coun
 {
         struct input_dev *old_dev, *new_dev;
         unsigned long value;
-        char *rest;
         int err;
         unsigned char old_extra, old_set;
 
         if (!atkbd->write)
                 return -EIO;
 
-        value = simple_strtoul(buf, &rest, 10);
-        if (*rest || value > 1)
+        if (strict_strtoul(buf, 10, &value) || value > 1)
                 return -EINVAL;
 
         if (atkbd->extra != value) {
@@ -1264,12 +1262,10 @@ static ssize_t atkbd_set_scroll(struct atkbd *atkbd, const char *buf, size_t cou
 {
         struct input_dev *old_dev, *new_dev;
         unsigned long value;
-        char *rest;
         int err;
         unsigned char old_scroll;
 
-        value = simple_strtoul(buf, &rest, 10);
-        if (*rest || value > 1)
+        if (strict_strtoul(buf, 10, &value) || value > 1)
                 return -EINVAL;
 
         if (atkbd->scroll != value) {
@@ -1310,15 +1306,13 @@ static ssize_t atkbd_set_set(struct atkbd *atkbd, const char *buf, size_t count)
 {
         struct input_dev *old_dev, *new_dev;
         unsigned long value;
-        char *rest;
         int err;
         unsigned char old_set, old_extra;
 
         if (!atkbd->write)
                 return -EIO;
 
-        value = simple_strtoul(buf, &rest, 10);
-        if (*rest || (value != 2 && value != 3))
+        if (strict_strtoul(buf, 10, &value) || (value != 2 && value != 3))
                 return -EINVAL;
 
         if (atkbd->set != value) {
@@ -1361,15 +1355,13 @@ static ssize_t atkbd_set_softrepeat(struct atkbd *atkbd, const char *buf, size_t
 {
         struct input_dev *old_dev, *new_dev;
         unsigned long value;
-        char *rest;
         int err;
         unsigned char old_softrepeat, old_softraw;
 
         if (!atkbd->write)
                 return -EIO;
 
-        value = simple_strtoul(buf, &rest, 10);
-        if (*rest || value > 1)
+        if (strict_strtoul(buf, 10, &value) || value > 1)
                 return -EINVAL;
 
         if (atkbd->softrepeat != value) {
@@ -1413,12 +1405,10 @@ static ssize_t atkbd_set_softraw(struct atkbd *atkbd, const char *buf, size_t co
 {
         struct input_dev *old_dev, *new_dev;
         unsigned long value;
-        char *rest;
         int err;
         unsigned char old_softraw;
 
-        value = simple_strtoul(buf, &rest, 10);
-        if (*rest || value > 1)
+        if (strict_strtoul(buf, 10, &value) || value > 1)
                 return -EINVAL;
 
         if (atkbd->softraw != value) {
@@ -1461,13 +1451,13 @@ static int __init atkbd_setup_fixup(const struct dmi_system_id *id)
 
 static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = {
         {
-                .ident = "Dell Latitude series",
+                .ident = "Dell Laptop",
                 .matches = {
                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
-                        DMI_MATCH(DMI_PRODUCT_NAME, "Latitude"),
+                        DMI_MATCH(DMI_CHASSIS_TYPE, "8"), /* Portable */
                 },
                 .callback = atkbd_setup_fixup,
-                .driver_data = atkbd_latitude_keymap_fixup,
+                .driver_data = atkbd_dell_laptop_keymap_fixup,
         },
         {
                 .ident = "HP 2133",
diff --git a/drivers/input/keyboard/bf54x-keys.c b/drivers/input/keyboard/bf54x-keys.c
index e348cfccc17a..19284016e0f4 100644
--- a/drivers/input/keyboard/bf54x-keys.c
+++ b/drivers/input/keyboard/bf54x-keys.c
@@ -8,7 +8,7 @@
  *
  *
  * Modified:
- *               Copyright 2007 Analog Devices Inc.
+ *               Copyright 2007-2008 Analog Devices Inc.
  *
  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  *
@@ -81,6 +81,9 @@ struct bf54x_kpad {
         unsigned short *keycode;
         struct timer_list timer;
         unsigned int keyup_test_jiffies;
+        unsigned short kpad_msel;
+        unsigned short kpad_prescale;
+        unsigned short kpad_ctl;
 };
 
 static inline int bfin_kpad_find_key(struct bf54x_kpad *bf54x_kpad,
@@ -360,6 +363,10 @@ static int bfin_kpad_suspend(struct platform_device *pdev, pm_message_t state)
 {
         struct bf54x_kpad *bf54x_kpad = platform_get_drvdata(pdev);
 
+        bf54x_kpad->kpad_msel = bfin_read_KPAD_MSEL();
+        bf54x_kpad->kpad_prescale = bfin_read_KPAD_PRESCALE();
+        bf54x_kpad->kpad_ctl = bfin_read_KPAD_CTL();
+
         if (device_may_wakeup(&pdev->dev))
                 enable_irq_wake(bf54x_kpad->irq);
 
@@ -370,6 +377,10 @@ static int bfin_kpad_resume(struct platform_device *pdev)
 {
         struct bf54x_kpad *bf54x_kpad = platform_get_drvdata(pdev);
 
+        bfin_write_KPAD_MSEL(bf54x_kpad->kpad_msel);
+        bfin_write_KPAD_PRESCALE(bf54x_kpad->kpad_prescale);
+        bfin_write_KPAD_CTL(bf54x_kpad->kpad_ctl);
+
         if (device_may_wakeup(&pdev->dev))
                 disable_irq_wake(bf54x_kpad->irq);
 
diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c
index ec96b369dd7a..05f3f43582c2 100644
--- a/drivers/input/keyboard/gpio_keys.c
+++ b/drivers/input/keyboard/gpio_keys.c
@@ -36,9 +36,10 @@ struct gpio_keys_drvdata {
         struct gpio_button_data data[0];
 };
 
-static void gpio_keys_report_event(struct gpio_keys_button *button,
-                                   struct input_dev *input)
+static void gpio_keys_report_event(struct gpio_button_data *bdata)
 {
+        struct gpio_keys_button *button = bdata->button;
+        struct input_dev *input = bdata->input;
         unsigned int type = button->type ?: EV_KEY;
         int state = (gpio_get_value(button->gpio) ? 1 : 0) ^ button->active_low;
 
@@ -50,34 +51,23 @@ static void gpio_check_button(unsigned long _data)
 {
         struct gpio_button_data *data = (struct gpio_button_data *)_data;
 
-        gpio_keys_report_event(data->button, data->input);
+        gpio_keys_report_event(data);
 }
 
 static irqreturn_t gpio_keys_isr(int irq, void *dev_id)
 {
-        struct platform_device *pdev = dev_id;
-        struct gpio_keys_platform_data *pdata = pdev->dev.platform_data;
-        struct gpio_keys_drvdata *ddata = platform_get_drvdata(pdev);
-        int i;
+        struct gpio_button_data *bdata = dev_id;
+        struct gpio_keys_button *button = bdata->button;
 
-        for (i = 0; i < pdata->nbuttons; i++) {
-                struct gpio_keys_button *button = &pdata->buttons[i];
+        BUG_ON(irq != gpio_to_irq(button->gpio));
 
-                if (irq == gpio_to_irq(button->gpio)) {
-                        struct gpio_button_data *bdata = &ddata->data[i];
-
-                        if (button->debounce_interval)
-                                mod_timer(&bdata->timer,
-                                          jiffies +
-                                          msecs_to_jiffies(button->debounce_interval));
-                        else
-                                gpio_keys_report_event(button, bdata->input);
-
-                        return IRQ_HANDLED;
-                }
-        }
+        if (button->debounce_interval)
+                mod_timer(&bdata->timer,
+                        jiffies + msecs_to_jiffies(button->debounce_interval));
+        else
+                gpio_keys_report_event(bdata);
 
-        return IRQ_NONE;
+        return IRQ_HANDLED;
 }
 
 static int __devinit gpio_keys_probe(struct platform_device *pdev)
@@ -151,7 +141,7 @@ static int __devinit gpio_keys_probe(struct platform_device *pdev)
                                     IRQF_SAMPLE_RANDOM | IRQF_TRIGGER_RISING |
                                         IRQF_TRIGGER_FALLING,
                                     button->desc ? button->desc : "gpio_keys",
-                                    pdev);
+                                    bdata);
                 if (error) {
                         pr_err("gpio-keys: Unable to claim irq %d; error %d\n",
                                 irq, error);
@@ -178,7 +168,7 @@ static int __devinit gpio_keys_probe(struct platform_device *pdev)
 
  fail2:
         while (--i >= 0) {
-                free_irq(gpio_to_irq(pdata->buttons[i].gpio), pdev);
+                free_irq(gpio_to_irq(pdata->buttons[i].gpio), &ddata->data[i]);
                 if (pdata->buttons[i].debounce_interval)
                         del_timer_sync(&ddata->data[i].timer);
                 gpio_free(pdata->buttons[i].gpio);
@@ -203,7 +193,7 @@ static int __devexit gpio_keys_remove(struct platform_device *pdev)
 
         for (i = 0; i < pdata->nbuttons; i++) {
                 int irq = gpio_to_irq(pdata->buttons[i].gpio);
-                free_irq(irq, pdev);
+                free_irq(irq, &ddata->data[i]);
                 if (pdata->buttons[i].debounce_interval)
                         del_timer_sync(&ddata->data[i].timer);
                 gpio_free(pdata->buttons[i].gpio);
diff --git a/drivers/input/keyboard/omap-keypad.c b/drivers/input/keyboard/omap-keypad.c
index dcea87a0bc56..69e674ecf19a 100644
--- a/drivers/input/keyboard/omap-keypad.c
+++ b/drivers/input/keyboard/omap-keypad.c
@@ -62,7 +62,7 @@ struct omap_kp {
         unsigned int debounce;
 };
 
-DECLARE_TASKLET_DISABLED(kp_tasklet, omap_kp_tasklet, 0);
+static DECLARE_TASKLET_DISABLED(kp_tasklet, omap_kp_tasklet, 0);
 
 static int *keymap;
 static unsigned int *row_gpios;
@@ -72,12 +72,9 @@ static unsigned int *col_gpios;
 static void set_col_gpio_val(struct omap_kp *omap_kp, u8 value)
 {
         int col;
-        for (col = 0; col < omap_kp->cols; col++) {
-                if (value & (1 << col))
-                        omap_set_gpio_dataout(col_gpios[col], 1);
-                else
-                        omap_set_gpio_dataout(col_gpios[col], 0);
-        }
+
+        for (col = 0; col < omap_kp->cols; col++)
+                gpio_set_value(col_gpios[col], value & (1 << col));
 }
 
 static u8 get_row_gpio_val(struct omap_kp *omap_kp)
@@ -86,7 +83,7 @@ static u8 get_row_gpio_val(struct omap_kp *omap_kp)
         u8 value = 0;
 
         for (row = 0; row < omap_kp->rows; row++) {
-                if (omap_get_gpio_datain(row_gpios[row]))
+                if (gpio_get_value(row_gpios[row]))
                         value |= (1 << row);
         }
         return value;
@@ -333,23 +330,23 @@ static int __init omap_kp_probe(struct platform_device *pdev)
         if (cpu_is_omap24xx()) {
                 /* Cols: outputs */
                 for (col_idx = 0; col_idx < omap_kp->cols; col_idx++) {
-                        if (omap_request_gpio(col_gpios[col_idx]) < 0) {
+                        if (gpio_request(col_gpios[col_idx], "omap_kp_col") < 0) {
                                 printk(KERN_ERR "Failed to request"
                                        "GPIO%d for keypad\n",
                                        col_gpios[col_idx]);
                                 goto err1;
                         }
-                        omap_set_gpio_direction(col_gpios[col_idx], 0);
+                        gpio_direction_output(col_gpios[col_idx], 0);
                 }
                 /* Rows: inputs */
                 for (row_idx = 0; row_idx < omap_kp->rows; row_idx++) {
-                        if (omap_request_gpio(row_gpios[row_idx]) < 0) {
+                        if (gpio_request(row_gpios[row_idx], "omap_kp_row") < 0) {
                                 printk(KERN_ERR "Failed to request"
                                        "GPIO%d for keypad\n",
                                        row_gpios[row_idx]);
                                 goto err2;
                         }
-                        omap_set_gpio_direction(row_gpios[row_idx], 1);
+                        gpio_direction_input(row_gpios[row_idx]);
                 }
         } else {
                 col_idx = 0;
@@ -418,10 +415,10 @@ err3:
         device_remove_file(&pdev->dev, &dev_attr_enable);
 err2:
         for (i = row_idx - 1; i >=0; i--)
-                omap_free_gpio(row_gpios[i]);
+                gpio_free(row_gpios[i]);
 err1:
         for (i = col_idx - 1; i >=0; i--)
-                omap_free_gpio(col_gpios[i]);
+                gpio_free(col_gpios[i]);
 
         kfree(omap_kp);
         input_free_device(input_dev);
@@ -438,9 +435,9 @@ static int omap_kp_remove(struct platform_device *pdev)
         if (cpu_is_omap24xx()) {
                 int i;
                 for (i = 0; i < omap_kp->cols; i++)
-                        omap_free_gpio(col_gpios[i]);
+                        gpio_free(col_gpios[i]);
                 for (i = 0; i < omap_kp->rows; i++) {
-                        omap_free_gpio(row_gpios[i]);
+                        gpio_free(row_gpios[i]);
                         free_irq(OMAP_GPIO_IRQ(row_gpios[i]), 0);
                 }
         } else {
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index e99b7882f382..199055db5082 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@ -180,6 +180,19 @@ config INPUT_YEALINK
           To compile this driver as a module, choose M here: the module will be
           called yealink.
 
+config INPUT_CM109
+        tristate "C-Media CM109 USB I/O Controller"
+        depends on EXPERIMENTAL
+        depends on USB_ARCH_HAS_HCD
+        select USB
+        help
+          Say Y here if you want to enable keyboard and buzzer functions of the
+          C-Media CM109 usb phones. The audio part is enabled by the generic
+          usb sound driver, so you might want to enable that as well.
+
+          To compile this driver as a module, choose M here: the module will be
+          called cm109.
+
 config INPUT_UINPUT
         tristate "User level driver support"
         help
diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
index f48009b52226..d7db2aeb8a98 100644
--- a/drivers/input/misc/Makefile
+++ b/drivers/input/misc/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_INPUT_ATI_REMOTE2)		+= ati_remote2.o
 obj-$(CONFIG_INPUT_KEYSPAN_REMOTE)      += keyspan_remote.o
 obj-$(CONFIG_INPUT_POWERMATE)           += powermate.o
 obj-$(CONFIG_INPUT_YEALINK)             += yealink.o
+obj-$(CONFIG_INPUT_CM109)               += cm109.o
 obj-$(CONFIG_HP_SDC_RTC)                += hp_sdc_rtc.o
 obj-$(CONFIG_INPUT_UINPUT)              += uinput.o
 obj-$(CONFIG_INPUT_APANEL)              += apanel.o
diff --git a/drivers/input/misc/ati_remote2.c b/drivers/input/misc/ati_remote2.c
index a7fabafbd94c..3c9988dc0e9f 100644
--- a/drivers/input/misc/ati_remote2.c
+++ b/drivers/input/misc/ati_remote2.c
@@ -1,8 +1,8 @@
 /*
  * ati_remote2 - ATI/Philips USB RF remote driver
  *
- * Copyright (C) 2005 Ville Syrjala <syrjala@sci.fi>
- * Copyright (C) 2007 Peter Stokes <linux@dadeos.freeserve.co.uk>
+ * Copyright (C) 2005-2008 Ville Syrjala <syrjala@sci.fi>
+ * Copyright (C) 2007-2008 Peter Stokes <linux@dadeos.co.uk>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2
@@ -12,7 +12,7 @@
 #include <linux/usb/input.h>
 
 #define DRIVER_DESC    "ATI/Philips USB RF remote driver"
-#define DRIVER_VERSION "0.2"
+#define DRIVER_VERSION "0.3"
 
 MODULE_DESCRIPTION(DRIVER_DESC);
 MODULE_VERSION(DRIVER_VERSION);
@@ -27,7 +27,7 @@ MODULE_LICENSE("GPL");
  * A remote's "channel" may be altered by pressing and holding the "PC" button for
  * approximately 3 seconds, after which the button will slowly flash the count of the
  * currently configured "channel", using the numeric keypad enter a number between 1 and
- * 16 and then the "PC" button again, the button will slowly flash the count of the
+ * 16 and then press the "PC" button again, the button will slowly flash the count of the
  * newly configured "channel".
  */
 
@@ -45,9 +45,25 @@ static struct usb_device_id ati_remote2_id_table[] = {
 };
 MODULE_DEVICE_TABLE(usb, ati_remote2_id_table);
 
-static struct {
-        int hw_code;
-        int key_code;
+static DEFINE_MUTEX(ati_remote2_mutex);
+
+enum {
+        ATI_REMOTE2_OPENED = 0x1,
+        ATI_REMOTE2_SUSPENDED = 0x2,
+};
+
+enum {
+        ATI_REMOTE2_AUX1,
+        ATI_REMOTE2_AUX2,
+        ATI_REMOTE2_AUX3,
+        ATI_REMOTE2_AUX4,
+        ATI_REMOTE2_PC,
+        ATI_REMOTE2_MODES,
+};
+
+static const struct {
+        u8  hw_code;
+        u16 keycode;
 } ati_remote2_key_table[] = {
         { 0x00, KEY_0 },
         { 0x01, KEY_1 },
@@ -73,6 +89,7 @@ static struct {
         { 0x37, KEY_RECORD },
         { 0x38, KEY_DVD },
         { 0x39, KEY_TV },
+        { 0x3f, KEY_PROG1 }, /* AUX1-AUX4 and PC */
         { 0x54, KEY_MENU },
         { 0x58, KEY_UP },
         { 0x59, KEY_DOWN },
@@ -91,15 +108,9 @@ static struct {
         { 0xa9, BTN_LEFT },
         { 0xaa, BTN_RIGHT },
         { 0xbe, KEY_QUESTION },
-        { 0xd5, KEY_FRONT },
         { 0xd0, KEY_EDIT },
+        { 0xd5, KEY_FRONT },
         { 0xf9, KEY_INFO },
-        { (0x00 << 8) | 0x3f, KEY_PROG1 },
-        { (0x01 << 8) | 0x3f, KEY_PROG2 },
-        { (0x02 << 8) | 0x3f, KEY_PROG3 },
-        { (0x03 << 8) | 0x3f, KEY_PROG4 },
-        { (0x04 << 8) | 0x3f, KEY_PC },
-        { 0, KEY_RESERVED }
 };
 
 struct ati_remote2 {
@@ -117,46 +128,106 @@ struct ati_remote2 {
 
         char name[64];
         char phys[64];
+
+        /* Each mode (AUX1-AUX4 and PC) can have an independent keymap. */
+        u16 keycode[ATI_REMOTE2_MODES][ARRAY_SIZE(ati_remote2_key_table)];
+
+        unsigned int flags;
 };
 
 static int ati_remote2_probe(struct usb_interface *interface, const struct usb_device_id *id);
 static void ati_remote2_disconnect(struct usb_interface *interface);
+static int ati_remote2_suspend(struct usb_interface *interface, pm_message_t message);
+static int ati_remote2_resume(struct usb_interface *interface);
 
 static struct usb_driver ati_remote2_driver = {
         .name       = "ati_remote2",
         .probe      = ati_remote2_probe,
         .disconnect = ati_remote2_disconnect,
         .id_table   = ati_remote2_id_table,
+        .suspend    = ati_remote2_suspend,
+        .resume     = ati_remote2_resume,
+        .supports_autosuspend = 1,
 };
 
-static int ati_remote2_open(struct input_dev *idev)
+static int ati_remote2_submit_urbs(struct ati_remote2 *ar2)
 {
-        struct ati_remote2 *ar2 = input_get_drvdata(idev);
         int r;
 
         r = usb_submit_urb(ar2->urb[0], GFP_KERNEL);
         if (r) {
                 dev_err(&ar2->intf[0]->dev,
-                        "%s: usb_submit_urb() = %d\n", __func__, r);
+                        "%s(): usb_submit_urb() = %d\n", __func__, r);
                 return r;
         }
         r = usb_submit_urb(ar2->urb[1], GFP_KERNEL);
         if (r) {
                 usb_kill_urb(ar2->urb[0]);
                 dev_err(&ar2->intf[1]->dev,
-                        "%s: usb_submit_urb() = %d\n", __func__, r);
+                        "%s(): usb_submit_urb() = %d\n", __func__, r);
                 return r;
         }
 
         return 0;
 }
 
+static void ati_remote2_kill_urbs(struct ati_remote2 *ar2)
+{
+        usb_kill_urb(ar2->urb[1]);
+        usb_kill_urb(ar2->urb[0]);
+}
+
+static int ati_remote2_open(struct input_dev *idev)
+{
+        struct ati_remote2 *ar2 = input_get_drvdata(idev);
+        int r;
+
+        dev_dbg(&ar2->intf[0]->dev, "%s()\n", __func__);
+
+        r = usb_autopm_get_interface(ar2->intf[0]);
+        if (r) {
+                dev_err(&ar2->intf[0]->dev,
+                        "%s(): usb_autopm_get_interface() = %d\n", __func__, r);
+                goto fail1;
+        }
+
+        mutex_lock(&ati_remote2_mutex);
+
+        if (!(ar2->flags & ATI_REMOTE2_SUSPENDED)) {
+                r = ati_remote2_submit_urbs(ar2);
+                if (r)
+                        goto fail2;
+        }
+
+        ar2->flags |= ATI_REMOTE2_OPENED;
+
+        mutex_unlock(&ati_remote2_mutex);
+
+        usb_autopm_put_interface(ar2->intf[0]);
+
+        return 0;
+
+ fail2:
+        mutex_unlock(&ati_remote2_mutex);
+        usb_autopm_put_interface(ar2->intf[0]);
+ fail1:
+        return r;
+}
+
 static void ati_remote2_close(struct input_dev *idev)
 {
         struct ati_remote2 *ar2 = input_get_drvdata(idev);
 
-        usb_kill_urb(ar2->urb[0]);
-        usb_kill_urb(ar2->urb[1]);
+        dev_dbg(&ar2->intf[0]->dev, "%s()\n", __func__);
+
+        mutex_lock(&ati_remote2_mutex);
+
+        if (!(ar2->flags & ATI_REMOTE2_SUSPENDED))
+                ati_remote2_kill_urbs(ar2);
+
+        ar2->flags &= ~ATI_REMOTE2_OPENED;
+
+        mutex_unlock(&ati_remote2_mutex);
 }
 
 static void ati_remote2_input_mouse(struct ati_remote2 *ar2)
@@ -172,7 +243,7 @@ static void ati_remote2_input_mouse(struct ati_remote2 *ar2)
 
         mode = data[0] & 0x0F;
 
-        if (mode > 4) {
+        if (mode > ATI_REMOTE2_PC) {
                 dev_err(&ar2->intf[0]->dev,
                         "Unknown mode byte (%02x %02x %02x %02x)\n",
                         data[3], data[2], data[1], data[0]);
@@ -191,7 +262,7 @@ static int ati_remote2_lookup(unsigned int hw_code)
 {
         int i;
 
-        for (i = 0; ati_remote2_key_table[i].key_code != KEY_RESERVED; i++)
+        for (i = 0; i < ARRAY_SIZE(ati_remote2_key_table); i++)
                 if (ati_remote2_key_table[i].hw_code == hw_code)
                         return i;
 
@@ -211,7 +282,7 @@ static void ati_remote2_input_key(struct ati_remote2 *ar2)
 
         mode = data[0] & 0x0F;
 
-        if (mode > 4) {
+        if (mode > ATI_REMOTE2_PC) {
                 dev_err(&ar2->intf[1]->dev,
                         "Unknown mode byte (%02x %02x %02x %02x)\n",
                         data[3], data[2], data[1], data[0]);
@@ -219,10 +290,6 @@ static void ati_remote2_input_key(struct ati_remote2 *ar2)
         }
 
         hw_code = data[2];
-        /*
-         * Mode keys (AUX1-AUX4, PC) all generate the same code byte.
-         * Use the mode byte to figure out which one was pressed.
-         */
         if (hw_code == 0x3f) {
                 /*
                  * For some incomprehensible reason the mouse pad generates
@@ -236,8 +303,6 @@ static void ati_remote2_input_key(struct ati_remote2 *ar2)
 
                 if (data[1] == 0)
                         ar2->mode = mode;
-
-                hw_code |= mode << 8;
         }
 
         if (!((1 << mode) & mode_mask))
@@ -260,8 +325,8 @@ static void ati_remote2_input_key(struct ati_remote2 *ar2)
         case 2: /* repeat */
 
                 /* No repeat for mouse buttons. */
-                if (ati_remote2_key_table[index].key_code == BTN_LEFT ||
-                    ati_remote2_key_table[index].key_code == BTN_RIGHT)
+                if (ar2->keycode[mode][index] == BTN_LEFT ||
+                    ar2->keycode[mode][index] == BTN_RIGHT)
                         return;
 
                 if (!time_after_eq(jiffies, ar2->jiffies))
@@ -276,7 +341,7 @@ static void ati_remote2_input_key(struct ati_remote2 *ar2)
                 return;
         }
 
-        input_event(idev, EV_KEY, ati_remote2_key_table[index].key_code, data[1]);
+        input_event(idev, EV_KEY, ar2->keycode[mode][index], data[1]);
         input_sync(idev);
 }
 
@@ -287,6 +352,7 @@ static void ati_remote2_complete_mouse(struct urb *urb)
 
         switch (urb->status) {
         case 0:
+                usb_mark_last_busy(ar2->udev);
                 ati_remote2_input_mouse(ar2);
                 break;
         case -ENOENT:
@@ -297,6 +363,7 @@ static void ati_remote2_complete_mouse(struct urb *urb)
                         "%s(): urb status = %d\n", __func__, urb->status);
                 return;
         default:
+                usb_mark_last_busy(ar2->udev);
                 dev_err(&ar2->intf[0]->dev,
                         "%s(): urb status = %d\n", __func__, urb->status);
         }
@@ -314,6 +381,7 @@ static void ati_remote2_complete_key(struct urb *urb)
 
         switch (urb->status) {
         case 0:
+                usb_mark_last_busy(ar2->udev);
                 ati_remote2_input_key(ar2);
                 break;
         case -ENOENT:
@@ -324,6 +392,7 @@ static void ati_remote2_complete_key(struct urb *urb)
                         "%s(): urb status = %d\n", __func__, urb->status);
                 return;
         default:
+                usb_mark_last_busy(ar2->udev);
                 dev_err(&ar2->intf[1]->dev,
                         "%s(): urb status = %d\n", __func__, urb->status);
         }
@@ -334,10 +403,60 @@ static void ati_remote2_complete_key(struct urb *urb)
                         "%s(): usb_submit_urb() = %d\n", __func__, r);
 }
 
+static int ati_remote2_getkeycode(struct input_dev *idev,
+                                  int scancode, int *keycode)
+{
+        struct ati_remote2 *ar2 = input_get_drvdata(idev);
+        int index, mode;
+
+        mode = scancode >> 8;
+        if (mode > ATI_REMOTE2_PC || !((1 << mode) & mode_mask))
+                return -EINVAL;
+
+        index = ati_remote2_lookup(scancode & 0xFF);
+        if (index < 0)
+                return -EINVAL;
+
+        *keycode = ar2->keycode[mode][index];
+        return 0;
+}
+
+static int ati_remote2_setkeycode(struct input_dev *idev, int scancode, int keycode)
+{
+        struct ati_remote2 *ar2 = input_get_drvdata(idev);
+        int index, mode, old_keycode;
+
+        mode = scancode >> 8;
+        if (mode > ATI_REMOTE2_PC || !((1 << mode) & mode_mask))
+                return -EINVAL;
+
+        index = ati_remote2_lookup(scancode & 0xFF);
+        if (index < 0)
+                return -EINVAL;
+
+        if (keycode < KEY_RESERVED || keycode > KEY_MAX)
+                return -EINVAL;
+
+        old_keycode = ar2->keycode[mode][index];
+        ar2->keycode[mode][index] = keycode;
+        set_bit(keycode, idev->keybit);
+
+        for (mode = 0; mode < ATI_REMOTE2_MODES; mode++) {
+                for (index = 0; index < ARRAY_SIZE(ati_remote2_key_table); index++) {
+                        if (ar2->keycode[mode][index] == old_keycode)
+                                return 0;
+                }
+        }
+
+        clear_bit(old_keycode, idev->keybit);
+
+        return 0;
+}
+
 static int ati_remote2_input_init(struct ati_remote2 *ar2)
 {
         struct input_dev *idev;
-        int i, retval;
+        int index, mode, retval;
 
         idev = input_allocate_device();
         if (!idev)
@@ -350,8 +469,26 @@ static int ati_remote2_input_init(struct ati_remote2 *ar2)
         idev->keybit[BIT_WORD(BTN_MOUSE)] = BIT_MASK(BTN_LEFT) |
                 BIT_MASK(BTN_RIGHT);
         idev->relbit[0] = BIT_MASK(REL_X) | BIT_MASK(REL_Y);
-        for (i = 0; ati_remote2_key_table[i].key_code != KEY_RESERVED; i++)
-                set_bit(ati_remote2_key_table[i].key_code, idev->keybit);
+
+        for (mode = 0; mode < ATI_REMOTE2_MODES; mode++) {
+                for (index = 0; index < ARRAY_SIZE(ati_remote2_key_table); index++) {
+                        ar2->keycode[mode][index] = ati_remote2_key_table[index].keycode;
+                        set_bit(ar2->keycode[mode][index], idev->keybit);
+                }
+        }
+
+        /* AUX1-AUX4 and PC generate the same scancode. */
+        index = ati_remote2_lookup(0x3f);
+        ar2->keycode[ATI_REMOTE2_AUX1][index] = KEY_PROG1;
+        ar2->keycode[ATI_REMOTE2_AUX2][index] = KEY_PROG2;
+        ar2->keycode[ATI_REMOTE2_AUX3][index] = KEY_PROG3;
+        ar2->keycode[ATI_REMOTE2_AUX4][index] = KEY_PROG4;
+        ar2->keycode[ATI_REMOTE2_PC][index] = KEY_PC;
+        set_bit(KEY_PROG1, idev->keybit);
+        set_bit(KEY_PROG2, idev->keybit);
+        set_bit(KEY_PROG3, idev->keybit);
+        set_bit(KEY_PROG4, idev->keybit);
+        set_bit(KEY_PC, idev->keybit);
 
         idev->rep[REP_DELAY]  = 250;
         idev->rep[REP_PERIOD] = 33;
@@ -359,6 +496,9 @@ static int ati_remote2_input_init(struct ati_remote2 *ar2)
         idev->open = ati_remote2_open;
         idev->close = ati_remote2_close;
 
+        idev->getkeycode = ati_remote2_getkeycode;
+        idev->setkeycode = ati_remote2_setkeycode;
+
         idev->name = ar2->name;
         idev->phys = ar2->phys;
 
@@ -490,6 +630,8 @@ static int ati_remote2_probe(struct usb_interface *interface, const struct usb_d
 
         usb_set_intfdata(interface, ar2);
 
+        interface->needs_remote_wakeup = 1;
+
         return 0;
 
  fail2:
@@ -522,6 +664,57 @@ static void ati_remote2_disconnect(struct usb_interface *interface)
         kfree(ar2);
 }
 
+static int ati_remote2_suspend(struct usb_interface *interface,
+                               pm_message_t message)
+{
+        struct ati_remote2 *ar2;
+        struct usb_host_interface *alt = interface->cur_altsetting;
+
+        if (alt->desc.bInterfaceNumber)
+                return 0;
+
+        ar2 = usb_get_intfdata(interface);
+
+        dev_dbg(&ar2->intf[0]->dev, "%s()\n", __func__);
+
+        mutex_lock(&ati_remote2_mutex);
+
+        if (ar2->flags & ATI_REMOTE2_OPENED)
+                ati_remote2_kill_urbs(ar2);
+
+        ar2->flags |= ATI_REMOTE2_SUSPENDED;
+
+        mutex_unlock(&ati_remote2_mutex);
+
+        return 0;
+}
+
+static int ati_remote2_resume(struct usb_interface *interface)
+{
+        struct ati_remote2 *ar2;
+        struct usb_host_interface *alt = interface->cur_altsetting;
+        int r = 0;
+
+        if (alt->desc.bInterfaceNumber)
+                return 0;
+
+        ar2 = usb_get_intfdata(interface);
+
+        dev_dbg(&ar2->intf[0]->dev, "%s()\n", __func__);
+
+        mutex_lock(&ati_remote2_mutex);
+
+        if (ar2->flags & ATI_REMOTE2_OPENED)
+                r = ati_remote2_submit_urbs(ar2);
+
+        if (!r)
+                ar2->flags &= ~ATI_REMOTE2_SUSPENDED;
+
+        mutex_unlock(&ati_remote2_mutex);
+
+        return r;
+}
+
 static int __init ati_remote2_init(void)
 {
         int r;
diff --git a/drivers/input/misc/cm109.c b/drivers/input/misc/cm109.c
new file mode 100644
index 000000000000..bce160f4349b
--- /dev/null
+++ b/drivers/input/misc/cm109.c
@@ -0,0 +1,882 @@
+/*
+ * Driver for the VoIP USB phones with CM109 chipsets.
+ *
+ * Copyright (C) 2007 - 2008 Alfred E. Heggestad <aeh@db.org>
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License as
+ *      published by the Free Software Foundation, version 2.
+ */
+
+/*
+ *   Tested devices:
+ *      - Komunikate KIP1000
+ *      - Genius G-talk
+ *      - Allied-Telesis Corega USBPH01
+ *      - ...
+ *
+ * This driver is based on the yealink.c driver
+ *
+ * Thanks to:
+ *   - Authors of yealink.c
+ *   - Thomas Reitmayr
+ *   - Oliver Neukum for good review comments and code
+ *   - Shaun Jackman <sjackman@gmail.com> for Genius G-talk keymap
+ *   - Dmitry Torokhov for valuable input and review
+ *
+ * Todo:
+ *   - Read/write EEPROM
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/rwsem.h>
+#include <linux/usb/input.h>
+
+#define DRIVER_VERSION "20080805"
+#define DRIVER_AUTHOR  "Alfred E. Heggestad"
+#define DRIVER_DESC    "CM109 phone driver"
+
+static char *phone = "kip1000";
+module_param(phone, charp, S_IRUSR);
+MODULE_PARM_DESC(phone, "Phone name {kip1000, gtalk, usbph01}");
+
+enum {
+        /* HID Registers */
+        HID_IR0 = 0x00, /* Record/Playback-mute button, Volume up/down  */
+        HID_IR1 = 0x01, /* GPI, generic registers or EEPROM_DATA0       */
+        HID_IR2 = 0x02, /* Generic registers or EEPROM_DATA1            */
+        HID_IR3 = 0x03, /* Generic registers or EEPROM_CTRL             */
+        HID_OR0 = 0x00, /* Mapping control, buzzer, SPDIF (offset 0x04) */
+        HID_OR1 = 0x01, /* GPO - General Purpose Output                 */
+        HID_OR2 = 0x02, /* Set GPIO to input/output mode                */
+        HID_OR3 = 0x03, /* SPDIF status channel or EEPROM_CTRL          */
+
+        /* HID_IR0 */
+        RECORD_MUTE   = 1 << 3,
+        PLAYBACK_MUTE = 1 << 2,
+        VOLUME_DOWN   = 1 << 1,
+        VOLUME_UP     = 1 << 0,
+
+        /* HID_OR0 */
+        /* bits 7-6
+           0: HID_OR1-2 are used for GPO; HID_OR0, 3 are used for buzzer
+              and SPDIF
+           1: HID_OR0-3 are used as generic HID registers
+           2: Values written to HID_OR0-3 are also mapped to MCU_CTRL,
+              EEPROM_DATA0-1, EEPROM_CTRL (see Note)
+           3: Reserved
+         */
+        HID_OR_GPO_BUZ_SPDIF   = 0 << 6,
+        HID_OR_GENERIC_HID_REG = 1 << 6,
+        HID_OR_MAP_MCU_EEPROM  = 2 << 6,
+
+        BUZZER_ON = 1 << 5,
+
+        /* up to 256 normal keys, up to 16 special keys */
+        KEYMAP_SIZE = 256 + 16,
+};
+
+/* CM109 protocol packet */
+struct cm109_ctl_packet {
+        u8 byte[4];
+} __attribute__ ((packed));
+
+enum { USB_PKT_LEN = sizeof(struct cm109_ctl_packet) };
+
+/* CM109 device structure */
+struct cm109_dev {
+        struct input_dev *idev;  /* input device */
+        struct usb_device *udev; /* usb device */
+        struct usb_interface *intf;
+
+        /* irq input channel */
+        struct cm109_ctl_packet *irq_data;
+        dma_addr_t irq_dma;
+        struct urb *urb_irq;
+
+        /* control output channel */
+        struct cm109_ctl_packet *ctl_data;
+        dma_addr_t ctl_dma;
+        struct usb_ctrlrequest *ctl_req;
+        dma_addr_t ctl_req_dma;
+        struct urb *urb_ctl;
+        /*
+         * The 3 bitfields below are protected by ctl_submit_lock.
+         * They have to be separate since they are accessed from IRQ
+         * context.
+         */
+        unsigned irq_urb_pending:1;     /* irq_urb is in flight */
+        unsigned ctl_urb_pending:1;     /* ctl_urb is in flight */
+        unsigned buzzer_pending:1;      /* need to issue buzz command */
+        spinlock_t ctl_submit_lock;
+
+        unsigned char buzzer_state;     /* on/off */
+
+        /* flags */
+        unsigned open:1;
+        unsigned resetting:1;
+        unsigned shutdown:1;
+
+        /* This mutex protects writes to the above flags */
+        struct mutex pm_mutex;
+
+        unsigned short keymap[KEYMAP_SIZE];
+
+        char phys[64];          /* physical device path */
+        int key_code;           /* last reported key */
+        int keybit;             /* 0=new scan  1,2,4,8=scan columns  */
+        u8 gpi;                 /* Cached value of GPI (high nibble) */
+};
+
+/******************************************************************************
+ * CM109 key interface
+ *****************************************************************************/
+
+static unsigned short special_keymap(int code)
+{
+        if (code > 0xff) {
+                switch (code - 0xff) {
+                case RECORD_MUTE:       return KEY_MUTE;
+                case PLAYBACK_MUTE:     return KEY_MUTE;
+                case VOLUME_DOWN:       return KEY_VOLUMEDOWN;
+                case VOLUME_UP:         return KEY_VOLUMEUP;
+                }
+        }
+        return KEY_RESERVED;
+}
+
+/* Map device buttons to internal key events.
+ *
+ * The "up" and "down" keys, are symbolised by arrows on the button.
+ * The "pickup" and "hangup" keys are symbolised by a green and red phone
+ * on the button.
+
+ Komunikate KIP1000 Keyboard Matrix
+
+     -> -- 1 -- 2 -- 3  --> GPI pin 4 (0x10)
+      |    |    |    |
+     <- -- 4 -- 5 -- 6  --> GPI pin 5 (0x20)
+      |    |    |    |
+     END - 7 -- 8 -- 9  --> GPI pin 6 (0x40)
+      |    |    |    |
+     OK -- * -- 0 -- #  --> GPI pin 7 (0x80)
+      |    |    |    |
+
+     /|\  /|\  /|\  /|\
+      |    |    |    |
+GPO
+pin:  3    2    1    0
+     0x8  0x4  0x2  0x1
+
+ */
+static unsigned short keymap_kip1000(int scancode)
+{
+        switch (scancode) {                             /* phone key:   */
+        case 0x82: return KEY_NUMERIC_0;                /*   0          */
+        case 0x14: return KEY_NUMERIC_1;                /*   1          */
+        case 0x12: return KEY_NUMERIC_2;                /*   2          */
+        case 0x11: return KEY_NUMERIC_3;                /*   3          */
+        case 0x24: return KEY_NUMERIC_4;                /*   4          */
+        case 0x22: return KEY_NUMERIC_5;                /*   5          */
+        case 0x21: return KEY_NUMERIC_6;                /*   6          */
+        case 0x44: return KEY_NUMERIC_7;                /*   7          */
+        case 0x42: return KEY_NUMERIC_8;                /*   8          */
+        case 0x41: return KEY_NUMERIC_9;                /*   9          */
+        case 0x81: return KEY_NUMERIC_POUND;            /*   #          */
+        case 0x84: return KEY_NUMERIC_STAR;             /*   *          */
+        case 0x88: return KEY_ENTER;                    /*   pickup     */
+        case 0x48: return KEY_ESC;                      /*   hangup     */
+        case 0x28: return KEY_LEFT;                     /*   IN         */
+        case 0x18: return KEY_RIGHT;                    /*   OUT        */
+        default:   return special_keymap(scancode);
+        }
+}
+
+/*
+  Contributed by Shaun Jackman <sjackman@gmail.com>
+
+  Genius G-Talk keyboard matrix
+     0 1 2 3
+  4: 0 4 8 Talk
+  5: 1 5 9 End
+  6: 2 6 # Up
+  7: 3 7 * Down
+*/
+static unsigned short keymap_gtalk(int scancode)
+{
+        switch (scancode) {
+        case 0x11: return KEY_NUMERIC_0;
+        case 0x21: return KEY_NUMERIC_1;
+        case 0x41: return KEY_NUMERIC_2;
+        case 0x81: return KEY_NUMERIC_3;
+        case 0x12: return KEY_NUMERIC_4;
+        case 0x22: return KEY_NUMERIC_5;
+        case 0x42: return KEY_NUMERIC_6;
+        case 0x82: return KEY_NUMERIC_7;
+        case 0x14: return KEY_NUMERIC_8;
+        case 0x24: return KEY_NUMERIC_9;
+        case 0x44: return KEY_NUMERIC_POUND;    /* # */
+        case 0x84: return KEY_NUMERIC_STAR;     /* * */
+        case 0x18: return KEY_ENTER;            /* Talk (green handset) */
+        case 0x28: return KEY_ESC;              /* End (red handset) */
+        case 0x48: return KEY_UP;               /* Menu up (rocker switch) */
+        case 0x88: return KEY_DOWN;             /* Menu down (rocker switch) */
+        default:   return special_keymap(scancode);
+        }
+}
+
+/*
+ * Keymap for Allied-Telesis Corega USBPH01
+ * http://www.alliedtelesis-corega.com/2/1344/1437/1360/chprd.html
+ *
+ * Contributed by july@nat.bg
+ */
+static unsigned short keymap_usbph01(int scancode)
+{
+        switch (scancode) {
+        case 0x11: return KEY_NUMERIC_0;                /*   0          */
+        case 0x21: return KEY_NUMERIC_1;                /*   1          */
+        case 0x41: return KEY_NUMERIC_2;                /*   2          */
+        case 0x81: return KEY_NUMERIC_3;                /*   3          */
+        case 0x12: return KEY_NUMERIC_4;                /*   4          */
+        case 0x22: return KEY_NUMERIC_5;                /*   5          */
+        case 0x42: return KEY_NUMERIC_6;                /*   6          */
+        case 0x82: return KEY_NUMERIC_7;                /*   7          */
+        case 0x14: return KEY_NUMERIC_8;                /*   8          */
+        case 0x24: return KEY_NUMERIC_9;                /*   9          */
+        case 0x44: return KEY_NUMERIC_POUND;            /*   #          */
+        case 0x84: return KEY_NUMERIC_STAR;             /*   *          */
+        case 0x18: return KEY_ENTER;                    /*   pickup     */
+        case 0x28: return KEY_ESC;                      /*   hangup     */
+        case 0x48: return KEY_LEFT;                     /*   IN         */
+        case 0x88: return KEY_RIGHT;                    /*   OUT        */
+        default:   return special_keymap(scancode);
+        }
+}
+
+static unsigned short (*keymap)(int) = keymap_kip1000;
+
+/*
+ * Completes a request by converting the data into events for the
+ * input subsystem.
+ */
+static void report_key(struct cm109_dev *dev, int key)
+{
+        struct input_dev *idev = dev->idev;
+
+        if (dev->key_code >= 0) {
+                /* old key up */
+                input_report_key(idev, dev->key_code, 0);
+        }
+
+        dev->key_code = key;
+        if (key >= 0) {
+                /* new valid key */
+                input_report_key(idev, key, 1);
+        }
+
+        input_sync(idev);
+}
+
+/******************************************************************************
+ * CM109 usb communication interface
+ *****************************************************************************/
+
+static void cm109_submit_buzz_toggle(struct cm109_dev *dev)
+{
+        int error;
+
+        if (dev->buzzer_state)
+                dev->ctl_data->byte[HID_OR0] |= BUZZER_ON;
+        else
+                dev->ctl_data->byte[HID_OR0] &= ~BUZZER_ON;
+
+        error = usb_submit_urb(dev->urb_ctl, GFP_ATOMIC);
+        if (error)
+                err("%s: usb_submit_urb (urb_ctl) failed %d", __func__, error);
+}
+
+/*
+ * IRQ handler
+ */
+static void cm109_urb_irq_callback(struct urb *urb)
+{
+        struct cm109_dev *dev = urb->context;
+        const int status = urb->status;
+        int error;
+
+        dev_dbg(&urb->dev->dev, "### URB IRQ: [0x%02x 0x%02x 0x%02x 0x%02x] keybit=0x%02x\n",
+             dev->irq_data->byte[0],
+             dev->irq_data->byte[1],
+             dev->irq_data->byte[2],
+             dev->irq_data->byte[3],
+             dev->keybit);
+
+        if (status) {
+                if (status == -ESHUTDOWN)
+                        return;
+                err("%s: urb status %d", __func__, status);
+        }
+
+        /* Special keys */
+        if (dev->irq_data->byte[HID_IR0] & 0x0f) {
+                const int code = (dev->irq_data->byte[HID_IR0] & 0x0f);
+                report_key(dev, dev->keymap[0xff + code]);
+        }
+
+        /* Scan key column */
+        if (dev->keybit == 0xf) {
+
+                /* Any changes ? */
+                if ((dev->gpi & 0xf0) == (dev->irq_data->byte[HID_IR1] & 0xf0))
+                        goto out;
+
+                dev->gpi = dev->irq_data->byte[HID_IR1] & 0xf0;
+                dev->keybit = 0x1;
+        } else {
+                report_key(dev, dev->keymap[dev->irq_data->byte[HID_IR1]]);
+
+                dev->keybit <<= 1;
+                if (dev->keybit > 0x8)
+                        dev->keybit = 0xf;
+        }
+
+ out:
+
+        spin_lock(&dev->ctl_submit_lock);
+
+        dev->irq_urb_pending = 0;
+
+        if (likely(!dev->shutdown)) {
+
+                if (dev->buzzer_state)
+                        dev->ctl_data->byte[HID_OR0] |= BUZZER_ON;
+                else
+                        dev->ctl_data->byte[HID_OR0] &= ~BUZZER_ON;
+
+                dev->ctl_data->byte[HID_OR1] = dev->keybit;
+                dev->ctl_data->byte[HID_OR2] = dev->keybit;
+
+                dev->buzzer_pending = 0;
+                dev->ctl_urb_pending = 1;
+
+                error = usb_submit_urb(dev->urb_ctl, GFP_ATOMIC);
+                if (error)
+                        err("%s: usb_submit_urb (urb_ctl) failed %d",
+                                __func__, error);
+        }
+
+        spin_unlock(&dev->ctl_submit_lock);
+}
+
+static void cm109_urb_ctl_callback(struct urb *urb)
+{
+        struct cm109_dev *dev = urb->context;
+        const int status = urb->status;
+        int error;
+
+        dev_dbg(&urb->dev->dev, "### URB CTL: [0x%02x 0x%02x 0x%02x 0x%02x]\n",
+             dev->ctl_data->byte[0],
+             dev->ctl_data->byte[1],
+             dev->ctl_data->byte[2],
+             dev->ctl_data->byte[3]);
+
+        if (status)
+                err("%s: urb status %d", __func__, status);
+
+        spin_lock(&dev->ctl_submit_lock);
+
+        dev->ctl_urb_pending = 0;
+
+        if (likely(!dev->shutdown)) {
+
+                if (dev->buzzer_pending) {
+                        dev->buzzer_pending = 0;
+                        dev->ctl_urb_pending = 1;
+                        cm109_submit_buzz_toggle(dev);
+                } else if (likely(!dev->irq_urb_pending)) {
+                        /* ask for key data */
+                        dev->irq_urb_pending = 1;
+                        error = usb_submit_urb(dev->urb_irq, GFP_ATOMIC);
+                        if (error)
+                                err("%s: usb_submit_urb (urb_irq) failed %d",
+                                        __func__, error);
+                }
+        }
+
+        spin_unlock(&dev->ctl_submit_lock);
+}
+
+static void cm109_toggle_buzzer_async(struct cm109_dev *dev)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&dev->ctl_submit_lock, flags);
+
+        if (dev->ctl_urb_pending) {
+                /* URB completion will resubmit */
+                dev->buzzer_pending = 1;
+        } else {
+                dev->ctl_urb_pending = 1;
+                cm109_submit_buzz_toggle(dev);
+        }
+
+        spin_unlock_irqrestore(&dev->ctl_submit_lock, flags);
+}
+
+static void cm109_toggle_buzzer_sync(struct cm109_dev *dev, int on)
+{
+        int error;
+
+        if (on)
+                dev->ctl_data->byte[HID_OR0] |= BUZZER_ON;
+        else
+                dev->ctl_data->byte[HID_OR0] &= ~BUZZER_ON;
+
+        error = usb_control_msg(dev->udev,
+                                usb_sndctrlpipe(dev->udev, 0),
+                                dev->ctl_req->bRequest,
+                                dev->ctl_req->bRequestType,
+                                le16_to_cpu(dev->ctl_req->wValue),
+                                le16_to_cpu(dev->ctl_req->wIndex),
+                                dev->ctl_data,
+                                USB_PKT_LEN, USB_CTRL_SET_TIMEOUT);
+        if (error && error != EINTR)
+                err("%s: usb_control_msg() failed %d", __func__, error);
+}
+
+static void cm109_stop_traffic(struct cm109_dev *dev)
+{
+        dev->shutdown = 1;
+        /*
+         * Make sure other CPUs see this
+         */
+        smp_wmb();
+
+        usb_kill_urb(dev->urb_ctl);
+        usb_kill_urb(dev->urb_irq);
+
+        cm109_toggle_buzzer_sync(dev, 0);
+
+        dev->shutdown = 0;
+        smp_wmb();
+}
+
+static void cm109_restore_state(struct cm109_dev *dev)
+{
+        if (dev->open) {
+                /*
+                 * Restore buzzer state.
+                 * This will also kick regular URB submission
+                 */
+                cm109_toggle_buzzer_async(dev);
+        }
+}
+
+/******************************************************************************
+ * input event interface
+ *****************************************************************************/
+
+static int cm109_input_open(struct input_dev *idev)
+{
+        struct cm109_dev *dev = input_get_drvdata(idev);
+        int error;
+
+        error = usb_autopm_get_interface(dev->intf);
+        if (error < 0) {
+                err("%s - cannot autoresume, result %d",
+                    __func__, error);
+                return error;
+        }
+
+        mutex_lock(&dev->pm_mutex);
+
+        dev->buzzer_state = 0;
+        dev->key_code = -1;     /* no keys pressed */
+        dev->keybit = 0xf;
+
+        /* issue INIT */
+        dev->ctl_data->byte[HID_OR0] = HID_OR_GPO_BUZ_SPDIF;
+        dev->ctl_data->byte[HID_OR1] = dev->keybit;
+        dev->ctl_data->byte[HID_OR2] = dev->keybit;
+        dev->ctl_data->byte[HID_OR3] = 0x00;
+
+        error = usb_submit_urb(dev->urb_ctl, GFP_KERNEL);
+        if (error)
+                err("%s: usb_submit_urb (urb_ctl) failed %d", __func__, error);
+        else
+                dev->open = 1;
+
+        mutex_unlock(&dev->pm_mutex);
+
+        if (error)
+                usb_autopm_put_interface(dev->intf);
+
+        return error;
+}
+
+static void cm109_input_close(struct input_dev *idev)
+{
+        struct cm109_dev *dev = input_get_drvdata(idev);
+
+        mutex_lock(&dev->pm_mutex);
+
+        /*
+         * Once we are here event delivery is stopped so we
+         * don't need to worry about someone starting buzzer
+         * again
+         */
+        cm109_stop_traffic(dev);
+        dev->open = 0;
+
+        mutex_unlock(&dev->pm_mutex);
+
+        usb_autopm_put_interface(dev->intf);
+}
+
+static int cm109_input_ev(struct input_dev *idev, unsigned int type,
+                          unsigned int code, int value)
+{
+        struct cm109_dev *dev = input_get_drvdata(idev);
+
+        dev_dbg(&dev->udev->dev,
+                "input_ev: type=%u code=%u value=%d\n", type, code, value);
+
+        if (type != EV_SND)
+                return -EINVAL;
+
+        switch (code) {
+        case SND_TONE:
+        case SND_BELL:
+                dev->buzzer_state = !!value;
+                if (!dev->resetting)
+                        cm109_toggle_buzzer_async(dev);
+                return 0;
+
+        default:
+                return -EINVAL;
+        }
+}
+
+
+/******************************************************************************
+ * Linux interface and usb initialisation
+ *****************************************************************************/
+
+struct driver_info {
+        char *name;
+};
+
+static const struct driver_info info_cm109 = {
+        .name = "CM109 USB driver",
+};
+
+enum {
+        VENDOR_ID        = 0x0d8c, /* C-Media Electronics */
+        PRODUCT_ID_CM109 = 0x000e, /* CM109 defines range 0x0008 - 0x000f */
+};
+
+/* table of devices that work with this driver */
+static const struct usb_device_id cm109_usb_table[] = {
+        {
+                .match_flags = USB_DEVICE_ID_MATCH_DEVICE |
+                                USB_DEVICE_ID_MATCH_INT_INFO,
+                .idVendor = VENDOR_ID,
+                .idProduct = PRODUCT_ID_CM109,
+                .bInterfaceClass = USB_CLASS_HID,
+                .bInterfaceSubClass = 0,
+                .bInterfaceProtocol = 0,
+                .driver_info = (kernel_ulong_t) &info_cm109
+        },
+        /* you can add more devices here with product ID 0x0008 - 0x000f */
+        { }
+};
+
+static void cm109_usb_cleanup(struct cm109_dev *dev)
+{
+        if (dev->ctl_req)
+                usb_buffer_free(dev->udev, sizeof(*(dev->ctl_req)),
+                                dev->ctl_req, dev->ctl_req_dma);
+        if (dev->ctl_data)
+                usb_buffer_free(dev->udev, USB_PKT_LEN,
+                                dev->ctl_data, dev->ctl_dma);
+        if (dev->irq_data)
+                usb_buffer_free(dev->udev, USB_PKT_LEN,
+                                dev->irq_data, dev->irq_dma);
+
+        usb_free_urb(dev->urb_irq);     /* parameter validation in core/urb */
+        usb_free_urb(dev->urb_ctl);     /* parameter validation in core/urb */
+        kfree(dev);
+}
+
+static void cm109_usb_disconnect(struct usb_interface *interface)
+{
+        struct cm109_dev *dev = usb_get_intfdata(interface);
+
+        usb_set_intfdata(interface, NULL);
+        input_unregister_device(dev->idev);
+        cm109_usb_cleanup(dev);
+}
+
+static int cm109_usb_probe(struct usb_interface *intf,
+                           const struct usb_device_id *id)
+{
+        struct usb_device *udev = interface_to_usbdev(intf);
+        struct driver_info *nfo = (struct driver_info *)id->driver_info;
+        struct usb_host_interface *interface;
+        struct usb_endpoint_descriptor *endpoint;
+        struct cm109_dev *dev;
+        struct input_dev *input_dev = NULL;
+        int ret, pipe, i;
+        int error = -ENOMEM;
+
+        interface = intf->cur_altsetting;
+        endpoint = &interface->endpoint[0].desc;
+
+        if (!usb_endpoint_is_int_in(endpoint))
+                return -ENODEV;
+
+        dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+        if (!dev)
+                return -ENOMEM;
+
+        spin_lock_init(&dev->ctl_submit_lock);
+        mutex_init(&dev->pm_mutex);
+
+        dev->udev = udev;
+        dev->intf = intf;
+
+        dev->idev = input_dev = input_allocate_device();
+        if (!input_dev)
+                goto err_out;
+
+        /* allocate usb buffers */
+        dev->irq_data = usb_buffer_alloc(udev, USB_PKT_LEN,
+                                         GFP_KERNEL, &dev->irq_dma);
+        if (!dev->irq_data)
+                goto err_out;
+
+        dev->ctl_data = usb_buffer_alloc(udev, USB_PKT_LEN,
+                                         GFP_KERNEL, &dev->ctl_dma);
+        if (!dev->ctl_data)
+                goto err_out;
+
+        dev->ctl_req = usb_buffer_alloc(udev, sizeof(*(dev->ctl_req)),
+                                        GFP_KERNEL, &dev->ctl_req_dma);
+        if (!dev->ctl_req)
+                goto err_out;
+
+        /* allocate urb structures */
+        dev->urb_irq = usb_alloc_urb(0, GFP_KERNEL);
+        if (!dev->urb_irq)
+                goto err_out;
+
+        dev->urb_ctl = usb_alloc_urb(0, GFP_KERNEL);
+        if (!dev->urb_ctl)
+                goto err_out;
+
+        /* get a handle to the interrupt data pipe */
+        pipe = usb_rcvintpipe(udev, endpoint->bEndpointAddress);
+        ret = usb_maxpacket(udev, pipe, usb_pipeout(pipe));
+        if (ret != USB_PKT_LEN)
+                err("invalid payload size %d, expected %d", ret, USB_PKT_LEN);
+
+        /* initialise irq urb */
+        usb_fill_int_urb(dev->urb_irq, udev, pipe, dev->irq_data,
+                         USB_PKT_LEN,
+                         cm109_urb_irq_callback, dev, endpoint->bInterval);
+        dev->urb_irq->transfer_dma = dev->irq_dma;
+        dev->urb_irq->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
+        dev->urb_irq->dev = udev;
+
+        /* initialise ctl urb */
+        dev->ctl_req->bRequestType = USB_TYPE_CLASS | USB_RECIP_INTERFACE |
+                                        USB_DIR_OUT;
+        dev->ctl_req->bRequest = USB_REQ_SET_CONFIGURATION;
+        dev->ctl_req->wValue = cpu_to_le16(0x200);
+        dev->ctl_req->wIndex = cpu_to_le16(interface->desc.bInterfaceNumber);
+        dev->ctl_req->wLength = cpu_to_le16(USB_PKT_LEN);
+
+        usb_fill_control_urb(dev->urb_ctl, udev, usb_sndctrlpipe(udev, 0),
+                             (void *)dev->ctl_req, dev->ctl_data, USB_PKT_LEN,
+                             cm109_urb_ctl_callback, dev);
+        dev->urb_ctl->setup_dma = dev->ctl_req_dma;
+        dev->urb_ctl->transfer_dma = dev->ctl_dma;
+        dev->urb_ctl->transfer_flags |= URB_NO_SETUP_DMA_MAP |
+                                        URB_NO_TRANSFER_DMA_MAP;
+        dev->urb_ctl->dev = udev;
+
+        /* find out the physical bus location */
+        usb_make_path(udev, dev->phys, sizeof(dev->phys));
+        strlcat(dev->phys, "/input0", sizeof(dev->phys));
+
+        /* register settings for the input device */
+        input_dev->name = nfo->name;
+        input_dev->phys = dev->phys;
+        usb_to_input_id(udev, &input_dev->id);
+        input_dev->dev.parent = &intf->dev;
+
+        input_set_drvdata(input_dev, dev);
+        input_dev->open = cm109_input_open;
+        input_dev->close = cm109_input_close;
+        input_dev->event = cm109_input_ev;
+
+        input_dev->keycode = dev->keymap;
+        input_dev->keycodesize = sizeof(unsigned char);
+        input_dev->keycodemax = ARRAY_SIZE(dev->keymap);
+
+        input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_SND);
+        input_dev->sndbit[0] = BIT_MASK(SND_BELL) | BIT_MASK(SND_TONE);
+
+        /* register available key events */
+        for (i = 0; i < KEYMAP_SIZE; i++) {
+                unsigned short k = keymap(i);
+                dev->keymap[i] = k;
+                __set_bit(k, input_dev->keybit);
+        }
+        __clear_bit(KEY_RESERVED, input_dev->keybit);
+
+        error = input_register_device(dev->idev);
+        if (error)
+                goto err_out;
+
+        usb_set_intfdata(intf, dev);
+
+        return 0;
+
+ err_out:
+        input_free_device(input_dev);
+        cm109_usb_cleanup(dev);
+        return error;
+}
+
+static int cm109_usb_suspend(struct usb_interface *intf, pm_message_t message)
+{
+        struct cm109_dev *dev = usb_get_intfdata(intf);
+
+        dev_info(&intf->dev, "cm109: usb_suspend (event=%d)\n", message.event);
+
+        mutex_lock(&dev->pm_mutex);
+        cm109_stop_traffic(dev);
+        mutex_unlock(&dev->pm_mutex);
+
+        return 0;
+}
+
+static int cm109_usb_resume(struct usb_interface *intf)
+{
+        struct cm109_dev *dev = usb_get_intfdata(intf);
+
+        dev_info(&intf->dev, "cm109: usb_resume\n");
+
+        mutex_lock(&dev->pm_mutex);
+        cm109_restore_state(dev);
+        mutex_unlock(&dev->pm_mutex);
+
+        return 0;
+}
+
+static int cm109_usb_pre_reset(struct usb_interface *intf)
+{
+        struct cm109_dev *dev = usb_get_intfdata(intf);
+
+        mutex_lock(&dev->pm_mutex);
+
+        /*
+         * Make sure input events don't try to toggle buzzer
+         * while we are resetting
+         */
+        dev->resetting = 1;
+        smp_wmb();
+
+        cm109_stop_traffic(dev);
+
+        return 0;
+}
+
+static int cm109_usb_post_reset(struct usb_interface *intf)
+{
+        struct cm109_dev *dev = usb_get_intfdata(intf);
+
+        dev->resetting = 0;
+        smp_wmb();
+
+        cm109_restore_state(dev);
+
+        mutex_unlock(&dev->pm_mutex);
+
+        return 0;
+}
+
+static struct usb_driver cm109_driver = {
+        .name           = "cm109",
+        .probe          = cm109_usb_probe,
+        .disconnect     = cm109_usb_disconnect,
+        .suspend        = cm109_usb_suspend,
+        .resume         = cm109_usb_resume,
+        .reset_resume   = cm109_usb_resume,
+        .pre_reset      = cm109_usb_pre_reset,
+        .post_reset     = cm109_usb_post_reset,
+        .id_table       = cm109_usb_table,
+        .supports_autosuspend = 1,
+};
+
+static int __init cm109_select_keymap(void)
+{
+        /* Load the phone keymap */
+        if (!strcasecmp(phone, "kip1000")) {
+                keymap = keymap_kip1000;
+                printk(KERN_INFO KBUILD_MODNAME ": "
+                        "Keymap for Komunikate KIP1000 phone loaded\n");
+        } else if (!strcasecmp(phone, "gtalk")) {
+                keymap = keymap_gtalk;
+                printk(KERN_INFO KBUILD_MODNAME ": "
+                        "Keymap for Genius G-talk phone loaded\n");
+        } else if (!strcasecmp(phone, "usbph01")) {
+                keymap = keymap_usbph01;
+                printk(KERN_INFO KBUILD_MODNAME ": "
+                        "Keymap for Allied-Telesis Corega USBPH01 phone loaded\n");
+        } else {
+                printk(KERN_ERR KBUILD_MODNAME ": "
+                        "Unsupported phone: %s\n", phone);
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static int __init cm109_init(void)
+{
+        int err;
+
+        err = cm109_select_keymap();
+        if (err)
+                return err;
+
+        err = usb_register(&cm109_driver);
+        if (err)
+                return err;
+
+        printk(KERN_INFO KBUILD_MODNAME ": "
+                DRIVER_DESC ": " DRIVER_VERSION " (C) " DRIVER_AUTHOR "\n");
+
+        return 0;
+}
+
+static void __exit cm109_exit(void)
+{
+        usb_deregister(&cm109_driver);
+}
+
+module_init(cm109_init);
+module_exit(cm109_exit);
+
+MODULE_DEVICE_TABLE(usb, cm109_usb_table);
+
+MODULE_AUTHOR(DRIVER_AUTHOR);
+MODULE_DESCRIPTION(DRIVER_DESC);
+MODULE_LICENSE("GPL");
diff --git a/drivers/input/misc/map_to_7segment.h b/drivers/input/misc/map_to_7segment.h
deleted file mode 100644
index a424094d9fe2..000000000000
--- a/drivers/input/misc/map_to_7segment.h
+++ /dev/null
@@ -1,189 +0,0 @@
-/*
- * drivers/usb/input/map_to_7segment.h
- *
- * Copyright (c) 2005 Henk Vergonet <Henk.Vergonet@gmail.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef MAP_TO_7SEGMENT_H
-#define MAP_TO_7SEGMENT_H
-
-/* This file provides translation primitives and tables for the conversion
- * of (ASCII) characters to a 7-segments notation.
- *
- * The 7 segment's wikipedia notation below is used as standard.
- * See: http://en.wikipedia.org/wiki/Seven_segment_display
- *
- * Notation:    +-a-+
- *              f   b
- *              +-g-+
- *              e   c
- *              +-d-+
- *
- * Usage:
- *
- *   Register a map variable, and fill it with a character set:
- *      static SEG7_DEFAULT_MAP(map_seg7);
- *
- *
- *   Then use for conversion:
- *      seg7 = map_to_seg7(&map_seg7, some_char);
- *      ...
- *
- * In device drivers it is recommended, if required, to make the char map
- * accessible via the sysfs interface using the following scheme:
- *
- * static ssize_t show_map(struct device *dev, char *buf) {
- *      memcpy(buf, &map_seg7, sizeof(map_seg7));
- *      return sizeof(map_seg7);
- * }
- * static ssize_t store_map(struct device *dev, const char *buf, size_t cnt) {
- *      if(cnt != sizeof(map_seg7))
- *              return -EINVAL;
- *      memcpy(&map_seg7, buf, cnt);
- *      return cnt;
- * }
- * static DEVICE_ATTR(map_seg7, PERMS_RW, show_map, store_map);
- *
- * History:
- * 2005-05-31   RFC linux-kernel@vger.kernel.org
- */
-#include <linux/errno.h>
-
-
-#define BIT_SEG7_A              0
-#define BIT_SEG7_B              1
-#define BIT_SEG7_C              2
-#define BIT_SEG7_D              3
-#define BIT_SEG7_E              4
-#define BIT_SEG7_F              5
-#define BIT_SEG7_G              6
-#define BIT_SEG7_RESERVED       7
-
-struct seg7_conversion_map {
-        unsigned char   table[128];
-};
-
-static inline int map_to_seg7(struct seg7_conversion_map *map, int c)
-{
-        return c >= 0 && c < sizeof(map->table) ? map->table[c] : -EINVAL;
-}
-
-#define SEG7_CONVERSION_MAP(_name, _map)        \
-        struct seg7_conversion_map _name = { .table = { _map } }
-
-/*
- * It is recommended to use a facility that allows user space to redefine
- * custom character sets for LCD devices. Please use a sysfs interface
- * as described above.
- */
-#define MAP_TO_SEG7_SYSFS_FILE  "map_seg7"
-
-/*******************************************************************************
- * ASCII conversion table
- ******************************************************************************/
-
-#define _SEG7(l,a,b,c,d,e,f,g)  \
-      ( a<<BIT_SEG7_A | b<<BIT_SEG7_B | c<<BIT_SEG7_C | d<<BIT_SEG7_D | \
-        e<<BIT_SEG7_E | f<<BIT_SEG7_F | g<<BIT_SEG7_G )
-
-#define _MAP_0_32_ASCII_SEG7_NON_PRINTABLE      \
-        0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-
-#define _MAP_33_47_ASCII_SEG7_SYMBOL            \
- _SEG7('!',0,0,0,0,1,1,0), _SEG7('"',0,1,0,0,0,1,0), _SEG7('#',0,1,1,0,1,1,0),\
- _SEG7('$',1,0,1,1,0,1,1), _SEG7('%',0,0,1,0,0,1,0), _SEG7('&',1,0,1,1,1,1,1),\
- _SEG7('\'',0,0,0,0,0,1,0),_SEG7('(',1,0,0,1,1,1,0), _SEG7(')',1,1,1,1,0,0,0),\
- _SEG7('*',0,1,1,0,1,1,1), _SEG7('+',0,1,1,0,0,0,1), _SEG7(',',0,0,0,0,1,0,0),\
- _SEG7('-',0,0,0,0,0,0,1), _SEG7('.',0,0,0,0,1,0,0), _SEG7('/',0,1,0,0,1,0,1),
-
-#define _MAP_48_57_ASCII_SEG7_NUMERIC           \
- _SEG7('0',1,1,1,1,1,1,0), _SEG7('1',0,1,1,0,0,0,0), _SEG7('2',1,1,0,1,1,0,1),\
- _SEG7('3',1,1,1,1,0,0,1), _SEG7('4',0,1,1,0,0,1,1), _SEG7('5',1,0,1,1,0,1,1),\
- _SEG7('6',1,0,1,1,1,1,1), _SEG7('7',1,1,1,0,0,0,0), _SEG7('8',1,1,1,1,1,1,1),\
- _SEG7('9',1,1,1,1,0,1,1),
-
-#define _MAP_58_64_ASCII_SEG7_SYMBOL            \
- _SEG7(':',0,0,0,1,0,0,1), _SEG7(';',0,0,0,1,0,0,1), _SEG7('<',1,0,0,0,0,1,1),\
- _SEG7('=',0,0,0,1,0,0,1), _SEG7('>',1,1,0,0,0,0,1), _SEG7('?',1,1,1,0,0,1,0),\
- _SEG7('@',1,1,0,1,1,1,1),
-
-#define _MAP_65_90_ASCII_SEG7_ALPHA_UPPR        \
- _SEG7('A',1,1,1,0,1,1,1), _SEG7('B',1,1,1,1,1,1,1), _SEG7('C',1,0,0,1,1,1,0),\
- _SEG7('D',1,1,1,1,1,1,0), _SEG7('E',1,0,0,1,1,1,1), _SEG7('F',1,0,0,0,1,1,1),\
- _SEG7('G',1,1,1,1,0,1,1), _SEG7('H',0,1,1,0,1,1,1), _SEG7('I',0,1,1,0,0,0,0),\
- _SEG7('J',0,1,1,1,0,0,0), _SEG7('K',0,1,1,0,1,1,1), _SEG7('L',0,0,0,1,1,1,0),\
- _SEG7('M',1,1,1,0,1,1,0), _SEG7('N',1,1,1,0,1,1,0), _SEG7('O',1,1,1,1,1,1,0),\
- _SEG7('P',1,1,0,0,1,1,1), _SEG7('Q',1,1,1,1,1,1,0), _SEG7('R',1,1,1,0,1,1,1),\
- _SEG7('S',1,0,1,1,0,1,1), _SEG7('T',0,0,0,1,1,1,1), _SEG7('U',0,1,1,1,1,1,0),\
- _SEG7('V',0,1,1,1,1,1,0), _SEG7('W',0,1,1,1,1,1,1), _SEG7('X',0,1,1,0,1,1,1),\
- _SEG7('Y',0,1,1,0,0,1,1), _SEG7('Z',1,1,0,1,1,0,1),
-
-#define _MAP_91_96_ASCII_SEG7_SYMBOL            \
- _SEG7('[',1,0,0,1,1,1,0), _SEG7('\\',0,0,1,0,0,1,1),_SEG7(']',1,1,1,1,0,0,0),\
- _SEG7('^',1,1,0,0,0,1,0), _SEG7('_',0,0,0,1,0,0,0), _SEG7('`',0,1,0,0,0,0,0),
-
-#define _MAP_97_122_ASCII_SEG7_ALPHA_LOWER      \
- _SEG7('A',1,1,1,0,1,1,1), _SEG7('b',0,0,1,1,1,1,1), _SEG7('c',0,0,0,1,1,0,1),\
- _SEG7('d',0,1,1,1,1,0,1), _SEG7('E',1,0,0,1,1,1,1), _SEG7('F',1,0,0,0,1,1,1),\
- _SEG7('G',1,1,1,1,0,1,1), _SEG7('h',0,0,1,0,1,1,1), _SEG7('i',0,0,1,0,0,0,0),\
- _SEG7('j',0,0,1,1,0,0,0), _SEG7('k',0,0,1,0,1,1,1), _SEG7('L',0,0,0,1,1,1,0),\
- _SEG7('M',1,1,1,0,1,1,0), _SEG7('n',0,0,1,0,1,0,1), _SEG7('o',0,0,1,1,1,0,1),\
- _SEG7('P',1,1,0,0,1,1,1), _SEG7('q',1,1,1,0,0,1,1), _SEG7('r',0,0,0,0,1,0,1),\
- _SEG7('S',1,0,1,1,0,1,1), _SEG7('T',0,0,0,1,1,1,1), _SEG7('u',0,0,1,1,1,0,0),\
- _SEG7('v',0,0,1,1,1,0,0), _SEG7('W',0,1,1,1,1,1,1), _SEG7('X',0,1,1,0,1,1,1),\
- _SEG7('y',0,1,1,1,0,1,1), _SEG7('Z',1,1,0,1,1,0,1),
-
-#define _MAP_123_126_ASCII_SEG7_SYMBOL          \
- _SEG7('{',1,0,0,1,1,1,0), _SEG7('|',0,0,0,0,1,1,0), _SEG7('}',1,1,1,1,0,0,0),\
- _SEG7('~',1,0,0,0,0,0,0),
-
-/* Maps */
-
-/* This set tries to map as close as possible to the visible characteristics
- * of the ASCII symbol, lowercase and uppercase letters may differ in
- * presentation on the display.
- */
-#define MAP_ASCII7SEG_ALPHANUM                  \
-        _MAP_0_32_ASCII_SEG7_NON_PRINTABLE      \
-        _MAP_33_47_ASCII_SEG7_SYMBOL            \
-        _MAP_48_57_ASCII_SEG7_NUMERIC           \
-        _MAP_58_64_ASCII_SEG7_SYMBOL            \
-        _MAP_65_90_ASCII_SEG7_ALPHA_UPPR        \
-        _MAP_91_96_ASCII_SEG7_SYMBOL            \
-        _MAP_97_122_ASCII_SEG7_ALPHA_LOWER      \
-        _MAP_123_126_ASCII_SEG7_SYMBOL
-
-/* This set tries to map as close as possible to the symbolic characteristics
- * of the ASCII character for maximum discrimination.
- * For now this means all alpha chars are in lower case representations.
- * (This for example facilitates the use of hex numbers with uppercase input.)
- */
-#define MAP_ASCII7SEG_ALPHANUM_LC                       \
-        _MAP_0_32_ASCII_SEG7_NON_PRINTABLE      \
-        _MAP_33_47_ASCII_SEG7_SYMBOL            \
-        _MAP_48_57_ASCII_SEG7_NUMERIC           \
-        _MAP_58_64_ASCII_SEG7_SYMBOL            \
-        _MAP_97_122_ASCII_SEG7_ALPHA_LOWER      \
-        _MAP_91_96_ASCII_SEG7_SYMBOL            \
-        _MAP_97_122_ASCII_SEG7_ALPHA_LOWER      \
-        _MAP_123_126_ASCII_SEG7_SYMBOL
-
-#define SEG7_DEFAULT_MAP(_name)         \
-        SEG7_CONVERSION_MAP(_name,MAP_ASCII7SEG_ALPHANUM)
-
-#endif  /* MAP_TO_7SEGMENT_H */
-
diff --git a/drivers/input/misc/wistron_btns.c b/drivers/input/misc/wistron_btns.c
index fe268be3293b..7c8957dd22c0 100644
--- a/drivers/input/misc/wistron_btns.c
+++ b/drivers/input/misc/wistron_btns.c
@@ -277,6 +277,16 @@ static struct key_entry keymap_fs_amilo_pro_v2000[] __initdata = {
         { KE_END,  0 }
 };
 
+static struct key_entry keymap_fs_amilo_pro_v3505[] __initdata = {
+        { KE_KEY,       0x01, {KEY_HELP} },          /* Fn+F1 */
+        { KE_KEY,       0x06, {KEY_DISPLAYTOGGLE} }, /* Fn+F4 */
+        { KE_BLUETOOTH, 0x30 },                      /* Fn+F10 */
+        { KE_KEY,       0x31, {KEY_MAIL} },          /* mail button */
+        { KE_KEY,       0x36, {KEY_WWW} },           /* www button */
+        { KE_WIFI,      0x78 },                      /* satelite dish button */
+        { KE_END,       0 }
+};
+
 static struct key_entry keymap_fujitsu_n3510[] __initdata = {
         { KE_KEY, 0x11, {KEY_PROG1} },
         { KE_KEY, 0x12, {KEY_PROG2} },
@@ -618,6 +628,15 @@ static struct dmi_system_id dmi_ids[] __initdata = {
         },
         {
                 .callback = dmi_matched,
+                .ident = "Fujitsu-Siemens Amilo Pro Edition V3505",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Pro Edition V3505"),
+                },
+                .driver_data = keymap_fs_amilo_pro_v3505
+        },
+        {
+                .callback = dmi_matched,
                 .ident = "Fujitsu-Siemens Amilo M7400",
                 .matches = {
                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
diff --git a/drivers/input/misc/yealink.c b/drivers/input/misc/yealink.c
index facefd3dba29..11b5c7e84ed1 100644
--- a/drivers/input/misc/yealink.c
+++ b/drivers/input/misc/yealink.c
@@ -52,8 +52,8 @@
 #include <linux/module.h>
 #include <linux/rwsem.h>
 #include <linux/usb/input.h>
+#include <linux/map_to_7segment.h>
 
-#include "map_to_7segment.h"
 #include "yealink.h"
 
 #define DRIVER_VERSION "yld-20051230"
diff --git a/drivers/input/mouse/Kconfig b/drivers/input/mouse/Kconfig
index f996546fc443..f488b6852baf 100644
--- a/drivers/input/mouse/Kconfig
+++ b/drivers/input/mouse/Kconfig
@@ -96,6 +96,16 @@ config MOUSE_PS2_TOUCHKIT
 
           If unsure, say N.
 
+config MOUSE_PS2_OLPC
+        bool "OLPC PS/2 mouse protocol extension"
+        depends on MOUSE_PS2 && OLPC
+        help
+          Say Y here if you have an OLPC XO-1 laptop (with built-in
+          PS/2 touchpad/tablet device).  The manufacturer calls the
+          touchpad an HGPK.
+
+          If unsure, say N.
+
 config MOUSE_SERIAL
         tristate "Serial mouse"
         select SERIO
diff --git a/drivers/input/mouse/Makefile b/drivers/input/mouse/Makefile
index d4d202516090..8e6e69097801 100644
--- a/drivers/input/mouse/Makefile
+++ b/drivers/input/mouse/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_MOUSE_GPIO)	+= gpio_mouse.o
 psmouse-objs := psmouse-base.o synaptics.o
 
 psmouse-$(CONFIG_MOUSE_PS2_ALPS)        += alps.o
+psmouse-$(CONFIG_MOUSE_PS2_OLPC)        += hgpk.o
 psmouse-$(CONFIG_MOUSE_PS2_LOGIPS2PP)   += logips2pp.o
 psmouse-$(CONFIG_MOUSE_PS2_LIFEBOOK)    += lifebook.o
 psmouse-$(CONFIG_MOUSE_PS2_TRACKPOINT)  += trackpoint.o
diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c
index 385e32bcf6a6..cbedf957cc58 100644
--- a/drivers/input/mouse/alps.c
+++ b/drivers/input/mouse/alps.c
@@ -54,6 +54,7 @@ static const struct alps_model_info alps_model_data[] = {
         { { 0x20, 0x02, 0x0e }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* XXX */
         { { 0x22, 0x02, 0x0a }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT },
         { { 0x22, 0x02, 0x14 }, 0xff, 0xff, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude D600 */
+        { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude E6500 */
         { { 0x73, 0x02, 0x50 }, 0xcf, 0xcf, ALPS_FW_BK_1 } /* Dell Vostro 1400 */
 };
 
diff --git a/drivers/input/mouse/appletouch.c b/drivers/input/mouse/appletouch.c
index 1f41ae94f26b..079816e6b23b 100644
--- a/drivers/input/mouse/appletouch.c
+++ b/drivers/input/mouse/appletouch.c
@@ -136,12 +136,28 @@ MODULE_DEVICE_TABLE(usb, atp_table);
 #define ATP_GEYSER_MODE_REQUEST_INDEX           0
 #define ATP_GEYSER_MODE_VENDOR_VALUE            0x04
 
+/**
+ * enum atp_status_bits - status bit meanings
+ *
+ * These constants represent the meaning of the status bits.
+ * (only Geyser 3/4)
+ *
+ * @ATP_STATUS_BUTTON: The button was pressed
+ * @ATP_STATUS_BASE_UPDATE: Update of the base values (untouched pad)
+ * @ATP_STATUS_FROM_RESET: Reset previously performed
+ */
+enum atp_status_bits {
+        ATP_STATUS_BUTTON       = BIT(0),
+        ATP_STATUS_BASE_UPDATE  = BIT(2),
+        ATP_STATUS_FROM_RESET   = BIT(4),
+};
+
 /* Structure to hold all of our device specific stuff */
 struct atp {
         char                    phys[64];
         struct usb_device       *udev;          /* usb device */
         struct urb              *urb;           /* usb request block */
-        signed char             *data;          /* transferred data */
+        u8                      *data;          /* transferred data */
         struct input_dev        *input;         /* input dev */
         enum atp_touchpad_type  type;           /* type of touchpad */
         bool                    open;
@@ -251,8 +267,6 @@ static void atp_reinit(struct work_struct *work)
         int retval;
 
         dprintk("appletouch: putting appletouch to sleep (reinit)\n");
-        dev->idlecount = 0;
-
         atp_geyser_init(udev);
 
         retval = usb_submit_urb(dev->urb, GFP_ATOMIC);
@@ -327,11 +341,14 @@ static inline void atp_report_fingers(struct input_dev *input, int fingers)
         input_report_key(input, BTN_TOOL_TRIPLETAP, fingers > 2);
 }
 
-static void atp_complete(struct urb *urb)
+/* Check URB status and for correct length of data package */
+
+#define ATP_URB_STATUS_SUCCESS          0
+#define ATP_URB_STATUS_ERROR            1
+#define ATP_URB_STATUS_ERROR_FATAL      2
+
+static int atp_status_check(struct urb *urb)
 {
-        int x, y, x_z, y_z, x_f, y_f;
-        int retval, i, j;
-        int key;
         struct atp *dev = urb->context;
 
         switch (urb->status) {
@@ -351,11 +368,12 @@ static void atp_complete(struct urb *urb)
                 /* This urb is terminated, clean up */
                 dbg("atp_complete: urb shutting down with status: %d",
                     urb->status);
-                return;
+                return ATP_URB_STATUS_ERROR_FATAL;
+
         default:
                 dbg("atp_complete: nonzero urb status received: %d",
                     urb->status);
-                goto exit;
+                return ATP_URB_STATUS_ERROR;
         }
 
         /* drop incomplete datasets */
@@ -363,30 +381,33 @@ static void atp_complete(struct urb *urb)
                 dprintk("appletouch: incomplete data package"
                         " (first byte: %d, length: %d).\n",
                         dev->data[0], dev->urb->actual_length);
-                goto exit;
+                return ATP_URB_STATUS_ERROR;
         }
 
-        /* reorder the sensors values */
-        if (dev->type == ATP_GEYSER3 || dev->type == ATP_GEYSER4) {
-                memset(dev->xy_cur, 0, sizeof(dev->xy_cur));
+        return ATP_URB_STATUS_SUCCESS;
+}
 
-                /*
-                 * The values are laid out like this:
-                 * -, Y1, Y2, -, Y3, Y4, -, ..., -, X1, X2, -, X3, X4, ...
-                 * '-' is an unused value.
-                 */
+/*
+ * USB interrupt callback functions
+ */
 
-                /* read X values */
-                for (i = 0, j = 19; i < 20; i += 2, j += 3) {
-                        dev->xy_cur[i] = dev->data[j + 1];
-                        dev->xy_cur[i + 1] = dev->data[j + 2];
-                }
-                /* read Y values */
-                for (i = 0, j = 1; i < 9; i += 2, j += 3) {
-                        dev->xy_cur[ATP_XSENSORS + i] = dev->data[j + 1];
-                        dev->xy_cur[ATP_XSENSORS + i + 1] = dev->data[j + 2];
-                }
-        } else if (dev->type == ATP_GEYSER2) {
+/* Interrupt function for older touchpads: FOUNTAIN/GEYSER1/GEYSER2 */
+
+static void atp_complete_geyser_1_2(struct urb *urb)
+{
+        int x, y, x_z, y_z, x_f, y_f;
+        int retval, i, j;
+        int key;
+        struct atp *dev = urb->context;
+        int status = atp_status_check(urb);
+
+        if (status == ATP_URB_STATUS_ERROR_FATAL)
+                return;
+        else if (status == ATP_URB_STATUS_ERROR)
+                goto exit;
+
+        /* reorder the sensors values */
+        if (dev->type == ATP_GEYSER2) {
                 memset(dev->xy_cur, 0, sizeof(dev->xy_cur));
 
                 /*
@@ -427,34 +448,40 @@ static void atp_complete(struct urb *urb)
                 /* first sample */
                 dev->valid = true;
                 dev->x_old = dev->y_old = -1;
+
+                /* Store first sample */
                 memcpy(dev->xy_old, dev->xy_cur, sizeof(dev->xy_old));
 
-                if (dev->size_detect_done ||
-                    dev->type == ATP_GEYSER3) /* No 17" Macbooks (yet) */
-                        goto exit;
+                /* Perform size detection, if not done already */
+                if (!dev->size_detect_done) {
+
+                        /* 17" Powerbooks have extra X sensors */
+                        for (i = (dev->type == ATP_GEYSER2 ? 15 : 16);
+                             i < ATP_XSENSORS; i++) {
+                                if (!dev->xy_cur[i])
+                                        continue;
+
+                                printk(KERN_INFO
+                                        "appletouch: 17\" model detected.\n");
+
+                                if (dev->type == ATP_GEYSER2)
+                                        input_set_abs_params(dev->input, ABS_X,
+                                                             0,
+                                                             (20 - 1) *
+                                                             ATP_XFACT - 1,
+                                                             ATP_FUZZ, 0);
+                                else
+                                        input_set_abs_params(dev->input, ABS_X,
+                                                             0,
+                                                             (26 - 1) *
+                                                             ATP_XFACT - 1,
+                                                             ATP_FUZZ, 0);
+                                break;
+                        }
 
-                /* 17" Powerbooks have extra X sensors */
-                for (i = (dev->type == ATP_GEYSER2 ? 15 : 16);
-                     i < ATP_XSENSORS; i++) {
-                        if (!dev->xy_cur[i])
-                                continue;
-
-                        printk(KERN_INFO "appletouch: 17\" model detected.\n");
-                        if (dev->type == ATP_GEYSER2)
-                                input_set_abs_params(dev->input, ABS_X, 0,
-                                                     (20 - 1) *
-                                                     ATP_XFACT - 1,
-                                                     ATP_FUZZ, 0);
-                        else
-                                input_set_abs_params(dev->input, ABS_X, 0,
-                                                     (ATP_XSENSORS - 1) *
-                                                     ATP_XFACT - 1,
-                                                     ATP_FUZZ, 0);
-                        break;
+                        dev->size_detect_done = 1;
+                        goto exit;
                 }
-
-                dev->size_detect_done = 1;
-                goto exit;
         }
 
         for (i = 0; i < ATP_XSENSORS + ATP_YSENSORS; i++) {
@@ -475,7 +502,118 @@ static void atp_complete(struct urb *urb)
                               ATP_XFACT, &x_z, &x_f);
         y = atp_calculate_abs(dev->xy_acc + ATP_XSENSORS, ATP_YSENSORS,
                               ATP_YFACT, &y_z, &y_f);
-        key = dev->data[dev->datalen - 1] & 1;
+        key = dev->data[dev->datalen - 1] & ATP_STATUS_BUTTON;
+
+        if (x && y) {
+                if (dev->x_old != -1) {
+                        x = (dev->x_old * 3 + x) >> 2;
+                        y = (dev->y_old * 3 + y) >> 2;
+                        dev->x_old = x;
+                        dev->y_old = y;
+
+                        if (debug > 1)
+                                printk(KERN_DEBUG "appletouch: "
+                                        "X: %3d Y: %3d Xz: %3d Yz: %3d\n",
+                                        x, y, x_z, y_z);
+
+                        input_report_key(dev->input, BTN_TOUCH, 1);
+                        input_report_abs(dev->input, ABS_X, x);
+                        input_report_abs(dev->input, ABS_Y, y);
+                        input_report_abs(dev->input, ABS_PRESSURE,
+                                         min(ATP_PRESSURE, x_z + y_z));
+                        atp_report_fingers(dev->input, max(x_f, y_f));
+                }
+                dev->x_old = x;
+                dev->y_old = y;
+
+        } else if (!x && !y) {
+
+                dev->x_old = dev->y_old = -1;
+                input_report_key(dev->input, BTN_TOUCH, 0);
+                input_report_abs(dev->input, ABS_PRESSURE, 0);
+                atp_report_fingers(dev->input, 0);
+
+                /* reset the accumulator on release */
+                memset(dev->xy_acc, 0, sizeof(dev->xy_acc));
+        }
+
+        input_report_key(dev->input, BTN_LEFT, key);
+        input_sync(dev->input);
+
+ exit:
+        retval = usb_submit_urb(dev->urb, GFP_ATOMIC);
+        if (retval)
+                err("atp_complete: usb_submit_urb failed with result %d",
+                    retval);
+}
+
+/* Interrupt function for older touchpads: GEYSER3/GEYSER4 */
+
+static void atp_complete_geyser_3_4(struct urb *urb)
+{
+        int x, y, x_z, y_z, x_f, y_f;
+        int retval, i, j;
+        int key;
+        struct atp *dev = urb->context;
+        int status = atp_status_check(urb);
+
+        if (status == ATP_URB_STATUS_ERROR_FATAL)
+                return;
+        else if (status == ATP_URB_STATUS_ERROR)
+                goto exit;
+
+        /* Reorder the sensors values:
+         *
+         * The values are laid out like this:
+         * -, Y1, Y2, -, Y3, Y4, -, ..., -, X1, X2, -, X3, X4, ...
+         * '-' is an unused value.
+         */
+
+        /* read X values */
+        for (i = 0, j = 19; i < 20; i += 2, j += 3) {
+                dev->xy_cur[i] = dev->data[j + 1];
+                dev->xy_cur[i + 1] = dev->data[j + 2];
+        }
+        /* read Y values */
+        for (i = 0, j = 1; i < 9; i += 2, j += 3) {
+                dev->xy_cur[ATP_XSENSORS + i] = dev->data[j + 1];
+                dev->xy_cur[ATP_XSENSORS + i + 1] = dev->data[j + 2];
+        }
+
+        dbg_dump("sample", dev->xy_cur);
+
+        /* Just update the base values (i.e. touchpad in untouched state) */
+        if (dev->data[dev->datalen - 1] & ATP_STATUS_BASE_UPDATE) {
+
+                dprintk(KERN_DEBUG "appletouch: updated base values\n");
+
+                memcpy(dev->xy_old, dev->xy_cur, sizeof(dev->xy_old));
+                goto exit;
+        }
+
+        for (i = 0; i < ATP_XSENSORS + ATP_YSENSORS; i++) {
+                /* calculate the change */
+                dev->xy_acc[i] = dev->xy_cur[i] - dev->xy_old[i];
+
+                /* this is a round-robin value, so couple with that */
+                if (dev->xy_acc[i] > 127)
+                        dev->xy_acc[i] -= 256;
+
+                if (dev->xy_acc[i] < -127)
+                        dev->xy_acc[i] += 256;
+
+                /* prevent down drifting */
+                if (dev->xy_acc[i] < 0)
+                        dev->xy_acc[i] = 0;
+        }
+
+        dbg_dump("accumulator", dev->xy_acc);
+
+        x = atp_calculate_abs(dev->xy_acc, ATP_XSENSORS,
+                              ATP_XFACT, &x_z, &x_f);
+        y = atp_calculate_abs(dev->xy_acc + ATP_XSENSORS, ATP_YSENSORS,
+                              ATP_YFACT, &y_z, &y_f);
+        key = dev->data[dev->datalen - 1] & ATP_STATUS_BUTTON;
 
         if (x && y) {
                 if (dev->x_old != -1) {
@@ -514,28 +652,27 @@ static void atp_complete(struct urb *urb)
         input_sync(dev->input);
 
         /*
-         * Many Geysers will continue to send packets continually after
+         * Geysers 3/4 will continue to send packets continually after
          * the first touch unless reinitialised. Do so if it's been
          * idle for a while in order to avoid waking the kernel up
-         * several hundred times a second. Re-initialization does not
-         * work on Fountain touchpads.
+         * several hundred times a second.
          */
-        if (dev->type != ATP_FOUNTAIN) {
-                /*
-                 * Button must not be pressed when entering suspend,
-                 * otherwise we will never release the button.
-                 */
-                if (!x && !y && !key) {
-                        dev->idlecount++;
-                        if (dev->idlecount == 10) {
-                                dev->valid = false;
-                                schedule_work(&dev->work);
-                                /* Don't resubmit urb here, wait for reinit */
-                                return;
-                        }
-                } else
+
+        /*
+         * Button must not be pressed when entering suspend,
+         * otherwise we will never release the button.
+         */
+        if (!x && !y && !key) {
+                dev->idlecount++;
+                if (dev->idlecount == 10) {
+                        dev->x_old = dev->y_old = -1;
                         dev->idlecount = 0;
-        }
+                        schedule_work(&dev->work);
+                        /* Don't resubmit urb here, wait for reinit */
+                        return;
+                }
+        } else
+                dev->idlecount = 0;
 
  exit:
         retval = usb_submit_urb(dev->urb, GFP_ATOMIC);
@@ -632,9 +769,19 @@ static int atp_probe(struct usb_interface *iface,
         if (!dev->data)
                 goto err_free_urb;
 
-        usb_fill_int_urb(dev->urb, udev,
-                         usb_rcvintpipe(udev, int_in_endpointAddr),
-                         dev->data, dev->datalen, atp_complete, dev, 1);
+        /* Select the USB complete (callback) function */
+        if (dev->type == ATP_FOUNTAIN ||
+            dev->type == ATP_GEYSER1 ||
+            dev->type == ATP_GEYSER2)
+                usb_fill_int_urb(dev->urb, udev,
+                                 usb_rcvintpipe(udev, int_in_endpointAddr),
+                                 dev->data, dev->datalen,
+                                 atp_complete_geyser_1_2, dev, 1);
+        else
+                usb_fill_int_urb(dev->urb, udev,
+                                 usb_rcvintpipe(udev, int_in_endpointAddr),
+                                 dev->data, dev->datalen,
+                                 atp_complete_geyser_3_4, dev, 1);
 
         error = atp_handle_geyser(dev);
         if (error)
@@ -751,8 +898,6 @@ static int atp_suspend(struct usb_interface *iface, pm_message_t message)
         struct atp *dev = usb_get_intfdata(iface);
 
         usb_kill_urb(dev->urb);
-        dev->valid = false;
-
         return 0;
 }
 
diff --git a/drivers/input/mouse/hgpk.c b/drivers/input/mouse/hgpk.c
new file mode 100644
index 000000000000..e82d34201e97
--- /dev/null
+++ b/drivers/input/mouse/hgpk.c
@@ -0,0 +1,477 @@
+/*
+ * OLPC HGPK (XO-1) touchpad PS/2 mouse driver
+ *
+ * Copyright (c) 2006-2008 One Laptop Per Child
+ * Authors:
+ *   Zephaniah E. Hull
+ *   Andres Salomon <dilinger@debian.org>
+ *
+ * This driver is partly based on the ALPS driver, which is:
+ *
+ * Copyright (c) 2003 Neil Brown <neilb@cse.unsw.edu.au>
+ * Copyright (c) 2003-2005 Peter Osterlund <petero2@telia.com>
+ * Copyright (c) 2004 Dmitry Torokhov <dtor@mail.ru>
+ * Copyright (c) 2005 Vojtech Pavlik <vojtech@suse.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * The spec from ALPS is available from
+ * <http://wiki.laptop.org/go/Touch_Pad/Tablet>.  It refers to this
+ * device as HGPK (Hybrid GS, PT, and Keymatrix).
+ *
+ * The earliest versions of the device had simultaneous reporting; that
+ * was removed.  After that, the device used the Advanced Mode GS/PT streaming
+ * stuff.  That turned out to be too buggy to support, so we've finally
+ * switched to Mouse Mode (which utilizes only the center 1/3 of the touchpad).
+ */
+
+#define DEBUG
+#include <linux/input.h>
+#include <linux/serio.h>
+#include <linux/libps2.h>
+#include <linux/delay.h>
+#include <asm/olpc.h>
+
+#include "psmouse.h"
+#include "hgpk.h"
+
+static int tpdebug;
+module_param(tpdebug, int, 0644);
+MODULE_PARM_DESC(tpdebug, "enable debugging, dumping packets to KERN_DEBUG.");
+
+static int recalib_delta = 100;
+module_param(recalib_delta, int, 0644);
+MODULE_PARM_DESC(recalib_delta,
+        "packets containing a delta this large will cause a recalibration.");
+
+/*
+ * When the touchpad gets ultra-sensitive, one can keep their finger 1/2"
+ * above the pad and still have it send packets.  This causes a jump cursor
+ * when one places their finger on the pad.  We can probably detect the
+ * jump as we see a large deltas (>= 100px).  In mouse mode, I've been
+ * unable to even come close to 100px deltas during normal usage, so I think
+ * this threshold is safe.  If a large delta occurs, trigger a recalibration.
+ */
+static void hgpk_jumpy_hack(struct psmouse *psmouse, int x, int y)
+{
+        struct hgpk_data *priv = psmouse->private;
+
+        if (abs(x) > recalib_delta || abs(y) > recalib_delta) {
+                hgpk_err(psmouse, ">%dpx jump detected (%d,%d)\n",
+                                recalib_delta, x, y);
+                /* My car gets forty rods to the hogshead and that's the
+                 * way I likes it! */
+                psmouse_queue_work(psmouse, &priv->recalib_wq,
+                                msecs_to_jiffies(1000));
+        }
+}
+
+/*
+ * We have no idea why this particular hardware bug occurs.  The touchpad
+ * will randomly start spewing packets without anything touching the
+ * pad.  This wouldn't necessarily be bad, but it's indicative of a
+ * severely miscalibrated pad; attempting to use the touchpad while it's
+ * spewing means the cursor will jump all over the place, and act "drunk".
+ *
+ * The packets that are spewed tend to all have deltas between -2 and 2, and
+ * the cursor will move around without really going very far.  It will
+ * tend to end up in the same location; if we tally up the changes over
+ * 100 packets, we end up w/ a final delta of close to 0.  This happens
+ * pretty regularly when the touchpad is spewing, and is pretty hard to
+ * manually trigger (at least for *my* fingers).  So, it makes a perfect
+ * scheme for detecting spews.
+ */
+static void hgpk_spewing_hack(struct psmouse *psmouse,
+                              int l, int r, int x, int y)
+{
+        struct hgpk_data *priv = psmouse->private;
+
+        /* ignore button press packets; many in a row could trigger
+         * a false-positive! */
+        if (l || r)
+                return;
+
+        priv->x_tally += x;
+        priv->y_tally += y;
+
+        if (++priv->count > 100) {
+                if (abs(priv->x_tally) < 3 && abs(priv->y_tally) < 3) {
+                        hgpk_dbg(psmouse, "packet spew detected (%d,%d)\n",
+                                 priv->x_tally, priv->y_tally);
+                        psmouse_queue_work(psmouse, &priv->recalib_wq,
+                                           msecs_to_jiffies(1000));
+                }
+                /* reset every 100 packets */
+                priv->count = 0;
+                priv->x_tally = 0;
+                priv->y_tally = 0;
+        }
+}
+
+/*
+ * HGPK Mouse Mode format (standard mouse format, sans middle button)
+ *
+ * byte 0:      y-over  x-over  y-neg   x-neg   1       0       swr     swl
+ * byte 1:      x7      x6      x5      x4      x3      x2      x1      x0
+ * byte 2:      y7      y6      y5      y4      y3      y2      y1      y0
+ *
+ * swr/swl are the left/right buttons.
+ * x-neg/y-neg are the x and y delta negative bits
+ * x-over/y-over are the x and y overflow bits
+ */
+static int hgpk_validate_byte(unsigned char *packet)
+{
+        return (packet[0] & 0x0C) == 0x08;
+}
+
+static void hgpk_process_packet(struct psmouse *psmouse)
+{
+        struct input_dev *dev = psmouse->dev;
+        unsigned char *packet = psmouse->packet;
+        int x, y, left, right;
+
+        left = packet[0] & 1;
+        right = (packet[0] >> 1) & 1;
+
+        x = packet[1] - ((packet[0] << 4) & 0x100);
+        y = ((packet[0] << 3) & 0x100) - packet[2];
+
+        hgpk_jumpy_hack(psmouse, x, y);
+        hgpk_spewing_hack(psmouse, left, right, x, y);
+
+        if (tpdebug)
+                hgpk_dbg(psmouse, "l=%d r=%d x=%d y=%d\n", left, right, x, y);
+
+        input_report_key(dev, BTN_LEFT, left);
+        input_report_key(dev, BTN_RIGHT, right);
+
+        input_report_rel(dev, REL_X, x);
+        input_report_rel(dev, REL_Y, y);
+
+        input_sync(dev);
+}
+
+static psmouse_ret_t hgpk_process_byte(struct psmouse *psmouse)
+{
+        struct hgpk_data *priv = psmouse->private;
+
+        if (hgpk_validate_byte(psmouse->packet)) {
+                hgpk_dbg(psmouse, "%s: (%d) %02x %02x %02x\n",
+                                __func__, psmouse->pktcnt, psmouse->packet[0],
+                                psmouse->packet[1], psmouse->packet[2]);
+                return PSMOUSE_BAD_DATA;
+        }
+
+        if (psmouse->pktcnt >= psmouse->pktsize) {
+                hgpk_process_packet(psmouse);
+                return PSMOUSE_FULL_PACKET;
+        }
+
+        if (priv->recalib_window) {
+                if (time_before(jiffies, priv->recalib_window)) {
+                        /*
+                         * ugh, got a packet inside our recalibration
+                         * window, schedule another recalibration.
+                         */
+                        hgpk_dbg(psmouse,
+                                 "packet inside calibration window, "
+                                 "queueing another recalibration\n");
+                        psmouse_queue_work(psmouse, &priv->recalib_wq,
+                                        msecs_to_jiffies(1000));
+                }
+                priv->recalib_window = 0;
+        }
+
+        return PSMOUSE_GOOD_DATA;
+}
+
+static int hgpk_force_recalibrate(struct psmouse *psmouse)
+{
+        struct ps2dev *ps2dev = &psmouse->ps2dev;
+        struct hgpk_data *priv = psmouse->private;
+
+        /* C-series touchpads added the recalibrate command */
+        if (psmouse->model < HGPK_MODEL_C)
+                return 0;
+
+        /* we don't want to race with the irq handler, nor with resyncs */
+        psmouse_set_state(psmouse, PSMOUSE_INITIALIZING);
+
+        /* start by resetting the device */
+        psmouse_reset(psmouse);
+
+        /* send the recalibrate request */
+        if (ps2_command(ps2dev, NULL, 0xf5) ||
+            ps2_command(ps2dev, NULL, 0xf5) ||
+            ps2_command(ps2dev, NULL, 0xe6) ||
+            ps2_command(ps2dev, NULL, 0xf5)) {
+                return -1;
+        }
+
+        /* according to ALPS, 150mS is required for recalibration */
+        msleep(150);
+
+        /* XXX: If a finger is down during this delay, recalibration will
+         * detect capacitance incorrectly.  This is a hardware bug, and
+         * we don't have a good way to deal with it.  The 2s window stuff
+         * (below) is our best option for now.
+         */
+
+        if (ps2_command(ps2dev, NULL, PSMOUSE_CMD_ENABLE))
+                return -1;
+
+        psmouse_set_state(psmouse, PSMOUSE_ACTIVATED);
+
+        /* After we recalibrate, we shouldn't get any packets for 2s.  If
+         * we do, it's likely that someone's finger was on the touchpad.
+         * If someone's finger *was* on the touchpad, it's probably
+         * miscalibrated.  So, we should schedule another recalibration
+         */
+        priv->recalib_window = jiffies +  msecs_to_jiffies(2000);
+
+        return 0;
+}
+
+/*
+ * This kills power to the touchpad; according to ALPS, current consumption
+ * goes down to 50uA after running this.  To turn power back on, we drive
+ * MS-DAT low.
+ */
+static int hgpk_toggle_power(struct psmouse *psmouse, int enable)
+{
+        struct ps2dev *ps2dev = &psmouse->ps2dev;
+        int timeo;
+
+        /* Added on D-series touchpads */
+        if (psmouse->model < HGPK_MODEL_D)
+                return 0;
+
+        if (enable) {
+                psmouse_set_state(psmouse, PSMOUSE_INITIALIZING);
+
+                /*
+                 * Sending a byte will drive MS-DAT low; this will wake up
+                 * the controller.  Once we get an ACK back from it, it
+                 * means we can continue with the touchpad re-init.  ALPS
+                 * tells us that 1s should be long enough, so set that as
+                 * the upper bound.
+                 */
+                for (timeo = 20; timeo > 0; timeo--) {
+                        if (!ps2_sendbyte(&psmouse->ps2dev,
+                                        PSMOUSE_CMD_DISABLE, 20))
+                                break;
+                        msleep(50);
+                }
+
+                psmouse_reset(psmouse);
+
+                /* should be all set, enable the touchpad */
+                ps2_command(&psmouse->ps2dev, NULL, PSMOUSE_CMD_ENABLE);
+                psmouse_set_state(psmouse, PSMOUSE_ACTIVATED);
+
+        } else {
+                hgpk_dbg(psmouse, "Powering off touchpad.\n");
+                psmouse_set_state(psmouse, PSMOUSE_IGNORE);
+
+                if (ps2_command(ps2dev, NULL, 0xec) ||
+                    ps2_command(ps2dev, NULL, 0xec) ||
+                    ps2_command(ps2dev, NULL, 0xea)) {
+                        return -1;
+                }
+
+                /* probably won't see an ACK, the touchpad will be off */
+                ps2_sendbyte(&psmouse->ps2dev, 0xec, 20);
+        }
+
+        return 0;
+}
+
+static int hgpk_poll(struct psmouse *psmouse)
+{
+        /* We can't poll, so always return failure. */
+        return -1;
+}
+
+static int hgpk_reconnect(struct psmouse *psmouse)
+{
+        /* During suspend/resume the ps2 rails remain powered.  We don't want
+         * to do a reset because it's flush data out of buffers; however,
+         * earlier prototypes (B1) had some brokenness that required a reset. */
+        if (olpc_board_at_least(olpc_board(0xb2)))
+                if (psmouse->ps2dev.serio->dev.power.power_state.event !=
+                                PM_EVENT_ON)
+                        return 0;
+
+        psmouse_reset(psmouse);
+
+        return 0;
+}
+
+static ssize_t hgpk_show_powered(struct psmouse *psmouse, void *data, char *buf)
+{
+        struct hgpk_data *priv = psmouse->private;
+
+        return sprintf(buf, "%d\n", priv->powered);
+}
+
+static ssize_t hgpk_set_powered(struct psmouse *psmouse, void *data,
+                                const char *buf, size_t count)
+{
+        struct hgpk_data *priv = psmouse->private;
+        unsigned long value;
+        int err;
+
+        err = strict_strtoul(buf, 10, &value);
+        if (err || value > 1)
+                return -EINVAL;
+
+        if (value != priv->powered) {
+                /*
+                 * hgpk_toggle_power will deal w/ state so
+                 * we're not racing w/ irq
+                 */
+                err = hgpk_toggle_power(psmouse, value);
+                if (!err)
+                        priv->powered = value;
+        }
+
+        return err ? err : count;
+}
+
+__PSMOUSE_DEFINE_ATTR(powered, S_IWUSR | S_IRUGO, NULL,
+                      hgpk_show_powered, hgpk_set_powered, 0);
+
+static void hgpk_disconnect(struct psmouse *psmouse)
+{
+        struct hgpk_data *priv = psmouse->private;
+
+        device_remove_file(&psmouse->ps2dev.serio->dev,
+                           &psmouse_attr_powered.dattr);
+        psmouse_reset(psmouse);
+        kfree(priv);
+}
+
+static void hgpk_recalib_work(struct work_struct *work)
+{
+        struct delayed_work *w = container_of(work, struct delayed_work, work);
+        struct hgpk_data *priv = container_of(w, struct hgpk_data, recalib_wq);
+        struct psmouse *psmouse = priv->psmouse;
+
+        hgpk_dbg(psmouse, "recalibrating touchpad..\n");
+
+        if (hgpk_force_recalibrate(psmouse))
+                hgpk_err(psmouse, "recalibration failed!\n");
+}
+
+static int hgpk_register(struct psmouse *psmouse)
+{
+        struct input_dev *dev = psmouse->dev;
+        int err;
+
+        /* unset the things that psmouse-base sets which we don't have */
+        __clear_bit(BTN_MIDDLE, dev->keybit);
+
+        /* set the things we do have */
+        __set_bit(EV_KEY, dev->evbit);
+        __set_bit(EV_REL, dev->evbit);
+
+        __set_bit(REL_X, dev->relbit);
+        __set_bit(REL_Y, dev->relbit);
+
+        __set_bit(BTN_LEFT, dev->keybit);
+        __set_bit(BTN_RIGHT, dev->keybit);
+
+        /* register handlers */
+        psmouse->protocol_handler = hgpk_process_byte;
+        psmouse->poll = hgpk_poll;
+        psmouse->disconnect = hgpk_disconnect;
+        psmouse->reconnect = hgpk_reconnect;
+        psmouse->pktsize = 3;
+
+        /* Disable the idle resync. */
+        psmouse->resync_time = 0;
+        /* Reset after a lot of bad bytes. */
+        psmouse->resetafter = 1024;
+
+        err = device_create_file(&psmouse->ps2dev.serio->dev,
+                                 &psmouse_attr_powered.dattr);
+        if (err)
+                hgpk_err(psmouse, "Failed to create sysfs attribute\n");
+
+        return err;
+}
+
+int hgpk_init(struct psmouse *psmouse)
+{
+        struct hgpk_data *priv;
+        int err = -ENOMEM;
+
+        priv = kzalloc(sizeof(struct hgpk_data), GFP_KERNEL);
+        if (!priv)
+                goto alloc_fail;
+
+        psmouse->private = priv;
+        priv->psmouse = psmouse;
+        priv->powered = 1;
+        INIT_DELAYED_WORK(&priv->recalib_wq, hgpk_recalib_work);
+
+        err = psmouse_reset(psmouse);
+        if (err)
+                goto init_fail;
+
+        err = hgpk_register(psmouse);
+        if (err)
+                goto init_fail;
+
+        return 0;
+
+init_fail:
+        kfree(priv);
+alloc_fail:
+        return err;
+}
+
+static enum hgpk_model_t hgpk_get_model(struct psmouse *psmouse)
+{
+        struct ps2dev *ps2dev = &psmouse->ps2dev;
+        unsigned char param[3];
+
+        /* E7, E7, E7, E9 gets us a 3 byte identifier */
+        if (ps2_command(ps2dev,  NULL, PSMOUSE_CMD_SETSCALE21) ||
+            ps2_command(ps2dev,  NULL, PSMOUSE_CMD_SETSCALE21) ||
+            ps2_command(ps2dev,  NULL, PSMOUSE_CMD_SETSCALE21) ||
+            ps2_command(ps2dev, param, PSMOUSE_CMD_GETINFO)) {
+                return -EIO;
+        }
+
+        hgpk_dbg(psmouse, "ID: %02x %02x %02x", param[0], param[1], param[2]);
+
+        /* HGPK signature: 0x67, 0x00, 0x<model> */
+        if (param[0] != 0x67 || param[1] != 0x00)
+                return -ENODEV;
+
+        hgpk_info(psmouse, "OLPC touchpad revision 0x%x\n", param[2]);
+
+        return param[2];
+}
+
+int hgpk_detect(struct psmouse *psmouse, int set_properties)
+{
+        int version;
+
+        version = hgpk_get_model(psmouse);
+        if (version < 0)
+                return version;
+
+        if (set_properties) {
+                psmouse->vendor = "ALPS";
+                psmouse->name = "HGPK";
+                psmouse->model = version;
+        }
+
+        return 0;
+}
diff --git a/drivers/input/mouse/hgpk.h b/drivers/input/mouse/hgpk.h
new file mode 100644
index 000000000000..a4b2a96f5f54
--- /dev/null
+++ b/drivers/input/mouse/hgpk.h
@@ -0,0 +1,49 @@
+/*
+ * OLPC HGPK (XO-1) touchpad PS/2 mouse driver
+ */
+
+#ifndef _HGPK_H
+#define _HGPK_H
+
+enum hgpk_model_t {
+        HGPK_MODEL_PREA = 0x0a, /* pre-B1s */
+        HGPK_MODEL_A = 0x14,    /* found on B1s, PT disabled in hardware */
+        HGPK_MODEL_B = 0x28,    /* B2s, has capacitance issues */
+        HGPK_MODEL_C = 0x3c,
+        HGPK_MODEL_D = 0x50,    /* C1, mass production */
+};
+
+struct hgpk_data {
+        struct psmouse *psmouse;
+        int powered;
+        int count, x_tally, y_tally;    /* hardware workaround stuff */
+        unsigned long recalib_window;
+        struct delayed_work recalib_wq;
+};
+
+#define hgpk_dbg(psmouse, format, arg...)               \
+        dev_dbg(&(psmouse)->ps2dev.serio->dev, format, ## arg)
+#define hgpk_err(psmouse, format, arg...)               \
+        dev_err(&(psmouse)->ps2dev.serio->dev, format, ## arg)
+#define hgpk_info(psmouse, format, arg...)              \
+        dev_info(&(psmouse)->ps2dev.serio->dev, format, ## arg)
+#define hgpk_warn(psmouse, format, arg...)              \
+        dev_warn(&(psmouse)->ps2dev.serio->dev, format, ## arg)
+#define hgpk_notice(psmouse, format, arg...)            \
+        dev_notice(&(psmouse)->ps2dev.serio->dev, format, ## arg)
+
+#ifdef CONFIG_MOUSE_PS2_OLPC
+int hgpk_detect(struct psmouse *psmouse, int set_properties);
+int hgpk_init(struct psmouse *psmouse);
+#else
+static inline int hgpk_detect(struct psmouse *psmouse, int set_properties)
+{
+        return -ENODEV;
+}
+static inline int hgpk_init(struct psmouse *psmouse)
+{
+        return -ENODEV;
+}
+#endif
+
+#endif
diff --git a/drivers/input/mouse/logips2pp.c b/drivers/input/mouse/logips2pp.c
index 0c5660d28caa..390f1dbb98a4 100644
--- a/drivers/input/mouse/logips2pp.c
+++ b/drivers/input/mouse/logips2pp.c
@@ -157,10 +157,8 @@ static ssize_t ps2pp_attr_show_smartscroll(struct psmouse *psmouse, void *data,
 static ssize_t ps2pp_attr_set_smartscroll(struct psmouse *psmouse, void *data, const char *buf, size_t count)
 {
         unsigned long value;
-        char *rest;
 
-        value = simple_strtoul(buf, &rest, 10);
-        if (*rest || value > 1)
+        if (strict_strtoul(buf, 10, &value) || value > 1)
                 return -EINVAL;
 
         ps2pp_set_smartscroll(psmouse, value);
diff --git a/drivers/input/mouse/psmouse-base.c b/drivers/input/mouse/psmouse-base.c
index f5a6be1d3c46..126e977e199e 100644
--- a/drivers/input/mouse/psmouse-base.c
+++ b/drivers/input/mouse/psmouse-base.c
@@ -25,6 +25,7 @@
 #include "synaptics.h"
 #include "logips2pp.h"
 #include "alps.h"
+#include "hgpk.h"
 #include "lifebook.h"
 #include "trackpoint.h"
 #include "touchkit_ps2.h"
@@ -201,6 +202,12 @@ static psmouse_ret_t psmouse_process_byte(struct psmouse *psmouse)
         return PSMOUSE_FULL_PACKET;
 }
 
+void psmouse_queue_work(struct psmouse *psmouse, struct delayed_work *work,
+                unsigned long delay)
+{
+        queue_delayed_work(kpsmoused_wq, work, delay);
+}
+
 /*
  * __psmouse_set_state() sets new psmouse state and resets all flags.
  */
@@ -220,7 +227,7 @@ static inline void __psmouse_set_state(struct psmouse *psmouse, enum psmouse_sta
  * is not a concern.
  */
 
-static void psmouse_set_state(struct psmouse *psmouse, enum psmouse_state new_state)
+void psmouse_set_state(struct psmouse *psmouse, enum psmouse_state new_state)
 {
         serio_pause_rx(psmouse->ps2dev.serio);
         __psmouse_set_state(psmouse, new_state);
@@ -305,7 +312,7 @@ static irqreturn_t psmouse_interrupt(struct serio *serio,
                        psmouse->name, psmouse->phys, psmouse->pktcnt);
                 psmouse->badbyte = psmouse->packet[0];
                 __psmouse_set_state(psmouse, PSMOUSE_RESYNCING);
-                queue_work(kpsmoused_wq, &psmouse->resync_work);
+                psmouse_queue_work(psmouse, &psmouse->resync_work, 0);
                 goto out;
         }
 
@@ -342,7 +349,7 @@ static irqreturn_t psmouse_interrupt(struct serio *serio,
             time_after(jiffies, psmouse->last + psmouse->resync_time * HZ)) {
                 psmouse->badbyte = psmouse->packet[0];
                 __psmouse_set_state(psmouse, PSMOUSE_RESYNCING);
-                queue_work(kpsmoused_wq, &psmouse->resync_work);
+                psmouse_queue_work(psmouse, &psmouse->resync_work, 0);
                 goto out;
         }
 
@@ -630,8 +637,20 @@ static int psmouse_extensions(struct psmouse *psmouse,
                 }
         }
 
-        if (max_proto > PSMOUSE_IMEX) {
+/*
+ * Try OLPC HGPK touchpad.
+ */
+        if (max_proto > PSMOUSE_IMEX &&
+                        hgpk_detect(psmouse, set_properties) == 0) {
+                if (!set_properties || hgpk_init(psmouse) == 0)
+                        return PSMOUSE_HGPK;
+/*
+ * Init failed, try basic relative protocols
+ */
+                max_proto = PSMOUSE_IMEX;
+        }
 
+        if (max_proto > PSMOUSE_IMEX) {
                 if (genius_detect(psmouse, set_properties) == 0)
                         return PSMOUSE_GENPS;
 
@@ -762,6 +781,14 @@ static const struct psmouse_protocol psmouse_protocols[] = {
                 .detect         = touchkit_ps2_detect,
         },
 #endif
+#ifdef CONFIG_MOUSE_PS2_OLPC
+        {
+                .type           = PSMOUSE_HGPK,
+                .name           = "OLPC HGPK",
+                .alias          = "hgpk",
+                .detect         = hgpk_detect,
+        },
+#endif
         {
                 .type           = PSMOUSE_CORTRON,
                 .name           = "CortronPS/2",
@@ -935,7 +962,7 @@ static int psmouse_poll(struct psmouse *psmouse)
 static void psmouse_resync(struct work_struct *work)
 {
         struct psmouse *parent = NULL, *psmouse =
-                container_of(work, struct psmouse, resync_work);
+                container_of(work, struct psmouse, resync_work.work);
         struct serio *serio = psmouse->ps2dev.serio;
         psmouse_ret_t rc = PSMOUSE_GOOD_DATA;
         int failed = 0, enabled = 0;
@@ -1194,7 +1221,7 @@ static int psmouse_connect(struct serio *serio, struct serio_driver *drv)
                 goto err_free;
 
         ps2_init(&psmouse->ps2dev, serio);
-        INIT_WORK(&psmouse->resync_work, psmouse_resync);
+        INIT_DELAYED_WORK(&psmouse->resync_work, psmouse_resync);
         psmouse->dev = input_dev;
         snprintf(psmouse->phys, sizeof(psmouse->phys), "%s/input0", serio->phys);
 
@@ -1395,25 +1422,29 @@ ssize_t psmouse_attr_set_helper(struct device *dev, struct device_attribute *dev
 
         psmouse = serio_get_drvdata(serio);
 
-        if (psmouse->state == PSMOUSE_IGNORE) {
-                retval = -ENODEV;
-                goto out_unlock;
-        }
+        if (attr->protect) {
+                if (psmouse->state == PSMOUSE_IGNORE) {
+                        retval = -ENODEV;
+                        goto out_unlock;
+                }
 
-        if (serio->parent && serio->id.type == SERIO_PS_PSTHRU) {
-                parent = serio_get_drvdata(serio->parent);
-                psmouse_deactivate(parent);
-        }
+                if (serio->parent && serio->id.type == SERIO_PS_PSTHRU) {
+                        parent = serio_get_drvdata(serio->parent);
+                        psmouse_deactivate(parent);
+                }
 
-        psmouse_deactivate(psmouse);
+                psmouse_deactivate(psmouse);
+        }
 
         retval = attr->set(psmouse, attr->data, buf, count);
 
-        if (retval != -ENODEV)
-                psmouse_activate(psmouse);
+        if (attr->protect) {
+                if (retval != -ENODEV)
+                        psmouse_activate(psmouse);
 
-        if (parent)
-                psmouse_activate(parent);
+                if (parent)
+                        psmouse_activate(parent);
+        }
 
  out_unlock:
         mutex_unlock(&psmouse_mutex);
@@ -1433,10 +1464,8 @@ static ssize_t psmouse_set_int_attr(struct psmouse *psmouse, void *offset, const
 {
         unsigned int *field = (unsigned int *)((char *)psmouse + (size_t)offset);
         unsigned long value;
-        char *rest;
 
-        value = simple_strtoul(buf, &rest, 10);
-        if (*rest)
+        if (strict_strtoul(buf, 10, &value))
                 return -EINVAL;
 
         if ((unsigned int)value != value)
@@ -1549,10 +1578,8 @@ static ssize_t psmouse_attr_set_protocol(struct psmouse *psmouse, void *data, co
 static ssize_t psmouse_attr_set_rate(struct psmouse *psmouse, void *data, const char *buf, size_t count)
 {
         unsigned long value;
-        char *rest;
 
-        value = simple_strtoul(buf, &rest, 10);
-        if (*rest)
+        if (strict_strtoul(buf, 10, &value))
                 return -EINVAL;
 
         psmouse->set_rate(psmouse, value);
@@ -1562,10 +1589,8 @@ static ssize_t psmouse_attr_set_rate(struct psmouse *psmouse, void *data, const
 static ssize_t psmouse_attr_set_resolution(struct psmouse *psmouse, void *data, const char *buf, size_t count)
 {
         unsigned long value;
-        char *rest;
 
-        value = simple_strtoul(buf, &rest, 10);
-        if (*rest)
+        if (strict_strtoul(buf, 10, &value))
                 return -EINVAL;
 
         psmouse->set_resolution(psmouse, value);
diff --git a/drivers/input/mouse/psmouse.h b/drivers/input/mouse/psmouse.h
index 1317bdd8cc7c..8b608a1cdd12 100644
--- a/drivers/input/mouse/psmouse.h
+++ b/drivers/input/mouse/psmouse.h
@@ -39,7 +39,7 @@ struct psmouse {
         void *private;
         struct input_dev *dev;
         struct ps2dev ps2dev;
-        struct work_struct resync_work;
+        struct delayed_work resync_work;
         char *vendor;
         char *name;
         unsigned char packet[8];
@@ -89,20 +89,24 @@ enum psmouse_type {
         PSMOUSE_TRACKPOINT,
         PSMOUSE_TOUCHKIT_PS2,
         PSMOUSE_CORTRON,
+        PSMOUSE_HGPK,
         PSMOUSE_AUTO            /* This one should always be last */
 };
 
+void psmouse_queue_work(struct psmouse *psmouse, struct delayed_work *work,
+                unsigned long delay);
 int psmouse_sliced_command(struct psmouse *psmouse, unsigned char command);
 int psmouse_reset(struct psmouse *psmouse);
+void psmouse_set_state(struct psmouse *psmouse, enum psmouse_state new_state);
 void psmouse_set_resolution(struct psmouse *psmouse, unsigned int resolution);
 
-
 struct psmouse_attribute {
         struct device_attribute dattr;
         void *data;
         ssize_t (*show)(struct psmouse *psmouse, void *data, char *buf);
         ssize_t (*set)(struct psmouse *psmouse, void *data,
                         const char *buf, size_t count);
+        int protect;
 };
 #define to_psmouse_attr(a)      container_of((a), struct psmouse_attribute, dattr)
 
@@ -111,7 +115,7 @@ ssize_t psmouse_attr_show_helper(struct device *dev, struct device_attribute *at
 ssize_t psmouse_attr_set_helper(struct device *dev, struct device_attribute *attr,
                                 const char *buf, size_t count);
 
-#define PSMOUSE_DEFINE_ATTR(_name, _mode, _data, _show, _set)                   \
+#define __PSMOUSE_DEFINE_ATTR(_name, _mode, _data, _show, _set, _protect)       \
 static ssize_t _show(struct psmouse *, void *data, char *);                     \
 static ssize_t _set(struct psmouse *, void *data, const char *, size_t);        \
 static struct psmouse_attribute psmouse_attr_##_name = {                        \
@@ -126,6 +130,10 @@ static struct psmouse_attribute psmouse_attr_##_name = {			\
         .data   = _data,                                                        \
         .show   = _show,                                                        \
         .set    = _set,                                                         \
+        .protect = _protect,                                                    \
 }
 
+#define PSMOUSE_DEFINE_ATTR(_name, _mode, _data, _show, _set)   \
+                __PSMOUSE_DEFINE_ATTR(_name, _mode, _data, _show, _set, 1)
+
 #endif /* _PSMOUSE_H */
diff --git a/drivers/input/mouse/trackpoint.c b/drivers/input/mouse/trackpoint.c
index 26b845fc186a..e68c814c4361 100644
--- a/drivers/input/mouse/trackpoint.c
+++ b/drivers/input/mouse/trackpoint.c
@@ -89,10 +89,8 @@ static ssize_t trackpoint_set_int_attr(struct psmouse *psmouse, void *data,
         struct trackpoint_attr_data *attr = data;
         unsigned char *field = (unsigned char *)((char *)tp + attr->field_offset);
         unsigned long value;
-        char *rest;
 
-        value = simple_strtoul(buf, &rest, 10);
-        if (*rest || value > 255)
+        if (strict_strtoul(buf, 10, &value) || value > 255)
                 return -EINVAL;
 
         *field = value;
@@ -117,10 +115,8 @@ static ssize_t trackpoint_set_bit_attr(struct psmouse *psmouse, void *data,
         struct trackpoint_attr_data *attr = data;
         unsigned char *field = (unsigned char *)((char *)tp + attr->field_offset);
         unsigned long value;
-        char *rest;
 
-        value = simple_strtoul(buf, &rest, 10);
-        if (*rest || value > 1)
+        if (strict_strtoul(buf, 10, &value) || value > 1)
                 return -EINVAL;
 
         if (attr->inverted)
diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index 5aafe24984c5..a321aea2c7b5 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -322,6 +322,13 @@ static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = {
                         DMI_MATCH(DMI_PRODUCT_NAME, "N34AS6"),
                 },
         },
+        {
+                .ident = "IBM 2656",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "2656"),
+                },
+        },
         { }
 };
 
diff --git a/drivers/input/serio/serio_raw.c b/drivers/input/serio/serio_raw.c
index c9397c8ee97e..470770c09260 100644
--- a/drivers/input/serio/serio_raw.c
+++ b/drivers/input/serio/serio_raw.c
@@ -373,6 +373,12 @@ static struct serio_device_id serio_raw_serio_ids[] = {
                 .id     = SERIO_ANY,
                 .extra  = SERIO_ANY,
         },
+        {
+                .type   = SERIO_8042_XL,
+                .proto  = SERIO_ANY,
+                .id     = SERIO_ANY,
+                .extra  = SERIO_ANY,
+        },
         { 0 }
 };
 
diff --git a/drivers/input/tablet/aiptek.c b/drivers/input/tablet/aiptek.c
index 8f037a1d44a6..e53c838f1866 100644
--- a/drivers/input/tablet/aiptek.c
+++ b/drivers/input/tablet/aiptek.c
@@ -1202,16 +1202,22 @@ static ssize_t
 store_tabletXtilt(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 {
         struct aiptek *aiptek = dev_get_drvdata(dev);
-        int x;
+        long x;
+
+        if (strict_strtol(buf, 10, &x)) {
+                size_t len = buf[count - 1] == '\n' ? count - 1 : count;
+
+                if (strncmp(buf, "disable", len))
+                        return -EINVAL;
 
-        if (strcmp(buf, "disable") == 0) {
                 aiptek->newSetting.xTilt = AIPTEK_TILT_DISABLE;
         } else {
-                x = (int)simple_strtol(buf, NULL, 10);
-                if (x >= AIPTEK_TILT_MIN && x <= AIPTEK_TILT_MAX) {
-                        aiptek->newSetting.xTilt = x;
-                }
+                if (x < AIPTEK_TILT_MIN || x > AIPTEK_TILT_MAX)
+                        return -EINVAL;
+
+                aiptek->newSetting.xTilt = x;
         }
+
         return count;
 }
 
@@ -1238,16 +1244,22 @@ static ssize_t
 store_tabletYtilt(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 {
         struct aiptek *aiptek = dev_get_drvdata(dev);
-        int y;
+        long y;
+
+        if (strict_strtol(buf, 10, &y)) {
+                size_t len = buf[count - 1] == '\n' ? count - 1 : count;
+
+                if (strncmp(buf, "disable", len))
+                        return -EINVAL;
 
-        if (strcmp(buf, "disable") == 0) {
                 aiptek->newSetting.yTilt = AIPTEK_TILT_DISABLE;
         } else {
-                y = (int)simple_strtol(buf, NULL, 10);
-                if (y >= AIPTEK_TILT_MIN && y <= AIPTEK_TILT_MAX) {
-                        aiptek->newSetting.yTilt = y;
-                }
+                if (y < AIPTEK_TILT_MIN || y > AIPTEK_TILT_MAX)
+                        return -EINVAL;
+
+                aiptek->newSetting.yTilt = y;
         }
+
         return count;
 }
 
@@ -1269,8 +1281,12 @@ static ssize_t
 store_tabletJitterDelay(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 {
         struct aiptek *aiptek = dev_get_drvdata(dev);
+        long j;
+
+        if (strict_strtol(buf, 10, &j))
+                return -EINVAL;
 
-        aiptek->newSetting.jitterDelay = (int)simple_strtol(buf, NULL, 10);
+        aiptek->newSetting.jitterDelay = (int)j;
         return count;
 }
 
@@ -1294,8 +1310,12 @@ static ssize_t
 store_tabletProgrammableDelay(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 {
         struct aiptek *aiptek = dev_get_drvdata(dev);
+        long d;
 
-        aiptek->newSetting.programmableDelay = (int)simple_strtol(buf, NULL, 10);
+        if (strict_strtol(buf, 10, &d))
+                return -EINVAL;
+
+        aiptek->newSetting.programmableDelay = (int)d;
         return count;
 }
 
@@ -1541,8 +1561,11 @@ static ssize_t
 store_tabletWheel(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 {
         struct aiptek *aiptek = dev_get_drvdata(dev);
+        long w;
+
+        if (strict_strtol(buf, 10, &w)) return -EINVAL;
 
-        aiptek->newSetting.wheel = (int)simple_strtol(buf, NULL, 10);
+        aiptek->newSetting.wheel = (int)w;
         return count;
 }
 
diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c
index 8583c766d565..b9b7fc6ff1eb 100644
--- a/drivers/input/touchscreen/ads7846.c
+++ b/drivers/input/touchscreen/ads7846.c
@@ -69,6 +69,17 @@ struct ts_event {
         int     ignore;
 };
 
+/*
+ * We allocate this separately to avoid cache line sharing issues when
+ * driver is used with DMA-based SPI controllers (like atmel_spi) on
+ * systems where main memory is not DMA-coherent (most non-x86 boards).
+ */
+struct ads7846_packet {
+        u8                      read_x, read_y, read_z1, read_z2, pwrdown;
+        u16                     dummy;          /* for the pwrdown read */
+        struct ts_event         tc;
+};
+
 struct ads7846 {
         struct input_dev        *input;
         char                    phys[32];
@@ -86,9 +97,7 @@ struct ads7846 {
         u16                     x_plate_ohms;
         u16                     pressure_max;
 
-        u8                      read_x, read_y, read_z1, read_z2, pwrdown;
-        u16                     dummy;          /* for the pwrdown read */
-        struct ts_event         tc;
+        struct ads7846_packet   *packet;
 
         struct spi_transfer     xfer[18];
         struct spi_message      msg[5];
@@ -463,10 +472,11 @@ static ssize_t ads7846_disable_store(struct device *dev,
                                      const char *buf, size_t count)
 {
         struct ads7846 *ts = dev_get_drvdata(dev);
-        char *endp;
-        int i;
+        long i;
+
+        if (strict_strtoul(buf, 10, &i))
+                return -EINVAL;
 
-        i = simple_strtoul(buf, &endp, 10);
         spin_lock_irq(&ts->lock);
 
         if (i)
@@ -512,16 +522,17 @@ static int get_pendown_state(struct ads7846 *ts)
 static void ads7846_rx(void *ads)
 {
         struct ads7846          *ts = ads;
+        struct ads7846_packet   *packet = ts->packet;
         unsigned                Rt;
         u16                     x, y, z1, z2;
 
         /* ads7846_rx_val() did in-place conversion (including byteswap) from
          * on-the-wire format as part of debouncing to get stable readings.
          */
-        x = ts->tc.x;
-        y = ts->tc.y;
-        z1 = ts->tc.z1;
-        z2 = ts->tc.z2;
+        x = packet->tc.x;
+        y = packet->tc.y;
+        z1 = packet->tc.z1;
+        z2 = packet->tc.z2;
 
         /* range filtering */
         if (x == MAX_12BIT)
@@ -545,10 +556,10 @@ static void ads7846_rx(void *ads)
          * the maximum. Don't report it to user space, repeat at least
          * once more the measurement
          */
-        if (ts->tc.ignore || Rt > ts->pressure_max) {
+        if (packet->tc.ignore || Rt > ts->pressure_max) {
 #ifdef VERBOSE
                 pr_debug("%s: ignored %d pressure %d\n",
-                        ts->spi->dev.bus_id, ts->tc.ignore, Rt);
+                        ts->spi->dev.bus_id, packet->tc.ignore, Rt);
 #endif
                 hrtimer_start(&ts->timer, ktime_set(0, TS_POLL_PERIOD),
                               HRTIMER_MODE_REL);
@@ -641,6 +652,7 @@ static int ads7846_no_filter(void *ads, int data_idx, int *val)
 static void ads7846_rx_val(void *ads)
 {
         struct ads7846 *ts = ads;
+        struct ads7846_packet *packet = ts->packet;
         struct spi_message *m;
         struct spi_transfer *t;
         int val;
@@ -660,7 +672,7 @@ static void ads7846_rx_val(void *ads)
         case ADS7846_FILTER_REPEAT:
                 break;
         case ADS7846_FILTER_IGNORE:
-                ts->tc.ignore = 1;
+                packet->tc.ignore = 1;
                 /* Last message will contain ads7846_rx() as the
                  * completion function.
                  */
@@ -668,7 +680,7 @@ static void ads7846_rx_val(void *ads)
                 break;
         case ADS7846_FILTER_OK:
                 *(u16 *)t->rx_buf = val;
-                ts->tc.ignore = 0;
+                packet->tc.ignore = 0;
                 m = &ts->msg[++ts->msg_idx];
                 break;
         default:
@@ -773,7 +785,6 @@ static void ads7846_disable(struct ads7846 *ts)
         /* we know the chip's in lowpower mode since we always
          * leave it that way after every request
          */
-
 }
 
 /* Must be called with ts->lock held */
@@ -849,6 +860,7 @@ static int __devinit setup_pendown(struct spi_device *spi, struct ads7846 *ts)
 static int __devinit ads7846_probe(struct spi_device *spi)
 {
         struct ads7846                  *ts;
+        struct ads7846_packet           *packet;
         struct input_dev                *input_dev;
         struct ads7846_platform_data    *pdata = spi->dev.platform_data;
         struct spi_message              *m;
@@ -884,14 +896,16 @@ static int __devinit ads7846_probe(struct spi_device *spi)
                 return err;
 
         ts = kzalloc(sizeof(struct ads7846), GFP_KERNEL);
+        packet = kzalloc(sizeof(struct ads7846_packet), GFP_KERNEL);
         input_dev = input_allocate_device();
-        if (!ts || !input_dev) {
+        if (!ts || !packet || !input_dev) {
                 err = -ENOMEM;
                 goto err_free_mem;
         }
 
         dev_set_drvdata(&spi->dev, ts);
 
+        ts->packet = packet;
         ts->spi = spi;
         ts->input = input_dev;
         ts->vref_mv = pdata->vref_mv;
@@ -963,13 +977,13 @@ static int __devinit ads7846_probe(struct spi_device *spi)
         spi_message_init(m);
 
         /* y- still on; turn on only y+ (and ADC) */
-        ts->read_y = READ_Y(vref);
-        x->tx_buf = &ts->read_y;
+        packet->read_y = READ_Y(vref);
+        x->tx_buf = &packet->read_y;
         x->len = 1;
         spi_message_add_tail(x, m);
 
         x++;
-        x->rx_buf = &ts->tc.y;
+        x->rx_buf = &packet->tc.y;
         x->len = 2;
         spi_message_add_tail(x, m);
 
@@ -981,12 +995,12 @@ static int __devinit ads7846_probe(struct spi_device *spi)
                 x->delay_usecs = pdata->settle_delay_usecs;
 
                 x++;
-                x->tx_buf = &ts->read_y;
+                x->tx_buf = &packet->read_y;
                 x->len = 1;
                 spi_message_add_tail(x, m);
 
                 x++;
-                x->rx_buf = &ts->tc.y;
+                x->rx_buf = &packet->tc.y;
                 x->len = 2;
                 spi_message_add_tail(x, m);
         }
@@ -999,13 +1013,13 @@ static int __devinit ads7846_probe(struct spi_device *spi)
 
         /* turn y- off, x+ on, then leave in lowpower */
         x++;
-        ts->read_x = READ_X(vref);
-        x->tx_buf = &ts->read_x;
+        packet->read_x = READ_X(vref);
+        x->tx_buf = &packet->read_x;
         x->len = 1;
         spi_message_add_tail(x, m);
 
         x++;
-        x->rx_buf = &ts->tc.x;
+        x->rx_buf = &packet->tc.x;
         x->len = 2;
         spi_message_add_tail(x, m);
 
@@ -1014,12 +1028,12 @@ static int __devinit ads7846_probe(struct spi_device *spi)
                 x->delay_usecs = pdata->settle_delay_usecs;
 
                 x++;
-                x->tx_buf = &ts->read_x;
+                x->tx_buf = &packet->read_x;
                 x->len = 1;
                 spi_message_add_tail(x, m);
 
                 x++;
-                x->rx_buf = &ts->tc.x;
+                x->rx_buf = &packet->tc.x;
                 x->len = 2;
                 spi_message_add_tail(x, m);
         }
@@ -1033,13 +1047,13 @@ static int __devinit ads7846_probe(struct spi_device *spi)
                 spi_message_init(m);
 
                 x++;
-                ts->read_z1 = READ_Z1(vref);
-                x->tx_buf = &ts->read_z1;
+                packet->read_z1 = READ_Z1(vref);
+                x->tx_buf = &packet->read_z1;
                 x->len = 1;
                 spi_message_add_tail(x, m);
 
                 x++;
-                x->rx_buf = &ts->tc.z1;
+                x->rx_buf = &packet->tc.z1;
                 x->len = 2;
                 spi_message_add_tail(x, m);
 
@@ -1048,12 +1062,12 @@ static int __devinit ads7846_probe(struct spi_device *spi)
                         x->delay_usecs = pdata->settle_delay_usecs;
 
                         x++;
-                        x->tx_buf = &ts->read_z1;
+                        x->tx_buf = &packet->read_z1;
                         x->len = 1;
                         spi_message_add_tail(x, m);
 
                         x++;
-                        x->rx_buf = &ts->tc.z1;
+                        x->rx_buf = &packet->tc.z1;
                         x->len = 2;
                         spi_message_add_tail(x, m);
                 }
@@ -1065,13 +1079,13 @@ static int __devinit ads7846_probe(struct spi_device *spi)
                 spi_message_init(m);
 
                 x++;
-                ts->read_z2 = READ_Z2(vref);
-                x->tx_buf = &ts->read_z2;
+                packet->read_z2 = READ_Z2(vref);
+                x->tx_buf = &packet->read_z2;
                 x->len = 1;
                 spi_message_add_tail(x, m);
 
                 x++;
-                x->rx_buf = &ts->tc.z2;
+                x->rx_buf = &packet->tc.z2;
                 x->len = 2;
                 spi_message_add_tail(x, m);
 
@@ -1080,12 +1094,12 @@ static int __devinit ads7846_probe(struct spi_device *spi)
                         x->delay_usecs = pdata->settle_delay_usecs;
 
                         x++;
-                        x->tx_buf = &ts->read_z2;
+                        x->tx_buf = &packet->read_z2;
                         x->len = 1;
                         spi_message_add_tail(x, m);
 
                         x++;
-                        x->rx_buf = &ts->tc.z2;
+                        x->rx_buf = &packet->tc.z2;
                         x->len = 2;
                         spi_message_add_tail(x, m);
                 }
@@ -1099,13 +1113,13 @@ static int __devinit ads7846_probe(struct spi_device *spi)
         spi_message_init(m);
 
         x++;
-        ts->pwrdown = PWRDOWN;
-        x->tx_buf = &ts->pwrdown;
+        packet->pwrdown = PWRDOWN;
+        x->tx_buf = &packet->pwrdown;
         x->len = 1;
         spi_message_add_tail(x, m);
 
         x++;
-        x->rx_buf = &ts->dummy;
+        x->rx_buf = &packet->dummy;
         x->len = 2;
         CS_CHANGE(*x);
         spi_message_add_tail(x, m);
@@ -1158,6 +1172,7 @@ static int __devinit ads7846_probe(struct spi_device *spi)
                 ts->filter_cleanup(ts->filter_data);
  err_free_mem:
         input_free_device(input_dev);
+        kfree(packet);
         kfree(ts);
         return err;
 }
@@ -1183,6 +1198,7 @@ static int __devexit ads7846_remove(struct spi_device *spi)
         if (ts->filter_cleanup)
                 ts->filter_cleanup(ts->filter_data);
 
+        kfree(ts->packet);
         kfree(ts);
 
         dev_dbg(&spi->dev, "unregistered touchscreen\n");
diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c
index eee126b19e8b..a89a6a8f05e6 100644
--- a/drivers/input/touchscreen/atmel_tsadcc.c
+++ b/drivers/input/touchscreen/atmel_tsadcc.c
@@ -91,6 +91,9 @@ struct atmel_tsadcc {
         char                    phys[32];
         struct clk              *clk;
         int                     irq;
+        unsigned int            prev_absx;
+        unsigned int            prev_absy;
+        unsigned char           bufferedmeasure;
 };
 
 static void __iomem             *tsc_base;
@@ -100,10 +103,9 @@ static void __iomem		*tsc_base;
 
 static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev)
 {
-        struct input_dev *input_dev = ((struct atmel_tsadcc *)dev)->input;
+        struct atmel_tsadcc     *ts_dev = (struct atmel_tsadcc *)dev;
+        struct input_dev        *input_dev = ts_dev->input;
 
-        unsigned int absx;
-        unsigned int absy;
         unsigned int status;
         unsigned int reg;
 
@@ -121,6 +123,7 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev)
                 atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
 
                 input_report_key(input_dev, BTN_TOUCH, 0);
+                ts_dev->bufferedmeasure = 0;
                 input_sync(input_dev);
 
         } else if (status & ATMEL_TSADCC_PENCNT) {
@@ -138,16 +141,23 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev)
         } else if (status & ATMEL_TSADCC_EOC(3)) {
                 /* Conversion finished */
 
-                absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10;
-                absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2);
-
-                absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10;
-                absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0);
-
-                input_report_abs(input_dev, ABS_X, absx);
-                input_report_abs(input_dev, ABS_Y, absy);
-                input_report_key(input_dev, BTN_TOUCH, 1);
-                input_sync(input_dev);
+                if (ts_dev->bufferedmeasure) {
+                        /* Last measurement is always discarded, since it can
+                         * be erroneous.
+                         * Always report previous measurement */
+                        input_report_abs(input_dev, ABS_X, ts_dev->prev_absx);
+                        input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy);
+                        input_report_key(input_dev, BTN_TOUCH, 1);
+                        input_sync(input_dev);
+                } else
+                        ts_dev->bufferedmeasure = 1;
+
+                /* Now make new measurement */
+                ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10;
+                ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2);
+
+                ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10;
+                ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0);
         }
 
         return IRQ_HANDLED;
@@ -223,6 +233,7 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev)
         }
 
         ts_dev->input = input_dev;
+        ts_dev->bufferedmeasure = 0;
 
         snprintf(ts_dev->phys, sizeof(ts_dev->phys),
                  "%s/input0", pdev->dev.bus_id);
diff --git a/drivers/input/touchscreen/mainstone-wm97xx.c b/drivers/input/touchscreen/mainstone-wm97xx.c
index 37a555f37306..ba648750a8d9 100644
--- a/drivers/input/touchscreen/mainstone-wm97xx.c
+++ b/drivers/input/touchscreen/mainstone-wm97xx.c
@@ -3,8 +3,7 @@
  *                         Wolfson WM97xx AC97 Codecs.
  *
  * Copyright 2004, 2007 Wolfson Microelectronics PLC.
- * Author: Liam Girdwood
- *         liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
+ * Author: Liam Girdwood <lrg@slimlogic.co.uk>
  * Parts Copyright : Ian Molton <spyro@f2s.com>
  *                   Andrew Zabolotny <zap@homelink.ru>
  *
@@ -296,6 +295,6 @@ module_init(mainstone_wm97xx_init);
 module_exit(mainstone_wm97xx_exit);
 
 /* Module information */
-MODULE_AUTHOR("Liam Girdwood <liam.girdwood@wolfsonmicro.com>");
+MODULE_AUTHOR("Liam Girdwood <lrg@slimlogic.co.uk>");
 MODULE_DESCRIPTION("wm97xx continuous touch driver for mainstone");
 MODULE_LICENSE("GPL");
diff --git a/drivers/input/touchscreen/wm9705.c b/drivers/input/touchscreen/wm9705.c
index 372efbc694ff..6b5be742c27d 100644
--- a/drivers/input/touchscreen/wm9705.c
+++ b/drivers/input/touchscreen/wm9705.c
@@ -2,8 +2,7 @@
  * wm9705.c  --  Codec driver for Wolfson WM9705 AC97 Codec.
  *
  * Copyright 2003, 2004, 2005, 2006, 2007 Wolfson Microelectronics PLC.
- * Author: Liam Girdwood
- *         liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
+ * Author: Liam Girdwood <lrg@slimlogic.co.uk>
  * Parts Copyright : Ian Molton <spyro@f2s.com>
  *                   Andrew Zabolotny <zap@homelink.ru>
  *                   Russell King <rmk@arm.linux.org.uk>
@@ -347,6 +346,6 @@ struct wm97xx_codec_drv wm9705_codec = {
 EXPORT_SYMBOL_GPL(wm9705_codec);
 
 /* Module information */
-MODULE_AUTHOR("Liam Girdwood <liam.girdwood@wolfsonmicro.com>");
+MODULE_AUTHOR("Liam Girdwood <lrg@slimlogic.co.uk>");
 MODULE_DESCRIPTION("WM9705 Touch Screen Driver");
 MODULE_LICENSE("GPL");
diff --git a/drivers/input/touchscreen/wm9712.c b/drivers/input/touchscreen/wm9712.c
index c8bb1e7335fc..7490b05c3566 100644
--- a/drivers/input/touchscreen/wm9712.c
+++ b/drivers/input/touchscreen/wm9712.c
@@ -2,8 +2,7 @@
  * wm9712.c  --  Codec driver for Wolfson WM9712 AC97 Codecs.
  *
  * Copyright 2003, 2004, 2005, 2006, 2007 Wolfson Microelectronics PLC.
- * Author: Liam Girdwood
- *         liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
+ * Author: Liam Girdwood <lrg@slimlogic.co.uk>
  * Parts Copyright : Ian Molton <spyro@f2s.com>
  *                   Andrew Zabolotny <zap@homelink.ru>
  *                   Russell King <rmk@arm.linux.org.uk>
@@ -462,6 +461,6 @@ struct wm97xx_codec_drv wm9712_codec = {
 EXPORT_SYMBOL_GPL(wm9712_codec);
 
 /* Module information */
-MODULE_AUTHOR("Liam Girdwood <liam.girdwood@wolfsonmicro.com>");
+MODULE_AUTHOR("Liam Girdwood <lrg@slimlogic.co.uk>");
 MODULE_DESCRIPTION("WM9712 Touch Screen Driver");
 MODULE_LICENSE("GPL");
diff --git a/drivers/input/touchscreen/wm9713.c b/drivers/input/touchscreen/wm9713.c
index 781ee83547e6..238b5132712e 100644
--- a/drivers/input/touchscreen/wm9713.c
+++ b/drivers/input/touchscreen/wm9713.c
@@ -2,8 +2,7 @@
  * wm9713.c  --  Codec touch driver for Wolfson WM9713 AC97 Codec.
  *
  * Copyright 2003, 2004, 2005, 2006, 2007, 2008 Wolfson Microelectronics PLC.
- * Author: Liam Girdwood
- *         liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
+ * Author: Liam Girdwood <lrg@slimlogic.co.uk>
  * Parts Copyright : Ian Molton <spyro@f2s.com>
  *                   Andrew Zabolotny <zap@homelink.ru>
  *                   Russell King <rmk@arm.linux.org.uk>
@@ -476,6 +475,6 @@ struct wm97xx_codec_drv wm9713_codec = {
 EXPORT_SYMBOL_GPL(wm9713_codec);
 
 /* Module information */
-MODULE_AUTHOR("Liam Girdwood <liam.girdwood@wolfsonmicro.com>");
+MODULE_AUTHOR("Liam Girdwood <lrg@slimlogic.co.uk>");
 MODULE_DESCRIPTION("WM9713 Touch Screen Driver");
 MODULE_LICENSE("GPL");
diff --git a/drivers/input/touchscreen/wm97xx-core.c b/drivers/input/touchscreen/wm97xx-core.c
index d589ab0e3adc..d15aa11d7056 100644
--- a/drivers/input/touchscreen/wm97xx-core.c
+++ b/drivers/input/touchscreen/wm97xx-core.c
@@ -3,8 +3,7 @@
  *                    and WM9713 AC97 Codecs.
  *
  * Copyright 2003, 2004, 2005, 2006, 2007, 2008 Wolfson Microelectronics PLC.
- * Author: Liam Girdwood
- *         liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
+ * Author: Liam Girdwood <lrg@slimlogic.co.uk>
  * Parts Copyright : Ian Molton <spyro@f2s.com>
  *                   Andrew Zabolotny <zap@homelink.ru>
  *                   Russell King <rmk@arm.linux.org.uk>
@@ -824,6 +823,6 @@ module_init(wm97xx_init);
 module_exit(wm97xx_exit);
 
 /* Module information */
-MODULE_AUTHOR("Liam Girdwood <liam.girdwood@wolfsonmicro.com>");
+MODULE_AUTHOR("Liam Girdwood <lrg@slimlogic.co.uk>");
 MODULE_DESCRIPTION("WM97xx Core - Touch Screen / AUX ADC / GPIO Driver");
 MODULE_LICENSE("GPL");
diff --git a/drivers/md/faulty.c b/drivers/md/faulty.c
index 268547dbfbd3..f26c1f9a475b 100644
--- a/drivers/md/faulty.c
+++ b/drivers/md/faulty.c
@@ -287,6 +287,8 @@ static int run(mddev_t *mddev)
         int i;
 
         conf_t *conf = kmalloc(sizeof(*conf), GFP_KERNEL);
+        if (!conf)
+                return -ENOMEM;
 
         for (i=0; i<Modes; i++) {
                 atomic_set(&conf->counters[i], 0);
diff --git a/drivers/md/linear.c b/drivers/md/linear.c
index b9cbee688fae..190147c79e79 100644
--- a/drivers/md/linear.c
+++ b/drivers/md/linear.c
@@ -16,16 +16,8 @@
    Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  
 */
 
-#include <linux/module.h>
-
-#include <linux/raid/md.h>
-#include <linux/slab.h>
 #include <linux/raid/linear.h>
 
-#define MAJOR_NR MD_MAJOR
-#define MD_DRIVER
-#define MD_PERSONALITY
-
 /*
  * find which device holds a particular offset 
  */
@@ -33,16 +25,15 @@ static inline dev_info_t *which_dev(mddev_t *mddev, sector_t sector)
 {
         dev_info_t *hash;
         linear_conf_t *conf = mddev_to_conf(mddev);
-        sector_t block = sector >> 1;
 
         /*
          * sector_div(a,b) returns the remainer and sets a to a/b
          */
-        block >>= conf->preshift;
-        (void)sector_div(block, conf->hash_spacing);
-        hash = conf->hash_table[block];
+        sector >>= conf->sector_shift;
+        (void)sector_div(sector, conf->spacing);
+        hash = conf->hash_table[sector];
 
-        while ((sector>>1) >= (hash->size + hash->offset))
+        while (sector >= hash->num_sectors + hash->start_sector)
                 hash++;
         return hash;
 }
@@ -65,7 +56,7 @@ static int linear_mergeable_bvec(struct request_queue *q,
         sector_t sector = bvm->bi_sector + get_start_sect(bvm->bi_bdev);
 
         dev0 = which_dev(mddev, sector);
-        maxsectors = (dev0->size << 1) - (sector - (dev0->offset<<1));
+        maxsectors = dev0->num_sectors - (sector - dev0->start_sector);
 
         if (maxsectors < bio_sectors)
                 maxsectors = 0;
@@ -112,8 +103,8 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks)
         dev_info_t **table;
         mdk_rdev_t *rdev;
         int i, nb_zone, cnt;
-        sector_t min_spacing;
-        sector_t curr_offset;
+        sector_t min_sectors;
+        sector_t curr_sector;
         struct list_head *tmp;
 
         conf = kzalloc (sizeof (*conf) + raid_disks*sizeof(dev_info_t),
@@ -145,7 +136,7 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks)
                     mddev->queue->max_sectors > (PAGE_SIZE>>9))
                         blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9);
 
-                disk->size = rdev->size;
+                disk->num_sectors = rdev->size * 2;
                 conf->array_sectors += rdev->size * 2;
 
                 cnt++;
@@ -155,34 +146,34 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks)
                 goto out;
         }
 
-        min_spacing = conf->array_sectors / 2;
-        sector_div(min_spacing, PAGE_SIZE/sizeof(struct dev_info *));
+        min_sectors = conf->array_sectors;
+        sector_div(min_sectors, PAGE_SIZE/sizeof(struct dev_info *));
 
-        /* min_spacing is the minimum spacing that will fit the hash
+        /* min_sectors is the minimum spacing that will fit the hash
          * table in one PAGE.  This may be much smaller than needed.
          * We find the smallest non-terminal set of consecutive devices
-         * that is larger than min_spacing as use the size of that as
+         * that is larger than min_sectors and use the size of that as
          * the actual spacing
          */
-        conf->hash_spacing = conf->array_sectors / 2;
+        conf->spacing = conf->array_sectors;
         for (i=0; i < cnt-1 ; i++) {
-                sector_t sz = 0;
+                sector_t tmp = 0;
                 int j;
-                for (j = i; j < cnt - 1 && sz < min_spacing; j++)
-                        sz += conf->disks[j].size;
-                if (sz >= min_spacing && sz < conf->hash_spacing)
-                        conf->hash_spacing = sz;
+                for (j = i; j < cnt - 1 && tmp < min_sectors; j++)
+                        tmp += conf->disks[j].num_sectors;
+                if (tmp >= min_sectors && tmp < conf->spacing)
+                        conf->spacing = tmp;
         }
 
-        /* hash_spacing may be too large for sector_div to work with,
+        /* spacing may be too large for sector_div to work with,
          * so we might need to pre-shift
          */
-        conf->preshift = 0;
+        conf->sector_shift = 0;
         if (sizeof(sector_t) > sizeof(u32)) {
-                sector_t space = conf->hash_spacing;
+                sector_t space = conf->spacing;
                 while (space > (sector_t)(~(u32)0)) {
                         space >>= 1;
-                        conf->preshift++;
+                        conf->sector_shift++;
                 }
         }
         /*
@@ -194,9 +185,9 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks)
                 unsigned round;
                 unsigned long base;
 
-                sz = conf->array_sectors >> (conf->preshift + 1);
+                sz = conf->array_sectors >> conf->sector_shift;
                 sz += 1; /* force round-up */
-                base = conf->hash_spacing >> conf->preshift;
+                base = conf->spacing >> conf->sector_shift;
                 round = sector_div(sz, base);
                 nb_zone = sz + (round ? 1 : 0);
         }
@@ -211,32 +202,31 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks)
          * Here we generate the linear hash table
          * First calculate the device offsets.
          */
-        conf->disks[0].offset = 0;
+        conf->disks[0].start_sector = 0;
         for (i = 1; i < raid_disks; i++)
-                conf->disks[i].offset =
-                        conf->disks[i-1].offset +
-                        conf->disks[i-1].size;
+                conf->disks[i].start_sector =
+                        conf->disks[i-1].start_sector +
+                        conf->disks[i-1].num_sectors;
 
         table = conf->hash_table;
-        curr_offset = 0;
         i = 0;
-        for (curr_offset = 0;
-             curr_offset < conf->array_sectors / 2;
-             curr_offset += conf->hash_spacing) {
+        for (curr_sector = 0;
+             curr_sector < conf->array_sectors;
+             curr_sector += conf->spacing) {
 
                 while (i < raid_disks-1 &&
-                       curr_offset >= conf->disks[i+1].offset)
+                       curr_sector >= conf->disks[i+1].start_sector)
                         i++;
 
                 *table ++ = conf->disks + i;
         }
 
-        if (conf->preshift) {
-                conf->hash_spacing >>= conf->preshift;
-                /* round hash_spacing up so that when we divide by it,
+        if (conf->sector_shift) {
+                conf->spacing >>= conf->sector_shift;
+                /* round spacing up so that when we divide by it,
                  * we err on the side of "too-low", which is safest.
                  */
-                conf->hash_spacing++;
+                conf->spacing++;
         }
 
         BUG_ON(table - conf->hash_table > nb_zone);
@@ -317,7 +307,6 @@ static int linear_make_request (struct request_queue *q, struct bio *bio)
         const int rw = bio_data_dir(bio);
         mddev_t *mddev = q->queuedata;
         dev_info_t *tmp_dev;
-        sector_t block;
         int cpu;
 
         if (unlikely(bio_barrier(bio))) {
@@ -332,29 +321,33 @@ static int linear_make_request (struct request_queue *q, struct bio *bio)
         part_stat_unlock();
 
         tmp_dev = which_dev(mddev, bio->bi_sector);
-        block = bio->bi_sector >> 1;
     
-        if (unlikely(block >= (tmp_dev->size + tmp_dev->offset)
-                     || block < tmp_dev->offset)) {
+        if (unlikely(bio->bi_sector >= (tmp_dev->num_sectors +
+                                        tmp_dev->start_sector)
+                     || (bio->bi_sector <
+                         tmp_dev->start_sector))) {
                 char b[BDEVNAME_SIZE];
 
-                printk("linear_make_request: Block %llu out of bounds on "
-                        "dev %s size %llu offset %llu\n",
-                        (unsigned long long)block,
+                printk("linear_make_request: Sector %llu out of bounds on "
+                        "dev %s: %llu sectors, offset %llu\n",
+                        (unsigned long long)bio->bi_sector,
                         bdevname(tmp_dev->rdev->bdev, b),
-                        (unsigned long long)tmp_dev->size,
-                        (unsigned long long)tmp_dev->offset);
+                        (unsigned long long)tmp_dev->num_sectors,
+                        (unsigned long long)tmp_dev->start_sector);
                 bio_io_error(bio);
                 return 0;
         }
         if (unlikely(bio->bi_sector + (bio->bi_size >> 9) >
-                     (tmp_dev->offset + tmp_dev->size)<<1)) {
+                     tmp_dev->start_sector + tmp_dev->num_sectors)) {
                 /* This bio crosses a device boundary, so we have to
                  * split it.
                  */
                 struct bio_pair *bp;
+
                 bp = bio_split(bio,
-                               ((tmp_dev->offset + tmp_dev->size)<<1) - bio->bi_sector);
+                               tmp_dev->start_sector + tmp_dev->num_sectors
+                               - bio->bi_sector);
+
                 if (linear_make_request(q, &bp->bio1))
                         generic_make_request(&bp->bio1);
                 if (linear_make_request(q, &bp->bio2))
@@ -364,7 +357,8 @@ static int linear_make_request (struct request_queue *q, struct bio *bio)
         }
                     
         bio->bi_bdev = tmp_dev->rdev->bdev;
-        bio->bi_sector = bio->bi_sector - (tmp_dev->offset << 1) + tmp_dev->rdev->data_offset;
+        bio->bi_sector = bio->bi_sector - tmp_dev->start_sector
+                + tmp_dev->rdev->data_offset;
 
         return 1;
 }
@@ -372,29 +366,6 @@ static int linear_make_request (struct request_queue *q, struct bio *bio)
 static void linear_status (struct seq_file *seq, mddev_t *mddev)
 {
 
-#undef MD_DEBUG
-#ifdef MD_DEBUG
-        int j;
-        linear_conf_t *conf = mddev_to_conf(mddev);
-        sector_t s = 0;
-  
-        seq_printf(seq, "      ");
-        for (j = 0; j < mddev->raid_disks; j++)
-        {
-                char b[BDEVNAME_SIZE];
-                s += conf->smallest_size;
-                seq_printf(seq, "[%s",
-                           bdevname(conf->hash_table[j][0].rdev->bdev,b));
-
-                while (s > conf->hash_table[j][0].offset +
-                           conf->hash_table[j][0].size)
-                        seq_printf(seq, "/%s] ",
-                                   bdevname(conf->hash_table[j][1].rdev->bdev,b));
-                else
-                        seq_printf(seq, "] ");
-        }
-        seq_printf(seq, "\n");
-#endif
         seq_printf(seq, " %dk rounding", mddev->chunk_size/1024);
 }
 
diff --git a/drivers/md/md.c b/drivers/md/md.c
index 0a3a4bdcd4af..aaa3d465de4e 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -32,31 +32,21 @@
    Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
 
-#include <linux/module.h>
-#include <linux/kernel.h>
 #include <linux/kthread.h>
-#include <linux/linkage.h>
 #include <linux/raid/md.h>
 #include <linux/raid/bitmap.h>
 #include <linux/sysctl.h>
 #include <linux/buffer_head.h> /* for invalidate_bdev */
 #include <linux/poll.h>
-#include <linux/mutex.h>
 #include <linux/ctype.h>
-#include <linux/freezer.h>
-
-#include <linux/init.h>
-
+#include <linux/hdreg.h>
+#include <linux/proc_fs.h>
+#include <linux/random.h>
+#include <linux/reboot.h>
 #include <linux/file.h>
-
-#ifdef CONFIG_KMOD
-#include <linux/kmod.h>
-#endif
-
-#include <asm/unaligned.h>
+#include <linux/delay.h>
 
 #define MAJOR_NR MD_MAJOR
-#define MD_DRIVER
 
 /* 63 partitions with the alternate major number (mdp) */
 #define MdpMinorShift 6
@@ -66,7 +56,7 @@
 
 
 #ifndef MODULE
-static void autostart_arrays (int part);
+static void autostart_arrays(int part);
 #endif
 
 static LIST_HEAD(pers_list);
@@ -212,7 +202,7 @@ static DEFINE_SPINLOCK(all_mddevs_lock);
                 )
 
 
-static int md_fail_request (struct request_queue *q, struct bio *bio)
+static int md_fail_request(struct request_queue *q, struct bio *bio)
 {
         bio_io_error(bio);
         return 0;
@@ -2106,8 +2096,6 @@ rdev_size_store(mdk_rdev_t *rdev, const char *buf, size_t len)
 
         if (strict_strtoull(buf, 10, &size) < 0)
                 return -EINVAL;
-        if (size < my_mddev->size)
-                return -EINVAL;
         if (my_mddev->pers && rdev->raid_disk >= 0) {
                 if (my_mddev->persistent) {
                         size = super_types[my_mddev->major_version].
@@ -2118,9 +2106,9 @@ rdev_size_store(mdk_rdev_t *rdev, const char *buf, size_t len)
                         size = (rdev->bdev->bd_inode->i_size >> 10);
                         size -= rdev->data_offset/2;
                 }
-                if (size < my_mddev->size)
-                        return -EINVAL; /* component must fit device */
         }
+        if (size < my_mddev->size)
+                return -EINVAL; /* component must fit device */
 
         rdev->size = size;
         if (size > oldsize && my_mddev->external) {
@@ -2406,12 +2394,11 @@ safe_delay_store(mddev_t *mddev, const char *cbuf, size_t len)
         int i;
         unsigned long msec;
         char buf[30];
-        char *e;
+
         /* remove a period, and count digits after it */
         if (len >= sizeof(buf))
                 return -EINVAL;
-        strlcpy(buf, cbuf, len);
-        buf[len] = 0;
+        strlcpy(buf, cbuf, sizeof(buf));
         for (i=0; i<len; i++) {
                 if (dot) {
                         if (isdigit(buf[i])) {
@@ -2424,8 +2411,7 @@ safe_delay_store(mddev_t *mddev, const char *cbuf, size_t len)
                         buf[i] = 0;
                 }
         }
-        msec = simple_strtoul(buf, &e, 10);
-        if (e == buf || (*e && *e != '\n'))
+        if (strict_strtoul(buf, 10, &msec) < 0)
                 return -EINVAL;
         msec = (msec * 1000) / scale;
         if (msec == 0)
@@ -2727,9 +2713,9 @@ array_state_store(mddev_t *mddev, const char *buf, size_t len)
                 break;
         case read_auto:
                 if (mddev->pers) {
-                        if (mddev->ro != 1)
+                        if (mddev->ro == 0)
                                 err = do_md_stop(mddev, 1, 0);
-                        else
+                        else if (mddev->ro == 1)
                                 err = restart_array(mddev);
                         if (err == 0) {
                                 mddev->ro = 2;
@@ -2945,7 +2931,13 @@ metadata_store(mddev_t *mddev, const char *buf, size_t len)
 {
         int major, minor;
         char *e;
-        if (!list_empty(&mddev->disks))
+        /* Changing the details of 'external' metadata is
+         * always permitted.  Otherwise there must be
+         * no devices attached to the array.
+         */
+        if (mddev->external && strncmp(buf, "external:", 9) == 0)
+                ;
+        else if (!list_empty(&mddev->disks))
                 return -EBUSY;
 
         if (cmd_match(buf, "none")) {
@@ -3527,17 +3519,12 @@ static int do_md_run(mddev_t * mddev)
                         return -EINVAL;
                 }
                 /*
-                 * chunk-size has to be a power of 2 and multiples of PAGE_SIZE
+                 * chunk-size has to be a power of 2
                  */
                 if ( (1 << ffz(~chunk_size)) != chunk_size) {
                         printk(KERN_ERR "chunk_size of %d not valid\n", chunk_size);
                         return -EINVAL;
                 }
-                if (chunk_size < PAGE_SIZE) {
-                        printk(KERN_ERR "too small chunk_size: %d < %ld\n",
-                                chunk_size, PAGE_SIZE);
-                        return -EINVAL;
-                }
 
                 /* devices must have minimum size of one chunk */
                 rdev_for_each(rdev, tmp, mddev) {
@@ -3555,12 +3542,10 @@ static int do_md_run(mddev_t * mddev)
                 }
         }
 
-#ifdef CONFIG_KMOD
         if (mddev->level != LEVEL_NONE)
                 request_module("md-level-%d", mddev->level);
         else if (mddev->clevel[0])
                 request_module("md-%s", mddev->clevel);
-#endif
 
         /*
          * Drop all container device buffers, from now on
@@ -3971,10 +3956,10 @@ static void autorun_array(mddev_t *mddev)
         }
         printk("\n");
 
-        err = do_md_run (mddev);
+        err = do_md_run(mddev);
         if (err) {
                 printk(KERN_WARNING "md: do_md_run() returned %d\n", err);
-                do_md_stop (mddev, 0, 0);
+                do_md_stop(mddev, 0, 0);
         }
 }
 
@@ -4333,7 +4318,7 @@ static int add_new_disk(mddev_t * mddev, mdu_disk_info_t *info)
 
         if (!(info->state & (1<<MD_DISK_FAULTY))) {
                 int err;
-                rdev = md_import_device (dev, -1, 0);
+                rdev = md_import_device(dev, -1, 0);
                 if (IS_ERR(rdev)) {
                         printk(KERN_WARNING 
                                 "md: error, md_import_device() returned %ld\n",
@@ -4415,7 +4400,7 @@ static int hot_add_disk(mddev_t * mddev, dev_t dev)
                 return -EINVAL;
         }
 
-        rdev = md_import_device (dev, -1, 0);
+        rdev = md_import_device(dev, -1, 0);
         if (IS_ERR(rdev)) {
                 printk(KERN_WARNING 
                         "md: error, md_import_device() returned %ld\n",
@@ -4934,11 +4919,11 @@ static int md_ioctl(struct inode *inode, struct file *file,
                         goto done_unlock;
 
                 case STOP_ARRAY:
-                        err = do_md_stop (mddev, 0, 1);
+                        err = do_md_stop(mddev, 0, 1);
                         goto done_unlock;
 
                 case STOP_ARRAY_RO:
-                        err = do_md_stop (mddev, 1, 1);
+                        err = do_md_stop(mddev, 1, 1);
                         goto done_unlock;
 
         }
@@ -4987,7 +4972,7 @@ static int md_ioctl(struct inode *inode, struct file *file,
                         goto done_unlock;
 
                 case RUN_ARRAY:
-                        err = do_md_run (mddev);
+                        err = do_md_run(mddev);
                         goto done_unlock;
 
                 case SET_BITMAP_FILE:
@@ -5425,11 +5410,11 @@ static int md_seq_show(struct seq_file *seq, void *v)
                         seq_printf(seq, " super non-persistent");
 
                 if (mddev->pers) {
-                        mddev->pers->status (seq, mddev);
+                        mddev->pers->status(seq, mddev);
                         seq_printf(seq, "\n      ");
                         if (mddev->pers->sync_request) {
                                 if (mddev->curr_resync > 2) {
-                                        status_resync (seq, mddev);
+                                        status_resync(seq, mddev);
                                         seq_printf(seq, "\n      ");
                                 } else if (mddev->curr_resync == 1 || mddev->curr_resync == 2)
                                         seq_printf(seq, "\tresync=DELAYED\n      ");
@@ -6260,7 +6245,7 @@ static int md_notify_reboot(struct notifier_block *this,
                                  * appears to still be in use.  Hence
                                  * the '100'.
                                  */
-                                do_md_stop (mddev, 1, 100);
+                                do_md_stop(mddev, 1, 100);
                                 mddev_unlock(mddev);
                         }
                 /*
@@ -6304,7 +6289,7 @@ static int __init md_init(void)
         raid_table_header = register_sysctl_table(raid_root_table);
 
         md_geninit();
-        return (0);
+        return 0;
 }
 
 
diff --git a/drivers/md/multipath.c b/drivers/md/multipath.c
index 8bb8794129b3..8744014b9d80 100644
--- a/drivers/md/multipath.c
+++ b/drivers/md/multipath.c
@@ -19,16 +19,7 @@
  * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
 #include <linux/raid/multipath.h>
-#include <linux/buffer_head.h>
-#include <asm/atomic.h>
-
-#define MAJOR_NR MD_MAJOR
-#define MD_DRIVER
-#define MD_PERSONALITY
 
 #define MAX_WORK_PER_DISK 128
 
diff --git a/drivers/md/raid0.c b/drivers/md/raid0.c
index 53508a8a981d..8ac6488ad0dc 100644
--- a/drivers/md/raid0.c
+++ b/drivers/md/raid0.c
@@ -18,13 +18,8 @@
    Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  
 */
 
-#include <linux/module.h>
 #include <linux/raid/raid0.h>
 
-#define MAJOR_NR MD_MAJOR
-#define MD_DRIVER
-#define MD_PERSONALITY
-
 static void raid0_unplug(struct request_queue *q)
 {
         mddev_t *mddev = q->queuedata;
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c
index b9764429d856..9c788e2489b1 100644
--- a/drivers/md/raid1.c
+++ b/drivers/md/raid1.c
@@ -32,6 +32,7 @@
  */
 
 #include "dm-bio-list.h"
+#include <linux/delay.h>
 #include <linux/raid/raid1.h>
 #include <linux/raid/bitmap.h>
 
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c
index 8bdc9bfc2887..da5129a24b18 100644
--- a/drivers/md/raid10.c
+++ b/drivers/md/raid10.c
@@ -19,6 +19,7 @@
  */
 
 #include "dm-bio-list.h"
+#include <linux/delay.h>
 #include <linux/raid/raid10.h>
 #include <linux/raid/bitmap.h>
 
@@ -2028,8 +2029,9 @@ static int run(mddev_t *mddev)
         int nc, fc, fo;
         sector_t stride, size;
 
-        if (mddev->chunk_size == 0) {
-                printk(KERN_ERR "md/raid10: non-zero chunk size required.\n");
+        if (mddev->chunk_size < PAGE_SIZE) {
+                printk(KERN_ERR "md/raid10: chunk size must be "
+                       "at least PAGE_SIZE(%ld).\n", PAGE_SIZE);
                 return -EINVAL;
         }
 
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index ae16794bef20..a36a7435edf5 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -43,12 +43,7 @@
  * miss any bits.
  */
 
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/highmem.h>
-#include <linux/bitops.h>
 #include <linux/kthread.h>
-#include <asm/atomic.h>
 #include "raid6.h"
 
 #include <linux/raid/bitmap.h>
@@ -275,7 +270,7 @@ static int grow_buffers(struct stripe_head *sh, int num)
         return 0;
 }
 
-static void raid5_build_block (struct stripe_head *sh, int i);
+static void raid5_build_block(struct stripe_head *sh, int i);
 
 static void init_stripe(struct stripe_head *sh, sector_t sector, int pd_idx, int disks)
 {
@@ -1151,7 +1146,7 @@ static void raid5_end_read_request(struct bio * bi, int error)
         release_stripe(sh);
 }
 
-static void raid5_end_write_request (struct bio *bi, int error)
+static void raid5_end_write_request(struct bio *bi, int error)
 {
         struct stripe_head *sh = bi->bi_private;
         raid5_conf_t *conf = sh->raid_conf;
@@ -1183,7 +1178,7 @@ static void raid5_end_write_request (struct bio *bi, int error)
 
 static sector_t compute_blocknr(struct stripe_head *sh, int i);
         
-static void raid5_build_block (struct stripe_head *sh, int i)
+static void raid5_build_block(struct stripe_head *sh, int i)
 {
         struct r5dev *dev = &sh->dev[i];
 
@@ -1221,10 +1216,10 @@ static void error(mddev_t *mddev, mdk_rdev_t *rdev)
                         set_bit(MD_RECOVERY_INTR, &mddev->recovery);
                 }
                 set_bit(Faulty, &rdev->flags);
-                printk (KERN_ALERT
-                        "raid5: Disk failure on %s, disabling device.\n"
-                        "raid5: Operation continuing on %d devices.\n",
-                        bdevname(rdev->bdev,b), conf->raid_disks - mddev->degraded);
+                printk(KERN_ALERT
+                       "raid5: Disk failure on %s, disabling device.\n"
+                       "raid5: Operation continuing on %d devices.\n",
+                       bdevname(rdev->bdev,b), conf->raid_disks - mddev->degraded);
         }
 }
 
@@ -1320,8 +1315,8 @@ static sector_t raid5_compute_sector(sector_t r_sector, unsigned int raid_disks,
                         *dd_idx = (*pd_idx + 2 + *dd_idx) % raid_disks;
                         break;
                 default:
-                        printk (KERN_CRIT "raid6: unsupported algorithm %d\n",
-                                conf->algorithm);
+                        printk(KERN_CRIT "raid6: unsupported algorithm %d\n",
+                               conf->algorithm);
                 }
                 break;
         }
@@ -1396,8 +1391,8 @@ static sector_t compute_blocknr(struct stripe_head *sh, int i)
                         }
                         break;
                 default:
-                        printk (KERN_CRIT "raid6: unsupported algorithm %d\n",
-                                conf->algorithm);
+                        printk(KERN_CRIT "raid6: unsupported algorithm %d\n",
+                               conf->algorithm);
                 }
                 break;
         }
@@ -1405,7 +1400,7 @@ static sector_t compute_blocknr(struct stripe_head *sh, int i)
         chunk_number = stripe * data_disks + i;
         r_sector = (sector_t)chunk_number * sectors_per_chunk + chunk_offset;
 
-        check = raid5_compute_sector (r_sector, raid_disks, data_disks, &dummy1, &dummy2, conf);
+        check = raid5_compute_sector(r_sector, raid_disks, data_disks, &dummy1, &dummy2, conf);
         if (check != sh->sector || dummy1 != dd_idx || dummy2 != sh->pd_idx) {
                 printk(KERN_ERR "compute_blocknr: map not correct\n");
                 return 0;
@@ -4012,6 +4007,13 @@ static int run(mddev_t *mddev)
                 return -EIO;
         }
 
+        if (mddev->chunk_size < PAGE_SIZE) {
+                printk(KERN_ERR "md/raid5: chunk_size must be at least "
+                       "PAGE_SIZE but %d < %ld\n",
+                       mddev->chunk_size, PAGE_SIZE);
+                return -EINVAL;
+        }
+
         if (mddev->reshape_position != MaxSector) {
                 /* Check that we can continue the reshape.
                  * Currently only disks can change, it must
@@ -4289,7 +4291,7 @@ static int stop(mddev_t *mddev)
 }
 
 #ifdef DEBUG
-static void print_sh (struct seq_file *seq, struct stripe_head *sh)
+static void print_sh(struct seq_file *seq, struct stripe_head *sh)
 {
         int i;
 
@@ -4305,7 +4307,7 @@ static void print_sh (struct seq_file *seq, struct stripe_head *sh)
         seq_printf(seq, "\n");
 }
 
-static void printall (struct seq_file *seq, raid5_conf_t *conf)
+static void printall(struct seq_file *seq, raid5_conf_t *conf)
 {
         struct stripe_head *sh;
         struct hlist_node *hn;
@@ -4323,7 +4325,7 @@ static void printall (struct seq_file *seq, raid5_conf_t *conf)
 }
 #endif
 
-static void status (struct seq_file *seq, mddev_t *mddev)
+static void status(struct seq_file *seq, mddev_t *mddev)
 {
         raid5_conf_t *conf = (raid5_conf_t *) mddev->private;
         int i;
diff --git a/drivers/md/raid6.h b/drivers/md/raid6.h
index 31cbee71365f..98dcde88470e 100644
--- a/drivers/md/raid6.h
+++ b/drivers/md/raid6.h
@@ -18,15 +18,6 @@
 /* Set to 1 to use kernel-wide empty_zero_page */
 #define RAID6_USE_EMPTY_ZERO_PAGE 0
 
-#include <linux/module.h>
-#include <linux/stddef.h>
-#include <linux/compiler.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/mempool.h>
-#include <linux/list.h>
-#include <linux/vmalloc.h>
 #include <linux/raid/md.h>
 #include <linux/raid/raid5.h>
 
diff --git a/drivers/media/video/cpia.c b/drivers/media/video/cpia.c
index c325e926de8a..1798b779a25a 100644
--- a/drivers/media/video/cpia.c
+++ b/drivers/media/video/cpia.c
@@ -39,10 +39,6 @@
 #include <asm/io.h>
 #include <linux/mutex.h>
 
-#ifdef CONFIG_KMOD
-#include <linux/kmod.h>
-#endif
-
 #include "cpia.h"
 
 static int video_nr = -1;
diff --git a/drivers/media/video/usbvision/usbvision-core.c b/drivers/media/video/usbvision/usbvision-core.c
index b26b563a0b0a..9e4f50639975 100644
--- a/drivers/media/video/usbvision/usbvision-core.c
+++ b/drivers/media/video/usbvision/usbvision-core.c
@@ -45,10 +45,6 @@
 
 #include <linux/workqueue.h>
 
-#ifdef CONFIG_KMOD
-#include <linux/kmod.h>
-#endif
-
 #include "usbvision.h"
 
 static unsigned int core_debug;
diff --git a/drivers/media/video/usbvision/usbvision-video.c b/drivers/media/video/usbvision/usbvision-video.c
index e10b256aeba4..77aeb39b2750 100644
--- a/drivers/media/video/usbvision/usbvision-video.c
+++ b/drivers/media/video/usbvision/usbvision-video.c
@@ -69,10 +69,6 @@
 
 #include <linux/workqueue.h>
 
-#ifdef CONFIG_KMOD
-#include <linux/kmod.h>
-#endif
-
 #include "usbvision.h"
 #include "usbvision-cards.h"
 
diff --git a/drivers/media/video/v4l1-compat.c b/drivers/media/video/v4l1-compat.c
index 79937d1031fc..928cb4037372 100644
--- a/drivers/media/video/v4l1-compat.c
+++ b/drivers/media/video/v4l1-compat.c
@@ -36,10 +36,6 @@
 #include <asm/system.h>
 #include <asm/pgtable.h>
 
-#ifdef CONFIG_KMOD
-#include <linux/kmod.h>
-#endif
-
 static unsigned int debug;
 module_param(debug, int, 0644);
 MODULE_PARM_DESC(debug, "enable debug messages");
diff --git a/drivers/media/video/v4l2-common.c b/drivers/media/video/v4l2-common.c
index 20c3be8617ea..846763d7349e 100644
--- a/drivers/media/video/v4l2-common.c
+++ b/drivers/media/video/v4l2-common.c
@@ -60,10 +60,6 @@
 #include <media/v4l2-common.h>
 #include <media/v4l2-chip-ident.h>
 
-#ifdef CONFIG_KMOD
-#include <linux/kmod.h>
-#endif
-
 #include <linux/videodev2.h>
 
 MODULE_AUTHOR("Bill Dirks, Justin Schoeman, Gerd Knorr");
diff --git a/drivers/media/video/vino.c b/drivers/media/video/vino.c
index 8ec57df1904f..1efc5f3462c6 100644
--- a/drivers/media/video/vino.c
+++ b/drivers/media/video/vino.c
@@ -30,10 +30,7 @@
 #include <linux/mm.h>
 #include <linux/time.h>
 #include <linux/version.h>
-
-#ifdef CONFIG_KMOD
 #include <linux/kmod.h>
-#endif
 
 #include <linux/i2c.h>
 #include <linux/i2c-algo-sgi.h>
@@ -4634,7 +4631,7 @@ static int __init vino_module_init(void)
         }
         vino_init_stage++;
 
-#if defined(CONFIG_KMOD) && defined(MODULE)
+#ifdef MODULE
         request_module("saa7191");
         request_module("indycam");
 #endif
diff --git a/drivers/media/video/w9968cf.c b/drivers/media/video/w9968cf.c
index 11edf79f57be..dcd45dbd82dc 100644
--- a/drivers/media/video/w9968cf.c
+++ b/drivers/media/video/w9968cf.c
@@ -111,7 +111,7 @@ static int specific_debug = W9968CF_SPECIFIC_DEBUG;
 
 static unsigned int param_nv[24]; /* number of values per parameter */
 
-#ifdef CONFIG_KMOD
+#ifdef CONFIG_MODULES
 module_param(ovmod_load, bool, 0644);
 #endif
 module_param(simcams, ushort, 0644);
@@ -144,7 +144,7 @@ module_param(debug, ushort, 0644);
 module_param(specific_debug, bool, 0644);
 #endif
 
-#ifdef CONFIG_KMOD
+#ifdef CONFIG_MODULES
 MODULE_PARM_DESC(ovmod_load,
                  "\n<0|1> Automatic 'ovcamchip' module loading."
                  "\n0 disabled, 1 enabled."
diff --git a/drivers/message/i2o/Makefile b/drivers/message/i2o/Makefile
index 2c2e39aa1efa..b0982dacfd0a 100644
--- a/drivers/message/i2o/Makefile
+++ b/drivers/message/i2o/Makefile
@@ -5,7 +5,7 @@
 # In the future, some of these should be built conditionally.
 #
 
-i2o_core-y              += iop.o driver.o device.o debug.o pci.o exec-osm.o
+i2o_core-y              += iop.o driver.o device.o debug.o pci.o exec-osm.o memory.o
 i2o_bus-y               += bus-osm.o
 i2o_config-y            += config-osm.o
 obj-$(CONFIG_I2O)       += i2o_core.o
diff --git a/drivers/message/i2o/device.c b/drivers/message/i2o/device.c
index 8774c670e668..54c2e9ae23e5 100644
--- a/drivers/message/i2o/device.c
+++ b/drivers/message/i2o/device.c
@@ -467,7 +467,7 @@ int i2o_parm_issue(struct i2o_device *i2o_dev, int cmd, void *oplist,
 
         res.virt = NULL;
 
-        if (i2o_dma_alloc(dev, &res, reslen, GFP_KERNEL))
+        if (i2o_dma_alloc(dev, &res, reslen))
                 return -ENOMEM;
 
         msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET);
diff --git a/drivers/message/i2o/exec-osm.c b/drivers/message/i2o/exec-osm.c
index 6cbcc21de518..56faef1a1d55 100644
--- a/drivers/message/i2o/exec-osm.c
+++ b/drivers/message/i2o/exec-osm.c
@@ -388,8 +388,8 @@ static int i2o_exec_lct_notify(struct i2o_controller *c, u32 change_ind)
 
         dev = &c->pdev->dev;
 
-        if (i2o_dma_realloc
-            (dev, &c->dlct, le32_to_cpu(sb->expected_lct_size), GFP_KERNEL))
+        if (i2o_dma_realloc(dev, &c->dlct,
+                                        le32_to_cpu(sb->expected_lct_size)))
                 return -ENOMEM;
 
         msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET);
diff --git a/drivers/message/i2o/i2o_config.c b/drivers/message/i2o/i2o_config.c
index 4238de98d4a6..a3fabdbe6ca6 100644
--- a/drivers/message/i2o/i2o_config.c
+++ b/drivers/message/i2o/i2o_config.c
@@ -260,7 +260,7 @@ static int i2o_cfg_swdl(unsigned long arg)
         if (IS_ERR(msg))
                 return PTR_ERR(msg);
 
-        if (i2o_dma_alloc(&c->pdev->dev, &buffer, fragsize, GFP_KERNEL)) {
+        if (i2o_dma_alloc(&c->pdev->dev, &buffer, fragsize)) {
                 i2o_msg_nop(c, msg);
                 return -ENOMEM;
         }
@@ -339,7 +339,7 @@ static int i2o_cfg_swul(unsigned long arg)
         if (IS_ERR(msg))
                 return PTR_ERR(msg);
 
-        if (i2o_dma_alloc(&c->pdev->dev, &buffer, fragsize, GFP_KERNEL)) {
+        if (i2o_dma_alloc(&c->pdev->dev, &buffer, fragsize)) {
                 i2o_msg_nop(c, msg);
                 return -ENOMEM;
         }
@@ -634,9 +634,7 @@ static int i2o_cfg_passthru32(struct file *file, unsigned cmnd,
                         sg_size = sg[i].flag_count & 0xffffff;
                         p = &(sg_list[sg_index]);
                         /* Allocate memory for the transfer */
-                        if (i2o_dma_alloc
-                            (&c->pdev->dev, p, sg_size,
-                             PCI_DMA_BIDIRECTIONAL)) {
+                        if (i2o_dma_alloc(&c->pdev->dev, p, sg_size)) {
                                 printk(KERN_DEBUG
                                        "%s: Could not allocate SG buffer - size = %d buffer number %d of %d\n",
                                        c->name, sg_size, i, sg_count);
@@ -780,12 +778,11 @@ static int i2o_cfg_passthru(unsigned long arg)
         u32 size = 0;
         u32 reply_size = 0;
         u32 rcode = 0;
-        void *sg_list[SG_TABLESIZE];
+        struct i2o_dma sg_list[SG_TABLESIZE];
         u32 sg_offset = 0;
         u32 sg_count = 0;
         int sg_index = 0;
         u32 i = 0;
-        void *p = NULL;
         i2o_status_block *sb;
         struct i2o_message *msg;
         unsigned int iop;
@@ -842,6 +839,7 @@ static int i2o_cfg_passthru(unsigned long arg)
         memset(sg_list, 0, sizeof(sg_list[0]) * SG_TABLESIZE);
         if (sg_offset) {
                 struct sg_simple_element *sg;
+                struct i2o_dma *p;
 
                 if (sg_offset * 4 >= size) {
                         rcode = -EFAULT;
@@ -871,22 +869,22 @@ static int i2o_cfg_passthru(unsigned long arg)
                                 goto sg_list_cleanup;
                         }
                         sg_size = sg[i].flag_count & 0xffffff;
+                        p = &(sg_list[sg_index]);
+                        if (i2o_dma_alloc(&c->pdev->dev, p, sg_size)) {
                         /* Allocate memory for the transfer */
-                        p = kmalloc(sg_size, GFP_KERNEL);
-                        if (!p) {
                                 printk(KERN_DEBUG
                                        "%s: Could not allocate SG buffer - size = %d buffer number %d of %d\n",
                                        c->name, sg_size, i, sg_count);
                                 rcode = -ENOMEM;
                                 goto sg_list_cleanup;
                         }
-                        sg_list[sg_index++] = p;        // sglist indexed with input frame, not our internal frame.
+                        sg_index++;
                         /* Copy in the user's SG buffer if necessary */
                         if (sg[i].
                             flag_count & 0x04000000 /*I2O_SGL_FLAGS_DIR */ ) {
                                 // TODO 64bit fix
                                 if (copy_from_user
-                                    (p, (void __user *)sg[i].addr_bus,
+                                    (p->virt, (void __user *)sg[i].addr_bus,
                                      sg_size)) {
                                         printk(KERN_DEBUG
                                                "%s: Could not copy SG buf %d FROM user\n",
@@ -895,8 +893,7 @@ static int i2o_cfg_passthru(unsigned long arg)
                                         goto sg_list_cleanup;
                                 }
                         }
-                        //TODO 64bit fix
-                        sg[i].addr_bus = virt_to_bus(p);
+                        sg[i].addr_bus = p->phys;
                 }
         }
 
@@ -908,7 +905,7 @@ static int i2o_cfg_passthru(unsigned long arg)
         }
 
         if (sg_offset) {
-                u32 rmsg[128];
+                u32 rmsg[I2O_OUTBOUND_MSG_FRAME_SIZE];
                 /* Copy back the Scatter Gather buffers back to user space */
                 u32 j;
                 // TODO 64bit fix
@@ -942,11 +939,11 @@ static int i2o_cfg_passthru(unsigned long arg)
                                 sg_size = sg[j].flag_count & 0xffffff;
                                 // TODO 64bit fix
                                 if (copy_to_user
-                                    ((void __user *)sg[j].addr_bus, sg_list[j],
+                                    ((void __user *)sg[j].addr_bus, sg_list[j].virt,
                                      sg_size)) {
                                         printk(KERN_WARNING
                                                "%s: Could not copy %p TO user %x\n",
-                                               c->name, sg_list[j],
+                                               c->name, sg_list[j].virt,
                                                sg[j].addr_bus);
                                         rcode = -EFAULT;
                                         goto sg_list_cleanup;
@@ -973,7 +970,7 @@ sg_list_cleanup:
         }
 
         for (i = 0; i < sg_index; i++)
-                kfree(sg_list[i]);
+                i2o_dma_free(&c->pdev->dev, &sg_list[i]);
 
 cleanup:
         kfree(reply);
diff --git a/drivers/message/i2o/iop.c b/drivers/message/i2o/iop.c
index da715e11c1b2..be2b5926d26c 100644
--- a/drivers/message/i2o/iop.c
+++ b/drivers/message/i2o/iop.c
@@ -1004,7 +1004,7 @@ static int i2o_hrt_get(struct i2o_controller *c)
 
                 size = hrt->num_entries * hrt->entry_len << 2;
                 if (size > c->hrt.len) {
-                        if (i2o_dma_realloc(dev, &c->hrt, size, GFP_KERNEL))
+                        if (i2o_dma_realloc(dev, &c->hrt, size))
                                 return -ENOMEM;
                         else
                                 hrt = c->hrt.virt;
diff --git a/drivers/message/i2o/memory.c b/drivers/message/i2o/memory.c
new file mode 100644
index 000000000000..f5cc95c564e2
--- /dev/null
+++ b/drivers/message/i2o/memory.c
@@ -0,0 +1,313 @@
+/*
+ *      Functions to handle I2O memory
+ *
+ *      Pulled from the inlines in i2o headers and uninlined
+ *
+ *
+ *      This program is free software; you can redistribute it and/or modify it
+ *      under the terms of the GNU General Public License as published by the
+ *      Free Software Foundation; either version 2 of the License, or (at your
+ *      option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/i2o.h>
+#include <linux/delay.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include "core.h"
+
+/* Protects our 32/64bit mask switching */
+static DEFINE_MUTEX(mem_lock);
+
+/**
+ *      i2o_sg_tablesize - Calculate the maximum number of elements in a SGL
+ *      @c: I2O controller for which the calculation should be done
+ *      @body_size: maximum body size used for message in 32-bit words.
+ *
+ *      Return the maximum number of SG elements in a SG list.
+ */
+u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size)
+{
+        i2o_status_block *sb = c->status_block.virt;
+        u16 sg_count =
+            (sb->inbound_frame_size - sizeof(struct i2o_message) / 4) -
+            body_size;
+
+        if (c->pae_support) {
+                /*
+                 * for 64-bit a SG attribute element must be added and each
+                 * SG element needs 12 bytes instead of 8.
+                 */
+                sg_count -= 2;
+                sg_count /= 3;
+        } else
+                sg_count /= 2;
+
+        if (c->short_req && (sg_count > 8))
+                sg_count = 8;
+
+        return sg_count;
+}
+EXPORT_SYMBOL_GPL(i2o_sg_tablesize);
+
+
+/**
+ *      i2o_dma_map_single - Map pointer to controller and fill in I2O message.
+ *      @c: I2O controller
+ *      @ptr: pointer to the data which should be mapped
+ *      @size: size of data in bytes
+ *      @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE
+ *      @sg_ptr: pointer to the SG list inside the I2O message
+ *
+ *      This function does all necessary DMA handling and also writes the I2O
+ *      SGL elements into the I2O message. For details on DMA handling see also
+ *      dma_map_single(). The pointer sg_ptr will only be set to the end of the
+ *      SG list if the allocation was successful.
+ *
+ *      Returns DMA address which must be checked for failures using
+ *      dma_mapping_error().
+ */
+dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr,
+                                            size_t size,
+                                            enum dma_data_direction direction,
+                                            u32 ** sg_ptr)
+{
+        u32 sg_flags;
+        u32 *mptr = *sg_ptr;
+        dma_addr_t dma_addr;
+
+        switch (direction) {
+        case DMA_TO_DEVICE:
+                sg_flags = 0xd4000000;
+                break;
+        case DMA_FROM_DEVICE:
+                sg_flags = 0xd0000000;
+                break;
+        default:
+                return 0;
+        }
+
+        dma_addr = dma_map_single(&c->pdev->dev, ptr, size, direction);
+        if (!dma_mapping_error(&c->pdev->dev, dma_addr)) {
+#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
+                if ((sizeof(dma_addr_t) > 4) && c->pae_support) {
+                        *mptr++ = cpu_to_le32(0x7C020002);
+                        *mptr++ = cpu_to_le32(PAGE_SIZE);
+                }
+#endif
+
+                *mptr++ = cpu_to_le32(sg_flags | size);
+                *mptr++ = cpu_to_le32(i2o_dma_low(dma_addr));
+#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
+                if ((sizeof(dma_addr_t) > 4) && c->pae_support)
+                        *mptr++ = cpu_to_le32(i2o_dma_high(dma_addr));
+#endif
+                *sg_ptr = mptr;
+        }
+        return dma_addr;
+}
+EXPORT_SYMBOL_GPL(i2o_dma_map_single);
+
+/**
+ *      i2o_dma_map_sg - Map a SG List to controller and fill in I2O message.
+ *      @c: I2O controller
+ *      @sg: SG list to be mapped
+ *      @sg_count: number of elements in the SG list
+ *      @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE
+ *      @sg_ptr: pointer to the SG list inside the I2O message
+ *
+ *      This function does all necessary DMA handling and also writes the I2O
+ *      SGL elements into the I2O message. For details on DMA handling see also
+ *      dma_map_sg(). The pointer sg_ptr will only be set to the end of the SG
+ *      list if the allocation was successful.
+ *
+ *      Returns 0 on failure or 1 on success.
+ */
+int i2o_dma_map_sg(struct i2o_controller *c, struct scatterlist *sg,
+            int sg_count, enum dma_data_direction direction, u32 ** sg_ptr)
+{
+        u32 sg_flags;
+        u32 *mptr = *sg_ptr;
+
+        switch (direction) {
+        case DMA_TO_DEVICE:
+                sg_flags = 0x14000000;
+                break;
+        case DMA_FROM_DEVICE:
+                sg_flags = 0x10000000;
+                break;
+        default:
+                return 0;
+        }
+
+        sg_count = dma_map_sg(&c->pdev->dev, sg, sg_count, direction);
+        if (!sg_count)
+                return 0;
+
+#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
+        if ((sizeof(dma_addr_t) > 4) && c->pae_support) {
+                *mptr++ = cpu_to_le32(0x7C020002);
+                *mptr++ = cpu_to_le32(PAGE_SIZE);
+        }
+#endif
+
+        while (sg_count-- > 0) {
+                if (!sg_count)
+                        sg_flags |= 0xC0000000;
+                *mptr++ = cpu_to_le32(sg_flags | sg_dma_len(sg));
+                *mptr++ = cpu_to_le32(i2o_dma_low(sg_dma_address(sg)));
+#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
+                if ((sizeof(dma_addr_t) > 4) && c->pae_support)
+                        *mptr++ = cpu_to_le32(i2o_dma_high(sg_dma_address(sg)));
+#endif
+                sg = sg_next(sg);
+        }
+        *sg_ptr = mptr;
+
+        return 1;
+}
+EXPORT_SYMBOL_GPL(i2o_dma_map_sg);
+
+/**
+ *      i2o_dma_alloc - Allocate DMA memory
+ *      @dev: struct device pointer to the PCI device of the I2O controller
+ *      @addr: i2o_dma struct which should get the DMA buffer
+ *      @len: length of the new DMA memory
+ *
+ *      Allocate a coherent DMA memory and write the pointers into addr.
+ *
+ *      Returns 0 on success or -ENOMEM on failure.
+ */
+int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, size_t len)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+        int dma_64 = 0;
+
+        mutex_lock(&mem_lock);
+        if ((sizeof(dma_addr_t) > 4) && (pdev->dma_mask == DMA_64BIT_MASK)) {
+                dma_64 = 1;
+                if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
+                        mutex_unlock(&mem_lock);
+                        return -ENOMEM;
+                }
+        }
+
+        addr->virt = dma_alloc_coherent(dev, len, &addr->phys, GFP_KERNEL);
+
+        if ((sizeof(dma_addr_t) > 4) && dma_64)
+                if (pci_set_dma_mask(pdev, DMA_64BIT_MASK))
+                        printk(KERN_WARNING "i2o: unable to set 64-bit DMA");
+        mutex_unlock(&mem_lock);
+
+        if (!addr->virt)
+                return -ENOMEM;
+
+        memset(addr->virt, 0, len);
+        addr->len = len;
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(i2o_dma_alloc);
+
+
+/**
+ *      i2o_dma_free - Free DMA memory
+ *      @dev: struct device pointer to the PCI device of the I2O controller
+ *      @addr: i2o_dma struct which contains the DMA buffer
+ *
+ *      Free a coherent DMA memory and set virtual address of addr to NULL.
+ */
+void i2o_dma_free(struct device *dev, struct i2o_dma *addr)
+{
+        if (addr->virt) {
+                if (addr->phys)
+                        dma_free_coherent(dev, addr->len, addr->virt,
+                                          addr->phys);
+                else
+                        kfree(addr->virt);
+                addr->virt = NULL;
+        }
+}
+EXPORT_SYMBOL_GPL(i2o_dma_free);
+
+
+/**
+ *      i2o_dma_realloc - Realloc DMA memory
+ *      @dev: struct device pointer to the PCI device of the I2O controller
+ *      @addr: pointer to a i2o_dma struct DMA buffer
+ *      @len: new length of memory
+ *
+ *      If there was something allocated in the addr, free it first. If len > 0
+ *      than try to allocate it and write the addresses back to the addr
+ *      structure. If len == 0 set the virtual address to NULL.
+ *
+ *      Returns the 0 on success or negative error code on failure.
+ */
+int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr, size_t len)
+{
+        i2o_dma_free(dev, addr);
+
+        if (len)
+                return i2o_dma_alloc(dev, addr, len);
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(i2o_dma_realloc);
+
+/*
+ *      i2o_pool_alloc - Allocate an slab cache and mempool
+ *      @mempool: pointer to struct i2o_pool to write data into.
+ *      @name: name which is used to identify cache
+ *      @size: size of each object
+ *      @min_nr: minimum number of objects
+ *
+ *      First allocates a slab cache with name and size. Then allocates a
+ *      mempool which uses the slab cache for allocation and freeing.
+ *
+ *      Returns 0 on success or negative error code on failure.
+ */
+int i2o_pool_alloc(struct i2o_pool *pool, const char *name,
+                                 size_t size, int min_nr)
+{
+        pool->name = kmalloc(strlen(name) + 1, GFP_KERNEL);
+        if (!pool->name)
+                goto exit;
+        strcpy(pool->name, name);
+
+        pool->slab =
+            kmem_cache_create(pool->name, size, 0, SLAB_HWCACHE_ALIGN, NULL);
+        if (!pool->slab)
+                goto free_name;
+
+        pool->mempool = mempool_create_slab_pool(min_nr, pool->slab);
+        if (!pool->mempool)
+                goto free_slab;
+
+        return 0;
+
+free_slab:
+        kmem_cache_destroy(pool->slab);
+
+free_name:
+        kfree(pool->name);
+
+exit:
+        return -ENOMEM;
+}
+EXPORT_SYMBOL_GPL(i2o_pool_alloc);
+
+/*
+ *      i2o_pool_free - Free slab cache and mempool again
+ *      @mempool: pointer to struct i2o_pool which should be freed
+ *
+ *      Note that you have to return all objects to the mempool again before
+ *      calling i2o_pool_free().
+ */
+void i2o_pool_free(struct i2o_pool *pool)
+{
+        mempool_destroy(pool->mempool);
+        kmem_cache_destroy(pool->slab);
+        kfree(pool->name);
+};
+EXPORT_SYMBOL_GPL(i2o_pool_free);
diff --git a/drivers/message/i2o/pci.c b/drivers/message/i2o/pci.c
index 685a89547a51..610ef1204e68 100644
--- a/drivers/message/i2o/pci.c
+++ b/drivers/message/i2o/pci.c
@@ -186,31 +186,29 @@ static int __devinit i2o_pci_alloc(struct i2o_controller *c)
                 }
         }
 
-        if (i2o_dma_alloc(dev, &c->status, 8, GFP_KERNEL)) {
+        if (i2o_dma_alloc(dev, &c->status, 8)) {
                 i2o_pci_free(c);
                 return -ENOMEM;
         }
 
-        if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt), GFP_KERNEL)) {
+        if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt))) {
                 i2o_pci_free(c);
                 return -ENOMEM;
         }
 
-        if (i2o_dma_alloc(dev, &c->dlct, 8192, GFP_KERNEL)) {
+        if (i2o_dma_alloc(dev, &c->dlct, 8192)) {
                 i2o_pci_free(c);
                 return -ENOMEM;
         }
 
-        if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block),
-                          GFP_KERNEL)) {
+        if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block))) {
                 i2o_pci_free(c);
                 return -ENOMEM;
         }
 
-        if (i2o_dma_alloc
-            (dev, &c->out_queue,
-             I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE *
-             sizeof(u32), GFP_KERNEL)) {
+        if (i2o_dma_alloc(dev, &c->out_queue,
+                I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE *
+                                sizeof(u32))) {
                 i2o_pci_free(c);
                 return -ENOMEM;
         }
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index a726f3b01a6b..efd3aa08b88b 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -15,7 +15,7 @@ if MISC_DEVICES
 
 config ATMEL_PWM
         tristate "Atmel AT32/AT91 PWM support"
-        depends on AVR32 || ARCH_AT91
+        depends on AVR32 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9
         help
           This option enables device driver support for the PWM channels
           on certain Atmel prcoessors.  Pulse Width Modulation is used for
@@ -409,6 +409,7 @@ config EEEPC_LAPTOP
         depends on BACKLIGHT_CLASS_DEVICE
         depends on HWMON
         depends on EXPERIMENTAL
+        depends on RFKILL
         ---help---
           This driver supports the Fn-Fx keys on Eee PC laptops.
           It also adds the ability to switch camera/wlan on/off.
diff --git a/drivers/misc/hp-wmi.c b/drivers/misc/hp-wmi.c
index 6d407c2a4f91..5dabfb69ee53 100644
--- a/drivers/misc/hp-wmi.c
+++ b/drivers/misc/hp-wmi.c
@@ -309,7 +309,7 @@ static int hp_wmi_setkeycode(struct input_dev *dev, int scancode, int keycode)
         return -EINVAL;
 }
 
-void hp_wmi_notify(u32 value, void *context)
+static void hp_wmi_notify(u32 value, void *context)
 {
         struct acpi_buffer response = { ACPI_ALLOCATE_BUFFER, NULL };
         static struct key_entry *key;
diff --git a/drivers/misc/sgi-gru/gru.h b/drivers/misc/sgi-gru/gru.h
index 40df7cb3f0a5..f93f03a9e6e9 100644
--- a/drivers/misc/sgi-gru/gru.h
+++ b/drivers/misc/sgi-gru/gru.h
@@ -30,9 +30,9 @@
 /*
  * Size used to map GRU GSeg
  */
-#if defined CONFIG_IA64
+#if defined(CONFIG_IA64)
 #define GRU_GSEG_PAGESIZE       (256 * 1024UL)
-#elif defined CONFIG_X86_64
+#elif defined(CONFIG_X86_64)
 #define GRU_GSEG_PAGESIZE       (256 * 1024UL)          /* ZZZ 2MB ??? */
 #else
 #error "Unsupported architecture"
diff --git a/drivers/misc/sgi-gru/gru_instructions.h b/drivers/misc/sgi-gru/gru_instructions.h
index 0dc36225c7c6..48762e7b98be 100644
--- a/drivers/misc/sgi-gru/gru_instructions.h
+++ b/drivers/misc/sgi-gru/gru_instructions.h
@@ -26,7 +26,7 @@
  * Architecture dependent functions
  */
 
-#if defined CONFIG_IA64
+#if defined(CONFIG_IA64)
 #include <linux/compiler.h>
 #include <asm/intrinsics.h>
 #define __flush_cache(p)                ia64_fc(p)
@@ -36,7 +36,7 @@
                         barrier();                                      \
                         *((volatile int *)(p)) = v; /* force st.rel */  \
                 } while (0)
-#elif defined CONFIG_X86_64
+#elif defined(CONFIG_X86_64)
 #define __flush_cache(p)                clflush(p)
 #define gru_ordered_store_int(p,v)                                      \
                 do {                                                    \
@@ -299,6 +299,7 @@ static inline void gru_flush_cache(void *p)
 static inline void gru_start_instruction(struct gru_instruction *ins, int op32)
 {
         gru_ordered_store_int(ins, op32);
+        gru_flush_cache(ins);
 }
 
 
@@ -604,8 +605,9 @@ static inline int gru_get_cb_substatus(void *cb)
 static inline int gru_check_status(void *cb)
 {
         struct gru_control_block_status *cbs = (void *)cb;
-        int ret = cbs->istatus;
+        int ret;
 
+        ret = cbs->istatus;
         if (ret == CBS_CALL_OS)
                 ret = gru_check_status_proc(cb);
         return ret;
@@ -617,7 +619,7 @@ static inline int gru_check_status(void *cb)
 static inline int gru_wait(void *cb)
 {
         struct gru_control_block_status *cbs = (void *)cb;
-        int ret = cbs->istatus;;
+        int ret = cbs->istatus;
 
         if (ret != CBS_IDLE)
                 ret = gru_wait_proc(cb);
diff --git a/drivers/misc/sgi-gru/grufault.c b/drivers/misc/sgi-gru/grufault.c
index 3d33015bbf31..8c389d606c30 100644
--- a/drivers/misc/sgi-gru/grufault.c
+++ b/drivers/misc/sgi-gru/grufault.c
@@ -214,12 +214,14 @@ static int non_atomic_pte_lookup(struct vm_area_struct *vma,
 }
 
 /*
- *
  * atomic_pte_lookup
  *
  * Convert a user virtual address to a physical address
  * Only supports Intel large pages (2MB only) on x86_64.
  *      ZZZ - hugepage support is incomplete
+ *
+ * NOTE: mmap_sem is already held on entry to this function. This
+ * guarantees existence of the page tables.
  */
 static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
         int write, unsigned long *paddr, int *pageshift)
@@ -229,9 +231,6 @@ static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
         pud_t *pudp;
         pte_t pte;
 
-        WARN_ON(irqs_disabled());               /* ZZZ debug */
-
-        local_irq_disable();
         pgdp = pgd_offset(vma->vm_mm, vaddr);
         if (unlikely(pgd_none(*pgdp)))
                 goto err;
@@ -250,8 +249,6 @@ static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
 #endif
                 pte = *pte_offset_kernel(pmdp, vaddr);
 
-        local_irq_enable();
-
         if (unlikely(!pte_present(pte) ||
                      (write && (!pte_write(pte) || !pte_dirty(pte)))))
                 return 1;
@@ -324,6 +321,7 @@ static int gru_try_dropin(struct gru_thread_state *gts,
          * Atomic lookup is faster & usually works even if called in non-atomic
          * context.
          */
+        rmb();  /* Must/check ms_range_active before loading PTEs */
         ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &pageshift);
         if (ret) {
                 if (!cb)
@@ -543,6 +541,7 @@ int gru_get_exception_detail(unsigned long arg)
                 ucbnum = get_cb_number((void *)excdet.cb);
                 cbrnum = thread_cbr_number(gts, ucbnum);
                 cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
+                prefetchw(cbe);         /* Harmless on hardware, required for emulator */
                 excdet.opc = cbe->opccpy;
                 excdet.exopc = cbe->exopccpy;
                 excdet.ecause = cbe->ecause;
diff --git a/drivers/misc/sgi-gru/grufile.c b/drivers/misc/sgi-gru/grufile.c
index d61cee796efd..5c027b6b4e5a 100644
--- a/drivers/misc/sgi-gru/grufile.c
+++ b/drivers/misc/sgi-gru/grufile.c
@@ -113,7 +113,7 @@ static int gru_file_mmap(struct file *file, struct vm_area_struct *vma)
                 return -EPERM;
 
         if (vma->vm_start & (GRU_GSEG_PAGESIZE - 1) ||
-                        vma->vm_end & (GRU_GSEG_PAGESIZE - 1))
+                                vma->vm_end & (GRU_GSEG_PAGESIZE - 1))
                 return -EINVAL;
 
         vma->vm_flags |=
@@ -398,6 +398,12 @@ static int __init gru_init(void)
         irq = get_base_irq();
         for (chip = 0; chip < GRU_CHIPLETS_PER_BLADE; chip++) {
                 ret = request_irq(irq + chip, gru_intr, 0, id, NULL);
+                /* TODO: fix irq handling on x86. For now ignore failures because
+                 * interrupts are not required & not yet fully supported */
+                if (ret) {
+                        printk("!!!WARNING: GRU ignoring request failure!!!\n");
+                        ret = 0;
+                }
                 if (ret) {
                         printk(KERN_ERR "%s: request_irq failed\n",
                                GRU_DRIVER_ID_STR);
diff --git a/drivers/misc/sgi-gru/gruhandles.h b/drivers/misc/sgi-gru/gruhandles.h
index d16031d62673..b63018d60fe1 100644
--- a/drivers/misc/sgi-gru/gruhandles.h
+++ b/drivers/misc/sgi-gru/gruhandles.h
@@ -91,12 +91,7 @@
 #define GSEGPOFF(h)             ((h) & (GRU_SIZE - 1))
 
 /* Convert an arbitrary handle address to the beginning of the GRU segment */
-#ifndef __PLUGIN__
 #define GRUBASE(h)              ((void *)((unsigned long)(h) & ~(GRU_SIZE - 1)))
-#else
-extern void *gmu_grubase(void *h);
-#define GRUBASE(h)              gmu_grubase(h)
-#endif
 
 /* General addressing macros. */
 static inline void *get_gseg_base_address(void *base, int ctxnum)
diff --git a/drivers/misc/sgi-gru/grukservices.c b/drivers/misc/sgi-gru/grukservices.c
index dfd49af0fe18..880c55dfb662 100644
--- a/drivers/misc/sgi-gru/grukservices.c
+++ b/drivers/misc/sgi-gru/grukservices.c
@@ -122,6 +122,7 @@ int gru_get_cb_exception_detail(void *cb,
         struct gru_control_block_extended *cbe;
 
         cbe = get_cbe(GRUBASE(cb), get_cb_number(cb));
+        prefetchw(cbe);         /* Harmless on hardware, required for emulator */
         excdet->opc = cbe->opccpy;
         excdet->exopc = cbe->exopccpy;
         excdet->ecause = cbe->ecause;
@@ -466,7 +467,7 @@ int gru_send_message_gpa(unsigned long mq, void *mesg, unsigned int bytes)
         STAT(mesq_send);
         BUG_ON(bytes < sizeof(int) || bytes > 2 * GRU_CACHE_LINE_BYTES);
 
-        clines = (bytes + GRU_CACHE_LINE_BYTES - 1) / GRU_CACHE_LINE_BYTES;
+        clines = DIV_ROUND_UP(bytes, GRU_CACHE_LINE_BYTES);
         if (gru_get_cpu_resources(bytes, &cb, &dsr))
                 return MQE_BUG_NO_RESOURCES;
         memcpy(dsr, mesg, bytes);
diff --git a/drivers/misc/sgi-gru/grumain.c b/drivers/misc/sgi-gru/grumain.c
index 0eeb8dddd2f5..e11e1ac50900 100644
--- a/drivers/misc/sgi-gru/grumain.c
+++ b/drivers/misc/sgi-gru/grumain.c
@@ -432,29 +432,35 @@ static inline long gru_copy_handle(void *d, void *s)
         return GRU_HANDLE_BYTES;
 }
 
-/* rewrite in assembly & use lots of prefetch */
-static void gru_load_context_data(void *save, void *grubase, int ctxnum,
-                                  unsigned long cbrmap, unsigned long dsrmap)
+static void gru_prefetch_context(void *gseg, void *cb, void *cbe, unsigned long cbrmap,
+                                unsigned long length)
 {
-        void *gseg, *cb, *cbe;
-        unsigned long length;
         int i, scr;
 
-        gseg = grubase + ctxnum * GRU_GSEG_STRIDE;
-        length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
         prefetch_data(gseg + GRU_DS_BASE, length / GRU_CACHE_LINE_BYTES,
                       GRU_CACHE_LINE_BYTES);
 
-        cb = gseg + GRU_CB_BASE;
-        cbe = grubase + GRU_CBE_BASE;
         for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
                 prefetch_data(cb, 1, GRU_CACHE_LINE_BYTES);
                 prefetch_data(cbe + i * GRU_HANDLE_STRIDE, 1,
                               GRU_CACHE_LINE_BYTES);
                 cb += GRU_HANDLE_STRIDE;
         }
+}
+
+static void gru_load_context_data(void *save, void *grubase, int ctxnum,
+                                  unsigned long cbrmap, unsigned long dsrmap)
+{
+        void *gseg, *cb, *cbe;
+        unsigned long length;
+        int i, scr;
 
+        gseg = grubase + ctxnum * GRU_GSEG_STRIDE;
         cb = gseg + GRU_CB_BASE;
+        cbe = grubase + GRU_CBE_BASE;
+        length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
+        gru_prefetch_context(gseg, cb, cbe, cbrmap, length);
+
         for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
                 save += gru_copy_handle(cb, save);
                 save += gru_copy_handle(cbe + i * GRU_HANDLE_STRIDE, save);
@@ -472,15 +478,16 @@ static void gru_unload_context_data(void *save, void *grubase, int ctxnum,
         int i, scr;
 
         gseg = grubase + ctxnum * GRU_GSEG_STRIDE;
-
         cb = gseg + GRU_CB_BASE;
         cbe = grubase + GRU_CBE_BASE;
+        length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
+        gru_prefetch_context(gseg, cb, cbe, cbrmap, length);
+
         for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
                 save += gru_copy_handle(save, cb);
                 save += gru_copy_handle(save, cbe + i * GRU_HANDLE_STRIDE);
                 cb += GRU_HANDLE_STRIDE;
         }
-        length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
         memcpy(save, gseg + GRU_DS_BASE, length);
 }
 
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index c16028872bbb..1b9fc3c6b875 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -172,7 +172,7 @@ struct mmc_omap_host {
         struct omap_mmc_platform_data *pdata;
 };
 
-void mmc_omap_fclk_offdelay(struct mmc_omap_slot *slot)
+static void mmc_omap_fclk_offdelay(struct mmc_omap_slot *slot)
 {
         unsigned long tick_ns;
 
@@ -182,7 +182,7 @@ void mmc_omap_fclk_offdelay(struct mmc_omap_slot *slot)
         }
 }
 
-void mmc_omap_fclk_enable(struct mmc_omap_host *host, unsigned int enable)
+static void mmc_omap_fclk_enable(struct mmc_omap_host *host, unsigned int enable)
 {
         unsigned long flags;
 
@@ -1455,7 +1455,9 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
 
         host->irq = irq;
         host->phys_base = host->mem_res->start;
-        host->virt_base = (void __iomem *) IO_ADDRESS(host->phys_base);
+        host->virt_base = ioremap(res->start, res->end - res->start + 1);
+        if (!host->virt_base)
+                goto err_ioremap;
 
         if (cpu_is_omap24xx()) {
                 host->iclk = clk_get(&pdev->dev, "mmc_ick");
@@ -1510,6 +1512,8 @@ err_free_iclk:
                 clk_put(host->iclk);
         }
 err_free_mmc_host:
+        iounmap(host->virt_base);
+err_ioremap:
         kfree(host);
 err_free_mem_region:
         release_mem_region(res->start, res->end - res->start + 1);
@@ -1536,6 +1540,7 @@ static int mmc_omap_remove(struct platform_device *pdev)
         if (host->fclk && !IS_ERR(host->fclk))
                 clk_put(host->fclk);
 
+        iounmap(host->virt_base);
         release_mem_region(pdev->resource[0].start,
                            pdev->resource[0].end - pdev->resource[0].start + 1);
 
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index edb90b58a9b1..9a06dc93ee0d 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -564,10 +564,8 @@ int parse_mtd_partitions(struct mtd_info *master, const char **types,
 
         for ( ; ret <= 0 && *types; types++) {
                 parser = get_partition_parser(*types);
-#ifdef CONFIG_KMOD
                 if (!parser && !request_module("%s", *types))
                                 parser = get_partition_parser(*types);
-#endif
                 if (!parser) {
                         printk(KERN_NOTICE "%s partition parsing not available\n",
                                *types);
diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c
index 26d42987971f..782994ead0e8 100644
--- a/drivers/mtd/nand/ams-delta.c
+++ b/drivers/mtd/nand/ams-delta.c
@@ -145,7 +145,7 @@ static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd,
 
 static int ams_delta_nand_ready(struct mtd_info *mtd)
 {
-        return omap_get_gpio_datain(AMS_DELTA_GPIO_PIN_NAND_RB);
+        return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB);
 }
 
 /*
@@ -185,7 +185,7 @@ static int __init ams_delta_init(void)
         this->read_buf = ams_delta_read_buf;
         this->verify_buf = ams_delta_verify_buf;
         this->cmd_ctrl = ams_delta_hwcontrol;
-        if (!omap_request_gpio(AMS_DELTA_GPIO_PIN_NAND_RB)) {
+        if (gpio_request(AMS_DELTA_GPIO_PIN_NAND_RB, "nand_rdy") == 0) {
                 this->dev_ready = ams_delta_nand_ready;
         } else {
                 this->dev_ready = NULL;
diff --git a/drivers/net/3c509.c b/drivers/net/3c509.c
index b9d097c9f6bb..3a7bc524af33 100644
--- a/drivers/net/3c509.c
+++ b/drivers/net/3c509.c
@@ -40,7 +40,7 @@
                 v1.14 10/15/97 Avoided waiting..discard message for fast machines -djb
                 v1.15 1/31/98 Faster recovery for Tx errors. -djb
                 v1.16 2/3/98 Different ID port handling to avoid sound cards. -djb
-                v1.18 12Mar2001 Andrew Morton <andrewm@uow.edu.au>
+                v1.18 12Mar2001 Andrew Morton
                         - Avoid bogus detect of 3c590's (Andrzej Krzysztofowicz)
                         - Reviewed against 1.18 from scyld.com
                 v1.18a 17Nov2001 Jeff Garzik <jgarzik@pobox.com>
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c
index a28de8182802..7107620f615d 100644
--- a/drivers/net/cs89x0.c
+++ b/drivers/net/cs89x0.c
@@ -36,8 +36,7 @@
 
   Alan Cox          : Removed 1.2 support, added 2.1 extra counters.
 
-  Andrew Morton     : andrewm@uow.edu.au
-                    : Kernel 2.3.48
+  Andrew Morton     : Kernel 2.3.48
                     : Handle kmalloc() failures
                     : Other resource allocation fixes
                     : Add SMP locks
@@ -49,7 +48,7 @@
                     : Fixed an out-of-mem bug in dma_rx()
                     : Updated Documentation/networking/cs89x0.txt
 
-  Andrew Morton     : andrewm@uow.edu.au / Kernel 2.3.99-pre1
+  Andrew Morton     : Kernel 2.3.99-pre1
                     : Use skb_reserve to longword align IP header (two places)
                     : Remove a delay loop from dma_rx()
                     : Replace '100' with HZ
@@ -57,11 +56,11 @@
                     : Added 'cs89x0_dma=N' kernel boot option
                     : Correctly initialise lp->lock in non-module compile
 
-  Andrew Morton     : andrewm@uow.edu.au / Kernel 2.3.99-pre4-1
+  Andrew Morton     : Kernel 2.3.99-pre4-1
                     : MOD_INC/DEC race fix (see
                     : http://www.uwsg.indiana.edu/hypermail/linux/kernel/0003.3/1532.html)
 
-  Andrew Morton     : andrewm@uow.edu.au / Kernel 2.4.0-test7-pre2
+  Andrew Morton     : Kernel 2.4.0-test7-pre2
                     : Enhanced EEPROM support to cover more devices,
                     :   abstracted IRQ mapping to support CONFIG_ARCH_CLPS7500 arch
                     :   (Jason Gunthorpe <jgg@ualberta.ca>)
@@ -156,7 +155,7 @@
 #include "cs89x0.h"
 
 static char version[] __initdata =
-"cs89x0.c: v2.4.3-pre1 Russell Nelson <nelson@crynwr.com>, Andrew Morton <andrewm@uow.edu.au>\n";
+"cs89x0.c: v2.4.3-pre1 Russell Nelson <nelson@crynwr.com>, Andrew Morton\n";
 
 #define DRV_NAME "cs89x0"
 
@@ -1877,7 +1876,7 @@ MODULE_PARM_DESC(dmasize , "(ignored)");
 MODULE_PARM_DESC(use_dma , "(ignored)");
 #endif
 
-MODULE_AUTHOR("Mike Cruse, Russwll Nelson <nelson@crynwr.com>, Andrew Morton <andrewm@uow.edu.au>");
+MODULE_AUTHOR("Mike Cruse, Russwll Nelson <nelson@crynwr.com>, Andrew Morton");
 MODULE_LICENSE("GPL");
 
 
diff --git a/drivers/net/irda/sir_dongle.c b/drivers/net/irda/sir_dongle.c
index 36030241f7a9..2a9930e6e2af 100644
--- a/drivers/net/irda/sir_dongle.c
+++ b/drivers/net/irda/sir_dongle.c
@@ -67,9 +67,7 @@ int sirdev_get_dongle(struct sir_dev *dev, IRDA_DONGLE type)
         const struct dongle_driver *drv = NULL;
         int err = -EINVAL;
 
-#ifdef CONFIG_KMOD
         request_module("irda-dongle-%d", type);
-#endif
 
         if (dev->dongle_drv != NULL)
                 return -EBUSY;
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c
index 03d027c68879..7e857e938adb 100644
--- a/drivers/net/ppp_generic.c
+++ b/drivers/net/ppp_generic.c
@@ -2127,13 +2127,9 @@ ppp_set_compress(struct ppp *ppp, unsigned long arg)
             || ccp_option[1] < 2 || ccp_option[1] > data.length)
                 goto out;
 
-        cp = find_compressor(ccp_option[0]);
-#ifdef CONFIG_KMOD
-        if (!cp) {
-                request_module("ppp-compress-%d", ccp_option[0]);
-                cp = find_compressor(ccp_option[0]);
-        }
-#endif /* CONFIG_KMOD */
+        cp = try_then_request_module(
+                find_compressor(ccp_option[0]),
+                "ppp-compress-%d", ccp_option[0]);
         if (!cp)
                 goto out;
 
diff --git a/drivers/net/pppox.c b/drivers/net/pppox.c
index c6898c1fc54d..03aecc97fb45 100644
--- a/drivers/net/pppox.c
+++ b/drivers/net/pppox.c
@@ -115,13 +115,8 @@ static int pppox_create(struct net *net, struct socket *sock, int protocol)
                 goto out;
 
         rc = -EPROTONOSUPPORT;
-#ifdef CONFIG_KMOD
-        if (!pppox_protos[protocol]) {
-                char buffer[32];
-                sprintf(buffer, "pppox-proto-%d", protocol);
-                request_module(buffer);
-        }
-#endif
+        if (!pppox_protos[protocol])
+                request_module("pppox-proto-%d", protocol);
         if (!pppox_protos[protocol] ||
             !try_module_get(pppox_protos[protocol]->owner))
                 goto out;
diff --git a/drivers/net/wireless/ath9k/main.c b/drivers/net/wireless/ath9k/main.c
index 74726990d59e..f05f584ab7bc 100644
--- a/drivers/net/wireless/ath9k/main.c
+++ b/drivers/net/wireless/ath9k/main.c
@@ -1640,6 +1640,11 @@ static int ath9k_ampdu_action(struct ieee80211_hw *hw,
         return ret;
 }
 
+static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
+{
+        return -EOPNOTSUPP;
+}
+
 static struct ieee80211_ops ath9k_ops = {
         .tx                 = ath9k_tx,
         .start              = ath9k_start,
@@ -1664,7 +1669,8 @@ static struct ieee80211_ops ath9k_ops = {
         .get_tsf            = ath9k_get_tsf,
         .reset_tsf          = ath9k_reset_tsf,
         .tx_last_beacon     = NULL,
-        .ampdu_action       = ath9k_ampdu_action
+        .ampdu_action       = ath9k_ampdu_action,
+        .set_frag_threshold = ath9k_no_fragmentation,
 };
 
 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index f6003e7996af..5155b8a760a7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -833,12 +833,12 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
         switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
         case CSR_HW_REV_TYPE_5100:
         case CSR_HW_REV_TYPE_5300:
-                /* 5X00 wants in Celsius */
+        case CSR_HW_REV_TYPE_5350:
+                /* 5X00 and 5350 wants in Celsius */
                 priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD;
                 break;
         case CSR_HW_REV_TYPE_5150:
-        case CSR_HW_REV_TYPE_5350:
-                /* 5X50 wants in Kelvin */
+                /* 5150 wants in Kelvin */
                 priv->hw_params.ct_kill_threshold =
                                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
                 break;
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
index 93944de923ca..e2a58e477036 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
@@ -2422,7 +2422,7 @@ static void rs_free_sta(void *priv_r, struct ieee80211_sta *sta,
                         void *priv_sta)
 {
         struct iwl_lq_sta *lq_sta = priv_sta;
-        struct iwl_priv *priv = priv_r;
+        struct iwl_priv *priv __maybe_unused = priv_r;
 
         IWL_DEBUG_RATE("enter\n");
         kfree(lq_sta);
diff --git a/drivers/net/wireless/libertas/cmd.c b/drivers/net/wireless/libertas/cmd.c
index a912fb68c099..297696de2da0 100644
--- a/drivers/net/wireless/libertas/cmd.c
+++ b/drivers/net/wireless/libertas/cmd.c
@@ -823,7 +823,9 @@ int lbs_update_channel(struct lbs_private *priv)
 int lbs_set_channel(struct lbs_private *priv, u8 channel)
 {
         struct cmd_ds_802_11_rf_channel cmd;
+#ifdef DEBUG
         u8 old_channel = priv->curbssparams.channel;
+#endif
         int ret = 0;
 
         lbs_deb_enter(LBS_DEB_CMD);
diff --git a/drivers/net/wireless/orinoco_cs.c b/drivers/net/wireless/orinoco_cs.c
index e585684e59a0..6fcf2bda7cdf 100644
--- a/drivers/net/wireless/orinoco_cs.c
+++ b/drivers/net/wireless/orinoco_cs.c
@@ -378,6 +378,7 @@ static int orinoco_cs_resume(struct pcmcia_device *link)
         struct orinoco_private *priv = netdev_priv(dev);
         struct orinoco_pccard *card = priv->card;
         int err = 0;
+        unsigned long flags;
 
         if (! test_bit(0, &card->hard_reset_in_progress)) {
                 err = orinoco_reinit_firmware(dev);
@@ -387,7 +388,7 @@ static int orinoco_cs_resume(struct pcmcia_device *link)
                         return -EIO;
                 }
 
-                spin_lock(&priv->lock);
+                spin_lock_irqsave(&priv->lock, flags);
 
                 netif_device_attach(dev);
                 priv->hw_unavailable--;
@@ -399,7 +400,7 @@ static int orinoco_cs_resume(struct pcmcia_device *link)
                                        dev->name, err);
                 }
 
-                spin_unlock(&priv->lock);
+                spin_unlock_irqrestore(&priv->lock, flags);
         }
 
         return err;
diff --git a/drivers/net/wireless/p54/p54common.c b/drivers/net/wireless/p54/p54common.c
index 1994aa199d37..117c7d3a52b0 100644
--- a/drivers/net/wireless/p54/p54common.c
+++ b/drivers/net/wireless/p54/p54common.c
@@ -479,7 +479,6 @@ static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
         printk(KERN_ERR "p54: eeprom parse failed!\n");
         return err;
 }
-EXPORT_SYMBOL_GPL(p54_parse_eeprom);
 
 static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
 {
diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c
index 1912f5e9a0a9..75d749bccb0d 100644
--- a/drivers/net/wireless/p54/p54usb.c
+++ b/drivers/net/wireless/p54/p54usb.c
@@ -39,6 +39,7 @@ static struct usb_device_id p54u_table[] __devinitdata = {
         {USB_DEVICE(0x0846, 0x4200)},   /* Netgear WG121 */
         {USB_DEVICE(0x0846, 0x4210)},   /* Netgear WG121 the second ? */
         {USB_DEVICE(0x0846, 0x4220)},   /* Netgear WG111 */
+        {USB_DEVICE(0x09aa, 0x1000)},   /* Spinnaker Proto board */
         {USB_DEVICE(0x0cde, 0x0006)},   /* Medion 40900, Roper Europe */
         {USB_DEVICE(0x124a, 0x4023)},   /* Shuttle PN15, Airvast WM168g, IOGear GWU513 */
         {USB_DEVICE(0x1915, 0x2234)},   /* Linksys WUSB54G OEM */
@@ -63,8 +64,8 @@ static struct usb_device_id p54u_table[] __devinitdata = {
         {USB_DEVICE(0x0cde, 0x0006)},   /* Medion MD40900 */
         {USB_DEVICE(0x0cde, 0x0008)},   /* Sagem XG703A */
         {USB_DEVICE(0x0d8e, 0x3762)},   /* DLink DWL-G120 Cohiba */
-        {USB_DEVICE(0x09aa, 0x1000)},   /* Spinnaker Proto board */
         {USB_DEVICE(0x124a, 0x4025)},   /* IOGear GWU513 (GW3887IK chip) */
+        {USB_DEVICE(0x1260, 0xee22)},   /* SMC 2862W-G version 2 */
         {USB_DEVICE(0x13b1, 0x000a)},   /* Linksys WUSB54G ver 2 */
         {USB_DEVICE(0x13B1, 0x000C)},   /* Linksys WUSB54AG */
         {USB_DEVICE(0x1435, 0x0427)},   /* Inventel UR054G */
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c
index 1676ac484790..451d410ecdae 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.c
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
@@ -374,7 +374,7 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
         struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
         struct txentry_desc txdesc;
         struct skb_frame_desc *skbdesc;
-        unsigned int iv_len;
+        unsigned int iv_len = 0;
 
         if (unlikely(rt2x00queue_full(queue)))
                 return -EINVAL;
@@ -395,6 +395,9 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
         entry->skb = skb;
         rt2x00queue_create_tx_descriptor(entry, &txdesc);
 
+        if (IEEE80211_SKB_CB(skb)->control.hw_key != NULL)
+                iv_len = IEEE80211_SKB_CB(skb)->control.hw_key->iv_len;
+
         /*
          * All information is retreived from the skb->cb array,
          * now we should claim ownership of the driver part of that
@@ -410,9 +413,7 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
          * the frame so we can provide it to the driver seperately.
          */
         if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
-            !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags) &&
-                (IEEE80211_SKB_CB(skb)->control.hw_key != NULL)) {
-                iv_len = IEEE80211_SKB_CB(skb)->control.hw_key->iv_len;
+            !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
                 rt2x00crypto_tx_remove_iv(skb, iv_len);
         }
 
diff --git a/drivers/net/wireless/rtl8187_dev.c b/drivers/net/wireless/rtl8187_dev.c
index e9902613e2ee..431e3c78bf27 100644
--- a/drivers/net/wireless/rtl8187_dev.c
+++ b/drivers/net/wireless/rtl8187_dev.c
@@ -33,10 +33,13 @@ MODULE_LICENSE("GPL");
 static struct usb_device_id rtl8187_table[] __devinitdata = {
         /* Asus */
         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
+        /* Belkin */
+        {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
         /* Realtek */
         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
+        {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
         /* Netgear */
         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
diff --git a/drivers/net/wireless/spectrum_cs.c b/drivers/net/wireless/spectrum_cs.c
index b0c71c3be467..852789ad34b3 100644
--- a/drivers/net/wireless/spectrum_cs.c
+++ b/drivers/net/wireless/spectrum_cs.c
@@ -426,10 +426,11 @@ spectrum_cs_suspend(struct pcmcia_device *link)
 {
         struct net_device *dev = link->priv;
         struct orinoco_private *priv = netdev_priv(dev);
+        unsigned long flags;
         int err = 0;
 
         /* Mark the device as stopped, to block IO until later */
-        spin_lock(&priv->lock);
+        spin_lock_irqsave(&priv->lock, flags);
 
         err = __orinoco_down(dev);
         if (err)
@@ -439,7 +440,7 @@ spectrum_cs_suspend(struct pcmcia_device *link)
         netif_device_detach(dev);
         priv->hw_unavailable++;
 
-        spin_unlock(&priv->lock);
+        spin_unlock_irqrestore(&priv->lock, flags);
 
         return err;
 }
diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c
index 3c3dd403f5dd..5c7a87e38951 100644
--- a/drivers/net/xen-netfront.c
+++ b/drivers/net/xen-netfront.c
@@ -471,7 +471,7 @@ static int xennet_start_xmit(struct sk_buff *skb, struct net_device *dev)
         unsigned int offset = offset_in_page(data);
         unsigned int len = skb_headlen(skb);
 
-        frags += (offset + len + PAGE_SIZE - 1) / PAGE_SIZE;
+        frags += DIV_ROUND_UP(offset + len, PAGE_SIZE);
         if (unlikely(frags > MAX_SKB_FRAGS + 1)) {
                 printk(KERN_ALERT "xennet: skb rides the rocket: %d frags\n",
                        frags);
diff --git a/drivers/nubus/nubus.c b/drivers/nubus/nubus.c
index 2f047e573d86..f5f75844954c 100644
--- a/drivers/nubus/nubus.c
+++ b/drivers/nubus/nubus.c
@@ -126,7 +126,7 @@ static void nubus_advance(unsigned char **ptr, int len, int map)
         {
                 while(not_useful(p,map))
                         p++;
-                        p++;
+                p++;
                 len--;
         }
         *ptr = p;
diff --git a/drivers/parport/ChangeLog b/drivers/parport/ChangeLog
index db717c1d62a5..8565bbbeb6ec 100644
--- a/drivers/parport/ChangeLog
+++ b/drivers/parport/ChangeLog
@@ -311,7 +311,7 @@
         * ieee1284_ops.c (parport_ieee1284_read_nibble): Reset nAutoFd
         on timeout.  Matches 2.2.x behaviour.
 
-2001-03-02  Andrew Morton <andrewm@uow.edu.au>
+2001-03-02  Andrew Morton
 
         * parport_pc.c (registered_parport): New static variable.
         (parport_pc_find_ports): Set it when we register PCI driver.
diff --git a/drivers/parport/ieee1284.c b/drivers/parport/ieee1284.c
index e97059415ab4..ac2a805ac7ea 100644
--- a/drivers/parport/ieee1284.c
+++ b/drivers/parport/ieee1284.c
@@ -1,4 +1,4 @@
-/* $Id: parport_ieee1284.c,v 1.4 1997/10/19 21:37:21 philip Exp $
+/*
  * IEEE-1284 implementation for parport.
  *
  * Authors: Phil Blundell <philb@gnu.org>
diff --git a/drivers/parport/probe.c b/drivers/parport/probe.c
index cd565bb4e1a9..0f6550719bcf 100644
--- a/drivers/parport/probe.c
+++ b/drivers/parport/probe.c
@@ -1,4 +1,4 @@
-/* $Id: parport_probe.c,v 1.1 1999/07/03 08:56:17 davem Exp $
+/*
  * Parallel port device probing code
  *
  * Authors:    Carsten Gross, carsten@sol.wohnheim.uni-ulm.de
diff --git a/drivers/parport/share.c b/drivers/parport/share.c
index a8a62bbbb576..0ebca450ed29 100644
--- a/drivers/parport/share.c
+++ b/drivers/parport/share.c
@@ -1,4 +1,4 @@
-/* $Id: parport_share.c,v 1.15 1998/01/11 12:06:17 philip Exp $
+/*
  * Parallel-port resource manager code.
  * 
  * Authors: David Campbell <campbell@tirian.che.curtin.edu.au>
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
index 74d1c906c5d6..b46c60b72708 100644
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -64,10 +64,11 @@ sa1100_cs-$(CONFIG_SA1100_SHANNON)		+= sa1100_shannon.o
 sa1100_cs-$(CONFIG_SA1100_SIMPAD)               += sa1100_simpad.o
 
 pxa2xx_lubbock_cs-y                             += pxa2xx_lubbock.o sa1111_generic.o
+pxa2xx_cm_x2xx_cs-y                             += pxa2xx_cm_x2xx.o pxa2xx_cm_x255.o pxa2xx_cm_x270.o
 pxa2xx-obj-$(CONFIG_ARCH_LUBBOCK)               += pxa2xx_lubbock_cs.o
 pxa2xx-obj-$(CONFIG_MACH_MAINSTONE)             += pxa2xx_mainstone.o
 pxa2xx-obj-$(CONFIG_PXA_SHARPSL)                += pxa2xx_sharpsl.o
-pxa2xx-obj-$(CONFIG_MACH_ARMCORE)               += pxa2xx_cm_x2xx.o pxa2xx_cm_x255.o pxa2xx_cm_x270.o
+pxa2xx-obj-$(CONFIG_MACH_ARMCORE)               += pxa2xx_cm_x2xx_cs.o
 pxa2xx-obj-$(CONFIG_ARCH_VIPER)                 += pxa2xx_viper.o
 pxa2xx-obj-$(CONFIG_TRIZEPS_PCMCIA)             += pxa2xx_trizeps.o
 pxa2xx-obj-$(CONFIG_MACH_PALMTX)                += pxa2xx_palmtx.o
diff --git a/drivers/pnp/base.h b/drivers/pnp/base.h
index 3532984a9cab..3b8b9d3cb03d 100644
--- a/drivers/pnp/base.h
+++ b/drivers/pnp/base.h
@@ -147,7 +147,7 @@ char *pnp_resource_type_name(struct resource *res);
 void dbg_pnp_show_resources(struct pnp_dev *dev, char *desc);
 
 void pnp_free_resources(struct pnp_dev *dev);
-int pnp_resource_type(struct resource *res);
+unsigned long pnp_resource_type(struct resource *res);
 
 struct pnp_resource {
         struct list_head list;
diff --git a/drivers/pnp/core.c b/drivers/pnp/core.c
index 7d65da821229..817fe626e15b 100644
--- a/drivers/pnp/core.c
+++ b/drivers/pnp/core.c
@@ -210,7 +210,6 @@ void __pnp_remove_device(struct pnp_dev *dev)
 
 static int __init pnp_init(void)
 {
-        printk(KERN_INFO "Linux Plug and Play Support v0.97 (c) Adam Belay\n");
         return bus_register(&pnp_bus_type);
 }
 
diff --git a/drivers/pnp/quirks.c b/drivers/pnp/quirks.c
index 0bdf9b8a5e58..d15e2b77af88 100644
--- a/drivers/pnp/quirks.c
+++ b/drivers/pnp/quirks.c
@@ -245,7 +245,7 @@ static void quirk_system_pci_resources(struct pnp_dev *dev)
          */
         for_each_pci_dev(pdev) {
                 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
-                        unsigned int type;
+                        unsigned long type;
 
                         type = pci_resource_flags(pdev, i) &
                                         (IORESOURCE_IO | IORESOURCE_MEM);
diff --git a/drivers/pnp/resource.c b/drivers/pnp/resource.c
index 4cfe3a1efdfb..dbae23acdd5b 100644
--- a/drivers/pnp/resource.c
+++ b/drivers/pnp/resource.c
@@ -467,14 +467,14 @@ int pnp_check_dma(struct pnp_dev *dev, struct resource *res)
 #endif
 }
 
-int pnp_resource_type(struct resource *res)
+unsigned long pnp_resource_type(struct resource *res)
 {
         return res->flags & (IORESOURCE_IO  | IORESOURCE_MEM |
                              IORESOURCE_IRQ | IORESOURCE_DMA);
 }
 
 struct resource *pnp_get_resource(struct pnp_dev *dev,
-                                  unsigned int type, unsigned int num)
+                                  unsigned long type, unsigned int num)
 {
         struct pnp_resource *pnp_res;
         struct resource *res;
diff --git a/drivers/power/olpc_battery.c b/drivers/power/olpc_battery.c
index 32570af3c5c9..5fbca2681baa 100644
--- a/drivers/power/olpc_battery.c
+++ b/drivers/power/olpc_battery.c
@@ -205,9 +205,9 @@ static int olpc_bat_get_property(struct power_supply *psy,
                                  union power_supply_propval *val)
 {
         int ret = 0;
-        int16_t ec_word;
+        __be16 ec_word;
         uint8_t ec_byte;
-        uint64_t ser_buf;
+        __be64 ser_buf;
 
         ret = olpc_ec_cmd(EC_BAT_STATUS, NULL, 0, &ec_byte, 1);
         if (ret)
@@ -257,16 +257,14 @@ static int olpc_bat_get_property(struct power_supply *psy,
                 if (ret)
                         return ret;
 
-                ec_word = be16_to_cpu(ec_word);
-                val->intval = ec_word * 9760L / 32;
+                val->intval = (int)be16_to_cpu(ec_word) * 9760L / 32;
                 break;
         case POWER_SUPPLY_PROP_CURRENT_AVG:
                 ret = olpc_ec_cmd(EC_BAT_CURRENT, NULL, 0, (void *)&ec_word, 2);
                 if (ret)
                         return ret;
 
-                ec_word = be16_to_cpu(ec_word);
-                val->intval = ec_word * 15625L / 120;
+                val->intval = (int)be16_to_cpu(ec_word) * 15625L / 120;
                 break;
         case POWER_SUPPLY_PROP_CAPACITY:
                 ret = olpc_ec_cmd(EC_BAT_SOC, NULL, 0, &ec_byte, 1);
@@ -278,24 +276,22 @@ static int olpc_bat_get_property(struct power_supply *psy,
                 ret = olpc_ec_cmd(EC_BAT_TEMP, NULL, 0, (void *)&ec_word, 2);
                 if (ret)
                         return ret;
-                ec_word = be16_to_cpu(ec_word);
-                val->intval = ec_word * 100 / 256;
+
+                val->intval = (int)be16_to_cpu(ec_word) * 100 / 256;
                 break;
         case POWER_SUPPLY_PROP_TEMP_AMBIENT:
                 ret = olpc_ec_cmd(EC_AMB_TEMP, NULL, 0, (void *)&ec_word, 2);
                 if (ret)
                         return ret;
 
-                ec_word = be16_to_cpu(ec_word);
-                val->intval = ec_word * 100 / 256;
+                val->intval = (int)be16_to_cpu(ec_word) * 100 / 256;
                 break;
         case POWER_SUPPLY_PROP_CHARGE_COUNTER:
                 ret = olpc_ec_cmd(EC_BAT_ACR, NULL, 0, (void *)&ec_word, 2);
                 if (ret)
                         return ret;
 
-                ec_word = be16_to_cpu(ec_word);
-                val->intval = ec_word * 6250 / 15;
+                val->intval = (int)be16_to_cpu(ec_word) * 6250 / 15;
                 break;
         case POWER_SUPPLY_PROP_SERIAL_NUMBER:
                 ret = olpc_ec_cmd(EC_BAT_SERIAL, NULL, 0, (void *)&ser_buf, 8);
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index f3d7fd3406a6..f660ef3e5b29 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -220,22 +220,22 @@ config RTC_DRV_PCF8583
           will be called rtc-pcf8583.
 
 config RTC_DRV_M41T80
-        tristate "ST M41T80/81/82/83/84/85/87"
+        tristate "ST M41T65/M41T80/81/82/83/84/85/87"
         help
-          If you say Y here you will get support for the
-          ST M41T80 RTC chips series. Currently following chips are
-          supported: M41T80, M41T81, M41T82, M41T83, M41ST84, M41ST85
-          and M41ST87.
+          If you say Y here you will get support for the ST M41T60
+          and M41T80 RTC chips series. Currently, the following chips are
+          supported: M41T65, M41T80, M41T81, M41T82, M41T83, M41ST84,
+          M41ST85, and M41ST87.
 
           This driver can also be built as a module. If so, the module
           will be called rtc-m41t80.
 
 config RTC_DRV_M41T80_WDT
-        bool "ST M41T80 series RTC watchdog timer"
+        bool "ST M41T65/M41T80 series RTC watchdog timer"
         depends on RTC_DRV_M41T80
         help
           If you say Y here you will get support for the
-          watchdog timer in ST M41T80 RTC chips series.
+          watchdog timer in the ST M41T60 and M41T80 RTC chips series.
 
 config RTC_DRV_TWL92330
         boolean "TI TWL92330/Menelaus"
@@ -319,6 +319,15 @@ config RTC_DRV_RS5C348
           This driver can also be built as a module. If so, the module
           will be called rtc-rs5c348.
 
+config RTC_DRV_DS3234
+        tristate "Maxim/Dallas DS3234"
+        help
+          If you say yes here you get support for the
+          Maxim/Dallas DS3234 SPI RTC chip.
+
+          This driver can also be built as a module. If so, the module
+          will be called rtc-ds3234.
+
 endif # SPI_MASTER
 
 comment "Platform RTC drivers"
@@ -603,7 +612,7 @@ config RTC_DRV_RS5C313
 
 config RTC_DRV_PPC
        tristate "PowerPC machine dependent RTC support"
-       depends on PPC_MERGE
+       depends on PPC
        help
          The PowerPC kernel has machine-specific functions for accessing
          the RTC. This exposes that functionality through the generic RTC
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 37a71b727262..d05928b3ca94 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_RTC_DRV_DS1511)	+= rtc-ds1511.o
 obj-$(CONFIG_RTC_DRV_DS1553)    += rtc-ds1553.o
 obj-$(CONFIG_RTC_DRV_DS1672)    += rtc-ds1672.o
 obj-$(CONFIG_RTC_DRV_DS1742)    += rtc-ds1742.o
+obj-$(CONFIG_RTC_DRV_DS3234)    += rtc-ds3234.o
 obj-$(CONFIG_RTC_DRV_EP93XX)    += rtc-ep93xx.o
 obj-$(CONFIG_RTC_DRV_FM3130)    += rtc-fm3130.o
 obj-$(CONFIG_RTC_DRV_ISL1208)   += rtc-isl1208.o
diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c
index 4e888cc8be5b..37082616482b 100644
--- a/drivers/rtc/rtc-at91rm9200.c
+++ b/drivers/rtc/rtc-at91rm9200.c
@@ -29,10 +29,10 @@
 #include <linux/completion.h>
 
 #include <asm/uaccess.h>
+
 #include <mach/at91_rtc.h>
 
 
-#define AT91_RTC_FREQ           1
 #define AT91_RTC_EPOCH          1900UL  /* just like arch/arm/common/rtctime.c */
 
 static DECLARE_COMPLETION(at91_rtc_updated);
@@ -228,8 +228,6 @@ static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
                         (imr & AT91_RTC_ACKUPD) ? "yes" : "no");
         seq_printf(seq, "periodic_IRQ\t: %s\n",
                         (imr & AT91_RTC_SECEV) ? "yes" : "no");
-        seq_printf(seq, "periodic_freq\t: %ld\n",
-                        (unsigned long) AT91_RTC_FREQ);
 
         return 0;
 }
diff --git a/drivers/rtc/rtc-dev.c b/drivers/rtc/rtc-dev.c
index 52e2743b04ec..079e9ed907e0 100644
--- a/drivers/rtc/rtc-dev.c
+++ b/drivers/rtc/rtc-dev.c
@@ -432,9 +432,15 @@ static int rtc_dev_release(struct inode *inode, struct file *file)
 {
         struct rtc_device *rtc = file->private_data;
 
-#ifdef CONFIG_RTC_INTF_DEV_UIE_EMUL
-        clear_uie(rtc);
-#endif
+        /* We shut down the repeating IRQs that userspace enabled,
+         * since nothing is listening to them.
+         *  - Update (UIE) ... currently only managed through ioctls
+         *  - Periodic (PIE) ... also used through rtc_*() interface calls
+         *
+         * Leave the alarm alone; it may be set to trigger a system wakeup
+         * later, or be used by kernel code, and is a one-shot event anyway.
+         */
+        rtc_dev_ioctl(file, RTC_UIE_OFF, 0);
         rtc_irq_set_state(rtc, NULL, 0);
 
         if (rtc->ops->release)
diff --git a/drivers/rtc/rtc-ds1286.c b/drivers/rtc/rtc-ds1286.c
index 4b4c1b6a4187..4fcb16bbff4a 100644
--- a/drivers/rtc/rtc-ds1286.c
+++ b/drivers/rtc/rtc-ds1286.c
@@ -17,6 +17,7 @@
 #include <linux/platform_device.h>
 #include <linux/bcd.h>
 #include <linux/ds1286.h>
+#include <linux/io.h>
 
 #define DRV_VERSION             "1.0"
 
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index bbf97e65202a..4fcf0734a6ef 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -23,10 +23,6 @@
  * to have set the chip up as a clock (turning on the oscillator and
  * setting the date and time), Linux can ignore the non-clock features.
  * That's a natural job for a factory or repair bench.
- *
- * This is currently a simple no-alarms driver.  If your board has the
- * alarm irq wired up on a ds1337 or ds1339, and you want to use that,
- * then look at the rtc-rs5c372 driver for code to steal...
  */
 enum ds_type {
         ds_1307,
@@ -67,6 +63,7 @@ enum ds_type {
 #       define DS1307_BIT_RS0           0x01
 #define DS1337_REG_CONTROL      0x0e
 #       define DS1337_BIT_nEOSC         0x80
+#       define DS1339_BIT_BBSQI         0x20
 #       define DS1337_BIT_RS2           0x10
 #       define DS1337_BIT_RS1           0x08
 #       define DS1337_BIT_INTCN         0x04
@@ -83,19 +80,22 @@ enum ds_type {
 #       define DS1337_BIT_OSF           0x80
 #       define DS1337_BIT_A2I           0x02
 #       define DS1337_BIT_A1I           0x01
+#define DS1339_REG_ALARM1_SECS  0x07
 #define DS1339_REG_TRICKLE      0x10
 
 
 
 struct ds1307 {
         u8                      reg_addr;
-        bool                    has_nvram;
-        u8                      regs[8];
+        u8                      regs[11];
         enum ds_type            type;
+        unsigned long           flags;
+#define HAS_NVRAM       0               /* bit 0 == sysfs file active */
+#define HAS_ALARM       1               /* bit 1 == irq claimed */
         struct i2c_msg          msg[2];
         struct i2c_client       *client;
-        struct i2c_client       dev;
         struct rtc_device       *rtc;
+        struct work_struct      work;
 };
 
 struct chip_desc {
@@ -132,12 +132,79 @@ static const struct i2c_device_id ds1307_id[] = {
 };
 MODULE_DEVICE_TABLE(i2c, ds1307_id);
 
+/*----------------------------------------------------------------------*/
+
+/*
+ * The IRQ logic includes a "real" handler running in IRQ context just
+ * long enough to schedule this workqueue entry.   We need a task context
+ * to talk to the RTC, since I2C I/O calls require that; and disable the
+ * IRQ until we clear its status on the chip, so that this handler can
+ * work with any type of triggering (not just falling edge).
+ *
+ * The ds1337 and ds1339 both have two alarms, but we only use the first
+ * one (with a "seconds" field).  For ds1337 we expect nINTA is our alarm
+ * signal; ds1339 chips have only one alarm signal.
+ */
+static void ds1307_work(struct work_struct *work)
+{
+        struct ds1307           *ds1307;
+        struct i2c_client       *client;
+        struct mutex            *lock;
+        int                     stat, control;
+
+        ds1307 = container_of(work, struct ds1307, work);
+        client = ds1307->client;
+        lock = &ds1307->rtc->ops_lock;
+
+        mutex_lock(lock);
+        stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
+        if (stat < 0)
+                goto out;
+
+        if (stat & DS1337_BIT_A1I) {
+                stat &= ~DS1337_BIT_A1I;
+                i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
+
+                control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
+                if (control < 0)
+                        goto out;
+
+                control &= ~DS1337_BIT_A1IE;
+                i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
+
+                /* rtc_update_irq() assumes that it is called
+                 * from IRQ-disabled context.
+                 */
+                local_irq_disable();
+                rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
+                local_irq_enable();
+        }
+
+out:
+        if (test_bit(HAS_ALARM, &ds1307->flags))
+                enable_irq(client->irq);
+        mutex_unlock(lock);
+}
+
+static irqreturn_t ds1307_irq(int irq, void *dev_id)
+{
+        struct i2c_client       *client = dev_id;
+        struct ds1307           *ds1307 = i2c_get_clientdata(client);
+
+        disable_irq_nosync(irq);
+        schedule_work(&ds1307->work);
+        return IRQ_HANDLED;
+}
+
+/*----------------------------------------------------------------------*/
+
 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
 {
         struct ds1307   *ds1307 = dev_get_drvdata(dev);
         int             tmp;
 
         /* read the RTC date and time registers all at once */
+        ds1307->reg_addr = 0;
         ds1307->msg[1].flags = I2C_M_RD;
         ds1307->msg[1].len = 7;
 
@@ -231,9 +298,186 @@ static int ds1307_set_time(struct device *dev, struct rtc_time *t)
         return 0;
 }
 
+static int ds1307_read_alarm(struct device *dev, struct rtc_wkalrm *t)
+{
+        struct i2c_client       *client = to_i2c_client(dev);
+        struct ds1307           *ds1307 = i2c_get_clientdata(client);
+        int                     ret;
+
+        if (!test_bit(HAS_ALARM, &ds1307->flags))
+                return -EINVAL;
+
+        /* read all ALARM1, ALARM2, and status registers at once */
+        ds1307->reg_addr = DS1339_REG_ALARM1_SECS;
+        ds1307->msg[1].flags = I2C_M_RD;
+        ds1307->msg[1].len = 9;
+
+        ret = i2c_transfer(to_i2c_adapter(client->dev.parent),
+                        ds1307->msg, 2);
+        if (ret != 2) {
+                dev_err(dev, "%s error %d\n", "alarm read", ret);
+                return -EIO;
+        }
+
+        dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
+                        "alarm read",
+                        ds1307->regs[0], ds1307->regs[1],
+                        ds1307->regs[2], ds1307->regs[3],
+                        ds1307->regs[4], ds1307->regs[5],
+                        ds1307->regs[6], ds1307->regs[7],
+                        ds1307->regs[8]);
+
+        /* report alarm time (ALARM1); assume 24 hour and day-of-month modes,
+         * and that all four fields are checked matches
+         */
+        t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
+        t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
+        t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
+        t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
+        t->time.tm_mon = -1;
+        t->time.tm_year = -1;
+        t->time.tm_wday = -1;
+        t->time.tm_yday = -1;
+        t->time.tm_isdst = -1;
+
+        /* ... and status */
+        t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
+        t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
+
+        dev_dbg(dev, "%s secs=%d, mins=%d, "
+                "hours=%d, mday=%d, enabled=%d, pending=%d\n",
+                "alarm read", t->time.tm_sec, t->time.tm_min,
+                t->time.tm_hour, t->time.tm_mday,
+                t->enabled, t->pending);
+
+        return 0;
+}
+
+static int ds1307_set_alarm(struct device *dev, struct rtc_wkalrm *t)
+{
+        struct i2c_client       *client = to_i2c_client(dev);
+        struct ds1307           *ds1307 = i2c_get_clientdata(client);
+        unsigned char           *buf = ds1307->regs;
+        u8                      control, status;
+        int                     ret;
+
+        if (!test_bit(HAS_ALARM, &ds1307->flags))
+                return -EINVAL;
+
+        dev_dbg(dev, "%s secs=%d, mins=%d, "
+                "hours=%d, mday=%d, enabled=%d, pending=%d\n",
+                "alarm set", t->time.tm_sec, t->time.tm_min,
+                t->time.tm_hour, t->time.tm_mday,
+                t->enabled, t->pending);
+
+        /* read current status of both alarms and the chip */
+        ds1307->reg_addr = DS1339_REG_ALARM1_SECS;
+        ds1307->msg[1].flags = I2C_M_RD;
+        ds1307->msg[1].len = 9;
+
+        ret = i2c_transfer(to_i2c_adapter(client->dev.parent),
+                        ds1307->msg, 2);
+        if (ret != 2) {
+                dev_err(dev, "%s error %d\n", "alarm write", ret);
+                return -EIO;
+        }
+        control = ds1307->regs[7];
+        status = ds1307->regs[8];
+
+        dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
+                        "alarm set (old status)",
+                        ds1307->regs[0], ds1307->regs[1],
+                        ds1307->regs[2], ds1307->regs[3],
+                        ds1307->regs[4], ds1307->regs[5],
+                        ds1307->regs[6], control, status);
+
+        /* set ALARM1, using 24 hour and day-of-month modes */
+        *buf++ = DS1339_REG_ALARM1_SECS;        /* first register addr */
+        buf[0] = bin2bcd(t->time.tm_sec);
+        buf[1] = bin2bcd(t->time.tm_min);
+        buf[2] = bin2bcd(t->time.tm_hour);
+        buf[3] = bin2bcd(t->time.tm_mday);
+
+        /* set ALARM2 to non-garbage */
+        buf[4] = 0;
+        buf[5] = 0;
+        buf[6] = 0;
+
+        /* optionally enable ALARM1 */
+        buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
+        if (t->enabled) {
+                dev_dbg(dev, "alarm IRQ armed\n");
+                buf[7] |= DS1337_BIT_A1IE;      /* only ALARM1 is used */
+        }
+        buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
+
+        ds1307->msg[1].flags = 0;
+        ds1307->msg[1].len = 10;
+
+        ret = i2c_transfer(to_i2c_adapter(client->dev.parent),
+                        &ds1307->msg[1], 1);
+        if (ret != 1) {
+                dev_err(dev, "can't set alarm time\n");
+                return -EIO;
+        }
+
+        return 0;
+}
+
+static int ds1307_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
+{
+        struct i2c_client       *client = to_i2c_client(dev);
+        struct ds1307           *ds1307 = i2c_get_clientdata(client);
+        int                     ret;
+
+        switch (cmd) {
+        case RTC_AIE_OFF:
+                if (!test_bit(HAS_ALARM, &ds1307->flags))
+                        return -ENOTTY;
+
+                ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
+                if (ret < 0)
+                        return ret;
+
+                ret &= ~DS1337_BIT_A1IE;
+
+                ret = i2c_smbus_write_byte_data(client,
+                                                DS1337_REG_CONTROL, ret);
+                if (ret < 0)
+                        return ret;
+
+                break;
+
+        case RTC_AIE_ON:
+                if (!test_bit(HAS_ALARM, &ds1307->flags))
+                        return -ENOTTY;
+
+                ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
+                if (ret < 0)
+                        return ret;
+
+                ret |= DS1337_BIT_A1IE;
+
+                ret = i2c_smbus_write_byte_data(client,
+                                                DS1337_REG_CONTROL, ret);
+                if (ret < 0)
+                        return ret;
+
+                break;
+
+        default:
+                return -ENOIOCTLCMD;
+        }
+
+        return 0;
+}
+
 static const struct rtc_class_ops ds13xx_rtc_ops = {
         .read_time      = ds1307_get_time,
         .set_time       = ds1307_set_time,
+        .read_alarm     = ds1307_read_alarm,
+        .set_alarm      = ds1307_set_alarm,
+        .ioctl          = ds1307_ioctl,
 };
 
 /*----------------------------------------------------------------------*/
@@ -327,6 +571,7 @@ static int __devinit ds1307_probe(struct i2c_client *client,
         int                     tmp;
         const struct chip_desc  *chip = &chips[id->driver_data];
         struct i2c_adapter      *adapter = to_i2c_adapter(client->dev.parent);
+        int                     want_irq = false;
 
         if (!i2c_check_functionality(adapter,
                         I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
@@ -353,6 +598,12 @@ static int __devinit ds1307_probe(struct i2c_client *client,
         switch (ds1307->type) {
         case ds_1337:
         case ds_1339:
+                /* has IRQ? */
+                if (ds1307->client->irq > 0 && chip->alarm) {
+                        INIT_WORK(&ds1307->work, ds1307_work);
+                        want_irq = true;
+                }
+
                 ds1307->reg_addr = DS1337_REG_CONTROL;
                 ds1307->msg[1].len = 2;
 
@@ -369,8 +620,20 @@ static int __devinit ds1307_probe(struct i2c_client *client,
 
                 /* oscillator off?  turn it on, so clock can tick. */
                 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
-                        i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
-                                ds1307->regs[0] & ~DS1337_BIT_nEOSC);
+                        ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
+
+                /* Using IRQ?  Disable the square wave and both alarms.
+                 * For ds1339, be sure alarms can trigger when we're
+                 * running on Vbackup (BBSQI); we assume ds1337 will
+                 * ignore that bit
+                 */
+                if (want_irq) {
+                        ds1307->regs[0] |= DS1337_BIT_INTCN | DS1339_BIT_BBSQI;
+                        ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
+                }
+
+                i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
+                                                        ds1307->regs[0]);
 
                 /* oscillator fault?  clear flag, and warn */
                 if (ds1307->regs[1] & DS1337_BIT_OSF) {
@@ -495,10 +758,22 @@ read_rtc:
                 goto exit_free;
         }
 
+        if (want_irq) {
+                err = request_irq(client->irq, ds1307_irq, 0,
+                          ds1307->rtc->name, client);
+                if (err) {
+                        dev_err(&client->dev,
+                                "unable to request IRQ!\n");
+                        goto exit_irq;
+                }
+                set_bit(HAS_ALARM, &ds1307->flags);
+                dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
+        }
+
         if (chip->nvram56) {
                 err = sysfs_create_bin_file(&client->dev.kobj, &nvram);
                 if (err == 0) {
-                        ds1307->has_nvram = true;
+                        set_bit(HAS_NVRAM, &ds1307->flags);
                         dev_info(&client->dev, "56 bytes nvram\n");
                 }
         }
@@ -512,7 +787,9 @@ exit_bad:
                         ds1307->regs[2], ds1307->regs[3],
                         ds1307->regs[4], ds1307->regs[5],
                         ds1307->regs[6]);
-
+exit_irq:
+        if (ds1307->rtc)
+                rtc_device_unregister(ds1307->rtc);
 exit_free:
         kfree(ds1307);
         return err;
@@ -520,9 +797,14 @@ exit_free:
 
 static int __devexit ds1307_remove(struct i2c_client *client)
 {
-        struct ds1307   *ds1307 = i2c_get_clientdata(client);
+        struct ds1307           *ds1307 = i2c_get_clientdata(client);
+
+        if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
+                free_irq(client->irq, client);
+                cancel_work_sync(&ds1307->work);
+        }
 
-        if (ds1307->has_nvram)
+        if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
                 sysfs_remove_bin_file(&client->dev.kobj, &nvram);
 
         rtc_device_unregister(ds1307->rtc);
diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c
index a150418fba76..a5b0fc09f0c6 100644
--- a/drivers/rtc/rtc-ds1374.c
+++ b/drivers/rtc/rtc-ds1374.c
@@ -429,12 +429,33 @@ static int __devexit ds1374_remove(struct i2c_client *client)
         return 0;
 }
 
+#ifdef CONFIG_PM
+static int ds1374_suspend(struct i2c_client *client, pm_message_t state)
+{
+        if (client->irq >= 0 && device_may_wakeup(&client->dev))
+                enable_irq_wake(client->irq);
+        return 0;
+}
+
+static int ds1374_resume(struct i2c_client *client)
+{
+        if (client->irq >= 0 && device_may_wakeup(&client->dev))
+                disable_irq_wake(client->irq);
+        return 0;
+}
+#else
+#define ds1374_suspend  NULL
+#define ds1374_resume   NULL
+#endif
+
 static struct i2c_driver ds1374_driver = {
         .driver = {
                 .name = "rtc-ds1374",
                 .owner = THIS_MODULE,
         },
         .probe = ds1374_probe,
+        .suspend = ds1374_suspend,
+        .resume = ds1374_resume,
         .remove = __devexit_p(ds1374_remove),
         .id_table = ds1374_id,
 };
diff --git a/drivers/rtc/rtc-ds1511.c b/drivers/rtc/rtc-ds1511.c
index 0f0d27d1c4ca..86981d34fbb6 100644
--- a/drivers/rtc/rtc-ds1511.c
+++ b/drivers/rtc/rtc-ds1511.c
@@ -379,18 +379,6 @@ ds1511_interrupt(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
- static void
-ds1511_rtc_release(struct device *dev)
-{
-        struct platform_device *pdev = to_platform_device(dev);
-        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
-
-        if (pdata->irq >= 0) {
-                pdata->irqen = 0;
-                ds1511_rtc_update_alarm(pdata);
-        }
-}
-
  static int
 ds1511_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
 {
@@ -428,7 +416,6 @@ static const struct rtc_class_ops ds1511_rtc_ops = {
         .set_time       = ds1511_rtc_set_time,
         .read_alarm     = ds1511_rtc_read_alarm,
         .set_alarm      = ds1511_rtc_set_alarm,
-        .release        = ds1511_rtc_release,
         .ioctl          = ds1511_rtc_ioctl,
 };
 
diff --git a/drivers/rtc/rtc-ds1553.c b/drivers/rtc/rtc-ds1553.c
index a19f11415540..4ef59285b489 100644
--- a/drivers/rtc/rtc-ds1553.c
+++ b/drivers/rtc/rtc-ds1553.c
@@ -207,17 +207,6 @@ static irqreturn_t ds1553_rtc_interrupt(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-static void ds1553_rtc_release(struct device *dev)
-{
-        struct platform_device *pdev = to_platform_device(dev);
-        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
-
-        if (pdata->irq >= 0) {
-                pdata->irqen = 0;
-                ds1553_rtc_update_alarm(pdata);
-        }
-}
-
 static int ds1553_rtc_ioctl(struct device *dev, unsigned int cmd,
                             unsigned long arg)
 {
@@ -254,7 +243,6 @@ static const struct rtc_class_ops ds1553_rtc_ops = {
         .set_time       = ds1553_rtc_set_time,
         .read_alarm     = ds1553_rtc_read_alarm,
         .set_alarm      = ds1553_rtc_set_alarm,
-        .release        = ds1553_rtc_release,
         .ioctl          = ds1553_rtc_ioctl,
 };
 
diff --git a/drivers/rtc/rtc-ds1672.c b/drivers/rtc/rtc-ds1672.c
index 6fa4556f5f5c..341d7a5b45a2 100644
--- a/drivers/rtc/rtc-ds1672.c
+++ b/drivers/rtc/rtc-ds1672.c
@@ -9,17 +9,10 @@
  * published by the Free Software Foundation.
  */
 
-#include <linux/module.h>
 #include <linux/i2c.h>
 #include <linux/rtc.h>
 
-#define DRV_VERSION "0.3"
-
-/* Addresses to scan: none. This chip cannot be detected. */
-static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
-
-/* Insmod parameters */
-I2C_CLIENT_INSMOD;
+#define DRV_VERSION "0.4"
 
 /* Registers */
 
@@ -29,8 +22,7 @@ I2C_CLIENT_INSMOD;
 
 #define DS1672_REG_CONTROL_EOSC 0x80
 
-/* Prototypes */
-static int ds1672_probe(struct i2c_adapter *adapter, int address, int kind);
+static struct i2c_driver ds1672_driver;
 
 /*
  * In the routines that deal directly with the ds1672 hardware, we use
@@ -44,8 +36,8 @@ static int ds1672_get_datetime(struct i2c_client *client, struct rtc_time *tm)
         unsigned char buf[4];
 
         struct i2c_msg msgs[] = {
-                { client->addr, 0, 1, &addr },          /* setup read ptr */
-                { client->addr, I2C_M_RD, 4, buf },     /* read date */
+                {client->addr, 0, 1, &addr},    /* setup read ptr */
+                {client->addr, I2C_M_RD, 4, buf},       /* read date */
         };
 
         /* read date registers */
@@ -80,7 +72,7 @@ static int ds1672_set_mmss(struct i2c_client *client, unsigned long secs)
         buf[2] = (secs & 0x0000FF00) >> 8;
         buf[3] = (secs & 0x00FF0000) >> 16;
         buf[4] = (secs & 0xFF000000) >> 24;
-        buf[5] = 0;     /* set control reg to enable counting */
+        buf[5] = 0;             /* set control reg to enable counting */
 
         xfer = i2c_master_send(client, buf, 6);
         if (xfer != 6) {
@@ -127,8 +119,8 @@ static int ds1672_get_control(struct i2c_client *client, u8 *status)
         unsigned char addr = DS1672_REG_CONTROL;
 
         struct i2c_msg msgs[] = {
-                { client->addr, 0, 1, &addr },          /* setup read ptr */
-                { client->addr, I2C_M_RD, 1, status },  /* read control */
+                {client->addr, 0, 1, &addr},    /* setup read ptr */
+                {client->addr, I2C_M_RD, 1, status},    /* read control */
         };
 
         /* read control register */
@@ -141,7 +133,8 @@ static int ds1672_get_control(struct i2c_client *client, u8 *status)
 }
 
 /* following are the sysfs callback functions */
-static ssize_t show_control(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t show_control(struct device *dev, struct device_attribute *attr,
+                            char *buf)
 {
         struct i2c_client *client = to_i2c_client(dev);
         u8 control;
@@ -152,85 +145,46 @@ static ssize_t show_control(struct device *dev, struct device_attribute *attr, c
                 return err;
 
         return sprintf(buf, "%s\n", (control & DS1672_REG_CONTROL_EOSC)
-                                        ? "disabled" : "enabled");
+                       ? "disabled" : "enabled");
 }
+
 static DEVICE_ATTR(control, S_IRUGO, show_control, NULL);
 
 static const struct rtc_class_ops ds1672_rtc_ops = {
-        .read_time      = ds1672_rtc_read_time,
-        .set_time       = ds1672_rtc_set_time,
-        .set_mmss       = ds1672_rtc_set_mmss,
+        .read_time = ds1672_rtc_read_time,
+        .set_time = ds1672_rtc_set_time,
+        .set_mmss = ds1672_rtc_set_mmss,
 };
 
-static int ds1672_attach(struct i2c_adapter *adapter)
+static int ds1672_remove(struct i2c_client *client)
 {
-        return i2c_probe(adapter, &addr_data, ds1672_probe);
-}
-
-static int ds1672_detach(struct i2c_client *client)
-{
-        int err;
         struct rtc_device *rtc = i2c_get_clientdata(client);
 
-        if (rtc)
+        if (rtc)
                 rtc_device_unregister(rtc);
 
-        if ((err = i2c_detach_client(client)))
-                return err;
-
-        kfree(client);
-
         return 0;
 }
 
-static struct i2c_driver ds1672_driver = {
-        .driver         = {
-                .name   = "ds1672",
-        },
-        .id             = I2C_DRIVERID_DS1672,
-        .attach_adapter = &ds1672_attach,
-        .detach_client  = &ds1672_detach,
-};
-
-static int ds1672_probe(struct i2c_adapter *adapter, int address, int kind)
+static int ds1672_probe(struct i2c_client *client,
+                        const struct i2c_device_id *id)
 {
         int err = 0;
         u8 control;
-        struct i2c_client *client;
         struct rtc_device *rtc;
 
-        dev_dbg(&adapter->dev, "%s\n", __func__);
+        dev_dbg(&client->dev, "%s\n", __func__);
 
-        if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
-                err = -ENODEV;
-                goto exit;
-        }
-
-        if (!(client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL))) {
-                err = -ENOMEM;
-                goto exit;
-        }
-
-        /* I2C client */
-        client->addr = address;
-        client->driver = &ds1672_driver;
-        client->adapter = adapter;
-
-        strlcpy(client->name, ds1672_driver.driver.name, I2C_NAME_SIZE);
-
-        /* Inform the i2c layer */
-        if ((err = i2c_attach_client(client)))
-                goto exit_kfree;
+        if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
+                return -ENODEV;
 
         dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
 
         rtc = rtc_device_register(ds1672_driver.driver.name, &client->dev,
-                                &ds1672_rtc_ops, THIS_MODULE);
+                                  &ds1672_rtc_ops, THIS_MODULE);
 
-        if (IS_ERR(rtc)) {
-                err = PTR_ERR(rtc);
-                goto exit_detach;
-        }
+        if (IS_ERR(rtc))
+                return PTR_ERR(rtc);
 
         i2c_set_clientdata(client, rtc);
 
@@ -241,7 +195,7 @@ static int ds1672_probe(struct i2c_adapter *adapter, int address, int kind)
 
         if (control & DS1672_REG_CONTROL_EOSC)
                 dev_warn(&client->dev, "Oscillator not enabled. "
-                                        "Set time to enable.\n");
+                         "Set time to enable.\n");
 
         /* Register sysfs hooks */
         err = device_create_file(&client->dev, &dev_attr_control);
@@ -250,19 +204,19 @@ static int ds1672_probe(struct i2c_adapter *adapter, int address, int kind)
 
         return 0;
 
-exit_devreg:
+ exit_devreg:
         rtc_device_unregister(rtc);
-
-exit_detach:
-        i2c_detach_client(client);
-
-exit_kfree:
-        kfree(client);
-
-exit:
         return err;
 }
 
+static struct i2c_driver ds1672_driver = {
+        .driver = {
+                   .name = "rtc-ds1672",
+                   },
+        .probe = &ds1672_probe,
+        .remove = &ds1672_remove,
+};
+
 static int __init ds1672_init(void)
 {
         return i2c_add_driver(&ds1672_driver);
diff --git a/drivers/rtc/rtc-ds3234.c b/drivers/rtc/rtc-ds3234.c
new file mode 100644
index 000000000000..37d131d03f33
--- /dev/null
+++ b/drivers/rtc/rtc-ds3234.c
@@ -0,0 +1,290 @@
+/* drivers/rtc/rtc-ds3234.c
+ *
+ * Driver for Dallas Semiconductor (DS3234) SPI RTC with Integrated Crystal
+ * and SRAM.
+ *
+ * Copyright (C) 2008 MIMOMax Wireless Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Changelog:
+ *
+ * 07-May-2008: Dennis Aberilla <denzzzhome@yahoo.com>
+ *              - Created based on the max6902 code. Only implements the
+ *                date/time keeping functions; no SRAM yet.
+ */
+
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/rtc.h>
+#include <linux/spi/spi.h>
+#include <linux/bcd.h>
+
+#define DS3234_REG_SECONDS      0x00
+#define DS3234_REG_MINUTES      0x01
+#define DS3234_REG_HOURS        0x02
+#define DS3234_REG_DAY          0x03
+#define DS3234_REG_DATE         0x04
+#define DS3234_REG_MONTH        0x05
+#define DS3234_REG_YEAR         0x06
+#define DS3234_REG_CENTURY      (1 << 7) /* Bit 7 of the Month register */
+
+#define DS3234_REG_CONTROL      0x0E
+#define DS3234_REG_CONT_STAT    0x0F
+
+#undef DS3234_DEBUG
+
+struct ds3234 {
+        struct rtc_device *rtc;
+        u8 buf[8]; /* Burst read: addr + 7 regs */
+        u8 tx_buf[2];
+        u8 rx_buf[2];
+};
+
+static void ds3234_set_reg(struct device *dev, unsigned char address,
+                                unsigned char data)
+{
+        struct spi_device *spi = to_spi_device(dev);
+        unsigned char buf[2];
+
+        /* MSB must be '1' to indicate write */
+        buf[0] = address | 0x80;
+        buf[1] = data;
+
+        spi_write(spi, buf, 2);
+}
+
+static int ds3234_get_reg(struct device *dev, unsigned char address,
+                                unsigned char *data)
+{
+        struct spi_device *spi = to_spi_device(dev);
+        struct ds3234 *chip = dev_get_drvdata(dev);
+        struct spi_message message;
+        struct spi_transfer xfer;
+        int status;
+
+        if (!data)
+                return -EINVAL;
+
+        /* Build our spi message */
+        spi_message_init(&message);
+        memset(&xfer, 0, sizeof(xfer));
+
+        /* Address + dummy tx byte */
+        xfer.len = 2;
+        xfer.tx_buf = chip->tx_buf;
+        xfer.rx_buf = chip->rx_buf;
+
+        chip->tx_buf[0] = address;
+        chip->tx_buf[1] = 0xff;
+
+        spi_message_add_tail(&xfer, &message);
+
+        /* do the i/o */
+        status = spi_sync(spi, &message);
+        if (status == 0)
+                status = message.status;
+        else
+                return status;
+
+        *data = chip->rx_buf[1];
+
+        return status;
+}
+
+static int ds3234_get_datetime(struct device *dev, struct rtc_time *dt)
+{
+        struct spi_device *spi = to_spi_device(dev);
+        struct ds3234 *chip = dev_get_drvdata(dev);
+        struct spi_message message;
+        struct spi_transfer xfer;
+        int status;
+
+        /* build the message */
+        spi_message_init(&message);
+        memset(&xfer, 0, sizeof(xfer));
+        xfer.len = 1 + 7;       /* Addr + 7 registers */
+        xfer.tx_buf = chip->buf;
+        xfer.rx_buf = chip->buf;
+        chip->buf[0] = 0x00;    /* Start address */
+        spi_message_add_tail(&xfer, &message);
+
+        /* do the i/o */
+        status = spi_sync(spi, &message);
+        if (status == 0)
+                status = message.status;
+        else
+                return status;
+
+        /* Seconds, Minutes, Hours, Day, Date, Month, Year */
+        dt->tm_sec      = bcd2bin(chip->buf[1]);
+        dt->tm_min      = bcd2bin(chip->buf[2]);
+        dt->tm_hour     = bcd2bin(chip->buf[3] & 0x3f);
+        dt->tm_wday     = bcd2bin(chip->buf[4]) - 1; /* 0 = Sun */
+        dt->tm_mday     = bcd2bin(chip->buf[5]);
+        dt->tm_mon      = bcd2bin(chip->buf[6] & 0x1f) - 1; /* 0 = Jan */
+        dt->tm_year     = bcd2bin(chip->buf[7] & 0xff) + 100; /* Assume 20YY */
+
+#ifdef DS3234_DEBUG
+        dev_dbg(dev, "\n%s : Read RTC values\n", __func__);
+        dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour);
+        dev_dbg(dev, "tm_min : %i\n", dt->tm_min);
+        dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec);
+        dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday);
+        dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday);
+        dev_dbg(dev, "tm_mon : %i\n", dt->tm_mon);
+        dev_dbg(dev, "tm_year: %i\n", dt->tm_year);
+#endif
+
+        return 0;
+}
+
+static int ds3234_set_datetime(struct device *dev, struct rtc_time *dt)
+{
+#ifdef DS3234_DEBUG
+        dev_dbg(dev, "\n%s : Setting RTC values\n", __func__);
+        dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec);
+        dev_dbg(dev, "tm_min : %i\n", dt->tm_min);
+        dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour);
+        dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday);
+        dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday);
+        dev_dbg(dev, "tm_mon : %i\n", dt->tm_mon);
+        dev_dbg(dev, "tm_year: %i\n", dt->tm_year);
+#endif
+
+        ds3234_set_reg(dev, DS3234_REG_SECONDS, bin2bcd(dt->tm_sec));
+        ds3234_set_reg(dev, DS3234_REG_MINUTES, bin2bcd(dt->tm_min));
+        ds3234_set_reg(dev, DS3234_REG_HOURS, bin2bcd(dt->tm_hour) & 0x3f);
+
+        /* 0 = Sun */
+        ds3234_set_reg(dev, DS3234_REG_DAY, bin2bcd(dt->tm_wday + 1));
+        ds3234_set_reg(dev, DS3234_REG_DATE, bin2bcd(dt->tm_mday));
+
+        /* 0 = Jan */
+        ds3234_set_reg(dev, DS3234_REG_MONTH, bin2bcd(dt->tm_mon + 1));
+
+        /* Assume 20YY although we just want to make sure not to go negative. */
+        if (dt->tm_year > 100)
+                dt->tm_year -= 100;
+
+        ds3234_set_reg(dev, DS3234_REG_YEAR, bin2bcd(dt->tm_year));
+
+        return 0;
+}
+
+static int ds3234_read_time(struct device *dev, struct rtc_time *tm)
+{
+        return ds3234_get_datetime(dev, tm);
+}
+
+static int ds3234_set_time(struct device *dev, struct rtc_time *tm)
+{
+        return ds3234_set_datetime(dev, tm);
+}
+
+static const struct rtc_class_ops ds3234_rtc_ops = {
+        .read_time      = ds3234_read_time,
+        .set_time       = ds3234_set_time,
+};
+
+static int ds3234_probe(struct spi_device *spi)
+{
+        struct rtc_device *rtc;
+        unsigned char tmp;
+        struct ds3234 *chip;
+        int res;
+
+        rtc = rtc_device_register("ds3234",
+                                &spi->dev, &ds3234_rtc_ops, THIS_MODULE);
+        if (IS_ERR(rtc))
+                return PTR_ERR(rtc);
+
+        spi->mode = SPI_MODE_3;
+        spi->bits_per_word = 8;
+        spi_setup(spi);
+
+        chip = kzalloc(sizeof(struct ds3234), GFP_KERNEL);
+        if (!chip) {
+                rtc_device_unregister(rtc);
+                return -ENOMEM;
+        }
+        chip->rtc = rtc;
+        dev_set_drvdata(&spi->dev, chip);
+
+        res = ds3234_get_reg(&spi->dev, DS3234_REG_SECONDS, &tmp);
+        if (res) {
+                rtc_device_unregister(rtc);
+                return res;
+        }
+
+        /* Control settings
+         *
+         * CONTROL_REG
+         * BIT 7        6       5       4       3       2       1       0
+         *     EOSC     BBSQW   CONV    RS2     RS1     INTCN   A2IE    A1IE
+         *
+         *     0        0       0       1       1       1       0       0
+         *
+         * CONTROL_STAT_REG
+         * BIT 7        6       5       4       3       2       1       0
+         *     OSF      BB32kHz CRATE1  CRATE0  EN32kHz BSY     A2F     A1F
+         *
+         *     1        0       0       0       1       0       0       0
+         */
+        ds3234_get_reg(&spi->dev, DS3234_REG_CONTROL, &tmp);
+        ds3234_set_reg(&spi->dev, DS3234_REG_CONTROL, tmp & 0x1c);
+
+        ds3234_get_reg(&spi->dev, DS3234_REG_CONT_STAT, &tmp);
+        ds3234_set_reg(&spi->dev, DS3234_REG_CONT_STAT, tmp & 0x88);
+
+        /* Print our settings */
+        ds3234_get_reg(&spi->dev, DS3234_REG_CONTROL, &tmp);
+        dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp);
+
+        ds3234_get_reg(&spi->dev, DS3234_REG_CONT_STAT, &tmp);
+        dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp);
+
+        return 0;
+}
+
+static int __exit ds3234_remove(struct spi_device *spi)
+{
+        struct ds3234 *chip = platform_get_drvdata(spi);
+        struct rtc_device *rtc = chip->rtc;
+
+        if (rtc)
+                rtc_device_unregister(rtc);
+
+        kfree(chip);
+
+        return 0;
+}
+
+static struct spi_driver ds3234_driver = {
+        .driver = {
+                .name    = "ds3234",
+                .bus    = &spi_bus_type,
+                .owner  = THIS_MODULE,
+        },
+        .probe   = ds3234_probe,
+        .remove = __devexit_p(ds3234_remove),
+};
+
+static __init int ds3234_init(void)
+{
+        printk(KERN_INFO "DS3234 SPI RTC Driver\n");
+        return spi_register_driver(&ds3234_driver);
+}
+module_init(ds3234_init);
+
+static __exit void ds3234_exit(void)
+{
+        spi_unregister_driver(&ds3234_driver);
+}
+module_exit(ds3234_exit);
+
+MODULE_DESCRIPTION("DS3234 SPI RTC driver");
+MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-m41t80.c b/drivers/rtc/rtc-m41t80.c
index 24bc1689fc74..470fb2d29545 100644
--- a/drivers/rtc/rtc-m41t80.c
+++ b/drivers/rtc/rtc-m41t80.c
@@ -56,21 +56,27 @@
 #define M41T80_ALHOUR_HT        (1 << 6)        /* HT: Halt Update Bit */
 #define M41T80_FLAGS_AF         (1 << 6)        /* AF: Alarm Flag Bit */
 #define M41T80_FLAGS_BATT_LOW   (1 << 4)        /* BL: Battery Low Bit */
+#define M41T80_WATCHDOG_RB2     (1 << 7)        /* RB: Watchdog resolution */
+#define M41T80_WATCHDOG_RB1     (1 << 1)        /* RB: Watchdog resolution */
+#define M41T80_WATCHDOG_RB0     (1 << 0)        /* RB: Watchdog resolution */
 
-#define M41T80_FEATURE_HT       (1 << 0)
-#define M41T80_FEATURE_BL       (1 << 1)
+#define M41T80_FEATURE_HT       (1 << 0)        /* Halt feature */
+#define M41T80_FEATURE_BL       (1 << 1)        /* Battery low indicator */
+#define M41T80_FEATURE_SQ       (1 << 2)        /* Squarewave feature */
+#define M41T80_FEATURE_WD       (1 << 3)        /* Extra watchdog resolution */
 
 #define DRV_VERSION "0.05"
 
 static const struct i2c_device_id m41t80_id[] = {
-        { "m41t80", 0 },
-        { "m41t81", M41T80_FEATURE_HT },
-        { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL },
-        { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL },
-        { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL },
-        { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL },
-        { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL },
-        { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL },
+        { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD },
+        { "m41t80", M41T80_FEATURE_SQ },
+        { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ},
+        { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
+        { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
+        { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
+        { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
+        { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
+        { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
         { }
 };
 MODULE_DEVICE_TABLE(i2c, m41t80_id);
@@ -386,8 +392,12 @@ static ssize_t m41t80_sysfs_show_sqwfreq(struct device *dev,
                                 struct device_attribute *attr, char *buf)
 {
         struct i2c_client *client = to_i2c_client(dev);
+        struct m41t80_data *clientdata = i2c_get_clientdata(client);
         int val;
 
+        if (!(clientdata->features & M41T80_FEATURE_SQ))
+                return -EINVAL;
+
         val = i2c_smbus_read_byte_data(client, M41T80_REG_SQW);
         if (val < 0)
                 return -EIO;
@@ -408,9 +418,13 @@ static ssize_t m41t80_sysfs_set_sqwfreq(struct device *dev,
                                 const char *buf, size_t count)
 {
         struct i2c_client *client = to_i2c_client(dev);
+        struct m41t80_data *clientdata = i2c_get_clientdata(client);
         int almon, sqw;
         int val = simple_strtoul(buf, NULL, 0);
 
+        if (!(clientdata->features & M41T80_FEATURE_SQ))
+                return -EINVAL;
+
         if (val) {
                 if (!is_power_of_2(val))
                         return -EINVAL;
@@ -499,6 +513,8 @@ static void wdt_ping(void)
                         .buf    = i2c_data,
                 },
         };
+        struct m41t80_data *clientdata = i2c_get_clientdata(save_client);
+
         i2c_data[0] = 0x09;             /* watchdog register */
 
         if (wdt_margin > 31)
@@ -509,6 +525,13 @@ static void wdt_ping(void)
                  */
                 i2c_data[1] = wdt_margin<<2 | 0x82;
 
+        /*
+         * M41T65 has three bits for watchdog resolution.  Don't set bit 7, as
+         * that would be an invalid resolution.
+         */
+        if (clientdata->features & M41T80_FEATURE_WD)
+                i2c_data[1] &= ~M41T80_WATCHDOG_RB2;
+
         i2c_transfer(save_client->adapter, msgs1, 1);
 }
 
diff --git a/drivers/rtc/rtc-m48t35.c b/drivers/rtc/rtc-m48t35.c
index b9c1fe4a198e..0b2197559940 100644
--- a/drivers/rtc/rtc-m48t35.c
+++ b/drivers/rtc/rtc-m48t35.c
@@ -18,6 +18,7 @@
 #include <linux/rtc.h>
 #include <linux/platform_device.h>
 #include <linux/bcd.h>
+#include <linux/io.h>
 
 #define DRV_VERSION             "1.0"
 
diff --git a/drivers/rtc/rtc-max6900.c b/drivers/rtc/rtc-max6900.c
index ded3c0abad83..12c9cd25cad8 100644
--- a/drivers/rtc/rtc-max6900.c
+++ b/drivers/rtc/rtc-max6900.c
@@ -17,19 +17,18 @@
 #include <linux/rtc.h>
 #include <linux/delay.h>
 
-#define DRV_NAME "max6900"
-#define DRV_VERSION "0.1"
+#define DRV_VERSION "0.2"
 
 /*
  * register indices
  */
-#define MAX6900_REG_SC                  0       /* seconds      00-59 */
-#define MAX6900_REG_MN                  1       /* minutes      00-59 */
-#define MAX6900_REG_HR                  2       /* hours        00-23 */
-#define MAX6900_REG_DT                  3       /* day of month 00-31 */
-#define MAX6900_REG_MO                  4       /* month        01-12 */
-#define MAX6900_REG_DW                  5       /* day of week   1-7  */
-#define MAX6900_REG_YR                  6       /* year         00-99 */
+#define MAX6900_REG_SC                  0       /* seconds      00-59 */
+#define MAX6900_REG_MN                  1       /* minutes      00-59 */
+#define MAX6900_REG_HR                  2       /* hours        00-23 */
+#define MAX6900_REG_DT                  3       /* day of month 00-31 */
+#define MAX6900_REG_MO                  4       /* month        01-12 */
+#define MAX6900_REG_DW                  5       /* day of week   1-7  */
+#define MAX6900_REG_YR                  6       /* year         00-99 */
 #define MAX6900_REG_CT                  7       /* control */
                                                 /* register 8 is undocumented */
 #define MAX6900_REG_CENTURY             9       /* century */
@@ -39,7 +38,6 @@
 
 #define MAX6900_REG_CT_WP               (1 << 7)        /* Write Protect */
 
-
 /*
  * register read/write commands
  */
@@ -52,16 +50,7 @@
 
 #define MAX6900_IDLE_TIME_AFTER_WRITE   3       /* specification says 2.5 mS */
 
-#define MAX6900_I2C_ADDR                0xa0
-
-static const unsigned short normal_i2c[] = {
-        MAX6900_I2C_ADDR >> 1,
-        I2C_CLIENT_END
-};
-
-I2C_CLIENT_INSMOD;                      /* defines addr_data */
-
-static int max6900_probe(struct i2c_adapter *adapter, int addr, int kind);
+static struct i2c_driver max6900_driver;
 
 static int max6900_i2c_read_regs(struct i2c_client *client, u8 *buf)
 {
@@ -69,36 +58,35 @@ static int max6900_i2c_read_regs(struct i2c_client *client, u8 *buf)
         u8 reg_century_read[1] = { MAX6900_REG_CENTURY_READ };
         struct i2c_msg msgs[4] = {
                 {
-                        .addr   = client->addr,
-                        .flags  = 0, /* write */
-                        .len    = sizeof(reg_burst_read),
-                        .buf    = reg_burst_read
-                },
+                 .addr = client->addr,
+                 .flags = 0,    /* write */
+                 .len = sizeof(reg_burst_read),
+                 .buf = reg_burst_read}
+                ,
                 {
-                        .addr   = client->addr,
-                        .flags  = I2C_M_RD,
-                        .len    = MAX6900_BURST_LEN,
-                        .buf    = buf
-                },
+                 .addr = client->addr,
+                 .flags = I2C_M_RD,
+                 .len = MAX6900_BURST_LEN,
+                 .buf = buf}
+                ,
                 {
-                        .addr   = client->addr,
-                        .flags  = 0, /* write */
-                        .len    = sizeof(reg_century_read),
-                        .buf    = reg_century_read
-                },
+                 .addr = client->addr,
+                 .flags = 0,    /* write */
+                 .len = sizeof(reg_century_read),
+                 .buf = reg_century_read}
+                ,
                 {
-                        .addr   = client->addr,
-                        .flags  = I2C_M_RD,
-                        .len    = sizeof(buf[MAX6900_REG_CENTURY]),
-                        .buf    = &buf[MAX6900_REG_CENTURY]
-                }
+                 .addr = client->addr,
+                 .flags = I2C_M_RD,
+                 .len = sizeof(buf[MAX6900_REG_CENTURY]),
+                 .buf = &buf[MAX6900_REG_CENTURY]
+                 }
         };
         int rc;
 
         rc = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
         if (rc != ARRAY_SIZE(msgs)) {
-                dev_err(&client->dev, "%s: register read failed\n",
-                        __func__);
+                dev_err(&client->dev, "%s: register read failed\n", __func__);
                 return -EIO;
         }
         return 0;
@@ -109,20 +97,18 @@ static int max6900_i2c_write_regs(struct i2c_client *client, u8 const *buf)
         u8 i2c_century_buf[1 + 1] = { MAX6900_REG_CENTURY_WRITE };
         struct i2c_msg century_msgs[1] = {
                 {
-                        .addr   = client->addr,
-                        .flags  = 0, /* write */
-                        .len    = sizeof(i2c_century_buf),
-                        .buf    = i2c_century_buf
-                }
+                 .addr = client->addr,
+                 .flags = 0,    /* write */
+                 .len = sizeof(i2c_century_buf),
+                 .buf = i2c_century_buf}
         };
         u8 i2c_burst_buf[MAX6900_BURST_LEN + 1] = { MAX6900_REG_BURST_WRITE };
         struct i2c_msg burst_msgs[1] = {
                 {
-                        .addr   = client->addr,
-                        .flags  = 0, /* write */
-                        .len    = sizeof(i2c_burst_buf),
-                        .buf    = i2c_burst_buf
-                }
+                 .addr = client->addr,
+                 .flags = 0,    /* write */
+                 .len = sizeof(i2c_burst_buf),
+                 .buf = i2c_burst_buf}
         };
         int rc;
 
@@ -133,10 +119,12 @@ static int max6900_i2c_write_regs(struct i2c_client *client, u8 const *buf)
          * bit as part of the burst write.
          */
         i2c_century_buf[1] = buf[MAX6900_REG_CENTURY];
+
         rc = i2c_transfer(client->adapter, century_msgs,
                           ARRAY_SIZE(century_msgs));
         if (rc != ARRAY_SIZE(century_msgs))
                 goto write_failed;
+
         msleep(MAX6900_IDLE_TIME_AFTER_WRITE);
 
         memcpy(&i2c_burst_buf[1], buf, MAX6900_BURST_LEN);
@@ -148,45 +136,11 @@ static int max6900_i2c_write_regs(struct i2c_client *client, u8 const *buf)
 
         return 0;
 
-write_failed:
-        dev_err(&client->dev, "%s: register write failed\n",
-                __func__);
+ write_failed:
+        dev_err(&client->dev, "%s: register write failed\n", __func__);
         return -EIO;
 }
 
-static int max6900_i2c_validate_client(struct i2c_client *client)
-{
-        u8 regs[MAX6900_REG_LEN];
-        u8 zero_mask[] = {
-                0x80,   /* seconds */
-                0x80,   /* minutes */
-                0x40,   /* hours */
-                0xc0,   /* day of month */
-                0xe0,   /* month */
-                0xf8,   /* day of week */
-                0x00,   /* year */
-                0x7f,   /* control */
-        };
-        int i;
-        int rc;
-        int reserved;
-
-        reserved = i2c_smbus_read_byte_data(client, MAX6900_REG_RESERVED_READ);
-        if (reserved != 0x07)
-                return -ENODEV;
-
-        rc = max6900_i2c_read_regs(client, regs);
-        if (rc < 0)
-                return rc;
-
-        for (i = 0; i < ARRAY_SIZE(zero_mask); ++i) {
-                if (regs[i] & zero_mask[i])
-                        return -ENODEV;
-        }
-
-        return 0;
-}
-
 static int max6900_i2c_read_time(struct i2c_client *client, struct rtc_time *tm)
 {
         int rc;
@@ -202,7 +156,7 @@ static int max6900_i2c_read_time(struct i2c_client *client, struct rtc_time *tm)
         tm->tm_mday = BCD2BIN(regs[MAX6900_REG_DT]);
         tm->tm_mon = BCD2BIN(regs[MAX6900_REG_MO]) - 1;
         tm->tm_year = BCD2BIN(regs[MAX6900_REG_YR]) +
-                      BCD2BIN(regs[MAX6900_REG_CENTURY]) * 100 - 1900;
+            BCD2BIN(regs[MAX6900_REG_CENTURY]) * 100 - 1900;
         tm->tm_wday = BCD2BIN(regs[MAX6900_REG_DW]);
 
         return 0;
@@ -211,7 +165,7 @@ static int max6900_i2c_read_time(struct i2c_client *client, struct rtc_time *tm)
 static int max6900_i2c_clear_write_protect(struct i2c_client *client)
 {
         int rc;
-        rc = i2c_smbus_write_byte_data (client, MAX6900_REG_CONTROL_WRITE, 0);
+        rc = i2c_smbus_write_byte_data(client, MAX6900_REG_CONTROL_WRITE, 0);
         if (rc < 0) {
                 dev_err(&client->dev, "%s: control register write failed\n",
                         __func__);
@@ -220,8 +174,8 @@ static int max6900_i2c_clear_write_protect(struct i2c_client *client)
         return 0;
 }
 
-static int max6900_i2c_set_time(struct i2c_client *client,
-                                struct rtc_time const *tm)
+static int
+max6900_i2c_set_time(struct i2c_client *client, struct rtc_time const *tm)
 {
         u8 regs[MAX6900_REG_LEN];
         int rc;
@@ -258,89 +212,49 @@ static int max6900_rtc_set_time(struct device *dev, struct rtc_time *tm)
         return max6900_i2c_set_time(to_i2c_client(dev), tm);
 }
 
-static int max6900_attach_adapter(struct i2c_adapter *adapter)
-{
-        return i2c_probe(adapter, &addr_data, max6900_probe);
-}
-
-static int max6900_detach_client(struct i2c_client *client)
+static int max6900_remove(struct i2c_client *client)
 {
-        struct rtc_device *const rtc = i2c_get_clientdata(client);
+        struct rtc_device *rtc = i2c_get_clientdata(client);
 
         if (rtc)
                 rtc_device_unregister(rtc);
 
-        return i2c_detach_client(client);
+        return 0;
 }
 
-static struct i2c_driver max6900_driver = {
-        .driver         = {
-                .name   = DRV_NAME,
-        },
-        .id             = I2C_DRIVERID_MAX6900,
-        .attach_adapter = max6900_attach_adapter,
-        .detach_client  = max6900_detach_client,
-};
-
 static const struct rtc_class_ops max6900_rtc_ops = {
-        .read_time      = max6900_rtc_read_time,
-        .set_time       = max6900_rtc_set_time,
+        .read_time = max6900_rtc_read_time,
+        .set_time = max6900_rtc_set_time,
 };
 
-static int max6900_probe(struct i2c_adapter *adapter, int addr, int kind)
+static int
+max6900_probe(struct i2c_client *client, const struct i2c_device_id *id)
 {
-        int rc = 0;
-        struct i2c_client *client = NULL;
-        struct rtc_device *rtc = NULL;
-
-        if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
-                rc = -ENODEV;
-                goto failout;
-        }
-
-        client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
-        if (client == NULL) {
-                rc = -ENOMEM;
-                goto failout;
-        }
-
-        client->addr = addr;
-        client->adapter = adapter;
-        client->driver = &max6900_driver;
-        strlcpy(client->name, DRV_NAME, I2C_NAME_SIZE);
-
-        if (kind < 0) {
-                rc = max6900_i2c_validate_client(client);
-                if (rc < 0)
-                        goto failout;
-        }
+        struct rtc_device *rtc;
 
-        rc = i2c_attach_client(client);
-        if (rc < 0)
-                goto failout;
+        if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
+                return -ENODEV;
 
-        dev_info(&client->dev,
-                 "chip found, driver version " DRV_VERSION "\n");
+        dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
 
         rtc = rtc_device_register(max6900_driver.driver.name,
-                                  &client->dev,
-                                  &max6900_rtc_ops, THIS_MODULE);
-        if (IS_ERR(rtc)) {
-                rc = PTR_ERR(rtc);
-                goto failout_detach;
-        }
+                                  &client->dev, &max6900_rtc_ops, THIS_MODULE);
+        if (IS_ERR(rtc))
+                return PTR_ERR(rtc);
 
         i2c_set_clientdata(client, rtc);
 
         return 0;
-
-failout_detach:
-        i2c_detach_client(client);
-failout:
-        kfree(client);
-        return rc;
 }
 
+static struct i2c_driver max6900_driver = {
+        .driver = {
+                   .name = "rtc-max6900",
+                   },
+        .probe = max6900_probe,
+        .remove = max6900_remove,
+};
+
 static int __init max6900_init(void)
 {
         return i2c_add_driver(&max6900_driver);
@@ -352,6 +266,7 @@ static void __exit max6900_exit(void)
 }
 
 MODULE_DESCRIPTION("Maxim MAX6900 RTC driver");
+MODULE_AUTHOR("Dale Farnsworth <dale@farnsworth.org>");
 MODULE_LICENSE("GPL");
 MODULE_VERSION(DRV_VERSION);
 
diff --git a/drivers/rtc/rtc-pcf8563.c b/drivers/rtc/rtc-pcf8563.c
index 748a502a6355..a829f20ad6d6 100644
--- a/drivers/rtc/rtc-pcf8563.c
+++ b/drivers/rtc/rtc-pcf8563.c
@@ -179,58 +179,6 @@ struct pcf8563_limit
         unsigned char max;
 };
 
-static int pcf8563_validate_client(struct i2c_client *client)
-{
-        int i;
-
-        static const struct pcf8563_limit pattern[] = {
-                /* register, mask, min, max */
-                { PCF8563_REG_SC,       0x7F,   0,      59      },
-                { PCF8563_REG_MN,       0x7F,   0,      59      },
-                { PCF8563_REG_HR,       0x3F,   0,      23      },
-                { PCF8563_REG_DM,       0x3F,   0,      31      },
-                { PCF8563_REG_MO,       0x1F,   0,      12      },
-        };
-
-        /* check limits (only registers with bcd values) */
-        for (i = 0; i < ARRAY_SIZE(pattern); i++) {
-                int xfer;
-                unsigned char value;
-                unsigned char buf = pattern[i].reg;
-
-                struct i2c_msg msgs[] = {
-                        { client->addr, 0, 1, &buf },
-                        { client->addr, I2C_M_RD, 1, &buf },
-                };
-
-                xfer = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
-
-                if (xfer != ARRAY_SIZE(msgs)) {
-                        dev_err(&client->dev,
-                                "%s: could not read register 0x%02X\n",
-                                __func__, pattern[i].reg);
-
-                        return -EIO;
-                }
-
-                value = BCD2BIN(buf & pattern[i].mask);
-
-                if (value > pattern[i].max ||
-                        value < pattern[i].min) {
-                        dev_dbg(&client->dev,
-                                "%s: pattern=%d, reg=%x, mask=0x%02x, min=%d, "
-                                "max=%d, value=%d, raw=0x%02X\n",
-                                __func__, i, pattern[i].reg, pattern[i].mask,
-                                pattern[i].min, pattern[i].max,
-                                value, buf);
-
-                        return -ENODEV;
-                }
-        }
-
-        return 0;
-}
-
 static int pcf8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
 {
         return pcf8563_get_datetime(to_i2c_client(dev), tm);
@@ -262,12 +210,6 @@ static int pcf8563_probe(struct i2c_client *client,
         if (!pcf8563)
                 return -ENOMEM;
 
-        /* Verify the chip is really an PCF8563 */
-        if (pcf8563_validate_client(client) < 0) {
-                err = -ENODEV;
-                goto exit_kfree;
-        }
-
         dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
 
         pcf8563->rtc = rtc_device_register(pcf8563_driver.driver.name,
diff --git a/drivers/rtc/rtc-pl030.c b/drivers/rtc/rtc-pl030.c
index 8448eeb9d675..826153552157 100644
--- a/drivers/rtc/rtc-pl030.c
+++ b/drivers/rtc/rtc-pl030.c
@@ -34,15 +34,6 @@ static irqreturn_t pl030_interrupt(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-static int pl030_open(struct device *dev)
-{
-        return 0;
-}
-
-static void pl030_release(struct device *dev)
-{
-}
-
 static int pl030_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
 {
         return -ENOIOCTLCMD;
@@ -104,8 +95,6 @@ static int pl030_set_time(struct device *dev, struct rtc_time *tm)
 }
 
 static const struct rtc_class_ops pl030_ops = {
-        .open           = pl030_open,
-        .release        = pl030_release,
         .ioctl          = pl030_ioctl,
         .read_time      = pl030_read_time,
         .set_time       = pl030_set_time,
diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c
index 08b4610ec5a6..333eec689d2f 100644
--- a/drivers/rtc/rtc-pl031.c
+++ b/drivers/rtc/rtc-pl031.c
@@ -45,18 +45,6 @@ static irqreturn_t pl031_interrupt(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-static int pl031_open(struct device *dev)
-{
-        /*
-         * We request IRQ in pl031_probe, so nothing to do here...
-         */
-        return 0;
-}
-
-static void pl031_release(struct device *dev)
-{
-}
-
 static int pl031_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
 {
         struct pl031_local *ldata = dev_get_drvdata(dev);
@@ -118,8 +106,6 @@ static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 }
 
 static const struct rtc_class_ops pl031_ops = {
-        .open = pl031_open,
-        .release = pl031_release,
         .ioctl = pl031_ioctl,
         .read_time = pl031_read_time,
         .set_time = pl031_set_time,
diff --git a/drivers/rtc/rtc-rs5c372.c b/drivers/rtc/rtc-rs5c372.c
index 56caf6b2c3e5..8b561958fb1e 100644
--- a/drivers/rtc/rtc-rs5c372.c
+++ b/drivers/rtc/rtc-rs5c372.c
@@ -1,8 +1,9 @@
 /*
- * An I2C driver for Ricoh RS5C372 and RV5C38[67] RTCs
+ * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs
  *
  * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net>
  * Copyright (C) 2006 Tower Technologies
+ * Copyright (C) 2008 Paul Mundt
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -13,7 +14,7 @@
 #include <linux/rtc.h>
 #include <linux/bcd.h>
 
-#define DRV_VERSION "0.5"
+#define DRV_VERSION "0.6"
 
 
 /*
@@ -51,7 +52,8 @@
 #       define RS5C_CTRL1_CT4           (4 << 0)        /* 1 Hz level irq */
 #define RS5C_REG_CTRL2          15
 #       define RS5C372_CTRL2_24         (1 << 5)
-#       define RS5C_CTRL2_XSTP          (1 << 4)
+#       define R2025_CTRL2_XST          (1 << 5)
+#       define RS5C_CTRL2_XSTP          (1 << 4)        /* only if !R2025S/D */
 #       define RS5C_CTRL2_CTFG          (1 << 2)
 #       define RS5C_CTRL2_AAFG          (1 << 1)        /* or WAFG */
 #       define RS5C_CTRL2_BAFG          (1 << 0)        /* or DAFG */
@@ -63,6 +65,7 @@
 
 enum rtc_type {
         rtc_undef = 0,
+        rtc_r2025sd,
         rtc_rs5c372a,
         rtc_rs5c372b,
         rtc_rv5c386,
@@ -70,6 +73,7 @@ enum rtc_type {
 };
 
 static const struct i2c_device_id rs5c372_id[] = {
+        { "r2025sd", rtc_r2025sd },
         { "rs5c372a", rtc_rs5c372a },
         { "rs5c372b", rtc_rs5c372b },
         { "rv5c386", rtc_rv5c386 },
@@ -89,6 +93,7 @@ struct rs5c372 {
         enum rtc_type           type;
         unsigned                time24:1;
         unsigned                has_irq:1;
+        unsigned                smbus:1;
         char                    buf[17];
         char                    *regs;
 };
@@ -106,10 +111,25 @@ static int rs5c_get_regs(struct rs5c372 *rs5c)
          *
          * The first method doesn't work with the iop3xx adapter driver, on at
          * least 80219 chips; this works around that bug.
+         *
+         * The third method on the other hand doesn't work for the SMBus-only
+         * configurations, so we use the the first method there, stripping off
+         * the extra register in the process.
          */
-        if ((i2c_transfer(client->adapter, msgs, 1)) != 1) {
-                dev_warn(&client->dev, "can't read registers\n");
-                return -EIO;
+        if (rs5c->smbus) {
+                int addr = RS5C_ADDR(RS5C372_REG_SECS);
+                int size = sizeof(rs5c->buf) - 1;
+
+                if (i2c_smbus_read_i2c_block_data(client, addr, size,
+                                                  rs5c->buf + 1) != size) {
+                        dev_warn(&client->dev, "can't read registers\n");
+                        return -EIO;
+                }
+        } else {
+                if ((i2c_transfer(client->adapter, msgs, 1)) != 1) {
+                        dev_warn(&client->dev, "can't read registers\n");
+                        return -EIO;
+                }
         }
 
         dev_dbg(&client->dev,
@@ -187,6 +207,7 @@ static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm)
 {
         struct rs5c372  *rs5c = i2c_get_clientdata(client);
         unsigned char   buf[8];
+        int             addr;
 
         dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d "
                 "mday=%d, mon=%d, year=%d, wday=%d\n",
@@ -194,16 +215,16 @@ static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm)
                 tm->tm_sec, tm->tm_min, tm->tm_hour,
                 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
 
-        buf[0] = RS5C_ADDR(RS5C372_REG_SECS);
-        buf[1] = BIN2BCD(tm->tm_sec);
-        buf[2] = BIN2BCD(tm->tm_min);
-        buf[3] = rs5c_hr2reg(rs5c, tm->tm_hour);
-        buf[4] = BIN2BCD(tm->tm_wday);
-        buf[5] = BIN2BCD(tm->tm_mday);
-        buf[6] = BIN2BCD(tm->tm_mon + 1);
-        buf[7] = BIN2BCD(tm->tm_year - 100);
+        addr   = RS5C_ADDR(RS5C372_REG_SECS);
+        buf[0] = BIN2BCD(tm->tm_sec);
+        buf[1] = BIN2BCD(tm->tm_min);
+        buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour);
+        buf[3] = BIN2BCD(tm->tm_wday);
+        buf[4] = BIN2BCD(tm->tm_mday);
+        buf[5] = BIN2BCD(tm->tm_mon + 1);
+        buf[6] = BIN2BCD(tm->tm_year - 100);
 
-        if ((i2c_master_send(client, buf, 8)) != 8) {
+        if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {
                 dev_err(&client->dev, "%s: write error\n", __func__);
                 return -EIO;
         }
@@ -266,16 +287,16 @@ rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
 {
         struct i2c_client       *client = to_i2c_client(dev);
         struct rs5c372          *rs5c = i2c_get_clientdata(client);
-        unsigned char           buf[2];
-        int                     status;
+        unsigned char           buf;
+        int                     status, addr;
 
-        buf[1] = rs5c->regs[RS5C_REG_CTRL1];
+        buf = rs5c->regs[RS5C_REG_CTRL1];
         switch (cmd) {
         case RTC_UIE_OFF:
         case RTC_UIE_ON:
                 /* some 327a modes use a different IRQ pin for 1Hz irqs */
                 if (rs5c->type == rtc_rs5c372a
-                                && (buf[1] & RS5C372A_CTRL1_SL1))
+                                && (buf & RS5C372A_CTRL1_SL1))
                         return -ENOIOCTLCMD;
         case RTC_AIE_OFF:
         case RTC_AIE_ON:
@@ -293,28 +314,30 @@ rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
         if (status < 0)
                 return status;
 
-        buf[0] = RS5C_ADDR(RS5C_REG_CTRL1);
+        addr = RS5C_ADDR(RS5C_REG_CTRL1);
         switch (cmd) {
         case RTC_AIE_OFF:       /* alarm off */
-                buf[1] &= ~RS5C_CTRL1_AALE;
+                buf &= ~RS5C_CTRL1_AALE;
                 break;
         case RTC_AIE_ON:        /* alarm on */
-                buf[1] |= RS5C_CTRL1_AALE;
+                buf |= RS5C_CTRL1_AALE;
                 break;
         case RTC_UIE_OFF:       /* update off */
-                buf[1] &= ~RS5C_CTRL1_CT_MASK;
+                buf &= ~RS5C_CTRL1_CT_MASK;
                 break;
         case RTC_UIE_ON:        /* update on */
-                buf[1] &= ~RS5C_CTRL1_CT_MASK;
-                buf[1] |= RS5C_CTRL1_CT4;
+                buf &= ~RS5C_CTRL1_CT_MASK;
+                buf |= RS5C_CTRL1_CT4;
                 break;
         }
-        if ((i2c_master_send(client, buf, 2)) != 2) {
+
+        if (i2c_smbus_write_byte_data(client, addr, buf) < 0) {
                 printk(KERN_WARNING "%s: can't update alarm\n",
                         rs5c->rtc->name);
                 status = -EIO;
         } else
-                rs5c->regs[RS5C_REG_CTRL1] = buf[1];
+                rs5c->regs[RS5C_REG_CTRL1] = buf;
+
         return status;
 }
 
@@ -364,8 +387,8 @@ static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 {
         struct i2c_client       *client = to_i2c_client(dev);
         struct rs5c372          *rs5c = i2c_get_clientdata(client);
-        int                     status;
-        unsigned char           buf[4];
+        int                     status, addr, i;
+        unsigned char           buf[3];
 
         /* only handle up to 24 hours in the future, like RTC_ALM_SET */
         if (t->time.tm_mday != -1
@@ -380,33 +403,36 @@ static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t)
         if (status < 0)
                 return status;
         if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) {
-                buf[0] = RS5C_ADDR(RS5C_REG_CTRL1);
-                buf[1] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;
-                if (i2c_master_send(client, buf, 2) != 2) {
+                addr = RS5C_ADDR(RS5C_REG_CTRL1);
+                buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;
+                if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) {
                         pr_debug("%s: can't disable alarm\n", rs5c->rtc->name);
                         return -EIO;
                 }
-                rs5c->regs[RS5C_REG_CTRL1] = buf[1];
+                rs5c->regs[RS5C_REG_CTRL1] = buf[0];
         }
 
         /* set alarm */
-        buf[0] = RS5C_ADDR(RS5C_REG_ALARM_A_MIN);
-        buf[1] = BIN2BCD(t->time.tm_min);
-        buf[2] = rs5c_hr2reg(rs5c, t->time.tm_hour);
-        buf[3] = 0x7f;  /* any/all days */
-        if ((i2c_master_send(client, buf, 4)) != 4) {
-                pr_debug("%s: can't set alarm time\n", rs5c->rtc->name);
-                return -EIO;
+        buf[0] = BIN2BCD(t->time.tm_min);
+        buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
+        buf[2] = 0x7f;  /* any/all days */
+
+        for (i = 0; i < sizeof(buf); i++) {
+                addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
+                if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) {
+                        pr_debug("%s: can't set alarm time\n", rs5c->rtc->name);
+                        return -EIO;
+                }
         }
 
         /* ... and maybe enable its irq */
         if (t->enabled) {
-                buf[0] = RS5C_ADDR(RS5C_REG_CTRL1);
-                buf[1] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;
-                if ((i2c_master_send(client, buf, 2)) != 2)
+                addr = RS5C_ADDR(RS5C_REG_CTRL1);
+                buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;
+                if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0)
                         printk(KERN_WARNING "%s: can't enable alarm\n",
                                 rs5c->rtc->name);
-                rs5c->regs[RS5C_REG_CTRL1] = buf[1];
+                rs5c->regs[RS5C_REG_CTRL1] = buf[0];
         }
 
         return 0;
@@ -503,18 +529,81 @@ static void rs5c_sysfs_unregister(struct device *dev)
 
 static struct i2c_driver rs5c372_driver;
 
+static int rs5c_oscillator_setup(struct rs5c372 *rs5c372)
+{
+        unsigned char buf[2];
+        int addr, i, ret = 0;
+
+        if (rs5c372->type == rtc_r2025sd) {
+                if (!(rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST))
+                        return ret;
+                rs5c372->regs[RS5C_REG_CTRL2] &= ~R2025_CTRL2_XST;
+        } else {
+                if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP))
+                        return ret;
+                rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP;
+        }
+
+        addr   = RS5C_ADDR(RS5C_REG_CTRL1);
+        buf[0] = rs5c372->regs[RS5C_REG_CTRL1];
+        buf[1] = rs5c372->regs[RS5C_REG_CTRL2];
+
+        /* use 24hr mode */
+        switch (rs5c372->type) {
+        case rtc_rs5c372a:
+        case rtc_rs5c372b:
+                buf[1] |= RS5C372_CTRL2_24;
+                rs5c372->time24 = 1;
+                break;
+        case rtc_r2025sd:
+        case rtc_rv5c386:
+        case rtc_rv5c387a:
+                buf[0] |= RV5C387_CTRL1_24;
+                rs5c372->time24 = 1;
+                break;
+        default:
+                /* impossible */
+                break;
+        }
+
+        for (i = 0; i < sizeof(buf); i++) {
+                addr = RS5C_ADDR(RS5C_REG_CTRL1 + i);
+                ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]);
+                if (unlikely(ret < 0))
+                        return ret;
+        }
+
+        rs5c372->regs[RS5C_REG_CTRL1] = buf[0];
+        rs5c372->regs[RS5C_REG_CTRL2] = buf[1];
+
+        return 0;
+}
+
 static int rs5c372_probe(struct i2c_client *client,
                          const struct i2c_device_id *id)
 {
         int err = 0;
+        int smbus_mode = 0;
         struct rs5c372 *rs5c372;
         struct rtc_time tm;
 
         dev_dbg(&client->dev, "%s\n", __func__);
 
-        if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
-                err = -ENODEV;
-                goto exit;
+        if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
+                        I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) {
+                /*
+                 * If we don't have any master mode adapter, try breaking
+                 * it down in to the barest of capabilities.
+                 */
+                if (i2c_check_functionality(client->adapter,
+                                I2C_FUNC_SMBUS_BYTE_DATA |
+                                I2C_FUNC_SMBUS_I2C_BLOCK))
+                        smbus_mode = 1;
+                else {
+                        /* Still no good, give up */
+                        err = -ENODEV;
+                        goto exit;
+                }
         }
 
         if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) {
@@ -528,6 +617,7 @@ static int rs5c372_probe(struct i2c_client *client,
 
         /* we read registers 0x0f then 0x00-0x0f; skip the first one */
         rs5c372->regs = &rs5c372->buf[1];
+        rs5c372->smbus = smbus_mode;
 
         err = rs5c_get_regs(rs5c372);
         if (err < 0)
@@ -543,6 +633,7 @@ static int rs5c372_probe(struct i2c_client *client,
                 if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24)
                         rs5c372->time24 = 1;
                 break;
+        case rtc_r2025sd:
         case rtc_rv5c386:
         case rtc_rv5c387a:
                 if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24)
@@ -558,39 +649,14 @@ static int rs5c372_probe(struct i2c_client *client,
 
         /* if the oscillator lost power and no other software (like
          * the bootloader) set it up, do it here.
+         *
+         * The R2025S/D does this a little differently than the other
+         * parts, so we special case that..
          */
-        if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP) {
-                unsigned char buf[3];
-
-                rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP;
-
-                buf[0] = RS5C_ADDR(RS5C_REG_CTRL1);
-                buf[1] = rs5c372->regs[RS5C_REG_CTRL1];
-                buf[2] = rs5c372->regs[RS5C_REG_CTRL2];
-
-                /* use 24hr mode */
-                switch (rs5c372->type) {
-                case rtc_rs5c372a:
-                case rtc_rs5c372b:
-                        buf[2] |= RS5C372_CTRL2_24;
-                        rs5c372->time24 = 1;
-                        break;
-                case rtc_rv5c386:
-                case rtc_rv5c387a:
-                        buf[1] |= RV5C387_CTRL1_24;
-                        rs5c372->time24 = 1;
-                        break;
-                default:
-                        /* impossible */
-                        break;
-                }
-
-                if ((i2c_master_send(client, buf, 3)) != 3) {
-                        dev_err(&client->dev, "setup error\n");
-                        goto exit_kfree;
-                }
-                rs5c372->regs[RS5C_REG_CTRL1] = buf[1];
-                rs5c372->regs[RS5C_REG_CTRL2] = buf[2];
+        err = rs5c_oscillator_setup(rs5c372);
+        if (unlikely(err < 0)) {
+                dev_err(&client->dev, "setup error\n");
+                goto exit_kfree;
         }
 
         if (rs5c372_get_datetime(client, &tm) < 0)
@@ -598,6 +664,7 @@ static int rs5c372_probe(struct i2c_client *client,
 
         dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n",
                         ({ char *s; switch (rs5c372->type) {
+                        case rtc_r2025sd:       s = "r2025sd"; break;
                         case rtc_rs5c372a:      s = "rs5c372a"; break;
                         case rtc_rs5c372b:      s = "rs5c372b"; break;
                         case rtc_rv5c386:       s = "rv5c386"; break;
@@ -667,7 +734,8 @@ module_exit(rs5c372_exit);
 
 MODULE_AUTHOR(
                 "Pavel Mironchik <pmironchik@optifacio.net>, "
-                "Alessandro Zummo <a.zummo@towertech.it>");
+                "Alessandro Zummo <a.zummo@towertech.it>, "
+                "Paul Mundt <lethal@linux-sh.org>");
 MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver");
 MODULE_LICENSE("GPL");
 MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c
index 1f88e9e914ec..fcead4c4cd1f 100644
--- a/drivers/rtc/rtc-sh.c
+++ b/drivers/rtc/rtc-sh.c
@@ -257,12 +257,6 @@ static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
         spin_unlock_irq(&rtc->lock);
 }
 
-static void sh_rtc_release(struct device *dev)
-{
-        sh_rtc_setpie(dev, 0);
-        sh_rtc_setaie(dev, 0);
-}
-
 static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
 {
         struct sh_rtc *rtc = dev_get_drvdata(dev);
@@ -559,7 +553,6 @@ static int sh_rtc_irq_set_freq(struct device *dev, int freq)
 }
 
 static struct rtc_class_ops sh_rtc_ops = {
-        .release        = sh_rtc_release,
         .ioctl          = sh_rtc_ioctl,
         .read_time      = sh_rtc_read_time,
         .set_time       = sh_rtc_set_time,
diff --git a/drivers/rtc/rtc-stk17ta8.c b/drivers/rtc/rtc-stk17ta8.c
index 31d3c8c28588..9a7e920315fa 100644
--- a/drivers/rtc/rtc-stk17ta8.c
+++ b/drivers/rtc/rtc-stk17ta8.c
@@ -215,17 +215,6 @@ static irqreturn_t stk17ta8_rtc_interrupt(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-static void stk17ta8_rtc_release(struct device *dev)
-{
-        struct platform_device *pdev = to_platform_device(dev);
-        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
-
-        if (pdata->irq >= 0) {
-                pdata->irqen = 0;
-                stk17ta8_rtc_update_alarm(pdata);
-        }
-}
-
 static int stk17ta8_rtc_ioctl(struct device *dev, unsigned int cmd,
                             unsigned long arg)
 {
@@ -254,7 +243,6 @@ static const struct rtc_class_ops stk17ta8_rtc_ops = {
         .set_time       = stk17ta8_rtc_set_time,
         .read_alarm     = stk17ta8_rtc_read_alarm,
         .set_alarm      = stk17ta8_rtc_set_alarm,
-        .release        = stk17ta8_rtc_release,
         .ioctl          = stk17ta8_rtc_ioctl,
 };
 
diff --git a/drivers/s390/net/ctcm_mpc.c b/drivers/s390/net/ctcm_mpc.c
index cbe470493bf0..19f5d5ed85e0 100644
--- a/drivers/s390/net/ctcm_mpc.c
+++ b/drivers/s390/net/ctcm_mpc.c
@@ -1673,7 +1673,7 @@ static int mpc_validate_xid(struct mpcg_info *mpcginfo)
 
 done:
         if (rc) {
-                ctcm_pr_info("ctcmpc       :  %s() failed\n", __FUNCTION__);
+                ctcm_pr_info("ctcmpc       :  %s() failed\n", __func__);
                 priv->xid->xid2_flag2 = 0x40;
                 grp->saved_xid2->xid2_flag2 = 0x40;
         }
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index d3ca7d32abe0..1528de23a650 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -2223,9 +2223,9 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
                 serial_outp(up, UART_EFR, efr);
         }
 
-#ifdef CONFIG_ARCH_OMAP15XX
+#ifdef CONFIG_ARCH_OMAP
         /* Workaround to enable 115200 baud on OMAP1510 internal ports */
-        if (cpu_is_omap1510() && is_omap_port((unsigned int)up->port.membase)) {
+        if (cpu_is_omap1510() && is_omap_port(up)) {
                 if (baud == 115200) {
                         quot = 1;
                         serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
@@ -2278,18 +2278,27 @@ serial8250_pm(struct uart_port *port, unsigned int state,
                 p->pm(port, state, oldstate);
 }
 
+static unsigned int serial8250_port_size(struct uart_8250_port *pt)
+{
+        if (pt->port.iotype == UPIO_AU)
+                return 0x100000;
+#ifdef CONFIG_ARCH_OMAP
+        if (is_omap_port(pt))
+                return 0x16 << pt->port.regshift;
+#endif
+        return 8 << pt->port.regshift;
+}
+
 /*
  * Resource handling.
  */
 static int serial8250_request_std_resource(struct uart_8250_port *up)
 {
-        unsigned int size = 8 << up->port.regshift;
+        unsigned int size = serial8250_port_size(up);
         int ret = 0;
 
         switch (up->port.iotype) {
         case UPIO_AU:
-                size = 0x100000;
-                /* fall thru */
         case UPIO_TSI:
         case UPIO_MEM32:
         case UPIO_MEM:
@@ -2323,12 +2332,10 @@ static int serial8250_request_std_resource(struct uart_8250_port *up)
 
 static void serial8250_release_std_resource(struct uart_8250_port *up)
 {
-        unsigned int size = 8 << up->port.regshift;
+        unsigned int size = serial8250_port_size(up);
 
         switch (up->port.iotype) {
         case UPIO_AU:
-                size = 0x100000;
-                /* fall thru */
         case UPIO_TSI:
         case UPIO_MEM32:
         case UPIO_MEM:
diff --git a/drivers/serial/s3c2400.c b/drivers/serial/s3c2400.c
index c8b4266ac35f..4873f2978bd2 100644
--- a/drivers/serial/s3c2400.c
+++ b/drivers/serial/s3c2400.c
@@ -19,7 +19,7 @@
 
 #include <mach/hardware.h>
 
-#include <asm/plat-s3c/regs-serial.h>
+#include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
 
 #include "samsung.h"
diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c
index 40a2531b5541..87c182ef71b8 100644
--- a/drivers/serial/s3c2410.c
+++ b/drivers/serial/s3c2410.c
@@ -21,7 +21,7 @@
 #include <asm/irq.h>
 #include <mach/hardware.h>
 
-#include <asm/plat-s3c/regs-serial.h>
+#include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
 
 #include "samsung.h"
diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c
index d0170319c729..fd017b375568 100644
--- a/drivers/serial/s3c2412.c
+++ b/drivers/serial/s3c2412.c
@@ -21,7 +21,7 @@
 #include <asm/irq.h>
 #include <mach/hardware.h>
 
-#include <asm/plat-s3c/regs-serial.h>
+#include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
 
 #include "samsung.h"
diff --git a/drivers/serial/s3c2440.c b/drivers/serial/s3c2440.c
index d4a2b17b2498..317d239ab740 100644
--- a/drivers/serial/s3c2440.c
+++ b/drivers/serial/s3c2440.c
@@ -21,7 +21,7 @@
 #include <asm/irq.h>
 #include <mach/hardware.h>
 
-#include <asm/plat-s3c/regs-serial.h>
+#include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
 
 #include "samsung.h"
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
index 5a88b3f9fe9b..1e219d3d0352 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/serial/samsung.c
@@ -47,7 +47,7 @@
 
 #include <mach/hardware.h>
 
-#include <asm/plat-s3c/regs-serial.h>
+#include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
 
 #include "samsung.h"
diff --git a/drivers/spi/mpc52xx_psc_spi.c b/drivers/spi/mpc52xx_psc_spi.c
index cdb3d3191719..0debe11b67b4 100644
--- a/drivers/spi/mpc52xx_psc_spi.c
+++ b/drivers/spi/mpc52xx_psc_spi.c
@@ -15,13 +15,7 @@
 #include <linux/init.h>
 #include <linux/errno.h>
 #include <linux/interrupt.h>
-
-#if defined(CONFIG_PPC_MERGE)
 #include <linux/of_platform.h>
-#else
-#include <linux/platform_device.h>
-#endif
-
 #include <linux/workqueue.h>
 #include <linux/completion.h>
 #include <linux/io.h>
@@ -471,53 +465,6 @@ static int __exit mpc52xx_psc_spi_do_remove(struct device *dev)
         return 0;
 }
 
-#if !defined(CONFIG_PPC_MERGE)
-static int __init mpc52xx_psc_spi_probe(struct platform_device *dev)
-{
-        switch(dev->id) {
-        case 1:
-        case 2:
-        case 3:
-        case 6:
-                return mpc52xx_psc_spi_do_probe(&dev->dev,
-                        MPC52xx_PA(MPC52xx_PSCx_OFFSET(dev->id)),
-                        MPC52xx_PSC_SIZE, platform_get_irq(dev, 0), dev->id);
-        default:
-                return -EINVAL;
-        }
-}
-
-static int __exit mpc52xx_psc_spi_remove(struct platform_device *dev)
-{
-        return mpc52xx_psc_spi_do_remove(&dev->dev);
-}
-
-/* work with hotplug and coldplug */
-MODULE_ALIAS("platform:mpc52xx-psc-spi");
-
-static struct platform_driver mpc52xx_psc_spi_platform_driver = {
-        .remove = __exit_p(mpc52xx_psc_spi_remove),
-        .driver = {
-                .name = "mpc52xx-psc-spi",
-                .owner = THIS_MODULE,
-        },
-};
-
-static int __init mpc52xx_psc_spi_init(void)
-{
-        return platform_driver_probe(&mpc52xx_psc_spi_platform_driver,
-                        mpc52xx_psc_spi_probe);
-}
-module_init(mpc52xx_psc_spi_init);
-
-static void __exit mpc52xx_psc_spi_exit(void)
-{
-        platform_driver_unregister(&mpc52xx_psc_spi_platform_driver);
-}
-module_exit(mpc52xx_psc_spi_exit);
-
-#else   /* defined(CONFIG_PPC_MERGE) */
-
 static int __init mpc52xx_psc_spi_of_probe(struct of_device *op,
         const struct of_device_id *match)
 {
@@ -586,8 +533,6 @@ static void __exit mpc52xx_psc_spi_exit(void)
 }
 module_exit(mpc52xx_psc_spi_exit);
 
-#endif  /* defined(CONFIG_PPC_MERGE) */
-
 MODULE_AUTHOR("Dragos Carp");
 MODULE_DESCRIPTION("MPC52xx PSC SPI Driver");
 MODULE_LICENSE("GPL");
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
index 9d2186fd74aa..454a2712e629 100644
--- a/drivers/spi/omap2_mcspi.c
+++ b/drivers/spi/omap2_mcspi.c
@@ -119,12 +119,14 @@ struct omap2_mcspi {
         struct clk              *fck;
         /* Virtual base address of the controller */
         void __iomem            *base;
+        unsigned long           phys;
         /* SPI1 has 4 channels, while SPI2 has 2 */
         struct omap2_mcspi_dma  *dma_channels;
 };
 
 struct omap2_mcspi_cs {
         void __iomem            *base;
+        unsigned long           phys;
         int                     word_len;
 };
 
@@ -233,7 +235,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
         c = count;
         word_len = cs->word_len;
 
-        base = (unsigned long) io_v2p(cs->base);
+        base = cs->phys;
         tx_reg = base + OMAP2_MCSPI_TX0;
         rx_reg = base + OMAP2_MCSPI_RX0;
         rx = xfer->rx_buf;
@@ -633,6 +635,7 @@ static int omap2_mcspi_setup(struct spi_device *spi)
                 if (!cs)
                         return -ENOMEM;
                 cs->base = mcspi->base + spi->chip_select * 0x14;
+                cs->phys = mcspi->phys + spi->chip_select * 0x14;
                 spi->controller_state = cs;
         }
 
@@ -1005,7 +1008,13 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
                 goto err1;
         }
 
-        mcspi->base = (void __iomem *) io_p2v(r->start);
+        mcspi->phys = r->start;
+        mcspi->base = ioremap(r->start, r->end - r->start + 1);
+        if (!mcspi->base) {
+                dev_dbg(&pdev->dev, "can't ioremap MCSPI\n");
+                status = -ENOMEM;
+                goto err1aa;
+        }
 
         INIT_WORK(&mcspi->work, omap2_mcspi_work);
 
@@ -1055,6 +1064,8 @@ err3:
 err2:
         clk_put(mcspi->ick);
 err1a:
+        iounmap(mcspi->base);
+err1aa:
         release_mem_region(r->start, (r->end - r->start) + 1);
 err1:
         spi_master_put(master);
@@ -1067,6 +1078,7 @@ static int __exit omap2_mcspi_remove(struct platform_device *pdev)
         struct omap2_mcspi      *mcspi;
         struct omap2_mcspi_dma  *dma_channels;
         struct resource         *r;
+        void __iomem *base;
 
         master = dev_get_drvdata(&pdev->dev);
         mcspi = spi_master_get_devdata(master);
@@ -1078,7 +1090,9 @@ static int __exit omap2_mcspi_remove(struct platform_device *pdev)
         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         release_mem_region(r->start, (r->end - r->start) + 1);
 
+        base = mcspi->base;
         spi_unregister_master(master);
+        iounmap(base);
         kfree(dma_channels);
 
         return 0;
diff --git a/drivers/spi/omap_uwire.c b/drivers/spi/omap_uwire.c
index 5515eb97d7c5..bab6ff061e91 100644
--- a/drivers/spi/omap_uwire.c
+++ b/drivers/spi/omap_uwire.c
@@ -59,7 +59,6 @@
  * and irqs should show there too...
  */
 #define UWIRE_BASE_PHYS         0xFFFB3000
-#define UWIRE_BASE              ((void *__iomem)IO_ADDRESS(UWIRE_BASE_PHYS))
 
 /* uWire Registers: */
 #define UWIRE_IO_SIZE 0x20
@@ -103,16 +102,21 @@ struct uwire_state {
 };
 
 /* REVISIT compile time constant for idx_shift? */
+/*
+ * Or, put it in a structure which is used throughout the driver;
+ * that avoids having to issue two loads for each bit of static data.
+ */
 static unsigned int uwire_idx_shift;
+static void __iomem *uwire_base;
 
 static inline void uwire_write_reg(int idx, u16 val)
 {
-        __raw_writew(val, UWIRE_BASE + (idx << uwire_idx_shift));
+        __raw_writew(val, uwire_base + (idx << uwire_idx_shift));
 }
 
 static inline u16 uwire_read_reg(int idx)
 {
-        return __raw_readw(UWIRE_BASE + (idx << uwire_idx_shift));
+        return __raw_readw(uwire_base + (idx << uwire_idx_shift));
 }
 
 static inline void omap_uwire_configure_mode(u8 cs, unsigned long flags)
@@ -492,6 +496,14 @@ static int __init uwire_probe(struct platform_device *pdev)
                 return -ENODEV;
 
         uwire = spi_master_get_devdata(master);
+
+        uwire_base = ioremap(UWIRE_BASE_PHYS, UWIRE_IO_SIZE);
+        if (!uwire_base) {
+                dev_dbg(&pdev->dev, "can't ioremap UWIRE\n");
+                spi_master_put(master);
+                return -ENOMEM;
+        }
+
         dev_set_drvdata(&pdev->dev, uwire);
 
         uwire->ck = clk_get(&pdev->dev, "armxor_ck");
@@ -520,8 +532,10 @@ static int __init uwire_probe(struct platform_device *pdev)
         uwire->bitbang.txrx_bufs = uwire_txrx;
 
         status = spi_bitbang_start(&uwire->bitbang);
-        if (status < 0)
+        if (status < 0) {
                 uwire_off(uwire);
+                iounmap(uwire_base);
+        }
         return status;
 }
 
@@ -534,6 +548,7 @@ static int __exit uwire_remove(struct platform_device *pdev)
 
         status = spi_bitbang_stop(&uwire->bitbang);
         uwire_off(uwire);
+        iounmap(uwire_base);
         return status;
 }
 
diff --git a/drivers/spi/orion_spi.c b/drivers/spi/orion_spi.c
index b872bfaf4bd2..014becb7d530 100644
--- a/drivers/spi/orion_spi.c
+++ b/drivers/spi/orion_spi.c
@@ -364,6 +364,11 @@ static int orion_spi_setup(struct spi_device *spi)
                 return -EINVAL;
         }
 
+        /* Fix ac timing if required.   */
+        if (orion_spi->spi_info->enable_clock_fix)
+                orion_spi_setbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
+                                  (1 << 14));
+
         if (spi->bits_per_word == 0)
                 spi->bits_per_word = 8;
 
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index d47d3636227f..dae87b1a4c6e 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -47,6 +47,10 @@ MODULE_ALIAS("platform:pxa2xx-spi");
 
 #define MAX_BUSES 3
 
+#define RX_THRESH_DFLT  8
+#define TX_THRESH_DFLT  8
+#define TIMOUT_DFLT             1000
+
 #define DMA_INT_MASK            (DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERR)
 #define RESET_DMA_CHANNEL       (DCSR_NODESC | DMA_INT_MASK)
 #define IS_DMA_ALIGNED(x)       ((((u32)(x)) & 0x07) == 0)
@@ -1171,6 +1175,8 @@ static int setup(struct spi_device *spi)
         struct driver_data *drv_data = spi_master_get_devdata(spi->master);
         struct ssp_device *ssp = drv_data->ssp;
         unsigned int clk_div;
+        uint tx_thres = TX_THRESH_DFLT;
+        uint rx_thres = RX_THRESH_DFLT;
 
         if (!spi->bits_per_word)
                 spi->bits_per_word = 8;
@@ -1209,8 +1215,7 @@ static int setup(struct spi_device *spi)
 
                 chip->cs_control = null_cs_control;
                 chip->enable_dma = 0;
-                chip->timeout = 1000;
-                chip->threshold = SSCR1_RxTresh(1) | SSCR1_TxTresh(1);
+                chip->timeout = TIMOUT_DFLT;
                 chip->dma_burst_size = drv_data->master_info->enable_dma ?
                                         DCMD_BURST8 : 0;
         }
@@ -1224,22 +1229,21 @@ static int setup(struct spi_device *spi)
         if (chip_info) {
                 if (chip_info->cs_control)
                         chip->cs_control = chip_info->cs_control;
-
-                chip->timeout = chip_info->timeout;
-
-                chip->threshold = (SSCR1_RxTresh(chip_info->rx_threshold) &
-                                                                SSCR1_RFT) |
-                                (SSCR1_TxTresh(chip_info->tx_threshold) &
-                                                                SSCR1_TFT);
-
-                chip->enable_dma = chip_info->dma_burst_size != 0
-                                        && drv_data->master_info->enable_dma;
+                if (chip_info->timeout)
+                        chip->timeout = chip_info->timeout;
+                if (chip_info->tx_threshold)
+                        tx_thres = chip_info->tx_threshold;
+                if (chip_info->rx_threshold)
+                        rx_thres = chip_info->rx_threshold;
+                chip->enable_dma = drv_data->master_info->enable_dma;
                 chip->dma_threshold = 0;
-
                 if (chip_info->enable_loopback)
                         chip->cr1 = SSCR1_LBM;
         }
 
+        chip->threshold = (SSCR1_RxTresh(rx_thres) & SSCR1_RFT) |
+                        (SSCR1_TxTresh(tx_thres) & SSCR1_TFT);
+
         /* set dma burst and threshold outside of chip_info path so that if
          * chip_info goes away after setting chip->enable_dma, the
          * burst and threshold can still respond to changes in bits_per_word */
@@ -1268,17 +1272,19 @@ static int setup(struct spi_device *spi)
 
         /* NOTE:  PXA25x_SSP _could_ use external clocking ... */
         if (drv_data->ssp_type != PXA25x_SSP)
-                dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d\n",
+                dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d, %s\n",
                                 spi->bits_per_word,
                                 clk_get_rate(ssp->clk)
                                         / (1 + ((chip->cr0 & SSCR0_SCR) >> 8)),
-                                spi->mode & 0x3);
+                                spi->mode & 0x3,
+                                chip->enable_dma ? "DMA" : "PIO");
         else
-                dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d\n",
+                dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d, %s\n",
                                 spi->bits_per_word,
-                                clk_get_rate(ssp->clk)
+                                clk_get_rate(ssp->clk) / 2
                                         / (1 + ((chip->cr0 & SSCR0_SCR) >> 8)),
-                                spi->mode & 0x3);
+                                spi->mode & 0x3,
+                                chip->enable_dma ? "DMA" : "PIO");
 
         if (spi->bits_per_word <= 8) {
                 chip->n_bytes = 1;
@@ -1407,9 +1413,9 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
         struct device *dev = &pdev->dev;
         struct pxa2xx_spi_master *platform_info;
         struct spi_master *master;
-        struct driver_data *drv_data = NULL;
+        struct driver_data *drv_data;
         struct ssp_device *ssp;
-        int status = 0;
+        int status;
 
         platform_info = dev->platform_data;
 
@@ -1422,7 +1428,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
         /* Allocate master with space for drv_data and null dma buffer */
         master = spi_alloc_master(dev, sizeof(struct driver_data) + 16);
         if (!master) {
-                dev_err(&pdev->dev, "can not alloc spi_master\n");
+                dev_err(&pdev->dev, "cannot alloc spi_master\n");
                 ssp_free(ssp);
                 return -ENOMEM;
         }
@@ -1458,7 +1464,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
 
         status = request_irq(ssp->irq, ssp_int, 0, dev->bus_id, drv_data);
         if (status < 0) {
-                dev_err(&pdev->dev, "can not get IRQ\n");
+                dev_err(&pdev->dev, "cannot get IRQ %d\n", ssp->irq);
                 goto out_error_master_alloc;
         }
 
@@ -1498,7 +1504,9 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
 
         /* Load default SSP configuration */
         write_SSCR0(0, drv_data->ioaddr);
-        write_SSCR1(SSCR1_RxTresh(4) | SSCR1_TxTresh(12), drv_data->ioaddr);
+        write_SSCR1(SSCR1_RxTresh(RX_THRESH_DFLT) |
+                                SSCR1_TxTresh(TX_THRESH_DFLT),
+                                drv_data->ioaddr);
         write_SSCR0(SSCR0_SerClkDiv(2)
                         | SSCR0_Motorola
                         | SSCR0_DataSize(8),
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 75e86865234c..3734dc9708e1 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -660,7 +660,7 @@ int spi_write_then_read(struct spi_device *spi,
 
         int                     status;
         struct spi_message      message;
-        struct spi_transfer     x[2];
+        struct spi_transfer     x;
         u8                      *local_buf;
 
         /* Use preallocated DMA-safe buffer.  We can't avoid copying here,
@@ -671,15 +671,9 @@ int spi_write_then_read(struct spi_device *spi,
                 return -EINVAL;
 
         spi_message_init(&message);
-        memset(x, 0, sizeof x);
-        if (n_tx) {
-                x[0].len = n_tx;
-                spi_message_add_tail(&x[0], &message);
-        }
-        if (n_rx) {
-                x[1].len = n_rx;
-                spi_message_add_tail(&x[1], &message);
-        }
+        memset(&x, 0, sizeof x);
+        x.len = n_tx + n_rx;
+        spi_message_add_tail(&x, &message);
 
         /* ... unless someone else is using the pre-allocated buffer */
         if (!mutex_trylock(&lock)) {
@@ -690,15 +684,15 @@ int spi_write_then_read(struct spi_device *spi,
                 local_buf = buf;
 
         memcpy(local_buf, txbuf, n_tx);
-        x[0].tx_buf = local_buf;
-        x[1].rx_buf = local_buf + n_tx;
+        x.tx_buf = local_buf;
+        x.rx_buf = local_buf;
 
         /* do the i/o */
         status = spi_sync(spi, &message);
         if (status == 0)
-                memcpy(rxbuf, x[1].rx_buf, n_rx);
+                memcpy(rxbuf, x.rx_buf + n_tx, n_rx);
 
-        if (x[0].tx_buf == buf)
+        if (x.tx_buf == buf)
                 mutex_unlock(&lock);
         else
                 kfree(local_buf);
@@ -744,5 +738,5 @@ err0:
  * driver registration) _could_ be dynamically linked (modular) ... costs
  * include needing to have boardinfo data structures be much more public.
  */
-subsys_initcall(spi_init);
+postcore_initcall(spi_init);
 
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index 3eb414b84a9d..c252cbac00f1 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -247,6 +247,9 @@ static void s3c24xx_spi_initialsetup(struct s3c24xx_spi *hw)
         writeb(0xff, hw->regs + S3C2410_SPPRE);
         writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN);
         writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON);
+
+        if (hw->pdata && hw->pdata->gpio_setup)
+                hw->pdata->gpio_setup(hw->pdata, 1);
 }
 
 static int __init s3c24xx_spi_probe(struct platform_device *pdev)
@@ -412,6 +415,9 @@ static int s3c24xx_spi_suspend(struct platform_device *pdev, pm_message_t msg)
 {
         struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
 
+        if (hw->pdata && hw->pdata->gpio_setup)
+                hw->pdata->gpio_setup(hw->pdata, 0);
+
         clk_disable(hw->clk);
         return 0;
 }
diff --git a/drivers/telephony/ixj.c b/drivers/telephony/ixj.c
index ec7aeb502d15..41b6530b8f25 100644
--- a/drivers/telephony/ixj.c
+++ b/drivers/telephony/ixj.c
@@ -42,8 +42,6 @@
  ***************************************************************************/
 
 /*
- * $Log: ixj.c,v $
- *
  * Revision 4.8  2003/07/09 19:39:00  Daniele Bellucci
  * Audit some copy_*_user and minor cleanup.
  *
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index 95b3ec89c126..522185629624 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -344,7 +344,12 @@ static int usb_hcd_omap_probe (const struct hc_driver *driver,
                 goto err1;
         }
 
-        hcd->regs = (void __iomem *) (int) IO_ADDRESS(hcd->rsrc_start);
+        hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
+        if (!hcd->regs) {
+                dev_err(&pdev->dev, "can't ioremap OHCI HCD\n");
+                retval = -ENOMEM;
+                goto err2;
+        }
 
         ohci = hcd_to_ohci(hcd);
         ohci_hcd_init(ohci);
@@ -355,11 +360,11 @@ static int usb_hcd_omap_probe (const struct hc_driver *driver,
         irq = platform_get_irq(pdev, 0);
         if (irq < 0) {
                 retval = -ENXIO;
-                goto err2;
+                goto err3;
         }
         retval = usb_add_hcd(hcd, irq, IRQF_DISABLED);
         if (retval)
-                goto err2;
+                goto err3;
 
         host_initialized = 1;
 
@@ -367,6 +372,8 @@ static int usb_hcd_omap_probe (const struct hc_driver *driver,
                 omap_ohci_clock_power(0);
 
         return 0;
+err3:
+        iounmap(hcd->regs);
 err2:
         release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
 err1:
@@ -401,6 +408,7 @@ usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev)
         }
         if (machine_is_omap_osk())
                 omap_free_gpio(9);
+        iounmap(hcd->regs);
         release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
         usb_put_hcd(hcd);
         clk_put(usb_dc_ck);
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index f79c2040758b..0f13448c6f79 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -76,6 +76,14 @@ config FB_DDC
        select I2C
        default n
 
+config FB_BOOT_VESA_SUPPORT
+        bool
+        depends on FB
+        default n
+        ---help---
+          If true, at least one selected framebuffer driver can take advantage
+          of VESA video modes set at an early boot stage via the vga= parameter.
+
 config FB_CFB_FILLRECT
         tristate
         depends on FB
@@ -254,16 +262,24 @@ config FB_PM2
         select FB_CFB_COPYAREA
         select FB_CFB_IMAGEBLIT
         help
-          This is the frame buffer device driver for the Permedia2 AGP frame
-          buffer card from ASK, aka `Graphic Blaster Exxtreme'.  There is a
-          product page at
-          <http://www.ask.com.hk/product/Permedia%202/permedia2.htm>.
+          This is the frame buffer device driver for cards based on
+          the 3D Labs Permedia, Permedia 2 and Permedia 2V chips.
+          The driver was tested on the following cards:
+                Diamond FireGL 1000 PRO AGP
+                ELSA Gloria Synergy PCI
+                Appian Jeronimo PRO (both heads) PCI
+                3DLabs Oxygen ACX aka EONtronics Picasso P2 PCI
+                Techsource Raptor GFX-8P (aka Sun PGX-32) on SPARC
+                ASK Graphic Blaster Exxtreme AGP
+
+          To compile this driver as a module, choose M here: the
+          module will be called pm2fb.
 
 config FB_PM2_FIFO_DISCONNECT
         bool "enable FIFO disconnect feature"
         depends on FB_PM2 && PCI
         help
-          Support the Permedia2 FIFO disconnect feature (see CONFIG_FB_PM2).
+          Support the Permedia2 FIFO disconnect feature.
 
 config FB_ARMCLCD
         tristate "ARM PrimeCell PL110 support"
@@ -673,6 +689,7 @@ config FB_VESA
         select FB_CFB_FILLRECT
         select FB_CFB_COPYAREA
         select FB_CFB_IMAGEBLIT
+        select FB_BOOT_VESA_SUPPORT
         help
           This is the frame buffer device driver for generic VESA 2.0
           compliant graphic cards. The older VESA 1.2 cards are not supported.
@@ -681,23 +698,14 @@ config FB_VESA
 
 config FB_EFI
         bool "EFI-based Framebuffer Support"
-        depends on (FB = y) && X86
-        select FB_CFB_FILLRECT
-        select FB_CFB_COPYAREA
-        select FB_CFB_IMAGEBLIT
-        help
-          This is the EFI frame buffer device driver. If the firmware on
-          your platform is UEFI2.0, select Y to add support for
-          Graphics Output Protocol for early console messages to appear.
-
-config FB_IMAC
-        bool "Intel-based Macintosh Framebuffer Support"
         depends on (FB = y) && X86 && EFI
         select FB_CFB_FILLRECT
         select FB_CFB_COPYAREA
         select FB_CFB_IMAGEBLIT
         help
-          This is the frame buffer device driver for the Intel-based Macintosh
+          This is the EFI frame buffer device driver. If the firmware on
+          your platform is EFI 1.10 or UEFI 2.0, select Y to add support for
+          using the EFI framebuffer as your console.
 
 config FB_N411
        tristate "N411 Apollo/Hecuba devkit support"
@@ -1118,6 +1126,7 @@ config FB_INTEL
         select FB_CFB_FILLRECT
         select FB_CFB_COPYAREA
         select FB_CFB_IMAGEBLIT
+        select FB_BOOT_VESA_SUPPORT
         help
           This driver supports the on-board graphics built in to the Intel
           830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM chipsets.
@@ -1470,6 +1479,7 @@ config FB_SIS
         select FB_CFB_FILLRECT
         select FB_CFB_COPYAREA
         select FB_CFB_IMAGEBLIT
+        select FB_BOOT_VESA_SUPPORT
         help
           This is the frame buffer device driver for the SiS 300, 315, 330
           and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
@@ -1492,6 +1502,24 @@ config FB_SIS_315
           (315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760, 761) as well
           as XGI V3XT, V5, V8 and Z7.
 
+config FB_VIA
+       tristate "VIA UniChrome (Pro) and Chrome9 display support"
+       depends on FB && PCI
+       select FB_CFB_FILLRECT
+       select FB_CFB_COPYAREA
+       select FB_CFB_IMAGEBLIT
+       select FB_SOFT_CURSOR
+       select I2C_ALGOBIT
+       select I2C
+       help
+          This is the frame buffer device driver for Graphics chips of VIA
+          UniChrome (Pro) Family (CLE266,PM800/CN400,P4M800CE/P4M800Pro/
+          CN700/VN800,CX700/VX700,P4M890) and Chrome9 Family (K8M890,CN896
+          /P4M900,VX800)
+          Say Y if you have a VIA UniChrome graphics board.
+
+          To compile this driver as a module, choose M here: the
+          module will be called viafb.
 config FB_NEOMAGIC
         tristate "NeoMagic display support"
         depends on FB && PCI
@@ -1521,25 +1549,25 @@ config FB_KYRO
           module will be called kyrofb.
 
 config FB_3DFX
-        tristate "3Dfx Banshee/Voodoo3 display support"
+        tristate "3Dfx Banshee/Voodoo3/Voodoo5 display support"
         depends on FB && PCI
         select FB_CFB_IMAGEBLIT
         select FB_CFB_FILLRECT
         select FB_CFB_COPYAREA
         help
-          This driver supports graphics boards with the 3Dfx Banshee/Voodoo3
-          chips. Say Y if you have such a graphics board.
+          This driver supports graphics boards with the 3Dfx Banshee,
+          Voodoo3 or VSA-100 (aka Voodoo4/5) chips. Say Y if you have
+          such a graphics board.
 
           To compile this driver as a module, choose M here: the
           module will be called tdfxfb.
 
 config FB_3DFX_ACCEL
-        bool "3Dfx Banshee/Voodoo3 Acceleration functions (EXPERIMENTAL)"
+        bool "3Dfx Acceleration functions (EXPERIMENTAL)"
         depends on FB_3DFX && EXPERIMENTAL
         ---help---
-        This will compile the 3Dfx Banshee/Voodoo3 frame buffer device
-        with acceleration functions.
-
+        This will compile the 3Dfx Banshee/Voodoo3/VSA-100 frame buffer
+        device driver with acceleration functions.
 
 config FB_VOODOO1
         tristate "3Dfx Voodoo Graphics (sst1) support"
@@ -1604,17 +1632,16 @@ config FB_TRIDENT
         select FB_CFB_COPYAREA
         select FB_CFB_IMAGEBLIT
         ---help---
-          This driver is supposed to support graphics boards with the
-          Trident CyberXXXX/Image/CyberBlade chips mostly found in laptops
+          This is the frame buffer device driver for Trident PCI/AGP chipsets.
+          Supported chipset families are TGUI 9440/96XX, 3DImage, Blade3D
+          and Blade XP.
+          There are also integrated versions of these chips called CyberXXXX,
+          CyberImage or CyberBlade. These chips are mostly found in laptops
           but also on some motherboards. For more information, read
           <file:Documentation/fb/tridentfb.txt>
 
-          Cyberblade/i1 support will be removed soon, use the cyblafb driver
-          instead.
-
           Say Y if you have such a graphics board.
 
-
           To compile this driver as a module, choose M here: the
           module will be called tridentfb.
 
@@ -1869,6 +1896,28 @@ config FB_SH_MOBILE_LCDC
         ---help---
           Frame buffer driver for the on-chip SH-Mobile LCD controller.
 
+config FB_TMIO
+        tristate "Toshiba Mobile IO FrameBuffer support"
+        depends on FB && MFD_CORE
+        select FB_CFB_FILLRECT
+        select FB_CFB_COPYAREA
+        select FB_CFB_IMAGEBLIT
+        ---help---
+          Frame buffer driver for the Toshiba Mobile IO integrated as found
+          on the Sharp SL-6000 series
+
+          This driver is also available as a module ( = code which can be
+          inserted and removed from the running kernel whenever you want). The
+          module will be called tmiofb. If you want to compile it as a module,
+          say M here and read <file:Documentation/kbuild/modules.txt>.
+
+          If unsure, say N.
+
+config FB_TMIO_ACCELL
+        bool "tmiofb acceleration"
+        depends on FB_TMIO
+        default y
+
 config FB_S3C2410
         tristate "S3C2410 LCD framebuffer support"
         depends on FB && ARCH_S3C2410
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index ad0330bf9be3..248bddc8d0b0 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_FB_ATY)		  += aty/ macmodes.o
 obj-$(CONFIG_FB_ATY128)           += aty/ macmodes.o
 obj-$(CONFIG_FB_RADEON)           += aty/
 obj-$(CONFIG_FB_SIS)              += sis/
+obj-$(CONFIG_FB_VIA)              += via/
 obj-$(CONFIG_FB_KYRO)             += kyro/
 obj-$(CONFIG_FB_SAVAGE)           += savage/
 obj-$(CONFIG_FB_GEODE)            += geode/
@@ -97,6 +98,7 @@ obj-$(CONFIG_FB_CIRRUS)		  += cirrusfb.o
 obj-$(CONFIG_FB_ASILIANT)         += asiliantfb.o
 obj-$(CONFIG_FB_PXA)              += pxafb.o
 obj-$(CONFIG_FB_W100)             += w100fb.o
+obj-$(CONFIG_FB_TMIO)             += tmiofb.o
 obj-$(CONFIG_FB_AU1100)           += au1100fb.o
 obj-$(CONFIG_FB_AU1200)           += au1200fb.o
 obj-$(CONFIG_FB_PMAG_AA)          += pmag-aa-fb.o
@@ -124,7 +126,6 @@ obj-$(CONFIG_FB_CARMINE)          += carminefb.o
 # Platform or fallback drivers go here
 obj-$(CONFIG_FB_UVESA)            += uvesafb.o
 obj-$(CONFIG_FB_VESA)             += vesafb.o
-obj-$(CONFIG_FB_IMAC)             += imacfb.o
 obj-$(CONFIG_FB_EFI)              += efifb.o
 obj-$(CONFIG_FB_VGA16)            += vga16fb.o
 obj-$(CONFIG_FB_OF)               += offb.o
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
index d38fd5217422..f8d0a57a07cb 100644
--- a/drivers/video/atmel_lcdfb.c
+++ b/drivers/video/atmel_lcdfb.c
@@ -372,6 +372,13 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
         var->transp.offset = var->transp.length = 0;
         var->xoffset = var->yoffset = 0;
 
+        if (info->fix.smem_len) {
+                unsigned int smem_len = (var->xres_virtual * var->yres_virtual
+                                         * ((var->bits_per_pixel + 7) / 8));
+                if (smem_len > info->fix.smem_len)
+                        return -EINVAL;
+        }
+
         /* Saturate vertical and horizontal timings at maximum values */
         var->vsync_len = min_t(u32, var->vsync_len,
                         (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
diff --git a/drivers/video/aty/radeon_accel.c b/drivers/video/aty/radeon_accel.c
index aa95f8350242..8718f7349d6b 100644
--- a/drivers/video/aty/radeon_accel.c
+++ b/drivers/video/aty/radeon_accel.c
@@ -5,61 +5,61 @@
  * --dte
  */
 
-static void radeon_fixup_offset(struct radeonfb_info *rinfo)
+#define FLUSH_CACHE_WORKAROUND  1
+
+void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries)
 {
-        u32 local_base;
-
-        /* *** Ugly workaround *** */
-        /*
-         * On some platforms, the video memory is mapped at 0 in radeon chip space
-         * (like PPCs) by the firmware. X will always move it up so that it's seen
-         * by the chip to be at the same address as the PCI BAR.
-         * That means that when switching back from X, there is a mismatch between
-         * the offsets programmed into the engine. This means that potentially,
-         * accel operations done before radeonfb has a chance to re-init the engine
-         * will have incorrect offsets, and potentially trash system memory !
-         *
-         * The correct fix is for fbcon to never call any accel op before the engine
-         * has properly been re-initialized (by a call to set_var), but this is a
-         * complex fix. This workaround in the meantime, called before every accel
-         * operation, makes sure the offsets are in sync.
-         */
+        int i;
 
-        radeon_fifo_wait (1);
-        local_base = INREG(MC_FB_LOCATION) << 16;
-        if (local_base == rinfo->fb_local_base)
-                return;
+        for (i=0; i<2000000; i++) {
+                rinfo->fifo_free = INREG(RBBM_STATUS) & 0x7f;
+                if (rinfo->fifo_free >= entries)
+                        return;
+                udelay(10);
+        }
+        printk(KERN_ERR "radeonfb: FIFO Timeout !\n");
+        /* XXX Todo: attempt to reset the engine */
+}
 
-        rinfo->fb_local_base = local_base;
+static inline void radeon_fifo_wait(struct radeonfb_info *rinfo, int entries)
+{
+        if (entries <= rinfo->fifo_free)
+                rinfo->fifo_free -= entries;
+        else
+                radeon_fifo_update_and_wait(rinfo, entries);
+}
 
-        radeon_fifo_wait (3);
-        OUTREG(DEFAULT_PITCH_OFFSET, (rinfo->pitch << 0x16) |
-                                     (rinfo->fb_local_base >> 10));
-        OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
-        OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
+static inline void radeonfb_set_creg(struct radeonfb_info *rinfo, u32 reg,
+                                     u32 *cache, u32 new_val)
+{
+        if (new_val == *cache)
+                return;
+        *cache = new_val;
+        radeon_fifo_wait(rinfo, 1);
+        OUTREG(reg, new_val);
 }
 
 static void radeonfb_prim_fillrect(struct radeonfb_info *rinfo, 
                                    const struct fb_fillrect *region)
 {
-        radeon_fifo_wait(4);  
-  
-        OUTREG(DP_GUI_MASTER_CNTL,  
-                rinfo->dp_gui_master_cntl  /* contains, like GMC_DST_32BPP */
-                | GMC_BRUSH_SOLID_COLOR
-                | ROP3_P);
-        if (radeon_get_dstbpp(rinfo->depth) != DST_8BPP)
-                OUTREG(DP_BRUSH_FRGD_CLR, rinfo->pseudo_palette[region->color]);
-        else
-                OUTREG(DP_BRUSH_FRGD_CLR, region->color);
-        OUTREG(DP_WRITE_MSK, 0xffffffff);
-        OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM));
-
-        radeon_fifo_wait(2);
+        radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache,
+                          rinfo->dp_gui_mc_base | GMC_BRUSH_SOLID_COLOR | ROP3_P);
+        radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache,
+                          DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM);
+        radeonfb_set_creg(rinfo, DP_BRUSH_FRGD_CLR, &rinfo->dp_brush_fg_cache,
+                          region->color);
+
+        /* Ensure the dst cache is flushed and the engine idle before
+         * issuing the operation.
+         *
+         * This works around engine lockups on some cards
+         */
+#if FLUSH_CACHE_WORKAROUND
+        radeon_fifo_wait(rinfo, 2);
         OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL);
         OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE));
-
-        radeon_fifo_wait(2);  
+#endif
+        radeon_fifo_wait(rinfo, 2);
         OUTREG(DST_Y_X, (region->dy << 16) | region->dx);
         OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height);
 }
@@ -70,15 +70,14 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region)
         struct fb_fillrect modded;
         int vxres, vyres;
   
-        if (info->state != FBINFO_STATE_RUNNING)
+        WARN_ON(rinfo->gfx_mode);
+        if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode)
                 return;
         if (info->flags & FBINFO_HWACCEL_DISABLED) {
                 cfb_fillrect(info, region);
                 return;
         }
 
-        radeon_fixup_offset(rinfo);
-
         vxres = info->var.xres_virtual;
         vyres = info->var.yres_virtual;
 
@@ -91,6 +90,10 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region)
         if(modded.dx + modded.width  > vxres) modded.width  = vxres - modded.dx;
         if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy;
 
+        if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+            info->fix.visual == FB_VISUAL_DIRECTCOLOR )
+                modded.color = ((u32 *) (info->pseudo_palette))[region->color];
+
         radeonfb_prim_fillrect(rinfo, &modded);
 }
 
@@ -109,22 +112,22 @@ static void radeonfb_prim_copyarea(struct radeonfb_info *rinfo,
         if ( xdir < 0 ) { sx += w-1; dx += w-1; }
         if ( ydir < 0 ) { sy += h-1; dy += h-1; }
 
-        radeon_fifo_wait(3);
-        OUTREG(DP_GUI_MASTER_CNTL,
-                rinfo->dp_gui_master_cntl /* i.e. GMC_DST_32BPP */
-                | GMC_BRUSH_NONE
-                | GMC_SRC_DSTCOLOR
-                | ROP3_S 
-                | DP_SRC_SOURCE_MEMORY );
-        OUTREG(DP_WRITE_MSK, 0xffffffff);
-        OUTREG(DP_CNTL, (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0)
-                        | (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0));
-
-        radeon_fifo_wait(2);
+        radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache,
+                          rinfo->dp_gui_mc_base |
+                          GMC_BRUSH_NONE |
+                          GMC_SRC_DATATYPE_COLOR |
+                          ROP3_S |
+                          DP_SRC_SOURCE_MEMORY);
+        radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache,
+                          (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0) |
+                          (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0));
+
+#if FLUSH_CACHE_WORKAROUND
+        radeon_fifo_wait(rinfo, 2);
         OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL);
         OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE));
-
-        radeon_fifo_wait(3);
+#endif
+        radeon_fifo_wait(rinfo, 3);
         OUTREG(SRC_Y_X, (sy << 16) | sx);
         OUTREG(DST_Y_X, (dy << 16) | dx);
         OUTREG(DST_HEIGHT_WIDTH, (h << 16) | w);
@@ -143,15 +146,14 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
         modded.width  = area->width;
         modded.height = area->height;
   
-        if (info->state != FBINFO_STATE_RUNNING)
+        WARN_ON(rinfo->gfx_mode);
+        if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode)
                 return;
         if (info->flags & FBINFO_HWACCEL_DISABLED) {
                 cfb_copyarea(info, area);
                 return;
         }
 
-        radeon_fixup_offset(rinfo);
-
         vxres = info->var.xres_virtual;
         vyres = info->var.yres_virtual;
 
@@ -168,13 +170,112 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
         radeonfb_prim_copyarea(rinfo, &modded);
 }
 
+static void radeonfb_prim_imageblit(struct radeonfb_info *rinfo,
+                                    const struct fb_image *image,
+                                    u32 fg, u32 bg)
+{
+        unsigned int src_bytes, dwords;
+        u32 *bits;
+
+        radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache,
+                          rinfo->dp_gui_mc_base |
+                          GMC_BRUSH_NONE |
+                          GMC_SRC_DATATYPE_MONO_FG_BG |
+                          ROP3_S |
+                          GMC_BYTE_ORDER_MSB_TO_LSB |
+                          DP_SRC_SOURCE_HOST_DATA);
+        radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache,
+                          DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM);
+        radeonfb_set_creg(rinfo, DP_SRC_FRGD_CLR, &rinfo->dp_src_fg_cache, fg);
+        radeonfb_set_creg(rinfo, DP_SRC_BKGD_CLR, &rinfo->dp_src_bg_cache, bg);
+
+        radeon_fifo_wait(rinfo, 1);
+        OUTREG(DST_Y_X, (image->dy << 16) | image->dx);
+
+        /* Ensure the dst cache is flushed and the engine idle before
+         * issuing the operation.
+         *
+         * This works around engine lockups on some cards
+         */
+#if FLUSH_CACHE_WORKAROUND
+        radeon_fifo_wait(rinfo, 2);
+        OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL);
+        OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE));
+#endif
+
+        /* X here pads width to a multiple of 32 and uses the clipper to
+         * adjust the result. Is that really necessary ? Things seem to
+         * work ok for me without that and the doco doesn't seem to imply
+         * there is such a restriction.
+         */
+        OUTREG(DST_WIDTH_HEIGHT, (image->width << 16) | image->height);
+
+        src_bytes = (((image->width * image->depth) + 7) / 8) * image->height;
+        dwords = (src_bytes + 3) / 4;
+        bits = (u32*)(image->data);
+
+        while(dwords >= 8) {
+                radeon_fifo_wait(rinfo, 8);
+#if BITS_PER_LONG == 64
+                __raw_writeq(*((u64 *)(bits)), rinfo->mmio_base + HOST_DATA0);
+                __raw_writeq(*((u64 *)(bits+2)), rinfo->mmio_base + HOST_DATA2);
+                __raw_writeq(*((u64 *)(bits+4)), rinfo->mmio_base + HOST_DATA4);
+                __raw_writeq(*((u64 *)(bits+6)), rinfo->mmio_base + HOST_DATA6);
+                bits += 8;
+#else
+                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA0);
+                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA1);
+                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA2);
+                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA3);
+                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA4);
+                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA5);
+                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA6);
+                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA7);
+#endif
+                dwords -= 8;
+        }
+        while(dwords--) {
+                radeon_fifo_wait(rinfo, 1);
+                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA0);
+        }
+}
+
 void radeonfb_imageblit(struct fb_info *info, const struct fb_image *image)
 {
         struct radeonfb_info *rinfo = info->par;
+        u32 fg, bg;
 
-        if (info->state != FBINFO_STATE_RUNNING)
+        WARN_ON(rinfo->gfx_mode);
+        if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode)
+                return;
+
+        if (!image->width || !image->height)
                 return;
-        radeon_engine_idle();
+
+        /* We only do 1 bpp color expansion for now */
+        if (info->flags & FBINFO_HWACCEL_DISABLED || image->depth != 1)
+                goto fallback;
+
+        /* Fallback if running out of the screen. We may do clipping
+         * in the future */
+        if ((image->dx + image->width) > info->var.xres_virtual ||
+            (image->dy + image->height) > info->var.yres_virtual)
+                goto fallback;
+
+        if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+            info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
+                fg = ((u32*)(info->pseudo_palette))[image->fg_color];
+                bg = ((u32*)(info->pseudo_palette))[image->bg_color];
+        } else {
+                fg = image->fg_color;
+                bg = image->bg_color;
+        }
+
+        radeonfb_prim_imageblit(rinfo, image, fg, bg);
+        return;
+
+ fallback:
+        radeon_engine_idle(rinfo);
 
         cfb_imageblit(info, image);
 }
@@ -185,7 +286,8 @@ int radeonfb_sync(struct fb_info *info)
 
         if (info->state != FBINFO_STATE_RUNNING)
                 return 0;
-        radeon_engine_idle();
+
+        radeon_engine_idle(rinfo);
 
         return 0;
 }
@@ -211,9 +313,7 @@ void radeonfb_engine_reset(struct radeonfb_info *rinfo)
         host_path_cntl = INREG(HOST_PATH_CNTL);
         rbbm_soft_reset = INREG(RBBM_SOFT_RESET);
 
-        if (rinfo->family == CHIP_FAMILY_R300 ||
-            rinfo->family == CHIP_FAMILY_R350 ||
-            rinfo->family == CHIP_FAMILY_RV350) {
+        if (IS_R300_VARIANT(rinfo)) {
                 u32 tmp;
 
                 OUTREG(RBBM_SOFT_RESET, (rbbm_soft_reset |
@@ -249,9 +349,7 @@ void radeonfb_engine_reset(struct radeonfb_info *rinfo)
         INREG(HOST_PATH_CNTL);
         OUTREG(HOST_PATH_CNTL, host_path_cntl);
 
-        if (rinfo->family != CHIP_FAMILY_R300 &&
-            rinfo->family != CHIP_FAMILY_R350 &&
-            rinfo->family != CHIP_FAMILY_RV350)
+        if (!IS_R300_VARIANT(rinfo))
                 OUTREG(RBBM_SOFT_RESET, rbbm_soft_reset);
 
         OUTREG(CLOCK_CNTL_INDEX, clock_cntl_index);
@@ -265,15 +363,24 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo)
         /* disable 3D engine */
         OUTREG(RB3D_CNTL, 0);
 
+        rinfo->fifo_free = 0;
         radeonfb_engine_reset(rinfo);
 
-        radeon_fifo_wait (1);
-        if ((rinfo->family != CHIP_FAMILY_R300) &&
-            (rinfo->family != CHIP_FAMILY_R350) &&
-            (rinfo->family != CHIP_FAMILY_RV350))
+        radeon_fifo_wait(rinfo, 1);
+        if (IS_R300_VARIANT(rinfo)) {
+                OUTREG(RB2D_DSTCACHE_MODE, INREG(RB2D_DSTCACHE_MODE) |
+                       RB2D_DC_AUTOFLUSH_ENABLE |
+                       RB2D_DC_DC_DISABLE_IGNORE_PE);
+        } else {
+                /* This needs to be double checked with ATI. Latest X driver
+                 * completely "forgets" to set this register on < r3xx, and
+                 * we used to just write 0 there... I'll keep the 0 and update
+                 * that when we have sorted things out on X side.
+                 */
                 OUTREG(RB2D_DSTCACHE_MODE, 0);
+        }
 
-        radeon_fifo_wait (3);
+        radeon_fifo_wait(rinfo, 3);
         /* We re-read MC_FB_LOCATION from card as it can have been
          * modified by XFree drivers (ouch !)
          */
@@ -284,41 +391,57 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo)
         OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
         OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
 
-        radeon_fifo_wait (1);
-#if defined(__BIG_ENDIAN)
+        radeon_fifo_wait(rinfo, 1);
+#ifdef __BIG_ENDIAN
         OUTREGP(DP_DATATYPE, HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN);
 #else
         OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN);
 #endif
-        radeon_fifo_wait (2);
+        radeon_fifo_wait(rinfo, 2);
         OUTREG(DEFAULT_SC_TOP_LEFT, 0);
         OUTREG(DEFAULT_SC_BOTTOM_RIGHT, (DEFAULT_SC_RIGHT_MAX |
                                          DEFAULT_SC_BOTTOM_MAX));
 
+        /* set default DP_GUI_MASTER_CNTL */
         temp = radeon_get_dstbpp(rinfo->depth);
-        rinfo->dp_gui_master_cntl = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS);
+        rinfo->dp_gui_mc_base = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS);
 
-        radeon_fifo_wait (1);
-        OUTREG(DP_GUI_MASTER_CNTL, (rinfo->dp_gui_master_cntl |
-                                    GMC_BRUSH_SOLID_COLOR |
-                                    GMC_SRC_DATATYPE_COLOR));
+        rinfo->dp_gui_mc_cache = rinfo->dp_gui_mc_base |
+                GMC_BRUSH_SOLID_COLOR |
+                GMC_SRC_DATATYPE_COLOR;
+        radeon_fifo_wait(rinfo, 1);
+        OUTREG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_mc_cache);
 
-        radeon_fifo_wait (7);
 
         /* clear line drawing regs */
+        radeon_fifo_wait(rinfo, 2);
         OUTREG(DST_LINE_START, 0);
         OUTREG(DST_LINE_END, 0);
 
-        /* set brush color regs */
-        OUTREG(DP_BRUSH_FRGD_CLR, 0xffffffff);
-        OUTREG(DP_BRUSH_BKGD_CLR, 0x00000000);
-
-        /* set source color regs */
-        OUTREG(DP_SRC_FRGD_CLR, 0xffffffff);
-        OUTREG(DP_SRC_BKGD_CLR, 0x00000000);
+        /* set brush and source color regs */
+        rinfo->dp_brush_fg_cache = 0xffffffff;
+        rinfo->dp_brush_bg_cache = 0x00000000;
+        rinfo->dp_src_fg_cache = 0xffffffff;
+        rinfo->dp_src_bg_cache = 0x00000000;
+        radeon_fifo_wait(rinfo, 4);
+        OUTREG(DP_BRUSH_FRGD_CLR, rinfo->dp_brush_fg_cache);
+        OUTREG(DP_BRUSH_BKGD_CLR, rinfo->dp_brush_bg_cache);
+        OUTREG(DP_SRC_FRGD_CLR, rinfo->dp_src_fg_cache);
+        OUTREG(DP_SRC_BKGD_CLR, rinfo->dp_src_bg_cache);
+
+        /* Default direction */
+        rinfo->dp_cntl_cache = DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM;
+        radeon_fifo_wait(rinfo, 1);
+        OUTREG(DP_CNTL, rinfo->dp_cntl_cache);
 
         /* default write mask */
+        radeon_fifo_wait(rinfo, 1);
         OUTREG(DP_WRITE_MSK, 0xffffffff);
 
-        radeon_engine_idle ();
+        /* Default to no swapping of host data */
+        radeon_fifo_wait(rinfo, 1);
+        OUTREG(RBBM_GUICNTL, RBBM_GUICNTL_HOST_DATA_SWAP_NONE);
+
+        /* Make sure it's settled */
+        radeon_engine_idle(rinfo);
 }
diff --git a/drivers/video/aty/radeon_backlight.c b/drivers/video/aty/radeon_backlight.c
index 1a056adb61c8..f343ba83f0ae 100644
--- a/drivers/video/aty/radeon_backlight.c
+++ b/drivers/video/aty/radeon_backlight.c
@@ -66,7 +66,7 @@ static int radeon_bl_update_status(struct backlight_device *bd)
                 level = bd->props.brightness;
 
         del_timer_sync(&rinfo->lvds_timer);
-        radeon_engine_idle();
+        radeon_engine_idle(rinfo);
 
         lvds_gen_cntl = INREG(LVDS_GEN_CNTL);
         if (level > 0) {
diff --git a/drivers/video/aty/radeon_base.c b/drivers/video/aty/radeon_base.c
index 652273e9f5f9..9a5821c65ebf 100644
--- a/drivers/video/aty/radeon_base.c
+++ b/drivers/video/aty/radeon_base.c
@@ -852,7 +852,6 @@ static int radeonfb_pan_display (struct fb_var_screeninfo *var,
         if (rinfo->asleep)
                 return 0;
 
-        radeon_fifo_wait(2);
         OUTREG(CRTC_OFFSET, ((var->yoffset * var->xres_virtual + var->xoffset)
                              * var->bits_per_pixel / 8) & ~7);
         return 0;
@@ -882,7 +881,6 @@ static int radeonfb_ioctl (struct fb_info *info, unsigned int cmd,
                         if (rc)
                                 return rc;
 
-                        radeon_fifo_wait(2);
                         if (value & 0x01) {
                                 tmp = INREG(LVDS_GEN_CNTL);
 
@@ -940,7 +938,7 @@ int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch)
         if (rinfo->lock_blank)
                 return 0;
 
-        radeon_engine_idle();
+        radeon_engine_idle(rinfo);
 
         val = INREG(CRTC_EXT_CNTL);
         val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS |
@@ -1048,7 +1046,7 @@ static int radeonfb_blank (int blank, struct fb_info *info)
 
         if (rinfo->asleep)
                 return 0;
-                
+
         return radeon_screen_blank(rinfo, blank, 0);
 }
 
@@ -1074,8 +1072,6 @@ static int radeon_setcolreg (unsigned regno, unsigned red, unsigned green,
         pindex = regno;
 
         if (!rinfo->asleep) {
-                radeon_fifo_wait(9);
-
                 if (rinfo->bpp == 16) {
                         pindex = regno * 8;
 
@@ -1244,8 +1240,6 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg
 {
         int i;
 
-        radeon_fifo_wait(20);
-
         /* Workaround from XFree */
         if (rinfo->is_mobility) {
                 /* A temporal workaround for the occational blanking on certain laptop
@@ -1286,11 +1280,10 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg
         radeon_pll_errata_after_data(rinfo);
 
         /* Set PPLL ref. div */
-        if (rinfo->family == CHIP_FAMILY_R300 ||
+        if (IS_R300_VARIANT(rinfo) ||
             rinfo->family == CHIP_FAMILY_RS300 ||
-            rinfo->family == CHIP_FAMILY_R350 ||
-            rinfo->family == CHIP_FAMILY_RV350 ||
-            rinfo->family == CHIP_FAMILY_RV380 ) {
+            rinfo->family == CHIP_FAMILY_RS400 ||
+            rinfo->family == CHIP_FAMILY_RS480) {
                 if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) {
                         /* When restoring console mode, use saved PPLL_REF_DIV
                          * setting.
@@ -1342,7 +1335,7 @@ static void radeon_lvds_timer_func(unsigned long data)
 {
         struct radeonfb_info *rinfo = (struct radeonfb_info *)data;
 
-        radeon_engine_idle();
+        radeon_engine_idle(rinfo);
 
         OUTREG(LVDS_GEN_CNTL, rinfo->pending_lvds_gen_cntl);
 }
@@ -1360,10 +1353,11 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode,
         if (nomodeset)
                 return;
 
+        radeon_engine_idle(rinfo);
+
         if (!regs_only)
                 radeon_screen_blank(rinfo, FB_BLANK_NORMAL, 0);
 
-        radeon_fifo_wait(31);
         for (i=0; i<10; i++)
                 OUTREG(common_regs[i].reg, common_regs[i].val);
 
@@ -1391,7 +1385,6 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode,
         radeon_write_pll_regs(rinfo, mode);
 
         if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) {
-                radeon_fifo_wait(10);
                 OUTREG(FP_CRTC_H_TOTAL_DISP, mode->fp_crtc_h_total_disp);
                 OUTREG(FP_CRTC_V_TOTAL_DISP, mode->fp_crtc_v_total_disp);
                 OUTREG(FP_H_SYNC_STRT_WID, mode->fp_h_sync_strt_wid);
@@ -1406,7 +1399,6 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode,
         if (!regs_only)
                 radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 0);
 
-        radeon_fifo_wait(2);
         OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl);
         
         return;
@@ -1461,10 +1453,7 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs
                 /* Not all chip revs have the same format for this register,
                  * extract the source selection
                  */
-                if (rinfo->family == CHIP_FAMILY_R200 ||
-                    rinfo->family == CHIP_FAMILY_R300 ||
-                    rinfo->family == CHIP_FAMILY_R350 ||
-                    rinfo->family == CHIP_FAMILY_RV350) {
+                if (rinfo->family == CHIP_FAMILY_R200 || IS_R300_VARIANT(rinfo)) {
                         source = (fp2_gen_cntl >> 10) & 0x3;
                         /* sourced from transform unit, check for transform unit
                          * own source
@@ -1560,7 +1549,7 @@ static int radeonfb_set_par(struct fb_info *info)
         /* We always want engine to be idle on a mode switch, even
          * if we won't actually change the mode
          */
-        radeon_engine_idle();
+        radeon_engine_idle(rinfo);
 
         hSyncStart = mode->xres + mode->right_margin;
         hSyncEnd = hSyncStart + mode->hsync_len;
@@ -1855,7 +1844,6 @@ static int radeonfb_set_par(struct fb_info *info)
         return 0;
 }
 
-
 static struct fb_ops radeonfb_ops = {
         .owner                  = THIS_MODULE,
         .fb_check_var           = radeonfb_check_var,
@@ -1879,6 +1867,7 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo)
         info->par = rinfo;
         info->pseudo_palette = rinfo->pseudo_palette;
         info->flags = FBINFO_DEFAULT
+                    | FBINFO_HWACCEL_IMAGEBLIT
                     | FBINFO_HWACCEL_COPYAREA
                     | FBINFO_HWACCEL_FILLRECT
                     | FBINFO_HWACCEL_XPAN
@@ -2005,11 +1994,11 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
             (rinfo->family == CHIP_FAMILY_RS200) ||
             (rinfo->family == CHIP_FAMILY_RS300) ||
             (rinfo->family == CHIP_FAMILY_RC410) ||
+            (rinfo->family == CHIP_FAMILY_RS400) ||
             (rinfo->family == CHIP_FAMILY_RS480) ) {
           u32 tom = INREG(NB_TOM);
           tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024);
 
-                radeon_fifo_wait(6);
           OUTREG(MC_FB_LOCATION, tom);
           OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
           OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
diff --git a/drivers/video/aty/radeon_i2c.c b/drivers/video/aty/radeon_i2c.c
index 8c8fa35f1b7c..2c5567175dca 100644
--- a/drivers/video/aty/radeon_i2c.c
+++ b/drivers/video/aty/radeon_i2c.c
@@ -139,12 +139,8 @@ void radeon_delete_i2c_busses(struct radeonfb_info *rinfo)
 int radeon_probe_i2c_connector(struct radeonfb_info *rinfo, int conn,
                                u8 **out_edid)
 {
-        u32 reg = rinfo->i2c[conn-1].ddc_reg;
         u8 *edid;
 
-        OUTREG(reg, INREG(reg) &
-                        ~(VGA_DDC_DATA_OUTPUT | VGA_DDC_CLK_OUTPUT));
-
         edid = fb_ddc_read(&rinfo->i2c[conn-1].adapter);
 
         if (out_edid)
diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/aty/radeon_pm.c
index 675abdafc2d8..3df5015f1d13 100644
--- a/drivers/video/aty/radeon_pm.c
+++ b/drivers/video/aty/radeon_pm.c
@@ -2653,9 +2653,9 @@ int radeonfb_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
 
         if (!(info->flags & FBINFO_HWACCEL_DISABLED)) {
                 /* Make sure engine is reset */
-                radeon_engine_idle();
+                radeon_engine_idle(rinfo);
                 radeonfb_engine_reset(rinfo);
-                radeon_engine_idle();
+                radeon_engine_idle(rinfo);
         }
 
         /* Blank display and LCD */
@@ -2767,7 +2767,7 @@ int radeonfb_pci_resume(struct pci_dev *pdev)
 
                 rinfo->asleep = 0;
         } else
-                radeon_engine_idle();
+                radeon_engine_idle(rinfo);
 
         /* Restore display & engine */
         radeon_write_mode (rinfo, &rinfo->state, 1);
diff --git a/drivers/video/aty/radeonfb.h b/drivers/video/aty/radeonfb.h
index ccbfffd12805..ea0b5b47acaf 100644
--- a/drivers/video/aty/radeonfb.h
+++ b/drivers/video/aty/radeonfb.h
@@ -53,6 +53,7 @@ enum radeon_family {
         CHIP_FAMILY_RV380,    /* RV370/RV380/M22/M24 */
         CHIP_FAMILY_R420,     /* R420/R423/M18 */
         CHIP_FAMILY_RC410,
+        CHIP_FAMILY_RS400,
         CHIP_FAMILY_RS480,
         CHIP_FAMILY_LAST,
 };
@@ -335,7 +336,15 @@ struct radeonfb_info {
         int                     mon2_type;
         u8                      *mon2_EDID;
 
-        u32                     dp_gui_master_cntl;
+        /* accel bits */
+        u32                     dp_gui_mc_base;
+        u32                     dp_gui_mc_cache;
+        u32                     dp_cntl_cache;
+        u32                     dp_brush_fg_cache;
+        u32                     dp_brush_bg_cache;
+        u32                     dp_src_fg_cache;
+        u32                     dp_src_bg_cache;
+        u32                     fifo_free;
 
         struct pll_info         pll;
 
@@ -347,6 +356,7 @@ struct radeonfb_info {
         int                     lock_blank;
         int                     dynclk;
         int                     no_schedule;
+        int                     gfx_mode;
         enum radeon_pm_mode     pm_mode;
         reinit_function_ptr     reinit_func;
 
@@ -391,8 +401,14 @@ static inline void _radeon_msleep(struct radeonfb_info *rinfo, unsigned long ms)
 #define OUTREG8(addr,val)       writeb(val, (rinfo->mmio_base)+addr)
 #define INREG16(addr)           readw((rinfo->mmio_base)+addr)
 #define OUTREG16(addr,val)      writew(val, (rinfo->mmio_base)+addr)
+
+#ifdef CONFIG_PPC
+#define INREG(addr)             ({ eieio(); ld_le32(rinfo->mmio_base+(addr)); })
+#define OUTREG(addr,val)        do { eieio(); st_le32(rinfo->mmio_base+(addr),(val)); } while(0)
+#else
 #define INREG(addr)             readl((rinfo->mmio_base)+addr)
 #define OUTREG(addr,val)        writel(val, (rinfo->mmio_base)+addr)
+#endif
 
 static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr,
                        u32 val, u32 mask)
@@ -533,16 +549,25 @@ static inline u32 radeon_get_dstbpp(u16 depth)
 /*
  * 2D Engine helper routines
  */
+
+extern void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries);
+
 static inline void radeon_engine_flush (struct radeonfb_info *rinfo)
 {
         int i;
 
-        /* initiate flush */
-        OUTREGP(RB2D_DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL,
+        /* Initiate flush */
+        OUTREGP(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL,
                 ~RB2D_DC_FLUSH_ALL);
 
+        /* Ensure FIFO is empty, ie, make sure the flush commands
+         * has reached the cache
+         */
+        radeon_fifo_update_and_wait(rinfo, 64);
+
+        /* Wait for the flush to complete */
         for (i=0; i < 2000000; i++) {
-                if (!(INREG(RB2D_DSTCACHE_CTLSTAT) & RB2D_DC_BUSY))
+                if (!(INREG(DSTCACHE_CTLSTAT) & RB2D_DC_BUSY))
                         return;
                 udelay(1);
         }
@@ -550,25 +575,12 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo)
 }
 
 
-static inline void _radeon_fifo_wait(struct radeonfb_info *rinfo, int entries)
-{
-        int i;
-
-        for (i=0; i<2000000; i++) {
-                if ((INREG(RBBM_STATUS) & 0x7f) >= entries)
-                        return;
-                udelay(1);
-        }
-        printk(KERN_ERR "radeonfb: FIFO Timeout !\n");
-}
-
-
-static inline void _radeon_engine_idle(struct radeonfb_info *rinfo)
+static inline void radeon_engine_idle(struct radeonfb_info *rinfo)
 {
         int i;
 
         /* ensure FIFO is empty before waiting for idle */
-        _radeon_fifo_wait (rinfo, 64);
+        radeon_fifo_update_and_wait (rinfo, 64);
 
         for (i=0; i<2000000; i++) {
                 if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) {
@@ -581,8 +593,6 @@ static inline void _radeon_engine_idle(struct radeonfb_info *rinfo)
 }
 
 
-#define radeon_engine_idle()            _radeon_engine_idle(rinfo)
-#define radeon_fifo_wait(entries)       _radeon_fifo_wait(rinfo,entries)
 #define radeon_msleep(ms)               _radeon_msleep(rinfo,ms)
 
 
@@ -612,6 +622,7 @@ extern void radeonfb_imageblit(struct fb_info *p, const struct fb_image *image);
 extern int radeonfb_sync(struct fb_info *info);
 extern void radeonfb_engine_init (struct radeonfb_info *rinfo);
 extern void radeonfb_engine_reset(struct radeonfb_info *rinfo);
+extern void radeon_fixup_mem_offset(struct radeonfb_info *rinfo);
 
 /* Other functions */
 extern int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch);
diff --git a/drivers/video/carminefb.c b/drivers/video/carminefb.c
index e15bb447440a..c9b191319a9a 100644
--- a/drivers/video/carminefb.c
+++ b/drivers/video/carminefb.c
@@ -535,7 +535,7 @@ static struct fb_ops carminefb_ops = {
         .fb_setcolreg   = carmine_setcolreg,
 };
 
-static int alloc_carmine_fb(void __iomem *regs, void __iomem *smem_base,
+static int __devinit alloc_carmine_fb(void __iomem *regs, void __iomem *smem_base,
                 int smem_offset, struct device *device, struct fb_info **rinfo)
 {
         int ret;
diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c
index e729fb279645..048b139f0e50 100644
--- a/drivers/video/cirrusfb.c
+++ b/drivers/video/cirrusfb.c
@@ -327,29 +327,7 @@ static const struct {
 #endif /* CONFIG_ZORRO */
 
 struct cirrusfb_regs {
-        long freq;
-        long nom;
-        long den;
-        long div;
-        long multiplexing;
-        long mclk;
-        long divMCLK;
-
-        long HorizRes;          /* The x resolution in pixel */
-        long HorizTotal;
-        long HorizDispEnd;
-        long HorizBlankStart;
-        long HorizBlankEnd;
-        long HorizSyncStart;
-        long HorizSyncEnd;
-
-        long VertRes;           /* the physical y resolution in scanlines */
-        long VertTotal;
-        long VertDispEnd;
-        long VertSyncStart;
-        long VertSyncEnd;
-        long VertBlankStart;
-        long VertBlankEnd;
+        int multiplexing;
 };
 
 #ifdef CIRRUSFB_DEBUG
@@ -367,110 +345,13 @@ struct cirrusfb_info {
 
         struct cirrusfb_regs currentmode;
         int blank_mode;
+        u32 pseudo_palette[16];
 
-        u32     pseudo_palette[16];
-
-#ifdef CONFIG_ZORRO
-        struct zorro_dev *zdev;
-#endif
-#ifdef CONFIG_PCI
-        struct pci_dev *pdev;
-#endif
         void (*unmap)(struct fb_info *info);
 };
 
-static unsigned cirrusfb_def_mode = 1;
-static int noaccel;
-
-/*
- *    Predefined Video Modes
- */
-
-static const struct {
-        const char *name;
-        struct fb_var_screeninfo var;
-} cirrusfb_predefined[] = {
-        {
-                /* autodetect mode */
-                .name   = "Autodetect",
-        }, {
-                /* 640x480, 31.25 kHz, 60 Hz, 25 MHz PixClock */
-                .name   = "640x480",
-                .var    = {
-                        .xres           = 640,
-                        .yres           = 480,
-                        .xres_virtual   = 640,
-                        .yres_virtual   = 480,
-                        .bits_per_pixel = 8,
-                        .red            = { .length = 8 },
-                        .green          = { .length = 8 },
-                        .blue           = { .length = 8 },
-                        .width          = -1,
-                        .height         = -1,
-                        .pixclock       = 40000,
-                        .left_margin    = 48,
-                        .right_margin   = 16,
-                        .upper_margin   = 32,
-                        .lower_margin   = 8,
-                        .hsync_len      = 96,
-                        .vsync_len      = 4,
-                        .sync   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-                        .vmode          = FB_VMODE_NONINTERLACED
-                 }
-        }, {
-                /* 800x600, 48 kHz, 76 Hz, 50 MHz PixClock */
-                .name   = "800x600",
-                .var    = {
-                        .xres           = 800,
-                        .yres           = 600,
-                        .xres_virtual   = 800,
-                        .yres_virtual   = 600,
-                        .bits_per_pixel = 8,
-                        .red            = { .length = 8 },
-                        .green          = { .length = 8 },
-                        .blue           = { .length = 8 },
-                        .width          = -1,
-                        .height         = -1,
-                        .pixclock       = 20000,
-                        .left_margin    = 128,
-                        .right_margin   = 16,
-                        .upper_margin   = 24,
-                        .lower_margin   = 2,
-                        .hsync_len      = 96,
-                        .vsync_len      = 6,
-                        .vmode          = FB_VMODE_NONINTERLACED
-                 }
-        }, {
-                /*
-                 * Modeline from XF86Config:
-                 * Mode "1024x768" 80  1024 1136 1340 1432  768 770 774 805
-                 */
-                /* 1024x768, 55.8 kHz, 70 Hz, 80 MHz PixClock */
-                .name   = "1024x768",
-                .var    = {
-                        .xres           = 1024,
-                        .yres           = 768,
-                        .xres_virtual   = 1024,
-                        .yres_virtual   = 768,
-                        .bits_per_pixel = 8,
-                        .red            = { .length = 8 },
-                        .green          = { .length = 8 },
-                        .blue           = { .length = 8 },
-                        .width          = -1,
-                        .height         = -1,
-                        .pixclock       = 12500,
-                        .left_margin    = 144,
-                        .right_margin   = 32,
-                        .upper_margin   = 30,
-                        .lower_margin   = 2,
-                        .hsync_len      = 192,
-                        .vsync_len      = 6,
-                        .vmode          = FB_VMODE_NONINTERLACED
-                }
-        }
-};
-
-#define NUM_TOTAL_MODES    ARRAY_SIZE(cirrusfb_predefined)
+static int noaccel __devinitdata;
+static char *mode_option __devinitdata = "640x480@60";
 
 /****************************************************************************/
 /**** BEGIN PROTOTYPES ******************************************************/
@@ -514,10 +395,6 @@ static struct fb_ops cirrusfb_ops = {
         .fb_imageblit   = cirrusfb_imageblit,
 };
 
-/*--- Hardware Specific Routines -------------------------------------------*/
-static int cirrusfb_decode_var(const struct fb_var_screeninfo *var,
-                                struct cirrusfb_regs *regs,
-                                struct fb_info *info);
 /*--- Internal routines ----------------------------------------------------*/
 static void init_vgachip(struct fb_info *info);
 static void switch_monitor(struct cirrusfb_info *cinfo, int on);
@@ -546,9 +423,7 @@ static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel,
                               u_short width, u_short height,
                               u_char color, u_short line_length);
 
-static void bestclock(long freq, long *best,
-                      long *nom, long *den,
-                      long *div, long maxfreq);
+static void bestclock(long freq, int *nom, int *den, int *div);
 
 #ifdef CIRRUSFB_DEBUG
 static void cirrusfb_dump(void);
@@ -584,45 +459,28 @@ static int cirrusfb_release(struct fb_info *info, int user)
 /****************************************************************************/
 /**** BEGIN Hardware specific Routines **************************************/
 
-/* Get a good MCLK value */
-static long cirrusfb_get_mclk(long freq, int bpp, long *div)
+/* Check if the MCLK is not a better clock source */
+static int cirrusfb_check_mclk(struct cirrusfb_info *cinfo, long freq)
 {
-        long mclk;
+        long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f;
 
-        assert(div != NULL);
-
-        /* Calculate MCLK, in case VCLK is high enough to require > 50MHz.
-         * Assume a 64-bit data path for now.  The formula is:
-         * ((B * PCLK * 2)/W) * 1.2
-         * B = bytes per pixel, PCLK = pixclock, W = data width in bytes */
-        mclk = ((bpp / 8) * freq * 2) / 4;
-        mclk = (mclk * 12) / 10;
-        if (mclk < 50000)
-                mclk = 50000;
-        DPRINTK("Use MCLK of %ld kHz\n", mclk);
-
-        /* Calculate value for SR1F.  Multiply by 2 so we can round up. */
-        mclk = ((mclk * 16) / 14318);
-        mclk = (mclk + 1) / 2;
-        DPRINTK("Set SR1F[5:0] to 0x%lx\n", mclk);
+        /* Read MCLK value */
+        mclk = (14318 * mclk) >> 3;
+        DPRINTK("Read MCLK of %ld kHz\n", mclk);
 
         /* Determine if we should use MCLK instead of VCLK, and if so, what we
-           * should divide it by to get VCLK */
-        switch (freq) {
-        case 24751 ... 25249:
-                *div = 2;
-                DPRINTK("Using VCLK = MCLK/2\n");
-                break;
-        case 49501 ... 50499:
-                *div = 1;
+         * should divide it by to get VCLK
+         */
+
+        if (abs(freq - mclk) < 250) {
                 DPRINTK("Using VCLK = MCLK\n");
-                break;
-        default:
-                *div = 0;
-                break;
+                return 1;
+        } else if (abs(freq - (mclk / 2)) < 250) {
+                DPRINTK("Using VCLK = MCLK/2\n");
+                return 2;
         }
 
-        return mclk;
+        return 0;
 }
 
 static int cirrusfb_check_var(struct fb_var_screeninfo *var,
@@ -638,7 +496,6 @@ static int cirrusfb_check_var(struct fb_var_screeninfo *var,
                 break;          /* 8 pixel per byte, only 1/4th of mem usable */
         case 8:
         case 16:
-        case 24:
         case 32:
                 break;          /* 1 pixel == 1 byte */
         default:
@@ -713,7 +570,6 @@ static int cirrusfb_check_var(struct fb_var_screeninfo *var,
                 var->blue.length = 5;
                 break;
 
-        case 24:
         case 32:
                 if (isPReP) {
                         var->red.offset = 8;
@@ -767,8 +623,6 @@ static int cirrusfb_decode_var(const struct fb_var_screeninfo *var,
         long maxclock;
         int maxclockidx = var->bits_per_pixel >> 3;
         struct cirrusfb_info *cinfo = info->par;
-        int xres, hfront, hsync, hback;
-        int yres, vfront, vsync, vback;
 
         switch (var->bits_per_pixel) {
         case 1:
@@ -782,10 +636,9 @@ static int cirrusfb_decode_var(const struct fb_var_screeninfo *var,
                 break;
 
         case 16:
-        case 24:
         case 32:
                 info->fix.line_length = var->xres_virtual * maxclockidx;
-                info->fix.visual = FB_VISUAL_DIRECTCOLOR;
+                info->fix.visual = FB_VISUAL_TRUECOLOR;
                 break;
 
         default:
@@ -827,90 +680,33 @@ static int cirrusfb_decode_var(const struct fb_var_screeninfo *var,
         switch (var->bits_per_pixel) {
         case 16:
         case 32:
-                if (regs->HorizRes <= 800)
+                if (var->xres <= 800)
                         /* Xbh has this type of clock for 32-bit */
                         freq /= 2;
                 break;
         }
 #endif
-
-        bestclock(freq, &regs->freq, &regs->nom, &regs->den, &regs->div,
-                  maxclock);
-        regs->mclk = cirrusfb_get_mclk(freq, var->bits_per_pixel,
-                                        &regs->divMCLK);
-
-        xres = var->xres;
-        hfront = var->right_margin;
-        hsync = var->hsync_len;
-        hback = var->left_margin;
-
-        yres = var->yres;
-        vfront = var->lower_margin;
-        vsync = var->vsync_len;
-        vback = var->upper_margin;
-
-        if (var->vmode & FB_VMODE_DOUBLE) {
-                yres *= 2;
-                vfront *= 2;
-                vsync *= 2;
-                vback *= 2;
-        } else if (var->vmode & FB_VMODE_INTERLACED) {
-                yres = (yres + 1) / 2;
-                vfront = (vfront + 1) / 2;
-                vsync = (vsync + 1) / 2;
-                vback = (vback + 1) / 2;
-        }
-        regs->HorizRes = xres;
-        regs->HorizTotal = (xres + hfront + hsync + hback) / 8 - 5;
-        regs->HorizDispEnd = xres / 8 - 1;
-        regs->HorizBlankStart = xres / 8;
-        /* does not count with "-5" */
-        regs->HorizBlankEnd = regs->HorizTotal + 5;
-        regs->HorizSyncStart = (xres + hfront) / 8 + 1;
-        regs->HorizSyncEnd = (xres + hfront + hsync) / 8 + 1;
-
-        regs->VertRes = yres;
-        regs->VertTotal = yres + vfront + vsync + vback - 2;
-        regs->VertDispEnd = yres - 1;
-        regs->VertBlankStart = yres;
-        regs->VertBlankEnd = regs->VertTotal;
-        regs->VertSyncStart = yres + vfront - 1;
-        regs->VertSyncEnd = yres + vfront + vsync - 1;
-
-        if (regs->VertRes >= 1024) {
-                regs->VertTotal /= 2;
-                regs->VertSyncStart /= 2;
-                regs->VertSyncEnd /= 2;
-                regs->VertDispEnd /= 2;
-        }
-        if (regs->multiplexing) {
-                regs->HorizTotal /= 2;
-                regs->HorizSyncStart /= 2;
-                regs->HorizSyncEnd /= 2;
-                regs->HorizDispEnd /= 2;
-        }
-
         return 0;
 }
 
-static void cirrusfb_set_mclk(const struct cirrusfb_info *cinfo, int val,
-                                int div)
+static void cirrusfb_set_mclk_as_source(const struct cirrusfb_info *cinfo,
+                                        int div)
 {
+        unsigned char old1f, old1e;
         assert(cinfo != NULL);
+        old1f = vga_rseq(cinfo->regbase, CL_SEQR1F) & ~0x40;
 
-        if (div == 2) {
-                /* VCLK = MCLK/2 */
-                unsigned char old = vga_rseq(cinfo->regbase, CL_SEQR1E);
-                vga_wseq(cinfo->regbase, CL_SEQR1E, old | 0x1);
-                vga_wseq(cinfo->regbase, CL_SEQR1F, 0x40 | (val & 0x3f));
-        } else if (div == 1) {
-                /* VCLK = MCLK */
-                unsigned char old = vga_rseq(cinfo->regbase, CL_SEQR1E);
-                vga_wseq(cinfo->regbase, CL_SEQR1E, old & ~0x1);
-                vga_wseq(cinfo->regbase, CL_SEQR1F, 0x40 | (val & 0x3f));
-        } else {
-                vga_wseq(cinfo->regbase, CL_SEQR1F, val & 0x3f);
+        if (div) {
+                DPRINTK("Set %s as pixclock source.\n",
+                                        (div == 2) ? "MCLK/2" : "MCLK");
+                old1f |= 0x40;
+                old1e = vga_rseq(cinfo->regbase, CL_SEQR1E) & ~0x1;
+                if (div == 2)
+                        old1e |= 1;
+
+                vga_wseq(cinfo->regbase, CL_SEQR1E, old1e);
         }
+        vga_wseq(cinfo->regbase, CL_SEQR1F, old1f);
 }
 
 /*************************************************************************
@@ -927,6 +723,10 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
         unsigned char tmp;
         int offset = 0, err;
         const struct cirrusfb_board_info_rec *bi;
+        int hdispend, hsyncstart, hsyncend, htotal;
+        int yres, vdispend, vsyncstart, vsyncend, vtotal;
+        long freq;
+        int nom, den, div;
 
         DPRINTK("ENTER\n");
         DPRINTK("Requested mode: %dx%dx%d\n",
@@ -944,76 +744,117 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
 
         bi = &cirrusfb_board_info[cinfo->btype];
 
+        hsyncstart = var->xres + var->right_margin;
+        hsyncend = hsyncstart + var->hsync_len;
+        htotal = (hsyncend + var->left_margin) / 8 - 5;
+        hdispend = var->xres / 8 - 1;
+        hsyncstart = hsyncstart / 8 + 1;
+        hsyncend = hsyncend / 8 + 1;
+
+        yres = var->yres;
+        vsyncstart = yres + var->lower_margin;
+        vsyncend = vsyncstart + var->vsync_len;
+        vtotal = vsyncend + var->upper_margin;
+        vdispend = yres - 1;
+
+        if (var->vmode & FB_VMODE_DOUBLE) {
+                yres *= 2;
+                vsyncstart *= 2;
+                vsyncend *= 2;
+                vtotal *= 2;
+        } else if (var->vmode & FB_VMODE_INTERLACED) {
+                yres = (yres + 1) / 2;
+                vsyncstart = (vsyncstart + 1) / 2;
+                vsyncend = (vsyncend + 1) / 2;
+                vtotal = (vtotal + 1) / 2;
+        }
+
+        vtotal -= 2;
+        vsyncstart -= 1;
+        vsyncend -= 1;
+
+        if (yres >= 1024) {
+                vtotal /= 2;
+                vsyncstart /= 2;
+                vsyncend /= 2;
+                vdispend /= 2;
+        }
+        if (regs.multiplexing) {
+                htotal /= 2;
+                hsyncstart /= 2;
+                hsyncend /= 2;
+                hdispend /= 2;
+        }
         /* unlock register VGA_CRTC_H_TOTAL..CRT7 */
         vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, 0x20);   /* previously: 0x00) */
 
         /* if debugging is enabled, all parameters get output before writing */
-        DPRINTK("CRT0: %ld\n", regs.HorizTotal);
-        vga_wcrt(regbase, VGA_CRTC_H_TOTAL, regs.HorizTotal);
+        DPRINTK("CRT0: %d\n", htotal);
+        vga_wcrt(regbase, VGA_CRTC_H_TOTAL, htotal);
 
-        DPRINTK("CRT1: %ld\n", regs.HorizDispEnd);
-        vga_wcrt(regbase, VGA_CRTC_H_DISP, regs.HorizDispEnd);
+        DPRINTK("CRT1: %d\n", hdispend);
+        vga_wcrt(regbase, VGA_CRTC_H_DISP, hdispend);
 
-        DPRINTK("CRT2: %ld\n", regs.HorizBlankStart);
-        vga_wcrt(regbase, VGA_CRTC_H_BLANK_START, regs.HorizBlankStart);
+        DPRINTK("CRT2: %d\n", var->xres / 8);
+        vga_wcrt(regbase, VGA_CRTC_H_BLANK_START, var->xres / 8);
 
         /*  + 128: Compatible read */
-        DPRINTK("CRT3: 128+%ld\n", regs.HorizBlankEnd % 32);
+        DPRINTK("CRT3: 128+%d\n", (htotal + 5) % 32);
         vga_wcrt(regbase, VGA_CRTC_H_BLANK_END,
-                 128 + (regs.HorizBlankEnd % 32));
+                 128 + ((htotal + 5) % 32));
 
-        DPRINTK("CRT4: %ld\n", regs.HorizSyncStart);
-        vga_wcrt(regbase, VGA_CRTC_H_SYNC_START, regs.HorizSyncStart);
+        DPRINTK("CRT4: %d\n", hsyncstart);
+        vga_wcrt(regbase, VGA_CRTC_H_SYNC_START, hsyncstart);
 
-        tmp = regs.HorizSyncEnd % 32;
-        if (regs.HorizBlankEnd & 32)
+        tmp = hsyncend % 32;
+        if ((htotal + 5) & 32)
                 tmp += 128;
         DPRINTK("CRT5: %d\n", tmp);
         vga_wcrt(regbase, VGA_CRTC_H_SYNC_END, tmp);
 
-        DPRINTK("CRT6: %ld\n", regs.VertTotal & 0xff);
-        vga_wcrt(regbase, VGA_CRTC_V_TOTAL, (regs.VertTotal & 0xff));
+        DPRINTK("CRT6: %d\n", vtotal & 0xff);
+        vga_wcrt(regbase, VGA_CRTC_V_TOTAL, vtotal & 0xff);
 
         tmp = 16;               /* LineCompare bit #9 */
-        if (regs.VertTotal & 256)
+        if (vtotal & 256)
                 tmp |= 1;
-        if (regs.VertDispEnd & 256)
+        if (vdispend & 256)
                 tmp |= 2;
-        if (regs.VertSyncStart & 256)
+        if (vsyncstart & 256)
                 tmp |= 4;
-        if (regs.VertBlankStart & 256)
+        if ((vdispend + 1) & 256)
                 tmp |= 8;
-        if (regs.VertTotal & 512)
+        if (vtotal & 512)
                 tmp |= 32;
-        if (regs.VertDispEnd & 512)
+        if (vdispend & 512)
                 tmp |= 64;
-        if (regs.VertSyncStart & 512)
+        if (vsyncstart & 512)
                 tmp |= 128;
         DPRINTK("CRT7: %d\n", tmp);
         vga_wcrt(regbase, VGA_CRTC_OVERFLOW, tmp);
 
         tmp = 0x40;             /* LineCompare bit #8 */
-        if (regs.VertBlankStart & 512)
+        if ((vdispend + 1) & 512)
                 tmp |= 0x20;
         if (var->vmode & FB_VMODE_DOUBLE)
                 tmp |= 0x80;
         DPRINTK("CRT9: %d\n", tmp);
         vga_wcrt(regbase, VGA_CRTC_MAX_SCAN, tmp);
 
-        DPRINTK("CRT10: %ld\n", regs.VertSyncStart & 0xff);
-        vga_wcrt(regbase, VGA_CRTC_V_SYNC_START, regs.VertSyncStart & 0xff);
+        DPRINTK("CRT10: %d\n", vsyncstart & 0xff);
+        vga_wcrt(regbase, VGA_CRTC_V_SYNC_START, vsyncstart & 0xff);
 
-        DPRINTK("CRT11: 64+32+%ld\n", regs.VertSyncEnd % 16);
-        vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, regs.VertSyncEnd % 16 + 64 + 32);
+        DPRINTK("CRT11: 64+32+%d\n", vsyncend % 16);
+        vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, vsyncend % 16 + 64 + 32);
 
-        DPRINTK("CRT12: %ld\n", regs.VertDispEnd & 0xff);
-        vga_wcrt(regbase, VGA_CRTC_V_DISP_END, regs.VertDispEnd & 0xff);
+        DPRINTK("CRT12: %d\n", vdispend & 0xff);
+        vga_wcrt(regbase, VGA_CRTC_V_DISP_END, vdispend & 0xff);
 
-        DPRINTK("CRT15: %ld\n", regs.VertBlankStart & 0xff);
-        vga_wcrt(regbase, VGA_CRTC_V_BLANK_START, regs.VertBlankStart & 0xff);
+        DPRINTK("CRT15: %d\n", (vdispend + 1) & 0xff);
+        vga_wcrt(regbase, VGA_CRTC_V_BLANK_START, (vdispend + 1) & 0xff);
 
-        DPRINTK("CRT16: %ld\n", regs.VertBlankEnd & 0xff);
-        vga_wcrt(regbase, VGA_CRTC_V_BLANK_END, regs.VertBlankEnd & 0xff);
+        DPRINTK("CRT16: %d\n", vtotal & 0xff);
+        vga_wcrt(regbase, VGA_CRTC_V_BLANK_END, vtotal & 0xff);
 
         DPRINTK("CRT18: 0xff\n");
         vga_wcrt(regbase, VGA_CRTC_LINE_COMPARE, 0xff);
@@ -1021,38 +862,53 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
         tmp = 0;
         if (var->vmode & FB_VMODE_INTERLACED)
                 tmp |= 1;
-        if (regs.HorizBlankEnd & 64)
+        if ((htotal + 5) & 64)
                 tmp |= 16;
-        if (regs.HorizBlankEnd & 128)
+        if ((htotal + 5) & 128)
                 tmp |= 32;
-        if (regs.VertBlankEnd & 256)
+        if (vtotal & 256)
                 tmp |= 64;
-        if (regs.VertBlankEnd & 512)
+        if (vtotal & 512)
                 tmp |= 128;
 
         DPRINTK("CRT1a: %d\n", tmp);
         vga_wcrt(regbase, CL_CRT1A, tmp);
 
+        freq = PICOS2KHZ(var->pixclock);
+        bestclock(freq, &nom, &den, &div);
+
         /* set VCLK0 */
         /* hardware RefClock: 14.31818 MHz */
         /* formula: VClk = (OSC * N) / (D * (1+P)) */
         /* Example: VClk = (14.31818 * 91) / (23 * (1+1)) = 28.325 MHz */
 
-        vga_wseq(regbase, CL_SEQRB, regs.nom);
-        tmp = regs.den << 1;
-        if (regs.div != 0)
-                tmp |= 1;
+        if (cinfo->btype == BT_ALPINE) {
+                /* if freq is close to mclk or mclk/2 select mclk
+                 * as clock source
+                 */
+                int divMCLK = cirrusfb_check_mclk(cinfo, freq);
+                if (divMCLK)  {
+                        nom = 0;
+                        cirrusfb_set_mclk_as_source(cinfo, divMCLK);
+                }
+        }
+        if (nom) {
+                vga_wseq(regbase, CL_SEQRB, nom);
+                tmp = den << 1;
+                if (div != 0)
+                        tmp |= 1;
 
-        /* 6 bit denom; ONLY 5434!!! (bugged me 10 days) */
-        if ((cinfo->btype == BT_SD64) ||
-            (cinfo->btype == BT_ALPINE) ||
-            (cinfo->btype == BT_GD5480))
-                tmp |= 0x80;
+                /* 6 bit denom; ONLY 5434!!! (bugged me 10 days) */
+                if ((cinfo->btype == BT_SD64) ||
+                    (cinfo->btype == BT_ALPINE) ||
+                    (cinfo->btype == BT_GD5480))
+                        tmp |= 0x80;
 
-        DPRINTK("CL_SEQR1B: %ld\n", (long) tmp);
-        vga_wseq(regbase, CL_SEQR1B, tmp);
+                DPRINTK("CL_SEQR1B: %ld\n", (long) tmp);
+                vga_wseq(regbase, CL_SEQR1B, tmp);
+        }
 
-        if (regs.VertRes >= 1024)
+        if (yres >= 1024)
                 /* 1280x1024 */
                 vga_wcrt(regbase, VGA_CRTC_MODE, 0xc7);
         else
@@ -1066,7 +922,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
         /* don't know if it would hurt to also program this if no interlaced */
         /* mode is used, but I feel better this way.. :-) */
         if (var->vmode & FB_VMODE_INTERLACED)
-                vga_wcrt(regbase, VGA_CRTC_REGS, regs.HorizTotal / 2);
+                vga_wcrt(regbase, VGA_CRTC_REGS, htotal / 2);
         else
                 vga_wcrt(regbase, VGA_CRTC_REGS, 0x00); /* interlace control */
 
@@ -1240,7 +1096,6 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
 
                 case BT_ALPINE:
                         DPRINTK(" (for GD543x)\n");
-                        cirrusfb_set_mclk(cinfo, regs.mclk, regs.divMCLK);
                         /* We already set SRF and SR1F */
                         break;
 
@@ -1312,11 +1167,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
 
                 case BT_ALPINE:
                         DPRINTK(" (for GD543x)\n");
-                        if (regs.HorizRes >= 1024)
-                                vga_wseq(regbase, CL_SEQR7, 0xa7);
-                        else
-                                vga_wseq(regbase, CL_SEQR7, 0xa3);
-                        cirrusfb_set_mclk(cinfo, regs.mclk, regs.divMCLK);
+                        vga_wseq(regbase, CL_SEQR7, 0xa7);
                         break;
 
                 case BT_GD5480:
@@ -1360,7 +1211,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
          */
 
         else if (var->bits_per_pixel == 32) {
-                DPRINTK("cirrusfb: preparing for 24/32 bit deep display\n");
+                DPRINTK("cirrusfb: preparing for 32 bit deep display\n");
                 switch (cinfo->btype) {
                 case BT_SD64:
                         /* Extended Sequencer Mode: 256c col. mode */
@@ -1394,7 +1245,6 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
                 case BT_ALPINE:
                         DPRINTK(" (for GD543x)\n");
                         vga_wseq(regbase, CL_SEQR7, 0xa9);
-                        cirrusfb_set_mclk(cinfo, regs.mclk, regs.divMCLK);
                         break;
 
                 case BT_GD5480:
@@ -1949,8 +1799,6 @@ static void init_vgachip(struct fb_info *info)
         /* misc... */
         WHDR(cinfo, 0); /* Hidden DAC register: - */
 
-        printk(KERN_DEBUG "cirrusfb: This board has %ld bytes of DRAM memory\n",
-                info->screen_size);
         DPRINTK("EXIT\n");
         return;
 }
@@ -2122,7 +1970,7 @@ static int release_io_ports;
  * based on the DRAM bandwidth bit and DRAM bank switching bit.  This
  * works with 1MB, 2MB and 4MB configurations (which the Motorola boards
  * seem to have. */
-static unsigned int cirrusfb_get_memsize(u8 __iomem *regbase)
+static unsigned int __devinit cirrusfb_get_memsize(u8 __iomem *regbase)
 {
         unsigned long mem;
         unsigned char SRF;
@@ -2188,8 +2036,7 @@ static void get_pci_addrs(const struct pci_dev *pdev,
 
 static void cirrusfb_pci_unmap(struct fb_info *info)
 {
-        struct cirrusfb_info *cinfo = info->par;
-        struct pci_dev *pdev = cinfo->pdev;
+        struct pci_dev *pdev = to_pci_dev(info->device);
 
         iounmap(info->screen_base);
 #if 0 /* if system didn't claim this region, we would... */
@@ -2205,20 +2052,22 @@ static void cirrusfb_pci_unmap(struct fb_info *info)
 static void __devexit cirrusfb_zorro_unmap(struct fb_info *info)
 {
         struct cirrusfb_info *cinfo = info->par;
-        zorro_release_device(cinfo->zdev);
+        struct zorro_dev *zdev = to_zorro_dev(info->device);
+
+        zorro_release_device(zdev);
 
         if (cinfo->btype == BT_PICASSO4) {
                 cinfo->regbase -= 0x600000;
                 iounmap((void *)cinfo->regbase);
                 iounmap(info->screen_base);
         } else {
-                if (zorro_resource_start(cinfo->zdev) > 0x01000000)
+                if (zorro_resource_start(zdev) > 0x01000000)
                         iounmap(info->screen_base);
         }
 }
 #endif /* CONFIG_ZORRO */
 
-static int cirrusfb_set_fbinfo(struct fb_info *info)
+static int __devinit cirrusfb_set_fbinfo(struct fb_info *info)
 {
         struct cirrusfb_info *cinfo = info->par;
         struct fb_var_screeninfo *var = &info->var;
@@ -2235,7 +2084,7 @@ static int cirrusfb_set_fbinfo(struct fb_info *info)
         if (cinfo->btype == BT_GD5480) {
                 if (var->bits_per_pixel == 16)
                         info->screen_base += 1 * MB_;
-                if (var->bits_per_pixel == 24 || var->bits_per_pixel == 32)
+                if (var->bits_per_pixel == 32)
                         info->screen_base += 2 * MB_;
         }
 
@@ -2262,7 +2111,7 @@ static int cirrusfb_set_fbinfo(struct fb_info *info)
         return 0;
 }
 
-static int cirrusfb_register(struct fb_info *info)
+static int __devinit cirrusfb_register(struct fb_info *info)
 {
         struct cirrusfb_info *cinfo = info->par;
         int err;
@@ -2278,23 +2127,27 @@ static int cirrusfb_register(struct fb_info *info)
         /* sanity checks */
         assert(btype != BT_NONE);
 
+        /* set all the vital stuff */
+        cirrusfb_set_fbinfo(info);
+
         DPRINTK("cirrusfb: (RAM start set to: 0x%p)\n", info->screen_base);
 
-        /* Make pretend we've set the var so our structures are in a "good" */
-        /* state, even though we haven't written the mode to the hw yet...  */
-        info->var = cirrusfb_predefined[cirrusfb_def_mode].var;
+        err = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, 8);
+        if (!err) {
+                DPRINTK("wrong initial video mode\n");
+                err = -EINVAL;
+                goto err_dealloc_cmap;
+        }
+
         info->var.activate = FB_ACTIVATE_NOW;
 
         err = cirrusfb_decode_var(&info->var, &cinfo->currentmode, info);
         if (err < 0) {
                 /* should never happen */
                 DPRINTK("choking on default var... umm, no good.\n");
-                goto err_unmap_cirrusfb;
+                goto err_dealloc_cmap;
         }
 
-        /* set all the vital stuff */
-        cirrusfb_set_fbinfo(info);
-
         err = register_framebuffer(info);
         if (err < 0) {
                 printk(KERN_ERR "cirrusfb: could not register "
@@ -2307,7 +2160,6 @@ static int cirrusfb_register(struct fb_info *info)
 
 err_dealloc_cmap:
         fb_dealloc_cmap(&info->cmap);
-err_unmap_cirrusfb:
         cinfo->unmap(info);
         framebuffer_release(info);
         return err;
@@ -2330,8 +2182,8 @@ static void __devexit cirrusfb_cleanup(struct fb_info *info)
 }
 
 #ifdef CONFIG_PCI
-static int cirrusfb_pci_register(struct pci_dev *pdev,
-                                  const struct pci_device_id *ent)
+static int __devinit cirrusfb_pci_register(struct pci_dev *pdev,
+                                           const struct pci_device_id *ent)
 {
         struct cirrusfb_info *cinfo;
         struct fb_info *info;
@@ -2353,7 +2205,6 @@ static int cirrusfb_pci_register(struct pci_dev *pdev,
         }
 
         cinfo = info->par;
-        cinfo->pdev = pdev;
         cinfo->btype = btype = (enum cirrus_board) ent->driver_data;
 
         DPRINTK(" Found PCI device, base address 0 is 0x%x, btype set to %d\n",
@@ -2459,8 +2310,8 @@ static struct pci_driver cirrusfb_pci_driver = {
 #endif /* CONFIG_PCI */
 
 #ifdef CONFIG_ZORRO
-static int cirrusfb_zorro_register(struct zorro_dev *z,
-                                   const struct zorro_device_id *ent)
+static int __devinit cirrusfb_zorro_register(struct zorro_dev *z,
+                                             const struct zorro_device_id *ent)
 {
         struct cirrusfb_info *cinfo;
         struct fb_info *info;
@@ -2489,7 +2340,6 @@ static int cirrusfb_zorro_register(struct zorro_dev *z,
         assert(z);
         assert(btype != BT_NONE);
 
-        cinfo->zdev = z;
         board_addr = zorro_resource_start(z);
         board_size = zorro_resource_len(z);
         info->screen_size = size;
@@ -2621,17 +2471,17 @@ static int __init cirrusfb_setup(char *options) {
                 return 0;
 
         while ((this_opt = strsep(&options, ",")) != NULL) {
-                if (!*this_opt) continue;
+                if (!*this_opt)
+                        continue;
 
                 DPRINTK("cirrusfb_setup: option '%s'\n", this_opt);
 
-                for (i = 0; i < NUM_TOTAL_MODES; i++) {
-                        sprintf(s, "mode:%s", cirrusfb_predefined[i].name);
-                        if (strcmp(this_opt, s) == 0)
-                                cirrusfb_def_mode = i;
-                }
                 if (!strcmp(this_opt, "noaccel"))
                         noaccel = 1;
+                else if (!strncmp(this_opt, "mode:", 5))
+                        mode_option = this_opt + 5;
+                else
+                        mode_option = this_opt;
         }
         return 0;
 }
@@ -2657,6 +2507,11 @@ static void __exit cirrusfb_exit(void)
 
 module_init(cirrusfb_init);
 
+module_param(mode_option, charp, 0);
+MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");
+module_param(noaccel, bool, 0);
+MODULE_PARM_DESC(noaccel, "Disable acceleration");
+
 #ifdef MODULE
 module_exit(cirrusfb_exit);
 #endif
@@ -3050,16 +2905,14 @@ static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel,
  * bestclock() - determine closest possible clock lower(?) than the
  * desired pixel clock
  **************************************************************************/
-static void bestclock(long freq, long *best, long *nom,
-                       long *den, long *div, long maxfreq)
+static void bestclock(long freq, int *nom, int *den, int *div)
 {
-        long n, h, d, f;
+        int n, d;
+        long h, diff;
 
-        assert(best != NULL);
         assert(nom != NULL);
         assert(den != NULL);
         assert(div != NULL);
-        assert(maxfreq > 0);
 
         *nom = 0;
         *den = 0;
@@ -3070,51 +2923,47 @@ static void bestclock(long freq, long *best, long *nom,
         if (freq < 8000)
                 freq = 8000;
 
-        if (freq > maxfreq)
-                freq = maxfreq;
-
-        *best = 0;
-        f = freq * 10;
+        diff = freq;
 
         for (n = 32; n < 128; n++) {
-                d = (143181 * n) / f;
+                int s = 0;
+
+                d = (14318 * n) / freq;
                 if ((d >= 7) && (d <= 63)) {
-                        if (d > 31)
-                                d = (d / 2) * 2;
-                        h = (14318 * n) / d;
-                        if (abs(h - freq) < abs(*best - freq)) {
-                                *best = h;
+                        int temp = d;
+
+                        if (temp > 31) {
+                                s = 1;
+                                temp >>= 1;
+                        }
+                        h = ((14318 * n) / temp) >> s;
+                        h = h > freq ? h - freq : freq - h;
+                        if (h < diff) {
+                                diff = h;
                                 *nom = n;
-                                if (d < 32) {
-                                        *den = d;
-                                        *div = 0;
-                                } else {
-                                        *den = d / 2;
-                                        *div = 1;
-                                }
+                                *den = temp;
+                                *div = s;
                         }
                 }
-                d = DIV_ROUND_UP(143181 * n, f);
+                d++;
                 if ((d >= 7) && (d <= 63)) {
-                        if (d > 31)
-                                d = (d / 2) * 2;
-                        h = (14318 * n) / d;
-                        if (abs(h - freq) < abs(*best - freq)) {
-                                *best = h;
+                        if (d > 31) {
+                                s = 1;
+                                d >>= 1;
+                        }
+                        h = ((14318 * n) / d) >> s;
+                        h = h > freq ? h - freq : freq - h;
+                        if (h < diff) {
+                                diff = h;
                                 *nom = n;
-                                if (d < 32) {
-                                        *den = d;
-                                        *div = 0;
-                                } else {
-                                        *den = d / 2;
-                                        *div = 1;
-                                }
+                                *den = d;
+                                *div = s;
                         }
                 }
         }
 
         DPRINTK("Best possible values for given frequency:\n");
-        DPRINTK("       best: %ld kHz  nom: %ld  den: %ld  div: %ld\n",
+        DPRINTK("       freq: %ld kHz  nom: %d  den: %d  div: %d\n",
                 freq, *nom, *den, *div);
 
         DPRINTK("EXIT\n");
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c
index 0e0ea4215a30..64b3d30027b8 100644
--- a/drivers/video/console/fbcon.c
+++ b/drivers/video/console/fbcon.c
@@ -2977,8 +2977,8 @@ static void fbcon_set_all_vcs(struct fb_info *info)
                 p = &fb_display[vc->vc_num];
                 set_blitting_type(vc, info);
                 var_to_display(p, &info->var, info);
-                cols = FBCON_SWAP(p->rotate, info->var.xres, info->var.yres);
-                rows = FBCON_SWAP(p->rotate, info->var.yres, info->var.xres);
+                cols = FBCON_SWAP(ops->rotate, info->var.xres, info->var.yres);
+                rows = FBCON_SWAP(ops->rotate, info->var.yres, info->var.xres);
                 cols /= vc->vc_font.width;
                 rows /= vc->vc_font.height;
                 vc_resize(vc, cols, rows);
diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c
index 6df29a62d720..448d209a0bf2 100644
--- a/drivers/video/console/vgacon.c
+++ b/drivers/video/console/vgacon.c
@@ -239,8 +239,7 @@ static void vgacon_restore_screen(struct vc_data *c)
 
 static int vgacon_scrolldelta(struct vc_data *c, int lines)
 {
-        int start, end, count, soff, diff;
-        void *d, *s;
+        int start, end, count, soff;
 
         if (!lines) {
                 c->vc_visible_origin = c->vc_origin;
@@ -287,29 +286,29 @@ static int vgacon_scrolldelta(struct vc_data *c, int lines)
         if (count > c->vc_rows)
                 count = c->vc_rows;
 
-        diff = c->vc_rows - count;
+        if (count) {
+                int copysize;
 
-        d = (void *) c->vc_origin;
-        s = (void *) c->vc_screenbuf;
+                int diff = c->vc_rows - count;
+                void *d = (void *) c->vc_origin;
+                void *s = (void *) c->vc_screenbuf;
 
-        while (count--) {
-                scr_memcpyw(d, vgacon_scrollback + soff, c->vc_size_row);
-                d += c->vc_size_row;
-                soff += c->vc_size_row;
+                count *= c->vc_size_row;
+                /* how much memory to end of buffer left? */
+                copysize = min(count, vgacon_scrollback_size - soff);
+                scr_memcpyw(d, vgacon_scrollback + soff, copysize);
+                d += copysize;
+                count -= copysize;
 
-                if (soff >= vgacon_scrollback_size)
-                        soff = 0;
-        }
+                if (count) {
+                        scr_memcpyw(d, vgacon_scrollback, count);
+                        d += count;
+                }
 
-        if (diff == c->vc_rows) {
+                if (diff)
+                        scr_memcpyw(d, s, diff * c->vc_size_row);
+        } else
                 vgacon_cursor(c, CM_MOVE);
-        } else {
-                while (diff--) {
-                        scr_memcpyw(d, s, c->vc_size_row);
-                        d += c->vc_size_row;
-                        s += c->vc_size_row;
-                }
-        }
 
         return 1;
 }
diff --git a/drivers/video/efifb.c b/drivers/video/efifb.c
index bd779ae44b1e..daf9b81878a4 100644
--- a/drivers/video/efifb.c
+++ b/drivers/video/efifb.c
@@ -12,6 +12,7 @@
 #include <linux/fb.h>
 #include <linux/platform_device.h>
 #include <linux/screen_info.h>
+#include <linux/dmi.h>
 
 #include <video/vga.h>
 
@@ -33,6 +34,105 @@ static struct fb_fix_screeninfo efifb_fix __initdata = {
         .visual                 = FB_VISUAL_TRUECOLOR,
 };
 
+enum {
+        M_I17,          /* 17-Inch iMac */
+        M_I20,          /* 20-Inch iMac */
+        M_I20_SR,       /* 20-Inch iMac (Santa Rosa) */
+        M_I24,          /* 24-Inch iMac */
+        M_MINI,         /* Mac Mini */
+        M_MB,           /* MacBook */
+        M_MB_2,         /* MacBook, 2nd rev. */
+        M_MB_3,         /* MacBook, 3rd rev. */
+        M_MB_SR,        /* MacBook, 2nd gen, (Santa Rosa) */
+        M_MBA,          /* MacBook Air */
+        M_MBP,          /* MacBook Pro */
+        M_MBP_2,        /* MacBook Pro 2nd gen */
+        M_MBP_SR,       /* MacBook Pro (Santa Rosa) */
+        M_MBP_4,        /* MacBook Pro, 4th gen */
+        M_UNKNOWN       /* placeholder */
+};
+
+static struct efifb_dmi_info {
+        char *optname;
+        unsigned long base;
+        int stride;
+        int width;
+        int height;
+} dmi_list[] = {
+        [M_I17] = { "i17", 0x80010000, 1472 * 4, 1440, 900 },
+        [M_I20] = { "i20", 0x80010000, 1728 * 4, 1680, 1050 }, /* guess */
+        [M_I20_SR] = { "imac7", 0x40010000, 1728 * 4, 1680, 1050 },
+        [M_I24] = { "i24", 0x80010000, 2048 * 4, 1920, 1200 }, /* guess */
+        [M_MINI]= { "mini", 0x80000000, 2048 * 4, 1024, 768 },
+        [M_MB] = { "macbook", 0x80000000, 2048 * 4, 1280, 800 },
+        [M_MBA] = { "mba", 0x80000000, 2048 * 4, 1280, 800 },
+        [M_MBP] = { "mbp", 0x80010000, 1472 * 4, 1440, 900 },
+        [M_MBP_2] = { "mbp2", 0, 0, 0, 0 }, /* placeholder */
+        [M_MBP_SR] = { "mbp3", 0x80030000, 2048 * 4, 1440, 900 },
+        [M_MBP_4] = { "mbp4", 0xc0060000, 2048 * 4, 1920, 1200 },
+        [M_UNKNOWN] = { NULL, 0, 0, 0, 0 }
+};
+
+static int set_system(const struct dmi_system_id *id);
+
+#define EFIFB_DMI_SYSTEM_ID(vendor, name, enumid)               \
+        { set_system, name, {                                   \
+                DMI_MATCH(DMI_BIOS_VENDOR, vendor),             \
+                DMI_MATCH(DMI_PRODUCT_NAME, name) },            \
+          &dmi_list[enumid] }
+
+static struct dmi_system_id __initdata dmi_system_table[] = {
+        EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "iMac4,1", M_I17),
+        /* At least one of these two will be right; maybe both? */
+        EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "iMac5,1", M_I20),
+        EFIFB_DMI_SYSTEM_ID("Apple Inc.", "iMac5,1", M_I20),
+        /* At least one of these two will be right; maybe both? */
+        EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "iMac6,1", M_I24),
+        EFIFB_DMI_SYSTEM_ID("Apple Inc.", "iMac6,1", M_I24),
+        EFIFB_DMI_SYSTEM_ID("Apple Inc.", "iMac7,1", M_I20_SR),
+        EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "Macmini1,1", M_MINI),
+        EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBook1,1", M_MB),
+        /* At least one of these two will be right; maybe both? */
+        EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBook2,1", M_MB),
+        EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBook2,1", M_MB),
+        /* At least one of these two will be right; maybe both? */
+        EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBook3,1", M_MB),
+        EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBook3,1", M_MB),
+        EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBook4,1", M_MB),
+        EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookAir1,1", M_MBA),
+        EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBookPro1,1", M_MBP),
+        EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBookPro2,1", M_MBP_2),
+        EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro2,1", M_MBP_2),
+        EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBookPro3,1", M_MBP_SR),
+        EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro3,1", M_MBP_SR),
+        EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro4,1", M_MBP_4),
+        {},
+};
+
+static int set_system(const struct dmi_system_id *id)
+{
+        struct efifb_dmi_info *info = id->driver_data;
+        if (info->base == 0)
+                return -ENODEV;
+
+        printk(KERN_INFO "efifb: dmi detected %s - framebuffer at %p "
+                         "(%dx%d, stride %d)\n", id->ident,
+                         (void *)info->base, info->width, info->height,
+                         info->stride);
+
+        /* Trust the bootloader over the DMI tables */
+        if (screen_info.lfb_base == 0)
+                screen_info.lfb_base = info->base;
+        if (screen_info.lfb_linelength == 0)
+                screen_info.lfb_linelength = info->stride;
+        if (screen_info.lfb_width == 0)
+                screen_info.lfb_width = info->width;
+        if (screen_info.lfb_height == 0)
+                screen_info.lfb_height = info->height;
+
+        return 0;
+}
+
 static int efifb_setcolreg(unsigned regno, unsigned red, unsigned green,
                            unsigned blue, unsigned transp,
                            struct fb_info *info)
@@ -67,6 +167,38 @@ static struct fb_ops efifb_ops = {
         .fb_imageblit   = cfb_imageblit,
 };
 
+static int __init efifb_setup(char *options)
+{
+        char *this_opt;
+        int i;
+
+        if (!options || !*options)
+                return 0;
+
+        while ((this_opt = strsep(&options, ",")) != NULL) {
+                if (!*this_opt) continue;
+
+                for (i = 0; i < M_UNKNOWN; i++) {
+                        if (!strcmp(this_opt, dmi_list[i].optname) &&
+                                        dmi_list[i].base != 0) {
+                                screen_info.lfb_base = dmi_list[i].base;
+                                screen_info.lfb_linelength = dmi_list[i].stride;
+                                screen_info.lfb_width = dmi_list[i].width;
+                                screen_info.lfb_height = dmi_list[i].height;
+                        }
+                }
+                if (!strncmp(this_opt, "base:", 5))
+                        screen_info.lfb_base = simple_strtoul(this_opt+5, NULL, 0);
+                else if (!strncmp(this_opt, "stride:", 7))
+                        screen_info.lfb_linelength = simple_strtoul(this_opt+7, NULL, 0) * 4;
+                else if (!strncmp(this_opt, "height:", 7))
+                        screen_info.lfb_height = simple_strtoul(this_opt+7, NULL, 0);
+                else if (!strncmp(this_opt, "width:", 6))
+                        screen_info.lfb_width = simple_strtoul(this_opt+6, NULL, 0);
+        }
+        return 0;
+}
+
 static int __init efifb_probe(struct platform_device *dev)
 {
         struct fb_info *info;
@@ -74,6 +206,26 @@ static int __init efifb_probe(struct platform_device *dev)
         unsigned int size_vmode;
         unsigned int size_remap;
         unsigned int size_total;
+        int request_succeeded = 0;
+
+        printk(KERN_INFO "efifb: probing for efifb\n");
+
+        if (!screen_info.lfb_depth)
+                screen_info.lfb_depth = 32;
+        if (!screen_info.pages)
+                screen_info.pages = 1;
+
+        /* just assume they're all unset if any are */
+        if (!screen_info.blue_size) {
+                screen_info.blue_size = 8;
+                screen_info.blue_pos = 0;
+                screen_info.green_size = 8;
+                screen_info.green_pos = 8;
+                screen_info.red_size = 8;
+                screen_info.red_pos = 16;
+                screen_info.rsvd_size = 8;
+                screen_info.rsvd_pos = 24;
+        }
 
         efifb_fix.smem_start = screen_info.lfb_base;
         efifb_defined.bits_per_pixel = screen_info.lfb_depth;
@@ -98,21 +250,25 @@ static int __init efifb_probe(struct platform_device *dev)
          *                 option to simply use size_total as that
          *                 wastes plenty of kernel address space. */
         size_remap  = size_vmode * 2;
-        if (size_remap < size_vmode)
-                size_remap = size_vmode;
         if (size_remap > size_total)
                 size_remap = size_total;
+        if (size_remap % PAGE_SIZE)
+                size_remap += PAGE_SIZE - (size_remap % PAGE_SIZE);
         efifb_fix.smem_len = size_remap;
 
-        if (!request_mem_region(efifb_fix.smem_start, size_total, "efifb"))
+        if (request_mem_region(efifb_fix.smem_start, size_remap, "efifb")) {
+                request_succeeded = 1;
+        } else {
                 /* We cannot make this fatal. Sometimes this comes from magic
                    spaces our resource handlers simply don't know about */
                 printk(KERN_WARNING
                        "efifb: cannot reserve video memory at 0x%lx\n",
                         efifb_fix.smem_start);
+        }
 
         info = framebuffer_alloc(sizeof(u32) * 16, &dev->dev);
         if (!info) {
+                printk(KERN_ERR "efifb: cannot allocate framebuffer\n");
                 err = -ENOMEM;
                 goto err_release_mem;
         }
@@ -125,7 +281,7 @@ static int __init efifb_probe(struct platform_device *dev)
                                 "0x%x @ 0x%lx\n",
                         efifb_fix.smem_len, efifb_fix.smem_start);
                 err = -EIO;
-                goto err_unmap;
+                goto err_release_fb;
         }
 
         printk(KERN_INFO "efifb: framebuffer at 0x%lx, mapped to 0x%p, "
@@ -178,25 +334,27 @@ static int __init efifb_probe(struct platform_device *dev)
         info->fix = efifb_fix;
         info->flags = FBINFO_FLAG_DEFAULT;
 
-        if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
-                err = -ENOMEM;
+        if ((err = fb_alloc_cmap(&info->cmap, 256, 0)) < 0) {
+                printk(KERN_ERR "efifb: cannot allocate colormap\n");
                 goto err_unmap;
         }
-        if (register_framebuffer(info) < 0) {
-                err = -EINVAL;
+        if ((err = register_framebuffer(info)) < 0) {
+                printk(KERN_ERR "efifb: cannot register framebuffer\n");
                 goto err_fb_dealoc;
         }
         printk(KERN_INFO "fb%d: %s frame buffer device\n",
-               info->node, info->fix.id);
+                info->node, info->fix.id);
         return 0;
 
 err_fb_dealoc:
         fb_dealloc_cmap(&info->cmap);
 err_unmap:
         iounmap(info->screen_base);
+err_release_fb:
         framebuffer_release(info);
 err_release_mem:
-        release_mem_region(efifb_fix.smem_start, size_total);
+        if (request_succeeded)
+                release_mem_region(efifb_fix.smem_start, size_total);
         return err;
 }
 
@@ -214,9 +372,22 @@ static struct platform_device efifb_device = {
 static int __init efifb_init(void)
 {
         int ret;
+        char *option = NULL;
 
         if (screen_info.orig_video_isVGA != VIDEO_TYPE_EFI)
                 return -ENODEV;
+        dmi_check_system(dmi_system_table);
+
+        if (fb_get_options("efifb", &option))
+                return -ENODEV;
+        efifb_setup(option);
+
+        /* We don't get linelength from UGA Draw Protocol, only from
+         * EFI Graphics Protocol.  So if it's not in DMI, and it's not
+         * passed in from the user, we really can't use the framebuffer.
+         */
+        if (!screen_info.lfb_linelength)
+                return -ENODEV;
 
         ret = platform_driver_register(&efifb_driver);
 
diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c
index 61b36ca06997..217c5118ae9e 100644
--- a/drivers/video/fbmem.c
+++ b/drivers/video/fbmem.c
@@ -28,9 +28,7 @@
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
 #include <linux/console.h>
-#ifdef CONFIG_KMOD
 #include <linux/kmod.h>
-#endif
 #include <linux/err.h>
 #include <linux/device.h>
 #include <linux/efi.h>
@@ -837,13 +835,6 @@ fb_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
         return (cnt) ? cnt : err;
 }
 
-#ifdef CONFIG_KMOD
-static void try_to_load(int fb)
-{
-        request_module("fb%d", fb);
-}
-#endif /* CONFIG_KMOD */
-
 int
 fb_pan_display(struct fb_info *info, struct fb_var_screeninfo *var)
 {
@@ -1086,10 +1077,8 @@ fb_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
                     return -EINVAL;
                 if (con2fb.framebuffer < 0 || con2fb.framebuffer >= FB_MAX)
                     return -EINVAL;
-#ifdef CONFIG_KMOD
                 if (!registered_fb[con2fb.framebuffer])
-                    try_to_load(con2fb.framebuffer);
-#endif /* CONFIG_KMOD */
+                    request_module("fb%d", con2fb.framebuffer);
                 if (!registered_fb[con2fb.framebuffer])
                     return -EINVAL;
                 event.info = info;
@@ -1327,10 +1316,8 @@ fb_open(struct inode *inode, struct file *file)
         if (fbidx >= FB_MAX)
                 return -ENODEV;
         lock_kernel();
-#ifdef CONFIG_KMOD
         if (!(info = registered_fb[fbidx]))
-                try_to_load(fbidx);
-#endif /* CONFIG_KMOD */
+                request_module("fb%d", fbidx);
         if (!(info = registered_fb[fbidx])) {
                 res = -ENODEV;
                 goto out;
diff --git a/drivers/video/fbmon.c b/drivers/video/fbmon.c
index 6a0aa180c266..5c1a2c01778f 100644
--- a/drivers/video/fbmon.c
+++ b/drivers/video/fbmon.c
@@ -564,7 +564,13 @@ static void get_detailed_timing(unsigned char *block,
                 mode->sync |= FB_SYNC_VERT_HIGH_ACT;
         mode->refresh = PIXEL_CLOCK/((H_ACTIVE + H_BLANKING) *
                                      (V_ACTIVE + V_BLANKING));
-        mode->vmode = 0;
+        if (INTERLACED) {
+                mode->yres *= 2;
+                mode->upper_margin *= 2;
+                mode->lower_margin *= 2;
+                mode->vsync_len *= 2;
+                mode->vmode |= FB_VMODE_INTERLACED;
+        }
         mode->flag = FB_MODE_IS_DETAILED;
 
         DPRINTK("      %d MHz ",  PIXEL_CLOCK/1000000);
diff --git a/drivers/video/imacfb.c b/drivers/video/imacfb.c
index 9366ef2bb5f7..e69de29bb2d1 100644
--- a/drivers/video/imacfb.c
+++ b/drivers/video/imacfb.c
@@ -1,376 +0,0 @@
-/*
- * framebuffer driver for Intel Based Mac's
- *
- * (c) 2006 Edgar Hucek <gimli@dark-green.com>
- * Original imac driver written by Gerd Knorr <kraxel@goldbach.in-berlin.de>
- *
- */
-
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/fb.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/screen_info.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/dmi.h>
-#include <linux/efi.h>
-
-#include <asm/io.h>
-
-#include <video/vga.h>
-
-typedef enum _MAC_TYPE {
-        M_I17,
-        M_I20,
-        M_MINI,
-        M_MACBOOK,
-        M_UNKNOWN
-} MAC_TYPE;
-
-/* --------------------------------------------------------------------- */
-
-static struct fb_var_screeninfo imacfb_defined __initdata = {
-        .activate               = FB_ACTIVATE_NOW,
-        .height                 = -1,
-        .width                  = -1,
-        .right_margin           = 32,
-        .upper_margin           = 16,
-        .lower_margin           = 4,
-        .vsync_len              = 4,
-        .vmode                  = FB_VMODE_NONINTERLACED,
-};
-
-static struct fb_fix_screeninfo imacfb_fix __initdata = {
-        .id                     = "IMAC VGA",
-        .type                   = FB_TYPE_PACKED_PIXELS,
-        .accel                  = FB_ACCEL_NONE,
-        .visual                 = FB_VISUAL_TRUECOLOR,
-};
-
-static int inverse;
-static int model                = M_UNKNOWN;
-static int manual_height;
-static int manual_width;
-
-static int set_system(const struct dmi_system_id *id)
-{
-        printk(KERN_INFO "imacfb: %s detected - set system to %ld\n",
-                id->ident, (long)id->driver_data);
-
-        model = (long)id->driver_data;
-
-        return 0;
-}
-
-static struct dmi_system_id __initdata dmi_system_table[] = {
-        { set_system, "iMac4,1", {
-          DMI_MATCH(DMI_BIOS_VENDOR,"Apple Computer, Inc."),
-          DMI_MATCH(DMI_PRODUCT_NAME,"iMac4,1") }, (void*)M_I17},
-        { set_system, "MacBookPro1,1", {
-          DMI_MATCH(DMI_BIOS_VENDOR,"Apple Computer, Inc."),
-          DMI_MATCH(DMI_PRODUCT_NAME,"MacBookPro1,1") }, (void*)M_I17},
-        { set_system, "MacBook1,1", {
-          DMI_MATCH(DMI_BIOS_VENDOR,"Apple Computer, Inc."),
-          DMI_MATCH(DMI_PRODUCT_NAME,"MacBook1,1")}, (void *)M_MACBOOK},
-        { set_system, "Macmini1,1", {
-          DMI_MATCH(DMI_BIOS_VENDOR,"Apple Computer, Inc."),
-          DMI_MATCH(DMI_PRODUCT_NAME,"Macmini1,1")}, (void *)M_MINI},
-        {},
-};
-
-#define DEFAULT_FB_MEM  1024*1024*16
-
-/* --------------------------------------------------------------------- */
-
-static int imacfb_setcolreg(unsigned regno, unsigned red, unsigned green,
-                            unsigned blue, unsigned transp,
-                            struct fb_info *info)
-{
-        /*
-         *  Set a single color register. The values supplied are
-         *  already rounded down to the hardware's capabilities
-         *  (according to the entries in the `var' structure). Return
-         *  != 0 for invalid regno.
-         */
-
-        if (regno >= info->cmap.len)
-                return 1;
-
-        if (regno < 16) {
-                red   >>= 8;
-                green >>= 8;
-                blue  >>= 8;
-                ((u32 *)(info->pseudo_palette))[regno] =
-                        (red   << info->var.red.offset)   |
-                        (green << info->var.green.offset) |
-                        (blue  << info->var.blue.offset);
-        }
-        return 0;
-}
-
-static struct fb_ops imacfb_ops = {
-        .owner          = THIS_MODULE,
-        .fb_setcolreg   = imacfb_setcolreg,
-        .fb_fillrect    = cfb_fillrect,
-        .fb_copyarea    = cfb_copyarea,
-        .fb_imageblit   = cfb_imageblit,
-};
-
-static int __init imacfb_setup(char *options)
-{
-        char *this_opt;
-
-        if (!options || !*options)
-                return 0;
-
-        while ((this_opt = strsep(&options, ",")) != NULL) {
-                if (!*this_opt) continue;
-
-                if (!strcmp(this_opt, "inverse"))
-                        inverse = 1;
-                else if (!strcmp(this_opt, "i17"))
-                        model = M_I17;
-                else if (!strcmp(this_opt, "i20"))
-                        model = M_I20;
-                else if (!strcmp(this_opt, "mini"))
-                        model = M_MINI;
-                else if (!strcmp(this_opt, "macbook"))
-                        model = M_MACBOOK;
-                else if (!strncmp(this_opt, "height:", 7))
-                        manual_height = simple_strtoul(this_opt+7, NULL, 0);
-                else if (!strncmp(this_opt, "width:", 6))
-                        manual_width = simple_strtoul(this_opt+6, NULL, 0);
-        }
-        return 0;
-}
-
-static int __init imacfb_probe(struct platform_device *dev)
-{
-        struct fb_info *info;
-        int err;
-        unsigned int size_vmode;
-        unsigned int size_remap;
-        unsigned int size_total;
-
-        screen_info.lfb_depth = 32;
-        screen_info.lfb_size = DEFAULT_FB_MEM / 0x10000;
-        screen_info.pages=1;
-        screen_info.blue_size = 8;
-        screen_info.blue_pos = 0;
-        screen_info.green_size = 8;
-        screen_info.green_pos = 8;
-        screen_info.red_size = 8;
-        screen_info.red_pos = 16;
-        screen_info.rsvd_size = 8;
-        screen_info.rsvd_pos = 24;
-
-        switch (model) {
-        case M_I17:
-                screen_info.lfb_width = 1440;
-                screen_info.lfb_height = 900;
-                screen_info.lfb_linelength = 1472 * 4;
-                screen_info.lfb_base = 0x80010000;
-                break;
-        case M_I20:
-                screen_info.lfb_width = 1680;
-                screen_info.lfb_height = 1050;
-                screen_info.lfb_linelength = 1728 * 4;
-                screen_info.lfb_base = 0x80010000;
-                break;
-        case M_MINI:
-                screen_info.lfb_width = 1024;
-                screen_info.lfb_height = 768;
-                screen_info.lfb_linelength = 2048 * 4;
-                screen_info.lfb_base = 0x80000000;
-                break;
-        case M_MACBOOK:
-                screen_info.lfb_width = 1280;
-                screen_info.lfb_height = 800;
-                screen_info.lfb_linelength = 2048 * 4;
-                screen_info.lfb_base = 0x80000000;
-                break;
-        }
-
-        /* if the user wants to manually specify height/width,
-           we will override the defaults */
-        /* TODO: eventually get auto-detection working */
-        if (manual_height > 0)
-                screen_info.lfb_height = manual_height;
-        if (manual_width > 0)
-                screen_info.lfb_width = manual_width;
-
-        imacfb_fix.smem_start = screen_info.lfb_base;
-        imacfb_defined.bits_per_pixel = screen_info.lfb_depth;
-        imacfb_defined.xres = screen_info.lfb_width;
-        imacfb_defined.yres = screen_info.lfb_height;
-        imacfb_fix.line_length = screen_info.lfb_linelength;
-
-        /*   size_vmode -- that is the amount of memory needed for the
-         *                 used video mode, i.e. the minimum amount of
-         *                 memory we need. */
-        size_vmode = imacfb_defined.yres * imacfb_fix.line_length;
-
-        /*   size_total -- all video memory we have. Used for
-         *                 entries, ressource allocation and bounds
-         *                 checking. */
-        size_total = screen_info.lfb_size * 65536;
-        if (size_total < size_vmode)
-                size_total = size_vmode;
-
-        /*   size_remap -- the amount of video memory we are going to
-         *                 use for imacfb.  With modern cards it is no
-         *                 option to simply use size_total as that
-         *                 wastes plenty of kernel address space. */
-        size_remap  = size_vmode * 2;
-        if (size_remap < size_vmode)
-                size_remap = size_vmode;
-        if (size_remap > size_total)
-                size_remap = size_total;
-        imacfb_fix.smem_len = size_remap;
-
-        if (!request_mem_region(imacfb_fix.smem_start, size_total, "imacfb")) {
-                printk(KERN_WARNING
-                       "imacfb: cannot reserve video memory at 0x%lx\n",
-                        imacfb_fix.smem_start);
-                /* We cannot make this fatal. Sometimes this comes from magic
-                   spaces our resource handlers simply don't know about */
-        }
-
-        info = framebuffer_alloc(sizeof(u32) * 16, &dev->dev);
-        if (!info) {
-                err = -ENOMEM;
-                goto err_release_mem;
-        }
-        info->pseudo_palette = info->par;
-        info->par = NULL;
-
-        info->screen_base = ioremap(imacfb_fix.smem_start, imacfb_fix.smem_len);
-        if (!info->screen_base) {
-                printk(KERN_ERR "imacfb: abort, cannot ioremap video memory "
-                                "0x%x @ 0x%lx\n",
-                        imacfb_fix.smem_len, imacfb_fix.smem_start);
-                err = -EIO;
-                goto err_unmap;
-        }
-
-        printk(KERN_INFO "imacfb: framebuffer at 0x%lx, mapped to 0x%p, "
-               "using %dk, total %dk\n",
-               imacfb_fix.smem_start, info->screen_base,
-               size_remap/1024, size_total/1024);
-        printk(KERN_INFO "imacfb: mode is %dx%dx%d, linelength=%d, pages=%d\n",
-               imacfb_defined.xres, imacfb_defined.yres,
-               imacfb_defined.bits_per_pixel, imacfb_fix.line_length,
-               screen_info.pages);
-
-        imacfb_defined.xres_virtual = imacfb_defined.xres;
-        imacfb_defined.yres_virtual = imacfb_fix.smem_len /
-                                        imacfb_fix.line_length;
-        printk(KERN_INFO "imacfb: scrolling: redraw\n");
-        imacfb_defined.yres_virtual = imacfb_defined.yres;
-
-        /* some dummy values for timing to make fbset happy */
-        imacfb_defined.pixclock     = 10000000 / imacfb_defined.xres *
-                                        1000 / imacfb_defined.yres;
-        imacfb_defined.left_margin  = (imacfb_defined.xres / 8) & 0xf8;
-        imacfb_defined.hsync_len    = (imacfb_defined.xres / 8) & 0xf8;
-
-        imacfb_defined.red.offset    = screen_info.red_pos;
-        imacfb_defined.red.length    = screen_info.red_size;
-        imacfb_defined.green.offset  = screen_info.green_pos;
-        imacfb_defined.green.length  = screen_info.green_size;
-        imacfb_defined.blue.offset   = screen_info.blue_pos;
-        imacfb_defined.blue.length   = screen_info.blue_size;
-        imacfb_defined.transp.offset = screen_info.rsvd_pos;
-        imacfb_defined.transp.length = screen_info.rsvd_size;
-
-        printk(KERN_INFO "imacfb: %s: "
-               "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
-               "Truecolor",
-               screen_info.rsvd_size,
-               screen_info.red_size,
-               screen_info.green_size,
-               screen_info.blue_size,
-               screen_info.rsvd_pos,
-               screen_info.red_pos,
-               screen_info.green_pos,
-               screen_info.blue_pos);
-
-        imacfb_fix.ypanstep  = 0;
-        imacfb_fix.ywrapstep = 0;
-
-        /* request failure does not faze us, as vgacon probably has this
-         * region already (FIXME) */
-        request_region(0x3c0, 32, "imacfb");
-
-        info->fbops = &imacfb_ops;
-        info->var = imacfb_defined;
-        info->fix = imacfb_fix;
-        info->flags = FBINFO_FLAG_DEFAULT;
-
-        if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
-                err = -ENOMEM;
-                goto err_unmap;
-        }
-        if (register_framebuffer(info)<0) {
-                err = -EINVAL;
-                goto err_fb_dealoc;
-        }
-        printk(KERN_INFO "fb%d: %s frame buffer device\n",
-               info->node, info->fix.id);
-        return 0;
-
-err_fb_dealoc:
-        fb_dealloc_cmap(&info->cmap);
-err_unmap:
-        iounmap(info->screen_base);
-        framebuffer_release(info);
-err_release_mem:
-        release_mem_region(imacfb_fix.smem_start, size_total);
-        return err;
-}
-
-static struct platform_driver imacfb_driver = {
-        .probe  = imacfb_probe,
-        .driver = {
-                .name   = "imacfb",
-        },
-};
-
-static struct platform_device imacfb_device = {
-        .name   = "imacfb",
-};
-
-static int __init imacfb_init(void)
-{
-        int ret;
-        char *option = NULL;
-
-        if (!efi_enabled)
-                return -ENODEV;
-        if (!dmi_check_system(dmi_system_table))
-                return -ENODEV;
-        if (model == M_UNKNOWN)
-                return -ENODEV;
-
-        if (fb_get_options("imacfb", &option))
-                return -ENODEV;
-
-        imacfb_setup(option);
-        ret = platform_driver_register(&imacfb_driver);
-
-        if (!ret) {
-                ret = platform_device_register(&imacfb_device);
-                if (ret)
-                        platform_driver_unregister(&imacfb_driver);
-        }
-        return ret;
-}
-module_init(imacfb_init);
-
-MODULE_LICENSE("GPL");
diff --git a/drivers/video/intelfb/intelfb.h b/drivers/video/intelfb/intelfb.h
index 3325fbd68ab3..a50bea614804 100644
--- a/drivers/video/intelfb/intelfb.h
+++ b/drivers/video/intelfb/intelfb.h
@@ -12,9 +12,9 @@
 #endif
 
 /*** Version/name ***/
-#define INTELFB_VERSION                 "0.9.5"
+#define INTELFB_VERSION                 "0.9.6"
 #define INTELFB_MODULE_NAME             "intelfb"
-#define SUPPORTED_CHIPSETS              "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM"
+#define SUPPORTED_CHIPSETS              "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/945GME/965G/965GM"
 
 
 /*** Debug/feature defines ***/
@@ -58,6 +58,7 @@
 #define PCI_DEVICE_ID_INTEL_915GM       0x2592
 #define PCI_DEVICE_ID_INTEL_945G        0x2772
 #define PCI_DEVICE_ID_INTEL_945GM       0x27A2
+#define PCI_DEVICE_ID_INTEL_945GME      0x27AE
 #define PCI_DEVICE_ID_INTEL_965G        0x29A2
 #define PCI_DEVICE_ID_INTEL_965GM       0x2A02
 
@@ -160,6 +161,7 @@ enum intel_chips {
         INTEL_915GM,
         INTEL_945G,
         INTEL_945GM,
+        INTEL_945GME,
         INTEL_965G,
         INTEL_965GM,
 };
@@ -363,6 +365,7 @@ struct intelfb_info {
                         ((dinfo)->chipset == INTEL_915GM) ||    \
                         ((dinfo)->chipset == INTEL_945G) ||     \
                         ((dinfo)->chipset == INTEL_945GM) ||    \
+                        ((dinfo)->chipset == INTEL_945GME) ||   \
                         ((dinfo)->chipset == INTEL_965G) ||     \
                         ((dinfo)->chipset == INTEL_965GM))
 
diff --git a/drivers/video/intelfb/intelfb_i2c.c b/drivers/video/intelfb/intelfb_i2c.c
index fcf9fadbf572..5d896b81f4e0 100644
--- a/drivers/video/intelfb/intelfb_i2c.c
+++ b/drivers/video/intelfb/intelfb_i2c.c
@@ -171,6 +171,7 @@ void intelfb_create_i2c_busses(struct intelfb_info *dinfo)
                 /* has some LVDS + tv-out */
         case INTEL_945G:
         case INTEL_945GM:
+        case INTEL_945GME:
         case INTEL_965G:
         case INTEL_965GM:
                 /* SDVO ports have a single control bus - 2 devices */
diff --git a/drivers/video/intelfb/intelfbdrv.c b/drivers/video/intelfb/intelfbdrv.c
index e44303f9bc52..a09e23649357 100644
--- a/drivers/video/intelfb/intelfbdrv.c
+++ b/drivers/video/intelfb/intelfbdrv.c
@@ -2,7 +2,7 @@
  * intelfb
  *
  * Linux framebuffer driver for Intel(R) 830M/845G/852GM/855GM/865G/915G/915GM/
- * 945G/945GM/965G/965GM integrated graphics chips.
+ * 945G/945GM/945GME/965G/965GM integrated graphics chips.
  *
  * Copyright © 2002, 2003 David Dawes <dawes@xfree86.org>
  *                   2004 Sylvain Meyer
@@ -102,6 +102,9 @@
  *
  *    04/2008 - Version 0.9.5
  *              Add support for 965G/965GM. (Maik Broemme <mbroemme@plusserver.de>)
+ *
+ *    08/2008 - Version 0.9.6
+ *              Add support for 945GME. (Phil Endecott <spam_from_intelfb@chezphil.org>)
  */
 
 #include <linux/module.h>
@@ -183,6 +186,7 @@ static struct pci_device_id intelfb_pci_table[] __devinitdata = {
         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_915GM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_915GM },
         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_945G, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_945G },
         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_945GM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_945GM },
+        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_945GME, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_945GME },
         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_965G, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_965G },
         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_965GM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_965GM },
         { 0, }
@@ -555,6 +559,7 @@ static int __devinit intelfb_pci_register(struct pci_dev *pdev,
             (ent->device == PCI_DEVICE_ID_INTEL_915GM) ||
             (ent->device == PCI_DEVICE_ID_INTEL_945G)  ||
             (ent->device == PCI_DEVICE_ID_INTEL_945GM) ||
+            (ent->device == PCI_DEVICE_ID_INTEL_945GME) ||
             (ent->device == PCI_DEVICE_ID_INTEL_965G) ||
             (ent->device == PCI_DEVICE_ID_INTEL_965GM)) {
 
diff --git a/drivers/video/intelfb/intelfbhw.c b/drivers/video/intelfb/intelfbhw.c
index 8e6d6a4db0ad..8b26b27c2db6 100644
--- a/drivers/video/intelfb/intelfbhw.c
+++ b/drivers/video/intelfb/intelfbhw.c
@@ -143,6 +143,12 @@ int intelfbhw_get_chipset(struct pci_dev *pdev, struct intelfb_info *dinfo)
                 dinfo->mobile = 1;
                 dinfo->pll_index = PLLS_I9xx;
                 return 0;
+        case PCI_DEVICE_ID_INTEL_945GME:
+                dinfo->name = "Intel(R) 945GME";
+                dinfo->chipset = INTEL_945GME;
+                dinfo->mobile = 1;
+                dinfo->pll_index = PLLS_I9xx;
+                return 0;
         case PCI_DEVICE_ID_INTEL_965G:
                 dinfo->name = "Intel(R) 965G";
                 dinfo->chipset = INTEL_965G;
@@ -186,6 +192,7 @@ int intelfbhw_get_memory(struct pci_dev *pdev, int *aperture_size,
         case PCI_DEVICE_ID_INTEL_915GM:
         case PCI_DEVICE_ID_INTEL_945G:
         case PCI_DEVICE_ID_INTEL_945GM:
+        case PCI_DEVICE_ID_INTEL_945GME:
         case PCI_DEVICE_ID_INTEL_965G:
         case PCI_DEVICE_ID_INTEL_965GM:
                 /* 915, 945 and 965 chipsets support a 256MB aperture.
diff --git a/drivers/video/matrox/matroxfb_base.c b/drivers/video/matrox/matroxfb_base.c
index c02136202792..8e7a275df50c 100644
--- a/drivers/video/matrox/matroxfb_base.c
+++ b/drivers/video/matrox/matroxfb_base.c
@@ -1453,6 +1453,13 @@ static struct board {
                 MGA_G100,
                 &vbG100,
                 "MGA-G100 (AGP)"},
+        {PCI_VENDOR_ID_MATROX,  PCI_DEVICE_ID_MATROX_G200EV_PCI,        0xFF,
+                0,                      0,
+                DEVF_G200,
+                230000,
+                MGA_G200,
+                &vbG200,
+                "MGA-G200eV (PCI)"},
         {PCI_VENDOR_ID_MATROX,  PCI_DEVICE_ID_MATROX_G200_PCI,  0xFF,
                 0,                      0,
                 DEVF_G200,
@@ -2118,6 +2125,8 @@ static struct pci_device_id matroxfb_devices[] = {
                 PCI_ANY_ID,     PCI_ANY_ID,     0, 0, 0},
         {PCI_VENDOR_ID_MATROX,  PCI_DEVICE_ID_MATROX_G100_AGP,
                 PCI_ANY_ID,     PCI_ANY_ID,     0, 0, 0},
+        {PCI_VENDOR_ID_MATROX,  PCI_DEVICE_ID_MATROX_G200EV_PCI,
+                PCI_ANY_ID,     PCI_ANY_ID,     0, 0, 0},
         {PCI_VENDOR_ID_MATROX,  PCI_DEVICE_ID_MATROX_G200_PCI,
                 PCI_ANY_ID,     PCI_ANY_ID,     0, 0, 0},
         {PCI_VENDOR_ID_MATROX,  PCI_DEVICE_ID_MATROX_G200_AGP,
diff --git a/drivers/video/neofb.c b/drivers/video/neofb.c
index 25172b2a2a94..bfb802d26d5a 100644
--- a/drivers/video/neofb.c
+++ b/drivers/video/neofb.c
@@ -426,11 +426,11 @@ static void vgaHWProtect(int on)
 {
         unsigned char tmp;
 
+        tmp = vga_rseq(NULL, 0x01);
         if (on) {
                 /*
                  * Turn off screen and disable sequencer.
                  */
-                tmp = vga_rseq(NULL, 0x01);
                 vga_wseq(NULL, 0x00, 0x01);             /* Synchronous Reset */
                 vga_wseq(NULL, 0x01, tmp | 0x20);       /* disable the display */
 
@@ -439,7 +439,6 @@ static void vgaHWProtect(int on)
                 /*
                  * Reenable sequencer, then turn on screen.
                  */
-                tmp = vga_rseq(NULL, 0x01);
                 vga_wseq(NULL, 0x01, tmp & ~0x20);      /* reenable display */
                 vga_wseq(NULL, 0x00, 0x03);             /* clear synchronousreset */
 
@@ -558,14 +557,12 @@ neofb_open(struct fb_info *info, int user)
 {
         struct neofb_par *par = info->par;
 
-        mutex_lock(&par->open_lock);
         if (!par->ref_count) {
                 memset(&par->state, 0, sizeof(struct vgastate));
                 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
                 save_vga(&par->state);
         }
         par->ref_count++;
-        mutex_unlock(&par->open_lock);
 
         return 0;
 }
@@ -575,16 +572,13 @@ neofb_release(struct fb_info *info, int user)
 {
         struct neofb_par *par = info->par;
 
-        mutex_lock(&par->open_lock);
-        if (!par->ref_count) {
-                mutex_unlock(&par->open_lock);
+        if (!par->ref_count)
                 return -EINVAL;
-        }
+
         if (par->ref_count == 1) {
                 restore_vga(&par->state);
         }
         par->ref_count--;
-        mutex_unlock(&par->open_lock);
 
         return 0;
 }
@@ -648,10 +642,10 @@ neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
         var->blue.msb_right = 0;
         var->transp.msb_right = 0;
 
+        var->transp.offset = 0;
+        var->transp.length = 0;
         switch (var->bits_per_pixel) {
         case 8:         /* PSEUDOCOLOUR, 256 */
-                var->transp.offset = 0;
-                var->transp.length = 0;
                 var->red.offset = 0;
                 var->red.length = 8;
                 var->green.offset = 0;
@@ -661,8 +655,6 @@ neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
                 break;
 
         case 16:                /* DIRECTCOLOUR, 64k */
-                var->transp.offset = 0;
-                var->transp.length = 0;
                 var->red.offset = 11;
                 var->red.length = 5;
                 var->green.offset = 5;
@@ -672,8 +664,6 @@ neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
                 break;
 
         case 24:                /* TRUECOLOUR, 16m */
-                var->transp.offset = 0;
-                var->transp.length = 0;
                 var->red.offset = 16;
                 var->red.length = 8;
                 var->green.offset = 8;
@@ -704,8 +694,6 @@ neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
         if (vramlen > 4 * 1024 * 1024)
                 vramlen = 4 * 1024 * 1024;
 
-        if (var->yres_virtual < var->yres)
-                var->yres_virtual = var->yres;
         if (var->xres_virtual < var->xres)
                 var->xres_virtual = var->xres;
 
@@ -722,8 +710,6 @@ neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
            if it was possible. We should return -EINVAL, but I disagree */
         if (var->yres_virtual < var->yres)
                 var->yres = var->yres_virtual;
-        if (var->xres_virtual < var->xres)
-                var->xres = var->xres_virtual;
         if (var->xoffset + var->xres > var->xres_virtual)
                 var->xoffset = var->xres_virtual - var->xres;
         if (var->yoffset + var->yres > var->yres_virtual)
@@ -1186,8 +1172,11 @@ static int neofb_set_par(struct fb_info *info)
         return 0;
 }
 
-static void neofb_update_start(struct fb_info *info,
-                               struct fb_var_screeninfo *var)
+/*
+ *    Pan or Wrap the Display
+ */
+static int neofb_pan_display(struct fb_var_screeninfo *var,
+                             struct fb_info *info)
 {
         struct neofb_par *par = info->par;
         struct vgastate *state = &par->state;
@@ -1216,35 +1205,7 @@ static void neofb_update_start(struct fb_info *info,
         vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
 
         neoLock(state);
-}
-
-/*
- *    Pan or Wrap the Display
- */
-static int neofb_pan_display(struct fb_var_screeninfo *var,
-                             struct fb_info *info)
-{
-        u_int y_bottom;
-
-        y_bottom = var->yoffset;
-
-        if (!(var->vmode & FB_VMODE_YWRAP))
-                y_bottom += var->yres;
 
-        if (var->xoffset > (var->xres_virtual - var->xres))
-                return -EINVAL;
-        if (y_bottom > info->var.yres_virtual)
-                return -EINVAL;
-
-        neofb_update_start(info, var);
-
-        info->var.xoffset = var->xoffset;
-        info->var.yoffset = var->yoffset;
-
-        if (var->vmode & FB_VMODE_YWRAP)
-                info->var.vmode |= FB_VMODE_YWRAP;
-        else
-                info->var.vmode &= ~FB_VMODE_YWRAP;
         return 0;
 }
 
@@ -1992,7 +1953,6 @@ static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const st
 
         info->fix.accel = id->driver_data;
 
-        mutex_init(&par->open_lock);
         par->pci_burst = !nopciburst;
         par->lcd_stretch = !nostretch;
         par->libretto = libretto;
diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
index 6efcf89e7fbe..dfb72f5e4c96 100644
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -156,7 +156,7 @@ struct resmap {
 };
 
 static struct {
-        u32             base;
+        void __iomem    *base;
 
         struct omapfb_mem_desc  mem_desc;
         struct resmap           *res_map[DISPC_MEMTYPE_NUM];
@@ -212,9 +212,9 @@ static void enable_rfbi_mode(int enable)
         dispc_write_reg(DISPC_CONTROL, l);
 
         /* Set bypass mode in RFBI module */
-        l = __raw_readl(io_p2v(RFBI_CONTROL));
+        l = __raw_readl(IO_ADDRESS(RFBI_CONTROL));
         l |= enable ? 0 : (1 << 1);
-        __raw_writel(l, io_p2v(RFBI_CONTROL));
+        __raw_writel(l, IO_ADDRESS(RFBI_CONTROL));
 }
 
 static void set_lcd_data_lines(int data_lines)
@@ -1349,14 +1349,19 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode,
 
         memset(&dispc, 0, sizeof(dispc));
 
-        dispc.base = io_p2v(DISPC_BASE);
+        dispc.base = ioremap(DISPC_BASE, SZ_1K);
+        if (!dispc.base) {
+                dev_err(fbdev->dev, "can't ioremap DISPC\n");
+                return -ENOMEM;
+        }
+
         dispc.fbdev = fbdev;
         dispc.ext_mode = ext_mode;
 
         init_completion(&dispc.frame_done);
 
         if ((r = get_dss_clocks()) < 0)
-                return r;
+                goto fail0;
 
         enable_interface_clocks(1);
         enable_lcd_clocks(1);
@@ -1414,7 +1419,7 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode,
         }
 
         /* L3 firewall setting: enable access to OCM RAM */
-        __raw_writel(0x402000b0, io_p2v(0x680050a0));
+        __raw_writel(0x402000b0, IO_ADDRESS(0x680050a0));
 
         if ((r = alloc_palette_ram()) < 0)
                 goto fail2;
@@ -1464,7 +1469,8 @@ fail1:
         enable_lcd_clocks(0);
         enable_interface_clocks(0);
         put_dss_clocks();
-
+fail0:
+        iounmap(dispc.base);
         return r;
 }
 
@@ -1481,6 +1487,7 @@ static void omap_dispc_cleanup(void)
         free_irq(INT_24XX_DSS_IRQ, dispc.fbdev);
         enable_interface_clocks(0);
         put_dss_clocks();
+        iounmap(dispc.base);
 }
 
 const struct lcd_ctrl omap2_int_ctrl = {
diff --git a/drivers/video/omap/dispc.h b/drivers/video/omap/dispc.h
index eb1512b56ce8..ef720a78f6d5 100644
--- a/drivers/video/omap/dispc.h
+++ b/drivers/video/omap/dispc.h
@@ -40,4 +40,6 @@ extern void omap_dispc_enable_digit_out(int enable);
 extern int  omap_dispc_request_irq(void (*callback)(void *data), void *data);
 extern void omap_dispc_free_irq(void);
 
+extern const struct lcd_ctrl omap2_int_ctrl;
+
 #endif
diff --git a/drivers/video/omap/lcd_h4.c b/drivers/video/omap/lcd_h4.c
index 88c19d424ef7..6ff56430341b 100644
--- a/drivers/video/omap/lcd_h4.c
+++ b/drivers/video/omap/lcd_h4.c
@@ -47,7 +47,7 @@ static unsigned long h4_panel_get_caps(struct lcd_panel *panel)
         return 0;
 }
 
-struct lcd_panel h4_panel = {
+static struct lcd_panel h4_panel = {
         .name           = "h4",
         .config         = OMAP_LCDC_PANEL_TFT,
 
@@ -91,7 +91,7 @@ static int h4_panel_resume(struct platform_device *pdev)
         return 0;
 }
 
-struct platform_driver h4_panel_driver = {
+static struct platform_driver h4_panel_driver = {
         .probe          = h4_panel_probe,
         .remove         = h4_panel_remove,
         .suspend        = h4_panel_suspend,
diff --git a/drivers/video/omap/lcd_inn1610.c b/drivers/video/omap/lcd_inn1610.c
index 6a42c6a0cd99..4c4f7ee6d733 100644
--- a/drivers/video/omap/lcd_inn1610.c
+++ b/drivers/video/omap/lcd_inn1610.c
@@ -32,43 +32,43 @@ static int innovator1610_panel_init(struct lcd_panel *panel,
 {
         int r = 0;
 
-        if (omap_request_gpio(14)) {
+        if (gpio_request(14, "lcd_en0")) {
                 pr_err(MODULE_NAME ": can't request GPIO 14\n");
                 r = -1;
                 goto exit;
         }
-        if (omap_request_gpio(15)) {
+        if (gpio_request(15, "lcd_en1")) {
                 pr_err(MODULE_NAME ": can't request GPIO 15\n");
-                omap_free_gpio(14);
+                gpio_free(14);
                 r = -1;
                 goto exit;
         }
         /* configure GPIO(14, 15) as outputs */
-        omap_set_gpio_direction(14, 0);
-        omap_set_gpio_direction(15, 0);
+        gpio_direction_output(14, 0);
+        gpio_direction_output(15, 0);
 exit:
         return r;
 }
 
 static void innovator1610_panel_cleanup(struct lcd_panel *panel)
 {
-        omap_free_gpio(15);
-        omap_free_gpio(14);
+        gpio_free(15);
+        gpio_free(14);
 }
 
 static int innovator1610_panel_enable(struct lcd_panel *panel)
 {
         /* set GPIO14 and GPIO15 high */
-        omap_set_gpio_dataout(14, 1);
-        omap_set_gpio_dataout(15, 1);
+        gpio_set_value(14, 1);
+        gpio_set_value(15, 1);
         return 0;
 }
 
 static void innovator1610_panel_disable(struct lcd_panel *panel)
 {
         /* set GPIO13, GPIO14 and GPIO15 low */
-        omap_set_gpio_dataout(14, 0);
-        omap_set_gpio_dataout(15, 0);
+        gpio_set_value(14, 0);
+        gpio_set_value(15, 0);
 }
 
 static unsigned long innovator1610_panel_get_caps(struct lcd_panel *panel)
diff --git a/drivers/video/omap/lcd_osk.c b/drivers/video/omap/lcd_osk.c
index a4a725f427a4..379c96d36da5 100644
--- a/drivers/video/omap/lcd_osk.c
+++ b/drivers/video/omap/lcd_osk.c
@@ -29,6 +29,7 @@
 
 static int osk_panel_init(struct lcd_panel *panel, struct omapfb_device *fbdev)
 {
+        /* gpio2 was allocated in board init */
         return 0;
 }
 
@@ -47,11 +48,8 @@ static int osk_panel_enable(struct lcd_panel *panel)
         /* Set PWL level */
         omap_writeb(0xFF, OMAP_PWL_ENABLE);
 
-        /* configure GPIO2 as output */
-        omap_set_gpio_direction(2, 0);
-
-        /* set GPIO2 high */
-        omap_set_gpio_dataout(2, 1);
+        /* set GPIO2 high (lcd power enabled) */
+        gpio_set_value(2, 1);
 
         return 0;
 }
@@ -65,7 +63,7 @@ static void osk_panel_disable(struct lcd_panel *panel)
         omap_writeb(0x00, OMAP_PWL_CLK_ENABLE);
 
         /* set GPIO2 low */
-        omap_set_gpio_dataout(2, 0);
+        gpio_set_value(2, 0);
 }
 
 static unsigned long osk_panel_get_caps(struct lcd_panel *panel)
diff --git a/drivers/video/omap/lcd_sx1.c b/drivers/video/omap/lcd_sx1.c
index caa6a896cb8b..e55de201b8ff 100644
--- a/drivers/video/omap/lcd_sx1.c
+++ b/drivers/video/omap/lcd_sx1.c
@@ -81,21 +81,21 @@ static void epson_sendbyte(int flag, unsigned char byte)
         int i, shifter = 0x80;
 
         if (!flag)
-                omap_set_gpio_dataout(_A_LCD_SSC_A0, 0);
+                gpio_set_value(_A_LCD_SSC_A0, 0);
         mdelay(2);
-        omap_set_gpio_dataout(A_LCD_SSC_RD, 1);
+        gpio_set_value(A_LCD_SSC_RD, 1);
 
-        omap_set_gpio_dataout(A_LCD_SSC_SD, flag);
+        gpio_set_value(A_LCD_SSC_SD, flag);
 
         OMAP_MCBSP_WRITE(OMAP1510_MCBSP3_BASE, PCR0, 0x2200);
         OMAP_MCBSP_WRITE(OMAP1510_MCBSP3_BASE, PCR0, 0x2202);
         for (i = 0; i < 8; i++) {
                 OMAP_MCBSP_WRITE(OMAP1510_MCBSP3_BASE, PCR0, 0x2200);
-                omap_set_gpio_dataout(A_LCD_SSC_SD, shifter & byte);
+                gpio_set_value(A_LCD_SSC_SD, shifter & byte);
                 OMAP_MCBSP_WRITE(OMAP1510_MCBSP3_BASE, PCR0, 0x2202);
                 shifter >>= 1;
         }
-        omap_set_gpio_dataout(_A_LCD_SSC_A0, 1);
+        gpio_set_value(_A_LCD_SSC_A0, 1);
 }
 
 static void init_system(void)
@@ -107,25 +107,18 @@ static void init_system(void)
 static void setup_GPIO(void)
 {
         /* new wave */
-        omap_request_gpio(A_LCD_SSC_RD);
-        omap_request_gpio(A_LCD_SSC_SD);
-        omap_request_gpio(_A_LCD_RESET);
-        omap_request_gpio(_A_LCD_SSC_CS);
-        omap_request_gpio(_A_LCD_SSC_A0);
-
-        /* set all GPIOs to output */
-        omap_set_gpio_direction(A_LCD_SSC_RD, 0);
-        omap_set_gpio_direction(A_LCD_SSC_SD, 0);
-        omap_set_gpio_direction(_A_LCD_RESET, 0);
-        omap_set_gpio_direction(_A_LCD_SSC_CS, 0);
-        omap_set_gpio_direction(_A_LCD_SSC_A0, 0);
-
-        /* set GPIO data */
-        omap_set_gpio_dataout(A_LCD_SSC_RD, 1);
-        omap_set_gpio_dataout(A_LCD_SSC_SD, 0);
-        omap_set_gpio_dataout(_A_LCD_RESET, 0);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
-        omap_set_gpio_dataout(_A_LCD_SSC_A0, 1);
+        gpio_request(A_LCD_SSC_RD, "lcd_ssc_rd");
+        gpio_request(A_LCD_SSC_SD, "lcd_ssc_sd");
+        gpio_request(_A_LCD_RESET, "lcd_reset");
+        gpio_request(_A_LCD_SSC_CS, "lcd_ssc_cs");
+        gpio_request(_A_LCD_SSC_A0, "lcd_ssc_a0");
+
+        /* set GPIOs to output, with initial data */
+        gpio_direction_output(A_LCD_SSC_RD, 1);
+        gpio_direction_output(A_LCD_SSC_SD, 0);
+        gpio_direction_output(_A_LCD_RESET, 0);
+        gpio_direction_output(_A_LCD_SSC_CS, 1);
+        gpio_direction_output(_A_LCD_SSC_A0, 1);
 }
 
 static void display_init(void)
@@ -139,61 +132,61 @@ static void display_init(void)
         mdelay(2);
 
         /* reset LCD */
-        omap_set_gpio_dataout(A_LCD_SSC_SD, 1);
+        gpio_set_value(A_LCD_SSC_SD, 1);
         epson_sendbyte(0, 0x25);
 
-        omap_set_gpio_dataout(_A_LCD_RESET, 0);
+        gpio_set_value(_A_LCD_RESET, 0);
         mdelay(10);
-        omap_set_gpio_dataout(_A_LCD_RESET, 1);
+        gpio_set_value(_A_LCD_RESET, 1);
 
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
         mdelay(2);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 0);
+        gpio_set_value(_A_LCD_SSC_CS, 0);
 
         /* init LCD, phase 1 */
         epson_sendbyte(0, 0xCA);
         for (i = 0; i < 10; i++)
                 epson_sendbyte(1, INIT_1[i]);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 0);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 0);
 
         /* init LCD phase 2 */
         epson_sendbyte(0, 0xCB);
         for (i = 0; i < 125; i++)
                 epson_sendbyte(1, INIT_2[i]);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 0);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 0);
 
         /* init LCD phase 2a */
         epson_sendbyte(0, 0xCC);
         for (i = 0; i < 14; i++)
                 epson_sendbyte(1, INIT_3[i]);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 0);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 0);
 
         /* init LCD phase 3 */
         epson_sendbyte(0, 0xBC);
         epson_sendbyte(1, 0x08);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 0);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 0);
 
         /* init LCD phase 4 */
         epson_sendbyte(0, 0x07);
         epson_sendbyte(1, 0x05);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 0);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 0);
 
         /* init LCD phase 5 */
         epson_sendbyte(0, 0x94);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 0);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 0);
 
         /* init LCD phase 6 */
         epson_sendbyte(0, 0xC6);
         epson_sendbyte(1, 0x80);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
         mdelay(100); /* used to be 1000 */
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 0);
+        gpio_set_value(_A_LCD_SSC_CS, 0);
 
         /* init LCD phase 7 */
         epson_sendbyte(0, 0x16);
@@ -201,8 +194,8 @@ static void display_init(void)
         epson_sendbyte(1, 0x00);
         epson_sendbyte(1, 0xB1);
         epson_sendbyte(1, 0x00);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 0);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 0);
 
         /* init LCD phase 8 */
         epson_sendbyte(0, 0x76);
@@ -210,12 +203,12 @@ static void display_init(void)
         epson_sendbyte(1, 0x00);
         epson_sendbyte(1, 0xDB);
         epson_sendbyte(1, 0x00);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 0);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 0);
 
         /* init LCD phase 9 */
         epson_sendbyte(0, 0xAF);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
 }
 
 static int sx1_panel_init(struct lcd_panel *panel, struct omapfb_device *fbdev)
@@ -231,18 +224,18 @@ static void sx1_panel_disable(struct lcd_panel *panel)
 {
         printk(KERN_INFO "SX1: LCD panel disable\n");
         sx1_setmmipower(0);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
 
         epson_sendbyte(0, 0x25);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 0);
+        gpio_set_value(_A_LCD_SSC_CS, 0);
 
         epson_sendbyte(0, 0xAE);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
         mdelay(100);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 0);
+        gpio_set_value(_A_LCD_SSC_CS, 0);
 
         epson_sendbyte(0, 0x95);
-        omap_set_gpio_dataout(_A_LCD_SSC_CS, 1);
+        gpio_set_value(_A_LCD_SSC_CS, 1);
 }
 
 static int sx1_panel_enable(struct lcd_panel *panel)
diff --git a/drivers/video/omap/lcdc.c b/drivers/video/omap/lcdc.c
index 83514f066712..6e2ea7518761 100644
--- a/drivers/video/omap/lcdc.c
+++ b/drivers/video/omap/lcdc.c
@@ -34,6 +34,8 @@
 
 #include <asm/mach-types.h>
 
+#include "lcdc.h"
+
 #define MODULE_NAME                     "lcdc"
 
 #define OMAP_LCDC_BASE                  0xfffec000
diff --git a/drivers/video/omap/lcdc.h b/drivers/video/omap/lcdc.h
index adb731e5314a..845222270db3 100644
--- a/drivers/video/omap/lcdc.h
+++ b/drivers/video/omap/lcdc.h
@@ -4,4 +4,6 @@
 int omap_lcdc_set_dma_callback(void (*callback)(void *data), void *data);
 void omap_lcdc_free_dma_callback(void);
 
+extern const struct lcd_ctrl omap1_int_ctrl;
+
 #endif
diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c
index 51a138bd113c..5a5e407dc45f 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -31,11 +31,14 @@
 #include <mach/dma.h>
 #include <mach/omapfb.h>
 
+#include "lcdc.h"
+#include "dispc.h"
+
 #define MODULE_NAME     "omapfb"
 
 static unsigned int     def_accel;
 static unsigned long    def_vram[OMAPFB_PLANE_NUM];
-static int              def_vram_cnt;
+static unsigned int     def_vram_cnt;
 static unsigned long    def_vxres;
 static unsigned long    def_vyres;
 static unsigned int     def_rotate;
@@ -84,12 +87,10 @@ static struct caps_table_struct color_caps[] = {
  * LCD panel
  * ---------------------------------------------------------------------------
  */
-extern struct lcd_ctrl omap1_int_ctrl;
-extern struct lcd_ctrl omap2_int_ctrl;
 extern struct lcd_ctrl hwa742_ctrl;
 extern struct lcd_ctrl blizzard_ctrl;
 
-static struct lcd_ctrl *ctrls[] = {
+static const struct lcd_ctrl *ctrls[] = {
 #ifdef CONFIG_ARCH_OMAP1
         &omap1_int_ctrl,
 #else
@@ -740,7 +741,7 @@ static int omapfb_update_win(struct fb_info *fbi,
         int ret;
 
         omapfb_rqueue_lock(plane->fbdev);
-        ret = omapfb_update_window_async(fbi, win, NULL, 0);
+        ret = omapfb_update_window_async(fbi, win, NULL, NULL);
         omapfb_rqueue_unlock(plane->fbdev);
 
         return ret;
@@ -768,7 +769,7 @@ static int omapfb_update_full_screen(struct fb_info *fbi)
         win.format = 0;
 
         omapfb_rqueue_lock(fbdev);
-        r = fbdev->ctrl->update_window(fbi, &win, NULL, 0);
+        r = fbdev->ctrl->update_window(fbi, &win, NULL, NULL);
         omapfb_rqueue_unlock(fbdev);
 
         return r;
@@ -1047,7 +1048,7 @@ void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval)
                 win.height = 2;
                 win.out_width = 2;
                 win.out_height = 2;
-                fbdev->ctrl->update_window(fbdev->fb_info[0], &win, NULL, 0);
+                fbdev->ctrl->update_window(fbdev->fb_info[0], &win, NULL, NULL);
         }
         omapfb_rqueue_unlock(fbdev);
 }
diff --git a/drivers/video/omap/rfbi.c b/drivers/video/omap/rfbi.c
index 4a6f13d3facf..a13c8dcad2a8 100644
--- a/drivers/video/omap/rfbi.c
+++ b/drivers/video/omap/rfbi.c
@@ -59,7 +59,7 @@
 #define DISPC_CONTROL           0x0040
 
 static struct {
-        u32             base;
+        void __iomem    *base;
         void            (*lcdc_callback)(void *data);
         void            *lcdc_callback_data;
         unsigned long   l4_khz;
@@ -518,7 +518,11 @@ static int rfbi_init(struct omapfb_device *fbdev)
         int r;
 
         rfbi.fbdev = fbdev;
-        rfbi.base = io_p2v(RFBI_BASE);
+        rfbi.base = ioremap(RFBI_BASE, SZ_1K);
+        if (!rfbi.base) {
+                dev_err(fbdev->dev, "can't ioremap RFBI\n");
+                return -ENOMEM;
+        }
 
         if ((r = rfbi_get_clocks()) < 0)
                 return r;
@@ -566,6 +570,7 @@ static void rfbi_cleanup(void)
 {
         omap_dispc_free_irq();
         rfbi_put_clocks();
+        iounmap(rfbi.base);
 }
 
 const struct lcd_ctrl_extif omap2_ext_if = {
diff --git a/drivers/video/omap/sossi.c b/drivers/video/omap/sossi.c
index 6359353c2c67..a76946220249 100644
--- a/drivers/video/omap/sossi.c
+++ b/drivers/video/omap/sossi.c
@@ -574,7 +574,12 @@ static int sossi_init(struct omapfb_device *fbdev)
         struct clk *dpll1out_ck;
         int r;
 
-        sossi.base = (void __iomem *)IO_ADDRESS(OMAP_SOSSI_BASE);
+        sossi.base = ioremap(OMAP_SOSSI_BASE, SZ_1K);
+        if (!sossi.base) {
+                dev_err(fbdev->dev, "can't ioremap SoSSI\n");
+                return -ENOMEM;
+        }
+
         sossi.fbdev = fbdev;
         spin_lock_init(&sossi.lock);
 
@@ -665,6 +670,7 @@ static void sossi_cleanup(void)
 {
         omap_lcdc_free_dma_callback();
         clk_put(sossi.fck);
+        iounmap(sossi.base);
 }
 
 struct lcd_ctrl_extif omap1_ext_if = {
diff --git a/drivers/video/s1d13xxxfb.c b/drivers/video/s1d13xxxfb.c
index b829dc7c5edf..a7b01d2724b5 100644
--- a/drivers/video/s1d13xxxfb.c
+++ b/drivers/video/s1d13xxxfb.c
@@ -50,6 +50,11 @@
 #define dbg(fmt, args...) do { } while (0)
 #endif
 
+static const int __devinitconst s1d13xxxfb_revisions[] = {
+        S1D13506_CHIP_REV,      /* Rev.4 on HP Jornada 7xx S1D13506 */
+        S1D13806_CHIP_REV,      /* Rev.7 on .. */
+};
+
 /*
  * Here we define the default struct fb_fix_screeninfo
  */
@@ -538,6 +543,7 @@ s1d13xxxfb_probe(struct platform_device *pdev)
         struct fb_info *info;
         struct s1d13xxxfb_pdata *pdata = NULL;
         int ret = 0;
+        int i;
         u8 revision;
 
         dbg("probe called: device is %p\n", pdev);
@@ -607,10 +613,19 @@ s1d13xxxfb_probe(struct platform_device *pdev)
                 goto bail;
         }
 
-        revision = s1d13xxxfb_readreg(default_par, S1DREG_REV_CODE);
-        if ((revision >> 2) != S1D_CHIP_REV) {
-                printk(KERN_INFO PFX "chip not found: %i\n", (revision >> 2));
-                ret = -ENODEV;
+        revision = s1d13xxxfb_readreg(default_par, S1DREG_REV_CODE) >> 2;
+
+        ret = -ENODEV;
+
+        for (i = 0; i < ARRAY_SIZE(s1d13xxxfb_revisions); i++) {
+                if (revision == s1d13xxxfb_revisions[i])
+                        ret = 0;
+        }
+
+        if (!ret)
+                printk(KERN_INFO PFX "chip revision %i\n", revision);
+        else {
+                printk(KERN_INFO PFX "unknown chip revision %i\n", revision);
                 goto bail;
         }
 
diff --git a/drivers/video/tdfxfb.c b/drivers/video/tdfxfb.c
index 4599a4385bc9..14bd3f3680b8 100644
--- a/drivers/video/tdfxfb.c
+++ b/drivers/video/tdfxfb.c
@@ -1195,57 +1195,58 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
                 return -ENOMEM;
 
         default_par = info->par;
+        info->fix = tdfx_fix;
 
         /* Configure the default fb_fix_screeninfo first */
         switch (pdev->device) {
         case PCI_DEVICE_ID_3DFX_BANSHEE:
-                strcpy(tdfx_fix.id, "3Dfx Banshee");
+                strcpy(info->fix.id, "3Dfx Banshee");
                 default_par->max_pixclock = BANSHEE_MAX_PIXCLOCK;
                 break;
         case PCI_DEVICE_ID_3DFX_VOODOO3:
-                strcpy(tdfx_fix.id, "3Dfx Voodoo3");
+                strcpy(info->fix.id, "3Dfx Voodoo3");
                 default_par->max_pixclock = VOODOO3_MAX_PIXCLOCK;
                 break;
         case PCI_DEVICE_ID_3DFX_VOODOO5:
-                strcpy(tdfx_fix.id, "3Dfx Voodoo5");
+                strcpy(info->fix.id, "3Dfx Voodoo5");
                 default_par->max_pixclock = VOODOO5_MAX_PIXCLOCK;
                 break;
         }
 
-        tdfx_fix.mmio_start = pci_resource_start(pdev, 0);
-        tdfx_fix.mmio_len = pci_resource_len(pdev, 0);
-        if (!request_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len,
+        info->fix.mmio_start = pci_resource_start(pdev, 0);
+        info->fix.mmio_len = pci_resource_len(pdev, 0);
+        if (!request_mem_region(info->fix.mmio_start, info->fix.mmio_len,
                                 "tdfx regbase")) {
                 printk(KERN_ERR "tdfxfb: Can't reserve regbase\n");
                 goto out_err;
         }
 
         default_par->regbase_virt =
-                ioremap_nocache(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
+                ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len);
         if (!default_par->regbase_virt) {
                 printk(KERN_ERR "fb: Can't remap %s register area.\n",
-                                tdfx_fix.id);
+                                info->fix.id);
                 goto out_err_regbase;
         }
 
-        tdfx_fix.smem_start = pci_resource_start(pdev, 1);
-        tdfx_fix.smem_len = do_lfb_size(default_par, pdev->device);
-        if (!tdfx_fix.smem_len) {
-                printk(KERN_ERR "fb: Can't count %s memory.\n", tdfx_fix.id);
+        info->fix.smem_start = pci_resource_start(pdev, 1);
+        info->fix.smem_len = do_lfb_size(default_par, pdev->device);
+        if (!info->fix.smem_len) {
+                printk(KERN_ERR "fb: Can't count %s memory.\n", info->fix.id);
                 goto out_err_regbase;
         }
 
-        if (!request_mem_region(tdfx_fix.smem_start,
+        if (!request_mem_region(info->fix.smem_start,
                                 pci_resource_len(pdev, 1), "tdfx smem")) {
                 printk(KERN_ERR "tdfxfb: Can't reserve smem\n");
                 goto out_err_regbase;
         }
 
-        info->screen_base = ioremap_nocache(tdfx_fix.smem_start,
-                                            tdfx_fix.smem_len);
+        info->screen_base = ioremap_nocache(info->fix.smem_start,
+                                            info->fix.smem_len);
         if (!info->screen_base) {
                 printk(KERN_ERR "fb: Can't remap %s framebuffer.\n",
-                                tdfx_fix.id);
+                                info->fix.id);
                 goto out_err_screenbase;
         }
 
@@ -1257,20 +1258,19 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
                 goto out_err_screenbase;
         }
 
-        printk(KERN_INFO "fb: %s memory = %dK\n", tdfx_fix.id,
-                        tdfx_fix.smem_len >> 10);
+        printk(KERN_INFO "fb: %s memory = %dK\n", info->fix.id,
+                        info->fix.smem_len >> 10);
 
         default_par->mtrr_handle = -1;
         if (!nomtrr)
                 default_par->mtrr_handle =
-                        mtrr_add(tdfx_fix.smem_start, tdfx_fix.smem_len,
+                        mtrr_add(info->fix.smem_start, info->fix.smem_len,
                                  MTRR_TYPE_WRCOMB, 1);
 
-        tdfx_fix.ypanstep       = nopan ? 0 : 1;
-        tdfx_fix.ywrapstep      = nowrap ? 0 : 1;
+        info->fix.ypanstep      = nopan ? 0 : 1;
+        info->fix.ywrapstep     = nowrap ? 0 : 1;
 
         info->fbops             = &tdfxfb_ops;
-        info->fix               = tdfx_fix;
         info->pseudo_palette    = default_par->palette;
         info->flags             = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
 #ifdef CONFIG_FB_3DFX_ACCEL
@@ -1323,14 +1323,14 @@ out_err_iobase:
 out_err_screenbase:
         if (info->screen_base)
                 iounmap(info->screen_base);
-        release_mem_region(tdfx_fix.smem_start, pci_resource_len(pdev, 1));
+        release_mem_region(info->fix.smem_start, pci_resource_len(pdev, 1));
 out_err_regbase:
         /*
          * Cleanup after anything that was remapped/allocated.
          */
         if (default_par->regbase_virt)
                 iounmap(default_par->regbase_virt);
-        release_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
+        release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
 out_err:
         framebuffer_release(info);
         return -ENXIO;
diff --git a/drivers/video/tmiofb.c b/drivers/video/tmiofb.c
new file mode 100644
index 000000000000..2a380011e9ba
--- /dev/null
+++ b/drivers/video/tmiofb.c
@@ -0,0 +1,1050 @@
+/*
+ * Frame Buffer Device for Toshiba Mobile IO(TMIO) controller
+ *
+ * Copyright(C) 2005-2006 Chris Humbert
+ * Copyright(C) 2005 Dirk Opfer
+ * Copytight(C) 2007,2008 Dmitry Baryshkov
+ *
+ * Based on:
+ *      drivers/video/w100fb.c
+ *      code written by Sharp/Lineo for 2.4 kernels
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation;
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/fb.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+/* Why should fb driver call console functions? because acquire_console_sem() */
+#include <linux/console.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/tmio.h>
+#include <linux/uaccess.h>
+
+/*
+ * accelerator commands
+ */
+#define TMIOFB_ACC_CSADR(x)     (0x00000000 | ((x) & 0x001ffffe))
+#define TMIOFB_ACC_CHPIX(x)     (0x01000000 | ((x) & 0x000003ff))
+#define TMIOFB_ACC_CVPIX(x)     (0x02000000 | ((x) & 0x000003ff))
+#define TMIOFB_ACC_PSADR(x)     (0x03000000 | ((x) & 0x00fffffe))
+#define TMIOFB_ACC_PHPIX(x)     (0x04000000 | ((x) & 0x000003ff))
+#define TMIOFB_ACC_PVPIX(x)     (0x05000000 | ((x) & 0x000003ff))
+#define TMIOFB_ACC_PHOFS(x)     (0x06000000 | ((x) & 0x000003ff))
+#define TMIOFB_ACC_PVOFS(x)     (0x07000000 | ((x) & 0x000003ff))
+#define TMIOFB_ACC_POADR(x)     (0x08000000 | ((x) & 0x00fffffe))
+#define TMIOFB_ACC_RSTR(x)      (0x09000000 | ((x) & 0x000000ff))
+#define TMIOFB_ACC_TCLOR(x)     (0x0A000000 | ((x) & 0x0000ffff))
+#define TMIOFB_ACC_FILL(x)      (0x0B000000 | ((x) & 0x0000ffff))
+#define TMIOFB_ACC_DSADR(x)     (0x0C000000 | ((x) & 0x00fffffe))
+#define TMIOFB_ACC_SSADR(x)     (0x0D000000 | ((x) & 0x00fffffe))
+#define TMIOFB_ACC_DHPIX(x)     (0x0E000000 | ((x) & 0x000003ff))
+#define TMIOFB_ACC_DVPIX(x)     (0x0F000000 | ((x) & 0x000003ff))
+#define TMIOFB_ACC_SHPIX(x)     (0x10000000 | ((x) & 0x000003ff))
+#define TMIOFB_ACC_SVPIX(x)     (0x11000000 | ((x) & 0x000003ff))
+#define TMIOFB_ACC_LBINI(x)     (0x12000000 | ((x) & 0x0000ffff))
+#define TMIOFB_ACC_LBK2(x)      (0x13000000 | ((x) & 0x0000ffff))
+#define TMIOFB_ACC_SHBINI(x)    (0x14000000 | ((x) & 0x0000ffff))
+#define TMIOFB_ACC_SHBK2(x)     (0x15000000 | ((x) & 0x0000ffff))
+#define TMIOFB_ACC_SVBINI(x)    (0x16000000 | ((x) & 0x0000ffff))
+#define TMIOFB_ACC_SVBK2(x)     (0x17000000 | ((x) & 0x0000ffff))
+
+#define TMIOFB_ACC_CMGO         0x20000000
+#define TMIOFB_ACC_CMGO_CEND    0x00000001
+#define TMIOFB_ACC_CMGO_INT     0x00000002
+#define TMIOFB_ACC_CMGO_CMOD    0x00000010
+#define TMIOFB_ACC_CMGO_CDVRV   0x00000020
+#define TMIOFB_ACC_CMGO_CDHRV   0x00000040
+#define TMIOFB_ACC_CMGO_RUND    0x00008000
+#define TMIOFB_ACC_SCGO         0x21000000
+#define TMIOFB_ACC_SCGO_CEND    0x00000001
+#define TMIOFB_ACC_SCGO_INT     0x00000002
+#define TMIOFB_ACC_SCGO_ROP3    0x00000004
+#define TMIOFB_ACC_SCGO_TRNS    0x00000008
+#define TMIOFB_ACC_SCGO_DVRV    0x00000010
+#define TMIOFB_ACC_SCGO_DHRV    0x00000020
+#define TMIOFB_ACC_SCGO_SVRV    0x00000040
+#define TMIOFB_ACC_SCGO_SHRV    0x00000080
+#define TMIOFB_ACC_SCGO_DSTXY   0x00008000
+#define TMIOFB_ACC_SBGO         0x22000000
+#define TMIOFB_ACC_SBGO_CEND    0x00000001
+#define TMIOFB_ACC_SBGO_INT     0x00000002
+#define TMIOFB_ACC_SBGO_DVRV    0x00000010
+#define TMIOFB_ACC_SBGO_DHRV    0x00000020
+#define TMIOFB_ACC_SBGO_SVRV    0x00000040
+#define TMIOFB_ACC_SBGO_SHRV    0x00000080
+#define TMIOFB_ACC_SBGO_SBMD    0x00000100
+#define TMIOFB_ACC_FLGO         0x23000000
+#define TMIOFB_ACC_FLGO_CEND    0x00000001
+#define TMIOFB_ACC_FLGO_INT     0x00000002
+#define TMIOFB_ACC_FLGO_ROP3    0x00000004
+#define TMIOFB_ACC_LDGO         0x24000000
+#define TMIOFB_ACC_LDGO_CEND    0x00000001
+#define TMIOFB_ACC_LDGO_INT     0x00000002
+#define TMIOFB_ACC_LDGO_ROP3    0x00000004
+#define TMIOFB_ACC_LDGO_ENDPX   0x00000008
+#define TMIOFB_ACC_LDGO_LVRV    0x00000010
+#define TMIOFB_ACC_LDGO_LHRV    0x00000020
+#define TMIOFB_ACC_LDGO_LDMOD   0x00000040
+
+/* a FIFO is always allocated, even if acceleration is not used */
+#define TMIOFB_FIFO_SIZE        512
+
+/*
+ * LCD Host Controller Configuration Register
+ *
+ * This iomem area supports only 16-bit IO.
+ */
+#define CCR_CMD                 0x04 /* Command                         */
+#define CCR_REVID               0x08 /* Revision ID                     */
+#define CCR_BASEL               0x10 /* LCD Control Reg Base Addr Low   */
+#define CCR_BASEH               0x12 /* LCD Control Reg Base Addr High  */
+#define CCR_UGCC                0x40 /* Unified Gated Clock Control     */
+#define CCR_GCC                 0x42 /* Gated Clock Control             */
+#define CCR_USC                 0x50 /* Unified Software Clear          */
+#define CCR_VRAMRTC             0x60 /* VRAM Timing Control             */
+                                /* 0x61 VRAM Refresh Control            */
+#define CCR_VRAMSAC             0x62 /* VRAM Access Control             */
+                                /* 0x63 VRAM Status                     */
+#define CCR_VRAMBC              0x64 /* VRAM Block Control              */
+
+/*
+ * LCD Control Register
+ *
+ * This iomem area supports only 16-bit IO.
+ */
+#define LCR_UIS                 0x000 /* Unified Interrupt Status       */
+#define LCR_VHPN                0x008 /* VRAM Horizontal Pixel Number   */
+#define LCR_CFSAL               0x00a /* Command FIFO Start Address Low */
+#define LCR_CFSAH               0x00c /* Command FIFO Start Address High */
+#define LCR_CFS                 0x00e /* Command FIFO Size              */
+#define LCR_CFWS                0x010 /* Command FIFO Writeable Size    */
+#define LCR_BBIE                0x012 /* BitBLT Interrupt Enable        */
+#define LCR_BBISC               0x014 /* BitBLT Interrupt Status and Clear */
+#define LCR_CCS                 0x016 /* Command Count Status           */
+#define LCR_BBES                0x018 /* BitBLT Execution Status        */
+#define LCR_CMDL                0x01c /* Command Low                    */
+#define LCR_CMDH                0x01e /* Command High                   */
+#define LCR_CFC                 0x022 /* Command FIFO Clear             */
+#define LCR_CCIFC               0x024 /* CMOS Camera IF Control         */
+#define LCR_HWT                 0x026 /* Hardware Test                  */
+#define LCR_LCDCCRC             0x100 /* LCDC Clock and Reset Control   */
+#define LCR_LCDCC               0x102 /* LCDC Control                   */
+#define LCR_LCDCOPC             0x104 /* LCDC Output Pin Control        */
+#define LCR_LCDIS               0x108 /* LCD Interrupt Status           */
+#define LCR_LCDIM               0x10a /* LCD Interrupt Mask             */
+#define LCR_LCDIE               0x10c /* LCD Interrupt Enable           */
+#define LCR_GDSAL               0x122 /* Graphics Display Start Address Low */
+#define LCR_GDSAH               0x124 /* Graphics Display Start Address High */
+#define LCR_VHPCL               0x12a /* VRAM Horizontal Pixel Count Low */
+#define LCR_VHPCH               0x12c /* VRAM Horizontal Pixel Count High */
+#define LCR_GM                  0x12e /* Graphic Mode(VRAM access enable) */
+#define LCR_HT                  0x140 /* Horizontal Total               */
+#define LCR_HDS                 0x142 /* Horizontal Display Start       */
+#define LCR_HSS                 0x144 /* H-Sync Start                   */
+#define LCR_HSE                 0x146 /* H-Sync End                     */
+#define LCR_HNP                 0x14c /* Horizontal Number of Pixels    */
+#define LCR_VT                  0x150 /* Vertical Total                 */
+#define LCR_VDS                 0x152 /* Vertical Display Start         */
+#define LCR_VSS                 0x154 /* V-Sync Start                   */
+#define LCR_VSE                 0x156 /* V-Sync End                     */
+#define LCR_CDLN                0x160 /* Current Display Line Number    */
+#define LCR_ILN                 0x162 /* Interrupt Line Number          */
+#define LCR_SP                  0x164 /* Sync Polarity                  */
+#define LCR_MISC                0x166 /* MISC(RGB565 mode)              */
+#define LCR_VIHSS               0x16a /* Video Interface H-Sync Start   */
+#define LCR_VIVS                0x16c /* Video Interface Vertical Start */
+#define LCR_VIVE                0x16e /* Video Interface Vertical End   */
+#define LCR_VIVSS               0x170 /* Video Interface V-Sync Start   */
+#define LCR_VCCIS               0x17e /* Video / CMOS Camera Interface Select */
+#define LCR_VIDWSAL             0x180 /* VI Data Write Start Address Low */
+#define LCR_VIDWSAH             0x182 /* VI Data Write Start Address High */
+#define LCR_VIDRSAL             0x184 /* VI Data Read Start Address Low */
+#define LCR_VIDRSAH             0x186 /* VI Data Read Start Address High */
+#define LCR_VIPDDST             0x188 /* VI Picture Data Display Start Timing */
+#define LCR_VIPDDET             0x186 /* VI Picture Data Display End Timing */
+#define LCR_VIE                 0x18c /* Video Interface Enable         */
+#define LCR_VCS                 0x18e /* Video/Camera Select            */
+#define LCR_VPHWC               0x194 /* Video Picture Horizontal Wait Count */
+#define LCR_VPHS                0x196 /* Video Picture Horizontal Size  */
+#define LCR_VPVWC               0x198 /* Video Picture Vertical Wait Count */
+#define LCR_VPVS                0x19a /* Video Picture Vertical Size    */
+#define LCR_PLHPIX              0x1a0 /* PLHPIX                         */
+#define LCR_XS                  0x1a2 /* XStart                         */
+#define LCR_XCKHW               0x1a4 /* XCK High Width                 */
+#define LCR_STHS                0x1a8 /* STH Start                      */
+#define LCR_VT2                 0x1aa /* Vertical Total                 */
+#define LCR_YCKSW               0x1ac /* YCK Start Wait                 */
+#define LCR_YSTS                0x1ae /* YST Start                      */
+#define LCR_PPOLS               0x1b0 /* #PPOL Start                    */
+#define LCR_PRECW               0x1b2 /* PREC Width                     */
+#define LCR_VCLKHW              0x1b4 /* VCLK High Width                */
+#define LCR_OC                  0x1b6 /* Output Control                 */
+
+static char *mode_option __devinitdata;
+
+struct tmiofb_par {
+        u32                             pseudo_palette[16];
+
+#ifdef CONFIG_FB_TMIO_ACCELL
+        wait_queue_head_t               wait_acc;
+        bool                            use_polling;
+#endif
+
+        void __iomem                    *ccr;
+        void __iomem                    *lcr;
+};
+
+/*--------------------------------------------------------------------------*/
+
+/*
+ * reasons for an interrupt:
+ *      uis     bbisc   lcdis
+ *      0100    0001    accelerator command completed
+ *      2000    0001    vsync start
+ *      2000    0002    display start
+ *      2000    0004    line number match(0x1ff mask???)
+ */
+static irqreturn_t tmiofb_irq(int irq, void *__info)
+{
+        struct fb_info *info = __info;
+        struct tmiofb_par *par = info->par;
+        unsigned int bbisc = tmio_ioread16(par->lcr + LCR_BBISC);
+
+
+        /*
+         * We were in polling mode and now we got correct irq.
+         * Switch back to IRQ-based sync of command FIFO
+         */
+        if (unlikely(par->use_polling && irq != -1)) {
+                printk(KERN_INFO "tmiofb: switching to waitq\n");
+                par->use_polling = false;
+        }
+
+        tmio_iowrite16(bbisc, par->lcr + LCR_BBISC);
+
+#ifdef CONFIG_FB_TMIO_ACCELL
+        if (bbisc & 1)
+                wake_up(&par->wait_acc);
+#endif
+
+        return IRQ_HANDLED;
+}
+
+
+/*--------------------------------------------------------------------------*/
+
+
+/*
+ * Turns off the LCD controller and LCD host controller.
+ */
+static int tmiofb_hw_stop(struct platform_device *dev)
+{
+        struct mfd_cell *cell = dev->dev.platform_data;
+        struct tmio_fb_data *data = cell->driver_data;
+        struct fb_info *info = platform_get_drvdata(dev);
+        struct tmiofb_par *par = info->par;
+
+        tmio_iowrite16(0, par->ccr + CCR_UGCC);
+        tmio_iowrite16(0, par->lcr + LCR_GM);
+        data->lcd_set_power(dev, 0);
+        tmio_iowrite16(0x0010, par->lcr + LCR_LCDCCRC);
+
+        return 0;
+}
+
+/*
+ * Initializes the LCD host controller.
+ */
+static int tmiofb_hw_init(struct platform_device *dev)
+{
+        struct mfd_cell *cell = dev->dev.platform_data;
+        struct fb_info *info = platform_get_drvdata(dev);
+        struct tmiofb_par *par = info->par;
+        const struct resource *nlcr = &cell->resources[0];
+        const struct resource *vram = &cell->resources[2];
+        unsigned long base;
+
+        if (nlcr == NULL || vram == NULL)
+                return -EINVAL;
+
+        base = nlcr->start;
+
+        tmio_iowrite16(0x003a, par->ccr + CCR_UGCC);
+        tmio_iowrite16(0x003a, par->ccr + CCR_GCC);
+        tmio_iowrite16(0x3f00, par->ccr + CCR_USC);
+
+        msleep(2); /* wait for device to settle */
+
+        tmio_iowrite16(0x0000, par->ccr + CCR_USC);
+        tmio_iowrite16(base >> 16, par->ccr + CCR_BASEH);
+        tmio_iowrite16(base, par->ccr + CCR_BASEL);
+        tmio_iowrite16(0x0002, par->ccr + CCR_CMD); /* base address enable */
+        tmio_iowrite16(0x40a8, par->ccr + CCR_VRAMRTC); /* VRAMRC, VRAMTC */
+        tmio_iowrite16(0x0018, par->ccr + CCR_VRAMSAC); /* VRAMSTS, VRAMAC */
+        tmio_iowrite16(0x0002, par->ccr + CCR_VRAMBC);
+        msleep(2); /* wait for device to settle */
+        tmio_iowrite16(0x000b, par->ccr + CCR_VRAMBC);
+
+        base = vram->start + info->screen_size;
+        tmio_iowrite16(base >> 16, par->lcr + LCR_CFSAH);
+        tmio_iowrite16(base, par->lcr + LCR_CFSAL);
+        tmio_iowrite16(TMIOFB_FIFO_SIZE - 1, par->lcr + LCR_CFS);
+        tmio_iowrite16(1, par->lcr + LCR_CFC);
+        tmio_iowrite16(1, par->lcr + LCR_BBIE);
+        tmio_iowrite16(0, par->lcr + LCR_CFWS);
+
+        return 0;
+}
+
+/*
+ * Sets the LCD controller's output resolution and pixel clock
+ */
+static void tmiofb_hw_mode(struct platform_device *dev)
+{
+        struct mfd_cell *cell = dev->dev.platform_data;
+        struct tmio_fb_data *data = cell->driver_data;
+        struct fb_info *info = platform_get_drvdata(dev);
+        struct fb_videomode *mode = info->mode;
+        struct tmiofb_par *par = info->par;
+        unsigned int i;
+
+        tmio_iowrite16(0, par->lcr + LCR_GM);
+        data->lcd_set_power(dev, 0);
+        tmio_iowrite16(0x0010, par->lcr + LCR_LCDCCRC);
+        data->lcd_mode(dev, mode);
+        data->lcd_set_power(dev, 1);
+
+        tmio_iowrite16(info->fix.line_length, par->lcr + LCR_VHPN);
+        tmio_iowrite16(0, par->lcr + LCR_GDSAH);
+        tmio_iowrite16(0, par->lcr + LCR_GDSAL);
+        tmio_iowrite16(info->fix.line_length >> 16, par->lcr + LCR_VHPCH);
+        tmio_iowrite16(info->fix.line_length, par->lcr + LCR_VHPCL);
+        tmio_iowrite16(i = 0, par->lcr + LCR_HSS);
+        tmio_iowrite16(i += mode->hsync_len, par->lcr + LCR_HSE);
+        tmio_iowrite16(i += mode->left_margin, par->lcr + LCR_HDS);
+        tmio_iowrite16(i += mode->xres + mode->right_margin, par->lcr + LCR_HT);
+        tmio_iowrite16(mode->xres, par->lcr + LCR_HNP);
+        tmio_iowrite16(i = 0, par->lcr + LCR_VSS);
+        tmio_iowrite16(i += mode->vsync_len, par->lcr + LCR_VSE);
+        tmio_iowrite16(i += mode->upper_margin, par->lcr + LCR_VDS);
+        tmio_iowrite16(i += mode->yres, par->lcr + LCR_ILN);
+        tmio_iowrite16(i += mode->lower_margin, par->lcr + LCR_VT);
+        tmio_iowrite16(3, par->lcr + LCR_MISC); /* RGB565 mode */
+        tmio_iowrite16(1, par->lcr + LCR_GM); /* VRAM enable */
+        tmio_iowrite16(0x4007, par->lcr + LCR_LCDCC);
+        tmio_iowrite16(3, par->lcr + LCR_SP);  /* sync polarity */
+
+        tmio_iowrite16(0x0010, par->lcr + LCR_LCDCCRC);
+        msleep(5); /* wait for device to settle */
+        tmio_iowrite16(0x0014, par->lcr + LCR_LCDCCRC); /* STOP_CKP */
+        msleep(5); /* wait for device to settle */
+        tmio_iowrite16(0x0015, par->lcr + LCR_LCDCCRC); /* STOP_CKP|SOFT_RESET*/
+        tmio_iowrite16(0xfffa, par->lcr + LCR_VCS);
+}
+
+/*--------------------------------------------------------------------------*/
+
+#ifdef CONFIG_FB_TMIO_ACCELL
+static int __must_check
+tmiofb_acc_wait(struct fb_info *info, unsigned int ccs)
+{
+        struct tmiofb_par *par = info->par;
+        /*
+         * This code can be called whith interrupts disabled.
+         * So instead of relaying on irq to trigger the event,
+         * poll the state till the necessary command is executed.
+         */
+        if (irqs_disabled() || par->use_polling) {
+                int i = 0;
+                while (tmio_ioread16(par->lcr + LCR_CCS) > ccs) {
+                        udelay(1);
+                        i++;
+                        if (i > 10000) {
+                                pr_err("tmiofb: timeout waiting for %d\n",
+                                                ccs);
+                                return -ETIMEDOUT;
+                        }
+                        tmiofb_irq(-1, info);
+                }
+        } else {
+                if (!wait_event_interruptible_timeout(par->wait_acc,
+                                tmio_ioread16(par->lcr + LCR_CCS) <= ccs,
+                                1000)) {
+                        pr_err("tmiofb: timeout waiting for %d\n", ccs);
+                        return -ETIMEDOUT;
+                }
+        }
+
+        return 0;
+}
+
+/*
+ * Writes an accelerator command to the accelerator's FIFO.
+ */
+static int
+tmiofb_acc_write(struct fb_info *info, const u32 *cmd, unsigned int count)
+{
+        struct tmiofb_par *par = info->par;
+        int ret;
+
+        ret = tmiofb_acc_wait(info, TMIOFB_FIFO_SIZE - count);
+        if (ret)
+                return ret;
+
+        for (; count; count--, cmd++) {
+                tmio_iowrite16(*cmd >> 16, par->lcr + LCR_CMDH);
+                tmio_iowrite16(*cmd, par->lcr + LCR_CMDL);
+        }
+
+        return ret;
+}
+
+/*
+ * Wait for the accelerator to finish its operations before writing
+ * to the framebuffer for consistent display output.
+ */
+static int tmiofb_sync(struct fb_info *fbi)
+{
+        struct tmiofb_par *par = fbi->par;
+
+        int ret;
+        int i = 0;
+
+        ret = tmiofb_acc_wait(fbi, 0);
+
+        while (tmio_ioread16(par->lcr + LCR_BBES) & 2) { /* blit active */
+                udelay(1);
+                i++ ;
+                if (i > 10000) {
+                        printk(KERN_ERR "timeout waiting for blit to end!\n");
+                        return -ETIMEDOUT;
+                }
+        }
+
+        return ret;
+}
+
+static void
+tmiofb_fillrect(struct fb_info *fbi, const struct fb_fillrect *rect)
+{
+        const u32 cmd[] = {
+                TMIOFB_ACC_DSADR((rect->dy * fbi->mode->xres + rect->dx) * 2),
+                TMIOFB_ACC_DHPIX(rect->width - 1),
+                TMIOFB_ACC_DVPIX(rect->height - 1),
+                TMIOFB_ACC_FILL(rect->color),
+                TMIOFB_ACC_FLGO,
+        };
+
+        if (fbi->state != FBINFO_STATE_RUNNING ||
+            fbi->flags & FBINFO_HWACCEL_DISABLED) {
+                cfb_fillrect(fbi, rect);
+                return;
+        }
+
+        tmiofb_acc_write(fbi, cmd, ARRAY_SIZE(cmd));
+}
+
+static void
+tmiofb_copyarea(struct fb_info *fbi, const struct fb_copyarea *area)
+{
+        const u32 cmd[] = {
+                TMIOFB_ACC_DSADR((area->dy * fbi->mode->xres + area->dx) * 2),
+                TMIOFB_ACC_DHPIX(area->width - 1),
+                TMIOFB_ACC_DVPIX(area->height - 1),
+                TMIOFB_ACC_SSADR((area->sy * fbi->mode->xres + area->sx) * 2),
+                TMIOFB_ACC_SCGO,
+        };
+
+        if (fbi->state != FBINFO_STATE_RUNNING ||
+            fbi->flags & FBINFO_HWACCEL_DISABLED) {
+                cfb_copyarea(fbi, area);
+                return;
+        }
+
+        tmiofb_acc_write(fbi, cmd, ARRAY_SIZE(cmd));
+}
+#endif
+
+static void tmiofb_clearscreen(struct fb_info *info)
+{
+        const struct fb_fillrect rect = {
+                .dx     = 0,
+                .dy     = 0,
+                .width  = info->mode->xres,
+                .height = info->mode->yres,
+                .color  = 0,
+                .rop    = ROP_COPY,
+        };
+
+        info->fbops->fb_fillrect(info, &rect);
+}
+
+static int tmiofb_vblank(struct fb_info *fbi, struct fb_vblank *vblank)
+{
+        struct tmiofb_par *par = fbi->par;
+        struct fb_videomode *mode = fbi->mode;
+        unsigned int vcount = tmio_ioread16(par->lcr + LCR_CDLN);
+        unsigned int vds = mode->vsync_len + mode->upper_margin;
+
+        vblank->vcount = vcount;
+        vblank->flags = FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_VCOUNT
+                                                | FB_VBLANK_HAVE_VSYNC;
+
+        if (vcount < mode->vsync_len)
+                vblank->flags |= FB_VBLANK_VSYNCING;
+
+        if (vcount < vds || vcount > vds + mode->yres)
+                vblank->flags |= FB_VBLANK_VBLANKING;
+
+        return 0;
+}
+
+
+static int tmiofb_ioctl(struct fb_info *fbi,
+                unsigned int cmd, unsigned long arg)
+{
+        switch (cmd) {
+        case FBIOGET_VBLANK: {
+                struct fb_vblank vblank = {0};
+                void __user *argp = (void __user *) arg;
+
+                tmiofb_vblank(fbi, &vblank);
+                if (copy_to_user(argp, &vblank, sizeof vblank))
+                        return -EFAULT;
+                return 0;
+        }
+
+#ifdef CONFIG_FB_TMIO_ACCELL
+        case FBIO_TMIO_ACC_SYNC:
+                tmiofb_sync(fbi);
+                return 0;
+
+        case FBIO_TMIO_ACC_WRITE: {
+                u32 __user *argp = (void __user *) arg;
+                u32 len;
+                u32 acc[16];
+
+                if (get_user(len, argp))
+                        return -EFAULT;
+                if (len > ARRAY_SIZE(acc))
+                        return -EINVAL;
+                if (copy_from_user(acc, argp + 1, sizeof(u32) * len))
+                        return -EFAULT;
+
+                return tmiofb_acc_write(fbi, acc, len);
+        }
+#endif
+        }
+
+        return -ENOTTY;
+}
+
+/*--------------------------------------------------------------------------*/
+
+/* Select the smallest mode that allows the desired resolution to be
+ * displayed.  If desired, the x and y parameters can be rounded up to
+ * match the selected mode.
+ */
+static struct fb_videomode *
+tmiofb_find_mode(struct fb_info *info, struct fb_var_screeninfo *var)
+{
+        struct mfd_cell *cell =
+                info->device->platform_data;
+        struct tmio_fb_data *data = cell->driver_data;
+        struct fb_videomode *best = NULL;
+        int i;
+
+        for (i = 0; i < data->num_modes; i++) {
+                struct fb_videomode *mode = data->modes + i;
+
+                if (mode->xres >= var->xres && mode->yres >= var->yres
+                                && (!best || (mode->xres < best->xres
+                                           && mode->yres < best->yres)))
+                        best = mode;
+        }
+
+        return best;
+}
+
+static int tmiofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
+{
+
+        struct fb_videomode *mode;
+        struct mfd_cell *cell =
+                info->device->platform_data;
+        struct tmio_fb_data *data = cell->driver_data;
+
+        mode = tmiofb_find_mode(info, var);
+        if (!mode || var->bits_per_pixel > 16)
+                return -EINVAL;
+
+        fb_videomode_to_var(var, mode);
+
+        var->xres_virtual = mode->xres;
+        var->yres_virtual = info->screen_size / (mode->xres * 2);
+
+        if (var->yres_virtual < var->yres)
+                return -EINVAL;
+
+        var->xoffset = 0;
+        var->yoffset = 0;
+        var->bits_per_pixel = 16;
+        var->grayscale = 0;
+        var->red.offset = 11;
+        var->red.length = 5;
+        var->green.offset = 5;
+        var->green.length = 6;
+        var->blue.offset = 0;
+        var->blue.length = 5;
+        var->transp.offset = 0;
+        var->transp.length = 0;
+        var->nonstd = 0;
+        var->height = data->height; /* mm */
+        var->width = data->width; /* mm */
+        var->rotate = 0;
+        return 0;
+}
+
+static int tmiofb_set_par(struct fb_info *info)
+{
+        struct fb_var_screeninfo *var = &info->var;
+        struct fb_videomode *mode;
+
+        mode = tmiofb_find_mode(info, var);
+        if (!mode)
+                return -EINVAL;
+
+        info->mode = mode;
+        info->fix.line_length = info->mode->xres *
+                        var->bits_per_pixel / 8;
+
+        tmiofb_hw_mode(to_platform_device(info->device));
+        tmiofb_clearscreen(info);
+        return 0;
+}
+
+static int tmiofb_setcolreg(unsigned regno, unsigned red, unsigned green,
+                           unsigned blue, unsigned transp,
+                           struct fb_info *info)
+{
+        struct tmiofb_par *par = info->par;
+
+        if (regno < ARRAY_SIZE(par->pseudo_palette)) {
+                par->pseudo_palette[regno] =
+                        ((red & 0xf800)) |
+                        ((green & 0xfc00) >>  5) |
+                        ((blue & 0xf800) >> 11);
+                return 0;
+        }
+
+        return -EINVAL;
+}
+
+static int tmiofb_blank(int blank, struct fb_info *info)
+{
+        /*
+         * everything is done in lcd/bl drivers.
+         * this is purely to make sysfs happy and work.
+         */
+        return 0;
+}
+
+static struct fb_ops tmiofb_ops = {
+        .owner          = THIS_MODULE,
+
+        .fb_ioctl       = tmiofb_ioctl,
+        .fb_check_var   = tmiofb_check_var,
+        .fb_set_par     = tmiofb_set_par,
+        .fb_setcolreg   = tmiofb_setcolreg,
+        .fb_blank       = tmiofb_blank,
+        .fb_imageblit   = cfb_imageblit,
+#ifdef CONFIG_FB_TMIO_ACCELL
+        .fb_sync        = tmiofb_sync,
+        .fb_fillrect    = tmiofb_fillrect,
+        .fb_copyarea    = tmiofb_copyarea,
+#else
+        .fb_fillrect    = cfb_fillrect,
+        .fb_copyarea    = cfb_copyarea,
+#endif
+};
+
+/*--------------------------------------------------------------------------*/
+
+static int __devinit tmiofb_probe(struct platform_device *dev)
+{
+        struct mfd_cell *cell = dev->dev.platform_data;
+        struct tmio_fb_data *data = cell->driver_data;
+        struct resource *ccr = platform_get_resource(dev, IORESOURCE_MEM, 1);
+        struct resource *lcr = platform_get_resource(dev, IORESOURCE_MEM, 0);
+        struct resource *vram = platform_get_resource(dev, IORESOURCE_MEM, 2);
+        int irq = platform_get_irq(dev, 0);
+        struct fb_info *info;
+        struct tmiofb_par *par;
+        int retval;
+
+        /*
+         * This is the only way ATM to disable the fb
+         */
+        if (data == NULL) {
+                dev_err(&dev->dev, "NULL platform data!\n");
+                return -EINVAL;
+        }
+
+        info = framebuffer_alloc(sizeof(struct tmiofb_par), &dev->dev);
+
+        if (!info)
+                return -ENOMEM;
+
+        par = info->par;
+
+#ifdef CONFIG_FB_TMIO_ACCELL
+        init_waitqueue_head(&par->wait_acc);
+
+        par->use_polling = true;
+
+        info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA
+                        | FBINFO_HWACCEL_FILLRECT;
+#else
+        info->flags = FBINFO_DEFAULT;
+#endif
+
+        info->fbops = &tmiofb_ops;
+
+        strcpy(info->fix.id, "tmio-fb");
+        info->fix.smem_start = vram->start;
+        info->fix.smem_len = resource_size(vram);
+        info->fix.type = FB_TYPE_PACKED_PIXELS;
+        info->fix.visual = FB_VISUAL_TRUECOLOR;
+        info->fix.mmio_start = lcr->start;
+        info->fix.mmio_len = resource_size(lcr);
+        info->fix.accel = FB_ACCEL_NONE;
+        info->screen_size = info->fix.smem_len - (4 * TMIOFB_FIFO_SIZE);
+        info->pseudo_palette = par->pseudo_palette;
+
+        par->ccr = ioremap(ccr->start, resource_size(ccr));
+        if (!par->ccr) {
+                retval = -ENOMEM;
+                goto err_ioremap_ccr;
+        }
+
+        par->lcr = ioremap(info->fix.mmio_start, info->fix.mmio_len);
+        if (!par->lcr) {
+                retval = -ENOMEM;
+                goto err_ioremap_lcr;
+        }
+
+        info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
+        if (!info->screen_base) {
+                retval = -ENOMEM;
+                goto err_ioremap_vram;
+        }
+
+        retval = request_irq(irq, &tmiofb_irq, IRQF_DISABLED,
+                                        dev->dev.bus_id, info);
+
+        if (retval)
+                goto err_request_irq;
+
+        platform_set_drvdata(dev, info);
+
+        retval = fb_find_mode(&info->var, info, mode_option,
+                        data->modes, data->num_modes,
+                        data->modes, 16);
+        if (!retval) {
+                retval = -EINVAL;
+                goto err_find_mode;
+        }
+
+        if (cell->enable) {
+                retval = cell->enable(dev);
+                if (retval)
+                        goto err_enable;
+        }
+
+        retval = tmiofb_hw_init(dev);
+        if (retval)
+                goto err_hw_init;
+
+        fb_videomode_to_modelist(data->modes, data->num_modes,
+                                 &info->modelist);
+
+        retval = register_framebuffer(info);
+        if (retval < 0)
+                goto err_register_framebuffer;
+
+        printk(KERN_INFO "fb%d: %s frame buffer device\n",
+                                info->node, info->fix.id);
+
+        return 0;
+
+err_register_framebuffer:
+/*err_set_par:*/
+        tmiofb_hw_stop(dev);
+err_hw_init:
+        if (cell->disable)
+                cell->disable(dev);
+err_enable:
+err_find_mode:
+        platform_set_drvdata(dev, NULL);
+        free_irq(irq, info);
+err_request_irq:
+        iounmap(info->screen_base);
+err_ioremap_vram:
+        iounmap(par->lcr);
+err_ioremap_lcr:
+        iounmap(par->ccr);
+err_ioremap_ccr:
+        framebuffer_release(info);
+        return retval;
+}
+
+static int __devexit tmiofb_remove(struct platform_device *dev)
+{
+        struct mfd_cell *cell = dev->dev.platform_data;
+        struct fb_info *info = platform_get_drvdata(dev);
+        int irq = platform_get_irq(dev, 0);
+        struct tmiofb_par *par;
+
+        if (info) {
+                par = info->par;
+                unregister_framebuffer(info);
+
+                tmiofb_hw_stop(dev);
+
+                if (cell->disable)
+                        cell->disable(dev);
+
+                platform_set_drvdata(dev, NULL);
+
+                free_irq(irq, info);
+
+                iounmap(info->screen_base);
+                iounmap(par->lcr);
+                iounmap(par->ccr);
+
+                framebuffer_release(info);
+        }
+
+        return 0;
+}
+
+#ifdef DEBUG
+static void tmiofb_dump_regs(struct platform_device *dev)
+{
+        struct fb_info *info = platform_get_drvdata(dev);
+        struct tmiofb_par *par = info->par;
+
+        printk(KERN_DEBUG "lhccr:\n");
+#define CCR_PR(n)       printk(KERN_DEBUG "\t" #n " = \t%04x\n",\
+                tmio_ioread16(par->ccr + CCR_ ## n));
+        CCR_PR(CMD);
+        CCR_PR(REVID);
+        CCR_PR(BASEL);
+        CCR_PR(BASEH);
+        CCR_PR(UGCC);
+        CCR_PR(GCC);
+        CCR_PR(USC);
+        CCR_PR(VRAMRTC);
+        CCR_PR(VRAMSAC);
+        CCR_PR(VRAMBC);
+#undef CCR_PR
+
+        printk(KERN_DEBUG "lcr: \n");
+#define LCR_PR(n)       printk(KERN_DEBUG "\t" #n " = \t%04x\n",\
+                tmio_ioread16(par->lcr + LCR_ ## n));
+        LCR_PR(UIS);
+        LCR_PR(VHPN);
+        LCR_PR(CFSAL);
+        LCR_PR(CFSAH);
+        LCR_PR(CFS);
+        LCR_PR(CFWS);
+        LCR_PR(BBIE);
+        LCR_PR(BBISC);
+        LCR_PR(CCS);
+        LCR_PR(BBES);
+        LCR_PR(CMDL);
+        LCR_PR(CMDH);
+        LCR_PR(CFC);
+        LCR_PR(CCIFC);
+        LCR_PR(HWT);
+        LCR_PR(LCDCCRC);
+        LCR_PR(LCDCC);
+        LCR_PR(LCDCOPC);
+        LCR_PR(LCDIS);
+        LCR_PR(LCDIM);
+        LCR_PR(LCDIE);
+        LCR_PR(GDSAL);
+        LCR_PR(GDSAH);
+        LCR_PR(VHPCL);
+        LCR_PR(VHPCH);
+        LCR_PR(GM);
+        LCR_PR(HT);
+        LCR_PR(HDS);
+        LCR_PR(HSS);
+        LCR_PR(HSE);
+        LCR_PR(HNP);
+        LCR_PR(VT);
+        LCR_PR(VDS);
+        LCR_PR(VSS);
+        LCR_PR(VSE);
+        LCR_PR(CDLN);
+        LCR_PR(ILN);
+        LCR_PR(SP);
+        LCR_PR(MISC);
+        LCR_PR(VIHSS);
+        LCR_PR(VIVS);
+        LCR_PR(VIVE);
+        LCR_PR(VIVSS);
+        LCR_PR(VCCIS);
+        LCR_PR(VIDWSAL);
+        LCR_PR(VIDWSAH);
+        LCR_PR(VIDRSAL);
+        LCR_PR(VIDRSAH);
+        LCR_PR(VIPDDST);
+        LCR_PR(VIPDDET);
+        LCR_PR(VIE);
+        LCR_PR(VCS);
+        LCR_PR(VPHWC);
+        LCR_PR(VPHS);
+        LCR_PR(VPVWC);
+        LCR_PR(VPVS);
+        LCR_PR(PLHPIX);
+        LCR_PR(XS);
+        LCR_PR(XCKHW);
+        LCR_PR(STHS);
+        LCR_PR(VT2);
+        LCR_PR(YCKSW);
+        LCR_PR(YSTS);
+        LCR_PR(PPOLS);
+        LCR_PR(PRECW);
+        LCR_PR(VCLKHW);
+        LCR_PR(OC);
+#undef LCR_PR
+}
+#endif
+
+#ifdef CONFIG_PM
+static int tmiofb_suspend(struct platform_device *dev, pm_message_t state)
+{
+        struct fb_info *info = platform_get_drvdata(dev);
+        struct tmiofb_par *par = info->par;
+        struct mfd_cell *cell = dev->dev.platform_data;
+        int retval = 0;
+
+        acquire_console_sem();
+
+        fb_set_suspend(info, 1);
+
+        if (info->fbops->fb_sync)
+                info->fbops->fb_sync(info);
+
+
+        /*
+         * The fb should be usable even if interrupts are disabled (and they are
+         * during suspend/resume). Switch temporary to forced polling.
+         */
+        printk(KERN_INFO "tmiofb: switching to polling\n");
+        par->use_polling = true;
+        tmiofb_hw_stop(dev);
+
+        if (cell->suspend)
+                retval = cell->suspend(dev);
+
+        release_console_sem();
+
+        return retval;
+}
+
+static int tmiofb_resume(struct platform_device *dev)
+{
+        struct fb_info *info = platform_get_drvdata(dev);
+        struct mfd_cell *cell = dev->dev.platform_data;
+        int retval;
+
+        acquire_console_sem();
+
+        if (cell->resume) {
+                retval = cell->resume(dev);
+                if (retval)
+                        goto out;
+        }
+
+        tmiofb_irq(-1, info);
+
+        tmiofb_hw_init(dev);
+
+        tmiofb_hw_mode(dev);
+
+        fb_set_suspend(info, 0);
+out:
+        release_console_sem();
+        return retval;
+}
+#else
+#define tmiofb_suspend  NULL
+#define tmiofb_resume   NULL
+#endif
+
+static struct platform_driver tmiofb_driver = {
+        .driver.name    = "tmio-fb",
+        .driver.owner   = THIS_MODULE,
+        .probe          = tmiofb_probe,
+        .remove         = __devexit_p(tmiofb_remove),
+        .suspend        = tmiofb_suspend,
+        .resume         = tmiofb_resume,
+};
+
+/*--------------------------------------------------------------------------*/
+
+#ifndef MODULE
+static void __init tmiofb_setup(char *options)
+{
+        char *this_opt;
+
+        if (!options || !*options)
+                return;
+
+        while ((this_opt = strsep(&options, ",")) != NULL) {
+                if (!*this_opt)
+                        continue;
+                /*
+                 * FIXME
+                 */
+        }
+}
+#endif
+
+static int __init tmiofb_init(void)
+{
+#ifndef MODULE
+        char *option = NULL;
+
+        if (fb_get_options("tmiofb", &option))
+                return -ENODEV;
+        tmiofb_setup(option);
+#endif
+        return platform_driver_register(&tmiofb_driver);
+}
+
+static void __exit tmiofb_cleanup(void)
+{
+        platform_driver_unregister(&tmiofb_driver);
+}
+
+module_init(tmiofb_init);
+module_exit(tmiofb_cleanup);
+
+MODULE_DESCRIPTION("TMIO framebuffer driver");
+MODULE_AUTHOR("Chris Humbert, Dirk Opfer, Dmitry Baryshkov");
+MODULE_LICENSE("GPL");
diff --git a/drivers/video/uvesafb.c b/drivers/video/uvesafb.c
index 50744229c7a9..6c2d37fdd3b9 100644
--- a/drivers/video/uvesafb.c
+++ b/drivers/video/uvesafb.c
@@ -516,10 +516,12 @@ static int __devinit uvesafb_vbe_getmodes(struct uvesafb_ktask *task,
 
                 err = uvesafb_exec(task);
                 if (err || (task->t.regs.eax & 0xffff) != 0x004f) {
-                        printk(KERN_ERR "uvesafb: Getting mode info block "
+                        printk(KERN_WARNING "uvesafb: Getting mode info block "
                                 "for mode 0x%x failed (eax=0x%x, err=%d)\n",
                                 *mode, (u32)task->t.regs.eax, err);
-                        return -EINVAL;
+                        mode++;
+                        par->vbe_modes_cnt--;
+                        continue;
                 }
 
                 mib = task->buf;
@@ -548,7 +550,10 @@ static int __devinit uvesafb_vbe_getmodes(struct uvesafb_ktask *task,
                         mib->depth = mib->bits_per_pixel;
         }
 
-        return 0;
+        if (par->vbe_modes_cnt > 0)
+                return 0;
+        else
+                return -EINVAL;
 }
 
 /*
diff --git a/drivers/video/vga16fb.c b/drivers/video/vga16fb.c
index e31bca8a0cb2..5b2938903ac2 100644
--- a/drivers/video/vga16fb.c
+++ b/drivers/video/vga16fb.c
@@ -58,7 +58,6 @@ struct vga16fb_par {
                 unsigned char   ClockingMode;     /* Seq-Controller:01h */
         } vga_state;
         struct vgastate state;
-        struct mutex open_lock;
         unsigned int ref_count;
         int palette_blanked, vesa_blanked, mode, isVGA;
         u8 misc, pel_msk, vss, clkdiv;
@@ -286,7 +285,6 @@ static int vga16fb_open(struct fb_info *info, int user)
 {
         struct vga16fb_par *par = info->par;
 
-        mutex_lock(&par->open_lock);
         if (!par->ref_count) {
                 memset(&par->state, 0, sizeof(struct vgastate));
                 par->state.flags = VGA_SAVE_FONTS | VGA_SAVE_MODE |
@@ -294,7 +292,6 @@ static int vga16fb_open(struct fb_info *info, int user)
                 save_vga(&par->state);
         }
         par->ref_count++;
-        mutex_unlock(&par->open_lock);
 
         return 0;
 }
@@ -303,15 +300,12 @@ static int vga16fb_release(struct fb_info *info, int user)
 {
         struct vga16fb_par *par = info->par;
 
-        mutex_lock(&par->open_lock);
-        if (!par->ref_count) {
-                mutex_unlock(&par->open_lock);
+        if (!par->ref_count)
                 return -EINVAL;
-        }
+
         if (par->ref_count == 1)
                 restore_vga(&par->state);
         par->ref_count--;
-        mutex_unlock(&par->open_lock);
 
         return 0;
 }
@@ -1326,7 +1320,6 @@ static int __init vga16fb_probe(struct platform_device *dev)
         printk(KERN_INFO "vga16fb: mapped to 0x%p\n", info->screen_base);
         par = info->par;
 
-        mutex_init(&par->open_lock);
         par->isVGA = screen_info.orig_video_isVGA;
         par->palette_blanked = 0;
         par->vesa_blanked = 0;
diff --git a/drivers/video/via/Makefile b/drivers/video/via/Makefile
new file mode 100644
index 000000000000..e533b4b6aba4
--- /dev/null
+++ b/drivers/video/via/Makefile
@@ -0,0 +1,7 @@
+#
+# Makefile for the VIA framebuffer driver (for Linux Kernel 2.6)
+#
+
+obj-$(CONFIG_FB_VIA) += viafb.o
+
+viafb-y :=viafbdev.o hw.o iface.o  via_i2c.o dvi.o lcd.o ioctl.o accel.o via_utility.o vt1636.o global.o tblDPASetting.o viamode.o tbl1636.o
diff --git a/drivers/video/via/accel.c b/drivers/video/via/accel.c
new file mode 100644
index 000000000000..632523ff1fb7
--- /dev/null
+++ b/drivers/video/via/accel.c
@@ -0,0 +1,279 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+#include "global.h"
+
+void viafb_init_accel(void)
+{
+        viaparinfo->fbmem_free -= CURSOR_SIZE;
+        viaparinfo->cursor_start = viaparinfo->fbmem_free;
+        viaparinfo->fbmem_used += CURSOR_SIZE;
+
+        /* Reverse 8*1024 memory space for cursor image */
+        viaparinfo->fbmem_free -= (CURSOR_SIZE + VQ_SIZE);
+        viaparinfo->VQ_start = viaparinfo->fbmem_free;
+        viaparinfo->VQ_end = viaparinfo->VQ_start + VQ_SIZE - 1;
+        viaparinfo->fbmem_used += (CURSOR_SIZE + VQ_SIZE); }
+
+void viafb_init_2d_engine(void)
+{
+        u32 dwVQStartAddr, dwVQEndAddr;
+        u32 dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH;
+
+        /* init 2D engine regs to reset 2D engine */
+        writel(0x0, viaparinfo->io_virt + VIA_REG_GEMODE);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_SRCPOS);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_DSTPOS);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_DIMENSION);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_PATADDR);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_FGCOLOR);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_BGCOLOR);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_CLIPTL);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_CLIPBR);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_OFFSET);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_KEYCONTROL);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_SRCBASE);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_DSTBASE);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_PITCH);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_MONOPAT1);
+
+        /* Init AGP and VQ regs */
+        switch (viaparinfo->chip_info->gfx_chip_name) {
+        case UNICHROME_K8M890:
+        case UNICHROME_P4M900:
+                writel(0x00100000, viaparinfo->io_virt + VIA_REG_CR_TRANSET);
+                writel(0x680A0000, viaparinfo->io_virt + VIA_REG_CR_TRANSPACE);
+                writel(0x02000000, viaparinfo->io_virt + VIA_REG_CR_TRANSPACE);
+                break;
+
+        default:
+                writel(0x00100000, viaparinfo->io_virt + VIA_REG_TRANSET);
+                writel(0x00000000, viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                writel(0x00333004, viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                writel(0x60000000, viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                writel(0x61000000, viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                writel(0x62000000, viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                writel(0x63000000, viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                writel(0x64000000, viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                writel(0x7D000000, viaparinfo->io_virt + VIA_REG_TRANSPACE);
+
+                writel(0xFE020000, viaparinfo->io_virt + VIA_REG_TRANSET);
+                writel(0x00000000, viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                break;
+        }
+        if (viaparinfo->VQ_start != 0) {
+                /* Enable VQ */
+                dwVQStartAddr = viaparinfo->VQ_start;
+                dwVQEndAddr = viaparinfo->VQ_end;
+
+                dwVQStartL = 0x50000000 | (dwVQStartAddr & 0xFFFFFF);
+                dwVQEndL = 0x51000000 | (dwVQEndAddr & 0xFFFFFF);
+                dwVQStartEndH = 0x52000000 |
+                        ((dwVQStartAddr & 0xFF000000) >> 24) |
+                        ((dwVQEndAddr & 0xFF000000) >> 16);
+                dwVQLen = 0x53000000 | (VQ_SIZE >> 3);
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_K8M890:
+                case UNICHROME_P4M900:
+                        dwVQStartL |= 0x20000000;
+                        dwVQEndL |= 0x20000000;
+                        dwVQStartEndH |= 0x20000000;
+                        dwVQLen |= 0x20000000;
+                        break;
+                default:
+                        break;
+                }
+
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_K8M890:
+                case UNICHROME_P4M900:
+                        writel(0x00100000,
+                                viaparinfo->io_virt + VIA_REG_CR_TRANSET);
+                        writel(dwVQStartEndH,
+                                viaparinfo->io_virt + VIA_REG_CR_TRANSPACE);
+                        writel(dwVQStartL,
+                                viaparinfo->io_virt + VIA_REG_CR_TRANSPACE);
+                        writel(dwVQEndL,
+                                viaparinfo->io_virt + VIA_REG_CR_TRANSPACE);
+                        writel(dwVQLen,
+                                viaparinfo->io_virt + VIA_REG_CR_TRANSPACE);
+                        writel(0x74301001,
+                                viaparinfo->io_virt + VIA_REG_CR_TRANSPACE);
+                        writel(0x00000000,
+                                viaparinfo->io_virt + VIA_REG_CR_TRANSPACE);
+                        break;
+                default:
+                        writel(0x00FE0000,
+                                viaparinfo->io_virt + VIA_REG_TRANSET);
+                        writel(0x080003FE,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x0A00027C,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x0B000260,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x0C000274,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x0D000264,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x0E000000,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x0F000020,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x1000027E,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x110002FE,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x200F0060,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+
+                        writel(0x00000006,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x40008C0F,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x44000000,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x45080C04,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x46800408,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+
+                        writel(dwVQStartEndH,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(dwVQStartL,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(dwVQEndL,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(dwVQLen,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        break;
+                }
+        } else {
+                /* Disable VQ */
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_K8M890:
+                case UNICHROME_P4M900:
+                        writel(0x00100000,
+                                viaparinfo->io_virt + VIA_REG_CR_TRANSET);
+                        writel(0x74301000,
+                                viaparinfo->io_virt + VIA_REG_CR_TRANSPACE);
+                        break;
+                default:
+                        writel(0x00FE0000,
+                                viaparinfo->io_virt + VIA_REG_TRANSET);
+                        writel(0x00000004,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x40008C0F,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x44000000,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x45080C04,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        writel(0x46800408,
+                                viaparinfo->io_virt + VIA_REG_TRANSPACE);
+                        break;
+                }
+        }
+
+        viafb_set_2d_color_depth(viaparinfo->bpp);
+
+        writel(0x0, viaparinfo->io_virt + VIA_REG_SRCBASE);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_DSTBASE);
+
+        writel(VIA_PITCH_ENABLE |
+                   (((viaparinfo->hres *
+                      viaparinfo->bpp >> 3) >> 3) | (((viaparinfo->hres *
+                                                   viaparinfo->
+                                                   bpp >> 3) >> 3) << 16)),
+                                        viaparinfo->io_virt + VIA_REG_PITCH);
+}
+
+void viafb_set_2d_color_depth(int bpp)
+{
+        u32 dwGEMode;
+
+        dwGEMode = readl(viaparinfo->io_virt + 0x04) & 0xFFFFFCFF;
+
+        switch (bpp) {
+        case 16:
+                dwGEMode |= VIA_GEM_16bpp;
+                break;
+        case 32:
+                dwGEMode |= VIA_GEM_32bpp;
+                break;
+        default:
+                dwGEMode |= VIA_GEM_8bpp;
+                break;
+        }
+
+        /* Set BPP and Pitch */
+        writel(dwGEMode, viaparinfo->io_virt + VIA_REG_GEMODE);
+}
+
+void viafb_hw_cursor_init(void)
+{
+        /* Set Cursor Image Base Address */
+        writel(viaparinfo->cursor_start,
+                viaparinfo->io_virt + VIA_REG_CURSOR_MODE);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_CURSOR_POS);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_CURSOR_ORG);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_CURSOR_BG);
+        writel(0x0, viaparinfo->io_virt + VIA_REG_CURSOR_FG);
+}
+
+void viafb_show_hw_cursor(struct fb_info *info, int Status)
+{
+        u32 temp;
+        u32 iga_path = ((struct viafb_par *)(info->par))->iga_path;
+
+        temp = readl(viaparinfo->io_virt + VIA_REG_CURSOR_MODE);
+        switch (Status) {
+        case HW_Cursor_ON:
+                temp |= 0x1;
+                break;
+        case HW_Cursor_OFF:
+                temp &= 0xFFFFFFFE;
+                break;
+        }
+        switch (iga_path) {
+        case IGA2:
+                temp |= 0x80000000;
+                break;
+        case IGA1:
+        default:
+                temp &= 0x7FFFFFFF;
+        }
+        writel(temp, viaparinfo->io_virt + VIA_REG_CURSOR_MODE);
+}
+
+int viafb_wait_engine_idle(void)
+{
+        int loop = 0;
+
+        while (!(readl(viaparinfo->io_virt + VIA_REG_STATUS) &
+                        VIA_VR_QUEUE_BUSY) && (loop++ < MAXLOOP))
+                cpu_relax();
+
+        while ((readl(viaparinfo->io_virt + VIA_REG_STATUS) &
+                    (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | VIA_3D_ENG_BUSY)) &&
+                    (loop++ < MAXLOOP))
+                cpu_relax();
+
+        return loop >= MAXLOOP;
+}
diff --git a/drivers/video/via/accel.h b/drivers/video/via/accel.h
new file mode 100644
index 000000000000..29bf854e8ccf
--- /dev/null
+++ b/drivers/video/via/accel.h
@@ -0,0 +1,169 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef __ACCEL_H__
+#define __ACCEL_H__
+
+#define FB_ACCEL_VIA_UNICHROME  50
+
+/* MMIO Base Address Definition */
+#define MMIO_VGABASE                0x8000
+#define MMIO_CR_READ                (MMIO_VGABASE + 0x3D4)
+#define MMIO_CR_WRITE               (MMIO_VGABASE + 0x3D5)
+#define MMIO_SR_READ                (MMIO_VGABASE + 0x3C4)
+#define MMIO_SR_WRITE               (MMIO_VGABASE + 0x3C5)
+
+/* HW Cursor Status Define */
+#define HW_Cursor_ON    0
+#define HW_Cursor_OFF   1
+
+#define CURSOR_SIZE     (8 * 1024)
+#define VQ_SIZE         (256 * 1024)
+
+#define VIA_MMIO_BLTBASE        0x200000
+#define VIA_MMIO_BLTSIZE        0x200000
+
+/* Defines for 2D registers */
+#define VIA_REG_GECMD           0x000
+#define VIA_REG_GEMODE          0x004
+#define VIA_REG_SRCPOS          0x008
+#define VIA_REG_DSTPOS          0x00C
+/* width and height */
+#define VIA_REG_DIMENSION       0x010
+#define VIA_REG_PATADDR         0x014
+#define VIA_REG_FGCOLOR         0x018
+#define VIA_REG_BGCOLOR         0x01C
+/* top and left of clipping */
+#define VIA_REG_CLIPTL          0x020
+/* bottom and right of clipping */
+#define VIA_REG_CLIPBR          0x024
+#define VIA_REG_OFFSET          0x028
+/* color key control */
+#define VIA_REG_KEYCONTROL      0x02C
+#define VIA_REG_SRCBASE         0x030
+#define VIA_REG_DSTBASE         0x034
+/* pitch of src and dst */
+#define VIA_REG_PITCH           0x038
+#define VIA_REG_MONOPAT0        0x03C
+#define VIA_REG_MONOPAT1        0x040
+/* from 0x100 to 0x1ff */
+#define VIA_REG_COLORPAT        0x100
+
+/* VIA_REG_PITCH(0x38): Pitch Setting */
+#define VIA_PITCH_ENABLE        0x80000000
+
+/* defines for VIA HW cursor registers */
+#define VIA_REG_CURSOR_MODE     0x2D0
+#define VIA_REG_CURSOR_POS      0x2D4
+#define VIA_REG_CURSOR_ORG      0x2D8
+#define VIA_REG_CURSOR_BG       0x2DC
+#define VIA_REG_CURSOR_FG       0x2E0
+
+/* VIA_REG_GEMODE(0x04): GE mode */
+#define VIA_GEM_8bpp            0x00000000
+#define VIA_GEM_16bpp           0x00000100
+#define VIA_GEM_32bpp           0x00000300
+
+/* VIA_REG_GECMD(0x00): 2D Engine Command  */
+#define VIA_GEC_NOOP            0x00000000
+#define VIA_GEC_BLT             0x00000001
+#define VIA_GEC_LINE            0x00000005
+
+/* Rotate Command */
+#define VIA_GEC_ROT             0x00000008
+
+#define VIA_GEC_SRC_XY          0x00000000
+#define VIA_GEC_SRC_LINEAR      0x00000010
+#define VIA_GEC_DST_XY          0x00000000
+#define VIA_GEC_DST_LINRAT      0x00000020
+
+#define VIA_GEC_SRC_FB          0x00000000
+#define VIA_GEC_SRC_SYS         0x00000040
+#define VIA_GEC_DST_FB          0x00000000
+#define VIA_GEC_DST_SYS         0x00000080
+
+/* source is mono */
+#define VIA_GEC_SRC_MONO        0x00000100
+/* pattern is mono */
+#define VIA_GEC_PAT_MONO        0x00000200
+/* mono src is opaque */
+#define VIA_GEC_MSRC_OPAQUE     0x00000000
+/* mono src is transparent */
+#define VIA_GEC_MSRC_TRANS      0x00000400
+/* pattern is in frame buffer */
+#define VIA_GEC_PAT_FB          0x00000000
+/* pattern is from reg setting */
+#define VIA_GEC_PAT_REG         0x00000800
+
+#define VIA_GEC_CLIP_DISABLE    0x00000000
+#define VIA_GEC_CLIP_ENABLE     0x00001000
+
+#define VIA_GEC_FIXCOLOR_PAT    0x00002000
+
+#define VIA_GEC_INCX            0x00000000
+#define VIA_GEC_DECY            0x00004000
+#define VIA_GEC_INCY            0x00000000
+#define VIA_GEC_DECX            0x00008000
+/* mono pattern is opaque */
+#define VIA_GEC_MPAT_OPAQUE     0x00000000
+/* mono pattern is transparent */
+#define VIA_GEC_MPAT_TRANS      0x00010000
+
+#define VIA_GEC_MONO_UNPACK     0x00000000
+#define VIA_GEC_MONO_PACK       0x00020000
+#define VIA_GEC_MONO_DWORD      0x00000000
+#define VIA_GEC_MONO_WORD       0x00040000
+#define VIA_GEC_MONO_BYTE       0x00080000
+
+#define VIA_GEC_LASTPIXEL_ON    0x00000000
+#define VIA_GEC_LASTPIXEL_OFF   0x00100000
+#define VIA_GEC_X_MAJOR         0x00000000
+#define VIA_GEC_Y_MAJOR         0x00200000
+#define VIA_GEC_QUICK_START     0x00800000
+
+/* defines for VIA 3D registers */
+#define VIA_REG_STATUS          0x400
+#define VIA_REG_CR_TRANSET      0x41C
+#define VIA_REG_CR_TRANSPACE    0x420
+#define VIA_REG_TRANSET         0x43C
+#define VIA_REG_TRANSPACE       0x440
+
+/* VIA_REG_STATUS(0x400): Engine Status */
+
+/* Command Regulator is busy */
+#define VIA_CMD_RGTR_BUSY       0x00000080
+/* 2D Engine is busy */
+#define VIA_2D_ENG_BUSY         0x00000002
+/* 3D Engine is busy */
+#define VIA_3D_ENG_BUSY         0x00000001
+/* Virtual Queue is busy */
+#define VIA_VR_QUEUE_BUSY       0x00020000
+
+#define MAXLOOP                 0xFFFFFF
+
+void viafb_init_accel(void);
+void viafb_init_2d_engine(void);
+void set_2d_color_depth(int);
+void viafb_hw_cursor_init(void);
+void viafb_show_hw_cursor(struct fb_info *info, int Status); int
+viafb_wait_engine_idle(void); void viafb_set_2d_color_depth(int bpp);
+
+#endif /* __ACCEL_H__ */
diff --git a/drivers/video/via/chip.h b/drivers/video/via/chip.h
new file mode 100644
index 000000000000..dde95edc387a
--- /dev/null
+++ b/drivers/video/via/chip.h
@@ -0,0 +1,190 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+#ifndef __CHIP_H__
+#define __CHIP_H__
+
+#include "global.h"
+
+/***************************************/
+/* Definition Graphic Chip Information */
+/***************************************/
+
+#define     PCI_VIA_VENDOR_ID       0x1106
+
+/* Define VIA Graphic Chip Name */
+#define     UNICHROME_CLE266        1
+#define     UNICHROME_CLE266_DID    0x3122
+#define     CLE266_REVISION_AX      0x0A
+#define     CLE266_REVISION_CX      0x0C
+
+#define     UNICHROME_K400          2
+#define     UNICHROME_K400_DID      0x7205
+
+#define     UNICHROME_K800          3
+#define     UNICHROME_K800_DID      0x3108
+
+#define     UNICHROME_PM800         4
+#define     UNICHROME_PM800_DID     0x3118
+
+#define     UNICHROME_CN700         5
+#define     UNICHROME_CN700_DID     0x3344
+
+#define     UNICHROME_CX700         6
+#define     UNICHROME_CX700_DID     0x3157
+#define     CX700_REVISION_700      0x0
+#define     CX700_REVISION_700M     0x1
+#define     CX700_REVISION_700M2    0x2
+
+#define     UNICHROME_CN750         7
+#define     UNICHROME_CN750_DID     0x3225
+
+#define     UNICHROME_K8M890        8
+#define     UNICHROME_K8M890_DID    0x3230
+
+#define     UNICHROME_P4M890        9
+#define     UNICHROME_P4M890_DID    0x3343
+
+#define     UNICHROME_P4M900        10
+#define     UNICHROME_P4M900_DID    0x3371
+
+#define     UNICHROME_VX800         11
+#define     UNICHROME_VX800_DID     0x1122
+
+/**************************************************/
+/* Definition TMDS Trasmitter Information         */
+/**************************************************/
+
+/* Definition TMDS Trasmitter Index */
+#define     NON_TMDS_TRANSMITTER    0x00
+#define     VT1632_TMDS             0x01
+#define     INTEGRATED_TMDS         0x42
+
+/* Definition TMDS Trasmitter I2C Slave Address */
+#define     VT1632_TMDS_I2C_ADDR    0x10
+
+/**************************************************/
+/* Definition LVDS Trasmitter Information         */
+/**************************************************/
+
+/* Definition LVDS Trasmitter Index */
+#define     NON_LVDS_TRANSMITTER    0x00
+#define     VT1631_LVDS             0x01
+#define     VT1636_LVDS             0x0E
+#define     INTEGRATED_LVDS         0x41
+
+/* Definition Digital Transmitter Mode */
+#define     TX_DATA_12_BITS         0x01
+#define     TX_DATA_24_BITS         0x02
+#define     TX_DATA_DDR_MODE        0x04
+#define     TX_DATA_SDR_MODE        0x08
+
+/* Definition LVDS Trasmitter I2C Slave Address */
+#define     VT1631_LVDS_I2C_ADDR    0x70
+#define     VT3271_LVDS_I2C_ADDR    0x80
+#define     VT1636_LVDS_I2C_ADDR    0x80
+
+struct tmds_chip_information {
+        int tmds_chip_name;
+        int tmds_chip_slave_addr;
+        int dvi_panel_id;
+        int data_mode;
+        int output_interface;
+        int i2c_port;
+        int device_type;
+};
+
+struct lvds_chip_information {
+        int lvds_chip_name;
+        int lvds_chip_slave_addr;
+        int data_mode;
+        int output_interface;
+        int i2c_port;
+};
+
+struct chip_information {
+        int gfx_chip_name;
+        int gfx_chip_revision;
+        int chip_on_slot;
+        struct tmds_chip_information tmds_chip_info;
+        struct lvds_chip_information lvds_chip_info;
+        struct lvds_chip_information lvds_chip_info2;
+};
+
+struct crt_setting_information {
+        int iga_path;
+        int h_active;
+        int v_active;
+        int bpp;
+        int refresh_rate;
+};
+
+struct tmds_setting_information {
+        int iga_path;
+        int h_active;
+        int v_active;
+        int bpp;
+        int refresh_rate;
+        int get_dvi_size_method;
+        int max_pixel_clock;
+        int dvi_panel_size;
+        int dvi_panel_hres;
+        int dvi_panel_vres;
+        int native_size;
+};
+
+struct lvds_setting_information {
+        int iga_path;
+        int h_active;
+        int v_active;
+        int bpp;
+        int refresh_rate;
+        int get_lcd_size_method;
+        int lcd_panel_id;
+        int lcd_panel_size;
+        int lcd_panel_hres;
+        int lcd_panel_vres;
+        int display_method;
+        int device_lcd_dualedge;
+        int LCDDithering;
+        int lcd_mode;
+        u32 vclk;               /*panel mode clock value */
+};
+
+struct GFX_DPA_SETTING {
+        int ClkRangeIndex;
+        u8 DVP0;                /* CR96[3:0] */
+        u8 DVP0DataDri_S1;      /* SR2A[5]   */
+        u8 DVP0DataDri_S;       /* SR1B[1]   */
+        u8 DVP0ClockDri_S1;     /* SR2A[4]   */
+        u8 DVP0ClockDri_S;      /* SR1E[2]   */
+        u8 DVP1;                /* CR9B[3:0] */
+        u8 DVP1Driving;         /* SR65[3:0], Data and Clock driving */
+        u8 DFPHigh;             /* CR97[3:0] */
+        u8 DFPLow;              /* CR99[3:0] */
+
+};
+
+struct VT1636_DPA_SETTING {
+        int PanelSizeID;
+        u8 CLK_SEL_ST1;
+        u8 CLK_SEL_ST2;
+};
+#endif /* __CHIP_H__ */
diff --git a/drivers/video/via/debug.h b/drivers/video/via/debug.h
new file mode 100644
index 000000000000..86eacc2017f3
--- /dev/null
+++ b/drivers/video/via/debug.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+#ifndef __DEBUG_H__
+#define __DEBUG_H__
+
+#ifndef VIAFB_DEBUG
+#define VIAFB_DEBUG 0
+#endif
+
+#if VIAFB_DEBUG
+#define DEBUG_MSG(f, a...)   printk(f, ## a)
+#else
+#define DEBUG_MSG(f, a...)
+#endif
+
+#define VIAFB_WARN 0
+#if VIAFB_WARN
+#define WARN_MSG(f, a...)   printk(f, ## a)
+#else
+#define WARN_MSG(f, a...)
+#endif
+
+#endif /* __DEBUG_H__ */
diff --git a/drivers/video/via/dvi.c b/drivers/video/via/dvi.c
new file mode 100644
index 000000000000..d6965447ca69
--- /dev/null
+++ b/drivers/video/via/dvi.c
@@ -0,0 +1,682 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+#include "global.h"
+
+static void tmds_register_write(int index, u8 data);
+static int tmds_register_read(int index);
+static int tmds_register_read_bytes(int index, u8 *buff, int buff_len);
+static int check_reduce_blanking_mode(int mode_index,
+        int refresh_rate);
+static int dvi_get_panel_size_from_DDCv1(void);
+static int dvi_get_panel_size_from_DDCv2(void);
+static unsigned char dvi_get_panel_info(void);
+static int viafb_dvi_query_EDID(void);
+
+static int check_tmds_chip(int device_id_subaddr, int device_id)
+{
+        if (tmds_register_read(device_id_subaddr) == device_id)
+                return OK;
+        else
+                return FAIL;
+}
+
+void viafb_init_dvi_size(void)
+{
+        DEBUG_MSG(KERN_INFO "viafb_init_dvi_size()\n");
+        DEBUG_MSG(KERN_INFO
+                "viaparinfo->tmds_setting_info->get_dvi_size_method %d\n",
+                  viaparinfo->tmds_setting_info->get_dvi_size_method);
+
+        switch (viaparinfo->tmds_setting_info->get_dvi_size_method) {
+        case GET_DVI_SIZE_BY_SYSTEM_BIOS:
+                break;
+        case GET_DVI_SZIE_BY_HW_STRAPPING:
+                break;
+        case GET_DVI_SIZE_BY_VGA_BIOS:
+        default:
+                dvi_get_panel_info();
+                break;
+        }
+        return;
+}
+
+int viafb_tmds_trasmitter_identify(void)
+{
+        unsigned char sr2a = 0, sr1e = 0, sr3e = 0;
+
+        /* Turn on ouputting pad */
+        switch (viaparinfo->chip_info->gfx_chip_name) {
+        case UNICHROME_K8M890:
+            /*=* DFP Low Pad on *=*/
+                sr2a = viafb_read_reg(VIASR, SR2A);
+                viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1);
+                break;
+
+        case UNICHROME_P4M900:
+        case UNICHROME_P4M890:
+                /* DFP Low Pad on */
+                sr2a = viafb_read_reg(VIASR, SR2A);
+                viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1);
+                /* DVP0 Pad on */
+                sr1e = viafb_read_reg(VIASR, SR1E);
+                viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT6 + BIT7);
+                break;
+
+        default:
+            /* DVP0/DVP1 Pad on */
+                sr1e = viafb_read_reg(VIASR, SR1E);
+                viafb_write_reg_mask(SR1E, VIASR, 0xF0, BIT4 +
+                        BIT5 + BIT6 + BIT7);
+            /* SR3E[1]Multi-function selection:
+            0 = Emulate I2C and DDC bus by GPIO2/3/4. */
+                sr3e = viafb_read_reg(VIASR, SR3E);
+                viafb_write_reg_mask(SR3E, VIASR, 0x0, BIT5);
+                break;
+        }
+
+        /* Check for VT1632: */
+        viaparinfo->chip_info->tmds_chip_info.tmds_chip_name = VT1632_TMDS;
+        viaparinfo->chip_info->
+                tmds_chip_info.tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR;
+        viaparinfo->chip_info->tmds_chip_info.i2c_port = I2CPORTINDEX;
+        if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID) != FAIL) {
+                /*
+                 * Currently only support 12bits,dual edge,add 24bits mode later
+                 */
+                tmds_register_write(0x08, 0x3b);
+
+                DEBUG_MSG(KERN_INFO "\n VT1632 TMDS ! \n");
+                DEBUG_MSG(KERN_INFO "\n %2d",
+                          viaparinfo->chip_info->tmds_chip_info.tmds_chip_name);
+                DEBUG_MSG(KERN_INFO "\n %2d",
+                          viaparinfo->chip_info->tmds_chip_info.i2c_port);
+                return OK;
+        } else {
+                viaparinfo->chip_info->tmds_chip_info.i2c_port = GPIOPORTINDEX;
+                if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID)
+                    != FAIL) {
+                        tmds_register_write(0x08, 0x3b);
+                        DEBUG_MSG(KERN_INFO "\n VT1632 TMDS ! \n");
+                        DEBUG_MSG(KERN_INFO "\n %2d",
+                                  viaparinfo->chip_info->
+                                  tmds_chip_info.tmds_chip_name);
+                        DEBUG_MSG(KERN_INFO "\n %2d",
+                                  viaparinfo->chip_info->
+                                  tmds_chip_info.i2c_port);
+                        return OK;
+                }
+        }
+
+        viaparinfo->chip_info->tmds_chip_info.tmds_chip_name = INTEGRATED_TMDS;
+
+        if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) &&
+            ((viafb_display_hardware_layout == HW_LAYOUT_DVI_ONLY) ||
+             (viafb_display_hardware_layout == HW_LAYOUT_LCD_DVI))) {
+                DEBUG_MSG(KERN_INFO "\n Integrated TMDS ! \n");
+                return OK;
+        }
+
+        switch (viaparinfo->chip_info->gfx_chip_name) {
+        case UNICHROME_K8M890:
+                viafb_write_reg(SR2A, VIASR, sr2a);
+                break;
+
+        case UNICHROME_P4M900:
+        case UNICHROME_P4M890:
+                viafb_write_reg(SR2A, VIASR, sr2a);
+                viafb_write_reg(SR1E, VIASR, sr1e);
+                break;
+
+        default:
+                viafb_write_reg(SR1E, VIASR, sr1e);
+                viafb_write_reg(SR3E, VIASR, sr3e);
+                break;
+        }
+
+        viaparinfo->chip_info->
+                tmds_chip_info.tmds_chip_name = NON_TMDS_TRANSMITTER;
+        viaparinfo->chip_info->tmds_chip_info.
+                tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR;
+        return FAIL;
+}
+
+static void tmds_register_write(int index, u8 data)
+{
+        viaparinfo->i2c_stuff.i2c_port =
+                viaparinfo->chip_info->tmds_chip_info.i2c_port;
+
+        viafb_i2c_writebyte(viaparinfo->chip_info->tmds_chip_info.
+                tmds_chip_slave_addr, index,
+                     data);
+}
+
+static int tmds_register_read(int index)
+{
+        u8 data;
+
+        viaparinfo->i2c_stuff.i2c_port =
+                viaparinfo->chip_info->tmds_chip_info.i2c_port;
+        viafb_i2c_readbyte((u8) viaparinfo->chip_info->
+            tmds_chip_info.tmds_chip_slave_addr,
+                        (u8) index, &data);
+        return data;
+}
+
+static int tmds_register_read_bytes(int index, u8 *buff, int buff_len)
+{
+        viaparinfo->i2c_stuff.i2c_port =
+                viaparinfo->chip_info->tmds_chip_info.i2c_port;
+        viafb_i2c_readbytes((u8) viaparinfo->chip_info->tmds_chip_info.
+                         tmds_chip_slave_addr, (u8) index, buff, buff_len);
+        return 0;
+}
+
+static int check_reduce_blanking_mode(int mode_index,
+        int refresh_rate)
+{
+        if (refresh_rate != 60)
+                return false;
+
+        switch (mode_index) {
+                /* Following modes have reduce blanking mode. */
+        case VIA_RES_1360X768:
+        case VIA_RES_1400X1050:
+        case VIA_RES_1440X900:
+        case VIA_RES_1600X900:
+        case VIA_RES_1680X1050:
+        case VIA_RES_1920X1080:
+        case VIA_RES_1920X1200:
+                break;
+
+        default:
+                DEBUG_MSG(KERN_INFO
+                          "This dvi mode %d have no reduce blanking mode!\n",
+                          mode_index);
+                return false;
+        }
+
+        return true;
+}
+
+/* DVI Set Mode */
+void viafb_dvi_set_mode(int video_index, int mode_bpp, int set_iga)
+{
+        struct VideoModeTable *videoMode = NULL;
+        struct crt_mode_table *pDviTiming;
+        unsigned long desirePixelClock, maxPixelClock;
+        int status = 0;
+        videoMode = viafb_get_modetbl_pointer(video_index);
+        pDviTiming = videoMode->crtc;
+        desirePixelClock = pDviTiming->clk / 1000000;
+        maxPixelClock = (unsigned long)viaparinfo->
+                tmds_setting_info->max_pixel_clock;
+
+        DEBUG_MSG(KERN_INFO "\nDVI_set_mode!!\n");
+
+        if ((maxPixelClock != 0) && (desirePixelClock > maxPixelClock)) {
+                /*Check if reduce-blanking mode is exist */
+                status =
+                    check_reduce_blanking_mode(video_index,
+                                               pDviTiming->refresh_rate);
+                if (status) {
+                        video_index += 100;     /*Use reduce-blanking mode */
+                        videoMode = viafb_get_modetbl_pointer(video_index);
+                        pDviTiming = videoMode->crtc;
+                        DEBUG_MSG(KERN_INFO
+                                  "DVI use reduce blanking mode %d!!\n",
+                                  video_index);
+                }
+        }
+        viafb_fill_crtc_timing(pDviTiming, video_index, mode_bpp / 8, set_iga);
+        viafb_set_output_path(DEVICE_DVI, set_iga,
+                        viaparinfo->chip_info->tmds_chip_info.output_interface);
+}
+
+/* Sense DVI Connector */
+int viafb_dvi_sense(void)
+{
+        u8 RegSR1E = 0, RegSR3E = 0, RegCR6B = 0, RegCR91 = 0,
+                RegCR93 = 0, RegCR9B = 0, data;
+        int ret = false;
+
+        DEBUG_MSG(KERN_INFO "viafb_dvi_sense!!\n");
+
+        if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
+                /* DI1 Pad on */
+                RegSR1E = viafb_read_reg(VIASR, SR1E);
+                viafb_write_reg(SR1E, VIASR, RegSR1E | 0x30);
+
+                /* CR6B[0]VCK Input Selection: 1 = External clock. */
+                RegCR6B = viafb_read_reg(VIACR, CR6B);
+                viafb_write_reg(CR6B, VIACR, RegCR6B | 0x08);
+
+                /* CR91[4] VDD On [3] Data On [2] VEE On [1] Back Light Off
+                   [0] Software Control Power Sequence */
+                RegCR91 = viafb_read_reg(VIACR, CR91);
+                viafb_write_reg(CR91, VIACR, 0x1D);
+
+                /* CR93[7] DI1 Data Source Selection: 1 = DSP2.
+                   CR93[5] DI1 Clock Source: 1 = internal.
+                   CR93[4] DI1 Clock Polarity.
+                   CR93[3:1] DI1 Clock Adjust. CR93[0] DI1 enable */
+                RegCR93 = viafb_read_reg(VIACR, CR93);
+                viafb_write_reg(CR93, VIACR, 0x01);
+        } else {
+                /* DVP0/DVP1 Pad on */
+                RegSR1E = viafb_read_reg(VIASR, SR1E);
+                viafb_write_reg(SR1E, VIASR, RegSR1E | 0xF0);
+
+                /* SR3E[1]Multi-function selection:
+                   0 = Emulate I2C and DDC bus by GPIO2/3/4. */
+                RegSR3E = viafb_read_reg(VIASR, SR3E);
+                viafb_write_reg(SR3E, VIASR, RegSR3E & (~0x20));
+
+                /* CR91[4] VDD On [3] Data On [2] VEE On [1] Back Light Off
+                   [0] Software Control Power Sequence */
+                RegCR91 = viafb_read_reg(VIACR, CR91);
+                viafb_write_reg(CR91, VIACR, 0x1D);
+
+                /*CR9B[4] DVP1 Data Source Selection: 1 = From secondary
+                display.CR9B[2:0] DVP1 Clock Adjust */
+                RegCR9B = viafb_read_reg(VIACR, CR9B);
+                viafb_write_reg(CR9B, VIACR, 0x01);
+        }
+
+        data = (u8) tmds_register_read(0x09);
+        if (data & 0x04)
+                ret = true;
+
+        if (ret == false) {
+                if (viafb_dvi_query_EDID())
+                        ret = true;
+        }
+
+        /* Restore status */
+        viafb_write_reg(SR1E, VIASR, RegSR1E);
+        viafb_write_reg(CR91, VIACR, RegCR91);
+        if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
+                viafb_write_reg(CR6B, VIACR, RegCR6B);
+                viafb_write_reg(CR93, VIACR, RegCR93);
+        } else {
+                viafb_write_reg(SR3E, VIASR, RegSR3E);
+                viafb_write_reg(CR9B, VIACR, RegCR9B);
+        }
+
+        return ret;
+}
+
+/* Query Flat Panel's EDID Table Version Through DVI Connector */
+static int viafb_dvi_query_EDID(void)
+{
+        u8 data0, data1;
+        int restore;
+
+        DEBUG_MSG(KERN_INFO "viafb_dvi_query_EDID!!\n");
+
+        restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr;
+        viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = 0xA0;
+
+        data0 = (u8) tmds_register_read(0x00);
+        data1 = (u8) tmds_register_read(0x01);
+        if ((data0 == 0) && (data1 == 0xFF)) {
+                viaparinfo->chip_info->
+                        tmds_chip_info.tmds_chip_slave_addr = restore;
+                return EDID_VERSION_1;  /* Found EDID1 Table */
+        }
+
+        data0 = (u8) tmds_register_read(0x00);
+        viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore;
+        if (data0 == 0x20)
+                return EDID_VERSION_2;  /* Found EDID2 Table */
+        else
+                return false;
+}
+
+/*
+ *
+ * int dvi_get_panel_size_from_DDCv1(void)
+ *
+ *     - Get Panel Size Using EDID1 Table
+ *
+ * Return Type:    int
+ *
+ */
+static int dvi_get_panel_size_from_DDCv1(void)
+{
+        int i, max_h = 0, max_v = 0, tmp, restore;
+        unsigned char rData;
+        unsigned char EDID_DATA[18];
+
+        DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv1 \n");
+
+        restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr;
+        viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = 0xA0;
+
+        rData = tmds_register_read(0x23);
+        if (rData & 0x3C)
+                max_h = 640;
+        if (rData & 0xC0)
+                max_h = 720;
+        if (rData & 0x03)
+                max_h = 800;
+
+        rData = tmds_register_read(0x24);
+        if (rData & 0xC0)
+                max_h = 800;
+        if (rData & 0x1E)
+                max_h = 1024;
+        if (rData & 0x01)
+                max_h = 1280;
+
+        for (i = 0x25; i < 0x6D; i++) {
+                switch (i) {
+                case 0x26:
+                case 0x28:
+                case 0x2A:
+                case 0x2C:
+                case 0x2E:
+                case 0x30:
+                case 0x32:
+                case 0x34:
+                        rData = tmds_register_read(i);
+                        if (rData == 1)
+                                break;
+                        /* data = (data + 31) * 8 */
+                        tmp = (rData + 31) << 3;
+                        if (tmp > max_h)
+                                max_h = tmp;
+                        break;
+
+                case 0x36:
+                case 0x48:
+                case 0x5A:
+                case 0x6C:
+                        tmds_register_read_bytes(i, EDID_DATA, 10);
+                        if (!(EDID_DATA[0] || EDID_DATA[1])) {
+                                /* The first two byte must be zero. */
+                                if (EDID_DATA[3] == 0xFD) {
+                                        /* To get max pixel clock. */
+                                        viaparinfo->tmds_setting_info->
+                                        max_pixel_clock = EDID_DATA[9] * 10;
+                                }
+                        }
+                        break;
+
+                default:
+                        break;
+                }
+        }
+
+        switch (max_h) {
+        case 640:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_640X480;
+                break;
+        case 800:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_800X600;
+                break;
+        case 1024:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_1024X768;
+                break;
+        case 1280:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_1280X1024;
+                break;
+        case 1400:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_1400X1050;
+                break;
+        case 1440:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_1440X1050;
+                break;
+        case 1600:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_1600X1200;
+                break;
+        case 1920:
+                if (max_v == 1200) {
+                        viaparinfo->tmds_setting_info->dvi_panel_size =
+                                VIA_RES_1920X1200;
+                } else {
+                        viaparinfo->tmds_setting_info->dvi_panel_size =
+                                VIA_RES_1920X1080;
+                }
+
+                break;
+        default:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_1024X768;
+                DEBUG_MSG(KERN_INFO "Unknow panel size max resolution = %d !\
+                                         set default panel size.\n", max_h);
+                break;
+        }
+
+        DEBUG_MSG(KERN_INFO "DVI max pixelclock = %d\n",
+                  viaparinfo->tmds_setting_info->max_pixel_clock);
+        viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore;
+        return viaparinfo->tmds_setting_info->dvi_panel_size;
+}
+
+/*
+ *
+ * int dvi_get_panel_size_from_DDCv2(void)
+ *
+ *     - Get Panel Size Using EDID2 Table
+ *
+ * Return Type:    int
+ *
+ */
+static int dvi_get_panel_size_from_DDCv2(void)
+{
+        int HSize = 0, restore;
+        unsigned char R_Buffer[2];
+
+        DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv2 \n");
+
+        restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr;
+        viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = 0xA2;
+
+        /* Horizontal: 0x76, 0x77 */
+        tmds_register_read_bytes(0x76, R_Buffer, 2);
+        HSize = R_Buffer[0];
+        HSize += R_Buffer[1] << 8;
+
+        switch (HSize) {
+        case 640:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_640X480;
+                break;
+        case 800:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_800X600;
+                break;
+        case 1024:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_1024X768;
+                break;
+        case 1280:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_1280X1024;
+                break;
+        case 1400:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_1400X1050;
+                break;
+        case 1440:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_1440X1050;
+                break;
+        case 1600:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_1600X1200;
+                break;
+        default:
+                viaparinfo->tmds_setting_info->dvi_panel_size =
+                        VIA_RES_1024X768;
+                DEBUG_MSG(KERN_INFO "Unknow panel size max resolution = %d!\
+                                        set default panel size.\n", HSize);
+                break;
+        }
+
+        viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore;
+        return viaparinfo->tmds_setting_info->dvi_panel_size;
+}
+
+/*
+ *
+ * unsigned char dvi_get_panel_info(void)
+ *
+ *     - Get Panel Size
+ *
+ * Return Type:    unsigned char
+ */
+static unsigned char dvi_get_panel_info(void)
+{
+        unsigned char dvipanelsize;
+        DEBUG_MSG(KERN_INFO "dvi_get_panel_info! \n");
+
+        viafb_dvi_sense();
+        switch (viafb_dvi_query_EDID()) {
+        case 1:
+                dvi_get_panel_size_from_DDCv1();
+                break;
+        case 2:
+                dvi_get_panel_size_from_DDCv2();
+                break;
+        default:
+                break;
+        }
+
+        DEBUG_MSG(KERN_INFO "dvi panel size is %2d \n",
+                  viaparinfo->tmds_setting_info->dvi_panel_size);
+        dvipanelsize = (unsigned char)(viaparinfo->
+                tmds_setting_info->dvi_panel_size);
+        return dvipanelsize;
+}
+
+/* If Disable DVI, turn off pad */
+void viafb_dvi_disable(void)
+{
+        if (viaparinfo->chip_info->
+                tmds_chip_info.output_interface == INTERFACE_DVP0)
+                viafb_write_reg(SR1E, VIASR,
+                viafb_read_reg(VIASR, SR1E) & (~0xC0));
+
+        if (viaparinfo->chip_info->
+                tmds_chip_info.output_interface == INTERFACE_DVP1)
+                viafb_write_reg(SR1E, VIASR,
+                viafb_read_reg(VIASR, SR1E) & (~0x30));
+
+        if (viaparinfo->chip_info->
+                tmds_chip_info.output_interface == INTERFACE_DFP_HIGH)
+                viafb_write_reg(SR2A, VIASR,
+                viafb_read_reg(VIASR, SR2A) & (~0x0C));
+
+        if (viaparinfo->chip_info->
+                tmds_chip_info.output_interface == INTERFACE_DFP_LOW)
+                viafb_write_reg(SR2A, VIASR,
+                viafb_read_reg(VIASR, SR2A) & (~0x03));
+
+        if (viaparinfo->chip_info->
+                tmds_chip_info.output_interface == INTERFACE_TMDS)
+                /* Turn off TMDS power. */
+                viafb_write_reg(CRD2, VIACR,
+                viafb_read_reg(VIACR, CRD2) | 0x08);
+}
+
+/* If Enable DVI, turn off pad */
+void viafb_dvi_enable(void)
+{
+        u8 data;
+
+        if (viaparinfo->chip_info->
+                tmds_chip_info.output_interface == INTERFACE_DVP0) {
+                viafb_write_reg(SR1E, VIASR,
+                        viafb_read_reg(VIASR, SR1E) | 0xC0);
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
+                        tmds_register_write(0x88, 0x3b);
+                else
+                        /*clear CR91[5] to direct on display period
+                           in the secondary diplay path */
+                        viafb_write_reg(CR91, VIACR,
+                        viafb_read_reg(VIACR, CR91) & 0xDF);
+        }
+
+        if (viaparinfo->chip_info->
+                tmds_chip_info.output_interface == INTERFACE_DVP1) {
+                viafb_write_reg(SR1E, VIASR,
+                        viafb_read_reg(VIASR, SR1E) | 0x30);
+
+                /*fix dvi cann't be enabled with MB VT5718C4 - Al Zhang */
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
+                        tmds_register_write(0x88, 0x3b);
+                } else {
+                        /*clear CR91[5] to direct on display period
+                          in the secondary diplay path */
+                        viafb_write_reg(CR91, VIACR,
+                        viafb_read_reg(VIACR, CR91) & 0xDF);
+                }
+
+                /*fix DVI cannot enable on EPIA-M board */
+                if (viafb_platform_epia_dvi == 1) {
+                        viafb_write_reg_mask(CR91, VIACR, 0x1f, 0x1f);
+                        viafb_write_reg_mask(CR88, VIACR, 0x00, BIT6 + BIT0);
+                        if (viafb_bus_width == 24) {
+                                if (viafb_device_lcd_dualedge == 1)
+                                        data = 0x3F;
+                                else
+                                        data = 0x37;
+                                viafb_i2c_writebyte(viaparinfo->chip_info->
+                                             tmds_chip_info.
+                                             tmds_chip_slave_addr,
+                                             0x08, data);
+                        }
+                }
+        }
+
+        if (viaparinfo->chip_info->
+                tmds_chip_info.output_interface == INTERFACE_DFP_HIGH) {
+                viafb_write_reg(SR2A, VIASR,
+                        viafb_read_reg(VIASR, SR2A) | 0x0C);
+                viafb_write_reg(CR91, VIACR,
+                        viafb_read_reg(VIACR, CR91) & 0xDF);
+        }
+
+        if (viaparinfo->chip_info->
+                tmds_chip_info.output_interface == INTERFACE_DFP_LOW) {
+                viafb_write_reg(SR2A, VIASR,
+                        viafb_read_reg(VIASR, SR2A) | 0x03);
+                viafb_write_reg(CR91, VIACR,
+                        viafb_read_reg(VIACR, CR91) & 0xDF);
+        }
+        if (viaparinfo->chip_info->
+                tmds_chip_info.output_interface == INTERFACE_TMDS) {
+                /* Turn on Display period in the panel path. */
+                viafb_write_reg_mask(CR91, VIACR, 0, BIT7);
+
+                /* Turn on TMDS power. */
+                viafb_write_reg_mask(CRD2, VIACR, 0, BIT3);
+        }
+}
+
diff --git a/drivers/video/via/dvi.h b/drivers/video/via/dvi.h
new file mode 100644
index 000000000000..e1ec37fb0dc3
--- /dev/null
+++ b/drivers/video/via/dvi.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef __DVI_H__
+#define __DVI_H__
+
+/*Definition TMDS Device ID register*/
+#define     VT1632_DEVICE_ID_REG        0x02
+#define     VT1632_DEVICE_ID            0x92
+
+#define     GET_DVI_SIZE_BY_SYSTEM_BIOS     0x01
+#define     GET_DVI_SIZE_BY_VGA_BIOS        0x02
+#define     GET_DVI_SZIE_BY_HW_STRAPPING    0x03
+
+/* Definition DVI Panel ID*/
+/* Resolution: 640x480,   Channel: single, Dithering: Enable */
+#define     DVI_PANEL_ID0_640X480       0x00
+/* Resolution: 800x600,   Channel: single, Dithering: Enable */
+#define     DVI_PANEL_ID1_800x600       0x01
+/* Resolution: 1024x768,  Channel: single, Dithering: Enable */
+#define     DVI_PANEL_ID1_1024x768      0x02
+/* Resolution: 1280x768,  Channel: single, Dithering: Enable */
+#define     DVI_PANEL_ID1_1280x768      0x03
+/* Resolution: 1280x1024, Channel: dual,   Dithering: Enable */
+#define     DVI_PANEL_ID1_1280x1024     0x04
+/* Resolution: 1400x1050, Channel: dual,   Dithering: Enable */
+#define     DVI_PANEL_ID1_1400x1050     0x05
+/* Resolution: 1600x1200, Channel: dual,   Dithering: Enable */
+#define     DVI_PANEL_ID1_1600x1200     0x06
+
+/* Define the version of EDID*/
+#define     EDID_VERSION_1      1
+#define     EDID_VERSION_2      2
+
+#define     DEV_CONNECT_DVI     0x01
+#define     DEV_CONNECT_HDMI    0x02
+
+struct VideoModeTable *viafb_get_cea_mode_tbl_pointer(int Index);
+int viafb_dvi_sense(void);
+void viafb_dvi_disable(void);
+void viafb_dvi_enable(void);
+int viafb_tmds_trasmitter_identify(void);
+void viafb_init_dvi_size(void);
+void viafb_dvi_set_mode(int video_index, int mode_bpp, int set_iga);
+
+#endif /* __DVI_H__ */
diff --git a/drivers/video/via/global.c b/drivers/video/via/global.c
new file mode 100644
index 000000000000..468be2425af3
--- /dev/null
+++ b/drivers/video/via/global.c
@@ -0,0 +1,60 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+#include "global.h"
+int viafb_platform_epia_dvi = STATE_OFF;
+int viafb_device_lcd_dualedge = STATE_OFF;
+int viafb_bus_width = 12;
+int viafb_display_hardware_layout = HW_LAYOUT_LCD_DVI;
+int viafb_memsize;
+int viafb_DeviceStatus = CRT_Device;
+int viafb_hotplug;
+int viafb_refresh = 60;
+int viafb_refresh1 = 60;
+int viafb_lcd_dsp_method = LCD_EXPANDSION;
+int viafb_lcd_mode = LCD_OPENLDI;
+int viafb_bpp = 32;
+int viafb_bpp1 = 32;
+int viafb_accel = 1;
+int viafb_CRT_ON = 1;
+int viafb_DVI_ON;
+int viafb_LCD_ON ;
+int viafb_LCD2_ON;
+int viafb_SAMM_ON;
+int viafb_dual_fb;
+int viafb_hotplug_Xres = 640;
+int viafb_hotplug_Yres = 480;
+int viafb_hotplug_bpp = 32;
+int viafb_hotplug_refresh = 60;
+unsigned int viafb_second_offset;
+int viafb_second_size;
+int viafb_primary_dev = None_Device;
+void __iomem *viafb_FB_MM;
+unsigned int viafb_second_xres = 640;
+unsigned int viafb_second_yres = 480;
+unsigned int viafb_second_virtual_xres;
+unsigned int viafb_second_virtual_yres;
+int viafb_lcd_panel_id = LCD_PANEL_ID_MAXIMUM + 1;
+struct fb_cursor viacursor;
+struct fb_info *viafbinfo;
+struct fb_info *viafbinfo1;
+struct viafb_par *viaparinfo;
+struct viafb_par *viaparinfo1;
+
diff --git a/drivers/video/via/global.h b/drivers/video/via/global.h
new file mode 100644
index 000000000000..8e5263c5b812
--- /dev/null
+++ b/drivers/video/via/global.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef __GLOBAL_H__
+#define __GLOBAL_H__
+
+#include <linux/fb.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/pci.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+#include <linux/init.h>
+#include <linux/proc_fs.h>
+#include <linux/console.h>
+#include <linux/timer.h>
+
+#include "debug.h"
+
+#include "iface.h"
+#include "viafbdev.h"
+#include "chip.h"
+#include "debug.h"
+#include "accel.h"
+#include "share.h"
+#include "dvi.h"
+#include "viamode.h"
+#include "via_i2c.h"
+#include "hw.h"
+
+#include "lcd.h"
+#include "ioctl.h"
+#include "viamode.h"
+#include "via_utility.h"
+#include "vt1636.h"
+#include "tblDPASetting.h"
+#include "tbl1636.h"
+#include "viafbdev.h"
+
+/* External struct*/
+
+extern int viafb_platform_epia_dvi;
+extern int viafb_device_lcd_dualedge;
+extern int viafb_bus_width;
+extern int viafb_display_hardware_layout;
+extern struct offset offset_reg;
+extern struct viafb_par *viaparinfo;
+extern struct viafb_par *viaparinfo1;
+extern struct fb_info *viafbinfo;
+extern struct fb_info *viafbinfo1;
+extern int viafb_DeviceStatus;
+extern int viafb_refresh;
+extern int viafb_refresh1;
+extern int viafb_lcd_dsp_method;
+extern int viafb_lcd_mode;
+extern int viafb_bpp;
+extern int viafb_bpp1;
+
+extern int viafb_CRT_ON;
+extern int viafb_hotplug_Xres;
+extern int viafb_hotplug_Yres;
+extern int viafb_hotplug_bpp;
+extern int viafb_hotplug_refresh;
+extern int viafb_primary_dev;
+extern void __iomem *viafb_FB_MM;
+extern struct fb_cursor viacursor;
+
+extern unsigned int viafb_second_xres;
+extern unsigned int viafb_second_yres;
+extern int viafb_lcd_panel_id;
+
+#endif /* __GLOBAL_H__ */
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
new file mode 100644
index 000000000000..fcd53ceb88fa
--- /dev/null
+++ b/drivers/video/via/hw.c
@@ -0,0 +1,2865 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include "global.h"
+
+static const struct pci_device_id_info pciidlist[] = {
+        {PCI_VIA_VENDOR_ID, UNICHROME_CLE266_DID, UNICHROME_CLE266},
+        {PCI_VIA_VENDOR_ID, UNICHROME_PM800_DID, UNICHROME_PM800},
+        {PCI_VIA_VENDOR_ID, UNICHROME_K400_DID, UNICHROME_K400},
+        {PCI_VIA_VENDOR_ID, UNICHROME_K800_DID, UNICHROME_K800},
+        {PCI_VIA_VENDOR_ID, UNICHROME_CN700_DID, UNICHROME_CN700},
+        {PCI_VIA_VENDOR_ID, UNICHROME_P4M890_DID, UNICHROME_P4M890},
+        {PCI_VIA_VENDOR_ID, UNICHROME_K8M890_DID, UNICHROME_K8M890},
+        {PCI_VIA_VENDOR_ID, UNICHROME_CX700_DID, UNICHROME_CX700},
+        {PCI_VIA_VENDOR_ID, UNICHROME_P4M900_DID, UNICHROME_P4M900},
+        {PCI_VIA_VENDOR_ID, UNICHROME_CN750_DID, UNICHROME_CN750},
+        {PCI_VIA_VENDOR_ID, UNICHROME_VX800_DID, UNICHROME_VX800},
+        {0, 0, 0}
+};
+
+struct offset offset_reg = {
+        /* IGA1 Offset Register */
+        {IGA1_OFFSET_REG_NUM, {{CR13, 0, 7}, {CR35, 5, 7} } },
+        /* IGA2 Offset Register */
+        {IGA2_OFFSET_REG_NUM, {{CR66, 0, 7}, {CR67, 0, 1} } }
+};
+
+static struct pll_map pll_value[] = {
+        {CLK_25_175M, CLE266_PLL_25_175M, K800_PLL_25_175M, CX700_25_175M},
+        {CLK_29_581M, CLE266_PLL_29_581M, K800_PLL_29_581M, CX700_29_581M},
+        {CLK_26_880M, CLE266_PLL_26_880M, K800_PLL_26_880M, CX700_26_880M},
+        {CLK_31_490M, CLE266_PLL_31_490M, K800_PLL_31_490M, CX700_31_490M},
+        {CLK_31_500M, CLE266_PLL_31_500M, K800_PLL_31_500M, CX700_31_500M},
+        {CLK_31_728M, CLE266_PLL_31_728M, K800_PLL_31_728M, CX700_31_728M},
+        {CLK_32_668M, CLE266_PLL_32_668M, K800_PLL_32_668M, CX700_32_668M},
+        {CLK_36_000M, CLE266_PLL_36_000M, K800_PLL_36_000M, CX700_36_000M},
+        {CLK_40_000M, CLE266_PLL_40_000M, K800_PLL_40_000M, CX700_40_000M},
+        {CLK_41_291M, CLE266_PLL_41_291M, K800_PLL_41_291M, CX700_41_291M},
+        {CLK_43_163M, CLE266_PLL_43_163M, K800_PLL_43_163M, CX700_43_163M},
+        {CLK_45_250M, CLE266_PLL_45_250M, K800_PLL_45_250M, CX700_45_250M},
+        {CLK_46_000M, CLE266_PLL_46_000M, K800_PLL_46_000M, CX700_46_000M},
+        {CLK_46_996M, CLE266_PLL_46_996M, K800_PLL_46_996M, CX700_46_996M},
+        {CLK_48_000M, CLE266_PLL_48_000M, K800_PLL_48_000M, CX700_48_000M},
+        {CLK_48_875M, CLE266_PLL_48_875M, K800_PLL_48_875M, CX700_48_875M},
+        {CLK_49_500M, CLE266_PLL_49_500M, K800_PLL_49_500M, CX700_49_500M},
+        {CLK_52_406M, CLE266_PLL_52_406M, K800_PLL_52_406M, CX700_52_406M},
+        {CLK_52_977M, CLE266_PLL_52_977M, K800_PLL_52_977M, CX700_52_977M},
+        {CLK_56_250M, CLE266_PLL_56_250M, K800_PLL_56_250M, CX700_56_250M},
+        {CLK_60_466M, CLE266_PLL_60_466M, K800_PLL_60_466M, CX700_60_466M},
+        {CLK_61_500M, CLE266_PLL_61_500M, K800_PLL_61_500M, CX700_61_500M},
+        {CLK_65_000M, CLE266_PLL_65_000M, K800_PLL_65_000M, CX700_65_000M},
+        {CLK_65_178M, CLE266_PLL_65_178M, K800_PLL_65_178M, CX700_65_178M},
+        {CLK_66_750M, CLE266_PLL_66_750M, K800_PLL_66_750M, CX700_66_750M},
+        {CLK_68_179M, CLE266_PLL_68_179M, K800_PLL_68_179M, CX700_68_179M},
+        {CLK_69_924M, CLE266_PLL_69_924M, K800_PLL_69_924M, CX700_69_924M},
+        {CLK_70_159M, CLE266_PLL_70_159M, K800_PLL_70_159M, CX700_70_159M},
+        {CLK_72_000M, CLE266_PLL_72_000M, K800_PLL_72_000M, CX700_72_000M},
+        {CLK_78_750M, CLE266_PLL_78_750M, K800_PLL_78_750M, CX700_78_750M},
+        {CLK_80_136M, CLE266_PLL_80_136M, K800_PLL_80_136M, CX700_80_136M},
+        {CLK_83_375M, CLE266_PLL_83_375M, K800_PLL_83_375M, CX700_83_375M},
+        {CLK_83_950M, CLE266_PLL_83_950M, K800_PLL_83_950M, CX700_83_950M},
+        {CLK_84_750M, CLE266_PLL_84_750M, K800_PLL_84_750M, CX700_84_750M},
+        {CLK_85_860M, CLE266_PLL_85_860M, K800_PLL_85_860M, CX700_85_860M},
+        {CLK_88_750M, CLE266_PLL_88_750M, K800_PLL_88_750M, CX700_88_750M},
+        {CLK_94_500M, CLE266_PLL_94_500M, K800_PLL_94_500M, CX700_94_500M},
+        {CLK_97_750M, CLE266_PLL_97_750M, K800_PLL_97_750M, CX700_97_750M},
+        {CLK_101_000M, CLE266_PLL_101_000M, K800_PLL_101_000M,
+         CX700_101_000M},
+        {CLK_106_500M, CLE266_PLL_106_500M, K800_PLL_106_500M,
+         CX700_106_500M},
+        {CLK_108_000M, CLE266_PLL_108_000M, K800_PLL_108_000M,
+         CX700_108_000M},
+        {CLK_113_309M, CLE266_PLL_113_309M, K800_PLL_113_309M,
+         CX700_113_309M},
+        {CLK_118_840M, CLE266_PLL_118_840M, K800_PLL_118_840M,
+         CX700_118_840M},
+        {CLK_119_000M, CLE266_PLL_119_000M, K800_PLL_119_000M,
+         CX700_119_000M},
+        {CLK_121_750M, CLE266_PLL_121_750M, K800_PLL_121_750M,
+         CX700_121_750M},
+        {CLK_125_104M, CLE266_PLL_125_104M, K800_PLL_125_104M,
+         CX700_125_104M},
+        {CLK_133_308M, CLE266_PLL_133_308M, K800_PLL_133_308M,
+         CX700_133_308M},
+        {CLK_135_000M, CLE266_PLL_135_000M, K800_PLL_135_000M,
+         CX700_135_000M},
+        {CLK_136_700M, CLE266_PLL_136_700M, K800_PLL_136_700M,
+         CX700_136_700M},
+        {CLK_138_400M, CLE266_PLL_138_400M, K800_PLL_138_400M,
+         CX700_138_400M},
+        {CLK_146_760M, CLE266_PLL_146_760M, K800_PLL_146_760M,
+         CX700_146_760M},
+        {CLK_153_920M, CLE266_PLL_153_920M, K800_PLL_153_920M,
+         CX700_153_920M},
+        {CLK_156_000M, CLE266_PLL_156_000M, K800_PLL_156_000M,
+         CX700_156_000M},
+        {CLK_157_500M, CLE266_PLL_157_500M, K800_PLL_157_500M,
+         CX700_157_500M},
+        {CLK_162_000M, CLE266_PLL_162_000M, K800_PLL_162_000M,
+         CX700_162_000M},
+        {CLK_187_000M, CLE266_PLL_187_000M, K800_PLL_187_000M,
+         CX700_187_000M},
+        {CLK_193_295M, CLE266_PLL_193_295M, K800_PLL_193_295M,
+         CX700_193_295M},
+        {CLK_202_500M, CLE266_PLL_202_500M, K800_PLL_202_500M,
+         CX700_202_500M},
+        {CLK_204_000M, CLE266_PLL_204_000M, K800_PLL_204_000M,
+         CX700_204_000M},
+        {CLK_218_500M, CLE266_PLL_218_500M, K800_PLL_218_500M,
+         CX700_218_500M},
+        {CLK_234_000M, CLE266_PLL_234_000M, K800_PLL_234_000M,
+         CX700_234_000M},
+        {CLK_267_250M, CLE266_PLL_267_250M, K800_PLL_267_250M,
+         CX700_267_250M},
+        {CLK_297_500M, CLE266_PLL_297_500M, K800_PLL_297_500M,
+         CX700_297_500M},
+        {CLK_74_481M, CLE266_PLL_74_481M, K800_PLL_74_481M, CX700_74_481M},
+        {CLK_172_798M, CLE266_PLL_172_798M, K800_PLL_172_798M,
+         CX700_172_798M},
+        {CLK_122_614M, CLE266_PLL_122_614M, K800_PLL_122_614M,
+         CX700_122_614M},
+        {CLK_74_270M, CLE266_PLL_74_270M, K800_PLL_74_270M, CX700_74_270M},
+        {CLK_148_500M, CLE266_PLL_148_500M, K800_PLL_148_500M,
+         CX700_148_500M}
+};
+
+static struct fifo_depth_select display_fifo_depth_reg = {
+        /* IGA1 FIFO Depth_Select */
+        {IGA1_FIFO_DEPTH_SELECT_REG_NUM, {{SR17, 0, 7} } },
+        /* IGA2 FIFO Depth_Select */
+        {IGA2_FIFO_DEPTH_SELECT_REG_NUM,
+         {{CR68, 4, 7}, {CR94, 7, 7}, {CR95, 7, 7} } }
+};
+
+static struct fifo_threshold_select fifo_threshold_select_reg = {
+        /* IGA1 FIFO Threshold Select */
+        {IGA1_FIFO_THRESHOLD_REG_NUM, {{SR16, 0, 5}, {SR16, 7, 7} } },
+        /* IGA2 FIFO Threshold Select */
+        {IGA2_FIFO_THRESHOLD_REG_NUM, {{CR68, 0, 3}, {CR95, 4, 6} } }
+};
+
+static struct fifo_high_threshold_select fifo_high_threshold_select_reg = {
+        /* IGA1 FIFO High Threshold Select */
+        {IGA1_FIFO_HIGH_THRESHOLD_REG_NUM, {{SR18, 0, 5}, {SR18, 7, 7} } },
+        /* IGA2 FIFO High Threshold Select */
+        {IGA2_FIFO_HIGH_THRESHOLD_REG_NUM, {{CR92, 0, 3}, {CR95, 0, 2} } }
+};
+
+static struct display_queue_expire_num display_queue_expire_num_reg = {
+        /* IGA1 Display Queue Expire Num */
+        {IGA1_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM, {{SR22, 0, 4} } },
+        /* IGA2 Display Queue Expire Num */
+        {IGA2_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM, {{CR94, 0, 6} } }
+};
+
+/* Definition Fetch Count Registers*/
+static struct fetch_count fetch_count_reg = {
+        /* IGA1 Fetch Count Register */
+        {IGA1_FETCH_COUNT_REG_NUM, {{SR1C, 0, 7}, {SR1D, 0, 1} } },
+        /* IGA2 Fetch Count Register */
+        {IGA2_FETCH_COUNT_REG_NUM, {{CR65, 0, 7}, {CR67, 2, 3} } }
+};
+
+static struct iga1_crtc_timing iga1_crtc_reg = {
+        /* IGA1 Horizontal Total */
+        {IGA1_HOR_TOTAL_REG_NUM, {{CR00, 0, 7}, {CR36, 3, 3} } },
+        /* IGA1 Horizontal Addressable Video */
+        {IGA1_HOR_ADDR_REG_NUM, {{CR01, 0, 7} } },
+        /* IGA1 Horizontal Blank Start */
+        {IGA1_HOR_BLANK_START_REG_NUM, {{CR02, 0, 7} } },
+        /* IGA1 Horizontal Blank End */
+        {IGA1_HOR_BLANK_END_REG_NUM,
+         {{CR03, 0, 4}, {CR05, 7, 7}, {CR33, 5, 5} } },
+        /* IGA1 Horizontal Sync Start */
+        {IGA1_HOR_SYNC_START_REG_NUM, {{CR04, 0, 7}, {CR33, 4, 4} } },
+        /* IGA1 Horizontal Sync End */
+        {IGA1_HOR_SYNC_END_REG_NUM, {{CR05, 0, 4} } },
+        /* IGA1 Vertical Total */
+        {IGA1_VER_TOTAL_REG_NUM,
+         {{CR06, 0, 7}, {CR07, 0, 0}, {CR07, 5, 5}, {CR35, 0, 0} } },
+        /* IGA1 Vertical Addressable Video */
+        {IGA1_VER_ADDR_REG_NUM,
+         {{CR12, 0, 7}, {CR07, 1, 1}, {CR07, 6, 6}, {CR35, 2, 2} } },
+        /* IGA1 Vertical Blank Start */
+        {IGA1_VER_BLANK_START_REG_NUM,
+         {{CR15, 0, 7}, {CR07, 3, 3}, {CR09, 5, 5}, {CR35, 3, 3} } },
+        /* IGA1 Vertical Blank End */
+        {IGA1_VER_BLANK_END_REG_NUM, {{CR16, 0, 7} } },
+        /* IGA1 Vertical Sync Start */
+        {IGA1_VER_SYNC_START_REG_NUM,
+         {{CR10, 0, 7}, {CR07, 2, 2}, {CR07, 7, 7}, {CR35, 1, 1} } },
+        /* IGA1 Vertical Sync End */
+        {IGA1_VER_SYNC_END_REG_NUM, {{CR11, 0, 3} } }
+};
+
+static struct iga2_crtc_timing iga2_crtc_reg = {
+        /* IGA2 Horizontal Total */
+        {IGA2_HOR_TOTAL_REG_NUM, {{CR50, 0, 7}, {CR55, 0, 3} } },
+        /* IGA2 Horizontal Addressable Video */
+        {IGA2_HOR_ADDR_REG_NUM, {{CR51, 0, 7}, {CR55, 4, 6} } },
+        /* IGA2 Horizontal Blank Start */
+        {IGA2_HOR_BLANK_START_REG_NUM, {{CR52, 0, 7}, {CR54, 0, 2} } },
+        /* IGA2 Horizontal Blank End */
+        {IGA2_HOR_BLANK_END_REG_NUM,
+         {{CR53, 0, 7}, {CR54, 3, 5}, {CR5D, 6, 6} } },
+        /* IGA2 Horizontal Sync Start */
+        {IGA2_HOR_SYNC_START_REG_NUM,
+         {{CR56, 0, 7}, {CR54, 6, 7}, {CR5C, 7, 7}, {CR5D, 7, 7} } },
+        /* IGA2 Horizontal Sync End */
+        {IGA2_HOR_SYNC_END_REG_NUM, {{CR57, 0, 7}, {CR5C, 6, 6} } },
+        /* IGA2 Vertical Total */
+        {IGA2_VER_TOTAL_REG_NUM, {{CR58, 0, 7}, {CR5D, 0, 2} } },
+        /* IGA2 Vertical Addressable Video */
+        {IGA2_VER_ADDR_REG_NUM, {{CR59, 0, 7}, {CR5D, 3, 5} } },
+        /* IGA2 Vertical Blank Start */
+        {IGA2_VER_BLANK_START_REG_NUM, {{CR5A, 0, 7}, {CR5C, 0, 2} } },
+        /* IGA2 Vertical Blank End */
+        {IGA2_VER_BLANK_END_REG_NUM, {{CR5B, 0, 7}, {CR5C, 3, 5} } },
+        /* IGA2 Vertical Sync Start */
+        {IGA2_VER_SYNC_START_REG_NUM, {{CR5E, 0, 7}, {CR5F, 5, 7} } },
+        /* IGA2 Vertical Sync End */
+        {IGA2_VER_SYNC_END_REG_NUM, {{CR5F, 0, 4} } }
+};
+
+static struct rgbLUT palLUT_table[] = {
+        /* {R,G,B} */
+        /* Index 0x00~0x03 */
+        {0x00, 0x00, 0x00}, {0x00, 0x00, 0x2A}, {0x00, 0x2A, 0x00}, {0x00,
+                                                                     0x2A,
+                                                                     0x2A},
+        /* Index 0x04~0x07 */
+        {0x2A, 0x00, 0x00}, {0x2A, 0x00, 0x2A}, {0x2A, 0x15, 0x00}, {0x2A,
+                                                                     0x2A,
+                                                                     0x2A},
+        /* Index 0x08~0x0B */
+        {0x15, 0x15, 0x15}, {0x15, 0x15, 0x3F}, {0x15, 0x3F, 0x15}, {0x15,
+                                                                     0x3F,
+                                                                     0x3F},
+        /* Index 0x0C~0x0F */
+        {0x3F, 0x15, 0x15}, {0x3F, 0x15, 0x3F}, {0x3F, 0x3F, 0x15}, {0x3F,
+                                                                     0x3F,
+                                                                     0x3F},
+        /* Index 0x10~0x13 */
+        {0x00, 0x00, 0x00}, {0x05, 0x05, 0x05}, {0x08, 0x08, 0x08}, {0x0B,
+                                                                     0x0B,
+                                                                     0x0B},
+        /* Index 0x14~0x17 */
+        {0x0E, 0x0E, 0x0E}, {0x11, 0x11, 0x11}, {0x14, 0x14, 0x14}, {0x18,
+                                                                     0x18,
+                                                                     0x18},
+        /* Index 0x18~0x1B */
+        {0x1C, 0x1C, 0x1C}, {0x20, 0x20, 0x20}, {0x24, 0x24, 0x24}, {0x28,
+                                                                     0x28,
+                                                                     0x28},
+        /* Index 0x1C~0x1F */
+        {0x2D, 0x2D, 0x2D}, {0x32, 0x32, 0x32}, {0x38, 0x38, 0x38}, {0x3F,
+                                                                     0x3F,
+                                                                     0x3F},
+        /* Index 0x20~0x23 */
+        {0x00, 0x00, 0x3F}, {0x10, 0x00, 0x3F}, {0x1F, 0x00, 0x3F}, {0x2F,
+                                                                     0x00,
+                                                                     0x3F},
+        /* Index 0x24~0x27 */
+        {0x3F, 0x00, 0x3F}, {0x3F, 0x00, 0x2F}, {0x3F, 0x00, 0x1F}, {0x3F,
+                                                                     0x00,
+                                                                     0x10},
+        /* Index 0x28~0x2B */
+        {0x3F, 0x00, 0x00}, {0x3F, 0x10, 0x00}, {0x3F, 0x1F, 0x00}, {0x3F,
+                                                                     0x2F,
+                                                                     0x00},
+        /* Index 0x2C~0x2F */
+        {0x3F, 0x3F, 0x00}, {0x2F, 0x3F, 0x00}, {0x1F, 0x3F, 0x00}, {0x10,
+                                                                     0x3F,
+                                                                     0x00},
+        /* Index 0x30~0x33 */
+        {0x00, 0x3F, 0x00}, {0x00, 0x3F, 0x10}, {0x00, 0x3F, 0x1F}, {0x00,
+                                                                     0x3F,
+                                                                     0x2F},
+        /* Index 0x34~0x37 */
+        {0x00, 0x3F, 0x3F}, {0x00, 0x2F, 0x3F}, {0x00, 0x1F, 0x3F}, {0x00,
+                                                                     0x10,
+                                                                     0x3F},
+        /* Index 0x38~0x3B */
+        {0x1F, 0x1F, 0x3F}, {0x27, 0x1F, 0x3F}, {0x2F, 0x1F, 0x3F}, {0x37,
+                                                                     0x1F,
+                                                                     0x3F},
+        /* Index 0x3C~0x3F */
+        {0x3F, 0x1F, 0x3F}, {0x3F, 0x1F, 0x37}, {0x3F, 0x1F, 0x2F}, {0x3F,
+                                                                     0x1F,
+                                                                     0x27},
+        /* Index 0x40~0x43 */
+        {0x3F, 0x1F, 0x1F}, {0x3F, 0x27, 0x1F}, {0x3F, 0x2F, 0x1F}, {0x3F,
+                                                                     0x3F,
+                                                                     0x1F},
+        /* Index 0x44~0x47 */
+        {0x3F, 0x3F, 0x1F}, {0x37, 0x3F, 0x1F}, {0x2F, 0x3F, 0x1F}, {0x27,
+                                                                     0x3F,
+                                                                     0x1F},
+        /* Index 0x48~0x4B */
+        {0x1F, 0x3F, 0x1F}, {0x1F, 0x3F, 0x27}, {0x1F, 0x3F, 0x2F}, {0x1F,
+                                                                     0x3F,
+                                                                     0x37},
+        /* Index 0x4C~0x4F */
+        {0x1F, 0x3F, 0x3F}, {0x1F, 0x37, 0x3F}, {0x1F, 0x2F, 0x3F}, {0x1F,
+                                                                     0x27,
+                                                                     0x3F},
+        /* Index 0x50~0x53 */
+        {0x2D, 0x2D, 0x3F}, {0x31, 0x2D, 0x3F}, {0x36, 0x2D, 0x3F}, {0x3A,
+                                                                     0x2D,
+                                                                     0x3F},
+        /* Index 0x54~0x57 */
+        {0x3F, 0x2D, 0x3F}, {0x3F, 0x2D, 0x3A}, {0x3F, 0x2D, 0x36}, {0x3F,
+                                                                     0x2D,
+                                                                     0x31},
+        /* Index 0x58~0x5B */
+        {0x3F, 0x2D, 0x2D}, {0x3F, 0x31, 0x2D}, {0x3F, 0x36, 0x2D}, {0x3F,
+                                                                     0x3A,
+                                                                     0x2D},
+        /* Index 0x5C~0x5F */
+        {0x3F, 0x3F, 0x2D}, {0x3A, 0x3F, 0x2D}, {0x36, 0x3F, 0x2D}, {0x31,
+                                                                     0x3F,
+                                                                     0x2D},
+        /* Index 0x60~0x63 */
+        {0x2D, 0x3F, 0x2D}, {0x2D, 0x3F, 0x31}, {0x2D, 0x3F, 0x36}, {0x2D,
+                                                                     0x3F,
+                                                                     0x3A},
+        /* Index 0x64~0x67 */
+        {0x2D, 0x3F, 0x3F}, {0x2D, 0x3A, 0x3F}, {0x2D, 0x36, 0x3F}, {0x2D,
+                                                                     0x31,
+                                                                     0x3F},
+        /* Index 0x68~0x6B */
+        {0x00, 0x00, 0x1C}, {0x07, 0x00, 0x1C}, {0x0E, 0x00, 0x1C}, {0x15,
+                                                                     0x00,
+                                                                     0x1C},
+        /* Index 0x6C~0x6F */
+        {0x1C, 0x00, 0x1C}, {0x1C, 0x00, 0x15}, {0x1C, 0x00, 0x0E}, {0x1C,
+                                                                     0x00,
+                                                                     0x07},
+        /* Index 0x70~0x73 */
+        {0x1C, 0x00, 0x00}, {0x1C, 0x07, 0x00}, {0x1C, 0x0E, 0x00}, {0x1C,
+                                                                     0x15,
+                                                                     0x00},
+        /* Index 0x74~0x77 */
+        {0x1C, 0x1C, 0x00}, {0x15, 0x1C, 0x00}, {0x0E, 0x1C, 0x00}, {0x07,
+                                                                     0x1C,
+                                                                     0x00},
+        /* Index 0x78~0x7B */
+        {0x00, 0x1C, 0x00}, {0x00, 0x1C, 0x07}, {0x00, 0x1C, 0x0E}, {0x00,
+                                                                     0x1C,
+                                                                     0x15},
+        /* Index 0x7C~0x7F */
+        {0x00, 0x1C, 0x1C}, {0x00, 0x15, 0x1C}, {0x00, 0x0E, 0x1C}, {0x00,
+                                                                     0x07,
+                                                                     0x1C},
+        /* Index 0x80~0x83 */
+        {0x0E, 0x0E, 0x1C}, {0x11, 0x0E, 0x1C}, {0x15, 0x0E, 0x1C}, {0x18,
+                                                                     0x0E,
+                                                                     0x1C},
+        /* Index 0x84~0x87 */
+        {0x1C, 0x0E, 0x1C}, {0x1C, 0x0E, 0x18}, {0x1C, 0x0E, 0x15}, {0x1C,
+                                                                     0x0E,
+                                                                     0x11},
+        /* Index 0x88~0x8B */
+        {0x1C, 0x0E, 0x0E}, {0x1C, 0x11, 0x0E}, {0x1C, 0x15, 0x0E}, {0x1C,
+                                                                     0x18,
+                                                                     0x0E},
+        /* Index 0x8C~0x8F */
+        {0x1C, 0x1C, 0x0E}, {0x18, 0x1C, 0x0E}, {0x15, 0x1C, 0x0E}, {0x11,
+                                                                     0x1C,
+                                                                     0x0E},
+        /* Index 0x90~0x93 */
+        {0x0E, 0x1C, 0x0E}, {0x0E, 0x1C, 0x11}, {0x0E, 0x1C, 0x15}, {0x0E,
+                                                                     0x1C,
+                                                                     0x18},
+        /* Index 0x94~0x97 */
+        {0x0E, 0x1C, 0x1C}, {0x0E, 0x18, 0x1C}, {0x0E, 0x15, 0x1C}, {0x0E,
+                                                                     0x11,
+                                                                     0x1C},
+        /* Index 0x98~0x9B */
+        {0x14, 0x14, 0x1C}, {0x16, 0x14, 0x1C}, {0x18, 0x14, 0x1C}, {0x1A,
+                                                                     0x14,
+                                                                     0x1C},
+        /* Index 0x9C~0x9F */
+        {0x1C, 0x14, 0x1C}, {0x1C, 0x14, 0x1A}, {0x1C, 0x14, 0x18}, {0x1C,
+                                                                     0x14,
+                                                                     0x16},
+        /* Index 0xA0~0xA3 */
+        {0x1C, 0x14, 0x14}, {0x1C, 0x16, 0x14}, {0x1C, 0x18, 0x14}, {0x1C,
+                                                                     0x1A,
+                                                                     0x14},
+        /* Index 0xA4~0xA7 */
+        {0x1C, 0x1C, 0x14}, {0x1A, 0x1C, 0x14}, {0x18, 0x1C, 0x14}, {0x16,
+                                                                     0x1C,
+                                                                     0x14},
+        /* Index 0xA8~0xAB */
+        {0x14, 0x1C, 0x14}, {0x14, 0x1C, 0x16}, {0x14, 0x1C, 0x18}, {0x14,
+                                                                     0x1C,
+                                                                     0x1A},
+        /* Index 0xAC~0xAF */
+        {0x14, 0x1C, 0x1C}, {0x14, 0x1A, 0x1C}, {0x14, 0x18, 0x1C}, {0x14,
+                                                                     0x16,
+                                                                     0x1C},
+        /* Index 0xB0~0xB3 */
+        {0x00, 0x00, 0x10}, {0x04, 0x00, 0x10}, {0x08, 0x00, 0x10}, {0x0C,
+                                                                     0x00,
+                                                                     0x10},
+        /* Index 0xB4~0xB7 */
+        {0x10, 0x00, 0x10}, {0x10, 0x00, 0x0C}, {0x10, 0x00, 0x08}, {0x10,
+                                                                     0x00,
+                                                                     0x04},
+        /* Index 0xB8~0xBB */
+        {0x10, 0x00, 0x00}, {0x10, 0x04, 0x00}, {0x10, 0x08, 0x00}, {0x10,
+                                                                     0x0C,
+                                                                     0x00},
+        /* Index 0xBC~0xBF */
+        {0x10, 0x10, 0x00}, {0x0C, 0x10, 0x00}, {0x08, 0x10, 0x00}, {0x04,
+                                                                     0x10,
+                                                                     0x00},
+        /* Index 0xC0~0xC3 */
+        {0x00, 0x10, 0x00}, {0x00, 0x10, 0x04}, {0x00, 0x10, 0x08}, {0x00,
+                                                                     0x10,
+                                                                     0x0C},
+        /* Index 0xC4~0xC7 */
+        {0x00, 0x10, 0x10}, {0x00, 0x0C, 0x10}, {0x00, 0x08, 0x10}, {0x00,
+                                                                     0x04,
+                                                                     0x10},
+        /* Index 0xC8~0xCB */
+        {0x08, 0x08, 0x10}, {0x0A, 0x08, 0x10}, {0x0C, 0x08, 0x10}, {0x0E,
+                                                                     0x08,
+                                                                     0x10},
+        /* Index 0xCC~0xCF */
+        {0x10, 0x08, 0x10}, {0x10, 0x08, 0x0E}, {0x10, 0x08, 0x0C}, {0x10,
+                                                                     0x08,
+                                                                     0x0A},
+        /* Index 0xD0~0xD3 */
+        {0x10, 0x08, 0x08}, {0x10, 0x0A, 0x08}, {0x10, 0x0C, 0x08}, {0x10,
+                                                                     0x0E,
+                                                                     0x08},
+        /* Index 0xD4~0xD7 */
+        {0x10, 0x10, 0x08}, {0x0E, 0x10, 0x08}, {0x0C, 0x10, 0x08}, {0x0A,
+                                                                     0x10,
+                                                                     0x08},
+        /* Index 0xD8~0xDB */
+        {0x08, 0x10, 0x08}, {0x08, 0x10, 0x0A}, {0x08, 0x10, 0x0C}, {0x08,
+                                                                     0x10,
+                                                                     0x0E},
+        /* Index 0xDC~0xDF */
+        {0x08, 0x10, 0x10}, {0x08, 0x0E, 0x10}, {0x08, 0x0C, 0x10}, {0x08,
+                                                                     0x0A,
+                                                                     0x10},
+        /* Index 0xE0~0xE3 */
+        {0x0B, 0x0B, 0x10}, {0x0C, 0x0B, 0x10}, {0x0D, 0x0B, 0x10}, {0x0F,
+                                                                     0x0B,
+                                                                     0x10},
+        /* Index 0xE4~0xE7 */
+        {0x10, 0x0B, 0x10}, {0x10, 0x0B, 0x0F}, {0x10, 0x0B, 0x0D}, {0x10,
+                                                                     0x0B,
+                                                                     0x0C},
+        /* Index 0xE8~0xEB */
+        {0x10, 0x0B, 0x0B}, {0x10, 0x0C, 0x0B}, {0x10, 0x0D, 0x0B}, {0x10,
+                                                                     0x0F,
+                                                                     0x0B},
+        /* Index 0xEC~0xEF */
+        {0x10, 0x10, 0x0B}, {0x0F, 0x10, 0x0B}, {0x0D, 0x10, 0x0B}, {0x0C,
+                                                                     0x10,
+                                                                     0x0B},
+        /* Index 0xF0~0xF3 */
+        {0x0B, 0x10, 0x0B}, {0x0B, 0x10, 0x0C}, {0x0B, 0x10, 0x0D}, {0x0B,
+                                                                     0x10,
+                                                                     0x0F},
+        /* Index 0xF4~0xF7 */
+        {0x0B, 0x10, 0x10}, {0x0B, 0x0F, 0x10}, {0x0B, 0x0D, 0x10}, {0x0B,
+                                                                     0x0C,
+                                                                     0x10},
+        /* Index 0xF8~0xFB */
+        {0x00, 0x00, 0x00}, {0x00, 0x00, 0x00}, {0x00, 0x00, 0x00}, {0x00,
+                                                                     0x00,
+                                                                     0x00},
+        /* Index 0xFC~0xFF */
+        {0x00, 0x00, 0x00}, {0x00, 0x00, 0x00}, {0x00, 0x00, 0x00}, {0x00,
+                                                                     0x00,
+                                                                     0x00}
+};
+
+static void set_crt_output_path(int set_iga);
+static void dvi_patch_skew_dvp0(void);
+static void dvi_patch_skew_dvp1(void);
+static void dvi_patch_skew_dvp_low(void);
+static void set_dvi_output_path(int set_iga, int output_interface);
+static void set_lcd_output_path(int set_iga, int output_interface);
+static int search_mode_setting(int ModeInfoIndex);
+static void load_fix_bit_crtc_reg(void);
+static void init_gfx_chip_info(void);
+static void init_tmds_chip_info(void);
+static void init_lvds_chip_info(void);
+static void device_screen_off(void);
+static void device_screen_on(void);
+static void set_display_channel(void);
+static void device_off(void);
+static void device_on(void);
+static void enable_second_display_channel(void);
+static void disable_second_display_channel(void);
+static int get_fb_size_from_pci(void);
+
+void viafb_write_reg(u8 index, u16 io_port, u8 data)
+{
+        outb(index, io_port);
+        outb(data, io_port + 1);
+        /*DEBUG_MSG(KERN_INFO "\nIndex=%2d Value=%2d", index, data); */
+}
+u8 viafb_read_reg(int io_port, u8 index)
+{
+        outb(index, io_port);
+        return inb(io_port + 1);
+}
+
+void viafb_lock_crt(void)
+{
+        viafb_write_reg_mask(CR11, VIACR, BIT7, BIT7);
+}
+
+void viafb_unlock_crt(void)
+{
+        viafb_write_reg_mask(CR11, VIACR, 0, BIT7);
+        viafb_write_reg_mask(CR47, VIACR, 0, BIT0);
+}
+
+void viafb_write_reg_mask(u8 index, int io_port, u8 data, u8 mask)
+{
+        u8 tmp;
+
+        outb(index, io_port);
+        tmp = inb(io_port + 1);
+        outb((data & mask) | (tmp & (~mask)), io_port + 1);
+        /*DEBUG_MSG(KERN_INFO "\nIndex=%2d Value=%2d", index, tmp); */
+}
+
+void write_dac_reg(u8 index, u8 r, u8 g, u8 b)
+{
+        outb(index, LUT_INDEX_WRITE);
+        outb(r, LUT_DATA);
+        outb(g, LUT_DATA);
+        outb(b, LUT_DATA);
+}
+
+/*Set IGA path for each device*/
+void viafb_set_iga_path(void)
+{
+
+        if (viafb_SAMM_ON == 1) {
+                if (viafb_CRT_ON) {
+                        if (viafb_primary_dev == CRT_Device)
+                                viaparinfo->crt_setting_info->iga_path = IGA1;
+                        else
+                                viaparinfo->crt_setting_info->iga_path = IGA2;
+                }
+
+                if (viafb_DVI_ON) {
+                        if (viafb_primary_dev == DVI_Device)
+                                viaparinfo->tmds_setting_info->iga_path = IGA1;
+                        else
+                                viaparinfo->tmds_setting_info->iga_path = IGA2;
+                }
+
+                if (viafb_LCD_ON) {
+                        if (viafb_primary_dev == LCD_Device) {
+                                if (viafb_dual_fb &&
+                                        (viaparinfo->chip_info->gfx_chip_name ==
+                                        UNICHROME_CLE266)) {
+                                        viaparinfo->
+                                        lvds_setting_info->iga_path = IGA2;
+                                        viaparinfo->
+                                        crt_setting_info->iga_path = IGA1;
+                                        viaparinfo->
+                                        tmds_setting_info->iga_path = IGA1;
+                                } else
+                                        viaparinfo->
+                                        lvds_setting_info->iga_path = IGA1;
+                        } else {
+                                viaparinfo->lvds_setting_info->iga_path = IGA2;
+                        }
+                }
+                if (viafb_LCD2_ON) {
+                        if (LCD2_Device == viafb_primary_dev)
+                                viaparinfo->lvds_setting_info2->iga_path = IGA1;
+                        else
+                                viaparinfo->lvds_setting_info2->iga_path = IGA2;
+                }
+        } else {
+                viafb_SAMM_ON = 0;
+
+                if (viafb_CRT_ON && viafb_LCD_ON) {
+                        viaparinfo->crt_setting_info->iga_path = IGA1;
+                        viaparinfo->lvds_setting_info->iga_path = IGA2;
+                } else if (viafb_CRT_ON && viafb_DVI_ON) {
+                        viaparinfo->crt_setting_info->iga_path = IGA1;
+                        viaparinfo->tmds_setting_info->iga_path = IGA2;
+                } else if (viafb_LCD_ON && viafb_DVI_ON) {
+                        viaparinfo->tmds_setting_info->iga_path = IGA1;
+                        viaparinfo->lvds_setting_info->iga_path = IGA2;
+                } else if (viafb_LCD_ON && viafb_LCD2_ON) {
+                        viaparinfo->lvds_setting_info->iga_path = IGA2;
+                        viaparinfo->lvds_setting_info2->iga_path = IGA2;
+                } else if (viafb_CRT_ON) {
+                        viaparinfo->crt_setting_info->iga_path = IGA1;
+                } else if (viafb_LCD_ON) {
+                        viaparinfo->lvds_setting_info->iga_path = IGA2;
+                } else if (viafb_DVI_ON) {
+                        viaparinfo->tmds_setting_info->iga_path = IGA1;
+                }
+        }
+}
+
+void viafb_set_start_addr(void)
+{
+        unsigned long offset = 0, tmp = 0, size = 0;
+        unsigned long length;
+
+        DEBUG_MSG(KERN_INFO "viafb_set_start_addr!\n");
+        viafb_unlock_crt();
+        /* update starting address of IGA1 */
+        viafb_write_reg(CR0C, VIACR, 0x00);     /*initial starting address */
+        viafb_write_reg(CR0D, VIACR, 0x00);
+        viafb_write_reg(CR34, VIACR, 0x00);
+        viafb_write_reg_mask(CR48, VIACR, 0x00, 0x1F);
+
+        if (viafb_dual_fb) {
+                viaparinfo->iga_path = IGA1;
+                viaparinfo1->iga_path = IGA2;
+        }
+
+        if (viafb_SAMM_ON == 1) {
+                if (!viafb_dual_fb) {
+                        if (viafb_second_size)
+                                size = viafb_second_size * 1024 * 1024;
+                        else
+                                size = 8 * 1024 * 1024;
+                } else {
+
+                        size = viaparinfo1->memsize;
+                }
+                offset = viafb_second_offset;
+                DEBUG_MSG(KERN_INFO
+                          "viafb_second_size=%lx, second start_adddress=%lx\n",
+                          size, offset);
+        }
+        if (viafb_SAMM_ON == 1) {
+                offset = offset >> 3;
+
+                tmp = viafb_read_reg(VIACR, 0x62) & 0x01;
+                tmp |= (offset & 0x7F) << 1;
+                viafb_write_reg(CR62, VIACR, tmp);
+                viafb_write_reg(CR63, VIACR, ((offset & 0x7F80) >> 7));
+                viafb_write_reg(CR64, VIACR, ((offset & 0x7F8000) >> 15));
+                viafb_write_reg(CRA3, VIACR, ((offset & 0x3800000) >> 23));
+        } else {
+                /* update starting address */
+                viafb_write_reg(CR62, VIACR, 0x00);
+                viafb_write_reg(CR63, VIACR, 0x00);
+                viafb_write_reg(CR64, VIACR, 0x00);
+                viafb_write_reg(CRA3, VIACR, 0x00);
+        }
+
+        if (viafb_SAMM_ON == 1) {
+                if (viafb_accel) {
+                        if (!viafb_dual_fb)
+                                length = size - viaparinfo->fbmem_used;
+                        else
+                                length = size - viaparinfo1->fbmem_used;
+                } else
+                        length = size;
+                offset = (unsigned long)(void *)viafb_FB_MM +
+                        viafb_second_offset;
+                memset((void *)offset, 0, length);
+        }
+
+        viafb_lock_crt();
+}
+
+void viafb_set_output_path(int device, int set_iga, int output_interface)
+{
+        switch (device) {
+        case DEVICE_CRT:
+                set_crt_output_path(set_iga);
+                break;
+        case DEVICE_DVI:
+                set_dvi_output_path(set_iga, output_interface);
+                break;
+        case DEVICE_LCD:
+                set_lcd_output_path(set_iga, output_interface);
+                break;
+        }
+}
+
+static void set_crt_output_path(int set_iga)
+{
+        viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5);
+
+        switch (set_iga) {
+        case IGA1:
+                viafb_write_reg_mask(SR16, VIASR, 0x00, BIT6);
+                break;
+        case IGA2:
+        case IGA1_IGA2:
+                viafb_write_reg_mask(CR6A, VIACR, 0xC0, BIT6 + BIT7);
+                viafb_write_reg_mask(SR16, VIASR, 0x40, BIT6);
+                if (set_iga == IGA1_IGA2)
+                        viafb_write_reg_mask(CR6B, VIACR, 0x08, BIT3);
+                break;
+        }
+}
+
+static void dvi_patch_skew_dvp0(void)
+{
+        /* Reset data driving first: */
+        viafb_write_reg_mask(SR1B, VIASR, 0, BIT1);
+        viafb_write_reg_mask(SR2A, VIASR, 0, BIT4);
+
+        switch (viaparinfo->chip_info->gfx_chip_name) {
+        case UNICHROME_P4M890:
+                {
+                        if ((viaparinfo->tmds_setting_info->h_active == 1600) &&
+                                (viaparinfo->tmds_setting_info->v_active ==
+                                1200))
+                                viafb_write_reg_mask(CR96, VIACR, 0x03,
+                                               BIT0 + BIT1 + BIT2);
+                        else
+                                viafb_write_reg_mask(CR96, VIACR, 0x07,
+                                               BIT0 + BIT1 + BIT2);
+                        break;
+                }
+
+        case UNICHROME_P4M900:
+                {
+                        viafb_write_reg_mask(CR96, VIACR, 0x07,
+                                       BIT0 + BIT1 + BIT2 + BIT3);
+                        viafb_write_reg_mask(SR1B, VIASR, 0x02, BIT1);
+                        viafb_write_reg_mask(SR2A, VIASR, 0x10, BIT4);
+                        break;
+                }
+
+        default:
+                {
+                        break;
+                }
+        }
+}
+
+static void dvi_patch_skew_dvp1(void)
+{
+        switch (viaparinfo->chip_info->gfx_chip_name) {
+        case UNICHROME_CX700:
+                {
+                        break;
+                }
+
+        default:
+                {
+                        break;
+                }
+        }
+}
+
+static void dvi_patch_skew_dvp_low(void)
+{
+        switch (viaparinfo->chip_info->gfx_chip_name) {
+        case UNICHROME_K8M890:
+                {
+                        viafb_write_reg_mask(CR99, VIACR, 0x03, BIT0 + BIT1);
+                        break;
+                }
+
+        case UNICHROME_P4M900:
+                {
+                        viafb_write_reg_mask(CR99, VIACR, 0x08,
+                                       BIT0 + BIT1 + BIT2 + BIT3);
+                        break;
+                }
+
+        case UNICHROME_P4M890:
+                {
+                        viafb_write_reg_mask(CR99, VIACR, 0x0F,
+                                       BIT0 + BIT1 + BIT2 + BIT3);
+                        break;
+                }
+
+        default:
+                {
+                        break;
+                }
+        }
+}
+
+static void set_dvi_output_path(int set_iga, int output_interface)
+{
+        switch (output_interface) {
+        case INTERFACE_DVP0:
+                viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0);
+
+                if (set_iga == IGA1) {
+                        viafb_write_reg_mask(CR96, VIACR, 0x00, BIT4);
+                        viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 +
+                                BIT5 + BIT7);
+                } else {
+                        viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4);
+                        viafb_write_reg_mask(CR6C, VIACR, 0xA1, BIT0 +
+                                BIT5 + BIT7);
+                }
+
+                viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT7 + BIT6);
+
+                dvi_patch_skew_dvp0();
+                break;
+
+        case INTERFACE_DVP1:
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
+                        if (set_iga == IGA1)
+                                viafb_write_reg_mask(CR93, VIACR, 0x21,
+                                               BIT0 + BIT5 + BIT7);
+                        else
+                                viafb_write_reg_mask(CR93, VIACR, 0xA1,
+                                               BIT0 + BIT5 + BIT7);
+                } else {
+                        if (set_iga == IGA1)
+                                viafb_write_reg_mask(CR9B, VIACR, 0x00, BIT4);
+                        else
+                                viafb_write_reg_mask(CR9B, VIACR, 0x10, BIT4);
+                }
+
+                viafb_write_reg_mask(SR1E, VIASR, 0x30, BIT4 + BIT5);
+                dvi_patch_skew_dvp1();
+                break;
+        case INTERFACE_DFP_HIGH:
+                if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) {
+                        if (set_iga == IGA1) {
+                                viafb_write_reg_mask(CR96, VIACR, 0x00, BIT4);
+                                viafb_write_reg_mask(CR97, VIACR, 0x03,
+                                               BIT0 + BIT1 + BIT4);
+                        } else {
+                                viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4);
+                                viafb_write_reg_mask(CR97, VIACR, 0x13,
+                                               BIT0 + BIT1 + BIT4);
+                        }
+                }
+                viafb_write_reg_mask(SR2A, VIASR, 0x0C, BIT2 + BIT3);
+                break;
+
+        case INTERFACE_DFP_LOW:
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
+                        break;
+
+                if (set_iga == IGA1) {
+                        viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4);
+                        viafb_write_reg_mask(CR9B, VIACR, 0x00, BIT4);
+                } else {
+                        viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4);
+                        viafb_write_reg_mask(CR9B, VIACR, 0x10, BIT4);
+                }
+
+                viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1);
+                dvi_patch_skew_dvp_low();
+                break;
+
+        case INTERFACE_TMDS:
+                if (set_iga == IGA1)
+                        viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4);
+                else
+                        viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4);
+                break;
+        }
+
+        if (set_iga == IGA2) {
+                enable_second_display_channel();
+                /* Disable LCD Scaling */
+                viafb_write_reg_mask(CR79, VIACR, 0x00, BIT0);
+        }
+}
+
+static void set_lcd_output_path(int set_iga, int output_interface)
+{
+        DEBUG_MSG(KERN_INFO
+                  "set_lcd_output_path, iga:%d,out_interface:%d\n",
+                  set_iga, output_interface);
+        switch (set_iga) {
+        case IGA1:
+                viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3);
+                viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
+
+                disable_second_display_channel();
+                break;
+
+        case IGA2:
+                viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3);
+                viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
+
+                enable_second_display_channel();
+                break;
+
+        case IGA1_IGA2:
+                viafb_write_reg_mask(CR6B, VIACR, 0x08, BIT3);
+                viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
+
+                disable_second_display_channel();
+                break;
+        }
+
+        switch (output_interface) {
+        case INTERFACE_DVP0:
+                if (set_iga == IGA1) {
+                        viafb_write_reg_mask(CR96, VIACR, 0x00, BIT4);
+                } else {
+                        viafb_write_reg(CR91, VIACR, 0x00);
+                        viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4);
+                }
+                break;
+
+        case INTERFACE_DVP1:
+                if (set_iga == IGA1)
+                        viafb_write_reg_mask(CR9B, VIACR, 0x00, BIT4);
+                else {
+                        viafb_write_reg(CR91, VIACR, 0x00);
+                        viafb_write_reg_mask(CR9B, VIACR, 0x10, BIT4);
+                }
+                break;
+
+        case INTERFACE_DFP_HIGH:
+                if (set_iga == IGA1)
+                        viafb_write_reg_mask(CR97, VIACR, 0x00, BIT4);
+                else {
+                        viafb_write_reg(CR91, VIACR, 0x00);
+                        viafb_write_reg_mask(CR97, VIACR, 0x10, BIT4);
+                        viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4);
+                }
+                break;
+
+        case INTERFACE_DFP_LOW:
+                if (set_iga == IGA1)
+                        viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4);
+                else {
+                        viafb_write_reg(CR91, VIACR, 0x00);
+                        viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4);
+                        viafb_write_reg_mask(CR9B, VIACR, 0x10, BIT4);
+                }
+
+                break;
+
+        case INTERFACE_DFP:
+                if ((UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name)
+                    || (UNICHROME_P4M890 ==
+                    viaparinfo->chip_info->gfx_chip_name))
+                        viafb_write_reg_mask(CR97, VIACR, 0x84,
+                                       BIT7 + BIT2 + BIT1 + BIT0);
+                if (set_iga == IGA1) {
+                        viafb_write_reg_mask(CR97, VIACR, 0x00, BIT4);
+                        viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4);
+                } else {
+                        viafb_write_reg(CR91, VIACR, 0x00);
+                        viafb_write_reg_mask(CR97, VIACR, 0x10, BIT4);
+                        viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4);
+                }
+                break;
+
+        case INTERFACE_LVDS0:
+        case INTERFACE_LVDS0LVDS1:
+                if (set_iga == IGA1)
+                        viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4);
+                else
+                        viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4);
+
+                break;
+
+        case INTERFACE_LVDS1:
+                if (set_iga == IGA1)
+                        viafb_write_reg_mask(CR97, VIACR, 0x00, BIT4);
+                else
+                        viafb_write_reg_mask(CR97, VIACR, 0x10, BIT4);
+                break;
+        }
+}
+
+/* Search Mode Index */
+static int search_mode_setting(int ModeInfoIndex)
+{
+        int i = 0;
+
+        while ((i < NUM_TOTAL_MODETABLE) &&
+                        (ModeInfoIndex != CLE266Modes[i].ModeIndex))
+                i++;
+        if (i >= NUM_TOTAL_MODETABLE)
+                i = 0;
+        return i;
+
+}
+
+struct VideoModeTable *viafb_get_modetbl_pointer(int Index)
+{
+        struct VideoModeTable *TmpTbl = NULL;
+        TmpTbl = &CLE266Modes[search_mode_setting(Index)];
+        return TmpTbl;
+}
+
+struct VideoModeTable *viafb_get_cea_mode_tbl_pointer(int Index)
+{
+        struct VideoModeTable *TmpTbl = NULL;
+        int i = 0;
+        while ((i < NUM_TOTAL_CEA_MODES) &&
+                        (Index != CEA_HDMI_Modes[i].ModeIndex))
+                i++;
+        if ((i < NUM_TOTAL_CEA_MODES))
+                TmpTbl = &CEA_HDMI_Modes[i];
+         else {
+                /*Still use general timing if don't find CEA timing */
+                i = 0;
+                while ((i < NUM_TOTAL_MODETABLE) &&
+                                (Index != CLE266Modes[i].ModeIndex))
+                       i++;
+                if (i >= NUM_TOTAL_MODETABLE)
+                        i = 0;
+                TmpTbl = &CLE266Modes[i];
+        }
+        return TmpTbl;
+}
+
+static void load_fix_bit_crtc_reg(void)
+{
+        /* always set to 1 */
+        viafb_write_reg_mask(CR03, VIACR, 0x80, BIT7);
+        /* line compare should set all bits = 1 (extend modes) */
+        viafb_write_reg(CR18, VIACR, 0xff);
+        /* line compare should set all bits = 1 (extend modes) */
+        viafb_write_reg_mask(CR07, VIACR, 0x10, BIT4);
+        /* line compare should set all bits = 1 (extend modes) */
+        viafb_write_reg_mask(CR09, VIACR, 0x40, BIT6);
+        /* line compare should set all bits = 1 (extend modes) */
+        viafb_write_reg_mask(CR35, VIACR, 0x10, BIT4);
+        /* line compare should set all bits = 1 (extend modes) */
+        viafb_write_reg_mask(CR33, VIACR, 0x06, BIT0 + BIT1 + BIT2);
+        /*viafb_write_reg_mask(CR32, VIACR, 0x01, BIT0); */
+        /* extend mode always set to e3h */
+        viafb_write_reg(CR17, VIACR, 0xe3);
+        /* extend mode always set to 0h */
+        viafb_write_reg(CR08, VIACR, 0x00);
+        /* extend mode always set to 0h */
+        viafb_write_reg(CR14, VIACR, 0x00);
+
+        /* If K8M800, enable Prefetch Mode. */
+        if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800)
+                || (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K8M890))
+                viafb_write_reg_mask(CR33, VIACR, 0x08, BIT3);
+        if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
+            && (viaparinfo->chip_info->gfx_chip_revision == CLE266_REVISION_AX))
+                viafb_write_reg_mask(SR1A, VIASR, 0x02, BIT1);
+
+}
+
+void viafb_load_reg(int timing_value, int viafb_load_reg_num,
+        struct io_register *reg,
+              int io_type)
+{
+        int reg_mask;
+        int bit_num = 0;
+        int data;
+        int i, j;
+        int shift_next_reg;
+        int start_index, end_index, cr_index;
+        u16 get_bit;
+
+        for (i = 0; i < viafb_load_reg_num; i++) {
+                reg_mask = 0;
+                data = 0;
+                start_index = reg[i].start_bit;
+                end_index = reg[i].end_bit;
+                cr_index = reg[i].io_addr;
+
+                shift_next_reg = bit_num;
+                for (j = start_index; j <= end_index; j++) {
+                        /*if (bit_num==8) timing_value = timing_value >>8; */
+                        reg_mask = reg_mask | (BIT0 << j);
+                        get_bit = (timing_value & (BIT0 << bit_num));
+                        data =
+                            data | ((get_bit >> shift_next_reg) << start_index);
+                        bit_num++;
+                }
+                if (io_type == VIACR)
+                        viafb_write_reg_mask(cr_index, VIACR, data, reg_mask);
+                else
+                        viafb_write_reg_mask(cr_index, VIASR, data, reg_mask);
+        }
+
+}
+
+/* Write Registers */
+void viafb_write_regx(struct io_reg RegTable[], int ItemNum)
+{
+        int i;
+        unsigned char RegTemp;
+
+        /*DEBUG_MSG(KERN_INFO "Table Size : %x!!\n",ItemNum ); */
+
+        for (i = 0; i < ItemNum; i++) {
+                outb(RegTable[i].index, RegTable[i].port);
+                RegTemp = inb(RegTable[i].port + 1);
+                RegTemp = (RegTemp & (~RegTable[i].mask)) | RegTable[i].value;
+                outb(RegTemp, RegTable[i].port + 1);
+        }
+}
+
+void viafb_load_offset_reg(int h_addr, int bpp_byte, int set_iga)
+{
+        int reg_value;
+        int viafb_load_reg_num;
+        struct io_register *reg;
+
+        switch (set_iga) {
+        case IGA1_IGA2:
+        case IGA1:
+                reg_value = IGA1_OFFSET_FORMULA(h_addr, bpp_byte);
+                viafb_load_reg_num = offset_reg.iga1_offset_reg.reg_num;
+                reg = offset_reg.iga1_offset_reg.reg;
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR);
+                if (set_iga == IGA1)
+                        break;
+        case IGA2:
+                reg_value = IGA2_OFFSET_FORMULA(h_addr, bpp_byte);
+                viafb_load_reg_num = offset_reg.iga2_offset_reg.reg_num;
+                reg = offset_reg.iga2_offset_reg.reg;
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR);
+                break;
+        }
+}
+
+void viafb_load_fetch_count_reg(int h_addr, int bpp_byte, int set_iga)
+{
+        int reg_value;
+        int viafb_load_reg_num;
+        struct io_register *reg = NULL;
+
+        switch (set_iga) {
+        case IGA1_IGA2:
+        case IGA1:
+                reg_value = IGA1_FETCH_COUNT_FORMULA(h_addr, bpp_byte);
+                viafb_load_reg_num = fetch_count_reg.
+                        iga1_fetch_count_reg.reg_num;
+                reg = fetch_count_reg.iga1_fetch_count_reg.reg;
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR);
+                if (set_iga == IGA1)
+                        break;
+        case IGA2:
+                reg_value = IGA2_FETCH_COUNT_FORMULA(h_addr, bpp_byte);
+                viafb_load_reg_num = fetch_count_reg.
+                        iga2_fetch_count_reg.reg_num;
+                reg = fetch_count_reg.iga2_fetch_count_reg.reg;
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR);
+                break;
+        }
+
+}
+
+void viafb_load_FIFO_reg(int set_iga, int hor_active, int ver_active)
+{
+        int reg_value;
+        int viafb_load_reg_num;
+        struct io_register *reg = NULL;
+        int iga1_fifo_max_depth = 0, iga1_fifo_threshold =
+            0, iga1_fifo_high_threshold = 0, iga1_display_queue_expire_num = 0;
+        int iga2_fifo_max_depth = 0, iga2_fifo_threshold =
+            0, iga2_fifo_high_threshold = 0, iga2_display_queue_expire_num = 0;
+
+        if (set_iga == IGA1) {
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) {
+                        iga1_fifo_max_depth = K800_IGA1_FIFO_MAX_DEPTH;
+                        iga1_fifo_threshold = K800_IGA1_FIFO_THRESHOLD;
+                        iga1_fifo_high_threshold =
+                            K800_IGA1_FIFO_HIGH_THRESHOLD;
+                        /* If resolution > 1280x1024, expire length = 64, else
+                           expire length = 128 */
+                        if ((hor_active > 1280) && (ver_active > 1024))
+                                iga1_display_queue_expire_num = 16;
+                        else
+                                iga1_display_queue_expire_num =
+                                    K800_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
+
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_PM800) {
+                        iga1_fifo_max_depth = P880_IGA1_FIFO_MAX_DEPTH;
+                        iga1_fifo_threshold = P880_IGA1_FIFO_THRESHOLD;
+                        iga1_fifo_high_threshold =
+                            P880_IGA1_FIFO_HIGH_THRESHOLD;
+                        iga1_display_queue_expire_num =
+                            P880_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
+
+                        /* If resolution > 1280x1024, expire length = 64, else
+                           expire length = 128 */
+                        if ((hor_active > 1280) && (ver_active > 1024))
+                                iga1_display_queue_expire_num = 16;
+                        else
+                                iga1_display_queue_expire_num =
+                                    P880_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CN700) {
+                        iga1_fifo_max_depth = CN700_IGA1_FIFO_MAX_DEPTH;
+                        iga1_fifo_threshold = CN700_IGA1_FIFO_THRESHOLD;
+                        iga1_fifo_high_threshold =
+                            CN700_IGA1_FIFO_HIGH_THRESHOLD;
+
+                        /* If resolution > 1280x1024, expire length = 64,
+                           else expire length = 128 */
+                        if ((hor_active > 1280) && (ver_active > 1024))
+                                iga1_display_queue_expire_num = 16;
+                        else
+                                iga1_display_queue_expire_num =
+                                    CN700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) {
+                        iga1_fifo_max_depth = CX700_IGA1_FIFO_MAX_DEPTH;
+                        iga1_fifo_threshold = CX700_IGA1_FIFO_THRESHOLD;
+                        iga1_fifo_high_threshold =
+                            CX700_IGA1_FIFO_HIGH_THRESHOLD;
+                        iga1_display_queue_expire_num =
+                            CX700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K8M890) {
+                        iga1_fifo_max_depth = K8M890_IGA1_FIFO_MAX_DEPTH;
+                        iga1_fifo_threshold = K8M890_IGA1_FIFO_THRESHOLD;
+                        iga1_fifo_high_threshold =
+                            K8M890_IGA1_FIFO_HIGH_THRESHOLD;
+                        iga1_display_queue_expire_num =
+                            K8M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_P4M890) {
+                        iga1_fifo_max_depth = P4M890_IGA1_FIFO_MAX_DEPTH;
+                        iga1_fifo_threshold = P4M890_IGA1_FIFO_THRESHOLD;
+                        iga1_fifo_high_threshold =
+                            P4M890_IGA1_FIFO_HIGH_THRESHOLD;
+                        iga1_display_queue_expire_num =
+                            P4M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_P4M900) {
+                        iga1_fifo_max_depth = P4M900_IGA1_FIFO_MAX_DEPTH;
+                        iga1_fifo_threshold = P4M900_IGA1_FIFO_THRESHOLD;
+                        iga1_fifo_high_threshold =
+                            P4M900_IGA1_FIFO_HIGH_THRESHOLD;
+                        iga1_display_queue_expire_num =
+                            P4M900_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_VX800) {
+                        iga1_fifo_max_depth = VX800_IGA1_FIFO_MAX_DEPTH;
+                        iga1_fifo_threshold = VX800_IGA1_FIFO_THRESHOLD;
+                        iga1_fifo_high_threshold =
+                            VX800_IGA1_FIFO_HIGH_THRESHOLD;
+                        iga1_display_queue_expire_num =
+                            VX800_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                /* Set Display FIFO Depath Select */
+                reg_value = IGA1_FIFO_DEPTH_SELECT_FORMULA(iga1_fifo_max_depth);
+                viafb_load_reg_num =
+                    display_fifo_depth_reg.iga1_fifo_depth_select_reg.reg_num;
+                reg = display_fifo_depth_reg.iga1_fifo_depth_select_reg.reg;
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR);
+
+                /* Set Display FIFO Threshold Select */
+                reg_value = IGA1_FIFO_THRESHOLD_FORMULA(iga1_fifo_threshold);
+                viafb_load_reg_num =
+                    fifo_threshold_select_reg.
+                    iga1_fifo_threshold_select_reg.reg_num;
+                reg =
+                    fifo_threshold_select_reg.
+                    iga1_fifo_threshold_select_reg.reg;
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR);
+
+                /* Set FIFO High Threshold Select */
+                reg_value =
+                    IGA1_FIFO_HIGH_THRESHOLD_FORMULA(iga1_fifo_high_threshold);
+                viafb_load_reg_num =
+                    fifo_high_threshold_select_reg.
+                    iga1_fifo_high_threshold_select_reg.reg_num;
+                reg =
+                    fifo_high_threshold_select_reg.
+                    iga1_fifo_high_threshold_select_reg.reg;
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR);
+
+                /* Set Display Queue Expire Num */
+                reg_value =
+                    IGA1_DISPLAY_QUEUE_EXPIRE_NUM_FORMULA
+                    (iga1_display_queue_expire_num);
+                viafb_load_reg_num =
+                    display_queue_expire_num_reg.
+                    iga1_display_queue_expire_num_reg.reg_num;
+                reg =
+                    display_queue_expire_num_reg.
+                    iga1_display_queue_expire_num_reg.reg;
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR);
+
+        } else {
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) {
+                        iga2_fifo_max_depth = K800_IGA2_FIFO_MAX_DEPTH;
+                        iga2_fifo_threshold = K800_IGA2_FIFO_THRESHOLD;
+                        iga2_fifo_high_threshold =
+                            K800_IGA2_FIFO_HIGH_THRESHOLD;
+
+                        /* If resolution > 1280x1024, expire length = 64,
+                           else  expire length = 128 */
+                        if ((hor_active > 1280) && (ver_active > 1024))
+                                iga2_display_queue_expire_num = 16;
+                        else
+                                iga2_display_queue_expire_num =
+                                    K800_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_PM800) {
+                        iga2_fifo_max_depth = P880_IGA2_FIFO_MAX_DEPTH;
+                        iga2_fifo_threshold = P880_IGA2_FIFO_THRESHOLD;
+                        iga2_fifo_high_threshold =
+                            P880_IGA2_FIFO_HIGH_THRESHOLD;
+
+                        /* If resolution > 1280x1024, expire length = 64,
+                           else  expire length = 128 */
+                        if ((hor_active > 1280) && (ver_active > 1024))
+                                iga2_display_queue_expire_num = 16;
+                        else
+                                iga2_display_queue_expire_num =
+                                    P880_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CN700) {
+                        iga2_fifo_max_depth = CN700_IGA2_FIFO_MAX_DEPTH;
+                        iga2_fifo_threshold = CN700_IGA2_FIFO_THRESHOLD;
+                        iga2_fifo_high_threshold =
+                            CN700_IGA2_FIFO_HIGH_THRESHOLD;
+
+                        /* If resolution > 1280x1024, expire length = 64,
+                           else expire length = 128 */
+                        if ((hor_active > 1280) && (ver_active > 1024))
+                                iga2_display_queue_expire_num = 16;
+                        else
+                                iga2_display_queue_expire_num =
+                                    CN700_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) {
+                        iga2_fifo_max_depth = CX700_IGA2_FIFO_MAX_DEPTH;
+                        iga2_fifo_threshold = CX700_IGA2_FIFO_THRESHOLD;
+                        iga2_fifo_high_threshold =
+                            CX700_IGA2_FIFO_HIGH_THRESHOLD;
+                        iga2_display_queue_expire_num =
+                            CX700_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K8M890) {
+                        iga2_fifo_max_depth = K8M890_IGA2_FIFO_MAX_DEPTH;
+                        iga2_fifo_threshold = K8M890_IGA2_FIFO_THRESHOLD;
+                        iga2_fifo_high_threshold =
+                            K8M890_IGA2_FIFO_HIGH_THRESHOLD;
+                        iga2_display_queue_expire_num =
+                            K8M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_P4M890) {
+                        iga2_fifo_max_depth = P4M890_IGA2_FIFO_MAX_DEPTH;
+                        iga2_fifo_threshold = P4M890_IGA2_FIFO_THRESHOLD;
+                        iga2_fifo_high_threshold =
+                            P4M890_IGA2_FIFO_HIGH_THRESHOLD;
+                        iga2_display_queue_expire_num =
+                            P4M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_P4M900) {
+                        iga2_fifo_max_depth = P4M900_IGA2_FIFO_MAX_DEPTH;
+                        iga2_fifo_threshold = P4M900_IGA2_FIFO_THRESHOLD;
+                        iga2_fifo_high_threshold =
+                            P4M900_IGA2_FIFO_HIGH_THRESHOLD;
+                        iga2_display_queue_expire_num =
+                            P4M900_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_VX800) {
+                        iga2_fifo_max_depth = VX800_IGA2_FIFO_MAX_DEPTH;
+                        iga2_fifo_threshold = VX800_IGA2_FIFO_THRESHOLD;
+                        iga2_fifo_high_threshold =
+                            VX800_IGA2_FIFO_HIGH_THRESHOLD;
+                        iga2_display_queue_expire_num =
+                            VX800_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
+                }
+
+                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) {
+                        /* Set Display FIFO Depath Select */
+                        reg_value =
+                            IGA2_FIFO_DEPTH_SELECT_FORMULA(iga2_fifo_max_depth)
+                            - 1;
+                        /* Patch LCD in IGA2 case */
+                        viafb_load_reg_num =
+                            display_fifo_depth_reg.
+                            iga2_fifo_depth_select_reg.reg_num;
+                        reg =
+                            display_fifo_depth_reg.
+                            iga2_fifo_depth_select_reg.reg;
+                        viafb_load_reg(reg_value,
+                                viafb_load_reg_num, reg, VIACR);
+                } else {
+
+                        /* Set Display FIFO Depath Select */
+                        reg_value =
+                            IGA2_FIFO_DEPTH_SELECT_FORMULA(iga2_fifo_max_depth);
+                        viafb_load_reg_num =
+                            display_fifo_depth_reg.
+                            iga2_fifo_depth_select_reg.reg_num;
+                        reg =
+                            display_fifo_depth_reg.
+                            iga2_fifo_depth_select_reg.reg;
+                        viafb_load_reg(reg_value,
+                                viafb_load_reg_num, reg, VIACR);
+                }
+
+                /* Set Display FIFO Threshold Select */
+                reg_value = IGA2_FIFO_THRESHOLD_FORMULA(iga2_fifo_threshold);
+                viafb_load_reg_num =
+                    fifo_threshold_select_reg.
+                    iga2_fifo_threshold_select_reg.reg_num;
+                reg =
+                    fifo_threshold_select_reg.
+                    iga2_fifo_threshold_select_reg.reg;
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR);
+
+                /* Set FIFO High Threshold Select */
+                reg_value =
+                    IGA2_FIFO_HIGH_THRESHOLD_FORMULA(iga2_fifo_high_threshold);
+                viafb_load_reg_num =
+                    fifo_high_threshold_select_reg.
+                    iga2_fifo_high_threshold_select_reg.reg_num;
+                reg =
+                    fifo_high_threshold_select_reg.
+                    iga2_fifo_high_threshold_select_reg.reg;
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR);
+
+                /* Set Display Queue Expire Num */
+                reg_value =
+                    IGA2_DISPLAY_QUEUE_EXPIRE_NUM_FORMULA
+                    (iga2_display_queue_expire_num);
+                viafb_load_reg_num =
+                    display_queue_expire_num_reg.
+                    iga2_display_queue_expire_num_reg.reg_num;
+                reg =
+                    display_queue_expire_num_reg.
+                    iga2_display_queue_expire_num_reg.reg;
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR);
+
+        }
+
+}
+
+u32 viafb_get_clk_value(int clk)
+{
+        int i;
+
+        for (i = 0; i < NUM_TOTAL_PLL_TABLE; i++) {
+                if (clk == pll_value[i].clk) {
+                        switch (viaparinfo->chip_info->gfx_chip_name) {
+                        case UNICHROME_CLE266:
+                        case UNICHROME_K400:
+                                return pll_value[i].cle266_pll;
+
+                        case UNICHROME_K800:
+                        case UNICHROME_PM800:
+                        case UNICHROME_CN700:
+                                return pll_value[i].k800_pll;
+
+                        case UNICHROME_CX700:
+                        case UNICHROME_K8M890:
+                        case UNICHROME_P4M890:
+                        case UNICHROME_P4M900:
+                        case UNICHROME_VX800:
+                                return pll_value[i].cx700_pll;
+                        }
+                }
+        }
+
+        DEBUG_MSG(KERN_INFO "Can't find match PLL value\n\n");
+        return 0;
+}
+
+/* Set VCLK*/
+void viafb_set_vclock(u32 CLK, int set_iga)
+{
+        unsigned char RegTemp;
+
+        /* H.W. Reset : ON */
+        viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
+
+        if ((set_iga == IGA1) || (set_iga == IGA1_IGA2)) {
+                /* Change D,N FOR VCLK */
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_CLE266:
+                case UNICHROME_K400:
+                        viafb_write_reg(SR46, VIASR, CLK / 0x100);
+                        viafb_write_reg(SR47, VIASR, CLK % 0x100);
+                        break;
+
+                case UNICHROME_K800:
+                case UNICHROME_PM800:
+                case UNICHROME_CN700:
+                case UNICHROME_CX700:
+                case UNICHROME_K8M890:
+                case UNICHROME_P4M890:
+                case UNICHROME_P4M900:
+                case UNICHROME_VX800:
+                        viafb_write_reg(SR44, VIASR, CLK / 0x10000);
+                        DEBUG_MSG(KERN_INFO "\nSR44=%x", CLK / 0x10000);
+                        viafb_write_reg(SR45, VIASR, (CLK & 0xFFFF) / 0x100);
+                        DEBUG_MSG(KERN_INFO "\nSR45=%x",
+                                  (CLK & 0xFFFF) / 0x100);
+                        viafb_write_reg(SR46, VIASR, CLK % 0x100);
+                        DEBUG_MSG(KERN_INFO "\nSR46=%x", CLK % 0x100);
+                        break;
+                }
+        }
+
+        if ((set_iga == IGA2) || (set_iga == IGA1_IGA2)) {
+                /* Change D,N FOR LCK */
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_CLE266:
+                case UNICHROME_K400:
+                        viafb_write_reg(SR44, VIASR, CLK / 0x100);
+                        viafb_write_reg(SR45, VIASR, CLK % 0x100);
+                        break;
+
+                case UNICHROME_K800:
+                case UNICHROME_PM800:
+                case UNICHROME_CN700:
+                case UNICHROME_CX700:
+                case UNICHROME_K8M890:
+                case UNICHROME_P4M890:
+                case UNICHROME_P4M900:
+                case UNICHROME_VX800:
+                        viafb_write_reg(SR4A, VIASR, CLK / 0x10000);
+                        viafb_write_reg(SR4B, VIASR, (CLK & 0xFFFF) / 0x100);
+                        viafb_write_reg(SR4C, VIASR, CLK % 0x100);
+                        break;
+                }
+        }
+
+        /* H.W. Reset : OFF */
+        viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
+
+        /* Reset PLL */
+        if ((set_iga == IGA1) || (set_iga == IGA1_IGA2)) {
+                viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1);
+                viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1);
+        }
+
+        if ((set_iga == IGA2) || (set_iga == IGA1_IGA2)) {
+                viafb_write_reg_mask(SR40, VIASR, 0x01, BIT0);
+                viafb_write_reg_mask(SR40, VIASR, 0x00, BIT0);
+        }
+
+        /* Fire! */
+        RegTemp = inb(VIARMisc);
+        outb(RegTemp | (BIT2 + BIT3), VIAWMisc);
+}
+
+void viafb_load_crtc_timing(struct display_timing device_timing,
+        int set_iga)
+{
+        int i;
+        int viafb_load_reg_num = 0;
+        int reg_value = 0;
+        struct io_register *reg = NULL;
+
+        viafb_unlock_crt();
+
+        for (i = 0; i < 12; i++) {
+                if (set_iga == IGA1) {
+                        switch (i) {
+                        case H_TOTAL_INDEX:
+                                reg_value =
+                                    IGA1_HOR_TOTAL_FORMULA(device_timing.
+                                                           hor_total);
+                                viafb_load_reg_num =
+                                        iga1_crtc_reg.hor_total.reg_num;
+                                reg = iga1_crtc_reg.hor_total.reg;
+                                break;
+                        case H_ADDR_INDEX:
+                                reg_value =
+                                    IGA1_HOR_ADDR_FORMULA(device_timing.
+                                                          hor_addr);
+                                viafb_load_reg_num =
+                                        iga1_crtc_reg.hor_addr.reg_num;
+                                reg = iga1_crtc_reg.hor_addr.reg;
+                                break;
+                        case H_BLANK_START_INDEX:
+                                reg_value =
+                                    IGA1_HOR_BLANK_START_FORMULA
+                                    (device_timing.hor_blank_start);
+                                viafb_load_reg_num =
+                                    iga1_crtc_reg.hor_blank_start.reg_num;
+                                reg = iga1_crtc_reg.hor_blank_start.reg;
+                                break;
+                        case H_BLANK_END_INDEX:
+                                reg_value =
+                                    IGA1_HOR_BLANK_END_FORMULA
+                                    (device_timing.hor_blank_start,
+                                     device_timing.hor_blank_end);
+                                viafb_load_reg_num =
+                                    iga1_crtc_reg.hor_blank_end.reg_num;
+                                reg = iga1_crtc_reg.hor_blank_end.reg;
+                                break;
+                        case H_SYNC_START_INDEX:
+                                reg_value =
+                                    IGA1_HOR_SYNC_START_FORMULA
+                                    (device_timing.hor_sync_start);
+                                viafb_load_reg_num =
+                                    iga1_crtc_reg.hor_sync_start.reg_num;
+                                reg = iga1_crtc_reg.hor_sync_start.reg;
+                                break;
+                        case H_SYNC_END_INDEX:
+                                reg_value =
+                                    IGA1_HOR_SYNC_END_FORMULA
+                                    (device_timing.hor_sync_start,
+                                     device_timing.hor_sync_end);
+                                viafb_load_reg_num =
+                                    iga1_crtc_reg.hor_sync_end.reg_num;
+                                reg = iga1_crtc_reg.hor_sync_end.reg;
+                                break;
+                        case V_TOTAL_INDEX:
+                                reg_value =
+                                    IGA1_VER_TOTAL_FORMULA(device_timing.
+                                                           ver_total);
+                                viafb_load_reg_num =
+                                        iga1_crtc_reg.ver_total.reg_num;
+                                reg = iga1_crtc_reg.ver_total.reg;
+                                break;
+                        case V_ADDR_INDEX:
+                                reg_value =
+                                    IGA1_VER_ADDR_FORMULA(device_timing.
+                                                          ver_addr);
+                                viafb_load_reg_num =
+                                        iga1_crtc_reg.ver_addr.reg_num;
+                                reg = iga1_crtc_reg.ver_addr.reg;
+                                break;
+                        case V_BLANK_START_INDEX:
+                                reg_value =
+                                    IGA1_VER_BLANK_START_FORMULA
+                                    (device_timing.ver_blank_start);
+                                viafb_load_reg_num =
+                                    iga1_crtc_reg.ver_blank_start.reg_num;
+                                reg = iga1_crtc_reg.ver_blank_start.reg;
+                                break;
+                        case V_BLANK_END_INDEX:
+                                reg_value =
+                                    IGA1_VER_BLANK_END_FORMULA
+                                    (device_timing.ver_blank_start,
+                                     device_timing.ver_blank_end);
+                                viafb_load_reg_num =
+                                    iga1_crtc_reg.ver_blank_end.reg_num;
+                                reg = iga1_crtc_reg.ver_blank_end.reg;
+                                break;
+                        case V_SYNC_START_INDEX:
+                                reg_value =
+                                    IGA1_VER_SYNC_START_FORMULA
+                                    (device_timing.ver_sync_start);
+                                viafb_load_reg_num =
+                                    iga1_crtc_reg.ver_sync_start.reg_num;
+                                reg = iga1_crtc_reg.ver_sync_start.reg;
+                                break;
+                        case V_SYNC_END_INDEX:
+                                reg_value =
+                                    IGA1_VER_SYNC_END_FORMULA
+                                    (device_timing.ver_sync_start,
+                                     device_timing.ver_sync_end);
+                                viafb_load_reg_num =
+                                    iga1_crtc_reg.ver_sync_end.reg_num;
+                                reg = iga1_crtc_reg.ver_sync_end.reg;
+                                break;
+
+                        }
+                }
+
+                if (set_iga == IGA2) {
+                        switch (i) {
+                        case H_TOTAL_INDEX:
+                                reg_value =
+                                    IGA2_HOR_TOTAL_FORMULA(device_timing.
+                                                           hor_total);
+                                viafb_load_reg_num =
+                                        iga2_crtc_reg.hor_total.reg_num;
+                                reg = iga2_crtc_reg.hor_total.reg;
+                                break;
+                        case H_ADDR_INDEX:
+                                reg_value =
+                                    IGA2_HOR_ADDR_FORMULA(device_timing.
+                                                          hor_addr);
+                                viafb_load_reg_num =
+                                        iga2_crtc_reg.hor_addr.reg_num;
+                                reg = iga2_crtc_reg.hor_addr.reg;
+                                break;
+                        case H_BLANK_START_INDEX:
+                                reg_value =
+                                    IGA2_HOR_BLANK_START_FORMULA
+                                    (device_timing.hor_blank_start);
+                                viafb_load_reg_num =
+                                    iga2_crtc_reg.hor_blank_start.reg_num;
+                                reg = iga2_crtc_reg.hor_blank_start.reg;
+                                break;
+                        case H_BLANK_END_INDEX:
+                                reg_value =
+                                    IGA2_HOR_BLANK_END_FORMULA
+                                    (device_timing.hor_blank_start,
+                                     device_timing.hor_blank_end);
+                                viafb_load_reg_num =
+                                    iga2_crtc_reg.hor_blank_end.reg_num;
+                                reg = iga2_crtc_reg.hor_blank_end.reg;
+                                break;
+                        case H_SYNC_START_INDEX:
+                                reg_value =
+                                    IGA2_HOR_SYNC_START_FORMULA
+                                    (device_timing.hor_sync_start);
+                                if (UNICHROME_CN700 <=
+                                        viaparinfo->chip_info->gfx_chip_name)
+                                        viafb_load_reg_num =
+                                            iga2_crtc_reg.hor_sync_start.
+                                            reg_num;
+                                else
+                                        viafb_load_reg_num = 3;
+                                reg = iga2_crtc_reg.hor_sync_start.reg;
+                                break;
+                        case H_SYNC_END_INDEX:
+                                reg_value =
+                                    IGA2_HOR_SYNC_END_FORMULA
+                                    (device_timing.hor_sync_start,
+                                     device_timing.hor_sync_end);
+                                viafb_load_reg_num =
+                                    iga2_crtc_reg.hor_sync_end.reg_num;
+                                reg = iga2_crtc_reg.hor_sync_end.reg;
+                                break;
+                        case V_TOTAL_INDEX:
+                                reg_value =
+                                    IGA2_VER_TOTAL_FORMULA(device_timing.
+                                                           ver_total);
+                                viafb_load_reg_num =
+                                        iga2_crtc_reg.ver_total.reg_num;
+                                reg = iga2_crtc_reg.ver_total.reg;
+                                break;
+                        case V_ADDR_INDEX:
+                                reg_value =
+                                    IGA2_VER_ADDR_FORMULA(device_timing.
+                                                          ver_addr);
+                                viafb_load_reg_num =
+                                        iga2_crtc_reg.ver_addr.reg_num;
+                                reg = iga2_crtc_reg.ver_addr.reg;
+                                break;
+                        case V_BLANK_START_INDEX:
+                                reg_value =
+                                    IGA2_VER_BLANK_START_FORMULA
+                                    (device_timing.ver_blank_start);
+                                viafb_load_reg_num =
+                                    iga2_crtc_reg.ver_blank_start.reg_num;
+                                reg = iga2_crtc_reg.ver_blank_start.reg;
+                                break;
+                        case V_BLANK_END_INDEX:
+                                reg_value =
+                                    IGA2_VER_BLANK_END_FORMULA
+                                    (device_timing.ver_blank_start,
+                                     device_timing.ver_blank_end);
+                                viafb_load_reg_num =
+                                    iga2_crtc_reg.ver_blank_end.reg_num;
+                                reg = iga2_crtc_reg.ver_blank_end.reg;
+                                break;
+                        case V_SYNC_START_INDEX:
+                                reg_value =
+                                    IGA2_VER_SYNC_START_FORMULA
+                                    (device_timing.ver_sync_start);
+                                viafb_load_reg_num =
+                                    iga2_crtc_reg.ver_sync_start.reg_num;
+                                reg = iga2_crtc_reg.ver_sync_start.reg;
+                                break;
+                        case V_SYNC_END_INDEX:
+                                reg_value =
+                                    IGA2_VER_SYNC_END_FORMULA
+                                    (device_timing.ver_sync_start,
+                                     device_timing.ver_sync_end);
+                                viafb_load_reg_num =
+                                    iga2_crtc_reg.ver_sync_end.reg_num;
+                                reg = iga2_crtc_reg.ver_sync_end.reg;
+                                break;
+
+                        }
+                }
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR);
+        }
+
+        viafb_lock_crt();
+}
+
+void viafb_set_color_depth(int bpp_byte, int set_iga)
+{
+        if (set_iga == IGA1) {
+                switch (bpp_byte) {
+                case MODE_8BPP:
+                        viafb_write_reg_mask(SR15, VIASR, 0x22, 0x7E);
+                        break;
+                case MODE_16BPP:
+                        viafb_write_reg_mask(SR15, VIASR, 0xB6, 0xFE);
+                        break;
+                case MODE_32BPP:
+                        viafb_write_reg_mask(SR15, VIASR, 0xAE, 0xFE);
+                        break;
+                }
+        } else {
+                switch (bpp_byte) {
+                case MODE_8BPP:
+                        viafb_write_reg_mask(CR67, VIACR, 0x00, BIT6 + BIT7);
+                        break;
+                case MODE_16BPP:
+                        viafb_write_reg_mask(CR67, VIACR, 0x40, BIT6 + BIT7);
+                        break;
+                case MODE_32BPP:
+                        viafb_write_reg_mask(CR67, VIACR, 0xC0, BIT6 + BIT7);
+                        break;
+                }
+        }
+}
+
+void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
+        int mode_index, int bpp_byte, int set_iga)
+{
+        struct VideoModeTable *video_mode;
+        struct display_timing crt_reg;
+        int i;
+        int index = 0;
+        int h_addr, v_addr;
+        u32 pll_D_N;
+
+        video_mode = &CLE266Modes[search_mode_setting(mode_index)];
+
+        for (i = 0; i < video_mode->mode_array; i++) {
+                index = i;
+
+                if (crt_table[i].refresh_rate == viaparinfo->
+                        crt_setting_info->refresh_rate)
+                        break;
+        }
+
+        crt_reg = crt_table[index].crtc;
+
+        /* Mode 640x480 has border, but LCD/DFP didn't have border. */
+        /* So we would delete border. */
+        if ((viafb_LCD_ON | viafb_DVI_ON) && (mode_index == VIA_RES_640X480)
+            && (viaparinfo->crt_setting_info->refresh_rate == 60)) {
+                /* The border is 8 pixels. */
+                crt_reg.hor_blank_start = crt_reg.hor_blank_start - 8;
+
+                /* Blanking time should add left and right borders. */
+                crt_reg.hor_blank_end = crt_reg.hor_blank_end + 16;
+        }
+
+        h_addr = crt_reg.hor_addr;
+        v_addr = crt_reg.ver_addr;
+
+        /* update polarity for CRT timing */
+        if (crt_table[index].h_sync_polarity == NEGATIVE) {
+                if (crt_table[index].v_sync_polarity == NEGATIVE)
+                        outb((inb(VIARMisc) & (~(BIT6 + BIT7))) |
+                             (BIT6 + BIT7), VIAWMisc);
+                else
+                        outb((inb(VIARMisc) & (~(BIT6 + BIT7))) | (BIT6),
+                             VIAWMisc);
+        } else {
+                if (crt_table[index].v_sync_polarity == NEGATIVE)
+                        outb((inb(VIARMisc) & (~(BIT6 + BIT7))) | (BIT7),
+                             VIAWMisc);
+                else
+                        outb((inb(VIARMisc) & (~(BIT6 + BIT7))), VIAWMisc);
+        }
+
+        if (set_iga == IGA1) {
+                viafb_unlock_crt();
+                viafb_write_reg(CR09, VIACR, 0x00);     /*initial CR09=0 */
+                viafb_write_reg_mask(CR11, VIACR, 0x00, BIT4 + BIT5 + BIT6);
+                viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
+        }
+
+        switch (set_iga) {
+        case IGA1:
+                viafb_load_crtc_timing(crt_reg, IGA1);
+                break;
+        case IGA2:
+                viafb_load_crtc_timing(crt_reg, IGA2);
+                break;
+        }
+
+        load_fix_bit_crtc_reg();
+        viafb_lock_crt();
+        viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
+        viafb_load_offset_reg(h_addr, bpp_byte, set_iga);
+        viafb_load_fetch_count_reg(h_addr, bpp_byte, set_iga);
+
+        /* load FIFO */
+        if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
+            && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
+                viafb_load_FIFO_reg(set_iga, h_addr, v_addr);
+
+        /* load SR Register About Memory and Color part */
+        viafb_set_color_depth(bpp_byte, set_iga);
+
+        pll_D_N = viafb_get_clk_value(crt_table[index].clk);
+        DEBUG_MSG(KERN_INFO "PLL=%x", pll_D_N);
+        viafb_set_vclock(pll_D_N, set_iga);
+
+}
+
+void viafb_init_chip_info(void)
+{
+        init_gfx_chip_info();
+        init_tmds_chip_info();
+        init_lvds_chip_info();
+
+        viaparinfo->crt_setting_info->iga_path = IGA1;
+        viaparinfo->crt_setting_info->refresh_rate = viafb_refresh;
+
+        /*Set IGA path for each device */
+        viafb_set_iga_path();
+
+        viaparinfo->lvds_setting_info->display_method = viafb_lcd_dsp_method;
+        viaparinfo->lvds_setting_info->get_lcd_size_method =
+                GET_LCD_SIZE_BY_USER_SETTING;
+        viaparinfo->lvds_setting_info->lcd_mode = viafb_lcd_mode;
+        viaparinfo->lvds_setting_info2->display_method =
+                viaparinfo->lvds_setting_info->display_method;
+        viaparinfo->lvds_setting_info2->lcd_mode =
+                viaparinfo->lvds_setting_info->lcd_mode;
+}
+
+void viafb_update_device_setting(int hres, int vres,
+        int bpp, int vmode_refresh, int flag)
+{
+        if (flag == 0) {
+                viaparinfo->crt_setting_info->h_active = hres;
+                viaparinfo->crt_setting_info->v_active = vres;
+                viaparinfo->crt_setting_info->bpp = bpp;
+                viaparinfo->crt_setting_info->refresh_rate =
+                        vmode_refresh;
+
+                viaparinfo->tmds_setting_info->h_active = hres;
+                viaparinfo->tmds_setting_info->v_active = vres;
+                viaparinfo->tmds_setting_info->bpp = bpp;
+                viaparinfo->tmds_setting_info->refresh_rate =
+                        vmode_refresh;
+
+                viaparinfo->lvds_setting_info->h_active = hres;
+                viaparinfo->lvds_setting_info->v_active = vres;
+                viaparinfo->lvds_setting_info->bpp = bpp;
+                viaparinfo->lvds_setting_info->refresh_rate =
+                        vmode_refresh;
+                viaparinfo->lvds_setting_info2->h_active = hres;
+                viaparinfo->lvds_setting_info2->v_active = vres;
+                viaparinfo->lvds_setting_info2->bpp = bpp;
+                viaparinfo->lvds_setting_info2->refresh_rate =
+                        vmode_refresh;
+        } else {
+
+                if (viaparinfo->tmds_setting_info->iga_path == IGA2) {
+                        viaparinfo->tmds_setting_info->h_active = hres;
+                        viaparinfo->tmds_setting_info->v_active = vres;
+                        viaparinfo->tmds_setting_info->bpp = bpp;
+                        viaparinfo->tmds_setting_info->refresh_rate =
+                                vmode_refresh;
+                }
+
+                if (viaparinfo->lvds_setting_info->iga_path == IGA2) {
+                        viaparinfo->lvds_setting_info->h_active = hres;
+                        viaparinfo->lvds_setting_info->v_active = vres;
+                        viaparinfo->lvds_setting_info->bpp = bpp;
+                        viaparinfo->lvds_setting_info->refresh_rate =
+                                vmode_refresh;
+                }
+                if (IGA2 == viaparinfo->lvds_setting_info2->iga_path) {
+                        viaparinfo->lvds_setting_info2->h_active = hres;
+                        viaparinfo->lvds_setting_info2->v_active = vres;
+                        viaparinfo->lvds_setting_info2->bpp = bpp;
+                        viaparinfo->lvds_setting_info2->refresh_rate =
+                                vmode_refresh;
+                }
+        }
+}
+
+static void init_gfx_chip_info(void)
+{
+        struct pci_dev *pdev = NULL;
+        u32 i;
+        u8 tmp;
+
+        /* Indentify GFX Chip Name */
+        for (i = 0; pciidlist[i].vendor != 0; i++) {
+                pdev = pci_get_device(pciidlist[i].vendor,
+                        pciidlist[i].device, 0);
+                if (pdev)
+                        break;
+        }
+
+        if (!pciidlist[i].vendor)
+                return ;
+
+        viaparinfo->chip_info->gfx_chip_name = pciidlist[i].chip_index;
+
+        /* Check revision of CLE266 Chip */
+        if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
+                /* CR4F only define in CLE266.CX chip */
+                tmp = viafb_read_reg(VIACR, CR4F);
+                viafb_write_reg(CR4F, VIACR, 0x55);
+                if (viafb_read_reg(VIACR, CR4F) != 0x55)
+                        viaparinfo->chip_info->gfx_chip_revision =
+                        CLE266_REVISION_AX;
+                else
+                        viaparinfo->chip_info->gfx_chip_revision =
+                        CLE266_REVISION_CX;
+                /* restore orignal CR4F value */
+                viafb_write_reg(CR4F, VIACR, tmp);
+        }
+
+        if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) {
+                tmp = viafb_read_reg(VIASR, SR43);
+                DEBUG_MSG(KERN_INFO "SR43:%X\n", tmp);
+                if (tmp & 0x02) {
+                        viaparinfo->chip_info->gfx_chip_revision =
+                                CX700_REVISION_700M2;
+                } else if (tmp & 0x40) {
+                        viaparinfo->chip_info->gfx_chip_revision =
+                                CX700_REVISION_700M;
+                } else {
+                        viaparinfo->chip_info->gfx_chip_revision =
+                                CX700_REVISION_700;
+                }
+        }
+
+        pci_dev_put(pdev);
+}
+
+static void init_tmds_chip_info(void)
+{
+        viafb_tmds_trasmitter_identify();
+
+        if (INTERFACE_NONE == viaparinfo->chip_info->tmds_chip_info.
+                output_interface) {
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_CX700:
+                        {
+                                /* we should check support by hardware layout.*/
+                                if ((viafb_display_hardware_layout ==
+                                     HW_LAYOUT_DVI_ONLY)
+                                    || (viafb_display_hardware_layout ==
+                                        HW_LAYOUT_LCD_DVI)) {
+                                        viaparinfo->chip_info->tmds_chip_info.
+                                            output_interface = INTERFACE_TMDS;
+                                } else {
+                                        viaparinfo->chip_info->tmds_chip_info.
+                                                output_interface =
+                                                INTERFACE_NONE;
+                                }
+                                break;
+                        }
+                case UNICHROME_K8M890:
+                case UNICHROME_P4M900:
+                case UNICHROME_P4M890:
+                        /* TMDS on PCIE, we set DFPLOW as default. */
+                        viaparinfo->chip_info->tmds_chip_info.output_interface =
+                            INTERFACE_DFP_LOW;
+                        break;
+                default:
+                        {
+                                /* set DVP1 default for DVI */
+                                viaparinfo->chip_info->tmds_chip_info
+                                .output_interface = INTERFACE_DVP1;
+                        }
+                }
+        }
+
+        DEBUG_MSG(KERN_INFO "TMDS Chip = %d\n",
+                  viaparinfo->chip_info->tmds_chip_info.tmds_chip_name);
+        viaparinfo->tmds_setting_info->get_dvi_size_method =
+                GET_DVI_SIZE_BY_VGA_BIOS;
+        viafb_init_dvi_size();
+}
+
+static void init_lvds_chip_info(void)
+{
+        if (viafb_lcd_panel_id > LCD_PANEL_ID_MAXIMUM)
+                viaparinfo->lvds_setting_info->get_lcd_size_method =
+                    GET_LCD_SIZE_BY_VGA_BIOS;
+        else
+                viaparinfo->lvds_setting_info->get_lcd_size_method =
+                    GET_LCD_SIZE_BY_USER_SETTING;
+
+        viafb_lvds_trasmitter_identify();
+        viafb_init_lcd_size();
+        viafb_init_lvds_output_interface(&viaparinfo->chip_info->lvds_chip_info,
+                                   viaparinfo->lvds_setting_info);
+        if (viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name) {
+                viafb_init_lvds_output_interface(&viaparinfo->chip_info->
+                        lvds_chip_info2, viaparinfo->lvds_setting_info2);
+        }
+        /*If CX700,two singel LCD, we need to reassign
+           LCD interface to different LVDS port */
+        if ((UNICHROME_CX700 == viaparinfo->chip_info->gfx_chip_name)
+            && (HW_LAYOUT_LCD1_LCD2 == viafb_display_hardware_layout)) {
+                if ((INTEGRATED_LVDS == viaparinfo->chip_info->lvds_chip_info.
+                        lvds_chip_name) && (INTEGRATED_LVDS ==
+                        viaparinfo->chip_info->
+                        lvds_chip_info2.lvds_chip_name)) {
+                        viaparinfo->chip_info->lvds_chip_info.output_interface =
+                                INTERFACE_LVDS0;
+                        viaparinfo->chip_info->lvds_chip_info2.
+                                output_interface =
+                            INTERFACE_LVDS1;
+                }
+        }
+
+        DEBUG_MSG(KERN_INFO "LVDS Chip = %d\n",
+                  viaparinfo->chip_info->lvds_chip_info.lvds_chip_name);
+        DEBUG_MSG(KERN_INFO "LVDS1 output_interface = %d\n",
+                  viaparinfo->chip_info->lvds_chip_info.output_interface);
+        DEBUG_MSG(KERN_INFO "LVDS2 output_interface = %d\n",
+                  viaparinfo->chip_info->lvds_chip_info.output_interface);
+}
+
+void viafb_init_dac(int set_iga)
+{
+        int i;
+        u8 tmp;
+
+        if (set_iga == IGA1) {
+                /* access Primary Display's LUT */
+                viafb_write_reg_mask(SR1A, VIASR, 0x00, BIT0);
+                /* turn off LCK */
+                viafb_write_reg_mask(SR1B, VIASR, 0x00, BIT7 + BIT6);
+                for (i = 0; i < 256; i++) {
+                        write_dac_reg(i, palLUT_table[i].red,
+                                      palLUT_table[i].green,
+                                      palLUT_table[i].blue);
+                }
+                /* turn on LCK */
+                viafb_write_reg_mask(SR1B, VIASR, 0xC0, BIT7 + BIT6);
+        } else {
+                tmp = viafb_read_reg(VIACR, CR6A);
+                /* access Secondary Display's LUT */
+                viafb_write_reg_mask(CR6A, VIACR, 0x40, BIT6);
+                viafb_write_reg_mask(SR1A, VIASR, 0x01, BIT0);
+                for (i = 0; i < 256; i++) {
+                        write_dac_reg(i, palLUT_table[i].red,
+                                      palLUT_table[i].green,
+                                      palLUT_table[i].blue);
+                }
+                /* set IGA1 DAC for default */
+                viafb_write_reg_mask(SR1A, VIASR, 0x00, BIT0);
+                viafb_write_reg(CR6A, VIACR, tmp);
+        }
+}
+
+static void device_screen_off(void)
+{
+        /* turn off CRT screen (IGA1) */
+        viafb_write_reg_mask(SR01, VIASR, 0x20, BIT5);
+}
+
+static void device_screen_on(void)
+{
+        /* turn on CRT screen (IGA1) */
+        viafb_write_reg_mask(SR01, VIASR, 0x00, BIT5);
+}
+
+static void set_display_channel(void)
+{
+        /*If viafb_LCD2_ON, on cx700, internal lvds's information
+        is keeped on lvds_setting_info2 */
+        if (viafb_LCD2_ON &&
+                viaparinfo->lvds_setting_info2->device_lcd_dualedge) {
+                /* For dual channel LCD: */
+                /* Set to Dual LVDS channel. */
+                viafb_write_reg_mask(CRD2, VIACR, 0x20, BIT4 + BIT5);
+        } else if (viafb_LCD_ON && viafb_DVI_ON) {
+                /* For LCD+DFP: */
+                /* Set to LVDS1 + TMDS channel. */
+                viafb_write_reg_mask(CRD2, VIACR, 0x10, BIT4 + BIT5);
+        } else if (viafb_DVI_ON) {
+                /* Set to single TMDS channel. */
+                viafb_write_reg_mask(CRD2, VIACR, 0x30, BIT4 + BIT5);
+        } else if (viafb_LCD_ON) {
+                if (viaparinfo->lvds_setting_info->device_lcd_dualedge) {
+                        /* For dual channel LCD: */
+                        /* Set to Dual LVDS channel. */
+                        viafb_write_reg_mask(CRD2, VIACR, 0x20, BIT4 + BIT5);
+                } else {
+                        /* Set to LVDS0 + LVDS1 channel. */
+                        viafb_write_reg_mask(CRD2, VIACR, 0x00, BIT4 + BIT5);
+                }
+        }
+}
+
+int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
+        int vmode_index1, int hor_res1, int ver_res1, int video_bpp1)
+{
+        int i, j;
+        int port;
+        u8 value, index, mask;
+        struct VideoModeTable *vmode_tbl;
+        struct crt_mode_table *crt_timing;
+        struct VideoModeTable *vmode_tbl1 = NULL;
+        struct crt_mode_table *crt_timing1 = NULL;
+
+        DEBUG_MSG(KERN_INFO "Set Mode!!\n");
+        DEBUG_MSG(KERN_INFO
+                  "vmode_index=%d hor_res=%d ver_res=%d video_bpp=%d\n",
+                  vmode_index, hor_res, ver_res, video_bpp);
+
+        device_screen_off();
+        vmode_tbl = &CLE266Modes[search_mode_setting(vmode_index)];
+        crt_timing = vmode_tbl->crtc;
+
+        if (viafb_SAMM_ON == 1) {
+                vmode_tbl1 = &CLE266Modes[search_mode_setting(vmode_index1)];
+                crt_timing1 = vmode_tbl1->crtc;
+        }
+
+        inb(VIAStatus);
+        outb(0x00, VIAAR);
+
+        /* Write Common Setting for Video Mode */
+        switch (viaparinfo->chip_info->gfx_chip_name) {
+        case UNICHROME_CLE266:
+                viafb_write_regx(CLE266_ModeXregs, NUM_TOTAL_CLE266_ModeXregs);
+                break;
+
+        case UNICHROME_K400:
+                viafb_write_regx(KM400_ModeXregs, NUM_TOTAL_KM400_ModeXregs);
+                break;
+
+        case UNICHROME_K800:
+        case UNICHROME_PM800:
+                viafb_write_regx(CN400_ModeXregs, NUM_TOTAL_CN400_ModeXregs);
+                break;
+
+        case UNICHROME_CN700:
+        case UNICHROME_K8M890:
+        case UNICHROME_P4M890:
+        case UNICHROME_P4M900:
+                viafb_write_regx(CN700_ModeXregs, NUM_TOTAL_CN700_ModeXregs);
+                break;
+
+        case UNICHROME_CX700:
+                viafb_write_regx(CX700_ModeXregs, NUM_TOTAL_CX700_ModeXregs);
+
+        case UNICHROME_VX800:
+                viafb_write_regx(VX800_ModeXregs, NUM_TOTAL_VX800_ModeXregs);
+
+                break;
+        }
+
+        device_off();
+
+        /* Fill VPIT Parameters */
+        /* Write Misc Register */
+        outb(VPIT.Misc, VIAWMisc);
+
+        /* Write Sequencer */
+        for (i = 1; i <= StdSR; i++) {
+                outb(i, VIASR);
+                outb(VPIT.SR[i - 1], VIASR + 1);
+        }
+
+        viafb_set_start_addr();
+        viafb_set_iga_path();
+
+        /* Write CRTC */
+        viafb_fill_crtc_timing(crt_timing, vmode_index, video_bpp / 8, IGA1);
+
+        /* Write Graphic Controller */
+        for (i = 0; i < StdGR; i++) {
+                outb(i, VIAGR);
+                outb(VPIT.GR[i], VIAGR + 1);
+        }
+
+        /* Write Attribute Controller */
+        for (i = 0; i < StdAR; i++) {
+                inb(VIAStatus);
+                outb(i, VIAAR);
+                outb(VPIT.AR[i], VIAAR);
+        }
+
+        inb(VIAStatus);
+        outb(0x20, VIAAR);
+
+        /* Update Patch Register */
+
+        if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
+            || (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K400)) {
+                for (i = 0; i < NUM_TOTAL_PATCH_MODE; i++) {
+                        if (res_patch_table[i].mode_index == vmode_index) {
+                                for (j = 0;
+                                     j < res_patch_table[i].table_length; j++) {
+                                        index =
+                                            res_patch_table[i].
+                                            io_reg_table[j].index;
+                                        port =
+                                            res_patch_table[i].
+                                            io_reg_table[j].port;
+                                        value =
+                                            res_patch_table[i].
+                                            io_reg_table[j].value;
+                                        mask =
+                                            res_patch_table[i].
+                                            io_reg_table[j].mask;
+                                        viafb_write_reg_mask(index, port, value,
+                                                       mask);
+                                }
+                        }
+                }
+        }
+
+        if (viafb_SAMM_ON == 1) {
+                if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
+                    || (viaparinfo->chip_info->gfx_chip_name ==
+                    UNICHROME_K400)) {
+                        for (i = 0; i < NUM_TOTAL_PATCH_MODE; i++) {
+                                if (res_patch_table[i].mode_index ==
+                                    vmode_index1) {
+                                        for (j = 0;
+                                             j <
+                                             res_patch_table[i].
+                                             table_length; j++) {
+                                                index =
+                                                    res_patch_table[i].
+                                                    io_reg_table[j].index;
+                                                port =
+                                                    res_patch_table[i].
+                                                    io_reg_table[j].port;
+                                                value =
+                                                    res_patch_table[i].
+                                                    io_reg_table[j].value;
+                                                mask =
+                                                    res_patch_table[i].
+                                                    io_reg_table[j].mask;
+                                                viafb_write_reg_mask(index,
+                                                        port, value, mask);
+                                        }
+                                }
+                        }
+                }
+        }
+
+        /* Update Refresh Rate Setting */
+
+        /* Clear On Screen */
+
+        /* CRT set mode */
+        if (viafb_CRT_ON) {
+                if (viafb_SAMM_ON && (viaparinfo->crt_setting_info->iga_path ==
+                        IGA2)) {
+                        viafb_fill_crtc_timing(crt_timing1, vmode_index1,
+                                video_bpp1 / 8,
+                                viaparinfo->crt_setting_info->iga_path);
+                } else {
+                        viafb_fill_crtc_timing(crt_timing, vmode_index,
+                                video_bpp / 8,
+                                viaparinfo->crt_setting_info->iga_path);
+                }
+
+                set_crt_output_path(viaparinfo->crt_setting_info->iga_path);
+
+                /* Patch if set_hres is not 8 alignment (1366) to viafb_setmode
+                to 8 alignment (1368),there is several pixels (2 pixels)
+                on right side of screen. */
+                if (hor_res % 8) {
+                        viafb_unlock_crt();
+                        viafb_write_reg(CR02, VIACR,
+                                viafb_read_reg(VIACR, CR02) - 1);
+                        viafb_lock_crt();
+                }
+        }
+
+        if (viafb_DVI_ON) {
+                if (viafb_SAMM_ON &&
+                        (viaparinfo->tmds_setting_info->iga_path == IGA2)) {
+                        viafb_dvi_set_mode(viafb_get_mode_index
+                                     (viaparinfo->tmds_setting_info->h_active,
+                                      viaparinfo->tmds_setting_info->
+                                      v_active, 1),
+                                     video_bpp1, viaparinfo->
+                                     tmds_setting_info->iga_path);
+                } else {
+                        viafb_dvi_set_mode(viafb_get_mode_index
+                                     (viaparinfo->tmds_setting_info->h_active,
+                                      viaparinfo->
+                                      tmds_setting_info->v_active, 0),
+                                     video_bpp, viaparinfo->
+                                     tmds_setting_info->iga_path);
+                }
+        }
+
+        if (viafb_LCD_ON) {
+                if (viafb_SAMM_ON &&
+                        (viaparinfo->lvds_setting_info->iga_path == IGA2)) {
+                        viaparinfo->lvds_setting_info->bpp = video_bpp1;
+                        viafb_lcd_set_mode(crt_timing1, viaparinfo->
+                                lvds_setting_info,
+                                     &viaparinfo->chip_info->lvds_chip_info);
+                } else {
+                        /* IGA1 doesn't have LCD scaling, so set it center. */
+                        if (viaparinfo->lvds_setting_info->iga_path == IGA1) {
+                                viaparinfo->lvds_setting_info->display_method =
+                                    LCD_CENTERING;
+                        }
+                        viaparinfo->lvds_setting_info->bpp = video_bpp;
+                        viafb_lcd_set_mode(crt_timing, viaparinfo->
+                                lvds_setting_info,
+                                     &viaparinfo->chip_info->lvds_chip_info);
+                }
+        }
+        if (viafb_LCD2_ON) {
+                if (viafb_SAMM_ON &&
+                        (viaparinfo->lvds_setting_info2->iga_path == IGA2)) {
+                        viaparinfo->lvds_setting_info2->bpp = video_bpp1;
+                        viafb_lcd_set_mode(crt_timing1, viaparinfo->
+                                lvds_setting_info2,
+                                     &viaparinfo->chip_info->lvds_chip_info2);
+                } else {
+                        /* IGA1 doesn't have LCD scaling, so set it center. */
+                        if (viaparinfo->lvds_setting_info2->iga_path == IGA1) {
+                                viaparinfo->lvds_setting_info2->display_method =
+                                    LCD_CENTERING;
+                        }
+                        viaparinfo->lvds_setting_info2->bpp = video_bpp;
+                        viafb_lcd_set_mode(crt_timing, viaparinfo->
+                                lvds_setting_info2,
+                                     &viaparinfo->chip_info->lvds_chip_info2);
+                }
+        }
+
+        if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700)
+            && (viafb_LCD_ON || viafb_DVI_ON))
+                set_display_channel();
+
+        /* If set mode normally, save resolution information for hot-plug . */
+        if (!viafb_hotplug) {
+                viafb_hotplug_Xres = hor_res;
+                viafb_hotplug_Yres = ver_res;
+                viafb_hotplug_bpp = video_bpp;
+                viafb_hotplug_refresh = viafb_refresh;
+
+                if (viafb_DVI_ON)
+                        viafb_DeviceStatus = DVI_Device;
+                else
+                        viafb_DeviceStatus = CRT_Device;
+        }
+        device_on();
+
+        if (viafb_SAMM_ON == 1)
+                viafb_write_reg_mask(CR6A, VIACR, 0xC0, BIT6 + BIT7);
+
+        device_screen_on();
+        return 1;
+}
+
+int viafb_get_pixclock(int hres, int vres, int vmode_refresh)
+{
+        int i;
+
+        for (i = 0; i < NUM_TOTAL_RES_MAP_REFRESH; i++) {
+                if ((hres == res_map_refresh_tbl[i].hres)
+                    && (vres == res_map_refresh_tbl[i].vres)
+                    && (vmode_refresh == res_map_refresh_tbl[i].vmode_refresh))
+                        return res_map_refresh_tbl[i].pixclock;
+        }
+        return RES_640X480_60HZ_PIXCLOCK;
+
+}
+
+int viafb_get_refresh(int hres, int vres, u32 long_refresh)
+{
+#define REFRESH_TOLERANCE 3
+        int i, nearest = -1, diff = REFRESH_TOLERANCE;
+        for (i = 0; i < NUM_TOTAL_RES_MAP_REFRESH; i++) {
+                if ((hres == res_map_refresh_tbl[i].hres)
+                    && (vres == res_map_refresh_tbl[i].vres)
+                    && (diff > (abs(long_refresh -
+                    res_map_refresh_tbl[i].vmode_refresh)))) {
+                        diff = abs(long_refresh - res_map_refresh_tbl[i].
+                                vmode_refresh);
+                        nearest = i;
+                }
+        }
+#undef REFRESH_TOLERANCE
+        if (nearest > 0)
+                return res_map_refresh_tbl[nearest].vmode_refresh;
+        return 60;
+}
+
+static void device_off(void)
+{
+        viafb_crt_disable();
+        viafb_dvi_disable();
+        viafb_lcd_disable();
+}
+
+static void device_on(void)
+{
+        if (viafb_CRT_ON == 1)
+                viafb_crt_enable();
+        if (viafb_DVI_ON == 1)
+                viafb_dvi_enable();
+        if (viafb_LCD_ON == 1)
+                viafb_lcd_enable();
+}
+
+void viafb_crt_disable(void)
+{
+        viafb_write_reg_mask(CR36, VIACR, BIT5 + BIT4, BIT5 + BIT4);
+}
+
+void viafb_crt_enable(void)
+{
+        viafb_write_reg_mask(CR36, VIACR, 0x0, BIT5 + BIT4);
+}
+
+void viafb_get_mmio_info(unsigned long *mmio_base,
+        unsigned long *mmio_len)
+{
+        struct pci_dev *pdev = NULL;
+        u32 vendor, device;
+        u32 i;
+
+        for (i = 0; pciidlist[i].vendor != 0; i++)
+                if (viaparinfo->chip_info->gfx_chip_name ==
+                        pciidlist[i].chip_index)
+                        break;
+
+        if (!pciidlist[i].vendor)
+                return ;
+
+        vendor = pciidlist[i].vendor;
+        device = pciidlist[i].device;
+
+        pdev = pci_get_device(vendor, device, NULL);
+
+        if (!pdev) {
+                *mmio_base = 0;
+                *mmio_len = 0;
+                return ;
+        }
+
+        *mmio_base = pci_resource_start(pdev, 1);
+        *mmio_len = pci_resource_len(pdev, 1);
+
+        pci_dev_put(pdev);
+}
+
+static void enable_second_display_channel(void)
+{
+        /* to enable second display channel. */
+        viafb_write_reg_mask(CR6A, VIACR, 0x00, BIT6);
+        viafb_write_reg_mask(CR6A, VIACR, BIT7, BIT7);
+        viafb_write_reg_mask(CR6A, VIACR, BIT6, BIT6);
+}
+
+static void disable_second_display_channel(void)
+{
+        /* to disable second display channel. */
+        viafb_write_reg_mask(CR6A, VIACR, 0x00, BIT6);
+        viafb_write_reg_mask(CR6A, VIACR, 0x00, BIT7);
+        viafb_write_reg_mask(CR6A, VIACR, BIT6, BIT6);
+}
+
+void viafb_get_fb_info(unsigned int *fb_base, unsigned int *fb_len)
+{
+        struct pci_dev *pdev = NULL;
+        u32 vendor, device;
+        u32 i;
+
+        for (i = 0; pciidlist[i].vendor != 0; i++)
+                if (viaparinfo->chip_info->gfx_chip_name ==
+                        pciidlist[i].chip_index)
+                        break;
+
+        if (!pciidlist[i].vendor)
+                return ;
+
+        vendor = pciidlist[i].vendor;
+        device = pciidlist[i].device;
+
+        pdev = pci_get_device(vendor, device, NULL);
+
+        if (!pdev) {
+                *fb_base = viafb_read_reg(VIASR, SR30) << 24;
+                *fb_len = viafb_get_memsize();
+                DEBUG_MSG(KERN_INFO "Get FB info from SR30!\n");
+                DEBUG_MSG(KERN_INFO "fb_base = %08x\n", *fb_base);
+                DEBUG_MSG(KERN_INFO "fb_len = %08x\n", *fb_len);
+                return ;
+        }
+
+        *fb_base = (unsigned int)pci_resource_start(pdev, 0);
+        *fb_len = get_fb_size_from_pci();
+        DEBUG_MSG(KERN_INFO "Get FB info from PCI system!\n");
+        DEBUG_MSG(KERN_INFO "fb_base = %08x\n", *fb_base);
+        DEBUG_MSG(KERN_INFO "fb_len = %08x\n", *fb_len);
+
+        pci_dev_put(pdev);
+}
+
+static int get_fb_size_from_pci(void)
+{
+        unsigned long configid, deviceid, FBSize = 0;
+        int VideoMemSize;
+        int DeviceFound = false;
+
+        for (configid = 0x80000000; configid < 0x80010800; configid += 0x100) {
+                outl(configid, (unsigned long)0xCF8);
+                deviceid = (inl((unsigned long)0xCFC) >> 16) & 0xffff;
+
+                switch (deviceid) {
+                case CLE266:
+                case KM400:
+                        outl(configid + 0xE0, (unsigned long)0xCF8);
+                        FBSize = inl((unsigned long)0xCFC);
+                        DeviceFound = true;     /* Found device id */
+                        break;
+
+                case CN400_FUNCTION3:
+                case CN700_FUNCTION3:
+                case CX700_FUNCTION3:
+                case KM800_FUNCTION3:
+                case KM890_FUNCTION3:
+                case P4M890_FUNCTION3:
+                case P4M900_FUNCTION3:
+                case VX800_FUNCTION3:
+                        /*case CN750_FUNCTION3: */
+                        outl(configid + 0xA0, (unsigned long)0xCF8);
+                        FBSize = inl((unsigned long)0xCFC);
+                        DeviceFound = true;     /* Found device id */
+                        break;
+
+                default:
+                        break;
+                }
+
+                if (DeviceFound)
+                        break;
+        }
+
+        DEBUG_MSG(KERN_INFO "Device ID = %lx\n", deviceid);
+
+        FBSize = FBSize & 0x00007000;
+        DEBUG_MSG(KERN_INFO "FB Size = %x\n", FBSize);
+
+        if (viaparinfo->chip_info->gfx_chip_name < UNICHROME_CX700) {
+                switch (FBSize) {
+                case 0x00004000:
+                        VideoMemSize = (16 << 20);      /*16M */
+                        break;
+
+                case 0x00005000:
+                        VideoMemSize = (32 << 20);      /*32M */
+                        break;
+
+                case 0x00006000:
+                        VideoMemSize = (64 << 20);      /*64M */
+                        break;
+
+                default:
+                        VideoMemSize = (32 << 20);      /*32M */
+                        break;
+                }
+        } else {
+                switch (FBSize) {
+                case 0x00001000:
+                        VideoMemSize = (8 << 20);       /*8M */
+                        break;
+
+                case 0x00002000:
+                        VideoMemSize = (16 << 20);      /*16M */
+                        break;
+
+                case 0x00003000:
+                        VideoMemSize = (32 << 20);      /*32M */
+                        break;
+
+                case 0x00004000:
+                        VideoMemSize = (64 << 20);      /*64M */
+                        break;
+
+                case 0x00005000:
+                        VideoMemSize = (128 << 20);     /*128M */
+                        break;
+
+                case 0x00006000:
+                        VideoMemSize = (256 << 20);     /*256M */
+                        break;
+
+                default:
+                        VideoMemSize = (32 << 20);      /*32M */
+                        break;
+                }
+        }
+
+        return VideoMemSize;
+}
+
+void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\
+                                        *p_gfx_dpa_setting)
+{
+        switch (output_interface) {
+        case INTERFACE_DVP0:
+                {
+                        /* DVP0 Clock Polarity and Adjust: */
+                        viafb_write_reg_mask(CR96, VIACR,
+                                       p_gfx_dpa_setting->DVP0, 0x0F);
+
+                        /* DVP0 Clock and Data Pads Driving: */
+                        viafb_write_reg_mask(SR1E, VIASR,
+                                       p_gfx_dpa_setting->DVP0ClockDri_S, BIT2);
+                        viafb_write_reg_mask(SR2A, VIASR,
+                                       p_gfx_dpa_setting->DVP0ClockDri_S1,
+                                       BIT4);
+                        viafb_write_reg_mask(SR1B, VIASR,
+                                       p_gfx_dpa_setting->DVP0DataDri_S, BIT1);
+                        viafb_write_reg_mask(SR2A, VIASR,
+                                       p_gfx_dpa_setting->DVP0DataDri_S1, BIT5);
+                        break;
+                }
+
+        case INTERFACE_DVP1:
+                {
+                        /* DVP1 Clock Polarity and Adjust: */
+                        viafb_write_reg_mask(CR9B, VIACR,
+                                       p_gfx_dpa_setting->DVP1, 0x0F);
+
+                        /* DVP1 Clock and Data Pads Driving: */
+                        viafb_write_reg_mask(SR65, VIASR,
+                                       p_gfx_dpa_setting->DVP1Driving, 0x0F);
+                        break;
+                }
+
+        case INTERFACE_DFP_HIGH:
+                {
+                        viafb_write_reg_mask(CR97, VIACR,
+                                       p_gfx_dpa_setting->DFPHigh, 0x0F);
+                        break;
+                }
+
+        case INTERFACE_DFP_LOW:
+                {
+                        viafb_write_reg_mask(CR99, VIACR,
+                                       p_gfx_dpa_setting->DFPLow, 0x0F);
+                        break;
+                }
+
+        case INTERFACE_DFP:
+                {
+                        viafb_write_reg_mask(CR97, VIACR,
+                                       p_gfx_dpa_setting->DFPHigh, 0x0F);
+                        viafb_write_reg_mask(CR99, VIACR,
+                                       p_gfx_dpa_setting->DFPLow, 0x0F);
+                        break;
+                }
+        }
+}
+
+void viafb_memory_pitch_patch(struct fb_info *info)
+{
+        if (info->var.xres != info->var.xres_virtual) {
+                viafb_load_offset_reg(info->var.xres_virtual,
+                                info->var.bits_per_pixel >> 3, IGA1);
+
+                if (viafb_SAMM_ON) {
+                        viafb_load_offset_reg(viafb_second_virtual_xres,
+                                viafb_bpp1 >> 3,
+                                        IGA2);
+                } else {
+                        viafb_load_offset_reg(info->var.xres_virtual,
+                                        info->var.bits_per_pixel >> 3, IGA2);
+                }
+
+        }
+}
+
+/*According var's xres, yres fill var's other timing information*/
+void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh,
+                          int mode_index)
+{
+        struct VideoModeTable *vmode_tbl = NULL;
+        struct crt_mode_table *crt_timing = NULL;
+        struct display_timing crt_reg;
+        int i = 0, index = 0;
+        vmode_tbl = &CLE266Modes[search_mode_setting(mode_index)];
+        crt_timing = vmode_tbl->crtc;
+        for (i = 0; i < vmode_tbl->mode_array; i++) {
+                index = i;
+                if (crt_timing[i].refresh_rate == refresh)
+                        break;
+        }
+
+        crt_reg = crt_timing[index].crtc;
+        switch (var->bits_per_pixel) {
+        case 8:
+                var->red.offset = 0;
+                var->green.offset = 0;
+                var->blue.offset = 0;
+                var->red.length = 6;
+                var->green.length = 6;
+                var->blue.length = 6;
+                break;
+        case 16:
+                var->red.offset = 11;
+                var->green.offset = 5;
+                var->blue.offset = 0;
+                var->red.length = 5;
+                var->green.length = 6;
+                var->blue.length = 5;
+                break;
+        case 32:
+                var->red.offset = 16;
+                var->green.offset = 8;
+                var->blue.offset = 0;
+                var->red.length = 8;
+                var->green.length = 8;
+                var->blue.length = 8;
+                break;
+        default:
+                /* never happed, put here to keep consistent */
+                break;
+        }
+
+        var->pixclock = viafb_get_pixclock(var->xres, var->yres, refresh);
+        var->left_margin =
+            crt_reg.hor_total - (crt_reg.hor_sync_start + crt_reg.hor_sync_end);
+        var->right_margin = crt_reg.hor_sync_start - crt_reg.hor_addr;
+        var->hsync_len = crt_reg.hor_sync_end;
+        var->upper_margin =
+            crt_reg.ver_total - (crt_reg.ver_sync_start + crt_reg.ver_sync_end);
+        var->lower_margin = crt_reg.ver_sync_start - crt_reg.ver_addr;
+        var->vsync_len = crt_reg.ver_sync_end;
+}
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h
new file mode 100644
index 000000000000..6ff38fa8569a
--- /dev/null
+++ b/drivers/video/via/hw.h
@@ -0,0 +1,933 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef __HW_H__
+#define __HW_H__
+
+#include "global.h"
+
+/***************************************************
+* Definition IGA1 Design Method of CRTC Registers *
+****************************************************/
+#define IGA1_HOR_TOTAL_FORMULA(x)           (((x)/8)-5)
+#define IGA1_HOR_ADDR_FORMULA(x)            (((x)/8)-1)
+#define IGA1_HOR_BLANK_START_FORMULA(x)     (((x)/8)-1)
+#define IGA1_HOR_BLANK_END_FORMULA(x, y)     (((x+y)/8)-1)
+#define IGA1_HOR_SYNC_START_FORMULA(x)      ((x)/8)
+#define IGA1_HOR_SYNC_END_FORMULA(x, y)      ((x+y)/8)
+
+#define IGA1_VER_TOTAL_FORMULA(x)           ((x)-2)
+#define IGA1_VER_ADDR_FORMULA(x)            ((x)-1)
+#define IGA1_VER_BLANK_START_FORMULA(x)     ((x)-1)
+#define IGA1_VER_BLANK_END_FORMULA(x, y)     ((x+y)-1)
+#define IGA1_VER_SYNC_START_FORMULA(x)      ((x)-1)
+#define IGA1_VER_SYNC_END_FORMULA(x, y)      ((x+y)-1)
+
+/***************************************************
+** Definition IGA2 Design Method of CRTC Registers *
+****************************************************/
+#define IGA2_HOR_TOTAL_FORMULA(x)           ((x)-1)
+#define IGA2_HOR_ADDR_FORMULA(x)            ((x)-1)
+#define IGA2_HOR_BLANK_START_FORMULA(x)     ((x)-1)
+#define IGA2_HOR_BLANK_END_FORMULA(x, y)     ((x+y)-1)
+#define IGA2_HOR_SYNC_START_FORMULA(x)      ((x)-1)
+#define IGA2_HOR_SYNC_END_FORMULA(x, y)      ((x+y)-1)
+
+#define IGA2_VER_TOTAL_FORMULA(x)           ((x)-1)
+#define IGA2_VER_ADDR_FORMULA(x)            ((x)-1)
+#define IGA2_VER_BLANK_START_FORMULA(x)     ((x)-1)
+#define IGA2_VER_BLANK_END_FORMULA(x, y)     ((x+y)-1)
+#define IGA2_VER_SYNC_START_FORMULA(x)      ((x)-1)
+#define IGA2_VER_SYNC_END_FORMULA(x, y)      ((x+y)-1)
+
+/**********************************************************/
+/* Definition IGA2 Design Method of CRTC Shadow Registers */
+/**********************************************************/
+#define IGA2_HOR_TOTAL_SHADOW_FORMULA(x)           ((x/8)-5)
+#define IGA2_HOR_BLANK_END_SHADOW_FORMULA(x, y)     (((x+y)/8)-1)
+#define IGA2_VER_TOTAL_SHADOW_FORMULA(x)           ((x)-2)
+#define IGA2_VER_ADDR_SHADOW_FORMULA(x)            ((x)-1)
+#define IGA2_VER_BLANK_START_SHADOW_FORMULA(x)     ((x)-1)
+#define IGA2_VER_BLANK_END_SHADOW_FORMULA(x, y)     ((x+y)-1)
+#define IGA2_VER_SYNC_START_SHADOW_FORMULA(x)      (x)
+#define IGA2_VER_SYNC_END_SHADOW_FORMULA(x, y)      (x+y)
+
+/* Define Register Number for IGA1 CRTC Timing */
+
+/* location: {CR00,0,7},{CR36,3,3} */
+#define IGA1_HOR_TOTAL_REG_NUM          2
+/* location: {CR01,0,7} */
+#define IGA1_HOR_ADDR_REG_NUM           1
+/* location: {CR02,0,7} */
+#define IGA1_HOR_BLANK_START_REG_NUM    1
+/* location: {CR03,0,4},{CR05,7,7},{CR33,5,5} */
+#define IGA1_HOR_BLANK_END_REG_NUM      3
+/* location: {CR04,0,7},{CR33,4,4} */
+#define IGA1_HOR_SYNC_START_REG_NUM     2
+/* location: {CR05,0,4} */
+#define IGA1_HOR_SYNC_END_REG_NUM       1
+/* location: {CR06,0,7},{CR07,0,0},{CR07,5,5},{CR35,0,0} */
+#define IGA1_VER_TOTAL_REG_NUM          4
+/* location: {CR12,0,7},{CR07,1,1},{CR07,6,6},{CR35,2,2} */
+#define IGA1_VER_ADDR_REG_NUM           4
+/* location: {CR15,0,7},{CR07,3,3},{CR09,5,5},{CR35,3,3} */
+#define IGA1_VER_BLANK_START_REG_NUM    4
+/* location: {CR16,0,7} */
+#define IGA1_VER_BLANK_END_REG_NUM      1
+/* location: {CR10,0,7},{CR07,2,2},{CR07,7,7},{CR35,1,1} */
+#define IGA1_VER_SYNC_START_REG_NUM     4
+/* location: {CR11,0,3} */
+#define IGA1_VER_SYNC_END_REG_NUM       1
+
+/* Define Register Number for IGA2 Shadow CRTC Timing */
+
+/* location: {CR6D,0,7},{CR71,3,3} */
+#define IGA2_SHADOW_HOR_TOTAL_REG_NUM       2
+/* location: {CR6E,0,7} */
+#define IGA2_SHADOW_HOR_BLANK_END_REG_NUM   1
+/* location: {CR6F,0,7},{CR71,0,2} */
+#define IGA2_SHADOW_VER_TOTAL_REG_NUM       2
+/* location: {CR70,0,7},{CR71,4,6} */
+#define IGA2_SHADOW_VER_ADDR_REG_NUM        2
+/* location: {CR72,0,7},{CR74,4,6} */
+#define IGA2_SHADOW_VER_BLANK_START_REG_NUM 2
+/* location: {CR73,0,7},{CR74,0,2} */
+#define IGA2_SHADOW_VER_BLANK_END_REG_NUM   2
+/* location: {CR75,0,7},{CR76,4,6} */
+#define IGA2_SHADOW_VER_SYNC_START_REG_NUM  2
+/* location: {CR76,0,3} */
+#define IGA2_SHADOW_VER_SYNC_END_REG_NUM    1
+
+/* Define Register Number for IGA2 CRTC Timing */
+
+/* location: {CR50,0,7},{CR55,0,3} */
+#define IGA2_HOR_TOTAL_REG_NUM          2
+/* location: {CR51,0,7},{CR55,4,6} */
+#define IGA2_HOR_ADDR_REG_NUM           2
+/* location: {CR52,0,7},{CR54,0,2} */
+#define IGA2_HOR_BLANK_START_REG_NUM    2
+/* location: CLE266: {CR53,0,7},{CR54,3,5} => CLE266's CR5D[6]
+is reserved, so it may have problem to set 1600x1200 on IGA2. */
+/*              Others: {CR53,0,7},{CR54,3,5},{CR5D,6,6} */
+#define IGA2_HOR_BLANK_END_REG_NUM      3
+/* location: {CR56,0,7},{CR54,6,7},{CR5C,7,7} */
+/* VT3314 and Later: {CR56,0,7},{CR54,6,7},{CR5C,7,7}, {CR5D,7,7} */
+#define IGA2_HOR_SYNC_START_REG_NUM     4
+
+/* location: {CR57,0,7},{CR5C,6,6} */
+#define IGA2_HOR_SYNC_END_REG_NUM       2
+/* location: {CR58,0,7},{CR5D,0,2} */
+#define IGA2_VER_TOTAL_REG_NUM          2
+/* location: {CR59,0,7},{CR5D,3,5} */
+#define IGA2_VER_ADDR_REG_NUM           2
+/* location: {CR5A,0,7},{CR5C,0,2} */
+#define IGA2_VER_BLANK_START_REG_NUM    2
+/* location: {CR5E,0,7},{CR5C,3,5} */
+#define IGA2_VER_BLANK_END_REG_NUM      2
+/* location: {CR5E,0,7},{CR5F,5,7} */
+#define IGA2_VER_SYNC_START_REG_NUM     2
+/* location: {CR5F,0,4} */
+#define IGA2_VER_SYNC_END_REG_NUM       1
+
+/* Define Offset and Fetch Count Register*/
+
+/* location: {CR13,0,7},{CR35,5,7} */
+#define IGA1_OFFSET_REG_NUM             2
+/* 8 bytes alignment. */
+#define IGA1_OFFSER_ALIGN_BYTE          8
+/* x: H resolution, y: color depth */
+#define IGA1_OFFSET_FORMULA(x, y)        ((x*y)/IGA1_OFFSER_ALIGN_BYTE)
+/* location: {SR1C,0,7},{SR1D,0,1} */
+#define IGA1_FETCH_COUNT_REG_NUM        2
+/* 16 bytes alignment. */
+#define IGA1_FETCH_COUNT_ALIGN_BYTE     16
+/* x: H resolution, y: color depth */
+#define IGA1_FETCH_COUNT_PATCH_VALUE    4
+#define IGA1_FETCH_COUNT_FORMULA(x, y)   \
+        (((x*y)/IGA1_FETCH_COUNT_ALIGN_BYTE) + IGA1_FETCH_COUNT_PATCH_VALUE)
+
+/* location: {CR66,0,7},{CR67,0,1} */
+#define IGA2_OFFSET_REG_NUM             2
+#define IGA2_OFFSET_ALIGN_BYTE          8
+/* x: H resolution, y: color depth */
+#define IGA2_OFFSET_FORMULA(x, y)        ((x*y)/IGA2_OFFSET_ALIGN_BYTE)
+/* location: {CR65,0,7},{CR67,2,3} */
+#define IGA2_FETCH_COUNT_REG_NUM        2
+#define IGA2_FETCH_COUNT_ALIGN_BYTE     16
+#define IGA2_FETCH_COUNT_PATCH_VALUE    0
+#define IGA2_FETCH_COUNT_FORMULA(x, y)   \
+        (((x*y)/IGA2_FETCH_COUNT_ALIGN_BYTE) + IGA2_FETCH_COUNT_PATCH_VALUE)
+
+/* Staring Address*/
+
+/* location: {CR0C,0,7},{CR0D,0,7},{CR34,0,7},{CR48,0,1} */
+#define IGA1_STARTING_ADDR_REG_NUM      4
+/* location: {CR62,1,7},{CR63,0,7},{CR64,0,7} */
+#define IGA2_STARTING_ADDR_REG_NUM      3
+
+/* Define Display OFFSET*/
+/* These value are by HW suggested value*/
+/* location: {SR17,0,7} */
+#define K800_IGA1_FIFO_MAX_DEPTH                384
+/* location: {SR16,0,5},{SR16,7,7} */
+#define K800_IGA1_FIFO_THRESHOLD                328
+/* location: {SR18,0,5},{SR18,7,7} */
+#define K800_IGA1_FIFO_HIGH_THRESHOLD           296
+/* location: {SR22,0,4}. (128/4) =64, K800 must be set zero, */
+                                /* because HW only 5 bits */
+#define K800_IGA1_DISPLAY_QUEUE_EXPIRE_NUM      0
+
+/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
+#define K800_IGA2_FIFO_MAX_DEPTH                384
+/* location: {CR68,0,3},{CR95,4,6} */
+#define K800_IGA2_FIFO_THRESHOLD                328
+/* location: {CR92,0,3},{CR95,0,2} */
+#define K800_IGA2_FIFO_HIGH_THRESHOLD           296
+/* location: {CR94,0,6} */
+#define K800_IGA2_DISPLAY_QUEUE_EXPIRE_NUM      128
+
+/* location: {SR17,0,7} */
+#define P880_IGA1_FIFO_MAX_DEPTH                192
+/* location: {SR16,0,5},{SR16,7,7} */
+#define P880_IGA1_FIFO_THRESHOLD                128
+/* location: {SR18,0,5},{SR18,7,7} */
+#define P880_IGA1_FIFO_HIGH_THRESHOLD           64
+/* location: {SR22,0,4}. (128/4) =64, K800 must be set zero, */
+                                /* because HW only 5 bits */
+#define P880_IGA1_DISPLAY_QUEUE_EXPIRE_NUM      0
+
+/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
+#define P880_IGA2_FIFO_MAX_DEPTH                96
+/* location: {CR68,0,3},{CR95,4,6} */
+#define P880_IGA2_FIFO_THRESHOLD                64
+/* location: {CR92,0,3},{CR95,0,2} */
+#define P880_IGA2_FIFO_HIGH_THRESHOLD           32
+/* location: {CR94,0,6} */
+#define P880_IGA2_DISPLAY_QUEUE_EXPIRE_NUM      128
+
+/* VT3314 chipset*/
+
+/* location: {SR17,0,7} */
+#define CN700_IGA1_FIFO_MAX_DEPTH               96
+/* location: {SR16,0,5},{SR16,7,7} */
+#define CN700_IGA1_FIFO_THRESHOLD               80
+/* location: {SR18,0,5},{SR18,7,7} */
+#define CN700_IGA1_FIFO_HIGH_THRESHOLD          64
+/* location: {SR22,0,4}. (128/4) =64, P800 must be set zero,
+                                because HW only 5 bits */
+#define CN700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM     0
+/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
+#define CN700_IGA2_FIFO_MAX_DEPTH               96
+/* location: {CR68,0,3},{CR95,4,6} */
+#define CN700_IGA2_FIFO_THRESHOLD               80
+/* location: {CR92,0,3},{CR95,0,2} */
+#define CN700_IGA2_FIFO_HIGH_THRESHOLD          32
+/* location: {CR94,0,6} */
+#define CN700_IGA2_DISPLAY_QUEUE_EXPIRE_NUM     128
+
+/* For VT3324, these values are suggested by HW */
+/* location: {SR17,0,7} */
+#define CX700_IGA1_FIFO_MAX_DEPTH               192
+/* location: {SR16,0,5},{SR16,7,7} */
+#define CX700_IGA1_FIFO_THRESHOLD               128
+/* location: {SR18,0,5},{SR18,7,7} */
+#define CX700_IGA1_FIFO_HIGH_THRESHOLD          128
+/* location: {SR22,0,4} */
+#define CX700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM     124
+
+/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
+#define CX700_IGA2_FIFO_MAX_DEPTH               96
+/* location: {CR68,0,3},{CR95,4,6} */
+#define CX700_IGA2_FIFO_THRESHOLD               64
+/* location: {CR92,0,3},{CR95,0,2} */
+#define CX700_IGA2_FIFO_HIGH_THRESHOLD          32
+/* location: {CR94,0,6} */
+#define CX700_IGA2_DISPLAY_QUEUE_EXPIRE_NUM     128
+
+/* VT3336 chipset*/
+/* location: {SR17,0,7} */
+#define K8M890_IGA1_FIFO_MAX_DEPTH               360
+/* location: {SR16,0,5},{SR16,7,7} */
+#define K8M890_IGA1_FIFO_THRESHOLD               328
+/* location: {SR18,0,5},{SR18,7,7} */
+#define K8M890_IGA1_FIFO_HIGH_THRESHOLD          296
+/* location: {SR22,0,4}. */
+#define K8M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM     124
+
+/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
+#define K8M890_IGA2_FIFO_MAX_DEPTH               360
+/* location: {CR68,0,3},{CR95,4,6} */
+#define K8M890_IGA2_FIFO_THRESHOLD               328
+/* location: {CR92,0,3},{CR95,0,2} */
+#define K8M890_IGA2_FIFO_HIGH_THRESHOLD          296
+/* location: {CR94,0,6} */
+#define K8M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM     124
+
+/* VT3327 chipset*/
+/* location: {SR17,0,7} */
+#define P4M890_IGA1_FIFO_MAX_DEPTH               96
+/* location: {SR16,0,5},{SR16,7,7} */
+#define P4M890_IGA1_FIFO_THRESHOLD               76
+/* location: {SR18,0,5},{SR18,7,7} */
+#define P4M890_IGA1_FIFO_HIGH_THRESHOLD          64
+/* location: {SR22,0,4}. (32/4) =8 */
+#define P4M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM     32
+/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
+#define P4M890_IGA2_FIFO_MAX_DEPTH               96
+/* location: {CR68,0,3},{CR95,4,6} */
+#define P4M890_IGA2_FIFO_THRESHOLD               76
+/* location: {CR92,0,3},{CR95,0,2} */
+#define P4M890_IGA2_FIFO_HIGH_THRESHOLD          64
+/* location: {CR94,0,6} */
+#define P4M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM     32
+
+/* VT3364 chipset*/
+/* location: {SR17,0,7} */
+#define P4M900_IGA1_FIFO_MAX_DEPTH               96
+/* location: {SR16,0,5},{SR16,7,7} */
+#define P4M900_IGA1_FIFO_THRESHOLD               76
+/* location: {SR18,0,5},{SR18,7,7} */
+#define P4M900_IGA1_FIFO_HIGH_THRESHOLD          76
+/* location: {SR22,0,4}. */
+#define P4M900_IGA1_DISPLAY_QUEUE_EXPIRE_NUM     32
+/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
+#define P4M900_IGA2_FIFO_MAX_DEPTH               96
+/* location: {CR68,0,3},{CR95,4,6} */
+#define P4M900_IGA2_FIFO_THRESHOLD               76
+/* location: {CR92,0,3},{CR95,0,2} */
+#define P4M900_IGA2_FIFO_HIGH_THRESHOLD          76
+/* location: {CR94,0,6} */
+#define P4M900_IGA2_DISPLAY_QUEUE_EXPIRE_NUM     32
+
+/* For VT3353, these values are suggested by HW */
+/* location: {SR17,0,7} */
+#define VX800_IGA1_FIFO_MAX_DEPTH               192
+/* location: {SR16,0,5},{SR16,7,7} */
+#define VX800_IGA1_FIFO_THRESHOLD               152
+/* location: {SR18,0,5},{SR18,7,7} */
+#define VX800_IGA1_FIFO_HIGH_THRESHOLD          152
+/* location: {SR22,0,4} */
+#define VX800_IGA1_DISPLAY_QUEUE_EXPIRE_NUM      64
+/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */
+#define VX800_IGA2_FIFO_MAX_DEPTH               96
+/* location: {CR68,0,3},{CR95,4,6} */
+#define VX800_IGA2_FIFO_THRESHOLD               64
+/* location: {CR92,0,3},{CR95,0,2} */
+#define VX800_IGA2_FIFO_HIGH_THRESHOLD          32
+/* location: {CR94,0,6} */
+#define VX800_IGA2_DISPLAY_QUEUE_EXPIRE_NUM     128
+
+#define IGA1_FIFO_DEPTH_SELECT_REG_NUM          1
+#define IGA1_FIFO_THRESHOLD_REG_NUM             2
+#define IGA1_FIFO_HIGH_THRESHOLD_REG_NUM        2
+#define IGA1_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM   1
+
+#define IGA2_FIFO_DEPTH_SELECT_REG_NUM          3
+#define IGA2_FIFO_THRESHOLD_REG_NUM             2
+#define IGA2_FIFO_HIGH_THRESHOLD_REG_NUM        2
+#define IGA2_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM   1
+
+#define IGA1_FIFO_DEPTH_SELECT_FORMULA(x)                   ((x/2)-1)
+#define IGA1_FIFO_THRESHOLD_FORMULA(x)                      (x/4)
+#define IGA1_DISPLAY_QUEUE_EXPIRE_NUM_FORMULA(x)            (x/4)
+#define IGA1_FIFO_HIGH_THRESHOLD_FORMULA(x)                 (x/4)
+#define IGA2_FIFO_DEPTH_SELECT_FORMULA(x)                   (((x/2)/4)-1)
+#define IGA2_FIFO_THRESHOLD_FORMULA(x)                      (x/4)
+#define IGA2_DISPLAY_QUEUE_EXPIRE_NUM_FORMULA(x)            (x/4)
+#define IGA2_FIFO_HIGH_THRESHOLD_FORMULA(x)                 (x/4)
+
+/************************************************************************/
+/*  LCD Timing                                                          */
+/************************************************************************/
+
+/* 500 ms = 500000 us */
+#define LCD_POWER_SEQ_TD0               500000
+/* 50 ms = 50000 us */
+#define LCD_POWER_SEQ_TD1               50000
+/* 0 us */
+#define LCD_POWER_SEQ_TD2               0
+/* 210 ms = 210000 us */
+#define LCD_POWER_SEQ_TD3               210000
+/* 2^10 * (1/14.31818M) = 71.475 us (K400.revA) */
+#define CLE266_POWER_SEQ_UNIT           71
+/* 2^11 * (1/14.31818M) = 142.95 us (K400.revB) */
+#define K800_POWER_SEQ_UNIT             142
+/* 2^13 * (1/14.31818M) = 572.1 us */
+#define P880_POWER_SEQ_UNIT             572
+
+#define CLE266_POWER_SEQ_FORMULA(x)     ((x)/CLE266_POWER_SEQ_UNIT)
+#define K800_POWER_SEQ_FORMULA(x)       ((x)/K800_POWER_SEQ_UNIT)
+#define P880_POWER_SEQ_FORMULA(x)       ((x)/P880_POWER_SEQ_UNIT)
+
+/* location: {CR8B,0,7},{CR8F,0,3} */
+#define LCD_POWER_SEQ_TD0_REG_NUM       2
+/* location: {CR8C,0,7},{CR8F,4,7} */
+#define LCD_POWER_SEQ_TD1_REG_NUM       2
+/* location: {CR8D,0,7},{CR90,0,3} */
+#define LCD_POWER_SEQ_TD2_REG_NUM       2
+/* location: {CR8E,0,7},{CR90,4,7} */
+#define LCD_POWER_SEQ_TD3_REG_NUM       2
+
+/* LCD Scaling factor*/
+/* x: indicate setting horizontal size*/
+/* y: indicate panel horizontal size*/
+
+/* Horizontal scaling factor 10 bits (2^10) */
+#define CLE266_LCD_HOR_SCF_FORMULA(x, y)   (((x-1)*1024)/(y-1))
+/* Vertical scaling factor 10 bits (2^10) */
+#define CLE266_LCD_VER_SCF_FORMULA(x, y)   (((x-1)*1024)/(y-1))
+/* Horizontal scaling factor 10 bits (2^12) */
+#define K800_LCD_HOR_SCF_FORMULA(x, y)     (((x-1)*4096)/(y-1))
+/* Vertical scaling factor 10 bits (2^11) */
+#define K800_LCD_VER_SCF_FORMULA(x, y)     (((x-1)*2048)/(y-1))
+
+/* location: {CR9F,0,1},{CR77,0,7},{CR79,4,5} */
+#define LCD_HOR_SCALING_FACTOR_REG_NUM  3
+/* location: {CR79,3,3},{CR78,0,7},{CR79,6,7} */
+#define LCD_VER_SCALING_FACTOR_REG_NUM  3
+/* location: {CR77,0,7},{CR79,4,5} */
+#define LCD_HOR_SCALING_FACTOR_REG_NUM_CLE  2
+/* location: {CR78,0,7},{CR79,6,7} */
+#define LCD_VER_SCALING_FACTOR_REG_NUM_CLE  2
+
+/************************************************
+ *****     Define IGA1 Display Timing       *****
+ ************************************************/
+struct io_register {
+        u8 io_addr;
+        u8 start_bit;
+        u8 end_bit;
+};
+
+/* IGA1 Horizontal Total */
+struct iga1_hor_total {
+        int reg_num;
+        struct io_register reg[IGA1_HOR_TOTAL_REG_NUM];
+};
+
+/* IGA1 Horizontal Addressable Video */
+struct iga1_hor_addr {
+        int reg_num;
+        struct io_register reg[IGA1_HOR_ADDR_REG_NUM];
+};
+
+/* IGA1 Horizontal Blank Start */
+struct iga1_hor_blank_start {
+        int reg_num;
+        struct io_register reg[IGA1_HOR_BLANK_START_REG_NUM];
+};
+
+/* IGA1 Horizontal Blank End */
+struct iga1_hor_blank_end {
+        int reg_num;
+        struct io_register reg[IGA1_HOR_BLANK_END_REG_NUM];
+};
+
+/* IGA1 Horizontal Sync Start */
+struct iga1_hor_sync_start {
+        int reg_num;
+        struct io_register reg[IGA1_HOR_SYNC_START_REG_NUM];
+};
+
+/* IGA1 Horizontal Sync End */
+struct iga1_hor_sync_end {
+        int reg_num;
+        struct io_register reg[IGA1_HOR_SYNC_END_REG_NUM];
+};
+
+/* IGA1 Vertical Total */
+struct iga1_ver_total {
+        int reg_num;
+        struct io_register reg[IGA1_VER_TOTAL_REG_NUM];
+};
+
+/* IGA1 Vertical Addressable Video */
+struct iga1_ver_addr {
+        int reg_num;
+        struct io_register reg[IGA1_VER_ADDR_REG_NUM];
+};
+
+/* IGA1 Vertical Blank Start */
+struct iga1_ver_blank_start {
+        int reg_num;
+        struct io_register reg[IGA1_VER_BLANK_START_REG_NUM];
+};
+
+/* IGA1 Vertical Blank End */
+struct iga1_ver_blank_end {
+        int reg_num;
+        struct io_register reg[IGA1_VER_BLANK_END_REG_NUM];
+};
+
+/* IGA1 Vertical Sync Start */
+struct iga1_ver_sync_start {
+        int reg_num;
+        struct io_register reg[IGA1_VER_SYNC_START_REG_NUM];
+};
+
+/* IGA1 Vertical Sync End */
+struct iga1_ver_sync_end {
+        int reg_num;
+        struct io_register reg[IGA1_VER_SYNC_END_REG_NUM];
+};
+
+/*****************************************************
+**      Define IGA2 Shadow Display Timing         ****
+*****************************************************/
+
+/* IGA2 Shadow Horizontal Total */
+struct iga2_shadow_hor_total {
+        int reg_num;
+        struct io_register reg[IGA2_SHADOW_HOR_TOTAL_REG_NUM];
+};
+
+/* IGA2 Shadow Horizontal Blank End */
+struct iga2_shadow_hor_blank_end {
+        int reg_num;
+        struct io_register reg[IGA2_SHADOW_HOR_BLANK_END_REG_NUM];
+};
+
+/* IGA2 Shadow Vertical Total */
+struct iga2_shadow_ver_total {
+        int reg_num;
+        struct io_register reg[IGA2_SHADOW_VER_TOTAL_REG_NUM];
+};
+
+/* IGA2 Shadow Vertical Addressable Video */
+struct iga2_shadow_ver_addr {
+        int reg_num;
+        struct io_register reg[IGA2_SHADOW_VER_ADDR_REG_NUM];
+};
+
+/* IGA2 Shadow Vertical Blank Start */
+struct iga2_shadow_ver_blank_start {
+        int reg_num;
+        struct io_register reg[IGA2_SHADOW_VER_BLANK_START_REG_NUM];
+};
+
+/* IGA2 Shadow Vertical Blank End */
+struct iga2_shadow_ver_blank_end {
+        int reg_num;
+        struct io_register reg[IGA2_SHADOW_VER_BLANK_END_REG_NUM];
+};
+
+/* IGA2 Shadow Vertical Sync Start */
+struct iga2_shadow_ver_sync_start {
+        int reg_num;
+        struct io_register reg[IGA2_SHADOW_VER_SYNC_START_REG_NUM];
+};
+
+/* IGA2 Shadow Vertical Sync End */
+struct iga2_shadow_ver_sync_end {
+        int reg_num;
+        struct io_register reg[IGA2_SHADOW_VER_SYNC_END_REG_NUM];
+};
+
+/*****************************************************
+**      Define IGA2 Display Timing                ****
+******************************************************/
+
+/* IGA2 Horizontal Total */
+struct iga2_hor_total {
+        int reg_num;
+        struct io_register reg[IGA2_HOR_TOTAL_REG_NUM];
+};
+
+/* IGA2 Horizontal Addressable Video */
+struct iga2_hor_addr {
+        int reg_num;
+        struct io_register reg[IGA2_HOR_ADDR_REG_NUM];
+};
+
+/* IGA2 Horizontal Blank Start */
+struct iga2_hor_blank_start {
+        int reg_num;
+        struct io_register reg[IGA2_HOR_BLANK_START_REG_NUM];
+};
+
+/* IGA2 Horizontal Blank End */
+struct iga2_hor_blank_end {
+        int reg_num;
+        struct io_register reg[IGA2_HOR_BLANK_END_REG_NUM];
+};
+
+/* IGA2 Horizontal Sync Start */
+struct iga2_hor_sync_start {
+        int reg_num;
+        struct io_register reg[IGA2_HOR_SYNC_START_REG_NUM];
+};
+
+/* IGA2 Horizontal Sync End */
+struct iga2_hor_sync_end {
+        int reg_num;
+        struct io_register reg[IGA2_HOR_SYNC_END_REG_NUM];
+};
+
+/* IGA2 Vertical Total */
+struct iga2_ver_total {
+        int reg_num;
+        struct io_register reg[IGA2_VER_TOTAL_REG_NUM];
+};
+
+/* IGA2 Vertical Addressable Video */
+struct iga2_ver_addr {
+        int reg_num;
+        struct io_register reg[IGA2_VER_ADDR_REG_NUM];
+};
+
+/* IGA2 Vertical Blank Start */
+struct iga2_ver_blank_start {
+        int reg_num;
+        struct io_register reg[IGA2_VER_BLANK_START_REG_NUM];
+};
+
+/* IGA2 Vertical Blank End */
+struct iga2_ver_blank_end {
+        int reg_num;
+        struct io_register reg[IGA2_VER_BLANK_END_REG_NUM];
+};
+
+/* IGA2 Vertical Sync Start */
+struct iga2_ver_sync_start {
+        int reg_num;
+        struct io_register reg[IGA2_VER_SYNC_START_REG_NUM];
+};
+
+/* IGA2 Vertical Sync End */
+struct iga2_ver_sync_end {
+        int reg_num;
+        struct io_register reg[IGA2_VER_SYNC_END_REG_NUM];
+};
+
+/* IGA1 Offset Register */
+struct iga1_offset {
+        int reg_num;
+        struct io_register reg[IGA1_OFFSET_REG_NUM];
+};
+
+/* IGA2 Offset Register */
+struct iga2_offset {
+        int reg_num;
+        struct io_register reg[IGA2_OFFSET_REG_NUM];
+};
+
+struct offset {
+        struct iga1_offset iga1_offset_reg;
+        struct iga2_offset iga2_offset_reg;
+};
+
+/* IGA1 Fetch Count Register */
+struct iga1_fetch_count {
+        int reg_num;
+        struct io_register reg[IGA1_FETCH_COUNT_REG_NUM];
+};
+
+/* IGA2 Fetch Count Register */
+struct iga2_fetch_count {
+        int reg_num;
+        struct io_register reg[IGA2_FETCH_COUNT_REG_NUM];
+};
+
+struct fetch_count {
+        struct iga1_fetch_count iga1_fetch_count_reg;
+        struct iga2_fetch_count iga2_fetch_count_reg;
+};
+
+/* Starting Address Register */
+struct iga1_starting_addr {
+        int reg_num;
+        struct io_register reg[IGA1_STARTING_ADDR_REG_NUM];
+};
+
+struct iga2_starting_addr {
+        int reg_num;
+        struct io_register reg[IGA2_STARTING_ADDR_REG_NUM];
+};
+
+struct starting_addr {
+        struct iga1_starting_addr iga1_starting_addr_reg;
+        struct iga2_starting_addr iga2_starting_addr_reg;
+};
+
+/* LCD Power Sequence Timer */
+struct lcd_pwd_seq_td0 {
+        int reg_num;
+        struct io_register reg[LCD_POWER_SEQ_TD0_REG_NUM];
+};
+
+struct lcd_pwd_seq_td1 {
+        int reg_num;
+        struct io_register reg[LCD_POWER_SEQ_TD1_REG_NUM];
+};
+
+struct lcd_pwd_seq_td2 {
+        int reg_num;
+        struct io_register reg[LCD_POWER_SEQ_TD2_REG_NUM];
+};
+
+struct lcd_pwd_seq_td3 {
+        int reg_num;
+        struct io_register reg[LCD_POWER_SEQ_TD3_REG_NUM];
+};
+
+struct _lcd_pwd_seq_timer {
+        struct lcd_pwd_seq_td0 td0;
+        struct lcd_pwd_seq_td1 td1;
+        struct lcd_pwd_seq_td2 td2;
+        struct lcd_pwd_seq_td3 td3;
+};
+
+/* LCD Scaling Factor */
+struct _lcd_hor_scaling_factor {
+        int reg_num;
+        struct io_register reg[LCD_HOR_SCALING_FACTOR_REG_NUM];
+};
+
+struct _lcd_ver_scaling_factor {
+        int reg_num;
+        struct io_register reg[LCD_VER_SCALING_FACTOR_REG_NUM];
+};
+
+struct _lcd_scaling_factor {
+        struct _lcd_hor_scaling_factor lcd_hor_scaling_factor;
+        struct _lcd_ver_scaling_factor lcd_ver_scaling_factor;
+};
+
+struct pll_map {
+        u32 clk;
+        u32 cle266_pll;
+        u32 k800_pll;
+        u32 cx700_pll;
+};
+
+struct rgbLUT {
+        u8 red;
+        u8 green;
+        u8 blue;
+};
+
+struct lcd_pwd_seq_timer {
+        u16 td0;
+        u16 td1;
+        u16 td2;
+        u16 td3;
+};
+
+/* Display FIFO Relation Registers*/
+struct iga1_fifo_depth_select {
+        int reg_num;
+        struct io_register reg[IGA1_FIFO_DEPTH_SELECT_REG_NUM];
+};
+
+struct iga1_fifo_threshold_select {
+        int reg_num;
+        struct io_register reg[IGA1_FIFO_THRESHOLD_REG_NUM];
+};
+
+struct iga1_fifo_high_threshold_select {
+        int reg_num;
+        struct io_register reg[IGA1_FIFO_HIGH_THRESHOLD_REG_NUM];
+};
+
+struct iga1_display_queue_expire_num {
+        int reg_num;
+        struct io_register reg[IGA1_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM];
+};
+
+struct iga2_fifo_depth_select {
+        int reg_num;
+        struct io_register reg[IGA2_FIFO_DEPTH_SELECT_REG_NUM];
+};
+
+struct iga2_fifo_threshold_select {
+        int reg_num;
+        struct io_register reg[IGA2_FIFO_THRESHOLD_REG_NUM];
+};
+
+struct iga2_fifo_high_threshold_select {
+        int reg_num;
+        struct io_register reg[IGA2_FIFO_HIGH_THRESHOLD_REG_NUM];
+};
+
+struct iga2_display_queue_expire_num {
+        int reg_num;
+        struct io_register reg[IGA2_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM];
+};
+
+struct fifo_depth_select {
+        struct iga1_fifo_depth_select iga1_fifo_depth_select_reg;
+        struct iga2_fifo_depth_select iga2_fifo_depth_select_reg;
+};
+
+struct fifo_threshold_select {
+        struct iga1_fifo_threshold_select iga1_fifo_threshold_select_reg;
+        struct iga2_fifo_threshold_select iga2_fifo_threshold_select_reg;
+};
+
+struct fifo_high_threshold_select {
+        struct iga1_fifo_high_threshold_select
+         iga1_fifo_high_threshold_select_reg;
+        struct iga2_fifo_high_threshold_select
+         iga2_fifo_high_threshold_select_reg;
+};
+
+struct display_queue_expire_num {
+        struct iga1_display_queue_expire_num
+         iga1_display_queue_expire_num_reg;
+        struct iga2_display_queue_expire_num
+         iga2_display_queue_expire_num_reg;
+};
+
+struct iga1_crtc_timing {
+        struct iga1_hor_total hor_total;
+        struct iga1_hor_addr hor_addr;
+        struct iga1_hor_blank_start hor_blank_start;
+        struct iga1_hor_blank_end hor_blank_end;
+        struct iga1_hor_sync_start hor_sync_start;
+        struct iga1_hor_sync_end hor_sync_end;
+        struct iga1_ver_total ver_total;
+        struct iga1_ver_addr ver_addr;
+        struct iga1_ver_blank_start ver_blank_start;
+        struct iga1_ver_blank_end ver_blank_end;
+        struct iga1_ver_sync_start ver_sync_start;
+        struct iga1_ver_sync_end ver_sync_end;
+};
+
+struct iga2_shadow_crtc_timing {
+        struct iga2_shadow_hor_total hor_total_shadow;
+        struct iga2_shadow_hor_blank_end hor_blank_end_shadow;
+        struct iga2_shadow_ver_total ver_total_shadow;
+        struct iga2_shadow_ver_addr ver_addr_shadow;
+        struct iga2_shadow_ver_blank_start ver_blank_start_shadow;
+        struct iga2_shadow_ver_blank_end ver_blank_end_shadow;
+        struct iga2_shadow_ver_sync_start ver_sync_start_shadow;
+        struct iga2_shadow_ver_sync_end ver_sync_end_shadow;
+};
+
+struct iga2_crtc_timing {
+        struct iga2_hor_total hor_total;
+        struct iga2_hor_addr hor_addr;
+        struct iga2_hor_blank_start hor_blank_start;
+        struct iga2_hor_blank_end hor_blank_end;
+        struct iga2_hor_sync_start hor_sync_start;
+        struct iga2_hor_sync_end hor_sync_end;
+        struct iga2_ver_total ver_total;
+        struct iga2_ver_addr ver_addr;
+        struct iga2_ver_blank_start ver_blank_start;
+        struct iga2_ver_blank_end ver_blank_end;
+        struct iga2_ver_sync_start ver_sync_start;
+        struct iga2_ver_sync_end ver_sync_end;
+};
+
+/* device ID */
+#define CLE266              0x3123
+#define KM400               0x3205
+#define CN400_FUNCTION2     0x2259
+#define CN400_FUNCTION3     0x3259
+/* support VT3314 chipset */
+#define CN700_FUNCTION2     0x2314
+#define CN700_FUNCTION3     0x3208
+/* VT3324 chipset */
+#define CX700_FUNCTION2     0x2324
+#define CX700_FUNCTION3     0x3324
+/* VT3204 chipset*/
+#define KM800_FUNCTION3      0x3204
+/* VT3336 chipset*/
+#define KM890_FUNCTION3      0x3336
+/* VT3327 chipset*/
+#define P4M890_FUNCTION3     0x3327
+/* VT3293 chipset*/
+#define CN750_FUNCTION3     0x3208
+/* VT3364 chipset*/
+#define P4M900_FUNCTION3    0x3364
+/* VT3353 chipset*/
+#define VX800_FUNCTION3     0x3353
+
+#define NUM_TOTAL_PLL_TABLE ARRAY_SIZE(pll_value)
+
+struct IODATA {
+        u8 Index;
+        u8 Mask;
+        u8 Data;
+};
+
+struct pci_device_id_info {
+        u32 vendor;
+        u32 device;
+        u32 chip_index;
+};
+
+extern unsigned int viafb_second_virtual_xres;
+extern unsigned int viafb_second_offset;
+extern int viafb_second_size;
+extern int viafb_SAMM_ON;
+extern int viafb_dual_fb;
+extern int viafb_LCD2_ON;
+extern int viafb_LCD_ON;
+extern int viafb_DVI_ON;
+extern int viafb_accel;
+extern int viafb_hotplug;
+
+void viafb_write_reg_mask(u8 index, int io_port, u8 data, u8 mask);
+void viafb_set_output_path(int device, int set_iga,
+        int output_interface);
+void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
+                      int mode_index, int bpp_byte, int set_iga);
+
+void viafb_set_vclock(u32 CLK, int set_iga);
+void viafb_load_reg(int timing_value, int viafb_load_reg_num,
+        struct io_register *reg,
+              int io_type);
+void viafb_crt_disable(void);
+void viafb_crt_enable(void);
+void init_ad9389(void);
+/* Access I/O Function */
+void viafb_write_reg(u8 index, u16 io_port, u8 data);
+u8 viafb_read_reg(int io_port, u8 index);
+void viafb_lock_crt(void);
+void viafb_unlock_crt(void);
+void viafb_load_offset_reg(int h_addr, int bpp_byte, int set_iga);
+void viafb_load_fetch_count_reg(int h_addr, int bpp_byte, int set_iga);
+void viafb_write_regx(struct io_reg RegTable[], int ItemNum);
+struct VideoModeTable *viafb_get_modetbl_pointer(int Index);
+u32 viafb_get_clk_value(int clk);
+void viafb_load_FIFO_reg(int set_iga, int hor_active, int ver_active);
+void viafb_set_color_depth(int bpp_byte, int set_iga);
+void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\
+                                        *p_gfx_dpa_setting);
+
+int viafb_setmode(int vmode_index, int hor_res, int ver_res,
+            int video_bpp, int vmode_index1, int hor_res1,
+            int ver_res1, int video_bpp1);
+void viafb_init_chip_info(void);
+void viafb_init_dac(int set_iga);
+int viafb_get_pixclock(int hres, int vres, int vmode_refresh);
+int viafb_get_refresh(int hres, int vres, u32 float_refresh);
+void viafb_update_device_setting(int hres, int vres, int bpp,
+                           int vmode_refresh, int flag);
+void viafb_get_mmio_info(unsigned long *mmio_base,
+        unsigned long *mmio_len);
+
+void viafb_set_iga_path(void);
+void viafb_set_start_addr(void);
+void viafb_get_fb_info(unsigned int *fb_base, unsigned int *fb_len);
+
+#endif /* __HW_H__ */
diff --git a/drivers/video/via/iface.c b/drivers/video/via/iface.c
new file mode 100644
index 000000000000..1570636c8d51
--- /dev/null
+++ b/drivers/video/via/iface.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include "global.h"
+
+/* Get frame buffer size from VGA BIOS */
+
+unsigned int viafb_get_memsize(void)
+{
+        unsigned int m;
+
+        /* If memory size provided by user */
+        if (viafb_memsize)
+                m = viafb_memsize * Mb;
+        else {
+                m = (unsigned int)viafb_read_reg(VIASR, SR39);
+                m = m * (4 * Mb);
+
+                if ((m < (16 * Mb)) || (m > (64 * Mb)))
+                        m = 16 * Mb;
+        }
+        DEBUG_MSG(KERN_INFO "framebuffer size = %d Mb\n", m / Mb);
+        return m;
+}
+
+/* Get Video Buffer Starting Physical Address(back door)*/
+
+unsigned long viafb_get_videobuf_addr(void)
+{
+        struct pci_dev *pdev = NULL;
+        unsigned char sys_mem;
+        unsigned char video_mem;
+        unsigned long sys_mem_size;
+        unsigned long video_mem_size;
+        /*system memory = 256 MB, video memory 64 MB */
+        unsigned long vmem_starting_adr = 0x0C000000;
+
+        pdev =
+            (struct pci_dev *)pci_get_device(VIA_K800_BRIDGE_VID,
+                                             VIA_K800_BRIDGE_DID, NULL);
+        if (pdev != NULL) {
+                pci_read_config_byte(pdev, VIA_K800_SYSTEM_MEMORY_REG,
+                                     &sys_mem);
+                pci_read_config_byte(pdev, VIA_K800_VIDEO_MEMORY_REG,
+                                     &video_mem);
+                video_mem = (video_mem & 0x70) >> 4;
+                sys_mem_size = ((unsigned long)sys_mem) << 24;
+                if (video_mem != 0)
+                        video_mem_size = (1 << (video_mem)) * 1024 * 1024;
+                else
+                        video_mem_size = 0;
+
+                vmem_starting_adr = sys_mem_size - video_mem_size;
+                pci_dev_put(pdev);
+        }
+
+        DEBUG_MSG(KERN_INFO "Video Memory Starting Address = %lx \n",
+                  vmem_starting_adr);
+        return vmem_starting_adr;
+}
diff --git a/drivers/video/via/iface.h b/drivers/video/via/iface.h
new file mode 100644
index 000000000000..790ec3e3aea2
--- /dev/null
+++ b/drivers/video/via/iface.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef __IFACE_H__
+#define __IFACE_H__
+
+#define Kb  (1024)
+#define Mb  (Kb*Kb)
+
+#define VIA_K800_BRIDGE_VID         0x1106
+#define VIA_K800_BRIDGE_DID         0x3204
+
+#define VIA_K800_SYSTEM_MEMORY_REG  0x47
+#define VIA_K800_VIDEO_MEMORY_REG   0xA1
+
+extern int viafb_memsize;
+unsigned int viafb_get_memsize(void);
+unsigned long viafb_get_videobuf_addr(void);
+
+#endif /* __IFACE_H__ */
diff --git a/drivers/video/via/ioctl.c b/drivers/video/via/ioctl.c
new file mode 100644
index 000000000000..da03c074e32a
--- /dev/null
+++ b/drivers/video/via/ioctl.c
@@ -0,0 +1,112 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include "global.h"
+
+int viafb_ioctl_get_viafb_info(u_long arg)
+{
+        struct viafb_ioctl_info viainfo;
+
+        viainfo.viafb_id = VIAID;
+        viainfo.vendor_id = PCI_VIA_VENDOR_ID;
+
+        switch (viaparinfo->chip_info->gfx_chip_name) {
+        case UNICHROME_CLE266:
+                viainfo.device_id = UNICHROME_CLE266_DID;
+                break;
+
+        case UNICHROME_K400:
+                viainfo.device_id = UNICHROME_K400_DID;
+                break;
+
+        case UNICHROME_K800:
+                viainfo.device_id = UNICHROME_K800_DID;
+                break;
+
+        case UNICHROME_PM800:
+                viainfo.device_id = UNICHROME_PM800_DID;
+                break;
+
+        case UNICHROME_CN700:
+                viainfo.device_id = UNICHROME_CN700_DID;
+                break;
+
+        case UNICHROME_CX700:
+                viainfo.device_id = UNICHROME_CX700_DID;
+                break;
+
+        case UNICHROME_K8M890:
+                viainfo.device_id = UNICHROME_K8M890_DID;
+                break;
+
+        case UNICHROME_P4M890:
+                viainfo.device_id = UNICHROME_P4M890_DID;
+                break;
+
+        case UNICHROME_P4M900:
+                viainfo.device_id = UNICHROME_P4M900_DID;
+                break;
+        }
+
+        viainfo.version = VERSION_MAJOR;
+        viainfo.revision = VERSION_MINOR;
+
+        if (copy_to_user((void __user *)arg, &viainfo, sizeof(viainfo)))
+                return -EFAULT;
+
+        return 0;
+}
+
+/* Hot-Plug Priority: DVI > CRT*/
+int viafb_ioctl_hotplug(int hres, int vres, int bpp)
+{
+        int DVIsense, status = 0;
+        DEBUG_MSG(KERN_INFO "viafb_ioctl_hotplug!!\n");
+
+        if (viaparinfo->chip_info->tmds_chip_info.tmds_chip_name !=
+                NON_TMDS_TRANSMITTER) {
+                DVIsense = viafb_dvi_sense();
+
+                if (DVIsense) {
+                        DEBUG_MSG(KERN_INFO "DVI Attached...\n");
+                        if (viafb_DeviceStatus != DVI_Device) {
+                                viafb_DVI_ON = 1;
+                                viafb_CRT_ON = 0;
+                                viafb_LCD_ON = 0;
+                                viafb_DeviceStatus = DVI_Device;
+                                return viafb_DeviceStatus;
+                        }
+                        status = 1;
+                } else
+                        DEBUG_MSG(KERN_INFO "DVI De-attached...\n");
+        }
+
+        if ((viafb_DeviceStatus != CRT_Device) && (status == 0)) {
+                viafb_CRT_ON = 1;
+                viafb_DVI_ON = 0;
+                viafb_LCD_ON = 0;
+
+                viafb_DeviceStatus = CRT_Device;
+                return viafb_DeviceStatus;
+        }
+
+        return 0;
+}
diff --git a/drivers/video/via/ioctl.h b/drivers/video/via/ioctl.h
new file mode 100644
index 000000000000..842fe30b9868
--- /dev/null
+++ b/drivers/video/via/ioctl.h
@@ -0,0 +1,210 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef __IOCTL_H__
+#define __IOCTL_H__
+
+#ifndef __user
+#define __user
+#endif
+
+/* VIAFB IOCTL definition */
+#define VIAFB_GET_INFO_SIZE             0x56494101      /* 'VIA\01' */
+#define VIAFB_GET_INFO                  0x56494102      /* 'VIA\02' */
+#define VIAFB_HOTPLUG                   0x56494103      /* 'VIA\03' */
+#define VIAFB_SET_HOTPLUG_FLAG          0x56494104      /* 'VIA\04' */
+#define VIAFB_GET_RESOLUTION            0x56494105      /* 'VIA\05' */
+#define VIAFB_GET_SAMM_INFO             0x56494107      /* 'VIA\07' */
+#define VIAFB_TURN_ON_OUTPUT_DEVICE     0x56494108      /* 'VIA\08' */
+#define VIAFB_TURN_OFF_OUTPUT_DEVICE    0x56494109      /* 'VIA\09' */
+#define VIAFB_SET_DEVICE                0x5649410A
+#define VIAFB_GET_DEVICE                0x5649410B
+#define VIAFB_GET_DRIVER_VERSION        0x56494112      /* 'VIA\12' */
+#define VIAFB_GET_CHIP_INFO             0x56494113      /* 'VIA\13' */
+#define VIAFB_SET_DEVICE_INFO           0x56494114
+#define VIAFB_GET_DEVICE_INFO           0x56494115
+
+#define VIAFB_GET_DEVICE_SUPPORT        0x56494118
+#define VIAFB_GET_DEVICE_CONNECT        0x56494119
+#define VIAFB_GET_PANEL_SUPPORT_EXPAND  0x5649411A
+#define VIAFB_GET_DRIVER_NAME           0x56494122
+#define VIAFB_GET_DEVICE_SUPPORT_STATE  0x56494123
+#define VIAFB_GET_GAMMA_LUT             0x56494124
+#define VIAFB_SET_GAMMA_LUT             0x56494125
+#define VIAFB_GET_GAMMA_SUPPORT_STATE   0x56494126
+#define VIAFB_SET_VIDEO_DEVICE          0x56494127
+#define VIAFB_GET_VIDEO_DEVICE          0x56494128
+#define VIAFB_SET_SECOND_MODE           0x56494129
+#define VIAFB_SYNC_SURFACE              0x56494130
+#define VIAFB_GET_DRIVER_CAPS           0x56494131
+#define VIAFB_GET_IGA_SCALING_INFO      0x56494132
+#define VIAFB_GET_PANEL_MAX_SIZE        0x56494133
+#define VIAFB_GET_PANEL_MAX_POSITION    0x56494134
+#define VIAFB_SET_PANEL_SIZE            0x56494135
+#define VIAFB_SET_PANEL_POSITION        0x56494136
+#define VIAFB_GET_PANEL_POSITION        0x56494137
+#define VIAFB_GET_PANEL_SIZE            0x56494138
+
+#define None_Device 0x00
+#define CRT_Device  0x01
+#define LCD_Device  0x02
+#define DVI_Device  0x08
+#define CRT2_Device 0x10
+#define LCD2_Device 0x40
+
+#define OP_LCD_CENTERING   0x01
+#define OP_LCD_PANEL_ID    0x02
+#define OP_LCD_MODE        0x03
+
+/*SAMM operation flag*/
+#define OP_SAMM            0x80
+
+#define LCD_PANEL_ID_MAXIMUM    22
+
+#define STATE_ON            0x1
+#define STATE_OFF           0x0
+#define STATE_DEFAULT       0xFFFF
+
+#define MAX_ACTIVE_DEV_NUM  2
+
+struct device_t {
+        unsigned short crt:1;
+        unsigned short dvi:1;
+        unsigned short lcd:1;
+        unsigned short samm:1;
+        unsigned short lcd_dsp_cent:1;
+        unsigned char lcd_mode:1;
+        unsigned short epia_dvi:1;
+        unsigned short lcd_dual_edge:1;
+        unsigned short lcd2:1;
+
+        unsigned short primary_dev;
+        unsigned char lcd_panel_id;
+        unsigned short xres, yres;
+        unsigned short xres1, yres1;
+        unsigned short refresh;
+        unsigned short bpp;
+        unsigned short refresh1;
+        unsigned short bpp1;
+        unsigned short sequence;
+        unsigned short bus_width;
+};
+
+struct viafb_ioctl_info {
+        u32 viafb_id;           /* for identifying viafb */
+#define VIAID       0x56494146  /* Identify myself with 'VIAF' */
+        u16 vendor_id;
+        u16 device_id;
+        u8 version;
+        u8 revision;
+        u8 reserved[246];       /* for future use */
+};
+
+struct viafb_ioctl_mode {
+        u32 xres;
+        u32 yres;
+        u32 refresh;
+        u32 bpp;
+        u32 xres_sec;
+        u32 yres_sec;
+        u32 virtual_xres_sec;
+        u32 virtual_yres_sec;
+        u32 refresh_sec;
+        u32 bpp_sec;
+};
+struct viafb_ioctl_samm {
+        u32 samm_status;
+        u32 size_prim;
+        u32 size_sec;
+        u32 mem_base;
+        u32 offset_sec;
+};
+
+struct viafb_driver_version {
+        int iMajorNum;
+        int iKernelNum;
+        int iOSNum;
+        int iMinorNum;
+};
+
+struct viafb_ioctl_lcd_attribute {
+        unsigned int panel_id;
+        unsigned int display_center;
+        unsigned int lcd_mode;
+};
+
+struct viafb_ioctl_setting {
+        /* Enable or disable active devices */
+        unsigned short device_flag;
+        /* Indicate which device should be turn on or turn off. */
+        unsigned short device_status;
+        unsigned int reserved;
+        /* Indicate which LCD's attribute can be changed. */
+        unsigned short lcd_operation_flag;
+        /* 1: SAMM ON  0: SAMM OFF */
+        unsigned short samm_status;
+        /* horizontal resolution of first device */
+        unsigned short first_dev_hor_res;
+        /* vertical resolution of first device */
+        unsigned short first_dev_ver_res;
+        /* horizontal resolution of second device */
+        unsigned short second_dev_hor_res;
+        /* vertical resolution of second device */
+        unsigned short second_dev_ver_res;
+        /* refresh rate of first device */
+        unsigned short first_dev_refresh;
+        /* bpp of first device */
+        unsigned short first_dev_bpp;
+        /* refresh rate of second device */
+        unsigned short second_dev_refresh;
+        /* bpp of second device */
+        unsigned short second_dev_bpp;
+        /* Indicate which device are primary display device. */
+        unsigned int primary_device;
+        /* Indicate which device will show video. only valid in duoview mode */
+        unsigned int video_device_status;
+        unsigned int struct_reserved[34];
+        struct viafb_ioctl_lcd_attribute lcd_attributes;
+};
+
+struct _UTFunctionCaps {
+        unsigned int dw3DScalingState;
+        unsigned int reserved[31];
+};
+
+struct _POSITIONVALUE {
+        unsigned int dwX;
+        unsigned int dwY;
+};
+
+struct _panel_size_pos_info {
+        unsigned int device_type;
+        int x;
+        int y;
+};
+
+extern int viafb_LCD_ON;
+extern int viafb_DVI_ON;
+
+int viafb_ioctl_get_viafb_info(u_long arg);
+int viafb_ioctl_hotplug(int hres, int vres, int bpp);
+
+#endif /* __IOCTL_H__ */
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
new file mode 100644
index 000000000000..6c7290a6a447
--- /dev/null
+++ b/drivers/video/via/lcd.c
@@ -0,0 +1,1821 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include "global.h"
+#include "lcdtbl.h"
+
+static struct iga2_shadow_crtc_timing iga2_shadow_crtc_reg = {
+        /* IGA2 Shadow Horizontal Total */
+        {IGA2_SHADOW_HOR_TOTAL_REG_NUM, {{CR6D, 0, 7}, {CR71, 3, 3} } },
+        /* IGA2 Shadow Horizontal Blank End */
+        {IGA2_SHADOW_HOR_BLANK_END_REG_NUM, {{CR6E, 0, 7} } },
+        /* IGA2 Shadow Vertical Total */
+        {IGA2_SHADOW_VER_TOTAL_REG_NUM, {{CR6F, 0, 7}, {CR71, 0, 2} } },
+        /* IGA2 Shadow Vertical Addressable Video */
+        {IGA2_SHADOW_VER_ADDR_REG_NUM, {{CR70, 0, 7}, {CR71, 4, 6} } },
+        /* IGA2 Shadow Vertical Blank Start */
+        {IGA2_SHADOW_VER_BLANK_START_REG_NUM,
+         {{CR72, 0, 7}, {CR74, 4, 6} } },
+        /* IGA2 Shadow Vertical Blank End */
+        {IGA2_SHADOW_VER_BLANK_END_REG_NUM, {{CR73, 0, 7}, {CR74, 0, 2} } },
+        /* IGA2 Shadow Vertical Sync Start */
+        {IGA2_SHADOW_VER_SYNC_START_REG_NUM, {{CR75, 0, 7}, {CR76, 4, 6} } },
+        /* IGA2 Shadow Vertical Sync End */
+        {IGA2_SHADOW_VER_SYNC_END_REG_NUM, {{CR76, 0, 3} } }
+};
+
+static struct _lcd_scaling_factor lcd_scaling_factor = {
+        /* LCD Horizontal Scaling Factor Register */
+        {LCD_HOR_SCALING_FACTOR_REG_NUM,
+         {{CR9F, 0, 1}, {CR77, 0, 7}, {CR79, 4, 5} } },
+        /* LCD Vertical Scaling Factor Register */
+        {LCD_VER_SCALING_FACTOR_REG_NUM,
+         {{CR79, 3, 3}, {CR78, 0, 7}, {CR79, 6, 7} } }
+};
+static struct _lcd_scaling_factor lcd_scaling_factor_CLE = {
+        /* LCD Horizontal Scaling Factor Register */
+        {LCD_HOR_SCALING_FACTOR_REG_NUM_CLE, {{CR77, 0, 7}, {CR79, 4, 5} } },
+        /* LCD Vertical Scaling Factor Register */
+        {LCD_VER_SCALING_FACTOR_REG_NUM_CLE, {{CR78, 0, 7}, {CR79, 6, 7} } }
+};
+
+static int check_lvds_chip(int device_id_subaddr, int device_id);
+static bool lvds_identify_integratedlvds(void);
+static int fp_id_to_vindex(int panel_id);
+static int lvds_register_read(int index);
+static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres,
+                      int panel_vres);
+static void load_lcd_k400_patch_tbl(int set_hres, int set_vres,
+        int panel_id);
+static void load_lcd_p880_patch_tbl(int set_hres, int set_vres,
+        int panel_id);
+static void load_lcd_patch_regs(int set_hres, int set_vres,
+        int panel_id, int set_iga);
+static void via_pitch_alignment_patch_lcd(
+        struct lvds_setting_information *plvds_setting_info,
+                                   struct lvds_chip_information
+                                   *plvds_chip_info);
+static void lcd_patch_skew_dvp0(struct lvds_setting_information
+                         *plvds_setting_info,
+                         struct lvds_chip_information *plvds_chip_info);
+static void lcd_patch_skew_dvp1(struct lvds_setting_information
+                         *plvds_setting_info,
+                         struct lvds_chip_information *plvds_chip_info);
+static void lcd_patch_skew(struct lvds_setting_information
+        *plvds_setting_info, struct lvds_chip_information *plvds_chip_info);
+
+static void integrated_lvds_disable(struct lvds_setting_information
+                             *plvds_setting_info,
+                             struct lvds_chip_information *plvds_chip_info);
+static void integrated_lvds_enable(struct lvds_setting_information
+                            *plvds_setting_info,
+                            struct lvds_chip_information *plvds_chip_info);
+static void lcd_powersequence_off(void);
+static void lcd_powersequence_on(void);
+static void fill_lcd_format(void);
+static void check_diport_of_integrated_lvds(
+        struct lvds_chip_information *plvds_chip_info,
+                                     struct lvds_setting_information
+                                     *plvds_setting_info);
+static struct display_timing lcd_centering_timging(struct display_timing
+                                            mode_crt_reg,
+                                           struct display_timing panel_crt_reg);
+static void load_crtc_shadow_timing(struct display_timing mode_timing,
+                             struct display_timing panel_timing);
+static void viafb_load_scaling_factor_for_p4m900(int set_hres,
+        int set_vres, int panel_hres, int panel_vres);
+
+static int check_lvds_chip(int device_id_subaddr, int device_id)
+{
+        if (lvds_register_read(device_id_subaddr) == device_id)
+                return OK;
+        else
+                return FAIL;
+}
+
+void viafb_init_lcd_size(void)
+{
+        DEBUG_MSG(KERN_INFO "viafb_init_lcd_size()\n");
+        DEBUG_MSG(KERN_INFO
+                "viaparinfo->lvds_setting_info->get_lcd_size_method %d\n",
+                viaparinfo->lvds_setting_info->get_lcd_size_method);
+
+        switch (viaparinfo->lvds_setting_info->get_lcd_size_method) {
+        case GET_LCD_SIZE_BY_SYSTEM_BIOS:
+                break;
+        case GET_LCD_SZIE_BY_HW_STRAPPING:
+                break;
+        case GET_LCD_SIZE_BY_VGA_BIOS:
+                DEBUG_MSG(KERN_INFO "Get LCD Size method by VGA BIOS !!\n");
+                viaparinfo->lvds_setting_info->lcd_panel_size =
+                    fp_id_to_vindex(viafb_lcd_panel_id);
+                DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n",
+                          viaparinfo->lvds_setting_info->lcd_panel_id);
+                DEBUG_MSG(KERN_INFO "LCD Panel Size = %d\n",
+                          viaparinfo->lvds_setting_info->lcd_panel_size);
+                break;
+        case GET_LCD_SIZE_BY_USER_SETTING:
+                DEBUG_MSG(KERN_INFO "Get LCD Size method by user setting !!\n");
+                viaparinfo->lvds_setting_info->lcd_panel_size =
+                    fp_id_to_vindex(viafb_lcd_panel_id);
+                DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n",
+                          viaparinfo->lvds_setting_info->lcd_panel_id);
+                DEBUG_MSG(KERN_INFO "LCD Panel Size = %d\n",
+                          viaparinfo->lvds_setting_info->lcd_panel_size);
+                break;
+        default:
+                DEBUG_MSG(KERN_INFO "viafb_init_lcd_size fail\n");
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID1_800X600;
+                viaparinfo->lvds_setting_info->lcd_panel_size =
+                    fp_id_to_vindex(LCD_PANEL_ID1_800X600);
+        }
+        viaparinfo->lvds_setting_info2->lcd_panel_id =
+                viaparinfo->lvds_setting_info->lcd_panel_id;
+        viaparinfo->lvds_setting_info2->lcd_panel_size =
+                viaparinfo->lvds_setting_info->lcd_panel_size;
+        viaparinfo->lvds_setting_info2->lcd_panel_hres =
+                viaparinfo->lvds_setting_info->lcd_panel_hres;
+        viaparinfo->lvds_setting_info2->lcd_panel_vres =
+                viaparinfo->lvds_setting_info->lcd_panel_vres;
+        viaparinfo->lvds_setting_info2->device_lcd_dualedge =
+            viaparinfo->lvds_setting_info->device_lcd_dualedge;
+        viaparinfo->lvds_setting_info2->LCDDithering =
+                viaparinfo->lvds_setting_info->LCDDithering;
+}
+
+static bool lvds_identify_integratedlvds(void)
+{
+        if (viafb_display_hardware_layout == HW_LAYOUT_LCD_EXTERNAL_LCD2) {
+                /* Two dual channel LCD (Internal LVDS + External LVDS): */
+                /* If we have an external LVDS, such as VT1636, we should
+                   have its chip ID already. */
+                if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
+                        viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name =
+                            INTEGRATED_LVDS;
+                        DEBUG_MSG(KERN_INFO "Support two dual channel LVDS!\
+                                  (Internal LVDS + External LVDS)\n");
+                } else {
+                        viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
+                            INTEGRATED_LVDS;
+                        DEBUG_MSG(KERN_INFO "Not found external LVDS,\
+                                  so can't support two dual channel LVDS!\n");
+                }
+        } else if (viafb_display_hardware_layout == HW_LAYOUT_LCD1_LCD2) {
+                /* Two single channel LCD (Internal LVDS + Internal LVDS): */
+                viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
+                INTEGRATED_LVDS;
+                viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name =
+                        INTEGRATED_LVDS;
+                DEBUG_MSG(KERN_INFO "Support two single channel LVDS!\
+                          (Internal LVDS + Internal LVDS)\n");
+        } else if (viafb_display_hardware_layout != HW_LAYOUT_DVI_ONLY) {
+                /* If we have found external LVDS, just use it,
+                   otherwise, we will use internal LVDS as default. */
+                if (!viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
+                        viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
+                            INTEGRATED_LVDS;
+                        DEBUG_MSG(KERN_INFO "Found Integrated LVDS!\n");
+                }
+        } else {
+                viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
+                        NON_LVDS_TRANSMITTER;
+                DEBUG_MSG(KERN_INFO "Do not support LVDS!\n");
+                return false;
+        }
+
+        return true;
+}
+
+int viafb_lvds_trasmitter_identify(void)
+{
+        viaparinfo->i2c_stuff.i2c_port = I2CPORTINDEX;
+        if (viafb_lvds_identify_vt1636()) {
+                viaparinfo->chip_info->lvds_chip_info.i2c_port = I2CPORTINDEX;
+                DEBUG_MSG(KERN_INFO
+                          "Found VIA VT1636 LVDS on port i2c 0x31 \n");
+        } else {
+                viaparinfo->i2c_stuff.i2c_port = GPIOPORTINDEX;
+                if (viafb_lvds_identify_vt1636()) {
+                        viaparinfo->chip_info->lvds_chip_info.i2c_port =
+                                GPIOPORTINDEX;
+                        DEBUG_MSG(KERN_INFO
+                                  "Found VIA VT1636 LVDS on port gpio 0x2c \n");
+                }
+        }
+
+        if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700)
+                lvds_identify_integratedlvds();
+
+        if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name)
+                return true;
+        /* Check for VT1631: */
+        viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = VT1631_LVDS;
+        viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
+                VT1631_LVDS_I2C_ADDR;
+
+        if (check_lvds_chip(VT1631_DEVICE_ID_REG, VT1631_DEVICE_ID) != FAIL) {
+                DEBUG_MSG(KERN_INFO "\n VT1631 LVDS ! \n");
+                DEBUG_MSG(KERN_INFO "\n %2d",
+                          viaparinfo->chip_info->lvds_chip_info.lvds_chip_name);
+                DEBUG_MSG(KERN_INFO "\n %2d",
+                          viaparinfo->chip_info->lvds_chip_info.lvds_chip_name);
+                return OK;
+        }
+
+        viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
+                NON_LVDS_TRANSMITTER;
+        viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
+                VT1631_LVDS_I2C_ADDR;
+        return FAIL;
+}
+
+static int fp_id_to_vindex(int panel_id)
+{
+        DEBUG_MSG(KERN_INFO "fp_get_panel_id()\n");
+
+        if (panel_id > LCD_PANEL_ID_MAXIMUM)
+                viafb_lcd_panel_id = panel_id =
+                viafb_read_reg(VIACR, CR3F) & 0x0F;
+
+        switch (panel_id) {
+        case 0x0:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 640;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 480;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID0_640X480;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_640X480;
+                break;
+        case 0x1:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID1_800X600;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_800X600;
+                break;
+        case 0x2:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID2_1024X768;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_1024X768;
+                break;
+        case 0x3:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID3_1280X768;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_1280X768;
+                break;
+        case 0x4:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 1024;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID4_1280X1024;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_1280X1024;
+                break;
+        case 0x5:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1400;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 1050;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID5_1400X1050;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_1400X1050;
+                break;
+        case 0x6:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1600;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 1200;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID6_1600X1200;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_1600X1200;
+                break;
+        case 0x8:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 480;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_IDA_800X480;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_800X480;
+                break;
+        case 0x9:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID2_1024X768;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_1024X768;
+                break;
+        case 0xA:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID2_1024X768;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 0;
+                return VIA_RES_1024X768;
+                break;
+        case 0xB:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID2_1024X768;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
+                viaparinfo->lvds_setting_info->LCDDithering = 0;
+                return VIA_RES_1024X768;
+                break;
+        case 0xC:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID3_1280X768;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 0;
+                return VIA_RES_1280X768;
+                break;
+        case 0xD:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 1024;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID4_1280X1024;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
+                viaparinfo->lvds_setting_info->LCDDithering = 0;
+                return VIA_RES_1280X1024;
+                break;
+        case 0xE:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1400;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 1050;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID5_1400X1050;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
+                viaparinfo->lvds_setting_info->LCDDithering = 0;
+                return VIA_RES_1400X1050;
+                break;
+        case 0xF:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1600;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 1200;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID6_1600X1200;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
+                viaparinfo->lvds_setting_info->LCDDithering = 0;
+                return VIA_RES_1600X1200;
+                break;
+        case 0x10:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1366;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID7_1366X768;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 0;
+                return VIA_RES_1368X768;
+                break;
+        case 0x11:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID8_1024X600;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_1024X600;
+                break;
+        case 0x12:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID3_1280X768;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_1280X768;
+                break;
+        case 0x13:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 800;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID9_1280X800;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_1280X800;
+                break;
+        case 0x14:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1360;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_IDB_1360X768;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 0;
+                return VIA_RES_1360X768;
+                break;
+        case 0x15:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID3_1280X768;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
+                viaparinfo->lvds_setting_info->LCDDithering = 0;
+                return VIA_RES_1280X768;
+                break;
+        case 0x16:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 480;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 640;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_IDC_480X640;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_480X640;
+                break;
+        default:
+                viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
+                viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
+                viaparinfo->lvds_setting_info->lcd_panel_id =
+                        LCD_PANEL_ID1_800X600;
+                viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
+                viaparinfo->lvds_setting_info->LCDDithering = 1;
+                return VIA_RES_800X600;
+        }
+}
+
+static int lvds_register_read(int index)
+{
+        u8 data;
+
+        viaparinfo->i2c_stuff.i2c_port = GPIOPORTINDEX;
+        viafb_i2c_readbyte((u8) viaparinfo->chip_info->
+            lvds_chip_info.lvds_chip_slave_addr,
+                        (u8) index, &data);
+        return data;
+}
+
+static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres,
+                      int panel_vres)
+{
+        int reg_value = 0;
+        int viafb_load_reg_num;
+        struct io_register *reg = NULL;
+
+        DEBUG_MSG(KERN_INFO "load_lcd_scaling()!!\n");
+
+        /* LCD Scaling Enable */
+        viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2);
+        if (UNICHROME_P4M900 == viaparinfo->chip_info->gfx_chip_name) {
+                viafb_load_scaling_factor_for_p4m900(set_hres, set_vres,
+                                               panel_hres, panel_vres);
+                return;
+        }
+
+        /* Check if expansion for horizontal */
+        if (set_hres != panel_hres) {
+                /* Load Horizontal Scaling Factor */
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_CLE266:
+                case UNICHROME_K400:
+                        reg_value =
+                            CLE266_LCD_HOR_SCF_FORMULA(set_hres, panel_hres);
+                        viafb_load_reg_num =
+                            lcd_scaling_factor_CLE.lcd_hor_scaling_factor.
+                            reg_num;
+                        reg = lcd_scaling_factor_CLE.lcd_hor_scaling_factor.reg;
+                        viafb_load_reg(reg_value,
+                                viafb_load_reg_num, reg, VIACR);
+                        break;
+                case UNICHROME_K800:
+                case UNICHROME_PM800:
+                case UNICHROME_CN700:
+                case UNICHROME_CX700:
+                case UNICHROME_K8M890:
+                case UNICHROME_P4M890:
+                        reg_value =
+                            K800_LCD_HOR_SCF_FORMULA(set_hres, panel_hres);
+                        /* Horizontal scaling enabled */
+                        viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6);
+                        viafb_load_reg_num =
+                            lcd_scaling_factor.lcd_hor_scaling_factor.reg_num;
+                        reg = lcd_scaling_factor.lcd_hor_scaling_factor.reg;
+                        viafb_load_reg(reg_value,
+                                viafb_load_reg_num, reg, VIACR);
+                        break;
+                }
+
+                DEBUG_MSG(KERN_INFO "Horizontal Scaling value = %d", reg_value);
+        } else {
+                /* Horizontal scaling disabled */
+                viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7);
+        }
+
+        /* Check if expansion for vertical */
+        if (set_vres != panel_vres) {
+                /* Load Vertical Scaling Factor */
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_CLE266:
+                case UNICHROME_K400:
+                        reg_value =
+                            CLE266_LCD_VER_SCF_FORMULA(set_vres, panel_vres);
+                        viafb_load_reg_num =
+                            lcd_scaling_factor_CLE.lcd_ver_scaling_factor.
+                            reg_num;
+                        reg = lcd_scaling_factor_CLE.lcd_ver_scaling_factor.reg;
+                        viafb_load_reg(reg_value,
+                                viafb_load_reg_num, reg, VIACR);
+                        break;
+                case UNICHROME_K800:
+                case UNICHROME_PM800:
+                case UNICHROME_CN700:
+                case UNICHROME_CX700:
+                case UNICHROME_K8M890:
+                case UNICHROME_P4M890:
+                        reg_value =
+                            K800_LCD_VER_SCF_FORMULA(set_vres, panel_vres);
+                        /* Vertical scaling enabled */
+                        viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3);
+                        viafb_load_reg_num =
+                            lcd_scaling_factor.lcd_ver_scaling_factor.reg_num;
+                        reg = lcd_scaling_factor.lcd_ver_scaling_factor.reg;
+                        viafb_load_reg(reg_value,
+                                viafb_load_reg_num, reg, VIACR);
+                        break;
+                }
+
+                DEBUG_MSG(KERN_INFO "Vertical Scaling value = %d", reg_value);
+        } else {
+                /* Vertical scaling disabled */
+                viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3);
+        }
+}
+
+static void load_lcd_k400_patch_tbl(int set_hres, int set_vres,
+        int panel_id)
+{
+        int vmode_index;
+        int reg_num = 0;
+        struct io_reg *lcd_patch_reg = NULL;
+
+        if (viaparinfo->lvds_setting_info->iga_path == IGA2)
+                vmode_index = viafb_get_mode_index(set_hres, set_vres, 1);
+        else
+                vmode_index = viafb_get_mode_index(set_hres, set_vres, 0);
+        switch (panel_id) {
+                /* LCD 800x600 */
+        case LCD_PANEL_ID1_800X600:
+                switch (vmode_index) {
+                case VIA_RES_640X400:
+                case VIA_RES_640X480:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_6X4_8X6;
+                        lcd_patch_reg = K400_LCD_RES_6X4_8X6;
+                        break;
+                case VIA_RES_720X480:
+                case VIA_RES_720X576:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_7X4_8X6;
+                        lcd_patch_reg = K400_LCD_RES_7X4_8X6;
+                        break;
+                }
+                break;
+
+                /* LCD 1024x768 */
+        case LCD_PANEL_ID2_1024X768:
+                switch (vmode_index) {
+                case VIA_RES_640X400:
+                case VIA_RES_640X480:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_6X4_10X7;
+                        lcd_patch_reg = K400_LCD_RES_6X4_10X7;
+                        break;
+                case VIA_RES_720X480:
+                case VIA_RES_720X576:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_7X4_10X7;
+                        lcd_patch_reg = K400_LCD_RES_7X4_10X7;
+                        break;
+                case VIA_RES_800X600:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_8X6_10X7;
+                        lcd_patch_reg = K400_LCD_RES_8X6_10X7;
+                        break;
+                }
+                break;
+
+                /* LCD 1280x1024 */
+        case LCD_PANEL_ID4_1280X1024:
+                switch (vmode_index) {
+                case VIA_RES_640X400:
+                case VIA_RES_640X480:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_6X4_12X10;
+                        lcd_patch_reg = K400_LCD_RES_6X4_12X10;
+                        break;
+                case VIA_RES_720X480:
+                case VIA_RES_720X576:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_7X4_12X10;
+                        lcd_patch_reg = K400_LCD_RES_7X4_12X10;
+                        break;
+                case VIA_RES_800X600:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_8X6_12X10;
+                        lcd_patch_reg = K400_LCD_RES_8X6_12X10;
+                        break;
+                case VIA_RES_1024X768:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_10X7_12X10;
+                        lcd_patch_reg = K400_LCD_RES_10X7_12X10;
+                        break;
+
+                }
+                break;
+
+                /* LCD 1400x1050 */
+        case LCD_PANEL_ID5_1400X1050:
+                switch (vmode_index) {
+                case VIA_RES_640X480:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_6X4_14X10;
+                        lcd_patch_reg = K400_LCD_RES_6X4_14X10;
+                        break;
+                case VIA_RES_800X600:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_8X6_14X10;
+                        lcd_patch_reg = K400_LCD_RES_8X6_14X10;
+                        break;
+                case VIA_RES_1024X768:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_10X7_14X10;
+                        lcd_patch_reg = K400_LCD_RES_10X7_14X10;
+                        break;
+                case VIA_RES_1280X768:
+                case VIA_RES_1280X800:
+                case VIA_RES_1280X960:
+                case VIA_RES_1280X1024:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_12X10_14X10;
+                        lcd_patch_reg = K400_LCD_RES_12X10_14X10;
+                        break;
+                }
+                break;
+
+                /* LCD 1600x1200 */
+        case LCD_PANEL_ID6_1600X1200:
+                switch (vmode_index) {
+                case VIA_RES_640X400:
+                case VIA_RES_640X480:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_6X4_16X12;
+                        lcd_patch_reg = K400_LCD_RES_6X4_16X12;
+                        break;
+                case VIA_RES_720X480:
+                case VIA_RES_720X576:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_7X4_16X12;
+                        lcd_patch_reg = K400_LCD_RES_7X4_16X12;
+                        break;
+                case VIA_RES_800X600:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_8X6_16X12;
+                        lcd_patch_reg = K400_LCD_RES_8X6_16X12;
+                        break;
+                case VIA_RES_1024X768:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_10X7_16X12;
+                        lcd_patch_reg = K400_LCD_RES_10X7_16X12;
+                        break;
+                case VIA_RES_1280X768:
+                case VIA_RES_1280X800:
+                case VIA_RES_1280X960:
+                case VIA_RES_1280X1024:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_12X10_16X12;
+                        lcd_patch_reg = K400_LCD_RES_12X10_16X12;
+                        break;
+                }
+                break;
+
+                /* LCD 1366x768 */
+        case LCD_PANEL_ID7_1366X768:
+                switch (vmode_index) {
+                case VIA_RES_640X480:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_6X4_1366X7;
+                        lcd_patch_reg = K400_LCD_RES_6X4_1366X7;
+                        break;
+                case VIA_RES_720X480:
+                case VIA_RES_720X576:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_7X4_1366X7;
+                        lcd_patch_reg = K400_LCD_RES_7X4_1366X7;
+                        break;
+                case VIA_RES_800X600:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_8X6_1366X7;
+                        lcd_patch_reg = K400_LCD_RES_8X6_1366X7;
+                        break;
+                case VIA_RES_1024X768:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_10X7_1366X7;
+                        lcd_patch_reg = K400_LCD_RES_10X7_1366X7;
+                        break;
+                case VIA_RES_1280X768:
+                case VIA_RES_1280X800:
+                case VIA_RES_1280X960:
+                case VIA_RES_1280X1024:
+                        reg_num = NUM_TOTAL_K400_LCD_RES_12X10_1366X7;
+                        lcd_patch_reg = K400_LCD_RES_12X10_1366X7;
+                        break;
+                }
+                break;
+
+                /* LCD 1360x768 */
+        case LCD_PANEL_IDB_1360X768:
+                break;
+        }
+        if (reg_num != 0) {
+                /* H.W. Reset : ON */
+                viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
+
+                viafb_write_regx(lcd_patch_reg, reg_num);
+
+                /* H.W. Reset : OFF */
+                viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
+
+                /* Reset PLL */
+                viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1);
+                viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1);
+
+                /* Fire! */
+                outb(inb(VIARMisc) | (BIT2 + BIT3), VIAWMisc);
+        }
+}
+
+static void load_lcd_p880_patch_tbl(int set_hres, int set_vres,
+        int panel_id)
+{
+        int vmode_index;
+        int reg_num = 0;
+        struct io_reg *lcd_patch_reg = NULL;
+
+        if (viaparinfo->lvds_setting_info->iga_path == IGA2)
+                vmode_index = viafb_get_mode_index(set_hres, set_vres, 1);
+        else
+                vmode_index = viafb_get_mode_index(set_hres, set_vres, 0);
+
+        switch (panel_id) {
+        case LCD_PANEL_ID5_1400X1050:
+                switch (vmode_index) {
+                case VIA_RES_640X480:
+                        reg_num = NUM_TOTAL_P880_LCD_RES_6X4_14X10;
+                        lcd_patch_reg = P880_LCD_RES_6X4_14X10;
+                        break;
+                case VIA_RES_800X600:
+                        reg_num = NUM_TOTAL_P880_LCD_RES_8X6_14X10;
+                        lcd_patch_reg = P880_LCD_RES_8X6_14X10;
+                        break;
+                }
+                break;
+        case LCD_PANEL_ID6_1600X1200:
+                switch (vmode_index) {
+                case VIA_RES_640X400:
+                case VIA_RES_640X480:
+                        reg_num = NUM_TOTAL_P880_LCD_RES_6X4_16X12;
+                        lcd_patch_reg = P880_LCD_RES_6X4_16X12;
+                        break;
+                case VIA_RES_720X480:
+                case VIA_RES_720X576:
+                        reg_num = NUM_TOTAL_P880_LCD_RES_7X4_16X12;
+                        lcd_patch_reg = P880_LCD_RES_7X4_16X12;
+                        break;
+                case VIA_RES_800X600:
+                        reg_num = NUM_TOTAL_P880_LCD_RES_8X6_16X12;
+                        lcd_patch_reg = P880_LCD_RES_8X6_16X12;
+                        break;
+                case VIA_RES_1024X768:
+                        reg_num = NUM_TOTAL_P880_LCD_RES_10X7_16X12;
+                        lcd_patch_reg = P880_LCD_RES_10X7_16X12;
+                        break;
+                case VIA_RES_1280X768:
+                case VIA_RES_1280X960:
+                case VIA_RES_1280X1024:
+                        reg_num = NUM_TOTAL_P880_LCD_RES_12X10_16X12;
+                        lcd_patch_reg = P880_LCD_RES_12X10_16X12;
+                        break;
+                }
+                break;
+
+        }
+        if (reg_num != 0) {
+                /* H.W. Reset : ON */
+                viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
+
+                viafb_write_regx(lcd_patch_reg, reg_num);
+
+                /* H.W. Reset : OFF */
+                viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
+
+                /* Reset PLL */
+                viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1);
+                viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1);
+
+                /* Fire! */
+                outb(inb(VIARMisc) | (BIT2 + BIT3), VIAWMisc);
+        }
+}
+
+static void load_lcd_patch_regs(int set_hres, int set_vres,
+        int panel_id, int set_iga)
+{
+        int vmode_index;
+
+        if (viaparinfo->lvds_setting_info->iga_path == IGA2)
+                vmode_index = viafb_get_mode_index(set_hres, set_vres, 1);
+        else
+                vmode_index = viafb_get_mode_index(set_hres, set_vres, 0);
+
+        viafb_unlock_crt();
+
+        /* Patch for simultaneous & Expansion */
+        if ((set_iga == IGA1_IGA2) &&
+                (viaparinfo->lvds_setting_info->display_method ==
+            LCD_EXPANDSION)) {
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_CLE266:
+                case UNICHROME_K400:
+                        load_lcd_k400_patch_tbl(set_hres, set_vres, panel_id);
+                        break;
+                case UNICHROME_K800:
+                        break;
+                case UNICHROME_PM800:
+                case UNICHROME_CN700:
+                case UNICHROME_CX700:
+                        load_lcd_p880_patch_tbl(set_hres, set_vres, panel_id);
+                }
+        }
+
+        viafb_lock_crt();
+}
+
+static void via_pitch_alignment_patch_lcd(
+        struct lvds_setting_information *plvds_setting_info,
+                                   struct lvds_chip_information
+                                   *plvds_chip_info)
+{
+        unsigned char cr13, cr35, cr65, cr66, cr67;
+        unsigned long dwScreenPitch = 0;
+        unsigned long dwPitch;
+
+        dwPitch = plvds_setting_info->h_active * (plvds_setting_info->bpp >> 3);
+        if (dwPitch & 0x1F) {
+                dwScreenPitch = ((dwPitch + 31) & ~31) >> 3;
+                if (plvds_setting_info->iga_path == IGA2) {
+                        if (plvds_setting_info->bpp > 8) {
+                                cr66 = (unsigned char)(dwScreenPitch & 0xFF);
+                                viafb_write_reg(CR66, VIACR, cr66);
+                                cr67 = viafb_read_reg(VIACR, CR67) & 0xFC;
+                                cr67 |=
+                                    (unsigned
+                                     char)((dwScreenPitch & 0x300) >> 8);
+                                viafb_write_reg(CR67, VIACR, cr67);
+                        }
+
+                        /* Fetch Count */
+                        cr67 = viafb_read_reg(VIACR, CR67) & 0xF3;
+                        cr67 |= (unsigned char)((dwScreenPitch & 0x600) >> 7);
+                        viafb_write_reg(CR67, VIACR, cr67);
+                        cr65 = (unsigned char)((dwScreenPitch >> 1) & 0xFF);
+                        cr65 += 2;
+                        viafb_write_reg(CR65, VIACR, cr65);
+                } else {
+                        if (plvds_setting_info->bpp > 8) {
+                                cr13 = (unsigned char)(dwScreenPitch & 0xFF);
+                                viafb_write_reg(CR13, VIACR, cr13);
+                                cr35 = viafb_read_reg(VIACR, CR35) & 0x1F;
+                                cr35 |=
+                                    (unsigned
+                                     char)((dwScreenPitch & 0x700) >> 3);
+                                viafb_write_reg(CR35, VIACR, cr35);
+                        }
+                }
+        }
+}
+static void lcd_patch_skew_dvp0(struct lvds_setting_information
+                         *plvds_setting_info,
+                         struct lvds_chip_information *plvds_chip_info)
+{
+        if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) {
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_P4M900:
+                        viafb_vt1636_patch_skew_on_vt3364(plvds_setting_info,
+                                                    plvds_chip_info);
+                        break;
+                case UNICHROME_P4M890:
+                        viafb_vt1636_patch_skew_on_vt3327(plvds_setting_info,
+                                                    plvds_chip_info);
+                        break;
+                }
+        }
+}
+static void lcd_patch_skew_dvp1(struct lvds_setting_information
+                         *plvds_setting_info,
+                         struct lvds_chip_information *plvds_chip_info)
+{
+        if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) {
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_CX700:
+                        viafb_vt1636_patch_skew_on_vt3324(plvds_setting_info,
+                                                    plvds_chip_info);
+                        break;
+                }
+        }
+}
+static void lcd_patch_skew(struct lvds_setting_information
+        *plvds_setting_info, struct lvds_chip_information *plvds_chip_info)
+{
+        DEBUG_MSG(KERN_INFO "lcd_patch_skew\n");
+        switch (plvds_chip_info->output_interface) {
+        case INTERFACE_DVP0:
+                lcd_patch_skew_dvp0(plvds_setting_info, plvds_chip_info);
+                break;
+        case INTERFACE_DVP1:
+                lcd_patch_skew_dvp1(plvds_setting_info, plvds_chip_info);
+                break;
+        case INTERFACE_DFP_LOW:
+                if (UNICHROME_P4M900 == viaparinfo->chip_info->gfx_chip_name) {
+                        viafb_write_reg_mask(CR99, VIACR, 0x08,
+                                       BIT0 + BIT1 + BIT2 + BIT3);
+                }
+                break;
+        }
+}
+
+/* LCD Set Mode */
+void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
+                  struct lvds_setting_information *plvds_setting_info,
+                  struct lvds_chip_information *plvds_chip_info)
+{
+        int video_index = plvds_setting_info->lcd_panel_size;
+        int set_iga = plvds_setting_info->iga_path;
+        int mode_bpp = plvds_setting_info->bpp;
+        int viafb_load_reg_num = 0;
+        int reg_value = 0;
+        int set_hres, set_vres;
+        int panel_hres, panel_vres;
+        u32 pll_D_N;
+        int offset;
+        struct io_register *reg = NULL;
+        struct display_timing mode_crt_reg, panel_crt_reg;
+        struct crt_mode_table *panel_crt_table = NULL;
+        struct VideoModeTable *vmode_tbl = NULL;
+
+        DEBUG_MSG(KERN_INFO "viafb_lcd_set_mode!!\n");
+        /* Get mode table */
+        mode_crt_reg = mode_crt_table->crtc;
+        /* Get panel table Pointer */
+        vmode_tbl = viafb_get_modetbl_pointer(video_index);
+        panel_crt_table = vmode_tbl->crtc;
+        panel_crt_reg = panel_crt_table->crtc;
+        DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n");
+        set_hres = plvds_setting_info->h_active;
+        set_vres = plvds_setting_info->v_active;
+        panel_hres = plvds_setting_info->lcd_panel_hres;
+        panel_vres = plvds_setting_info->lcd_panel_vres;
+        if (VT1636_LVDS == plvds_chip_info->lvds_chip_name)
+                viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info);
+        plvds_setting_info->vclk = panel_crt_table->clk;
+        if (set_iga == IGA1) {
+                /* IGA1 doesn't have LCD scaling, so set it as centering. */
+                viafb_load_crtc_timing(lcd_centering_timging
+                                 (mode_crt_reg, panel_crt_reg), IGA1);
+        } else {
+                /* Expansion */
+                if ((plvds_setting_info->display_method ==
+                     LCD_EXPANDSION) & ((set_hres != panel_hres)
+                                        || (set_vres != panel_vres))) {
+                        /* expansion timing IGA2 loaded panel set timing*/
+                        viafb_load_crtc_timing(panel_crt_reg, IGA2);
+                        DEBUG_MSG(KERN_INFO "viafb_load_crtc_timing!!\n");
+                        load_lcd_scaling(set_hres, set_vres, panel_hres,
+                                         panel_vres);
+                        DEBUG_MSG(KERN_INFO "load_lcd_scaling!!\n");
+                } else {        /* Centering */
+                        /* centering timing IGA2 always loaded panel
+                           and mode releative timing */
+                        viafb_load_crtc_timing(lcd_centering_timging
+                                         (mode_crt_reg, panel_crt_reg), IGA2);
+                        viafb_write_reg_mask(CR79, VIACR, 0x00,
+                                BIT0 + BIT1 + BIT2);
+                        /* LCD scaling disabled */
+                }
+        }
+
+        if (set_iga == IGA1_IGA2) {
+                load_crtc_shadow_timing(mode_crt_reg, panel_crt_reg);
+                /* Fill shadow registers */
+
+                switch (plvds_setting_info->lcd_panel_id) {
+                case LCD_PANEL_ID0_640X480:
+                        offset = 80;
+                        break;
+                case LCD_PANEL_ID1_800X600:
+                case LCD_PANEL_IDA_800X480:
+                        offset = 110;
+                        break;
+                case LCD_PANEL_ID2_1024X768:
+                        offset = 150;
+                        break;
+                case LCD_PANEL_ID3_1280X768:
+                case LCD_PANEL_ID4_1280X1024:
+                case LCD_PANEL_ID5_1400X1050:
+                case LCD_PANEL_ID9_1280X800:
+                        offset = 190;
+                        break;
+                case LCD_PANEL_ID6_1600X1200:
+                        offset = 250;
+                        break;
+                case LCD_PANEL_ID7_1366X768:
+                case LCD_PANEL_IDB_1360X768:
+                        offset = 212;
+                        break;
+                default:
+                        offset = 140;
+                        break;
+                }
+
+                /* Offset for simultaneous */
+                reg_value = offset;
+                viafb_load_reg_num = offset_reg.iga2_offset_reg.reg_num;
+                reg = offset_reg.iga2_offset_reg.reg;
+                viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR);
+                DEBUG_MSG(KERN_INFO "viafb_load_reg!!\n");
+                viafb_load_fetch_count_reg(set_hres, 4, IGA2);
+                /* Fetch count for simultaneous */
+        } else {                /* SAMM */
+                /* Offset for IGA2 only */
+                viafb_load_offset_reg(set_hres, mode_bpp / 8, set_iga);
+                /* Fetch count for IGA2 only */
+                viafb_load_fetch_count_reg(set_hres, mode_bpp / 8, set_iga);
+
+                if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
+                    && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
+                        viafb_load_FIFO_reg(set_iga, set_hres, set_vres);
+
+                viafb_set_color_depth(mode_bpp / 8, set_iga);
+        }
+
+        fill_lcd_format();
+
+        pll_D_N = viafb_get_clk_value(panel_crt_table[0].clk);
+        DEBUG_MSG(KERN_INFO "PLL=0x%x", pll_D_N);
+        viafb_set_vclock(pll_D_N, set_iga);
+
+        viafb_set_output_path(DEVICE_LCD, set_iga,
+                plvds_chip_info->output_interface);
+        lcd_patch_skew(plvds_setting_info, plvds_chip_info);
+
+        /* If K8M800, enable LCD Prefetch Mode. */
+        if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800)
+            || (UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name))
+                viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0);
+
+        load_lcd_patch_regs(set_hres, set_vres,
+                            plvds_setting_info->lcd_panel_id, set_iga);
+
+        DEBUG_MSG(KERN_INFO "load_lcd_patch_regs!!\n");
+
+        /* Patch for non 32bit alignment mode */
+        via_pitch_alignment_patch_lcd(plvds_setting_info, plvds_chip_info);
+}
+
+static void integrated_lvds_disable(struct lvds_setting_information
+                             *plvds_setting_info,
+                             struct lvds_chip_information *plvds_chip_info)
+{
+        bool turn_off_first_powersequence = false;
+        bool turn_off_second_powersequence = false;
+        if (INTERFACE_LVDS0LVDS1 == plvds_chip_info->output_interface)
+                turn_off_first_powersequence = true;
+        if (INTERFACE_LVDS0 == plvds_chip_info->output_interface)
+                turn_off_first_powersequence = true;
+        if (INTERFACE_LVDS1 == plvds_chip_info->output_interface)
+                turn_off_second_powersequence = true;
+        if (turn_off_second_powersequence) {
+                /* Use second power sequence control: */
+
+                /* Turn off power sequence. */
+                viafb_write_reg_mask(CRD4, VIACR, 0, BIT1);
+
+                /* Turn off back light. */
+                viafb_write_reg_mask(CRD3, VIACR, 0xC0, BIT6 + BIT7);
+        }
+        if (turn_off_first_powersequence) {
+                /* Use first power sequence control: */
+
+                /* Turn off power sequence. */
+                viafb_write_reg_mask(CR6A, VIACR, 0, BIT3);
+
+                /* Turn off back light. */
+                viafb_write_reg_mask(CR91, VIACR, 0xC0, BIT6 + BIT7);
+        }
+
+        /* Turn DFP High/Low Pad off. */
+        viafb_write_reg_mask(SR2A, VIASR, 0, BIT0 + BIT1 + BIT2 + BIT3);
+
+        /* Power off LVDS channel. */
+        switch (plvds_chip_info->output_interface) {
+        case INTERFACE_LVDS0:
+                {
+                        viafb_write_reg_mask(CRD2, VIACR, 0x80, BIT7);
+                        break;
+                }
+
+        case INTERFACE_LVDS1:
+                {
+                        viafb_write_reg_mask(CRD2, VIACR, 0x40, BIT6);
+                        break;
+                }
+
+        case INTERFACE_LVDS0LVDS1:
+                {
+                        viafb_write_reg_mask(CRD2, VIACR, 0xC0, BIT6 + BIT7);
+                        break;
+                }
+        }
+}
+
+static void integrated_lvds_enable(struct lvds_setting_information
+                            *plvds_setting_info,
+                            struct lvds_chip_information *plvds_chip_info)
+{
+        bool turn_on_first_powersequence = false;
+        bool turn_on_second_powersequence = false;
+
+        DEBUG_MSG(KERN_INFO "integrated_lvds_enable, out_interface:%d\n",
+                  plvds_chip_info->output_interface);
+        if (plvds_setting_info->lcd_mode == LCD_SPWG)
+                viafb_write_reg_mask(CRD2, VIACR, 0x00, BIT0 + BIT1);
+         else
+                viafb_write_reg_mask(CRD2, VIACR, 0x03, BIT0 + BIT1);
+        if (INTERFACE_LVDS0LVDS1 == plvds_chip_info->output_interface)
+                turn_on_first_powersequence = true;
+        if (INTERFACE_LVDS0 == plvds_chip_info->output_interface)
+                turn_on_first_powersequence = true;
+        if (INTERFACE_LVDS1 == plvds_chip_info->output_interface)
+                turn_on_second_powersequence = true;
+
+        if (turn_on_second_powersequence) {
+                /* Use second power sequence control: */
+
+                /* Use hardware control power sequence. */
+                viafb_write_reg_mask(CRD3, VIACR, 0, BIT0);
+
+                /* Turn on back light. */
+                viafb_write_reg_mask(CRD3, VIACR, 0, BIT6 + BIT7);
+
+                /* Turn on hardware power sequence. */
+                viafb_write_reg_mask(CRD4, VIACR, 0x02, BIT1);
+        }
+        if (turn_on_first_powersequence) {
+                /* Use first power sequence control: */
+
+                /* Use hardware control power sequence. */
+                viafb_write_reg_mask(CR91, VIACR, 0, BIT0);
+
+                /* Turn on back light. */
+                viafb_write_reg_mask(CR91, VIACR, 0, BIT6 + BIT7);
+
+                /* Turn on hardware power sequence. */
+                viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
+        }
+
+        /* Turn DFP High/Low pad on. */
+        viafb_write_reg_mask(SR2A, VIASR, 0x0F, BIT0 + BIT1 + BIT2 + BIT3);
+
+        /* Power on LVDS channel. */
+        switch (plvds_chip_info->output_interface) {
+        case INTERFACE_LVDS0:
+                {
+                        viafb_write_reg_mask(CRD2, VIACR, 0, BIT7);
+                        break;
+                }
+
+        case INTERFACE_LVDS1:
+                {
+                        viafb_write_reg_mask(CRD2, VIACR, 0, BIT6);
+                        break;
+                }
+
+        case INTERFACE_LVDS0LVDS1:
+                {
+                        viafb_write_reg_mask(CRD2, VIACR, 0, BIT6 + BIT7);
+                        break;
+                }
+        }
+}
+
+void viafb_lcd_disable(void)
+{
+
+        if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
+                lcd_powersequence_off();
+                /* DI1 pad off */
+                viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30);
+        } else if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) {
+                if (viafb_LCD2_ON
+                    && (INTEGRATED_LVDS ==
+                        viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name))
+                        integrated_lvds_disable(viaparinfo->lvds_setting_info,
+                                &viaparinfo->chip_info->lvds_chip_info2);
+                if (INTEGRATED_LVDS ==
+                        viaparinfo->chip_info->lvds_chip_info.lvds_chip_name)
+                        integrated_lvds_disable(viaparinfo->lvds_setting_info,
+                                &viaparinfo->chip_info->lvds_chip_info);
+                if (VT1636_LVDS == viaparinfo->chip_info->
+                        lvds_chip_info.lvds_chip_name)
+                        viafb_disable_lvds_vt1636(viaparinfo->lvds_setting_info,
+                                &viaparinfo->chip_info->lvds_chip_info);
+        } else if (VT1636_LVDS ==
+        viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
+                viafb_disable_lvds_vt1636(viaparinfo->lvds_setting_info,
+                                    &viaparinfo->chip_info->lvds_chip_info);
+        } else {
+                /* DFP-HL pad off          */
+                viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x0F);
+                /* Backlight off           */
+                viafb_write_reg_mask(SR3D, VIASR, 0x00, 0x20);
+                /* 24 bit DI data paht off */
+                viafb_write_reg_mask(CR91, VIACR, 0x80, 0x80);
+                /* Simultaneout disabled   */
+                viafb_write_reg_mask(CR6B, VIACR, 0x00, 0x08);
+        }
+
+        /* Disable expansion bit   */
+        viafb_write_reg_mask(CR79, VIACR, 0x00, 0x01);
+        /* CRT path set to IGA1    */
+        viafb_write_reg_mask(SR16, VIASR, 0x00, 0x40);
+        /* Simultaneout disabled   */
+        viafb_write_reg_mask(CR6B, VIACR, 0x00, 0x08);
+        /* IGA2 path disabled      */
+        viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x80);
+
+}
+
+void viafb_lcd_enable(void)
+{
+        if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
+                /* DI1 pad on */
+                viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30);
+                lcd_powersequence_on();
+        } else if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) {
+                if (viafb_LCD2_ON && (INTEGRATED_LVDS ==
+                        viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name))
+                        integrated_lvds_enable(viaparinfo->lvds_setting_info2, \
+                                &viaparinfo->chip_info->lvds_chip_info2);
+                if (INTEGRATED_LVDS ==
+                        viaparinfo->chip_info->lvds_chip_info.lvds_chip_name)
+                        integrated_lvds_enable(viaparinfo->lvds_setting_info,
+                                &viaparinfo->chip_info->lvds_chip_info);
+                if (VT1636_LVDS == viaparinfo->chip_info->
+                        lvds_chip_info.lvds_chip_name)
+                        viafb_enable_lvds_vt1636(viaparinfo->
+                        lvds_setting_info, &viaparinfo->chip_info->
+                        lvds_chip_info);
+        } else if (VT1636_LVDS ==
+        viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
+                viafb_enable_lvds_vt1636(viaparinfo->lvds_setting_info,
+                                   &viaparinfo->chip_info->lvds_chip_info);
+        } else {
+                /* DFP-HL pad on           */
+                viafb_write_reg_mask(SR2A, VIASR, 0x0F, 0x0F);
+                /* Backlight on            */
+                viafb_write_reg_mask(SR3D, VIASR, 0x20, 0x20);
+                /* 24 bit DI data paht on  */
+                viafb_write_reg_mask(CR91, VIACR, 0x00, 0x80);
+
+                /* Set data source selection bit by iga path */
+                if (viaparinfo->lvds_setting_info->iga_path == IGA1) {
+                        /* DFP-H set to IGA1       */
+                        viafb_write_reg_mask(CR97, VIACR, 0x00, 0x10);
+                        /* DFP-L set to IGA1       */
+                        viafb_write_reg_mask(CR99, VIACR, 0x00, 0x10);
+                } else {
+                        /* DFP-H set to IGA2       */
+                        viafb_write_reg_mask(CR97, VIACR, 0x10, 0x10);
+                        /* DFP-L set to IGA2       */
+                        viafb_write_reg_mask(CR99, VIACR, 0x10, 0x10);
+                }
+                /* LCD enabled             */
+                viafb_write_reg_mask(CR6A, VIACR, 0x48, 0x48);
+        }
+
+        if ((viaparinfo->lvds_setting_info->iga_path == IGA1)
+            || (viaparinfo->lvds_setting_info->iga_path == IGA1_IGA2)) {
+                /* CRT path set to IGA2    */
+                viafb_write_reg_mask(SR16, VIASR, 0x40, 0x40);
+                /* IGA2 path disabled      */
+                viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x80);
+                /* IGA2 path enabled       */
+        } else {                /* IGA2 */
+                viafb_write_reg_mask(CR6A, VIACR, 0x80, 0x80);
+        }
+
+}
+
+static void lcd_powersequence_off(void)
+{
+        int i, mask, data;
+
+        /* Software control power sequence */
+        viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11);
+
+        for (i = 0; i < 3; i++) {
+                mask = PowerSequenceOff[0][i];
+                data = PowerSequenceOff[1][i] & mask;
+                viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask);
+                udelay(PowerSequenceOff[2][i]);
+        }
+
+        /* Disable LCD */
+        viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x08);
+}
+
+static void lcd_powersequence_on(void)
+{
+        int i, mask, data;
+
+        /* Software control power sequence */
+        viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11);
+
+        /* Enable LCD */
+        viafb_write_reg_mask(CR6A, VIACR, 0x08, 0x08);
+
+        for (i = 0; i < 3; i++) {
+                mask = PowerSequenceOn[0][i];
+                data = PowerSequenceOn[1][i] & mask;
+                viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask);
+                udelay(PowerSequenceOn[2][i]);
+        }
+
+        udelay(1);
+}
+
+static void fill_lcd_format(void)
+{
+        u8 bdithering = 0, bdual = 0;
+
+        if (viaparinfo->lvds_setting_info->device_lcd_dualedge)
+                bdual = BIT4;
+        if (viaparinfo->lvds_setting_info->LCDDithering)
+                bdithering = BIT0;
+        /* Dual & Dithering */
+        viafb_write_reg_mask(CR88, VIACR, (bdithering | bdual), BIT4 + BIT0);
+}
+
+static void check_diport_of_integrated_lvds(
+        struct lvds_chip_information *plvds_chip_info,
+                                     struct lvds_setting_information
+                                     *plvds_setting_info)
+{
+        /* Determine LCD DI Port by hardware layout. */
+        switch (viafb_display_hardware_layout) {
+        case HW_LAYOUT_LCD_ONLY:
+                {
+                        if (plvds_setting_info->device_lcd_dualedge) {
+                                plvds_chip_info->output_interface =
+                                    INTERFACE_LVDS0LVDS1;
+                        } else {
+                                plvds_chip_info->output_interface =
+                                    INTERFACE_LVDS0;
+                        }
+
+                        break;
+                }
+
+        case HW_LAYOUT_DVI_ONLY:
+                {
+                        plvds_chip_info->output_interface = INTERFACE_NONE;
+                        break;
+                }
+
+        case HW_LAYOUT_LCD1_LCD2:
+        case HW_LAYOUT_LCD_EXTERNAL_LCD2:
+                {
+                        plvds_chip_info->output_interface =
+                            INTERFACE_LVDS0LVDS1;
+                        break;
+                }
+
+        case HW_LAYOUT_LCD_DVI:
+                {
+                        plvds_chip_info->output_interface = INTERFACE_LVDS1;
+                        break;
+                }
+
+        default:
+                {
+                        plvds_chip_info->output_interface = INTERFACE_LVDS1;
+                        break;
+                }
+        }
+
+        DEBUG_MSG(KERN_INFO
+                  "Display Hardware Layout: 0x%x, LCD DI Port: 0x%x\n",
+                  viafb_display_hardware_layout,
+                  plvds_chip_info->output_interface);
+}
+
+void viafb_init_lvds_output_interface(struct lvds_chip_information
+                                *plvds_chip_info,
+                                struct lvds_setting_information
+                                *plvds_setting_info)
+{
+        if (INTERFACE_NONE != plvds_chip_info->output_interface) {
+                /*Do nothing, lcd port is specified by module parameter */
+                return;
+        }
+
+        switch (plvds_chip_info->lvds_chip_name) {
+
+        case VT1636_LVDS:
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_CX700:
+                        plvds_chip_info->output_interface = INTERFACE_DVP1;
+                        break;
+                case UNICHROME_CN700:
+                        plvds_chip_info->output_interface = INTERFACE_DFP_LOW;
+                        break;
+                default:
+                        plvds_chip_info->output_interface = INTERFACE_DVP0;
+                        break;
+                }
+                break;
+
+        case INTEGRATED_LVDS:
+                check_diport_of_integrated_lvds(plvds_chip_info,
+                                                plvds_setting_info);
+                break;
+
+        default:
+                switch (viaparinfo->chip_info->gfx_chip_name) {
+                case UNICHROME_K8M890:
+                case UNICHROME_P4M900:
+                case UNICHROME_P4M890:
+                        plvds_chip_info->output_interface = INTERFACE_DFP_LOW;
+                        break;
+                default:
+                        plvds_chip_info->output_interface = INTERFACE_DFP;
+                        break;
+                }
+                break;
+        }
+}
+
+static struct display_timing lcd_centering_timging(struct display_timing
+                                            mode_crt_reg,
+                                            struct display_timing panel_crt_reg)
+{
+        struct display_timing crt_reg;
+
+        crt_reg.hor_total = panel_crt_reg.hor_total;
+        crt_reg.hor_addr = mode_crt_reg.hor_addr;
+        crt_reg.hor_blank_start =
+            (panel_crt_reg.hor_addr - mode_crt_reg.hor_addr) / 2 +
+            crt_reg.hor_addr;
+        crt_reg.hor_blank_end = panel_crt_reg.hor_blank_end;
+        crt_reg.hor_sync_start =
+            (panel_crt_reg.hor_sync_start -
+             panel_crt_reg.hor_blank_start) + crt_reg.hor_blank_start;
+        crt_reg.hor_sync_end = panel_crt_reg.hor_sync_end;
+
+        crt_reg.ver_total = panel_crt_reg.ver_total;
+        crt_reg.ver_addr = mode_crt_reg.ver_addr;
+        crt_reg.ver_blank_start =
+            (panel_crt_reg.ver_addr - mode_crt_reg.ver_addr) / 2 +
+            crt_reg.ver_addr;
+        crt_reg.ver_blank_end = panel_crt_reg.ver_blank_end;
+        crt_reg.ver_sync_start =
+            (panel_crt_reg.ver_sync_start -
+             panel_crt_reg.ver_blank_start) + crt_reg.ver_blank_start;
+        crt_reg.ver_sync_end = panel_crt_reg.ver_sync_end;
+
+        return crt_reg;
+}
+
+static void load_crtc_shadow_timing(struct display_timing mode_timing,
+                             struct display_timing panel_timing)
+{
+        struct io_register *reg = NULL;
+        int i;
+        int viafb_load_reg_Num = 0;
+        int reg_value = 0;
+
+        if (viaparinfo->lvds_setting_info->display_method == LCD_EXPANDSION) {
+                /* Expansion */
+                for (i = 12; i < 20; i++) {
+                        switch (i) {
+                        case H_TOTAL_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_HOR_TOTAL_SHADOW_FORMULA
+                                    (panel_timing.hor_total);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.hor_total_shadow.
+                                    reg_num;
+                                reg = iga2_shadow_crtc_reg.hor_total_shadow.reg;
+                                break;
+                        case H_BLANK_END_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_HOR_BLANK_END_SHADOW_FORMULA
+                                    (panel_timing.hor_blank_start,
+                                     panel_timing.hor_blank_end);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.
+                                    hor_blank_end_shadow.reg_num;
+                                reg =
+                                    iga2_shadow_crtc_reg.
+                                    hor_blank_end_shadow.reg;
+                                break;
+                        case V_TOTAL_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_VER_TOTAL_SHADOW_FORMULA
+                                    (panel_timing.ver_total);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.ver_total_shadow.
+                                    reg_num;
+                                reg = iga2_shadow_crtc_reg.ver_total_shadow.reg;
+                                break;
+                        case V_ADDR_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_VER_ADDR_SHADOW_FORMULA
+                                    (panel_timing.ver_addr);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.ver_addr_shadow.
+                                    reg_num;
+                                reg = iga2_shadow_crtc_reg.ver_addr_shadow.reg;
+                                break;
+                        case V_BLANK_SATRT_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_VER_BLANK_START_SHADOW_FORMULA
+                                    (panel_timing.ver_blank_start);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.
+                                    ver_blank_start_shadow.reg_num;
+                                reg =
+                                    iga2_shadow_crtc_reg.
+                                    ver_blank_start_shadow.reg;
+                                break;
+                        case V_BLANK_END_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_VER_BLANK_END_SHADOW_FORMULA
+                                    (panel_timing.ver_blank_start,
+                                     panel_timing.ver_blank_end);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.
+                                    ver_blank_end_shadow.reg_num;
+                                reg =
+                                    iga2_shadow_crtc_reg.
+                                    ver_blank_end_shadow.reg;
+                                break;
+                        case V_SYNC_SATRT_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_VER_SYNC_START_SHADOW_FORMULA
+                                    (panel_timing.ver_sync_start);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.
+                                    ver_sync_start_shadow.reg_num;
+                                reg =
+                                    iga2_shadow_crtc_reg.
+                                    ver_sync_start_shadow.reg;
+                                break;
+                        case V_SYNC_END_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_VER_SYNC_END_SHADOW_FORMULA
+                                    (panel_timing.ver_sync_start,
+                                     panel_timing.ver_sync_end);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.
+                                    ver_sync_end_shadow.reg_num;
+                                reg =
+                                    iga2_shadow_crtc_reg.
+                                    ver_sync_end_shadow.reg;
+                                break;
+                        }
+                        viafb_load_reg(reg_value,
+                                viafb_load_reg_Num, reg, VIACR);
+                }
+        } else {                /* Centering */
+                for (i = 12; i < 20; i++) {
+                        switch (i) {
+                        case H_TOTAL_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_HOR_TOTAL_SHADOW_FORMULA
+                                    (panel_timing.hor_total);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.hor_total_shadow.
+                                    reg_num;
+                                reg = iga2_shadow_crtc_reg.hor_total_shadow.reg;
+                                break;
+                        case H_BLANK_END_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_HOR_BLANK_END_SHADOW_FORMULA
+                                    (panel_timing.hor_blank_start,
+                                     panel_timing.hor_blank_end);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.
+                                    hor_blank_end_shadow.reg_num;
+                                reg =
+                                    iga2_shadow_crtc_reg.
+                                    hor_blank_end_shadow.reg;
+                                break;
+                        case V_TOTAL_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_VER_TOTAL_SHADOW_FORMULA
+                                    (panel_timing.ver_total);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.ver_total_shadow.
+                                    reg_num;
+                                reg = iga2_shadow_crtc_reg.ver_total_shadow.reg;
+                                break;
+                        case V_ADDR_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_VER_ADDR_SHADOW_FORMULA
+                                    (mode_timing.ver_addr);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.ver_addr_shadow.
+                                    reg_num;
+                                reg = iga2_shadow_crtc_reg.ver_addr_shadow.reg;
+                                break;
+                        case V_BLANK_SATRT_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_VER_BLANK_START_SHADOW_FORMULA
+                                    (mode_timing.ver_blank_start);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.
+                                    ver_blank_start_shadow.reg_num;
+                                reg =
+                                    iga2_shadow_crtc_reg.
+                                    ver_blank_start_shadow.reg;
+                                break;
+                        case V_BLANK_END_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_VER_BLANK_END_SHADOW_FORMULA
+                                    (panel_timing.ver_blank_start,
+                                     panel_timing.ver_blank_end);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.
+                                    ver_blank_end_shadow.reg_num;
+                                reg =
+                                    iga2_shadow_crtc_reg.
+                                    ver_blank_end_shadow.reg;
+                                break;
+                        case V_SYNC_SATRT_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_VER_SYNC_START_SHADOW_FORMULA(
+                                    (panel_timing.ver_sync_start -
+                                    panel_timing.ver_blank_start) +
+                                    (panel_timing.ver_addr -
+                                    mode_timing.ver_addr) / 2 +
+                                    mode_timing.ver_addr);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.ver_sync_start_shadow.
+                                    reg_num;
+                                reg =
+                                    iga2_shadow_crtc_reg.ver_sync_start_shadow.
+                                    reg;
+                                break;
+                        case V_SYNC_END_SHADOW_INDEX:
+                                reg_value =
+                                    IGA2_VER_SYNC_END_SHADOW_FORMULA(
+                                    (panel_timing.ver_sync_start -
+                                    panel_timing.ver_blank_start) +
+                                    (panel_timing.ver_addr -
+                                    mode_timing.ver_addr) / 2 +
+                                    mode_timing.ver_addr,
+                                    panel_timing.ver_sync_end);
+                                viafb_load_reg_Num =
+                                    iga2_shadow_crtc_reg.ver_sync_end_shadow.
+                                    reg_num;
+                                reg =
+                                    iga2_shadow_crtc_reg.ver_sync_end_shadow.
+                                    reg;
+                                break;
+                        }
+                        viafb_load_reg(reg_value,
+                                viafb_load_reg_Num, reg, VIACR);
+                }
+        }
+}
+
+bool viafb_lcd_get_mobile_state(bool *mobile)
+{
+        unsigned char *romptr, *tableptr;
+        u8 core_base;
+        unsigned char *biosptr;
+        /* Rom address */
+        u32 romaddr = 0x000C0000;
+        u16 start_pattern = 0;
+
+        biosptr = ioremap(romaddr, 0x10000);
+
+        memcpy(&start_pattern, biosptr, 2);
+        /* Compare pattern */
+        if (start_pattern == 0xAA55) {
+                /* Get the start of Table */
+                /* 0x1B means BIOS offset position */
+                romptr = biosptr + 0x1B;
+                tableptr = biosptr + *((u16 *) romptr);
+
+                /* Get the start of biosver structure */
+                /* 18 means BIOS version position. */
+                romptr = tableptr + 18;
+                romptr = biosptr + *((u16 *) romptr);
+
+                /* The offset should be 44, but the
+                   actual image is less three char. */
+                /* pRom += 44; */
+                romptr += 41;
+
+                core_base = *romptr++;
+
+                if (core_base & 0x8)
+                        *mobile = false;
+                else
+                        *mobile = true;
+                /* release memory */
+                iounmap(biosptr);
+
+                return true;
+        } else {
+                iounmap(biosptr);
+                return false;
+        }
+}
+
+static void viafb_load_scaling_factor_for_p4m900(int set_hres,
+        int set_vres, int panel_hres, int panel_vres)
+{
+        int h_scaling_factor;
+        int v_scaling_factor;
+        u8 cra2 = 0;
+        u8 cr77 = 0;
+        u8 cr78 = 0;
+        u8 cr79 = 0;
+        u8 cr9f = 0;
+        /* Check if expansion for horizontal */
+        if (set_hres < panel_hres) {
+                /* Load Horizontal Scaling Factor */
+
+                /* For VIA_K8M800 or later chipsets. */
+                h_scaling_factor =
+                    K800_LCD_HOR_SCF_FORMULA(set_hres, panel_hres);
+                /* HSCaleFactor[1:0] at CR9F[1:0] */
+                cr9f = h_scaling_factor & 0x0003;
+                /* HSCaleFactor[9:2] at CR77[7:0] */
+                cr77 = (h_scaling_factor & 0x03FC) >> 2;
+                /* HSCaleFactor[11:10] at CR79[5:4] */
+                cr79 = (h_scaling_factor & 0x0C00) >> 10;
+                cr79 <<= 4;
+
+                /* Horizontal scaling enabled */
+                cra2 = 0xC0;
+
+                DEBUG_MSG(KERN_INFO "Horizontal Scaling value = %d\n",
+                          h_scaling_factor);
+        } else {
+                /* Horizontal scaling disabled */
+                cra2 = 0x00;
+        }
+
+        /* Check if expansion for vertical */
+        if (set_vres < panel_vres) {
+                /* Load Vertical Scaling Factor */
+
+                /* For VIA_K8M800 or later chipsets. */
+                v_scaling_factor =
+                    K800_LCD_VER_SCF_FORMULA(set_vres, panel_vres);
+
+                /* Vertical scaling enabled */
+                cra2 |= 0x08;
+                /* VSCaleFactor[0] at CR79[3] */
+                cr79 |= ((v_scaling_factor & 0x0001) << 3);
+                /* VSCaleFactor[8:1] at CR78[7:0] */
+                cr78 |= (v_scaling_factor & 0x01FE) >> 1;
+                /* VSCaleFactor[10:9] at CR79[7:6] */
+                cr79 |= ((v_scaling_factor & 0x0600) >> 9) << 6;
+
+                DEBUG_MSG(KERN_INFO "Vertical Scaling value = %d\n",
+                          v_scaling_factor);
+        } else {
+                /* Vertical scaling disabled */
+                cra2 |= 0x00;
+        }
+
+        viafb_write_reg_mask(CRA2, VIACR, cra2, BIT3 + BIT6 + BIT7);
+        viafb_write_reg_mask(CR77, VIACR, cr77, 0xFF);
+        viafb_write_reg_mask(CR78, VIACR, cr78, 0xFF);
+        viafb_write_reg_mask(CR79, VIACR, cr79, 0xF8);
+        viafb_write_reg_mask(CR9F, VIACR, cr9f, BIT0 + BIT1);
+}
diff --git a/drivers/video/via/lcd.h b/drivers/video/via/lcd.h
new file mode 100644
index 000000000000..071f47cf5be1
--- /dev/null
+++ b/drivers/video/via/lcd.h
@@ -0,0 +1,94 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+#ifndef __LCD_H__
+#define __LCD_H__
+
+/*Definition TMDS Device ID register*/
+#define     VT1631_DEVICE_ID_REG        0x02
+#define     VT1631_DEVICE_ID            0x92
+
+#define     VT3271_DEVICE_ID_REG        0x02
+#define     VT3271_DEVICE_ID            0x71
+
+#define     GET_LCD_SIZE_BY_SYSTEM_BIOS     0x01
+#define     GET_LCD_SIZE_BY_VGA_BIOS        0x02
+#define     GET_LCD_SZIE_BY_HW_STRAPPING    0x03
+#define     GET_LCD_SIZE_BY_USER_SETTING    0x04
+
+/* Definition DVI Panel ID*/
+/* Resolution: 640x480,   Channel: single, Dithering: Enable */
+#define     LCD_PANEL_ID0_640X480       0x00
+/* Resolution: 800x600,   Channel: single, Dithering: Enable */
+#define     LCD_PANEL_ID1_800X600       0x01
+/* Resolution: 1024x768,  Channel: single, Dithering: Enable */
+#define     LCD_PANEL_ID2_1024X768      0x02
+/* Resolution: 1280x768,  Channel: single, Dithering: Enable */
+#define     LCD_PANEL_ID3_1280X768      0x03
+/* Resolution: 1280x1024, Channel: dual,   Dithering: Enable */
+#define     LCD_PANEL_ID4_1280X1024     0x04
+/* Resolution: 1400x1050, Channel: dual,   Dithering: Enable */
+#define     LCD_PANEL_ID5_1400X1050     0x05
+/* Resolution: 1600x1200, Channel: dual,   Dithering: Enable */
+#define     LCD_PANEL_ID6_1600X1200     0x06
+/* Resolution: 1366x768,  Channel: single, Dithering: Disable */
+#define     LCD_PANEL_ID7_1366X768      0x07
+/* Resolution: 1024x600,  Channel: single, Dithering: Enable*/
+#define     LCD_PANEL_ID8_1024X600      0x08
+/* Resolution: 1280x800,  Channel: single, Dithering: Enable*/
+#define     LCD_PANEL_ID9_1280X800      0x09
+/* Resolution: 800x480,   Channel: single, Dithering: Enable*/
+#define     LCD_PANEL_IDA_800X480       0x0A
+/* Resolution: 1360x768,   Channel: single, Dithering: Disable*/
+#define     LCD_PANEL_IDB_1360X768     0x0B
+/* Resolution: 480x640,  Channel: single, Dithering: Enable */
+#define     LCD_PANEL_IDC_480X640      0x0C
+
+
+extern int viafb_LCD2_ON;
+extern int viafb_LCD_ON;
+extern int viafb_DVI_ON;
+
+void viafb_disable_lvds_vt1636(struct lvds_setting_information
+                         *plvds_setting_info,
+                         struct lvds_chip_information *plvds_chip_info);
+void viafb_enable_lvds_vt1636(struct lvds_setting_information
+                        *plvds_setting_info,
+                        struct lvds_chip_information *plvds_chip_info);
+void viafb_lcd_disable(void);
+void viafb_lcd_enable(void);
+void viafb_init_lcd_size(void);
+void viafb_init_lvds_output_interface(struct lvds_chip_information
+                                *plvds_chip_info,
+                                struct lvds_setting_information
+                                *plvds_setting_info);
+void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
+                  struct lvds_setting_information *plvds_setting_info,
+                  struct lvds_chip_information *plvds_chip_info);
+int viafb_lvds_trasmitter_identify(void);
+void viafb_init_lvds_output_interface(struct lvds_chip_information
+                                *plvds_chip_info,
+                                struct lvds_setting_information
+                                *plvds_setting_info);
+bool viafb_lcd_get_mobile_state(bool *mobile);
+void viafb_load_crtc_timing(struct display_timing device_timing,
+        int set_iga);
+
+#endif /* __LCD_H__ */
diff --git a/drivers/video/via/lcdtbl.h b/drivers/video/via/lcdtbl.h
new file mode 100644
index 000000000000..6f3dd800be59
--- /dev/null
+++ b/drivers/video/via/lcdtbl.h
@@ -0,0 +1,591 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+#ifndef __LCDTBL_H__
+#define __LCDTBL_H__
+
+#include "share.h"
+
+/* CLE266 Software Power Sequence */
+/* {Mask}, {Data}, {Delay} */
+int PowerSequenceOn[3][3] =
+    { {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06}, {0x19, 0x1FE, 0x01} };
+int PowerSequenceOff[3][3] =
+    { {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00}, {0xD2, 0x19, 0x01} };
+
+/* ++++++ P880 ++++++ */
+/*   Panel 1600x1200   */
+struct io_reg P880_LCD_RES_6X4_16X12[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x73}, {VIACR, CR55, 0x0F, 0x08},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x73}, {VIACR, CR54, 0x38, 0x00},
+        {VIACR, CR5D, 0x40, 0x40},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x5A}, {VIACR, CR71, 0x08, 0x00},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x5E},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xD6}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR44, 0xFF, 0x7D}, {VIASR, SR45, 0xFF, 0x8C},
+        {VIASR, SR46, 0xFF, 0x02}
+
+};
+
+#define NUM_TOTAL_P880_LCD_RES_6X4_16X12 ARRAY_SIZE(P880_LCD_RES_6X4_16X12)
+
+struct io_reg P880_LCD_RES_7X4_16X12[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x67}, {VIACR, CR55, 0x0F, 0x08},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x67}, {VIACR, CR54, 0x38, 0x00},
+        {VIACR, CR5D, 0x40, 0x40},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x74}, {VIACR, CR71, 0x08, 0x00},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x78},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR44, 0xFF, 0x78}, {VIASR, SR45, 0xFF, 0x8C},
+        {VIASR, SR46, 0xFF, 0x01}
+
+};
+
+#define NUM_TOTAL_P880_LCD_RES_7X4_16X12 ARRAY_SIZE(P880_LCD_RES_7X4_16X12)
+
+struct io_reg P880_LCD_RES_8X6_16X12[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00},
+        {VIACR, CR5D, 0x40, 0x40},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x00},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x83},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR44, 0xFF, 0x6D}, {VIASR, SR45, 0xFF, 0x88},
+        {VIASR, SR46, 0xFF, 0x03}
+
+};
+
+#define NUM_TOTAL_P880_LCD_RES_8X6_16X12 ARRAY_SIZE(P880_LCD_RES_8X6_16X12)
+
+struct io_reg P880_LCD_RES_10X7_16X12[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00},
+        {VIACR, CR5D, 0x40, 0x40},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0xAB}, {VIACR, CR71, 0x08, 0x00},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0xAF},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xF0}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR44, 0xFF, 0x92}, {VIASR, SR45, 0xFF, 0x88},
+        {VIASR, SR46, 0xFF, 0x03}
+
+};
+
+#define NUM_TOTAL_P880_LCD_RES_10X7_16X12 ARRAY_SIZE(P880_LCD_RES_10X7_16X12)
+
+struct io_reg P880_LCD_RES_12X10_16X12[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x7D}, {VIACR, CR55, 0x0F, 0x08},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x7D}, {VIACR, CR54, 0x38, 0x00},
+        {VIACR, CR5D, 0x40, 0x40},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0xD0}, {VIACR, CR71, 0x08, 0x00},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0xD4},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR44, 0xFF, 0xF6}, {VIASR, SR45, 0xFF, 0x88},
+        {VIASR, SR46, 0xFF, 0x05}
+
+};
+
+#define NUM_TOTAL_P880_LCD_RES_12X10_16X12 ARRAY_SIZE(P880_LCD_RES_12X10_16X12)
+
+/*   Panel 1400x1050   */
+struct io_reg P880_LCD_RES_6X4_14X10[] = {
+        /* 640x480                          */
+        /* IGA2 Horizontal Total            */
+        {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
+        /* IGA2 Horizontal Blank End        */
+        {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
+        {VIACR, CR5D, 0x40, 0x24},
+        /* IGA2 Horizontal Total Shadow     */
+        {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x44},
+        /* IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x63},
+        /* IGA2 Offset                      */
+        {VIACR, CR66, 0xFF, 0xB4}, {VIACR, CR67, 0x03, 0x00},
+        /* VCLK                             */
+        {VIASR, SR44, 0xFF, 0xC6}, {VIASR, SR45, 0xFF, 0x8C},
+        {VIASR, SR46, 0xFF, 0x05}
+};
+
+#define NUM_TOTAL_P880_LCD_RES_6X4_14X10 ARRAY_SIZE(P880_LCD_RES_6X4_14X10)
+
+struct io_reg P880_LCD_RES_8X6_14X10[] = {
+        /* 800x600                          */
+        /* IGA2 Horizontal Total            */
+        {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
+        /* IGA2 Horizontal Blank End        */
+        {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
+        {VIACR, CR5D, 0x40, 0x24},
+        /* IGA2 Horizontal Total Shadow     */
+        {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x44},
+        /* IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x83},
+        /* IGA2 Offset                      */
+        {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00},
+        /* VCLK                             */
+        {VIASR, SR44, 0xFF, 0x06}, {VIASR, SR45, 0xFF, 0x8D},
+        {VIASR, SR46, 0xFF, 0x05}
+};
+
+#define NUM_TOTAL_P880_LCD_RES_8X6_14X10 ARRAY_SIZE(P880_LCD_RES_8X6_14X10)
+
+/* ++++++ K400 ++++++ */
+/*   Panel 1600x1200   */
+struct io_reg K400_LCD_RES_6X4_16X12[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x73}, {VIACR, CR55, 0x0F, 0x08},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x73}, {VIACR, CR54, 0x38, 0x00},
+        {VIACR, CR5D, 0x40, 0x40},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x5A}, {VIACR, CR71, 0x08, 0x00},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x5E},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xDA}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0xC4}, {VIASR, SR47, 0xFF, 0x7F}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_6X4_16X12 ARRAY_SIZE(K400_LCD_RES_6X4_16X12)
+
+struct io_reg K400_LCD_RES_7X4_16X12[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x67}, {VIACR, CR55, 0x0F, 0x08},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x67}, {VIACR, CR54, 0x38, 0x00},
+        {VIACR, CR5D, 0x40, 0x40},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x74}, {VIACR, CR71, 0x08, 0x00},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x78},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0x46}, {VIASR, SR47, 0xFF, 0x3D}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_7X4_16X12 ARRAY_SIZE(K400_LCD_RES_7X4_16X12)
+
+struct io_reg K400_LCD_RES_8X6_16X12[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00},
+        {VIACR, CR5D, 0x40, 0x40},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x00},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x83},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0x85}, {VIASR, SR47, 0xFF, 0x6F}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_8X6_16X12 ARRAY_SIZE(K400_LCD_RES_8X6_16X12)
+
+struct io_reg K400_LCD_RES_10X7_16X12[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00},
+        {VIACR, CR5D, 0x40, 0x40},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0xAB}, {VIACR, CR71, 0x08, 0x00},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0xAF},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xF0}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0x45}, {VIASR, SR47, 0xFF, 0x4A}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_10X7_16X12 ARRAY_SIZE(K400_LCD_RES_10X7_16X12)
+
+struct io_reg K400_LCD_RES_12X10_16X12[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x7D}, {VIACR, CR55, 0x0F, 0x08},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x7D}, {VIACR, CR54, 0x38, 0x00},
+        {VIACR, CR5D, 0x40, 0x40},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0xD0}, {VIACR, CR71, 0x08, 0x00},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0xD4},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0x47}, {VIASR, SR47, 0xFF, 0x7C}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_12X10_16X12 ARRAY_SIZE(K400_LCD_RES_12X10_16X12)
+
+/*   Panel 1400x1050   */
+struct io_reg K400_LCD_RES_6X4_14X10[] = {
+        /* 640x400                          */
+        /* IGA2 Horizontal Total            */
+        {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
+        /* IGA2 Horizontal Blank End        */
+        {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
+        {VIACR, CR5D, 0x40, 0x24},
+        /* IGA2 Horizontal Total Shadow     */
+        {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x44},
+        /* IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x63},
+        /* IGA2 Offset                      */
+        {VIACR, CR66, 0xFF, 0xB4}, {VIACR, CR67, 0x03, 0x00},
+        /* VCLK                             */
+        {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x19}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_6X4_14X10 ARRAY_SIZE(K400_LCD_RES_6X4_14X10)
+
+struct io_reg K400_LCD_RES_8X6_14X10[] = {
+        /* 800x600                          */
+        /* IGA2 Horizontal Total            */
+        {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
+        /* IGA2 Horizontal Blank End        */
+        {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
+        {VIACR, CR5D, 0x40, 0x24},
+        /* IGA2 Horizontal Total Shadow     */
+        {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x44},
+        /* IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x83},
+        /* IGA2 Offset                      */
+        {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00},
+        /* VCLK                             */
+        {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x21}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_8X6_14X10 ARRAY_SIZE(K400_LCD_RES_8X6_14X10)
+
+struct io_reg K400_LCD_RES_10X7_14X10[] = {
+        /* 1024x768                         */
+        /* IGA2 Horizontal Total            */
+        {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
+        /* IGA2 Horizontal Blank End        */
+        {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
+        {VIACR, CR5D, 0x40, 0x24},
+        /* IGA2 Horizontal Total Shadow     */
+        {VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x44},
+        /* IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0xA7},
+        /* IGA2 Offset                      */
+        {VIACR, CR66, 0xFF, 0xC3}, {VIACR, CR67, 0x03, 0x04},
+        /* VCLK                             */
+        {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_10X7_14X10 ARRAY_SIZE(K400_LCD_RES_10X7_14X10)
+
+struct io_reg K400_LCD_RES_12X10_14X10[] = {
+        /* 1280x768, 1280x960, 1280x1024    */
+        /* IGA2 Horizontal Total            */
+        {VIACR, CR50, 0xFF, 0x97}, {VIACR, CR55, 0x0F, 0x56},
+        /* IGA2 Horizontal Blank End        */
+        {VIACR, CR53, 0xFF, 0x97}, {VIACR, CR54, 0x38, 0x75},
+        {VIACR, CR5D, 0x40, 0x24},
+        /* IGA2 Horizontal Total Shadow     */
+        {VIACR, CR6D, 0xFF, 0xCE}, {VIACR, CR71, 0x08, 0x44},
+        /* IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0xD2},
+        /* IGA2 Offset                      */
+        {VIACR, CR66, 0xFF, 0xC9}, {VIACR, CR67, 0x03, 0x04},
+        /* VCLK                             */
+        {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0x79}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_12X10_14X10 ARRAY_SIZE(K400_LCD_RES_12X10_14X10)
+
+/* ++++++ K400 ++++++ */
+/*   Panel 1366x768   */
+struct io_reg K400_LCD_RES_6X4_1366X7[] = {
+        /* 640x400                          */
+        /* IGA2 Horizontal Total            */
+        {VIACR, CR50, 0xFF, 0x47}, {VIACR, CR55, 0x0F, 0x35},
+        /* IGA2 Horizontal Blank End        */
+        {VIACR, CR53, 0xFF, 0x47}, {VIACR, CR54, 0x38, 0x2B},
+        {VIACR, CR5D, 0x40, 0x13},
+        /* IGA2 Horizontal Total Shadow     */
+        {VIACR, CR6D, 0xFF, 0x60}, {VIACR, CR71, 0x08, 0x23},
+        /* IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x64},
+        /* IGA2 Offset                      */
+        {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00},
+        /* VCLK                             */
+        {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0x4C}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_6X4_1366X7 ARRAY_SIZE(K400_LCD_RES_6X4_1366X7)
+
+struct io_reg K400_LCD_RES_7X4_1366X7[] = {
+        /* IGA2 Horizontal Total            */
+        {VIACR, CR50, 0xFF, 0x3B}, {VIACR, CR55, 0x0F, 0x35},
+        /* IGA2 Horizontal Blank End        */
+        {VIACR, CR53, 0xFF, 0x3B}, {VIACR, CR54, 0x38, 0x2B},
+        {VIACR, CR5D, 0x40, 0x13},
+        /* IGA2 Horizontal Total Shadow     */
+        {VIACR, CR6D, 0xFF, 0x71}, {VIACR, CR71, 0x08, 0x23},
+        /* IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x75},
+        /* IGA2 Offset                      */
+        {VIACR, CR66, 0xFF, 0x96}, {VIACR, CR67, 0x03, 0x00},
+        /* VCLK                             */
+        {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x10}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_7X4_1366X7 ARRAY_SIZE(K400_LCD_RES_7X4_1366X7)
+
+struct io_reg K400_LCD_RES_8X6_1366X7[] = {
+        /* 800x600                          */
+        /* IGA2 Horizontal Total            */
+        {VIACR, CR50, 0xFF, 0x37}, {VIACR, CR55, 0x0F, 0x35},
+        /* IGA2 Horizontal Blank End        */
+        {VIACR, CR53, 0xFF, 0x37}, {VIACR, CR54, 0x38, 0x2B},
+        {VIACR, CR5D, 0x40, 0x13},
+        /* IGA2 Horizontal Total Shadow     */
+        {VIACR, CR6D, 0xFF, 0x7E}, {VIACR, CR71, 0x08, 0x23},
+        /* IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x82},
+        /* IGA2 Offset                      */
+        {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00},
+        /* VCLK                             */
+        {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0xB9}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_8X6_1366X7 ARRAY_SIZE(K400_LCD_RES_8X6_1366X7)
+
+struct io_reg K400_LCD_RES_10X7_1366X7[] = {
+        /* 1024x768                         */
+        /* IGA2 Horizontal Total            */
+        {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
+        /* IGA2 Horizontal Blank End        */
+        {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
+        {VIACR, CR5D, 0x40, 0x24},
+        /* IGA2 Horizontal Total Shadow     */
+        {VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x44},
+        /* IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0xA7},
+        /* IGA2 Offset                      */
+        {VIACR, CR66, 0xFF, 0xC3}, {VIACR, CR67, 0x03, 0x04},
+        /* VCLK                             */
+        {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_10X7_1366X7 ARRAY_SIZE(K400_LCD_RES_10X7_1366X7)
+
+struct io_reg K400_LCD_RES_12X10_1366X7[] = {
+        /* 1280x768, 1280x960, 1280x1024    */
+        /* IGA2 Horizontal Total            */
+        {VIACR, CR50, 0xFF, 0x97}, {VIACR, CR55, 0x0F, 0x56},
+        /* IGA2 Horizontal Blank End        */
+        {VIACR, CR53, 0xFF, 0x97}, {VIACR, CR54, 0x38, 0x75},
+        {VIACR, CR5D, 0x40, 0x24},
+        /* IGA2 Horizontal Total Shadow     */
+        {VIACR, CR6D, 0xFF, 0xCE}, {VIACR, CR71, 0x08, 0x44},
+        /* IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0xD2},
+        /* IGA2 Offset                      */
+        {VIACR, CR66, 0xFF, 0xC9}, {VIACR, CR67, 0x03, 0x04},
+        /* VCLK                             */
+        {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0x79}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_12X10_1366X7\
+                        ARRAY_SIZE(K400_LCD_RES_12X10_1366X7)
+
+/* ++++++ K400 ++++++ */
+/*   Panel 1280x1024   */
+struct io_reg K400_LCD_RES_6X4_12X10[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74},
+        {VIACR, CR5D, 0x40, 0x1C},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x34},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x63},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xAA}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x19}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_6X4_12X10 ARRAY_SIZE(K400_LCD_RES_6X4_12X10)
+
+struct io_reg K400_LCD_RES_7X4_12X10[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74},
+        {VIACR, CR5D, 0x40, 0x1C},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x68}, {VIACR, CR71, 0x08, 0x34},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x6C},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xA8}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0xED}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_7X4_12X10 ARRAY_SIZE(K400_LCD_RES_7X4_12X10)
+
+struct io_reg K400_LCD_RES_8X6_12X10[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74},
+        {VIACR, CR5D, 0x40, 0x1C},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x34},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x83},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x21}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_8X6_12X10 ARRAY_SIZE(K400_LCD_RES_8X6_12X10)
+
+struct io_reg K400_LCD_RES_10X7_12X10[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74},
+        {VIACR, CR5D, 0x40, 0x1C},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x34},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0xA7},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x04},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_10X7_12X10 ARRAY_SIZE(K400_LCD_RES_10X7_12X10)
+
+/* ++++++ K400 ++++++ */
+/*   Panel 1024x768    */
+struct io_reg K400_LCD_RES_6X4_10X7[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x47}, {VIACR, CR55, 0x0F, 0x35},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x47}, {VIACR, CR54, 0x38, 0x2B},
+        {VIACR, CR5D, 0x40, 0x13},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x60}, {VIACR, CR71, 0x08, 0x23},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x64},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0x4C}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_6X4_10X7 ARRAY_SIZE(K400_LCD_RES_6X4_10X7)
+
+struct io_reg K400_LCD_RES_7X4_10X7[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x3B}, {VIACR, CR55, 0x0F, 0x35},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x3B}, {VIACR, CR54, 0x38, 0x2B},
+        {VIACR, CR5D, 0x40, 0x13},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x71}, {VIACR, CR71, 0x08, 0x23},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x75},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0x96}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x10}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_7X4_10X7 ARRAY_SIZE(K400_LCD_RES_7X4_10X7)
+
+struct io_reg K400_LCD_RES_8X6_10X7[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x37}, {VIACR, CR55, 0x0F, 0x35},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x37}, {VIACR, CR54, 0x38, 0x2B},
+        {VIACR, CR5D, 0x40, 0x13},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x7E}, {VIACR, CR71, 0x08, 0x23},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x82},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0xB9}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_8X6_10X7 ARRAY_SIZE(K400_LCD_RES_8X6_10X7)
+
+/* ++++++ K400 ++++++ */
+/*   Panel 800x600     */
+struct io_reg K400_LCD_RES_6X4_8X6[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x1A}, {VIACR, CR55, 0x0F, 0x34},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x1A}, {VIACR, CR54, 0x38, 0xE3},
+        {VIACR, CR5D, 0x40, 0x12},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x22},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x63},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0x6E}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0x86}, {VIASR, SR47, 0xFF, 0xB3}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_6X4_8X6 ARRAY_SIZE(K400_LCD_RES_6X4_8X6)
+
+struct io_reg K400_LCD_RES_7X4_8X6[] = {
+        /*IGA2 Horizontal Total */
+        {VIACR, CR50, 0xFF, 0x1F}, {VIACR, CR55, 0x0F, 0x34},
+        /*IGA2 Horizontal Blank End */
+        {VIACR, CR53, 0xFF, 0x1F}, {VIACR, CR54, 0x38, 0xE3},
+        {VIACR, CR5D, 0x40, 0x12},
+        /*IGA2 Horizontal Total Shadow */
+        {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x22},
+        /*IGA2 Horizontal Blank End Shadow */
+        {VIACR, CR6E, 0xFF, 0x83},
+        /*IGA2 Offset */
+        {VIACR, CR66, 0xFF, 0x78}, {VIACR, CR67, 0x03, 0x00},
+         /*VCLK*/ {VIASR, SR46, 0xFF, 0xC4}, {VIASR, SR47, 0xFF, 0x59}
+};
+
+#define NUM_TOTAL_K400_LCD_RES_7X4_8X6 ARRAY_SIZE(K400_LCD_RES_7X4_8X6)
+
+#endif /* __LCDTBL_H__ */
diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h
new file mode 100644
index 000000000000..2e1254da9c8c
--- /dev/null
+++ b/drivers/video/via/share.h
@@ -0,0 +1,1105 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef __SHARE_H__
+#define __SHARE_H__
+
+/* Define Return Value */
+#define FAIL        -1
+#define OK          1
+
+#ifndef NULL
+#define NULL 0
+#endif
+
+/* Define Bit Field */
+#define BIT0    0x01
+#define BIT1    0x02
+#define BIT2    0x04
+#define BIT3    0x08
+#define BIT4    0x10
+#define BIT5    0x20
+#define BIT6    0x40
+#define BIT7    0x80
+
+/* Video Memory Size */
+#define VIDEO_MEMORY_SIZE_16M    0x1000000
+
+/* Definition Mode Index
+*/
+#define     VIA_RES_640X480                     0
+#define     VIA_RES_800X600                     1
+#define     VIA_RES_1024X768                    2
+#define     VIA_RES_1152X864                    3
+#define     VIA_RES_1280X1024                   4
+#define     VIA_RES_1600X1200                   5
+#define     VIA_RES_1440X1050                   6
+#define     VIA_RES_1280X768                    7
+#define     VIA_RES_1280X960                    8
+#define     VIA_RES_1920X1440                   9
+#define     VIA_RES_848X480                     10
+#define     VIA_RES_1400X1050                   11
+#define     VIA_RES_720X480                     12
+#define     VIA_RES_720X576                     13
+#define     VIA_RES_1024X512                    14
+#define     VIA_RES_856X480                     15
+#define     VIA_RES_1024X576                    16
+#define     VIA_RES_640X400                     17
+#define     VIA_RES_1280X720                    18
+#define     VIA_RES_1920X1080                   19
+#define     VIA_RES_800X480                     20
+#define     VIA_RES_1368X768                    21
+#define     VIA_RES_1024X600                    22
+#define     VIA_RES_1280X800                    23
+#define     VIA_RES_1680X1050                   24
+#define     VIA_RES_960X600                     25
+#define     VIA_RES_1000X600                    26
+#define     VIA_RES_1088X612                    27
+#define     VIA_RES_1152X720                    28
+#define     VIA_RES_1200X720                    29
+#define     VIA_RES_1280X600                    30
+#define     VIA_RES_1360X768                    31
+#define     VIA_RES_1366X768                    32
+#define     VIA_RES_1440X900                    33
+#define     VIA_RES_1600X900                    34
+#define     VIA_RES_1600X1024                   35
+#define     VIA_RES_1792X1344                   36
+#define     VIA_RES_1856X1392                   37
+#define     VIA_RES_1920X1200                   38
+#define     VIA_RES_2048X1536                   39
+#define     VIA_RES_480X640                     40
+
+/*Reduce Blanking*/
+#define     VIA_RES_1360X768_RB                 131
+#define     VIA_RES_1440X900_RB                 133
+#define     VIA_RES_1400X1050_RB                111
+#define     VIA_RES_1600X900_RB                 134
+#define     VIA_RES_1680X1050_RB                124
+#define     VIA_RES_1920X1080_RB                119
+#define     VIA_RES_1920X1200_RB                138
+
+#define     VIA_RES_INVALID                     255
+
+/* standard VGA IO port
+*/
+#define VIARMisc    0x3CC
+#define VIAWMisc    0x3C2
+#define VIAStatus   0x3DA
+#define VIACR       0x3D4
+#define VIASR       0x3C4
+#define VIAGR       0x3CE
+#define VIAAR       0x3C0
+
+#define StdCR       0x19
+#define StdSR       0x04
+#define StdGR       0x09
+#define StdAR       0x14
+
+#define PatchCR     11
+
+/* Display path */
+#define IGA1        1
+#define IGA2        2
+#define IGA1_IGA2   3
+
+/* Define Color Depth  */
+#define MODE_8BPP       1
+#define MODE_16BPP      2
+#define MODE_32BPP      4
+
+#define GR20    0x20
+#define GR21    0x21
+#define GR22    0x22
+
+/* Sequencer Registers */
+#define SR01    0x01
+#define SR10    0x10
+#define SR12    0x12
+#define SR15    0x15
+#define SR16    0x16
+#define SR17    0x17
+#define SR18    0x18
+#define SR1B    0x1B
+#define SR1A    0x1A
+#define SR1C    0x1C
+#define SR1D    0x1D
+#define SR1E    0x1E
+#define SR1F    0x1F
+#define SR20    0x20
+#define SR21    0x21
+#define SR22    0x22
+#define SR2A    0x2A
+#define SR2D    0x2D
+#define SR2E    0x2E
+
+#define SR30    0x30
+#define SR39    0x39
+#define SR3D    0x3D
+#define SR3E    0x3E
+#define SR3F    0x3F
+#define SR40    0x40
+#define SR43    0x43
+#define SR44    0x44
+#define SR45    0x45
+#define SR46    0x46
+#define SR47    0x47
+#define SR48    0x48
+#define SR49    0x49
+#define SR4A    0x4A
+#define SR4B    0x4B
+#define SR4C    0x4C
+#define SR52    0x52
+#define SR5E    0x5E
+#define SR65    0x65
+
+/* CRT Controller Registers */
+#define CR00    0x00
+#define CR01    0x01
+#define CR02    0x02
+#define CR03    0x03
+#define CR04    0x04
+#define CR05    0x05
+#define CR06    0x06
+#define CR07    0x07
+#define CR08    0x08
+#define CR09    0x09
+#define CR0A    0x0A
+#define CR0B    0x0B
+#define CR0C    0x0C
+#define CR0D    0x0D
+#define CR0E    0x0E
+#define CR0F    0x0F
+#define CR10    0x10
+#define CR11    0x11
+#define CR12    0x12
+#define CR13    0x13
+#define CR14    0x14
+#define CR15    0x15
+#define CR16    0x16
+#define CR17    0x17
+#define CR18    0x18
+
+/* Extend CRT Controller Registers */
+#define CR30    0x30
+#define CR31    0x31
+#define CR32    0x32
+#define CR33    0x33
+#define CR34    0x34
+#define CR35    0x35
+#define CR36    0x36
+#define CR37    0x37
+#define CR38    0x38
+#define CR39    0x39
+#define CR3A    0x3A
+#define CR3B    0x3B
+#define CR3C    0x3C
+#define CR3D    0x3D
+#define CR3E    0x3E
+#define CR3F    0x3F
+#define CR40    0x40
+#define CR41    0x41
+#define CR42    0x42
+#define CR43    0x43
+#define CR44    0x44
+#define CR45    0x45
+#define CR46    0x46
+#define CR47    0x47
+#define CR48    0x48
+#define CR49    0x49
+#define CR4A    0x4A
+#define CR4B    0x4B
+#define CR4C    0x4C
+#define CR4D    0x4D
+#define CR4E    0x4E
+#define CR4F    0x4F
+#define CR50    0x50
+#define CR51    0x51
+#define CR52    0x52
+#define CR53    0x53
+#define CR54    0x54
+#define CR55    0x55
+#define CR56    0x56
+#define CR57    0x57
+#define CR58    0x58
+#define CR59    0x59
+#define CR5A    0x5A
+#define CR5B    0x5B
+#define CR5C    0x5C
+#define CR5D    0x5D
+#define CR5E    0x5E
+#define CR5F    0x5F
+#define CR60    0x60
+#define CR61    0x61
+#define CR62    0x62
+#define CR63    0x63
+#define CR64    0x64
+#define CR65    0x65
+#define CR66    0x66
+#define CR67    0x67
+#define CR68    0x68
+#define CR69    0x69
+#define CR6A    0x6A
+#define CR6B    0x6B
+#define CR6C    0x6C
+#define CR6D    0x6D
+#define CR6E    0x6E
+#define CR6F    0x6F
+#define CR70    0x70
+#define CR71    0x71
+#define CR72    0x72
+#define CR73    0x73
+#define CR74    0x74
+#define CR75    0x75
+#define CR76    0x76
+#define CR77    0x77
+#define CR78    0x78
+#define CR79    0x79
+#define CR7A    0x7A
+#define CR7B    0x7B
+#define CR7C    0x7C
+#define CR7D    0x7D
+#define CR7E    0x7E
+#define CR7F    0x7F
+#define CR80    0x80
+#define CR81    0x81
+#define CR82    0x82
+#define CR83    0x83
+#define CR84    0x84
+#define CR85    0x85
+#define CR86    0x86
+#define CR87    0x87
+#define CR88    0x88
+#define CR89    0x89
+#define CR8A    0x8A
+#define CR8B    0x8B
+#define CR8C    0x8C
+#define CR8D    0x8D
+#define CR8E    0x8E
+#define CR8F    0x8F
+#define CR90    0x90
+#define CR91    0x91
+#define CR92    0x92
+#define CR93    0x93
+#define CR94    0x94
+#define CR95    0x95
+#define CR96    0x96
+#define CR97    0x97
+#define CR98    0x98
+#define CR99    0x99
+#define CR9A    0x9A
+#define CR9B    0x9B
+#define CR9C    0x9C
+#define CR9D    0x9D
+#define CR9E    0x9E
+#define CR9F    0x9F
+#define CRA0    0xA0
+#define CRA1    0xA1
+#define CRA2    0xA2
+#define CRA3    0xA3
+#define CRD2    0xD2
+#define CRD3    0xD3
+#define CRD4    0xD4
+
+/* LUT Table*/
+#define LUT_DATA             0x3C9      /* DACDATA */
+#define LUT_INDEX_READ       0x3C7      /* DACRX */
+#define LUT_INDEX_WRITE      0x3C8      /* DACWX */
+#define DACMASK              0x3C6
+
+/* Definition Device */
+#define DEVICE_CRT  0x01
+#define DEVICE_DVI  0x03
+#define DEVICE_LCD  0x04
+
+/* Device output interface */
+#define INTERFACE_NONE          0x00
+#define INTERFACE_ANALOG_RGB    0x01
+#define INTERFACE_DVP0          0x02
+#define INTERFACE_DVP1          0x03
+#define INTERFACE_DFP_HIGH      0x04
+#define INTERFACE_DFP_LOW       0x05
+#define INTERFACE_DFP           0x06
+#define INTERFACE_LVDS0         0x07
+#define INTERFACE_LVDS1         0x08
+#define INTERFACE_LVDS0LVDS1    0x09
+#define INTERFACE_TMDS          0x0A
+
+#define HW_LAYOUT_LCD_ONLY      0x01
+#define HW_LAYOUT_DVI_ONLY      0x02
+#define HW_LAYOUT_LCD_DVI       0x03
+#define HW_LAYOUT_LCD1_LCD2     0x04
+#define HW_LAYOUT_LCD_EXTERNAL_LCD2 0x10
+
+/* Definition Refresh Rate */
+#define REFRESH_50      50
+#define REFRESH_60      60
+#define REFRESH_75      75
+#define REFRESH_85      85
+#define REFRESH_100     100
+#define REFRESH_120     120
+
+/* Definition Sync Polarity*/
+#define NEGATIVE        1
+#define POSITIVE        0
+
+/*480x640@60 Sync Polarity (GTF)
+*/
+#define M480X640_R60_HSP        NEGATIVE
+#define M480X640_R60_VSP        POSITIVE
+
+/*640x480@60 Sync Polarity (VESA Mode)
+*/
+#define M640X480_R60_HSP        NEGATIVE
+#define M640X480_R60_VSP        NEGATIVE
+
+/*640x480@75 Sync Polarity (VESA Mode)
+*/
+#define M640X480_R75_HSP        NEGATIVE
+#define M640X480_R75_VSP        NEGATIVE
+
+/*640x480@85 Sync Polarity (VESA Mode)
+*/
+#define M640X480_R85_HSP        NEGATIVE
+#define M640X480_R85_VSP        NEGATIVE
+
+/*640x480@100 Sync Polarity (GTF Mode)
+*/
+#define M640X480_R100_HSP       NEGATIVE
+#define M640X480_R100_VSP       POSITIVE
+
+/*640x480@120 Sync Polarity (GTF Mode)
+*/
+#define M640X480_R120_HSP       NEGATIVE
+#define M640X480_R120_VSP       POSITIVE
+
+/*720x480@60 Sync Polarity  (GTF Mode)
+*/
+#define M720X480_R60_HSP        NEGATIVE
+#define M720X480_R60_VSP        POSITIVE
+
+/*720x576@60 Sync Polarity  (GTF Mode)
+*/
+#define M720X576_R60_HSP        NEGATIVE
+#define M720X576_R60_VSP        POSITIVE
+
+/*800x600@60 Sync Polarity (VESA Mode)
+*/
+#define M800X600_R60_HSP        POSITIVE
+#define M800X600_R60_VSP        POSITIVE
+
+/*800x600@75 Sync Polarity (VESA Mode)
+*/
+#define M800X600_R75_HSP        POSITIVE
+#define M800X600_R75_VSP        POSITIVE
+
+/*800x600@85 Sync Polarity (VESA Mode)
+*/
+#define M800X600_R85_HSP        POSITIVE
+#define M800X600_R85_VSP        POSITIVE
+
+/*800x600@100 Sync Polarity (GTF Mode)
+*/
+#define M800X600_R100_HSP       NEGATIVE
+#define M800X600_R100_VSP       POSITIVE
+
+/*800x600@120 Sync Polarity (GTF Mode)
+*/
+#define M800X600_R120_HSP       NEGATIVE
+#define M800X600_R120_VSP       POSITIVE
+
+/*800x480@60 Sync Polarity  (CVT Mode)
+*/
+#define M800X480_R60_HSP        NEGATIVE
+#define M800X480_R60_VSP        POSITIVE
+
+/*848x480@60 Sync Polarity  (CVT Mode)
+*/
+#define M848X480_R60_HSP        NEGATIVE
+#define M848X480_R60_VSP        POSITIVE
+
+/*852x480@60 Sync Polarity  (GTF Mode)
+*/
+#define M852X480_R60_HSP        NEGATIVE
+#define M852X480_R60_VSP        POSITIVE
+
+/*1024x512@60 Sync Polarity (GTF Mode)
+*/
+#define M1024X512_R60_HSP       NEGATIVE
+#define M1024X512_R60_VSP       POSITIVE
+
+/*1024x600@60 Sync Polarity (GTF Mode)
+*/
+#define M1024X600_R60_HSP       NEGATIVE
+#define M1024X600_R60_VSP       POSITIVE
+
+/*1024x768@60 Sync Polarity (VESA Mode)
+*/
+#define M1024X768_R60_HSP       NEGATIVE
+#define M1024X768_R60_VSP       NEGATIVE
+
+/*1024x768@75 Sync Polarity (VESA Mode)
+*/
+#define M1024X768_R75_HSP       POSITIVE
+#define M1024X768_R75_VSP       POSITIVE
+
+/*1024x768@85 Sync Polarity (VESA Mode)
+*/
+#define M1024X768_R85_HSP       POSITIVE
+#define M1024X768_R85_VSP       POSITIVE
+
+/*1024x768@100 Sync Polarity (GTF Mode)
+*/
+#define M1024X768_R100_HSP      NEGATIVE
+#define M1024X768_R100_VSP      POSITIVE
+
+/*1152x864@75 Sync Polarity (VESA Mode)
+*/
+#define M1152X864_R75_HSP       POSITIVE
+#define M1152X864_R75_VSP       POSITIVE
+
+/*1280x720@60 Sync Polarity  (GTF Mode)
+*/
+#define M1280X720_R60_HSP       NEGATIVE
+#define M1280X720_R60_VSP       POSITIVE
+
+/* 1280x768@50 Sync Polarity  (GTF Mode) */
+#define M1280X768_R50_HSP       NEGATIVE
+#define M1280X768_R50_VSP       POSITIVE
+
+/*1280x768@60 Sync Polarity  (GTF Mode)
+*/
+#define M1280X768_R60_HSP       NEGATIVE
+#define M1280X768_R60_VSP       POSITIVE
+
+/*1280x800@60 Sync Polarity  (CVT Mode)
+*/
+#define M1280X800_R60_HSP       NEGATIVE
+#define M1280X800_R60_VSP       POSITIVE
+
+/*1280x960@60 Sync Polarity (VESA Mode)
+*/
+#define M1280X960_R60_HSP       POSITIVE
+#define M1280X960_R60_VSP       POSITIVE
+
+/*1280x1024@60 Sync Polarity (VESA Mode)
+*/
+#define M1280X1024_R60_HSP      POSITIVE
+#define M1280X1024_R60_VSP      POSITIVE
+
+/* 1360x768@60 Sync Polarity (CVT Mode) */
+#define M1360X768_R60_HSP       POSITIVE
+#define M1360X768_R60_VSP       POSITIVE
+
+/* 1360x768@60 Sync Polarity (CVT Reduce Blanking Mode) */
+#define M1360X768_RB_R60_HSP       POSITIVE
+#define M1360X768_RB_R60_VSP       NEGATIVE
+
+/* 1368x768@50 Sync Polarity (GTF Mode) */
+#define M1368X768_R50_HSP       NEGATIVE
+#define M1368X768_R50_VSP       POSITIVE
+
+/* 1368x768@60 Sync Polarity (VESA Mode) */
+#define M1368X768_R60_HSP       NEGATIVE
+#define M1368X768_R60_VSP       POSITIVE
+
+/*1280x1024@75 Sync Polarity (VESA Mode)
+*/
+#define M1280X1024_R75_HSP      POSITIVE
+#define M1280X1024_R75_VSP      POSITIVE
+
+/*1280x1024@85 Sync Polarity (VESA Mode)
+*/
+#define M1280X1024_R85_HSP      POSITIVE
+#define M1280X1024_R85_VSP      POSITIVE
+
+/*1440x1050@60 Sync Polarity (GTF Mode)
+*/
+#define M1440X1050_R60_HSP      NEGATIVE
+#define M1440X1050_R60_VSP      POSITIVE
+
+/*1600x1200@60 Sync Polarity (VESA Mode)
+*/
+#define M1600X1200_R60_HSP      POSITIVE
+#define M1600X1200_R60_VSP      POSITIVE
+
+/*1600x1200@75 Sync Polarity (VESA Mode)
+*/
+#define M1600X1200_R75_HSP      POSITIVE
+#define M1600X1200_R75_VSP      POSITIVE
+
+/* 1680x1050@60 Sync Polarity (CVT Mode) */
+#define M1680x1050_R60_HSP      NEGATIVE
+#define M1680x1050_R60_VSP      NEGATIVE
+
+/* 1680x1050@60 Sync Polarity (CVT Reduce Blanking Mode) */
+#define M1680x1050_RB_R60_HSP      POSITIVE
+#define M1680x1050_RB_R60_VSP      NEGATIVE
+
+/* 1680x1050@75 Sync Polarity (CVT Mode) */
+#define M1680x1050_R75_HSP      NEGATIVE
+#define M1680x1050_R75_VSP      POSITIVE
+
+/*1920x1080@60 Sync Polarity (CVT Mode)
+*/
+#define M1920X1080_R60_HSP      NEGATIVE
+#define M1920X1080_R60_VSP      POSITIVE
+
+/* 1920x1080@60 Sync Polarity (CVT Reduce Blanking Mode) */
+#define M1920X1080_RB_R60_HSP  POSITIVE
+#define M1920X1080_RB_R60_VSP  NEGATIVE
+
+/*1920x1440@60 Sync Polarity (VESA Mode)
+*/
+#define M1920X1440_R60_HSP      NEGATIVE
+#define M1920X1440_R60_VSP      POSITIVE
+
+/*1920x1440@75 Sync Polarity (VESA Mode)
+*/
+#define M1920X1440_R75_HSP      NEGATIVE
+#define M1920X1440_R75_VSP      POSITIVE
+
+#if 0
+/* 1400x1050@60 Sync Polarity (VESA Mode) */
+#define M1400X1050_R60_HSP      NEGATIVE
+#define M1400X1050_R60_VSP      NEGATIVE
+#endif
+
+/* 1400x1050@60 Sync Polarity (CVT Mode) */
+#define M1400X1050_R60_HSP      NEGATIVE
+#define M1400X1050_R60_VSP      POSITIVE
+
+/* 1400x1050@60 Sync Polarity (CVT Reduce Blanking Mode) */
+#define M1400X1050_RB_R60_HSP      POSITIVE
+#define M1400X1050_RB_R60_VSP      NEGATIVE
+
+/* 1400x1050@75 Sync Polarity (CVT Mode) */
+#define M1400X1050_R75_HSP      NEGATIVE
+#define M1400X1050_R75_VSP      POSITIVE
+
+/* 960x600@60 Sync Polarity (CVT Mode) */
+#define M960X600_R60_HSP        NEGATIVE
+#define M960X600_R60_VSP        POSITIVE
+
+/* 1000x600@60 Sync Polarity (GTF Mode) */
+#define M1000X600_R60_HSP       NEGATIVE
+#define M1000X600_R60_VSP       POSITIVE
+
+/* 1024x576@60 Sync Polarity (GTF Mode) */
+#define M1024X576_R60_HSP       NEGATIVE
+#define M1024X576_R60_VSP       POSITIVE
+
+/*1024x600@60 Sync Polarity (GTF Mode)*/
+#define M1024X600_R60_HSP       NEGATIVE
+#define M1024X600_R60_VSP       POSITIVE
+
+/* 1088x612@60 Sync Polarity (CVT Mode) */
+#define M1088X612_R60_HSP       NEGATIVE
+#define M1088X612_R60_VSP       POSITIVE
+
+/* 1152x720@60 Sync Polarity (CVT Mode) */
+#define M1152X720_R60_HSP       NEGATIVE
+#define M1152X720_R60_VSP       POSITIVE
+
+/* 1200x720@60 Sync Polarity (GTF Mode) */
+#define M1200X720_R60_HSP       NEGATIVE
+#define M1200X720_R60_VSP       POSITIVE
+
+/* 1280x600@60 Sync Polarity (GTF Mode) */
+#define M1280x600_R60_HSP       NEGATIVE
+#define M1280x600_R60_VSP       POSITIVE
+
+/* 1280x720@50 Sync Polarity  (GTF Mode) */
+#define M1280X720_R50_HSP       NEGATIVE
+#define M1280X720_R50_VSP       POSITIVE
+
+/* 1280x720@60 Sync Polarity  (CEA Mode) */
+#define M1280X720_CEA_R60_HSP       POSITIVE
+#define M1280X720_CEA_R60_VSP       POSITIVE
+
+/* 1440x900@60 Sync Polarity (CVT Mode) */
+#define M1440X900_R60_HSP       NEGATIVE
+#define M1440X900_R60_VSP       POSITIVE
+
+/* 1440x900@75 Sync Polarity (CVT Mode) */
+#define M1440X900_R75_HSP       NEGATIVE
+#define M1440X900_R75_VSP       POSITIVE
+
+/* 1440x900@60 Sync Polarity (CVT Reduce Blanking Mode) */
+#define M1440X900_RB_R60_HSP       POSITIVE
+#define M1440X900_RB_R60_VSP       NEGATIVE
+
+/* 1600x900@60 Sync Polarity (CVT Mode) */
+#define M1600X900_R60_HSP       NEGATIVE
+#define M1600X900_R60_VSP       POSITIVE
+
+/* 1600x900@60 Sync Polarity (CVT Reduce Blanking Mode) */
+#define M1600X900_RB_R60_HSP       POSITIVE
+#define M1600X900_RB_R60_VSP       NEGATIVE
+
+/* 1600x1024@60 Sync Polarity (GTF Mode) */
+#define M1600X1024_R60_HSP      NEGATIVE
+#define M1600X1024_R60_VSP      POSITIVE
+
+/* 1792x1344@60 Sync Polarity (DMT Mode) */
+#define M1792x1344_R60_HSP      NEGATIVE
+#define M1792x1344_R60_VSP      POSITIVE
+
+/* 1856x1392@60 Sync Polarity (DMT Mode) */
+#define M1856x1392_R60_HSP      NEGATIVE
+#define M1856x1392_R60_VSP      POSITIVE
+
+/* 1920x1200@60 Sync Polarity (CVT Mode) */
+#define M1920X1200_R60_HSP      NEGATIVE
+#define M1920X1200_R60_VSP      POSITIVE
+
+/* 1920x1200@60 Sync Polarity (CVT Reduce Blanking Mode) */
+#define M1920X1200_RB_R60_HSP  POSITIVE
+#define M1920X1200_RB_R60_VSP  NEGATIVE
+
+/* 1920x1080@60 Sync Polarity  (CEA Mode) */
+#define M1920X1080_CEA_R60_HSP       POSITIVE
+#define M1920X1080_CEA_R60_VSP       POSITIVE
+
+/* 2048x1536@60 Sync Polarity (CVT Mode) */
+#define M2048x1536_R60_HSP      NEGATIVE
+#define M2048x1536_R60_VSP      POSITIVE
+
+/* define PLL index: */
+#define CLK_25_175M     25175000
+#define CLK_26_880M     26880000
+#define CLK_29_581M     29581000
+#define CLK_31_490M     31490000
+#define CLK_31_500M     31500000
+#define CLK_31_728M     31728000
+#define CLK_32_668M     32688000
+#define CLK_36_000M     36000000
+#define CLK_40_000M     40000000
+#define CLK_41_291M     41291000
+#define CLK_43_163M     43163000
+#define CLK_45_250M     45250000        /* 45.46MHz */
+#define CLK_46_000M     46000000
+#define CLK_46_996M     46996000
+#define CLK_48_000M     48000000
+#define CLK_48_875M     48875000
+#define CLK_49_500M     49500000
+#define CLK_52_406M     52406000
+#define CLK_52_977M     52977000
+#define CLK_56_250M     56250000
+#define CLK_60_466M     60466000
+#define CLK_61_500M     61500000
+#define CLK_65_000M     65000000
+#define CLK_65_178M     65178000
+#define CLK_66_750M     66750000        /* 67.116MHz */
+#define CLK_68_179M     68179000
+#define CLK_69_924M     69924000
+#define CLK_70_159M     70159000
+#define CLK_72_000M     72000000
+#define CLK_74_270M     74270000
+#define CLK_78_750M     78750000
+#define CLK_80_136M     80136000
+#define CLK_83_375M     83375000
+#define CLK_83_950M     83950000
+#define CLK_84_750M     84750000        /* 84.537Mhz */
+#define CLK_85_860M     85860000
+#define CLK_88_750M     88750000
+#define CLK_94_500M     94500000
+#define CLK_97_750M     97750000
+#define CLK_101_000M    101000000
+#define CLK_106_500M    106500000
+#define CLK_108_000M    108000000
+#define CLK_113_309M    113309000
+#define CLK_118_840M    118840000
+#define CLK_119_000M    119000000
+#define CLK_121_750M    121750000       /* 121.704MHz */
+#define CLK_125_104M    125104000
+#define CLK_133_308M    133308000
+#define CLK_135_000M    135000000
+#define CLK_136_700M    136700000
+#define CLK_138_400M    138400000
+#define CLK_146_760M    146760000
+#define CLK_148_500M    148500000
+
+#define CLK_153_920M    153920000
+#define CLK_156_000M    156000000
+#define CLK_157_500M    157500000
+#define CLK_162_000M    162000000
+#define CLK_187_000M    187000000
+#define CLK_193_295M    193295000
+#define CLK_202_500M    202500000
+#define CLK_204_000M    204000000
+#define CLK_218_500M    218500000
+#define CLK_234_000M    234000000
+#define CLK_267_250M    267250000
+#define CLK_297_500M    297500000
+#define CLK_74_481M     74481000
+#define CLK_172_798M    172798000
+#define CLK_122_614M    122614000
+
+/* CLE266 PLL value
+*/
+#define CLE266_PLL_25_175M     0x0000C763
+#define CLE266_PLL_26_880M     0x0000440F
+#define CLE266_PLL_29_581M     0x00008421
+#define CLE266_PLL_31_490M     0x00004721
+#define CLE266_PLL_31_500M     0x0000C3B5
+#define CLE266_PLL_31_728M     0x0000471F
+#define CLE266_PLL_32_668M     0x0000C449
+#define CLE266_PLL_36_000M     0x0000C5E5
+#define CLE266_PLL_40_000M     0x0000C459
+#define CLE266_PLL_41_291M     0x00004417
+#define CLE266_PLL_43_163M     0x0000C579
+#define CLE266_PLL_45_250M     0x0000C57F       /* 45.46MHz */
+#define CLE266_PLL_46_000M     0x0000875A
+#define CLE266_PLL_46_996M     0x0000C4E9
+#define CLE266_PLL_48_000M     0x00001443
+#define CLE266_PLL_48_875M     0x00001D63
+#define CLE266_PLL_49_500M     0x00008653
+#define CLE266_PLL_52_406M     0x0000C475
+#define CLE266_PLL_52_977M     0x00004525
+#define CLE266_PLL_56_250M     0x000047B7
+#define CLE266_PLL_60_466M     0x0000494C
+#define CLE266_PLL_61_500M     0x00001456
+#define CLE266_PLL_65_000M     0x000086ED
+#define CLE266_PLL_65_178M     0x0000855B
+#define CLE266_PLL_66_750M     0x0000844B       /* 67.116MHz */
+#define CLE266_PLL_68_179M     0x00000413
+#define CLE266_PLL_69_924M     0x00001153
+#define CLE266_PLL_70_159M     0x00001462
+#define CLE266_PLL_72_000M     0x00001879
+#define CLE266_PLL_74_270M     0x00004853
+#define CLE266_PLL_78_750M     0x00004321
+#define CLE266_PLL_80_136M     0x0000051C
+#define CLE266_PLL_83_375M     0x0000C25D
+#define CLE266_PLL_83_950M     0x00000729
+#define CLE266_PLL_84_750M     0x00008576       /* 84.537MHz */
+#define CLE266_PLL_85_860M     0x00004754
+#define CLE266_PLL_88_750M     0x0000051F
+#define CLE266_PLL_94_500M     0x00000521
+#define CLE266_PLL_97_750M     0x00004652
+#define CLE266_PLL_101_000M    0x0000497F
+#define CLE266_PLL_106_500M    0x00008477       /* 106.491463 MHz */
+#define CLE266_PLL_108_000M    0x00008479
+#define CLE266_PLL_113_309M    0x00000C5F
+#define CLE266_PLL_118_840M    0x00004553
+#define CLE266_PLL_119_000M    0x00000D6C
+#define CLE266_PLL_121_750M    0x00004555       /* 121.704MHz */
+#define CLE266_PLL_125_104M    0x000006B5
+#define CLE266_PLL_133_308M    0x0000465F
+#define CLE266_PLL_135_000M    0x0000455E
+#define CLE266_PLL_136_700M    0x00000C73
+#define CLE266_PLL_138_400M    0x00000957
+#define CLE266_PLL_146_760M    0x00004567
+#define CLE266_PLL_148_500M    0x00000853
+#define CLE266_PLL_153_920M    0x00000856
+#define CLE266_PLL_156_000M    0x0000456D
+#define CLE266_PLL_157_500M    0x000005B7
+#define CLE266_PLL_162_000M    0x00004571
+#define CLE266_PLL_187_000M    0x00000976
+#define CLE266_PLL_193_295M    0x0000086C
+#define CLE266_PLL_202_500M    0x00000763
+#define CLE266_PLL_204_000M    0x00000764
+#define CLE266_PLL_218_500M    0x0000065C
+#define CLE266_PLL_234_000M    0x00000662
+#define CLE266_PLL_267_250M    0x00000670
+#define CLE266_PLL_297_500M    0x000005E6
+#define CLE266_PLL_74_481M     0x0000051A
+#define CLE266_PLL_172_798M    0x00004579
+#define CLE266_PLL_122_614M    0x0000073C
+
+/* K800 PLL value
+*/
+#define K800_PLL_25_175M     0x00539001
+#define K800_PLL_26_880M     0x001C8C80
+#define K800_PLL_29_581M     0x00409080
+#define K800_PLL_31_490M     0x006F9001
+#define K800_PLL_31_500M     0x008B9002
+#define K800_PLL_31_728M     0x00AF9003
+#define K800_PLL_32_668M     0x00909002
+#define K800_PLL_36_000M     0x009F9002
+#define K800_PLL_40_000M     0x00578C02
+#define K800_PLL_41_291M     0x00438C01
+#define K800_PLL_43_163M     0x00778C03
+#define K800_PLL_45_250M     0x007D8C83 /* 45.46MHz */
+#define K800_PLL_46_000M     0x00658C02
+#define K800_PLL_46_996M     0x00818C83
+#define K800_PLL_48_000M     0x00848C83
+#define K800_PLL_48_875M     0x00508C81
+#define K800_PLL_49_500M     0x00518C01
+#define K800_PLL_52_406M     0x00738C02
+#define K800_PLL_52_977M     0x00928C83
+#define K800_PLL_56_250M     0x007C8C02
+#define K800_PLL_60_466M     0x00A78C83
+#define K800_PLL_61_500M     0x00AA8C83
+#define K800_PLL_65_000M     0x006B8C01
+#define K800_PLL_65_178M     0x00B48C83
+#define K800_PLL_66_750M     0x00948C82 /* 67.116MHz */
+#define K800_PLL_68_179M     0x00708C01
+#define K800_PLL_69_924M     0x00C18C83
+#define K800_PLL_70_159M     0x00C28C83
+#define K800_PLL_72_000M     0x009F8C82
+#define K800_PLL_74_270M     0x00ce0c03
+#define K800_PLL_78_750M     0x00408801
+#define K800_PLL_80_136M     0x00428801
+#define K800_PLL_83_375M     0x005B0882
+#define K800_PLL_83_950M     0x00738803
+#define K800_PLL_84_750M     0x00748883 /* 84.477MHz */
+#define K800_PLL_85_860M     0x00768883
+#define K800_PLL_88_750M     0x007A8883
+#define K800_PLL_94_500M     0x00828803
+#define K800_PLL_97_750M     0x00878883
+#define K800_PLL_101_000M    0x008B8883
+#define K800_PLL_106_500M    0x00758882 /* 106.491463 MHz */
+#define K800_PLL_108_000M    0x00778882
+#define K800_PLL_113_309M    0x005D8881
+#define K800_PLL_118_840M    0x00A48883
+#define K800_PLL_119_000M    0x00838882
+#define K800_PLL_121_750M    0x00A88883 /* 121.704MHz */
+#define K800_PLL_125_104M    0x00688801
+#define K800_PLL_133_308M    0x005D8801
+#define K800_PLL_135_000M    0x001A4081
+#define K800_PLL_136_700M    0x00BD8883
+#define K800_PLL_138_400M    0x00728881
+#define K800_PLL_146_760M    0x00CC8883
+#define K800_PLL_148_500M    0x00ce0803
+#define K800_PLL_153_920M    0x00548482
+#define K800_PLL_156_000M    0x006B8483
+#define K800_PLL_157_500M    0x00142080
+#define K800_PLL_162_000M    0x006F8483
+#define K800_PLL_187_000M    0x00818483
+#define K800_PLL_193_295M    0x004F8481
+#define K800_PLL_202_500M    0x00538481
+#define K800_PLL_204_000M    0x008D8483
+#define K800_PLL_218_500M    0x00978483
+#define K800_PLL_234_000M    0x00608401
+#define K800_PLL_267_250M    0x006E8481
+#define K800_PLL_297_500M    0x00A48402
+#define K800_PLL_74_481M     0x007B8C81
+#define K800_PLL_172_798M    0x00778483
+#define K800_PLL_122_614M    0x00878882
+
+/* PLL for VT3324 */
+#define CX700_25_175M     0x008B1003
+#define CX700_26_719M     0x00931003
+#define CX700_26_880M     0x00941003
+#define CX700_29_581M     0x00A49003
+#define CX700_31_490M     0x00AE1003
+#define CX700_31_500M     0x00AE1003
+#define CX700_31_728M     0x00AF1003
+#define CX700_32_668M     0x00B51003
+#define CX700_36_000M     0x00C81003
+#define CX700_40_000M     0x006E0C03
+#define CX700_41_291M     0x00710C03
+#define CX700_43_163M     0x00770C03
+#define CX700_45_250M     0x007D0C03    /* 45.46MHz */
+#define CX700_46_000M     0x007F0C03
+#define CX700_46_996M     0x00818C83
+#define CX700_48_000M     0x00840C03
+#define CX700_48_875M     0x00508C81
+#define CX700_49_500M     0x00880C03
+#define CX700_52_406M     0x00730C02
+#define CX700_52_977M     0x00920C03
+#define CX700_56_250M     0x009B0C03
+#define CX700_60_466M     0x00460C00
+#define CX700_61_500M     0x00AA0C03
+#define CX700_65_000M     0x006B0C01
+#define CX700_65_178M     0x006B0C01
+#define CX700_66_750M     0x00940C02    /*67.116MHz */
+#define CX700_68_179M     0x00BC0C03
+#define CX700_69_924M     0x00C10C03
+#define CX700_70_159M     0x00C20C03
+#define CX700_72_000M     0x009F0C02
+#define CX700_74_270M     0x00CE0C03
+#define CX700_74_481M     0x00CE0C03
+#define CX700_78_750M     0x006C0803
+#define CX700_80_136M     0x006E0803
+#define CX700_83_375M     0x005B0882
+#define CX700_83_950M     0x00730803
+#define CX700_84_750M     0x00740803    /* 84.537Mhz */
+#define CX700_85_860M     0x00760803
+#define CX700_88_750M     0x00AC8885
+#define CX700_94_500M     0x00820803
+#define CX700_97_750M     0x00870803
+#define CX700_101_000M    0x008B0803
+#define CX700_106_500M    0x00750802
+#define CX700_108_000M    0x00950803
+#define CX700_113_309M    0x005D0801
+#define CX700_118_840M    0x00A40803
+#define CX700_119_000M    0x00830802
+#define CX700_121_750M    0x00420800    /* 121.704MHz */
+#define CX700_125_104M    0x00AD0803
+#define CX700_133_308M    0x00930802
+#define CX700_135_000M    0x00950802
+#define CX700_136_700M    0x00BD0803
+#define CX700_138_400M    0x00720801
+#define CX700_146_760M    0x00CC0803
+#define CX700_148_500M    0x00a40802
+#define CX700_153_920M    0x00540402
+#define CX700_156_000M    0x006B0403
+#define CX700_157_500M    0x006C0403
+#define CX700_162_000M    0x006F0403
+#define CX700_172_798M    0x00770403
+#define CX700_187_000M    0x00810403
+#define CX700_193_295M    0x00850403
+#define CX700_202_500M    0x008C0403
+#define CX700_204_000M    0x008D0403
+#define CX700_218_500M    0x00970403
+#define CX700_234_000M    0x00600401
+#define CX700_267_250M    0x00B90403
+#define CX700_297_500M    0x00CE0403
+#define CX700_122_614M    0x00870802
+
+/* Definition CRTC Timing Index */
+#define H_TOTAL_INDEX               0
+#define H_ADDR_INDEX                1
+#define H_BLANK_START_INDEX         2
+#define H_BLANK_END_INDEX           3
+#define H_SYNC_START_INDEX          4
+#define H_SYNC_END_INDEX            5
+#define V_TOTAL_INDEX               6
+#define V_ADDR_INDEX                7
+#define V_BLANK_START_INDEX         8
+#define V_BLANK_END_INDEX           9
+#define V_SYNC_START_INDEX          10
+#define V_SYNC_END_INDEX            11
+#define H_TOTAL_SHADOW_INDEX        12
+#define H_BLANK_END_SHADOW_INDEX    13
+#define V_TOTAL_SHADOW_INDEX        14
+#define V_ADDR_SHADOW_INDEX         15
+#define V_BLANK_SATRT_SHADOW_INDEX  16
+#define V_BLANK_END_SHADOW_INDEX    17
+#define V_SYNC_SATRT_SHADOW_INDEX   18
+#define V_SYNC_END_SHADOW_INDEX     19
+
+/* Definition Video Mode Pixel Clock (picoseconds)
+*/
+#define RES_480X640_60HZ_PIXCLOCK    39722
+#define RES_640X480_60HZ_PIXCLOCK    39722
+#define RES_640X480_75HZ_PIXCLOCK    31747
+#define RES_640X480_85HZ_PIXCLOCK    27777
+#define RES_640X480_100HZ_PIXCLOCK   23168
+#define RES_640X480_120HZ_PIXCLOCK   19081
+#define RES_720X480_60HZ_PIXCLOCK    37020
+#define RES_720X576_60HZ_PIXCLOCK    30611
+#define RES_800X600_60HZ_PIXCLOCK    25000
+#define RES_800X600_75HZ_PIXCLOCK    20203
+#define RES_800X600_85HZ_PIXCLOCK    17777
+#define RES_800X600_100HZ_PIXCLOCK   14667
+#define RES_800X600_120HZ_PIXCLOCK   11912
+#define RES_800X480_60HZ_PIXCLOCK    33805
+#define RES_848X480_60HZ_PIXCLOCK    31756
+#define RES_856X480_60HZ_PIXCLOCK    31518
+#define RES_1024X512_60HZ_PIXCLOCK   24218
+#define RES_1024X600_60HZ_PIXCLOCK   20460
+#define RES_1024X768_60HZ_PIXCLOCK   15385
+#define RES_1024X768_75HZ_PIXCLOCK   12699
+#define RES_1024X768_85HZ_PIXCLOCK   10582
+#define RES_1024X768_100HZ_PIXCLOCK  8825
+#define RES_1152X864_75HZ_PIXCLOCK   9259
+#define RES_1280X768_60HZ_PIXCLOCK   12480
+#define RES_1280X800_60HZ_PIXCLOCK   11994
+#define RES_1280X960_60HZ_PIXCLOCK   9259
+#define RES_1280X1024_60HZ_PIXCLOCK  9260
+#define RES_1280X1024_75HZ_PIXCLOCK  7408
+#define RES_1280X768_85HZ_PIXCLOCK   6349
+#define RES_1440X1050_60HZ_PIXCLOCK  7993
+#define RES_1600X1200_60HZ_PIXCLOCK  6172
+#define RES_1600X1200_75HZ_PIXCLOCK  4938
+#define RES_1280X720_60HZ_PIXCLOCK   13426
+#define RES_1920X1080_60HZ_PIXCLOCK  5787
+#define RES_1400X1050_60HZ_PIXCLOCK  8214
+#define RES_1400X1050_75HZ_PIXCLOCK  6410
+#define RES_1368X768_60HZ_PIXCLOCK   11647
+#define RES_960X600_60HZ_PIXCLOCK      22099
+#define RES_1000X600_60HZ_PIXCLOCK    20834
+#define RES_1024X576_60HZ_PIXCLOCK    21278
+#define RES_1088X612_60HZ_PIXCLOCK    18877
+#define RES_1152X720_60HZ_PIXCLOCK    14981
+#define RES_1200X720_60HZ_PIXCLOCK    14253
+#define RES_1280X600_60HZ_PIXCLOCK    16260
+#define RES_1280X720_50HZ_PIXCLOCK    16538
+#define RES_1280X768_50HZ_PIXCLOCK    15342
+#define RES_1366X768_50HZ_PIXCLOCK    14301
+#define RES_1366X768_60HZ_PIXCLOCK    11646
+#define RES_1360X768_60HZ_PIXCLOCK    11799
+#define RES_1440X900_60HZ_PIXCLOCK    9390
+#define RES_1440X900_75HZ_PIXCLOCK    7315
+#define RES_1600X900_60HZ_PIXCLOCK    8415
+#define RES_1600X1024_60HZ_PIXCLOCK   7315
+#define RES_1680X1050_60HZ_PIXCLOCK   6814
+#define RES_1680X1050_75HZ_PIXCLOCK   5348
+#define RES_1792X1344_60HZ_PIXCLOCK   4902
+#define RES_1856X1392_60HZ_PIXCLOCK   4577
+#define RES_1920X1200_60HZ_PIXCLOCK   5173
+#define RES_1920X1440_60HZ_PIXCLOCK   4274
+#define RES_1920X1440_75HZ_PIXCLOCK   3367
+#define RES_2048X1536_60HZ_PIXCLOCK   3742
+
+#define RES_1360X768_RB_60HZ_PIXCLOCK 13889
+#define RES_1400X1050_RB_60HZ_PIXCLOCK 9901
+#define RES_1440X900_RB_60HZ_PIXCLOCK   11268
+#define RES_1600X900_RB_60HZ_PIXCLOCK   10230
+#define RES_1680X1050_RB_60HZ_PIXCLOCK 8403
+#define RES_1920X1080_RB_60HZ_PIXCLOCK 7225
+#define RES_1920X1200_RB_60HZ_PIXCLOCK 6497
+
+/* LCD display method
+*/
+#define     LCD_EXPANDSION              0x00
+#define     LCD_CENTERING               0x01
+
+/* LCD mode
+*/
+#define     LCD_OPENLDI               0x00
+#define     LCD_SPWG                  0x01
+
+/* Define display timing
+*/
+struct display_timing {
+        u16 hor_total;
+        u16 hor_addr;
+        u16 hor_blank_start;
+        u16 hor_blank_end;
+        u16 hor_sync_start;
+        u16 hor_sync_end;
+        u16 ver_total;
+        u16 ver_addr;
+        u16 ver_blank_start;
+        u16 ver_blank_end;
+        u16 ver_sync_start;
+        u16 ver_sync_end;
+};
+
+struct crt_mode_table {
+        int refresh_rate;
+        unsigned long clk;
+        int h_sync_polarity;
+        int v_sync_polarity;
+        struct display_timing crtc;
+};
+
+struct io_reg {
+        int port;
+        u8 index;
+        u8 mask;
+        u8 value;
+};
+
+#endif /* __SHARE_H__ */
diff --git a/drivers/video/via/tbl1636.c b/drivers/video/via/tbl1636.c
new file mode 100644
index 000000000000..2d8453429d4a
--- /dev/null
+++ b/drivers/video/via/tbl1636.c
@@ -0,0 +1,71 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include "global.h"
+struct IODATA COMMON_INIT_TBL_VT1636[] = {
+/*  Index, Mask, Value */
+        /* Set panel power sequence timing */
+        {0x10, 0xC0, 0x00},
+        /* T1: VDD on - Data on. Each increment is 1 ms. (50ms = 031h) */
+        {0x0B, 0xFF, 0x40},
+        /* T2: Data on - Backlight on. Each increment is 2 ms. (210ms = 068h) */
+        {0x0C, 0xFF, 0x31},
+        /* T3: Backlight off -Data off. Each increment is 2 ms. (210ms = 068h)*/
+        {0x0D, 0xFF, 0x31},
+        /* T4: Data off - VDD off. Each increment is 1 ms. (50ms = 031h) */
+        {0x0E, 0xFF, 0x68},
+        /* T5: VDD off - VDD on. Each increment is 100 ms. (500ms = 04h) */
+        {0x0F, 0xFF, 0x68},
+        /* LVDS output power up */
+        {0x09, 0xA0, 0xA0},
+        /* turn on back light */
+        {0x10, 0x33, 0x13}
+};
+
+struct IODATA DUAL_CHANNEL_ENABLE_TBL_VT1636[] = {
+/*  Index, Mask, Value */
+        {0x08, 0xF0, 0xE0}      /* Input Data Mode Select */
+};
+
+struct IODATA SINGLE_CHANNEL_ENABLE_TBL_VT1636[] = {
+/*  Index, Mask, Value */
+        {0x08, 0xF0, 0x00}      /* Input Data Mode Select */
+};
+
+struct IODATA DITHERING_ENABLE_TBL_VT1636[] = {
+/*  Index, Mask, Value */
+        {0x0A, 0x70, 0x50}
+};
+
+struct IODATA DITHERING_DISABLE_TBL_VT1636[] = {
+/*  Index, Mask, Value */
+        {0x0A, 0x70, 0x00}
+};
+
+struct IODATA VDD_ON_TBL_VT1636[] = {
+/*  Index, Mask, Value */
+        {0x10, 0x20, 0x20}
+};
+
+struct IODATA VDD_OFF_TBL_VT1636[] = {
+/*  Index, Mask, Value */
+        {0x10, 0x20, 0x00}
+};
diff --git a/drivers/video/via/tbl1636.h b/drivers/video/via/tbl1636.h
new file mode 100644
index 000000000000..d906055f1511
--- /dev/null
+++ b/drivers/video/via/tbl1636.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef _TBL1636_H_
+#define _TBL1636_H_
+#include "hw.h"
+
+extern struct IODATA COMMON_INIT_TBL_VT1636[8];
+extern struct IODATA DUAL_CHANNEL_ENABLE_TBL_VT1636[1];
+extern struct IODATA SINGLE_CHANNEL_ENABLE_TBL_VT1636[1];
+extern struct IODATA DITHERING_ENABLE_TBL_VT1636[1];
+extern struct IODATA DITHERING_DISABLE_TBL_VT1636[1];
+extern struct IODATA VDD_ON_TBL_VT1636[1];
+extern struct IODATA VDD_OFF_TBL_VT1636[1];
+
+#endif /* _VIA_TBL1636_H_ */
diff --git a/drivers/video/via/tblDPASetting.c b/drivers/video/via/tblDPASetting.c
new file mode 100644
index 000000000000..0c4c8cc712f4
--- /dev/null
+++ b/drivers/video/via/tblDPASetting.c
@@ -0,0 +1,109 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include "global.h"
+/* For VT3324: */
+struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3324[] = {
+        /* Panel ID,       CLK_SEL_ST1[09],    CLK_SEL_ST2[08] */
+        {LCD_PANEL_ID0_640X480, 0x00, 0x00},    /* For 640x480   */
+        {LCD_PANEL_ID1_800X600, 0x00, 0x00},    /* For 800x600   */
+        {LCD_PANEL_ID2_1024X768, 0x00, 0x00},   /* For 1024x768  */
+        {LCD_PANEL_ID3_1280X768, 0x00, 0x00},   /* For 1280x768  */
+        {LCD_PANEL_ID4_1280X1024, 0x00, 0x00},  /* For 1280x1024 */
+        {LCD_PANEL_ID5_1400X1050, 0x00, 0x00},  /* For 1400x1050 */
+        {LCD_PANEL_ID6_1600X1200, 0x0B, 0x03}   /* For 1600x1200 */
+};
+
+struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3324[] = {
+/*  ClkRange, DVP0, DVP0DataDriving,  DVP0ClockDriving, DVP1,
+                                        DVP1Driving, DFPHigh, DFPLow */
+/*  CR96, SR2A[5], SR1B[1], SR2A[4], SR1E[2], CR9B,
+                                        SR65,        CR97,    CR99   */
+        /* LCK/VCK < 30000000 will use this value */
+        {DPA_CLK_RANGE_30M, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
+         0x00},
+        /* 30000000 < LCK/VCK < 50000000 will use this value */
+        {DPA_CLK_RANGE_30_50M, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
+         0x00},
+        /* 50000000 < LCK/VCK < 70000000 will use this value */
+        {DPA_CLK_RANGE_50_70M, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
+         0x00},
+        /* 70000000 < LCK/VCK < 100000000 will use this value */
+        {DPA_CLK_RANGE_70_100M, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
+         0x00},
+        /* 100000000 < LCK/VCK < 15000000 will use this value */
+        {DPA_CLK_RANGE_100_150M, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00,
+         0x00},
+        /* 15000000 < LCK/VCK will use this value */
+        {DPA_CLK_RANGE_150M, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0E, 0x00,
+         0x00},
+};
+
+/* For VT3327: */
+struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3327[] = {
+        /* Panel ID,       CLK_SEL_ST1[09],    CLK_SEL_ST2[08] */
+        {LCD_PANEL_ID0_640X480, 0x00, 0x00},    /* For 640x480   */
+        {LCD_PANEL_ID1_800X600, 0x00, 0x00},    /* For 800x600   */
+        {LCD_PANEL_ID2_1024X768, 0x00, 0x00},   /* For 1024x768  */
+        {LCD_PANEL_ID3_1280X768, 0x00, 0x00},   /* For 1280x768  */
+        {LCD_PANEL_ID4_1280X1024, 0x00, 0x00},  /* For 1280x1024 */
+        {LCD_PANEL_ID5_1400X1050, 0x00, 0x00},  /* For 1400x1050 */
+        {LCD_PANEL_ID6_1600X1200, 0x00, 0x00}   /* For 1600x1200 */
+};
+
+struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3327[] = {
+/*  ClkRange,DVP0, DVP0DataDriving,  DVP0ClockDriving, DVP1,
+                                        DVP1Driving, DFPHigh,   DFPLow */
+/*   CR96, SR2A[5], SR1B[1], SR2A[4], SR1E[2], CR9B,
+                                        SR65,        CR97,      CR99   */
+/* LCK/VCK < 30000000 will use this value */
+{DPA_CLK_RANGE_30M, 0x07, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x08, 0x01},
+/* 30000000 < LCK/VCK < 50000000 will use this value */
+{DPA_CLK_RANGE_30_50M, 0x07, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x08, 0x01},
+/* 50000000 < LCK/VCK < 70000000 will use this value */
+{DPA_CLK_RANGE_50_70M, 0x06, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x08, 0x01},
+/* 70000000 < LCK/VCK < 100000000 will use this value */
+{DPA_CLK_RANGE_70_100M, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x08, 0x03},
+/* 100000000 < LCK/VCK < 15000000 will use this value */
+{DPA_CLK_RANGE_100_150M, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x01, 0x02},
+/* 15000000 < LCK/VCK will use this value */
+{DPA_CLK_RANGE_150M, 0x00, 0x20, 0x00, 0x10, 0x00, 0x03, 0x00, 0x0D, 0x03},
+};
+
+/* For VT3364: */
+struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3364[] = {
+/*  ClkRange,DVP0, DVP0DataDriving,  DVP0ClockDriving, DVP1,
+                                        DVP1Driving, DFPHigh,   DFPLow */
+/*   CR96, SR2A[5], SR1B[1], SR2A[4], SR1E[2], CR9B,
+                                        SR65,        CR97,      CR99   */
+/* LCK/VCK < 30000000 will use this value */
+{DPA_CLK_RANGE_30M, 0x07, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x08},
+/* 30000000 < LCK/VCK < 50000000 will use this value */
+{DPA_CLK_RANGE_30_50M, 0x07, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x08},
+/* 50000000 < LCK/VCK < 70000000 will use this value */
+{DPA_CLK_RANGE_50_70M, 0x07, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x08},
+/* 70000000 < LCK/VCK < 100000000 will use this value */
+{DPA_CLK_RANGE_70_100M, 0x07, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x08},
+/* 100000000 < LCK/VCK < 15000000 will use this value */
+{DPA_CLK_RANGE_100_150M, 0x03, 0x00, 0x02, 0x00, 0x00, 0x03, 0x00, 0x00, 0x08},
+/* 15000000 < LCK/VCK will use this value */
+{DPA_CLK_RANGE_150M, 0x01, 0x00, 0x02, 0x10, 0x00, 0x03, 0x00, 0x00, 0x08},
+};
diff --git a/drivers/video/via/tblDPASetting.h b/drivers/video/via/tblDPASetting.h
new file mode 100644
index 000000000000..b065a83481d3
--- /dev/null
+++ b/drivers/video/via/tblDPASetting.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef _TBLDPASETTING_H_
+#define _TBLDPASETTING_H_
+#include "global.h"
+
+#define DPA_CLK_30M       30000000
+#define DPA_CLK_50M       50000000
+#define DPA_CLK_70M       70000000
+#define DPA_CLK_100M      100000000
+#define DPA_CLK_150M      150000000
+
+enum DPA_RANGE {
+        DPA_CLK_RANGE_30M,
+        DPA_CLK_RANGE_30_50M,
+        DPA_CLK_RANGE_50_70M,
+        DPA_CLK_RANGE_70_100M,
+        DPA_CLK_RANGE_100_150M,
+        DPA_CLK_RANGE_150M
+};
+
+extern struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3324[7];
+extern struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3324[6];
+extern struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3327[7];
+extern struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3327[];
+extern struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3364[6];
+
+#endif
diff --git a/drivers/video/via/via_i2c.c b/drivers/video/via/via_i2c.c
new file mode 100644
index 000000000000..0f3ed4eb236d
--- /dev/null
+++ b/drivers/video/via/via_i2c.c
@@ -0,0 +1,177 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include "global.h"
+
+static void via_i2c_setscl(void *data, int state)
+{
+        u8 val;
+        struct via_i2c_stuff *via_i2c_chan = (struct via_i2c_stuff *)data;
+
+        val = viafb_read_reg(VIASR, via_i2c_chan->i2c_port) & 0xF0;
+        if (state)
+                val |= 0x20;
+        else
+                val &= ~0x20;
+        switch (via_i2c_chan->i2c_port) {
+        case I2CPORTINDEX:
+                val |= 0x01;
+                break;
+        case GPIOPORTINDEX:
+                val |= 0x80;
+                break;
+        default:
+                DEBUG_MSG("via_i2c: specify wrong i2c port.\n");
+        }
+        viafb_write_reg(via_i2c_chan->i2c_port, VIASR, val);
+}
+
+static int via_i2c_getscl(void *data)
+{
+        struct via_i2c_stuff *via_i2c_chan = (struct via_i2c_stuff *)data;
+
+        if (viafb_read_reg(VIASR, via_i2c_chan->i2c_port) & 0x08)
+                return 1;
+        return 0;
+}
+
+static int via_i2c_getsda(void *data)
+{
+        struct via_i2c_stuff *via_i2c_chan = (struct via_i2c_stuff *)data;
+
+        if (viafb_read_reg(VIASR, via_i2c_chan->i2c_port) & 0x04)
+                return 1;
+        return 0;
+}
+
+static void via_i2c_setsda(void *data, int state)
+{
+        u8 val;
+        struct via_i2c_stuff *via_i2c_chan = (struct via_i2c_stuff *)data;
+
+        val = viafb_read_reg(VIASR, via_i2c_chan->i2c_port) & 0xF0;
+        if (state)
+                val |= 0x10;
+        else
+                val &= ~0x10;
+        switch (via_i2c_chan->i2c_port) {
+        case I2CPORTINDEX:
+                val |= 0x01;
+                break;
+        case GPIOPORTINDEX:
+                val |= 0x40;
+                break;
+        default:
+                DEBUG_MSG("via_i2c: specify wrong i2c port.\n");
+        }
+        viafb_write_reg(via_i2c_chan->i2c_port, VIASR, val);
+}
+
+int viafb_i2c_readbyte(u8 slave_addr, u8 index, u8 *pdata)
+{
+        u8 mm1[] = {0x00};
+        struct i2c_msg msgs[2];
+
+        *pdata = 0;
+        msgs[0].flags = 0;
+        msgs[1].flags = I2C_M_RD;
+        msgs[0].addr = msgs[1].addr = slave_addr / 2;
+        mm1[0] = index;
+        msgs[0].len = 1; msgs[1].len = 1;
+        msgs[0].buf = mm1; msgs[1].buf = pdata;
+        i2c_transfer(&viaparinfo->i2c_stuff.adapter, msgs, 2);
+
+        return 0;
+}
+
+int viafb_i2c_writebyte(u8 slave_addr, u8 index, u8 data)
+{
+        u8 msg[2] = { index, data };
+        struct i2c_msg msgs;
+
+        msgs.flags = 0;
+        msgs.addr = slave_addr / 2;
+        msgs.len = 2;
+        msgs.buf = msg;
+        return i2c_transfer(&viaparinfo->i2c_stuff.adapter, &msgs, 1);
+}
+
+int viafb_i2c_readbytes(u8 slave_addr, u8 index, u8 *buff, int buff_len)
+{
+        u8 mm1[] = {0x00};
+        struct i2c_msg msgs[2];
+
+        msgs[0].flags = 0;
+        msgs[1].flags = I2C_M_RD;
+        msgs[0].addr = msgs[1].addr = slave_addr / 2;
+        mm1[0] = index;
+        msgs[0].len = 1; msgs[1].len = buff_len;
+        msgs[0].buf = mm1; msgs[1].buf = buff;
+        i2c_transfer(&viaparinfo->i2c_stuff.adapter, msgs, 2);
+        return 0;
+}
+
+int viafb_create_i2c_bus(void *viapar)
+{
+        int ret;
+        struct viafb_par *par = (struct viafb_par *)viapar;
+
+        strcpy(par->i2c_stuff.adapter.name, "via_i2c");
+        par->i2c_stuff.i2c_port = 0x0;
+        par->i2c_stuff.adapter.owner = THIS_MODULE;
+        par->i2c_stuff.adapter.id = 0x01FFFF;
+        par->i2c_stuff.adapter.class = 0;
+        par->i2c_stuff.adapter.algo_data = &par->i2c_stuff.algo;
+        par->i2c_stuff.adapter.dev.parent = NULL;
+        par->i2c_stuff.algo.setsda = via_i2c_setsda;
+        par->i2c_stuff.algo.setscl = via_i2c_setscl;
+        par->i2c_stuff.algo.getsda = via_i2c_getsda;
+        par->i2c_stuff.algo.getscl = via_i2c_getscl;
+        par->i2c_stuff.algo.udelay = 40;
+        par->i2c_stuff.algo.timeout = 20;
+        par->i2c_stuff.algo.data = &par->i2c_stuff;
+
+        i2c_set_adapdata(&par->i2c_stuff.adapter, &par->i2c_stuff);
+
+        /* Raise SCL and SDA */
+        par->i2c_stuff.i2c_port = I2CPORTINDEX;
+        via_i2c_setsda(&par->i2c_stuff, 1);
+        via_i2c_setscl(&par->i2c_stuff, 1);
+
+        par->i2c_stuff.i2c_port = GPIOPORTINDEX;
+        via_i2c_setsda(&par->i2c_stuff, 1);
+        via_i2c_setscl(&par->i2c_stuff, 1);
+        udelay(20);
+
+        ret = i2c_bit_add_bus(&par->i2c_stuff.adapter);
+        if (ret == 0)
+                DEBUG_MSG("I2C bus %s registered.\n",
+                par->i2c_stuff.adapter.name);
+        else
+                DEBUG_MSG("Failed to register I2C bus %s.\n",
+                        par->i2c_stuff.adapter.name);
+        return ret;
+}
+
+void viafb_delete_i2c_buss(void *par)
+{
+        i2c_del_adapter(&((struct viafb_par *)par)->i2c_stuff.adapter);
+}
diff --git a/drivers/video/via/via_i2c.h b/drivers/video/via/via_i2c.h
new file mode 100644
index 000000000000..3a13242a3152
--- /dev/null
+++ b/drivers/video/via/via_i2c.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+#ifndef __VIA_I2C_H__
+#define __VIA_I2C_H__
+
+#include <linux/i2c.h>
+#include <linux/i2c-algo-bit.h>
+
+struct via_i2c_stuff {
+        u16 i2c_port;                   /* GPIO or I2C port */
+        struct i2c_adapter adapter;
+        struct i2c_algo_bit_data algo;
+};
+
+#define I2CPORT           0x3c4
+#define I2CPORTINDEX      0x31
+#define GPIOPORT          0x3C4
+#define GPIOPORTINDEX     0x2C
+#define I2C_BUS             1
+#define GPIO_BUS            2
+#define DELAYPORT           0x3C3
+
+int viafb_i2c_readbyte(u8 slave_addr, u8 index, u8 *pdata);
+int viafb_i2c_writebyte(u8 slave_addr, u8 index, u8 data);
+int viafb_i2c_readbytes(u8 slave_addr, u8 index, u8 *buff, int buff_len);
+int viafb_create_i2c_bus(void *par);
+void viafb_delete_i2c_buss(void *par);
+#endif /* __VIA_I2C_H__ */
diff --git a/drivers/video/via/via_utility.c b/drivers/video/via/via_utility.c
new file mode 100644
index 000000000000..d53c3d54ed8e
--- /dev/null
+++ b/drivers/video/via/via_utility.c
@@ -0,0 +1,253 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include "global.h"
+
+void viafb_get_device_support_state(u32 *support_state)
+{
+        *support_state = CRT_Device;
+
+        if (viaparinfo->chip_info->tmds_chip_info.tmds_chip_name == VT1632_TMDS)
+                *support_state |= DVI_Device;
+
+        if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name == VT1631_LVDS)
+                *support_state |= LCD_Device;
+}
+
+void viafb_get_device_connect_state(u32 *connect_state)
+{
+        bool mobile = false;
+
+        *connect_state = CRT_Device;
+
+        if (viafb_dvi_sense())
+                *connect_state |= DVI_Device;
+
+        viafb_lcd_get_mobile_state(&mobile);
+        if (mobile)
+                *connect_state |= LCD_Device;
+}
+
+bool viafb_lcd_get_support_expand_state(u32 xres, u32 yres)
+{
+        unsigned int support_state = 0;
+
+        switch (viafb_lcd_panel_id) {
+        case LCD_PANEL_ID0_640X480:
+                if ((xres < 640) && (yres < 480))
+                        support_state = true;
+                break;
+
+        case LCD_PANEL_ID1_800X600:
+                if ((xres < 800) && (yres < 600))
+                        support_state = true;
+                break;
+
+        case LCD_PANEL_ID2_1024X768:
+                if ((xres < 1024) && (yres < 768))
+                        support_state = true;
+                break;
+
+        case LCD_PANEL_ID3_1280X768:
+                if ((xres < 1280) && (yres < 768))
+                        support_state = true;
+                break;
+
+        case LCD_PANEL_ID4_1280X1024:
+                if ((xres < 1280) && (yres < 1024))
+                        support_state = true;
+                break;
+
+        case LCD_PANEL_ID5_1400X1050:
+                if ((xres < 1400) && (yres < 1050))
+                        support_state = true;
+                break;
+
+        case LCD_PANEL_ID6_1600X1200:
+                if ((xres < 1600) && (yres < 1200))
+                        support_state = true;
+                break;
+
+        case LCD_PANEL_ID7_1366X768:
+                if ((xres < 1366) && (yres < 768))
+                        support_state = true;
+                break;
+
+        case LCD_PANEL_ID8_1024X600:
+                if ((xres < 1024) && (yres < 600))
+                        support_state = true;
+                break;
+
+        case LCD_PANEL_ID9_1280X800:
+                if ((xres < 1280) && (yres < 800))
+                        support_state = true;
+                break;
+
+        case LCD_PANEL_IDA_800X480:
+                if ((xres < 800) && (yres < 480))
+                        support_state = true;
+                break;
+
+        case LCD_PANEL_IDB_1360X768:
+                if ((xres < 1360) && (yres < 768))
+                        support_state = true;
+                break;
+
+        case LCD_PANEL_IDC_480X640:
+                if ((xres < 480) && (yres < 640))
+                        support_state = true;
+                break;
+
+        default:
+                support_state = false;
+                break;
+        }
+
+        return support_state;
+}
+
+/*====================================================================*/
+/*                      Gamma Function Implementation*/
+/*====================================================================*/
+
+void viafb_set_gamma_table(int bpp, unsigned int *gamma_table)
+{
+        int i, sr1a;
+        int active_device_amount = 0;
+        int device_status = viafb_DeviceStatus;
+
+        for (i = 0; i < sizeof(viafb_DeviceStatus) * 8; i++) {
+                if (device_status & 1)
+                        active_device_amount++;
+                device_status >>= 1;
+        }
+
+        /* 8 bpp mode can't adjust gamma */
+        if (bpp == 8)
+                return ;
+
+        /* Enable Gamma */
+        switch (viaparinfo->chip_info->gfx_chip_name) {
+        case UNICHROME_CLE266:
+        case UNICHROME_K400:
+                viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7);
+                break;
+
+        case UNICHROME_K800:
+        case UNICHROME_PM800:
+        case UNICHROME_CN700:
+        case UNICHROME_CX700:
+        case UNICHROME_K8M890:
+        case UNICHROME_P4M890:
+        case UNICHROME_P4M900:
+                viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7);
+                break;
+        }
+        sr1a = (unsigned int)viafb_read_reg(VIASR, SR1A);
+        viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0);
+
+        /* Fill IGA1 Gamma Table */
+        outb(0, LUT_INDEX_WRITE);
+        for (i = 0; i < 256; i++) {
+                outb(gamma_table[i] >> 16, LUT_DATA);
+                outb(gamma_table[i] >> 8 & 0xFF, LUT_DATA);
+                outb(gamma_table[i] & 0xFF, LUT_DATA);
+        }
+
+        /* If adjust Gamma value in SAMM, fill IGA1,
+           IGA2 Gamma table simultanous. */
+        /* Switch to IGA2 Gamma Table */
+        if ((active_device_amount > 1) &&
+                !((viaparinfo->chip_info->gfx_chip_name ==
+                UNICHROME_CLE266) &&
+                (viaparinfo->chip_info->gfx_chip_revision < 15))) {
+                viafb_write_reg_mask(SR1A, VIASR, 0x01, BIT0);
+                viafb_write_reg_mask(CR6A, VIACR, 0x02, BIT1);
+
+                /* Fill IGA2 Gamma Table */
+                outb(0, LUT_INDEX_WRITE);
+                for (i = 0; i < 256; i++) {
+                        outb(gamma_table[i] >> 16, LUT_DATA);
+                        outb(gamma_table[i] >> 8 & 0xFF, LUT_DATA);
+                        outb(gamma_table[i] & 0xFF, LUT_DATA);
+                }
+        }
+        viafb_write_reg(SR1A, VIASR, sr1a);
+}
+
+void viafb_get_gamma_table(unsigned int *gamma_table)
+{
+        unsigned char color_r, color_g, color_b;
+        unsigned char sr1a = 0;
+        int i;
+
+        /* Enable Gamma */
+        switch (viaparinfo->chip_info->gfx_chip_name) {
+        case UNICHROME_CLE266:
+        case UNICHROME_K400:
+                viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7);
+                break;
+
+        case UNICHROME_K800:
+        case UNICHROME_PM800:
+        case UNICHROME_CN700:
+        case UNICHROME_CX700:
+        case UNICHROME_K8M890:
+        case UNICHROME_P4M890:
+        case UNICHROME_P4M900:
+                viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7);
+                break;
+        }
+        sr1a = viafb_read_reg(VIASR, SR1A);
+        viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0);
+
+        /* Reading gamma table to get color value */
+        outb(0, LUT_INDEX_READ);
+        for (i = 0; i < 256; i++) {
+                color_r = inb(LUT_DATA);
+                color_g = inb(LUT_DATA);
+                color_b = inb(LUT_DATA);
+                gamma_table[i] =
+                    ((((u32) color_r) << 16) |
+                     (((u16) color_g) << 8)) | color_b;
+        }
+        viafb_write_reg(SR1A, VIASR, sr1a);
+}
+
+void viafb_get_gamma_support_state(int bpp, unsigned int *support_state)
+{
+        if (bpp == 8)
+                *support_state = None_Device;
+        else
+                *support_state = CRT_Device | DVI_Device | LCD_Device;
+}
+
+int viafb_input_parameter_converter(int parameter_value)
+{
+        int result;
+
+        if (parameter_value >= 1 && parameter_value <= 9)
+                result = 1 << (parameter_value - 1);
+        else
+                result = 1;
+
+        return result;
+}
diff --git a/drivers/video/via/via_utility.h b/drivers/video/via/via_utility.h
new file mode 100644
index 000000000000..2fd455202ebd
--- /dev/null
+++ b/drivers/video/via/via_utility.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+#ifndef __VIAUTILITY_H__
+#define __VIAUTILITY_H__
+
+/* These functions are used to get infomation about device's state */
+void viafb_get_device_support_state(u32 *support_state);
+void viafb_get_device_connect_state(u32 *connect_state);
+bool viafb_lcd_get_support_expand_state(u32 xres, u32 yres);
+
+/* These function are used to access gamma table */
+void viafb_set_gamma_table(int bpp, unsigned int *gamma_table);
+void viafb_get_gamma_table(unsigned int *gamma_table);
+void viafb_get_gamma_support_state(int bpp, unsigned int *support_state);
+int viafb_input_parameter_converter(int parameter_value);
+
+#endif /* __VIAUTILITY_H__ */
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c
new file mode 100644
index 000000000000..0132eae06f55
--- /dev/null
+++ b/drivers/video/via/viafbdev.c
@@ -0,0 +1,2571 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include <linux/module.h>
+#define _MASTER_FILE
+
+#include "global.h"
+
+static int MAX_CURS = 32;
+static struct fb_var_screeninfo default_var;
+static char *viafb_name = "Via";
+static u32 pseudo_pal[17];
+
+/* video mode */
+static char *viafb_mode = "640x480";
+static char *viafb_mode1 = "640x480";
+static int viafb_resMode = VIA_RES_640X480;
+
+/* Added for specifying active devices.*/
+char *viafb_active_dev = "";
+
+/* Added for specifying video on devices.*/
+char *viafb_video_dev = "";
+
+/*Added for specify lcd output port*/
+char *viafb_lcd_port = "";
+char *viafb_dvi_port = "";
+
+static void viafb_set_device(struct device_t active_dev);
+static int apply_device_setting(struct viafb_ioctl_setting setting_info,
+                         struct fb_info *info);
+static void apply_second_mode_setting(struct fb_var_screeninfo
+        *sec_var);
+static void retrieve_device_setting(struct viafb_ioctl_setting
+        *setting_info);
+static void viafb_set_video_device(u32 video_dev_info);
+static void viafb_get_video_device(u32 *video_dev_info);
+
+/* Mode information */
+static const struct viafb_modeinfo viafb_modentry[] = {
+        {480, 640, VIA_RES_480X640, "480x640"},
+        {640, 480, VIA_RES_640X480, "640x480"},
+        {800, 480, VIA_RES_800X480, "800x480"},
+        {800, 600, VIA_RES_800X600, "800x600"},
+        {1024, 768, VIA_RES_1024X768, "1024x768"},
+        {1152, 864, VIA_RES_1152X864, "1152x864"},
+        {1280, 1024, VIA_RES_1280X1024, "1280x1024"},
+        {1600, 1200, VIA_RES_1600X1200, "1600x1200"},
+        {1440, 1050, VIA_RES_1440X1050, "1440x1050"},
+        {1280, 768, VIA_RES_1280X768, "1280x768"},
+        {1280, 800, VIA_RES_1280X800, "1280x800"},
+        {1280, 960, VIA_RES_1280X960, "1280x960"},
+        {1920, 1440, VIA_RES_1920X1440, "1920x1440"},
+        {848, 480, VIA_RES_848X480, "848x480"},
+        {1400, 1050, VIA_RES_1400X1050, "1400x1050"},
+        {720, 480, VIA_RES_720X480, "720x480"},
+        {720, 576, VIA_RES_720X576, "720x576"},
+        {1024, 512, VIA_RES_1024X512, "1024x512"},
+        {1024, 576, VIA_RES_1024X576, "1024x576"},
+        {1024, 600, VIA_RES_1024X600, "1024x600"},
+        {1280, 720, VIA_RES_1280X720, "1280x720"},
+        {1920, 1080, VIA_RES_1920X1080, "1920x1080"},
+        {1366, 768, VIA_RES_1368X768, "1368x768"},
+        {1680, 1050, VIA_RES_1680X1050, "1680x1050"},
+        {960, 600, VIA_RES_960X600, "960x600"},
+        {1000, 600, VIA_RES_1000X600, "1000x600"},
+        {1024, 576, VIA_RES_1024X576, "1024x576"},
+        {1024, 600, VIA_RES_1024X600, "1024x600"},
+        {1088, 612, VIA_RES_1088X612, "1088x612"},
+        {1152, 720, VIA_RES_1152X720, "1152x720"},
+        {1200, 720, VIA_RES_1200X720, "1200x720"},
+        {1280, 600, VIA_RES_1280X600, "1280x600"},
+        {1360, 768, VIA_RES_1360X768, "1360x768"},
+        {1440, 900, VIA_RES_1440X900, "1440x900"},
+        {1600, 900, VIA_RES_1600X900, "1600x900"},
+        {1600, 1024, VIA_RES_1600X1024, "1600x1024"},
+        {1792, 1344, VIA_RES_1792X1344, "1792x1344"},
+        {1856, 1392, VIA_RES_1856X1392, "1856x1392"},
+        {1920, 1200, VIA_RES_1920X1200, "1920x1200"},
+        {2048, 1536, VIA_RES_2048X1536, "2048x1536"},
+        {0, 0, VIA_RES_INVALID, "640x480"}
+};
+
+static struct fb_ops viafb_ops;
+
+static int viafb_update_fix(struct fb_fix_screeninfo *fix, struct fb_info *info)
+{
+        struct viafb_par *ppar;
+        ppar = info->par;
+
+        DEBUG_MSG(KERN_INFO "viafb_update_fix!\n");
+
+        fix->visual =
+            ppar->bpp == 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
+        fix->line_length = ppar->linelength;
+
+        return 0;
+}
+
+
+static void viafb_setup_fixinfo(struct fb_fix_screeninfo *fix,
+        struct viafb_par *viaparinfo)
+{
+        memset(fix, 0, sizeof(struct fb_fix_screeninfo));
+        strcpy(fix->id, viafb_name);
+
+        fix->smem_start = viaparinfo->fbmem;
+        fix->smem_len = viaparinfo->fbmem_free;
+        fix->mmio_start = viaparinfo->mmio_base;
+        fix->mmio_len = viaparinfo->mmio_len;
+
+        fix->type = FB_TYPE_PACKED_PIXELS;
+        fix->type_aux = 0;
+
+        fix->xpanstep = fix->ywrapstep = 0;
+        fix->ypanstep = 1;
+
+        /* Just tell the accel name */
+        viafbinfo->fix.accel = FB_ACCEL_VIA_UNICHROME;
+}
+static int viafb_open(struct fb_info *info, int user)
+{
+        DEBUG_MSG(KERN_INFO "viafb_open!\n");
+        return 0;
+}
+
+static int viafb_release(struct fb_info *info, int user)
+{
+        DEBUG_MSG(KERN_INFO "viafb_release!\n");
+        return 0;
+}
+
+static void viafb_update_viafb_par(struct fb_info *info)
+{
+        struct viafb_par *ppar;
+
+        ppar = info->par;
+        ppar->bpp = info->var.bits_per_pixel;
+        ppar->linelength = ((info->var.xres_virtual + 7) & ~7) * ppar->bpp / 8;
+        ppar->hres = info->var.xres;
+        ppar->vres = info->var.yres;
+        ppar->xoffset = info->var.xoffset;
+        ppar->yoffset = info->var.yoffset;
+}
+
+static int viafb_check_var(struct fb_var_screeninfo *var,
+        struct fb_info *info)
+{
+        int vmode_index, htotal, vtotal;
+        struct viafb_par *ppar;
+        u32 long_refresh;
+        struct viafb_par *p_viafb_par;
+        ppar = info->par;
+
+
+        DEBUG_MSG(KERN_INFO "viafb_check_var!\n");
+        /* Sanity check */
+        /* HW neither support interlacte nor double-scaned mode */
+        if (var->vmode & FB_VMODE_INTERLACED || var->vmode & FB_VMODE_DOUBLE)
+                return -EINVAL;
+
+        vmode_index = viafb_get_mode_index(var->xres, var->yres, 0);
+        if (vmode_index == VIA_RES_INVALID) {
+                DEBUG_MSG(KERN_INFO
+                          "viafb: Mode %dx%dx%d not supported!!\n",
+                          var->xres, var->yres, var->bits_per_pixel);
+                return -EINVAL;
+        }
+
+        if (24 == var->bits_per_pixel)
+                var->bits_per_pixel = 32;
+
+        if (var->bits_per_pixel != 8 && var->bits_per_pixel != 16 &&
+                var->bits_per_pixel != 32)
+                return -EINVAL;
+
+        if ((var->xres_virtual * (var->bits_per_pixel >> 3)) & 0x1F)
+                /*32 pixel alignment */
+                var->xres_virtual = (var->xres_virtual + 31) & ~31;
+        if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 >
+                ppar->memsize)
+                return -EINVAL;
+
+        /* Based on var passed in to calculate the refresh,
+         * because our driver use some modes special.
+         */
+        htotal = var->xres + var->left_margin +
+        var->right_margin + var->hsync_len;
+        vtotal = var->yres + var->upper_margin +
+                var->lower_margin + var->vsync_len;
+        long_refresh = 1000000000UL / var->pixclock * 1000;
+        long_refresh /= (htotal * vtotal);
+
+        viafb_refresh = viafb_get_refresh(var->xres, var->yres, long_refresh);
+
+        /* Adjust var according to our driver's own table */
+        viafb_fill_var_timing_info(var, viafb_refresh, vmode_index);
+
+        /* This is indeed a patch for VT3353 */
+        if (!info->par)
+                return -1;
+        p_viafb_par = (struct viafb_par *)info->par;
+        if (p_viafb_par->chip_info->gfx_chip_name == UNICHROME_VX800)
+                var->accel_flags = 0;
+
+        return 0;
+}
+
+static int viafb_set_par(struct fb_info *info)
+{
+        int vmode_index;
+        int vmode_index1 = 0;
+        DEBUG_MSG(KERN_INFO "viafb_set_par!\n");
+
+        viafb_update_device_setting(info->var.xres, info->var.yres,
+                              info->var.bits_per_pixel, viafb_refresh, 0);
+
+        vmode_index = viafb_get_mode_index(info->var.xres, info->var.yres, 0);
+
+        if (viafb_SAMM_ON == 1) {
+                DEBUG_MSG(KERN_INFO
+                "viafb_second_xres = %d, viafb_second_yres = %d, bpp = %d\n",
+                          viafb_second_xres, viafb_second_yres, viafb_bpp1);
+                vmode_index1 = viafb_get_mode_index(viafb_second_xres,
+                        viafb_second_yres, 1);
+                DEBUG_MSG(KERN_INFO "->viafb_SAMM_ON: index=%d\n",
+                        vmode_index1);
+
+                viafb_update_device_setting(viafb_second_xres,
+                        viafb_second_yres, viafb_bpp1, viafb_refresh1, 1);
+        }
+
+        if (vmode_index != VIA_RES_INVALID) {
+                viafb_setmode(vmode_index, info->var.xres, info->var.yres,
+                        info->var.bits_per_pixel, vmode_index1,
+                        viafb_second_xres, viafb_second_yres, viafb_bpp1);
+
+                /*We should set memory offset according virtual_x */
+                /*Fix me:put this function into viafb_setmode */
+                viafb_memory_pitch_patch(info);
+
+                /* Update ***fb_par information */
+                viafb_update_viafb_par(info);
+
+                /* Update other fixed information */
+                viafb_update_fix(&info->fix, info);
+                viafb_bpp = info->var.bits_per_pixel;
+                /* Update viafb_accel, it is necessary to our 2D accelerate */
+                viafb_accel = info->var.accel_flags;
+
+                if (viafb_accel)
+                        viafb_set_2d_color_depth(info->var.bits_per_pixel);
+        }
+
+        return 0;
+}
+
+/* Set one color register */
+static int viafb_setcolreg(unsigned regno, unsigned red, unsigned green,
+unsigned blue, unsigned transp, struct fb_info *info)
+{
+        u8 sr1a, sr1b, cr67, cr6a, rev = 0, shift = 10;
+        unsigned cmap_entries = (info->var.bits_per_pixel == 8) ? 256 : 16;
+        DEBUG_MSG(KERN_INFO "viafb_setcolreg!\n");
+        if (regno >= cmap_entries)
+                return 1;
+        if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name) {
+                /*
+                 * Read PCI bus 0,dev 0,function 0,index 0xF6 to get chip rev.
+                 */
+                outl(0x80000000 | (0xf6 & ~3), (unsigned long)0xCF8);
+                rev = (inl((unsigned long)0xCFC) >> ((0xf6 & 3) * 8)) & 0xff;
+        }
+        switch (info->var.bits_per_pixel) {
+        case 8:
+                outb(0x1A, 0x3C4);
+                sr1a = inb(0x3C5);
+                outb(0x1B, 0x3C4);
+                sr1b = inb(0x3C5);
+                outb(0x67, 0x3D4);
+                cr67 = inb(0x3D5);
+                outb(0x6A, 0x3D4);
+                cr6a = inb(0x3D5);
+
+                /* Map the 3C6/7/8/9 to the IGA2 */
+                outb(0x1A, 0x3C4);
+                outb(sr1a | 0x01, 0x3C5);
+                /* Second Display Engine colck always on */
+                outb(0x1B, 0x3C4);
+                outb(sr1b | 0x80, 0x3C5);
+                /* Second Display Color Depth 8 */
+                outb(0x67, 0x3D4);
+                outb(cr67 & 0x3F, 0x3D5);
+                outb(0x6A, 0x3D4);
+                /* Second Display Channel Reset CR6A[6]) */
+                outb(cr6a & 0xBF, 0x3D5);
+                /* Second Display Channel Enable CR6A[7] */
+                outb(cr6a | 0x80, 0x3D5);
+                /* Second Display Channel stop reset) */
+                outb(cr6a | 0x40, 0x3D5);
+
+                /* Bit mask of palette */
+                outb(0xFF, 0x3c6);
+                /* Write one register of IGA2 */
+                outb(regno, 0x3C8);
+                if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name &&
+                        rev >= 15) {
+                        shift = 8;
+                        viafb_write_reg_mask(CR6A, VIACR, BIT5, BIT5);
+                        viafb_write_reg_mask(SR15, VIASR, BIT7, BIT7);
+                } else {
+                        shift = 10;
+                        viafb_write_reg_mask(CR6A, VIACR, 0, BIT5);
+                        viafb_write_reg_mask(SR15, VIASR, 0, BIT7);
+                }
+                outb(red >> shift, 0x3C9);
+                outb(green >> shift, 0x3C9);
+                outb(blue >> shift, 0x3C9);
+
+                /* Map the 3C6/7/8/9 to the IGA1 */
+                outb(0x1A, 0x3C4);
+                outb(sr1a & 0xFE, 0x3C5);
+                /* Bit mask of palette */
+                outb(0xFF, 0x3c6);
+                /* Write one register of IGA1 */
+                outb(regno, 0x3C8);
+                outb(red >> shift, 0x3C9);
+                outb(green >> shift, 0x3C9);
+                outb(blue >> shift, 0x3C9);
+
+                outb(0x1A, 0x3C4);
+                outb(sr1a, 0x3C5);
+                outb(0x1B, 0x3C4);
+                outb(sr1b, 0x3C5);
+                outb(0x67, 0x3D4);
+                outb(cr67, 0x3D5);
+                outb(0x6A, 0x3D4);
+                outb(cr6a, 0x3D5);
+                break;
+        case 16:
+                ((u32 *) info->pseudo_palette)[regno] = (red & 0xF800) |
+                    ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11);
+                break;
+        case 32:
+                ((u32 *) info->pseudo_palette)[regno] =
+                    ((transp & 0xFF00) << 16) |
+                    ((red & 0xFF00) << 8) |
+                    ((green & 0xFF00)) | ((blue & 0xFF00) >> 8);
+                break;
+        }
+
+        return 0;
+
+}
+
+/*CALLED BY: fb_set_cmap */
+/*           fb_set_var, pass 256 colors */
+/*CALLED BY: fb_set_cmap */
+/*           fbcon_set_palette, pass 16 colors */
+static int viafb_setcmap(struct fb_cmap *cmap, struct fb_info *info)
+{
+        u32 len = cmap->len;
+        u32 i;
+        u16 *pred = cmap->red;
+        u16 *pgreen = cmap->green;
+        u16 *pblue = cmap->blue;
+        u16 *ptransp = cmap->transp;
+        u8 sr1a, sr1b, cr67, cr6a, rev = 0, shift = 10;
+        if (len > 256)
+                return 1;
+        if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name) {
+                /*
+                 * Read PCI bus 0, dev 0, function 0, index 0xF6 to get chip
+                 * rev.
+                 */
+                outl(0x80000000 | (0xf6 & ~3), (unsigned long)0xCF8);
+                rev = (inl((unsigned long)0xCFC) >> ((0xf6 & 3) * 8)) & 0xff;
+        }
+        switch (info->var.bits_per_pixel) {
+        case 8:
+                outb(0x1A, 0x3C4);
+                sr1a = inb(0x3C5);
+                outb(0x1B, 0x3C4);
+                sr1b = inb(0x3C5);
+                outb(0x67, 0x3D4);
+                cr67 = inb(0x3D5);
+                outb(0x6A, 0x3D4);
+                cr6a = inb(0x3D5);
+                /* Map the 3C6/7/8/9 to the IGA2 */
+                outb(0x1A, 0x3C4);
+                outb(sr1a | 0x01, 0x3C5);
+                outb(0x1B, 0x3C4);
+                /* Second Display Engine colck always on */
+                outb(sr1b | 0x80, 0x3C5);
+                outb(0x67, 0x3D4);
+                /* Second Display Color Depth 8 */
+                outb(cr67 & 0x3F, 0x3D5);
+                outb(0x6A, 0x3D4);
+                /* Second Display Channel Reset CR6A[6]) */
+                outb(cr6a & 0xBF, 0x3D5);
+                /* Second Display Channel Enable CR6A[7] */
+                outb(cr6a | 0x80, 0x3D5);
+                /* Second Display Channel stop reset) */
+                outb(cr6a | 0xC0, 0x3D5);
+
+                /* Bit mask of palette */
+                outb(0xFF, 0x3c6);
+                outb(0x00, 0x3C8);
+                if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name &&
+                        rev >= 15) {
+                        shift = 8;
+                        viafb_write_reg_mask(CR6A, VIACR, BIT5, BIT5);
+                        viafb_write_reg_mask(SR15, VIASR, BIT7, BIT7);
+                } else {
+                        shift = 10;
+                        viafb_write_reg_mask(CR6A, VIACR, 0, BIT5);
+                        viafb_write_reg_mask(SR15, VIASR, 0, BIT7);
+                }
+                for (i = 0; i < len; i++) {
+                        outb((*(pred + i)) >> shift, 0x3C9);
+                        outb((*(pgreen + i)) >> shift, 0x3C9);
+                        outb((*(pblue + i)) >> shift, 0x3C9);
+                }
+
+                outb(0x1A, 0x3C4);
+                /* Map the 3C6/7/8/9 to the IGA1 */
+                outb(sr1a & 0xFE, 0x3C5);
+                /* Bit mask of palette */
+                outb(0xFF, 0x3c6);
+                outb(0x00, 0x3C8);
+                for (i = 0; i < len; i++) {
+                        outb((*(pred + i)) >> shift, 0x3C9);
+                        outb((*(pgreen + i)) >> shift, 0x3C9);
+                        outb((*(pblue + i)) >> shift, 0x3C9);
+                }
+
+                outb(0x1A, 0x3C4);
+                outb(sr1a, 0x3C5);
+                outb(0x1B, 0x3C4);
+                outb(sr1b, 0x3C5);
+                outb(0x67, 0x3D4);
+                outb(cr67, 0x3D5);
+                outb(0x6A, 0x3D4);
+                outb(cr6a, 0x3D5);
+                break;
+        case 16:
+                if (len > 17)
+                        return 0;       /* Because static u32 pseudo_pal[17]; */
+                for (i = 0; i < len; i++)
+                        ((u32 *) info->pseudo_palette)[i] =
+                            (*(pred + i) & 0xF800) |
+                            ((*(pgreen + i) & 0xFC00) >> 5) |
+                            ((*(pblue + i) & 0xF800) >> 11);
+                break;
+        case 32:
+                if (len > 17)
+                        return 0;
+                if (ptransp) {
+                        for (i = 0; i < len; i++)
+                                ((u32 *) info->pseudo_palette)[i] =
+                                    ((*(ptransp + i) & 0xFF00) << 16) |
+                                    ((*(pred + i) & 0xFF00) << 8) |
+                                    ((*(pgreen + i) & 0xFF00)) |
+                                    ((*(pblue + i) & 0xFF00) >> 8);
+                } else {
+                        for (i = 0; i < len; i++)
+                                ((u32 *) info->pseudo_palette)[i] =
+                                    0x00000000 |
+                                    ((*(pred + i) & 0xFF00) << 8) |
+                                    ((*(pgreen + i) & 0xFF00)) |
+                                    ((*(pblue + i) & 0xFF00) >> 8);
+                }
+                break;
+        }
+        return 0;
+}
+
+static int viafb_pan_display(struct fb_var_screeninfo *var,
+        struct fb_info *info)
+{
+        unsigned int offset;
+
+        DEBUG_MSG(KERN_INFO "viafb_pan_display!\n");
+
+        offset = (var->xoffset + (var->yoffset * var->xres_virtual)) *
+            var->bits_per_pixel / 16;
+
+        DEBUG_MSG(KERN_INFO "\nviafb_pan_display,offset =%d ", offset);
+
+        viafb_write_reg_mask(0x48, 0x3d4, ((offset >> 24) & 0x3), 0x3);
+        viafb_write_reg_mask(0x34, 0x3d4, ((offset >> 16) & 0xff), 0xff);
+        viafb_write_reg_mask(0x0c, 0x3d4, ((offset >> 8) & 0xff), 0xff);
+        viafb_write_reg_mask(0x0d, 0x3d4, (offset & 0xff), 0xff);
+
+        return 0;
+}
+
+static int viafb_blank(int blank_mode, struct fb_info *info)
+{
+        DEBUG_MSG(KERN_INFO "viafb_blank!\n");
+        /* clear DPMS setting */
+
+        switch (blank_mode) {
+        case FB_BLANK_UNBLANK:
+                /* Screen: On, HSync: On, VSync: On */
+                /* control CRT monitor power management */
+                viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5);
+                break;
+        case FB_BLANK_HSYNC_SUSPEND:
+                /* Screen: Off, HSync: Off, VSync: On */
+                /* control CRT monitor power management */
+                viafb_write_reg_mask(CR36, VIACR, 0x10, BIT4 + BIT5);
+                break;
+        case FB_BLANK_VSYNC_SUSPEND:
+                /* Screen: Off, HSync: On, VSync: Off */
+                /* control CRT monitor power management */
+                viafb_write_reg_mask(CR36, VIACR, 0x20, BIT4 + BIT5);
+                break;
+        case FB_BLANK_POWERDOWN:
+                /* Screen: Off, HSync: Off, VSync: Off */
+                /* control CRT monitor power management */
+                viafb_write_reg_mask(CR36, VIACR, 0x30, BIT4 + BIT5);
+                break;
+        }
+
+        return 0;
+}
+
+static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
+{
+        struct viafb_ioctl_mode viamode;
+        struct viafb_ioctl_samm viasamm;
+        struct viafb_driver_version driver_version;
+        struct fb_var_screeninfo sec_var;
+        struct _panel_size_pos_info panel_pos_size_para;
+        u32 state_info = 0;
+        u32 viainfo_size = sizeof(struct viafb_ioctl_info);
+        u32 *viafb_gamma_table;
+        char driver_name[] = "viafb";
+
+        u32 __user *argp = (u32 __user *) arg;
+        u32 gpu32;
+        u32 video_dev_info = 0;
+        struct viafb_ioctl_setting viafb_setting = {};
+        struct device_t active_dev = {};
+
+        DEBUG_MSG(KERN_INFO "viafb_ioctl: 0x%X !!\n", cmd);
+
+        switch (cmd) {
+        case VIAFB_GET_CHIP_INFO:
+                if (copy_to_user(argp, viaparinfo->chip_info,
+                                sizeof(struct chip_information)))
+                        return -EFAULT;
+                break;
+        case VIAFB_GET_INFO_SIZE:
+                return put_user(viainfo_size, argp);
+        case VIAFB_GET_INFO:
+                return viafb_ioctl_get_viafb_info(arg);
+        case VIAFB_HOTPLUG:
+                return put_user(viafb_ioctl_hotplug(info->var.xres,
+                                              info->var.yres,
+                                              info->var.bits_per_pixel), argp);
+        case VIAFB_SET_HOTPLUG_FLAG:
+                if (copy_from_user(&gpu32, argp, sizeof(gpu32)))
+                        return -EFAULT;
+                viafb_hotplug = (gpu32) ? 1 : 0;
+                break;
+        case VIAFB_GET_RESOLUTION:
+                viamode.xres = (u32) viafb_hotplug_Xres;
+                viamode.yres = (u32) viafb_hotplug_Yres;
+                viamode.refresh = (u32) viafb_hotplug_refresh;
+                viamode.bpp = (u32) viafb_hotplug_bpp;
+                if (viafb_SAMM_ON == 1) {
+                        viamode.xres_sec = viafb_second_xres;
+                        viamode.yres_sec = viafb_second_yres;
+                        viamode.virtual_xres_sec = viafb_second_virtual_xres;
+                        viamode.virtual_yres_sec = viafb_second_virtual_yres;
+                        viamode.refresh_sec = viafb_refresh1;
+                        viamode.bpp_sec = viafb_bpp1;
+                } else {
+                        viamode.xres_sec = 0;
+                        viamode.yres_sec = 0;
+                        viamode.virtual_xres_sec = 0;
+                        viamode.virtual_yres_sec = 0;
+                        viamode.refresh_sec = 0;
+                        viamode.bpp_sec = 0;
+                }
+                if (copy_to_user(argp, &viamode, sizeof(viamode)))
+                        return -EFAULT;
+                break;
+        case VIAFB_GET_SAMM_INFO:
+                viasamm.samm_status = viafb_SAMM_ON;
+
+                if (viafb_SAMM_ON == 1) {
+                        if (viafb_dual_fb) {
+                                viasamm.size_prim = viaparinfo->fbmem_free;
+                                viasamm.size_sec = viaparinfo1->fbmem_free;
+                        } else {
+                                if (viafb_second_size) {
+                                        viasamm.size_prim =
+                                            viaparinfo->fbmem_free -
+                                            viafb_second_size * 1024 * 1024;
+                                        viasamm.size_sec =
+                                            viafb_second_size * 1024 * 1024;
+                                } else {
+                                        viasamm.size_prim =
+                                            viaparinfo->fbmem_free >> 1;
+                                        viasamm.size_sec =
+                                            (viaparinfo->fbmem_free >> 1);
+                                }
+                        }
+                        viasamm.mem_base = viaparinfo->fbmem;
+                        viasamm.offset_sec = viafb_second_offset;
+                } else {
+                        viasamm.size_prim =
+                            viaparinfo->memsize - viaparinfo->fbmem_used;
+                        viasamm.size_sec = 0;
+                        viasamm.mem_base = viaparinfo->fbmem;
+                        viasamm.offset_sec = 0;
+                }
+
+                if (copy_to_user(argp, &viasamm, sizeof(viasamm)))
+                        return -EFAULT;
+
+                break;
+        case VIAFB_TURN_ON_OUTPUT_DEVICE:
+                if (copy_from_user(&gpu32, argp, sizeof(gpu32)))
+                        return -EFAULT;
+                if (gpu32 & CRT_Device)
+                        viafb_crt_enable();
+                if (gpu32 & DVI_Device)
+                        viafb_dvi_enable();
+                if (gpu32 & LCD_Device)
+                        viafb_lcd_enable();
+                break;
+        case VIAFB_TURN_OFF_OUTPUT_DEVICE:
+                if (copy_from_user(&gpu32, argp, sizeof(gpu32)))
+                        return -EFAULT;
+                if (gpu32 & CRT_Device)
+                        viafb_crt_disable();
+                if (gpu32 & DVI_Device)
+                        viafb_dvi_disable();
+                if (gpu32 & LCD_Device)
+                        viafb_lcd_disable();
+                break;
+        case VIAFB_SET_DEVICE:
+                if (copy_from_user(&active_dev, (void *)argp,
+                        sizeof(active_dev)))
+                        return -EFAULT;
+                viafb_set_device(active_dev);
+                viafb_set_par(info);
+                break;
+        case VIAFB_GET_DEVICE:
+                active_dev.crt = viafb_CRT_ON;
+                active_dev.dvi = viafb_DVI_ON;
+                active_dev.lcd = viafb_LCD_ON;
+                active_dev.samm = viafb_SAMM_ON;
+                active_dev.primary_dev = viafb_primary_dev;
+
+                active_dev.lcd_dsp_cent = viafb_lcd_dsp_method;
+                active_dev.lcd_panel_id = viafb_lcd_panel_id;
+                active_dev.lcd_mode = viafb_lcd_mode;
+
+                active_dev.xres = viafb_hotplug_Xres;
+                active_dev.yres = viafb_hotplug_Yres;
+
+                active_dev.xres1 = viafb_second_xres;
+                active_dev.yres1 = viafb_second_yres;
+
+                active_dev.bpp = viafb_bpp;
+                active_dev.bpp1 = viafb_bpp1;
+                active_dev.refresh = viafb_refresh;
+                active_dev.refresh1 = viafb_refresh1;
+
+                active_dev.epia_dvi = viafb_platform_epia_dvi;
+                active_dev.lcd_dual_edge = viafb_device_lcd_dualedge;
+                active_dev.bus_width = viafb_bus_width;
+
+                if (copy_to_user(argp, &active_dev, sizeof(active_dev)))
+                        return -EFAULT;
+                break;
+
+        case VIAFB_GET_DRIVER_VERSION:
+                driver_version.iMajorNum = VERSION_MAJOR;
+                driver_version.iKernelNum = VERSION_KERNEL;
+                driver_version.iOSNum = VERSION_OS;
+                driver_version.iMinorNum = VERSION_MINOR;
+
+                if (copy_to_user(argp, &driver_version,
+                        sizeof(driver_version)))
+                        return -EFAULT;
+
+                break;
+
+        case VIAFB_SET_DEVICE_INFO:
+                if (copy_from_user(&viafb_setting,
+                        argp, sizeof(viafb_setting)))
+                        return -EFAULT;
+                if (apply_device_setting(viafb_setting, info) < 0)
+                        return -EINVAL;
+
+                break;
+
+        case VIAFB_SET_SECOND_MODE:
+                if (copy_from_user(&sec_var, argp, sizeof(sec_var)))
+                        return -EFAULT;
+                apply_second_mode_setting(&sec_var);
+                break;
+
+        case VIAFB_GET_DEVICE_INFO:
+
+                retrieve_device_setting(&viafb_setting);
+
+                if (copy_to_user(argp, &viafb_setting, sizeof(viafb_setting)))
+                        return -EFAULT;
+
+                break;
+
+        case VIAFB_GET_DEVICE_SUPPORT:
+                viafb_get_device_support_state(&state_info);
+                if (put_user(state_info, argp))
+                        return -EFAULT;
+                break;
+
+        case VIAFB_GET_DEVICE_CONNECT:
+                viafb_get_device_connect_state(&state_info);
+                if (put_user(state_info, argp))
+                        return -EFAULT;
+                break;
+
+        case VIAFB_GET_PANEL_SUPPORT_EXPAND:
+                state_info =
+                    viafb_lcd_get_support_expand_state(info->var.xres,
+                                                 info->var.yres);
+                if (put_user(state_info, argp))
+                        return -EFAULT;
+                break;
+
+        case VIAFB_GET_DRIVER_NAME:
+                if (copy_to_user(argp, driver_name, sizeof(driver_name)))
+                        return -EFAULT;
+                break;
+
+        case VIAFB_SET_GAMMA_LUT:
+                viafb_gamma_table = kmalloc(256 * sizeof(u32), GFP_KERNEL);
+                if (!viafb_gamma_table)
+                        return -ENOMEM;
+                if (copy_from_user(viafb_gamma_table, argp,
+                                sizeof(viafb_gamma_table))) {
+                        kfree(viafb_gamma_table);
+                        return -EFAULT;
+                }
+                viafb_set_gamma_table(viafb_bpp, viafb_gamma_table);
+                kfree(viafb_gamma_table);
+                break;
+
+        case VIAFB_GET_GAMMA_LUT:
+                viafb_gamma_table = kmalloc(256 * sizeof(u32), GFP_KERNEL);
+                if (!viafb_gamma_table)
+                        return -ENOMEM;
+                viafb_get_gamma_table(viafb_gamma_table);
+                if (copy_to_user(argp, viafb_gamma_table,
+                        sizeof(viafb_gamma_table))) {
+                        kfree(viafb_gamma_table);
+                        return -EFAULT;
+                }
+                kfree(viafb_gamma_table);
+                break;
+
+        case VIAFB_GET_GAMMA_SUPPORT_STATE:
+                viafb_get_gamma_support_state(viafb_bpp, &state_info);
+                if (put_user(state_info, argp))
+                        return -EFAULT;
+                break;
+        case VIAFB_SET_VIDEO_DEVICE:
+                get_user(video_dev_info, argp);
+                viafb_set_video_device(video_dev_info);
+                break;
+        case VIAFB_GET_VIDEO_DEVICE:
+                viafb_get_video_device(&video_dev_info);
+                if (put_user(video_dev_info, argp))
+                        return -EFAULT;
+                break;
+        case VIAFB_SYNC_SURFACE:
+                DEBUG_MSG(KERN_INFO "lobo VIAFB_SYNC_SURFACE\n");
+                break;
+        case VIAFB_GET_DRIVER_CAPS:
+                break;
+
+        case VIAFB_GET_PANEL_MAX_SIZE:
+                if (copy_from_user
+                    (&panel_pos_size_para, argp, sizeof(panel_pos_size_para)))
+                        return -EFAULT;
+                panel_pos_size_para.x = panel_pos_size_para.y = 0;
+                if (copy_to_user(argp, &panel_pos_size_para,
+                     sizeof(panel_pos_size_para)))
+                        return -EFAULT;
+                break;
+        case VIAFB_GET_PANEL_MAX_POSITION:
+                if (copy_from_user
+                    (&panel_pos_size_para, argp, sizeof(panel_pos_size_para)))
+                        return -EFAULT;
+                panel_pos_size_para.x = panel_pos_size_para.y = 0;
+                if (copy_to_user(argp, &panel_pos_size_para,
+                     sizeof(panel_pos_size_para)))
+                        return -EFAULT;
+                break;
+
+        case VIAFB_GET_PANEL_POSITION:
+                if (copy_from_user
+                    (&panel_pos_size_para, argp, sizeof(panel_pos_size_para)))
+                        return -EFAULT;
+                panel_pos_size_para.x = panel_pos_size_para.y = 0;
+                if (copy_to_user(argp, &panel_pos_size_para,
+                     sizeof(panel_pos_size_para)))
+                        return -EFAULT;
+                break;
+        case VIAFB_GET_PANEL_SIZE:
+                if (copy_from_user
+                    (&panel_pos_size_para, argp, sizeof(panel_pos_size_para)))
+                        return -EFAULT;
+                panel_pos_size_para.x = panel_pos_size_para.y = 0;
+                if (copy_to_user(argp, &panel_pos_size_para,
+                     sizeof(panel_pos_size_para)))
+                        return -EFAULT;
+                break;
+
+        case VIAFB_SET_PANEL_POSITION:
+                if (copy_from_user
+                    (&panel_pos_size_para, argp, sizeof(panel_pos_size_para)))
+                        return -EFAULT;
+                break;
+        case VIAFB_SET_PANEL_SIZE:
+                if (copy_from_user
+                    (&panel_pos_size_para, argp, sizeof(panel_pos_size_para)))
+                        return -EFAULT;
+                break;
+
+        default:
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static void viafb_fillrect(struct fb_info *info,
+        const struct fb_fillrect *rect)
+{
+        u32 col = 0, rop = 0;
+        int pitch;
+
+        if (!viafb_accel)
+                return cfb_fillrect(info, rect);
+
+        if (!rect->width || !rect->height)
+                return;
+
+        switch (rect->rop) {
+        case ROP_XOR:
+                rop = 0x5A;
+                break;
+        case ROP_COPY:
+        default:
+                rop = 0xF0;
+                break;
+        }
+
+        switch (info->var.bits_per_pixel) {
+        case 8:
+                col = rect->color;
+                break;
+        case 16:
+                col = ((u32 *) (info->pseudo_palette))[rect->color];
+                break;
+        case 32:
+                col = ((u32 *) (info->pseudo_palette))[rect->color];
+                break;
+        }
+
+        /* BitBlt Source Address */
+        writel(0x0, viaparinfo->io_virt + VIA_REG_SRCPOS);
+        /* Source Base Address */
+        writel(0x0, viaparinfo->io_virt + VIA_REG_SRCBASE);
+        /* Destination Base Address */
+        writel(((unsigned long) (info->screen_base) -
+                   (unsigned long) viafb_FB_MM) >> 3,
+                   viaparinfo->io_virt + VIA_REG_DSTBASE);
+        /* Pitch */
+        pitch = (info->var.xres_virtual + 7) & ~7;
+        writel(VIA_PITCH_ENABLE |
+                   (((pitch *
+                      info->var.bits_per_pixel >> 3) >> 3) |
+                      (((pitch * info->
+                      var.bits_per_pixel >> 3) >> 3) << 16)),
+                      viaparinfo->io_virt + VIA_REG_PITCH);
+        /* BitBlt Destination Address */
+        writel(((rect->dy << 16) | rect->dx),
+                viaparinfo->io_virt + VIA_REG_DSTPOS);
+        /* Dimension: width & height */
+        writel((((rect->height - 1) << 16) | (rect->width - 1)),
+                viaparinfo->io_virt + VIA_REG_DIMENSION);
+        /* Forground color or Destination color */
+        writel(col, viaparinfo->io_virt + VIA_REG_FGCOLOR);
+        /* GE Command */
+        writel((0x01 | 0x2000 | (rop << 24)),
+                viaparinfo->io_virt + VIA_REG_GECMD);
+
+}
+
+static void viafb_copyarea(struct fb_info *info,
+        const struct fb_copyarea *area)
+{
+        u32 dy = area->dy, sy = area->sy, direction = 0x0;
+        u32 sx = area->sx, dx = area->dx, width = area->width;
+        int pitch;
+
+        DEBUG_MSG(KERN_INFO "viafb_copyarea!!\n");
+
+        if (!viafb_accel)
+                return cfb_copyarea(info, area);
+
+        if (!area->width || !area->height)
+                return;
+
+        if (sy < dy) {
+                dy += area->height - 1;
+                sy += area->height - 1;
+                direction |= 0x4000;
+        }
+
+        if (sx < dx) {
+                dx += width - 1;
+                sx += width - 1;
+                direction |= 0x8000;
+        }
+
+        /* Source Base Address */
+        writel(((unsigned long) (info->screen_base) -
+                   (unsigned long) viafb_FB_MM) >> 3,
+                   viaparinfo->io_virt + VIA_REG_SRCBASE);
+        /* Destination Base Address */
+        writel(((unsigned long) (info->screen_base) -
+                   (unsigned long) viafb_FB_MM) >> 3,
+                   viaparinfo->io_virt + VIA_REG_DSTBASE);
+        /* Pitch */
+        pitch = (info->var.xres_virtual + 7) & ~7;
+        /* VIA_PITCH_ENABLE can be omitted now. */
+        writel(VIA_PITCH_ENABLE |
+                   (((pitch *
+                      info->var.bits_per_pixel >> 3) >> 3) | (((pitch *
+                                                                info->var.
+                                                                bits_per_pixel
+                                                                >> 3) >> 3)
+                                                              << 16)),
+                                viaparinfo->io_virt + VIA_REG_PITCH);
+        /* BitBlt Source Address */
+        writel(((sy << 16) | sx), viaparinfo->io_virt + VIA_REG_SRCPOS);
+        /* BitBlt Destination Address */
+        writel(((dy << 16) | dx), viaparinfo->io_virt + VIA_REG_DSTPOS);
+        /* Dimension: width & height */
+        writel((((area->height - 1) << 16) | (area->width - 1)),
+                   viaparinfo->io_virt + VIA_REG_DIMENSION);
+        /* GE Command */
+        writel((0x01 | direction | (0xCC << 24)),
+                viaparinfo->io_virt + VIA_REG_GECMD);
+
+}
+
+static void viafb_imageblit(struct fb_info *info,
+        const struct fb_image *image)
+{
+        u32 size, bg_col = 0, fg_col = 0, *udata;
+        int i;
+        int pitch;
+
+        if (!viafb_accel)
+                return cfb_imageblit(info, image);
+
+        udata = (u32 *) image->data;
+
+        switch (info->var.bits_per_pixel) {
+        case 8:
+                bg_col = image->bg_color;
+                fg_col = image->fg_color;
+                break;
+        case 16:
+                bg_col = ((u32 *) (info->pseudo_palette))[image->bg_color];
+                fg_col = ((u32 *) (info->pseudo_palette))[image->fg_color];
+                break;
+        case 32:
+                bg_col = ((u32 *) (info->pseudo_palette))[image->bg_color];
+                fg_col = ((u32 *) (info->pseudo_palette))[image->fg_color];
+                break;
+        }
+        size = image->width * image->height;
+
+        /* Source Base Address */
+        writel(0x0, viaparinfo->io_virt + VIA_REG_SRCBASE);
+        /* Destination Base Address */
+        writel(((unsigned long) (info->screen_base) -
+                   (unsigned long) viafb_FB_MM) >> 3,
+                   viaparinfo->io_virt + VIA_REG_DSTBASE);
+        /* Pitch */
+        pitch = (info->var.xres_virtual + 7) & ~7;
+        writel(VIA_PITCH_ENABLE |
+                   (((pitch *
+                      info->var.bits_per_pixel >> 3) >> 3) | (((pitch *
+                                                                info->var.
+                                                                bits_per_pixel
+                                                                >> 3) >> 3)
+                                                              << 16)),
+                                viaparinfo->io_virt + VIA_REG_PITCH);
+        /* BitBlt Source Address */
+        writel(0x0, viaparinfo->io_virt + VIA_REG_SRCPOS);
+        /* BitBlt Destination Address */
+        writel(((image->dy << 16) | image->dx),
+                viaparinfo->io_virt + VIA_REG_DSTPOS);
+        /* Dimension: width & height */
+        writel((((image->height - 1) << 16) | (image->width - 1)),
+                   viaparinfo->io_virt + VIA_REG_DIMENSION);
+        /* fb color */
+        writel(fg_col, viaparinfo->io_virt + VIA_REG_FGCOLOR);
+        /* bg color */
+        writel(bg_col, viaparinfo->io_virt + VIA_REG_BGCOLOR);
+        /* GE Command */
+        writel(0xCC020142, viaparinfo->io_virt + VIA_REG_GECMD);
+
+        for (i = 0; i < size / 4; i++) {
+                writel(*udata, viaparinfo->io_virt + VIA_MMIO_BLTBASE);
+                udata++;
+        }
+
+}
+
+static int viafb_cursor(struct fb_info *info, struct fb_cursor *cursor)
+{
+        u8 data[CURSOR_SIZE / 8];
+        u32 data_bak[CURSOR_SIZE / 32];
+        u32 temp, xx, yy, bg_col = 0, fg_col = 0;
+        int size, i, j = 0;
+        static int hw_cursor;
+        struct viafb_par *p_viafb_par;
+
+        if (viafb_accel)
+                hw_cursor = 1;
+
+        if (!viafb_accel) {
+                if (hw_cursor) {
+                        viafb_show_hw_cursor(info, HW_Cursor_OFF);
+                        hw_cursor = 0;
+                }
+                return -ENODEV;
+        }
+
+        if ((((struct viafb_par *)(info->par))->iga_path == IGA2)
+            && (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266))
+                return -ENODEV;
+
+        /* When duoview and using lcd , use soft cursor */
+        if (viafb_LCD_ON || ((struct viafb_par *)(info->par))->duoview)
+                return -ENODEV;
+
+        viafb_show_hw_cursor(info, HW_Cursor_OFF);
+        viacursor = *cursor;
+
+        if (cursor->set & FB_CUR_SETHOT) {
+                viacursor.hot = cursor->hot;
+                temp = ((viacursor.hot.x) << 16) + viacursor.hot.y;
+                writel(temp, viaparinfo->io_virt + VIA_REG_CURSOR_ORG);
+        }
+
+        if (cursor->set & FB_CUR_SETPOS) {
+                viacursor.image.dx = cursor->image.dx;
+                viacursor.image.dy = cursor->image.dy;
+                yy = cursor->image.dy - info->var.yoffset;
+                xx = cursor->image.dx - info->var.xoffset;
+                temp = yy & 0xFFFF;
+                temp |= (xx << 16);
+                writel(temp, viaparinfo->io_virt + VIA_REG_CURSOR_POS);
+        }
+
+        if (cursor->set & FB_CUR_SETSIZE) {
+                temp = readl(viaparinfo->io_virt + VIA_REG_CURSOR_MODE);
+
+                if ((cursor->image.width <= 32)
+                    && (cursor->image.height <= 32)) {
+                        MAX_CURS = 32;
+                        temp |= 0x2;
+                } else if ((cursor->image.width <= 64)
+                           && (cursor->image.height <= 64)) {
+                        MAX_CURS = 64;
+                        temp &= 0xFFFFFFFD;
+                } else {
+                        DEBUG_MSG(KERN_INFO
+                        "The cursor image is biger than 64x64 bits...\n");
+                        return -ENXIO;
+                }
+                writel(temp, viaparinfo->io_virt + VIA_REG_CURSOR_MODE);
+
+                viacursor.image.height = cursor->image.height;
+                viacursor.image.width = cursor->image.width;
+        }
+
+        if (cursor->set & FB_CUR_SETCMAP) {
+                viacursor.image.fg_color = cursor->image.fg_color;
+                viacursor.image.bg_color = cursor->image.bg_color;
+
+                switch (info->var.bits_per_pixel) {
+                case 8:
+                case 16:
+                case 32:
+                        bg_col =
+                            (0xFF << 24) |
+                            (((info->cmap.red)[viacursor.image.bg_color] &
+                            0xFF00) << 8) |
+                            ((info->cmap.green)[viacursor.image.bg_color] &
+                            0xFF00) |
+                            (((info->cmap.blue)[viacursor.image.bg_color] &
+                            0xFF00) >> 8);
+                        fg_col =
+                            (0xFF << 24) |
+                            (((info->cmap.red)[viacursor.image.fg_color] &
+                            0xFF00) << 8) |
+                            ((info->cmap.green)[viacursor.image.fg_color] &
+                            0xFF00) |
+                            (((info->cmap.blue)[viacursor.image.fg_color] &
+                            0xFF00) >> 8);
+                        break;
+                default:
+                        return 0;
+                }
+
+                /* This is indeed a patch for VT3324/VT3353 */
+                if (!info->par)
+                        return 0;
+                p_viafb_par = (struct viafb_par *)info->par;
+
+                if ((p_viafb_par->chip_info->gfx_chip_name ==
+                        UNICHROME_CX700) ||
+                        ((p_viafb_par->chip_info->gfx_chip_name ==
+                        UNICHROME_VX800))) {
+                        bg_col =
+                            (((info->cmap.red)[viacursor.image.bg_color] &
+                            0xFFC0) << 14) |
+                            (((info->cmap.green)[viacursor.image.bg_color] &
+                            0xFFC0) << 4) |
+                            (((info->cmap.blue)[viacursor.image.bg_color] &
+                            0xFFC0) >> 6);
+                        fg_col =
+                            (((info->cmap.red)[viacursor.image.fg_color] &
+                            0xFFC0) << 14) |
+                            (((info->cmap.green)[viacursor.image.fg_color] &
+                            0xFFC0) << 4) |
+                            (((info->cmap.blue)[viacursor.image.fg_color] &
+                            0xFFC0) >> 6);
+                }
+
+                writel(bg_col, viaparinfo->io_virt + VIA_REG_CURSOR_BG);
+                writel(fg_col, viaparinfo->io_virt + VIA_REG_CURSOR_FG);
+        }
+
+        if (cursor->set & FB_CUR_SETSHAPE) {
+                size =
+                    ((viacursor.image.width + 7) >> 3) *
+                    viacursor.image.height;
+
+                if (MAX_CURS == 32) {
+                        for (i = 0; i < (CURSOR_SIZE / 32); i++) {
+                                data_bak[i] = 0x0;
+                                data_bak[i + 1] = 0xFFFFFFFF;
+                                i += 1;
+                        }
+                } else if (MAX_CURS == 64) {
+                        for (i = 0; i < (CURSOR_SIZE / 32); i++) {
+                                data_bak[i] = 0x0;
+                                data_bak[i + 1] = 0x0;
+                                data_bak[i + 2] = 0xFFFFFFFF;
+                                data_bak[i + 3] = 0xFFFFFFFF;
+                                i += 3;
+                        }
+                }
+
+                switch (viacursor.rop) {
+                case ROP_XOR:
+                        for (i = 0; i < size; i++)
+                                data[i] = viacursor.mask[i];
+                        break;
+                case ROP_COPY:
+
+                        for (i = 0; i < size; i++)
+                                data[i] = viacursor.mask[i];
+                        break;
+                default:
+                        break;
+                }
+
+                if (MAX_CURS == 32) {
+                        for (i = 0; i < size; i++) {
+                                data_bak[j] = (u32) data[i];
+                                data_bak[j + 1] = ~data_bak[j];
+                                j += 2;
+                        }
+                } else if (MAX_CURS == 64) {
+                        for (i = 0; i < size; i++) {
+                                data_bak[j] = (u32) data[i];
+                                data_bak[j + 1] = 0x0;
+                                data_bak[j + 2] = ~data_bak[j];
+                                data_bak[j + 3] = ~data_bak[j + 1];
+                                j += 4;
+                        }
+                }
+
+                memcpy(((struct viafb_par *)(info->par))->fbmem_virt +
+                       ((struct viafb_par *)(info->par))->cursor_start,
+                       data_bak, CURSOR_SIZE);
+        }
+
+        if (viacursor.enable)
+                viafb_show_hw_cursor(info, HW_Cursor_ON);
+
+        return 0;
+}
+
+static int viafb_sync(struct fb_info *info)
+{
+        if (viafb_accel)
+                viafb_wait_engine_idle();
+        return 0;
+}
+
+int viafb_get_mode_index(int hres, int vres, int flag)
+{
+        u32 i;
+        DEBUG_MSG(KERN_INFO "viafb_get_mode_index!\n");
+
+        for (i = 0; viafb_modentry[i].mode_index != VIA_RES_INVALID; i++)
+                if (viafb_modentry[i].xres == hres &&
+                        viafb_modentry[i].yres == vres)
+                        break;
+
+        viafb_resMode = viafb_modentry[i].mode_index;
+        if (flag)
+                viafb_mode1 = viafb_modentry[i].mode_res;
+        else
+                viafb_mode = viafb_modentry[i].mode_res;
+
+        return viafb_resMode;
+}
+
+static void check_available_device_to_enable(int device_id)
+{
+        int device_num = 0;
+
+        /* Initialize: */
+        viafb_CRT_ON = STATE_OFF;
+        viafb_DVI_ON = STATE_OFF;
+        viafb_LCD_ON = STATE_OFF;
+        viafb_LCD2_ON = STATE_OFF;
+        viafb_DeviceStatus = None_Device;
+
+        if ((device_id & CRT_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) {
+                viafb_CRT_ON = STATE_ON;
+                device_num++;
+                viafb_DeviceStatus |= CRT_Device;
+        }
+
+        if ((device_id & DVI_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) {
+                viafb_DVI_ON = STATE_ON;
+                device_num++;
+                viafb_DeviceStatus |= DVI_Device;
+        }
+
+        if ((device_id & LCD_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) {
+                viafb_LCD_ON = STATE_ON;
+                device_num++;
+                viafb_DeviceStatus |= LCD_Device;
+        }
+
+        if ((device_id & LCD2_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) {
+                viafb_LCD2_ON = STATE_ON;
+                device_num++;
+                viafb_DeviceStatus |= LCD2_Device;
+        }
+
+        if (viafb_DeviceStatus == None_Device) {
+                /* Use CRT as default active device: */
+                viafb_CRT_ON = STATE_ON;
+                viafb_DeviceStatus = CRT_Device;
+        }
+        DEBUG_MSG(KERN_INFO "Device Status:%x", viafb_DeviceStatus);
+}
+
+static void viafb_set_device(struct device_t active_dev)
+{
+        /* Check available device to enable: */
+        int device_id = None_Device;
+        if (active_dev.crt)
+                device_id |= CRT_Device;
+        if (active_dev.dvi)
+                device_id |= DVI_Device;
+        if (active_dev.lcd)
+                device_id |= LCD_Device;
+
+        check_available_device_to_enable(device_id);
+
+        /* Check property of LCD: */
+        if (viafb_LCD_ON) {
+                if (active_dev.lcd_dsp_cent) {
+                        viaparinfo->lvds_setting_info->display_method =
+                                viafb_lcd_dsp_method = LCD_CENTERING;
+                } else {
+                        viaparinfo->lvds_setting_info->display_method =
+                                viafb_lcd_dsp_method = LCD_EXPANDSION;
+                }
+
+                if (active_dev.lcd_mode == LCD_SPWG) {
+                        viaparinfo->lvds_setting_info->lcd_mode =
+                                viafb_lcd_mode = LCD_SPWG;
+                } else {
+                        viaparinfo->lvds_setting_info->lcd_mode =
+                                viafb_lcd_mode = LCD_OPENLDI;
+                }
+
+                if (active_dev.lcd_panel_id <= LCD_PANEL_ID_MAXIMUM) {
+                        viafb_lcd_panel_id = active_dev.lcd_panel_id;
+                        viafb_init_lcd_size();
+                }
+        }
+
+        /* Check property of mode: */
+        if (!active_dev.xres1)
+                viafb_second_xres = 640;
+        else
+                viafb_second_xres = active_dev.xres1;
+        if (!active_dev.yres1)
+                viafb_second_yres = 480;
+        else
+                viafb_second_yres = active_dev.yres1;
+        if (active_dev.bpp != 0)
+                viafb_bpp = active_dev.bpp;
+        if (active_dev.bpp1 != 0)
+                viafb_bpp1 = active_dev.bpp1;
+        if (active_dev.refresh != 0)
+                viafb_refresh = active_dev.refresh;
+        if (active_dev.refresh1 != 0)
+                viafb_refresh1 = active_dev.refresh1;
+        if ((active_dev.samm == STATE_OFF) || (active_dev.samm == STATE_ON))
+                viafb_SAMM_ON = active_dev.samm;
+        viafb_primary_dev = active_dev.primary_dev;
+
+        viafb_set_start_addr();
+        viafb_set_iga_path();
+}
+
+static void viafb_set_video_device(u32 video_dev_info)
+{
+        viaparinfo->video_on_crt = STATE_OFF;
+        viaparinfo->video_on_dvi = STATE_OFF;
+        viaparinfo->video_on_lcd = STATE_OFF;
+
+        /* Check available device to enable: */
+        if ((video_dev_info & CRT_Device) == CRT_Device)
+                viaparinfo->video_on_crt = STATE_ON;
+        else if ((video_dev_info & DVI_Device) == DVI_Device)
+                viaparinfo->video_on_dvi = STATE_ON;
+        else if ((video_dev_info & LCD_Device) == LCD_Device)
+                viaparinfo->video_on_lcd = STATE_ON;
+}
+
+static void viafb_get_video_device(u32 *video_dev_info)
+{
+        *video_dev_info = None_Device;
+        if (viaparinfo->video_on_crt == STATE_ON)
+                *video_dev_info |= CRT_Device;
+        else if (viaparinfo->video_on_dvi == STATE_ON)
+                *video_dev_info |= DVI_Device;
+        else if (viaparinfo->video_on_lcd == STATE_ON)
+                *video_dev_info |= LCD_Device;
+}
+
+static int get_primary_device(void)
+{
+        int primary_device = 0;
+        /* Rule: device on iga1 path are the primary device. */
+        if (viafb_SAMM_ON) {
+                if (viafb_CRT_ON) {
+                        if (viaparinfo->crt_setting_info->iga_path == IGA1) {
+                                DEBUG_MSG(KERN_INFO "CRT IGA Path:%d\n",
+                                        viaparinfo->
+                                        crt_setting_info->iga_path);
+                                primary_device = CRT_Device;
+                        }
+                }
+                if (viafb_DVI_ON) {
+                        if (viaparinfo->tmds_setting_info->iga_path == IGA1) {
+                                DEBUG_MSG(KERN_INFO "DVI IGA Path:%d\n",
+                                        viaparinfo->
+                                        tmds_setting_info->iga_path);
+                                primary_device = DVI_Device;
+                        }
+                }
+                if (viafb_LCD_ON) {
+                        if (viaparinfo->lvds_setting_info->iga_path == IGA1) {
+                                DEBUG_MSG(KERN_INFO "LCD IGA Path:%d\n",
+                                        viaparinfo->
+                                        lvds_setting_info->iga_path);
+                                primary_device = LCD_Device;
+                        }
+                }
+                if (viafb_LCD2_ON) {
+                        if (viaparinfo->lvds_setting_info2->iga_path == IGA1) {
+                                DEBUG_MSG(KERN_INFO "LCD2 IGA Path:%d\n",
+                                        viaparinfo->
+                                        lvds_setting_info2->iga_path);
+                                primary_device = LCD2_Device;
+                        }
+                }
+        }
+        return primary_device;
+}
+
+static u8 is_duoview(void)
+{
+        if (0 == viafb_SAMM_ON) {
+                if (viafb_LCD_ON + viafb_LCD2_ON +
+                        viafb_DVI_ON + viafb_CRT_ON == 2)
+                        return true;
+                return false;
+        } else {
+                return false;
+        }
+}
+
+static void apply_second_mode_setting(struct fb_var_screeninfo
+        *sec_var)
+{
+        u32 htotal, vtotal, long_refresh;
+
+        htotal = sec_var->xres + sec_var->left_margin +
+                sec_var->right_margin + sec_var->hsync_len;
+        vtotal = sec_var->yres + sec_var->upper_margin +
+                sec_var->lower_margin + sec_var->vsync_len;
+        if ((sec_var->xres_virtual * (sec_var->bits_per_pixel >> 3)) & 0x1F) {
+                /*Is 32 bytes alignment? */
+                /*32 pixel alignment */
+                sec_var->xres_virtual = (sec_var->xres_virtual + 31) & ~31;
+        }
+
+        htotal = sec_var->xres + sec_var->left_margin +
+                sec_var->right_margin + sec_var->hsync_len;
+        vtotal = sec_var->yres + sec_var->upper_margin +
+                sec_var->lower_margin + sec_var->vsync_len;
+        long_refresh = 1000000000UL / sec_var->pixclock * 1000;
+        long_refresh /= (htotal * vtotal);
+
+        viafb_second_xres = sec_var->xres;
+        viafb_second_yres = sec_var->yres;
+        viafb_second_virtual_xres = sec_var->xres_virtual;
+        viafb_second_virtual_yres = sec_var->yres_virtual;
+        viafb_bpp1 = sec_var->bits_per_pixel;
+        viafb_refresh1 = viafb_get_refresh(sec_var->xres, sec_var->yres,
+                long_refresh);
+}
+
+static int apply_device_setting(struct viafb_ioctl_setting setting_info,
+        struct fb_info *info)
+{
+        int need_set_mode = 0;
+        DEBUG_MSG(KERN_INFO "apply_device_setting\n");
+
+        if (setting_info.device_flag) {
+                need_set_mode = 1;
+                check_available_device_to_enable(setting_info.device_status);
+        }
+
+        /* Unlock LCD's operation according to LCD flag
+           and check if the setting value is valid. */
+        /* If the value is valid, apply the new setting value to the device. */
+        if (viafb_LCD_ON) {
+                if (setting_info.lcd_operation_flag & OP_LCD_CENTERING) {
+                        need_set_mode = 1;
+                        if (setting_info.lcd_attributes.display_center) {
+                                /* Centering */
+                                viaparinfo->lvds_setting_info->display_method =
+                                    LCD_CENTERING;
+                                viafb_lcd_dsp_method = LCD_CENTERING;
+                                viaparinfo->lvds_setting_info2->display_method =
+                                    viafb_lcd_dsp_method = LCD_CENTERING;
+                        } else {
+                                /* expandsion */
+                                viaparinfo->lvds_setting_info->display_method =
+                                    LCD_EXPANDSION;
+                                viafb_lcd_dsp_method = LCD_EXPANDSION;
+                                viaparinfo->lvds_setting_info2->display_method =
+                                    LCD_EXPANDSION;
+                                viafb_lcd_dsp_method = LCD_EXPANDSION;
+                        }
+                }
+
+                if (setting_info.lcd_operation_flag & OP_LCD_MODE) {
+                        need_set_mode = 1;
+                        if (setting_info.lcd_attributes.lcd_mode ==
+                                LCD_SPWG) {
+                                viaparinfo->lvds_setting_info->lcd_mode =
+                                        viafb_lcd_mode = LCD_SPWG;
+                        } else {
+                                viaparinfo->lvds_setting_info->lcd_mode =
+                                        viafb_lcd_mode = LCD_OPENLDI;
+                        }
+                        viaparinfo->lvds_setting_info2->lcd_mode =
+                            viaparinfo->lvds_setting_info->lcd_mode;
+                }
+
+                if (setting_info.lcd_operation_flag & OP_LCD_PANEL_ID) {
+                        need_set_mode = 1;
+                        if (setting_info.lcd_attributes.panel_id <=
+                            LCD_PANEL_ID_MAXIMUM) {
+                                viafb_lcd_panel_id =
+                                    setting_info.lcd_attributes.panel_id;
+                                viafb_init_lcd_size();
+                        }
+                }
+        }
+
+        if (0 != (setting_info.samm_status & OP_SAMM)) {
+                setting_info.samm_status =
+                    setting_info.samm_status & (~OP_SAMM);
+                if (setting_info.samm_status == 0
+                    || setting_info.samm_status == 1) {
+                        viafb_SAMM_ON = setting_info.samm_status;
+
+                        if (viafb_SAMM_ON)
+                                viafb_primary_dev = setting_info.primary_device;
+
+                        viafb_set_start_addr();
+                        viafb_set_iga_path();
+                }
+                need_set_mode = 1;
+        }
+
+        viaparinfo->duoview = is_duoview();
+
+        if (!need_set_mode) {
+                ;
+        } else {
+                viafb_set_iga_path();
+                viafb_set_par(info);
+        }
+        return true;
+}
+
+static void retrieve_device_setting(struct viafb_ioctl_setting
+        *setting_info)
+{
+
+        /* get device status */
+        if (viafb_CRT_ON == 1)
+                setting_info->device_status = CRT_Device;
+        if (viafb_DVI_ON == 1)
+                setting_info->device_status |= DVI_Device;
+        if (viafb_LCD_ON == 1)
+                setting_info->device_status |= LCD_Device;
+        if (viafb_LCD2_ON == 1)
+                setting_info->device_status |= LCD2_Device;
+        if ((viaparinfo->video_on_crt == 1) && (viafb_CRT_ON == 1)) {
+                setting_info->video_device_status =
+                        viaparinfo->crt_setting_info->iga_path;
+        } else if ((viaparinfo->video_on_dvi == 1) && (viafb_DVI_ON == 1)) {
+                setting_info->video_device_status =
+                        viaparinfo->tmds_setting_info->iga_path;
+        } else if ((viaparinfo->video_on_lcd == 1) && (viafb_LCD_ON == 1)) {
+                setting_info->video_device_status =
+                        viaparinfo->lvds_setting_info->iga_path;
+        } else {
+                setting_info->video_device_status = 0;
+        }
+
+        setting_info->samm_status = viafb_SAMM_ON;
+        setting_info->primary_device = get_primary_device();
+
+        setting_info->first_dev_bpp = viafb_bpp;
+        setting_info->second_dev_bpp = viafb_bpp1;
+
+        setting_info->first_dev_refresh = viafb_refresh;
+        setting_info->second_dev_refresh = viafb_refresh1;
+
+        setting_info->first_dev_hor_res = viafb_hotplug_Xres;
+        setting_info->first_dev_ver_res = viafb_hotplug_Yres;
+        setting_info->second_dev_hor_res = viafb_second_xres;
+        setting_info->second_dev_ver_res = viafb_second_yres;
+
+        /* Get lcd attributes */
+        setting_info->lcd_attributes.display_center = viafb_lcd_dsp_method;
+        setting_info->lcd_attributes.panel_id = viafb_lcd_panel_id;
+        setting_info->lcd_attributes.lcd_mode = viafb_lcd_mode;
+}
+
+static void parse_active_dev(void)
+{
+        viafb_CRT_ON = STATE_OFF;
+        viafb_DVI_ON = STATE_OFF;
+        viafb_LCD_ON = STATE_OFF;
+        viafb_LCD2_ON = STATE_OFF;
+        /* 1. Modify the active status of devices. */
+        /* 2. Keep the order of devices, so we can set corresponding
+           IGA path to devices in SAMM case. */
+        /*    Note: The previous of active_dev is primary device,
+           and the following is secondary device. */
+        if (!strncmp(viafb_active_dev, "CRT+DVI", 7)) {
+                /* CRT+DVI */
+                viafb_CRT_ON = STATE_ON;
+                viafb_DVI_ON = STATE_ON;
+                viafb_primary_dev = CRT_Device;
+        } else if (!strncmp(viafb_active_dev, "DVI+CRT", 7)) {
+                /* DVI+CRT */
+                viafb_CRT_ON = STATE_ON;
+                viafb_DVI_ON = STATE_ON;
+                viafb_primary_dev = DVI_Device;
+        } else if (!strncmp(viafb_active_dev, "CRT+LCD", 7)) {
+                /* CRT+LCD */
+                viafb_CRT_ON = STATE_ON;
+                viafb_LCD_ON = STATE_ON;
+                viafb_primary_dev = CRT_Device;
+        } else if (!strncmp(viafb_active_dev, "LCD+CRT", 7)) {
+                /* LCD+CRT */
+                viafb_CRT_ON = STATE_ON;
+                viafb_LCD_ON = STATE_ON;
+                viafb_primary_dev = LCD_Device;
+        } else if (!strncmp(viafb_active_dev, "DVI+LCD", 7)) {
+                /* DVI+LCD */
+                viafb_DVI_ON = STATE_ON;
+                viafb_LCD_ON = STATE_ON;
+                viafb_primary_dev = DVI_Device;
+        } else if (!strncmp(viafb_active_dev, "LCD+DVI", 7)) {
+                /* LCD+DVI */
+                viafb_DVI_ON = STATE_ON;
+                viafb_LCD_ON = STATE_ON;
+                viafb_primary_dev = LCD_Device;
+        } else if (!strncmp(viafb_active_dev, "LCD+LCD2", 8)) {
+                viafb_LCD_ON = STATE_ON;
+                viafb_LCD2_ON = STATE_ON;
+                viafb_primary_dev = LCD_Device;
+        } else if (!strncmp(viafb_active_dev, "LCD2+LCD", 8)) {
+                viafb_LCD_ON = STATE_ON;
+                viafb_LCD2_ON = STATE_ON;
+                viafb_primary_dev = LCD2_Device;
+        } else if (!strncmp(viafb_active_dev, "CRT", 3)) {
+                /* CRT only */
+                viafb_CRT_ON = STATE_ON;
+                viafb_SAMM_ON = STATE_OFF;
+        } else if (!strncmp(viafb_active_dev, "DVI", 3)) {
+                /* DVI only */
+                viafb_DVI_ON = STATE_ON;
+                viafb_SAMM_ON = STATE_OFF;
+        } else if (!strncmp(viafb_active_dev, "LCD", 3)) {
+                /* LCD only */
+                viafb_LCD_ON = STATE_ON;
+                viafb_SAMM_ON = STATE_OFF;
+        } else {
+                viafb_CRT_ON = STATE_ON;
+                viafb_SAMM_ON = STATE_OFF;
+        }
+        viaparinfo->duoview = is_duoview();
+}
+
+static void parse_video_dev(void)
+{
+        viaparinfo->video_on_crt = STATE_OFF;
+        viaparinfo->video_on_dvi = STATE_OFF;
+        viaparinfo->video_on_lcd = STATE_OFF;
+
+        if (!strncmp(viafb_video_dev, "CRT", 3)) {
+                /* Video on CRT */
+                viaparinfo->video_on_crt = STATE_ON;
+        } else if (!strncmp(viafb_video_dev, "DVI", 3)) {
+                /* Video on DVI */
+                viaparinfo->video_on_dvi = STATE_ON;
+        } else if (!strncmp(viafb_video_dev, "LCD", 3)) {
+                /* Video on LCD */
+                viaparinfo->video_on_lcd = STATE_ON;
+        }
+}
+
+static int parse_port(char *opt_str, int *output_interface)
+{
+        if (!strncmp(opt_str, "DVP0", 4))
+                *output_interface = INTERFACE_DVP0;
+        else if (!strncmp(opt_str, "DVP1", 4))
+                *output_interface = INTERFACE_DVP1;
+        else if (!strncmp(opt_str, "DFP_HIGHLOW", 11))
+                *output_interface = INTERFACE_DFP;
+        else if (!strncmp(opt_str, "DFP_HIGH", 8))
+                *output_interface = INTERFACE_DFP_HIGH;
+        else if (!strncmp(opt_str, "DFP_LOW", 7))
+                *output_interface = INTERFACE_DFP_LOW;
+        else
+                *output_interface = INTERFACE_NONE;
+        return 0;
+}
+
+static void parse_lcd_port(void)
+{
+        parse_port(viafb_lcd_port, &viaparinfo->chip_info->lvds_chip_info.
+                output_interface);
+        /*Initialize to avoid unexpected behavior */
+        viaparinfo->chip_info->lvds_chip_info2.output_interface =
+        INTERFACE_NONE;
+
+        DEBUG_MSG(KERN_INFO "parse_lcd_port: viafb_lcd_port:%s,interface:%d\n",
+                  viafb_lcd_port, viaparinfo->chip_info->lvds_chip_info.
+                  output_interface);
+}
+
+static void parse_dvi_port(void)
+{
+        parse_port(viafb_dvi_port, &viaparinfo->chip_info->tmds_chip_info.
+                output_interface);
+
+        DEBUG_MSG(KERN_INFO "parse_dvi_port: viafb_dvi_port:%s,interface:%d\n",
+                  viafb_dvi_port, viaparinfo->chip_info->tmds_chip_info.
+                  output_interface);
+}
+
+/*
+ * The proc filesystem read/write function, a simple proc implement to
+ * get/set the value of DPA  DVP0,   DVP0DataDriving,  DVP0ClockDriving, DVP1,
+ * DVP1Driving, DFPHigh, DFPLow CR96,   SR2A[5], SR1B[1], SR2A[4], SR1E[2],
+ * CR9B,    SR65,    CR97,    CR99
+ */
+static int viafb_dvp0_proc_read(char *buf, char **start, off_t offset,
+int count, int *eof, void *data)
+{
+        int len = 0;
+        u8 dvp0_data_dri = 0, dvp0_clk_dri = 0, dvp0 = 0;
+        dvp0_data_dri =
+            (viafb_read_reg(VIASR, SR2A) & BIT5) >> 4 |
+            (viafb_read_reg(VIASR, SR1B) & BIT1) >> 1;
+        dvp0_clk_dri =
+            (viafb_read_reg(VIASR, SR2A) & BIT4) >> 3 |
+            (viafb_read_reg(VIASR, SR1E) & BIT2) >> 2;
+        dvp0 = viafb_read_reg(VIACR, CR96) & 0x0f;
+        len +=
+            sprintf(buf + len, "%x %x %x\n", dvp0, dvp0_data_dri, dvp0_clk_dri);
+        *eof = 1;               /*Inform kernel end of data */
+        return len;
+}
+static int viafb_dvp0_proc_write(struct file *file,
+        const char __user *buffer, unsigned long count, void *data)
+{
+        char buf[20], *value, *pbuf;
+        u8 reg_val = 0;
+        unsigned long length, i;
+        if (count < 1)
+                return -EINVAL;
+        length = count > 20 ? 20 : count;
+        if (copy_from_user(&buf[0], buffer, length))
+                return -EFAULT;
+        buf[length - 1] = '\0'; /*Ensure end string */
+        pbuf = &buf[0];
+        for (i = 0; i < 3; i++) {
+                value = strsep(&pbuf, " ");
+                if (value != NULL) {
+                        strict_strtoul(value, 0, (unsigned long *)&reg_val);
+                        DEBUG_MSG(KERN_INFO "DVP0:reg_val[%l]=:%x\n", i,
+                                  reg_val);
+                        switch (i) {
+                        case 0:
+                                viafb_write_reg_mask(CR96, VIACR,
+                                        reg_val, 0x0f);
+                                break;
+                        case 1:
+                                viafb_write_reg_mask(SR2A, VIASR,
+                                        reg_val << 4, BIT5);
+                                viafb_write_reg_mask(SR1B, VIASR,
+                                        reg_val << 1, BIT1);
+                                break;
+                        case 2:
+                                viafb_write_reg_mask(SR2A, VIASR,
+                                        reg_val << 3, BIT4);
+                                viafb_write_reg_mask(SR1E, VIASR,
+                                        reg_val << 2, BIT2);
+                                break;
+                        default:
+                                break;
+                        }
+                } else {
+                        break;
+                }
+        }
+        return count;
+}
+static int viafb_dvp1_proc_read(char *buf, char **start, off_t offset,
+        int count, int *eof, void *data)
+{
+        int len = 0;
+        u8 dvp1 = 0, dvp1_data_dri = 0, dvp1_clk_dri = 0;
+        dvp1 = viafb_read_reg(VIACR, CR9B) & 0x0f;
+        dvp1_data_dri = (viafb_read_reg(VIASR, SR65) & 0x0c) >> 2;
+        dvp1_clk_dri = viafb_read_reg(VIASR, SR65) & 0x03;
+        len +=
+            sprintf(buf + len, "%x %x %x\n", dvp1, dvp1_data_dri, dvp1_clk_dri);
+        *eof = 1;               /*Inform kernel end of data */
+        return len;
+}
+static int viafb_dvp1_proc_write(struct file *file,
+        const char __user *buffer, unsigned long count, void *data)
+{
+        char buf[20], *value, *pbuf;
+        u8 reg_val = 0;
+        unsigned long length, i;
+        if (count < 1)
+                return -EINVAL;
+        length = count > 20 ? 20 : count;
+        if (copy_from_user(&buf[0], buffer, length))
+                return -EFAULT;
+        buf[length - 1] = '\0'; /*Ensure end string */
+        pbuf = &buf[0];
+        for (i = 0; i < 3; i++) {
+                value = strsep(&pbuf, " ");
+                if (value != NULL) {
+                        strict_strtoul(value, 0, (unsigned long *)&reg_val);
+                        switch (i) {
+                        case 0:
+                                viafb_write_reg_mask(CR9B, VIACR,
+                                        reg_val, 0x0f);
+                                break;
+                        case 1:
+                                viafb_write_reg_mask(SR65, VIASR,
+                                        reg_val << 2, 0x0c);
+                                break;
+                        case 2:
+                                viafb_write_reg_mask(SR65, VIASR,
+                                        reg_val, 0x03);
+                                break;
+                        default:
+                                break;
+                        }
+                } else {
+                        break;
+                }
+        }
+        return count;
+}
+
+static int viafb_dfph_proc_read(char *buf, char **start, off_t offset,
+        int count, int *eof, void *data)
+{
+        int len = 0;
+        u8 dfp_high = 0;
+        dfp_high = viafb_read_reg(VIACR, CR97) & 0x0f;
+        len += sprintf(buf + len, "%x\n", dfp_high);
+        *eof = 1;               /*Inform kernel end of data */
+        return len;
+}
+static int viafb_dfph_proc_write(struct file *file,
+        const char __user *buffer, unsigned long count, void *data)
+{
+        char buf[20];
+        u8 reg_val = 0;
+        unsigned long length;
+        if (count < 1)
+                return -EINVAL;
+        length = count > 20 ? 20 : count;
+        if (copy_from_user(&buf[0], buffer, length))
+                return -EFAULT;
+        buf[length - 1] = '\0'; /*Ensure end string */
+        strict_strtoul(&buf[0], 0, (unsigned long *)&reg_val);
+        viafb_write_reg_mask(CR97, VIACR, reg_val, 0x0f);
+        return count;
+}
+static int viafb_dfpl_proc_read(char *buf, char **start, off_t offset,
+        int count, int *eof, void *data)
+{
+        int len = 0;
+        u8 dfp_low = 0;
+        dfp_low = viafb_read_reg(VIACR, CR99) & 0x0f;
+        len += sprintf(buf + len, "%x\n", dfp_low);
+        *eof = 1;               /*Inform kernel end of data */
+        return len;
+}
+static int viafb_dfpl_proc_write(struct file *file,
+        const char __user *buffer, unsigned long count, void *data)
+{
+        char buf[20];
+        u8 reg_val = 0;
+        unsigned long length;
+        if (count < 1)
+                return -EINVAL;
+        length = count > 20 ? 20 : count;
+        if (copy_from_user(&buf[0], buffer, length))
+                return -EFAULT;
+        buf[length - 1] = '\0'; /*Ensure end string */
+        strict_strtoul(&buf[0], 0, (unsigned long *)&reg_val);
+        viafb_write_reg_mask(CR99, VIACR, reg_val, 0x0f);
+        return count;
+}
+static int viafb_vt1636_proc_read(char *buf, char **start,
+        off_t offset, int count, int *eof, void *data)
+{
+        int len = 0;
+        u8 vt1636_08 = 0, vt1636_09 = 0;
+        switch (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
+        case VT1636_LVDS:
+                vt1636_08 =
+                    viafb_gpio_i2c_read_lvds(viaparinfo->lvds_setting_info,
+                    &viaparinfo->chip_info->lvds_chip_info, 0x08) & 0x0f;
+                vt1636_09 =
+                    viafb_gpio_i2c_read_lvds(viaparinfo->lvds_setting_info,
+                    &viaparinfo->chip_info->lvds_chip_info, 0x09) & 0x1f;
+                len += sprintf(buf + len, "%x %x\n", vt1636_08, vt1636_09);
+                break;
+        default:
+                break;
+        }
+        switch (viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name) {
+        case VT1636_LVDS:
+                vt1636_08 =
+                    viafb_gpio_i2c_read_lvds(viaparinfo->lvds_setting_info2,
+                        &viaparinfo->chip_info->lvds_chip_info2, 0x08) & 0x0f;
+                vt1636_09 =
+                    viafb_gpio_i2c_read_lvds(viaparinfo->lvds_setting_info2,
+                        &viaparinfo->chip_info->lvds_chip_info2, 0x09) & 0x1f;
+                len += sprintf(buf + len, " %x %x\n", vt1636_08, vt1636_09);
+                break;
+        default:
+                break;
+        }
+        *eof = 1;               /*Inform kernel end of data */
+        return len;
+}
+static int viafb_vt1636_proc_write(struct file *file,
+        const char __user *buffer, unsigned long count, void *data)
+{
+        char buf[30], *value, *pbuf;
+        struct IODATA reg_val;
+        unsigned long length, i;
+        if (count < 1)
+                return -EINVAL;
+        length = count > 30 ? 30 : count;
+        if (copy_from_user(&buf[0], buffer, length))
+                return -EFAULT;
+        buf[length - 1] = '\0'; /*Ensure end string */
+        pbuf = &buf[0];
+        switch (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
+        case VT1636_LVDS:
+                for (i = 0; i < 2; i++) {
+                        value = strsep(&pbuf, " ");
+                        if (value != NULL) {
+                                strict_strtoul(value, 0,
+                                        (unsigned long *)&reg_val.Data);
+                                switch (i) {
+                                case 0:
+                                        reg_val.Index = 0x08;
+                                        reg_val.Mask = 0x0f;
+                                        viafb_gpio_i2c_write_mask_lvds
+                                            (viaparinfo->lvds_setting_info,
+                                            &viaparinfo->
+                                            chip_info->lvds_chip_info,
+                                             reg_val);
+                                        break;
+                                case 1:
+                                        reg_val.Index = 0x09;
+                                        reg_val.Mask = 0x1f;
+                                        viafb_gpio_i2c_write_mask_lvds
+                                            (viaparinfo->lvds_setting_info,
+                                            &viaparinfo->
+                                            chip_info->lvds_chip_info,
+                                             reg_val);
+                                        break;
+                                default:
+                                        break;
+                                }
+                        } else {
+                                break;
+                        }
+                }
+                break;
+        default:
+                break;
+        }
+        switch (viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name) {
+        case VT1636_LVDS:
+                for (i = 0; i < 2; i++) {
+                        value = strsep(&pbuf, " ");
+                        if (value != NULL) {
+                                strict_strtoul(value, 0,
+                                        (unsigned long *)&reg_val.Data);
+                                switch (i) {
+                                case 0:
+                                        reg_val.Index = 0x08;
+                                        reg_val.Mask = 0x0f;
+                                        viafb_gpio_i2c_write_mask_lvds
+                                            (viaparinfo->lvds_setting_info2,
+                                            &viaparinfo->
+                                            chip_info->lvds_chip_info2,
+                                             reg_val);
+                                        break;
+                                case 1:
+                                        reg_val.Index = 0x09;
+                                        reg_val.Mask = 0x1f;
+                                        viafb_gpio_i2c_write_mask_lvds
+                                            (viaparinfo->lvds_setting_info2,
+                                            &viaparinfo->
+                                            chip_info->lvds_chip_info2,
+                                             reg_val);
+                                        break;
+                                default:
+                                        break;
+                                }
+                        } else {
+                                break;
+                        }
+                }
+                break;
+        default:
+                break;
+        }
+        return count;
+}
+
+static void viafb_init_proc(struct proc_dir_entry *viafb_entry)
+{
+        struct proc_dir_entry *entry;
+        viafb_entry = proc_mkdir("viafb", NULL);
+        if (viafb_entry) {
+                entry = create_proc_entry("dvp0", 0, viafb_entry);
+                if (entry) {
+                        entry->owner = THIS_MODULE;
+                        entry->read_proc = viafb_dvp0_proc_read;
+                        entry->write_proc = viafb_dvp0_proc_write;
+                }
+                entry = create_proc_entry("dvp1", 0, viafb_entry);
+                if (entry) {
+                        entry->owner = THIS_MODULE;
+                        entry->read_proc = viafb_dvp1_proc_read;
+                        entry->write_proc = viafb_dvp1_proc_write;
+                }
+                entry = create_proc_entry("dfph", 0, viafb_entry);
+                if (entry) {
+                        entry->owner = THIS_MODULE;
+                        entry->read_proc = viafb_dfph_proc_read;
+                        entry->write_proc = viafb_dfph_proc_write;
+                }
+                entry = create_proc_entry("dfpl", 0, viafb_entry);
+                if (entry) {
+                        entry->owner = THIS_MODULE;
+                        entry->read_proc = viafb_dfpl_proc_read;
+                        entry->write_proc = viafb_dfpl_proc_write;
+                }
+                if (VT1636_LVDS == viaparinfo->chip_info->lvds_chip_info.
+                        lvds_chip_name || VT1636_LVDS ==
+                    viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name) {
+                        entry = create_proc_entry("vt1636", 0, viafb_entry);
+                        if (entry) {
+                                entry->owner = THIS_MODULE;
+                                entry->read_proc = viafb_vt1636_proc_read;
+                                entry->write_proc = viafb_vt1636_proc_write;
+                        }
+                }
+
+        }
+}
+static void viafb_remove_proc(struct proc_dir_entry *viafb_entry)
+{
+        /* no problem if it was not registered */
+        remove_proc_entry("dvp0", viafb_entry);/* parent dir */
+        remove_proc_entry("dvp1", viafb_entry);
+        remove_proc_entry("dfph", viafb_entry);
+        remove_proc_entry("dfpl", viafb_entry);
+        remove_proc_entry("vt1636", viafb_entry);
+        remove_proc_entry("vt1625", viafb_entry);
+}
+
+static int __devinit via_pci_probe(void)
+{
+        unsigned int default_xres, default_yres;
+        char *tmpc, *tmpm;
+        char *tmpc_sec, *tmpm_sec;
+        int vmode_index;
+        u32 tmds_length, lvds_length, crt_length, chip_length, viafb_par_length;
+
+        DEBUG_MSG(KERN_INFO "VIAFB PCI Probe!!\n");
+
+        viafb_par_length = ALIGN(sizeof(struct viafb_par), BITS_PER_LONG/8);
+        tmds_length = ALIGN(sizeof(struct tmds_setting_information),
+                BITS_PER_LONG/8);
+        lvds_length = ALIGN(sizeof(struct lvds_setting_information),
+                BITS_PER_LONG/8);
+        crt_length = ALIGN(sizeof(struct lvds_setting_information),
+                BITS_PER_LONG/8);
+        chip_length = ALIGN(sizeof(struct chip_information), BITS_PER_LONG/8);
+
+        /* Allocate fb_info and ***_par here, also including some other needed
+         * variables
+        */
+        viafbinfo = framebuffer_alloc(viafb_par_length + 2 * lvds_length +
+        tmds_length + crt_length + chip_length, NULL);
+        if (!viafbinfo) {
+                printk(KERN_ERR"Could not allocate memory for viafb_info.\n");
+                return -ENODEV;
+        }
+
+        viaparinfo = (struct viafb_par *)viafbinfo->par;
+        viaparinfo->tmds_setting_info = (struct tmds_setting_information *)
+                ((unsigned long)viaparinfo + viafb_par_length);
+        viaparinfo->lvds_setting_info = (struct lvds_setting_information *)
+                ((unsigned long)viaparinfo->tmds_setting_info + tmds_length);
+        viaparinfo->lvds_setting_info2 = (struct lvds_setting_information *)
+                ((unsigned long)viaparinfo->lvds_setting_info + lvds_length);
+        viaparinfo->crt_setting_info = (struct crt_setting_information *)
+                ((unsigned long)viaparinfo->lvds_setting_info2 + lvds_length);
+        viaparinfo->chip_info = (struct chip_information *)
+                ((unsigned long)viaparinfo->crt_setting_info + crt_length);
+
+        if (viafb_dual_fb)
+                viafb_SAMM_ON = 1;
+        parse_active_dev();
+        parse_video_dev();
+        parse_lcd_port();
+        parse_dvi_port();
+
+        /* for dual-fb must viafb_SAMM_ON=1 and viafb_dual_fb=1 */
+        if (!viafb_SAMM_ON)
+                viafb_dual_fb = 0;
+
+        /* Set up I2C bus stuff */
+        viafb_create_i2c_bus(viaparinfo);
+
+        viafb_init_chip_info();
+        viafb_get_fb_info(&viaparinfo->fbmem, &viaparinfo->memsize);
+        viaparinfo->fbmem_free = viaparinfo->memsize;
+        viaparinfo->fbmem_used = 0;
+        viaparinfo->fbmem_virt = ioremap_nocache(viaparinfo->fbmem,
+                viaparinfo->memsize);
+        viafbinfo->screen_base = (char *)viaparinfo->fbmem_virt;
+
+        if (!viaparinfo->fbmem_virt) {
+                printk(KERN_INFO "ioremap failed\n");
+                return -1;
+        }
+
+        viafb_get_mmio_info(&viaparinfo->mmio_base, &viaparinfo->mmio_len);
+        viaparinfo->io_virt = ioremap_nocache(viaparinfo->mmio_base,
+                viaparinfo->mmio_len);
+
+        viafbinfo->node = 0;
+        viafbinfo->fbops = &viafb_ops;
+        viafbinfo->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
+
+        viafbinfo->pseudo_palette = pseudo_pal;
+        if (viafb_accel) {
+                viafb_init_accel();
+                viafb_init_2d_engine();
+                viafb_hw_cursor_init();
+        }
+
+        if (viafb_second_size && (viafb_second_size < 8)) {
+                viafb_second_offset = viaparinfo->fbmem_free -
+                        viafb_second_size * 1024 * 1024;
+        } else {
+                viafb_second_size = 8;
+                viafb_second_offset = viaparinfo->fbmem_free -
+                        viafb_second_size * 1024 * 1024;
+        }
+
+        viafb_FB_MM = viaparinfo->fbmem_virt;
+        tmpm = viafb_mode;
+        tmpc = strsep(&tmpm, "x");
+        strict_strtoul(tmpc, 0, (unsigned long *)&default_xres);
+        strict_strtoul(tmpm, 0, (unsigned long *)&default_yres);
+
+        vmode_index = viafb_get_mode_index(default_xres, default_yres, 0);
+        DEBUG_MSG(KERN_INFO "0->index=%d\n", vmode_index);
+
+        if (viafb_SAMM_ON == 1) {
+                if (strcmp(viafb_mode, viafb_mode1)) {
+                        tmpm_sec = viafb_mode1;
+                        tmpc_sec = strsep(&tmpm_sec, "x");
+                        strict_strtoul(tmpc_sec, 0,
+                                (unsigned long *)&viafb_second_xres);
+                        strict_strtoul(tmpm_sec, 0,
+                                (unsigned long *)&viafb_second_yres);
+                } else {
+                        viafb_second_xres = default_xres;
+                        viafb_second_yres = default_yres;
+                }
+                if (0 == viafb_second_virtual_xres) {
+                        switch (viafb_second_xres) {
+                        case 1400:
+                                viafb_second_virtual_xres = 1408;
+                                break;
+                        default:
+                                viafb_second_virtual_xres = viafb_second_xres;
+                                break;
+                        }
+                }
+                if (0 == viafb_second_virtual_yres)
+                        viafb_second_virtual_yres = viafb_second_yres;
+        }
+
+        switch (viafb_bpp) {
+        case 0 ... 8:
+                viafb_bpp = 8;
+                break;
+        case 9 ... 16:
+                viafb_bpp = 16;
+                break;
+        case 17 ... 32:
+                viafb_bpp = 32;
+                break;
+        default:
+                viafb_bpp = 8;
+        }
+        default_var.xres = default_xres;
+        default_var.yres = default_yres;
+        switch (default_xres) {
+        case 1400:
+                default_var.xres_virtual = 1408;
+                break;
+        default:
+                default_var.xres_virtual = default_xres;
+                break;
+        }
+        default_var.yres_virtual = default_yres;
+        default_var.bits_per_pixel = viafb_bpp;
+        if (default_var.bits_per_pixel == 15)
+                default_var.bits_per_pixel = 16;
+        default_var.pixclock =
+            viafb_get_pixclock(default_xres, default_yres, viafb_refresh);
+        default_var.left_margin = (default_xres >> 3) & 0xf8;
+        default_var.right_margin = 32;
+        default_var.upper_margin = 16;
+        default_var.lower_margin = 4;
+        default_var.hsync_len = default_var.left_margin;
+        default_var.vsync_len = 4;
+        default_var.accel_flags = 0;
+
+        if (viafb_accel) {
+                viafbinfo->flags |=
+                    (FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT |
+                     FBINFO_HWACCEL_IMAGEBLIT);
+                default_var.accel_flags |= FB_ACCELF_TEXT;
+        } else
+                viafbinfo->flags |= FBINFO_HWACCEL_DISABLED;
+
+        if (viafb_dual_fb) {
+                viafbinfo1 = framebuffer_alloc(viafb_par_length, NULL);
+                if (!viafbinfo1) {
+                        printk(KERN_ERR
+                        "allocate the second framebuffer struct error\n");
+                        framebuffer_release(viafbinfo);
+                        return -ENOMEM;
+                }
+                viaparinfo1 = viafbinfo1->par;
+                memcpy(viaparinfo1, viaparinfo, viafb_par_length);
+                viaparinfo1->memsize = viaparinfo->memsize -
+                        viafb_second_offset;
+                viaparinfo->memsize = viafb_second_offset;
+                viaparinfo1->fbmem_virt = viaparinfo->fbmem_virt +
+                        viafb_second_offset;
+                viaparinfo1->fbmem = viaparinfo->fbmem + viafb_second_offset;
+
+                viaparinfo1->fbmem_used = viaparinfo->fbmem_used;
+                viaparinfo1->fbmem_free = viaparinfo1->memsize -
+                        viaparinfo1->fbmem_used;
+                viaparinfo->fbmem_free = viaparinfo->memsize;
+                viaparinfo->fbmem_used = 0;
+                if (viafb_accel) {
+                        viaparinfo1->cursor_start =
+                            viaparinfo->cursor_start - viafb_second_offset;
+                        viaparinfo1->VQ_start = viaparinfo->VQ_start -
+                                viafb_second_offset;
+                        viaparinfo1->VQ_end = viaparinfo->VQ_end -
+                                viafb_second_offset;
+                }
+
+                memcpy(viafbinfo1, viafbinfo, sizeof(struct fb_info));
+                viafbinfo1->screen_base = viafbinfo->screen_base +
+                        viafb_second_offset;
+                viafbinfo1->fix.smem_start = viaparinfo1->fbmem;
+                viafbinfo1->fix.smem_len = viaparinfo1->fbmem_free;
+
+                default_var.xres = viafb_second_xres;
+                default_var.yres = viafb_second_yres;
+                default_var.xres_virtual = viafb_second_virtual_xres;
+                default_var.yres_virtual = viafb_second_virtual_yres;
+                if (viafb_bpp1 != viafb_bpp)
+                        viafb_bpp1 = viafb_bpp;
+                default_var.bits_per_pixel = viafb_bpp1;
+                default_var.pixclock =
+                    viafb_get_pixclock(viafb_second_xres, viafb_second_yres,
+                    viafb_refresh);
+                default_var.left_margin = (viafb_second_xres >> 3) & 0xf8;
+                default_var.right_margin = 32;
+                default_var.upper_margin = 16;
+                default_var.lower_margin = 4;
+                default_var.hsync_len = default_var.left_margin;
+                default_var.vsync_len = 4;
+
+                viafb_setup_fixinfo(&viafbinfo1->fix, viaparinfo1);
+                viafb_check_var(&default_var, viafbinfo1);
+                viafbinfo1->var = default_var;
+                viafb_update_viafb_par(viafbinfo);
+                viafb_update_fix(&viafbinfo1->fix, viafbinfo1);
+        }
+
+        viafb_setup_fixinfo(&viafbinfo->fix, viaparinfo);
+        viafb_check_var(&default_var, viafbinfo);
+        viafbinfo->var = default_var;
+        viafb_update_viafb_par(viafbinfo);
+        viafb_update_fix(&viafbinfo->fix, viafbinfo);
+        default_var.activate = FB_ACTIVATE_NOW;
+        fb_alloc_cmap(&viafbinfo->cmap, 256, 0);
+
+        if (viafb_dual_fb && (viafb_primary_dev == LCD_Device)
+            && (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)) {
+                if (register_framebuffer(viafbinfo1) < 0)
+                        return -EINVAL;
+        }
+        if (register_framebuffer(viafbinfo) < 0)
+                return -EINVAL;
+
+        if (viafb_dual_fb && ((viafb_primary_dev != LCD_Device)
+                        || (viaparinfo->chip_info->gfx_chip_name !=
+                        UNICHROME_CLE266))) {
+                if (register_framebuffer(viafbinfo1) < 0)
+                        return -EINVAL;
+        }
+        DEBUG_MSG(KERN_INFO "fb%d: %s frame buffer device %dx%d-%dbpp\n",
+                  viafbinfo->node, viafbinfo->fix.id, default_var.xres,
+                  default_var.yres, default_var.bits_per_pixel);
+
+        viafb_init_proc(viaparinfo->proc_entry);
+        viafb_init_dac(IGA2);
+        return 0;
+}
+
+static void __devexit via_pci_remove(void)
+{
+        DEBUG_MSG(KERN_INFO "via_pci_remove!\n");
+        fb_dealloc_cmap(&viafbinfo->cmap);
+        unregister_framebuffer(viafbinfo);
+        if (viafb_dual_fb)
+                unregister_framebuffer(viafbinfo1);
+        iounmap((void *)viaparinfo->fbmem_virt);
+        iounmap(viaparinfo->io_virt);
+
+        viafb_delete_i2c_buss(viaparinfo);
+
+        framebuffer_release(viafbinfo);
+        if (viafb_dual_fb)
+                framebuffer_release(viafbinfo1);
+
+        viafb_remove_proc(viaparinfo->proc_entry);
+}
+
+#ifndef MODULE
+static int __init viafb_setup(char *options)
+{
+        char *this_opt;
+        DEBUG_MSG(KERN_INFO "viafb_setup!\n");
+
+        if (!options || !*options)
+                return 0;
+
+        while ((this_opt = strsep(&options, ",")) != NULL) {
+                if (!*this_opt)
+                        continue;
+
+                if (!strncmp(this_opt, "viafb_mode1=", 12))
+                        viafb_mode1 = kstrdup(this_opt + 12, GFP_KERNEL);
+                else if (!strncmp(this_opt, "viafb_mode=", 11))
+                        viafb_mode = kstrdup(this_opt + 11, GFP_KERNEL);
+                else if (!strncmp(this_opt, "viafb_bpp1=", 11))
+                        strict_strtoul(this_opt + 11, 0,
+                                (unsigned long *)&viafb_bpp1);
+                else if (!strncmp(this_opt, "viafb_bpp=", 10))
+                        strict_strtoul(this_opt + 10, 0,
+                                (unsigned long *)&viafb_bpp);
+                else if (!strncmp(this_opt, "viafb_refresh1=", 15))
+                        strict_strtoul(this_opt + 15, 0,
+                                (unsigned long *)&viafb_refresh1);
+                else if (!strncmp(this_opt, "viafb_refresh=", 14))
+                        strict_strtoul(this_opt + 14, 0,
+                                (unsigned long *)&viafb_refresh);
+                else if (!strncmp(this_opt, "viafb_lcd_dsp_method=", 21))
+                        strict_strtoul(this_opt + 21, 0,
+                                (unsigned long *)&viafb_lcd_dsp_method);
+                else if (!strncmp(this_opt, "viafb_lcd_panel_id=", 19))
+                        strict_strtoul(this_opt + 19, 0,
+                                (unsigned long *)&viafb_lcd_panel_id);
+                else if (!strncmp(this_opt, "viafb_accel=", 12))
+                        strict_strtoul(this_opt + 12, 0,
+                                (unsigned long *)&viafb_accel);
+                else if (!strncmp(this_opt, "viafb_SAMM_ON=", 14))
+                        strict_strtoul(this_opt + 14, 0,
+                                (unsigned long *)&viafb_SAMM_ON);
+                else if (!strncmp(this_opt, "viafb_active_dev=", 17))
+                        viafb_active_dev = kstrdup(this_opt + 17, GFP_KERNEL);
+                else if (!strncmp(this_opt,
+                        "viafb_display_hardware_layout=", 30))
+                        strict_strtoul(this_opt + 30, 0,
+                        (unsigned long *)&viafb_display_hardware_layout);
+                else if (!strncmp(this_opt, "viafb_second_size=", 18))
+                        strict_strtoul(this_opt + 18, 0,
+                                (unsigned long *)&viafb_second_size);
+                else if (!strncmp(this_opt,
+                        "viafb_platform_epia_dvi=", 24))
+                        strict_strtoul(this_opt + 24, 0,
+                                (unsigned long *)&viafb_platform_epia_dvi);
+                else if (!strncmp(this_opt,
+                        "viafb_device_lcd_dualedge=", 26))
+                        strict_strtoul(this_opt + 26, 0,
+                                (unsigned long *)&viafb_device_lcd_dualedge);
+                else if (!strncmp(this_opt, "viafb_bus_width=", 16))
+                        strict_strtoul(this_opt + 16, 0,
+                                (unsigned long *)&viafb_bus_width);
+                else if (!strncmp(this_opt, "viafb_lcd_mode=", 15))
+                        strict_strtoul(this_opt + 15, 0,
+                                (unsigned long *)&viafb_lcd_mode);
+                else if (!strncmp(this_opt, "viafb_video_dev=", 16))
+                        viafb_video_dev = kstrdup(this_opt + 16, GFP_KERNEL);
+                else if (!strncmp(this_opt, "viafb_lcd_port=", 15))
+                        viafb_lcd_port = kstrdup(this_opt + 15, GFP_KERNEL);
+                else if (!strncmp(this_opt, "viafb_dvi_port=", 15))
+                        viafb_dvi_port = kstrdup(this_opt + 15, GFP_KERNEL);
+        }
+        return 0;
+}
+#endif
+
+static int __init viafb_init(void)
+{
+#ifndef MODULE
+        char *option = NULL;
+        if (fb_get_options("viafb", &option))
+                return -ENODEV;
+        viafb_setup(option);
+#endif
+        printk(KERN_INFO
+       "VIA Graphics Intergration Chipset framebuffer %d.%d initializing\n",
+               VERSION_MAJOR, VERSION_MINOR);
+        return via_pci_probe();
+}
+
+static void __exit viafb_exit(void)
+{
+        DEBUG_MSG(KERN_INFO "viafb_exit!\n");
+        via_pci_remove();
+}
+
+static struct fb_ops viafb_ops = {
+        .owner = THIS_MODULE,
+        .fb_open = viafb_open,
+        .fb_release = viafb_release,
+        .fb_check_var = viafb_check_var,
+        .fb_set_par = viafb_set_par,
+        .fb_setcolreg = viafb_setcolreg,
+        .fb_pan_display = viafb_pan_display,
+        .fb_blank = viafb_blank,
+        .fb_fillrect = viafb_fillrect,
+        .fb_copyarea = viafb_copyarea,
+        .fb_imageblit = viafb_imageblit,
+        .fb_cursor = viafb_cursor,
+        .fb_ioctl = viafb_ioctl,
+        .fb_sync = viafb_sync,
+        .fb_setcmap = viafb_setcmap,
+};
+
+module_init(viafb_init);
+module_exit(viafb_exit);
+
+#ifdef MODULE
+module_param(viafb_memsize, int, 0);
+
+module_param(viafb_mode, charp, 0);
+MODULE_PARM_DESC(viafb_mode, "Set resolution (default=640x480)");
+
+module_param(viafb_mode1, charp, 0);
+MODULE_PARM_DESC(viafb_mode1, "Set resolution (default=640x480)");
+
+module_param(viafb_bpp, int, 0);
+MODULE_PARM_DESC(viafb_bpp, "Set color depth (default=32bpp)");
+
+module_param(viafb_bpp1, int, 0);
+MODULE_PARM_DESC(viafb_bpp1, "Set color depth (default=32bpp)");
+
+module_param(viafb_refresh, int, 0);
+MODULE_PARM_DESC(viafb_refresh,
+        "Set CRT viafb_refresh rate (default = 60)");
+
+module_param(viafb_refresh1, int, 0);
+MODULE_PARM_DESC(viafb_refresh1,
+        "Set CRT refresh rate (default = 60)");
+
+module_param(viafb_lcd_panel_id, int, 0);
+MODULE_PARM_DESC(viafb_lcd_panel_id,
+        "Set Flat Panel type(Default=1024x768)");
+
+module_param(viafb_lcd_dsp_method, int, 0);
+MODULE_PARM_DESC(viafb_lcd_dsp_method,
+        "Set Flat Panel display scaling method.(Default=Expandsion)");
+
+module_param(viafb_SAMM_ON, int, 0);
+MODULE_PARM_DESC(viafb_SAMM_ON,
+        "Turn on/off flag of SAMM(Default=OFF)");
+
+module_param(viafb_accel, int, 0);
+MODULE_PARM_DESC(viafb_accel,
+        "Set 2D Hardware Acceleration.(Default = OFF)");
+
+module_param(viafb_active_dev, charp, 0);
+MODULE_PARM_DESC(viafb_active_dev, "Specify active devices.");
+
+module_param(viafb_display_hardware_layout, int, 0);
+MODULE_PARM_DESC(viafb_display_hardware_layout,
+        "Display Hardware Layout (LCD Only, DVI Only...,etc)");
+
+module_param(viafb_second_size, int, 0);
+MODULE_PARM_DESC(viafb_second_size,
+        "Set secondary device memory size");
+
+module_param(viafb_dual_fb, int, 0);
+MODULE_PARM_DESC(viafb_dual_fb,
+        "Turn on/off flag of dual framebuffer devices.(Default = OFF)");
+
+module_param(viafb_platform_epia_dvi, int, 0);
+MODULE_PARM_DESC(viafb_platform_epia_dvi,
+        "Turn on/off flag of DVI devices on EPIA board.(Default = OFF)");
+
+module_param(viafb_device_lcd_dualedge, int, 0);
+MODULE_PARM_DESC(viafb_device_lcd_dualedge,
+        "Turn on/off flag of dual edge panel.(Default = OFF)");
+
+module_param(viafb_bus_width, int, 0);
+MODULE_PARM_DESC(viafb_bus_width,
+        "Set bus width of panel.(Default = 12)");
+
+module_param(viafb_lcd_mode, int, 0);
+MODULE_PARM_DESC(viafb_lcd_mode,
+        "Set Flat Panel mode(Default=OPENLDI)");
+
+module_param(viafb_video_dev, charp, 0);
+MODULE_PARM_DESC(viafb_video_dev, "Specify video devices.");
+
+module_param(viafb_lcd_port, charp, 0);
+MODULE_PARM_DESC(viafb_lcd_port, "Specify LCD output port.");
+
+module_param(viafb_dvi_port, charp, 0);
+MODULE_PARM_DESC(viafb_dvi_port, "Specify DVI output port.");
+
+MODULE_LICENSE("GPL");
+#endif
diff --git a/drivers/video/via/viafbdev.h b/drivers/video/via/viafbdev.h
new file mode 100644
index 000000000000..a4158e872878
--- /dev/null
+++ b/drivers/video/via/viafbdev.h
@@ -0,0 +1,112 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef __VIAFBDEV_H__
+#define __VIAFBDEV_H__
+
+#include <linux/proc_fs.h>
+#include <linux/fb.h>
+
+#include "ioctl.h"
+#include "share.h"
+#include "chip.h"
+#include "hw.h"
+#include "via_i2c.h"
+
+#define VERSION_MAJOR       2
+#define VERSION_KERNEL      6   /* For kernel 2.6 */
+
+#define VERSION_OS          0   /* 0: for 32 bits OS, 1: for 64 bits OS */
+#define VERSION_MINOR       4
+
+struct viafb_par {
+        int bpp;
+        int hres;
+        int vres;
+        int linelength;
+        u32 xoffset;
+        u32 yoffset;
+
+        void __iomem *fbmem_virt;       /*framebuffer virtual memory address */
+        void __iomem *io_virt;  /*iospace virtual memory address */
+        unsigned int fbmem;     /*framebuffer physical memory address */
+        unsigned int memsize;   /*size of fbmem */
+        unsigned int io;        /*io space address */
+        unsigned long mmio_base;        /*mmio base address */
+        unsigned long mmio_len; /*mmio base length */
+        u32 fbmem_free;         /* Free FB memory */
+        u32 fbmem_used;         /* Use FB memory size */
+        u32 cursor_start;       /* Cursor Start Address */
+        u32 VQ_start;           /* Virtual Queue Start Address */
+        u32 VQ_end;             /* Virtual Queue End Address */
+        u32 iga_path;
+        struct proc_dir_entry *proc_entry;      /*viafb proc entry */
+        u8 duoview;             /*Is working in duoview mode? */
+
+        /* I2C stuff */
+        struct via_i2c_stuff i2c_stuff;
+
+        /* All the information will be needed to set engine */
+        struct tmds_setting_information *tmds_setting_info;
+        struct crt_setting_information *crt_setting_info;
+        struct lvds_setting_information *lvds_setting_info;
+        struct lvds_setting_information *lvds_setting_info2;
+        struct chip_information *chip_info;
+
+        /* some information related to video playing */
+        int video_on_crt;
+        int video_on_dvi;
+        int video_on_lcd;
+
+};
+struct viafb_modeinfo {
+        u32 xres;
+        u32 yres;
+        int mode_index;
+        char *mode_res;
+};
+extern unsigned int viafb_second_virtual_yres;
+extern unsigned int viafb_second_virtual_xres;
+extern unsigned int viafb_second_offset;
+extern int viafb_second_size;
+extern int viafb_SAMM_ON;
+extern int viafb_dual_fb;
+extern int viafb_LCD2_ON;
+extern int viafb_LCD_ON;
+extern int viafb_DVI_ON;
+extern int viafb_accel;
+extern int viafb_hotplug;
+extern int viafb_memsize;
+
+extern int strict_strtoul(const char *cp, unsigned int base,
+        unsigned long *res);
+
+void viafb_memory_pitch_patch(struct fb_info *info);
+void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh,
+                          int mode_index);
+int viafb_get_mode_index(int hres, int vres, int flag);
+u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information
+        *plvds_setting_info, struct lvds_chip_information
+        *plvds_chip_info, u8 index);
+void viafb_gpio_i2c_write_mask_lvds(struct lvds_setting_information
+                              *plvds_setting_info, struct lvds_chip_information
+                              *plvds_chip_info, struct IODATA io_data);
+#endif /* __VIAFBDEV_H__ */
diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c
new file mode 100644
index 000000000000..6dcf583a837d
--- /dev/null
+++ b/drivers/video/via/viamode.c
@@ -0,0 +1,1086 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include "global.h"
+struct res_map_refresh res_map_refresh_tbl[] = {
+/*hres, vres, vclock, vmode_refresh*/
+        {480, 640, RES_480X640_60HZ_PIXCLOCK, 60},
+        {640, 480, RES_640X480_60HZ_PIXCLOCK, 60},
+        {640, 480, RES_640X480_75HZ_PIXCLOCK, 75},
+        {640, 480, RES_640X480_85HZ_PIXCLOCK, 85},
+        {640, 480, RES_640X480_100HZ_PIXCLOCK, 100},
+        {640, 480, RES_640X480_120HZ_PIXCLOCK, 120},
+        {720, 480, RES_720X480_60HZ_PIXCLOCK, 60},
+        {720, 576, RES_720X576_60HZ_PIXCLOCK, 60},
+        {800, 480, RES_800X480_60HZ_PIXCLOCK, 60},
+        {800, 600, RES_800X600_60HZ_PIXCLOCK, 60},
+        {800, 600, RES_800X600_75HZ_PIXCLOCK, 75},
+        {800, 600, RES_800X600_85HZ_PIXCLOCK, 85},
+        {800, 600, RES_800X600_100HZ_PIXCLOCK, 100},
+        {800, 600, RES_800X600_120HZ_PIXCLOCK, 120},
+        {848, 480, RES_848X480_60HZ_PIXCLOCK, 60},
+        {856, 480, RES_856X480_60HZ_PIXCLOCK, 60},
+        {1024, 512, RES_1024X512_60HZ_PIXCLOCK, 60},
+        {1024, 600, RES_1024X600_60HZ_PIXCLOCK, 60},
+        {1024, 768, RES_1024X768_60HZ_PIXCLOCK, 60},
+        {1024, 768, RES_1024X768_75HZ_PIXCLOCK, 75},
+        {1024, 768, RES_1024X768_85HZ_PIXCLOCK, 85},
+        {1024, 768, RES_1024X768_100HZ_PIXCLOCK, 100},
+/*  {1152,864, RES_1152X864_70HZ_PIXCLOCK,  70},*/
+        {1152, 864, RES_1152X864_75HZ_PIXCLOCK, 75},
+        {1280, 768, RES_1280X768_60HZ_PIXCLOCK, 60},
+        {1280, 800, RES_1280X800_60HZ_PIXCLOCK, 60},
+        {1280, 960, RES_1280X960_60HZ_PIXCLOCK, 60},
+        {1280, 1024, RES_1280X1024_60HZ_PIXCLOCK, 60},
+        {1280, 1024, RES_1280X1024_75HZ_PIXCLOCK, 75},
+        {1280, 1024, RES_1280X768_85HZ_PIXCLOCK, 85},
+        {1440, 1050, RES_1440X1050_60HZ_PIXCLOCK, 60},
+        {1600, 1200, RES_1600X1200_60HZ_PIXCLOCK, 60},
+        {1600, 1200, RES_1600X1200_75HZ_PIXCLOCK, 75},
+        {1280, 720, RES_1280X720_60HZ_PIXCLOCK, 60},
+        {1920, 1080, RES_1920X1080_60HZ_PIXCLOCK, 60},
+        {1400, 1050, RES_1400X1050_60HZ_PIXCLOCK, 60},
+        {1400, 1050, RES_1400X1050_75HZ_PIXCLOCK, 75},
+        {1368, 768, RES_1368X768_60HZ_PIXCLOCK, 60},
+        {960, 600, RES_960X600_60HZ_PIXCLOCK, 60},
+        {1000, 600, RES_1000X600_60HZ_PIXCLOCK, 60},
+        {1024, 576, RES_1024X576_60HZ_PIXCLOCK, 60},
+        {1088, 612, RES_1088X612_60HZ_PIXCLOCK, 60},
+        {1152, 720, RES_1152X720_60HZ_PIXCLOCK, 60},
+        {1200, 720, RES_1200X720_60HZ_PIXCLOCK, 60},
+        {1280, 600, RES_1280X600_60HZ_PIXCLOCK, 60},
+        {1280, 720, RES_1280X720_50HZ_PIXCLOCK, 50},
+        {1280, 768, RES_1280X768_50HZ_PIXCLOCK, 50},
+        {1360, 768, RES_1360X768_60HZ_PIXCLOCK, 60},
+        {1366, 768, RES_1366X768_50HZ_PIXCLOCK, 50},
+        {1366, 768, RES_1366X768_60HZ_PIXCLOCK, 60},
+        {1440, 900, RES_1440X900_60HZ_PIXCLOCK, 60},
+        {1440, 900, RES_1440X900_75HZ_PIXCLOCK, 75},
+        {1600, 900, RES_1600X900_60HZ_PIXCLOCK, 60},
+        {1600, 1024, RES_1600X1024_60HZ_PIXCLOCK, 60},
+        {1680, 1050, RES_1680X1050_60HZ_PIXCLOCK, 60},
+        {1680, 1050, RES_1680X1050_75HZ_PIXCLOCK, 75},
+        {1792, 1344, RES_1792X1344_60HZ_PIXCLOCK, 60},
+        {1856, 1392, RES_1856X1392_60HZ_PIXCLOCK, 60},
+        {1920, 1200, RES_1920X1200_60HZ_PIXCLOCK, 60},
+        {1920, 1440, RES_1920X1440_60HZ_PIXCLOCK, 60},
+        {1920, 1440, RES_1920X1440_75HZ_PIXCLOCK, 75},
+        {2048, 1536, RES_2048X1536_60HZ_PIXCLOCK, 60}
+};
+
+struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
+{VIASR, SR15, 0x02, 0x02},
+{VIASR, SR16, 0xBF, 0x08},
+{VIASR, SR17, 0xFF, 0x1F},
+{VIASR, SR18, 0xFF, 0x4E},
+{VIASR, SR1A, 0xFB, 0x08},
+{VIASR, SR1E, 0x0F, 0x01},
+{VIASR, SR2A, 0xFF, 0x00},
+{VIACR, CR0A, 0xFF, 0x1E},      /* Cursor Start                        */
+{VIACR, CR0B, 0xFF, 0x00},      /* Cursor End                          */
+{VIACR, CR0E, 0xFF, 0x00},      /* Cursor Location High                */
+{VIACR, CR0F, 0xFF, 0x00},      /* Cursor Localtion Low                */
+{VIACR, CR32, 0xFF, 0x00},
+{VIACR, CR33, 0xFF, 0x00},
+{VIACR, CR34, 0xFF, 0x00},
+{VIACR, CR35, 0xFF, 0x00},
+{VIACR, CR36, 0x08, 0x00},
+{VIACR, CR62, 0xFF, 0x00},      /* Secondary Display Starting Address  */
+{VIACR, CR63, 0xFF, 0x00},      /* Secondary Display Starting Address  */
+{VIACR, CR64, 0xFF, 0x00},      /* Secondary Display Starting Address  */
+{VIACR, CR69, 0xFF, 0x00},
+{VIACR, CR6A, 0xFF, 0x40},
+{VIACR, CR6B, 0xFF, 0x00},
+{VIACR, CR6C, 0xFF, 0x00},
+{VIACR, CR7A, 0xFF, 0x01},      /* LCD Scaling Parameter 1             */
+{VIACR, CR7B, 0xFF, 0x02},      /* LCD Scaling Parameter 2             */
+{VIACR, CR7C, 0xFF, 0x03},      /* LCD Scaling Parameter 3             */
+{VIACR, CR7D, 0xFF, 0x04},      /* LCD Scaling Parameter 4             */
+{VIACR, CR7E, 0xFF, 0x07},      /* LCD Scaling Parameter 5             */
+{VIACR, CR7F, 0xFF, 0x0A},      /* LCD Scaling Parameter 6             */
+{VIACR, CR80, 0xFF, 0x0D},      /* LCD Scaling Parameter 7             */
+{VIACR, CR81, 0xFF, 0x13},      /* LCD Scaling Parameter 8             */
+{VIACR, CR82, 0xFF, 0x16},      /* LCD Scaling Parameter 9             */
+{VIACR, CR83, 0xFF, 0x19},      /* LCD Scaling Parameter 10            */
+{VIACR, CR84, 0xFF, 0x1C},      /* LCD Scaling Parameter 11            */
+{VIACR, CR85, 0xFF, 0x1D},      /* LCD Scaling Parameter 12            */
+{VIACR, CR86, 0xFF, 0x1E},      /* LCD Scaling Parameter 13            */
+{VIACR, CR87, 0xFF, 0x1F},      /* LCD Scaling Parameter 14            */
+{VIACR, CR88, 0xFF, 0x40},      /* LCD Panel Type                      */
+{VIACR, CR89, 0xFF, 0x00},      /* LCD Timing Control 0                */
+{VIACR, CR8A, 0xFF, 0x88},      /* LCD Timing Control 1                */
+{VIACR, CR8B, 0xFF, 0x69},      /* LCD Power Sequence Control 0        */
+{VIACR, CR8C, 0xFF, 0x57},      /* LCD Power Sequence Control 1        */
+{VIACR, CR8D, 0xFF, 0x00},      /* LCD Power Sequence Control 2        */
+{VIACR, CR8E, 0xFF, 0x7B},      /* LCD Power Sequence Control 3        */
+{VIACR, CR8F, 0xFF, 0x03},      /* LCD Power Sequence Control 4        */
+{VIACR, CR90, 0xFF, 0x30},      /* LCD Power Sequence Control 5        */
+{VIACR, CR91, 0xFF, 0xA0},      /* 24/12 bit LVDS Data off             */
+{VIACR, CR96, 0xFF, 0x00},
+{VIACR, CR97, 0xFF, 0x00},
+{VIACR, CR99, 0xFF, 0x00},
+{VIACR, CR9B, 0xFF, 0x00}
+};
+
+/* Video Mode Table for VT3314 chipset*/
+/* Common Setting for Video Mode */
+struct io_reg CN700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
+{VIASR, SR15, 0x02, 0x02},
+{VIASR, SR16, 0xBF, 0x08},
+{VIASR, SR17, 0xFF, 0x1F},
+{VIASR, SR18, 0xFF, 0x4E},
+{VIASR, SR1A, 0xFB, 0x82},
+{VIASR, SR1B, 0xFF, 0xF0},
+{VIASR, SR1F, 0xFF, 0x00},
+{VIASR, SR1E, 0xFF, 0x01},
+{VIASR, SR22, 0xFF, 0x1F},
+{VIASR, SR2A, 0x0F, 0x00},
+{VIASR, SR2E, 0xFF, 0xFF},
+{VIASR, SR3F, 0xFF, 0xFF},
+{VIASR, SR40, 0xF7, 0x00},
+{VIASR, CR30, 0xFF, 0x04},
+{VIACR, CR32, 0xFF, 0x00},
+{VIACR, CR33, 0x7F, 0x00},
+{VIACR, CR34, 0xFF, 0x00},
+{VIACR, CR35, 0xFF, 0x00},
+{VIACR, CR36, 0xFF, 0x31},
+{VIACR, CR41, 0xFF, 0x80},
+{VIACR, CR42, 0xFF, 0x00},
+{VIACR, CR55, 0x80, 0x00},
+{VIACR, CR5D, 0x80, 0x00},      /*Horizontal Retrace Start bit[11] should be 0*/
+{VIACR, CR62, 0xFF, 0x00},      /* Secondary Display Starting Address */
+{VIACR, CR63, 0xFF, 0x00},      /* Secondary Display Starting Address */
+{VIACR, CR64, 0xFF, 0x00},      /* Secondary Display Starting Address */
+{VIACR, CR68, 0xFF, 0x67},      /* Default FIFO For IGA2 */
+{VIACR, CR69, 0xFF, 0x00},
+{VIACR, CR6A, 0xFD, 0x40},
+{VIACR, CR6B, 0xFF, 0x00},
+{VIACR, CR6C, 0xFF, 0x00},
+{VIACR, CR77, 0xFF, 0x00},      /* LCD scaling Factor */
+{VIACR, CR78, 0xFF, 0x00},      /* LCD scaling Factor */
+{VIACR, CR79, 0xFF, 0x00},      /* LCD scaling Factor */
+{VIACR, CR9F, 0x03, 0x00},      /* LCD scaling Factor */
+{VIACR, CR7A, 0xFF, 0x01},      /* LCD Scaling Parameter 1 */
+{VIACR, CR7B, 0xFF, 0x02},      /* LCD Scaling Parameter 2 */
+{VIACR, CR7C, 0xFF, 0x03},      /* LCD Scaling Parameter 3 */
+{VIACR, CR7D, 0xFF, 0x04},      /* LCD Scaling Parameter 4 */
+{VIACR, CR7E, 0xFF, 0x07},      /* LCD Scaling Parameter 5 */
+{VIACR, CR7F, 0xFF, 0x0A},      /* LCD Scaling Parameter 6 */
+{VIACR, CR80, 0xFF, 0x0D},      /* LCD Scaling Parameter 7 */
+{VIACR, CR81, 0xFF, 0x13},      /* LCD Scaling Parameter 8 */
+{VIACR, CR82, 0xFF, 0x16},      /* LCD Scaling Parameter 9 */
+{VIACR, CR83, 0xFF, 0x19},      /* LCD Scaling Parameter 10 */
+{VIACR, CR84, 0xFF, 0x1C},      /* LCD Scaling Parameter 11 */
+{VIACR, CR85, 0xFF, 0x1D},      /* LCD Scaling Parameter 12 */
+{VIACR, CR86, 0xFF, 0x1E},      /* LCD Scaling Parameter 13 */
+{VIACR, CR87, 0xFF, 0x1F},      /* LCD Scaling Parameter 14 */
+{VIACR, CR88, 0xFF, 0x40},      /* LCD Panel Type */
+{VIACR, CR89, 0xFF, 0x00},      /* LCD Timing Control 0 */
+{VIACR, CR8A, 0xFF, 0x88},      /* LCD Timing Control 1 */
+{VIACR, CR8B, 0xFF, 0x5D},      /* LCD Power Sequence Control 0 */
+{VIACR, CR8C, 0xFF, 0x2B},      /* LCD Power Sequence Control 1 */
+{VIACR, CR8D, 0xFF, 0x6F},      /* LCD Power Sequence Control 2 */
+{VIACR, CR8E, 0xFF, 0x2B},      /* LCD Power Sequence Control 3 */
+{VIACR, CR8F, 0xFF, 0x01},      /* LCD Power Sequence Control 4 */
+{VIACR, CR90, 0xFF, 0x01},      /* LCD Power Sequence Control 5 */
+{VIACR, CR91, 0xFF, 0xA0},      /* 24/12 bit LVDS Data off */
+{VIACR, CR96, 0xFF, 0x00},
+{VIACR, CR97, 0xFF, 0x00},
+{VIACR, CR99, 0xFF, 0x00},
+{VIACR, CR9B, 0xFF, 0x00},
+{VIACR, CR9D, 0xFF, 0x80},
+{VIACR, CR9E, 0xFF, 0x80}
+};
+
+struct io_reg KM400_ModeXregs[] = {
+        {VIASR, SR10, 0xFF, 0x01},      /* Unlock Register                 */
+        {VIASR, SR16, 0xFF, 0x08},      /* Display FIFO threshold Control  */
+        {VIASR, SR17, 0xFF, 0x1F},      /* Display FIFO Control            */
+        {VIASR, SR18, 0xFF, 0x4E},      /* GFX PREQ threshold              */
+        {VIASR, SR1A, 0xFF, 0x0a},      /* GFX PREQ threshold              */
+        {VIASR, SR1F, 0xFF, 0x00},      /* Memory Control 0                */
+        {VIASR, SR1B, 0xFF, 0xF0},      /* Power Management Control 0      */
+        {VIASR, SR1E, 0xFF, 0x01},      /* Power Management Control        */
+        {VIASR, SR20, 0xFF, 0x00},      /* Sequencer Arbiter Control 0     */
+        {VIASR, SR21, 0xFF, 0x00},      /* Sequencer Arbiter Control 1     */
+        {VIASR, SR22, 0xFF, 0x1F},      /* Display Arbiter Control 1       */
+        {VIASR, SR2A, 0xFF, 0x00},      /* Power Management Control 5      */
+        {VIASR, SR2D, 0xFF, 0xFF},      /* Power Management Control 1      */
+        {VIASR, SR2E, 0xFF, 0xFF},      /* Power Management Control 2      */
+        {VIACR, CR0A, 0xFF, 0x1E},      /* Cursor Start                    */
+        {VIACR, CR0B, 0xFF, 0x00},      /* Cursor End                      */
+        {VIACR, CR0E, 0xFF, 0x00},      /* Cursor Location High            */
+        {VIACR, CR0F, 0xFF, 0x00},      /* Cursor Localtion Low            */
+        {VIACR, CR33, 0xFF, 0x00},
+        {VIACR, CR55, 0x80, 0x00},
+        {VIACR, CR5D, 0x80, 0x00},
+        {VIACR, CR36, 0xFF, 0x01},      /* Power Mangement 3                  */
+        {VIACR, CR62, 0xFF, 0x00},      /* Secondary Display Starting Address */
+        {VIACR, CR63, 0xFF, 0x00},      /* Secondary Display Starting Address */
+        {VIACR, CR64, 0xFF, 0x00},      /* Secondary Display Starting Address */
+        {VIACR, CR68, 0xFF, 0x67},      /* Default FIFO For IGA2              */
+        {VIACR, CR6A, 0x20, 0x20},      /* Extended FIFO On                   */
+        {VIACR, CR7A, 0xFF, 0x01},      /* LCD Scaling Parameter 1            */
+        {VIACR, CR7B, 0xFF, 0x02},      /* LCD Scaling Parameter 2            */
+        {VIACR, CR7C, 0xFF, 0x03},      /* LCD Scaling Parameter 3            */
+        {VIACR, CR7D, 0xFF, 0x04},      /* LCD Scaling Parameter 4            */
+        {VIACR, CR7E, 0xFF, 0x07},      /* LCD Scaling Parameter 5            */
+        {VIACR, CR7F, 0xFF, 0x0A},      /* LCD Scaling Parameter 6            */
+        {VIACR, CR80, 0xFF, 0x0D},      /* LCD Scaling Parameter 7            */
+        {VIACR, CR81, 0xFF, 0x13},      /* LCD Scaling Parameter 8            */
+        {VIACR, CR82, 0xFF, 0x16},      /* LCD Scaling Parameter 9            */
+        {VIACR, CR83, 0xFF, 0x19},      /* LCD Scaling Parameter 10           */
+        {VIACR, CR84, 0xFF, 0x1C},      /* LCD Scaling Parameter 11           */
+        {VIACR, CR85, 0xFF, 0x1D},      /* LCD Scaling Parameter 12           */
+        {VIACR, CR86, 0xFF, 0x1E},      /* LCD Scaling Parameter 13           */
+        {VIACR, CR87, 0xFF, 0x1F},      /* LCD Scaling Parameter 14           */
+        {VIACR, CR88, 0xFF, 0x40},      /* LCD Panel Type                     */
+        {VIACR, CR89, 0xFF, 0x00},      /* LCD Timing Control 0               */
+        {VIACR, CR8A, 0xFF, 0x88},      /* LCD Timing Control 1               */
+        {VIACR, CR8B, 0xFF, 0x2D},      /* LCD Power Sequence Control 0       */
+        {VIACR, CR8C, 0xFF, 0x2D},      /* LCD Power Sequence Control 1       */
+        {VIACR, CR8D, 0xFF, 0xC8},      /* LCD Power Sequence Control 2       */
+        {VIACR, CR8E, 0xFF, 0x36},      /* LCD Power Sequence Control 3       */
+        {VIACR, CR8F, 0xFF, 0x00},      /* LCD Power Sequence Control 4       */
+        {VIACR, CR90, 0xFF, 0x10},      /* LCD Power Sequence Control 5       */
+        {VIACR, CR91, 0xFF, 0xA0},      /* 24/12 bit LVDS Data off            */
+        {VIACR, CR96, 0xFF, 0x03},      /* DVP0        ; DVP0 Clock Skew */
+        {VIACR, CR97, 0xFF, 0x03},      /* DFP high    ; DFPH Clock Skew */
+        {VIACR, CR99, 0xFF, 0x03},      /* DFP low           ; DFPL Clock Skew*/
+        {VIACR, CR9B, 0xFF, 0x07}       /* DVI on DVP1       ; DVP1 Clock Skew*/
+};
+
+/* For VT3324: Common Setting for Video Mode */
+struct io_reg CX700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
+{VIASR, SR15, 0x02, 0x02},
+{VIASR, SR16, 0xBF, 0x08},
+{VIASR, SR17, 0xFF, 0x1F},
+{VIASR, SR18, 0xFF, 0x4E},
+{VIASR, SR1A, 0xFB, 0x08},
+{VIASR, SR1B, 0xFF, 0xF0},
+{VIASR, SR1E, 0xFF, 0x01},
+{VIASR, SR2A, 0xFF, 0x00},
+{VIASR, SR2D, 0xFF, 0xFF},      /* VCK and LCK PLL power on.           */
+{VIACR, CR0A, 0xFF, 0x1E},      /* Cursor Start                        */
+{VIACR, CR0B, 0xFF, 0x00},      /* Cursor End                          */
+{VIACR, CR0E, 0xFF, 0x00},      /* Cursor Location High                */
+{VIACR, CR0F, 0xFF, 0x00},      /* Cursor Localtion Low                */
+{VIACR, CR32, 0xFF, 0x00},
+{VIACR, CR33, 0xFF, 0x00},
+{VIACR, CR34, 0xFF, 0x00},
+{VIACR, CR35, 0xFF, 0x00},
+{VIACR, CR36, 0x08, 0x00},
+{VIACR, CR47, 0xC8, 0x00},      /* Clear VCK Plus. */
+{VIACR, CR62, 0xFF, 0x00},      /* Secondary Display Starting Address  */
+{VIACR, CR63, 0xFF, 0x00},      /* Secondary Display Starting Address  */
+{VIACR, CR64, 0xFF, 0x00},      /* Secondary Display Starting Address  */
+{VIACR, CRA3, 0xFF, 0x00},      /* Secondary Display Starting Address  */
+{VIACR, CR69, 0xFF, 0x00},
+{VIACR, CR6A, 0xFF, 0x40},
+{VIACR, CR6B, 0xFF, 0x00},
+{VIACR, CR6C, 0xFF, 0x00},
+{VIACR, CR7A, 0xFF, 0x01},      /* LCD Scaling Parameter 1             */
+{VIACR, CR7B, 0xFF, 0x02},      /* LCD Scaling Parameter 2             */
+{VIACR, CR7C, 0xFF, 0x03},      /* LCD Scaling Parameter 3             */
+{VIACR, CR7D, 0xFF, 0x04},      /* LCD Scaling Parameter 4             */
+{VIACR, CR7E, 0xFF, 0x07},      /* LCD Scaling Parameter 5             */
+{VIACR, CR7F, 0xFF, 0x0A},      /* LCD Scaling Parameter 6             */
+{VIACR, CR80, 0xFF, 0x0D},      /* LCD Scaling Parameter 7             */
+{VIACR, CR81, 0xFF, 0x13},      /* LCD Scaling Parameter 8             */
+{VIACR, CR82, 0xFF, 0x16},      /* LCD Scaling Parameter 9             */
+{VIACR, CR83, 0xFF, 0x19},      /* LCD Scaling Parameter 10            */
+{VIACR, CR84, 0xFF, 0x1C},      /* LCD Scaling Parameter 11            */
+{VIACR, CR85, 0xFF, 0x1D},      /* LCD Scaling Parameter 12            */
+{VIACR, CR86, 0xFF, 0x1E},      /* LCD Scaling Parameter 13            */
+{VIACR, CR87, 0xFF, 0x1F},      /* LCD Scaling Parameter 14            */
+{VIACR, CR88, 0xFF, 0x40},      /* LCD Panel Type                      */
+{VIACR, CR89, 0xFF, 0x00},      /* LCD Timing Control 0                */
+{VIACR, CR8A, 0xFF, 0x88},      /* LCD Timing Control 1                */
+{VIACR, CRD4, 0xFF, 0x81},      /* Second power sequence control       */
+{VIACR, CR8B, 0xFF, 0x5D},      /* LCD Power Sequence Control 0        */
+{VIACR, CR8C, 0xFF, 0x2B},      /* LCD Power Sequence Control 1        */
+{VIACR, CR8D, 0xFF, 0x6F},      /* LCD Power Sequence Control 2        */
+{VIACR, CR8E, 0xFF, 0x2B},      /* LCD Power Sequence Control 3        */
+{VIACR, CR8F, 0xFF, 0x01},      /* LCD Power Sequence Control 4        */
+{VIACR, CR90, 0xFF, 0x01},      /* LCD Power Sequence Control 5        */
+{VIACR, CR91, 0xFF, 0x80},      /* 24/12 bit LVDS Data off             */
+{VIACR, CR96, 0xFF, 0x00},
+{VIACR, CR97, 0xFF, 0x00},
+{VIACR, CR99, 0xFF, 0x00},
+{VIACR, CR9B, 0xFF, 0x00},
+{VIACR, CRD2, 0xFF, 0xFF}       /* TMDS/LVDS control register.         */
+};
+
+/* For VT3353: Common Setting for Video Mode */
+struct io_reg VX800_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
+{VIASR, SR15, 0x02, 0x02},
+{VIASR, SR16, 0xBF, 0x08},
+{VIASR, SR17, 0xFF, 0x1F},
+{VIASR, SR18, 0xFF, 0x4E},
+{VIASR, SR1A, 0xFB, 0x08},
+{VIASR, SR1B, 0xFF, 0xF0},
+{VIASR, SR1E, 0xFF, 0x01},
+{VIASR, SR2A, 0xFF, 0x00},
+{VIASR, SR2D, 0xFF, 0xFF},      /* VCK and LCK PLL power on.           */
+{VIACR, CR0A, 0xFF, 0x1E},      /* Cursor Start                        */
+{VIACR, CR0B, 0xFF, 0x00},      /* Cursor End                          */
+{VIACR, CR0E, 0xFF, 0x00},      /* Cursor Location High                */
+{VIACR, CR0F, 0xFF, 0x00},      /* Cursor Localtion Low                */
+{VIACR, CR32, 0xFF, 0x00},
+{VIACR, CR33, 0xFF, 0x00},
+{VIACR, CR34, 0xFF, 0x00},
+{VIACR, CR35, 0xFF, 0x00},
+{VIACR, CR36, 0x08, 0x00},
+{VIACR, CR47, 0xC8, 0x00},      /* Clear VCK Plus. */
+{VIACR, CR62, 0xFF, 0x00},      /* Secondary Display Starting Address  */
+{VIACR, CR63, 0xFF, 0x00},      /* Secondary Display Starting Address  */
+{VIACR, CR64, 0xFF, 0x00},      /* Secondary Display Starting Address  */
+{VIACR, CRA3, 0xFF, 0x00},      /* Secondary Display Starting Address  */
+{VIACR, CR69, 0xFF, 0x00},
+{VIACR, CR6A, 0xFF, 0x40},
+{VIACR, CR6B, 0xFF, 0x00},
+{VIACR, CR6C, 0xFF, 0x00},
+{VIACR, CR7A, 0xFF, 0x01},      /* LCD Scaling Parameter 1             */
+{VIACR, CR7B, 0xFF, 0x02},      /* LCD Scaling Parameter 2             */
+{VIACR, CR7C, 0xFF, 0x03},      /* LCD Scaling Parameter 3             */
+{VIACR, CR7D, 0xFF, 0x04},      /* LCD Scaling Parameter 4             */
+{VIACR, CR7E, 0xFF, 0x07},      /* LCD Scaling Parameter 5             */
+{VIACR, CR7F, 0xFF, 0x0A},      /* LCD Scaling Parameter 6             */
+{VIACR, CR80, 0xFF, 0x0D},      /* LCD Scaling Parameter 7             */
+{VIACR, CR81, 0xFF, 0x13},      /* LCD Scaling Parameter 8             */
+{VIACR, CR82, 0xFF, 0x16},      /* LCD Scaling Parameter 9             */
+{VIACR, CR83, 0xFF, 0x19},      /* LCD Scaling Parameter 10            */
+{VIACR, CR84, 0xFF, 0x1C},      /* LCD Scaling Parameter 11            */
+{VIACR, CR85, 0xFF, 0x1D},      /* LCD Scaling Parameter 12            */
+{VIACR, CR86, 0xFF, 0x1E},      /* LCD Scaling Parameter 13            */
+{VIACR, CR87, 0xFF, 0x1F},      /* LCD Scaling Parameter 14            */
+{VIACR, CR88, 0xFF, 0x40},      /* LCD Panel Type                      */
+{VIACR, CR89, 0xFF, 0x00},      /* LCD Timing Control 0                */
+{VIACR, CR8A, 0xFF, 0x88},      /* LCD Timing Control 1                */
+{VIACR, CRD4, 0xFF, 0x81},      /* Second power sequence control       */
+{VIACR, CR8B, 0xFF, 0x5D},      /* LCD Power Sequence Control 0        */
+{VIACR, CR8C, 0xFF, 0x2B},      /* LCD Power Sequence Control 1        */
+{VIACR, CR8D, 0xFF, 0x6F},      /* LCD Power Sequence Control 2        */
+{VIACR, CR8E, 0xFF, 0x2B},      /* LCD Power Sequence Control 3        */
+{VIACR, CR8F, 0xFF, 0x01},      /* LCD Power Sequence Control 4        */
+{VIACR, CR90, 0xFF, 0x01},      /* LCD Power Sequence Control 5        */
+{VIACR, CR91, 0xFF, 0x80},      /* 24/12 bit LVDS Data off             */
+{VIACR, CR96, 0xFF, 0x00},
+{VIACR, CR97, 0xFF, 0x00},
+{VIACR, CR99, 0xFF, 0x00},
+{VIACR, CR9B, 0xFF, 0x00},
+{VIACR, CRD2, 0xFF, 0xFF}       /* TMDS/LVDS control register.         */
+};
+
+/* Video Mode Table */
+/* Common Setting for Video Mode */
+struct io_reg CLE266_ModeXregs[] = { {VIASR, SR1E, 0xF0, 0x00},
+{VIASR, SR2A, 0x0F, 0x00},
+{VIASR, SR15, 0x02, 0x02},
+{VIASR, SR16, 0xBF, 0x08},
+{VIASR, SR17, 0xFF, 0x1F},
+{VIASR, SR18, 0xFF, 0x4E},
+{VIASR, SR1A, 0xFB, 0x08},
+
+{VIACR, CR32, 0xFF, 0x00},
+{VIACR, CR34, 0xFF, 0x00},
+{VIACR, CR35, 0xFF, 0x00},
+{VIACR, CR36, 0x08, 0x00},
+{VIACR, CR6A, 0xFF, 0x80},
+{VIACR, CR6A, 0xFF, 0xC0},
+
+{VIACR, CR55, 0x80, 0x00},
+{VIACR, CR5D, 0x80, 0x00},
+
+{VIAGR, GR20, 0xFF, 0x00},
+{VIAGR, GR21, 0xFF, 0x00},
+{VIAGR, GR22, 0xFF, 0x00},
+        /* LCD Parameters */
+{VIACR, CR7A, 0xFF, 0x01},      /* LCD Parameter 1 */
+{VIACR, CR7B, 0xFF, 0x02},      /* LCD Parameter 2 */
+{VIACR, CR7C, 0xFF, 0x03},      /* LCD Parameter 3 */
+{VIACR, CR7D, 0xFF, 0x04},      /* LCD Parameter 4 */
+{VIACR, CR7E, 0xFF, 0x07},      /* LCD Parameter 5 */
+{VIACR, CR7F, 0xFF, 0x0A},      /* LCD Parameter 6 */
+{VIACR, CR80, 0xFF, 0x0D},      /* LCD Parameter 7 */
+{VIACR, CR81, 0xFF, 0x13},      /* LCD Parameter 8 */
+{VIACR, CR82, 0xFF, 0x16},      /* LCD Parameter 9 */
+{VIACR, CR83, 0xFF, 0x19},      /* LCD Parameter 10 */
+{VIACR, CR84, 0xFF, 0x1C},      /* LCD Parameter 11 */
+{VIACR, CR85, 0xFF, 0x1D},      /* LCD Parameter 12 */
+{VIACR, CR86, 0xFF, 0x1E},      /* LCD Parameter 13 */
+{VIACR, CR87, 0xFF, 0x1F},      /* LCD Parameter 14 */
+
+};
+
+/* Mode:1024X768 */
+struct io_reg PM1024x768[] = { {VIASR, 0x16, 0xBF, 0x0C},
+{VIASR, 0x18, 0xFF, 0x4C}
+};
+
+struct patch_table res_patch_table[] = {
+        {VIA_RES_1024X768, ARRAY_SIZE(PM1024x768), PM1024x768}
+};
+
+/* struct VPITTable {
+        unsigned char  Misc;
+        unsigned char  SR[StdSR];
+        unsigned char  CR[StdCR];
+        unsigned char  GR[StdGR];
+        unsigned char  AR[StdAR];
+ };*/
+
+struct VPITTable VPIT = {
+        /* Msic */
+        0xC7,
+        /* Sequencer */
+        {0x01, 0x0F, 0x00, 0x0E},
+        /* Graphic Controller */
+        {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0F, 0xFF},
+        /* Attribute Controller */
+        {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+         0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
+         0x01, 0x00, 0x0F, 0x00}
+};
+
+/********************/
+/* Mode Table       */
+/********************/
+
+/* 480x640 */
+struct crt_mode_table CRTM480x640[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_25_175M, M480X640_R60_HSP, M480X640_R60_VSP,
+         {624, 480, 480, 144, 504, 48, 663, 640, 640, 23, 641, 3} }     /* GTF*/
+};
+
+/* 640x480*/
+struct crt_mode_table CRTM640x480[] = {
+        /*r_rate,vclk,hsp,vsp */
+        /*HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_25_175M, M640X480_R60_HSP, M640X480_R60_VSP,
+         {800, 640, 648, 144, 656, 96, 525, 480, 480, 45, 490, 2} },
+        {REFRESH_75, CLK_31_500M, M640X480_R75_HSP, M640X480_R75_VSP,
+         {840, 640, 640, 200, 656, 64, 500, 480, 480, 20, 481, 3} },
+        {REFRESH_85, CLK_36_000M, M640X480_R85_HSP, M640X480_R85_VSP,
+         {832, 640, 640, 192, 696, 56, 509, 480, 480, 29, 481, 3} },
+        {REFRESH_100, CLK_43_163M, M640X480_R100_HSP, M640X480_R100_VSP,
+         {848, 640, 640, 208, 680, 64, 509, 480, 480, 29, 481, 3} }, /*GTF*/
+            {REFRESH_120, CLK_52_406M, M640X480_R120_HSP,
+             M640X480_R120_VSP,
+             {848, 640, 640, 208, 680, 64, 515, 480, 480, 35, 481,
+              3} } /*GTF*/
+};
+
+/*720x480 (GTF)*/
+struct crt_mode_table CRTM720x480[] = {
+        /*r_rate,vclk,hsp,vsp      */
+        /*HT, HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_26_880M, M720X480_R60_HSP, M720X480_R60_VSP,
+         {896, 720, 720, 176, 736, 72, 497, 480, 480, 17, 481, 3} }
+
+};
+
+/*720x576 (GTF)*/
+struct crt_mode_table CRTM720x576[] = {
+        /*r_rate,vclk,hsp,vsp */
+        /*HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_32_668M, M720X576_R60_HSP, M720X576_R60_VSP,
+         {912, 720, 720, 192, 744, 72, 597, 576, 576, 21, 577, 3} }
+};
+
+/* 800x480 (CVT) */
+struct crt_mode_table CRTM800x480[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_29_581M, M800X480_R60_HSP, M800X480_R60_VSP,
+         {992, 800, 800, 192, 824, 72, 500, 480, 480, 20, 483, 7} }
+};
+
+/* 800x600*/
+struct crt_mode_table CRTM800x600[] = {
+        /*r_rate,vclk,hsp,vsp     */
+        /*HT,   HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_40_000M, M800X600_R60_HSP, M800X600_R60_VSP,
+         {1056, 800, 800, 256, 840, 128, 628, 600, 600, 28, 601, 4} },
+        {REFRESH_75, CLK_49_500M, M800X600_R75_HSP, M800X600_R75_VSP,
+         {1056, 800, 800, 256, 816, 80, 625, 600, 600, 25, 601, 3} },
+        {REFRESH_85, CLK_56_250M, M800X600_R85_HSP, M800X600_R85_VSP,
+         {1048, 800, 800, 248, 832, 64, 631, 600, 600, 31, 601, 3} },
+        {REFRESH_100, CLK_68_179M, M800X600_R100_HSP, M800X600_R100_VSP,
+         {1072, 800, 800, 272, 848, 88, 636, 600, 600, 36, 601, 3} },
+        {REFRESH_120, CLK_83_950M, M800X600_R120_HSP,
+                  M800X600_R120_VSP,
+                  {1088, 800, 800, 288, 856, 88, 643, 600, 600, 43, 601,
+                   3} }
+};
+
+/* 848x480 (CVT) */
+struct crt_mode_table CRTM848x480[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_31_500M, M848X480_R60_HSP, M848X480_R60_VSP,
+         {1056, 848, 848, 208, 872, 80, 500, 480, 480, 20, 483, 5} }
+};
+
+/*856x480 (GTF) convert to 852x480*/
+struct crt_mode_table CRTM852x480[] = {
+        /*r_rate,vclk,hsp,vsp     */
+        /*HT,   HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_31_728M, M852X480_R60_HSP, M852X480_R60_VSP,
+        {1064, 856, 856, 208, 872, 88, 497, 480, 480, 17, 481, 3} }
+};
+
+/*1024x512 (GTF)*/
+struct crt_mode_table CRTM1024x512[] = {
+        /*r_rate,vclk,hsp,vsp     */
+        /*HT,   HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_41_291M, M1024X512_R60_HSP, M1024X512_R60_VSP,
+         {1296, 1024, 1024, 272, 1056, 104, 531, 512, 512, 19, 513, 3} }
+
+};
+
+/* 1024x600*/
+struct crt_mode_table CRTM1024x600[] = {
+        /*r_rate,vclk,hsp,vsp */
+        /*HT,  HA,   HBS,  HBE, HSS,  HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_48_875M, M1024X600_R60_HSP, M1024X600_R60_VSP,
+         {1312, 1024, 1024, 288, 1064, 104, 622, 600, 600, 22, 601, 3} },
+};
+
+/* 1024x768*/
+struct crt_mode_table CRTM1024x768[] = {
+        /*r_rate,vclk,hsp,vsp */
+        /*HT,  HA,   HBS,  HBE, HSS,  HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_65_000M, M1024X768_R60_HSP, M1024X768_R60_VSP,
+        {1344, 1024, 1024, 320, 1048, 136, 806, 768, 768, 38, 771, 6} },
+        {REFRESH_75, CLK_78_750M, M1024X768_R75_HSP, M1024X768_R75_VSP,
+        {1312, 1024, 1024, 288, 1040, 96, 800, 768, 768, 32, 769, 3} },
+        {REFRESH_85, CLK_94_500M, M1024X768_R85_HSP, M1024X768_R85_VSP,
+        {1376, 1024, 1024, 352, 1072, 96, 808, 768, 768, 40, 769, 3} },
+        {REFRESH_100, CLK_113_309M, M1024X768_R100_HSP, M1024X768_R100_VSP,
+        {1392, 1024, 1024, 368, 1096, 112, 814, 768, 768, 46, 769, 3} }
+};
+
+/* 1152x864*/
+struct crt_mode_table CRTM1152x864[] = {
+        /*r_rate,vclk,hsp,vsp      */
+        /*HT,  HA,   HBS,  HBE, HSS,  HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_75, CLK_108_000M, M1152X864_R75_HSP, M1152X864_R75_VSP,
+         {1600, 1152, 1152, 448, 1216, 128, 900, 864, 864, 36, 865, 3} }
+
+};
+
+/* 1280x720 (HDMI 720P)*/
+struct crt_mode_table CRTM1280x720[] = {
+        /*r_rate,vclk,hsp,vsp */
+        /*HT,  HA,   HBS,  HBE, HSS,  HSE, VT,  VA,  VBS, VBE, VSS, VSE      */
+        {REFRESH_60, CLK_74_481M, M1280X720_R60_HSP, M1280X720_R60_VSP,
+         {1648, 1280, 1280, 368, 1392, 40, 750, 720, 720, 30, 725, 5} },
+        {REFRESH_50, CLK_60_466M, M1280X720_R50_HSP, M1280X720_R50_VSP,
+         {1632, 1280, 1280, 352, 1328, 128, 741, 720, 720, 21, 721, 3} }
+};
+
+/*1280x768 (GTF)*/
+struct crt_mode_table CRTM1280x768[] = {
+        /*r_rate,vclk,hsp,vsp     */
+        /*HT,  HA,   HBS,  HBE, HSS,  HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_80_136M, M1280X768_R60_HSP, M1280X768_R60_VSP,
+         {1680, 1280, 1280, 400, 1344, 136, 795, 768, 768, 27, 769, 3} },
+        {REFRESH_50, CLK_65_178M, M1280X768_R50_HSP, M1280X768_R50_VSP,
+         {1648, 1280, 1280, 368, 1336, 128, 791, 768, 768, 23, 769, 3} }
+};
+
+/* 1280x800 (CVT) */
+struct crt_mode_table CRTM1280x800[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_83_375M, M1280X800_R60_HSP, M1280X800_R60_VSP,
+         {1680, 1280, 1280, 400, 1352, 128, 831, 800, 800, 31, 803, 6} }
+};
+
+/*1280x960*/
+struct crt_mode_table CRTM1280x960[] = {
+        /*r_rate,vclk,hsp,vsp */
+        /*HT,  HA,   HBS,  HBE, HSS,  HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_108_000M, M1280X960_R60_HSP, M1280X960_R60_VSP,
+         {1800, 1280, 1280, 520, 1376, 112, 1000, 960, 960, 40, 961, 3} }
+};
+
+/* 1280x1024*/
+struct crt_mode_table CRTM1280x1024[] = {
+        /*r_rate,vclk,,hsp,vsp */
+        /*HT,  HA,   HBS,  HBE, HSS,  HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_108_000M, M1280X1024_R60_HSP, M1280X1024_R60_VSP,
+         {1688, 1280, 1280, 408, 1328, 112, 1066, 1024, 1024, 42, 1025,
+          3} },
+        {REFRESH_75, CLK_135_000M, M1280X1024_R75_HSP, M1280X1024_R75_VSP,
+         {1688, 1280, 1280, 408, 1296, 144, 1066, 1024, 1024, 42, 1025,
+          3} },
+        {REFRESH_85, CLK_157_500M, M1280X1024_R85_HSP, M1280X1024_R85_VSP,
+         {1728, 1280, 1280, 448, 1344, 160, 1072, 1024, 1024, 48, 1025, 3} }
+};
+
+/* 1368x768 (GTF) */
+struct crt_mode_table CRTM1368x768[] = {
+        /* r_rate,  vclk, hsp, vsp */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_85_860M, M1368X768_R60_HSP, M1368X768_R60_VSP,
+         {1800, 1368, 1368, 432, 1440, 144, 795, 768, 768, 27, 769, 3} }
+};
+
+/*1440x1050 (GTF)*/
+struct crt_mode_table CRTM1440x1050[] = {
+        /*r_rate,vclk,hsp,vsp      */
+        /*HT,  HA,   HBS,  HBE, HSS,  HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_125_104M, M1440X1050_R60_HSP, M1440X1050_R60_VSP,
+         {1936, 1440, 1440, 496, 1536, 152, 1077, 1040, 1040, 37, 1041, 3} }
+};
+
+/* 1600x1200*/
+struct crt_mode_table CRTM1600x1200[] = {
+        /*r_rate,vclk,hsp,vsp */
+        /*HT,  HA,   HBS,  HBE, HSS,  HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_162_000M, M1600X1200_R60_HSP, M1600X1200_R60_VSP,
+         {2160, 1600, 1600, 560, 1664, 192, 1250, 1200, 1200, 50, 1201,
+          3} },
+        {REFRESH_75, CLK_202_500M, M1600X1200_R75_HSP, M1600X1200_R75_VSP,
+         {2160, 1600, 1600, 560, 1664, 192, 1250, 1200, 1200, 50, 1201, 3} }
+
+};
+
+/* 1680x1050 (CVT) */
+struct crt_mode_table CRTM1680x1050[] = {
+        /* r_rate,          vclk,              hsp,             vsp  */
+        /* HT,  HA,  HBS, HBE, HSS, HSE,    VT,  VA,  VBS, VBE,  VSS, VSE */
+        {REFRESH_60, CLK_146_760M, M1680x1050_R60_HSP, M1680x1050_R60_VSP,
+         {2240, 1680, 1680, 560, 1784, 176, 1089, 1050, 1050, 39, 1053,
+          6} },
+        {REFRESH_75, CLK_187_000M, M1680x1050_R75_HSP, M1680x1050_R75_VSP,
+         {2272, 1680, 1680, 592, 1800, 176, 1099, 1050, 1050, 49, 1053, 6} }
+};
+
+/* 1680x1050 (CVT Reduce Blanking) */
+struct crt_mode_table CRTM1680x1050_RB[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE,    VT,  VA,  VBS, VBE,  VSS, VSE */
+        {REFRESH_60, CLK_119_000M, M1680x1050_RB_R60_HSP,
+         M1680x1050_RB_R60_VSP,
+         {1840, 1680, 1680, 160, 1728, 32, 1080, 1050, 1050, 30, 1053, 6} }
+};
+
+/* 1920x1080 (CVT)*/
+struct crt_mode_table CRTM1920x1080[] = {
+        /*r_rate,vclk,hsp,vsp */
+        /*HT,  HA,   HBS,  HBE, HSS,  HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_172_798M, M1920X1080_R60_HSP, M1920X1080_R60_VSP,
+         {2576, 1920, 1920, 656, 2048, 200, 1120, 1080, 1080, 40, 1083, 5} }
+};
+
+/* 1920x1080 (CVT with Reduce Blanking) */
+struct crt_mode_table CRTM1920x1080_RB[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_138_400M, M1920X1080_RB_R60_HSP,
+         M1920X1080_RB_R60_VSP,
+         {2080, 1920, 1920, 160, 1968, 32, 1111, 1080, 1080, 31, 1083, 5} }
+};
+
+/* 1920x1440*/
+struct crt_mode_table CRTM1920x1440[] = {
+        /*r_rate,vclk,hsp,vsp */
+        /*HT,  HA,   HBS,  HBE, HSS,  HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_234_000M, M1920X1440_R60_HSP, M1920X1440_R60_VSP,
+         {2600, 1920, 1920, 680, 2048, 208, 1500, 1440, 1440, 60, 1441,
+          3} },
+        {REFRESH_75, CLK_297_500M, M1920X1440_R75_HSP, M1920X1440_R75_VSP,
+         {2640, 1920, 1920, 720, 2064, 224, 1500, 1440, 1440, 60, 1441, 3} }
+};
+
+/* 1400x1050 (CVT) */
+struct crt_mode_table CRTM1400x1050[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE,  HSS, HSE,   VT,  VA,  VBS, VBE,  VSS, VSE */
+        {REFRESH_60, CLK_121_750M, M1400X1050_R60_HSP, M1400X1050_R60_VSP,
+         {1864, 1400, 1400, 464, 1488, 144, 1089, 1050, 1050, 39, 1053,
+          4} },
+        {REFRESH_75, CLK_156_000M, M1400X1050_R75_HSP, M1400X1050_R75_VSP,
+         {1896, 1400, 1400, 496, 1504, 144, 1099, 1050, 1050, 49, 1053, 4} }
+};
+
+/* 1400x1050 (CVT Reduce Blanking) */
+struct crt_mode_table CRTM1400x1050_RB[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE,  HSS, HSE,   VT,  VA,  VBS, VBE,  VSS, VSE */
+        {REFRESH_60, CLK_101_000M, M1400X1050_RB_R60_HSP,
+         M1400X1050_RB_R60_VSP,
+         {1560, 1400, 1400, 160, 1448, 32, 1080, 1050, 1050, 30, 1053, 4} }
+};
+
+/* 960x600 (CVT) */
+struct crt_mode_table CRTM960x600[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_45_250M, M960X600_R60_HSP, M960X600_R60_VSP,
+         {1216, 960, 960, 256, 992, 96, 624, 600, 600, 24, 603, 6} }
+};
+
+/* 1000x600 (GTF) */
+struct crt_mode_table CRTM1000x600[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_48_000M, M1000X600_R60_HSP, M1000X600_R60_VSP,
+         {1288, 1000, 1000, 288, 1040, 104, 622, 600, 600, 22, 601, 3} }
+};
+
+/* 1024x576 (GTF) */
+struct crt_mode_table CRTM1024x576[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_46_996M, M1024X576_R60_HSP, M1024X576_R60_VSP,
+         {1312, 1024, 1024, 288, 1064, 104, 597, 576, 576, 21, 577, 3} }
+};
+
+/* 1088x612 (CVT) */
+struct crt_mode_table CRTM1088x612[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_52_977M, M1088X612_R60_HSP, M1088X612_R60_VSP,
+         {1392, 1088, 1088, 304, 1136, 104, 636, 612, 612, 24, 615, 5} }
+};
+
+/* 1152x720 (CVT) */
+struct crt_mode_table CRTM1152x720[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_66_750M, M1152X720_R60_HSP, M1152X720_R60_VSP,
+         {1488, 1152, 1152, 336, 1208, 112, 748, 720, 720, 28, 723, 6} }
+};
+
+/* 1200x720 (GTF) */
+struct crt_mode_table CRTM1200x720[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_70_159M, M1200X720_R60_HSP, M1200X720_R60_VSP,
+         {1568, 1200, 1200, 368, 1256, 128, 746, 720, 720, 26, 721, 3} }
+};
+
+/* 1280x600 (GTF) */
+struct crt_mode_table CRTM1280x600[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE,  HSS, HSE, VT,  VA,  VBS, VBE,  VSS, VSE */
+        {REFRESH_60, CLK_61_500M, M1280x600_R60_HSP, M1280x600_R60_VSP,
+         {1648, 1280, 1280, 368, 1336, 128, 622, 600, 600, 22, 601, 3} }
+};
+
+/* 1360x768 (CVT) */
+struct crt_mode_table CRTM1360x768[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_84_750M, M1360X768_R60_HSP, M1360X768_R60_VSP,
+         {1776, 1360, 1360, 416, 1432, 136, 798, 768, 768, 30, 771, 5} }
+};
+
+/* 1360x768 (CVT Reduce Blanking) */
+struct crt_mode_table CRTM1360x768_RB[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_72_000M, M1360X768_RB_R60_HSP,
+         M1360X768_RB_R60_VSP,
+         {1520, 1360, 1360, 160, 1408, 32, 790, 768, 768, 22, 771, 5} }
+};
+
+/* 1366x768 (GTF) */
+struct crt_mode_table CRTM1366x768[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_85_860M, M1368X768_R60_HSP, M1368X768_R60_VSP,
+         {1800, 1368, 1368, 432, 1440, 144, 795, 768, 768, 27, 769, 3} },
+        {REFRESH_50, CLK_69_924M, M1368X768_R50_HSP, M1368X768_R50_VSP,
+         {1768, 1368, 1368, 400, 1424, 144, 791, 768, 768, 23, 769, 3} }
+};
+
+/* 1440x900 (CVT) */
+struct crt_mode_table CRTM1440x900[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_106_500M, M1440X900_R60_HSP, M1440X900_R60_VSP,
+         {1904, 1440, 1440, 464, 1520, 152, 934, 900, 900, 34, 903, 6} },
+        {REFRESH_75, CLK_136_700M, M1440X900_R75_HSP, M1440X900_R75_VSP,
+         {1936, 1440, 1440, 496, 1536, 152, 942, 900, 900, 42, 903, 6} }
+};
+
+/* 1440x900 (CVT Reduce Blanking) */
+struct crt_mode_table CRTM1440x900_RB[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_88_750M, M1440X900_RB_R60_HSP,
+         M1440X900_RB_R60_VSP,
+         {1600, 1440, 1440, 160, 1488, 32, 926, 900, 900, 26, 903, 6} }
+};
+
+/* 1600x900 (CVT) */
+struct crt_mode_table CRTM1600x900[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_118_840M, M1600X900_R60_HSP, M1600X900_R60_VSP,
+         {2112, 1600, 1600, 512, 1688, 168, 934, 900, 900, 34, 903, 5} }
+};
+
+/* 1600x900 (CVT Reduce Blanking) */
+struct crt_mode_table CRTM1600x900_RB[] = {
+        /* r_rate,        vclk,           hsp,        vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_97_750M, M1600X900_RB_R60_HSP,
+         M1600X900_RB_R60_VSP,
+         {1760, 1600, 1600, 160, 1648, 32, 926, 900, 900, 26, 903, 5} }
+};
+
+/* 1600x1024 (GTF) */
+struct crt_mode_table CRTM1600x1024[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE,  HSS, HSE,   VT,  VA,  VBS, VBE,  VSS, VSE */
+        {REFRESH_60, CLK_136_700M, M1600X1024_R60_HSP, M1600X1024_R60_VSP,
+         {2144, 1600, 1600, 544, 1704, 168, 1060, 1024, 1024, 36, 1025, 3} }
+};
+
+/* 1792x1344 (DMT) */
+struct crt_mode_table CRTM1792x1344[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE,  HSS, HSE,   VT,  VA,  VBS, VBE,  VSS, VSE */
+        {REFRESH_60, CLK_204_000M, M1792x1344_R60_HSP, M1792x1344_R60_VSP,
+         {2448, 1792, 1792, 656, 1920, 200, 1394, 1344, 1344, 50, 1345, 3} }
+};
+
+/* 1856x1392 (DMT) */
+struct crt_mode_table CRTM1856x1392[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE,  HSS, HSE,   VT,  VA,  VBS, VBE,  VSS, VSE */
+        {REFRESH_60, CLK_218_500M, M1856x1392_R60_HSP, M1856x1392_R60_VSP,
+         {2528, 1856, 1856, 672, 1952, 224, 1439, 1392, 1392, 47, 1393, 3} }
+};
+
+/* 1920x1200 (CVT) */
+struct crt_mode_table CRTM1920x1200[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_193_295M, M1920X1200_R60_HSP, M1920X1200_R60_VSP,
+         {2592, 1920, 1920, 672, 2056, 200, 1245, 1200, 1200, 45, 1203, 6} }
+};
+
+/* 1920x1200 (CVT with Reduce Blanking) */
+struct crt_mode_table CRTM1920x1200_RB[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE, HSS, HSE, VT,  VA,  VBS, VBE, VSS, VSE */
+        {REFRESH_60, CLK_153_920M, M1920X1200_RB_R60_HSP,
+         M1920X1200_RB_R60_VSP,
+         {2080, 1920, 1920, 160, 1968, 32, 1235, 1200, 1200, 35, 1203, 6} }
+};
+
+/* 2048x1536 (CVT) */
+struct crt_mode_table CRTM2048x1536[] = {
+        /* r_rate,          vclk,              hsp,             vsp   */
+        /* HT,  HA,  HBS, HBE,  HSS, HSE,   VT,  VA,  VBS, VBE,  VSS, VSE */
+        {REFRESH_60, CLK_267_250M, M2048x1536_R60_HSP, M2048x1536_R60_VSP,
+         {2800, 2048, 2048, 752, 2200, 224, 1592, 1536, 1536, 56, 1539, 4} }
+};
+
+/* Video Mode Table */
+/* struct VideoModeTable {*/
+/*  int                               ModeIndex;*/
+/*  struct crt_mode_table             *crtc;*/
+/*  int                               mode_array;*/
+/* };*/
+struct VideoModeTable CLE266Modes[] = {
+        /* Display : 480x640 (GTF) */
+        {VIA_RES_480X640, CRTM480x640, ARRAY_SIZE(CRTM480x640)},
+
+        /* Display : 640x480 */
+        {VIA_RES_640X480, CRTM640x480, ARRAY_SIZE(CRTM640x480)},
+
+        /* Display : 720x480 (GTF) */
+        {VIA_RES_720X480, CRTM720x480, ARRAY_SIZE(CRTM720x480)},
+
+        /* Display : 720x576 (GTF) */
+        {VIA_RES_720X576, CRTM720x576, ARRAY_SIZE(CRTM720x576)},
+
+        /* Display : 800x600 */
+        {VIA_RES_800X600, CRTM800x600, ARRAY_SIZE(CRTM800x600)},
+
+        /* Display : 800x480 (CVT) */
+        {VIA_RES_800X480, CRTM800x480, ARRAY_SIZE(CRTM800x480)},
+
+        /* Display : 848x480 (CVT) */
+        {VIA_RES_848X480, CRTM848x480, ARRAY_SIZE(CRTM848x480)},
+
+        /* Display : 852x480 (GTF) */
+        {VIA_RES_856X480, CRTM852x480, ARRAY_SIZE(CRTM852x480)},
+
+        /* Display : 1024x512 (GTF) */
+        {VIA_RES_1024X512, CRTM1024x512, ARRAY_SIZE(CRTM1024x512)},
+
+        /* Display : 1024x600 */
+        {VIA_RES_1024X600, CRTM1024x600, ARRAY_SIZE(CRTM1024x600)},
+
+        /* Display : 1024x576 (GTF) */
+        /*{ VIA_RES_1024X576, CRTM1024x576, ARRAY_SIZE(CRTM1024x576)}, */
+
+        /* Display : 1024x768 */
+        {VIA_RES_1024X768, CRTM1024x768, ARRAY_SIZE(CRTM1024x768)},
+
+        /* Display : 1152x864 */
+        {VIA_RES_1152X864, CRTM1152x864, ARRAY_SIZE(CRTM1152x864)},
+
+        /* Display : 1280x768 (GTF) */
+        {VIA_RES_1280X768, CRTM1280x768, ARRAY_SIZE(CRTM1280x768)},
+
+        /* Display : 960x600 (CVT) */
+        {VIA_RES_960X600, CRTM960x600, ARRAY_SIZE(CRTM960x600)},
+
+        /* Display : 1000x600 (GTF) */
+        {VIA_RES_1000X600, CRTM1000x600, ARRAY_SIZE(CRTM1000x600)},
+
+        /* Display : 1024x576 (GTF) */
+        {VIA_RES_1024X576, CRTM1024x576, ARRAY_SIZE(CRTM1024x576)},
+
+        /* Display : 1088x612 (GTF) */
+        {VIA_RES_1088X612, CRTM1088x612, ARRAY_SIZE(CRTM1088x612)},
+
+        /* Display : 1152x720 (CVT) */
+        {VIA_RES_1152X720, CRTM1152x720, ARRAY_SIZE(CRTM1152x720)},
+
+        /* Display : 1200x720 (GTF) */
+        {VIA_RES_1200X720, CRTM1200x720, ARRAY_SIZE(CRTM1200x720)},
+
+        /* Display : 1280x600 (GTF) */
+        {VIA_RES_1280X600, CRTM1280x600, ARRAY_SIZE(CRTM1280x600)},
+
+        /* Display : 1280x800 (CVT) */
+        {VIA_RES_1280X800, CRTM1280x800, ARRAY_SIZE(CRTM1280x800)},
+
+        /* Display : 1280x800 (GTF) */
+        /*{ M1280x800, CRTM1280x800, ARRAY_SIZE(CRTM1280x800)}, */
+
+        /* Display : 1280x960 */
+        {VIA_RES_1280X960, CRTM1280x960, ARRAY_SIZE(CRTM1280x960)},
+
+        /* Display : 1280x1024 */
+        {VIA_RES_1280X1024, CRTM1280x1024, ARRAY_SIZE(CRTM1280x1024)},
+
+        /* Display : 1360x768 (CVT) */
+        {VIA_RES_1360X768, CRTM1360x768, ARRAY_SIZE(CRTM1360x768)},
+
+        /* Display : 1360x768 (CVT Reduce Blanking) */
+        {VIA_RES_1360X768_RB, CRTM1360x768_RB,
+         ARRAY_SIZE(CRTM1360x768_RB)},
+
+        /* Display : 1366x768 */
+        {VIA_RES_1366X768, CRTM1366x768, ARRAY_SIZE(CRTM1366x768)},
+
+        /* Display : 1368x768 (GTF) */
+        /*{ M1368x768,CRTM1368x768,ARRAY_SIZE(CRTM1368x768)}, */
+        /* Display : 1368x768 (GTF) */
+        {VIA_RES_1368X768, CRTM1368x768, ARRAY_SIZE(CRTM1368x768)},
+
+        /* Display : 1440x900 (CVT) */
+        {VIA_RES_1440X900, CRTM1440x900, ARRAY_SIZE(CRTM1440x900)},
+
+        /* Display : 1440x900 (CVT Reduce Blanking) */
+        {VIA_RES_1440X900_RB, CRTM1440x900_RB,
+         ARRAY_SIZE(CRTM1440x900_RB)},
+
+        /* Display : 1440x1050 (GTF) */
+        {VIA_RES_1440X1050, CRTM1440x1050, ARRAY_SIZE(CRTM1440x1050)},
+
+        /* Display : 1400x1050 (CVT Reduce Blanking) */
+        {VIA_RES_1400X1050_RB, CRTM1400x1050_RB,
+         ARRAY_SIZE(CRTM1400x1050_RB)},
+
+        /* Display : 1600x900 (CVT) */
+        {VIA_RES_1600X900, CRTM1600x900, ARRAY_SIZE(CRTM1600x900)},
+
+        /* Display : 1600x900 (CVT Reduce Blanking) */
+        {VIA_RES_1600X900_RB, CRTM1600x900_RB,
+         ARRAY_SIZE(CRTM1600x900_RB)},
+
+        /* Display : 1600x1024 (GTF) */
+        {VIA_RES_1600X1024, CRTM1600x1024, ARRAY_SIZE(CRTM1600x1024)},
+
+        /* Display : 1600x1200 */
+        {VIA_RES_1600X1200, CRTM1600x1200, ARRAY_SIZE(CRTM1600x1200)},
+
+        /* Display : 1680x1050 (CVT) */
+        {VIA_RES_1680X1050, CRTM1680x1050, ARRAY_SIZE(CRTM1680x1050)},
+
+        /* Display : 1680x1050 (CVT Reduce Blanking) */
+        {VIA_RES_1680X1050_RB, CRTM1680x1050_RB,
+         ARRAY_SIZE(CRTM1680x1050_RB)},
+
+        /* Display : 1792x1344 (DMT) */
+        {VIA_RES_1792X1344, CRTM1792x1344, ARRAY_SIZE(CRTM1792x1344)},
+
+        /* Display : 1856x1392 (DMT) */
+        {VIA_RES_1856X1392, CRTM1856x1392, ARRAY_SIZE(CRTM1856x1392)},
+
+        /* Display : 1920x1440 */
+        {VIA_RES_1920X1440, CRTM1920x1440, ARRAY_SIZE(CRTM1920x1440)},
+
+        /* Display : 2048x1536 */
+        {VIA_RES_2048X1536, CRTM2048x1536, ARRAY_SIZE(CRTM2048x1536)},
+
+        /* Display : 1280x720 */
+        {VIA_RES_1280X720, CRTM1280x720, ARRAY_SIZE(CRTM1280x720)},
+
+        /* Display : 1920x1080 (CVT) */
+        {VIA_RES_1920X1080, CRTM1920x1080, ARRAY_SIZE(CRTM1920x1080)},
+
+        /* Display : 1920x1080 (CVT Reduce Blanking) */
+        {VIA_RES_1920X1080_RB, CRTM1920x1080_RB,
+         ARRAY_SIZE(CRTM1920x1080_RB)},
+
+        /* Display : 1920x1200 (CVT) */
+        {VIA_RES_1920X1200, CRTM1920x1200, ARRAY_SIZE(CRTM1920x1200)},
+
+        /* Display : 1920x1200 (CVT Reduce Blanking) */
+        {VIA_RES_1920X1200_RB, CRTM1920x1200_RB,
+         ARRAY_SIZE(CRTM1920x1200_RB)},
+
+        /* Display : 1400x1050 (CVT) */
+        {VIA_RES_1400X1050, CRTM1400x1050, ARRAY_SIZE(CRTM1400x1050)}
+};
+struct crt_mode_table CEAM1280x720[] = {
+        {REFRESH_60, CLK_74_270M, M1280X720_CEA_R60_HSP,
+         M1280X720_CEA_R60_VSP,
+         /* HT,    HA,   HBS,  HBE,  HSS, HSE,  VT,   VA,  VBS, VBE, VSS, VSE */
+         {1650, 1280, 1280, 370, 1390, 40, 750, 720, 720, 30, 725, 5} }
+};
+struct crt_mode_table CEAM1920x1080[] = {
+        {REFRESH_60, CLK_148_500M, M1920X1080_CEA_R60_HSP,
+         M1920X1080_CEA_R60_VSP,
+         /* HT,    HA,   HBS,  HBE,  HSS, HSE,  VT,  VA, VBS, VBE,  VSS, VSE */
+         {2200, 1920, 1920, 300, 2008, 44, 1125, 1080, 1080, 45, 1084, 5} }
+};
+struct VideoModeTable CEA_HDMI_Modes[] = {
+        /* Display : 1280x720 */
+        {VIA_RES_1280X720, CEAM1280x720, ARRAY_SIZE(CEAM1280x720)},
+        {VIA_RES_1920X1080, CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)}
+};
diff --git a/drivers/video/via/viamode.h b/drivers/video/via/viamode.h
new file mode 100644
index 000000000000..1a5de50a23a2
--- /dev/null
+++ b/drivers/video/via/viamode.h
@@ -0,0 +1,177 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef __VIAMODE_H__
+#define __VIAMODE_H__
+
+#include "global.h"
+
+struct VPITTable {
+        unsigned char Misc;
+        unsigned char SR[StdSR];
+        unsigned char GR[StdGR];
+        unsigned char AR[StdAR];
+};
+
+struct VideoModeTable {
+        int ModeIndex;
+        struct crt_mode_table *crtc;
+        int mode_array;
+};
+
+struct patch_table {
+        int mode_index;
+        int table_length;
+        struct io_reg *io_reg_table;
+};
+
+struct res_map_refresh {
+        int hres;
+        int vres;
+        int pixclock;
+        int vmode_refresh;
+};
+
+#define NUM_TOTAL_RES_MAP_REFRESH ARRAY_SIZE(res_map_refresh_tbl)
+#define NUM_TOTAL_CEA_MODES  ARRAY_SIZE(CEA_HDMI_Modes)
+#define NUM_TOTAL_CN400_ModeXregs ARRAY_SIZE(CN400_ModeXregs)
+#define NUM_TOTAL_CN700_ModeXregs ARRAY_SIZE(CN700_ModeXregs)
+#define NUM_TOTAL_KM400_ModeXregs ARRAY_SIZE(KM400_ModeXregs)
+#define NUM_TOTAL_CX700_ModeXregs ARRAY_SIZE(CX700_ModeXregs)
+#define NUM_TOTAL_VX800_ModeXregs ARRAY_SIZE(VX800_ModeXregs)
+#define NUM_TOTAL_CLE266_ModeXregs ARRAY_SIZE(CLE266_ModeXregs)
+#define NUM_TOTAL_PATCH_MODE ARRAY_SIZE(res_patch_table)
+#define NUM_TOTAL_MODETABLE ARRAY_SIZE(CLE266Modes)
+
+/********************/
+/* Mode Table       */
+/********************/
+
+/* 480x640 */
+extern struct crt_mode_table CRTM480x640[1];
+/* 640x480*/
+extern struct crt_mode_table CRTM640x480[5];
+/*720x480 (GTF)*/
+extern struct crt_mode_table CRTM720x480[1];
+/*720x576 (GTF)*/
+extern struct crt_mode_table CRTM720x576[1];
+/* 800x480 (CVT) */
+extern struct crt_mode_table CRTM800x480[1];
+/* 800x600*/
+extern struct crt_mode_table CRTM800x600[5];
+/* 848x480 (CVT) */
+extern struct crt_mode_table CRTM848x480[1];
+/*856x480 (GTF) convert to 852x480*/
+extern struct crt_mode_table CRTM852x480[1];
+/*1024x512 (GTF)*/
+extern struct crt_mode_table CRTM1024x512[1];
+/* 1024x600*/
+extern struct crt_mode_table CRTM1024x600[1];
+/* 1024x768*/
+extern struct crt_mode_table CRTM1024x768[4];
+/* 1152x864*/
+extern struct crt_mode_table CRTM1152x864[1];
+/* 1280x720 (HDMI 720P)*/
+extern struct crt_mode_table CRTM1280x720[2];
+/*1280x768 (GTF)*/
+extern struct crt_mode_table CRTM1280x768[2];
+/* 1280x800 (CVT) */
+extern struct crt_mode_table CRTM1280x800[1];
+/*1280x960*/
+extern struct crt_mode_table CRTM1280x960[1];
+/* 1280x1024*/
+extern struct crt_mode_table CRTM1280x1024[3];
+/* 1368x768 (GTF) */
+extern struct crt_mode_table CRTM1368x768[1];
+/*1440x1050 (GTF)*/
+extern struct crt_mode_table CRTM1440x1050[1];
+/* 1600x1200*/
+extern struct crt_mode_table CRTM1600x1200[2];
+/* 1680x1050 (CVT) */
+extern struct crt_mode_table CRTM1680x1050[2];
+/* 1680x1050 (CVT Reduce Blanking) */
+extern struct crt_mode_table CRTM1680x1050_RB[1];
+/* 1920x1080 (CVT)*/
+extern struct crt_mode_table CRTM1920x1080[1];
+/* 1920x1080 (CVT with Reduce Blanking) */
+extern struct crt_mode_table CRTM1920x1080_RB[1];
+/* 1920x1440*/
+extern struct crt_mode_table CRTM1920x1440[2];
+/* 1400x1050 (CVT) */
+extern struct crt_mode_table CRTM1400x1050[2];
+/* 1400x1050 (CVT Reduce Blanking) */
+extern struct crt_mode_table CRTM1400x1050_RB[1];
+/* 960x600 (CVT) */
+extern struct crt_mode_table CRTM960x600[1];
+/* 1000x600 (GTF) */
+extern struct crt_mode_table CRTM1000x600[1];
+/* 1024x576 (GTF) */
+extern struct crt_mode_table CRTM1024x576[1];
+/* 1088x612 (CVT) */
+extern struct crt_mode_table CRTM1088x612[1];
+/* 1152x720 (CVT) */
+extern struct crt_mode_table CRTM1152x720[1];
+/* 1200x720 (GTF) */
+extern struct crt_mode_table CRTM1200x720[1];
+/* 1280x600 (GTF) */
+extern struct crt_mode_table CRTM1280x600[1];
+/* 1360x768 (CVT) */
+extern struct crt_mode_table CRTM1360x768[1];
+/* 1360x768 (CVT Reduce Blanking) */
+extern struct crt_mode_table CRTM1360x768_RB[1];
+/* 1366x768 (GTF) */
+extern struct crt_mode_table CRTM1366x768[2];
+/* 1440x900 (CVT) */
+extern struct crt_mode_table CRTM1440x900[2];
+/* 1440x900 (CVT Reduce Blanking) */
+extern struct crt_mode_table CRTM1440x900_RB[1];
+/* 1600x900 (CVT) */
+extern struct crt_mode_table CRTM1600x900[1];
+/* 1600x900 (CVT Reduce Blanking) */
+extern struct crt_mode_table CRTM1600x900_RB[1];
+/* 1600x1024 (GTF) */
+extern struct crt_mode_table CRTM1600x1024[1];
+/* 1792x1344 (DMT) */
+extern struct crt_mode_table CRTM1792x1344[1];
+/* 1856x1392 (DMT) */
+extern struct crt_mode_table CRTM1856x1392[1];
+/* 1920x1200 (CVT) */
+extern struct crt_mode_table CRTM1920x1200[1];
+/* 1920x1200 (CVT with Reduce Blanking) */
+extern struct crt_mode_table CRTM1920x1200_RB[1];
+/* 2048x1536 (CVT) */
+extern struct crt_mode_table CRTM2048x1536[1];
+extern struct VideoModeTable CLE266Modes[47];
+extern struct crt_mode_table CEAM1280x720[1];
+extern struct crt_mode_table CEAM1920x1080[1];
+extern struct VideoModeTable CEA_HDMI_Modes[2];
+
+extern struct res_map_refresh res_map_refresh_tbl[61];
+extern struct io_reg CN400_ModeXregs[52];
+extern struct io_reg CN700_ModeXregs[66];
+extern struct io_reg KM400_ModeXregs[55];
+extern struct io_reg CX700_ModeXregs[58];
+extern struct io_reg VX800_ModeXregs[58];
+extern struct io_reg CLE266_ModeXregs[32];
+extern struct io_reg PM1024x768[2];
+extern struct patch_table res_patch_table[1];
+extern struct VPITTable VPIT;
+#endif /* __VIAMODE_H__ */
diff --git a/drivers/video/via/vt1636.c b/drivers/video/via/vt1636.c
new file mode 100644
index 000000000000..322a9f993550
--- /dev/null
+++ b/drivers/video/via/vt1636.c
@@ -0,0 +1,306 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include "global.h"
+
+u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information
+        *plvds_setting_info, struct lvds_chip_information *plvds_chip_info,
+        u8 index)
+{
+        u8 data;
+
+        viaparinfo->i2c_stuff.i2c_port = plvds_chip_info->i2c_port;
+        viafb_i2c_readbyte(plvds_chip_info->lvds_chip_slave_addr, index, &data);
+
+        return data;
+}
+
+void viafb_gpio_i2c_write_mask_lvds(struct lvds_setting_information
+                              *plvds_setting_info, struct lvds_chip_information
+                              *plvds_chip_info, struct IODATA io_data)
+{
+        int index, data;
+
+        viaparinfo->i2c_stuff.i2c_port = plvds_chip_info->i2c_port;
+
+        index = io_data.Index;
+        data = viafb_gpio_i2c_read_lvds(plvds_setting_info, plvds_chip_info,
+                index);
+        data = (data & (~io_data.Mask)) | io_data.Data;
+
+        viafb_i2c_writebyte(plvds_chip_info->lvds_chip_slave_addr, index, data);
+}
+
+void viafb_init_lvds_vt1636(struct lvds_setting_information
+        *plvds_setting_info, struct lvds_chip_information *plvds_chip_info)
+{
+        int reg_num, i;
+
+        /* Common settings: */
+        reg_num = ARRAY_SIZE(COMMON_INIT_TBL_VT1636);
+
+        for (i = 0; i < reg_num; i++) {
+                viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
+                                         plvds_chip_info,
+                                         COMMON_INIT_TBL_VT1636[i]);
+        }
+
+        /* Input Data Mode Select */
+        if (plvds_setting_info->device_lcd_dualedge) {
+                viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
+                                         plvds_chip_info,
+                                         DUAL_CHANNEL_ENABLE_TBL_VT1636[0]);
+        } else {
+                viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
+                                         plvds_chip_info,
+                                         SINGLE_CHANNEL_ENABLE_TBL_VT1636[0]);
+        }
+
+        if (plvds_setting_info->LCDDithering) {
+                viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
+                                         plvds_chip_info,
+                                         DITHERING_ENABLE_TBL_VT1636[0]);
+        } else {
+                viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
+                                         plvds_chip_info,
+                                         DITHERING_DISABLE_TBL_VT1636[0]);
+        }
+}
+
+void viafb_enable_lvds_vt1636(struct lvds_setting_information
+                        *plvds_setting_info,
+                        struct lvds_chip_information *plvds_chip_info)
+{
+
+        viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
+                                 VDD_ON_TBL_VT1636[0]);
+
+        /* Pad on: */
+        switch (plvds_chip_info->output_interface) {
+        case INTERFACE_DVP0:
+                {
+                        viafb_write_reg_mask(SR1E, VIASR, 0xC0, 0xC0);
+                        break;
+                }
+
+        case INTERFACE_DVP1:
+                {
+                        viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30);
+                        break;
+                }
+
+        case INTERFACE_DFP_LOW:
+                {
+                        viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x03);
+                        break;
+                }
+
+        case INTERFACE_DFP_HIGH:
+                {
+                        viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x0C);
+                        break;
+                }
+
+        }
+}
+
+void viafb_disable_lvds_vt1636(struct lvds_setting_information
+                         *plvds_setting_info,
+                         struct lvds_chip_information *plvds_chip_info)
+{
+
+        viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
+                                 VDD_OFF_TBL_VT1636[0]);
+
+        /* Pad off: */
+        switch (plvds_chip_info->output_interface) {
+        case INTERFACE_DVP0:
+                {
+                        viafb_write_reg_mask(SR1E, VIASR, 0x00, 0xC0);
+                        break;
+                }
+
+        case INTERFACE_DVP1:
+                {
+                        viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30);
+                        break;
+                }
+
+        case INTERFACE_DFP_LOW:
+                {
+                        viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x03);
+                        break;
+                }
+
+        case INTERFACE_DFP_HIGH:
+                {
+                        viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x0C);
+                        break;
+                }
+
+        }
+}
+
+bool viafb_lvds_identify_vt1636(void)
+{
+        u8 Buffer[2];
+
+        DEBUG_MSG(KERN_INFO "viafb_lvds_identify_vt1636.\n");
+
+        /* Sense VT1636 LVDS Transmiter */
+        viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
+        VT1636_LVDS_I2C_ADDR;
+
+        /* Check vendor ID first: */
+        viafb_i2c_readbyte((u8) viaparinfo->chip_info->lvds_chip_info.
+        lvds_chip_slave_addr,
+                    0x00, &Buffer[0]);
+        viafb_i2c_readbyte((u8) viaparinfo->chip_info->lvds_chip_info.
+                lvds_chip_slave_addr,
+                    0x01, &Buffer[1]);
+
+        if (!((Buffer[0] == 0x06) && (Buffer[1] == 0x11)))
+                return false;
+
+        /* Check Chip ID: */
+        viafb_i2c_readbyte((u8) viaparinfo->chip_info->lvds_chip_info.
+        lvds_chip_slave_addr,
+                    0x02, &Buffer[0]);
+        viafb_i2c_readbyte((u8) viaparinfo->chip_info->lvds_chip_info.
+                lvds_chip_slave_addr,
+                    0x03, &Buffer[1]);
+        if ((Buffer[0] == 0x45) && (Buffer[1] == 0x33)) {
+                viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
+                        VT1636_LVDS;
+                return true;
+        }
+
+        return false;
+}
+
+static int get_clk_range_index(u32 Clk)
+{
+        if (Clk < DPA_CLK_30M)
+                return DPA_CLK_RANGE_30M;
+        else if (Clk < DPA_CLK_50M)
+                return DPA_CLK_RANGE_30_50M;
+        else if (Clk < DPA_CLK_70M)
+                return DPA_CLK_RANGE_50_70M;
+        else if (Clk < DPA_CLK_100M)
+                return DPA_CLK_RANGE_70_100M;
+        else if (Clk < DPA_CLK_150M)
+                return DPA_CLK_RANGE_100_150M;
+        else
+                return DPA_CLK_RANGE_150M;
+}
+
+static int get_lvds_dpa_setting_index(int panel_size_id,
+                             struct VT1636_DPA_SETTING *p_vt1636_dpasetting_tbl,
+                               int tbl_size)
+{
+        int i;
+
+        for (i = 0; i < tbl_size; i++) {
+                if (panel_size_id == p_vt1636_dpasetting_tbl->PanelSizeID)
+                        return i;
+
+                p_vt1636_dpasetting_tbl++;
+        }
+
+        return 0;
+}
+
+static void set_dpa_vt1636(struct lvds_setting_information
+        *plvds_setting_info, struct lvds_chip_information *plvds_chip_info,
+                    struct VT1636_DPA_SETTING *p_vt1636_dpa_setting)
+{
+        struct IODATA io_data;
+
+        io_data.Index = 0x09;
+        io_data.Mask = 0x1F;
+        io_data.Data = p_vt1636_dpa_setting->CLK_SEL_ST1;
+        viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
+                plvds_chip_info, io_data);
+
+        io_data.Index = 0x08;
+        io_data.Mask = 0x0F;
+        io_data.Data = p_vt1636_dpa_setting->CLK_SEL_ST2;
+        viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
+                io_data);
+}
+
+void viafb_vt1636_patch_skew_on_vt3324(
+        struct lvds_setting_information *plvds_setting_info,
+        struct lvds_chip_information *plvds_chip_info)
+{
+        int index, size;
+
+        DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3324.\n");
+
+        /* Graphics DPA settings: */
+        index = get_clk_range_index(plvds_setting_info->vclk);
+        viafb_set_dpa_gfx(plvds_chip_info->output_interface,
+                    &GFX_DPA_SETTING_TBL_VT3324[index]);
+
+        /* LVDS Transmitter DPA settings: */
+        size = ARRAY_SIZE(VT1636_DPA_SETTING_TBL_VT3324);
+        index =
+            get_lvds_dpa_setting_index(plvds_setting_info->lcd_panel_id,
+                                       VT1636_DPA_SETTING_TBL_VT3324, size);
+        set_dpa_vt1636(plvds_setting_info, plvds_chip_info,
+                       &VT1636_DPA_SETTING_TBL_VT3324[index]);
+}
+
+void viafb_vt1636_patch_skew_on_vt3327(
+        struct lvds_setting_information *plvds_setting_info,
+        struct lvds_chip_information *plvds_chip_info)
+{
+        int index, size;
+
+        DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3327.\n");
+
+        /* Graphics DPA settings: */
+        index = get_clk_range_index(plvds_setting_info->vclk);
+        viafb_set_dpa_gfx(plvds_chip_info->output_interface,
+                    &GFX_DPA_SETTING_TBL_VT3327[index]);
+
+        /* LVDS Transmitter DPA settings: */
+        size = ARRAY_SIZE(VT1636_DPA_SETTING_TBL_VT3327);
+        index =
+            get_lvds_dpa_setting_index(plvds_setting_info->lcd_panel_id,
+                                       VT1636_DPA_SETTING_TBL_VT3327, size);
+        set_dpa_vt1636(plvds_setting_info, plvds_chip_info,
+                       &VT1636_DPA_SETTING_TBL_VT3327[index]);
+}
+
+void viafb_vt1636_patch_skew_on_vt3364(
+        struct lvds_setting_information *plvds_setting_info,
+        struct lvds_chip_information *plvds_chip_info)
+{
+        int index;
+
+        DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3364.\n");
+
+        /* Graphics DPA settings: */
+        index = get_clk_range_index(plvds_setting_info->vclk);
+        viafb_set_dpa_gfx(plvds_chip_info->output_interface,
+                    &GFX_DPA_SETTING_TBL_VT3364[index]);
+}
diff --git a/drivers/video/via/vt1636.h b/drivers/video/via/vt1636.h
new file mode 100644
index 000000000000..2a150c58c7ed
--- /dev/null
+++ b/drivers/video/via/vt1636.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef _VT1636_H_
+#define _VT1636_H_
+#include "chip.h"
+bool viafb_lvds_identify_vt1636(void);
+void viafb_init_lvds_vt1636(struct lvds_setting_information
+        *plvds_setting_info, struct lvds_chip_information *plvds_chip_info);
+void viafb_enable_lvds_vt1636(struct lvds_setting_information
+                        *plvds_setting_info,
+                        struct lvds_chip_information *plvds_chip_info);
+void viafb_disable_lvds_vt1636(struct lvds_setting_information
+                         *plvds_setting_info,
+                         struct lvds_chip_information *plvds_chip_info);
+void viafb_vt1636_patch_skew_on_vt3324(
+        struct lvds_setting_information *plvds_setting_info,
+        struct lvds_chip_information *plvds_chip_info);
+void viafb_vt1636_patch_skew_on_vt3327(
+        struct lvds_setting_information *plvds_setting_info,
+        struct lvds_chip_information *plvds_chip_info);
+void viafb_vt1636_patch_skew_on_vt3364(
+        struct lvds_setting_information *plvds_setting_info,
+        struct lvds_chip_information *plvds_chip_info);
+
+#endif
diff --git a/drivers/w1/masters/ds1wm.c b/drivers/w1/masters/ds1wm.c
index 10211e493001..29e144f81cbe 100644
--- a/drivers/w1/masters/ds1wm.c
+++ b/drivers/w1/masters/ds1wm.c
@@ -160,8 +160,10 @@ static int ds1wm_reset(struct ds1wm_data *ds1wm_data)
          *     625 us - 60 us - 240 us - 100 ns = 324.9 us
          *
          * We'll wait a bit longer just to be sure.
+         * Was udelay(500), but if it is going to busywait the cpu that long,
+         * might as well come back later.
          */
-        udelay(500);
+        msleep(1);
 
         ds1wm_write_register(ds1wm_data, DS1WM_INT_EN,
                 DS1WM_INTEN_ERBF | DS1WM_INTEN_ETMT | DS1WM_INTEN_EPD |
@@ -274,8 +276,8 @@ static u8 ds1wm_reset_bus(void *data)
         return 0;
 }
 
-static void ds1wm_search(void *data, u8 search_type,
-                         w1_slave_found_callback slave_found)
+static void ds1wm_search(void *data, struct w1_master *master_dev,
+                        u8 search_type, w1_slave_found_callback slave_found)
 {
         struct ds1wm_data *ds1wm_data = data;
         int i;
@@ -313,7 +315,7 @@ static void ds1wm_search(void *data, u8 search_type,
         ds1wm_write_register(ds1wm_data, DS1WM_CMD, ~DS1WM_CMD_SRA);
         ds1wm_reset(ds1wm_data);
 
-        slave_found(ds1wm_data, rom_id);
+        slave_found(master_dev, rom_id);
 }
 
 /* --------------------------------------------------------------------- */
diff --git a/drivers/w1/masters/ds2490.c b/drivers/w1/masters/ds2490.c
index b63b5e044a4c..59ad6e95af8f 100644
--- a/drivers/w1/masters/ds2490.c
+++ b/drivers/w1/masters/ds2490.c
@@ -88,7 +88,7 @@
 #define COMM_DT                         0x2000
 #define COMM_SPU                        0x1000
 #define COMM_F                          0x0800
-#define COMM_NTP                        0x0400
+#define COMM_NTF                        0x0400
 #define COMM_ICP                        0x0200
 #define COMM_RST                        0x0100
 
@@ -98,11 +98,6 @@
 #define BRANCH_MAIN                     0xCC
 #define BRANCH_AUX                      0x33
 
-/*
- * Duration of the strong pull-up pulse in milliseconds.
- */
-#define PULLUP_PULSE_DURATION           750
-
 /* Status flags */
 #define ST_SPUA                         0x01  /* Strong Pull-up is active */
 #define ST_PRGA                         0x02  /* 12V programming pulse is being generated */
@@ -112,6 +107,17 @@
 #define ST_IDLE                         0x20  /* DS2490 is currently idle */
 #define ST_EPOF                         0x80
 
+/* Result Register flags */
+#define RR_DETECT                       0xA5 /* New device detected */
+#define RR_NRS                          0x01 /* Reset no presence or ... */
+#define RR_SH                           0x02 /* short on reset or set path */
+#define RR_APP                          0x04 /* alarming presence on reset */
+#define RR_VPP                          0x08 /* 12V expected not seen */
+#define RR_CMP                          0x10 /* compare error */
+#define RR_CRC                          0x20 /* CRC error detected */
+#define RR_RDP                          0x40 /* redirected page */
+#define RR_EOS                          0x80 /* end of search error */
+
 #define SPEED_NORMAL                    0x00
 #define SPEED_FLEXIBLE                  0x01
 #define SPEED_OVERDRIVE                 0x02
@@ -131,6 +137,15 @@ struct ds_device
 
         int                     ep[NUM_EP];
 
+        /* Strong PullUp
+         * 0: pullup not active, else duration in milliseconds
+         */
+        int                     spu_sleep;
+        /* spu_bit contains COMM_SPU or 0 depending on if the strong pullup
+         * should be active or not for writes.
+         */
+        u16                     spu_bit;
+
         struct w1_bus_master    master;
 };
 
@@ -164,7 +179,6 @@ MODULE_DEVICE_TABLE(usb, ds_id_table);
 static int ds_probe(struct usb_interface *, const struct usb_device_id *);
 static void ds_disconnect(struct usb_interface *);
 
-static inline void ds_dump_status(unsigned char *, unsigned char *, int);
 static int ds_send_control(struct ds_device *, u16, u16);
 static int ds_send_control_cmd(struct ds_device *, u16, u16);
 
@@ -192,7 +206,7 @@ static int ds_send_control_cmd(struct ds_device *dev, u16 value, u16 index)
 
         return err;
 }
-#if 0
+
 static int ds_send_control_mode(struct ds_device *dev, u16 value, u16 index)
 {
         int err;
@@ -207,7 +221,7 @@ static int ds_send_control_mode(struct ds_device *dev, u16 value, u16 index)
 
         return err;
 }
-#endif
+
 static int ds_send_control(struct ds_device *dev, u16 value, u16 index)
 {
         int err;
@@ -223,11 +237,6 @@ static int ds_send_control(struct ds_device *dev, u16 value, u16 index)
         return err;
 }
 
-static inline void ds_dump_status(unsigned char *buf, unsigned char *str, int off)
-{
-        printk("%45s: %8x\n", str, buf[off]);
-}
-
 static int ds_recv_status_nodump(struct ds_device *dev, struct ds_status *st,
                                  unsigned char *buf, int size)
 {
@@ -248,62 +257,81 @@ static int ds_recv_status_nodump(struct ds_device *dev, struct ds_status *st,
         return count;
 }
 
-static int ds_recv_status(struct ds_device *dev, struct ds_status *st)
+static inline void ds_print_msg(unsigned char *buf, unsigned char *str, int off)
 {
-        unsigned char buf[64];
-        int count, err = 0, i;
-
-        memcpy(st, buf, sizeof(*st));
+        printk(KERN_INFO "%45s: %8x\n", str, buf[off]);
+}
 
-        count = ds_recv_status_nodump(dev, st, buf, sizeof(buf));
-        if (count < 0)
-                return err;
+static void ds_dump_status(struct ds_device *dev, unsigned char *buf, int count)
+{
+        int i;
 
-        printk("0x%x: count=%d, status: ", dev->ep[EP_STATUS], count);
+        printk(KERN_INFO "0x%x: count=%d, status: ", dev->ep[EP_STATUS], count);
         for (i=0; i<count; ++i)
                 printk("%02x ", buf[i]);
-        printk("\n");
+        printk(KERN_INFO "\n");
 
         if (count >= 16) {
-                ds_dump_status(buf, "enable flag", 0);
-                ds_dump_status(buf, "1-wire speed", 1);
-                ds_dump_status(buf, "strong pullup duration", 2);
-                ds_dump_status(buf, "programming pulse duration", 3);
-                ds_dump_status(buf, "pulldown slew rate control", 4);
-                ds_dump_status(buf, "write-1 low time", 5);
-                ds_dump_status(buf, "data sample offset/write-0 recovery time", 6);
-                ds_dump_status(buf, "reserved (test register)", 7);
-                ds_dump_status(buf, "device status flags", 8);
-                ds_dump_status(buf, "communication command byte 1", 9);
-                ds_dump_status(buf, "communication command byte 2", 10);
-                ds_dump_status(buf, "communication command buffer status", 11);
-                ds_dump_status(buf, "1-wire data output buffer status", 12);
-                ds_dump_status(buf, "1-wire data input buffer status", 13);
-                ds_dump_status(buf, "reserved", 14);
-                ds_dump_status(buf, "reserved", 15);
+                ds_print_msg(buf, "enable flag", 0);
+                ds_print_msg(buf, "1-wire speed", 1);
+                ds_print_msg(buf, "strong pullup duration", 2);
+                ds_print_msg(buf, "programming pulse duration", 3);
+                ds_print_msg(buf, "pulldown slew rate control", 4);
+                ds_print_msg(buf, "write-1 low time", 5);
+                ds_print_msg(buf, "data sample offset/write-0 recovery time",
+                        6);
+                ds_print_msg(buf, "reserved (test register)", 7);
+                ds_print_msg(buf, "device status flags", 8);
+                ds_print_msg(buf, "communication command byte 1", 9);
+                ds_print_msg(buf, "communication command byte 2", 10);
+                ds_print_msg(buf, "communication command buffer status", 11);
+                ds_print_msg(buf, "1-wire data output buffer status", 12);
+                ds_print_msg(buf, "1-wire data input buffer status", 13);
+                ds_print_msg(buf, "reserved", 14);
+                ds_print_msg(buf, "reserved", 15);
         }
-
-        memcpy(st, buf, sizeof(*st));
-
-        if (st->status & ST_EPOF) {
-                printk(KERN_INFO "Resetting device after ST_EPOF.\n");
-                err = ds_send_control_cmd(dev, CTL_RESET_DEVICE, 0);
-                if (err)
-                        return err;
-                count = ds_recv_status_nodump(dev, st, buf, sizeof(buf));
-                if (count < 0)
-                        return err;
-        }
-#if 0
-        if (st->status & ST_IDLE) {
-                printk(KERN_INFO "Resetting pulse after ST_IDLE.\n");
-                err = ds_start_pulse(dev, PULLUP_PULSE_DURATION);
-                if (err)
-                        return err;
+        for (i = 16; i < count; ++i) {
+                if (buf[i] == RR_DETECT) {
+                        ds_print_msg(buf, "new device detect", i);
+                        continue;
+                }
+                ds_print_msg(buf, "Result Register Value: ", i);
+                if (buf[i] & RR_NRS)
+                        printk(KERN_INFO "NRS: Reset no presence or ...\n");
+                if (buf[i] & RR_SH)
+                        printk(KERN_INFO "SH: short on reset or set path\n");
+                if (buf[i] & RR_APP)
+                        printk(KERN_INFO "APP: alarming presence on reset\n");
+                if (buf[i] & RR_VPP)
+                        printk(KERN_INFO "VPP: 12V expected not seen\n");
+                if (buf[i] & RR_CMP)
+                        printk(KERN_INFO "CMP: compare error\n");
+                if (buf[i] & RR_CRC)
+                        printk(KERN_INFO "CRC: CRC error detected\n");
+                if (buf[i] & RR_RDP)
+                        printk(KERN_INFO "RDP: redirected page\n");
+                if (buf[i] & RR_EOS)
+                        printk(KERN_INFO "EOS: end of search error\n");
         }
-#endif
+}
 
-        return err;
+static void ds_reset_device(struct ds_device *dev)
+{
+        ds_send_control_cmd(dev, CTL_RESET_DEVICE, 0);
+        /* Always allow strong pullup which allow individual writes to use
+         * the strong pullup.
+         */
+        if (ds_send_control_mode(dev, MOD_PULSE_EN, PULSE_SPUE))
+                printk(KERN_ERR "ds_reset_device: "
+                        "Error allowing strong pullup\n");
+        /* Chip strong pullup time was cleared. */
+        if (dev->spu_sleep) {
+                /* lower 4 bits are 0, see ds_set_pullup */
+                u8 del = dev->spu_sleep>>4;
+                if (ds_send_control(dev, COMM_SET_DURATION | COMM_IM, del))
+                        printk(KERN_ERR "ds_reset_device: "
+                                "Error setting duration\n");
+        }
 }
 
 static int ds_recv_data(struct ds_device *dev, unsigned char *buf, int size)
@@ -311,13 +339,27 @@ static int ds_recv_data(struct ds_device *dev, unsigned char *buf, int size)
         int count, err;
         struct ds_status st;
 
+        /* Careful on size.  If size is less than what is available in
+         * the input buffer, the device fails the bulk transfer and
+         * clears the input buffer.  It could read the maximum size of
+         * the data buffer, but then do you return the first, last, or
+         * some set of the middle size bytes?  As long as the rest of
+         * the code is correct there will be size bytes waiting.  A
+         * call to ds_wait_status will wait until the device is idle
+         * and any data to be received would have been available.
+         */
         count = 0;
         err = usb_bulk_msg(dev->udev, usb_rcvbulkpipe(dev->udev, dev->ep[EP_DATA_IN]),
                                 buf, size, &count, 1000);
         if (err < 0) {
+                u8 buf[0x20];
+                int count;
+
                 printk(KERN_INFO "Clearing ep0x%x.\n", dev->ep[EP_DATA_IN]);
                 usb_clear_halt(dev->udev, usb_rcvbulkpipe(dev->udev, dev->ep[EP_DATA_IN]));
-                ds_recv_status(dev, &st);
+
+                count = ds_recv_status_nodump(dev, &st, buf, sizeof(buf));
+                ds_dump_status(dev, buf, count);
                 return err;
         }
 
@@ -341,7 +383,8 @@ static int ds_send_data(struct ds_device *dev, unsigned char *buf, int len)
         count = 0;
         err = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, dev->ep[EP_DATA_OUT]), buf, len, &count, 1000);
         if (err < 0) {
-                printk(KERN_ERR "Failed to read 1-wire data from 0x02: err=%d.\n", err);
+                printk(KERN_ERR "Failed to write 1-wire data to ep0x%x: "
+                        "err=%d.\n", dev->ep[EP_DATA_OUT], err);
                 return err;
         }
 
@@ -397,7 +440,7 @@ int ds_detect(struct ds_device *dev, struct ds_status *st)
         if (err)
                 return err;
 
-        err = ds_recv_status(dev, st);
+        err = ds_dump_status(dev, st);
 
         return err;
 }
@@ -420,33 +463,49 @@ static int ds_wait_status(struct ds_device *dev, struct ds_status *st)
                         printk("\n");
                 }
 #endif
-        } while(!(buf[0x08] & 0x20) && !(err < 0) && ++count < 100);
+        } while (!(buf[0x08] & ST_IDLE) && !(err < 0) && ++count < 100);
+
+        if (err >= 16 && st->status & ST_EPOF) {
+                printk(KERN_INFO "Resetting device after ST_EPOF.\n");
+                ds_reset_device(dev);
+                /* Always dump the device status. */
+                count = 101;
+        }
 
+        /* Dump the status for errors or if there is extended return data.
+         * The extended status includes new device detection (maybe someone
+         * can do something with it).
+         */
+        if (err > 16 || count >= 100 || err < 0)
+                ds_dump_status(dev, buf, err);
 
-        if (((err > 16) && (buf[0x10] & 0x01)) || count >= 100 || err < 0) {
-                ds_recv_status(dev, st);
+        /* Extended data isn't an error.  Well, a short is, but the dump
+         * would have already told the user that and we can't do anything
+         * about it in software anyway.
+         */
+        if (count >= 100 || err < 0)
                 return -1;
-        } else
+        else
                 return 0;
 }
 
-static int ds_reset(struct ds_device *dev, struct ds_status *st)
+static int ds_reset(struct ds_device *dev)
 {
         int err;
 
-        //err = ds_send_control(dev, COMM_1_WIRE_RESET | COMM_F | COMM_IM | COMM_SE, SPEED_FLEXIBLE);
-        err = ds_send_control(dev, 0x43, SPEED_NORMAL);
+        /* Other potentionally interesting flags for reset.
+         *
+         * COMM_NTF: Return result register feedback.  This could be used to
+         * detect some conditions such as short, alarming presence, or
+         * detect if a new device was detected.
+         *
+         * COMM_SE which allows SPEED_NORMAL, SPEED_FLEXIBLE, SPEED_OVERDRIVE:
+         * Select the data transfer rate.
+         */
+        err = ds_send_control(dev, COMM_1_WIRE_RESET | COMM_IM, SPEED_NORMAL);
         if (err)
                 return err;
 
-        ds_wait_status(dev, st);
-#if 0
-        if (st->command_buffer_status) {
-                printk(KERN_INFO "Short circuit.\n");
-                return -EIO;
-        }
-#endif
-
         return 0;
 }
 
@@ -471,60 +530,43 @@ static int ds_set_speed(struct ds_device *dev, int speed)
 }
 #endif  /*  0  */
 
-static int ds_start_pulse(struct ds_device *dev, int delay)
+static int ds_set_pullup(struct ds_device *dev, int delay)
 {
-        int err;
+        int err = 0;
         u8 del = 1 + (u8)(delay >> 4);
-        struct ds_status st;
-
-#if 0
-        err = ds_stop_pulse(dev, 10);
-        if (err)
+        /* Just storing delay would not get the trunication and roundup. */
+        int ms = del<<4;
+
+        /* Enable spu_bit if a delay is set. */
+        dev->spu_bit = delay ? COMM_SPU : 0;
+        /* If delay is zero, it has already been disabled, if the time is
+         * the same as the hardware was last programmed to, there is also
+         * nothing more to do.  Compare with the recalculated value ms
+         * rather than del or delay which can have a different value.
+         */
+        if (delay == 0 || ms == dev->spu_sleep)
                 return err;
 
-        err = ds_send_control_mode(dev, MOD_PULSE_EN, PULSE_SPUE);
-        if (err)
-                return err;
-#endif
         err = ds_send_control(dev, COMM_SET_DURATION | COMM_IM, del);
         if (err)
                 return err;
 
-        err = ds_send_control(dev, COMM_PULSE | COMM_IM | COMM_F, 0);
-        if (err)
-                return err;
-
-        mdelay(delay);
-
-        ds_wait_status(dev, &st);
+        dev->spu_sleep = ms;
 
         return err;
 }
 
 static int ds_touch_bit(struct ds_device *dev, u8 bit, u8 *tbit)
 {
-        int err, count;
+        int err;
         struct ds_status st;
-        u16 value = (COMM_BIT_IO | COMM_IM) | ((bit) ? COMM_D : 0);
-        u16 cmd;
 
-        err = ds_send_control(dev, value, 0);
+        err = ds_send_control(dev, COMM_BIT_IO | COMM_IM | (bit ? COMM_D : 0),
+                0);
         if (err)
                 return err;
 
-        count = 0;
-        do {
-                err = ds_wait_status(dev, &st);
-                if (err)
-                        return err;
-
-                cmd = st.command0 | (st.command1 << 8);
-        } while (cmd != value && ++count < 10);
-
-        if (err < 0 || count >= 10) {
-                printk(KERN_ERR "Failed to obtain status.\n");
-                return -EINVAL;
-        }
+        ds_wait_status(dev, &st);
 
         err = ds_recv_data(dev, tbit, sizeof(*tbit));
         if (err < 0)
@@ -533,12 +575,18 @@ static int ds_touch_bit(struct ds_device *dev, u8 bit, u8 *tbit)
         return 0;
 }
 
+#if 0
 static int ds_write_bit(struct ds_device *dev, u8 bit)
 {
         int err;
         struct ds_status st;
 
-        err = ds_send_control(dev, COMM_BIT_IO | COMM_IM | (bit) ? COMM_D : 0, 0);
+        /* Set COMM_ICP to write without a readback.  Note, this will
+         * produce one time slot, a down followed by an up with COMM_D
+         * only determing the timing.
+         */
+        err = ds_send_control(dev, COMM_BIT_IO | COMM_IM | COMM_ICP |
+                (bit ? COMM_D : 0), 0);
         if (err)
                 return err;
 
@@ -546,6 +594,7 @@ static int ds_write_bit(struct ds_device *dev, u8 bit)
 
         return 0;
 }
+#endif
 
 static int ds_write_byte(struct ds_device *dev, u8 byte)
 {
@@ -553,10 +602,13 @@ static int ds_write_byte(struct ds_device *dev, u8 byte)
         struct ds_status st;
         u8 rbyte;
 
-        err = ds_send_control(dev, COMM_BYTE_IO | COMM_IM | COMM_SPU, byte);
+        err = ds_send_control(dev, COMM_BYTE_IO | COMM_IM | dev->spu_bit, byte);
         if (err)
                 return err;
 
+        if (dev->spu_bit)
+                msleep(dev->spu_sleep);
+
         err = ds_wait_status(dev, &st);
         if (err)
                 return err;
@@ -565,8 +617,6 @@ static int ds_write_byte(struct ds_device *dev, u8 byte)
         if (err < 0)
                 return err;
 
-        ds_start_pulse(dev, PULLUP_PULSE_DURATION);
-
         return !(byte == rbyte);
 }
 
@@ -602,7 +652,7 @@ static int ds_read_block(struct ds_device *dev, u8 *buf, int len)
         if (err < 0)
                 return err;
 
-        err = ds_send_control(dev, COMM_BLOCK_IO | COMM_IM | COMM_SPU, len);
+        err = ds_send_control(dev, COMM_BLOCK_IO | COMM_IM, len);
         if (err)
                 return err;
 
@@ -623,20 +673,19 @@ static int ds_write_block(struct ds_device *dev, u8 *buf, int len)
         if (err < 0)
                 return err;
 
-        ds_wait_status(dev, &st);
-
-        err = ds_send_control(dev, COMM_BLOCK_IO | COMM_IM | COMM_SPU, len);
+        err = ds_send_control(dev, COMM_BLOCK_IO | COMM_IM | dev->spu_bit, len);
         if (err)
                 return err;
 
+        if (dev->spu_bit)
+                msleep(dev->spu_sleep);
+
         ds_wait_status(dev, &st);
 
         err = ds_recv_data(dev, buf, len);
         if (err < 0)
                 return err;
 
-        ds_start_pulse(dev, PULLUP_PULSE_DURATION);
-
         return !(err == len);
 }
 
@@ -728,6 +777,7 @@ static u8 ds9490r_touch_bit(void *data, u8 bit)
         return ret;
 }
 
+#if 0
 static void ds9490r_write_bit(void *data, u8 bit)
 {
         struct ds_device *dev = data;
@@ -735,13 +785,6 @@ static void ds9490r_write_bit(void *data, u8 bit)
         ds_write_bit(dev, bit);
 }
 
-static void ds9490r_write_byte(void *data, u8 byte)
-{
-        struct ds_device *dev = data;
-
-        ds_write_byte(dev, byte);
-}
-
 static u8 ds9490r_read_bit(void *data)
 {
         struct ds_device *dev = data;
@@ -754,6 +797,14 @@ static u8 ds9490r_read_bit(void *data)
 
         return bit & 1;
 }
+#endif
+
+static void ds9490r_write_byte(void *data, u8 byte)
+{
+        struct ds_device *dev = data;
+
+        ds_write_byte(dev, byte);
+}
 
 static u8 ds9490r_read_byte(void *data)
 {
@@ -790,31 +841,58 @@ static u8 ds9490r_read_block(void *data, u8 *buf, int len)
 static u8 ds9490r_reset(void *data)
 {
         struct ds_device *dev = data;
-        struct ds_status st;
         int err;
 
-        memset(&st, 0, sizeof(st));
-
-        err = ds_reset(dev, &st);
+        err = ds_reset(dev);
         if (err)
                 return 1;
 
         return 0;
 }
 
+static u8 ds9490r_set_pullup(void *data, int delay)
+{
+        struct ds_device *dev = data;
+
+        if (ds_set_pullup(dev, delay))
+                return 1;
+
+        return 0;
+}
+
 static int ds_w1_init(struct ds_device *dev)
 {
         memset(&dev->master, 0, sizeof(struct w1_bus_master));
 
+        /* Reset the device as it can be in a bad state.
+         * This is necessary because a block write will wait for data
+         * to be placed in the output buffer and block any later
+         * commands which will keep accumulating and the device will
+         * not be idle.  Another case is removing the ds2490 module
+         * while a bus search is in progress, somehow a few commands
+         * get through, but the input transfers fail leaving data in
+         * the input buffer.  This will cause the next read to fail
+         * see the note in ds_recv_data.
+         */
+        ds_reset_device(dev);
+
         dev->master.data        = dev;
         dev->master.touch_bit   = &ds9490r_touch_bit;
+        /* read_bit and write_bit in w1_bus_master are expected to set and
+         * sample the line level.  For write_bit that means it is expected to
+         * set it to that value and leave it there.  ds2490 only supports an
+         * individual time slot at the lowest level.  The requirement from
+         * pulling the bus state down to reading the state is 15us, something
+         * that isn't realistic on the USB bus anyway.
         dev->master.read_bit    = &ds9490r_read_bit;
         dev->master.write_bit   = &ds9490r_write_bit;
+        */
         dev->master.read_byte   = &ds9490r_read_byte;
         dev->master.write_byte  = &ds9490r_write_byte;
         dev->master.read_block  = &ds9490r_read_block;
         dev->master.write_block = &ds9490r_write_block;
         dev->master.reset_bus   = &ds9490r_reset;
+        dev->master.set_pullup  = &ds9490r_set_pullup;
 
         return w1_add_master_device(&dev->master);
 }
@@ -838,6 +916,8 @@ static int ds_probe(struct usb_interface *intf,
                 printk(KERN_INFO "Failed to allocate new DS9490R structure.\n");
                 return -ENOMEM;
         }
+        dev->spu_sleep = 0;
+        dev->spu_bit = 0;
         dev->udev = usb_get_dev(udev);
         if (!dev->udev) {
                 err = -ENOMEM;
diff --git a/drivers/w1/slaves/w1_ds2431.c b/drivers/w1/slaves/w1_ds2431.c
new file mode 100644
index 000000000000..2c6c0cf6a20f
--- /dev/null
+++ b/drivers/w1/slaves/w1_ds2431.c
@@ -0,0 +1,312 @@
+/*
+ * w1_ds2431.c - w1 family 2d (DS2431) driver
+ *
+ * Copyright (c) 2008 Bernhard Weirich <bernhard.weirich@riedel.net>
+ *
+ * Heavily inspired by w1_DS2433 driver from Ben Gardner <bgardner@wabtec.com>
+ *
+ * This source code is licensed under the GNU General Public License,
+ * Version 2. See the file COPYING for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/device.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+
+#include "../w1.h"
+#include "../w1_int.h"
+#include "../w1_family.h"
+
+#define W1_F2D_EEPROM_SIZE              128
+#define W1_F2D_PAGE_COUNT               4
+#define W1_F2D_PAGE_BITS                5
+#define W1_F2D_PAGE_SIZE                (1<<W1_F2D_PAGE_BITS)
+#define W1_F2D_PAGE_MASK                0x1F
+
+#define W1_F2D_SCRATCH_BITS  3
+#define W1_F2D_SCRATCH_SIZE  (1<<W1_F2D_SCRATCH_BITS)
+#define W1_F2D_SCRATCH_MASK  (W1_F2D_SCRATCH_SIZE-1)
+
+#define W1_F2D_READ_EEPROM      0xF0
+#define W1_F2D_WRITE_SCRATCH    0x0F
+#define W1_F2D_READ_SCRATCH     0xAA
+#define W1_F2D_COPY_SCRATCH     0x55
+
+
+#define W1_F2D_TPROG_MS         11
+
+#define W1_F2D_READ_RETRIES             10
+#define W1_F2D_READ_MAXLEN              8
+
+/*
+ * Check the file size bounds and adjusts count as needed.
+ * This would not be needed if the file size didn't reset to 0 after a write.
+ */
+static inline size_t w1_f2d_fix_count(loff_t off, size_t count, size_t size)
+{
+        if (off > size)
+                return 0;
+
+        if ((off + count) > size)
+                return size - off;
+
+        return count;
+}
+
+/*
+ * Read a block from W1 ROM two times and compares the results.
+ * If they are equal they are returned, otherwise the read
+ * is repeated W1_F2D_READ_RETRIES times.
+ *
+ * count must not exceed W1_F2D_READ_MAXLEN.
+ */
+static int w1_f2d_readblock(struct w1_slave *sl, int off, int count, char *buf)
+{
+        u8 wrbuf[3];
+        u8 cmp[W1_F2D_READ_MAXLEN];
+        int tries = W1_F2D_READ_RETRIES;
+
+        do {
+                wrbuf[0] = W1_F2D_READ_EEPROM;
+                wrbuf[1] = off & 0xff;
+                wrbuf[2] = off >> 8;
+
+                if (w1_reset_select_slave(sl))
+                        return -1;
+
+                w1_write_block(sl->master, wrbuf, 3);
+                w1_read_block(sl->master, buf, count);
+
+                if (w1_reset_select_slave(sl))
+                        return -1;
+
+                w1_write_block(sl->master, wrbuf, 3);
+                w1_read_block(sl->master, cmp, count);
+
+                if (!memcmp(cmp, buf, count))
+                        return 0;
+        } while (--tries);
+
+        dev_err(&sl->dev, "proof reading failed %d times\n",
+                        W1_F2D_READ_RETRIES);
+
+        return -1;
+}
+
+static ssize_t w1_f2d_read_bin(struct kobject *kobj,
+                               struct bin_attribute *bin_attr,
+                               char *buf, loff_t off, size_t count)
+{
+        struct w1_slave *sl = kobj_to_w1_slave(kobj);
+        int todo = count;
+
+        count = w1_f2d_fix_count(off, count, W1_F2D_EEPROM_SIZE);
+        if (count == 0)
+                return 0;
+
+        mutex_lock(&sl->master->mutex);
+
+        /* read directly from the EEPROM in chunks of W1_F2D_READ_MAXLEN */
+        while (todo > 0) {
+                int block_read;
+
+                if (todo >= W1_F2D_READ_MAXLEN)
+                        block_read = W1_F2D_READ_MAXLEN;
+                else
+                        block_read = todo;
+
+                if (w1_f2d_readblock(sl, off, block_read, buf) < 0)
+                        count = -EIO;
+
+                todo -= W1_F2D_READ_MAXLEN;
+                buf += W1_F2D_READ_MAXLEN;
+                off += W1_F2D_READ_MAXLEN;
+        }
+
+        mutex_unlock(&sl->master->mutex);
+
+        return count;
+}
+
+/*
+ * Writes to the scratchpad and reads it back for verification.
+ * Then copies the scratchpad to EEPROM.
+ * The data must be aligned at W1_F2D_SCRATCH_SIZE bytes and
+ * must be W1_F2D_SCRATCH_SIZE bytes long.
+ * The master must be locked.
+ *
+ * @param sl    The slave structure
+ * @param addr  Address for the write
+ * @param len   length must be <= (W1_F2D_PAGE_SIZE - (addr & W1_F2D_PAGE_MASK))
+ * @param data  The data to write
+ * @return      0=Success -1=failure
+ */
+static int w1_f2d_write(struct w1_slave *sl, int addr, int len, const u8 *data)
+{
+        int tries = W1_F2D_READ_RETRIES;
+        u8 wrbuf[4];
+        u8 rdbuf[W1_F2D_SCRATCH_SIZE + 3];
+        u8 es = (addr + len - 1) % W1_F2D_SCRATCH_SIZE;
+
+retry:
+
+        /* Write the data to the scratchpad */
+        if (w1_reset_select_slave(sl))
+                return -1;
+
+        wrbuf[0] = W1_F2D_WRITE_SCRATCH;
+        wrbuf[1] = addr & 0xff;
+        wrbuf[2] = addr >> 8;
+
+        w1_write_block(sl->master, wrbuf, 3);
+        w1_write_block(sl->master, data, len);
+
+        /* Read the scratchpad and verify */
+        if (w1_reset_select_slave(sl))
+                return -1;
+
+        w1_write_8(sl->master, W1_F2D_READ_SCRATCH);
+        w1_read_block(sl->master, rdbuf, len + 3);
+
+        /* Compare what was read against the data written */
+        if ((rdbuf[0] != wrbuf[1]) || (rdbuf[1] != wrbuf[2]) ||
+            (rdbuf[2] != es) || (memcmp(data, &rdbuf[3], len) != 0)) {
+
+                if (--tries)
+                        goto retry;
+
+                dev_err(&sl->dev,
+                        "could not write to eeprom, scratchpad compare failed %d times\n",
+                        W1_F2D_READ_RETRIES);
+
+                return -1;
+        }
+
+        /* Copy the scratchpad to EEPROM */
+        if (w1_reset_select_slave(sl))
+                return -1;
+
+        wrbuf[0] = W1_F2D_COPY_SCRATCH;
+        wrbuf[3] = es;
+        w1_write_block(sl->master, wrbuf, 4);
+
+        /* Sleep for tprog ms to wait for the write to complete */
+        msleep(W1_F2D_TPROG_MS);
+
+        /* Reset the bus to wake up the EEPROM  */
+        w1_reset_bus(sl->master);
+
+        return 0;
+}
+
+static ssize_t w1_f2d_write_bin(struct kobject *kobj,
+                                struct bin_attribute *bin_attr,
+                                char *buf, loff_t off, size_t count)
+{
+        struct w1_slave *sl = kobj_to_w1_slave(kobj);
+        int addr, len;
+        int copy;
+
+        count = w1_f2d_fix_count(off, count, W1_F2D_EEPROM_SIZE);
+        if (count == 0)
+                return 0;
+
+        mutex_lock(&sl->master->mutex);
+
+        /* Can only write data in blocks of the size of the scratchpad */
+        addr = off;
+        len = count;
+        while (len > 0) {
+
+                /* if len too short or addr not aligned */
+                if (len < W1_F2D_SCRATCH_SIZE || addr & W1_F2D_SCRATCH_MASK) {
+                        char tmp[W1_F2D_SCRATCH_SIZE];
+
+                        /* read the block and update the parts to be written */
+                        if (w1_f2d_readblock(sl, addr & ~W1_F2D_SCRATCH_MASK,
+                                        W1_F2D_SCRATCH_SIZE, tmp)) {
+                                count = -EIO;
+                                goto out_up;
+                        }
+
+                        /* copy at most to the boundary of the PAGE or len */
+                        copy = W1_F2D_SCRATCH_SIZE -
+                                (addr & W1_F2D_SCRATCH_MASK);
+
+                        if (copy > len)
+                                copy = len;
+
+                        memcpy(&tmp[addr & W1_F2D_SCRATCH_MASK], buf, copy);
+                        if (w1_f2d_write(sl, addr & ~W1_F2D_SCRATCH_MASK,
+                                        W1_F2D_SCRATCH_SIZE, tmp) < 0) {
+                                count = -EIO;
+                                goto out_up;
+                        }
+                } else {
+
+                        copy = W1_F2D_SCRATCH_SIZE;
+                        if (w1_f2d_write(sl, addr, copy, buf) < 0) {
+                                count = -EIO;
+                                goto out_up;
+                        }
+                }
+                buf += copy;
+                addr += copy;
+                len -= copy;
+        }
+
+out_up:
+        mutex_unlock(&sl->master->mutex);
+
+        return count;
+}
+
+static struct bin_attribute w1_f2d_bin_attr = {
+        .attr = {
+                .name = "eeprom",
+                .mode = S_IRUGO | S_IWUSR,
+        },
+        .size = W1_F2D_EEPROM_SIZE,
+        .read = w1_f2d_read_bin,
+        .write = w1_f2d_write_bin,
+};
+
+static int w1_f2d_add_slave(struct w1_slave *sl)
+{
+        return sysfs_create_bin_file(&sl->dev.kobj, &w1_f2d_bin_attr);
+}
+
+static void w1_f2d_remove_slave(struct w1_slave *sl)
+{
+        sysfs_remove_bin_file(&sl->dev.kobj, &w1_f2d_bin_attr);
+}
+
+static struct w1_family_ops w1_f2d_fops = {
+        .add_slave      = w1_f2d_add_slave,
+        .remove_slave   = w1_f2d_remove_slave,
+};
+
+static struct w1_family w1_family_2d = {
+        .fid = W1_EEPROM_DS2431,
+        .fops = &w1_f2d_fops,
+};
+
+static int __init w1_f2d_init(void)
+{
+        return w1_register_family(&w1_family_2d);
+}
+
+static void __exit w1_f2d_fini(void)
+{
+        w1_unregister_family(&w1_family_2d);
+}
+
+module_init(w1_f2d_init);
+module_exit(w1_f2d_fini);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Bernhard Weirich <bernhard.weirich@riedel.net>");
+MODULE_DESCRIPTION("w1 family 2d driver for DS2431, 1kb EEPROM");
diff --git a/drivers/w1/slaves/w1_therm.c b/drivers/w1/slaves/w1_therm.c
index fb28acaeed6c..2c8dff9f77da 100644
--- a/drivers/w1/slaves/w1_therm.c
+++ b/drivers/w1/slaves/w1_therm.c
@@ -37,31 +37,33 @@ MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Evgeniy Polyakov <johnpol@2ka.mipt.ru>");
 MODULE_DESCRIPTION("Driver for 1-wire Dallas network protocol, temperature family.");
 
+/* Allow the strong pullup to be disabled, but default to enabled.
+ * If it was disabled a parasite powered device might not get the require
+ * current to do a temperature conversion.  If it is enabled parasite powered
+ * devices have a better chance of getting the current required.
+ */
+static int w1_strong_pullup = 1;
+module_param_named(strong_pullup, w1_strong_pullup, int, 0);
+
 static u8 bad_roms[][9] = {
                                 {0xaa, 0x00, 0x4b, 0x46, 0xff, 0xff, 0x0c, 0x10, 0x87},
                                 {}
                         };
 
-static ssize_t w1_therm_read_bin(struct kobject *, struct bin_attribute *,
-                                 char *, loff_t, size_t);
+static ssize_t w1_therm_read(struct device *device,
+        struct device_attribute *attr, char *buf);
 
-static struct bin_attribute w1_therm_bin_attr = {
-        .attr = {
-                .name = "w1_slave",
-                .mode = S_IRUGO,
-        },
-        .size = W1_SLAVE_DATA_SIZE,
-        .read = w1_therm_read_bin,
-};
+static struct device_attribute w1_therm_attr =
+        __ATTR(w1_slave, S_IRUGO, w1_therm_read, NULL);
 
 static int w1_therm_add_slave(struct w1_slave *sl)
 {
-        return sysfs_create_bin_file(&sl->dev.kobj, &w1_therm_bin_attr);
+        return device_create_file(&sl->dev, &w1_therm_attr);
 }
 
 static void w1_therm_remove_slave(struct w1_slave *sl)
 {
-        sysfs_remove_bin_file(&sl->dev.kobj, &w1_therm_bin_attr);
+        device_remove_file(&sl->dev, &w1_therm_attr);
 }
 
 static struct w1_family_ops w1_therm_fops = {
@@ -160,30 +162,19 @@ static int w1_therm_check_rom(u8 rom[9])
         return 0;
 }
 
-static ssize_t w1_therm_read_bin(struct kobject *kobj,
-                                 struct bin_attribute *bin_attr,
-                                 char *buf, loff_t off, size_t count)
+static ssize_t w1_therm_read(struct device *device,
+        struct device_attribute *attr, char *buf)
 {
-        struct w1_slave *sl = kobj_to_w1_slave(kobj);
+        struct w1_slave *sl = dev_to_w1_slave(device);
         struct w1_master *dev = sl->master;
         u8 rom[9], crc, verdict;
         int i, max_trying = 10;
+        ssize_t c = PAGE_SIZE;
 
-        mutex_lock(&sl->master->mutex);
+        mutex_lock(&dev->mutex);
 
-        if (off > W1_SLAVE_DATA_SIZE) {
-                count = 0;
-                goto out;
-        }
-        if (off + count > W1_SLAVE_DATA_SIZE) {
-                count = 0;
-                goto out;
-        }
-
-        memset(buf, 0, count);
         memset(rom, 0, sizeof(rom));
 
-        count = 0;
         verdict = 0;
         crc = 0;
 
@@ -192,15 +183,20 @@ static ssize_t w1_therm_read_bin(struct kobject *kobj,
                         int count = 0;
                         unsigned int tm = 750;
 
+                        /* 750ms strong pullup (or delay) after the convert */
+                        if (w1_strong_pullup)
+                                w1_next_pullup(dev, tm);
                         w1_write_8(dev, W1_CONVERT_TEMP);
-
-                        msleep(tm);
+                        if (!w1_strong_pullup)
+                                msleep(tm);
 
                         if (!w1_reset_select_slave(sl)) {
 
                                 w1_write_8(dev, W1_READ_SCRATCHPAD);
                                 if ((count = w1_read_block(dev, rom, 9)) != 9) {
-                                        dev_warn(&dev->dev, "w1_read_block() returned %d instead of 9.\n", count);
+                                        dev_warn(device, "w1_read_block() "
+                                                "returned %u instead of 9.\n",
+                                                count);
                                 }
 
                                 crc = w1_calc_crc8(rom, 8);
@@ -215,22 +211,22 @@ static ssize_t w1_therm_read_bin(struct kobject *kobj,
         }
 
         for (i = 0; i < 9; ++i)
-                count += sprintf(buf + count, "%02x ", rom[i]);
-        count += sprintf(buf + count, ": crc=%02x %s\n",
+                c -= snprintf(buf + PAGE_SIZE - c, c, "%02x ", rom[i]);
+        c -= snprintf(buf + PAGE_SIZE - c, c, ": crc=%02x %s\n",
                            crc, (verdict) ? "YES" : "NO");
         if (verdict)
                 memcpy(sl->rom, rom, sizeof(sl->rom));
         else
-                dev_warn(&dev->dev, "18S20 doesn't respond to CONVERT_TEMP.\n");
+                dev_warn(device, "18S20 doesn't respond to CONVERT_TEMP.\n");
 
         for (i = 0; i < 9; ++i)
-                count += sprintf(buf + count, "%02x ", sl->rom[i]);
+                c -= snprintf(buf + PAGE_SIZE - c, c, "%02x ", sl->rom[i]);
 
-        count += sprintf(buf + count, "t=%d\n", w1_convert_temp(rom, sl->family->fid));
-out:
+        c -= snprintf(buf + PAGE_SIZE - c, c, "t=%d\n",
+                w1_convert_temp(rom, sl->family->fid));
         mutex_unlock(&dev->mutex);
 
-        return count;
+        return PAGE_SIZE - c;
 }
 
 static int __init w1_therm_init(void)
diff --git a/drivers/w1/w1.c b/drivers/w1/w1.c
index 7293c9b11f91..3b615d4022ee 100644
--- a/drivers/w1/w1.c
+++ b/drivers/w1/w1.c
@@ -46,19 +46,17 @@ MODULE_AUTHOR("Evgeniy Polyakov <johnpol@2ka.mipt.ru>");
 MODULE_DESCRIPTION("Driver for 1-wire Dallas network protocol.");
 
 static int w1_timeout = 10;
-static int w1_control_timeout = 1;
 int w1_max_slave_count = 10;
 int w1_max_slave_ttl = 10;
 
 module_param_named(timeout, w1_timeout, int, 0);
-module_param_named(control_timeout, w1_control_timeout, int, 0);
 module_param_named(max_slave_count, w1_max_slave_count, int, 0);
 module_param_named(slave_ttl, w1_max_slave_ttl, int, 0);
 
 DEFINE_MUTEX(w1_mlock);
 LIST_HEAD(w1_masters);
 
-static struct task_struct *w1_control_thread;
+static int w1_attach_slave_device(struct w1_master *dev, struct w1_reg_num *rn);
 
 static int w1_master_match(struct device *dev, struct device_driver *drv)
 {
@@ -83,10 +81,10 @@ static void w1_slave_release(struct device *dev)
 {
         struct w1_slave *sl = dev_to_w1_slave(dev);
 
-        printk("%s: Releasing %s.\n", __func__, sl->name);
+        dev_dbg(dev, "%s: Releasing %s.\n", __func__, sl->name);
 
         while (atomic_read(&sl->refcnt)) {
-                printk("Waiting for %s to become free: refcnt=%d.\n",
+                dev_dbg(dev, "Waiting for %s to become free: refcnt=%d.\n",
                                 sl->name, atomic_read(&sl->refcnt));
                 if (msleep_interruptible(1000))
                         flush_signals(current);
@@ -105,35 +103,20 @@ static ssize_t w1_slave_read_name(struct device *dev, struct device_attribute *a
         return sprintf(buf, "%s\n", sl->name);
 }
 
-static ssize_t w1_slave_read_id(struct kobject *kobj,
-                                struct bin_attribute *bin_attr,
-                                char *buf, loff_t off, size_t count)
+static ssize_t w1_slave_read_id(struct device *dev,
+        struct device_attribute *attr, char *buf)
 {
-        struct w1_slave *sl = kobj_to_w1_slave(kobj);
-
-        if (off > 8) {
-                count = 0;
-        } else {
-                if (off + count > 8)
-                        count = 8 - off;
-
-                memcpy(buf, (u8 *)&sl->reg_num, count);
-        }
+        struct w1_slave *sl = dev_to_w1_slave(dev);
+        ssize_t count = sizeof(sl->reg_num);
 
+        memcpy(buf, (u8 *)&sl->reg_num, count);
         return count;
 }
 
 static struct device_attribute w1_slave_attr_name =
         __ATTR(name, S_IRUGO, w1_slave_read_name, NULL);
-
-static struct bin_attribute w1_slave_attr_bin_id = {
-      .attr = {
-              .name = "id",
-              .mode = S_IRUGO,
-      },
-      .size = 8,
-      .read = w1_slave_read_id,
-};
+static struct device_attribute w1_slave_attr_id =
+        __ATTR(id, S_IRUGO, w1_slave_read_id, NULL);
 
 /* Default family */
 
@@ -250,11 +233,16 @@ static ssize_t w1_master_attribute_store_search(struct device * dev,
                                                 struct device_attribute *attr,
                                                 const char * buf, size_t count)
 {
+        long tmp;
         struct w1_master *md = dev_to_w1_master(dev);
 
+        if (strict_strtol(buf, 0, &tmp) == -EINVAL)
+                return -EINVAL;
+
         mutex_lock(&md->mutex);
-        md->search_count = simple_strtol(buf, NULL, 0);
+        md->search_count = tmp;
         mutex_unlock(&md->mutex);
+        wake_up_process(md->thread);
 
         return count;
 }
@@ -273,6 +261,38 @@ static ssize_t w1_master_attribute_show_search(struct device *dev,
         return count;
 }
 
+static ssize_t w1_master_attribute_store_pullup(struct device *dev,
+                                                struct device_attribute *attr,
+                                                const char *buf, size_t count)
+{
+        long tmp;
+        struct w1_master *md = dev_to_w1_master(dev);
+
+        if (strict_strtol(buf, 0, &tmp) == -EINVAL)
+                return -EINVAL;
+
+        mutex_lock(&md->mutex);
+        md->enable_pullup = tmp;
+        mutex_unlock(&md->mutex);
+        wake_up_process(md->thread);
+
+        return count;
+}
+
+static ssize_t w1_master_attribute_show_pullup(struct device *dev,
+                                               struct device_attribute *attr,
+                                               char *buf)
+{
+        struct w1_master *md = dev_to_w1_master(dev);
+        ssize_t count;
+
+        mutex_lock(&md->mutex);
+        count = sprintf(buf, "%d\n", md->enable_pullup);
+        mutex_unlock(&md->mutex);
+
+        return count;
+}
+
 static ssize_t w1_master_attribute_show_pointer(struct device *dev, struct device_attribute *attr, char *buf)
 {
         struct w1_master *md = dev_to_w1_master(dev);
@@ -324,7 +344,8 @@ static ssize_t w1_master_attribute_show_slave_count(struct device *dev, struct d
         return count;
 }
 
-static ssize_t w1_master_attribute_show_slaves(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t w1_master_attribute_show_slaves(struct device *dev,
+        struct device_attribute *attr, char *buf)
 {
         struct w1_master *md = dev_to_w1_master(dev);
         int c = PAGE_SIZE;
@@ -349,6 +370,135 @@ static ssize_t w1_master_attribute_show_slaves(struct device *dev, struct device
         return PAGE_SIZE - c;
 }
 
+static ssize_t w1_master_attribute_show_add(struct device *dev,
+        struct device_attribute *attr, char *buf)
+{
+        int c = PAGE_SIZE;
+        c -= snprintf(buf+PAGE_SIZE - c, c,
+                "write device id xx-xxxxxxxxxxxx to add slave\n");
+        return PAGE_SIZE - c;
+}
+
+static int w1_atoreg_num(struct device *dev, const char *buf, size_t count,
+        struct w1_reg_num *rn)
+{
+        unsigned int family;
+        unsigned long long id;
+        int i;
+        u64 rn64_le;
+
+        /* The CRC value isn't read from the user because the sysfs directory
+         * doesn't include it and most messages from the bus search don't
+         * print it either.  It would be unreasonable for the user to then
+         * provide it.
+         */
+        const char *error_msg = "bad slave string format, expecting "
+                "ff-dddddddddddd\n";
+
+        if (buf[2] != '-') {
+                dev_err(dev, "%s", error_msg);
+                return -EINVAL;
+        }
+        i = sscanf(buf, "%02x-%012llx", &family, &id);
+        if (i != 2) {
+                dev_err(dev, "%s", error_msg);
+                return -EINVAL;
+        }
+        rn->family = family;
+        rn->id = id;
+
+        rn64_le = cpu_to_le64(*(u64 *)rn);
+        rn->crc = w1_calc_crc8((u8 *)&rn64_le, 7);
+
+#if 0
+        dev_info(dev, "With CRC device is %02x.%012llx.%02x.\n",
+                  rn->family, (unsigned long long)rn->id, rn->crc);
+#endif
+
+        return 0;
+}
+
+/* Searches the slaves in the w1_master and returns a pointer or NULL.
+ * Note: must hold the mutex
+ */
+static struct w1_slave *w1_slave_search_device(struct w1_master *dev,
+        struct w1_reg_num *rn)
+{
+        struct w1_slave *sl;
+        list_for_each_entry(sl, &dev->slist, w1_slave_entry) {
+                if (sl->reg_num.family == rn->family &&
+                                sl->reg_num.id == rn->id &&
+                                sl->reg_num.crc == rn->crc) {
+                        return sl;
+                }
+        }
+        return NULL;
+}
+
+static ssize_t w1_master_attribute_store_add(struct device *dev,
+                                                struct device_attribute *attr,
+                                                const char *buf, size_t count)
+{
+        struct w1_master *md = dev_to_w1_master(dev);
+        struct w1_reg_num rn;
+        struct w1_slave *sl;
+        ssize_t result = count;
+
+        if (w1_atoreg_num(dev, buf, count, &rn))
+                return -EINVAL;
+
+        mutex_lock(&md->mutex);
+        sl = w1_slave_search_device(md, &rn);
+        /* It would be nice to do a targeted search one the one-wire bus
+         * for the new device to see if it is out there or not.  But the
+         * current search doesn't support that.
+         */
+        if (sl) {
+                dev_info(dev, "Device %s already exists\n", sl->name);
+                result = -EINVAL;
+        } else {
+                w1_attach_slave_device(md, &rn);
+        }
+        mutex_unlock(&md->mutex);
+
+        return result;
+}
+
+static ssize_t w1_master_attribute_show_remove(struct device *dev,
+        struct device_attribute *attr, char *buf)
+{
+        int c = PAGE_SIZE;
+        c -= snprintf(buf+PAGE_SIZE - c, c,
+                "write device id xx-xxxxxxxxxxxx to remove slave\n");
+        return PAGE_SIZE - c;
+}
+
+static ssize_t w1_master_attribute_store_remove(struct device *dev,
+                                                struct device_attribute *attr,
+                                                const char *buf, size_t count)
+{
+        struct w1_master *md = dev_to_w1_master(dev);
+        struct w1_reg_num rn;
+        struct w1_slave *sl;
+        ssize_t result = count;
+
+        if (w1_atoreg_num(dev, buf, count, &rn))
+                return -EINVAL;
+
+        mutex_lock(&md->mutex);
+        sl = w1_slave_search_device(md, &rn);
+        if (sl) {
+                w1_slave_detach(sl);
+        } else {
+                dev_info(dev, "Device %02x-%012llx doesn't exists\n", rn.family,
+                        (unsigned long long)rn.id);
+                result = -EINVAL;
+        }
+        mutex_unlock(&md->mutex);
+
+        return result;
+}
+
 #define W1_MASTER_ATTR_RO(_name, _mode)                         \
         struct device_attribute w1_master_attribute_##_name =   \
                 __ATTR(w1_master_##_name, _mode,                \
@@ -368,6 +518,9 @@ static W1_MASTER_ATTR_RO(attempts, S_IRUGO);
 static W1_MASTER_ATTR_RO(timeout, S_IRUGO);
 static W1_MASTER_ATTR_RO(pointer, S_IRUGO);
 static W1_MASTER_ATTR_RW(search, S_IRUGO | S_IWUGO);
+static W1_MASTER_ATTR_RW(pullup, S_IRUGO | S_IWUGO);
+static W1_MASTER_ATTR_RW(add, S_IRUGO | S_IWUGO);
+static W1_MASTER_ATTR_RW(remove, S_IRUGO | S_IWUGO);
 
 static struct attribute *w1_master_default_attrs[] = {
         &w1_master_attribute_name.attr,
@@ -378,6 +531,9 @@ static struct attribute *w1_master_default_attrs[] = {
         &w1_master_attribute_timeout.attr,
         &w1_master_attribute_pointer.attr,
         &w1_master_attribute_search.attr,
+        &w1_master_attribute_pullup.attr,
+        &w1_master_attribute_add.attr,
+        &w1_master_attribute_remove.attr,
         NULL
 };
 
@@ -390,7 +546,7 @@ int w1_create_master_attributes(struct w1_master *master)
         return sysfs_create_group(&master->dev.kobj, &w1_master_defattr_group);
 }
 
-static void w1_destroy_master_attributes(struct w1_master *master)
+void w1_destroy_master_attributes(struct w1_master *master)
 {
         sysfs_remove_group(&master->dev.kobj, &w1_master_defattr_group);
 }
@@ -479,7 +635,7 @@ static int __w1_attach_slave_device(struct w1_slave *sl)
         }
 
         /* Create "id" entry */
-        err = sysfs_create_bin_file(&sl->dev.kobj, &w1_slave_attr_bin_id);
+        err = device_create_file(&sl->dev, &w1_slave_attr_id);
         if (err < 0) {
                 dev_err(&sl->dev,
                         "sysfs file creation for [%s] failed. err=%d\n",
@@ -501,7 +657,7 @@ static int __w1_attach_slave_device(struct w1_slave *sl)
         return 0;
 
 out_rem2:
-        sysfs_remove_bin_file(&sl->dev.kobj, &w1_slave_attr_bin_id);
+        device_remove_file(&sl->dev, &w1_slave_attr_id);
 out_rem1:
         device_remove_file(&sl->dev, &w1_slave_attr_name);
 out_unreg:
@@ -567,7 +723,7 @@ static int w1_attach_slave_device(struct w1_master *dev, struct w1_reg_num *rn)
         return 0;
 }
 
-static void w1_slave_detach(struct w1_slave *sl)
+void w1_slave_detach(struct w1_slave *sl)
 {
         struct w1_netlink_msg msg;
 
@@ -583,7 +739,7 @@ static void w1_slave_detach(struct w1_slave *sl)
         msg.type = W1_SLAVE_REMOVE;
         w1_netlink_send(sl->master, &msg);
 
-        sysfs_remove_bin_file(&sl->dev.kobj, &w1_slave_attr_bin_id);
+        device_remove_file(&sl->dev, &w1_slave_attr_id);
         device_remove_file(&sl->dev, &w1_slave_attr_name);
         device_unregister(&sl->dev);
 
@@ -591,24 +747,6 @@ static void w1_slave_detach(struct w1_slave *sl)
         kfree(sl);
 }
 
-static struct w1_master *w1_search_master(void *data)
-{
-        struct w1_master *dev;
-        int found = 0;
-
-        mutex_lock(&w1_mlock);
-        list_for_each_entry(dev, &w1_masters, w1_master_entry) {
-                if (dev->bus_master->data == data) {
-                        found = 1;
-                        atomic_inc(&dev->refcnt);
-                        break;
-                }
-        }
-        mutex_unlock(&w1_mlock);
-
-        return (found)?dev:NULL;
-}
-
 struct w1_master *w1_search_master_id(u32 id)
 {
         struct w1_master *dev;
@@ -656,55 +794,56 @@ struct w1_slave *w1_search_slave(struct w1_reg_num *id)
         return (found)?sl:NULL;
 }
 
-void w1_reconnect_slaves(struct w1_family *f)
+void w1_reconnect_slaves(struct w1_family *f, int attach)
 {
+        struct w1_slave *sl, *sln;
         struct w1_master *dev;
 
         mutex_lock(&w1_mlock);
         list_for_each_entry(dev, &w1_masters, w1_master_entry) {
-                dev_dbg(&dev->dev, "Reconnecting slaves in %s into new family %02x.\n",
-                                dev->name, f->fid);
-                set_bit(W1_MASTER_NEED_RECONNECT, &dev->flags);
+                dev_dbg(&dev->dev, "Reconnecting slaves in device %s "
+                        "for family %02x.\n", dev->name, f->fid);
+                mutex_lock(&dev->mutex);
+                list_for_each_entry_safe(sl, sln, &dev->slist, w1_slave_entry) {
+                        /* If it is a new family, slaves with the default
+                         * family driver and are that family will be
+                         * connected.  If the family is going away, devices
+                         * matching that family are reconneced.
+                         */
+                        if ((attach && sl->family->fid == W1_FAMILY_DEFAULT
+                                && sl->reg_num.family == f->fid) ||
+                                (!attach && sl->family->fid == f->fid)) {
+                                struct w1_reg_num rn;
+
+                                memcpy(&rn, &sl->reg_num, sizeof(rn));
+                                w1_slave_detach(sl);
+
+                                w1_attach_slave_device(dev, &rn);
+                        }
+                }
+                dev_dbg(&dev->dev, "Reconnecting slaves in device %s "
+                        "has been finished.\n", dev->name);
+                mutex_unlock(&dev->mutex);
         }
         mutex_unlock(&w1_mlock);
 }
 
-static void w1_slave_found(void *data, u64 rn)
+static void w1_slave_found(struct w1_master *dev, u64 rn)
 {
-        int slave_count;
         struct w1_slave *sl;
-        struct list_head *ent;
         struct w1_reg_num *tmp;
-        struct w1_master *dev;
         u64 rn_le = cpu_to_le64(rn);
 
-        dev = w1_search_master(data);
-        if (!dev) {
-                printk(KERN_ERR "Failed to find w1 master device for data %p, "
-                       "it is impossible.\n", data);
-                return;
-        }
+        atomic_inc(&dev->refcnt);
 
         tmp = (struct w1_reg_num *) &rn;
 
-        slave_count = 0;
-        list_for_each(ent, &dev->slist) {
-
-                sl = list_entry(ent, struct w1_slave, w1_slave_entry);
-
-                if (sl->reg_num.family == tmp->family &&
-                    sl->reg_num.id == tmp->id &&
-                    sl->reg_num.crc == tmp->crc) {
-                        set_bit(W1_SLAVE_ACTIVE, (long *)&sl->flags);
-                        break;
-                }
-
-                slave_count++;
-        }
-
-        if (slave_count == dev->slave_count &&
-                rn && ((rn >> 56) & 0xff) == w1_calc_crc8((u8 *)&rn_le, 7)) {
-                w1_attach_slave_device(dev, tmp);
+        sl = w1_slave_search_device(dev, tmp);
+        if (sl) {
+                set_bit(W1_SLAVE_ACTIVE, (long *)&sl->flags);
+        } else {
+                if (rn && tmp->crc == w1_calc_crc8((u8 *)&rn_le, 7))
+                        w1_attach_slave_device(dev, tmp);
         }
 
         atomic_dec(&dev->refcnt);
@@ -779,80 +918,20 @@ void w1_search(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb
                         /* extract the direction taken & update the device number */
                         tmp64 = (triplet_ret >> 2);
                         rn |= (tmp64 << i);
+
+                        if (kthread_should_stop()) {
+                                dev_dbg(&dev->dev, "Abort w1_search\n");
+                                return;
+                        }
                 }
 
                 if ( (triplet_ret & 0x03) != 0x03 ) {
                         if ( (desc_bit == last_zero) || (last_zero < 0))
                                 last_device = 1;
                         desc_bit = last_zero;
-                        cb(dev->bus_master->data, rn);
-                }
-        }
-}
-
-static int w1_control(void *data)
-{
-        struct w1_slave *sl, *sln;
-        struct w1_master *dev, *n;
-        int have_to_wait = 0;
-
-        set_freezable();
-        while (!kthread_should_stop() || have_to_wait) {
-                have_to_wait = 0;
-
-                try_to_freeze();
-                msleep_interruptible(w1_control_timeout * 1000);
-
-                list_for_each_entry_safe(dev, n, &w1_masters, w1_master_entry) {
-                        if (!kthread_should_stop() && !dev->flags)
-                                continue;
-                        /*
-                         * Little race: we can create thread but not set the flag.
-                         * Get a chance for external process to set flag up.
-                         */
-                        if (!dev->initialized) {
-                                have_to_wait = 1;
-                                continue;
-                        }
-
-                        if (kthread_should_stop() || test_bit(W1_MASTER_NEED_EXIT, &dev->flags)) {
-                                set_bit(W1_MASTER_NEED_EXIT, &dev->flags);
-
-                                mutex_lock(&w1_mlock);
-                                list_del(&dev->w1_master_entry);
-                                mutex_unlock(&w1_mlock);
-
-                                mutex_lock(&dev->mutex);
-                                list_for_each_entry_safe(sl, sln, &dev->slist, w1_slave_entry) {
-                                        w1_slave_detach(sl);
-                                }
-                                w1_destroy_master_attributes(dev);
-                                mutex_unlock(&dev->mutex);
-                                atomic_dec(&dev->refcnt);
-                                continue;
-                        }
-
-                        if (test_bit(W1_MASTER_NEED_RECONNECT, &dev->flags)) {
-                                dev_dbg(&dev->dev, "Reconnecting slaves in device %s.\n", dev->name);
-                                mutex_lock(&dev->mutex);
-                                list_for_each_entry_safe(sl, sln, &dev->slist, w1_slave_entry) {
-                                        if (sl->family->fid == W1_FAMILY_DEFAULT) {
-                                                struct w1_reg_num rn;
-
-                                                memcpy(&rn, &sl->reg_num, sizeof(rn));
-                                                w1_slave_detach(sl);
-
-                                                w1_attach_slave_device(dev, &rn);
-                                        }
-                                }
-                                dev_dbg(&dev->dev, "Reconnecting slaves in device %s has been finished.\n", dev->name);
-                                clear_bit(W1_MASTER_NEED_RECONNECT, &dev->flags);
-                                mutex_unlock(&dev->mutex);
-                        }
+                        cb(dev, rn);
                 }
         }
-
-        return 0;
 }
 
 void w1_search_process(struct w1_master *dev, u8 search_type)
@@ -878,23 +957,29 @@ void w1_search_process(struct w1_master *dev, u8 search_type)
 int w1_process(void *data)
 {
         struct w1_master *dev = (struct w1_master *) data;
+        /* As long as w1_timeout is only set by a module parameter the sleep
+         * time can be calculated in jiffies once.
+         */
+        const unsigned long jtime = msecs_to_jiffies(w1_timeout * 1000);
+
+        while (!kthread_should_stop()) {
+                if (dev->search_count) {
+                        mutex_lock(&dev->mutex);
+                        w1_search_process(dev, W1_SEARCH);
+                        mutex_unlock(&dev->mutex);
+                }
 
-        while (!kthread_should_stop() && !test_bit(W1_MASTER_NEED_EXIT, &dev->flags)) {
                 try_to_freeze();
-                msleep_interruptible(w1_timeout * 1000);
+                __set_current_state(TASK_INTERRUPTIBLE);
 
-                if (kthread_should_stop() || test_bit(W1_MASTER_NEED_EXIT, &dev->flags))
+                if (kthread_should_stop())
                         break;
 
-                if (!dev->initialized)
-                        continue;
-
-                if (dev->search_count == 0)
-                        continue;
-
-                mutex_lock(&dev->mutex);
-                w1_search_process(dev, W1_SEARCH);
-                mutex_unlock(&dev->mutex);
+                /* Only sleep when the search is active. */
+                if (dev->search_count)
+                        schedule_timeout(jtime);
+                else
+                        schedule();
         }
 
         atomic_dec(&dev->refcnt);
@@ -932,18 +1017,13 @@ static int w1_init(void)
                 goto err_out_master_unregister;
         }
 
-        w1_control_thread = kthread_run(w1_control, NULL, "w1_control");
-        if (IS_ERR(w1_control_thread)) {
-                retval = PTR_ERR(w1_control_thread);
-                printk(KERN_ERR "Failed to create control thread. err=%d\n",
-                        retval);
-                goto err_out_slave_unregister;
-        }
-
         return 0;
 
+#if 0
+/* For undoing the slave register if there was a step after it. */
 err_out_slave_unregister:
         driver_unregister(&w1_slave_driver);
+#endif
 
 err_out_master_unregister:
         driver_unregister(&w1_master_driver);
@@ -959,13 +1039,12 @@ static void w1_fini(void)
 {
         struct w1_master *dev;
 
+        /* Set netlink removal messages and some cleanup */
         list_for_each_entry(dev, &w1_masters, w1_master_entry)
                 __w1_remove_master_device(dev);
 
         w1_fini_netlink();
 
-        kthread_stop(w1_control_thread);
-
         driver_unregister(&w1_slave_driver);
         driver_unregister(&w1_master_driver);
         bus_unregister(&w1_bus_type);
diff --git a/drivers/w1/w1.h b/drivers/w1/w1.h
index f1df5343f4ad..cdaa6fffbfc7 100644
--- a/drivers/w1/w1.h
+++ b/drivers/w1/w1.h
@@ -46,7 +46,6 @@ struct w1_reg_num
 #include "w1_family.h"
 
 #define W1_MAXNAMELEN           32
-#define W1_SLAVE_DATA_SIZE      128
 
 #define W1_SEARCH               0xF0
 #define W1_ALARM_SEARCH         0xEC
@@ -77,7 +76,7 @@ struct w1_slave
         struct completion       released;
 };
 
-typedef void (* w1_slave_found_callback)(void *, u64);
+typedef void (*w1_slave_found_callback)(struct w1_master *, u64);
 
 
 /**
@@ -142,12 +141,18 @@ struct w1_bus_master
          */
         u8              (*reset_bus)(void *);
 
-        /** Really nice hardware can handles the different types of ROM search */
-        void            (*search)(void *, u8, w1_slave_found_callback);
-};
+        /**
+         * Put out a strong pull-up pulse of the specified duration.
+         * @return -1=Error, 0=completed
+         */
+        u8              (*set_pullup)(void *, int);
 
-#define W1_MASTER_NEED_EXIT             0
-#define W1_MASTER_NEED_RECONNECT        1
+        /** Really nice hardware can handles the different types of ROM search
+         *  w1_master* is passed to the slave found callback.
+         */
+        void            (*search)(void *, struct w1_master *,
+                u8, w1_slave_found_callback);
+};
 
 struct w1_master
 {
@@ -167,7 +172,10 @@ struct w1_master
         void                    *priv;
         int                     priv_size;
 
-        long                    flags;
+        /** 5V strong pullup enabled flag, 1 enabled, zero disabled. */
+        int                     enable_pullup;
+        /** 5V strong pullup duration in milliseconds, zero disabled. */
+        int                     pullup_duration;
 
         struct task_struct      *thread;
         struct mutex            mutex;
@@ -181,12 +189,21 @@ struct w1_master
 };
 
 int w1_create_master_attributes(struct w1_master *);
+void w1_destroy_master_attributes(struct w1_master *master);
 void w1_search(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb);
 void w1_search_devices(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb);
 struct w1_slave *w1_search_slave(struct w1_reg_num *id);
 void w1_search_process(struct w1_master *dev, u8 search_type);
 struct w1_master *w1_search_master_id(u32 id);
 
+/* Disconnect and reconnect devices in the given family.  Used for finding
+ * unclaimed devices after a family has been registered or releasing devices
+ * after a family has been unregistered.  Set attach to 1 when a new family
+ * has just been registered, to 0 when it has been unregistered.
+ */
+void w1_reconnect_slaves(struct w1_family *f, int attach);
+void w1_slave_detach(struct w1_slave *sl);
+
 u8 w1_triplet(struct w1_master *dev, int bdir);
 void w1_write_8(struct w1_master *, u8);
 int w1_reset_bus(struct w1_master *);
@@ -194,6 +211,7 @@ u8 w1_calc_crc8(u8 *, int);
 void w1_write_block(struct w1_master *, const u8 *, int);
 u8 w1_read_block(struct w1_master *, u8 *, int);
 int w1_reset_select_slave(struct w1_slave *sl);
+void w1_next_pullup(struct w1_master *, int);
 
 static inline struct w1_slave* dev_to_w1_slave(struct device *dev)
 {
diff --git a/drivers/w1/w1_family.c b/drivers/w1/w1_family.c
index a3c95bd6890a..4a099041f28a 100644
--- a/drivers/w1/w1_family.c
+++ b/drivers/w1/w1_family.c
@@ -48,12 +48,12 @@ int w1_register_family(struct w1_family *newf)
 
         if (!ret) {
                 atomic_set(&newf->refcnt, 0);
-                newf->need_exit = 0;
                 list_add_tail(&newf->family_entry, &w1_families);
         }
         spin_unlock(&w1_flock);
 
-        w1_reconnect_slaves(newf);
+        /* check default devices against the new set of drivers */
+        w1_reconnect_slaves(newf, 1);
 
         return ret;
 }
@@ -72,11 +72,11 @@ void w1_unregister_family(struct w1_family *fent)
                         break;
                 }
         }
-
-        fent->need_exit = 1;
-
         spin_unlock(&w1_flock);
 
+        /* deatch devices using this family code */
+        w1_reconnect_slaves(fent, 0);
+
         while (atomic_read(&fent->refcnt)) {
                 printk(KERN_INFO "Waiting for family %u to become free: refcnt=%d.\n",
                                 fent->fid, atomic_read(&fent->refcnt));
@@ -109,8 +109,7 @@ struct w1_family * w1_family_registered(u8 fid)
 
 static void __w1_family_put(struct w1_family *f)
 {
-        if (atomic_dec_and_test(&f->refcnt))
-                f->need_exit = 1;
+        atomic_dec(&f->refcnt);
 }
 
 void w1_family_put(struct w1_family *f)
diff --git a/drivers/w1/w1_family.h b/drivers/w1/w1_family.h
index ef1e1dafa19a..3ca1b9298f21 100644
--- a/drivers/w1/w1_family.h
+++ b/drivers/w1/w1_family.h
@@ -33,6 +33,7 @@
 #define W1_THERM_DS1822         0x22
 #define W1_EEPROM_DS2433        0x23
 #define W1_THERM_DS18B20        0x28
+#define W1_EEPROM_DS2431        0x2D
 #define W1_FAMILY_DS2760        0x30
 
 #define MAXNAMELEN              32
@@ -53,7 +54,6 @@ struct w1_family
         struct w1_family_ops    *fops;
 
         atomic_t                refcnt;
-        u8                      need_exit;
 };
 
 extern spinlock_t w1_flock;
@@ -63,6 +63,5 @@ void __w1_family_get(struct w1_family *);
 struct w1_family * w1_family_registered(u8);
 void w1_unregister_family(struct w1_family *);
 int w1_register_family(struct w1_family *);
-void w1_reconnect_slaves(struct w1_family *f);
 
 #endif /* __W1_FAMILY_H */
diff --git a/drivers/w1/w1_int.c b/drivers/w1/w1_int.c
index 6840dfebe4d4..a3a54567bfba 100644
--- a/drivers/w1/w1_int.c
+++ b/drivers/w1/w1_int.c
@@ -29,7 +29,11 @@
 #include "w1_netlink.h"
 #include "w1_int.h"
 
-static u32 w1_ids = 1;
+static int w1_search_count = -1; /* Default is continual scan */
+module_param_named(search_count, w1_search_count, int, 0);
+
+static int w1_enable_pullup = 1;
+module_param_named(enable_pullup, w1_enable_pullup, int, 0);
 
 static struct w1_master * w1_alloc_dev(u32 id, int slave_count, int slave_ttl,
                                        struct device_driver *driver,
@@ -59,8 +63,12 @@ static struct w1_master * w1_alloc_dev(u32 id, int slave_count, int slave_ttl,
         dev->initialized        = 0;
         dev->id                 = id;
         dev->slave_ttl          = slave_ttl;
-        dev->search_count       = -1; /* continual scan */
+        dev->search_count       = w1_search_count;
+        dev->enable_pullup      = w1_enable_pullup;
 
+        /* 1 for w1_process to decrement
+         * 1 for __w1_remove_master_device to decrement
+         */
         atomic_set(&dev->refcnt, 2);
 
         INIT_LIST_HEAD(&dev->slist);
@@ -93,9 +101,10 @@ static void w1_free_dev(struct w1_master *dev)
 
 int w1_add_master_device(struct w1_bus_master *master)
 {
-        struct w1_master *dev;
+        struct w1_master *dev, *entry;
         int retval = 0;
         struct w1_netlink_msg msg;
+        int id, found;
 
         /* validate minimum functionality */
         if (!(master->touch_bit && master->reset_bus) &&
@@ -104,10 +113,50 @@ int w1_add_master_device(struct w1_bus_master *master)
                 printk(KERN_ERR "w1_add_master_device: invalid function set\n");
                 return(-EINVAL);
         }
+        /* While it would be electrically possible to make a device that
+         * generated a strong pullup in bit bang mode, only hardare that
+         * controls 1-wire time frames are even expected to support a strong
+         * pullup.  w1_io.c would need to support calling set_pullup before
+         * the last write_bit operation of a w1_write_8 which it currently
+         * doesn't.
+         */
+        if (!master->write_byte && !master->touch_bit && master->set_pullup) {
+                printk(KERN_ERR "w1_add_master_device: set_pullup requires "
+                        "write_byte or touch_bit, disabling\n");
+                master->set_pullup = NULL;
+        }
+
+        /* Lock until the device is added (or not) to w1_masters. */
+        mutex_lock(&w1_mlock);
+        /* Search for the first available id (starting at 1). */
+        id = 0;
+        do {
+                ++id;
+                found = 0;
+                list_for_each_entry(entry, &w1_masters, w1_master_entry) {
+                        if (entry->id == id) {
+                                found = 1;
+                                break;
+                        }
+                }
+        } while (found);
 
-        dev = w1_alloc_dev(w1_ids++, w1_max_slave_count, w1_max_slave_ttl, &w1_master_driver, &w1_master_device);
-        if (!dev)
+        dev = w1_alloc_dev(id, w1_max_slave_count, w1_max_slave_ttl,
+                &w1_master_driver, &w1_master_device);
+        if (!dev) {
+                mutex_unlock(&w1_mlock);
                 return -ENOMEM;
+        }
+
+        retval =  w1_create_master_attributes(dev);
+        if (retval) {
+                mutex_unlock(&w1_mlock);
+                goto err_out_free_dev;
+        }
+
+        memcpy(dev->bus_master, master, sizeof(struct w1_bus_master));
+
+        dev->initialized = 1;
 
         dev->thread = kthread_run(&w1_process, dev, "%s", dev->name);
         if (IS_ERR(dev->thread)) {
@@ -115,18 +164,10 @@ int w1_add_master_device(struct w1_bus_master *master)
                 dev_err(&dev->dev,
                          "Failed to create new kernel thread. err=%d\n",
                          retval);
-                goto err_out_free_dev;
+                mutex_unlock(&w1_mlock);
+                goto err_out_rm_attr;
         }
 
-        retval =  w1_create_master_attributes(dev);
-        if (retval)
-                goto err_out_kill_thread;
-
-        memcpy(dev->bus_master, master, sizeof(struct w1_bus_master));
-
-        dev->initialized = 1;
-
-        mutex_lock(&w1_mlock);
         list_add(&dev->w1_master_entry, &w1_masters);
         mutex_unlock(&w1_mlock);
 
@@ -137,8 +178,12 @@ int w1_add_master_device(struct w1_bus_master *master)
 
         return 0;
 
+#if 0 /* Thread cleanup code, not required currently. */
 err_out_kill_thread:
         kthread_stop(dev->thread);
+#endif
+err_out_rm_attr:
+        w1_destroy_master_attributes(dev);
 err_out_free_dev:
         w1_free_dev(dev);
 
@@ -148,10 +193,21 @@ err_out_free_dev:
 void __w1_remove_master_device(struct w1_master *dev)
 {
         struct w1_netlink_msg msg;
+        struct w1_slave *sl, *sln;
 
-        set_bit(W1_MASTER_NEED_EXIT, &dev->flags);
         kthread_stop(dev->thread);
 
+        mutex_lock(&w1_mlock);
+        list_del(&dev->w1_master_entry);
+        mutex_unlock(&w1_mlock);
+
+        mutex_lock(&dev->mutex);
+        list_for_each_entry_safe(sl, sln, &dev->slist, w1_slave_entry)
+                w1_slave_detach(sl);
+        w1_destroy_master_attributes(dev);
+        mutex_unlock(&dev->mutex);
+        atomic_dec(&dev->refcnt);
+
         while (atomic_read(&dev->refcnt)) {
                 dev_info(&dev->dev, "Waiting for %s to become free: refcnt=%d.\n",
                                 dev->name, atomic_read(&dev->refcnt));
diff --git a/drivers/w1/w1_io.c b/drivers/w1/w1_io.c
index 30b6fbf83bd4..f4f82f1f486e 100644
--- a/drivers/w1/w1_io.c
+++ b/drivers/w1/w1_io.c
@@ -93,6 +93,40 @@ static void w1_write_bit(struct w1_master *dev, int bit)
 }
 
 /**
+ * Pre-write operation, currently only supporting strong pullups.
+ * Program the hardware for a strong pullup, if one has been requested and
+ * the hardware supports it.
+ *
+ * @param dev     the master device
+ */
+static void w1_pre_write(struct w1_master *dev)
+{
+        if (dev->pullup_duration &&
+                dev->enable_pullup && dev->bus_master->set_pullup) {
+                dev->bus_master->set_pullup(dev->bus_master->data,
+                        dev->pullup_duration);
+        }
+}
+
+/**
+ * Post-write operation, currently only supporting strong pullups.
+ * If a strong pullup was requested, clear it if the hardware supports
+ * them, or execute the delay otherwise, in either case clear the request.
+ *
+ * @param dev     the master device
+ */
+static void w1_post_write(struct w1_master *dev)
+{
+        if (dev->pullup_duration) {
+                if (dev->enable_pullup && dev->bus_master->set_pullup)
+                        dev->bus_master->set_pullup(dev->bus_master->data, 0);
+                else
+                        msleep(dev->pullup_duration);
+                dev->pullup_duration = 0;
+        }
+}
+
+/**
  * Writes 8 bits.
  *
  * @param dev     the master device
@@ -102,11 +136,17 @@ void w1_write_8(struct w1_master *dev, u8 byte)
 {
         int i;
 
-        if (dev->bus_master->write_byte)
+        if (dev->bus_master->write_byte) {
+                w1_pre_write(dev);
                 dev->bus_master->write_byte(dev->bus_master->data, byte);
+        }
         else
-                for (i = 0; i < 8; ++i)
+                for (i = 0; i < 8; ++i) {
+                        if (i == 7)
+                                w1_pre_write(dev);
                         w1_touch_bit(dev, (byte >> i) & 0x1);
+                }
+        w1_post_write(dev);
 }
 EXPORT_SYMBOL_GPL(w1_write_8);
 
@@ -203,11 +243,14 @@ void w1_write_block(struct w1_master *dev, const u8 *buf, int len)
 {
         int i;
 
-        if (dev->bus_master->write_block)
+        if (dev->bus_master->write_block) {
+                w1_pre_write(dev);
                 dev->bus_master->write_block(dev->bus_master->data, buf, len);
+        }
         else
                 for (i = 0; i < len; ++i)
-                        w1_write_8(dev, buf[i]);
+                        w1_write_8(dev, buf[i]); /* calls w1_pre_write */
+        w1_post_write(dev);
 }
 EXPORT_SYMBOL_GPL(w1_write_block);
 
@@ -250,12 +293,24 @@ int w1_reset_bus(struct w1_master *dev)
                 result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1;
         else {
                 dev->bus_master->write_bit(dev->bus_master->data, 0);
+                /* minimum 480, max ? us
+                 * be nice and sleep, except 18b20 spec lists 960us maximum,
+                 * so until we can sleep with microsecond accuracy, spin.
+                 * Feel free to come up with some other way to give up the
+                 * cpu for such a short amount of time AND get it back in
+                 * the maximum amount of time.
+                 */
                 w1_delay(480);
                 dev->bus_master->write_bit(dev->bus_master->data, 1);
                 w1_delay(70);
 
                 result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1;
-                w1_delay(410);
+                /* minmum 70 (above) + 410 = 480 us
+                 * There aren't any timing requirements between a reset and
+                 * the following transactions.  Sleeping is safe here.
+                 */
+                /* w1_delay(410); min required time */
+                msleep(1);
         }
 
         return result;
@@ -277,7 +332,8 @@ void w1_search_devices(struct w1_master *dev, u8 search_type, w1_slave_found_cal
 {
         dev->attempts++;
         if (dev->bus_master->search)
-                dev->bus_master->search(dev->bus_master->data, search_type, cb);
+                dev->bus_master->search(dev->bus_master->data, dev,
+                        search_type, cb);
         else
                 w1_search(dev, search_type, cb);
 }
@@ -305,3 +361,20 @@ int w1_reset_select_slave(struct w1_slave *sl)
         return 0;
 }
 EXPORT_SYMBOL_GPL(w1_reset_select_slave);
+
+/**
+ * Put out a strong pull-up of the specified duration after the next write
+ * operation.  Not all hardware supports strong pullups.  Hardware that
+ * doesn't support strong pullups will sleep for the given time after the
+ * write operation without a strong pullup.  This is a one shot request for
+ * the next write, specifying zero will clear a previous request.
+ * The w1 master lock must be held.
+ *
+ * @param delay time in milliseconds
+ * @return      0=success, anything else=error
+ */
+void w1_next_pullup(struct w1_master *dev, int delay)
+{
+        dev->pullup_duration = delay;
+}
+EXPORT_SYMBOL_GPL(w1_next_pullup);