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-rw-r--r--drivers/net/Kconfig15
-rw-r--r--drivers/net/Makefile1
-rw-r--r--drivers/net/Space.c4
-rw-r--r--drivers/net/sk_mca.c1216
-rw-r--r--drivers/net/sk_mca.h170
5 files changed, 0 insertions, 1406 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 10ac82f3612a..b199456a7364 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1155,21 +1155,6 @@ config SEEQ8005
1155 <file:Documentation/networking/net-modules.txt>. The module 1155 <file:Documentation/networking/net-modules.txt>. The module
1156 will be called seeq8005. 1156 will be called seeq8005.
1157 1157
1158config SKMC
1159 tristate "SKnet MCA support"
1160 depends on NET_ETHERNET && MCA && BROKEN
1161 ---help---
1162 These are Micro Channel Ethernet adapters. You need to say Y to "MCA
1163 support" in order to use this driver. Supported cards are the SKnet
1164 Junior MC2 and the SKnet MC2(+). The driver automatically
1165 distinguishes between the two cards. Note that using multiple boards
1166 of different type hasn't been tested with this driver. Say Y if you
1167 have one of these Ethernet adapters.
1168
1169 To compile this driver as a module, choose M here and read
1170 <file:Documentation/networking/net-modules.txt>. The module
1171 will be called sk_mca.
1172
1173config NE2_MCA 1158config NE2_MCA
1174 tristate "NE/2 (ne2000 MCA version) support" 1159 tristate "NE/2 (ne2000 MCA version) support"
1175 depends on NET_ETHERNET && MCA_LEGACY 1160 depends on NET_ETHERNET && MCA_LEGACY
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 58714d68c867..6c61f3e7396b 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -137,7 +137,6 @@ obj-$(CONFIG_AT1700) += at1700.o
137obj-$(CONFIG_EL1) += 3c501.o 137obj-$(CONFIG_EL1) += 3c501.o
138obj-$(CONFIG_EL16) += 3c507.o 138obj-$(CONFIG_EL16) += 3c507.o
139obj-$(CONFIG_ELMC) += 3c523.o 139obj-$(CONFIG_ELMC) += 3c523.o
140obj-$(CONFIG_SKMC) += sk_mca.o
141obj-$(CONFIG_IBMLANA) += ibmlana.o 140obj-$(CONFIG_IBMLANA) += ibmlana.o
142obj-$(CONFIG_ELMC_II) += 3c527.o 141obj-$(CONFIG_ELMC_II) += 3c527.o
143obj-$(CONFIG_EL3) += 3c509.o 142obj-$(CONFIG_EL3) += 3c509.o
diff --git a/drivers/net/Space.c b/drivers/net/Space.c
index 9305eb9b1b98..dd8ed456c8b2 100644
--- a/drivers/net/Space.c
+++ b/drivers/net/Space.c
@@ -59,7 +59,6 @@ extern struct net_device *wavelan_probe(int unit);
59extern struct net_device *arlan_probe(int unit); 59extern struct net_device *arlan_probe(int unit);
60extern struct net_device *el16_probe(int unit); 60extern struct net_device *el16_probe(int unit);
61extern struct net_device *elmc_probe(int unit); 61extern struct net_device *elmc_probe(int unit);
62extern struct net_device *skmca_probe(int unit);
63extern struct net_device *elplus_probe(int unit); 62extern struct net_device *elplus_probe(int unit);
64extern struct net_device *ac3200_probe(int unit); 63extern struct net_device *ac3200_probe(int unit);
65extern struct net_device *es_probe(int unit); 64extern struct net_device *es_probe(int unit);
@@ -153,9 +152,6 @@ static struct devprobe2 mca_probes[] __initdata = {
153#ifdef CONFIG_ELMC_II /* 3c527 */ 152#ifdef CONFIG_ELMC_II /* 3c527 */
154 {mc32_probe, 0}, 153 {mc32_probe, 0},
155#endif 154#endif
156#ifdef CONFIG_SKMC /* SKnet Microchannel */
157 {skmca_probe, 0},
158#endif
159 {NULL, 0}, 155 {NULL, 0},
160}; 156};
161 157
diff --git a/drivers/net/sk_mca.c b/drivers/net/sk_mca.c
deleted file mode 100644
index 96e06c51b75d..000000000000
--- a/drivers/net/sk_mca.c
+++ /dev/null
@@ -1,1216 +0,0 @@
1/*
2net-3-driver for the SKNET MCA-based cards
3
4This is an extension to the Linux operating system, and is covered by the
5same GNU General Public License that covers that work.
6
7Copyright 1999 by Alfred Arnold (alfred@ccac.rwth-aachen.de,
8 alfred.arnold@lancom.de)
9
10This driver is based both on the 3C523 driver and the SK_G16 driver.
11
12paper sources:
13 'PC Hardware: Aufbau, Funktionsweise, Programmierung' by
14 Hans-Peter Messmer for the basic Microchannel stuff
15
16 'Linux Geraetetreiber' by Allesandro Rubini, Kalle Dalheimer
17 for help on Ethernet driver programming
18
19 'Ethernet/IEEE 802.3 Family 1992 World Network Data Book/Handbook' by AMD
20 for documentation on the AM7990 LANCE
21
22 'SKNET Personal Technisches Manual', Version 1.2 by Schneider&Koch
23 for documentation on the Junior board
24
25 'SK-NET MC2+ Technical Manual", Version 1.1 by Schneider&Koch for
26 documentation on the MC2 bord
27
28 A big thank you to the S&K support for providing me so quickly with
29 documentation!
30
31 Also see http://www.syskonnect.com/
32
33 Missing things:
34
35 -> set debug level via ioctl instead of compile-time switches
36 -> I didn't follow the development of the 2.1.x kernels, so my
37 assumptions about which things changed with which kernel version
38 are probably nonsense
39
40History:
41 May 16th, 1999
42 startup
43 May 22st, 1999
44 added private structure, methods
45 begun building data structures in RAM
46 May 23nd, 1999
47 can receive frames, send frames
48 May 24th, 1999
49 modularized initialization of LANCE
50 loadable as module
51 still Tx problem :-(
52 May 26th, 1999
53 MC2 works
54 support for multiple devices
55 display media type for MC2+
56 May 28th, 1999
57 fixed problem in GetLANCE leaving interrupts turned off
58 increase TX queue to 4 packets to improve send performance
59 May 29th, 1999
60 a few corrections in statistics, caught rcvr overruns
61 reinitialization of LANCE/board in critical situations
62 MCA info implemented
63 implemented LANCE multicast filter
64 Jun 6th, 1999
65 additions for Linux 2.2
66 Dec 25th, 1999
67 unfortunately there seem to be newer MC2+ boards that react
68 on IRQ 3/5/9/10 instead of 3/5/10/11, so we have to autoprobe
69 in questionable cases...
70 Dec 28th, 1999
71 integrated patches from David Weinehall & Bill Wendling for 2.3
72 kernels (isa_...functions). Things are defined in a way that
73 it still works with 2.0.x 8-)
74 Dec 30th, 1999
75 added handling of the remaining interrupt conditions. That
76 should cure the spurious hangs.
77 Jan 30th, 2000
78 newer kernels automatically probe more than one board, so the
79 'startslot' as a variable is also needed here
80 June 1st, 2000
81 added changes for recent 2.3 kernels
82
83 *************************************************************************/
84
85#include <linux/kernel.h>
86#include <linux/string.h>
87#include <linux/errno.h>
88#include <linux/ioport.h>
89#include <linux/slab.h>
90#include <linux/interrupt.h>
91#include <linux/delay.h>
92#include <linux/time.h>
93#include <linux/mca-legacy.h>
94#include <linux/init.h>
95#include <linux/module.h>
96#include <linux/netdevice.h>
97#include <linux/etherdevice.h>
98#include <linux/skbuff.h>
99#include <linux/bitops.h>
100
101#include <asm/processor.h>
102#include <asm/io.h>
103
104#define _SK_MCA_DRIVER_
105#include "sk_mca.h"
106
107/* ------------------------------------------------------------------------
108 * global static data - not more since we can handle multiple boards and
109 * have to pack all state info into the device struct!
110 * ------------------------------------------------------------------------ */
111
112static char *MediaNames[Media_Count] =
113 { "10Base2", "10BaseT", "10Base5", "Unknown" };
114
115static unsigned char poly[] =
116 { 1, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0,
117 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0
118};
119
120/* ------------------------------------------------------------------------
121 * private subfunctions
122 * ------------------------------------------------------------------------ */
123
124/* dump parts of shared memory - only needed during debugging */
125
126#ifdef DEBUG
127static void dumpmem(struct net_device *dev, u32 start, u32 len)
128{
129 skmca_priv *priv = netdev_priv(dev);
130 int z;
131
132 for (z = 0; z < len; z++) {
133 if ((z & 15) == 0)
134 printk("%04x:", z);
135 printk(" %02x", readb(priv->base + start + z));
136 if ((z & 15) == 15)
137 printk("\n");
138 }
139}
140
141/* print exact time - ditto */
142
143static void PrTime(void)
144{
145 struct timeval tv;
146
147 do_gettimeofday(&tv);
148 printk("%9d:%06d: ", tv.tv_sec, tv.tv_usec);
149}
150#endif
151
152/* deduce resources out of POS registers */
153
154static void __init getaddrs(int slot, int junior, int *base, int *irq,
155 skmca_medium * medium)
156{
157 u_char pos0, pos1, pos2;
158
159 if (junior) {
160 pos0 = mca_read_stored_pos(slot, 2);
161 *base = ((pos0 & 0x0e) << 13) + 0xc0000;
162 *irq = ((pos0 & 0x10) >> 4) + 10;
163 *medium = Media_Unknown;
164 } else {
165 /* reset POS 104 Bits 0+1 so the shared memory region goes to the
166 configured area between 640K and 1M. Afterwards, enable the MC2.
167 I really don't know what rode SK to do this... */
168
169 mca_write_pos(slot, 4,
170 mca_read_stored_pos(slot, 4) & 0xfc);
171 mca_write_pos(slot, 2,
172 mca_read_stored_pos(slot, 2) | 0x01);
173
174 pos1 = mca_read_stored_pos(slot, 3);
175 pos2 = mca_read_stored_pos(slot, 4);
176 *base = ((pos1 & 0x07) << 14) + 0xc0000;
177 switch (pos2 & 0x0c) {
178 case 0:
179 *irq = 3;
180 break;
181 case 4:
182 *irq = 5;
183 break;
184 case 8:
185 *irq = -10;
186 break;
187 case 12:
188 *irq = -11;
189 break;
190 }
191 *medium = (pos2 >> 6) & 3;
192 }
193}
194
195/* check for both cards:
196 When the MC2 is turned off, it was configured for more than 15MB RAM,
197 is disabled and won't get detected using the standard probe. We
198 therefore have to scan the slots manually :-( */
199
200static int __init dofind(int *junior, int firstslot)
201{
202 int slot;
203 unsigned int id;
204
205 for (slot = firstslot; slot < MCA_MAX_SLOT_NR; slot++) {
206 id = mca_read_stored_pos(slot, 0)
207 + (((unsigned int) mca_read_stored_pos(slot, 1)) << 8);
208
209 *junior = 0;
210 if (id == SKNET_MCA_ID)
211 return slot;
212 *junior = 1;
213 if (id == SKNET_JUNIOR_MCA_ID)
214 return slot;
215 }
216 return MCA_NOTFOUND;
217}
218
219/* reset the whole board */
220
221static void ResetBoard(struct net_device *dev)
222{
223 skmca_priv *priv = netdev_priv(dev);
224
225 writeb(CTRL_RESET_ON, priv->ctrladdr);
226 udelay(10);
227 writeb(CTRL_RESET_OFF, priv->ctrladdr);
228}
229
230/* wait for LANCE interface to become not busy */
231
232static int WaitLANCE(struct net_device *dev)
233{
234 skmca_priv *priv = netdev_priv(dev);
235 int t = 0;
236
237 while ((readb(priv->ctrladdr) & STAT_IO_BUSY) ==
238 STAT_IO_BUSY) {
239 udelay(1);
240 if (++t > 1000) {
241 printk("%s: LANCE access timeout", dev->name);
242 return 0;
243 }
244 }
245
246 return 1;
247}
248
249/* set LANCE register - must be atomic */
250
251static void SetLANCE(struct net_device *dev, u16 addr, u16 value)
252{
253 skmca_priv *priv = netdev_priv(dev);
254 unsigned long flags;
255
256 /* disable interrupts */
257
258 spin_lock_irqsave(&priv->lock, flags);
259
260 /* wait until no transfer is pending */
261
262 WaitLANCE(dev);
263
264 /* transfer register address to RAP */
265
266 writeb(CTRL_RESET_OFF | CTRL_RW_WRITE | CTRL_ADR_RAP, priv->ctrladdr);
267 writew(addr, priv->ioregaddr);
268 writeb(IOCMD_GO, priv->cmdaddr);
269 udelay(1);
270 WaitLANCE(dev);
271
272 /* transfer data to register */
273
274 writeb(CTRL_RESET_OFF | CTRL_RW_WRITE | CTRL_ADR_DATA, priv->ctrladdr);
275 writew(value, priv->ioregaddr);
276 writeb(IOCMD_GO, priv->cmdaddr);
277 udelay(1);
278 WaitLANCE(dev);
279
280 /* reenable interrupts */
281
282 spin_unlock_irqrestore(&priv->lock, flags);
283}
284
285/* get LANCE register */
286
287static u16 GetLANCE(struct net_device *dev, u16 addr)
288{
289 skmca_priv *priv = netdev_priv(dev);
290 unsigned long flags;
291 unsigned int res;
292
293 /* disable interrupts */
294
295 spin_lock_irqsave(&priv->lock, flags);
296
297 /* wait until no transfer is pending */
298
299 WaitLANCE(dev);
300
301 /* transfer register address to RAP */
302
303 writeb(CTRL_RESET_OFF | CTRL_RW_WRITE | CTRL_ADR_RAP, priv->ctrladdr);
304 writew(addr, priv->ioregaddr);
305 writeb(IOCMD_GO, priv->cmdaddr);
306 udelay(1);
307 WaitLANCE(dev);
308
309 /* transfer data from register */
310
311 writeb(CTRL_RESET_OFF | CTRL_RW_READ | CTRL_ADR_DATA, priv->ctrladdr);
312 writeb(IOCMD_GO, priv->cmdaddr);
313 udelay(1);
314 WaitLANCE(dev);
315 res = readw(priv->ioregaddr);
316
317 /* reenable interrupts */
318
319 spin_unlock_irqrestore(&priv->lock, flags);
320
321 return res;
322}
323
324/* build up descriptors in shared RAM */
325
326static void InitDscrs(struct net_device *dev)
327{
328 skmca_priv *priv = netdev_priv(dev);
329 u32 bufaddr;
330
331 /* Set up Tx descriptors. The board has only 16K RAM so bits 16..23
332 are always 0. */
333
334 bufaddr = RAM_DATABASE;
335 {
336 LANCE_TxDescr descr;
337 int z;
338
339 for (z = 0; z < TXCOUNT; z++) {
340 descr.LowAddr = bufaddr;
341 descr.Flags = 0;
342 descr.Len = 0xf000;
343 descr.Status = 0;
344 memcpy_toio(priv->base + RAM_TXBASE +
345 (z * sizeof(LANCE_TxDescr)), &descr,
346 sizeof(LANCE_TxDescr));
347 memset_io(priv->base + bufaddr, 0, RAM_BUFSIZE);
348 bufaddr += RAM_BUFSIZE;
349 }
350 }
351
352 /* do the same for the Rx descriptors */
353
354 {
355 LANCE_RxDescr descr;
356 int z;
357
358 for (z = 0; z < RXCOUNT; z++) {
359 descr.LowAddr = bufaddr;
360 descr.Flags = RXDSCR_FLAGS_OWN;
361 descr.MaxLen = -RAM_BUFSIZE;
362 descr.Len = 0;
363 memcpy_toio(priv->base + RAM_RXBASE +
364 (z * sizeof(LANCE_RxDescr)), &descr,
365 sizeof(LANCE_RxDescr));
366 memset_io(priv->base + bufaddr, 0, RAM_BUFSIZE);
367 bufaddr += RAM_BUFSIZE;
368 }
369 }
370}
371
372/* calculate the hash bit position for a given multicast address
373 taken more or less directly from the AMD datasheet... */
374
375static void UpdateCRC(unsigned char *CRC, int bit)
376{
377 int j;
378
379 /* shift CRC one bit */
380
381 memmove(CRC + 1, CRC, 32 * sizeof(unsigned char));
382 CRC[0] = 0;
383
384 /* if bit XOR controlbit = 1, set CRC = CRC XOR polynomial */
385
386 if (bit ^ CRC[32])
387 for (j = 0; j < 32; j++)
388 CRC[j] ^= poly[j];
389}
390
391static unsigned int GetHash(char *address)
392{
393 unsigned char CRC[33];
394 int i, byte, hashcode;
395
396 /* a multicast address has bit 0 in the first byte set */
397
398 if ((address[0] & 1) == 0)
399 return -1;
400
401 /* initialize CRC */
402
403 memset(CRC, 1, sizeof(CRC));
404
405 /* loop through address bits */
406
407 for (byte = 0; byte < 6; byte++)
408 for (i = 0; i < 8; i++)
409 UpdateCRC(CRC, (address[byte] >> i) & 1);
410
411 /* hashcode is the 6 least significant bits of the CRC */
412
413 hashcode = 0;
414 for (i = 0; i < 6; i++)
415 hashcode = (hashcode << 1) + CRC[i];
416 return hashcode;
417}
418
419/* feed ready-built initialization block into LANCE */
420
421static void InitLANCE(struct net_device *dev)
422{
423 skmca_priv *priv = netdev_priv(dev);
424
425 /* build up descriptors. */
426
427 InitDscrs(dev);
428
429 /* next RX descriptor to be read is the first one. Since the LANCE
430 will start from the beginning after initialization, we have to
431 reset out pointers too. */
432
433 priv->nextrx = 0;
434
435 /* no TX descriptors active */
436
437 priv->nexttxput = priv->nexttxdone = priv->txbusy = 0;
438
439 /* set up the LANCE bus control register - constant for SKnet boards */
440
441 SetLANCE(dev, LANCE_CSR3,
442 CSR3_BSWAP_OFF | CSR3_ALE_LOW | CSR3_BCON_HOLD);
443
444 /* write address of initialization block into LANCE */
445
446 SetLANCE(dev, LANCE_CSR1, RAM_INITBASE & 0xffff);
447 SetLANCE(dev, LANCE_CSR2, (RAM_INITBASE >> 16) & 0xff);
448
449 /* we don't get ready until the LANCE has read the init block */
450
451 netif_stop_queue(dev);
452
453 /* let LANCE read the initialization block. LANCE is ready
454 when we receive the corresponding interrupt. */
455
456 SetLANCE(dev, LANCE_CSR0, CSR0_INEA | CSR0_INIT);
457}
458
459/* stop the LANCE so we can reinitialize it */
460
461static void StopLANCE(struct net_device *dev)
462{
463 /* can't take frames any more */
464
465 netif_stop_queue(dev);
466
467 /* disable interrupts, stop it */
468
469 SetLANCE(dev, LANCE_CSR0, CSR0_STOP);
470}
471
472/* initialize card and LANCE for proper operation */
473
474static void InitBoard(struct net_device *dev)
475{
476 skmca_priv *priv = netdev_priv(dev);
477 LANCE_InitBlock block;
478
479 /* Lay out the shared RAM - first we create the init block for the LANCE.
480 We do not overwrite it later because we need it again when we switch
481 promiscous mode on/off. */
482
483 block.Mode = 0;
484 if (dev->flags & IFF_PROMISC)
485 block.Mode |= LANCE_INIT_PROM;
486 memcpy(block.PAdr, dev->dev_addr, 6);
487 memset(block.LAdrF, 0, sizeof(block.LAdrF));
488 block.RdrP = (RAM_RXBASE & 0xffffff) | (LRXCOUNT << 29);
489 block.TdrP = (RAM_TXBASE & 0xffffff) | (LTXCOUNT << 29);
490
491 memcpy_toio(priv->base + RAM_INITBASE, &block, sizeof(block));
492
493 /* initialize LANCE. Implicitly sets up other structures in RAM. */
494
495 InitLANCE(dev);
496}
497
498/* deinitialize card and LANCE */
499
500static void DeinitBoard(struct net_device *dev)
501{
502 /* stop LANCE */
503
504 StopLANCE(dev);
505
506 /* reset board */
507
508 ResetBoard(dev);
509}
510
511/* probe for device's irq */
512
513static int __init ProbeIRQ(struct net_device *dev)
514{
515 unsigned long imaskval, njiffies, irq;
516 u16 csr0val;
517
518 /* enable all interrupts */
519
520 imaskval = probe_irq_on();
521
522 /* initialize the board. Wait for interrupt 'Initialization done'. */
523
524 ResetBoard(dev);
525 InitBoard(dev);
526
527 njiffies = jiffies + HZ;
528 do {
529 csr0val = GetLANCE(dev, LANCE_CSR0);
530 }
531 while (((csr0val & CSR0_IDON) == 0) && (jiffies != njiffies));
532
533 /* turn of interrupts again */
534
535 irq = probe_irq_off(imaskval);
536
537 /* if we found something, ack the interrupt */
538
539 if (irq)
540 SetLANCE(dev, LANCE_CSR0, csr0val | CSR0_IDON);
541
542 /* back to idle state */
543
544 DeinitBoard(dev);
545
546 return irq;
547}
548
549/* ------------------------------------------------------------------------
550 * interrupt handler(s)
551 * ------------------------------------------------------------------------ */
552
553/* LANCE has read initialization block -> start it */
554
555static u16 irqstart_handler(struct net_device *dev, u16 oldcsr0)
556{
557 /* now we're ready to transmit */
558
559 netif_wake_queue(dev);
560
561 /* reset IDON bit, start LANCE */
562
563 SetLANCE(dev, LANCE_CSR0, oldcsr0 | CSR0_IDON | CSR0_STRT);
564 return GetLANCE(dev, LANCE_CSR0);
565}
566
567/* did we lose blocks due to a FIFO overrun ? */
568
569static u16 irqmiss_handler(struct net_device *dev, u16 oldcsr0)
570{
571 skmca_priv *priv = netdev_priv(dev);
572
573 /* update statistics */
574
575 priv->stat.rx_fifo_errors++;
576
577 /* reset MISS bit */
578
579 SetLANCE(dev, LANCE_CSR0, oldcsr0 | CSR0_MISS);
580 return GetLANCE(dev, LANCE_CSR0);
581}
582
583/* receive interrupt */
584
585static u16 irqrx_handler(struct net_device *dev, u16 oldcsr0)
586{
587 skmca_priv *priv = netdev_priv(dev);
588 LANCE_RxDescr descr;
589 unsigned int descraddr;
590
591 /* run through queue until we reach a descriptor we do not own */
592
593 descraddr = RAM_RXBASE + (priv->nextrx * sizeof(LANCE_RxDescr));
594 while (1) {
595 /* read descriptor */
596 memcpy_fromio(&descr, priv->base + descraddr,
597 sizeof(LANCE_RxDescr));
598
599 /* if we reach a descriptor we do not own, we're done */
600 if ((descr.Flags & RXDSCR_FLAGS_OWN) != 0)
601 break;
602
603#ifdef DEBUG
604 PrTime();
605 printk("Receive packet on descr %d len %d\n", priv->nextrx,
606 descr.Len);
607#endif
608
609 /* erroneous packet ? */
610 if ((descr.Flags & RXDSCR_FLAGS_ERR) != 0) {
611 priv->stat.rx_errors++;
612 if ((descr.Flags & RXDSCR_FLAGS_CRC) != 0)
613 priv->stat.rx_crc_errors++;
614 else if ((descr.Flags & RXDSCR_FLAGS_CRC) != 0)
615 priv->stat.rx_frame_errors++;
616 else if ((descr.Flags & RXDSCR_FLAGS_OFLO) != 0)
617 priv->stat.rx_fifo_errors++;
618 }
619
620 /* good packet ? */
621 else {
622 struct sk_buff *skb;
623
624 skb = dev_alloc_skb(descr.Len + 2);
625 if (skb == NULL)
626 priv->stat.rx_dropped++;
627 else {
628 memcpy_fromio(skb_put(skb, descr.Len),
629 priv->base +
630 descr.LowAddr, descr.Len);
631 skb->dev = dev;
632 skb->protocol = eth_type_trans(skb, dev);
633 skb->ip_summed = CHECKSUM_NONE;
634 priv->stat.rx_packets++;
635 priv->stat.rx_bytes += descr.Len;
636 netif_rx(skb);
637 dev->last_rx = jiffies;
638 }
639 }
640
641 /* give descriptor back to LANCE */
642 descr.Len = 0;
643 descr.Flags |= RXDSCR_FLAGS_OWN;
644
645 /* update descriptor in shared RAM */
646 memcpy_toio(priv->base + descraddr, &descr,
647 sizeof(LANCE_RxDescr));
648
649 /* go to next descriptor */
650 priv->nextrx++;
651 descraddr += sizeof(LANCE_RxDescr);
652 if (priv->nextrx >= RXCOUNT) {
653 priv->nextrx = 0;
654 descraddr = RAM_RXBASE;
655 }
656 }
657
658 /* reset RINT bit */
659
660 SetLANCE(dev, LANCE_CSR0, oldcsr0 | CSR0_RINT);
661 return GetLANCE(dev, LANCE_CSR0);
662}
663
664/* transmit interrupt */
665
666static u16 irqtx_handler(struct net_device *dev, u16 oldcsr0)
667{
668 skmca_priv *priv = netdev_priv(dev);
669 LANCE_TxDescr descr;
670 unsigned int descraddr;
671
672 /* check descriptors at most until no busy one is left */
673
674 descraddr =
675 RAM_TXBASE + (priv->nexttxdone * sizeof(LANCE_TxDescr));
676 while (priv->txbusy > 0) {
677 /* read descriptor */
678 memcpy_fromio(&descr, priv->base + descraddr,
679 sizeof(LANCE_TxDescr));
680
681 /* if the LANCE still owns this one, we've worked out all sent packets */
682 if ((descr.Flags & TXDSCR_FLAGS_OWN) != 0)
683 break;
684
685#ifdef DEBUG
686 PrTime();
687 printk("Send packet done on descr %d\n", priv->nexttxdone);
688#endif
689
690 /* update statistics */
691 if ((descr.Flags & TXDSCR_FLAGS_ERR) == 0) {
692 priv->stat.tx_packets++;
693 priv->stat.tx_bytes++;
694 } else {
695 priv->stat.tx_errors++;
696 if ((descr.Status & TXDSCR_STATUS_UFLO) != 0) {
697 priv->stat.tx_fifo_errors++;
698 InitLANCE(dev);
699 }
700 else
701 if ((descr.Status & TXDSCR_STATUS_LCOL) !=
702 0) priv->stat.tx_window_errors++;
703 else if ((descr.Status & TXDSCR_STATUS_LCAR) != 0)
704 priv->stat.tx_carrier_errors++;
705 else if ((descr.Status & TXDSCR_STATUS_RTRY) != 0)
706 priv->stat.tx_aborted_errors++;
707 }
708
709 /* go to next descriptor */
710 priv->nexttxdone++;
711 descraddr += sizeof(LANCE_TxDescr);
712 if (priv->nexttxdone >= TXCOUNT) {
713 priv->nexttxdone = 0;
714 descraddr = RAM_TXBASE;
715 }
716 priv->txbusy--;
717 }
718
719 /* reset TX interrupt bit */
720
721 SetLANCE(dev, LANCE_CSR0, oldcsr0 | CSR0_TINT);
722 oldcsr0 = GetLANCE(dev, LANCE_CSR0);
723
724 /* at least one descriptor is freed. Therefore we can accept
725 a new one */
726 /* inform upper layers we're in business again */
727
728 netif_wake_queue(dev);
729
730 return oldcsr0;
731}
732
733/* general interrupt entry */
734
735static irqreturn_t irq_handler(int irq, void *device)
736{
737 struct net_device *dev = (struct net_device *) device;
738 u16 csr0val;
739
740 /* read CSR0 to get interrupt cause */
741
742 csr0val = GetLANCE(dev, LANCE_CSR0);
743
744 /* in case we're not meant... */
745
746 if ((csr0val & CSR0_INTR) == 0)
747 return IRQ_NONE;
748
749#if 0
750 set_bit(LINK_STATE_RXSEM, &dev->state);
751#endif
752
753 /* loop through the interrupt bits until everything is clear */
754
755 do {
756 if ((csr0val & CSR0_IDON) != 0)
757 csr0val = irqstart_handler(dev, csr0val);
758 if ((csr0val & CSR0_RINT) != 0)
759 csr0val = irqrx_handler(dev, csr0val);
760 if ((csr0val & CSR0_MISS) != 0)
761 csr0val = irqmiss_handler(dev, csr0val);
762 if ((csr0val & CSR0_TINT) != 0)
763 csr0val = irqtx_handler(dev, csr0val);
764 if ((csr0val & CSR0_MERR) != 0) {
765 SetLANCE(dev, LANCE_CSR0, csr0val | CSR0_MERR);
766 csr0val = GetLANCE(dev, LANCE_CSR0);
767 }
768 if ((csr0val & CSR0_BABL) != 0) {
769 SetLANCE(dev, LANCE_CSR0, csr0val | CSR0_BABL);
770 csr0val = GetLANCE(dev, LANCE_CSR0);
771 }
772 }
773 while ((csr0val & CSR0_INTR) != 0);
774
775#if 0
776 clear_bit(LINK_STATE_RXSEM, &dev->state);
777#endif
778 return IRQ_HANDLED;
779}
780
781/* ------------------------------------------------------------------------
782 * driver methods
783 * ------------------------------------------------------------------------ */
784
785/* MCA info */
786
787static int skmca_getinfo(char *buf, int slot, void *d)
788{
789 int len = 0, i;
790 struct net_device *dev = (struct net_device *) d;
791 skmca_priv *priv;
792
793 /* can't say anything about an uninitialized device... */
794
795 if (dev == NULL)
796 return len;
797 priv = netdev_priv(dev);
798
799 /* print info */
800
801 len += sprintf(buf + len, "IRQ: %d\n", priv->realirq);
802 len += sprintf(buf + len, "Memory: %#lx-%#lx\n", dev->mem_start,
803 dev->mem_end - 1);
804 len +=
805 sprintf(buf + len, "Transceiver: %s\n",
806 MediaNames[priv->medium]);
807 len += sprintf(buf + len, "Device: %s\n", dev->name);
808 len += sprintf(buf + len, "MAC address:");
809 for (i = 0; i < 6; i++)
810 len += sprintf(buf + len, " %02x", dev->dev_addr[i]);
811 buf[len++] = '\n';
812 buf[len] = 0;
813
814 return len;
815}
816
817/* open driver. Means also initialization and start of LANCE */
818
819static int skmca_open(struct net_device *dev)
820{
821 int result;
822 skmca_priv *priv = netdev_priv(dev);
823
824 /* register resources - only necessary for IRQ */
825 result =
826 request_irq(priv->realirq, irq_handler,
827 IRQF_SHARED | IRQF_SAMPLE_RANDOM, "sk_mca", dev);
828 if (result != 0) {
829 printk("%s: failed to register irq %d\n", dev->name,
830 dev->irq);
831 return result;
832 }
833 dev->irq = priv->realirq;
834
835 /* set up the card and LANCE */
836
837 InitBoard(dev);
838
839 /* set up flags */
840
841 netif_start_queue(dev);
842
843 return 0;
844}
845
846/* close driver. Shut down board and free allocated resources */
847
848static int skmca_close(struct net_device *dev)
849{
850 /* turn off board */
851 DeinitBoard(dev);
852
853 /* release resources */
854 if (dev->irq != 0)
855 free_irq(dev->irq, dev);
856 dev->irq = 0;
857
858 return 0;
859}
860
861/* transmit a block. */
862
863static int skmca_tx(struct sk_buff *skb, struct net_device *dev)
864{
865 skmca_priv *priv = netdev_priv(dev);
866 LANCE_TxDescr descr;
867 unsigned int address;
868 int tmplen, retval = 0;
869 unsigned long flags;
870
871 /* if we get called with a NULL descriptor, the Ethernet layer thinks
872 our card is stuck an we should reset it. We'll do this completely: */
873
874 if (skb == NULL) {
875 DeinitBoard(dev);
876 InitBoard(dev);
877 return 0; /* don't try to free the block here ;-) */
878 }
879
880 /* is there space in the Tx queue ? If no, the upper layer gave us a
881 packet in spite of us not being ready and is really in trouble.
882 We'll do the dropping for him: */
883 if (priv->txbusy >= TXCOUNT) {
884 priv->stat.tx_dropped++;
885 retval = -EIO;
886 goto tx_done;
887 }
888
889 /* get TX descriptor */
890 address = RAM_TXBASE + (priv->nexttxput * sizeof(LANCE_TxDescr));
891 memcpy_fromio(&descr, priv->base + address, sizeof(LANCE_TxDescr));
892
893 /* enter packet length as 2s complement - assure minimum length */
894 tmplen = skb->len;
895 if (tmplen < 60)
896 tmplen = 60;
897 descr.Len = 65536 - tmplen;
898
899 /* copy filler into RAM - in case we're filling up...
900 we're filling a bit more than necessary, but that doesn't harm
901 since the buffer is far larger... */
902 if (tmplen > skb->len) {
903 char *fill = "NetBSD is a nice OS too! ";
904 unsigned int destoffs = 0, l = strlen(fill);
905
906 while (destoffs < tmplen) {
907 memcpy_toio(priv->base + descr.LowAddr +
908 destoffs, fill, l);
909 destoffs += l;
910 }
911 }
912
913 /* do the real data copying */
914 memcpy_toio(priv->base + descr.LowAddr, skb->data, skb->len);
915
916 /* hand descriptor over to LANCE - this is the first and last chunk */
917 descr.Flags =
918 TXDSCR_FLAGS_OWN | TXDSCR_FLAGS_STP | TXDSCR_FLAGS_ENP;
919
920#ifdef DEBUG
921 PrTime();
922 printk("Send packet on descr %d len %d\n", priv->nexttxput,
923 skb->len);
924#endif
925
926 /* one more descriptor busy */
927
928 spin_lock_irqsave(&priv->lock, flags);
929
930 priv->nexttxput++;
931 if (priv->nexttxput >= TXCOUNT)
932 priv->nexttxput = 0;
933 priv->txbusy++;
934
935 /* are we saturated ? */
936
937 if (priv->txbusy >= TXCOUNT)
938 netif_stop_queue(dev);
939
940 /* write descriptor back to RAM */
941 memcpy_toio(priv->base + address, &descr, sizeof(LANCE_TxDescr));
942
943 /* if no descriptors were active, give the LANCE a hint to read it
944 immediately */
945
946 if (priv->txbusy == 0)
947 SetLANCE(dev, LANCE_CSR0, CSR0_INEA | CSR0_TDMD);
948
949 spin_unlock_irqrestore(&priv->lock, flags);
950
951 tx_done:
952
953 dev_kfree_skb(skb);
954
955 return retval;
956}
957
958/* return pointer to Ethernet statistics */
959
960static struct net_device_stats *skmca_stats(struct net_device *dev)
961{
962 skmca_priv *priv = netdev_priv(dev);
963
964 return &(priv->stat);
965}
966
967/* switch receiver mode. We use the LANCE's multicast filter to prefilter
968 multicast addresses. */
969
970static void skmca_set_multicast_list(struct net_device *dev)
971{
972 skmca_priv *priv = netdev_priv(dev);
973 LANCE_InitBlock block;
974
975 /* first stop the LANCE... */
976 StopLANCE(dev);
977
978 /* ...then modify the initialization block... */
979 memcpy_fromio(&block, priv->base + RAM_INITBASE, sizeof(block));
980 if (dev->flags & IFF_PROMISC)
981 block.Mode |= LANCE_INIT_PROM;
982 else
983 block.Mode &= ~LANCE_INIT_PROM;
984
985 if (dev->flags & IFF_ALLMULTI) { /* get all multicasts */
986 memset(block.LAdrF, 0xff, sizeof(block.LAdrF));
987 } else { /* get selected/no multicasts */
988
989 struct dev_mc_list *mptr;
990 int code;
991
992 memset(block.LAdrF, 0, sizeof(block.LAdrF));
993 for (mptr = dev->mc_list; mptr != NULL; mptr = mptr->next) {
994 code = GetHash(mptr->dmi_addr);
995 block.LAdrF[(code >> 3) & 7] |= 1 << (code & 7);
996 }
997 }
998
999 memcpy_toio(priv->base + RAM_INITBASE, &block, sizeof(block));
1000
1001 /* ...then reinit LANCE with the correct flags */
1002 InitLANCE(dev);
1003}
1004
1005/* ------------------------------------------------------------------------
1006 * hardware check
1007 * ------------------------------------------------------------------------ */
1008
1009static int startslot; /* counts through slots when probing multiple devices */
1010
1011static void cleanup_card(struct net_device *dev)
1012{
1013 skmca_priv *priv = netdev_priv(dev);
1014 DeinitBoard(dev);
1015 if (dev->irq != 0)
1016 free_irq(dev->irq, dev);
1017 iounmap(priv->base);
1018 mca_mark_as_unused(priv->slot);
1019 mca_set_adapter_procfn(priv->slot, NULL, NULL);
1020}
1021
1022struct net_device * __init skmca_probe(int unit)
1023{
1024 struct net_device *dev;
1025 int force_detect = 0;
1026 int junior, slot, i;
1027 int base = 0, irq = 0;
1028 skmca_priv *priv;
1029 skmca_medium medium;
1030 int err;
1031
1032 /* can't work without an MCA bus ;-) */
1033
1034 if (MCA_bus == 0)
1035 return ERR_PTR(-ENODEV);
1036
1037 dev = alloc_etherdev(sizeof(skmca_priv));
1038 if (!dev)
1039 return ERR_PTR(-ENOMEM);
1040
1041 if (unit >= 0) {
1042 sprintf(dev->name, "eth%d", unit);
1043 netdev_boot_setup_check(dev);
1044 }
1045
1046 SET_MODULE_OWNER(dev);
1047
1048 /* start address of 1 --> forced detection */
1049
1050 if (dev->mem_start == 1)
1051 force_detect = 1;
1052
1053 /* search through slots */
1054
1055 base = dev->mem_start;
1056 irq = dev->base_addr;
1057 for (slot = startslot; (slot = dofind(&junior, slot)) != -1; slot++) {
1058 /* deduce card addresses */
1059
1060 getaddrs(slot, junior, &base, &irq, &medium);
1061
1062 /* slot already in use ? */
1063
1064 if (mca_is_adapter_used(slot))
1065 continue;
1066
1067 /* were we looking for something different ? */
1068
1069 if (dev->irq && dev->irq != irq)
1070 continue;
1071 if (dev->mem_start && dev->mem_start != base)
1072 continue;
1073
1074 /* found something that matches */
1075
1076 break;
1077 }
1078
1079 /* nothing found ? */
1080
1081 if (slot == -1) {
1082 free_netdev(dev);
1083 return (base || irq) ? ERR_PTR(-ENXIO) : ERR_PTR(-ENODEV);
1084 }
1085
1086 /* make procfs entries */
1087
1088 if (junior)
1089 mca_set_adapter_name(slot,
1090 "SKNET junior MC2 Ethernet Adapter");
1091 else
1092 mca_set_adapter_name(slot, "SKNET MC2+ Ethernet Adapter");
1093 mca_set_adapter_procfn(slot, (MCA_ProcFn) skmca_getinfo, dev);
1094
1095 mca_mark_as_used(slot);
1096
1097 /* announce success */
1098 printk("%s: SKNet %s adapter found in slot %d\n", dev->name,
1099 junior ? "Junior MC2" : "MC2+", slot + 1);
1100
1101 priv = netdev_priv(dev);
1102 priv->base = ioremap(base, 0x4000);
1103 if (!priv->base) {
1104 mca_set_adapter_procfn(slot, NULL, NULL);
1105 mca_mark_as_unused(slot);
1106 free_netdev(dev);
1107 return ERR_PTR(-ENOMEM);
1108 }
1109
1110 priv->slot = slot;
1111 priv->macbase = priv->base + 0x3fc0;
1112 priv->ioregaddr = priv->base + 0x3ff0;
1113 priv->ctrladdr = priv->base + 0x3ff2;
1114 priv->cmdaddr = priv->base + 0x3ff3;
1115 priv->medium = medium;
1116 memset(&priv->stat, 0, sizeof(struct net_device_stats));
1117 spin_lock_init(&priv->lock);
1118
1119 /* set base + irq for this device (irq not allocated so far) */
1120 dev->irq = 0;
1121 dev->mem_start = base;
1122 dev->mem_end = base + 0x4000;
1123
1124 /* autoprobe ? */
1125 if (irq < 0) {
1126 int nirq;
1127
1128 printk
1129 ("%s: ambigous POS bit combination, must probe for IRQ...\n",
1130 dev->name);
1131 nirq = ProbeIRQ(dev);
1132 if (nirq <= 0)
1133 printk("%s: IRQ probe failed, assuming IRQ %d",
1134 dev->name, priv->realirq = -irq);
1135 else
1136 priv->realirq = nirq;
1137 } else
1138 priv->realirq = irq;
1139
1140 /* set methods */
1141 dev->open = skmca_open;
1142 dev->stop = skmca_close;
1143 dev->hard_start_xmit = skmca_tx;
1144 dev->do_ioctl = NULL;
1145 dev->get_stats = skmca_stats;
1146 dev->set_multicast_list = skmca_set_multicast_list;
1147 dev->flags |= IFF_MULTICAST;
1148
1149 /* copy out MAC address */
1150 for (i = 0; i < 6; i++)
1151 dev->dev_addr[i] = readb(priv->macbase + (i << 1));
1152
1153 /* print config */
1154 printk("%s: IRQ %d, memory %#lx-%#lx, "
1155 "MAC address %02x:%02x:%02x:%02x:%02x:%02x.\n",
1156 dev->name, priv->realirq, dev->mem_start, dev->mem_end - 1,
1157 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1158 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1159 printk("%s: %s medium\n", dev->name, MediaNames[priv->medium]);
1160
1161 /* reset board */
1162
1163 ResetBoard(dev);
1164
1165 startslot = slot + 1;
1166
1167 err = register_netdev(dev);
1168 if (err) {
1169 cleanup_card(dev);
1170 free_netdev(dev);
1171 dev = ERR_PTR(err);
1172 }
1173 return dev;
1174}
1175
1176/* ------------------------------------------------------------------------
1177 * modularization support
1178 * ------------------------------------------------------------------------ */
1179
1180#ifdef MODULE
1181MODULE_LICENSE("GPL");
1182
1183#define DEVMAX 5
1184
1185static struct net_device *moddevs[DEVMAX];
1186
1187int init_module(void)
1188{
1189 int z;
1190
1191 startslot = 0;
1192 for (z = 0; z < DEVMAX; z++) {
1193 struct net_device *dev = skmca_probe(-1);
1194 if (IS_ERR(dev))
1195 break;
1196 moddevs[z] = dev;
1197 }
1198 if (!z)
1199 return -EIO;
1200 return 0;
1201}
1202
1203void cleanup_module(void)
1204{
1205 int z;
1206
1207 for (z = 0; z < DEVMAX; z++) {
1208 struct net_device *dev = moddevs[z];
1209 if (dev) {
1210 unregister_netdev(dev);
1211 cleanup_card(dev);
1212 free_netdev(dev);
1213 }
1214 }
1215}
1216#endif /* MODULE */
diff --git a/drivers/net/sk_mca.h b/drivers/net/sk_mca.h
deleted file mode 100644
index 0dae056fed99..000000000000
--- a/drivers/net/sk_mca.h
+++ /dev/null
@@ -1,170 +0,0 @@
1#ifndef _SK_MCA_INCLUDE_
2#define _SK_MCA_INCLUDE_
3
4#ifdef _SK_MCA_DRIVER_
5
6/* Adapter ID's */
7#define SKNET_MCA_ID 0x6afd
8#define SKNET_JUNIOR_MCA_ID 0x6be9
9
10/* media enumeration - defined in a way that it fits onto the MC2+'s
11 POS registers... */
12
13typedef enum { Media_10Base2, Media_10BaseT,
14 Media_10Base5, Media_Unknown, Media_Count
15} skmca_medium;
16
17/* private structure */
18typedef struct {
19 unsigned int slot; /* MCA-Slot-# */
20 void __iomem *base;
21 void __iomem *macbase; /* base address of MAC address PROM */
22 void __iomem *ioregaddr;/* address of I/O-register (Lo) */
23 void __iomem *ctrladdr; /* address of control/stat register */
24 void __iomem *cmdaddr; /* address of I/O-command register */
25 int nextrx; /* index of next RX descriptor to
26 be read */
27 int nexttxput; /* index of next free TX descriptor */
28 int nexttxdone; /* index of next TX descriptor to
29 be finished */
30 int txbusy; /* # of busy TX descriptors */
31 struct net_device_stats stat; /* packet statistics */
32 int realirq; /* memorizes actual IRQ, even when
33 currently not allocated */
34 skmca_medium medium; /* physical cannector */
35 spinlock_t lock;
36} skmca_priv;
37
38/* card registers: control/status register bits */
39
40#define CTRL_ADR_DATA 0 /* Bit 0 = 0 ->access data register */
41#define CTRL_ADR_RAP 1 /* Bit 0 = 1 ->access RAP register */
42#define CTRL_RW_WRITE 0 /* Bit 1 = 0 ->write register */
43#define CTRL_RW_READ 2 /* Bit 1 = 1 ->read register */
44#define CTRL_RESET_ON 0 /* Bit 3 = 0 ->reset board */
45#define CTRL_RESET_OFF 8 /* Bit 3 = 1 ->no reset of board */
46
47#define STAT_ADR_DATA 0 /* Bit 0 of ctrl register read back */
48#define STAT_ADR_RAP 1
49#define STAT_RW_WRITE 0 /* Bit 1 of ctrl register read back */
50#define STAT_RW_READ 2
51#define STAT_RESET_ON 0 /* Bit 3 of ctrl register read back */
52#define STAT_RESET_OFF 8
53#define STAT_IRQ_ACT 0 /* interrupt pending */
54#define STAT_IRQ_NOACT 16 /* no interrupt pending */
55#define STAT_IO_NOBUSY 0 /* no transfer busy */
56#define STAT_IO_BUSY 32 /* transfer busy */
57
58/* I/O command register bits */
59
60#define IOCMD_GO 128 /* Bit 7 = 1 -> start register xfer */
61
62/* LANCE registers */
63
64#define LANCE_CSR0 0 /* Status/Control */
65
66#define CSR0_ERR 0x8000 /* general error flag */
67#define CSR0_BABL 0x4000 /* transmitter timeout */
68#define CSR0_CERR 0x2000 /* collision error */
69#define CSR0_MISS 0x1000 /* lost Rx block */
70#define CSR0_MERR 0x0800 /* memory access error */
71#define CSR0_RINT 0x0400 /* receiver interrupt */
72#define CSR0_TINT 0x0200 /* transmitter interrupt */
73#define CSR0_IDON 0x0100 /* initialization done */
74#define CSR0_INTR 0x0080 /* general interrupt flag */
75#define CSR0_INEA 0x0040 /* interrupt enable */
76#define CSR0_RXON 0x0020 /* receiver enabled */
77#define CSR0_TXON 0x0010 /* transmitter enabled */
78#define CSR0_TDMD 0x0008 /* force transmission now */
79#define CSR0_STOP 0x0004 /* stop LANCE */
80#define CSR0_STRT 0x0002 /* start LANCE */
81#define CSR0_INIT 0x0001 /* read initialization block */
82
83#define LANCE_CSR1 1 /* addr bit 0..15 of initialization */
84#define LANCE_CSR2 2 /* 16..23 block */
85
86#define LANCE_CSR3 3 /* Bus control */
87#define CSR3_BCON_HOLD 0 /* Bit 0 = 0 -> BM1,BM0,HOLD */
88#define CSR3_BCON_BUSRQ 1 /* Bit 0 = 1 -> BUSAK0,BYTE,BUSRQ */
89#define CSR3_ALE_HIGH 0 /* Bit 1 = 0 -> ALE asserted high */
90#define CSR3_ALE_LOW 2 /* Bit 1 = 1 -> ALE asserted low */
91#define CSR3_BSWAP_OFF 0 /* Bit 2 = 0 -> no byte swap */
92#define CSR3_BSWAP_ON 4 /* Bit 2 = 1 -> byte swap */
93
94/* LANCE structures */
95
96typedef struct { /* LANCE initialization block */
97 u16 Mode; /* mode flags */
98 u8 PAdr[6]; /* MAC address */
99 u8 LAdrF[8]; /* Multicast filter */
100 u32 RdrP; /* Receive descriptor */
101 u32 TdrP; /* Transmit descriptor */
102} LANCE_InitBlock;
103
104/* Mode flags init block */
105
106#define LANCE_INIT_PROM 0x8000 /* enable promiscous mode */
107#define LANCE_INIT_INTL 0x0040 /* internal loopback */
108#define LANCE_INIT_DRTY 0x0020 /* disable retry */
109#define LANCE_INIT_COLL 0x0010 /* force collision */
110#define LANCE_INIT_DTCR 0x0008 /* disable transmit CRC */
111#define LANCE_INIT_LOOP 0x0004 /* loopback */
112#define LANCE_INIT_DTX 0x0002 /* disable transmitter */
113#define LANCE_INIT_DRX 0x0001 /* disable receiver */
114
115typedef struct { /* LANCE Tx descriptor */
116 u16 LowAddr; /* bit 0..15 of address */
117 u16 Flags; /* bit 16..23 of address + Flags */
118 u16 Len; /* 2s complement of packet length */
119 u16 Status; /* Result of transmission */
120} LANCE_TxDescr;
121
122#define TXDSCR_FLAGS_OWN 0x8000 /* LANCE owns descriptor */
123#define TXDSCR_FLAGS_ERR 0x4000 /* summary error flag */
124#define TXDSCR_FLAGS_MORE 0x1000 /* more than one retry needed? */
125#define TXDSCR_FLAGS_ONE 0x0800 /* one retry? */
126#define TXDSCR_FLAGS_DEF 0x0400 /* transmission deferred? */
127#define TXDSCR_FLAGS_STP 0x0200 /* first packet in chain? */
128#define TXDSCR_FLAGS_ENP 0x0100 /* last packet in chain? */
129
130#define TXDSCR_STATUS_BUFF 0x8000 /* buffer error? */
131#define TXDSCR_STATUS_UFLO 0x4000 /* silo underflow during transmit? */
132#define TXDSCR_STATUS_LCOL 0x1000 /* late collision? */
133#define TXDSCR_STATUS_LCAR 0x0800 /* loss of carrier? */
134#define TXDSCR_STATUS_RTRY 0x0400 /* retry error? */
135
136typedef struct { /* LANCE Rx descriptor */
137 u16 LowAddr; /* bit 0..15 of address */
138 u16 Flags; /* bit 16..23 of address + Flags */
139 u16 MaxLen; /* 2s complement of buffer length */
140 u16 Len; /* packet length */
141} LANCE_RxDescr;
142
143#define RXDSCR_FLAGS_OWN 0x8000 /* LANCE owns descriptor */
144#define RXDSCR_FLAGS_ERR 0x4000 /* summary error flag */
145#define RXDSCR_FLAGS_FRAM 0x2000 /* framing error flag */
146#define RXDSCR_FLAGS_OFLO 0x1000 /* FIFO overflow? */
147#define RXDSCR_FLAGS_CRC 0x0800 /* CRC error? */
148#define RXDSCR_FLAGS_BUFF 0x0400 /* buffer error? */
149#define RXDSCR_FLAGS_STP 0x0200 /* first packet in chain? */
150#define RXDCSR_FLAGS_ENP 0x0100 /* last packet in chain? */
151
152/* RAM layout */
153
154#define TXCOUNT 4 /* length of TX descriptor queue */
155#define LTXCOUNT 2 /* log2 of it */
156#define RXCOUNT 4 /* length of RX descriptor queue */
157#define LRXCOUNT 2 /* log2 of it */
158
159#define RAM_INITBASE 0 /* LANCE init block */
160#define RAM_TXBASE 24 /* Start of TX descriptor queue */
161#define RAM_RXBASE \
162(RAM_TXBASE + (TXCOUNT * 8)) /* Start of RX descriptor queue */
163#define RAM_DATABASE \
164(RAM_RXBASE + (RXCOUNT * 8)) /* Start of data area for frames */
165#define RAM_BUFSIZE 1580 /* max. frame size - should never be
166 reached */
167
168#endif /* _SK_MCA_DRIVER_ */
169
170#endif /* _SK_MCA_INCLUDE_ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 13:06:28 -0500