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-rw-r--r--drivers/mmc/host/davinci_mmc.c45
1 files changed, 35 insertions, 10 deletions
diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c
index dd45e7c3517e..3bd0ba294e9d 100644
--- a/drivers/mmc/host/davinci_mmc.c
+++ b/drivers/mmc/host/davinci_mmc.c
@@ -73,6 +73,7 @@
73/* DAVINCI_MMCCTL definitions */ 73/* DAVINCI_MMCCTL definitions */
74#define MMCCTL_DATRST (1 << 0) 74#define MMCCTL_DATRST (1 << 0)
75#define MMCCTL_CMDRST (1 << 1) 75#define MMCCTL_CMDRST (1 << 1)
76#define MMCCTL_WIDTH_8_BIT (1 << 8)
76#define MMCCTL_WIDTH_4_BIT (1 << 2) 77#define MMCCTL_WIDTH_4_BIT (1 << 2)
77#define MMCCTL_DATEG_DISABLED (0 << 6) 78#define MMCCTL_DATEG_DISABLED (0 << 6)
78#define MMCCTL_DATEG_RISING (1 << 6) 79#define MMCCTL_DATEG_RISING (1 << 6)
@@ -791,22 +792,42 @@ static void calculate_clk_divider(struct mmc_host *mmc, struct mmc_ios *ios)
791 792
792static void mmc_davinci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 793static void mmc_davinci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
793{ 794{
794 unsigned int mmc_pclk = 0;
795 struct mmc_davinci_host *host = mmc_priv(mmc); 795 struct mmc_davinci_host *host = mmc_priv(mmc);
796 796
797 mmc_pclk = host->mmc_input_clk;
798 dev_dbg(mmc_dev(host->mmc), 797 dev_dbg(mmc_dev(host->mmc),
799 "clock %dHz busmode %d powermode %d Vdd %04x\n", 798 "clock %dHz busmode %d powermode %d Vdd %04x\n",
800 ios->clock, ios->bus_mode, ios->power_mode, 799 ios->clock, ios->bus_mode, ios->power_mode,
801 ios->vdd); 800 ios->vdd);
802 if (ios->bus_width == MMC_BUS_WIDTH_4) { 801
803 dev_dbg(mmc_dev(host->mmc), "Enabling 4 bit mode\n"); 802 switch (ios->bus_width) {
804 writel(readl(host->base + DAVINCI_MMCCTL) | MMCCTL_WIDTH_4_BIT, 803 case MMC_BUS_WIDTH_8:
805 host->base + DAVINCI_MMCCTL); 804 dev_dbg(mmc_dev(host->mmc), "Enabling 8 bit mode\n");
806 } else { 805 writel((readl(host->base + DAVINCI_MMCCTL) &
807 dev_dbg(mmc_dev(host->mmc), "Disabling 4 bit mode\n"); 806 ~MMCCTL_WIDTH_4_BIT) | MMCCTL_WIDTH_8_BIT,
808 writel(readl(host->base + DAVINCI_MMCCTL) & ~MMCCTL_WIDTH_4_BIT,
809 host->base + DAVINCI_MMCCTL); 807 host->base + DAVINCI_MMCCTL);
808 break;
809 case MMC_BUS_WIDTH_4:
810 dev_dbg(mmc_dev(host->mmc), "Enabling 4 bit mode\n");
811 if (host->version == MMC_CTLR_VERSION_2)
812 writel((readl(host->base + DAVINCI_MMCCTL) &
813 ~MMCCTL_WIDTH_8_BIT) | MMCCTL_WIDTH_4_BIT,
814 host->base + DAVINCI_MMCCTL);
815 else
816 writel(readl(host->base + DAVINCI_MMCCTL) |
817 MMCCTL_WIDTH_4_BIT,
818 host->base + DAVINCI_MMCCTL);
819 break;
820 case MMC_BUS_WIDTH_1:
821 dev_dbg(mmc_dev(host->mmc), "Enabling 1 bit mode\n");
822 if (host->version == MMC_CTLR_VERSION_2)
823 writel(readl(host->base + DAVINCI_MMCCTL) &
824 ~(MMCCTL_WIDTH_8_BIT | MMCCTL_WIDTH_4_BIT),
825 host->base + DAVINCI_MMCCTL);
826 else
827 writel(readl(host->base + DAVINCI_MMCCTL) &
828 ~MMCCTL_WIDTH_4_BIT,
829 host->base + DAVINCI_MMCCTL);
830 break;
810 } 831 }
811 832
812 calculate_clk_divider(mmc, ios); 833 calculate_clk_divider(mmc, ios);
@@ -1189,10 +1210,14 @@ static int __init davinci_mmcsd_probe(struct platform_device *pdev)
1189 1210
1190 /* REVISIT: someday, support IRQ-driven card detection. */ 1211 /* REVISIT: someday, support IRQ-driven card detection. */
1191 mmc->caps |= MMC_CAP_NEEDS_POLL; 1212 mmc->caps |= MMC_CAP_NEEDS_POLL;
1213 mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
1192 1214
1193 if (!pdata || pdata->wires == 4 || pdata->wires == 0) 1215 if (pdata && (pdata->wires == 4 || pdata->wires == 0))
1194 mmc->caps |= MMC_CAP_4_BIT_DATA; 1216 mmc->caps |= MMC_CAP_4_BIT_DATA;
1195 1217
1218 if (pdata && (pdata->wires == 8))
1219 mmc->caps |= (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA);
1220
1196 host->version = pdata->version; 1221 host->version = pdata->version;
1197 1222
1198 mmc->ops = &mmc_davinci_ops; 1223 mmc->ops = &mmc_davinci_ops;