aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'drivers')
-rw-r--r--drivers/acpi/bus.c9
-rw-r--r--drivers/acpi/numa.c2
-rw-r--r--drivers/acpi/osl.c50
-rw-r--r--drivers/acpi/sleep.c16
-rw-r--r--drivers/ata/ata_piix.c37
-rw-r--r--drivers/ata/libata-sff.c6
-rw-r--r--drivers/ata/sata_mv.c3
-rw-r--r--drivers/block/xsysace.c22
-rw-r--r--drivers/char/agp/parisc-agp.c23
-rw-r--r--drivers/hwmon/Kconfig4
-rw-r--r--drivers/hwmon/abituguru3.c7
-rw-r--r--drivers/hwmon/f75375s.c2
-rw-r--r--drivers/hwmon/it87.c8
-rw-r--r--drivers/hwmon/lm90.c8
-rw-r--r--drivers/ide/ide-atapi.c12
-rw-r--r--drivers/ide/ide-dma.c12
-rw-r--r--drivers/ide/ide-floppy.c6
-rw-r--r--drivers/infiniband/hw/nes/nes_cm.c39
-rw-r--r--drivers/infiniband/hw/nes/nes_verbs.c2
-rw-r--r--drivers/infiniband/hw/nes/nes_verbs.h1
-rw-r--r--drivers/md/dm-crypt.c43
-rw-r--r--drivers/md/dm-io.c2
-rw-r--r--drivers/md/dm-ioctl.c7
-rw-r--r--drivers/md/dm.c32
-rw-r--r--drivers/media/dvb/bt8xx/dst.c2
-rw-r--r--drivers/media/dvb/dvb-core/dvb_frontend.c7
-rw-r--r--drivers/media/dvb/frontends/stb0899_algo.c14
-rw-r--r--drivers/media/dvb/frontends/stb0899_drv.c2
-rw-r--r--drivers/media/dvb/frontends/stb0899_priv.h12
-rw-r--r--drivers/media/dvb/frontends/stb6100.c4
-rw-r--r--drivers/media/dvb/frontends/zl10353.c2
-rw-r--r--drivers/media/dvb/frontends/zl10353.h3
-rw-r--r--drivers/media/video/gspca/m5602/m5602_s5k4aa.c6
-rw-r--r--drivers/media/video/saa7134/saa7134-dvb.c1
-rw-r--r--drivers/media/video/tvaudio.c2
-rw-r--r--drivers/media/video/zoran/Kconfig1
-rw-r--r--drivers/mfd/wm8350-core.c5
-rw-r--r--drivers/mmc/host/s3cmci.c3
-rw-r--r--drivers/net/Kconfig13
-rw-r--r--drivers/net/Makefile2
-rw-r--r--drivers/net/benet/Kconfig7
-rw-r--r--drivers/net/benet/Makefile7
-rw-r--r--drivers/net/benet/be.h327
-rw-r--r--drivers/net/benet/be_cmds.c861
-rw-r--r--drivers/net/benet/be_cmds.h688
-rw-r--r--drivers/net/benet/be_ethtool.c362
-rw-r--r--drivers/net/benet/be_hw.h211
-rw-r--r--drivers/net/benet/be_main.c1903
-rw-r--r--drivers/net/bnx2x.h2
-rw-r--r--drivers/net/bnx2x_init.h4
-rw-r--r--drivers/net/bnx2x_main.c21
-rw-r--r--drivers/net/dnet.c994
-rw-r--r--drivers/net/dnet.h225
-rw-r--r--drivers/net/ibm_newemac/core.c3
-rw-r--r--drivers/net/igb/igb_main.c26
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c1
-rw-r--r--drivers/net/mv643xx_eth.c10
-rw-r--r--drivers/net/netxen/netxen_nic.h1
-rw-r--r--drivers/net/netxen/netxen_nic_hw.c22
-rw-r--r--drivers/net/netxen/netxen_nic_main.c3
-rw-r--r--drivers/net/qlge/qlge.h1
-rw-r--r--drivers/net/qlge/qlge_main.c57
-rw-r--r--drivers/net/r8169.c122
-rw-r--r--drivers/net/sunhme.c2
-rw-r--r--drivers/net/via-velocity.c15
-rw-r--r--drivers/parisc/dino.c13
-rw-r--r--drivers/parisc/gsc.c39
-rw-r--r--drivers/parisc/iosapic.c16
-rw-r--r--drivers/parisc/lba_pci.c4
-rw-r--r--drivers/parisc/sba_iommu.c63
-rw-r--r--drivers/pci/dmar.c296
-rw-r--r--drivers/pci/hotplug/Kconfig2
-rw-r--r--drivers/pci/intel-iommu.c220
-rw-r--r--drivers/pci/intr_remapping.c110
-rw-r--r--drivers/pci/pcie/aer/aerdrv_core.c3
-rw-r--r--drivers/pci/pcie/portdrv_pci.c1
-rw-r--r--drivers/pci/quirks.c31
-rw-r--r--drivers/platform/x86/Kconfig14
-rw-r--r--drivers/platform/x86/acer-wmi.c4
-rw-r--r--drivers/platform/x86/asus-laptop.c5
-rw-r--r--drivers/platform/x86/eeepc-laptop.c6
-rw-r--r--drivers/platform/x86/thinkpad_acpi.c8
-rw-r--r--drivers/platform/x86/wmi.c2
-rw-r--r--drivers/power/ds2760_battery.c11
-rw-r--r--drivers/sbus/char/bbc_i2c.c2
-rw-r--r--drivers/sbus/char/jsflash.c3
-rw-r--r--drivers/scsi/fcoe/fc_transport_fcoe.c91
-rw-r--r--drivers/scsi/fcoe/fcoe_sw.c56
-rw-r--r--drivers/scsi/fcoe/libfcoe.c318
-rw-r--r--drivers/scsi/lasi700.c2
-rw-r--r--drivers/scsi/libfc/fc_disc.c63
-rw-r--r--drivers/scsi/libfc/fc_exch.c32
-rw-r--r--drivers/scsi/libfc/fc_fcp.c56
-rw-r--r--drivers/scsi/libfc/fc_lport.c173
-rw-r--r--drivers/scsi/libfc/fc_rport.c197
-rw-r--r--drivers/scsi/qla2xxx/qla_attr.c9
-rw-r--r--drivers/scsi/qla2xxx/qla_init.c19
-rw-r--r--drivers/scsi/qla2xxx/qla_mbx.c3
-rw-r--r--drivers/scsi/qla2xxx/qla_mid.c10
-rw-r--r--drivers/scsi/qla2xxx/qla_os.c6
-rw-r--r--drivers/scsi/qla2xxx/qla_version.h2
-rw-r--r--drivers/scsi/sd.c26
-rw-r--r--drivers/scsi/zalon.c2
-rw-r--r--drivers/video/logo/logo_linux_clut224.ppm4428
-rw-r--r--drivers/video/logo/logo_linux_vga16.ppm4339
-rw-r--r--drivers/w1/masters/w1-gpio.c2
106 files changed, 12546 insertions, 4448 deletions
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 765fd1c56cd6..bee64b73c919 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -758,8 +758,7 @@ static int __init acpi_bus_init(void)
758 acpi_status status = AE_OK; 758 acpi_status status = AE_OK;
759 extern acpi_status acpi_os_initialize1(void); 759 extern acpi_status acpi_os_initialize1(void);
760 760
761 761 acpi_os_initialize1();
762 status = acpi_os_initialize1();
763 762
764 status = 763 status =
765 acpi_enable_subsystem(ACPI_NO_HARDWARE_INIT | ACPI_NO_ACPI_ENABLE); 764 acpi_enable_subsystem(ACPI_NO_HARDWARE_INIT | ACPI_NO_ACPI_ENABLE);
@@ -769,12 +768,6 @@ static int __init acpi_bus_init(void)
769 goto error1; 768 goto error1;
770 } 769 }
771 770
772 if (ACPI_FAILURE(status)) {
773 printk(KERN_ERR PREFIX
774 "Unable to initialize ACPI OS objects\n");
775 goto error1;
776 }
777
778 /* 771 /*
779 * ACPI 2.0 requires the EC driver to be loaded and work before 772 * ACPI 2.0 requires the EC driver to be loaded and work before
780 * the EC device is found in the namespace (i.e. before acpi_initialize_objects() 773 * the EC device is found in the namespace (i.e. before acpi_initialize_objects()
diff --git a/drivers/acpi/numa.c b/drivers/acpi/numa.c
index c5e292aab0e3..3a0d8ef25c75 100644
--- a/drivers/acpi/numa.c
+++ b/drivers/acpi/numa.c
@@ -277,7 +277,7 @@ int acpi_get_node(acpi_handle *handle)
277 int pxm, node = -1; 277 int pxm, node = -1;
278 278
279 pxm = acpi_get_pxm(handle); 279 pxm = acpi_get_pxm(handle);
280 if (pxm >= 0) 280 if (pxm >= 0 && pxm < MAX_PXM_DOMAINS)
281 node = acpi_map_pxm_to_node(pxm); 281 node = acpi_map_pxm_to_node(pxm);
282 282
283 return node; 283 return node;
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index 2b6c59028254..eb8980d67368 100644
--- a/drivers/acpi/osl.c
+++ b/drivers/acpi/osl.c
@@ -1324,54 +1324,6 @@ acpi_os_validate_interface (char *interface)
1324 return AE_SUPPORT; 1324 return AE_SUPPORT;
1325} 1325}
1326 1326
1327#ifdef CONFIG_X86
1328
1329struct aml_port_desc {
1330 uint start;
1331 uint end;
1332 char* name;
1333 char warned;
1334};
1335
1336static struct aml_port_desc aml_invalid_port_list[] = {
1337 {0x20, 0x21, "PIC0", 0},
1338 {0xA0, 0xA1, "PIC1", 0},
1339 {0x4D0, 0x4D1, "ELCR", 0}
1340};
1341
1342/*
1343 * valid_aml_io_address()
1344 *
1345 * if valid, return true
1346 * else invalid, warn once, return false
1347 */
1348static bool valid_aml_io_address(uint address, uint length)
1349{
1350 int i;
1351 int entries = sizeof(aml_invalid_port_list) / sizeof(struct aml_port_desc);
1352
1353 for (i = 0; i < entries; ++i) {
1354 if ((address >= aml_invalid_port_list[i].start &&
1355 address <= aml_invalid_port_list[i].end) ||
1356 (address + length >= aml_invalid_port_list[i].start &&
1357 address + length <= aml_invalid_port_list[i].end))
1358 {
1359 if (!aml_invalid_port_list[i].warned)
1360 {
1361 printk(KERN_ERR "ACPI: Denied BIOS AML access"
1362 " to invalid port 0x%x+0x%x (%s)\n",
1363 address, length,
1364 aml_invalid_port_list[i].name);
1365 aml_invalid_port_list[i].warned = 1;
1366 }
1367 return false; /* invalid */
1368 }
1369 }
1370 return true; /* valid */
1371}
1372#else
1373static inline bool valid_aml_io_address(uint address, uint length) { return true; }
1374#endif
1375/****************************************************************************** 1327/******************************************************************************
1376 * 1328 *
1377 * FUNCTION: acpi_os_validate_address 1329 * FUNCTION: acpi_os_validate_address
@@ -1401,8 +1353,6 @@ acpi_os_validate_address (
1401 1353
1402 switch (space_id) { 1354 switch (space_id) {
1403 case ACPI_ADR_SPACE_SYSTEM_IO: 1355 case ACPI_ADR_SPACE_SYSTEM_IO:
1404 if (!valid_aml_io_address(address, length))
1405 return AE_AML_ILLEGAL_ADDRESS;
1406 case ACPI_ADR_SPACE_SYSTEM_MEMORY: 1356 case ACPI_ADR_SPACE_SYSTEM_MEMORY:
1407 /* Only interference checks against SystemIO and SytemMemory 1357 /* Only interference checks against SystemIO and SytemMemory
1408 are needed */ 1358 are needed */
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index 519266654f06..00456fccfa38 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -378,6 +378,22 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = {
378 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), 378 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
379 }, 379 },
380 }, 380 },
381 {
382 .callback = init_old_suspend_ordering,
383 .ident = "Asus Pundit P1-AH2 (M2N8L motherboard)",
384 .matches = {
385 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTek Computer INC."),
386 DMI_MATCH(DMI_BOARD_NAME, "M2N8L"),
387 },
388 },
389 {
390 .callback = init_set_sci_en_on_resume,
391 .ident = "Toshiba Satellite L300",
392 .matches = {
393 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
394 DMI_MATCH(DMI_PRODUCT_NAME, "Satellite L300"),
395 },
396 },
381 {}, 397 {},
382}; 398};
383#endif /* CONFIG_SUSPEND */ 399#endif /* CONFIG_SUSPEND */
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 54961c0b2c73..ef8b30d577bd 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -1289,6 +1289,39 @@ static const int *__devinit piix_init_sata_map(struct pci_dev *pdev,
1289 return map; 1289 return map;
1290} 1290}
1291 1291
1292static bool piix_no_sidpr(struct ata_host *host)
1293{
1294 struct pci_dev *pdev = to_pci_dev(host->dev);
1295
1296 /*
1297 * Samsung DB-P70 only has three ATA ports exposed and
1298 * curiously the unconnected first port reports link online
1299 * while not responding to SRST protocol causing excessive
1300 * detection delay.
1301 *
1302 * Unfortunately, the system doesn't carry enough DMI
1303 * information to identify the machine but does have subsystem
1304 * vendor and device set. As it's unclear whether the
1305 * subsystem vendor/device is used only for this specific
1306 * board, the port can't be disabled solely with the
1307 * information; however, turning off SIDPR access works around
1308 * the problem. Turn it off.
1309 *
1310 * This problem is reported in bnc#441240.
1311 *
1312 * https://bugzilla.novell.com/show_bug.cgi?id=441420
1313 */
1314 if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2920 &&
1315 pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG &&
1316 pdev->subsystem_device == 0xb049) {
1317 dev_printk(KERN_WARNING, host->dev,
1318 "Samsung DB-P70 detected, disabling SIDPR\n");
1319 return true;
1320 }
1321
1322 return false;
1323}
1324
1292static int __devinit piix_init_sidpr(struct ata_host *host) 1325static int __devinit piix_init_sidpr(struct ata_host *host)
1293{ 1326{
1294 struct pci_dev *pdev = to_pci_dev(host->dev); 1327 struct pci_dev *pdev = to_pci_dev(host->dev);
@@ -1302,6 +1335,10 @@ static int __devinit piix_init_sidpr(struct ata_host *host)
1302 if (hpriv->map[i] == IDE) 1335 if (hpriv->map[i] == IDE)
1303 return 0; 1336 return 0;
1304 1337
1338 /* is it blacklisted? */
1339 if (piix_no_sidpr(host))
1340 return 0;
1341
1305 if (!(host->ports[0]->flags & PIIX_FLAG_SIDPR)) 1342 if (!(host->ports[0]->flags & PIIX_FLAG_SIDPR))
1306 return 0; 1343 return 0;
1307 1344
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index 714cb046b594..f93dc029dfde 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -2066,6 +2066,7 @@ static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
2066 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); 2066 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2067 udelay(20); /* FIXME: flush */ 2067 udelay(20); /* FIXME: flush */
2068 iowrite8(ap->ctl, ioaddr->ctl_addr); 2068 iowrite8(ap->ctl, ioaddr->ctl_addr);
2069 ap->last_ctl = ap->ctl;
2069 2070
2070 /* wait the port to become ready */ 2071 /* wait the port to become ready */
2071 return ata_sff_wait_after_reset(&ap->link, devmask, deadline); 2072 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
@@ -2190,8 +2191,10 @@ void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
2190 } 2191 }
2191 2192
2192 /* set up device control */ 2193 /* set up device control */
2193 if (ap->ioaddr.ctl_addr) 2194 if (ap->ioaddr.ctl_addr) {
2194 iowrite8(ap->ctl, ap->ioaddr.ctl_addr); 2195 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
2196 ap->last_ctl = ap->ctl;
2197 }
2195} 2198}
2196EXPORT_SYMBOL_GPL(ata_sff_postreset); 2199EXPORT_SYMBOL_GPL(ata_sff_postreset);
2197 2200
@@ -2534,6 +2537,7 @@ void ata_bus_reset(struct ata_port *ap)
2534 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { 2537 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2535 /* set up device control for ATA_FLAG_SATA_RESET */ 2538 /* set up device control for ATA_FLAG_SATA_RESET */
2536 iowrite8(ap->ctl, ioaddr->ctl_addr); 2539 iowrite8(ap->ctl, ioaddr->ctl_addr);
2540 ap->last_ctl = ap->ctl;
2537 } 2541 }
2538 2542
2539 DPRINTK("EXIT\n"); 2543 DPRINTK("EXIT\n");
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 7007edd2d451..74b1080d116d 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -2218,12 +2218,13 @@ static irqreturn_t mv_interrupt(int irq, void *dev_instance)
2218 else 2218 else
2219 handled = mv_host_intr(host, pending_irqs); 2219 handled = mv_host_intr(host, pending_irqs);
2220 } 2220 }
2221 spin_unlock(&host->lock);
2222 2221
2223 /* for MSI: unmask; interrupt cause bits will retrigger now */ 2222 /* for MSI: unmask; interrupt cause bits will retrigger now */
2224 if (using_msi) 2223 if (using_msi)
2225 writel(hpriv->main_irq_mask, hpriv->main_irq_mask_addr); 2224 writel(hpriv->main_irq_mask, hpriv->main_irq_mask_addr);
2226 2225
2226 spin_unlock(&host->lock);
2227
2227 return IRQ_RETVAL(handled); 2228 return IRQ_RETVAL(handled);
2228} 2229}
2229 2230
diff --git a/drivers/block/xsysace.c b/drivers/block/xsysace.c
index 381d686fc1a3..119be3442f28 100644
--- a/drivers/block/xsysace.c
+++ b/drivers/block/xsysace.c
@@ -489,6 +489,28 @@ static void ace_fsm_dostate(struct ace_device *ace)
489 ace->fsm_state, ace->id_req_count); 489 ace->fsm_state, ace->id_req_count);
490#endif 490#endif
491 491
492 /* Verify that there is actually a CF in the slot. If not, then
493 * bail out back to the idle state and wake up all the waiters */
494 status = ace_in32(ace, ACE_STATUS);
495 if ((status & ACE_STATUS_CFDETECT) == 0) {
496 ace->fsm_state = ACE_FSM_STATE_IDLE;
497 ace->media_change = 1;
498 set_capacity(ace->gd, 0);
499 dev_info(ace->dev, "No CF in slot\n");
500
501 /* Drop all pending requests */
502 while ((req = elv_next_request(ace->queue)) != NULL)
503 end_request(req, 0);
504
505 /* Drop back to IDLE state and notify waiters */
506 ace->fsm_state = ACE_FSM_STATE_IDLE;
507 ace->id_result = -EIO;
508 while (ace->id_req_count) {
509 complete(&ace->id_completion);
510 ace->id_req_count--;
511 }
512 }
513
492 switch (ace->fsm_state) { 514 switch (ace->fsm_state) {
493 case ACE_FSM_STATE_IDLE: 515 case ACE_FSM_STATE_IDLE:
494 /* See if there is anything to do */ 516 /* See if there is anything to do */
diff --git a/drivers/char/agp/parisc-agp.c b/drivers/char/agp/parisc-agp.c
index db60539bf67a..699e3422ad93 100644
--- a/drivers/char/agp/parisc-agp.c
+++ b/drivers/char/agp/parisc-agp.c
@@ -359,9 +359,16 @@ fail:
359 return error; 359 return error;
360} 360}
361 361
362static struct device *next_device(struct klist_iter *i) { 362static int
363 struct klist_node * n = klist_next(i); 363find_quicksilver(struct device *dev, void *data)
364 return n ? container_of(n, struct device, knode_parent) : NULL; 364{
365 struct parisc_device **lba = data;
366 struct parisc_device *padev = to_parisc_device(dev);
367
368 if (IS_QUICKSILVER(padev))
369 *lba = padev;
370
371 return 0;
365} 372}
366 373
367static int 374static int
@@ -372,8 +379,6 @@ parisc_agp_init(void)
372 int err = -1; 379 int err = -1;
373 struct parisc_device *sba = NULL, *lba = NULL; 380 struct parisc_device *sba = NULL, *lba = NULL;
374 struct lba_device *lbadev = NULL; 381 struct lba_device *lbadev = NULL;
375 struct device *dev = NULL;
376 struct klist_iter i;
377 382
378 if (!sba_list) 383 if (!sba_list)
379 goto out; 384 goto out;
@@ -386,13 +391,7 @@ parisc_agp_init(void)
386 } 391 }
387 392
388 /* Now search our Pluto for our precious AGP device... */ 393 /* Now search our Pluto for our precious AGP device... */
389 klist_iter_init(&sba->dev.klist_children, &i); 394 device_for_each_child(&sba->dev, &lba, find_quicksilver);
390 while ((dev = next_device(&i))) {
391 struct parisc_device *padev = to_parisc_device(dev);
392 if (IS_QUICKSILVER(padev))
393 lba = padev;
394 }
395 klist_iter_exit(&i);
396 395
397 if (!lba) { 396 if (!lba) {
398 printk(KERN_INFO DRVPFX "No AGP devices found.\n"); 397 printk(KERN_INFO DRVPFX "No AGP devices found.\n");
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index b84bf066879b..b4eea0292c1a 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -543,8 +543,8 @@ config SENSORS_LM90
543 help 543 help
544 If you say yes here you get support for National Semiconductor LM90, 544 If you say yes here you get support for National Semiconductor LM90,
545 LM86, LM89 and LM99, Analog Devices ADM1032 and ADT7461, and Maxim 545 LM86, LM89 and LM99, Analog Devices ADM1032 and ADT7461, and Maxim
546 MAX6646, MAX6647, MAX6649, MAX6657, MAX6658, MAX6659, MAX6680 and 546 MAX6646, MAX6647, MAX6648, MAX6649, MAX6657, MAX6658, MAX6659,
547 MAX6681 sensor chips. 547 MAX6680, MAX6681 and MAX6692 sensor chips.
548 548
549 This driver can also be built as a module. If so, the module 549 This driver can also be built as a module. If so, the module
550 will be called lm90. 550 will be called lm90.
diff --git a/drivers/hwmon/abituguru3.c b/drivers/hwmon/abituguru3.c
index e52b38806d03..ad2b3431b725 100644
--- a/drivers/hwmon/abituguru3.c
+++ b/drivers/hwmon/abituguru3.c
@@ -760,8 +760,11 @@ static int abituguru3_read_increment_offset(struct abituguru3_data *data,
760 760
761 for (i = 0; i < offset_count; i++) 761 for (i = 0; i < offset_count; i++)
762 if ((x = abituguru3_read(data, bank, offset + i, count, 762 if ((x = abituguru3_read(data, bank, offset + i, count,
763 buf + i * count)) != count) 763 buf + i * count)) != count) {
764 return i * count + (i && (x < 0)) ? 0 : x; 764 if (x < 0)
765 return x;
766 return i * count + x;
767 }
765 768
766 return i * count; 769 return i * count;
767} 770}
diff --git a/drivers/hwmon/f75375s.c b/drivers/hwmon/f75375s.c
index 1692de369969..18a1ba888165 100644
--- a/drivers/hwmon/f75375s.c
+++ b/drivers/hwmon/f75375s.c
@@ -617,7 +617,7 @@ static void f75375_init(struct i2c_client *client, struct f75375_data *data,
617static int f75375_probe(struct i2c_client *client, 617static int f75375_probe(struct i2c_client *client,
618 const struct i2c_device_id *id) 618 const struct i2c_device_id *id)
619{ 619{
620 struct f75375_data *data = i2c_get_clientdata(client); 620 struct f75375_data *data;
621 struct f75375s_platform_data *f75375s_pdata = client->dev.platform_data; 621 struct f75375s_platform_data *f75375s_pdata = client->dev.platform_data;
622 int err; 622 int err;
623 623
diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c
index 95a99c590da2..9157247fed8e 100644
--- a/drivers/hwmon/it87.c
+++ b/drivers/hwmon/it87.c
@@ -213,7 +213,7 @@ static inline u16 FAN16_TO_REG(long rpm)
213 213
214#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val)<0?(((val)-500)/1000):\ 214#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val)<0?(((val)-500)/1000):\
215 ((val)+500)/1000),-128,127)) 215 ((val)+500)/1000),-128,127))
216#define TEMP_FROM_REG(val) (((val)>0x80?(val)-0x100:(val))*1000) 216#define TEMP_FROM_REG(val) ((val) * 1000)
217 217
218#define PWM_TO_REG(val) ((val) >> 1) 218#define PWM_TO_REG(val) ((val) >> 1)
219#define PWM_FROM_REG(val) (((val)&0x7f) << 1) 219#define PWM_FROM_REG(val) (((val)&0x7f) << 1)
@@ -267,9 +267,9 @@ struct it87_data {
267 u8 has_fan; /* Bitfield, fans enabled */ 267 u8 has_fan; /* Bitfield, fans enabled */
268 u16 fan[5]; /* Register values, possibly combined */ 268 u16 fan[5]; /* Register values, possibly combined */
269 u16 fan_min[5]; /* Register values, possibly combined */ 269 u16 fan_min[5]; /* Register values, possibly combined */
270 u8 temp[3]; /* Register value */ 270 s8 temp[3]; /* Register value */
271 u8 temp_high[3]; /* Register value */ 271 s8 temp_high[3]; /* Register value */
272 u8 temp_low[3]; /* Register value */ 272 s8 temp_low[3]; /* Register value */
273 u8 sensor; /* Register value */ 273 u8 sensor; /* Register value */
274 u8 fan_div[3]; /* Register encoding, shifted right */ 274 u8 fan_div[3]; /* Register encoding, shifted right */
275 u8 vid; /* Register encoding, combined */ 275 u8 vid; /* Register encoding, combined */
diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c
index 96a701866726..1aff7575799d 100644
--- a/drivers/hwmon/lm90.c
+++ b/drivers/hwmon/lm90.c
@@ -32,10 +32,10 @@
32 * supported by this driver. These chips lack the remote temperature 32 * supported by this driver. These chips lack the remote temperature
33 * offset feature. 33 * offset feature.
34 * 34 *
35 * This driver also supports the MAX6646, MAX6647 and MAX6649 chips 35 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
36 * made by Maxim. These are again similar to the LM86, but they use 36 * MAX6692 chips made by Maxim. These are again similar to the LM86,
37 * unsigned temperature values and can report temperatures from 0 to 37 * but they use unsigned temperature values and can report temperatures
38 * 145 degrees. 38 * from 0 to 145 degrees.
39 * 39 *
40 * This driver also supports the MAX6680 and MAX6681, two other sensor 40 * This driver also supports the MAX6680 and MAX6681, two other sensor
41 * chips made by Maxim. These are quite similar to the other Maxim 41 * chips made by Maxim. These are quite similar to the other Maxim
diff --git a/drivers/ide/ide-atapi.c b/drivers/ide/ide-atapi.c
index e96c01260598..e9d042dba0e0 100644
--- a/drivers/ide/ide-atapi.c
+++ b/drivers/ide/ide-atapi.c
@@ -140,6 +140,12 @@ static void ide_queue_pc_head(ide_drive_t *drive, struct gendisk *disk,
140 rq->cmd_flags |= REQ_PREEMPT; 140 rq->cmd_flags |= REQ_PREEMPT;
141 rq->buffer = (char *)pc; 141 rq->buffer = (char *)pc;
142 rq->rq_disk = disk; 142 rq->rq_disk = disk;
143
144 if (pc->req_xfer) {
145 rq->data = pc->buf;
146 rq->data_len = pc->req_xfer;
147 }
148
143 memcpy(rq->cmd, pc->c, 12); 149 memcpy(rq->cmd, pc->c, 12);
144 if (drive->media == ide_tape) 150 if (drive->media == ide_tape)
145 rq->cmd[13] = REQ_IDETAPE_PC1; 151 rq->cmd[13] = REQ_IDETAPE_PC1;
@@ -159,6 +165,12 @@ int ide_queue_pc_tail(ide_drive_t *drive, struct gendisk *disk,
159 rq = blk_get_request(drive->queue, READ, __GFP_WAIT); 165 rq = blk_get_request(drive->queue, READ, __GFP_WAIT);
160 rq->cmd_type = REQ_TYPE_SPECIAL; 166 rq->cmd_type = REQ_TYPE_SPECIAL;
161 rq->buffer = (char *)pc; 167 rq->buffer = (char *)pc;
168
169 if (pc->req_xfer) {
170 rq->data = pc->buf;
171 rq->data_len = pc->req_xfer;
172 }
173
162 memcpy(rq->cmd, pc->c, 12); 174 memcpy(rq->cmd, pc->c, 12);
163 if (drive->media == ide_tape) 175 if (drive->media == ide_tape)
164 rq->cmd[13] = REQ_IDETAPE_PC1; 176 rq->cmd[13] = REQ_IDETAPE_PC1;
diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c
index 72ebab0bc755..059c90bb5ad2 100644
--- a/drivers/ide/ide-dma.c
+++ b/drivers/ide/ide-dma.c
@@ -128,6 +128,7 @@ int ide_build_sglist(ide_drive_t *drive, struct request *rq)
128{ 128{
129 ide_hwif_t *hwif = drive->hwif; 129 ide_hwif_t *hwif = drive->hwif;
130 struct scatterlist *sg = hwif->sg_table; 130 struct scatterlist *sg = hwif->sg_table;
131 int i;
131 132
132 ide_map_sg(drive, rq); 133 ide_map_sg(drive, rq);
133 134
@@ -136,8 +137,13 @@ int ide_build_sglist(ide_drive_t *drive, struct request *rq)
136 else 137 else
137 hwif->sg_dma_direction = DMA_TO_DEVICE; 138 hwif->sg_dma_direction = DMA_TO_DEVICE;
138 139
139 return dma_map_sg(hwif->dev, sg, hwif->sg_nents, 140 i = dma_map_sg(hwif->dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
140 hwif->sg_dma_direction); 141 if (i) {
142 hwif->orig_sg_nents = hwif->sg_nents;
143 hwif->sg_nents = i;
144 }
145
146 return i;
141} 147}
142EXPORT_SYMBOL_GPL(ide_build_sglist); 148EXPORT_SYMBOL_GPL(ide_build_sglist);
143 149
@@ -156,7 +162,7 @@ void ide_destroy_dmatable(ide_drive_t *drive)
156{ 162{
157 ide_hwif_t *hwif = drive->hwif; 163 ide_hwif_t *hwif = drive->hwif;
158 164
159 dma_unmap_sg(hwif->dev, hwif->sg_table, hwif->sg_nents, 165 dma_unmap_sg(hwif->dev, hwif->sg_table, hwif->orig_sg_nents,
160 hwif->sg_dma_direction); 166 hwif->sg_dma_direction);
161} 167}
162EXPORT_SYMBOL_GPL(ide_destroy_dmatable); 168EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
diff --git a/drivers/ide/ide-floppy.c b/drivers/ide/ide-floppy.c
index 3eab1c6c9b31..317ec62c33d4 100644
--- a/drivers/ide/ide-floppy.c
+++ b/drivers/ide/ide-floppy.c
@@ -327,8 +327,10 @@ static ide_startstop_t ide_floppy_do_request(ide_drive_t *drive,
327 return ide_stopped; 327 return ide_stopped;
328 } 328 }
329 329
330 ide_init_sg_cmd(drive, rq); 330 if (blk_fs_request(rq) || pc->req_xfer) {
331 ide_map_sg(drive, rq); 331 ide_init_sg_cmd(drive, rq);
332 ide_map_sg(drive, rq);
333 }
332 334
333 pc->sg = hwif->sg_table; 335 pc->sg = hwif->sg_table;
334 pc->sg_cnt = hwif->sg_nents; 336 pc->sg_cnt = hwif->sg_nents;
diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c
index a01b4488208b..4a65b96db2c8 100644
--- a/drivers/infiniband/hw/nes/nes_cm.c
+++ b/drivers/infiniband/hw/nes/nes_cm.c
@@ -2490,12 +2490,14 @@ static int nes_disconnect(struct nes_qp *nesqp, int abrupt)
2490 int ret = 0; 2490 int ret = 0;
2491 struct nes_vnic *nesvnic; 2491 struct nes_vnic *nesvnic;
2492 struct nes_device *nesdev; 2492 struct nes_device *nesdev;
2493 struct nes_ib_device *nesibdev;
2493 2494
2494 nesvnic = to_nesvnic(nesqp->ibqp.device); 2495 nesvnic = to_nesvnic(nesqp->ibqp.device);
2495 if (!nesvnic) 2496 if (!nesvnic)
2496 return -EINVAL; 2497 return -EINVAL;
2497 2498
2498 nesdev = nesvnic->nesdev; 2499 nesdev = nesvnic->nesdev;
2500 nesibdev = nesvnic->nesibdev;
2499 2501
2500 nes_debug(NES_DBG_CM, "netdev refcnt = %u.\n", 2502 nes_debug(NES_DBG_CM, "netdev refcnt = %u.\n",
2501 atomic_read(&nesvnic->netdev->refcnt)); 2503 atomic_read(&nesvnic->netdev->refcnt));
@@ -2507,6 +2509,8 @@ static int nes_disconnect(struct nes_qp *nesqp, int abrupt)
2507 } else { 2509 } else {
2508 /* Need to free the Last Streaming Mode Message */ 2510 /* Need to free the Last Streaming Mode Message */
2509 if (nesqp->ietf_frame) { 2511 if (nesqp->ietf_frame) {
2512 if (nesqp->lsmm_mr)
2513 nesibdev->ibdev.dereg_mr(nesqp->lsmm_mr);
2510 pci_free_consistent(nesdev->pcidev, 2514 pci_free_consistent(nesdev->pcidev,
2511 nesqp->private_data_len+sizeof(struct ietf_mpa_frame), 2515 nesqp->private_data_len+sizeof(struct ietf_mpa_frame),
2512 nesqp->ietf_frame, nesqp->ietf_frame_pbase); 2516 nesqp->ietf_frame, nesqp->ietf_frame_pbase);
@@ -2543,6 +2547,12 @@ int nes_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
2543 u32 crc_value; 2547 u32 crc_value;
2544 int ret; 2548 int ret;
2545 int passive_state; 2549 int passive_state;
2550 struct nes_ib_device *nesibdev;
2551 struct ib_mr *ibmr = NULL;
2552 struct ib_phys_buf ibphysbuf;
2553 struct nes_pd *nespd;
2554
2555
2546 2556
2547 ibqp = nes_get_qp(cm_id->device, conn_param->qpn); 2557 ibqp = nes_get_qp(cm_id->device, conn_param->qpn);
2548 if (!ibqp) 2558 if (!ibqp)
@@ -2601,6 +2611,26 @@ int nes_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
2601 if (cm_id->remote_addr.sin_addr.s_addr != 2611 if (cm_id->remote_addr.sin_addr.s_addr !=
2602 cm_id->local_addr.sin_addr.s_addr) { 2612 cm_id->local_addr.sin_addr.s_addr) {
2603 u64temp = (unsigned long)nesqp; 2613 u64temp = (unsigned long)nesqp;
2614 nesibdev = nesvnic->nesibdev;
2615 nespd = nesqp->nespd;
2616 ibphysbuf.addr = nesqp->ietf_frame_pbase;
2617 ibphysbuf.size = conn_param->private_data_len +
2618 sizeof(struct ietf_mpa_frame);
2619 ibmr = nesibdev->ibdev.reg_phys_mr((struct ib_pd *)nespd,
2620 &ibphysbuf, 1,
2621 IB_ACCESS_LOCAL_WRITE,
2622 (u64 *)&nesqp->ietf_frame);
2623 if (!ibmr) {
2624 nes_debug(NES_DBG_CM, "Unable to register memory region"
2625 "for lSMM for cm_node = %p \n",
2626 cm_node);
2627 return -ENOMEM;
2628 }
2629
2630 ibmr->pd = &nespd->ibpd;
2631 ibmr->device = nespd->ibpd.device;
2632 nesqp->lsmm_mr = ibmr;
2633
2604 u64temp |= NES_SW_CONTEXT_ALIGN>>1; 2634 u64temp |= NES_SW_CONTEXT_ALIGN>>1;
2605 set_wqe_64bit_value(wqe->wqe_words, 2635 set_wqe_64bit_value(wqe->wqe_words,
2606 NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX, 2636 NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX,
@@ -2611,14 +2641,13 @@ int nes_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
2611 wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX] = 2641 wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX] =
2612 cpu_to_le32(conn_param->private_data_len + 2642 cpu_to_le32(conn_param->private_data_len +
2613 sizeof(struct ietf_mpa_frame)); 2643 sizeof(struct ietf_mpa_frame));
2614 wqe->wqe_words[NES_IWARP_SQ_WQE_FRAG0_LOW_IDX] = 2644 set_wqe_64bit_value(wqe->wqe_words,
2615 cpu_to_le32((u32)nesqp->ietf_frame_pbase); 2645 NES_IWARP_SQ_WQE_FRAG0_LOW_IDX,
2616 wqe->wqe_words[NES_IWARP_SQ_WQE_FRAG0_HIGH_IDX] = 2646 (u64)nesqp->ietf_frame);
2617 cpu_to_le32((u32)((u64)nesqp->ietf_frame_pbase >> 32));
2618 wqe->wqe_words[NES_IWARP_SQ_WQE_LENGTH0_IDX] = 2647 wqe->wqe_words[NES_IWARP_SQ_WQE_LENGTH0_IDX] =
2619 cpu_to_le32(conn_param->private_data_len + 2648 cpu_to_le32(conn_param->private_data_len +
2620 sizeof(struct ietf_mpa_frame)); 2649 sizeof(struct ietf_mpa_frame));
2621 wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = 0; 2650 wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = ibmr->lkey;
2622 2651
2623 nesqp->nesqp_context->ird_ord_sizes |= 2652 nesqp->nesqp_context->ird_ord_sizes |=
2624 cpu_to_le32(NES_QPCONTEXT_ORDIRD_LSMM_PRESENT | 2653 cpu_to_le32(NES_QPCONTEXT_ORDIRD_LSMM_PRESENT |
diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c
index 4fdb72454f94..d93a6562817c 100644
--- a/drivers/infiniband/hw/nes/nes_verbs.c
+++ b/drivers/infiniband/hw/nes/nes_verbs.c
@@ -1360,8 +1360,10 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd,
1360 NES_QPCONTEXT_MISC_RQ_SIZE_SHIFT); 1360 NES_QPCONTEXT_MISC_RQ_SIZE_SHIFT);
1361 nesqp->nesqp_context->misc |= cpu_to_le32((u32)nesqp->hwqp.sq_encoded_size << 1361 nesqp->nesqp_context->misc |= cpu_to_le32((u32)nesqp->hwqp.sq_encoded_size <<
1362 NES_QPCONTEXT_MISC_SQ_SIZE_SHIFT); 1362 NES_QPCONTEXT_MISC_SQ_SIZE_SHIFT);
1363 if (!udata) {
1363 nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_PRIV_EN); 1364 nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_PRIV_EN);
1364 nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_FAST_REGISTER_EN); 1365 nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_FAST_REGISTER_EN);
1366 }
1365 nesqp->nesqp_context->cqs = cpu_to_le32(nesqp->nesscq->hw_cq.cq_number + 1367 nesqp->nesqp_context->cqs = cpu_to_le32(nesqp->nesscq->hw_cq.cq_number +
1366 ((u32)nesqp->nesrcq->hw_cq.cq_number << 16)); 1368 ((u32)nesqp->nesrcq->hw_cq.cq_number << 16));
1367 u64temp = (u64)nesqp->hwqp.sq_pbase; 1369 u64temp = (u64)nesqp->hwqp.sq_pbase;
diff --git a/drivers/infiniband/hw/nes/nes_verbs.h b/drivers/infiniband/hw/nes/nes_verbs.h
index 6c6b4da5184f..ae0ca9bc83bd 100644
--- a/drivers/infiniband/hw/nes/nes_verbs.h
+++ b/drivers/infiniband/hw/nes/nes_verbs.h
@@ -134,6 +134,7 @@ struct nes_qp {
134 struct ietf_mpa_frame *ietf_frame; 134 struct ietf_mpa_frame *ietf_frame;
135 dma_addr_t ietf_frame_pbase; 135 dma_addr_t ietf_frame_pbase;
136 wait_queue_head_t state_waitq; 136 wait_queue_head_t state_waitq;
137 struct ib_mr *lsmm_mr;
137 unsigned long socket; 138 unsigned long socket;
138 struct nes_hw_qp hwqp; 139 struct nes_hw_qp hwqp;
139 struct work_struct work; 140 struct work_struct work;
diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c
index 35bda49796fb..bfefd079a955 100644
--- a/drivers/md/dm-crypt.c
+++ b/drivers/md/dm-crypt.c
@@ -60,6 +60,7 @@ struct dm_crypt_io {
60}; 60};
61 61
62struct dm_crypt_request { 62struct dm_crypt_request {
63 struct convert_context *ctx;
63 struct scatterlist sg_in; 64 struct scatterlist sg_in;
64 struct scatterlist sg_out; 65 struct scatterlist sg_out;
65}; 66};
@@ -335,6 +336,18 @@ static void crypt_convert_init(struct crypt_config *cc,
335 init_completion(&ctx->restart); 336 init_completion(&ctx->restart);
336} 337}
337 338
339static struct dm_crypt_request *dmreq_of_req(struct crypt_config *cc,
340 struct ablkcipher_request *req)
341{
342 return (struct dm_crypt_request *)((char *)req + cc->dmreq_start);
343}
344
345static struct ablkcipher_request *req_of_dmreq(struct crypt_config *cc,
346 struct dm_crypt_request *dmreq)
347{
348 return (struct ablkcipher_request *)((char *)dmreq - cc->dmreq_start);
349}
350
338static int crypt_convert_block(struct crypt_config *cc, 351static int crypt_convert_block(struct crypt_config *cc,
339 struct convert_context *ctx, 352 struct convert_context *ctx,
340 struct ablkcipher_request *req) 353 struct ablkcipher_request *req)
@@ -345,10 +358,11 @@ static int crypt_convert_block(struct crypt_config *cc,
345 u8 *iv; 358 u8 *iv;
346 int r = 0; 359 int r = 0;
347 360
348 dmreq = (struct dm_crypt_request *)((char *)req + cc->dmreq_start); 361 dmreq = dmreq_of_req(cc, req);
349 iv = (u8 *)ALIGN((unsigned long)(dmreq + 1), 362 iv = (u8 *)ALIGN((unsigned long)(dmreq + 1),
350 crypto_ablkcipher_alignmask(cc->tfm) + 1); 363 crypto_ablkcipher_alignmask(cc->tfm) + 1);
351 364
365 dmreq->ctx = ctx;
352 sg_init_table(&dmreq->sg_in, 1); 366 sg_init_table(&dmreq->sg_in, 1);
353 sg_set_page(&dmreq->sg_in, bv_in->bv_page, 1 << SECTOR_SHIFT, 367 sg_set_page(&dmreq->sg_in, bv_in->bv_page, 1 << SECTOR_SHIFT,
354 bv_in->bv_offset + ctx->offset_in); 368 bv_in->bv_offset + ctx->offset_in);
@@ -395,8 +409,9 @@ static void crypt_alloc_req(struct crypt_config *cc,
395 cc->req = mempool_alloc(cc->req_pool, GFP_NOIO); 409 cc->req = mempool_alloc(cc->req_pool, GFP_NOIO);
396 ablkcipher_request_set_tfm(cc->req, cc->tfm); 410 ablkcipher_request_set_tfm(cc->req, cc->tfm);
397 ablkcipher_request_set_callback(cc->req, CRYPTO_TFM_REQ_MAY_BACKLOG | 411 ablkcipher_request_set_callback(cc->req, CRYPTO_TFM_REQ_MAY_BACKLOG |
398 CRYPTO_TFM_REQ_MAY_SLEEP, 412 CRYPTO_TFM_REQ_MAY_SLEEP,
399 kcryptd_async_done, ctx); 413 kcryptd_async_done,
414 dmreq_of_req(cc, cc->req));
400} 415}
401 416
402/* 417/*
@@ -553,19 +568,22 @@ static void crypt_inc_pending(struct dm_crypt_io *io)
553static void crypt_dec_pending(struct dm_crypt_io *io) 568static void crypt_dec_pending(struct dm_crypt_io *io)
554{ 569{
555 struct crypt_config *cc = io->target->private; 570 struct crypt_config *cc = io->target->private;
571 struct bio *base_bio = io->base_bio;
572 struct dm_crypt_io *base_io = io->base_io;
573 int error = io->error;
556 574
557 if (!atomic_dec_and_test(&io->pending)) 575 if (!atomic_dec_and_test(&io->pending))
558 return; 576 return;
559 577
560 if (likely(!io->base_io)) 578 mempool_free(io, cc->io_pool);
561 bio_endio(io->base_bio, io->error); 579
580 if (likely(!base_io))
581 bio_endio(base_bio, error);
562 else { 582 else {
563 if (io->error && !io->base_io->error) 583 if (error && !base_io->error)
564 io->base_io->error = io->error; 584 base_io->error = error;
565 crypt_dec_pending(io->base_io); 585 crypt_dec_pending(base_io);
566 } 586 }
567
568 mempool_free(io, cc->io_pool);
569} 587}
570 588
571/* 589/*
@@ -821,7 +839,8 @@ static void kcryptd_crypt_read_convert(struct dm_crypt_io *io)
821static void kcryptd_async_done(struct crypto_async_request *async_req, 839static void kcryptd_async_done(struct crypto_async_request *async_req,
822 int error) 840 int error)
823{ 841{
824 struct convert_context *ctx = async_req->data; 842 struct dm_crypt_request *dmreq = async_req->data;
843 struct convert_context *ctx = dmreq->ctx;
825 struct dm_crypt_io *io = container_of(ctx, struct dm_crypt_io, ctx); 844 struct dm_crypt_io *io = container_of(ctx, struct dm_crypt_io, ctx);
826 struct crypt_config *cc = io->target->private; 845 struct crypt_config *cc = io->target->private;
827 846
@@ -830,7 +849,7 @@ static void kcryptd_async_done(struct crypto_async_request *async_req,
830 return; 849 return;
831 } 850 }
832 851
833 mempool_free(ablkcipher_request_cast(async_req), cc->req_pool); 852 mempool_free(req_of_dmreq(cc, dmreq), cc->req_pool);
834 853
835 if (!atomic_dec_and_test(&ctx->pending)) 854 if (!atomic_dec_and_test(&ctx->pending))
836 return; 855 return;
diff --git a/drivers/md/dm-io.c b/drivers/md/dm-io.c
index f14813be4eff..36e2b5e46a6b 100644
--- a/drivers/md/dm-io.c
+++ b/drivers/md/dm-io.c
@@ -292,6 +292,8 @@ static void do_region(int rw, unsigned region, struct dm_io_region *where,
292 (PAGE_SIZE >> SECTOR_SHIFT)); 292 (PAGE_SIZE >> SECTOR_SHIFT));
293 num_bvecs = 1 + min_t(int, bio_get_nr_vecs(where->bdev), 293 num_bvecs = 1 + min_t(int, bio_get_nr_vecs(where->bdev),
294 num_bvecs); 294 num_bvecs);
295 if (unlikely(num_bvecs > BIO_MAX_PAGES))
296 num_bvecs = BIO_MAX_PAGES;
295 bio = bio_alloc_bioset(GFP_NOIO, num_bvecs, io->client->bios); 297 bio = bio_alloc_bioset(GFP_NOIO, num_bvecs, io->client->bios);
296 bio->bi_sector = where->sector + (where->count - remaining); 298 bio->bi_sector = where->sector + (where->count - remaining);
297 bio->bi_bdev = where->bdev; 299 bio->bi_bdev = where->bdev;
diff --git a/drivers/md/dm-ioctl.c b/drivers/md/dm-ioctl.c
index 54d0588fc1f6..f01096549a93 100644
--- a/drivers/md/dm-ioctl.c
+++ b/drivers/md/dm-ioctl.c
@@ -704,7 +704,8 @@ static int dev_rename(struct dm_ioctl *param, size_t param_size)
704 char *new_name = (char *) param + param->data_start; 704 char *new_name = (char *) param + param->data_start;
705 705
706 if (new_name < param->data || 706 if (new_name < param->data ||
707 invalid_str(new_name, (void *) param + param_size)) { 707 invalid_str(new_name, (void *) param + param_size) ||
708 strlen(new_name) > DM_NAME_LEN - 1) {
708 DMWARN("Invalid new logical volume name supplied."); 709 DMWARN("Invalid new logical volume name supplied.");
709 return -EINVAL; 710 return -EINVAL;
710 } 711 }
@@ -1063,7 +1064,7 @@ static int table_load(struct dm_ioctl *param, size_t param_size)
1063 1064
1064 r = populate_table(t, param, param_size); 1065 r = populate_table(t, param, param_size);
1065 if (r) { 1066 if (r) {
1066 dm_table_put(t); 1067 dm_table_destroy(t);
1067 goto out; 1068 goto out;
1068 } 1069 }
1069 1070
@@ -1071,7 +1072,7 @@ static int table_load(struct dm_ioctl *param, size_t param_size)
1071 hc = dm_get_mdptr(md); 1072 hc = dm_get_mdptr(md);
1072 if (!hc || hc->md != md) { 1073 if (!hc || hc->md != md) {
1073 DMWARN("device has been removed from the dev hash table."); 1074 DMWARN("device has been removed from the dev hash table.");
1074 dm_table_put(t); 1075 dm_table_destroy(t);
1075 up_write(&_hash_lock); 1076 up_write(&_hash_lock);
1076 r = -ENXIO; 1077 r = -ENXIO;
1077 goto out; 1078 goto out;
diff --git a/drivers/md/dm.c b/drivers/md/dm.c
index 51ba1db4b3e7..8d40f27cce89 100644
--- a/drivers/md/dm.c
+++ b/drivers/md/dm.c
@@ -525,9 +525,12 @@ static int __noflush_suspending(struct mapped_device *md)
525static void dec_pending(struct dm_io *io, int error) 525static void dec_pending(struct dm_io *io, int error)
526{ 526{
527 unsigned long flags; 527 unsigned long flags;
528 int io_error;
529 struct bio *bio;
530 struct mapped_device *md = io->md;
528 531
529 /* Push-back supersedes any I/O errors */ 532 /* Push-back supersedes any I/O errors */
530 if (error && !(io->error > 0 && __noflush_suspending(io->md))) 533 if (error && !(io->error > 0 && __noflush_suspending(md)))
531 io->error = error; 534 io->error = error;
532 535
533 if (atomic_dec_and_test(&io->io_count)) { 536 if (atomic_dec_and_test(&io->io_count)) {
@@ -537,24 +540,27 @@ static void dec_pending(struct dm_io *io, int error)
537 * This must be handled before the sleeper on 540 * This must be handled before the sleeper on
538 * suspend queue merges the pushback list. 541 * suspend queue merges the pushback list.
539 */ 542 */
540 spin_lock_irqsave(&io->md->pushback_lock, flags); 543 spin_lock_irqsave(&md->pushback_lock, flags);
541 if (__noflush_suspending(io->md)) 544 if (__noflush_suspending(md))
542 bio_list_add(&io->md->pushback, io->bio); 545 bio_list_add(&md->pushback, io->bio);
543 else 546 else
544 /* noflush suspend was interrupted. */ 547 /* noflush suspend was interrupted. */
545 io->error = -EIO; 548 io->error = -EIO;
546 spin_unlock_irqrestore(&io->md->pushback_lock, flags); 549 spin_unlock_irqrestore(&md->pushback_lock, flags);
547 } 550 }
548 551
549 end_io_acct(io); 552 end_io_acct(io);
550 553
551 if (io->error != DM_ENDIO_REQUEUE) { 554 io_error = io->error;
552 trace_block_bio_complete(io->md->queue, io->bio); 555 bio = io->bio;
553 556
554 bio_endio(io->bio, io->error); 557 free_io(md, io);
555 } 558
559 if (io_error != DM_ENDIO_REQUEUE) {
560 trace_block_bio_complete(md->queue, bio);
556 561
557 free_io(io->md, io); 562 bio_endio(bio, io_error);
563 }
558 } 564 }
559} 565}
560 566
@@ -562,6 +568,7 @@ static void clone_endio(struct bio *bio, int error)
562{ 568{
563 int r = 0; 569 int r = 0;
564 struct dm_target_io *tio = bio->bi_private; 570 struct dm_target_io *tio = bio->bi_private;
571 struct dm_io *io = tio->io;
565 struct mapped_device *md = tio->io->md; 572 struct mapped_device *md = tio->io->md;
566 dm_endio_fn endio = tio->ti->type->end_io; 573 dm_endio_fn endio = tio->ti->type->end_io;
567 574
@@ -585,15 +592,14 @@ static void clone_endio(struct bio *bio, int error)
585 } 592 }
586 } 593 }
587 594
588 dec_pending(tio->io, error);
589
590 /* 595 /*
591 * Store md for cleanup instead of tio which is about to get freed. 596 * Store md for cleanup instead of tio which is about to get freed.
592 */ 597 */
593 bio->bi_private = md->bs; 598 bio->bi_private = md->bs;
594 599
595 bio_put(bio);
596 free_tio(md, tio); 600 free_tio(md, tio);
601 bio_put(bio);
602 dec_pending(io, error);
597} 603}
598 604
599static sector_t max_io_len(struct mapped_device *md, 605static sector_t max_io_len(struct mapped_device *md,
diff --git a/drivers/media/dvb/bt8xx/dst.c b/drivers/media/dvb/bt8xx/dst.c
index 29e8f1546ab6..fec1d77fa855 100644
--- a/drivers/media/dvb/bt8xx/dst.c
+++ b/drivers/media/dvb/bt8xx/dst.c
@@ -1683,7 +1683,7 @@ static int dst_tune_frontend(struct dvb_frontend* fe,
1683 1683
1684static int dst_get_tuning_algo(struct dvb_frontend *fe) 1684static int dst_get_tuning_algo(struct dvb_frontend *fe)
1685{ 1685{
1686 return dst_algo; 1686 return dst_algo ? DVBFE_ALGO_HW : DVBFE_ALGO_SW;
1687} 1687}
1688 1688
1689static int dst_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p) 1689static int dst_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.c b/drivers/media/dvb/dvb-core/dvb_frontend.c
index 843407785083..8dcb3fbf7acd 100644
--- a/drivers/media/dvb/dvb-core/dvb_frontend.c
+++ b/drivers/media/dvb/dvb-core/dvb_frontend.c
@@ -1290,9 +1290,6 @@ static int dtv_property_process_set(struct dvb_frontend *fe,
1290 dprintk("%s() Finalised property cache\n", __func__); 1290 dprintk("%s() Finalised property cache\n", __func__);
1291 dtv_property_cache_submit(fe); 1291 dtv_property_cache_submit(fe);
1292 1292
1293 /* Request the search algorithm to search */
1294 fepriv->algo_status |= DVBFE_ALGO_SEARCH_AGAIN;
1295
1296 r |= dvb_frontend_ioctl_legacy(inode, file, FE_SET_FRONTEND, 1293 r |= dvb_frontend_ioctl_legacy(inode, file, FE_SET_FRONTEND,
1297 &fepriv->parameters); 1294 &fepriv->parameters);
1298 break; 1295 break;
@@ -1717,6 +1714,10 @@ static int dvb_frontend_ioctl_legacy(struct inode *inode, struct file *file,
1717 fepriv->min_delay = (dvb_override_tune_delay * HZ) / 1000; 1714 fepriv->min_delay = (dvb_override_tune_delay * HZ) / 1000;
1718 1715
1719 fepriv->state = FESTATE_RETUNE; 1716 fepriv->state = FESTATE_RETUNE;
1717
1718 /* Request the search algorithm to search */
1719 fepriv->algo_status |= DVBFE_ALGO_SEARCH_AGAIN;
1720
1720 dvb_frontend_wakeup(fe); 1721 dvb_frontend_wakeup(fe);
1721 dvb_frontend_add_event(fe, 0); 1722 dvb_frontend_add_event(fe, 0);
1722 fepriv->status = 0; 1723 fepriv->status = 0;
diff --git a/drivers/media/dvb/frontends/stb0899_algo.c b/drivers/media/dvb/frontends/stb0899_algo.c
index a67d1775a43c..2da55ec20392 100644
--- a/drivers/media/dvb/frontends/stb0899_algo.c
+++ b/drivers/media/dvb/frontends/stb0899_algo.c
@@ -156,7 +156,7 @@ static void stb0899_first_subrange(struct stb0899_state *state)
156 } 156 }
157 157
158 if (range > 0) 158 if (range > 0)
159 internal->sub_range = MIN(internal->srch_range, range); 159 internal->sub_range = min(internal->srch_range, range);
160 else 160 else
161 internal->sub_range = 0; 161 internal->sub_range = 0;
162 162
@@ -185,7 +185,7 @@ static enum stb0899_status stb0899_check_tmg(struct stb0899_state *state)
185 timing = stb0899_read_reg(state, STB0899_RTF); 185 timing = stb0899_read_reg(state, STB0899_RTF);
186 186
187 if (lock >= 42) { 187 if (lock >= 42) {
188 if ((lock > 48) && (ABS(timing) >= 110)) { 188 if ((lock > 48) && (abs(timing) >= 110)) {
189 internal->status = ANALOGCARRIER; 189 internal->status = ANALOGCARRIER;
190 dprintk(state->verbose, FE_DEBUG, 1, "-->ANALOG Carrier !"); 190 dprintk(state->verbose, FE_DEBUG, 1, "-->ANALOG Carrier !");
191 } else { 191 } else {
@@ -222,7 +222,7 @@ static enum stb0899_status stb0899_search_tmg(struct stb0899_state *state)
222 index++; 222 index++;
223 derot_freq += index * internal->direction * derot_step; /* next derot zig zag position */ 223 derot_freq += index * internal->direction * derot_step; /* next derot zig zag position */
224 224
225 if (ABS(derot_freq) > derot_limit) 225 if (abs(derot_freq) > derot_limit)
226 next_loop--; 226 next_loop--;
227 227
228 if (next_loop) { 228 if (next_loop) {
@@ -298,7 +298,7 @@ static enum stb0899_status stb0899_search_carrier(struct stb0899_state *state)
298 last_derot_freq = derot_freq; 298 last_derot_freq = derot_freq;
299 derot_freq += index * internal->direction * internal->derot_step; /* next zig zag derotator position */ 299 derot_freq += index * internal->direction * internal->derot_step; /* next zig zag derotator position */
300 300
301 if(ABS(derot_freq) > derot_limit) 301 if(abs(derot_freq) > derot_limit)
302 next_loop--; 302 next_loop--;
303 303
304 if (next_loop) { 304 if (next_loop) {
@@ -400,7 +400,7 @@ static enum stb0899_status stb0899_search_data(struct stb0899_state *state)
400 if ((internal->status != CARRIEROK) || (stb0899_check_data(state) != DATAOK)) { 400 if ((internal->status != CARRIEROK) || (stb0899_check_data(state) != DATAOK)) {
401 401
402 derot_freq += index * internal->direction * derot_step; /* next zig zag derotator position */ 402 derot_freq += index * internal->direction * derot_step; /* next zig zag derotator position */
403 if (ABS(derot_freq) > derot_limit) 403 if (abs(derot_freq) > derot_limit)
404 next_loop--; 404 next_loop--;
405 405
406 if (next_loop) { 406 if (next_loop) {
@@ -467,7 +467,7 @@ static void next_sub_range(struct stb0899_state *state)
467 467
468 if (internal->sub_dir > 0) { 468 if (internal->sub_dir > 0) {
469 old_sub_range = internal->sub_range; 469 old_sub_range = internal->sub_range;
470 internal->sub_range = MIN((internal->srch_range / 2) - 470 internal->sub_range = min((internal->srch_range / 2) -
471 (internal->tuner_offst + internal->sub_range / 2), 471 (internal->tuner_offst + internal->sub_range / 2),
472 internal->sub_range); 472 internal->sub_range);
473 473
@@ -771,7 +771,7 @@ static long Log2Int(int number)
771 int i; 771 int i;
772 772
773 i = 0; 773 i = 0;
774 while ((1 << i) <= ABS(number)) 774 while ((1 << i) <= abs(number))
775 i++; 775 i++;
776 776
777 if (number == 0) 777 if (number == 0)
diff --git a/drivers/media/dvb/frontends/stb0899_drv.c b/drivers/media/dvb/frontends/stb0899_drv.c
index 10613acf18f5..a04c782fff8d 100644
--- a/drivers/media/dvb/frontends/stb0899_drv.c
+++ b/drivers/media/dvb/frontends/stb0899_drv.c
@@ -794,7 +794,7 @@ static int stb0899_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t
794 reg = stb0899_read_reg(state, STB0899_DISCNTRL1); 794 reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
795 old_state = reg; 795 old_state = reg;
796 /* set to burst mode */ 796 /* set to burst mode */
797 STB0899_SETFIELD_VAL(DISEQCMODE, reg, 0x02); 797 STB0899_SETFIELD_VAL(DISEQCMODE, reg, 0x03);
798 STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x01); 798 STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x01);
799 stb0899_write_reg(state, STB0899_DISCNTRL1, reg); 799 stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
800 switch (burst) { 800 switch (burst) {
diff --git a/drivers/media/dvb/frontends/stb0899_priv.h b/drivers/media/dvb/frontends/stb0899_priv.h
index 24619e3689db..82395b912815 100644
--- a/drivers/media/dvb/frontends/stb0899_priv.h
+++ b/drivers/media/dvb/frontends/stb0899_priv.h
@@ -59,10 +59,6 @@
59#define MAKEWORD32(a, b, c, d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d)) 59#define MAKEWORD32(a, b, c, d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d))
60#define MAKEWORD16(a, b) (((a) << 8) | (b)) 60#define MAKEWORD16(a, b) (((a) << 8) | (b))
61 61
62#define MIN(x, y) ((x) <= (y) ? (x) : (y))
63#define MAX(x, y) ((x) >= (y) ? (x) : (y))
64#define ABS(x) ((x) >= 0 ? (x) : -(x))
65
66#define LSB(x) ((x & 0xff)) 62#define LSB(x) ((x & 0xff))
67#define MSB(y) ((y >> 8) & 0xff) 63#define MSB(y) ((y >> 8) & 0xff)
68 64
@@ -168,10 +164,10 @@ struct stb0899_internal {
168 u32 freq; /* Demod internal Frequency */ 164 u32 freq; /* Demod internal Frequency */
169 u32 srate; /* Demod internal Symbol rate */ 165 u32 srate; /* Demod internal Symbol rate */
170 enum stb0899_fec fecrate; /* Demod internal FEC rate */ 166 enum stb0899_fec fecrate; /* Demod internal FEC rate */
171 u32 srch_range; /* Demod internal Search Range */ 167 s32 srch_range; /* Demod internal Search Range */
172 u32 sub_range; /* Demod current sub range (Hz) */ 168 s32 sub_range; /* Demod current sub range (Hz) */
173 u32 tuner_step; /* Tuner step (Hz) */ 169 s32 tuner_step; /* Tuner step (Hz) */
174 u32 tuner_offst; /* Relative offset to carrier (Hz) */ 170 s32 tuner_offst; /* Relative offset to carrier (Hz) */
175 u32 tuner_bw; /* Current bandwidth of the tuner (Hz) */ 171 u32 tuner_bw; /* Current bandwidth of the tuner (Hz) */
176 172
177 s32 mclk; /* Masterclock Divider factor (binary) */ 173 s32 mclk; /* Masterclock Divider factor (binary) */
diff --git a/drivers/media/dvb/frontends/stb6100.c b/drivers/media/dvb/frontends/stb6100.c
index ff39275ab49c..1ed5a7db4c5e 100644
--- a/drivers/media/dvb/frontends/stb6100.c
+++ b/drivers/media/dvb/frontends/stb6100.c
@@ -427,11 +427,11 @@ static int stb6100_init(struct dvb_frontend *fe)
427 status->refclock = 27000000; /* Hz */ 427 status->refclock = 27000000; /* Hz */
428 status->iqsense = 1; 428 status->iqsense = 1;
429 status->bandwidth = 36000; /* kHz */ 429 status->bandwidth = 36000; /* kHz */
430 state->bandwidth = status->bandwidth * 1000; /* MHz */ 430 state->bandwidth = status->bandwidth * 1000; /* Hz */
431 state->reference = status->refclock / 1000; /* kHz */ 431 state->reference = status->refclock / 1000; /* kHz */
432 432
433 /* Set default bandwidth. */ 433 /* Set default bandwidth. */
434 return stb6100_set_bandwidth(fe, status->bandwidth); 434 return stb6100_set_bandwidth(fe, state->bandwidth);
435} 435}
436 436
437static int stb6100_get_state(struct dvb_frontend *fe, 437static int stb6100_get_state(struct dvb_frontend *fe,
diff --git a/drivers/media/dvb/frontends/zl10353.c b/drivers/media/dvb/frontends/zl10353.c
index 170720b02815..b150ed306696 100644
--- a/drivers/media/dvb/frontends/zl10353.c
+++ b/drivers/media/dvb/frontends/zl10353.c
@@ -590,7 +590,7 @@ static int zl10353_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
590 struct zl10353_state *state = fe->demodulator_priv; 590 struct zl10353_state *state = fe->demodulator_priv;
591 u8 val = 0x0a; 591 u8 val = 0x0a;
592 592
593 if (state->config.no_tuner) { 593 if (state->config.disable_i2c_gate_ctrl) {
594 /* No tuner attached to the internal I2C bus */ 594 /* No tuner attached to the internal I2C bus */
595 /* If set enable I2C bridge, the main I2C bus stopped hardly */ 595 /* If set enable I2C bridge, the main I2C bus stopped hardly */
596 return 0; 596 return 0;
diff --git a/drivers/media/dvb/frontends/zl10353.h b/drivers/media/dvb/frontends/zl10353.h
index fdbb88ff75fe..2287bac46243 100644
--- a/drivers/media/dvb/frontends/zl10353.h
+++ b/drivers/media/dvb/frontends/zl10353.h
@@ -38,6 +38,9 @@ struct zl10353_config
38 38
39 /* set if parallel ts output is required */ 39 /* set if parallel ts output is required */
40 int parallel_ts; 40 int parallel_ts;
41
42 /* set if i2c_gate_ctrl disable is required */
43 u8 disable_i2c_gate_ctrl:1;
41}; 44};
42 45
43#if defined(CONFIG_DVB_ZL10353) || (defined(CONFIG_DVB_ZL10353_MODULE) && defined(MODULE)) 46#if defined(CONFIG_DVB_ZL10353) || (defined(CONFIG_DVB_ZL10353_MODULE) && defined(MODULE))
diff --git a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
index e564a61a72d7..48892b5715d5 100644
--- a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
+++ b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
@@ -102,7 +102,11 @@ int s5k4aa_probe(struct sd *sd)
102 } 102 }
103 103
104 /* Test some registers, but we don't know their exact meaning yet */ 104 /* Test some registers, but we don't know their exact meaning yet */
105 if (m5602_read_sensor(sd, 0x00, prod_id, sizeof(prod_id))) 105 if (m5602_read_sensor(sd, 0x00, prod_id, 2))
106 return -ENODEV;
107 if (m5602_read_sensor(sd, 0x02, prod_id+2, 2))
108 return -ENODEV;
109 if (m5602_read_sensor(sd, 0x04, prod_id+4, 2))
106 return -ENODEV; 110 return -ENODEV;
107 111
108 if (memcmp(prod_id, expected_prod_id, sizeof(prod_id))) 112 if (memcmp(prod_id, expected_prod_id, sizeof(prod_id)))
diff --git a/drivers/media/video/saa7134/saa7134-dvb.c b/drivers/media/video/saa7134/saa7134-dvb.c
index 0776ecf56d27..b5370b3e1a3d 100644
--- a/drivers/media/video/saa7134/saa7134-dvb.c
+++ b/drivers/media/video/saa7134/saa7134-dvb.c
@@ -860,6 +860,7 @@ static struct zl10353_config behold_h6_config = {
860 .demod_address = 0x1e>>1, 860 .demod_address = 0x1e>>1,
861 .no_tuner = 1, 861 .no_tuner = 1,
862 .parallel_ts = 1, 862 .parallel_ts = 1,
863 .disable_i2c_gate_ctrl = 1,
863}; 864};
864 865
865/* ================================================================== 866/* ==================================================================
diff --git a/drivers/media/video/tvaudio.c b/drivers/media/video/tvaudio.c
index 5aeccb301cea..076ed5bf48b1 100644
--- a/drivers/media/video/tvaudio.c
+++ b/drivers/media/video/tvaudio.c
@@ -54,7 +54,7 @@ MODULE_LICENSE("GPL");
54/* ---------------------------------------------------------------------- */ 54/* ---------------------------------------------------------------------- */
55/* our structs */ 55/* our structs */
56 56
57#define MAXREGS 64 57#define MAXREGS 256
58 58
59struct CHIPSTATE; 59struct CHIPSTATE;
60typedef int (*getvalue)(int); 60typedef int (*getvalue)(int);
diff --git a/drivers/media/video/zoran/Kconfig b/drivers/media/video/zoran/Kconfig
index 4ea5fa71de89..8666e19f31a7 100644
--- a/drivers/media/video/zoran/Kconfig
+++ b/drivers/media/video/zoran/Kconfig
@@ -68,6 +68,7 @@ config VIDEO_ZORAN_AVS6EYES
68 tristate "AverMedia 6 Eyes support (EXPERIMENTAL)" 68 tristate "AverMedia 6 Eyes support (EXPERIMENTAL)"
69 depends on VIDEO_ZORAN_ZR36060 && EXPERIMENTAL && VIDEO_V4L1 69 depends on VIDEO_ZORAN_ZR36060 && EXPERIMENTAL && VIDEO_V4L1
70 select VIDEO_BT856 if VIDEO_HELPER_CHIPS_AUTO 70 select VIDEO_BT856 if VIDEO_HELPER_CHIPS_AUTO
71 select VIDEO_BT866 if VIDEO_HELPER_CHIPS_AUTO
71 select VIDEO_KS0127 if VIDEO_HELPER_CHIPS_AUTO 72 select VIDEO_KS0127 if VIDEO_HELPER_CHIPS_AUTO
72 help 73 help
73 Support for the AverMedia 6 Eyes video surveillance card. 74 Support for the AverMedia 6 Eyes video surveillance card.
diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c
index 84d5ea1ec171..b457a05b28d9 100644
--- a/drivers/mfd/wm8350-core.c
+++ b/drivers/mfd/wm8350-core.c
@@ -1383,6 +1383,11 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq,
1383 wm8350->power.rev_g_coeff = 1; 1383 wm8350->power.rev_g_coeff = 1;
1384 break; 1384 break;
1385 1385
1386 case 1:
1387 dev_info(wm8350->dev, "WM8351 Rev B\n");
1388 wm8350->power.rev_g_coeff = 1;
1389 break;
1390
1386 default: 1391 default:
1387 dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n"); 1392 dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
1388 ret = -ENODEV; 1393 ret = -ENODEV;
diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c
index f4a67c65d301..2db166b7096f 100644
--- a/drivers/mmc/host/s3cmci.c
+++ b/drivers/mmc/host/s3cmci.c
@@ -793,8 +793,7 @@ static void s3cmci_dma_setup(struct s3cmci_host *host,
793 host->mem->start + host->sdidata); 793 host->mem->start + host->sdidata);
794 794
795 if (!setup_ok) { 795 if (!setup_ok) {
796 s3c2410_dma_config(host->dma, 4, 796 s3c2410_dma_config(host->dma, 4, 0);
797 (S3C2410_DCON_HWTRIG | S3C2410_DCON_CH0_SDI));
798 s3c2410_dma_set_buffdone_fn(host->dma, 797 s3c2410_dma_set_buffdone_fn(host->dma,
799 s3cmci_dma_done_callback); 798 s3cmci_dma_done_callback);
800 s3c2410_dma_setflags(host->dma, S3C2410_DMAF_AUTOSTART); 799 s3c2410_dma_setflags(host->dma, S3C2410_DMAF_AUTOSTART);
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index a2f185fd7072..435e2e3a82c8 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1040,6 +1040,17 @@ config NI65
1040 To compile this driver as a module, choose M here. The module 1040 To compile this driver as a module, choose M here. The module
1041 will be called ni65. 1041 will be called ni65.
1042 1042
1043config DNET
1044 tristate "Dave ethernet support (DNET)"
1045 depends on NET_ETHERNET
1046 select PHYLIB
1047 help
1048 The Dave ethernet interface (DNET) is found on Qong Board FPGA.
1049 Say Y to include support for the DNET chip.
1050
1051 To compile this driver as a module, choose M here: the module
1052 will be called dnet.
1053
1043source "drivers/net/tulip/Kconfig" 1054source "drivers/net/tulip/Kconfig"
1044 1055
1045config AT1700 1056config AT1700
@@ -2619,6 +2630,8 @@ config QLGE
2619 2630
2620source "drivers/net/sfc/Kconfig" 2631source "drivers/net/sfc/Kconfig"
2621 2632
2633source "drivers/net/benet/Kconfig"
2634
2622endif # NETDEV_10000 2635endif # NETDEV_10000
2623 2636
2624source "drivers/net/tokenring/Kconfig" 2637source "drivers/net/tokenring/Kconfig"
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index aca8492db654..471baaff229f 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_GIANFAR) += gianfar_driver.o
22obj-$(CONFIG_TEHUTI) += tehuti.o 22obj-$(CONFIG_TEHUTI) += tehuti.o
23obj-$(CONFIG_ENIC) += enic/ 23obj-$(CONFIG_ENIC) += enic/
24obj-$(CONFIG_JME) += jme.o 24obj-$(CONFIG_JME) += jme.o
25obj-$(CONFIG_BE2NET) += benet/
25 26
26gianfar_driver-objs := gianfar.o \ 27gianfar_driver-objs := gianfar.o \
27 gianfar_ethtool.o \ 28 gianfar_ethtool.o \
@@ -231,6 +232,7 @@ obj-$(CONFIG_ENC28J60) += enc28j60.o
231 232
232obj-$(CONFIG_XTENSA_XT2000_SONIC) += xtsonic.o 233obj-$(CONFIG_XTENSA_XT2000_SONIC) += xtsonic.o
233 234
235obj-$(CONFIG_DNET) += dnet.o
234obj-$(CONFIG_MACB) += macb.o 236obj-$(CONFIG_MACB) += macb.o
235 237
236obj-$(CONFIG_ARM) += arm/ 238obj-$(CONFIG_ARM) += arm/
diff --git a/drivers/net/benet/Kconfig b/drivers/net/benet/Kconfig
new file mode 100644
index 000000000000..c6934f179c09
--- /dev/null
+++ b/drivers/net/benet/Kconfig
@@ -0,0 +1,7 @@
1config BE2NET
2 tristate "ServerEngines' 10Gbps NIC - BladeEngine 2"
3 depends on PCI && INET
4 select INET_LRO
5 help
6 This driver implements the NIC functionality for ServerEngines'
7 10Gbps network adapter - BladeEngine 2.
diff --git a/drivers/net/benet/Makefile b/drivers/net/benet/Makefile
new file mode 100644
index 000000000000..a60cd8051135
--- /dev/null
+++ b/drivers/net/benet/Makefile
@@ -0,0 +1,7 @@
1#
2# Makefile to build the network driver for ServerEngine's BladeEngine.
3#
4
5obj-$(CONFIG_BE2NET) += be2net.o
6
7be2net-y := be_main.o be_cmds.o be_ethtool.o
diff --git a/drivers/net/benet/be.h b/drivers/net/benet/be.h
new file mode 100644
index 000000000000..63d593d53153
--- /dev/null
+++ b/drivers/net/benet/be.h
@@ -0,0 +1,327 @@
1/*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#ifndef BE_H
19#define BE_H
20
21#include <linux/pci.h>
22#include <linux/etherdevice.h>
23#include <linux/version.h>
24#include <linux/delay.h>
25#include <net/tcp.h>
26#include <net/ip.h>
27#include <net/ipv6.h>
28#include <linux/if_vlan.h>
29#include <linux/workqueue.h>
30#include <linux/interrupt.h>
31#include <linux/inet_lro.h>
32
33#include "be_hw.h"
34
35#define DRV_VER "2.0.348"
36#define DRV_NAME "be2net"
37#define BE_NAME "ServerEngines BladeEngine2 10Gbps NIC"
38#define DRV_DESC BE_NAME "Driver"
39
40/* Number of bytes of an RX frame that are copied to skb->data */
41#define BE_HDR_LEN 64
42#define BE_MAX_JUMBO_FRAME_SIZE 9018
43#define BE_MIN_MTU 256
44
45#define BE_NUM_VLANS_SUPPORTED 64
46#define BE_MAX_EQD 96
47#define BE_MAX_TX_FRAG_COUNT 30
48
49#define EVNT_Q_LEN 1024
50#define TX_Q_LEN 2048
51#define TX_CQ_LEN 1024
52#define RX_Q_LEN 1024 /* Does not support any other value */
53#define RX_CQ_LEN 1024
54#define MCC_Q_LEN 64 /* total size not to exceed 8 pages */
55#define MCC_CQ_LEN 256
56
57#define BE_NAPI_WEIGHT 64
58#define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
59#define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
60
61#define BE_MAX_LRO_DESCRIPTORS 16
62#define BE_MAX_FRAGS_PER_FRAME 16
63
64struct be_dma_mem {
65 void *va;
66 dma_addr_t dma;
67 u32 size;
68};
69
70struct be_queue_info {
71 struct be_dma_mem dma_mem;
72 u16 len;
73 u16 entry_size; /* Size of an element in the queue */
74 u16 id;
75 u16 tail, head;
76 bool created;
77 atomic_t used; /* Number of valid elements in the queue */
78};
79
80struct be_ctrl_info {
81 u8 __iomem *csr;
82 u8 __iomem *db; /* Door Bell */
83 u8 __iomem *pcicfg; /* PCI config space */
84 int pci_func;
85
86 /* Mbox used for cmd request/response */
87 spinlock_t cmd_lock; /* For serializing cmds to BE card */
88 struct be_dma_mem mbox_mem;
89 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
90 * is stored for freeing purpose */
91 struct be_dma_mem mbox_mem_alloced;
92};
93
94#include "be_cmds.h"
95
96struct be_drvr_stats {
97 u32 be_tx_reqs; /* number of TX requests initiated */
98 u32 be_tx_stops; /* number of times TX Q was stopped */
99 u32 be_fwd_reqs; /* number of send reqs through forwarding i/f */
100 u32 be_tx_wrbs; /* number of tx WRBs used */
101 u32 be_tx_events; /* number of tx completion events */
102 u32 be_tx_compl; /* number of tx completion entries processed */
103 u64 be_tx_jiffies;
104 ulong be_tx_bytes;
105 ulong be_tx_bytes_prev;
106 u32 be_tx_rate;
107
108 u32 cache_barrier[16];
109
110 u32 be_ethrx_post_fail;/* number of ethrx buffer alloc failures */
111 u32 be_polls; /* number of times NAPI called poll function */
112 u32 be_rx_events; /* number of ucast rx completion events */
113 u32 be_rx_compl; /* number of rx completion entries processed */
114 u32 be_lro_hgram_data[8]; /* histogram of LRO data packets */
115 u32 be_lro_hgram_ack[8]; /* histogram of LRO ACKs */
116 u64 be_rx_jiffies;
117 ulong be_rx_bytes;
118 ulong be_rx_bytes_prev;
119 u32 be_rx_rate;
120 /* number of non ether type II frames dropped where
121 * frame len > length field of Mac Hdr */
122 u32 be_802_3_dropped_frames;
123 /* number of non ether type II frames malformed where
124 * in frame len < length field of Mac Hdr */
125 u32 be_802_3_malformed_frames;
126 u32 be_rxcp_err; /* Num rx completion entries w/ err set. */
127 ulong rx_fps_jiffies; /* jiffies at last FPS calc */
128 u32 be_rx_frags;
129 u32 be_prev_rx_frags;
130 u32 be_rx_fps; /* Rx frags per second */
131};
132
133struct be_stats_obj {
134 struct be_drvr_stats drvr_stats;
135 struct net_device_stats net_stats;
136 struct be_dma_mem cmd;
137};
138
139struct be_eq_obj {
140 struct be_queue_info q;
141 char desc[32];
142
143 /* Adaptive interrupt coalescing (AIC) info */
144 bool enable_aic;
145 u16 min_eqd; /* in usecs */
146 u16 max_eqd; /* in usecs */
147 u16 cur_eqd; /* in usecs */
148
149 struct napi_struct napi;
150};
151
152struct be_tx_obj {
153 struct be_queue_info q;
154 struct be_queue_info cq;
155 /* Remember the skbs that were transmitted */
156 struct sk_buff *sent_skb_list[TX_Q_LEN];
157};
158
159/* Struct to remember the pages posted for rx frags */
160struct be_rx_page_info {
161 struct page *page;
162 dma_addr_t bus;
163 u16 page_offset;
164 bool last_page_user;
165};
166
167struct be_rx_obj {
168 struct be_queue_info q;
169 struct be_queue_info cq;
170 struct be_rx_page_info page_info_tbl[RX_Q_LEN];
171 struct net_lro_mgr lro_mgr;
172 struct net_lro_desc lro_desc[BE_MAX_LRO_DESCRIPTORS];
173};
174
175#define BE_NUM_MSIX_VECTORS 2 /* 1 each for Tx and Rx */
176struct be_adapter {
177 struct pci_dev *pdev;
178 struct net_device *netdev;
179
180 /* Mbox, pci config, csr address information */
181 struct be_ctrl_info ctrl;
182
183 struct msix_entry msix_entries[BE_NUM_MSIX_VECTORS];
184 bool msix_enabled;
185 bool isr_registered;
186
187 /* TX Rings */
188 struct be_eq_obj tx_eq;
189 struct be_tx_obj tx_obj;
190
191 u32 cache_line_break[8];
192
193 /* Rx rings */
194 struct be_eq_obj rx_eq;
195 struct be_rx_obj rx_obj;
196 u32 big_page_size; /* Compounded page size shared by rx wrbs */
197
198 struct vlan_group *vlan_grp;
199 u16 num_vlans;
200 u8 vlan_tag[VLAN_GROUP_ARRAY_LEN];
201
202 struct be_stats_obj stats;
203 /* Work queue used to perform periodic tasks like getting statistics */
204 struct delayed_work work;
205
206 /* Ethtool knobs and info */
207 bool rx_csum; /* BE card must perform rx-checksumming */
208 u32 max_rx_coal;
209 char fw_ver[FW_VER_LEN];
210 u32 if_handle; /* Used to configure filtering */
211 u32 pmac_id; /* MAC addr handle used by BE card */
212
213 struct be_link_info link;
214 u32 port_num;
215};
216
217extern struct ethtool_ops be_ethtool_ops;
218
219#define drvr_stats(adapter) (&adapter->stats.drvr_stats)
220
221#define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops)
222
223static inline u32 MODULO(u16 val, u16 limit)
224{
225 BUG_ON(limit & (limit - 1));
226 return val & (limit - 1);
227}
228
229static inline void index_adv(u16 *index, u16 val, u16 limit)
230{
231 *index = MODULO((*index + val), limit);
232}
233
234static inline void index_inc(u16 *index, u16 limit)
235{
236 *index = MODULO((*index + 1), limit);
237}
238
239#define PAGE_SHIFT_4K 12
240#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
241
242/* Returns number of pages spanned by the data starting at the given addr */
243#define PAGES_4K_SPANNED(_address, size) \
244 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
245 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
246
247/* Byte offset into the page corresponding to given address */
248#define OFFSET_IN_PAGE(addr) \
249 ((size_t)(addr) & (PAGE_SIZE_4K-1))
250
251/* Returns bit offset within a DWORD of a bitfield */
252#define AMAP_BIT_OFFSET(_struct, field) \
253 (((size_t)&(((_struct *)0)->field))%32)
254
255/* Returns the bit mask of the field that is NOT shifted into location. */
256static inline u32 amap_mask(u32 bitsize)
257{
258 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
259}
260
261static inline void
262amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
263{
264 u32 *dw = (u32 *) ptr + dw_offset;
265 *dw &= ~(mask << offset);
266 *dw |= (mask & value) << offset;
267}
268
269#define AMAP_SET_BITS(_struct, field, ptr, val) \
270 amap_set(ptr, \
271 offsetof(_struct, field)/32, \
272 amap_mask(sizeof(((_struct *)0)->field)), \
273 AMAP_BIT_OFFSET(_struct, field), \
274 val)
275
276static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
277{
278 u32 *dw = (u32 *) ptr;
279 return mask & (*(dw + dw_offset) >> offset);
280}
281
282#define AMAP_GET_BITS(_struct, field, ptr) \
283 amap_get(ptr, \
284 offsetof(_struct, field)/32, \
285 amap_mask(sizeof(((_struct *)0)->field)), \
286 AMAP_BIT_OFFSET(_struct, field))
287
288#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
289#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
290static inline void swap_dws(void *wrb, int len)
291{
292#ifdef __BIG_ENDIAN
293 u32 *dw = wrb;
294 BUG_ON(len % 4);
295 do {
296 *dw = cpu_to_le32(*dw);
297 dw++;
298 len -= 4;
299 } while (len);
300#endif /* __BIG_ENDIAN */
301}
302
303static inline u8 is_tcp_pkt(struct sk_buff *skb)
304{
305 u8 val = 0;
306
307 if (ip_hdr(skb)->version == 4)
308 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
309 else if (ip_hdr(skb)->version == 6)
310 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
311
312 return val;
313}
314
315static inline u8 is_udp_pkt(struct sk_buff *skb)
316{
317 u8 val = 0;
318
319 if (ip_hdr(skb)->version == 4)
320 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
321 else if (ip_hdr(skb)->version == 6)
322 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
323
324 return val;
325}
326
327#endif /* BE_H */
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c
new file mode 100644
index 000000000000..d444aed962bc
--- /dev/null
+++ b/drivers/net/benet/be_cmds.c
@@ -0,0 +1,861 @@
1/*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#include "be.h"
19
20static int be_mbox_db_ready_wait(void __iomem *db)
21{
22 int cnt = 0, wait = 5;
23 u32 ready;
24
25 do {
26 ready = ioread32(db) & MPU_MAILBOX_DB_RDY_MASK;
27 if (ready)
28 break;
29
30 if (cnt > 200000) {
31 printk(KERN_WARNING DRV_NAME
32 ": mbox_db poll timed out\n");
33 return -1;
34 }
35
36 if (cnt > 50)
37 wait = 200;
38 cnt += wait;
39 udelay(wait);
40 } while (true);
41
42 return 0;
43}
44
45/*
46 * Insert the mailbox address into the doorbell in two steps
47 */
48static int be_mbox_db_ring(struct be_ctrl_info *ctrl)
49{
50 int status;
51 u16 compl_status, extd_status;
52 u32 val = 0;
53 void __iomem *db = ctrl->db + MPU_MAILBOX_DB_OFFSET;
54 struct be_dma_mem *mbox_mem = &ctrl->mbox_mem;
55 struct be_mcc_mailbox *mbox = mbox_mem->va;
56 struct be_mcc_cq_entry *cqe = &mbox->cqe;
57
58 memset(cqe, 0, sizeof(*cqe));
59
60 val &= ~MPU_MAILBOX_DB_RDY_MASK;
61 val |= MPU_MAILBOX_DB_HI_MASK;
62 /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */
63 val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2;
64 iowrite32(val, db);
65
66 /* wait for ready to be set */
67 status = be_mbox_db_ready_wait(db);
68 if (status != 0)
69 return status;
70
71 val = 0;
72 val &= ~MPU_MAILBOX_DB_RDY_MASK;
73 val &= ~MPU_MAILBOX_DB_HI_MASK;
74 /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */
75 val |= (u32)(mbox_mem->dma >> 4) << 2;
76 iowrite32(val, db);
77
78 status = be_mbox_db_ready_wait(db);
79 if (status != 0)
80 return status;
81
82 /* compl entry has been made now */
83 be_dws_le_to_cpu(cqe, sizeof(*cqe));
84 if (!(cqe->flags & CQE_FLAGS_VALID_MASK)) {
85 printk(KERN_WARNING DRV_NAME ": ERROR invalid mbox compl\n");
86 return -1;
87 }
88
89 compl_status = (cqe->status >> CQE_STATUS_COMPL_SHIFT) &
90 CQE_STATUS_COMPL_MASK;
91 if (compl_status != MCC_STATUS_SUCCESS) {
92 extd_status = (cqe->status >> CQE_STATUS_EXTD_SHIFT) &
93 CQE_STATUS_EXTD_MASK;
94 printk(KERN_WARNING DRV_NAME
95 ": ERROR in cmd compl. status(compl/extd)=%d/%d\n",
96 compl_status, extd_status);
97 }
98
99 return compl_status;
100}
101
102static int be_POST_stage_get(struct be_ctrl_info *ctrl, u16 *stage)
103{
104 u32 sem = ioread32(ctrl->csr + MPU_EP_SEMAPHORE_OFFSET);
105
106 *stage = sem & EP_SEMAPHORE_POST_STAGE_MASK;
107 if ((sem >> EP_SEMAPHORE_POST_ERR_SHIFT) & EP_SEMAPHORE_POST_ERR_MASK)
108 return -1;
109 else
110 return 0;
111}
112
113static int be_POST_stage_poll(struct be_ctrl_info *ctrl, u16 poll_stage)
114{
115 u16 stage, cnt, error;
116 for (cnt = 0; cnt < 5000; cnt++) {
117 error = be_POST_stage_get(ctrl, &stage);
118 if (error)
119 return -1;
120
121 if (stage == poll_stage)
122 break;
123 udelay(1000);
124 }
125 if (stage != poll_stage)
126 return -1;
127 return 0;
128}
129
130
131int be_cmd_POST(struct be_ctrl_info *ctrl)
132{
133 u16 stage, error;
134
135 error = be_POST_stage_get(ctrl, &stage);
136 if (error)
137 goto err;
138
139 if (stage == POST_STAGE_ARMFW_RDY)
140 return 0;
141
142 if (stage != POST_STAGE_AWAITING_HOST_RDY)
143 goto err;
144
145 /* On awaiting host rdy, reset and again poll on awaiting host rdy */
146 iowrite32(POST_STAGE_BE_RESET, ctrl->csr + MPU_EP_SEMAPHORE_OFFSET);
147 error = be_POST_stage_poll(ctrl, POST_STAGE_AWAITING_HOST_RDY);
148 if (error)
149 goto err;
150
151 /* Now kickoff POST and poll on armfw ready */
152 iowrite32(POST_STAGE_HOST_RDY, ctrl->csr + MPU_EP_SEMAPHORE_OFFSET);
153 error = be_POST_stage_poll(ctrl, POST_STAGE_ARMFW_RDY);
154 if (error)
155 goto err;
156
157 return 0;
158err:
159 printk(KERN_WARNING DRV_NAME ": ERROR, stage=%d\n", stage);
160 return -1;
161}
162
163static inline void *embedded_payload(struct be_mcc_wrb *wrb)
164{
165 return wrb->payload.embedded_payload;
166}
167
168static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb)
169{
170 return &wrb->payload.sgl[0];
171}
172
173/* Don't touch the hdr after it's prepared */
174static void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len,
175 bool embedded, u8 sge_cnt)
176{
177 if (embedded)
178 wrb->embedded |= MCC_WRB_EMBEDDED_MASK;
179 else
180 wrb->embedded |= (sge_cnt & MCC_WRB_SGE_CNT_MASK) <<
181 MCC_WRB_SGE_CNT_SHIFT;
182 wrb->payload_length = payload_len;
183 be_dws_cpu_to_le(wrb, 20);
184}
185
186/* Don't touch the hdr after it's prepared */
187static void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
188 u8 subsystem, u8 opcode, int cmd_len)
189{
190 req_hdr->opcode = opcode;
191 req_hdr->subsystem = subsystem;
192 req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr));
193}
194
195static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages,
196 struct be_dma_mem *mem)
197{
198 int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages);
199 u64 dma = (u64)mem->dma;
200
201 for (i = 0; i < buf_pages; i++) {
202 pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF);
203 pages[i].hi = cpu_to_le32(upper_32_bits(dma));
204 dma += PAGE_SIZE_4K;
205 }
206}
207
208/* Converts interrupt delay in microseconds to multiplier value */
209static u32 eq_delay_to_mult(u32 usec_delay)
210{
211#define MAX_INTR_RATE 651042
212 const u32 round = 10;
213 u32 multiplier;
214
215 if (usec_delay == 0)
216 multiplier = 0;
217 else {
218 u32 interrupt_rate = 1000000 / usec_delay;
219 /* Max delay, corresponding to the lowest interrupt rate */
220 if (interrupt_rate == 0)
221 multiplier = 1023;
222 else {
223 multiplier = (MAX_INTR_RATE - interrupt_rate) * round;
224 multiplier /= interrupt_rate;
225 /* Round the multiplier to the closest value.*/
226 multiplier = (multiplier + round/2) / round;
227 multiplier = min(multiplier, (u32)1023);
228 }
229 }
230 return multiplier;
231}
232
233static inline struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem)
234{
235 return &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb;
236}
237
238int be_cmd_eq_create(struct be_ctrl_info *ctrl,
239 struct be_queue_info *eq, int eq_delay)
240{
241 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
242 struct be_cmd_req_eq_create *req = embedded_payload(wrb);
243 struct be_cmd_resp_eq_create *resp = embedded_payload(wrb);
244 struct be_dma_mem *q_mem = &eq->dma_mem;
245 int status;
246
247 spin_lock(&ctrl->cmd_lock);
248 memset(wrb, 0, sizeof(*wrb));
249
250 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
251
252 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
253 OPCODE_COMMON_EQ_CREATE, sizeof(*req));
254
255 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
256
257 AMAP_SET_BITS(struct amap_eq_context, func, req->context,
258 ctrl->pci_func);
259 AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1);
260 /* 4byte eqe*/
261 AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0);
262 AMAP_SET_BITS(struct amap_eq_context, count, req->context,
263 __ilog2_u32(eq->len/256));
264 AMAP_SET_BITS(struct amap_eq_context, delaymult, req->context,
265 eq_delay_to_mult(eq_delay));
266 be_dws_cpu_to_le(req->context, sizeof(req->context));
267
268 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
269
270 status = be_mbox_db_ring(ctrl);
271 if (!status) {
272 eq->id = le16_to_cpu(resp->eq_id);
273 eq->created = true;
274 }
275 spin_unlock(&ctrl->cmd_lock);
276 return status;
277}
278
279int be_cmd_mac_addr_query(struct be_ctrl_info *ctrl, u8 *mac_addr,
280 u8 type, bool permanent, u32 if_handle)
281{
282 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
283 struct be_cmd_req_mac_query *req = embedded_payload(wrb);
284 struct be_cmd_resp_mac_query *resp = embedded_payload(wrb);
285 int status;
286
287 spin_lock(&ctrl->cmd_lock);
288 memset(wrb, 0, sizeof(*wrb));
289
290 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
291
292 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
293 OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req));
294
295 req->type = type;
296 if (permanent) {
297 req->permanent = 1;
298 } else {
299 req->if_id = cpu_to_le16((u16)if_handle);
300 req->permanent = 0;
301 }
302
303 status = be_mbox_db_ring(ctrl);
304 if (!status)
305 memcpy(mac_addr, resp->mac.addr, ETH_ALEN);
306
307 spin_unlock(&ctrl->cmd_lock);
308 return status;
309}
310
311int be_cmd_pmac_add(struct be_ctrl_info *ctrl, u8 *mac_addr,
312 u32 if_id, u32 *pmac_id)
313{
314 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
315 struct be_cmd_req_pmac_add *req = embedded_payload(wrb);
316 int status;
317
318 spin_lock(&ctrl->cmd_lock);
319 memset(wrb, 0, sizeof(*wrb));
320
321 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
322
323 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
324 OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req));
325
326 req->if_id = cpu_to_le32(if_id);
327 memcpy(req->mac_address, mac_addr, ETH_ALEN);
328
329 status = be_mbox_db_ring(ctrl);
330 if (!status) {
331 struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb);
332 *pmac_id = le32_to_cpu(resp->pmac_id);
333 }
334
335 spin_unlock(&ctrl->cmd_lock);
336 return status;
337}
338
339int be_cmd_pmac_del(struct be_ctrl_info *ctrl, u32 if_id, u32 pmac_id)
340{
341 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
342 struct be_cmd_req_pmac_del *req = embedded_payload(wrb);
343 int status;
344
345 spin_lock(&ctrl->cmd_lock);
346 memset(wrb, 0, sizeof(*wrb));
347
348 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
349
350 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
351 OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req));
352
353 req->if_id = cpu_to_le32(if_id);
354 req->pmac_id = cpu_to_le32(pmac_id);
355
356 status = be_mbox_db_ring(ctrl);
357 spin_unlock(&ctrl->cmd_lock);
358
359 return status;
360}
361
362int be_cmd_cq_create(struct be_ctrl_info *ctrl,
363 struct be_queue_info *cq, struct be_queue_info *eq,
364 bool sol_evts, bool no_delay, int coalesce_wm)
365{
366 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
367 struct be_cmd_req_cq_create *req = embedded_payload(wrb);
368 struct be_cmd_resp_cq_create *resp = embedded_payload(wrb);
369 struct be_dma_mem *q_mem = &cq->dma_mem;
370 void *ctxt = &req->context;
371 int status;
372
373 spin_lock(&ctrl->cmd_lock);
374 memset(wrb, 0, sizeof(*wrb));
375
376 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
377
378 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
379 OPCODE_COMMON_CQ_CREATE, sizeof(*req));
380
381 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
382
383 AMAP_SET_BITS(struct amap_cq_context, coalescwm, ctxt, coalesce_wm);
384 AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay);
385 AMAP_SET_BITS(struct amap_cq_context, count, ctxt,
386 __ilog2_u32(cq->len/256));
387 AMAP_SET_BITS(struct amap_cq_context, valid, ctxt, 1);
388 AMAP_SET_BITS(struct amap_cq_context, solevent, ctxt, sol_evts);
389 AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1);
390 AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id);
391 AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 0);
392 AMAP_SET_BITS(struct amap_cq_context, func, ctxt, ctrl->pci_func);
393 be_dws_cpu_to_le(ctxt, sizeof(req->context));
394
395 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
396
397 status = be_mbox_db_ring(ctrl);
398 if (!status) {
399 cq->id = le16_to_cpu(resp->cq_id);
400 cq->created = true;
401 }
402 spin_unlock(&ctrl->cmd_lock);
403
404 return status;
405}
406
407int be_cmd_txq_create(struct be_ctrl_info *ctrl,
408 struct be_queue_info *txq,
409 struct be_queue_info *cq)
410{
411 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
412 struct be_cmd_req_eth_tx_create *req = embedded_payload(wrb);
413 struct be_dma_mem *q_mem = &txq->dma_mem;
414 void *ctxt = &req->context;
415 int status;
416 u32 len_encoded;
417
418 spin_lock(&ctrl->cmd_lock);
419 memset(wrb, 0, sizeof(*wrb));
420
421 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
422
423 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_TX_CREATE,
424 sizeof(*req));
425
426 req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
427 req->ulp_num = BE_ULP1_NUM;
428 req->type = BE_ETH_TX_RING_TYPE_STANDARD;
429
430 len_encoded = fls(txq->len); /* log2(len) + 1 */
431 if (len_encoded == 16)
432 len_encoded = 0;
433 AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, len_encoded);
434 AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt,
435 ctrl->pci_func);
436 AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1);
437 AMAP_SET_BITS(struct amap_tx_context, cq_id_send, ctxt, cq->id);
438
439 be_dws_cpu_to_le(ctxt, sizeof(req->context));
440
441 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
442
443 status = be_mbox_db_ring(ctrl);
444 if (!status) {
445 struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb);
446 txq->id = le16_to_cpu(resp->cid);
447 txq->created = true;
448 }
449 spin_unlock(&ctrl->cmd_lock);
450
451 return status;
452}
453
454int be_cmd_rxq_create(struct be_ctrl_info *ctrl,
455 struct be_queue_info *rxq, u16 cq_id, u16 frag_size,
456 u16 max_frame_size, u32 if_id, u32 rss)
457{
458 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
459 struct be_cmd_req_eth_rx_create *req = embedded_payload(wrb);
460 struct be_dma_mem *q_mem = &rxq->dma_mem;
461 int status;
462
463 spin_lock(&ctrl->cmd_lock);
464 memset(wrb, 0, sizeof(*wrb));
465
466 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
467
468 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_RX_CREATE,
469 sizeof(*req));
470
471 req->cq_id = cpu_to_le16(cq_id);
472 req->frag_size = fls(frag_size) - 1;
473 req->num_pages = 2;
474 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
475 req->interface_id = cpu_to_le32(if_id);
476 req->max_frame_size = cpu_to_le16(max_frame_size);
477 req->rss_queue = cpu_to_le32(rss);
478
479 status = be_mbox_db_ring(ctrl);
480 if (!status) {
481 struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb);
482 rxq->id = le16_to_cpu(resp->id);
483 rxq->created = true;
484 }
485 spin_unlock(&ctrl->cmd_lock);
486
487 return status;
488}
489
490/* Generic destroyer function for all types of queues */
491int be_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q,
492 int queue_type)
493{
494 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
495 struct be_cmd_req_q_destroy *req = embedded_payload(wrb);
496 u8 subsys = 0, opcode = 0;
497 int status;
498
499 spin_lock(&ctrl->cmd_lock);
500
501 memset(wrb, 0, sizeof(*wrb));
502 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
503
504 switch (queue_type) {
505 case QTYPE_EQ:
506 subsys = CMD_SUBSYSTEM_COMMON;
507 opcode = OPCODE_COMMON_EQ_DESTROY;
508 break;
509 case QTYPE_CQ:
510 subsys = CMD_SUBSYSTEM_COMMON;
511 opcode = OPCODE_COMMON_CQ_DESTROY;
512 break;
513 case QTYPE_TXQ:
514 subsys = CMD_SUBSYSTEM_ETH;
515 opcode = OPCODE_ETH_TX_DESTROY;
516 break;
517 case QTYPE_RXQ:
518 subsys = CMD_SUBSYSTEM_ETH;
519 opcode = OPCODE_ETH_RX_DESTROY;
520 break;
521 default:
522 printk(KERN_WARNING DRV_NAME ":bad Q type in Q destroy cmd\n");
523 status = -1;
524 goto err;
525 }
526 be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req));
527 req->id = cpu_to_le16(q->id);
528
529 status = be_mbox_db_ring(ctrl);
530err:
531 spin_unlock(&ctrl->cmd_lock);
532
533 return status;
534}
535
536/* Create an rx filtering policy configuration on an i/f */
537int be_cmd_if_create(struct be_ctrl_info *ctrl, u32 flags, u8 *mac,
538 bool pmac_invalid, u32 *if_handle, u32 *pmac_id)
539{
540 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
541 struct be_cmd_req_if_create *req = embedded_payload(wrb);
542 int status;
543
544 spin_lock(&ctrl->cmd_lock);
545 memset(wrb, 0, sizeof(*wrb));
546
547 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
548
549 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
550 OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req));
551
552 req->capability_flags = cpu_to_le32(flags);
553 req->enable_flags = cpu_to_le32(flags);
554 if (!pmac_invalid)
555 memcpy(req->mac_addr, mac, ETH_ALEN);
556
557 status = be_mbox_db_ring(ctrl);
558 if (!status) {
559 struct be_cmd_resp_if_create *resp = embedded_payload(wrb);
560 *if_handle = le32_to_cpu(resp->interface_id);
561 if (!pmac_invalid)
562 *pmac_id = le32_to_cpu(resp->pmac_id);
563 }
564
565 spin_unlock(&ctrl->cmd_lock);
566 return status;
567}
568
569int be_cmd_if_destroy(struct be_ctrl_info *ctrl, u32 interface_id)
570{
571 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
572 struct be_cmd_req_if_destroy *req = embedded_payload(wrb);
573 int status;
574
575 spin_lock(&ctrl->cmd_lock);
576 memset(wrb, 0, sizeof(*wrb));
577
578 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
579
580 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
581 OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req));
582
583 req->interface_id = cpu_to_le32(interface_id);
584 status = be_mbox_db_ring(ctrl);
585
586 spin_unlock(&ctrl->cmd_lock);
587
588 return status;
589}
590
591/* Get stats is a non embedded command: the request is not embedded inside
592 * WRB but is a separate dma memory block
593 */
594int be_cmd_get_stats(struct be_ctrl_info *ctrl, struct be_dma_mem *nonemb_cmd)
595{
596 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
597 struct be_cmd_req_get_stats *req = nonemb_cmd->va;
598 struct be_sge *sge = nonembedded_sgl(wrb);
599 int status;
600
601 spin_lock(&ctrl->cmd_lock);
602 memset(wrb, 0, sizeof(*wrb));
603
604 memset(req, 0, sizeof(*req));
605
606 be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1);
607
608 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
609 OPCODE_ETH_GET_STATISTICS, sizeof(*req));
610 sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma));
611 sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF);
612 sge->len = cpu_to_le32(nonemb_cmd->size);
613
614 status = be_mbox_db_ring(ctrl);
615 if (!status) {
616 struct be_cmd_resp_get_stats *resp = nonemb_cmd->va;
617 be_dws_le_to_cpu(&resp->hw_stats, sizeof(resp->hw_stats));
618 }
619
620 spin_unlock(&ctrl->cmd_lock);
621 return status;
622}
623
624int be_cmd_link_status_query(struct be_ctrl_info *ctrl,
625 struct be_link_info *link)
626{
627 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
628 struct be_cmd_req_link_status *req = embedded_payload(wrb);
629 int status;
630
631 spin_lock(&ctrl->cmd_lock);
632 memset(wrb, 0, sizeof(*wrb));
633
634 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
635
636 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
637 OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req));
638
639 status = be_mbox_db_ring(ctrl);
640 if (!status) {
641 struct be_cmd_resp_link_status *resp = embedded_payload(wrb);
642 link->speed = resp->mac_speed;
643 link->duplex = resp->mac_duplex;
644 link->fault = resp->mac_fault;
645 } else {
646 link->speed = PHY_LINK_SPEED_ZERO;
647 }
648
649 spin_unlock(&ctrl->cmd_lock);
650 return status;
651}
652
653int be_cmd_get_fw_ver(struct be_ctrl_info *ctrl, char *fw_ver)
654{
655 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
656 struct be_cmd_req_get_fw_version *req = embedded_payload(wrb);
657 int status;
658
659 spin_lock(&ctrl->cmd_lock);
660 memset(wrb, 0, sizeof(*wrb));
661
662 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
663
664 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
665 OPCODE_COMMON_GET_FW_VERSION, sizeof(*req));
666
667 status = be_mbox_db_ring(ctrl);
668 if (!status) {
669 struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb);
670 strncpy(fw_ver, resp->firmware_version_string, FW_VER_LEN);
671 }
672
673 spin_unlock(&ctrl->cmd_lock);
674 return status;
675}
676
677/* set the EQ delay interval of an EQ to specified value */
678int be_cmd_modify_eqd(struct be_ctrl_info *ctrl, u32 eq_id, u32 eqd)
679{
680 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
681 struct be_cmd_req_modify_eq_delay *req = embedded_payload(wrb);
682 int status;
683
684 spin_lock(&ctrl->cmd_lock);
685 memset(wrb, 0, sizeof(*wrb));
686
687 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
688
689 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
690 OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req));
691
692 req->num_eq = cpu_to_le32(1);
693 req->delay[0].eq_id = cpu_to_le32(eq_id);
694 req->delay[0].phase = 0;
695 req->delay[0].delay_multiplier = cpu_to_le32(eqd);
696
697 status = be_mbox_db_ring(ctrl);
698
699 spin_unlock(&ctrl->cmd_lock);
700 return status;
701}
702
703int be_cmd_vlan_config(struct be_ctrl_info *ctrl, u32 if_id, u16 *vtag_array,
704 u32 num, bool untagged, bool promiscuous)
705{
706 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
707 struct be_cmd_req_vlan_config *req = embedded_payload(wrb);
708 int status;
709
710 spin_lock(&ctrl->cmd_lock);
711 memset(wrb, 0, sizeof(*wrb));
712
713 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
714
715 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
716 OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req));
717
718 req->interface_id = if_id;
719 req->promiscuous = promiscuous;
720 req->untagged = untagged;
721 req->num_vlan = num;
722 if (!promiscuous) {
723 memcpy(req->normal_vlan, vtag_array,
724 req->num_vlan * sizeof(vtag_array[0]));
725 }
726
727 status = be_mbox_db_ring(ctrl);
728
729 spin_unlock(&ctrl->cmd_lock);
730 return status;
731}
732
733int be_cmd_promiscuous_config(struct be_ctrl_info *ctrl, u8 port_num, bool en)
734{
735 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
736 struct be_cmd_req_promiscuous_config *req = embedded_payload(wrb);
737 int status;
738
739 spin_lock(&ctrl->cmd_lock);
740 memset(wrb, 0, sizeof(*wrb));
741
742 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
743
744 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
745 OPCODE_ETH_PROMISCUOUS, sizeof(*req));
746
747 if (port_num)
748 req->port1_promiscuous = en;
749 else
750 req->port0_promiscuous = en;
751
752 status = be_mbox_db_ring(ctrl);
753
754 spin_unlock(&ctrl->cmd_lock);
755 return status;
756}
757
758int be_cmd_mcast_mac_set(struct be_ctrl_info *ctrl, u32 if_id, u8 *mac_table,
759 u32 num, bool promiscuous)
760{
761 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
762 struct be_cmd_req_mcast_mac_config *req = embedded_payload(wrb);
763 int status;
764
765 spin_lock(&ctrl->cmd_lock);
766 memset(wrb, 0, sizeof(*wrb));
767
768 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
769
770 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
771 OPCODE_COMMON_NTWK_MULTICAST_SET, sizeof(*req));
772
773 req->interface_id = if_id;
774 req->promiscuous = promiscuous;
775 if (!promiscuous) {
776 req->num_mac = cpu_to_le16(num);
777 if (num)
778 memcpy(req->mac, mac_table, ETH_ALEN * num);
779 }
780
781 status = be_mbox_db_ring(ctrl);
782
783 spin_unlock(&ctrl->cmd_lock);
784 return status;
785}
786
787int be_cmd_set_flow_control(struct be_ctrl_info *ctrl, u32 tx_fc, u32 rx_fc)
788{
789 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
790 struct be_cmd_req_set_flow_control *req = embedded_payload(wrb);
791 int status;
792
793 spin_lock(&ctrl->cmd_lock);
794
795 memset(wrb, 0, sizeof(*wrb));
796
797 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
798
799 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
800 OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req));
801
802 req->tx_flow_control = cpu_to_le16((u16)tx_fc);
803 req->rx_flow_control = cpu_to_le16((u16)rx_fc);
804
805 status = be_mbox_db_ring(ctrl);
806
807 spin_unlock(&ctrl->cmd_lock);
808 return status;
809}
810
811int be_cmd_get_flow_control(struct be_ctrl_info *ctrl, u32 *tx_fc, u32 *rx_fc)
812{
813 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
814 struct be_cmd_req_get_flow_control *req = embedded_payload(wrb);
815 int status;
816
817 spin_lock(&ctrl->cmd_lock);
818
819 memset(wrb, 0, sizeof(*wrb));
820
821 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
822
823 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
824 OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req));
825
826 status = be_mbox_db_ring(ctrl);
827 if (!status) {
828 struct be_cmd_resp_get_flow_control *resp =
829 embedded_payload(wrb);
830 *tx_fc = le16_to_cpu(resp->tx_flow_control);
831 *rx_fc = le16_to_cpu(resp->rx_flow_control);
832 }
833
834 spin_unlock(&ctrl->cmd_lock);
835 return status;
836}
837
838int be_cmd_query_fw_cfg(struct be_ctrl_info *ctrl, u32 *port_num)
839{
840 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
841 struct be_cmd_req_query_fw_cfg *req = embedded_payload(wrb);
842 int status;
843
844 spin_lock(&ctrl->cmd_lock);
845
846 memset(wrb, 0, sizeof(*wrb));
847
848 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
849
850 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
851 OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req));
852
853 status = be_mbox_db_ring(ctrl);
854 if (!status) {
855 struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb);
856 *port_num = le32_to_cpu(resp->phys_port);
857 }
858
859 spin_unlock(&ctrl->cmd_lock);
860 return status;
861}
diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h
new file mode 100644
index 000000000000..e499e2d5b8c3
--- /dev/null
+++ b/drivers/net/benet/be_cmds.h
@@ -0,0 +1,688 @@
1/*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18/*
19 * The driver sends configuration and managements command requests to the
20 * firmware in the BE. These requests are communicated to the processor
21 * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
22 * WRB inside a MAILBOX.
23 * The commands are serviced by the ARM processor in the BladeEngine's MPU.
24 */
25
26struct be_sge {
27 u32 pa_lo;
28 u32 pa_hi;
29 u32 len;
30};
31
32#define MCC_WRB_EMBEDDED_MASK 1 /* bit 0 of dword 0*/
33#define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */
34#define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */
35struct be_mcc_wrb {
36 u32 embedded; /* dword 0 */
37 u32 payload_length; /* dword 1 */
38 u32 tag0; /* dword 2 */
39 u32 tag1; /* dword 3 */
40 u32 rsvd; /* dword 4 */
41 union {
42 u8 embedded_payload[236]; /* used by embedded cmds */
43 struct be_sge sgl[19]; /* used by non-embedded cmds */
44 } payload;
45};
46
47#define CQE_FLAGS_VALID_MASK (1 << 31)
48#define CQE_FLAGS_ASYNC_MASK (1 << 30)
49#define CQE_FLAGS_COMPLETED_MASK (1 << 28)
50#define CQE_FLAGS_CONSUMED_MASK (1 << 27)
51
52/* Completion Status */
53enum {
54 MCC_STATUS_SUCCESS = 0x0,
55/* The client does not have sufficient privileges to execute the command */
56 MCC_STATUS_INSUFFICIENT_PRIVILEGES = 0x1,
57/* A parameter in the command was invalid. */
58 MCC_STATUS_INVALID_PARAMETER = 0x2,
59/* There are insufficient chip resources to execute the command */
60 MCC_STATUS_INSUFFICIENT_RESOURCES = 0x3,
61/* The command is completing because the queue was getting flushed */
62 MCC_STATUS_QUEUE_FLUSHING = 0x4,
63/* The command is completing with a DMA error */
64 MCC_STATUS_DMA_FAILED = 0x5
65};
66
67#define CQE_STATUS_COMPL_MASK 0xFFFF
68#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */
69#define CQE_STATUS_EXTD_MASK 0xFFFF
70#define CQE_STATUS_EXTD_SHIFT 0 /* bits 0 - 15 */
71
72struct be_mcc_cq_entry {
73 u32 status; /* dword 0 */
74 u32 tag0; /* dword 1 */
75 u32 tag1; /* dword 2 */
76 u32 flags; /* dword 3 */
77};
78
79struct be_mcc_mailbox {
80 struct be_mcc_wrb wrb;
81 struct be_mcc_cq_entry cqe;
82};
83
84#define CMD_SUBSYSTEM_COMMON 0x1
85#define CMD_SUBSYSTEM_ETH 0x3
86
87#define OPCODE_COMMON_NTWK_MAC_QUERY 1
88#define OPCODE_COMMON_NTWK_MAC_SET 2
89#define OPCODE_COMMON_NTWK_MULTICAST_SET 3
90#define OPCODE_COMMON_NTWK_VLAN_CONFIG 4
91#define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5
92#define OPCODE_COMMON_CQ_CREATE 12
93#define OPCODE_COMMON_EQ_CREATE 13
94#define OPCODE_COMMON_MCC_CREATE 21
95#define OPCODE_COMMON_NTWK_RX_FILTER 34
96#define OPCODE_COMMON_GET_FW_VERSION 35
97#define OPCODE_COMMON_SET_FLOW_CONTROL 36
98#define OPCODE_COMMON_GET_FLOW_CONTROL 37
99#define OPCODE_COMMON_SET_FRAME_SIZE 39
100#define OPCODE_COMMON_MODIFY_EQ_DELAY 41
101#define OPCODE_COMMON_FIRMWARE_CONFIG 42
102#define OPCODE_COMMON_NTWK_INTERFACE_CREATE 50
103#define OPCODE_COMMON_NTWK_INTERFACE_DESTROY 51
104#define OPCODE_COMMON_CQ_DESTROY 54
105#define OPCODE_COMMON_EQ_DESTROY 55
106#define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58
107#define OPCODE_COMMON_NTWK_PMAC_ADD 59
108#define OPCODE_COMMON_NTWK_PMAC_DEL 60
109
110#define OPCODE_ETH_ACPI_CONFIG 2
111#define OPCODE_ETH_PROMISCUOUS 3
112#define OPCODE_ETH_GET_STATISTICS 4
113#define OPCODE_ETH_TX_CREATE 7
114#define OPCODE_ETH_RX_CREATE 8
115#define OPCODE_ETH_TX_DESTROY 9
116#define OPCODE_ETH_RX_DESTROY 10
117
118struct be_cmd_req_hdr {
119 u8 opcode; /* dword 0 */
120 u8 subsystem; /* dword 0 */
121 u8 port_number; /* dword 0 */
122 u8 domain; /* dword 0 */
123 u32 timeout; /* dword 1 */
124 u32 request_length; /* dword 2 */
125 u32 rsvd; /* dword 3 */
126};
127
128#define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */
129#define RESP_HDR_INFO_SUBSYS_SHIFT 8 /* bits 8 - 15 */
130struct be_cmd_resp_hdr {
131 u32 info; /* dword 0 */
132 u32 status; /* dword 1 */
133 u32 response_length; /* dword 2 */
134 u32 actual_resp_len; /* dword 3 */
135};
136
137struct phys_addr {
138 u32 lo;
139 u32 hi;
140};
141
142/**************************
143 * BE Command definitions *
144 **************************/
145
146/* Pseudo amap definition in which each bit of the actual structure is defined
147 * as a byte: used to calculate offset/shift/mask of each field */
148struct amap_eq_context {
149 u8 cidx[13]; /* dword 0*/
150 u8 rsvd0[3]; /* dword 0*/
151 u8 epidx[13]; /* dword 0*/
152 u8 valid; /* dword 0*/
153 u8 rsvd1; /* dword 0*/
154 u8 size; /* dword 0*/
155 u8 pidx[13]; /* dword 1*/
156 u8 rsvd2[3]; /* dword 1*/
157 u8 pd[10]; /* dword 1*/
158 u8 count[3]; /* dword 1*/
159 u8 solevent; /* dword 1*/
160 u8 stalled; /* dword 1*/
161 u8 armed; /* dword 1*/
162 u8 rsvd3[4]; /* dword 2*/
163 u8 func[8]; /* dword 2*/
164 u8 rsvd4; /* dword 2*/
165 u8 delaymult[10]; /* dword 2*/
166 u8 rsvd5[2]; /* dword 2*/
167 u8 phase[2]; /* dword 2*/
168 u8 nodelay; /* dword 2*/
169 u8 rsvd6[4]; /* dword 2*/
170 u8 rsvd7[32]; /* dword 3*/
171} __packed;
172
173struct be_cmd_req_eq_create {
174 struct be_cmd_req_hdr hdr;
175 u16 num_pages; /* sword */
176 u16 rsvd0; /* sword */
177 u8 context[sizeof(struct amap_eq_context) / 8];
178 struct phys_addr pages[8];
179} __packed;
180
181struct be_cmd_resp_eq_create {
182 struct be_cmd_resp_hdr resp_hdr;
183 u16 eq_id; /* sword */
184 u16 rsvd0; /* sword */
185} __packed;
186
187/******************** Mac query ***************************/
188enum {
189 MAC_ADDRESS_TYPE_STORAGE = 0x0,
190 MAC_ADDRESS_TYPE_NETWORK = 0x1,
191 MAC_ADDRESS_TYPE_PD = 0x2,
192 MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
193};
194
195struct mac_addr {
196 u16 size_of_struct;
197 u8 addr[ETH_ALEN];
198} __packed;
199
200struct be_cmd_req_mac_query {
201 struct be_cmd_req_hdr hdr;
202 u8 type;
203 u8 permanent;
204 u16 if_id;
205} __packed;
206
207struct be_cmd_resp_mac_query {
208 struct be_cmd_resp_hdr hdr;
209 struct mac_addr mac;
210};
211
212/******************** PMac Add ***************************/
213struct be_cmd_req_pmac_add {
214 struct be_cmd_req_hdr hdr;
215 u32 if_id;
216 u8 mac_address[ETH_ALEN];
217 u8 rsvd0[2];
218} __packed;
219
220struct be_cmd_resp_pmac_add {
221 struct be_cmd_resp_hdr hdr;
222 u32 pmac_id;
223};
224
225/******************** PMac Del ***************************/
226struct be_cmd_req_pmac_del {
227 struct be_cmd_req_hdr hdr;
228 u32 if_id;
229 u32 pmac_id;
230};
231
232/******************** Create CQ ***************************/
233/* Pseudo amap definition in which each bit of the actual structure is defined
234 * as a byte: used to calculate offset/shift/mask of each field */
235struct amap_cq_context {
236 u8 cidx[11]; /* dword 0*/
237 u8 rsvd0; /* dword 0*/
238 u8 coalescwm[2]; /* dword 0*/
239 u8 nodelay; /* dword 0*/
240 u8 epidx[11]; /* dword 0*/
241 u8 rsvd1; /* dword 0*/
242 u8 count[2]; /* dword 0*/
243 u8 valid; /* dword 0*/
244 u8 solevent; /* dword 0*/
245 u8 eventable; /* dword 0*/
246 u8 pidx[11]; /* dword 1*/
247 u8 rsvd2; /* dword 1*/
248 u8 pd[10]; /* dword 1*/
249 u8 eqid[8]; /* dword 1*/
250 u8 stalled; /* dword 1*/
251 u8 armed; /* dword 1*/
252 u8 rsvd3[4]; /* dword 2*/
253 u8 func[8]; /* dword 2*/
254 u8 rsvd4[20]; /* dword 2*/
255 u8 rsvd5[32]; /* dword 3*/
256} __packed;
257
258struct be_cmd_req_cq_create {
259 struct be_cmd_req_hdr hdr;
260 u16 num_pages;
261 u16 rsvd0;
262 u8 context[sizeof(struct amap_cq_context) / 8];
263 struct phys_addr pages[8];
264} __packed;
265
266struct be_cmd_resp_cq_create {
267 struct be_cmd_resp_hdr hdr;
268 u16 cq_id;
269 u16 rsvd0;
270} __packed;
271
272/******************** Create TxQ ***************************/
273#define BE_ETH_TX_RING_TYPE_STANDARD 2
274#define BE_ULP1_NUM 1
275
276/* Pseudo amap definition in which each bit of the actual structure is defined
277 * as a byte: used to calculate offset/shift/mask of each field */
278struct amap_tx_context {
279 u8 rsvd0[16]; /* dword 0 */
280 u8 tx_ring_size[4]; /* dword 0 */
281 u8 rsvd1[26]; /* dword 0 */
282 u8 pci_func_id[8]; /* dword 1 */
283 u8 rsvd2[9]; /* dword 1 */
284 u8 ctx_valid; /* dword 1 */
285 u8 cq_id_send[16]; /* dword 2 */
286 u8 rsvd3[16]; /* dword 2 */
287 u8 rsvd4[32]; /* dword 3 */
288 u8 rsvd5[32]; /* dword 4 */
289 u8 rsvd6[32]; /* dword 5 */
290 u8 rsvd7[32]; /* dword 6 */
291 u8 rsvd8[32]; /* dword 7 */
292 u8 rsvd9[32]; /* dword 8 */
293 u8 rsvd10[32]; /* dword 9 */
294 u8 rsvd11[32]; /* dword 10 */
295 u8 rsvd12[32]; /* dword 11 */
296 u8 rsvd13[32]; /* dword 12 */
297 u8 rsvd14[32]; /* dword 13 */
298 u8 rsvd15[32]; /* dword 14 */
299 u8 rsvd16[32]; /* dword 15 */
300} __packed;
301
302struct be_cmd_req_eth_tx_create {
303 struct be_cmd_req_hdr hdr;
304 u8 num_pages;
305 u8 ulp_num;
306 u8 type;
307 u8 bound_port;
308 u8 context[sizeof(struct amap_tx_context) / 8];
309 struct phys_addr pages[8];
310} __packed;
311
312struct be_cmd_resp_eth_tx_create {
313 struct be_cmd_resp_hdr hdr;
314 u16 cid;
315 u16 rsvd0;
316} __packed;
317
318/******************** Create RxQ ***************************/
319struct be_cmd_req_eth_rx_create {
320 struct be_cmd_req_hdr hdr;
321 u16 cq_id;
322 u8 frag_size;
323 u8 num_pages;
324 struct phys_addr pages[2];
325 u32 interface_id;
326 u16 max_frame_size;
327 u16 rsvd0;
328 u32 rss_queue;
329} __packed;
330
331struct be_cmd_resp_eth_rx_create {
332 struct be_cmd_resp_hdr hdr;
333 u16 id;
334 u8 cpu_id;
335 u8 rsvd0;
336} __packed;
337
338/******************** Q Destroy ***************************/
339/* Type of Queue to be destroyed */
340enum {
341 QTYPE_EQ = 1,
342 QTYPE_CQ,
343 QTYPE_TXQ,
344 QTYPE_RXQ
345};
346
347struct be_cmd_req_q_destroy {
348 struct be_cmd_req_hdr hdr;
349 u16 id;
350 u16 bypass_flush; /* valid only for rx q destroy */
351} __packed;
352
353/************ I/f Create (it's actually I/f Config Create)**********/
354
355/* Capability flags for the i/f */
356enum be_if_flags {
357 BE_IF_FLAGS_RSS = 0x4,
358 BE_IF_FLAGS_PROMISCUOUS = 0x8,
359 BE_IF_FLAGS_BROADCAST = 0x10,
360 BE_IF_FLAGS_UNTAGGED = 0x20,
361 BE_IF_FLAGS_ULP = 0x40,
362 BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
363 BE_IF_FLAGS_VLAN = 0x100,
364 BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
365 BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
366 BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800
367};
368
369/* An RX interface is an object with one or more MAC addresses and
370 * filtering capabilities. */
371struct be_cmd_req_if_create {
372 struct be_cmd_req_hdr hdr;
373 u32 version; /* ignore currntly */
374 u32 capability_flags;
375 u32 enable_flags;
376 u8 mac_addr[ETH_ALEN];
377 u8 rsvd0;
378 u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
379 u32 vlan_tag; /* not used currently */
380} __packed;
381
382struct be_cmd_resp_if_create {
383 struct be_cmd_resp_hdr hdr;
384 u32 interface_id;
385 u32 pmac_id;
386};
387
388/****** I/f Destroy(it's actually I/f Config Destroy )**********/
389struct be_cmd_req_if_destroy {
390 struct be_cmd_req_hdr hdr;
391 u32 interface_id;
392};
393
394/*************** HW Stats Get **********************************/
395struct be_port_rxf_stats {
396 u32 rx_bytes_lsd; /* dword 0*/
397 u32 rx_bytes_msd; /* dword 1*/
398 u32 rx_total_frames; /* dword 2*/
399 u32 rx_unicast_frames; /* dword 3*/
400 u32 rx_multicast_frames; /* dword 4*/
401 u32 rx_broadcast_frames; /* dword 5*/
402 u32 rx_crc_errors; /* dword 6*/
403 u32 rx_alignment_symbol_errors; /* dword 7*/
404 u32 rx_pause_frames; /* dword 8*/
405 u32 rx_control_frames; /* dword 9*/
406 u32 rx_in_range_errors; /* dword 10*/
407 u32 rx_out_range_errors; /* dword 11*/
408 u32 rx_frame_too_long; /* dword 12*/
409 u32 rx_address_match_errors; /* dword 13*/
410 u32 rx_vlan_mismatch; /* dword 14*/
411 u32 rx_dropped_too_small; /* dword 15*/
412 u32 rx_dropped_too_short; /* dword 16*/
413 u32 rx_dropped_header_too_small; /* dword 17*/
414 u32 rx_dropped_tcp_length; /* dword 18*/
415 u32 rx_dropped_runt; /* dword 19*/
416 u32 rx_64_byte_packets; /* dword 20*/
417 u32 rx_65_127_byte_packets; /* dword 21*/
418 u32 rx_128_256_byte_packets; /* dword 22*/
419 u32 rx_256_511_byte_packets; /* dword 23*/
420 u32 rx_512_1023_byte_packets; /* dword 24*/
421 u32 rx_1024_1518_byte_packets; /* dword 25*/
422 u32 rx_1519_2047_byte_packets; /* dword 26*/
423 u32 rx_2048_4095_byte_packets; /* dword 27*/
424 u32 rx_4096_8191_byte_packets; /* dword 28*/
425 u32 rx_8192_9216_byte_packets; /* dword 29*/
426 u32 rx_ip_checksum_errs; /* dword 30*/
427 u32 rx_tcp_checksum_errs; /* dword 31*/
428 u32 rx_udp_checksum_errs; /* dword 32*/
429 u32 rx_non_rss_packets; /* dword 33*/
430 u32 rx_ipv4_packets; /* dword 34*/
431 u32 rx_ipv6_packets; /* dword 35*/
432 u32 rx_ipv4_bytes_lsd; /* dword 36*/
433 u32 rx_ipv4_bytes_msd; /* dword 37*/
434 u32 rx_ipv6_bytes_lsd; /* dword 38*/
435 u32 rx_ipv6_bytes_msd; /* dword 39*/
436 u32 rx_chute1_packets; /* dword 40*/
437 u32 rx_chute2_packets; /* dword 41*/
438 u32 rx_chute3_packets; /* dword 42*/
439 u32 rx_management_packets; /* dword 43*/
440 u32 rx_switched_unicast_packets; /* dword 44*/
441 u32 rx_switched_multicast_packets; /* dword 45*/
442 u32 rx_switched_broadcast_packets; /* dword 46*/
443 u32 tx_bytes_lsd; /* dword 47*/
444 u32 tx_bytes_msd; /* dword 48*/
445 u32 tx_unicastframes; /* dword 49*/
446 u32 tx_multicastframes; /* dword 50*/
447 u32 tx_broadcastframes; /* dword 51*/
448 u32 tx_pauseframes; /* dword 52*/
449 u32 tx_controlframes; /* dword 53*/
450 u32 tx_64_byte_packets; /* dword 54*/
451 u32 tx_65_127_byte_packets; /* dword 55*/
452 u32 tx_128_256_byte_packets; /* dword 56*/
453 u32 tx_256_511_byte_packets; /* dword 57*/
454 u32 tx_512_1023_byte_packets; /* dword 58*/
455 u32 tx_1024_1518_byte_packets; /* dword 59*/
456 u32 tx_1519_2047_byte_packets; /* dword 60*/
457 u32 tx_2048_4095_byte_packets; /* dword 61*/
458 u32 tx_4096_8191_byte_packets; /* dword 62*/
459 u32 tx_8192_9216_byte_packets; /* dword 63*/
460 u32 rx_fifo_overflow; /* dword 64*/
461 u32 rx_input_fifo_overflow; /* dword 65*/
462};
463
464struct be_rxf_stats {
465 struct be_port_rxf_stats port[2];
466 u32 rx_drops_no_pbuf; /* dword 132*/
467 u32 rx_drops_no_txpb; /* dword 133*/
468 u32 rx_drops_no_erx_descr; /* dword 134*/
469 u32 rx_drops_no_tpre_descr; /* dword 135*/
470 u32 management_rx_port_packets; /* dword 136*/
471 u32 management_rx_port_bytes; /* dword 137*/
472 u32 management_rx_port_pause_frames; /* dword 138*/
473 u32 management_rx_port_errors; /* dword 139*/
474 u32 management_tx_port_packets; /* dword 140*/
475 u32 management_tx_port_bytes; /* dword 141*/
476 u32 management_tx_port_pause; /* dword 142*/
477 u32 management_rx_port_rxfifo_overflow; /* dword 143*/
478 u32 rx_drops_too_many_frags; /* dword 144*/
479 u32 rx_drops_invalid_ring; /* dword 145*/
480 u32 forwarded_packets; /* dword 146*/
481 u32 rx_drops_mtu; /* dword 147*/
482 u32 rsvd0[15];
483};
484
485struct be_erx_stats {
486 u32 rx_drops_no_fragments[44]; /* dwordS 0 to 43*/
487 u32 debug_wdma_sent_hold; /* dword 44*/
488 u32 debug_wdma_pbfree_sent_hold; /* dword 45*/
489 u32 debug_wdma_zerobyte_pbfree_sent_hold; /* dword 46*/
490 u32 debug_pmem_pbuf_dealloc; /* dword 47*/
491};
492
493struct be_hw_stats {
494 struct be_rxf_stats rxf;
495 u32 rsvd[48];
496 struct be_erx_stats erx;
497};
498
499struct be_cmd_req_get_stats {
500 struct be_cmd_req_hdr hdr;
501 u8 rsvd[sizeof(struct be_hw_stats)];
502};
503
504struct be_cmd_resp_get_stats {
505 struct be_cmd_resp_hdr hdr;
506 struct be_hw_stats hw_stats;
507};
508
509struct be_cmd_req_vlan_config {
510 struct be_cmd_req_hdr hdr;
511 u8 interface_id;
512 u8 promiscuous;
513 u8 untagged;
514 u8 num_vlan;
515 u16 normal_vlan[64];
516} __packed;
517
518struct be_cmd_req_promiscuous_config {
519 struct be_cmd_req_hdr hdr;
520 u8 port0_promiscuous;
521 u8 port1_promiscuous;
522 u16 rsvd0;
523} __packed;
524
525struct macaddr {
526 u8 byte[ETH_ALEN];
527};
528
529struct be_cmd_req_mcast_mac_config {
530 struct be_cmd_req_hdr hdr;
531 u16 num_mac;
532 u8 promiscuous;
533 u8 interface_id;
534 struct macaddr mac[32];
535} __packed;
536
537static inline struct be_hw_stats *
538hw_stats_from_cmd(struct be_cmd_resp_get_stats *cmd)
539{
540 return &cmd->hw_stats;
541}
542
543/******************** Link Status Query *******************/
544struct be_cmd_req_link_status {
545 struct be_cmd_req_hdr hdr;
546 u32 rsvd;
547};
548
549struct be_link_info {
550 u8 duplex;
551 u8 speed;
552 u8 fault;
553};
554
555enum {
556 PHY_LINK_DUPLEX_NONE = 0x0,
557 PHY_LINK_DUPLEX_HALF = 0x1,
558 PHY_LINK_DUPLEX_FULL = 0x2
559};
560
561enum {
562 PHY_LINK_SPEED_ZERO = 0x0, /* => No link */
563 PHY_LINK_SPEED_10MBPS = 0x1,
564 PHY_LINK_SPEED_100MBPS = 0x2,
565 PHY_LINK_SPEED_1GBPS = 0x3,
566 PHY_LINK_SPEED_10GBPS = 0x4
567};
568
569struct be_cmd_resp_link_status {
570 struct be_cmd_resp_hdr hdr;
571 u8 physical_port;
572 u8 mac_duplex;
573 u8 mac_speed;
574 u8 mac_fault;
575 u8 mgmt_mac_duplex;
576 u8 mgmt_mac_speed;
577 u16 rsvd0;
578} __packed;
579
580/******************** Get FW Version *******************/
581#define FW_VER_LEN 32
582struct be_cmd_req_get_fw_version {
583 struct be_cmd_req_hdr hdr;
584 u8 rsvd0[FW_VER_LEN];
585 u8 rsvd1[FW_VER_LEN];
586} __packed;
587
588struct be_cmd_resp_get_fw_version {
589 struct be_cmd_resp_hdr hdr;
590 u8 firmware_version_string[FW_VER_LEN];
591 u8 fw_on_flash_version_string[FW_VER_LEN];
592} __packed;
593
594/******************** Set Flow Contrl *******************/
595struct be_cmd_req_set_flow_control {
596 struct be_cmd_req_hdr hdr;
597 u16 tx_flow_control;
598 u16 rx_flow_control;
599} __packed;
600
601/******************** Get Flow Contrl *******************/
602struct be_cmd_req_get_flow_control {
603 struct be_cmd_req_hdr hdr;
604 u32 rsvd;
605};
606
607struct be_cmd_resp_get_flow_control {
608 struct be_cmd_resp_hdr hdr;
609 u16 tx_flow_control;
610 u16 rx_flow_control;
611} __packed;
612
613/******************** Modify EQ Delay *******************/
614struct be_cmd_req_modify_eq_delay {
615 struct be_cmd_req_hdr hdr;
616 u32 num_eq;
617 struct {
618 u32 eq_id;
619 u32 phase;
620 u32 delay_multiplier;
621 } delay[8];
622} __packed;
623
624struct be_cmd_resp_modify_eq_delay {
625 struct be_cmd_resp_hdr hdr;
626 u32 rsvd0;
627} __packed;
628
629/******************** Get FW Config *******************/
630struct be_cmd_req_query_fw_cfg {
631 struct be_cmd_req_hdr hdr;
632 u32 rsvd[30];
633};
634
635struct be_cmd_resp_query_fw_cfg {
636 struct be_cmd_resp_hdr hdr;
637 u32 be_config_number;
638 u32 asic_revision;
639 u32 phys_port;
640 u32 function_mode;
641 u32 rsvd[26];
642};
643
644extern int be_pci_fnum_get(struct be_ctrl_info *ctrl);
645extern int be_cmd_POST(struct be_ctrl_info *ctrl);
646extern int be_cmd_mac_addr_query(struct be_ctrl_info *ctrl, u8 *mac_addr,
647 u8 type, bool permanent, u32 if_handle);
648extern int be_cmd_pmac_add(struct be_ctrl_info *ctrl, u8 *mac_addr,
649 u32 if_id, u32 *pmac_id);
650extern int be_cmd_pmac_del(struct be_ctrl_info *ctrl, u32 if_id, u32 pmac_id);
651extern int be_cmd_if_create(struct be_ctrl_info *ctrl, u32 if_flags, u8 *mac,
652 bool pmac_invalid, u32 *if_handle, u32 *pmac_id);
653extern int be_cmd_if_destroy(struct be_ctrl_info *ctrl, u32 if_handle);
654extern int be_cmd_eq_create(struct be_ctrl_info *ctrl,
655 struct be_queue_info *eq, int eq_delay);
656extern int be_cmd_cq_create(struct be_ctrl_info *ctrl,
657 struct be_queue_info *cq, struct be_queue_info *eq,
658 bool sol_evts, bool no_delay,
659 int num_cqe_dma_coalesce);
660extern int be_cmd_txq_create(struct be_ctrl_info *ctrl,
661 struct be_queue_info *txq,
662 struct be_queue_info *cq);
663extern int be_cmd_rxq_create(struct be_ctrl_info *ctrl,
664 struct be_queue_info *rxq, u16 cq_id,
665 u16 frag_size, u16 max_frame_size, u32 if_id,
666 u32 rss);
667extern int be_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q,
668 int type);
669extern int be_cmd_link_status_query(struct be_ctrl_info *ctrl,
670 struct be_link_info *link);
671extern int be_cmd_reset(struct be_ctrl_info *ctrl);
672extern int be_cmd_get_stats(struct be_ctrl_info *ctrl,
673 struct be_dma_mem *nonemb_cmd);
674extern int be_cmd_get_fw_ver(struct be_ctrl_info *ctrl, char *fw_ver);
675
676extern int be_cmd_modify_eqd(struct be_ctrl_info *ctrl, u32 eq_id, u32 eqd);
677extern int be_cmd_vlan_config(struct be_ctrl_info *ctrl, u32 if_id,
678 u16 *vtag_array, u32 num, bool untagged,
679 bool promiscuous);
680extern int be_cmd_promiscuous_config(struct be_ctrl_info *ctrl,
681 u8 port_num, bool en);
682extern int be_cmd_mcast_mac_set(struct be_ctrl_info *ctrl, u32 if_id,
683 u8 *mac_table, u32 num, bool promiscuous);
684extern int be_cmd_set_flow_control(struct be_ctrl_info *ctrl,
685 u32 tx_fc, u32 rx_fc);
686extern int be_cmd_get_flow_control(struct be_ctrl_info *ctrl,
687 u32 *tx_fc, u32 *rx_fc);
688extern int be_cmd_query_fw_cfg(struct be_ctrl_info *ctrl, u32 *port_num);
diff --git a/drivers/net/benet/be_ethtool.c b/drivers/net/benet/be_ethtool.c
new file mode 100644
index 000000000000..04f4b73fa8d8
--- /dev/null
+++ b/drivers/net/benet/be_ethtool.c
@@ -0,0 +1,362 @@
1/*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#include "be.h"
19#include <linux/ethtool.h>
20
21struct be_ethtool_stat {
22 char desc[ETH_GSTRING_LEN];
23 int type;
24 int size;
25 int offset;
26};
27
28enum {NETSTAT, PORTSTAT, MISCSTAT, DRVSTAT, ERXSTAT};
29#define FIELDINFO(_struct, field) FIELD_SIZEOF(_struct, field), \
30 offsetof(_struct, field)
31#define NETSTAT_INFO(field) #field, NETSTAT,\
32 FIELDINFO(struct net_device_stats,\
33 field)
34#define DRVSTAT_INFO(field) #field, DRVSTAT,\
35 FIELDINFO(struct be_drvr_stats, field)
36#define MISCSTAT_INFO(field) #field, MISCSTAT,\
37 FIELDINFO(struct be_rxf_stats, field)
38#define PORTSTAT_INFO(field) #field, PORTSTAT,\
39 FIELDINFO(struct be_port_rxf_stats, \
40 field)
41#define ERXSTAT_INFO(field) #field, ERXSTAT,\
42 FIELDINFO(struct be_erx_stats, field)
43
44static const struct be_ethtool_stat et_stats[] = {
45 {NETSTAT_INFO(rx_packets)},
46 {NETSTAT_INFO(tx_packets)},
47 {NETSTAT_INFO(rx_bytes)},
48 {NETSTAT_INFO(tx_bytes)},
49 {NETSTAT_INFO(rx_errors)},
50 {NETSTAT_INFO(tx_errors)},
51 {NETSTAT_INFO(rx_dropped)},
52 {NETSTAT_INFO(tx_dropped)},
53 {DRVSTAT_INFO(be_tx_reqs)},
54 {DRVSTAT_INFO(be_tx_stops)},
55 {DRVSTAT_INFO(be_fwd_reqs)},
56 {DRVSTAT_INFO(be_tx_wrbs)},
57 {DRVSTAT_INFO(be_polls)},
58 {DRVSTAT_INFO(be_tx_events)},
59 {DRVSTAT_INFO(be_rx_events)},
60 {DRVSTAT_INFO(be_tx_compl)},
61 {DRVSTAT_INFO(be_rx_compl)},
62 {DRVSTAT_INFO(be_ethrx_post_fail)},
63 {DRVSTAT_INFO(be_802_3_dropped_frames)},
64 {DRVSTAT_INFO(be_802_3_malformed_frames)},
65 {DRVSTAT_INFO(be_tx_rate)},
66 {DRVSTAT_INFO(be_rx_rate)},
67 {PORTSTAT_INFO(rx_unicast_frames)},
68 {PORTSTAT_INFO(rx_multicast_frames)},
69 {PORTSTAT_INFO(rx_broadcast_frames)},
70 {PORTSTAT_INFO(rx_crc_errors)},
71 {PORTSTAT_INFO(rx_alignment_symbol_errors)},
72 {PORTSTAT_INFO(rx_pause_frames)},
73 {PORTSTAT_INFO(rx_control_frames)},
74 {PORTSTAT_INFO(rx_in_range_errors)},
75 {PORTSTAT_INFO(rx_out_range_errors)},
76 {PORTSTAT_INFO(rx_frame_too_long)},
77 {PORTSTAT_INFO(rx_address_match_errors)},
78 {PORTSTAT_INFO(rx_vlan_mismatch)},
79 {PORTSTAT_INFO(rx_dropped_too_small)},
80 {PORTSTAT_INFO(rx_dropped_too_short)},
81 {PORTSTAT_INFO(rx_dropped_header_too_small)},
82 {PORTSTAT_INFO(rx_dropped_tcp_length)},
83 {PORTSTAT_INFO(rx_dropped_runt)},
84 {PORTSTAT_INFO(rx_fifo_overflow)},
85 {PORTSTAT_INFO(rx_input_fifo_overflow)},
86 {PORTSTAT_INFO(rx_ip_checksum_errs)},
87 {PORTSTAT_INFO(rx_tcp_checksum_errs)},
88 {PORTSTAT_INFO(rx_udp_checksum_errs)},
89 {PORTSTAT_INFO(rx_non_rss_packets)},
90 {PORTSTAT_INFO(rx_ipv4_packets)},
91 {PORTSTAT_INFO(rx_ipv6_packets)},
92 {PORTSTAT_INFO(tx_unicastframes)},
93 {PORTSTAT_INFO(tx_multicastframes)},
94 {PORTSTAT_INFO(tx_broadcastframes)},
95 {PORTSTAT_INFO(tx_pauseframes)},
96 {PORTSTAT_INFO(tx_controlframes)},
97 {MISCSTAT_INFO(rx_drops_no_pbuf)},
98 {MISCSTAT_INFO(rx_drops_no_txpb)},
99 {MISCSTAT_INFO(rx_drops_no_erx_descr)},
100 {MISCSTAT_INFO(rx_drops_no_tpre_descr)},
101 {MISCSTAT_INFO(rx_drops_too_many_frags)},
102 {MISCSTAT_INFO(rx_drops_invalid_ring)},
103 {MISCSTAT_INFO(forwarded_packets)},
104 {MISCSTAT_INFO(rx_drops_mtu)},
105 {ERXSTAT_INFO(rx_drops_no_fragments)},
106};
107#define ETHTOOL_STATS_NUM ARRAY_SIZE(et_stats)
108
109static void
110be_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
111{
112 struct be_adapter *adapter = netdev_priv(netdev);
113
114 strcpy(drvinfo->driver, DRV_NAME);
115 strcpy(drvinfo->version, DRV_VER);
116 strncpy(drvinfo->fw_version, adapter->fw_ver, FW_VER_LEN);
117 strcpy(drvinfo->bus_info, pci_name(adapter->pdev));
118 drvinfo->testinfo_len = 0;
119 drvinfo->regdump_len = 0;
120 drvinfo->eedump_len = 0;
121}
122
123static int
124be_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
125{
126 struct be_adapter *adapter = netdev_priv(netdev);
127 struct be_eq_obj *rx_eq = &adapter->rx_eq;
128 struct be_eq_obj *tx_eq = &adapter->tx_eq;
129
130 coalesce->rx_max_coalesced_frames = adapter->max_rx_coal;
131
132 coalesce->rx_coalesce_usecs = rx_eq->cur_eqd;
133 coalesce->rx_coalesce_usecs_high = rx_eq->max_eqd;
134 coalesce->rx_coalesce_usecs_low = rx_eq->min_eqd;
135
136 coalesce->tx_coalesce_usecs = tx_eq->cur_eqd;
137 coalesce->tx_coalesce_usecs_high = tx_eq->max_eqd;
138 coalesce->tx_coalesce_usecs_low = tx_eq->min_eqd;
139
140 coalesce->use_adaptive_rx_coalesce = rx_eq->enable_aic;
141 coalesce->use_adaptive_tx_coalesce = tx_eq->enable_aic;
142
143 return 0;
144}
145
146/*
147 * This routine is used to set interrup coalescing delay *as well as*
148 * the number of pkts to coalesce for LRO.
149 */
150static int
151be_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
152{
153 struct be_adapter *adapter = netdev_priv(netdev);
154 struct be_ctrl_info *ctrl = &adapter->ctrl;
155 struct be_eq_obj *rx_eq = &adapter->rx_eq;
156 struct be_eq_obj *tx_eq = &adapter->tx_eq;
157 u32 tx_max, tx_min, tx_cur;
158 u32 rx_max, rx_min, rx_cur;
159 int status = 0;
160
161 if (coalesce->use_adaptive_tx_coalesce == 1)
162 return -EINVAL;
163
164 adapter->max_rx_coal = coalesce->rx_max_coalesced_frames;
165 if (adapter->max_rx_coal > MAX_SKB_FRAGS)
166 adapter->max_rx_coal = MAX_SKB_FRAGS - 1;
167
168 /* if AIC is being turned on now, start with an EQD of 0 */
169 if (rx_eq->enable_aic == 0 &&
170 coalesce->use_adaptive_rx_coalesce == 1) {
171 rx_eq->cur_eqd = 0;
172 }
173 rx_eq->enable_aic = coalesce->use_adaptive_rx_coalesce;
174
175 rx_max = coalesce->rx_coalesce_usecs_high;
176 rx_min = coalesce->rx_coalesce_usecs_low;
177 rx_cur = coalesce->rx_coalesce_usecs;
178
179 tx_max = coalesce->tx_coalesce_usecs_high;
180 tx_min = coalesce->tx_coalesce_usecs_low;
181 tx_cur = coalesce->tx_coalesce_usecs;
182
183 if (tx_cur > BE_MAX_EQD)
184 tx_cur = BE_MAX_EQD;
185 if (tx_eq->cur_eqd != tx_cur) {
186 status = be_cmd_modify_eqd(ctrl, tx_eq->q.id, tx_cur);
187 if (!status)
188 tx_eq->cur_eqd = tx_cur;
189 }
190
191 if (rx_eq->enable_aic) {
192 if (rx_max > BE_MAX_EQD)
193 rx_max = BE_MAX_EQD;
194 if (rx_min > rx_max)
195 rx_min = rx_max;
196 rx_eq->max_eqd = rx_max;
197 rx_eq->min_eqd = rx_min;
198 if (rx_eq->cur_eqd > rx_max)
199 rx_eq->cur_eqd = rx_max;
200 if (rx_eq->cur_eqd < rx_min)
201 rx_eq->cur_eqd = rx_min;
202 } else {
203 if (rx_cur > BE_MAX_EQD)
204 rx_cur = BE_MAX_EQD;
205 if (rx_eq->cur_eqd != rx_cur) {
206 status = be_cmd_modify_eqd(ctrl, rx_eq->q.id, rx_cur);
207 if (!status)
208 rx_eq->cur_eqd = rx_cur;
209 }
210 }
211 return 0;
212}
213
214static u32 be_get_rx_csum(struct net_device *netdev)
215{
216 struct be_adapter *adapter = netdev_priv(netdev);
217
218 return adapter->rx_csum;
219}
220
221static int be_set_rx_csum(struct net_device *netdev, uint32_t data)
222{
223 struct be_adapter *adapter = netdev_priv(netdev);
224
225 if (data)
226 adapter->rx_csum = true;
227 else
228 adapter->rx_csum = false;
229
230 return 0;
231}
232
233static void
234be_get_ethtool_stats(struct net_device *netdev,
235 struct ethtool_stats *stats, uint64_t *data)
236{
237 struct be_adapter *adapter = netdev_priv(netdev);
238 struct be_drvr_stats *drvr_stats = &adapter->stats.drvr_stats;
239 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
240 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
241 struct be_port_rxf_stats *port_stats =
242 &rxf_stats->port[adapter->port_num];
243 struct net_device_stats *net_stats = &adapter->stats.net_stats;
244 struct be_erx_stats *erx_stats = &hw_stats->erx;
245 void *p = NULL;
246 int i;
247
248 for (i = 0; i < ETHTOOL_STATS_NUM; i++) {
249 switch (et_stats[i].type) {
250 case NETSTAT:
251 p = net_stats;
252 break;
253 case DRVSTAT:
254 p = drvr_stats;
255 break;
256 case PORTSTAT:
257 p = port_stats;
258 break;
259 case MISCSTAT:
260 p = rxf_stats;
261 break;
262 case ERXSTAT: /* Currently only one ERX stat is provided */
263 p = (u32 *)erx_stats + adapter->rx_obj.q.id;
264 break;
265 }
266
267 p = (u8 *)p + et_stats[i].offset;
268 data[i] = (et_stats[i].size == sizeof(u64)) ?
269 *(u64 *)p: *(u32 *)p;
270 }
271
272 return;
273}
274
275static void
276be_get_stat_strings(struct net_device *netdev, uint32_t stringset,
277 uint8_t *data)
278{
279 int i;
280 switch (stringset) {
281 case ETH_SS_STATS:
282 for (i = 0; i < ETHTOOL_STATS_NUM; i++) {
283 memcpy(data, et_stats[i].desc, ETH_GSTRING_LEN);
284 data += ETH_GSTRING_LEN;
285 }
286 break;
287 }
288}
289
290static int be_get_stats_count(struct net_device *netdev)
291{
292 return ETHTOOL_STATS_NUM;
293}
294
295static int be_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
296{
297 ecmd->speed = SPEED_10000;
298 ecmd->duplex = DUPLEX_FULL;
299 ecmd->autoneg = AUTONEG_DISABLE;
300 return 0;
301}
302
303static void
304be_get_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring)
305{
306 struct be_adapter *adapter = netdev_priv(netdev);
307
308 ring->rx_max_pending = adapter->rx_obj.q.len;
309 ring->tx_max_pending = adapter->tx_obj.q.len;
310
311 ring->rx_pending = atomic_read(&adapter->rx_obj.q.used);
312 ring->tx_pending = atomic_read(&adapter->tx_obj.q.used);
313}
314
315static void
316be_get_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
317{
318 struct be_adapter *adapter = netdev_priv(netdev);
319
320 be_cmd_get_flow_control(&adapter->ctrl, &ecmd->tx_pause,
321 &ecmd->rx_pause);
322 ecmd->autoneg = AUTONEG_ENABLE;
323}
324
325static int
326be_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
327{
328 struct be_adapter *adapter = netdev_priv(netdev);
329 int status;
330
331 if (ecmd->autoneg != AUTONEG_ENABLE)
332 return -EINVAL;
333
334 status = be_cmd_set_flow_control(&adapter->ctrl, ecmd->tx_pause,
335 ecmd->rx_pause);
336 if (!status)
337 dev_warn(&adapter->pdev->dev, "Pause param set failed.\n");
338
339 return status;
340}
341
342struct ethtool_ops be_ethtool_ops = {
343 .get_settings = be_get_settings,
344 .get_drvinfo = be_get_drvinfo,
345 .get_link = ethtool_op_get_link,
346 .get_coalesce = be_get_coalesce,
347 .set_coalesce = be_set_coalesce,
348 .get_ringparam = be_get_ringparam,
349 .get_pauseparam = be_get_pauseparam,
350 .set_pauseparam = be_set_pauseparam,
351 .get_rx_csum = be_get_rx_csum,
352 .set_rx_csum = be_set_rx_csum,
353 .get_tx_csum = ethtool_op_get_tx_csum,
354 .set_tx_csum = ethtool_op_set_tx_csum,
355 .get_sg = ethtool_op_get_sg,
356 .set_sg = ethtool_op_set_sg,
357 .get_tso = ethtool_op_get_tso,
358 .set_tso = ethtool_op_set_tso,
359 .get_strings = be_get_stat_strings,
360 .get_stats_count = be_get_stats_count,
361 .get_ethtool_stats = be_get_ethtool_stats,
362};
diff --git a/drivers/net/benet/be_hw.h b/drivers/net/benet/be_hw.h
new file mode 100644
index 000000000000..b132aa4893ca
--- /dev/null
+++ b/drivers/net/benet/be_hw.h
@@ -0,0 +1,211 @@
1/*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18/********* Mailbox door bell *************/
19/* Used for driver communication with the FW.
20 * The software must write this register twice to post any command. First,
21 * it writes the register with hi=1 and the upper bits of the physical address
22 * for the MAILBOX structure. Software must poll the ready bit until this
23 * is acknowledged. Then, sotware writes the register with hi=0 with the lower
24 * bits in the address. It must poll the ready bit until the command is
25 * complete. Upon completion, the MAILBOX will contain a valid completion
26 * queue entry.
27 */
28#define MPU_MAILBOX_DB_OFFSET 0x160
29#define MPU_MAILBOX_DB_RDY_MASK 0x1 /* bit 0 */
30#define MPU_MAILBOX_DB_HI_MASK 0x2 /* bit 1 */
31
32#define MPU_EP_CONTROL 0
33
34/********** MPU semphore ******************/
35#define MPU_EP_SEMAPHORE_OFFSET 0xac
36#define EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF
37#define EP_SEMAPHORE_POST_ERR_MASK 0x1
38#define EP_SEMAPHORE_POST_ERR_SHIFT 31
39/* MPU semphore POST stage values */
40#define POST_STAGE_AWAITING_HOST_RDY 0x1 /* FW awaiting goahead from host */
41#define POST_STAGE_HOST_RDY 0x2 /* Host has given go-ahed to FW */
42#define POST_STAGE_BE_RESET 0x3 /* Host wants to reset chip */
43#define POST_STAGE_ARMFW_RDY 0xc000 /* FW is done with POST */
44
45/********* Memory BAR register ************/
46#define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc
47/* Host Interrupt Enable, if set interrupts are enabled although "PCI Interrupt
48 * Disable" may still globally block interrupts in addition to individual
49 * interrupt masks; a mechanism for the device driver to block all interrupts
50 * atomically without having to arbitrate for the PCI Interrupt Disable bit
51 * with the OS.
52 */
53#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */
54/* PCI physical function number */
55#define MEMBAR_CTRL_INT_CTRL_PFUNC_MASK 0x7 /* bits 26 - 28 */
56#define MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT 26
57
58/********* Event Q door bell *************/
59#define DB_EQ_OFFSET DB_CQ_OFFSET
60#define DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */
61/* Clear the interrupt for this eq */
62#define DB_EQ_CLR_SHIFT (9) /* bit 9 */
63/* Must be 1 */
64#define DB_EQ_EVNT_SHIFT (10) /* bit 10 */
65/* Number of event entries processed */
66#define DB_EQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
67/* Rearm bit */
68#define DB_EQ_REARM_SHIFT (29) /* bit 29 */
69
70/********* Compl Q door bell *************/
71#define DB_CQ_OFFSET 0x120
72#define DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
73/* Number of event entries processed */
74#define DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
75/* Rearm bit */
76#define DB_CQ_REARM_SHIFT (29) /* bit 29 */
77
78/********** TX ULP door bell *************/
79#define DB_TXULP1_OFFSET 0x60
80#define DB_TXULP_RING_ID_MASK 0x7FF /* bits 0 - 10 */
81/* Number of tx entries posted */
82#define DB_TXULP_NUM_POSTED_SHIFT (16) /* bits 16 - 29 */
83#define DB_TXULP_NUM_POSTED_MASK 0x3FFF /* bits 16 - 29 */
84
85/********** RQ(erx) door bell ************/
86#define DB_RQ_OFFSET 0x100
87#define DB_RQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
88/* Number of rx frags posted */
89#define DB_RQ_NUM_POSTED_SHIFT (24) /* bits 24 - 31 */
90
91/*
92 * BE descriptors: host memory data structures whose formats
93 * are hardwired in BE silicon.
94 */
95/* Event Queue Descriptor */
96#define EQ_ENTRY_VALID_MASK 0x1 /* bit 0 */
97#define EQ_ENTRY_RES_ID_MASK 0xFFFF /* bits 16 - 31 */
98#define EQ_ENTRY_RES_ID_SHIFT 16
99struct be_eq_entry {
100 u32 evt;
101};
102
103/* TX Queue Descriptor */
104#define ETH_WRB_FRAG_LEN_MASK 0xFFFF
105struct be_eth_wrb {
106 u32 frag_pa_hi; /* dword 0 */
107 u32 frag_pa_lo; /* dword 1 */
108 u32 rsvd0; /* dword 2 */
109 u32 frag_len; /* dword 3: bits 0 - 15 */
110} __packed;
111
112/* Pseudo amap definition for eth_hdr_wrb in which each bit of the
113 * actual structure is defined as a byte : used to calculate
114 * offset/shift/mask of each field */
115struct amap_eth_hdr_wrb {
116 u8 rsvd0[32]; /* dword 0 */
117 u8 rsvd1[32]; /* dword 1 */
118 u8 complete; /* dword 2 */
119 u8 event;
120 u8 crc;
121 u8 forward;
122 u8 ipsec;
123 u8 mgmt;
124 u8 ipcs;
125 u8 udpcs;
126 u8 tcpcs;
127 u8 lso;
128 u8 vlan;
129 u8 gso[2];
130 u8 num_wrb[5];
131 u8 lso_mss[14];
132 u8 len[16]; /* dword 3 */
133 u8 vlan_tag[16];
134} __packed;
135
136struct be_eth_hdr_wrb {
137 u32 dw[4];
138};
139
140/* TX Compl Queue Descriptor */
141
142/* Pseudo amap definition for eth_tx_compl in which each bit of the
143 * actual structure is defined as a byte: used to calculate
144 * offset/shift/mask of each field */
145struct amap_eth_tx_compl {
146 u8 wrb_index[16]; /* dword 0 */
147 u8 ct[2]; /* dword 0 */
148 u8 port[2]; /* dword 0 */
149 u8 rsvd0[8]; /* dword 0 */
150 u8 status[4]; /* dword 0 */
151 u8 user_bytes[16]; /* dword 1 */
152 u8 nwh_bytes[8]; /* dword 1 */
153 u8 lso; /* dword 1 */
154 u8 cast_enc[2]; /* dword 1 */
155 u8 rsvd1[5]; /* dword 1 */
156 u8 rsvd2[32]; /* dword 2 */
157 u8 pkts[16]; /* dword 3 */
158 u8 ringid[11]; /* dword 3 */
159 u8 hash_val[4]; /* dword 3 */
160 u8 valid; /* dword 3 */
161} __packed;
162
163struct be_eth_tx_compl {
164 u32 dw[4];
165};
166
167/* RX Queue Descriptor */
168struct be_eth_rx_d {
169 u32 fragpa_hi;
170 u32 fragpa_lo;
171};
172
173/* RX Compl Queue Descriptor */
174
175/* Pseudo amap definition for eth_rx_compl in which each bit of the
176 * actual structure is defined as a byte: used to calculate
177 * offset/shift/mask of each field */
178struct amap_eth_rx_compl {
179 u8 vlan_tag[16]; /* dword 0 */
180 u8 pktsize[14]; /* dword 0 */
181 u8 port; /* dword 0 */
182 u8 ip_opt; /* dword 0 */
183 u8 err; /* dword 1 */
184 u8 rsshp; /* dword 1 */
185 u8 ipf; /* dword 1 */
186 u8 tcpf; /* dword 1 */
187 u8 udpf; /* dword 1 */
188 u8 ipcksm; /* dword 1 */
189 u8 l4_cksm; /* dword 1 */
190 u8 ip_version; /* dword 1 */
191 u8 macdst[6]; /* dword 1 */
192 u8 vtp; /* dword 1 */
193 u8 rsvd0; /* dword 1 */
194 u8 fragndx[10]; /* dword 1 */
195 u8 ct[2]; /* dword 1 */
196 u8 sw; /* dword 1 */
197 u8 numfrags[3]; /* dword 1 */
198 u8 rss_flush; /* dword 2 */
199 u8 cast_enc[2]; /* dword 2 */
200 u8 qnq; /* dword 2 */
201 u8 rss_bank; /* dword 2 */
202 u8 rsvd1[23]; /* dword 2 */
203 u8 lro_pkt; /* dword 2 */
204 u8 rsvd2[2]; /* dword 2 */
205 u8 valid; /* dword 2 */
206 u8 rsshash[32]; /* dword 3 */
207} __packed;
208
209struct be_eth_rx_compl {
210 u32 dw[4];
211};
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
new file mode 100644
index 000000000000..897a63de5bdb
--- /dev/null
+++ b/drivers/net/benet/be_main.c
@@ -0,0 +1,1903 @@
1/*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#include "be.h"
19
20MODULE_VERSION(DRV_VER);
21MODULE_DEVICE_TABLE(pci, be_dev_ids);
22MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
23MODULE_AUTHOR("ServerEngines Corporation");
24MODULE_LICENSE("GPL");
25
26static unsigned int rx_frag_size = 2048;
27module_param(rx_frag_size, uint, S_IRUGO);
28MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
29
30#define BE_VENDOR_ID 0x19a2
31#define BE2_DEVICE_ID_1 0x0211
32static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
33 { PCI_DEVICE(BE_VENDOR_ID, BE2_DEVICE_ID_1) },
34 { 0 }
35};
36MODULE_DEVICE_TABLE(pci, be_dev_ids);
37
38static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
39{
40 struct be_dma_mem *mem = &q->dma_mem;
41 if (mem->va)
42 pci_free_consistent(adapter->pdev, mem->size,
43 mem->va, mem->dma);
44}
45
46static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
47 u16 len, u16 entry_size)
48{
49 struct be_dma_mem *mem = &q->dma_mem;
50
51 memset(q, 0, sizeof(*q));
52 q->len = len;
53 q->entry_size = entry_size;
54 mem->size = len * entry_size;
55 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
56 if (!mem->va)
57 return -1;
58 memset(mem->va, 0, mem->size);
59 return 0;
60}
61
62static inline void *queue_head_node(struct be_queue_info *q)
63{
64 return q->dma_mem.va + q->head * q->entry_size;
65}
66
67static inline void *queue_tail_node(struct be_queue_info *q)
68{
69 return q->dma_mem.va + q->tail * q->entry_size;
70}
71
72static inline void queue_head_inc(struct be_queue_info *q)
73{
74 index_inc(&q->head, q->len);
75}
76
77static inline void queue_tail_inc(struct be_queue_info *q)
78{
79 index_inc(&q->tail, q->len);
80}
81
82static void be_intr_set(struct be_ctrl_info *ctrl, bool enable)
83{
84 u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
85 u32 reg = ioread32(addr);
86 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
87 if (!enabled && enable) {
88 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
89 } else if (enabled && !enable) {
90 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
91 } else {
92 printk(KERN_WARNING DRV_NAME
93 ": bad value in membar_int_ctrl reg=0x%x\n", reg);
94 return;
95 }
96 iowrite32(reg, addr);
97}
98
99static void be_rxq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
100{
101 u32 val = 0;
102 val |= qid & DB_RQ_RING_ID_MASK;
103 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
104 iowrite32(val, ctrl->db + DB_RQ_OFFSET);
105}
106
107static void be_txq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
108{
109 u32 val = 0;
110 val |= qid & DB_TXULP_RING_ID_MASK;
111 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
112 iowrite32(val, ctrl->db + DB_TXULP1_OFFSET);
113}
114
115static void be_eq_notify(struct be_ctrl_info *ctrl, u16 qid,
116 bool arm, bool clear_int, u16 num_popped)
117{
118 u32 val = 0;
119 val |= qid & DB_EQ_RING_ID_MASK;
120 if (arm)
121 val |= 1 << DB_EQ_REARM_SHIFT;
122 if (clear_int)
123 val |= 1 << DB_EQ_CLR_SHIFT;
124 val |= 1 << DB_EQ_EVNT_SHIFT;
125 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
126 iowrite32(val, ctrl->db + DB_EQ_OFFSET);
127}
128
129static void be_cq_notify(struct be_ctrl_info *ctrl, u16 qid,
130 bool arm, u16 num_popped)
131{
132 u32 val = 0;
133 val |= qid & DB_CQ_RING_ID_MASK;
134 if (arm)
135 val |= 1 << DB_CQ_REARM_SHIFT;
136 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
137 iowrite32(val, ctrl->db + DB_CQ_OFFSET);
138}
139
140
141static int be_mac_addr_set(struct net_device *netdev, void *p)
142{
143 struct be_adapter *adapter = netdev_priv(netdev);
144 struct sockaddr *addr = p;
145 int status = 0;
146
147 if (netif_running(netdev)) {
148 status = be_cmd_pmac_del(&adapter->ctrl, adapter->if_handle,
149 adapter->pmac_id);
150 if (status)
151 return status;
152
153 status = be_cmd_pmac_add(&adapter->ctrl, (u8 *)addr->sa_data,
154 adapter->if_handle, &adapter->pmac_id);
155 }
156
157 if (!status)
158 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
159
160 return status;
161}
162
163static void netdev_stats_update(struct be_adapter *adapter)
164{
165 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
166 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
167 struct be_port_rxf_stats *port_stats =
168 &rxf_stats->port[adapter->port_num];
169 struct net_device_stats *dev_stats = &adapter->stats.net_stats;
170
171 dev_stats->rx_packets = port_stats->rx_total_frames;
172 dev_stats->tx_packets = port_stats->tx_unicastframes +
173 port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
174 dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
175 (u64) port_stats->rx_bytes_lsd;
176 dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
177 (u64) port_stats->tx_bytes_lsd;
178
179 /* bad pkts received */
180 dev_stats->rx_errors = port_stats->rx_crc_errors +
181 port_stats->rx_alignment_symbol_errors +
182 port_stats->rx_in_range_errors +
183 port_stats->rx_out_range_errors + port_stats->rx_frame_too_long;
184
185 /* packet transmit problems */
186 dev_stats->tx_errors = 0;
187
188 /* no space in linux buffers */
189 dev_stats->rx_dropped = 0;
190
191 /* no space available in linux */
192 dev_stats->tx_dropped = 0;
193
194 dev_stats->multicast = port_stats->tx_multicastframes;
195 dev_stats->collisions = 0;
196
197 /* detailed rx errors */
198 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
199 port_stats->rx_out_range_errors + port_stats->rx_frame_too_long;
200 /* receive ring buffer overflow */
201 dev_stats->rx_over_errors = 0;
202 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
203
204 /* frame alignment errors */
205 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
206 /* receiver fifo overrun */
207 /* drops_no_pbuf is no per i/f, it's per BE card */
208 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
209 port_stats->rx_input_fifo_overflow +
210 rxf_stats->rx_drops_no_pbuf;
211 /* receiver missed packetd */
212 dev_stats->rx_missed_errors = 0;
213 /* detailed tx_errors */
214 dev_stats->tx_aborted_errors = 0;
215 dev_stats->tx_carrier_errors = 0;
216 dev_stats->tx_fifo_errors = 0;
217 dev_stats->tx_heartbeat_errors = 0;
218 dev_stats->tx_window_errors = 0;
219}
220
221static void be_link_status_update(struct be_adapter *adapter)
222{
223 struct be_link_info *prev = &adapter->link;
224 struct be_link_info now = { 0 };
225 struct net_device *netdev = adapter->netdev;
226
227 be_cmd_link_status_query(&adapter->ctrl, &now);
228
229 /* If link came up or went down */
230 if (now.speed != prev->speed && (now.speed == PHY_LINK_SPEED_ZERO ||
231 prev->speed == PHY_LINK_SPEED_ZERO)) {
232 if (now.speed == PHY_LINK_SPEED_ZERO) {
233 netif_stop_queue(netdev);
234 netif_carrier_off(netdev);
235 printk(KERN_INFO "%s: Link down\n", netdev->name);
236 } else {
237 netif_start_queue(netdev);
238 netif_carrier_on(netdev);
239 printk(KERN_INFO "%s: Link up\n", netdev->name);
240 }
241 }
242 *prev = now;
243}
244
245/* Update the EQ delay n BE based on the RX frags consumed / sec */
246static void be_rx_eqd_update(struct be_adapter *adapter)
247{
248 u32 eqd;
249 struct be_ctrl_info *ctrl = &adapter->ctrl;
250 struct be_eq_obj *rx_eq = &adapter->rx_eq;
251 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
252
253 /* Update once a second */
254 if (((jiffies - stats->rx_fps_jiffies) < HZ) || rx_eq->enable_aic == 0)
255 return;
256
257 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
258 ((jiffies - stats->rx_fps_jiffies) / HZ);
259
260 stats->rx_fps_jiffies = jiffies;
261 stats->be_prev_rx_frags = stats->be_rx_frags;
262 eqd = stats->be_rx_fps / 110000;
263 eqd = eqd << 3;
264 if (eqd > rx_eq->max_eqd)
265 eqd = rx_eq->max_eqd;
266 if (eqd < rx_eq->min_eqd)
267 eqd = rx_eq->min_eqd;
268 if (eqd < 10)
269 eqd = 0;
270 if (eqd != rx_eq->cur_eqd)
271 be_cmd_modify_eqd(ctrl, rx_eq->q.id, eqd);
272
273 rx_eq->cur_eqd = eqd;
274}
275
276static void be_worker(struct work_struct *work)
277{
278 struct be_adapter *adapter =
279 container_of(work, struct be_adapter, work.work);
280 int status;
281
282 /* Check link */
283 be_link_status_update(adapter);
284
285 /* Get Stats */
286 status = be_cmd_get_stats(&adapter->ctrl, &adapter->stats.cmd);
287 if (!status)
288 netdev_stats_update(adapter);
289
290 /* Set EQ delay */
291 be_rx_eqd_update(adapter);
292
293 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
294}
295
296static struct net_device_stats *be_get_stats(struct net_device *dev)
297{
298 struct be_adapter *adapter = netdev_priv(dev);
299
300 return &adapter->stats.net_stats;
301}
302
303static void be_tx_stats_update(struct be_adapter *adapter,
304 u32 wrb_cnt, u32 copied, bool stopped)
305{
306 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
307 stats->be_tx_reqs++;
308 stats->be_tx_wrbs += wrb_cnt;
309 stats->be_tx_bytes += copied;
310 if (stopped)
311 stats->be_tx_stops++;
312
313 /* Update tx rate once in two seconds */
314 if ((jiffies - stats->be_tx_jiffies) > 2 * HZ) {
315 u32 r;
316 r = (stats->be_tx_bytes - stats->be_tx_bytes_prev) /
317 ((u32) (jiffies - stats->be_tx_jiffies) / HZ);
318 r = (r / 1000000); /* M bytes/s */
319 stats->be_tx_rate = (r * 8); /* M bits/s */
320 stats->be_tx_jiffies = jiffies;
321 stats->be_tx_bytes_prev = stats->be_tx_bytes;
322 }
323}
324
325/* Determine number of WRB entries needed to xmit data in an skb */
326static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
327{
328 int cnt = 0;
329 while (skb) {
330 if (skb->len > skb->data_len)
331 cnt++;
332 cnt += skb_shinfo(skb)->nr_frags;
333 skb = skb_shinfo(skb)->frag_list;
334 }
335 /* to account for hdr wrb */
336 cnt++;
337 if (cnt & 1) {
338 /* add a dummy to make it an even num */
339 cnt++;
340 *dummy = true;
341 } else
342 *dummy = false;
343 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
344 return cnt;
345}
346
347static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
348{
349 wrb->frag_pa_hi = upper_32_bits(addr);
350 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
351 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
352}
353
354static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
355 bool vlan, u32 wrb_cnt, u32 len)
356{
357 memset(hdr, 0, sizeof(*hdr));
358
359 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
360
361 if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
362 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
363 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
364 hdr, skb_shinfo(skb)->gso_size);
365 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
366 if (is_tcp_pkt(skb))
367 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
368 else if (is_udp_pkt(skb))
369 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
370 }
371
372 if (vlan && vlan_tx_tag_present(skb)) {
373 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
374 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
375 hdr, vlan_tx_tag_get(skb));
376 }
377
378 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
379 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
380 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
381 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
382}
383
384
385static int make_tx_wrbs(struct be_adapter *adapter,
386 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
387{
388 u64 busaddr;
389 u32 i, copied = 0;
390 struct pci_dev *pdev = adapter->pdev;
391 struct sk_buff *first_skb = skb;
392 struct be_queue_info *txq = &adapter->tx_obj.q;
393 struct be_eth_wrb *wrb;
394 struct be_eth_hdr_wrb *hdr;
395
396 atomic_add(wrb_cnt, &txq->used);
397 hdr = queue_head_node(txq);
398 queue_head_inc(txq);
399
400 while (skb) {
401 if (skb->len > skb->data_len) {
402 int len = skb->len - skb->data_len;
403 busaddr = pci_map_single(pdev, skb->data, len,
404 PCI_DMA_TODEVICE);
405 wrb = queue_head_node(txq);
406 wrb_fill(wrb, busaddr, len);
407 be_dws_cpu_to_le(wrb, sizeof(*wrb));
408 queue_head_inc(txq);
409 copied += len;
410 }
411
412 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
413 struct skb_frag_struct *frag =
414 &skb_shinfo(skb)->frags[i];
415 busaddr = pci_map_page(pdev, frag->page,
416 frag->page_offset,
417 frag->size, PCI_DMA_TODEVICE);
418 wrb = queue_head_node(txq);
419 wrb_fill(wrb, busaddr, frag->size);
420 be_dws_cpu_to_le(wrb, sizeof(*wrb));
421 queue_head_inc(txq);
422 copied += frag->size;
423 }
424 skb = skb_shinfo(skb)->frag_list;
425 }
426
427 if (dummy_wrb) {
428 wrb = queue_head_node(txq);
429 wrb_fill(wrb, 0, 0);
430 be_dws_cpu_to_le(wrb, sizeof(*wrb));
431 queue_head_inc(txq);
432 }
433
434 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
435 wrb_cnt, copied);
436 be_dws_cpu_to_le(hdr, sizeof(*hdr));
437
438 return copied;
439}
440
441static int be_xmit(struct sk_buff *skb, struct net_device *netdev)
442{
443 struct be_adapter *adapter = netdev_priv(netdev);
444 struct be_tx_obj *tx_obj = &adapter->tx_obj;
445 struct be_queue_info *txq = &tx_obj->q;
446 u32 wrb_cnt = 0, copied = 0;
447 u32 start = txq->head;
448 bool dummy_wrb, stopped = false;
449
450 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
451
452 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
453
454 /* record the sent skb in the sent_skb table */
455 BUG_ON(tx_obj->sent_skb_list[start]);
456 tx_obj->sent_skb_list[start] = skb;
457
458 /* Ensure that txq has space for the next skb; Else stop the queue
459 * *BEFORE* ringing the tx doorbell, so that we serialze the
460 * tx compls of the current transmit which'll wake up the queue
461 */
462 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >= txq->len) {
463 netif_stop_queue(netdev);
464 stopped = true;
465 }
466
467 be_txq_notify(&adapter->ctrl, txq->id, wrb_cnt);
468
469 netdev->trans_start = jiffies;
470
471 be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
472 return NETDEV_TX_OK;
473}
474
475static int be_change_mtu(struct net_device *netdev, int new_mtu)
476{
477 struct be_adapter *adapter = netdev_priv(netdev);
478 if (new_mtu < BE_MIN_MTU ||
479 new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
480 dev_info(&adapter->pdev->dev,
481 "MTU must be between %d and %d bytes\n",
482 BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
483 return -EINVAL;
484 }
485 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
486 netdev->mtu, new_mtu);
487 netdev->mtu = new_mtu;
488 return 0;
489}
490
491/*
492 * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
493 * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
494 * set the BE in promiscuous VLAN mode.
495 */
496static void be_vids_config(struct net_device *netdev)
497{
498 struct be_adapter *adapter = netdev_priv(netdev);
499 u16 vtag[BE_NUM_VLANS_SUPPORTED];
500 u16 ntags = 0, i;
501
502 if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
503 /* Construct VLAN Table to give to HW */
504 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
505 if (adapter->vlan_tag[i]) {
506 vtag[ntags] = cpu_to_le16(i);
507 ntags++;
508 }
509 }
510 be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
511 vtag, ntags, 1, 0);
512 } else {
513 be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
514 NULL, 0, 1, 1);
515 }
516}
517
518static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
519{
520 struct be_adapter *adapter = netdev_priv(netdev);
521 struct be_eq_obj *rx_eq = &adapter->rx_eq;
522 struct be_eq_obj *tx_eq = &adapter->tx_eq;
523 struct be_ctrl_info *ctrl = &adapter->ctrl;
524
525 be_eq_notify(ctrl, rx_eq->q.id, false, false, 0);
526 be_eq_notify(ctrl, tx_eq->q.id, false, false, 0);
527 adapter->vlan_grp = grp;
528 be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
529 be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
530}
531
532static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
533{
534 struct be_adapter *adapter = netdev_priv(netdev);
535
536 adapter->num_vlans++;
537 adapter->vlan_tag[vid] = 1;
538
539 be_vids_config(netdev);
540}
541
542static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
543{
544 struct be_adapter *adapter = netdev_priv(netdev);
545
546 adapter->num_vlans--;
547 adapter->vlan_tag[vid] = 0;
548
549 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
550 be_vids_config(netdev);
551}
552
553static void be_set_multicast_filter(struct net_device *netdev)
554{
555 struct be_adapter *adapter = netdev_priv(netdev);
556 struct dev_mc_list *mc_ptr;
557 u8 mac_addr[32][ETH_ALEN];
558 int i = 0;
559
560 if (netdev->flags & IFF_ALLMULTI) {
561 /* set BE in Multicast promiscuous */
562 be_cmd_mcast_mac_set(&adapter->ctrl,
563 adapter->if_handle, NULL, 0, true);
564 return;
565 }
566
567 for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
568 memcpy(&mac_addr[i][0], mc_ptr->dmi_addr, ETH_ALEN);
569 if (++i >= 32) {
570 be_cmd_mcast_mac_set(&adapter->ctrl,
571 adapter->if_handle, &mac_addr[0][0], i, false);
572 i = 0;
573 }
574
575 }
576
577 if (i) {
578 /* reset the promiscuous mode also. */
579 be_cmd_mcast_mac_set(&adapter->ctrl,
580 adapter->if_handle, &mac_addr[0][0], i, false);
581 }
582}
583
584static void be_set_multicast_list(struct net_device *netdev)
585{
586 struct be_adapter *adapter = netdev_priv(netdev);
587
588 if (netdev->flags & IFF_PROMISC) {
589 be_cmd_promiscuous_config(&adapter->ctrl, adapter->port_num, 1);
590 } else {
591 be_cmd_promiscuous_config(&adapter->ctrl, adapter->port_num, 0);
592 be_set_multicast_filter(netdev);
593 }
594}
595
596static void be_rx_rate_update(struct be_adapter *adapter, u32 pktsize,
597 u16 numfrags)
598{
599 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
600 u32 rate;
601
602 stats->be_rx_compl++;
603 stats->be_rx_frags += numfrags;
604 stats->be_rx_bytes += pktsize;
605
606 /* Update the rate once in two seconds */
607 if ((jiffies - stats->be_rx_jiffies) < 2 * HZ)
608 return;
609
610 rate = (stats->be_rx_bytes - stats->be_rx_bytes_prev) /
611 ((u32) (jiffies - stats->be_rx_jiffies) / HZ);
612 rate = (rate / 1000000); /* MB/Sec */
613 stats->be_rx_rate = (rate * 8); /* Mega Bits/Sec */
614 stats->be_rx_jiffies = jiffies;
615 stats->be_rx_bytes_prev = stats->be_rx_bytes;
616}
617
618static struct be_rx_page_info *
619get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
620{
621 struct be_rx_page_info *rx_page_info;
622 struct be_queue_info *rxq = &adapter->rx_obj.q;
623
624 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
625 BUG_ON(!rx_page_info->page);
626
627 if (rx_page_info->last_page_user)
628 pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
629 adapter->big_page_size, PCI_DMA_FROMDEVICE);
630
631 atomic_dec(&rxq->used);
632 return rx_page_info;
633}
634
635/* Throwaway the data in the Rx completion */
636static void be_rx_compl_discard(struct be_adapter *adapter,
637 struct be_eth_rx_compl *rxcp)
638{
639 struct be_queue_info *rxq = &adapter->rx_obj.q;
640 struct be_rx_page_info *page_info;
641 u16 rxq_idx, i, num_rcvd;
642
643 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
644 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
645
646 for (i = 0; i < num_rcvd; i++) {
647 page_info = get_rx_page_info(adapter, rxq_idx);
648 put_page(page_info->page);
649 memset(page_info, 0, sizeof(*page_info));
650 index_inc(&rxq_idx, rxq->len);
651 }
652}
653
654/*
655 * skb_fill_rx_data forms a complete skb for an ether frame
656 * indicated by rxcp.
657 */
658static void skb_fill_rx_data(struct be_adapter *adapter,
659 struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
660{
661 struct be_queue_info *rxq = &adapter->rx_obj.q;
662 struct be_rx_page_info *page_info;
663 u16 rxq_idx, i, num_rcvd;
664 u32 pktsize, hdr_len, curr_frag_len;
665 u8 *start;
666
667 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
668 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
669 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
670
671 page_info = get_rx_page_info(adapter, rxq_idx);
672
673 start = page_address(page_info->page) + page_info->page_offset;
674 prefetch(start);
675
676 /* Copy data in the first descriptor of this completion */
677 curr_frag_len = min(pktsize, rx_frag_size);
678
679 /* Copy the header portion into skb_data */
680 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
681 memcpy(skb->data, start, hdr_len);
682 skb->len = curr_frag_len;
683 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
684 /* Complete packet has now been moved to data */
685 put_page(page_info->page);
686 skb->data_len = 0;
687 skb->tail += curr_frag_len;
688 } else {
689 skb_shinfo(skb)->nr_frags = 1;
690 skb_shinfo(skb)->frags[0].page = page_info->page;
691 skb_shinfo(skb)->frags[0].page_offset =
692 page_info->page_offset + hdr_len;
693 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
694 skb->data_len = curr_frag_len - hdr_len;
695 skb->tail += hdr_len;
696 }
697 memset(page_info, 0, sizeof(*page_info));
698
699 if (pktsize <= rx_frag_size) {
700 BUG_ON(num_rcvd != 1);
701 return;
702 }
703
704 /* More frags present for this completion */
705 pktsize -= curr_frag_len; /* account for above copied frag */
706 for (i = 1; i < num_rcvd; i++) {
707 index_inc(&rxq_idx, rxq->len);
708 page_info = get_rx_page_info(adapter, rxq_idx);
709
710 curr_frag_len = min(pktsize, rx_frag_size);
711
712 skb_shinfo(skb)->frags[i].page = page_info->page;
713 skb_shinfo(skb)->frags[i].page_offset = page_info->page_offset;
714 skb_shinfo(skb)->frags[i].size = curr_frag_len;
715 skb->len += curr_frag_len;
716 skb->data_len += curr_frag_len;
717 skb_shinfo(skb)->nr_frags++;
718 pktsize -= curr_frag_len;
719
720 memset(page_info, 0, sizeof(*page_info));
721 }
722
723 be_rx_rate_update(adapter, pktsize, num_rcvd);
724 return;
725}
726
727/* Process the RX completion indicated by rxcp when LRO is disabled */
728static void be_rx_compl_process(struct be_adapter *adapter,
729 struct be_eth_rx_compl *rxcp)
730{
731 struct sk_buff *skb;
732 u32 vtp, vid;
733 int l4_cksm;
734
735 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
736 vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
737
738 skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
739 if (!skb) {
740 if (net_ratelimit())
741 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
742 be_rx_compl_discard(adapter, rxcp);
743 return;
744 }
745
746 skb_reserve(skb, NET_IP_ALIGN);
747
748 skb_fill_rx_data(adapter, skb, rxcp);
749
750 if (l4_cksm && adapter->rx_csum)
751 skb->ip_summed = CHECKSUM_UNNECESSARY;
752 else
753 skb->ip_summed = CHECKSUM_NONE;
754
755 skb->truesize = skb->len + sizeof(struct sk_buff);
756 skb->protocol = eth_type_trans(skb, adapter->netdev);
757 skb->dev = adapter->netdev;
758
759 if (vtp) {
760 if (!adapter->vlan_grp || adapter->num_vlans == 0) {
761 kfree_skb(skb);
762 return;
763 }
764 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
765 vid = be16_to_cpu(vid);
766 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
767 } else {
768 netif_receive_skb(skb);
769 }
770
771 adapter->netdev->last_rx = jiffies;
772
773 return;
774}
775
776/* Process the RX completion indicated by rxcp when LRO is enabled */
777static void be_rx_compl_process_lro(struct be_adapter *adapter,
778 struct be_eth_rx_compl *rxcp)
779{
780 struct be_rx_page_info *page_info;
781 struct skb_frag_struct rx_frags[BE_MAX_FRAGS_PER_FRAME];
782 struct be_queue_info *rxq = &adapter->rx_obj.q;
783 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
784 u16 i, rxq_idx = 0, vid;
785
786 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
787 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
788 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
789 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
790
791 remaining = pkt_size;
792 for (i = 0; i < num_rcvd; i++) {
793 page_info = get_rx_page_info(adapter, rxq_idx);
794
795 curr_frag_len = min(remaining, rx_frag_size);
796
797 rx_frags[i].page = page_info->page;
798 rx_frags[i].page_offset = page_info->page_offset;
799 rx_frags[i].size = curr_frag_len;
800 remaining -= curr_frag_len;
801
802 index_inc(&rxq_idx, rxq->len);
803
804 memset(page_info, 0, sizeof(*page_info));
805 }
806
807 if (likely(!vlanf)) {
808 lro_receive_frags(&adapter->rx_obj.lro_mgr, rx_frags, pkt_size,
809 pkt_size, NULL, 0);
810 } else {
811 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
812 vid = be16_to_cpu(vid);
813
814 if (!adapter->vlan_grp || adapter->num_vlans == 0)
815 return;
816
817 lro_vlan_hwaccel_receive_frags(&adapter->rx_obj.lro_mgr,
818 rx_frags, pkt_size, pkt_size, adapter->vlan_grp,
819 vid, NULL, 0);
820 }
821
822 be_rx_rate_update(adapter, pkt_size, num_rcvd);
823 return;
824}
825
826static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
827{
828 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
829
830 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
831 return NULL;
832
833 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
834
835 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
836
837 queue_tail_inc(&adapter->rx_obj.cq);
838 return rxcp;
839}
840
841static inline struct page *be_alloc_pages(u32 size)
842{
843 gfp_t alloc_flags = GFP_ATOMIC;
844 u32 order = get_order(size);
845 if (order > 0)
846 alloc_flags |= __GFP_COMP;
847 return alloc_pages(alloc_flags, order);
848}
849
850/*
851 * Allocate a page, split it to fragments of size rx_frag_size and post as
852 * receive buffers to BE
853 */
854static void be_post_rx_frags(struct be_adapter *adapter)
855{
856 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
857 struct be_rx_page_info *page_info = NULL;
858 struct be_queue_info *rxq = &adapter->rx_obj.q;
859 struct page *pagep = NULL;
860 struct be_eth_rx_d *rxd;
861 u64 page_dmaaddr = 0, frag_dmaaddr;
862 u32 posted, page_offset = 0;
863
864
865 page_info = &page_info_tbl[rxq->head];
866 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
867 if (!pagep) {
868 pagep = be_alloc_pages(adapter->big_page_size);
869 if (unlikely(!pagep)) {
870 drvr_stats(adapter)->be_ethrx_post_fail++;
871 break;
872 }
873 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
874 adapter->big_page_size,
875 PCI_DMA_FROMDEVICE);
876 page_info->page_offset = 0;
877 } else {
878 get_page(pagep);
879 page_info->page_offset = page_offset + rx_frag_size;
880 }
881 page_offset = page_info->page_offset;
882 page_info->page = pagep;
883 pci_unmap_addr_set(page_info, bus, page_dmaaddr);
884 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
885
886 rxd = queue_head_node(rxq);
887 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
888 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
889 queue_head_inc(rxq);
890
891 /* Any space left in the current big page for another frag? */
892 if ((page_offset + rx_frag_size + rx_frag_size) >
893 adapter->big_page_size) {
894 pagep = NULL;
895 page_info->last_page_user = true;
896 }
897 page_info = &page_info_tbl[rxq->head];
898 }
899 if (pagep)
900 page_info->last_page_user = true;
901
902 if (posted) {
903 be_rxq_notify(&adapter->ctrl, rxq->id, posted);
904 atomic_add(posted, &rxq->used);
905 }
906
907 return;
908}
909
910static struct be_eth_tx_compl *
911be_tx_compl_get(struct be_adapter *adapter)
912{
913 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
914 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
915
916 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
917 return NULL;
918
919 be_dws_le_to_cpu(txcp, sizeof(*txcp));
920
921 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
922
923 queue_tail_inc(tx_cq);
924 return txcp;
925}
926
927static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
928{
929 struct be_queue_info *txq = &adapter->tx_obj.q;
930 struct be_eth_wrb *wrb;
931 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
932 struct sk_buff *sent_skb;
933 u64 busaddr;
934 u16 cur_index, num_wrbs = 0;
935
936 cur_index = txq->tail;
937 sent_skb = sent_skbs[cur_index];
938 BUG_ON(!sent_skb);
939 sent_skbs[cur_index] = NULL;
940
941 do {
942 cur_index = txq->tail;
943 wrb = queue_tail_node(txq);
944 be_dws_le_to_cpu(wrb, sizeof(*wrb));
945 busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
946 if (busaddr != 0) {
947 pci_unmap_single(adapter->pdev, busaddr,
948 wrb->frag_len, PCI_DMA_TODEVICE);
949 }
950 num_wrbs++;
951 queue_tail_inc(txq);
952 } while (cur_index != last_index);
953
954 atomic_sub(num_wrbs, &txq->used);
955
956 kfree_skb(sent_skb);
957}
958
959static void be_rx_q_clean(struct be_adapter *adapter)
960{
961 struct be_rx_page_info *page_info;
962 struct be_queue_info *rxq = &adapter->rx_obj.q;
963 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
964 struct be_eth_rx_compl *rxcp;
965 u16 tail;
966
967 /* First cleanup pending rx completions */
968 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
969 be_rx_compl_discard(adapter, rxcp);
970 be_cq_notify(&adapter->ctrl, rx_cq->id, true, 1);
971 }
972
973 /* Then free posted rx buffer that were not used */
974 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
975 for (; tail != rxq->head; index_inc(&tail, rxq->len)) {
976 page_info = get_rx_page_info(adapter, tail);
977 put_page(page_info->page);
978 memset(page_info, 0, sizeof(*page_info));
979 }
980 BUG_ON(atomic_read(&rxq->used));
981}
982
983static void be_tx_q_clean(struct be_adapter *adapter)
984{
985 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
986 struct sk_buff *sent_skb;
987 struct be_queue_info *txq = &adapter->tx_obj.q;
988 u16 last_index;
989 bool dummy_wrb;
990
991 while (atomic_read(&txq->used)) {
992 sent_skb = sent_skbs[txq->tail];
993 last_index = txq->tail;
994 index_adv(&last_index,
995 wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
996 be_tx_compl_process(adapter, last_index);
997 }
998}
999
1000static void be_tx_queues_destroy(struct be_adapter *adapter)
1001{
1002 struct be_queue_info *q;
1003
1004 q = &adapter->tx_obj.q;
1005 if (q->created)
1006 be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_TXQ);
1007 be_queue_free(adapter, q);
1008
1009 q = &adapter->tx_obj.cq;
1010 if (q->created)
1011 be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
1012 be_queue_free(adapter, q);
1013
1014 /* No more tx completions can be rcvd now; clean up if there are
1015 * any pending completions or pending tx requests */
1016 be_tx_q_clean(adapter);
1017
1018 q = &adapter->tx_eq.q;
1019 if (q->created)
1020 be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
1021 be_queue_free(adapter, q);
1022}
1023
1024static int be_tx_queues_create(struct be_adapter *adapter)
1025{
1026 struct be_queue_info *eq, *q, *cq;
1027
1028 adapter->tx_eq.max_eqd = 0;
1029 adapter->tx_eq.min_eqd = 0;
1030 adapter->tx_eq.cur_eqd = 96;
1031 adapter->tx_eq.enable_aic = false;
1032 /* Alloc Tx Event queue */
1033 eq = &adapter->tx_eq.q;
1034 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1035 return -1;
1036
1037 /* Ask BE to create Tx Event queue */
1038 if (be_cmd_eq_create(&adapter->ctrl, eq, adapter->tx_eq.cur_eqd))
1039 goto tx_eq_free;
1040 /* Alloc TX eth compl queue */
1041 cq = &adapter->tx_obj.cq;
1042 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1043 sizeof(struct be_eth_tx_compl)))
1044 goto tx_eq_destroy;
1045
1046 /* Ask BE to create Tx eth compl queue */
1047 if (be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3))
1048 goto tx_cq_free;
1049
1050 /* Alloc TX eth queue */
1051 q = &adapter->tx_obj.q;
1052 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1053 goto tx_cq_destroy;
1054
1055 /* Ask BE to create Tx eth queue */
1056 if (be_cmd_txq_create(&adapter->ctrl, q, cq))
1057 goto tx_q_free;
1058 return 0;
1059
1060tx_q_free:
1061 be_queue_free(adapter, q);
1062tx_cq_destroy:
1063 be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
1064tx_cq_free:
1065 be_queue_free(adapter, cq);
1066tx_eq_destroy:
1067 be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
1068tx_eq_free:
1069 be_queue_free(adapter, eq);
1070 return -1;
1071}
1072
1073static void be_rx_queues_destroy(struct be_adapter *adapter)
1074{
1075 struct be_queue_info *q;
1076
1077 q = &adapter->rx_obj.q;
1078 if (q->created) {
1079 be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_RXQ);
1080 be_rx_q_clean(adapter);
1081 }
1082 be_queue_free(adapter, q);
1083
1084 q = &adapter->rx_obj.cq;
1085 if (q->created)
1086 be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
1087 be_queue_free(adapter, q);
1088
1089 q = &adapter->rx_eq.q;
1090 if (q->created)
1091 be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
1092 be_queue_free(adapter, q);
1093}
1094
1095static int be_rx_queues_create(struct be_adapter *adapter)
1096{
1097 struct be_queue_info *eq, *q, *cq;
1098 int rc;
1099
1100 adapter->max_rx_coal = BE_MAX_FRAGS_PER_FRAME;
1101 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1102 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1103 adapter->rx_eq.min_eqd = 0;
1104 adapter->rx_eq.cur_eqd = 0;
1105 adapter->rx_eq.enable_aic = true;
1106
1107 /* Alloc Rx Event queue */
1108 eq = &adapter->rx_eq.q;
1109 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1110 sizeof(struct be_eq_entry));
1111 if (rc)
1112 return rc;
1113
1114 /* Ask BE to create Rx Event queue */
1115 rc = be_cmd_eq_create(&adapter->ctrl, eq, adapter->rx_eq.cur_eqd);
1116 if (rc)
1117 goto rx_eq_free;
1118
1119 /* Alloc RX eth compl queue */
1120 cq = &adapter->rx_obj.cq;
1121 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1122 sizeof(struct be_eth_rx_compl));
1123 if (rc)
1124 goto rx_eq_destroy;
1125
1126 /* Ask BE to create Rx eth compl queue */
1127 rc = be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3);
1128 if (rc)
1129 goto rx_cq_free;
1130
1131 /* Alloc RX eth queue */
1132 q = &adapter->rx_obj.q;
1133 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1134 if (rc)
1135 goto rx_cq_destroy;
1136
1137 /* Ask BE to create Rx eth queue */
1138 rc = be_cmd_rxq_create(&adapter->ctrl, q, cq->id, rx_frag_size,
1139 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1140 if (rc)
1141 goto rx_q_free;
1142
1143 return 0;
1144rx_q_free:
1145 be_queue_free(adapter, q);
1146rx_cq_destroy:
1147 be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
1148rx_cq_free:
1149 be_queue_free(adapter, cq);
1150rx_eq_destroy:
1151 be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
1152rx_eq_free:
1153 be_queue_free(adapter, eq);
1154 return rc;
1155}
1156static bool event_get(struct be_eq_obj *eq_obj, u16 *rid)
1157{
1158 struct be_eq_entry *entry = queue_tail_node(&eq_obj->q);
1159 u32 evt = entry->evt;
1160
1161 if (!evt)
1162 return false;
1163
1164 evt = le32_to_cpu(evt);
1165 *rid = (evt >> EQ_ENTRY_RES_ID_SHIFT) & EQ_ENTRY_RES_ID_MASK;
1166 entry->evt = 0;
1167 queue_tail_inc(&eq_obj->q);
1168 return true;
1169}
1170
1171static int event_handle(struct be_ctrl_info *ctrl,
1172 struct be_eq_obj *eq_obj)
1173{
1174 u16 rid = 0, num = 0;
1175
1176 while (event_get(eq_obj, &rid))
1177 num++;
1178
1179 /* We can see an interrupt and no event */
1180 be_eq_notify(ctrl, eq_obj->q.id, true, true, num);
1181 if (num)
1182 napi_schedule(&eq_obj->napi);
1183
1184 return num;
1185}
1186
1187static irqreturn_t be_intx(int irq, void *dev)
1188{
1189 struct be_adapter *adapter = dev;
1190 struct be_ctrl_info *ctrl = &adapter->ctrl;
1191 int rx, tx;
1192
1193 tx = event_handle(ctrl, &adapter->tx_eq);
1194 rx = event_handle(ctrl, &adapter->rx_eq);
1195
1196 if (rx || tx)
1197 return IRQ_HANDLED;
1198 else
1199 return IRQ_NONE;
1200}
1201
1202static irqreturn_t be_msix_rx(int irq, void *dev)
1203{
1204 struct be_adapter *adapter = dev;
1205
1206 event_handle(&adapter->ctrl, &adapter->rx_eq);
1207
1208 return IRQ_HANDLED;
1209}
1210
1211static irqreturn_t be_msix_tx(int irq, void *dev)
1212{
1213 struct be_adapter *adapter = dev;
1214
1215 event_handle(&adapter->ctrl, &adapter->tx_eq);
1216
1217 return IRQ_HANDLED;
1218}
1219
1220static inline bool do_lro(struct be_adapter *adapter,
1221 struct be_eth_rx_compl *rxcp)
1222{
1223 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1224 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1225
1226 if (err)
1227 drvr_stats(adapter)->be_rxcp_err++;
1228
1229 return (!tcp_frame || err || (adapter->max_rx_coal <= 1)) ?
1230 false : true;
1231}
1232
1233int be_poll_rx(struct napi_struct *napi, int budget)
1234{
1235 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1236 struct be_adapter *adapter =
1237 container_of(rx_eq, struct be_adapter, rx_eq);
1238 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1239 struct be_eth_rx_compl *rxcp;
1240 u32 work_done;
1241
1242 for (work_done = 0; work_done < budget; work_done++) {
1243 rxcp = be_rx_compl_get(adapter);
1244 if (!rxcp)
1245 break;
1246
1247 if (do_lro(adapter, rxcp))
1248 be_rx_compl_process_lro(adapter, rxcp);
1249 else
1250 be_rx_compl_process(adapter, rxcp);
1251 }
1252
1253 lro_flush_all(&adapter->rx_obj.lro_mgr);
1254
1255 /* Refill the queue */
1256 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1257 be_post_rx_frags(adapter);
1258
1259 /* All consumed */
1260 if (work_done < budget) {
1261 napi_complete(napi);
1262 be_cq_notify(&adapter->ctrl, rx_cq->id, true, work_done);
1263 } else {
1264 /* More to be consumed; continue with interrupts disabled */
1265 be_cq_notify(&adapter->ctrl, rx_cq->id, false, work_done);
1266 }
1267 return work_done;
1268}
1269
1270/* For TX we don't honour budget; consume everything */
1271int be_poll_tx(struct napi_struct *napi, int budget)
1272{
1273 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1274 struct be_adapter *adapter =
1275 container_of(tx_eq, struct be_adapter, tx_eq);
1276 struct be_tx_obj *tx_obj = &adapter->tx_obj;
1277 struct be_queue_info *tx_cq = &tx_obj->cq;
1278 struct be_queue_info *txq = &tx_obj->q;
1279 struct be_eth_tx_compl *txcp;
1280 u32 num_cmpl = 0;
1281 u16 end_idx;
1282
1283 while ((txcp = be_tx_compl_get(adapter))) {
1284 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1285 wrb_index, txcp);
1286 be_tx_compl_process(adapter, end_idx);
1287 num_cmpl++;
1288 }
1289
1290 /* As Tx wrbs have been freed up, wake up netdev queue if
1291 * it was stopped due to lack of tx wrbs.
1292 */
1293 if (netif_queue_stopped(adapter->netdev) &&
1294 atomic_read(&txq->used) < txq->len / 2) {
1295 netif_wake_queue(adapter->netdev);
1296 }
1297
1298 napi_complete(napi);
1299
1300 be_cq_notify(&adapter->ctrl, tx_cq->id, true, num_cmpl);
1301
1302 drvr_stats(adapter)->be_tx_events++;
1303 drvr_stats(adapter)->be_tx_compl += num_cmpl;
1304
1305 return 1;
1306}
1307
1308static void be_msix_enable(struct be_adapter *adapter)
1309{
1310 int i, status;
1311
1312 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1313 adapter->msix_entries[i].entry = i;
1314
1315 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1316 BE_NUM_MSIX_VECTORS);
1317 if (status == 0)
1318 adapter->msix_enabled = true;
1319 return;
1320}
1321
1322static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1323{
1324 return adapter->msix_entries[eq_id -
1325 8 * adapter->ctrl.pci_func].vector;
1326}
1327
1328static int be_msix_register(struct be_adapter *adapter)
1329{
1330 struct net_device *netdev = adapter->netdev;
1331 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1332 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1333 int status, vec;
1334
1335 sprintf(tx_eq->desc, "%s-tx", netdev->name);
1336 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1337 status = request_irq(vec, be_msix_tx, 0, tx_eq->desc, adapter);
1338 if (status)
1339 goto err;
1340
1341 sprintf(rx_eq->desc, "%s-rx", netdev->name);
1342 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1343 status = request_irq(vec, be_msix_rx, 0, rx_eq->desc, adapter);
1344 if (status) { /* Free TX IRQ */
1345 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1346 free_irq(vec, adapter);
1347 goto err;
1348 }
1349 return 0;
1350err:
1351 dev_warn(&adapter->pdev->dev,
1352 "MSIX Request IRQ failed - err %d\n", status);
1353 pci_disable_msix(adapter->pdev);
1354 adapter->msix_enabled = false;
1355 return status;
1356}
1357
1358static int be_irq_register(struct be_adapter *adapter)
1359{
1360 struct net_device *netdev = adapter->netdev;
1361 int status;
1362
1363 if (adapter->msix_enabled) {
1364 status = be_msix_register(adapter);
1365 if (status == 0)
1366 goto done;
1367 }
1368
1369 /* INTx */
1370 netdev->irq = adapter->pdev->irq;
1371 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1372 adapter);
1373 if (status) {
1374 dev_err(&adapter->pdev->dev,
1375 "INTx request IRQ failed - err %d\n", status);
1376 return status;
1377 }
1378done:
1379 adapter->isr_registered = true;
1380 return 0;
1381}
1382
1383static void be_irq_unregister(struct be_adapter *adapter)
1384{
1385 struct net_device *netdev = adapter->netdev;
1386 int vec;
1387
1388 if (!adapter->isr_registered)
1389 return;
1390
1391 /* INTx */
1392 if (!adapter->msix_enabled) {
1393 free_irq(netdev->irq, adapter);
1394 goto done;
1395 }
1396
1397 /* MSIx */
1398 vec = be_msix_vec_get(adapter, adapter->tx_eq.q.id);
1399 free_irq(vec, adapter);
1400 vec = be_msix_vec_get(adapter, adapter->rx_eq.q.id);
1401 free_irq(vec, adapter);
1402done:
1403 adapter->isr_registered = false;
1404 return;
1405}
1406
1407static int be_open(struct net_device *netdev)
1408{
1409 struct be_adapter *adapter = netdev_priv(netdev);
1410 struct be_ctrl_info *ctrl = &adapter->ctrl;
1411 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1412 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1413 u32 if_flags;
1414 int status;
1415
1416 if_flags = BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PROMISCUOUS |
1417 BE_IF_FLAGS_MCAST_PROMISCUOUS | BE_IF_FLAGS_UNTAGGED |
1418 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1419 status = be_cmd_if_create(ctrl, if_flags, netdev->dev_addr,
1420 false/* pmac_invalid */, &adapter->if_handle,
1421 &adapter->pmac_id);
1422 if (status != 0)
1423 goto do_none;
1424
1425 status = be_cmd_set_flow_control(ctrl, true, true);
1426 if (status != 0)
1427 goto if_destroy;
1428
1429 status = be_tx_queues_create(adapter);
1430 if (status != 0)
1431 goto if_destroy;
1432
1433 status = be_rx_queues_create(adapter);
1434 if (status != 0)
1435 goto tx_qs_destroy;
1436
1437 /* First time posting */
1438 be_post_rx_frags(adapter);
1439
1440 napi_enable(&rx_eq->napi);
1441 napi_enable(&tx_eq->napi);
1442
1443 be_irq_register(adapter);
1444
1445 be_intr_set(ctrl, true);
1446
1447 /* The evt queues are created in the unarmed state; arm them */
1448 be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
1449 be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
1450
1451 /* The compl queues are created in the unarmed state; arm them */
1452 be_cq_notify(ctrl, adapter->rx_obj.cq.id, true, 0);
1453 be_cq_notify(ctrl, adapter->tx_obj.cq.id, true, 0);
1454
1455 be_link_status_update(adapter);
1456
1457 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
1458 return 0;
1459
1460tx_qs_destroy:
1461 be_tx_queues_destroy(adapter);
1462if_destroy:
1463 be_cmd_if_destroy(ctrl, adapter->if_handle);
1464do_none:
1465 return status;
1466}
1467
1468static int be_close(struct net_device *netdev)
1469{
1470 struct be_adapter *adapter = netdev_priv(netdev);
1471 struct be_ctrl_info *ctrl = &adapter->ctrl;
1472 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1473 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1474 int vec;
1475
1476 cancel_delayed_work(&adapter->work);
1477
1478 netif_stop_queue(netdev);
1479 netif_carrier_off(netdev);
1480 adapter->link.speed = PHY_LINK_SPEED_ZERO;
1481
1482 be_intr_set(ctrl, false);
1483
1484 if (adapter->msix_enabled) {
1485 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1486 synchronize_irq(vec);
1487 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1488 synchronize_irq(vec);
1489 } else {
1490 synchronize_irq(netdev->irq);
1491 }
1492 be_irq_unregister(adapter);
1493
1494 napi_disable(&rx_eq->napi);
1495 napi_disable(&tx_eq->napi);
1496
1497 be_rx_queues_destroy(adapter);
1498 be_tx_queues_destroy(adapter);
1499
1500 be_cmd_if_destroy(ctrl, adapter->if_handle);
1501 return 0;
1502}
1503
1504static int be_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
1505 void **ip_hdr, void **tcpudp_hdr,
1506 u64 *hdr_flags, void *priv)
1507{
1508 struct ethhdr *eh;
1509 struct vlan_ethhdr *veh;
1510 struct iphdr *iph;
1511 u8 *va = page_address(frag->page) + frag->page_offset;
1512 unsigned long ll_hlen;
1513
1514 prefetch(va);
1515 eh = (struct ethhdr *)va;
1516 *mac_hdr = eh;
1517 ll_hlen = ETH_HLEN;
1518 if (eh->h_proto != htons(ETH_P_IP)) {
1519 if (eh->h_proto == htons(ETH_P_8021Q)) {
1520 veh = (struct vlan_ethhdr *)va;
1521 if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
1522 return -1;
1523
1524 ll_hlen += VLAN_HLEN;
1525 } else {
1526 return -1;
1527 }
1528 }
1529 *hdr_flags = LRO_IPV4;
1530 iph = (struct iphdr *)(va + ll_hlen);
1531 *ip_hdr = iph;
1532 if (iph->protocol != IPPROTO_TCP)
1533 return -1;
1534 *hdr_flags |= LRO_TCP;
1535 *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
1536
1537 return 0;
1538}
1539
1540static void be_lro_init(struct be_adapter *adapter, struct net_device *netdev)
1541{
1542 struct net_lro_mgr *lro_mgr;
1543
1544 lro_mgr = &adapter->rx_obj.lro_mgr;
1545 lro_mgr->dev = netdev;
1546 lro_mgr->features = LRO_F_NAPI;
1547 lro_mgr->ip_summed = CHECKSUM_UNNECESSARY;
1548 lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
1549 lro_mgr->max_desc = BE_MAX_LRO_DESCRIPTORS;
1550 lro_mgr->lro_arr = adapter->rx_obj.lro_desc;
1551 lro_mgr->get_frag_header = be_get_frag_header;
1552 lro_mgr->max_aggr = BE_MAX_FRAGS_PER_FRAME;
1553}
1554
1555static struct net_device_ops be_netdev_ops = {
1556 .ndo_open = be_open,
1557 .ndo_stop = be_close,
1558 .ndo_start_xmit = be_xmit,
1559 .ndo_get_stats = be_get_stats,
1560 .ndo_set_rx_mode = be_set_multicast_list,
1561 .ndo_set_mac_address = be_mac_addr_set,
1562 .ndo_change_mtu = be_change_mtu,
1563 .ndo_validate_addr = eth_validate_addr,
1564 .ndo_vlan_rx_register = be_vlan_register,
1565 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
1566 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
1567};
1568
1569static void be_netdev_init(struct net_device *netdev)
1570{
1571 struct be_adapter *adapter = netdev_priv(netdev);
1572
1573 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
1574 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM |
1575 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
1576
1577 netdev->flags |= IFF_MULTICAST;
1578
1579 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
1580
1581 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
1582
1583 be_lro_init(adapter, netdev);
1584
1585 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
1586 BE_NAPI_WEIGHT);
1587 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx,
1588 BE_NAPI_WEIGHT);
1589
1590 netif_carrier_off(netdev);
1591 netif_stop_queue(netdev);
1592}
1593
1594static void be_unmap_pci_bars(struct be_adapter *adapter)
1595{
1596 struct be_ctrl_info *ctrl = &adapter->ctrl;
1597 if (ctrl->csr)
1598 iounmap(ctrl->csr);
1599 if (ctrl->db)
1600 iounmap(ctrl->db);
1601 if (ctrl->pcicfg)
1602 iounmap(ctrl->pcicfg);
1603}
1604
1605static int be_map_pci_bars(struct be_adapter *adapter)
1606{
1607 u8 __iomem *addr;
1608
1609 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
1610 pci_resource_len(adapter->pdev, 2));
1611 if (addr == NULL)
1612 return -ENOMEM;
1613 adapter->ctrl.csr = addr;
1614
1615 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
1616 128 * 1024);
1617 if (addr == NULL)
1618 goto pci_map_err;
1619 adapter->ctrl.db = addr;
1620
1621 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
1622 pci_resource_len(adapter->pdev, 1));
1623 if (addr == NULL)
1624 goto pci_map_err;
1625 adapter->ctrl.pcicfg = addr;
1626
1627 return 0;
1628pci_map_err:
1629 be_unmap_pci_bars(adapter);
1630 return -ENOMEM;
1631}
1632
1633
1634static void be_ctrl_cleanup(struct be_adapter *adapter)
1635{
1636 struct be_dma_mem *mem = &adapter->ctrl.mbox_mem_alloced;
1637
1638 be_unmap_pci_bars(adapter);
1639
1640 if (mem->va)
1641 pci_free_consistent(adapter->pdev, mem->size,
1642 mem->va, mem->dma);
1643}
1644
1645/* Initialize the mbox required to send cmds to BE */
1646static int be_ctrl_init(struct be_adapter *adapter)
1647{
1648 struct be_ctrl_info *ctrl = &adapter->ctrl;
1649 struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
1650 struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
1651 int status;
1652 u32 val;
1653
1654 status = be_map_pci_bars(adapter);
1655 if (status)
1656 return status;
1657
1658 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
1659 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
1660 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
1661 if (!mbox_mem_alloc->va) {
1662 be_unmap_pci_bars(adapter);
1663 return -1;
1664 }
1665 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
1666 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
1667 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
1668 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
1669 spin_lock_init(&ctrl->cmd_lock);
1670
1671 val = ioread32(ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
1672 ctrl->pci_func = (val >> MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT) &
1673 MEMBAR_CTRL_INT_CTRL_PFUNC_MASK;
1674 return 0;
1675}
1676
1677static void be_stats_cleanup(struct be_adapter *adapter)
1678{
1679 struct be_stats_obj *stats = &adapter->stats;
1680 struct be_dma_mem *cmd = &stats->cmd;
1681
1682 if (cmd->va)
1683 pci_free_consistent(adapter->pdev, cmd->size,
1684 cmd->va, cmd->dma);
1685}
1686
1687static int be_stats_init(struct be_adapter *adapter)
1688{
1689 struct be_stats_obj *stats = &adapter->stats;
1690 struct be_dma_mem *cmd = &stats->cmd;
1691
1692 cmd->size = sizeof(struct be_cmd_req_get_stats);
1693 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
1694 if (cmd->va == NULL)
1695 return -1;
1696 return 0;
1697}
1698
1699static void __devexit be_remove(struct pci_dev *pdev)
1700{
1701 struct be_adapter *adapter = pci_get_drvdata(pdev);
1702 if (!adapter)
1703 return;
1704
1705 unregister_netdev(adapter->netdev);
1706
1707 be_stats_cleanup(adapter);
1708
1709 be_ctrl_cleanup(adapter);
1710
1711 if (adapter->msix_enabled) {
1712 pci_disable_msix(adapter->pdev);
1713 adapter->msix_enabled = false;
1714 }
1715
1716 pci_set_drvdata(pdev, NULL);
1717 pci_release_regions(pdev);
1718 pci_disable_device(pdev);
1719
1720 free_netdev(adapter->netdev);
1721}
1722
1723static int be_hw_up(struct be_adapter *adapter)
1724{
1725 struct be_ctrl_info *ctrl = &adapter->ctrl;
1726 int status;
1727
1728 status = be_cmd_POST(ctrl);
1729 if (status)
1730 return status;
1731
1732 status = be_cmd_get_fw_ver(ctrl, adapter->fw_ver);
1733 if (status)
1734 return status;
1735
1736 status = be_cmd_query_fw_cfg(ctrl, &adapter->port_num);
1737 return status;
1738}
1739
1740static int __devinit be_probe(struct pci_dev *pdev,
1741 const struct pci_device_id *pdev_id)
1742{
1743 int status = 0;
1744 struct be_adapter *adapter;
1745 struct net_device *netdev;
1746 struct be_ctrl_info *ctrl;
1747 u8 mac[ETH_ALEN];
1748
1749 status = pci_enable_device(pdev);
1750 if (status)
1751 goto do_none;
1752
1753 status = pci_request_regions(pdev, DRV_NAME);
1754 if (status)
1755 goto disable_dev;
1756 pci_set_master(pdev);
1757
1758 netdev = alloc_etherdev(sizeof(struct be_adapter));
1759 if (netdev == NULL) {
1760 status = -ENOMEM;
1761 goto rel_reg;
1762 }
1763 adapter = netdev_priv(netdev);
1764 adapter->pdev = pdev;
1765 pci_set_drvdata(pdev, adapter);
1766 adapter->netdev = netdev;
1767
1768 be_msix_enable(adapter);
1769
1770 status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1771 if (!status) {
1772 netdev->features |= NETIF_F_HIGHDMA;
1773 } else {
1774 status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1775 if (status) {
1776 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
1777 goto free_netdev;
1778 }
1779 }
1780
1781 ctrl = &adapter->ctrl;
1782 status = be_ctrl_init(adapter);
1783 if (status)
1784 goto free_netdev;
1785
1786 status = be_stats_init(adapter);
1787 if (status)
1788 goto ctrl_clean;
1789
1790 status = be_hw_up(adapter);
1791 if (status)
1792 goto stats_clean;
1793
1794 status = be_cmd_mac_addr_query(ctrl, mac, MAC_ADDRESS_TYPE_NETWORK,
1795 true /* permanent */, 0);
1796 if (status)
1797 goto stats_clean;
1798 memcpy(netdev->dev_addr, mac, ETH_ALEN);
1799
1800 INIT_DELAYED_WORK(&adapter->work, be_worker);
1801 be_netdev_init(netdev);
1802 SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
1803
1804 status = register_netdev(netdev);
1805 if (status != 0)
1806 goto stats_clean;
1807
1808 dev_info(&pdev->dev, BE_NAME " port %d\n", adapter->port_num);
1809 return 0;
1810
1811stats_clean:
1812 be_stats_cleanup(adapter);
1813ctrl_clean:
1814 be_ctrl_cleanup(adapter);
1815free_netdev:
1816 free_netdev(adapter->netdev);
1817rel_reg:
1818 pci_release_regions(pdev);
1819disable_dev:
1820 pci_disable_device(pdev);
1821do_none:
1822 dev_warn(&pdev->dev, BE_NAME " initialization failed\n");
1823 return status;
1824}
1825
1826static int be_suspend(struct pci_dev *pdev, pm_message_t state)
1827{
1828 struct be_adapter *adapter = pci_get_drvdata(pdev);
1829 struct net_device *netdev = adapter->netdev;
1830
1831 netif_device_detach(netdev);
1832 if (netif_running(netdev)) {
1833 rtnl_lock();
1834 be_close(netdev);
1835 rtnl_unlock();
1836 }
1837
1838 pci_save_state(pdev);
1839 pci_disable_device(pdev);
1840 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1841 return 0;
1842}
1843
1844static int be_resume(struct pci_dev *pdev)
1845{
1846 int status = 0;
1847 struct be_adapter *adapter = pci_get_drvdata(pdev);
1848 struct net_device *netdev = adapter->netdev;
1849
1850 netif_device_detach(netdev);
1851
1852 status = pci_enable_device(pdev);
1853 if (status)
1854 return status;
1855
1856 pci_set_power_state(pdev, 0);
1857 pci_restore_state(pdev);
1858
1859 be_vids_config(netdev);
1860
1861 if (netif_running(netdev)) {
1862 rtnl_lock();
1863 be_open(netdev);
1864 rtnl_unlock();
1865 }
1866 netif_device_attach(netdev);
1867 return 0;
1868}
1869
1870static struct pci_driver be_driver = {
1871 .name = DRV_NAME,
1872 .id_table = be_dev_ids,
1873 .probe = be_probe,
1874 .remove = be_remove,
1875 .suspend = be_suspend,
1876 .resume = be_resume
1877};
1878
1879static int __init be_init_module(void)
1880{
1881 if (rx_frag_size != 8192 && rx_frag_size != 4096
1882 && rx_frag_size != 2048) {
1883 printk(KERN_WARNING DRV_NAME
1884 " : Module param rx_frag_size must be 2048/4096/8192."
1885 " Using 2048\n");
1886 rx_frag_size = 2048;
1887 }
1888 /* Ensure rx_frag_size is aligned to chache line */
1889 if (SKB_DATA_ALIGN(rx_frag_size) != rx_frag_size) {
1890 printk(KERN_WARNING DRV_NAME
1891 " : Bad module param rx_frag_size. Using 2048\n");
1892 rx_frag_size = 2048;
1893 }
1894
1895 return pci_register_driver(&be_driver);
1896}
1897module_init(be_init_module);
1898
1899static void __exit be_exit_module(void)
1900{
1901 pci_unregister_driver(&be_driver);
1902}
1903module_exit(be_exit_module);
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index 15a5cf0f676b..3cf2b92eef3b 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -152,7 +152,7 @@ struct sw_rx_page {
152#define PAGES_PER_SGE (1 << PAGES_PER_SGE_SHIFT) 152#define PAGES_PER_SGE (1 << PAGES_PER_SGE_SHIFT)
153#define SGE_PAGE_SIZE PAGE_SIZE 153#define SGE_PAGE_SIZE PAGE_SIZE
154#define SGE_PAGE_SHIFT PAGE_SHIFT 154#define SGE_PAGE_SHIFT PAGE_SHIFT
155#define SGE_PAGE_ALIGN(addr) PAGE_ALIGN(addr) 155#define SGE_PAGE_ALIGN(addr) PAGE_ALIGN((typeof(PAGE_SIZE))addr)
156 156
157#define BCM_RX_ETH_PAYLOAD_ALIGN 64 157#define BCM_RX_ETH_PAYLOAD_ALIGN 64
158 158
diff --git a/drivers/net/bnx2x_init.h b/drivers/net/bnx2x_init.h
index a6c0b3abba29..3b0c2499ef17 100644
--- a/drivers/net/bnx2x_init.h
+++ b/drivers/net/bnx2x_init.h
@@ -150,7 +150,6 @@ static void bnx2x_init_ind_wr(struct bnx2x *bp, u32 addr, const u32 *data,
150 150
151static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len) 151static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len)
152{ 152{
153#ifdef USE_DMAE
154 int offset = 0; 153 int offset = 0;
155 154
156 if (bp->dmae_ready) { 155 if (bp->dmae_ready) {
@@ -164,9 +163,6 @@ static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len)
164 addr + offset, len); 163 addr + offset, len);
165 } else 164 } else
166 bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len); 165 bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
167#else
168 bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
169#endif
170} 166}
171 167
172static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len) 168static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len)
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index d3e7775a9ccf..2e346a5e98cf 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -57,7 +57,7 @@
57#include "bnx2x.h" 57#include "bnx2x.h"
58#include "bnx2x_init.h" 58#include "bnx2x_init.h"
59 59
60#define DRV_MODULE_VERSION "1.45.26" 60#define DRV_MODULE_VERSION "1.45.27"
61#define DRV_MODULE_RELDATE "2009/01/26" 61#define DRV_MODULE_RELDATE "2009/01/26"
62#define BNX2X_BC_VER 0x040200 62#define BNX2X_BC_VER 0x040200
63 63
@@ -4035,10 +4035,10 @@ static void bnx2x_zero_sb(struct bnx2x *bp, int sb_id)
4035{ 4035{
4036 int port = BP_PORT(bp); 4036 int port = BP_PORT(bp);
4037 4037
4038 bnx2x_init_fill(bp, BAR_USTRORM_INTMEM + 4038 bnx2x_init_fill(bp, USTORM_INTMEM_ADDR +
4039 USTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, sb_id), 0, 4039 USTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, sb_id), 0,
4040 sizeof(struct ustorm_status_block)/4); 4040 sizeof(struct ustorm_status_block)/4);
4041 bnx2x_init_fill(bp, BAR_CSTRORM_INTMEM + 4041 bnx2x_init_fill(bp, CSTORM_INTMEM_ADDR +
4042 CSTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, sb_id), 0, 4042 CSTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, sb_id), 0,
4043 sizeof(struct cstorm_status_block)/4); 4043 sizeof(struct cstorm_status_block)/4);
4044} 4044}
@@ -4092,18 +4092,18 @@ static void bnx2x_zero_def_sb(struct bnx2x *bp)
4092{ 4092{
4093 int func = BP_FUNC(bp); 4093 int func = BP_FUNC(bp);
4094 4094
4095 bnx2x_init_fill(bp, BAR_USTRORM_INTMEM + 4095 bnx2x_init_fill(bp, TSTORM_INTMEM_ADDR +
4096 TSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
4097 sizeof(struct tstorm_def_status_block)/4);
4098 bnx2x_init_fill(bp, USTORM_INTMEM_ADDR +
4096 USTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0, 4099 USTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
4097 sizeof(struct ustorm_def_status_block)/4); 4100 sizeof(struct ustorm_def_status_block)/4);
4098 bnx2x_init_fill(bp, BAR_CSTRORM_INTMEM + 4101 bnx2x_init_fill(bp, CSTORM_INTMEM_ADDR +
4099 CSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0, 4102 CSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
4100 sizeof(struct cstorm_def_status_block)/4); 4103 sizeof(struct cstorm_def_status_block)/4);
4101 bnx2x_init_fill(bp, BAR_XSTRORM_INTMEM + 4104 bnx2x_init_fill(bp, XSTORM_INTMEM_ADDR +
4102 XSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0, 4105 XSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
4103 sizeof(struct xstorm_def_status_block)/4); 4106 sizeof(struct xstorm_def_status_block)/4);
4104 bnx2x_init_fill(bp, BAR_TSTRORM_INTMEM +
4105 TSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
4106 sizeof(struct tstorm_def_status_block)/4);
4107} 4107}
4108 4108
4109static void bnx2x_init_def_sb(struct bnx2x *bp, 4109static void bnx2x_init_def_sb(struct bnx2x *bp,
@@ -4518,7 +4518,8 @@ static void bnx2x_init_context(struct bnx2x *bp)
4518 (USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA | 4518 (USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA |
4519 USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING); 4519 USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING);
4520 context->ustorm_st_context.common.sge_buff_size = 4520 context->ustorm_st_context.common.sge_buff_size =
4521 (u16)(BCM_PAGE_SIZE*PAGES_PER_SGE); 4521 (u16)min((u32)SGE_PAGE_SIZE*PAGES_PER_SGE,
4522 (u32)0xffff);
4522 context->ustorm_st_context.common.sge_page_base_hi = 4523 context->ustorm_st_context.common.sge_page_base_hi =
4523 U64_HI(fp->rx_sge_mapping); 4524 U64_HI(fp->rx_sge_mapping);
4524 context->ustorm_st_context.common.sge_page_base_lo = 4525 context->ustorm_st_context.common.sge_page_base_lo =
diff --git a/drivers/net/dnet.c b/drivers/net/dnet.c
new file mode 100644
index 000000000000..5c347f70cb67
--- /dev/null
+++ b/drivers/net/dnet.c
@@ -0,0 +1,994 @@
1/*
2 * Dave DNET Ethernet Controller driver
3 *
4 * Copyright (C) 2008 Dave S.r.l. <www.dave.eu>
5 * Copyright (C) 2009 Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/version.h>
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/slab.h>
17#include <linux/delay.h>
18#include <linux/init.h>
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/dma-mapping.h>
22#include <linux/platform_device.h>
23#include <linux/phy.h>
24#include <linux/platform_device.h>
25
26#include "dnet.h"
27
28#undef DEBUG
29
30/* function for reading internal MAC register */
31u16 dnet_readw_mac(struct dnet *bp, u16 reg)
32{
33 u16 data_read;
34
35 /* issue a read */
36 dnet_writel(bp, reg, MACREG_ADDR);
37
38 /* since a read/write op to the MAC is very slow,
39 * we must wait before reading the data */
40 ndelay(500);
41
42 /* read data read from the MAC register */
43 data_read = dnet_readl(bp, MACREG_DATA);
44
45 /* all done */
46 return data_read;
47}
48
49/* function for writing internal MAC register */
50void dnet_writew_mac(struct dnet *bp, u16 reg, u16 val)
51{
52 /* load data to write */
53 dnet_writel(bp, val, MACREG_DATA);
54
55 /* issue a write */
56 dnet_writel(bp, reg | DNET_INTERNAL_WRITE, MACREG_ADDR);
57
58 /* since a read/write op to the MAC is very slow,
59 * we must wait before exiting */
60 ndelay(500);
61}
62
63static void __dnet_set_hwaddr(struct dnet *bp)
64{
65 u16 tmp;
66
67 tmp = cpu_to_be16(*((u16 *) bp->dev->dev_addr));
68 dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_0_REG, tmp);
69 tmp = cpu_to_be16(*((u16 *) (bp->dev->dev_addr + 2)));
70 dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_1_REG, tmp);
71 tmp = cpu_to_be16(*((u16 *) (bp->dev->dev_addr + 4)));
72 dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_2_REG, tmp);
73}
74
75static void __devinit dnet_get_hwaddr(struct dnet *bp)
76{
77 u16 tmp;
78 u8 addr[6];
79
80 /*
81 * from MAC docs:
82 * "Note that the MAC address is stored in the registers in Hexadecimal
83 * form. For example, to set the MAC Address to: AC-DE-48-00-00-80
84 * would require writing 0xAC (octet 0) to address 0x0B (high byte of
85 * Mac_addr[15:0]), 0xDE (octet 1) to address 0x0A (Low byte of
86 * Mac_addr[15:0]), 0x48 (octet 2) to address 0x0D (high byte of
87 * Mac_addr[15:0]), 0x00 (octet 3) to address 0x0C (Low byte of
88 * Mac_addr[15:0]), 0x00 (octet 4) to address 0x0F (high byte of
89 * Mac_addr[15:0]), and 0x80 (octet 5) to address * 0x0E (Low byte of
90 * Mac_addr[15:0]).
91 */
92 tmp = dnet_readw_mac(bp, DNET_INTERNAL_MAC_ADDR_0_REG);
93 *((u16 *) addr) = be16_to_cpu(tmp);
94 tmp = dnet_readw_mac(bp, DNET_INTERNAL_MAC_ADDR_1_REG);
95 *((u16 *) (addr + 2)) = be16_to_cpu(tmp);
96 tmp = dnet_readw_mac(bp, DNET_INTERNAL_MAC_ADDR_2_REG);
97 *((u16 *) (addr + 4)) = be16_to_cpu(tmp);
98
99 if (is_valid_ether_addr(addr))
100 memcpy(bp->dev->dev_addr, addr, sizeof(addr));
101}
102
103static int dnet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
104{
105 struct dnet *bp = bus->priv;
106 u16 value;
107
108 while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG)
109 & DNET_INTERNAL_GMII_MNG_CMD_FIN))
110 cpu_relax();
111
112 /* only 5 bits allowed for phy-addr and reg_offset */
113 mii_id &= 0x1f;
114 regnum &= 0x1f;
115
116 /* prepare reg_value for a read */
117 value = (mii_id << 8);
118 value |= regnum;
119
120 /* write control word */
121 dnet_writew_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG, value);
122
123 /* wait for end of transfer */
124 while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG)
125 & DNET_INTERNAL_GMII_MNG_CMD_FIN))
126 cpu_relax();
127
128 value = dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_DAT_REG);
129
130 pr_debug("mdio_read %02x:%02x <- %04x\n", mii_id, regnum, value);
131
132 return value;
133}
134
135static int dnet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
136 u16 value)
137{
138 struct dnet *bp = bus->priv;
139 u16 tmp;
140
141 pr_debug("mdio_write %02x:%02x <- %04x\n", mii_id, regnum, value);
142
143 while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG)
144 & DNET_INTERNAL_GMII_MNG_CMD_FIN))
145 cpu_relax();
146
147 /* prepare for a write operation */
148 tmp = (1 << 13);
149
150 /* only 5 bits allowed for phy-addr and reg_offset */
151 mii_id &= 0x1f;
152 regnum &= 0x1f;
153
154 /* only 16 bits on data */
155 value &= 0xffff;
156
157 /* prepare reg_value for a write */
158 tmp |= (mii_id << 8);
159 tmp |= regnum;
160
161 /* write data to write first */
162 dnet_writew_mac(bp, DNET_INTERNAL_GMII_MNG_DAT_REG, value);
163
164 /* write control word */
165 dnet_writew_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG, tmp);
166
167 while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG)
168 & DNET_INTERNAL_GMII_MNG_CMD_FIN))
169 cpu_relax();
170
171 return 0;
172}
173
174static int dnet_mdio_reset(struct mii_bus *bus)
175{
176 return 0;
177}
178
179static void dnet_handle_link_change(struct net_device *dev)
180{
181 struct dnet *bp = netdev_priv(dev);
182 struct phy_device *phydev = bp->phy_dev;
183 unsigned long flags;
184 u32 mode_reg, ctl_reg;
185
186 int status_change = 0;
187
188 spin_lock_irqsave(&bp->lock, flags);
189
190 mode_reg = dnet_readw_mac(bp, DNET_INTERNAL_MODE_REG);
191 ctl_reg = dnet_readw_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG);
192
193 if (phydev->link) {
194 if (bp->duplex != phydev->duplex) {
195 if (phydev->duplex)
196 ctl_reg &=
197 ~(DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP);
198 else
199 ctl_reg |=
200 DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP;
201
202 bp->duplex = phydev->duplex;
203 status_change = 1;
204 }
205
206 if (bp->speed != phydev->speed) {
207 status_change = 1;
208 switch (phydev->speed) {
209 case 1000:
210 mode_reg |= DNET_INTERNAL_MODE_GBITEN;
211 break;
212 case 100:
213 case 10:
214 mode_reg &= ~DNET_INTERNAL_MODE_GBITEN;
215 break;
216 default:
217 printk(KERN_WARNING
218 "%s: Ack! Speed (%d) is not "
219 "10/100/1000!\n", dev->name,
220 phydev->speed);
221 break;
222 }
223 bp->speed = phydev->speed;
224 }
225 }
226
227 if (phydev->link != bp->link) {
228 if (phydev->link) {
229 mode_reg |=
230 (DNET_INTERNAL_MODE_RXEN | DNET_INTERNAL_MODE_TXEN);
231 } else {
232 mode_reg &=
233 ~(DNET_INTERNAL_MODE_RXEN |
234 DNET_INTERNAL_MODE_TXEN);
235 bp->speed = 0;
236 bp->duplex = -1;
237 }
238 bp->link = phydev->link;
239
240 status_change = 1;
241 }
242
243 if (status_change) {
244 dnet_writew_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG, ctl_reg);
245 dnet_writew_mac(bp, DNET_INTERNAL_MODE_REG, mode_reg);
246 }
247
248 spin_unlock_irqrestore(&bp->lock, flags);
249
250 if (status_change) {
251 if (phydev->link)
252 printk(KERN_INFO "%s: link up (%d/%s)\n",
253 dev->name, phydev->speed,
254 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
255 else
256 printk(KERN_INFO "%s: link down\n", dev->name);
257 }
258}
259
260static int dnet_mii_probe(struct net_device *dev)
261{
262 struct dnet *bp = netdev_priv(dev);
263 struct phy_device *phydev = NULL;
264 int phy_addr;
265
266 /* find the first phy */
267 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
268 if (bp->mii_bus->phy_map[phy_addr]) {
269 phydev = bp->mii_bus->phy_map[phy_addr];
270 break;
271 }
272 }
273
274 if (!phydev) {
275 printk(KERN_ERR "%s: no PHY found\n", dev->name);
276 return -ENODEV;
277 }
278
279 /* TODO : add pin_irq */
280
281 /* attach the mac to the phy */
282 if (bp->capabilities & DNET_HAS_RMII) {
283 phydev = phy_connect(dev, phydev->dev.bus_id,
284 &dnet_handle_link_change, 0,
285 PHY_INTERFACE_MODE_RMII);
286 } else {
287 phydev = phy_connect(dev, phydev->dev.bus_id,
288 &dnet_handle_link_change, 0,
289 PHY_INTERFACE_MODE_MII);
290 }
291
292 if (IS_ERR(phydev)) {
293 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
294 return PTR_ERR(phydev);
295 }
296
297 /* mask with MAC supported features */
298 if (bp->capabilities & DNET_HAS_GIGABIT)
299 phydev->supported &= PHY_GBIT_FEATURES;
300 else
301 phydev->supported &= PHY_BASIC_FEATURES;
302
303 phydev->supported |= SUPPORTED_Asym_Pause | SUPPORTED_Pause;
304
305 phydev->advertising = phydev->supported;
306
307 bp->link = 0;
308 bp->speed = 0;
309 bp->duplex = -1;
310 bp->phy_dev = phydev;
311
312 return 0;
313}
314
315static int dnet_mii_init(struct dnet *bp)
316{
317 int err, i;
318
319 bp->mii_bus = mdiobus_alloc();
320 if (bp->mii_bus == NULL)
321 return -ENOMEM;
322
323 bp->mii_bus->name = "dnet_mii_bus";
324 bp->mii_bus->read = &dnet_mdio_read;
325 bp->mii_bus->write = &dnet_mdio_write;
326 bp->mii_bus->reset = &dnet_mdio_reset;
327
328 snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%x", 0);
329
330 bp->mii_bus->priv = bp;
331
332 bp->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
333 if (!bp->mii_bus->irq) {
334 err = -ENOMEM;
335 goto err_out;
336 }
337
338 for (i = 0; i < PHY_MAX_ADDR; i++)
339 bp->mii_bus->irq[i] = PHY_POLL;
340
341 platform_set_drvdata(bp->dev, bp->mii_bus);
342
343 if (mdiobus_register(bp->mii_bus)) {
344 err = -ENXIO;
345 goto err_out_free_mdio_irq;
346 }
347
348 if (dnet_mii_probe(bp->dev) != 0) {
349 err = -ENXIO;
350 goto err_out_unregister_bus;
351 }
352
353 return 0;
354
355err_out_unregister_bus:
356 mdiobus_unregister(bp->mii_bus);
357err_out_free_mdio_irq:
358 kfree(bp->mii_bus->irq);
359err_out:
360 mdiobus_free(bp->mii_bus);
361 return err;
362}
363
364/* For Neptune board: LINK1000 as Link LED and TX as activity LED */
365int dnet_phy_marvell_fixup(struct phy_device *phydev)
366{
367 return phy_write(phydev, 0x18, 0x4148);
368}
369
370static void dnet_update_stats(struct dnet *bp)
371{
372 u32 __iomem *reg = bp->regs + DNET_RX_PKT_IGNR_CNT;
373 u32 *p = &bp->hw_stats.rx_pkt_ignr;
374 u32 *end = &bp->hw_stats.rx_byte + 1;
375
376 WARN_ON((unsigned long)(end - p - 1) !=
377 (DNET_RX_BYTE_CNT - DNET_RX_PKT_IGNR_CNT) / 4);
378
379 for (; p < end; p++, reg++)
380 *p += readl(reg);
381
382 reg = bp->regs + DNET_TX_UNICAST_CNT;
383 p = &bp->hw_stats.tx_unicast;
384 end = &bp->hw_stats.tx_byte + 1;
385
386 WARN_ON((unsigned long)(end - p - 1) !=
387 (DNET_TX_BYTE_CNT - DNET_TX_UNICAST_CNT) / 4);
388
389 for (; p < end; p++, reg++)
390 *p += readl(reg);
391}
392
393static int dnet_poll(struct napi_struct *napi, int budget)
394{
395 struct dnet *bp = container_of(napi, struct dnet, napi);
396 struct net_device *dev = bp->dev;
397 int npackets = 0;
398 unsigned int pkt_len;
399 struct sk_buff *skb;
400 unsigned int *data_ptr;
401 u32 int_enable;
402 u32 cmd_word;
403 int i;
404
405 while (npackets < budget) {
406 /*
407 * break out of while loop if there are no more
408 * packets waiting
409 */
410 if (!(dnet_readl(bp, RX_FIFO_WCNT) >> 16)) {
411 napi_complete(napi);
412 int_enable = dnet_readl(bp, INTR_ENB);
413 int_enable |= DNET_INTR_SRC_RX_CMDFIFOAF;
414 dnet_writel(bp, int_enable, INTR_ENB);
415 return 0;
416 }
417
418 cmd_word = dnet_readl(bp, RX_LEN_FIFO);
419 pkt_len = cmd_word & 0xFFFF;
420
421 if (cmd_word & 0xDF180000)
422 printk(KERN_ERR "%s packet receive error %x\n",
423 __func__, cmd_word);
424
425 skb = dev_alloc_skb(pkt_len + 5);
426 if (skb != NULL) {
427 /* Align IP on 16 byte boundaries */
428 skb_reserve(skb, 2);
429 /*
430 * 'skb_put()' points to the start of sk_buff
431 * data area.
432 */
433 data_ptr = (unsigned int *)skb_put(skb, pkt_len);
434 for (i = 0; i < (pkt_len + 3) >> 2; i++)
435 *data_ptr++ = dnet_readl(bp, RX_DATA_FIFO);
436 skb->protocol = eth_type_trans(skb, dev);
437 netif_receive_skb(skb);
438 npackets++;
439 } else
440 printk(KERN_NOTICE
441 "%s: No memory to allocate a sk_buff of "
442 "size %u.\n", dev->name, pkt_len);
443 }
444
445 budget -= npackets;
446
447 if (npackets < budget) {
448 /* We processed all packets available. Tell NAPI it can
449 * stop polling then re-enable rx interrupts */
450 napi_complete(napi);
451 int_enable = dnet_readl(bp, INTR_ENB);
452 int_enable |= DNET_INTR_SRC_RX_CMDFIFOAF;
453 dnet_writel(bp, int_enable, INTR_ENB);
454 return 0;
455 }
456
457 /* There are still packets waiting */
458 return 1;
459}
460
461static irqreturn_t dnet_interrupt(int irq, void *dev_id)
462{
463 struct net_device *dev = dev_id;
464 struct dnet *bp = netdev_priv(dev);
465 u32 int_src, int_enable, int_current;
466 unsigned long flags;
467 unsigned int handled = 0;
468
469 spin_lock_irqsave(&bp->lock, flags);
470
471 /* read and clear the DNET irq (clear on read) */
472 int_src = dnet_readl(bp, INTR_SRC);
473 int_enable = dnet_readl(bp, INTR_ENB);
474 int_current = int_src & int_enable;
475
476 /* restart the queue if we had stopped it for TX fifo almost full */
477 if (int_current & DNET_INTR_SRC_TX_FIFOAE) {
478 int_enable = dnet_readl(bp, INTR_ENB);
479 int_enable &= ~DNET_INTR_ENB_TX_FIFOAE;
480 dnet_writel(bp, int_enable, INTR_ENB);
481 netif_wake_queue(dev);
482 handled = 1;
483 }
484
485 /* RX FIFO error checking */
486 if (int_current &
487 (DNET_INTR_SRC_RX_CMDFIFOFF | DNET_INTR_SRC_RX_DATAFIFOFF)) {
488 printk(KERN_ERR "%s: RX fifo error %x, irq %x\n", __func__,
489 dnet_readl(bp, RX_STATUS), int_current);
490 /* we can only flush the RX FIFOs */
491 dnet_writel(bp, DNET_SYS_CTL_RXFIFOFLUSH, SYS_CTL);
492 ndelay(500);
493 dnet_writel(bp, 0, SYS_CTL);
494 handled = 1;
495 }
496
497 /* TX FIFO error checking */
498 if (int_current &
499 (DNET_INTR_SRC_TX_FIFOFULL | DNET_INTR_SRC_TX_DISCFRM)) {
500 printk(KERN_ERR "%s: TX fifo error %x, irq %x\n", __func__,
501 dnet_readl(bp, TX_STATUS), int_current);
502 /* we can only flush the TX FIFOs */
503 dnet_writel(bp, DNET_SYS_CTL_TXFIFOFLUSH, SYS_CTL);
504 ndelay(500);
505 dnet_writel(bp, 0, SYS_CTL);
506 handled = 1;
507 }
508
509 if (int_current & DNET_INTR_SRC_RX_CMDFIFOAF) {
510 if (napi_schedule_prep(&bp->napi)) {
511 /*
512 * There's no point taking any more interrupts
513 * until we have processed the buffers
514 */
515 /* Disable Rx interrupts and schedule NAPI poll */
516 int_enable = dnet_readl(bp, INTR_ENB);
517 int_enable &= ~DNET_INTR_SRC_RX_CMDFIFOAF;
518 dnet_writel(bp, int_enable, INTR_ENB);
519 __napi_schedule(&bp->napi);
520 }
521 handled = 1;
522 }
523
524 if (!handled)
525 pr_debug("%s: irq %x remains\n", __func__, int_current);
526
527 spin_unlock_irqrestore(&bp->lock, flags);
528
529 return IRQ_RETVAL(handled);
530}
531
532#ifdef DEBUG
533static inline void dnet_print_skb(struct sk_buff *skb)
534{
535 int k;
536 printk(KERN_DEBUG PFX "data:");
537 for (k = 0; k < skb->len; k++)
538 printk(" %02x", (unsigned int)skb->data[k]);
539 printk("\n");
540}
541#else
542#define dnet_print_skb(skb) do {} while (0)
543#endif
544
545static int dnet_start_xmit(struct sk_buff *skb, struct net_device *dev)
546{
547
548 struct dnet *bp = netdev_priv(dev);
549 u32 tx_status, irq_enable;
550 unsigned int len, i, tx_cmd, wrsz;
551 unsigned long flags;
552 unsigned int *bufp;
553
554 tx_status = dnet_readl(bp, TX_STATUS);
555
556 pr_debug("start_xmit: len %u head %p data %p\n",
557 skb->len, skb->head, skb->data);
558 dnet_print_skb(skb);
559
560 /* frame size (words) */
561 len = (skb->len + 3) >> 2;
562
563 spin_lock_irqsave(&bp->lock, flags);
564
565 tx_status = dnet_readl(bp, TX_STATUS);
566
567 bufp = (unsigned int *)(((unsigned long) skb->data) & ~0x3UL);
568 wrsz = (u32) skb->len + 3;
569 wrsz += ((unsigned long) skb->data) & 0x3;
570 wrsz >>= 2;
571 tx_cmd = ((((unsigned long)(skb->data)) & 0x03) << 16) | (u32) skb->len;
572
573 /* check if there is enough room for the current frame */
574 if (wrsz < (DNET_FIFO_SIZE - dnet_readl(bp, TX_FIFO_WCNT))) {
575 for (i = 0; i < wrsz; i++)
576 dnet_writel(bp, *bufp++, TX_DATA_FIFO);
577
578 /*
579 * inform MAC that a packet's written and ready to be
580 * shipped out
581 */
582 dnet_writel(bp, tx_cmd, TX_LEN_FIFO);
583 }
584
585 if (dnet_readl(bp, TX_FIFO_WCNT) > DNET_FIFO_TX_DATA_AF_TH) {
586 netif_stop_queue(dev);
587 tx_status = dnet_readl(bp, INTR_SRC);
588 irq_enable = dnet_readl(bp, INTR_ENB);
589 irq_enable |= DNET_INTR_ENB_TX_FIFOAE;
590 dnet_writel(bp, irq_enable, INTR_ENB);
591 }
592
593 /* free the buffer */
594 dev_kfree_skb(skb);
595
596 spin_unlock_irqrestore(&bp->lock, flags);
597
598 dev->trans_start = jiffies;
599
600 return 0;
601}
602
603static void dnet_reset_hw(struct dnet *bp)
604{
605 /* put ts_mac in IDLE state i.e. disable rx/tx */
606 dnet_writew_mac(bp, DNET_INTERNAL_MODE_REG, DNET_INTERNAL_MODE_FCEN);
607
608 /*
609 * RX FIFO almost full threshold: only cmd FIFO almost full is
610 * implemented for RX side
611 */
612 dnet_writel(bp, DNET_FIFO_RX_CMD_AF_TH, RX_FIFO_TH);
613 /*
614 * TX FIFO almost empty threshold: only data FIFO almost empty
615 * is implemented for TX side
616 */
617 dnet_writel(bp, DNET_FIFO_TX_DATA_AE_TH, TX_FIFO_TH);
618
619 /* flush rx/tx fifos */
620 dnet_writel(bp, DNET_SYS_CTL_RXFIFOFLUSH | DNET_SYS_CTL_TXFIFOFLUSH,
621 SYS_CTL);
622 msleep(1);
623 dnet_writel(bp, 0, SYS_CTL);
624}
625
626static void dnet_init_hw(struct dnet *bp)
627{
628 u32 config;
629
630 dnet_reset_hw(bp);
631 __dnet_set_hwaddr(bp);
632
633 config = dnet_readw_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG);
634
635 if (bp->dev->flags & IFF_PROMISC)
636 /* Copy All Frames */
637 config |= DNET_INTERNAL_RXTX_CONTROL_ENPROMISC;
638 if (!(bp->dev->flags & IFF_BROADCAST))
639 /* No BroadCast */
640 config |= DNET_INTERNAL_RXTX_CONTROL_RXMULTICAST;
641
642 config |= DNET_INTERNAL_RXTX_CONTROL_RXPAUSE |
643 DNET_INTERNAL_RXTX_CONTROL_RXBROADCAST |
644 DNET_INTERNAL_RXTX_CONTROL_DROPCONTROL |
645 DNET_INTERNAL_RXTX_CONTROL_DISCFXFCS;
646
647 dnet_writew_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG, config);
648
649 /* clear irq before enabling them */
650 config = dnet_readl(bp, INTR_SRC);
651
652 /* enable RX/TX interrupt, recv packet ready interrupt */
653 dnet_writel(bp, DNET_INTR_ENB_GLOBAL_ENABLE | DNET_INTR_ENB_RX_SUMMARY |
654 DNET_INTR_ENB_TX_SUMMARY | DNET_INTR_ENB_RX_FIFOERR |
655 DNET_INTR_ENB_RX_ERROR | DNET_INTR_ENB_RX_FIFOFULL |
656 DNET_INTR_ENB_TX_FIFOFULL | DNET_INTR_ENB_TX_DISCFRM |
657 DNET_INTR_ENB_RX_PKTRDY, INTR_ENB);
658}
659
660static int dnet_open(struct net_device *dev)
661{
662 struct dnet *bp = netdev_priv(dev);
663
664 /* if the phy is not yet register, retry later */
665 if (!bp->phy_dev)
666 return -EAGAIN;
667
668 if (!is_valid_ether_addr(dev->dev_addr))
669 return -EADDRNOTAVAIL;
670
671 napi_enable(&bp->napi);
672 dnet_init_hw(bp);
673
674 phy_start_aneg(bp->phy_dev);
675
676 /* schedule a link state check */
677 phy_start(bp->phy_dev);
678
679 netif_start_queue(dev);
680
681 return 0;
682}
683
684static int dnet_close(struct net_device *dev)
685{
686 struct dnet *bp = netdev_priv(dev);
687
688 netif_stop_queue(dev);
689 napi_disable(&bp->napi);
690
691 if (bp->phy_dev)
692 phy_stop(bp->phy_dev);
693
694 dnet_reset_hw(bp);
695 netif_carrier_off(dev);
696
697 return 0;
698}
699
700static inline void dnet_print_pretty_hwstats(struct dnet_stats *hwstat)
701{
702 pr_debug("%s\n", __func__);
703 pr_debug("----------------------------- RX statistics "
704 "-------------------------------\n");
705 pr_debug("RX_PKT_IGNR_CNT %-8x\n", hwstat->rx_pkt_ignr);
706 pr_debug("RX_LEN_CHK_ERR_CNT %-8x\n", hwstat->rx_len_chk_err);
707 pr_debug("RX_LNG_FRM_CNT %-8x\n", hwstat->rx_lng_frm);
708 pr_debug("RX_SHRT_FRM_CNT %-8x\n", hwstat->rx_shrt_frm);
709 pr_debug("RX_IPG_VIOL_CNT %-8x\n", hwstat->rx_ipg_viol);
710 pr_debug("RX_CRC_ERR_CNT %-8x\n", hwstat->rx_crc_err);
711 pr_debug("RX_OK_PKT_CNT %-8x\n", hwstat->rx_ok_pkt);
712 pr_debug("RX_CTL_FRM_CNT %-8x\n", hwstat->rx_ctl_frm);
713 pr_debug("RX_PAUSE_FRM_CNT %-8x\n", hwstat->rx_pause_frm);
714 pr_debug("RX_MULTICAST_CNT %-8x\n", hwstat->rx_multicast);
715 pr_debug("RX_BROADCAST_CNT %-8x\n", hwstat->rx_broadcast);
716 pr_debug("RX_VLAN_TAG_CNT %-8x\n", hwstat->rx_vlan_tag);
717 pr_debug("RX_PRE_SHRINK_CNT %-8x\n", hwstat->rx_pre_shrink);
718 pr_debug("RX_DRIB_NIB_CNT %-8x\n", hwstat->rx_drib_nib);
719 pr_debug("RX_UNSUP_OPCD_CNT %-8x\n", hwstat->rx_unsup_opcd);
720 pr_debug("RX_BYTE_CNT %-8x\n", hwstat->rx_byte);
721 pr_debug("----------------------------- TX statistics "
722 "-------------------------------\n");
723 pr_debug("TX_UNICAST_CNT %-8x\n", hwstat->tx_unicast);
724 pr_debug("TX_PAUSE_FRM_CNT %-8x\n", hwstat->tx_pause_frm);
725 pr_debug("TX_MULTICAST_CNT %-8x\n", hwstat->tx_multicast);
726 pr_debug("TX_BRDCAST_CNT %-8x\n", hwstat->tx_brdcast);
727 pr_debug("TX_VLAN_TAG_CNT %-8x\n", hwstat->tx_vlan_tag);
728 pr_debug("TX_BAD_FCS_CNT %-8x\n", hwstat->tx_bad_fcs);
729 pr_debug("TX_JUMBO_CNT %-8x\n", hwstat->tx_jumbo);
730 pr_debug("TX_BYTE_CNT %-8x\n", hwstat->tx_byte);
731}
732
733static struct net_device_stats *dnet_get_stats(struct net_device *dev)
734{
735
736 struct dnet *bp = netdev_priv(dev);
737 struct net_device_stats *nstat = &dev->stats;
738 struct dnet_stats *hwstat = &bp->hw_stats;
739
740 /* read stats from hardware */
741 dnet_update_stats(bp);
742
743 /* Convert HW stats into netdevice stats */
744 nstat->rx_errors = (hwstat->rx_len_chk_err +
745 hwstat->rx_lng_frm + hwstat->rx_shrt_frm +
746 /* ignore IGP violation error
747 hwstat->rx_ipg_viol + */
748 hwstat->rx_crc_err +
749 hwstat->rx_pre_shrink +
750 hwstat->rx_drib_nib + hwstat->rx_unsup_opcd);
751 nstat->tx_errors = hwstat->tx_bad_fcs;
752 nstat->rx_length_errors = (hwstat->rx_len_chk_err +
753 hwstat->rx_lng_frm +
754 hwstat->rx_shrt_frm + hwstat->rx_pre_shrink);
755 nstat->rx_crc_errors = hwstat->rx_crc_err;
756 nstat->rx_frame_errors = hwstat->rx_pre_shrink + hwstat->rx_drib_nib;
757 nstat->rx_packets = hwstat->rx_ok_pkt;
758 nstat->tx_packets = (hwstat->tx_unicast +
759 hwstat->tx_multicast + hwstat->tx_brdcast);
760 nstat->rx_bytes = hwstat->rx_byte;
761 nstat->tx_bytes = hwstat->tx_byte;
762 nstat->multicast = hwstat->rx_multicast;
763 nstat->rx_missed_errors = hwstat->rx_pkt_ignr;
764
765 dnet_print_pretty_hwstats(hwstat);
766
767 return nstat;
768}
769
770static int dnet_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
771{
772 struct dnet *bp = netdev_priv(dev);
773 struct phy_device *phydev = bp->phy_dev;
774
775 if (!phydev)
776 return -ENODEV;
777
778 return phy_ethtool_gset(phydev, cmd);
779}
780
781static int dnet_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
782{
783 struct dnet *bp = netdev_priv(dev);
784 struct phy_device *phydev = bp->phy_dev;
785
786 if (!phydev)
787 return -ENODEV;
788
789 return phy_ethtool_sset(phydev, cmd);
790}
791
792static int dnet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
793{
794 struct dnet *bp = netdev_priv(dev);
795 struct phy_device *phydev = bp->phy_dev;
796
797 if (!netif_running(dev))
798 return -EINVAL;
799
800 if (!phydev)
801 return -ENODEV;
802
803 return phy_mii_ioctl(phydev, if_mii(rq), cmd);
804}
805
806static void dnet_get_drvinfo(struct net_device *dev,
807 struct ethtool_drvinfo *info)
808{
809 strcpy(info->driver, DRV_NAME);
810 strcpy(info->version, DRV_VERSION);
811 strcpy(info->bus_info, "0");
812}
813
814static const struct ethtool_ops dnet_ethtool_ops = {
815 .get_settings = dnet_get_settings,
816 .set_settings = dnet_set_settings,
817 .get_drvinfo = dnet_get_drvinfo,
818 .get_link = ethtool_op_get_link,
819};
820
821static const struct net_device_ops dnet_netdev_ops = {
822 .ndo_open = dnet_open,
823 .ndo_stop = dnet_close,
824 .ndo_get_stats = dnet_get_stats,
825 .ndo_start_xmit = dnet_start_xmit,
826 .ndo_do_ioctl = dnet_ioctl,
827 .ndo_set_mac_address = eth_mac_addr,
828 .ndo_validate_addr = eth_validate_addr,
829 .ndo_change_mtu = eth_change_mtu,
830};
831
832static int __devinit dnet_probe(struct platform_device *pdev)
833{
834 struct resource *res;
835 struct net_device *dev;
836 struct dnet *bp;
837 struct phy_device *phydev;
838 int err = -ENXIO;
839 unsigned int mem_base, mem_size, irq;
840
841 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
842 if (!res) {
843 dev_err(&pdev->dev, "no mmio resource defined\n");
844 goto err_out;
845 }
846 mem_base = res->start;
847 mem_size = resource_size(res);
848 irq = platform_get_irq(pdev, 0);
849
850 if (!request_mem_region(mem_base, mem_size, DRV_NAME)) {
851 dev_err(&pdev->dev, "no memory region available\n");
852 err = -EBUSY;
853 goto err_out;
854 }
855
856 err = -ENOMEM;
857 dev = alloc_etherdev(sizeof(*bp));
858 if (!dev) {
859 dev_err(&pdev->dev, "etherdev alloc failed, aborting.\n");
860 goto err_out;
861 }
862
863 /* TODO: Actually, we have some interesting features... */
864 dev->features |= 0;
865
866 bp = netdev_priv(dev);
867 bp->dev = dev;
868
869 SET_NETDEV_DEV(dev, &pdev->dev);
870
871 spin_lock_init(&bp->lock);
872
873 bp->regs = ioremap(mem_base, mem_size);
874 if (!bp->regs) {
875 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
876 err = -ENOMEM;
877 goto err_out_free_dev;
878 }
879
880 dev->irq = irq;
881 err = request_irq(dev->irq, dnet_interrupt, 0, DRV_NAME, dev);
882 if (err) {
883 dev_err(&pdev->dev, "Unable to request IRQ %d (error %d)\n",
884 irq, err);
885 goto err_out_iounmap;
886 }
887
888 dev->netdev_ops = &dnet_netdev_ops;
889 netif_napi_add(dev, &bp->napi, dnet_poll, 64);
890 dev->ethtool_ops = &dnet_ethtool_ops;
891
892 dev->base_addr = (unsigned long)bp->regs;
893
894 bp->capabilities = dnet_readl(bp, VERCAPS) & DNET_CAPS_MASK;
895
896 dnet_get_hwaddr(bp);
897
898 if (!is_valid_ether_addr(dev->dev_addr)) {
899 /* choose a random ethernet address */
900 random_ether_addr(dev->dev_addr);
901 __dnet_set_hwaddr(bp);
902 }
903
904 err = register_netdev(dev);
905 if (err) {
906 dev_err(&pdev->dev, "Cannot register net device, aborting.\n");
907 goto err_out_free_irq;
908 }
909
910 /* register the PHY board fixup (for Marvell 88E1111) */
911 err = phy_register_fixup_for_uid(0x01410cc0, 0xfffffff0,
912 dnet_phy_marvell_fixup);
913 /* we can live without it, so just issue a warning */
914 if (err)
915 dev_warn(&pdev->dev, "Cannot register PHY board fixup.\n");
916
917 if (dnet_mii_init(bp) != 0)
918 goto err_out_unregister_netdev;
919
920 dev_info(&pdev->dev, "Dave DNET at 0x%p (0x%08x) irq %d %pM\n",
921 bp->regs, mem_base, dev->irq, dev->dev_addr);
922 dev_info(&pdev->dev, "has %smdio, %sirq, %sgigabit, %sdma \n",
923 (bp->capabilities & DNET_HAS_MDIO) ? "" : "no ",
924 (bp->capabilities & DNET_HAS_IRQ) ? "" : "no ",
925 (bp->capabilities & DNET_HAS_GIGABIT) ? "" : "no ",
926 (bp->capabilities & DNET_HAS_DMA) ? "" : "no ");
927 phydev = bp->phy_dev;
928 dev_info(&pdev->dev, "attached PHY driver [%s] "
929 "(mii_bus:phy_addr=%s, irq=%d)\n",
930 phydev->drv->name, phydev->dev.bus_id, phydev->irq);
931
932 return 0;
933
934err_out_unregister_netdev:
935 unregister_netdev(dev);
936err_out_free_irq:
937 free_irq(dev->irq, dev);
938err_out_iounmap:
939 iounmap(bp->regs);
940err_out_free_dev:
941 free_netdev(dev);
942err_out:
943 return err;
944}
945
946static int __devexit dnet_remove(struct platform_device *pdev)
947{
948
949 struct net_device *dev;
950 struct dnet *bp;
951
952 dev = platform_get_drvdata(pdev);
953
954 if (dev) {
955 bp = netdev_priv(dev);
956 if (bp->phy_dev)
957 phy_disconnect(bp->phy_dev);
958 mdiobus_unregister(bp->mii_bus);
959 kfree(bp->mii_bus->irq);
960 mdiobus_free(bp->mii_bus);
961 unregister_netdev(dev);
962 free_irq(dev->irq, dev);
963 iounmap(bp->regs);
964 free_netdev(dev);
965 }
966
967 return 0;
968}
969
970static struct platform_driver dnet_driver = {
971 .probe = dnet_probe,
972 .remove = __devexit_p(dnet_remove),
973 .driver = {
974 .name = "dnet",
975 },
976};
977
978static int __init dnet_init(void)
979{
980 return platform_driver_register(&dnet_driver);
981}
982
983static void __exit dnet_exit(void)
984{
985 platform_driver_unregister(&dnet_driver);
986}
987
988module_init(dnet_init);
989module_exit(dnet_exit);
990
991MODULE_LICENSE("GPL");
992MODULE_DESCRIPTION("Dave DNET Ethernet driver");
993MODULE_AUTHOR("Ilya Yanok <yanok@emcraft.com>, "
994 "Matteo Vit <matteo.vit@dave.eu>");
diff --git a/drivers/net/dnet.h b/drivers/net/dnet.h
new file mode 100644
index 000000000000..37f5b30fa78b
--- /dev/null
+++ b/drivers/net/dnet.h
@@ -0,0 +1,225 @@
1/*
2 * Dave DNET Ethernet Controller driver
3 *
4 * Copyright (C) 2008 Dave S.r.l. <www.dave.eu>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef _DNET_H
11#define _DNET_H
12
13#define DRV_NAME "dnet"
14#define DRV_VERSION "0.9.1"
15#define PFX DRV_NAME ": "
16
17/* Register access macros */
18#define dnet_writel(port, value, reg) \
19 writel((value), (port)->regs + DNET_##reg)
20#define dnet_readl(port, reg) readl((port)->regs + DNET_##reg)
21
22/* ALL DNET FIFO REGISTERS */
23#define DNET_RX_LEN_FIFO 0x000 /* RX_LEN_FIFO */
24#define DNET_RX_DATA_FIFO 0x004 /* RX_DATA_FIFO */
25#define DNET_TX_LEN_FIFO 0x008 /* TX_LEN_FIFO */
26#define DNET_TX_DATA_FIFO 0x00C /* TX_DATA_FIFO */
27
28/* ALL DNET CONTROL/STATUS REGISTERS OFFSETS */
29#define DNET_VERCAPS 0x100 /* VERCAPS */
30#define DNET_INTR_SRC 0x104 /* INTR_SRC */
31#define DNET_INTR_ENB 0x108 /* INTR_ENB */
32#define DNET_RX_STATUS 0x10C /* RX_STATUS */
33#define DNET_TX_STATUS 0x110 /* TX_STATUS */
34#define DNET_RX_FRAMES_CNT 0x114 /* RX_FRAMES_CNT */
35#define DNET_TX_FRAMES_CNT 0x118 /* TX_FRAMES_CNT */
36#define DNET_RX_FIFO_TH 0x11C /* RX_FIFO_TH */
37#define DNET_TX_FIFO_TH 0x120 /* TX_FIFO_TH */
38#define DNET_SYS_CTL 0x124 /* SYS_CTL */
39#define DNET_PAUSE_TMR 0x128 /* PAUSE_TMR */
40#define DNET_RX_FIFO_WCNT 0x12C /* RX_FIFO_WCNT */
41#define DNET_TX_FIFO_WCNT 0x130 /* TX_FIFO_WCNT */
42
43/* ALL DNET MAC REGISTERS */
44#define DNET_MACREG_DATA 0x200 /* Mac-Reg Data */
45#define DNET_MACREG_ADDR 0x204 /* Mac-Reg Addr */
46
47/* ALL DNET RX STATISTICS COUNTERS */
48#define DNET_RX_PKT_IGNR_CNT 0x300
49#define DNET_RX_LEN_CHK_ERR_CNT 0x304
50#define DNET_RX_LNG_FRM_CNT 0x308
51#define DNET_RX_SHRT_FRM_CNT 0x30C
52#define DNET_RX_IPG_VIOL_CNT 0x310
53#define DNET_RX_CRC_ERR_CNT 0x314
54#define DNET_RX_OK_PKT_CNT 0x318
55#define DNET_RX_CTL_FRM_CNT 0x31C
56#define DNET_RX_PAUSE_FRM_CNT 0x320
57#define DNET_RX_MULTICAST_CNT 0x324
58#define DNET_RX_BROADCAST_CNT 0x328
59#define DNET_RX_VLAN_TAG_CNT 0x32C
60#define DNET_RX_PRE_SHRINK_CNT 0x330
61#define DNET_RX_DRIB_NIB_CNT 0x334
62#define DNET_RX_UNSUP_OPCD_CNT 0x338
63#define DNET_RX_BYTE_CNT 0x33C
64
65/* DNET TX STATISTICS COUNTERS */
66#define DNET_TX_UNICAST_CNT 0x400
67#define DNET_TX_PAUSE_FRM_CNT 0x404
68#define DNET_TX_MULTICAST_CNT 0x408
69#define DNET_TX_BRDCAST_CNT 0x40C
70#define DNET_TX_VLAN_TAG_CNT 0x410
71#define DNET_TX_BAD_FCS_CNT 0x414
72#define DNET_TX_JUMBO_CNT 0x418
73#define DNET_TX_BYTE_CNT 0x41C
74
75/* SOME INTERNAL MAC-CORE REGISTER */
76#define DNET_INTERNAL_MODE_REG 0x0
77#define DNET_INTERNAL_RXTX_CONTROL_REG 0x2
78#define DNET_INTERNAL_MAX_PKT_SIZE_REG 0x4
79#define DNET_INTERNAL_IGP_REG 0x8
80#define DNET_INTERNAL_MAC_ADDR_0_REG 0xa
81#define DNET_INTERNAL_MAC_ADDR_1_REG 0xc
82#define DNET_INTERNAL_MAC_ADDR_2_REG 0xe
83#define DNET_INTERNAL_TX_RX_STS_REG 0x12
84#define DNET_INTERNAL_GMII_MNG_CTL_REG 0x14
85#define DNET_INTERNAL_GMII_MNG_DAT_REG 0x16
86
87#define DNET_INTERNAL_GMII_MNG_CMD_FIN (1 << 14)
88
89#define DNET_INTERNAL_WRITE (1 << 31)
90
91/* MAC-CORE REGISTER FIELDS */
92
93/* MAC-CORE MODE REGISTER FIELDS */
94#define DNET_INTERNAL_MODE_GBITEN (1 << 0)
95#define DNET_INTERNAL_MODE_FCEN (1 << 1)
96#define DNET_INTERNAL_MODE_RXEN (1 << 2)
97#define DNET_INTERNAL_MODE_TXEN (1 << 3)
98
99/* MAC-CORE RXTX CONTROL REGISTER FIELDS */
100#define DNET_INTERNAL_RXTX_CONTROL_RXSHORTFRAME (1 << 8)
101#define DNET_INTERNAL_RXTX_CONTROL_RXBROADCAST (1 << 7)
102#define DNET_INTERNAL_RXTX_CONTROL_RXMULTICAST (1 << 4)
103#define DNET_INTERNAL_RXTX_CONTROL_RXPAUSE (1 << 3)
104#define DNET_INTERNAL_RXTX_CONTROL_DISTXFCS (1 << 2)
105#define DNET_INTERNAL_RXTX_CONTROL_DISCFXFCS (1 << 1)
106#define DNET_INTERNAL_RXTX_CONTROL_ENPROMISC (1 << 0)
107#define DNET_INTERNAL_RXTX_CONTROL_DROPCONTROL (1 << 6)
108#define DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP (1 << 5)
109
110/* SYSTEM CONTROL REGISTER FIELDS */
111#define DNET_SYS_CTL_IGNORENEXTPKT (1 << 0)
112#define DNET_SYS_CTL_SENDPAUSE (1 << 2)
113#define DNET_SYS_CTL_RXFIFOFLUSH (1 << 3)
114#define DNET_SYS_CTL_TXFIFOFLUSH (1 << 4)
115
116/* TX STATUS REGISTER FIELDS */
117#define DNET_TX_STATUS_FIFO_ALMOST_EMPTY (1 << 2)
118#define DNET_TX_STATUS_FIFO_ALMOST_FULL (1 << 1)
119
120/* INTERRUPT SOURCE REGISTER FIELDS */
121#define DNET_INTR_SRC_TX_PKTSENT (1 << 0)
122#define DNET_INTR_SRC_TX_FIFOAF (1 << 1)
123#define DNET_INTR_SRC_TX_FIFOAE (1 << 2)
124#define DNET_INTR_SRC_TX_DISCFRM (1 << 3)
125#define DNET_INTR_SRC_TX_FIFOFULL (1 << 4)
126#define DNET_INTR_SRC_RX_CMDFIFOAF (1 << 8)
127#define DNET_INTR_SRC_RX_CMDFIFOFF (1 << 9)
128#define DNET_INTR_SRC_RX_DATAFIFOFF (1 << 10)
129#define DNET_INTR_SRC_TX_SUMMARY (1 << 16)
130#define DNET_INTR_SRC_RX_SUMMARY (1 << 17)
131#define DNET_INTR_SRC_PHY (1 << 19)
132
133/* INTERRUPT ENABLE REGISTER FIELDS */
134#define DNET_INTR_ENB_TX_PKTSENT (1 << 0)
135#define DNET_INTR_ENB_TX_FIFOAF (1 << 1)
136#define DNET_INTR_ENB_TX_FIFOAE (1 << 2)
137#define DNET_INTR_ENB_TX_DISCFRM (1 << 3)
138#define DNET_INTR_ENB_TX_FIFOFULL (1 << 4)
139#define DNET_INTR_ENB_RX_PKTRDY (1 << 8)
140#define DNET_INTR_ENB_RX_FIFOAF (1 << 9)
141#define DNET_INTR_ENB_RX_FIFOERR (1 << 10)
142#define DNET_INTR_ENB_RX_ERROR (1 << 11)
143#define DNET_INTR_ENB_RX_FIFOFULL (1 << 12)
144#define DNET_INTR_ENB_RX_FIFOAE (1 << 13)
145#define DNET_INTR_ENB_TX_SUMMARY (1 << 16)
146#define DNET_INTR_ENB_RX_SUMMARY (1 << 17)
147#define DNET_INTR_ENB_GLOBAL_ENABLE (1 << 18)
148
149/* default values:
150 * almost empty = less than one full sized ethernet frame (no jumbo) inside
151 * the fifo almost full = can write less than one full sized ethernet frame
152 * (no jumbo) inside the fifo
153 */
154#define DNET_CFG_TX_FIFO_FULL_THRES 25
155#define DNET_CFG_RX_FIFO_FULL_THRES 20
156
157/*
158 * Capabilities. Used by the driver to know the capabilities that the ethernet
159 * controller inside the FPGA have.
160 */
161
162#define DNET_HAS_MDIO (1 << 0)
163#define DNET_HAS_IRQ (1 << 1)
164#define DNET_HAS_GIGABIT (1 << 2)
165#define DNET_HAS_DMA (1 << 3)
166
167#define DNET_HAS_MII (1 << 4) /* or GMII */
168#define DNET_HAS_RMII (1 << 5) /* or RGMII */
169
170#define DNET_CAPS_MASK 0xFFFF
171
172#define DNET_FIFO_SIZE 1024 /* 1K x 32 bit */
173#define DNET_FIFO_TX_DATA_AF_TH (DNET_FIFO_SIZE - 384) /* 384 = 1536 / 4 */
174#define DNET_FIFO_TX_DATA_AE_TH 384
175
176#define DNET_FIFO_RX_CMD_AF_TH (1 << 16) /* just one frame inside the FIFO */
177
178/*
179 * Hardware-collected statistics.
180 */
181struct dnet_stats {
182 u32 rx_pkt_ignr;
183 u32 rx_len_chk_err;
184 u32 rx_lng_frm;
185 u32 rx_shrt_frm;
186 u32 rx_ipg_viol;
187 u32 rx_crc_err;
188 u32 rx_ok_pkt;
189 u32 rx_ctl_frm;
190 u32 rx_pause_frm;
191 u32 rx_multicast;
192 u32 rx_broadcast;
193 u32 rx_vlan_tag;
194 u32 rx_pre_shrink;
195 u32 rx_drib_nib;
196 u32 rx_unsup_opcd;
197 u32 rx_byte;
198 u32 tx_unicast;
199 u32 tx_pause_frm;
200 u32 tx_multicast;
201 u32 tx_brdcast;
202 u32 tx_vlan_tag;
203 u32 tx_bad_fcs;
204 u32 tx_jumbo;
205 u32 tx_byte;
206};
207
208struct dnet {
209 void __iomem *regs;
210 spinlock_t lock;
211 struct platform_device *pdev;
212 struct net_device *dev;
213 struct dnet_stats hw_stats;
214 unsigned int capabilities; /* read from FPGA */
215 struct napi_struct napi;
216
217 /* PHY stuff */
218 struct mii_bus *mii_bus;
219 struct phy_device *phy_dev;
220 unsigned int link;
221 unsigned int speed;
222 unsigned int duplex;
223};
224
225#endif /* _DNET_H */
diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c
index 87a706694fb3..6fd7aa61736e 100644
--- a/drivers/net/ibm_newemac/core.c
+++ b/drivers/net/ibm_newemac/core.c
@@ -2594,6 +2594,9 @@ static int __devinit emac_init_config(struct emac_instance *dev)
2594 if (of_device_is_compatible(np, "ibm,emac-460ex") || 2594 if (of_device_is_compatible(np, "ibm,emac-460ex") ||
2595 of_device_is_compatible(np, "ibm,emac-460gt")) 2595 of_device_is_compatible(np, "ibm,emac-460gt"))
2596 dev->features |= EMAC_FTR_460EX_PHY_CLK_FIX; 2596 dev->features |= EMAC_FTR_460EX_PHY_CLK_FIX;
2597 if (of_device_is_compatible(np, "ibm,emac-405ex") ||
2598 of_device_is_compatible(np, "ibm,emac-405exr"))
2599 dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX;
2597 } else if (of_device_is_compatible(np, "ibm,emac4")) { 2600 } else if (of_device_is_compatible(np, "ibm,emac4")) {
2598 dev->features |= EMAC_FTR_EMAC4; 2601 dev->features |= EMAC_FTR_EMAC4;
2599 if (of_device_is_compatible(np, "ibm,emac-440gx")) 2602 if (of_device_is_compatible(np, "ibm,emac-440gx"))
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index a50db5398fa5..9dd13ad12ce4 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -1023,11 +1023,10 @@ static int __devinit igb_probe(struct pci_dev *pdev,
1023 struct net_device *netdev; 1023 struct net_device *netdev;
1024 struct igb_adapter *adapter; 1024 struct igb_adapter *adapter;
1025 struct e1000_hw *hw; 1025 struct e1000_hw *hw;
1026 struct pci_dev *us_dev;
1027 const struct e1000_info *ei = igb_info_tbl[ent->driver_data]; 1026 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
1028 unsigned long mmio_start, mmio_len; 1027 unsigned long mmio_start, mmio_len;
1029 int i, err, pci_using_dac, pos; 1028 int i, err, pci_using_dac;
1030 u16 eeprom_data = 0, state = 0; 1029 u16 eeprom_data = 0;
1031 u16 eeprom_apme_mask = IGB_EEPROM_APME; 1030 u16 eeprom_apme_mask = IGB_EEPROM_APME;
1032 u32 part_num; 1031 u32 part_num;
1033 int bars, need_ioport; 1032 int bars, need_ioport;
@@ -1062,27 +1061,6 @@ static int __devinit igb_probe(struct pci_dev *pdev,
1062 } 1061 }
1063 } 1062 }
1064 1063
1065 /* 82575 requires that the pci-e link partner disable the L0s state */
1066 switch (pdev->device) {
1067 case E1000_DEV_ID_82575EB_COPPER:
1068 case E1000_DEV_ID_82575EB_FIBER_SERDES:
1069 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1070 us_dev = pdev->bus->self;
1071 pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
1072 if (pos) {
1073 pci_read_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1074 &state);
1075 state &= ~PCIE_LINK_STATE_L0S;
1076 pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1077 state);
1078 dev_info(&pdev->dev,
1079 "Disabling ASPM L0s upstream switch port %s\n",
1080 pci_name(us_dev));
1081 }
1082 default:
1083 break;
1084 }
1085
1086 err = pci_request_selected_regions(pdev, bars, igb_driver_name); 1064 err = pci_request_selected_regions(pdev, bars, igb_driver_name);
1087 if (err) 1065 if (err)
1088 goto err_pci_reg; 1066 goto err_pci_reg;
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index d2f4d5f508b7..5d364a96e35d 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -3973,6 +3973,7 @@ static const struct net_device_ops ixgbe_netdev_ops = {
3973 .ndo_stop = ixgbe_close, 3973 .ndo_stop = ixgbe_close,
3974 .ndo_start_xmit = ixgbe_xmit_frame, 3974 .ndo_start_xmit = ixgbe_xmit_frame,
3975 .ndo_get_stats = ixgbe_get_stats, 3975 .ndo_get_stats = ixgbe_get_stats,
3976 .ndo_set_rx_mode = ixgbe_set_rx_mode,
3976 .ndo_set_multicast_list = ixgbe_set_rx_mode, 3977 .ndo_set_multicast_list = ixgbe_set_rx_mode,
3977 .ndo_validate_addr = eth_validate_addr, 3978 .ndo_validate_addr = eth_validate_addr,
3978 .ndo_set_mac_address = ixgbe_set_mac, 3979 .ndo_set_mac_address = ixgbe_set_mac,
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index 13f11f402a99..b0bc3bc18e9c 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -2030,11 +2030,6 @@ static void port_start(struct mv643xx_eth_private *mp)
2030 } 2030 }
2031 2031
2032 /* 2032 /*
2033 * Add configured unicast address to address filter table.
2034 */
2035 mv643xx_eth_program_unicast_filter(mp->dev);
2036
2037 /*
2038 * Receive all unmatched unicast, TCP, UDP, BPDU and broadcast 2033 * Receive all unmatched unicast, TCP, UDP, BPDU and broadcast
2039 * frames to RX queue #0, and include the pseudo-header when 2034 * frames to RX queue #0, and include the pseudo-header when
2040 * calculating receive checksums. 2035 * calculating receive checksums.
@@ -2047,6 +2042,11 @@ static void port_start(struct mv643xx_eth_private *mp)
2047 wrlp(mp, PORT_CONFIG_EXT, 0x00000000); 2042 wrlp(mp, PORT_CONFIG_EXT, 0x00000000);
2048 2043
2049 /* 2044 /*
2045 * Add configured unicast addresses to address filter table.
2046 */
2047 mv643xx_eth_program_unicast_filter(mp->dev);
2048
2049 /*
2050 * Enable the receive queues. 2050 * Enable the receive queues.
2051 */ 2051 */
2052 for (i = 0; i < mp->rxq_count; i++) { 2052 for (i = 0; i < mp->rxq_count; i++) {
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h
index f4dd9acb6877..1ff066b2281a 100644
--- a/drivers/net/netxen/netxen_nic.h
+++ b/drivers/net/netxen/netxen_nic.h
@@ -1595,7 +1595,6 @@ dma_watchdog_wakeup(struct netxen_adapter *adapter)
1595} 1595}
1596 1596
1597 1597
1598int netxen_is_flash_supported(struct netxen_adapter *adapter);
1599int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, __le64 *mac); 1598int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, __le64 *mac);
1600int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, __le64 *mac); 1599int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, __le64 *mac);
1601extern void netxen_change_ringparam(struct netxen_adapter *adapter); 1600extern void netxen_change_ringparam(struct netxen_adapter *adapter);
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c
index 821cff68b3f3..7fea77088108 100644
--- a/drivers/net/netxen/netxen_nic_hw.c
+++ b/drivers/net/netxen/netxen_nic_hw.c
@@ -706,28 +706,6 @@ int netxen_nic_change_mtu(struct net_device *netdev, int mtu)
706 return rc; 706 return rc;
707} 707}
708 708
709int netxen_is_flash_supported(struct netxen_adapter *adapter)
710{
711 const int locs[] = { 0, 0x4, 0x100, 0x4000, 0x4128 };
712 int addr, val01, val02, i, j;
713
714 /* if the flash size less than 4Mb, make huge war cry and die */
715 for (j = 1; j < 4; j++) {
716 addr = j * NETXEN_NIC_WINDOW_MARGIN;
717 for (i = 0; i < ARRAY_SIZE(locs); i++) {
718 if (netxen_rom_fast_read(adapter, locs[i], &val01) == 0
719 && netxen_rom_fast_read(adapter, (addr + locs[i]),
720 &val02) == 0) {
721 if (val01 == val02)
722 return -1;
723 } else
724 return -1;
725 }
726 }
727
728 return 0;
729}
730
731static int netxen_get_flash_block(struct netxen_adapter *adapter, int base, 709static int netxen_get_flash_block(struct netxen_adapter *adapter, int base,
732 int size, __le32 * buf) 710 int size, __le32 * buf)
733{ 711{
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c
index 13087782ac40..c172b6e24a96 100644
--- a/drivers/net/netxen/netxen_nic_main.c
+++ b/drivers/net/netxen/netxen_nic_main.c
@@ -405,9 +405,6 @@ netxen_read_mac_addr(struct netxen_adapter *adapter)
405 struct net_device *netdev = adapter->netdev; 405 struct net_device *netdev = adapter->netdev;
406 struct pci_dev *pdev = adapter->pdev; 406 struct pci_dev *pdev = adapter->pdev;
407 407
408 if (netxen_is_flash_supported(adapter) != 0)
409 return -EIO;
410
411 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 408 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
412 if (netxen_p3_get_mac_addr(adapter, &mac_addr) != 0) 409 if (netxen_p3_get_mac_addr(adapter, &mac_addr) != 0)
413 return -EIO; 410 return -EIO;
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h
index e6fdce9206cc..aff9c5fec738 100644
--- a/drivers/net/qlge/qlge.h
+++ b/drivers/net/qlge/qlge.h
@@ -927,6 +927,7 @@ struct ib_mac_iocb_rsp {
927 u8 flags1; 927 u8 flags1;
928#define IB_MAC_IOCB_RSP_OI 0x01 /* Overide intr delay */ 928#define IB_MAC_IOCB_RSP_OI 0x01 /* Overide intr delay */
929#define IB_MAC_IOCB_RSP_I 0x02 /* Disble Intr Generation */ 929#define IB_MAC_IOCB_RSP_I 0x02 /* Disble Intr Generation */
930#define IB_MAC_CSUM_ERR_MASK 0x1c /* A mask to use for csum errs */
930#define IB_MAC_IOCB_RSP_TE 0x04 /* Checksum error */ 931#define IB_MAC_IOCB_RSP_TE 0x04 /* Checksum error */
931#define IB_MAC_IOCB_RSP_NU 0x08 /* No checksum rcvd */ 932#define IB_MAC_IOCB_RSP_NU 0x08 /* No checksum rcvd */
932#define IB_MAC_IOCB_RSP_IE 0x10 /* IPv4 checksum error */ 933#define IB_MAC_IOCB_RSP_IE 0x10 /* IPv4 checksum error */
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index 8ea72dc60f79..91191f761fba 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -1436,18 +1436,32 @@ static void ql_process_mac_rx_intr(struct ql_adapter *qdev,
1436 if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_P) { 1436 if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_P) {
1437 QPRINTK(qdev, RX_STATUS, DEBUG, "Promiscuous Packet.\n"); 1437 QPRINTK(qdev, RX_STATUS, DEBUG, "Promiscuous Packet.\n");
1438 } 1438 }
1439 if (ib_mac_rsp->flags1 & (IB_MAC_IOCB_RSP_IE | IB_MAC_IOCB_RSP_TE)) { 1439
1440 QPRINTK(qdev, RX_STATUS, ERR, 1440 skb->protocol = eth_type_trans(skb, ndev);
1441 "Bad checksum for this %s packet.\n", 1441 skb->ip_summed = CHECKSUM_NONE;
1442 ((ib_mac_rsp-> 1442
1443 flags2 & IB_MAC_IOCB_RSP_T) ? "TCP" : "UDP")); 1443 /* If rx checksum is on, and there are no
1444 skb->ip_summed = CHECKSUM_NONE; 1444 * csum or frame errors.
1445 } else if (qdev->rx_csum && 1445 */
1446 ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) || 1446 if (qdev->rx_csum &&
1447 ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) && 1447 !(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) &&
1448 !(ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_NU)))) { 1448 !(ib_mac_rsp->flags1 & IB_MAC_CSUM_ERR_MASK)) {
1449 QPRINTK(qdev, RX_STATUS, DEBUG, "RX checksum done!\n"); 1449 /* TCP frame. */
1450 skb->ip_summed = CHECKSUM_UNNECESSARY; 1450 if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) {
1451 QPRINTK(qdev, RX_STATUS, DEBUG,
1452 "TCP checksum done!\n");
1453 skb->ip_summed = CHECKSUM_UNNECESSARY;
1454 } else if ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) &&
1455 (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_V4)) {
1456 /* Unfragmented ipv4 UDP frame. */
1457 struct iphdr *iph = (struct iphdr *) skb->data;
1458 if (!(iph->frag_off &
1459 cpu_to_be16(IP_MF|IP_OFFSET))) {
1460 skb->ip_summed = CHECKSUM_UNNECESSARY;
1461 QPRINTK(qdev, RX_STATUS, DEBUG,
1462 "TCP checksum done!\n");
1463 }
1464 }
1451 } 1465 }
1452 qdev->stats.rx_packets++; 1466 qdev->stats.rx_packets++;
1453 qdev->stats.rx_bytes += skb->len; 1467 qdev->stats.rx_bytes += skb->len;
@@ -1927,6 +1941,9 @@ static int qlge_send(struct sk_buff *skb, struct net_device *ndev)
1927 1941
1928 tx_ring = &qdev->tx_ring[tx_ring_idx]; 1942 tx_ring = &qdev->tx_ring[tx_ring_idx];
1929 1943
1944 if (skb_padto(skb, ETH_ZLEN))
1945 return NETDEV_TX_OK;
1946
1930 if (unlikely(atomic_read(&tx_ring->tx_count) < 2)) { 1947 if (unlikely(atomic_read(&tx_ring->tx_count) < 2)) {
1931 QPRINTK(qdev, TX_QUEUED, INFO, 1948 QPRINTK(qdev, TX_QUEUED, INFO,
1932 "%s: shutting down tx queue %d du to lack of resources.\n", 1949 "%s: shutting down tx queue %d du to lack of resources.\n",
@@ -2970,9 +2987,9 @@ static int ql_adapter_initialize(struct ql_adapter *qdev)
2970 mask = value << 16; 2987 mask = value << 16;
2971 ql_write32(qdev, SYS, mask | value); 2988 ql_write32(qdev, SYS, mask | value);
2972 2989
2973 /* Set the default queue. */ 2990 /* Set the default queue, and VLAN behavior. */
2974 value = NIC_RCV_CFG_DFQ; 2991 value = NIC_RCV_CFG_DFQ | NIC_RCV_CFG_RV;
2975 mask = NIC_RCV_CFG_DFQ_MASK; 2992 mask = NIC_RCV_CFG_DFQ_MASK | (NIC_RCV_CFG_RV << 16);
2976 ql_write32(qdev, NIC_RCV_CFG, (mask | value)); 2993 ql_write32(qdev, NIC_RCV_CFG, (mask | value));
2977 2994
2978 /* Set the MPI interrupt to enabled. */ 2995 /* Set the MPI interrupt to enabled. */
@@ -3149,6 +3166,11 @@ static int ql_adapter_down(struct ql_adapter *qdev)
3149 3166
3150 ql_tx_ring_clean(qdev); 3167 ql_tx_ring_clean(qdev);
3151 3168
3169 /* Call netif_napi_del() from common point.
3170 */
3171 for (i = qdev->rss_ring_first_cq_id; i < qdev->rx_ring_count; i++)
3172 netif_napi_del(&qdev->rx_ring[i].napi);
3173
3152 spin_lock(&qdev->hw_lock); 3174 spin_lock(&qdev->hw_lock);
3153 status = ql_adapter_reset(qdev); 3175 status = ql_adapter_reset(qdev);
3154 if (status) 3176 if (status)
@@ -3853,7 +3875,7 @@ static int qlge_suspend(struct pci_dev *pdev, pm_message_t state)
3853{ 3875{
3854 struct net_device *ndev = pci_get_drvdata(pdev); 3876 struct net_device *ndev = pci_get_drvdata(pdev);
3855 struct ql_adapter *qdev = netdev_priv(ndev); 3877 struct ql_adapter *qdev = netdev_priv(ndev);
3856 int err, i; 3878 int err;
3857 3879
3858 netif_device_detach(ndev); 3880 netif_device_detach(ndev);
3859 3881
@@ -3863,9 +3885,6 @@ static int qlge_suspend(struct pci_dev *pdev, pm_message_t state)
3863 return err; 3885 return err;
3864 } 3886 }
3865 3887
3866 for (i = qdev->rss_ring_first_cq_id; i < qdev->rx_ring_count; i++)
3867 netif_napi_del(&qdev->rx_ring[i].napi);
3868
3869 err = pci_save_state(pdev); 3888 err = pci_save_state(pdev);
3870 if (err) 3889 if (err)
3871 return err; 3890 return err;
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index b3473401c83a..43fedb9ecedb 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -81,9 +81,9 @@ static const int multicast_filter_limit = 32;
81#define RTL8169_TX_TIMEOUT (6*HZ) 81#define RTL8169_TX_TIMEOUT (6*HZ)
82#define RTL8169_PHY_TIMEOUT (10*HZ) 82#define RTL8169_PHY_TIMEOUT (10*HZ)
83 83
84#define RTL_EEPROM_SIG 0x8129 84#define RTL_EEPROM_SIG cpu_to_le32(0x8129)
85#define RTL_EEPROM_SIG_MASK cpu_to_le32(0xffff)
85#define RTL_EEPROM_SIG_ADDR 0x0000 86#define RTL_EEPROM_SIG_ADDR 0x0000
86#define RTL_EEPROM_MAC_ADDR 0x0007
87 87
88/* write/read MMIO register */ 88/* write/read MMIO register */
89#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) 89#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
@@ -293,11 +293,6 @@ enum rtl_register_content {
293 /* Cfg9346Bits */ 293 /* Cfg9346Bits */
294 Cfg9346_Lock = 0x00, 294 Cfg9346_Lock = 0x00,
295 Cfg9346_Unlock = 0xc0, 295 Cfg9346_Unlock = 0xc0,
296 Cfg9346_Program = 0x80, /* Programming mode */
297 Cfg9346_EECS = 0x08, /* Chip select */
298 Cfg9346_EESK = 0x04, /* Serial data clock */
299 Cfg9346_EEDI = 0x02, /* Data input */
300 Cfg9346_EEDO = 0x01, /* Data output */
301 296
302 /* rx_mode_bits */ 297 /* rx_mode_bits */
303 AcceptErr = 0x20, 298 AcceptErr = 0x20,
@@ -310,7 +305,6 @@ enum rtl_register_content {
310 /* RxConfigBits */ 305 /* RxConfigBits */
311 RxCfgFIFOShift = 13, 306 RxCfgFIFOShift = 13,
312 RxCfgDMAShift = 8, 307 RxCfgDMAShift = 8,
313 RxCfg9356SEL = 6, /* EEPROM type: 0 = 9346, 1 = 9356 */
314 308
315 /* TxConfigBits */ 309 /* TxConfigBits */
316 TxInterFrameGapShift = 24, 310 TxInterFrameGapShift = 24,
@@ -1969,108 +1963,6 @@ static const struct net_device_ops rtl8169_netdev_ops = {
1969 1963
1970}; 1964};
1971 1965
1972/* Delay between EEPROM clock transitions. Force out buffered PCI writes. */
1973#define RTL_EEPROM_DELAY() RTL_R8(Cfg9346)
1974#define RTL_EEPROM_READ_CMD 6
1975
1976/* read 16bit word stored in EEPROM. EEPROM is addressed by words. */
1977static u16 rtl_eeprom_read(void __iomem *ioaddr, int addr)
1978{
1979 u16 result = 0;
1980 int cmd, cmd_len, i;
1981
1982 /* check for EEPROM address size (in bits) */
1983 if (RTL_R32(RxConfig) & (1 << RxCfg9356SEL)) {
1984 /* EEPROM is 93C56 */
1985 cmd_len = 3 + 8; /* 3 bits for command id and 8 for address */
1986 cmd = (RTL_EEPROM_READ_CMD << 8) | (addr & 0xff);
1987 } else {
1988 /* EEPROM is 93C46 */
1989 cmd_len = 3 + 6; /* 3 bits for command id and 6 for address */
1990 cmd = (RTL_EEPROM_READ_CMD << 6) | (addr & 0x3f);
1991 }
1992
1993 /* enter programming mode */
1994 RTL_W8(Cfg9346, Cfg9346_Program | Cfg9346_EECS);
1995 RTL_EEPROM_DELAY();
1996
1997 /* write command and requested address */
1998 while (cmd_len--) {
1999 u8 x = Cfg9346_Program | Cfg9346_EECS;
2000
2001 x |= (cmd & (1 << cmd_len)) ? Cfg9346_EEDI : 0;
2002
2003 /* write a bit */
2004 RTL_W8(Cfg9346, x);
2005 RTL_EEPROM_DELAY();
2006
2007 /* raise clock */
2008 RTL_W8(Cfg9346, x | Cfg9346_EESK);
2009 RTL_EEPROM_DELAY();
2010 }
2011
2012 /* lower clock */
2013 RTL_W8(Cfg9346, Cfg9346_Program | Cfg9346_EECS);
2014 RTL_EEPROM_DELAY();
2015
2016 /* read back 16bit value */
2017 for (i = 16; i > 0; i--) {
2018 /* raise clock */
2019 RTL_W8(Cfg9346, Cfg9346_Program | Cfg9346_EECS | Cfg9346_EESK);
2020 RTL_EEPROM_DELAY();
2021
2022 result <<= 1;
2023 result |= (RTL_R8(Cfg9346) & Cfg9346_EEDO) ? 1 : 0;
2024
2025 /* lower clock */
2026 RTL_W8(Cfg9346, Cfg9346_Program | Cfg9346_EECS);
2027 RTL_EEPROM_DELAY();
2028 }
2029
2030 RTL_W8(Cfg9346, Cfg9346_Program);
2031 /* leave programming mode */
2032 RTL_W8(Cfg9346, Cfg9346_Lock);
2033
2034 return result;
2035}
2036
2037static void rtl_init_mac_address(struct rtl8169_private *tp,
2038 void __iomem *ioaddr)
2039{
2040 struct pci_dev *pdev = tp->pci_dev;
2041 u16 x;
2042 u8 mac[8];
2043
2044 /* read EEPROM signature */
2045 x = rtl_eeprom_read(ioaddr, RTL_EEPROM_SIG_ADDR);
2046
2047 if (x != RTL_EEPROM_SIG) {
2048 dev_info(&pdev->dev, "Missing EEPROM signature: %04x\n", x);
2049 return;
2050 }
2051
2052 /* read MAC address */
2053 x = rtl_eeprom_read(ioaddr, RTL_EEPROM_MAC_ADDR);
2054 mac[0] = x & 0xff;
2055 mac[1] = x >> 8;
2056 x = rtl_eeprom_read(ioaddr, RTL_EEPROM_MAC_ADDR + 1);
2057 mac[2] = x & 0xff;
2058 mac[3] = x >> 8;
2059 x = rtl_eeprom_read(ioaddr, RTL_EEPROM_MAC_ADDR + 2);
2060 mac[4] = x & 0xff;
2061 mac[5] = x >> 8;
2062
2063 if (netif_msg_probe(tp)) {
2064 DECLARE_MAC_BUF(buf);
2065
2066 dev_info(&pdev->dev, "MAC address found in EEPROM: %s\n",
2067 print_mac(buf, mac));
2068 }
2069
2070 if (is_valid_ether_addr(mac))
2071 rtl_rar_set(tp, mac);
2072}
2073
2074static int __devinit 1966static int __devinit
2075rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 1967rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2076{ 1968{
@@ -2249,8 +2141,6 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2249 2141
2250 tp->mmio_addr = ioaddr; 2142 tp->mmio_addr = ioaddr;
2251 2143
2252 rtl_init_mac_address(tp, ioaddr);
2253
2254 /* Get MAC address */ 2144 /* Get MAC address */
2255 for (i = 0; i < MAC_ADDR_LEN; i++) 2145 for (i = 0; i < MAC_ADDR_LEN; i++)
2256 dev->dev_addr[i] = RTL_R8(MAC0 + i); 2146 dev->dev_addr[i] = RTL_R8(MAC0 + i);
@@ -3363,13 +3253,6 @@ static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
3363 opts1 |= FirstFrag; 3253 opts1 |= FirstFrag;
3364 } else { 3254 } else {
3365 len = skb->len; 3255 len = skb->len;
3366
3367 if (unlikely(len < ETH_ZLEN)) {
3368 if (skb_padto(skb, ETH_ZLEN))
3369 goto err_update_stats;
3370 len = ETH_ZLEN;
3371 }
3372
3373 opts1 |= FirstFrag | LastFrag; 3256 opts1 |= FirstFrag | LastFrag;
3374 tp->tx_skb[entry].skb = skb; 3257 tp->tx_skb[entry].skb = skb;
3375 } 3258 }
@@ -3407,7 +3290,6 @@ out:
3407err_stop: 3290err_stop:
3408 netif_stop_queue(dev); 3291 netif_stop_queue(dev);
3409 ret = NETDEV_TX_BUSY; 3292 ret = NETDEV_TX_BUSY;
3410err_update_stats:
3411 dev->stats.tx_dropped++; 3293 dev->stats.tx_dropped++;
3412 goto out; 3294 goto out;
3413} 3295}
diff --git a/drivers/net/sunhme.c b/drivers/net/sunhme.c
index d4fb4acdbebd..4e9bd380a5c2 100644
--- a/drivers/net/sunhme.c
+++ b/drivers/net/sunhme.c
@@ -2649,8 +2649,6 @@ static int __devinit happy_meal_sbus_probe_one(struct of_device *op, int is_qfe)
2649 int err = -ENODEV; 2649 int err = -ENODEV;
2650 2650
2651 sbus_dp = to_of_device(op->dev.parent)->node; 2651 sbus_dp = to_of_device(op->dev.parent)->node;
2652 if (is_qfe)
2653 sbus_dp = to_of_device(op->dev.parent->parent)->node;
2654 2652
2655 /* We can match PCI devices too, do not accept those here. */ 2653 /* We can match PCI devices too, do not accept those here. */
2656 if (strcmp(sbus_dp->name, "sbus")) 2654 if (strcmp(sbus_dp->name, "sbus"))
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c
index c5691fdb7079..fb53ef872df3 100644
--- a/drivers/net/via-velocity.c
+++ b/drivers/net/via-velocity.c
@@ -1838,17 +1838,19 @@ static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_
1838{ 1838{
1839 struct sk_buff *skb = tdinfo->skb; 1839 struct sk_buff *skb = tdinfo->skb;
1840 int i; 1840 int i;
1841 int pktlen;
1841 1842
1842 /* 1843 /*
1843 * Don't unmap the pre-allocated tx_bufs 1844 * Don't unmap the pre-allocated tx_bufs
1844 */ 1845 */
1845 if (tdinfo->skb_dma) { 1846 if (tdinfo->skb_dma) {
1846 1847
1848 pktlen = (skb->len > ETH_ZLEN ? : ETH_ZLEN);
1847 for (i = 0; i < tdinfo->nskb_dma; i++) { 1849 for (i = 0; i < tdinfo->nskb_dma; i++) {
1848#ifdef VELOCITY_ZERO_COPY_SUPPORT 1850#ifdef VELOCITY_ZERO_COPY_SUPPORT
1849 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], le16_to_cpu(td->tdesc1.len), PCI_DMA_TODEVICE); 1851 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], le16_to_cpu(td->tdesc1.len), PCI_DMA_TODEVICE);
1850#else 1852#else
1851 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], skb->len, PCI_DMA_TODEVICE); 1853 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], pktlen, PCI_DMA_TODEVICE);
1852#endif 1854#endif
1853 tdinfo->skb_dma[i] = 0; 1855 tdinfo->skb_dma[i] = 0;
1854 } 1856 }
@@ -2080,17 +2082,14 @@ static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
2080 struct tx_desc *td_ptr; 2082 struct tx_desc *td_ptr;
2081 struct velocity_td_info *tdinfo; 2083 struct velocity_td_info *tdinfo;
2082 unsigned long flags; 2084 unsigned long flags;
2083 int pktlen = skb->len; 2085 int pktlen;
2084 __le16 len; 2086 __le16 len;
2085 int index; 2087 int index;
2086 2088
2087 2089
2088 2090 if (skb_padto(skb, ETH_ZLEN))
2089 if (skb->len < ETH_ZLEN) { 2091 goto out;
2090 if (skb_padto(skb, ETH_ZLEN)) 2092 pktlen = max_t(unsigned int, skb->len, ETH_ZLEN);
2091 goto out;
2092 pktlen = ETH_ZLEN;
2093 }
2094 2093
2095 len = cpu_to_le16(pktlen); 2094 len = cpu_to_le16(pktlen);
2096 2095
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index d539d9df88e7..bb5a1c9597cb 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -479,7 +479,7 @@ dino_card_setup(struct pci_bus *bus, void __iomem *base_addr)
479 res = &dino_dev->hba.lmmio_space; 479 res = &dino_dev->hba.lmmio_space;
480 res->flags = IORESOURCE_MEM; 480 res->flags = IORESOURCE_MEM;
481 size = scnprintf(name, sizeof(name), "Dino LMMIO (%s)", 481 size = scnprintf(name, sizeof(name), "Dino LMMIO (%s)",
482 bus->bridge->bus_id); 482 dev_name(bus->bridge));
483 res->name = kmalloc(size+1, GFP_KERNEL); 483 res->name = kmalloc(size+1, GFP_KERNEL);
484 if(res->name) 484 if(res->name)
485 strcpy((char *)res->name, name); 485 strcpy((char *)res->name, name);
@@ -493,7 +493,7 @@ dino_card_setup(struct pci_bus *bus, void __iomem *base_addr)
493 struct list_head *ln, *tmp_ln; 493 struct list_head *ln, *tmp_ln;
494 494
495 printk(KERN_ERR "Dino: cannot attach bus %s\n", 495 printk(KERN_ERR "Dino: cannot attach bus %s\n",
496 bus->bridge->bus_id); 496 dev_name(bus->bridge));
497 /* kill the bus, we can't do anything with it */ 497 /* kill the bus, we can't do anything with it */
498 list_for_each_safe(ln, tmp_ln, &bus->devices) { 498 list_for_each_safe(ln, tmp_ln, &bus->devices) {
499 struct pci_dev *dev = pci_dev_b(ln); 499 struct pci_dev *dev = pci_dev_b(ln);
@@ -587,7 +587,7 @@ dino_fixup_bus(struct pci_bus *bus)
587 bus->resource[i+1] = &res[i]; 587 bus->resource[i+1] = &res[i];
588 } 588 }
589 589
590 } else if(bus->self) { 590 } else if (bus->parent) {
591 int i; 591 int i;
592 592
593 pci_read_bridge_bases(bus); 593 pci_read_bridge_bases(bus);
@@ -611,12 +611,12 @@ dino_fixup_bus(struct pci_bus *bus)
611 } 611 }
612 612
613 DBG("DEBUG %s assigning %d [0x%lx,0x%lx]\n", 613 DBG("DEBUG %s assigning %d [0x%lx,0x%lx]\n",
614 bus->self->dev.bus_id, i, 614 dev_name(&bus->self->dev), i,
615 bus->self->resource[i].start, 615 bus->self->resource[i].start,
616 bus->self->resource[i].end); 616 bus->self->resource[i].end);
617 pci_assign_resource(bus->self, i); 617 pci_assign_resource(bus->self, i);
618 DBG("DEBUG %s after assign %d [0x%lx,0x%lx]\n", 618 DBG("DEBUG %s after assign %d [0x%lx,0x%lx]\n",
619 bus->self->dev.bus_id, i, 619 dev_name(&bus->self->dev), i,
620 bus->self->resource[i].start, 620 bus->self->resource[i].start,
621 bus->self->resource[i].end); 621 bus->self->resource[i].end);
622 } 622 }
@@ -1026,7 +1026,8 @@ static int __init dino_probe(struct parisc_device *dev)
1026 dino_current_bus = bus->subordinate + 1; 1026 dino_current_bus = bus->subordinate + 1;
1027 pci_bus_assign_resources(bus); 1027 pci_bus_assign_resources(bus);
1028 } else { 1028 } else {
1029 printk(KERN_ERR "ERROR: failed to scan PCI bus on %s (probably duplicate bus number %d)\n", dev->dev.bus_id, dino_current_bus); 1029 printk(KERN_ERR "ERROR: failed to scan PCI bus on %s (probably duplicate bus number %d)\n",
1030 dev_name(&dev->dev), dino_current_bus);
1030 /* increment the bus number in case of duplicates */ 1031 /* increment the bus number in case of duplicates */
1031 dino_current_bus++; 1032 dino_current_bus++;
1032 } 1033 }
diff --git a/drivers/parisc/gsc.c b/drivers/parisc/gsc.c
index e76db9e4d504..d33632917696 100644
--- a/drivers/parisc/gsc.c
+++ b/drivers/parisc/gsc.c
@@ -186,29 +186,34 @@ void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp)
186 *irqp = irq; 186 *irqp = irq;
187} 187}
188 188
189static struct device *next_device(struct klist_iter *i) 189struct gsc_fixup_struct {
190 void (*choose_irq)(struct parisc_device *, void *);
191 void *ctrl;
192};
193
194static int gsc_fixup_irqs_callback(struct device *dev, void *data)
190{ 195{
191 struct klist_node * n = klist_next(i); 196 struct parisc_device *padev = to_parisc_device(dev);
192 return n ? container_of(n, struct device, knode_parent) : NULL; 197 struct gsc_fixup_struct *gf = data;
198
199 /* work-around for 715/64 and others which have parent
200 at path [5] and children at path [5/0/x] */
201 if (padev->id.hw_type == HPHW_FAULTY)
202 gsc_fixup_irqs(padev, gf->ctrl, gf->choose_irq);
203 gf->choose_irq(padev, gf->ctrl);
204
205 return 0;
193} 206}
194 207
195void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl, 208void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl,
196 void (*choose_irq)(struct parisc_device *, void *)) 209 void (*choose_irq)(struct parisc_device *, void *))
197{ 210{
198 struct device *dev; 211 struct gsc_fixup_struct data = {
199 struct klist_iter i; 212 .choose_irq = choose_irq,
200 213 .ctrl = ctrl,
201 klist_iter_init(&parent->dev.klist_children, &i); 214 };
202 while ((dev = next_device(&i))) { 215
203 struct parisc_device *padev = to_parisc_device(dev); 216 device_for_each_child(&parent->dev, &data, gsc_fixup_irqs_callback);
204
205 /* work-around for 715/64 and others which have parent
206 at path [5] and children at path [5/0/x] */
207 if (padev->id.hw_type == HPHW_FAULTY)
208 return gsc_fixup_irqs(padev, ctrl, choose_irq);
209 choose_irq(padev, ctrl);
210 }
211 klist_iter_exit(&i);
212} 217}
213 218
214int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic) 219int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic)
diff --git a/drivers/parisc/iosapic.c b/drivers/parisc/iosapic.c
index 0797659ee016..501aaf1f253f 100644
--- a/drivers/parisc/iosapic.c
+++ b/drivers/parisc/iosapic.c
@@ -487,7 +487,7 @@ iosapic_xlate_pin(struct iosapic_info *isi, struct pci_dev *pcidev)
487 } 487 }
488 488
489 /* Check if pcidev behind a PPB */ 489 /* Check if pcidev behind a PPB */
490 if (NULL != pcidev->bus->self) { 490 if (pcidev->bus->parent) {
491 /* Convert pcidev INTR_PIN into something we 491 /* Convert pcidev INTR_PIN into something we
492 ** can lookup in the IRT. 492 ** can lookup in the IRT.
493 */ 493 */
@@ -523,10 +523,9 @@ iosapic_xlate_pin(struct iosapic_info *isi, struct pci_dev *pcidev)
523#endif /* PCI_BRIDGE_FUNCS */ 523#endif /* PCI_BRIDGE_FUNCS */
524 524
525 /* 525 /*
526 ** Locate the host slot the PPB nearest the Host bus 526 * Locate the host slot of the PPB.
527 ** adapter. 527 */
528 */ 528 while (p->parent->parent)
529 while (NULL != p->parent->self)
530 p = p->parent; 529 p = p->parent;
531 530
532 intr_slot = PCI_SLOT(p->self->devfn); 531 intr_slot = PCI_SLOT(p->self->devfn);
@@ -709,11 +708,14 @@ static void iosapic_set_affinity_irq(unsigned int irq,
709 struct vector_info *vi = iosapic_get_vector(irq); 708 struct vector_info *vi = iosapic_get_vector(irq);
710 u32 d0, d1, dummy_d0; 709 u32 d0, d1, dummy_d0;
711 unsigned long flags; 710 unsigned long flags;
711 int dest_cpu;
712 712
713 if (cpu_check_affinity(irq, dest)) 713 dest_cpu = cpu_check_affinity(irq, dest);
714 if (dest_cpu < 0)
714 return; 715 return;
715 716
716 vi->txn_addr = txn_affinity_addr(irq, cpumask_first(dest)); 717 irq_desc[irq].affinity = cpumask_of_cpu(dest_cpu);
718 vi->txn_addr = txn_affinity_addr(irq, dest_cpu);
717 719
718 spin_lock_irqsave(&iosapic_lock, flags); 720 spin_lock_irqsave(&iosapic_lock, flags);
719 /* d1 contains the destination CPU, so only want to set that 721 /* d1 contains the destination CPU, so only want to set that
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index d8233de8c75d..59fbbf128365 100644
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -644,7 +644,7 @@ lba_fixup_bus(struct pci_bus *bus)
644 ** Properly Setup MMIO resources for this bus. 644 ** Properly Setup MMIO resources for this bus.
645 ** pci_alloc_primary_bus() mangles this. 645 ** pci_alloc_primary_bus() mangles this.
646 */ 646 */
647 if (bus->self) { 647 if (bus->parent) {
648 int i; 648 int i;
649 /* PCI-PCI Bridge */ 649 /* PCI-PCI Bridge */
650 pci_read_bridge_bases(bus); 650 pci_read_bridge_bases(bus);
@@ -802,7 +802,7 @@ lba_fixup_bus(struct pci_bus *bus)
802** Can't fixup here anyway....garr... 802** Can't fixup here anyway....garr...
803*/ 803*/
804 if (fbb_enable) { 804 if (fbb_enable) {
805 if (bus->self) { 805 if (bus->parent) {
806 u8 control; 806 u8 control;
807 /* enable on PPB */ 807 /* enable on PPB */
808 (void) pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &control); 808 (void) pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &control);
diff --git a/drivers/parisc/sba_iommu.c b/drivers/parisc/sba_iommu.c
index a70cf16ee1ad..e5999c4cedc8 100644
--- a/drivers/parisc/sba_iommu.c
+++ b/drivers/parisc/sba_iommu.c
@@ -1206,30 +1206,48 @@ sba_alloc_pdir(unsigned int pdir_size)
1206 return (void *) pdir_base; 1206 return (void *) pdir_base;
1207} 1207}
1208 1208
1209static struct device *next_device(struct klist_iter *i) 1209struct ibase_data_struct {
1210 struct ioc *ioc;
1211 int ioc_num;
1212};
1213
1214static int setup_ibase_imask_callback(struct device *dev, void *data)
1210{ 1215{
1211 struct klist_node * n = klist_next(i); 1216 /* lba_set_iregs() is in drivers/parisc/lba_pci.c */
1212 return n ? container_of(n, struct device, knode_parent) : NULL; 1217 extern void lba_set_iregs(struct parisc_device *, u32, u32);
1218 struct parisc_device *lba = to_parisc_device(dev);
1219 struct ibase_data_struct *ibd = data;
1220 int rope_num = (lba->hpa.start >> 13) & 0xf;
1221 if (rope_num >> 3 == ibd->ioc_num)
1222 lba_set_iregs(lba, ibd->ioc->ibase, ibd->ioc->imask);
1223 return 0;
1213} 1224}
1214 1225
1215/* setup Mercury or Elroy IBASE/IMASK registers. */ 1226/* setup Mercury or Elroy IBASE/IMASK registers. */
1216static void 1227static void
1217setup_ibase_imask(struct parisc_device *sba, struct ioc *ioc, int ioc_num) 1228setup_ibase_imask(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
1218{ 1229{
1219 /* lba_set_iregs() is in drivers/parisc/lba_pci.c */ 1230 struct ibase_data_struct ibase_data = {
1220 extern void lba_set_iregs(struct parisc_device *, u32, u32); 1231 .ioc = ioc,
1221 struct device *dev; 1232 .ioc_num = ioc_num,
1222 struct klist_iter i; 1233 };
1223 1234
1224 klist_iter_init(&sba->dev.klist_children, &i); 1235 device_for_each_child(&sba->dev, &ibase_data,
1225 while ((dev = next_device(&i))) { 1236 setup_ibase_imask_callback);
1226 struct parisc_device *lba = to_parisc_device(dev); 1237}
1227 int rope_num = (lba->hpa.start >> 13) & 0xf; 1238
1228 if (rope_num >> 3 == ioc_num) 1239#ifdef SBA_AGP_SUPPORT
1229 lba_set_iregs(lba, ioc->ibase, ioc->imask); 1240static int
1230 } 1241sba_ioc_find_quicksilver(struct device *dev, void *data)
1231 klist_iter_exit(&i); 1242{
1243 int *agp_found = data;
1244 struct parisc_device *lba = to_parisc_device(dev);
1245
1246 if (IS_QUICKSILVER(lba))
1247 *agp_found = 1;
1248 return 0;
1232} 1249}
1250#endif
1233 1251
1234static void 1252static void
1235sba_ioc_init_pluto(struct parisc_device *sba, struct ioc *ioc, int ioc_num) 1253sba_ioc_init_pluto(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
@@ -1332,9 +1350,6 @@ sba_ioc_init_pluto(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
1332 WRITE_REG(ioc->ibase | 31, ioc->ioc_hpa + IOC_PCOM); 1350 WRITE_REG(ioc->ibase | 31, ioc->ioc_hpa + IOC_PCOM);
1333 1351
1334#ifdef SBA_AGP_SUPPORT 1352#ifdef SBA_AGP_SUPPORT
1335{
1336 struct klist_iter i;
1337 struct device *dev = NULL;
1338 1353
1339 /* 1354 /*
1340 ** If an AGP device is present, only use half of the IOV space 1355 ** If an AGP device is present, only use half of the IOV space
@@ -1344,13 +1359,7 @@ sba_ioc_init_pluto(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
1344 ** We program the next pdir index after we stop w/ a key for 1359 ** We program the next pdir index after we stop w/ a key for
1345 ** the GART code to handshake on. 1360 ** the GART code to handshake on.
1346 */ 1361 */
1347 klist_iter_init(&sba->dev.klist_children, &i); 1362 device_for_each_child(&sba->dev, &agp_found, sba_ioc_find_quicksilver);
1348 while ((dev = next_device(&i))) {
1349 struct parisc_device *lba = to_parisc_device(dev);
1350 if (IS_QUICKSILVER(lba))
1351 agp_found = 1;
1352 }
1353 klist_iter_exit(&i);
1354 1363
1355 if (agp_found && sba_reserve_agpgart) { 1364 if (agp_found && sba_reserve_agpgart) {
1356 printk(KERN_INFO "%s: reserving %dMb of IOVA space for agpgart\n", 1365 printk(KERN_INFO "%s: reserving %dMb of IOVA space for agpgart\n",
@@ -1358,9 +1367,7 @@ sba_ioc_init_pluto(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
1358 ioc->pdir_size /= 2; 1367 ioc->pdir_size /= 2;
1359 ioc->pdir_base[PDIR_INDEX(iova_space_size/2)] = SBA_AGPGART_COOKIE; 1368 ioc->pdir_base[PDIR_INDEX(iova_space_size/2)] = SBA_AGPGART_COOKIE;
1360 } 1369 }
1361}
1362#endif /*SBA_AGP_SUPPORT*/ 1370#endif /*SBA_AGP_SUPPORT*/
1363
1364} 1371}
1365 1372
1366static void 1373static void
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index 5f333403c2ea..d313039e2fdf 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -31,6 +31,8 @@
31#include <linux/iova.h> 31#include <linux/iova.h>
32#include <linux/intel-iommu.h> 32#include <linux/intel-iommu.h>
33#include <linux/timer.h> 33#include <linux/timer.h>
34#include <linux/irq.h>
35#include <linux/interrupt.h>
34 36
35#undef PREFIX 37#undef PREFIX
36#define PREFIX "DMAR:" 38#define PREFIX "DMAR:"
@@ -509,6 +511,7 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
509 return -ENOMEM; 511 return -ENOMEM;
510 512
511 iommu->seq_id = iommu_allocated++; 513 iommu->seq_id = iommu_allocated++;
514 sprintf (iommu->name, "dmar%d", iommu->seq_id);
512 515
513 iommu->reg = ioremap(drhd->reg_base_addr, VTD_PAGE_SIZE); 516 iommu->reg = ioremap(drhd->reg_base_addr, VTD_PAGE_SIZE);
514 if (!iommu->reg) { 517 if (!iommu->reg) {
@@ -751,6 +754,42 @@ int qi_flush_iotlb(struct intel_iommu *iommu, u16 did, u64 addr,
751} 754}
752 755
753/* 756/*
757 * Disable Queued Invalidation interface.
758 */
759void dmar_disable_qi(struct intel_iommu *iommu)
760{
761 unsigned long flags;
762 u32 sts;
763 cycles_t start_time = get_cycles();
764
765 if (!ecap_qis(iommu->ecap))
766 return;
767
768 spin_lock_irqsave(&iommu->register_lock, flags);
769
770 sts = dmar_readq(iommu->reg + DMAR_GSTS_REG);
771 if (!(sts & DMA_GSTS_QIES))
772 goto end;
773
774 /*
775 * Give a chance to HW to complete the pending invalidation requests.
776 */
777 while ((readl(iommu->reg + DMAR_IQT_REG) !=
778 readl(iommu->reg + DMAR_IQH_REG)) &&
779 (DMAR_OPERATION_TIMEOUT > (get_cycles() - start_time)))
780 cpu_relax();
781
782 iommu->gcmd &= ~DMA_GCMD_QIE;
783
784 writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
785
786 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, readl,
787 !(sts & DMA_GSTS_QIES), sts);
788end:
789 spin_unlock_irqrestore(&iommu->register_lock, flags);
790}
791
792/*
754 * Enable Queued Invalidation interface. This is a must to support 793 * Enable Queued Invalidation interface. This is a must to support
755 * interrupt-remapping. Also used by DMA-remapping, which replaces 794 * interrupt-remapping. Also used by DMA-remapping, which replaces
756 * register based IOTLB invalidation. 795 * register based IOTLB invalidation.
@@ -770,20 +809,20 @@ int dmar_enable_qi(struct intel_iommu *iommu)
770 if (iommu->qi) 809 if (iommu->qi)
771 return 0; 810 return 0;
772 811
773 iommu->qi = kmalloc(sizeof(*qi), GFP_KERNEL); 812 iommu->qi = kmalloc(sizeof(*qi), GFP_ATOMIC);
774 if (!iommu->qi) 813 if (!iommu->qi)
775 return -ENOMEM; 814 return -ENOMEM;
776 815
777 qi = iommu->qi; 816 qi = iommu->qi;
778 817
779 qi->desc = (void *)(get_zeroed_page(GFP_KERNEL)); 818 qi->desc = (void *)(get_zeroed_page(GFP_ATOMIC));
780 if (!qi->desc) { 819 if (!qi->desc) {
781 kfree(qi); 820 kfree(qi);
782 iommu->qi = 0; 821 iommu->qi = 0;
783 return -ENOMEM; 822 return -ENOMEM;
784 } 823 }
785 824
786 qi->desc_status = kmalloc(QI_LENGTH * sizeof(int), GFP_KERNEL); 825 qi->desc_status = kmalloc(QI_LENGTH * sizeof(int), GFP_ATOMIC);
787 if (!qi->desc_status) { 826 if (!qi->desc_status) {
788 free_page((unsigned long) qi->desc); 827 free_page((unsigned long) qi->desc);
789 kfree(qi); 828 kfree(qi);
@@ -812,3 +851,254 @@ int dmar_enable_qi(struct intel_iommu *iommu)
812 851
813 return 0; 852 return 0;
814} 853}
854
855/* iommu interrupt handling. Most stuff are MSI-like. */
856
857enum faulttype {
858 DMA_REMAP,
859 INTR_REMAP,
860 UNKNOWN,
861};
862
863static const char *dma_remap_fault_reasons[] =
864{
865 "Software",
866 "Present bit in root entry is clear",
867 "Present bit in context entry is clear",
868 "Invalid context entry",
869 "Access beyond MGAW",
870 "PTE Write access is not set",
871 "PTE Read access is not set",
872 "Next page table ptr is invalid",
873 "Root table address invalid",
874 "Context table ptr is invalid",
875 "non-zero reserved fields in RTP",
876 "non-zero reserved fields in CTP",
877 "non-zero reserved fields in PTE",
878};
879
880static const char *intr_remap_fault_reasons[] =
881{
882 "Detected reserved fields in the decoded interrupt-remapped request",
883 "Interrupt index exceeded the interrupt-remapping table size",
884 "Present field in the IRTE entry is clear",
885 "Error accessing interrupt-remapping table pointed by IRTA_REG",
886 "Detected reserved fields in the IRTE entry",
887 "Blocked a compatibility format interrupt request",
888 "Blocked an interrupt request due to source-id verification failure",
889};
890
891#define MAX_FAULT_REASON_IDX (ARRAY_SIZE(fault_reason_strings) - 1)
892
893const char *dmar_get_fault_reason(u8 fault_reason, int *fault_type)
894{
895 if (fault_reason >= 0x20 && (fault_reason <= 0x20 +
896 ARRAY_SIZE(intr_remap_fault_reasons))) {
897 *fault_type = INTR_REMAP;
898 return intr_remap_fault_reasons[fault_reason - 0x20];
899 } else if (fault_reason < ARRAY_SIZE(dma_remap_fault_reasons)) {
900 *fault_type = DMA_REMAP;
901 return dma_remap_fault_reasons[fault_reason];
902 } else {
903 *fault_type = UNKNOWN;
904 return "Unknown";
905 }
906}
907
908void dmar_msi_unmask(unsigned int irq)
909{
910 struct intel_iommu *iommu = get_irq_data(irq);
911 unsigned long flag;
912
913 /* unmask it */
914 spin_lock_irqsave(&iommu->register_lock, flag);
915 writel(0, iommu->reg + DMAR_FECTL_REG);
916 /* Read a reg to force flush the post write */
917 readl(iommu->reg + DMAR_FECTL_REG);
918 spin_unlock_irqrestore(&iommu->register_lock, flag);
919}
920
921void dmar_msi_mask(unsigned int irq)
922{
923 unsigned long flag;
924 struct intel_iommu *iommu = get_irq_data(irq);
925
926 /* mask it */
927 spin_lock_irqsave(&iommu->register_lock, flag);
928 writel(DMA_FECTL_IM, iommu->reg + DMAR_FECTL_REG);
929 /* Read a reg to force flush the post write */
930 readl(iommu->reg + DMAR_FECTL_REG);
931 spin_unlock_irqrestore(&iommu->register_lock, flag);
932}
933
934void dmar_msi_write(int irq, struct msi_msg *msg)
935{
936 struct intel_iommu *iommu = get_irq_data(irq);
937 unsigned long flag;
938
939 spin_lock_irqsave(&iommu->register_lock, flag);
940 writel(msg->data, iommu->reg + DMAR_FEDATA_REG);
941 writel(msg->address_lo, iommu->reg + DMAR_FEADDR_REG);
942 writel(msg->address_hi, iommu->reg + DMAR_FEUADDR_REG);
943 spin_unlock_irqrestore(&iommu->register_lock, flag);
944}
945
946void dmar_msi_read(int irq, struct msi_msg *msg)
947{
948 struct intel_iommu *iommu = get_irq_data(irq);
949 unsigned long flag;
950
951 spin_lock_irqsave(&iommu->register_lock, flag);
952 msg->data = readl(iommu->reg + DMAR_FEDATA_REG);
953 msg->address_lo = readl(iommu->reg + DMAR_FEADDR_REG);
954 msg->address_hi = readl(iommu->reg + DMAR_FEUADDR_REG);
955 spin_unlock_irqrestore(&iommu->register_lock, flag);
956}
957
958static int dmar_fault_do_one(struct intel_iommu *iommu, int type,
959 u8 fault_reason, u16 source_id, unsigned long long addr)
960{
961 const char *reason;
962 int fault_type;
963
964 reason = dmar_get_fault_reason(fault_reason, &fault_type);
965
966 if (fault_type == INTR_REMAP)
967 printk(KERN_ERR "INTR-REMAP: Request device [[%02x:%02x.%d] "
968 "fault index %llx\n"
969 "INTR-REMAP:[fault reason %02d] %s\n",
970 (source_id >> 8), PCI_SLOT(source_id & 0xFF),
971 PCI_FUNC(source_id & 0xFF), addr >> 48,
972 fault_reason, reason);
973 else
974 printk(KERN_ERR
975 "DMAR:[%s] Request device [%02x:%02x.%d] "
976 "fault addr %llx \n"
977 "DMAR:[fault reason %02d] %s\n",
978 (type ? "DMA Read" : "DMA Write"),
979 (source_id >> 8), PCI_SLOT(source_id & 0xFF),
980 PCI_FUNC(source_id & 0xFF), addr, fault_reason, reason);
981 return 0;
982}
983
984#define PRIMARY_FAULT_REG_LEN (16)
985irqreturn_t dmar_fault(int irq, void *dev_id)
986{
987 struct intel_iommu *iommu = dev_id;
988 int reg, fault_index;
989 u32 fault_status;
990 unsigned long flag;
991
992 spin_lock_irqsave(&iommu->register_lock, flag);
993 fault_status = readl(iommu->reg + DMAR_FSTS_REG);
994 if (fault_status)
995 printk(KERN_ERR "DRHD: handling fault status reg %x\n",
996 fault_status);
997
998 /* TBD: ignore advanced fault log currently */
999 if (!(fault_status & DMA_FSTS_PPF))
1000 goto clear_rest;
1001
1002 fault_index = dma_fsts_fault_record_index(fault_status);
1003 reg = cap_fault_reg_offset(iommu->cap);
1004 while (1) {
1005 u8 fault_reason;
1006 u16 source_id;
1007 u64 guest_addr;
1008 int type;
1009 u32 data;
1010
1011 /* highest 32 bits */
1012 data = readl(iommu->reg + reg +
1013 fault_index * PRIMARY_FAULT_REG_LEN + 12);
1014 if (!(data & DMA_FRCD_F))
1015 break;
1016
1017 fault_reason = dma_frcd_fault_reason(data);
1018 type = dma_frcd_type(data);
1019
1020 data = readl(iommu->reg + reg +
1021 fault_index * PRIMARY_FAULT_REG_LEN + 8);
1022 source_id = dma_frcd_source_id(data);
1023
1024 guest_addr = dmar_readq(iommu->reg + reg +
1025 fault_index * PRIMARY_FAULT_REG_LEN);
1026 guest_addr = dma_frcd_page_addr(guest_addr);
1027 /* clear the fault */
1028 writel(DMA_FRCD_F, iommu->reg + reg +
1029 fault_index * PRIMARY_FAULT_REG_LEN + 12);
1030
1031 spin_unlock_irqrestore(&iommu->register_lock, flag);
1032
1033 dmar_fault_do_one(iommu, type, fault_reason,
1034 source_id, guest_addr);
1035
1036 fault_index++;
1037 if (fault_index > cap_num_fault_regs(iommu->cap))
1038 fault_index = 0;
1039 spin_lock_irqsave(&iommu->register_lock, flag);
1040 }
1041clear_rest:
1042 /* clear all the other faults */
1043 fault_status = readl(iommu->reg + DMAR_FSTS_REG);
1044 writel(fault_status, iommu->reg + DMAR_FSTS_REG);
1045
1046 spin_unlock_irqrestore(&iommu->register_lock, flag);
1047 return IRQ_HANDLED;
1048}
1049
1050int dmar_set_interrupt(struct intel_iommu *iommu)
1051{
1052 int irq, ret;
1053
1054 /*
1055 * Check if the fault interrupt is already initialized.
1056 */
1057 if (iommu->irq)
1058 return 0;
1059
1060 irq = create_irq();
1061 if (!irq) {
1062 printk(KERN_ERR "IOMMU: no free vectors\n");
1063 return -EINVAL;
1064 }
1065
1066 set_irq_data(irq, iommu);
1067 iommu->irq = irq;
1068
1069 ret = arch_setup_dmar_msi(irq);
1070 if (ret) {
1071 set_irq_data(irq, NULL);
1072 iommu->irq = 0;
1073 destroy_irq(irq);
1074 return 0;
1075 }
1076
1077 ret = request_irq(irq, dmar_fault, 0, iommu->name, iommu);
1078 if (ret)
1079 printk(KERN_ERR "IOMMU: can't request irq\n");
1080 return ret;
1081}
1082
1083int __init enable_drhd_fault_handling(void)
1084{
1085 struct dmar_drhd_unit *drhd;
1086
1087 /*
1088 * Enable fault control interrupt.
1089 */
1090 for_each_drhd_unit(drhd) {
1091 int ret;
1092 struct intel_iommu *iommu = drhd->iommu;
1093 ret = dmar_set_interrupt(iommu);
1094
1095 if (ret) {
1096 printk(KERN_ERR "DRHD %Lx: failed to enable fault, "
1097 " interrupt, ret %d\n",
1098 (unsigned long long)drhd->reg_base_addr, ret);
1099 return -1;
1100 }
1101 }
1102
1103 return 0;
1104}
diff --git a/drivers/pci/hotplug/Kconfig b/drivers/pci/hotplug/Kconfig
index eacfb13998bb..9aa4fe100a0d 100644
--- a/drivers/pci/hotplug/Kconfig
+++ b/drivers/pci/hotplug/Kconfig
@@ -143,7 +143,7 @@ config HOTPLUG_PCI_SHPC
143 143
144config HOTPLUG_PCI_RPA 144config HOTPLUG_PCI_RPA
145 tristate "RPA PCI Hotplug driver" 145 tristate "RPA PCI Hotplug driver"
146 depends on PPC_PSERIES && PPC64 && !HOTPLUG_PCI_FAKE 146 depends on PPC_PSERIES && EEH && !HOTPLUG_PCI_FAKE
147 help 147 help
148 Say Y here if you have a RPA system that supports PCI Hotplug. 148 Say Y here if you have a RPA system that supports PCI Hotplug.
149 149
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index f3f686581a90..ef167b8b047d 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -1004,194 +1004,6 @@ static int iommu_disable_translation(struct intel_iommu *iommu)
1004 return 0; 1004 return 0;
1005} 1005}
1006 1006
1007/* iommu interrupt handling. Most stuff are MSI-like. */
1008
1009static const char *fault_reason_strings[] =
1010{
1011 "Software",
1012 "Present bit in root entry is clear",
1013 "Present bit in context entry is clear",
1014 "Invalid context entry",
1015 "Access beyond MGAW",
1016 "PTE Write access is not set",
1017 "PTE Read access is not set",
1018 "Next page table ptr is invalid",
1019 "Root table address invalid",
1020 "Context table ptr is invalid",
1021 "non-zero reserved fields in RTP",
1022 "non-zero reserved fields in CTP",
1023 "non-zero reserved fields in PTE",
1024};
1025#define MAX_FAULT_REASON_IDX (ARRAY_SIZE(fault_reason_strings) - 1)
1026
1027const char *dmar_get_fault_reason(u8 fault_reason)
1028{
1029 if (fault_reason > MAX_FAULT_REASON_IDX)
1030 return "Unknown";
1031 else
1032 return fault_reason_strings[fault_reason];
1033}
1034
1035void dmar_msi_unmask(unsigned int irq)
1036{
1037 struct intel_iommu *iommu = get_irq_data(irq);
1038 unsigned long flag;
1039
1040 /* unmask it */
1041 spin_lock_irqsave(&iommu->register_lock, flag);
1042 writel(0, iommu->reg + DMAR_FECTL_REG);
1043 /* Read a reg to force flush the post write */
1044 readl(iommu->reg + DMAR_FECTL_REG);
1045 spin_unlock_irqrestore(&iommu->register_lock, flag);
1046}
1047
1048void dmar_msi_mask(unsigned int irq)
1049{
1050 unsigned long flag;
1051 struct intel_iommu *iommu = get_irq_data(irq);
1052
1053 /* mask it */
1054 spin_lock_irqsave(&iommu->register_lock, flag);
1055 writel(DMA_FECTL_IM, iommu->reg + DMAR_FECTL_REG);
1056 /* Read a reg to force flush the post write */
1057 readl(iommu->reg + DMAR_FECTL_REG);
1058 spin_unlock_irqrestore(&iommu->register_lock, flag);
1059}
1060
1061void dmar_msi_write(int irq, struct msi_msg *msg)
1062{
1063 struct intel_iommu *iommu = get_irq_data(irq);
1064 unsigned long flag;
1065
1066 spin_lock_irqsave(&iommu->register_lock, flag);
1067 writel(msg->data, iommu->reg + DMAR_FEDATA_REG);
1068 writel(msg->address_lo, iommu->reg + DMAR_FEADDR_REG);
1069 writel(msg->address_hi, iommu->reg + DMAR_FEUADDR_REG);
1070 spin_unlock_irqrestore(&iommu->register_lock, flag);
1071}
1072
1073void dmar_msi_read(int irq, struct msi_msg *msg)
1074{
1075 struct intel_iommu *iommu = get_irq_data(irq);
1076 unsigned long flag;
1077
1078 spin_lock_irqsave(&iommu->register_lock, flag);
1079 msg->data = readl(iommu->reg + DMAR_FEDATA_REG);
1080 msg->address_lo = readl(iommu->reg + DMAR_FEADDR_REG);
1081 msg->address_hi = readl(iommu->reg + DMAR_FEUADDR_REG);
1082 spin_unlock_irqrestore(&iommu->register_lock, flag);
1083}
1084
1085static int iommu_page_fault_do_one(struct intel_iommu *iommu, int type,
1086 u8 fault_reason, u16 source_id, unsigned long long addr)
1087{
1088 const char *reason;
1089
1090 reason = dmar_get_fault_reason(fault_reason);
1091
1092 printk(KERN_ERR
1093 "DMAR:[%s] Request device [%02x:%02x.%d] "
1094 "fault addr %llx \n"
1095 "DMAR:[fault reason %02d] %s\n",
1096 (type ? "DMA Read" : "DMA Write"),
1097 (source_id >> 8), PCI_SLOT(source_id & 0xFF),
1098 PCI_FUNC(source_id & 0xFF), addr, fault_reason, reason);
1099 return 0;
1100}
1101
1102#define PRIMARY_FAULT_REG_LEN (16)
1103static irqreturn_t iommu_page_fault(int irq, void *dev_id)
1104{
1105 struct intel_iommu *iommu = dev_id;
1106 int reg, fault_index;
1107 u32 fault_status;
1108 unsigned long flag;
1109
1110 spin_lock_irqsave(&iommu->register_lock, flag);
1111 fault_status = readl(iommu->reg + DMAR_FSTS_REG);
1112
1113 /* TBD: ignore advanced fault log currently */
1114 if (!(fault_status & DMA_FSTS_PPF))
1115 goto clear_overflow;
1116
1117 fault_index = dma_fsts_fault_record_index(fault_status);
1118 reg = cap_fault_reg_offset(iommu->cap);
1119 while (1) {
1120 u8 fault_reason;
1121 u16 source_id;
1122 u64 guest_addr;
1123 int type;
1124 u32 data;
1125
1126 /* highest 32 bits */
1127 data = readl(iommu->reg + reg +
1128 fault_index * PRIMARY_FAULT_REG_LEN + 12);
1129 if (!(data & DMA_FRCD_F))
1130 break;
1131
1132 fault_reason = dma_frcd_fault_reason(data);
1133 type = dma_frcd_type(data);
1134
1135 data = readl(iommu->reg + reg +
1136 fault_index * PRIMARY_FAULT_REG_LEN + 8);
1137 source_id = dma_frcd_source_id(data);
1138
1139 guest_addr = dmar_readq(iommu->reg + reg +
1140 fault_index * PRIMARY_FAULT_REG_LEN);
1141 guest_addr = dma_frcd_page_addr(guest_addr);
1142 /* clear the fault */
1143 writel(DMA_FRCD_F, iommu->reg + reg +
1144 fault_index * PRIMARY_FAULT_REG_LEN + 12);
1145
1146 spin_unlock_irqrestore(&iommu->register_lock, flag);
1147
1148 iommu_page_fault_do_one(iommu, type, fault_reason,
1149 source_id, guest_addr);
1150
1151 fault_index++;
1152 if (fault_index > cap_num_fault_regs(iommu->cap))
1153 fault_index = 0;
1154 spin_lock_irqsave(&iommu->register_lock, flag);
1155 }
1156clear_overflow:
1157 /* clear primary fault overflow */
1158 fault_status = readl(iommu->reg + DMAR_FSTS_REG);
1159 if (fault_status & DMA_FSTS_PFO)
1160 writel(DMA_FSTS_PFO, iommu->reg + DMAR_FSTS_REG);
1161
1162 spin_unlock_irqrestore(&iommu->register_lock, flag);
1163 return IRQ_HANDLED;
1164}
1165
1166int dmar_set_interrupt(struct intel_iommu *iommu)
1167{
1168 int irq, ret;
1169
1170 irq = create_irq();
1171 if (!irq) {
1172 printk(KERN_ERR "IOMMU: no free vectors\n");
1173 return -EINVAL;
1174 }
1175
1176 set_irq_data(irq, iommu);
1177 iommu->irq = irq;
1178
1179 ret = arch_setup_dmar_msi(irq);
1180 if (ret) {
1181 set_irq_data(irq, NULL);
1182 iommu->irq = 0;
1183 destroy_irq(irq);
1184 return 0;
1185 }
1186
1187 /* Force fault register is cleared */
1188 iommu_page_fault(irq, iommu);
1189
1190 ret = request_irq(irq, iommu_page_fault, 0, iommu->name, iommu);
1191 if (ret)
1192 printk(KERN_ERR "IOMMU: can't request irq\n");
1193 return ret;
1194}
1195 1007
1196static int iommu_init_domains(struct intel_iommu *iommu) 1008static int iommu_init_domains(struct intel_iommu *iommu)
1197{ 1009{
@@ -1987,7 +1799,7 @@ static int __init init_dmars(void)
1987 struct dmar_rmrr_unit *rmrr; 1799 struct dmar_rmrr_unit *rmrr;
1988 struct pci_dev *pdev; 1800 struct pci_dev *pdev;
1989 struct intel_iommu *iommu; 1801 struct intel_iommu *iommu;
1990 int i, ret, unit = 0; 1802 int i, ret;
1991 1803
1992 /* 1804 /*
1993 * for each drhd 1805 * for each drhd
@@ -2043,11 +1855,40 @@ static int __init init_dmars(void)
2043 } 1855 }
2044 } 1856 }
2045 1857
1858 /*
1859 * Start from the sane iommu hardware state.
1860 */
1861 for_each_drhd_unit(drhd) {
1862 if (drhd->ignored)
1863 continue;
1864
1865 iommu = drhd->iommu;
1866
1867 /*
1868 * If the queued invalidation is already initialized by us
1869 * (for example, while enabling interrupt-remapping) then
1870 * we got the things already rolling from a sane state.
1871 */
1872 if (iommu->qi)
1873 continue;
1874
1875 /*
1876 * Clear any previous faults.
1877 */
1878 dmar_fault(-1, iommu);
1879 /*
1880 * Disable queued invalidation if supported and already enabled
1881 * before OS handover.
1882 */
1883 dmar_disable_qi(iommu);
1884 }
1885
2046 for_each_drhd_unit(drhd) { 1886 for_each_drhd_unit(drhd) {
2047 if (drhd->ignored) 1887 if (drhd->ignored)
2048 continue; 1888 continue;
2049 1889
2050 iommu = drhd->iommu; 1890 iommu = drhd->iommu;
1891
2051 if (dmar_enable_qi(iommu)) { 1892 if (dmar_enable_qi(iommu)) {
2052 /* 1893 /*
2053 * Queued Invalidate not enabled, use Register Based 1894 * Queued Invalidate not enabled, use Register Based
@@ -2109,7 +1950,6 @@ static int __init init_dmars(void)
2109 if (drhd->ignored) 1950 if (drhd->ignored)
2110 continue; 1951 continue;
2111 iommu = drhd->iommu; 1952 iommu = drhd->iommu;
2112 sprintf (iommu->name, "dmar%d", unit++);
2113 1953
2114 iommu_flush_write_buffer(iommu); 1954 iommu_flush_write_buffer(iommu);
2115 1955
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index 8e44db040db7..bc5b6976f918 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -117,21 +117,22 @@ int get_irte(int irq, struct irte *entry)
117{ 117{
118 int index; 118 int index;
119 struct irq_2_iommu *irq_iommu; 119 struct irq_2_iommu *irq_iommu;
120 unsigned long flags;
120 121
121 if (!entry) 122 if (!entry)
122 return -1; 123 return -1;
123 124
124 spin_lock(&irq_2_ir_lock); 125 spin_lock_irqsave(&irq_2_ir_lock, flags);
125 irq_iommu = valid_irq_2_iommu(irq); 126 irq_iommu = valid_irq_2_iommu(irq);
126 if (!irq_iommu) { 127 if (!irq_iommu) {
127 spin_unlock(&irq_2_ir_lock); 128 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
128 return -1; 129 return -1;
129 } 130 }
130 131
131 index = irq_iommu->irte_index + irq_iommu->sub_handle; 132 index = irq_iommu->irte_index + irq_iommu->sub_handle;
132 *entry = *(irq_iommu->iommu->ir_table->base + index); 133 *entry = *(irq_iommu->iommu->ir_table->base + index);
133 134
134 spin_unlock(&irq_2_ir_lock); 135 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
135 return 0; 136 return 0;
136} 137}
137 138
@@ -141,6 +142,7 @@ int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
141 struct irq_2_iommu *irq_iommu; 142 struct irq_2_iommu *irq_iommu;
142 u16 index, start_index; 143 u16 index, start_index;
143 unsigned int mask = 0; 144 unsigned int mask = 0;
145 unsigned long flags;
144 int i; 146 int i;
145 147
146 if (!count) 148 if (!count)
@@ -170,7 +172,7 @@ int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
170 return -1; 172 return -1;
171 } 173 }
172 174
173 spin_lock(&irq_2_ir_lock); 175 spin_lock_irqsave(&irq_2_ir_lock, flags);
174 do { 176 do {
175 for (i = index; i < index + count; i++) 177 for (i = index; i < index + count; i++)
176 if (table->base[i].present) 178 if (table->base[i].present)
@@ -182,7 +184,7 @@ int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
182 index = (index + count) % INTR_REMAP_TABLE_ENTRIES; 184 index = (index + count) % INTR_REMAP_TABLE_ENTRIES;
183 185
184 if (index == start_index) { 186 if (index == start_index) {
185 spin_unlock(&irq_2_ir_lock); 187 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
186 printk(KERN_ERR "can't allocate an IRTE\n"); 188 printk(KERN_ERR "can't allocate an IRTE\n");
187 return -1; 189 return -1;
188 } 190 }
@@ -193,7 +195,7 @@ int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
193 195
194 irq_iommu = irq_2_iommu_alloc(irq); 196 irq_iommu = irq_2_iommu_alloc(irq);
195 if (!irq_iommu) { 197 if (!irq_iommu) {
196 spin_unlock(&irq_2_ir_lock); 198 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
197 printk(KERN_ERR "can't allocate irq_2_iommu\n"); 199 printk(KERN_ERR "can't allocate irq_2_iommu\n");
198 return -1; 200 return -1;
199 } 201 }
@@ -203,7 +205,7 @@ int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
203 irq_iommu->sub_handle = 0; 205 irq_iommu->sub_handle = 0;
204 irq_iommu->irte_mask = mask; 206 irq_iommu->irte_mask = mask;
205 207
206 spin_unlock(&irq_2_ir_lock); 208 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
207 209
208 return index; 210 return index;
209} 211}
@@ -223,30 +225,32 @@ int map_irq_to_irte_handle(int irq, u16 *sub_handle)
223{ 225{
224 int index; 226 int index;
225 struct irq_2_iommu *irq_iommu; 227 struct irq_2_iommu *irq_iommu;
228 unsigned long flags;
226 229
227 spin_lock(&irq_2_ir_lock); 230 spin_lock_irqsave(&irq_2_ir_lock, flags);
228 irq_iommu = valid_irq_2_iommu(irq); 231 irq_iommu = valid_irq_2_iommu(irq);
229 if (!irq_iommu) { 232 if (!irq_iommu) {
230 spin_unlock(&irq_2_ir_lock); 233 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
231 return -1; 234 return -1;
232 } 235 }
233 236
234 *sub_handle = irq_iommu->sub_handle; 237 *sub_handle = irq_iommu->sub_handle;
235 index = irq_iommu->irte_index; 238 index = irq_iommu->irte_index;
236 spin_unlock(&irq_2_ir_lock); 239 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
237 return index; 240 return index;
238} 241}
239 242
240int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle) 243int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)
241{ 244{
242 struct irq_2_iommu *irq_iommu; 245 struct irq_2_iommu *irq_iommu;
246 unsigned long flags;
243 247
244 spin_lock(&irq_2_ir_lock); 248 spin_lock_irqsave(&irq_2_ir_lock, flags);
245 249
246 irq_iommu = irq_2_iommu_alloc(irq); 250 irq_iommu = irq_2_iommu_alloc(irq);
247 251
248 if (!irq_iommu) { 252 if (!irq_iommu) {
249 spin_unlock(&irq_2_ir_lock); 253 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
250 printk(KERN_ERR "can't allocate irq_2_iommu\n"); 254 printk(KERN_ERR "can't allocate irq_2_iommu\n");
251 return -1; 255 return -1;
252 } 256 }
@@ -256,7 +260,7 @@ int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)
256 irq_iommu->sub_handle = subhandle; 260 irq_iommu->sub_handle = subhandle;
257 irq_iommu->irte_mask = 0; 261 irq_iommu->irte_mask = 0;
258 262
259 spin_unlock(&irq_2_ir_lock); 263 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
260 264
261 return 0; 265 return 0;
262} 266}
@@ -264,11 +268,12 @@ int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)
264int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index) 268int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index)
265{ 269{
266 struct irq_2_iommu *irq_iommu; 270 struct irq_2_iommu *irq_iommu;
271 unsigned long flags;
267 272
268 spin_lock(&irq_2_ir_lock); 273 spin_lock_irqsave(&irq_2_ir_lock, flags);
269 irq_iommu = valid_irq_2_iommu(irq); 274 irq_iommu = valid_irq_2_iommu(irq);
270 if (!irq_iommu) { 275 if (!irq_iommu) {
271 spin_unlock(&irq_2_ir_lock); 276 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
272 return -1; 277 return -1;
273 } 278 }
274 279
@@ -277,7 +282,7 @@ int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index)
277 irq_iommu->sub_handle = 0; 282 irq_iommu->sub_handle = 0;
278 irq_2_iommu(irq)->irte_mask = 0; 283 irq_2_iommu(irq)->irte_mask = 0;
279 284
280 spin_unlock(&irq_2_ir_lock); 285 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
281 286
282 return 0; 287 return 0;
283} 288}
@@ -289,11 +294,12 @@ int modify_irte(int irq, struct irte *irte_modified)
289 struct irte *irte; 294 struct irte *irte;
290 struct intel_iommu *iommu; 295 struct intel_iommu *iommu;
291 struct irq_2_iommu *irq_iommu; 296 struct irq_2_iommu *irq_iommu;
297 unsigned long flags;
292 298
293 spin_lock(&irq_2_ir_lock); 299 spin_lock_irqsave(&irq_2_ir_lock, flags);
294 irq_iommu = valid_irq_2_iommu(irq); 300 irq_iommu = valid_irq_2_iommu(irq);
295 if (!irq_iommu) { 301 if (!irq_iommu) {
296 spin_unlock(&irq_2_ir_lock); 302 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
297 return -1; 303 return -1;
298 } 304 }
299 305
@@ -302,11 +308,11 @@ int modify_irte(int irq, struct irte *irte_modified)
302 index = irq_iommu->irte_index + irq_iommu->sub_handle; 308 index = irq_iommu->irte_index + irq_iommu->sub_handle;
303 irte = &iommu->ir_table->base[index]; 309 irte = &iommu->ir_table->base[index];
304 310
305 set_64bit((unsigned long *)irte, irte_modified->low | (1 << 1)); 311 set_64bit((unsigned long *)irte, irte_modified->low);
306 __iommu_flush_cache(iommu, irte, sizeof(*irte)); 312 __iommu_flush_cache(iommu, irte, sizeof(*irte));
307 313
308 rc = qi_flush_iec(iommu, index, 0); 314 rc = qi_flush_iec(iommu, index, 0);
309 spin_unlock(&irq_2_ir_lock); 315 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
310 316
311 return rc; 317 return rc;
312} 318}
@@ -317,11 +323,12 @@ int flush_irte(int irq)
317 int index; 323 int index;
318 struct intel_iommu *iommu; 324 struct intel_iommu *iommu;
319 struct irq_2_iommu *irq_iommu; 325 struct irq_2_iommu *irq_iommu;
326 unsigned long flags;
320 327
321 spin_lock(&irq_2_ir_lock); 328 spin_lock_irqsave(&irq_2_ir_lock, flags);
322 irq_iommu = valid_irq_2_iommu(irq); 329 irq_iommu = valid_irq_2_iommu(irq);
323 if (!irq_iommu) { 330 if (!irq_iommu) {
324 spin_unlock(&irq_2_ir_lock); 331 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
325 return -1; 332 return -1;
326 } 333 }
327 334
@@ -330,7 +337,7 @@ int flush_irte(int irq)
330 index = irq_iommu->irte_index + irq_iommu->sub_handle; 337 index = irq_iommu->irte_index + irq_iommu->sub_handle;
331 338
332 rc = qi_flush_iec(iommu, index, irq_iommu->irte_mask); 339 rc = qi_flush_iec(iommu, index, irq_iommu->irte_mask);
333 spin_unlock(&irq_2_ir_lock); 340 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
334 341
335 return rc; 342 return rc;
336} 343}
@@ -363,11 +370,12 @@ int free_irte(int irq)
363 struct irte *irte; 370 struct irte *irte;
364 struct intel_iommu *iommu; 371 struct intel_iommu *iommu;
365 struct irq_2_iommu *irq_iommu; 372 struct irq_2_iommu *irq_iommu;
373 unsigned long flags;
366 374
367 spin_lock(&irq_2_ir_lock); 375 spin_lock_irqsave(&irq_2_ir_lock, flags);
368 irq_iommu = valid_irq_2_iommu(irq); 376 irq_iommu = valid_irq_2_iommu(irq);
369 if (!irq_iommu) { 377 if (!irq_iommu) {
370 spin_unlock(&irq_2_ir_lock); 378 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
371 return -1; 379 return -1;
372 } 380 }
373 381
@@ -378,7 +386,7 @@ int free_irte(int irq)
378 386
379 if (!irq_iommu->sub_handle) { 387 if (!irq_iommu->sub_handle) {
380 for (i = 0; i < (1 << irq_iommu->irte_mask); i++) 388 for (i = 0; i < (1 << irq_iommu->irte_mask); i++)
381 set_64bit((unsigned long *)irte, 0); 389 set_64bit((unsigned long *)(irte + i), 0);
382 rc = qi_flush_iec(iommu, index, irq_iommu->irte_mask); 390 rc = qi_flush_iec(iommu, index, irq_iommu->irte_mask);
383 } 391 }
384 392
@@ -387,7 +395,7 @@ int free_irte(int irq)
387 irq_iommu->sub_handle = 0; 395 irq_iommu->sub_handle = 0;
388 irq_iommu->irte_mask = 0; 396 irq_iommu->irte_mask = 0;
389 397
390 spin_unlock(&irq_2_ir_lock); 398 spin_unlock_irqrestore(&irq_2_ir_lock, flags);
391 399
392 return rc; 400 return rc;
393} 401}
@@ -439,12 +447,12 @@ static int setup_intr_remapping(struct intel_iommu *iommu, int mode)
439 struct page *pages; 447 struct page *pages;
440 448
441 ir_table = iommu->ir_table = kzalloc(sizeof(struct ir_table), 449 ir_table = iommu->ir_table = kzalloc(sizeof(struct ir_table),
442 GFP_KERNEL); 450 GFP_ATOMIC);
443 451
444 if (!iommu->ir_table) 452 if (!iommu->ir_table)
445 return -ENOMEM; 453 return -ENOMEM;
446 454
447 pages = alloc_pages(GFP_KERNEL | __GFP_ZERO, INTR_REMAP_PAGE_ORDER); 455 pages = alloc_pages(GFP_ATOMIC | __GFP_ZERO, INTR_REMAP_PAGE_ORDER);
448 456
449 if (!pages) { 457 if (!pages) {
450 printk(KERN_ERR "failed to allocate pages of order %d\n", 458 printk(KERN_ERR "failed to allocate pages of order %d\n",
@@ -459,11 +467,55 @@ static int setup_intr_remapping(struct intel_iommu *iommu, int mode)
459 return 0; 467 return 0;
460} 468}
461 469
470/*
471 * Disable Interrupt Remapping.
472 */
473static void disable_intr_remapping(struct intel_iommu *iommu)
474{
475 unsigned long flags;
476 u32 sts;
477
478 if (!ecap_ir_support(iommu->ecap))
479 return;
480
481 spin_lock_irqsave(&iommu->register_lock, flags);
482
483 sts = dmar_readq(iommu->reg + DMAR_GSTS_REG);
484 if (!(sts & DMA_GSTS_IRES))
485 goto end;
486
487 iommu->gcmd &= ~DMA_GCMD_IRE;
488 writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
489
490 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
491 readl, !(sts & DMA_GSTS_IRES), sts);
492
493end:
494 spin_unlock_irqrestore(&iommu->register_lock, flags);
495}
496
462int __init enable_intr_remapping(int eim) 497int __init enable_intr_remapping(int eim)
463{ 498{
464 struct dmar_drhd_unit *drhd; 499 struct dmar_drhd_unit *drhd;
465 int setup = 0; 500 int setup = 0;
466 501
502 for_each_drhd_unit(drhd) {
503 struct intel_iommu *iommu = drhd->iommu;
504
505 /*
506 * Clear previous faults.
507 */
508 dmar_fault(-1, iommu);
509
510 /*
511 * Disable intr remapping and queued invalidation, if already
512 * enabled prior to OS handover.
513 */
514 disable_intr_remapping(iommu);
515
516 dmar_disable_qi(iommu);
517 }
518
467 /* 519 /*
468 * check for the Interrupt-remapping support 520 * check for the Interrupt-remapping support
469 */ 521 */
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index d0c973685868..382575007382 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -133,6 +133,9 @@ static void set_downstream_devices_error_reporting(struct pci_dev *dev,
133 bool enable) 133 bool enable)
134{ 134{
135 set_device_error_reporting(dev, &enable); 135 set_device_error_reporting(dev, &enable);
136
137 if (!dev->subordinate)
138 return;
136 pci_walk_bus(dev->subordinate, set_device_error_reporting, &enable); 139 pci_walk_bus(dev->subordinate, set_device_error_reporting, &enable);
137} 140}
138 141
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index 248b4db91552..5ea566e20b37 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -103,6 +103,7 @@ static int __devinit pcie_portdrv_probe (struct pci_dev *dev,
103static void pcie_portdrv_remove (struct pci_dev *dev) 103static void pcie_portdrv_remove (struct pci_dev *dev)
104{ 104{
105 pcie_port_device_remove(dev); 105 pcie_port_device_remove(dev);
106 pci_disable_device(dev);
106 kfree(pci_get_drvdata(dev)); 107 kfree(pci_get_drvdata(dev));
107} 108}
108 109
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index f20d55368edb..92b9efe9bcaf 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -23,6 +23,7 @@
23#include <linux/acpi.h> 23#include <linux/acpi.h>
24#include <linux/kallsyms.h> 24#include <linux/kallsyms.h>
25#include <linux/dmi.h> 25#include <linux/dmi.h>
26#include <linux/pci-aspm.h>
26#include "pci.h" 27#include "pci.h"
27 28
28int isa_dma_bridge_buggy; 29int isa_dma_bridge_buggy;
@@ -1749,6 +1750,30 @@ static void __devinit quirk_e100_interrupt(struct pci_dev *dev)
1749} 1750}
1750DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, quirk_e100_interrupt); 1751DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, quirk_e100_interrupt);
1751 1752
1753/*
1754 * The 82575 and 82598 may experience data corruption issues when transitioning
1755 * out of L0S. To prevent this we need to disable L0S on the pci-e link
1756 */
1757static void __devinit quirk_disable_aspm_l0s(struct pci_dev *dev)
1758{
1759 dev_info(&dev->dev, "Disabling L0s\n");
1760 pci_disable_link_state(dev, PCIE_LINK_STATE_L0S);
1761}
1762DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10a7, quirk_disable_aspm_l0s);
1763DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10a9, quirk_disable_aspm_l0s);
1764DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10b6, quirk_disable_aspm_l0s);
1765DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10c6, quirk_disable_aspm_l0s);
1766DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10c7, quirk_disable_aspm_l0s);
1767DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10c8, quirk_disable_aspm_l0s);
1768DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10d6, quirk_disable_aspm_l0s);
1769DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10db, quirk_disable_aspm_l0s);
1770DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10dd, quirk_disable_aspm_l0s);
1771DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10e1, quirk_disable_aspm_l0s);
1772DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10ec, quirk_disable_aspm_l0s);
1773DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10f1, quirk_disable_aspm_l0s);
1774DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10f4, quirk_disable_aspm_l0s);
1775DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1508, quirk_disable_aspm_l0s);
1776
1752static void __devinit fixup_rev1_53c810(struct pci_dev* dev) 1777static void __devinit fixup_rev1_53c810(struct pci_dev* dev)
1753{ 1778{
1754 /* rev 1 ncr53c810 chips don't set the class at all which means 1779 /* rev 1 ncr53c810 chips don't set the class at all which means
@@ -2097,7 +2122,7 @@ static void __devinit ht_disable_msi_mapping(struct pci_dev *dev)
2097 2122
2098 if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, 2123 if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS,
2099 &flags) == 0) { 2124 &flags) == 0) {
2100 dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); 2125 dev_info(&dev->dev, "Disabling HT MSI Mapping\n");
2101 2126
2102 pci_write_config_byte(dev, pos + HT_MSI_FLAGS, 2127 pci_write_config_byte(dev, pos + HT_MSI_FLAGS,
2103 flags & ~HT_MSI_FLAGS_ENABLE); 2128 flags & ~HT_MSI_FLAGS_ENABLE);
@@ -2141,6 +2166,10 @@ static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev)
2141 int pos; 2166 int pos;
2142 int found; 2167 int found;
2143 2168
2169 /* Enabling HT MSI mapping on this device breaks MCP51 */
2170 if (dev->device == 0x270)
2171 return;
2172
2144 /* check if there is HT MSI cap or enabled on this device */ 2173 /* check if there is HT MSI cap or enabled on this device */
2145 found = ht_check_msi_mapping(dev); 2174 found = ht_check_msi_mapping(dev);
2146 2175
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index b3866ad50227..3608081bc3e0 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -15,8 +15,7 @@ menuconfig X86_PLATFORM_DEVICES
15if X86_PLATFORM_DEVICES 15if X86_PLATFORM_DEVICES
16 16
17config ACER_WMI 17config ACER_WMI
18 tristate "Acer WMI Laptop Extras (EXPERIMENTAL)" 18 tristate "Acer WMI Laptop Extras"
19 depends on EXPERIMENTAL
20 depends on ACPI 19 depends on ACPI
21 depends on LEDS_CLASS 20 depends on LEDS_CLASS
22 depends on NEW_LEDS 21 depends on NEW_LEDS
@@ -39,9 +38,9 @@ config ASUS_LAPTOP
39 tristate "Asus Laptop Extras (EXPERIMENTAL)" 38 tristate "Asus Laptop Extras (EXPERIMENTAL)"
40 depends on ACPI 39 depends on ACPI
41 depends on EXPERIMENTAL && !ACPI_ASUS 40 depends on EXPERIMENTAL && !ACPI_ASUS
42 depends on LEDS_CLASS 41 select LEDS_CLASS
43 depends on NEW_LEDS 42 select NEW_LEDS
44 depends on BACKLIGHT_CLASS_DEVICE 43 select BACKLIGHT_CLASS_DEVICE
45 depends on INPUT 44 depends on INPUT
46 ---help--- 45 ---help---
47 This is the new Linux driver for Asus laptops. It may also support some 46 This is the new Linux driver for Asus laptops. It may also support some
@@ -185,11 +184,11 @@ config SONYPI_COMPAT
185config THINKPAD_ACPI 184config THINKPAD_ACPI
186 tristate "ThinkPad ACPI Laptop Extras" 185 tristate "ThinkPad ACPI Laptop Extras"
187 depends on ACPI 186 depends on ACPI
187 depends on INPUT
188 select BACKLIGHT_LCD_SUPPORT 188 select BACKLIGHT_LCD_SUPPORT
189 select BACKLIGHT_CLASS_DEVICE 189 select BACKLIGHT_CLASS_DEVICE
190 select HWMON 190 select HWMON
191 select NVRAM 191 select NVRAM
192 select INPUT
193 select NEW_LEDS 192 select NEW_LEDS
194 select LEDS_CLASS 193 select LEDS_CLASS
195 select NET 194 select NET
@@ -315,9 +314,8 @@ config EEEPC_LAPTOP
315 314
316 315
317config ACPI_WMI 316config ACPI_WMI
318 tristate "WMI (EXPERIMENTAL)" 317 tristate "WMI"
319 depends on ACPI 318 depends on ACPI
320 depends on EXPERIMENTAL
321 help 319 help
322 This driver adds support for the ACPI-WMI (Windows Management 320 This driver adds support for the ACPI-WMI (Windows Management
323 Instrumentation) mapper device (PNP0C14) found on some systems. 321 Instrumentation) mapper device (PNP0C14) found on some systems.
diff --git a/drivers/platform/x86/acer-wmi.c b/drivers/platform/x86/acer-wmi.c
index 94c9f911824e..a6a42e8c060b 100644
--- a/drivers/platform/x86/acer-wmi.c
+++ b/drivers/platform/x86/acer-wmi.c
@@ -1026,7 +1026,7 @@ static void acer_rfkill_exit(void)
1026 kfree(wireless_rfkill->data); 1026 kfree(wireless_rfkill->data);
1027 rfkill_unregister(wireless_rfkill); 1027 rfkill_unregister(wireless_rfkill);
1028 if (has_cap(ACER_CAP_BLUETOOTH)) { 1028 if (has_cap(ACER_CAP_BLUETOOTH)) {
1029 kfree(wireless_rfkill->data); 1029 kfree(bluetooth_rfkill->data);
1030 rfkill_unregister(bluetooth_rfkill); 1030 rfkill_unregister(bluetooth_rfkill);
1031 } 1031 }
1032 return; 1032 return;
@@ -1297,7 +1297,7 @@ static int __init acer_wmi_init(void)
1297 1297
1298 set_quirks(); 1298 set_quirks();
1299 1299
1300 if (!acpi_video_backlight_support() && has_cap(ACER_CAP_BRIGHTNESS)) { 1300 if (acpi_video_backlight_support() && has_cap(ACER_CAP_BRIGHTNESS)) {
1301 interface->capability &= ~ACER_CAP_BRIGHTNESS; 1301 interface->capability &= ~ACER_CAP_BRIGHTNESS;
1302 printk(ACER_INFO "Brightness must be controlled by " 1302 printk(ACER_INFO "Brightness must be controlled by "
1303 "generic video driver\n"); 1303 "generic video driver\n");
diff --git a/drivers/platform/x86/asus-laptop.c b/drivers/platform/x86/asus-laptop.c
index 56af6cf385b0..eeafc6c0160d 100644
--- a/drivers/platform/x86/asus-laptop.c
+++ b/drivers/platform/x86/asus-laptop.c
@@ -815,6 +815,7 @@ static int asus_setkeycode(struct input_dev *dev, int scancode, int keycode)
815static void asus_hotk_notify(acpi_handle handle, u32 event, void *data) 815static void asus_hotk_notify(acpi_handle handle, u32 event, void *data)
816{ 816{
817 static struct key_entry *key; 817 static struct key_entry *key;
818 u16 count;
818 819
819 /* TODO Find a better way to handle events count. */ 820 /* TODO Find a better way to handle events count. */
820 if (!hotk) 821 if (!hotk)
@@ -832,9 +833,11 @@ static void asus_hotk_notify(acpi_handle handle, u32 event, void *data)
832 lcd_blank(FB_BLANK_POWERDOWN); 833 lcd_blank(FB_BLANK_POWERDOWN);
833 } 834 }
834 835
836 count = hotk->event_count[event % 128]++;
837 acpi_bus_generate_proc_event(hotk->device, event, count);
835 acpi_bus_generate_netlink_event(hotk->device->pnp.device_class, 838 acpi_bus_generate_netlink_event(hotk->device->pnp.device_class,
836 dev_name(&hotk->device->dev), event, 839 dev_name(&hotk->device->dev), event,
837 hotk->event_count[event % 128]++); 840 count);
838 841
839 if (hotk->inputdev) { 842 if (hotk->inputdev) {
840 key = asus_get_entry_by_scancode(event); 843 key = asus_get_entry_by_scancode(event);
diff --git a/drivers/platform/x86/eeepc-laptop.c b/drivers/platform/x86/eeepc-laptop.c
index 786ed8661cb0..6f54fd1757cd 100644
--- a/drivers/platform/x86/eeepc-laptop.c
+++ b/drivers/platform/x86/eeepc-laptop.c
@@ -557,13 +557,17 @@ static void eeepc_rfkill_notify(acpi_handle handle, u32 event, void *data)
557static void eeepc_hotk_notify(acpi_handle handle, u32 event, void *data) 557static void eeepc_hotk_notify(acpi_handle handle, u32 event, void *data)
558{ 558{
559 static struct key_entry *key; 559 static struct key_entry *key;
560 u16 count;
561
560 if (!ehotk) 562 if (!ehotk)
561 return; 563 return;
562 if (event >= NOTIFY_BRN_MIN && event <= NOTIFY_BRN_MAX) 564 if (event >= NOTIFY_BRN_MIN && event <= NOTIFY_BRN_MAX)
563 notify_brn(); 565 notify_brn();
566 count = ehotk->event_count[event % 128]++;
567 acpi_bus_generate_proc_event(ehotk->device, event, count);
564 acpi_bus_generate_netlink_event(ehotk->device->pnp.device_class, 568 acpi_bus_generate_netlink_event(ehotk->device->pnp.device_class,
565 dev_name(&ehotk->device->dev), event, 569 dev_name(&ehotk->device->dev), event,
566 ehotk->event_count[event % 128]++); 570 count);
567 if (ehotk->inputdev) { 571 if (ehotk->inputdev) {
568 key = eepc_get_entry_by_scancode(event); 572 key = eepc_get_entry_by_scancode(event);
569 if (key) { 573 if (key) {
diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c
index bcbc05107ba8..d2433204a40c 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -7532,7 +7532,7 @@ MODULE_ALIAS(TPACPI_DRVR_SHORTNAME);
7532 * if it is not there yet. 7532 * if it is not there yet.
7533 */ 7533 */
7534#define IBM_BIOS_MODULE_ALIAS(__type) \ 7534#define IBM_BIOS_MODULE_ALIAS(__type) \
7535 MODULE_ALIAS("dmi:bvnIBM:bvr" __type "ET??WW") 7535 MODULE_ALIAS("dmi:bvnIBM:bvr" __type "ET??WW*")
7536 7536
7537/* Non-ancient thinkpads */ 7537/* Non-ancient thinkpads */
7538MODULE_ALIAS("dmi:bvnIBM:*:svnIBM:*:pvrThinkPad*:rvnIBM:*"); 7538MODULE_ALIAS("dmi:bvnIBM:*:svnIBM:*:pvrThinkPad*:rvnIBM:*");
@@ -7541,9 +7541,9 @@ MODULE_ALIAS("dmi:bvnLENOVO:*:svnLENOVO:*:pvrThinkPad*:rvnLENOVO:*");
7541/* Ancient thinkpad BIOSes have to be identified by 7541/* Ancient thinkpad BIOSes have to be identified by
7542 * BIOS type or model number, and there are far less 7542 * BIOS type or model number, and there are far less
7543 * BIOS types than model numbers... */ 7543 * BIOS types than model numbers... */
7544IBM_BIOS_MODULE_ALIAS("I[B,D,H,I,M,N,O,T,W,V,Y,Z]"); 7544IBM_BIOS_MODULE_ALIAS("I[BDHIMNOTWVYZ]");
7545IBM_BIOS_MODULE_ALIAS("1[0,3,6,8,A-G,I,K,M-P,S,T]"); 7545IBM_BIOS_MODULE_ALIAS("1[0368A-GIKM-PST]");
7546IBM_BIOS_MODULE_ALIAS("K[U,X-Z]"); 7546IBM_BIOS_MODULE_ALIAS("K[UX-Z]");
7547 7547
7548MODULE_AUTHOR("Borislav Deianov, Henrique de Moraes Holschuh"); 7548MODULE_AUTHOR("Borislav Deianov, Henrique de Moraes Holschuh");
7549MODULE_DESCRIPTION(TPACPI_DESC); 7549MODULE_DESCRIPTION(TPACPI_DESC);
diff --git a/drivers/platform/x86/wmi.c b/drivers/platform/x86/wmi.c
index 8a8b377712c9..2f269e117b8f 100644
--- a/drivers/platform/x86/wmi.c
+++ b/drivers/platform/x86/wmi.c
@@ -708,7 +708,7 @@ static int __init acpi_wmi_add(struct acpi_device *device)
708 708
709static int __init acpi_wmi_init(void) 709static int __init acpi_wmi_init(void)
710{ 710{
711 acpi_status result; 711 int result;
712 712
713 INIT_LIST_HEAD(&wmi_blocks.list); 713 INIT_LIST_HEAD(&wmi_blocks.list);
714 714
diff --git a/drivers/power/ds2760_battery.c b/drivers/power/ds2760_battery.c
index 1d768928e0bb..a52d4a11652d 100644
--- a/drivers/power/ds2760_battery.c
+++ b/drivers/power/ds2760_battery.c
@@ -180,10 +180,13 @@ static int ds2760_battery_read_status(struct ds2760_device_info *di)
180 di->empty_uAh = battery_interpolate(scale, di->temp_C / 10); 180 di->empty_uAh = battery_interpolate(scale, di->temp_C / 10);
181 di->empty_uAh *= 1000; /* convert to µAh */ 181 di->empty_uAh *= 1000; /* convert to µAh */
182 182
183 /* From Maxim Application Note 131: remaining capacity = 183 if (di->full_active_uAh == di->empty_uAh)
184 * ((ICA - Empty Value) / (Full Value - Empty Value)) x 100% */ 184 di->rem_capacity = 0;
185 di->rem_capacity = ((di->accum_current_uAh - di->empty_uAh) * 100L) / 185 else
186 (di->full_active_uAh - di->empty_uAh); 186 /* From Maxim Application Note 131: remaining capacity =
187 * ((ICA - Empty Value) / (Full Value - Empty Value)) x 100% */
188 di->rem_capacity = ((di->accum_current_uAh - di->empty_uAh) * 100L) /
189 (di->full_active_uAh - di->empty_uAh);
187 190
188 if (di->rem_capacity < 0) 191 if (di->rem_capacity < 0)
189 di->rem_capacity = 0; 192 di->rem_capacity = 0;
diff --git a/drivers/sbus/char/bbc_i2c.c b/drivers/sbus/char/bbc_i2c.c
index f08e169ba1b5..7e30e5f6e032 100644
--- a/drivers/sbus/char/bbc_i2c.c
+++ b/drivers/sbus/char/bbc_i2c.c
@@ -129,7 +129,7 @@ static int wait_for_pin(struct bbc_i2c_bus *bp, u8 *status)
129 bp->waiting = 1; 129 bp->waiting = 1;
130 add_wait_queue(&bp->wq, &wait); 130 add_wait_queue(&bp->wq, &wait);
131 while (limit-- > 0) { 131 while (limit-- > 0) {
132 unsigned long val; 132 long val;
133 133
134 val = wait_event_interruptible_timeout( 134 val = wait_event_interruptible_timeout(
135 bp->wq, 135 bp->wq,
diff --git a/drivers/sbus/char/jsflash.c b/drivers/sbus/char/jsflash.c
index a9a9893a5f95..e6d1fc8c54f1 100644
--- a/drivers/sbus/char/jsflash.c
+++ b/drivers/sbus/char/jsflash.c
@@ -38,9 +38,6 @@
38#include <linux/string.h> 38#include <linux/string.h>
39#include <linux/genhd.h> 39#include <linux/genhd.h>
40#include <linux/blkdev.h> 40#include <linux/blkdev.h>
41
42#define MAJOR_NR JSFD_MAJOR
43
44#include <asm/uaccess.h> 41#include <asm/uaccess.h>
45#include <asm/pgtable.h> 42#include <asm/pgtable.h>
46#include <asm/io.h> 43#include <asm/io.h>
diff --git a/drivers/scsi/fcoe/fc_transport_fcoe.c b/drivers/scsi/fcoe/fc_transport_fcoe.c
index bf7fe6fc0820..8862758006c0 100644
--- a/drivers/scsi/fcoe/fc_transport_fcoe.c
+++ b/drivers/scsi/fcoe/fc_transport_fcoe.c
@@ -33,19 +33,19 @@ static LIST_HEAD(fcoe_transports);
33static DEFINE_MUTEX(fcoe_transports_lock); 33static DEFINE_MUTEX(fcoe_transports_lock);
34 34
35/** 35/**
36 * fcoe_transport_default - returns ptr to the default transport fcoe_sw 36 * fcoe_transport_default() - Returns ptr to the default transport fcoe_sw
37 **/ 37 */
38struct fcoe_transport *fcoe_transport_default(void) 38struct fcoe_transport *fcoe_transport_default(void)
39{ 39{
40 return &fcoe_sw_transport; 40 return &fcoe_sw_transport;
41} 41}
42 42
43/** 43/**
44 * fcoe_transport_to_pcidev - get the pci dev from a netdev 44 * fcoe_transport_to_pcidev() - get the pci dev from a netdev
45 * @netdev: the netdev that pci dev will be retrived from 45 * @netdev: the netdev that pci dev will be retrived from
46 * 46 *
47 * Returns: NULL or the corrsponding pci_dev 47 * Returns: NULL or the corrsponding pci_dev
48 **/ 48 */
49struct pci_dev *fcoe_transport_pcidev(const struct net_device *netdev) 49struct pci_dev *fcoe_transport_pcidev(const struct net_device *netdev)
50{ 50{
51 if (!netdev->dev.parent) 51 if (!netdev->dev.parent)
@@ -54,18 +54,17 @@ struct pci_dev *fcoe_transport_pcidev(const struct net_device *netdev)
54} 54}
55 55
56/** 56/**
57 * fcoe_transport_device_lookup - find out netdev is managed by the 57 * fcoe_transport_device_lookup() - Lookup a transport
58 * transport
59 * assign a transport to a device
60 * @netdev: the netdev the transport to be attached to 58 * @netdev: the netdev the transport to be attached to
61 * 59 *
62 * This will look for existing offload driver, if not found, it falls back to 60 * This will look for existing offload driver, if not found, it falls back to
63 * the default sw hba (fcoe_sw) as its fcoe transport. 61 * the default sw hba (fcoe_sw) as its fcoe transport.
64 * 62 *
65 * Returns: 0 for success 63 * Returns: 0 for success
66 **/ 64 */
67static struct fcoe_transport_internal *fcoe_transport_device_lookup( 65static struct fcoe_transport_internal *
68 struct fcoe_transport *t, struct net_device *netdev) 66fcoe_transport_device_lookup(struct fcoe_transport *t,
67 struct net_device *netdev)
69{ 68{
70 struct fcoe_transport_internal *ti; 69 struct fcoe_transport_internal *ti;
71 70
@@ -81,14 +80,14 @@ static struct fcoe_transport_internal *fcoe_transport_device_lookup(
81 return NULL; 80 return NULL;
82} 81}
83/** 82/**
84 * fcoe_transport_device_add - assign a transport to a device 83 * fcoe_transport_device_add() - Assign a transport to a device
85 * @netdev: the netdev the transport to be attached to 84 * @netdev: the netdev the transport to be attached to
86 * 85 *
87 * This will look for existing offload driver, if not found, it falls back to 86 * This will look for existing offload driver, if not found, it falls back to
88 * the default sw hba (fcoe_sw) as its fcoe transport. 87 * the default sw hba (fcoe_sw) as its fcoe transport.
89 * 88 *
90 * Returns: 0 for success 89 * Returns: 0 for success
91 **/ 90 */
92static int fcoe_transport_device_add(struct fcoe_transport *t, 91static int fcoe_transport_device_add(struct fcoe_transport *t,
93 struct net_device *netdev) 92 struct net_device *netdev)
94{ 93{
@@ -123,14 +122,14 @@ static int fcoe_transport_device_add(struct fcoe_transport *t,
123} 122}
124 123
125/** 124/**
126 * fcoe_transport_device_remove - remove a device from its transport 125 * fcoe_transport_device_remove() - Remove a device from its transport
127 * @netdev: the netdev the transport to be attached to 126 * @netdev: the netdev the transport to be attached to
128 * 127 *
129 * this removes the device from the transport so the given transport will 128 * This removes the device from the transport so the given transport will
130 * not manage this device any more 129 * not manage this device any more
131 * 130 *
132 * Returns: 0 for success 131 * Returns: 0 for success
133 **/ 132 */
134static int fcoe_transport_device_remove(struct fcoe_transport *t, 133static int fcoe_transport_device_remove(struct fcoe_transport *t,
135 struct net_device *netdev) 134 struct net_device *netdev)
136{ 135{
@@ -155,13 +154,13 @@ static int fcoe_transport_device_remove(struct fcoe_transport *t,
155} 154}
156 155
157/** 156/**
158 * fcoe_transport_device_remove_all - remove all from transport devlist 157 * fcoe_transport_device_remove_all() - Remove all from transport devlist
159 * 158 *
160 * this removes the device from the transport so the given transport will 159 * This removes the device from the transport so the given transport will
161 * not manage this device any more 160 * not manage this device any more
162 * 161 *
163 * Returns: 0 for success 162 * Returns: 0 for success
164 **/ 163 */
165static void fcoe_transport_device_remove_all(struct fcoe_transport *t) 164static void fcoe_transport_device_remove_all(struct fcoe_transport *t)
166{ 165{
167 struct fcoe_transport_internal *ti, *tmp; 166 struct fcoe_transport_internal *ti, *tmp;
@@ -175,18 +174,18 @@ static void fcoe_transport_device_remove_all(struct fcoe_transport *t)
175} 174}
176 175
177/** 176/**
178 * fcoe_transport_match - use the bus device match function to match the hw 177 * fcoe_transport_match() - Use the bus device match function to match the hw
179 * @t: the fcoe transport 178 * @t: The fcoe transport to check
180 * @netdev: 179 * @netdev: The netdev to match against
181 * 180 *
182 * This function is used to check if the givne transport wants to manage the 181 * This function is used to check if the given transport wants to manage the
183 * input netdev. if the transports implements the match function, it will be 182 * input netdev. if the transports implements the match function, it will be
184 * called, o.w. we just compare the pci vendor and device id. 183 * called, o.w. we just compare the pci vendor and device id.
185 * 184 *
186 * Returns: true for match up 185 * Returns: true for match up
187 **/ 186 */
188static bool fcoe_transport_match(struct fcoe_transport *t, 187static bool fcoe_transport_match(struct fcoe_transport *t,
189 struct net_device *netdev) 188 struct net_device *netdev)
190{ 189{
191 /* match transport by vendor and device id */ 190 /* match transport by vendor and device id */
192 struct pci_dev *pci; 191 struct pci_dev *pci;
@@ -210,17 +209,17 @@ static bool fcoe_transport_match(struct fcoe_transport *t,
210} 209}
211 210
212/** 211/**
213 * fcoe_transport_lookup - check if the transport is already registered 212 * fcoe_transport_lookup() - Check if the transport is already registered
214 * @t: the transport to be looked up 213 * @t: the transport to be looked up
215 * 214 *
216 * This compares the parent device (pci) vendor and device id 215 * This compares the parent device (pci) vendor and device id
217 * 216 *
218 * Returns: NULL if not found 217 * Returns: NULL if not found
219 * 218 *
220 * TODO - return default sw transport if no other transport is found 219 * TODO: return default sw transport if no other transport is found
221 **/ 220 */
222static struct fcoe_transport *fcoe_transport_lookup( 221static struct fcoe_transport *
223 struct net_device *netdev) 222fcoe_transport_lookup(struct net_device *netdev)
224{ 223{
225 struct fcoe_transport *t; 224 struct fcoe_transport *t;
226 225
@@ -239,11 +238,11 @@ static struct fcoe_transport *fcoe_transport_lookup(
239} 238}
240 239
241/** 240/**
242 * fcoe_transport_register - adds a fcoe transport to the fcoe transports list 241 * fcoe_transport_register() - Adds a fcoe transport to the fcoe transports list
243 * @t: ptr to the fcoe transport to be added 242 * @t: ptr to the fcoe transport to be added
244 * 243 *
245 * Returns: 0 for success 244 * Returns: 0 for success
246 **/ 245 */
247int fcoe_transport_register(struct fcoe_transport *t) 246int fcoe_transport_register(struct fcoe_transport *t)
248{ 247{
249 struct fcoe_transport *tt; 248 struct fcoe_transport *tt;
@@ -259,9 +258,6 @@ int fcoe_transport_register(struct fcoe_transport *t)
259 list_add_tail(&t->list, &fcoe_transports); 258 list_add_tail(&t->list, &fcoe_transports);
260 mutex_unlock(&fcoe_transports_lock); 259 mutex_unlock(&fcoe_transports_lock);
261 260
262 mutex_init(&t->devlock);
263 INIT_LIST_HEAD(&t->devlist);
264
265 printk(KERN_DEBUG "fcoe_transport_register:%s\n", t->name); 261 printk(KERN_DEBUG "fcoe_transport_register:%s\n", t->name);
266 262
267 return 0; 263 return 0;
@@ -269,11 +265,11 @@ int fcoe_transport_register(struct fcoe_transport *t)
269EXPORT_SYMBOL_GPL(fcoe_transport_register); 265EXPORT_SYMBOL_GPL(fcoe_transport_register);
270 266
271/** 267/**
272 * fcoe_transport_unregister - remove the tranport fro the fcoe transports list 268 * fcoe_transport_unregister() - Remove the tranport fro the fcoe transports list
273 * @t: ptr to the fcoe transport to be removed 269 * @t: ptr to the fcoe transport to be removed
274 * 270 *
275 * Returns: 0 for success 271 * Returns: 0 for success
276 **/ 272 */
277int fcoe_transport_unregister(struct fcoe_transport *t) 273int fcoe_transport_unregister(struct fcoe_transport *t)
278{ 274{
279 struct fcoe_transport *tt, *tmp; 275 struct fcoe_transport *tt, *tmp;
@@ -294,8 +290,8 @@ int fcoe_transport_unregister(struct fcoe_transport *t)
294} 290}
295EXPORT_SYMBOL_GPL(fcoe_transport_unregister); 291EXPORT_SYMBOL_GPL(fcoe_transport_unregister);
296 292
297/* 293/**
298 * fcoe_load_transport_driver - load an offload driver by alias name 294 * fcoe_load_transport_driver() - Load an offload driver by alias name
299 * @netdev: the target net device 295 * @netdev: the target net device
300 * 296 *
301 * Requests for an offload driver module as the fcoe transport, if fails, it 297 * Requests for an offload driver module as the fcoe transport, if fails, it
@@ -307,7 +303,7 @@ EXPORT_SYMBOL_GPL(fcoe_transport_unregister);
307 * 3. pure hw fcoe hba may not have netdev 303 * 3. pure hw fcoe hba may not have netdev
308 * 304 *
309 * Returns: 0 for success 305 * Returns: 0 for success
310 **/ 306 */
311int fcoe_load_transport_driver(struct net_device *netdev) 307int fcoe_load_transport_driver(struct net_device *netdev)
312{ 308{
313 struct pci_dev *pci; 309 struct pci_dev *pci;
@@ -335,14 +331,14 @@ int fcoe_load_transport_driver(struct net_device *netdev)
335EXPORT_SYMBOL_GPL(fcoe_load_transport_driver); 331EXPORT_SYMBOL_GPL(fcoe_load_transport_driver);
336 332
337/** 333/**
338 * fcoe_transport_attach - load transport to fcoe 334 * fcoe_transport_attach() - Load transport to fcoe
339 * @netdev: the netdev the transport to be attached to 335 * @netdev: the netdev the transport to be attached to
340 * 336 *
341 * This will look for existing offload driver, if not found, it falls back to 337 * This will look for existing offload driver, if not found, it falls back to
342 * the default sw hba (fcoe_sw) as its fcoe transport. 338 * the default sw hba (fcoe_sw) as its fcoe transport.
343 * 339 *
344 * Returns: 0 for success 340 * Returns: 0 for success
345 **/ 341 */
346int fcoe_transport_attach(struct net_device *netdev) 342int fcoe_transport_attach(struct net_device *netdev)
347{ 343{
348 struct fcoe_transport *t; 344 struct fcoe_transport *t;
@@ -373,11 +369,11 @@ int fcoe_transport_attach(struct net_device *netdev)
373EXPORT_SYMBOL_GPL(fcoe_transport_attach); 369EXPORT_SYMBOL_GPL(fcoe_transport_attach);
374 370
375/** 371/**
376 * fcoe_transport_release - unload transport from fcoe 372 * fcoe_transport_release() - Unload transport from fcoe
377 * @netdev: the net device on which fcoe is to be released 373 * @netdev: the net device on which fcoe is to be released
378 * 374 *
379 * Returns: 0 for success 375 * Returns: 0 for success
380 **/ 376 */
381int fcoe_transport_release(struct net_device *netdev) 377int fcoe_transport_release(struct net_device *netdev)
382{ 378{
383 struct fcoe_transport *t; 379 struct fcoe_transport *t;
@@ -410,12 +406,12 @@ int fcoe_transport_release(struct net_device *netdev)
410EXPORT_SYMBOL_GPL(fcoe_transport_release); 406EXPORT_SYMBOL_GPL(fcoe_transport_release);
411 407
412/** 408/**
413 * fcoe_transport_init - initializes fcoe transport layer 409 * fcoe_transport_init() - Initializes fcoe transport layer
414 * 410 *
415 * This prepares for the fcoe transport layer 411 * This prepares for the fcoe transport layer
416 * 412 *
417 * Returns: none 413 * Returns: none
418 **/ 414 */
419int __init fcoe_transport_init(void) 415int __init fcoe_transport_init(void)
420{ 416{
421 INIT_LIST_HEAD(&fcoe_transports); 417 INIT_LIST_HEAD(&fcoe_transports);
@@ -424,12 +420,13 @@ int __init fcoe_transport_init(void)
424} 420}
425 421
426/** 422/**
427 * fcoe_transport_exit - cleans up the fcoe transport layer 423 * fcoe_transport_exit() - Cleans up the fcoe transport layer
424 *
428 * This cleans up the fcoe transport layer. removing any transport on the list, 425 * This cleans up the fcoe transport layer. removing any transport on the list,
429 * note that the transport destroy func is not called here. 426 * note that the transport destroy func is not called here.
430 * 427 *
431 * Returns: none 428 * Returns: none
432 **/ 429 */
433int __exit fcoe_transport_exit(void) 430int __exit fcoe_transport_exit(void)
434{ 431{
435 struct fcoe_transport *t, *tmp; 432 struct fcoe_transport *t, *tmp;
diff --git a/drivers/scsi/fcoe/fcoe_sw.c b/drivers/scsi/fcoe/fcoe_sw.c
index dc4cd5e25760..da210eba1941 100644
--- a/drivers/scsi/fcoe/fcoe_sw.c
+++ b/drivers/scsi/fcoe/fcoe_sw.c
@@ -104,19 +104,19 @@ static struct scsi_host_template fcoe_sw_shost_template = {
104 .max_sectors = 0xffff, 104 .max_sectors = 0xffff,
105}; 105};
106 106
107/* 107/**
108 * fcoe_sw_lport_config - sets up the fc_lport 108 * fcoe_sw_lport_config() - sets up the fc_lport
109 * @lp: ptr to the fc_lport 109 * @lp: ptr to the fc_lport
110 * @shost: ptr to the parent scsi host 110 * @shost: ptr to the parent scsi host
111 * 111 *
112 * Returns: 0 for success 112 * Returns: 0 for success
113 *
114 */ 113 */
115static int fcoe_sw_lport_config(struct fc_lport *lp) 114static int fcoe_sw_lport_config(struct fc_lport *lp)
116{ 115{
117 int i = 0; 116 int i = 0;
118 117
119 lp->link_status = 0; 118 lp->link_up = 0;
119 lp->qfull = 0;
120 lp->max_retry_count = 3; 120 lp->max_retry_count = 3;
121 lp->e_d_tov = 2 * 1000; /* FC-FS default */ 121 lp->e_d_tov = 2 * 1000; /* FC-FS default */
122 lp->r_a_tov = 2 * 2 * 1000; 122 lp->r_a_tov = 2 * 2 * 1000;
@@ -136,16 +136,14 @@ static int fcoe_sw_lport_config(struct fc_lport *lp)
136 return 0; 136 return 0;
137} 137}
138 138
139/* 139/**
140 * fcoe_sw_netdev_config - sets up fcoe_softc for lport and network 140 * fcoe_sw_netdev_config() - Set up netdev for SW FCoE
141 * related properties
142 * @lp : ptr to the fc_lport 141 * @lp : ptr to the fc_lport
143 * @netdev : ptr to the associated netdevice struct 142 * @netdev : ptr to the associated netdevice struct
144 * 143 *
145 * Must be called after fcoe_sw_lport_config() as it will use lport mutex 144 * Must be called after fcoe_sw_lport_config() as it will use lport mutex
146 * 145 *
147 * Returns : 0 for success 146 * Returns : 0 for success
148 *
149 */ 147 */
150static int fcoe_sw_netdev_config(struct fc_lport *lp, struct net_device *netdev) 148static int fcoe_sw_netdev_config(struct fc_lport *lp, struct net_device *netdev)
151{ 149{
@@ -181,9 +179,8 @@ static int fcoe_sw_netdev_config(struct fc_lport *lp, struct net_device *netdev)
181 if (fc_set_mfs(lp, mfs)) 179 if (fc_set_mfs(lp, mfs))
182 return -EINVAL; 180 return -EINVAL;
183 181
184 lp->link_status = ~FC_PAUSE & ~FC_LINK_UP;
185 if (!fcoe_link_ok(lp)) 182 if (!fcoe_link_ok(lp))
186 lp->link_status |= FC_LINK_UP; 183 lp->link_up = 1;
187 184
188 /* offload features support */ 185 /* offload features support */
189 if (fc->real_dev->features & NETIF_F_SG) 186 if (fc->real_dev->features & NETIF_F_SG)
@@ -191,6 +188,7 @@ static int fcoe_sw_netdev_config(struct fc_lport *lp, struct net_device *netdev)
191 188
192 189
193 skb_queue_head_init(&fc->fcoe_pending_queue); 190 skb_queue_head_init(&fc->fcoe_pending_queue);
191 fc->fcoe_pending_queue_active = 0;
194 192
195 /* setup Source Mac Address */ 193 /* setup Source Mac Address */
196 memcpy(fc->ctl_src_addr, fc->real_dev->dev_addr, 194 memcpy(fc->ctl_src_addr, fc->real_dev->dev_addr,
@@ -224,16 +222,15 @@ static int fcoe_sw_netdev_config(struct fc_lport *lp, struct net_device *netdev)
224 return 0; 222 return 0;
225} 223}
226 224
227/* 225/**
228 * fcoe_sw_shost_config - sets up fc_lport->host 226 * fcoe_sw_shost_config() - Sets up fc_lport->host
229 * @lp : ptr to the fc_lport 227 * @lp : ptr to the fc_lport
230 * @shost : ptr to the associated scsi host 228 * @shost : ptr to the associated scsi host
231 * @dev : device associated to scsi host 229 * @dev : device associated to scsi host
232 * 230 *
233 * Must be called after fcoe_sw_lport_config) and fcoe_sw_netdev_config() 231 * Must be called after fcoe_sw_lport_config() and fcoe_sw_netdev_config()
234 * 232 *
235 * Returns : 0 for success 233 * Returns : 0 for success
236 *
237 */ 234 */
238static int fcoe_sw_shost_config(struct fc_lport *lp, struct Scsi_Host *shost, 235static int fcoe_sw_shost_config(struct fc_lport *lp, struct Scsi_Host *shost,
239 struct device *dev) 236 struct device *dev)
@@ -261,8 +258,8 @@ static int fcoe_sw_shost_config(struct fc_lport *lp, struct Scsi_Host *shost,
261 return 0; 258 return 0;
262} 259}
263 260
264/* 261/**
265 * fcoe_sw_em_config - allocates em for this lport 262 * fcoe_sw_em_config() - allocates em for this lport
266 * @lp: the port that em is to allocated for 263 * @lp: the port that em is to allocated for
267 * 264 *
268 * Returns : 0 on success 265 * Returns : 0 on success
@@ -279,8 +276,8 @@ static inline int fcoe_sw_em_config(struct fc_lport *lp)
279 return 0; 276 return 0;
280} 277}
281 278
282/* 279/**
283 * fcoe_sw_destroy - FCoE software HBA tear-down function 280 * fcoe_sw_destroy() - FCoE software HBA tear-down function
284 * @netdev: ptr to the associated net_device 281 * @netdev: ptr to the associated net_device
285 * 282 *
286 * Returns: 0 if link is OK for use by FCoE. 283 * Returns: 0 if link is OK for use by FCoE.
@@ -301,7 +298,7 @@ static int fcoe_sw_destroy(struct net_device *netdev)
301 if (!lp) 298 if (!lp)
302 return -ENODEV; 299 return -ENODEV;
303 300
304 fc = fcoe_softc(lp); 301 fc = lport_priv(lp);
305 302
306 /* Logout of the fabric */ 303 /* Logout of the fabric */
307 fc_fabric_logoff(lp); 304 fc_fabric_logoff(lp);
@@ -353,8 +350,8 @@ static struct libfc_function_template fcoe_sw_libfc_fcn_templ = {
353 .frame_send = fcoe_xmit, 350 .frame_send = fcoe_xmit,
354}; 351};
355 352
356/* 353/**
357 * fcoe_sw_create - this function creates the fcoe interface 354 * fcoe_sw_create() - this function creates the fcoe interface
358 * @netdev: pointer the associated netdevice 355 * @netdev: pointer the associated netdevice
359 * 356 *
360 * Creates fc_lport struct and scsi_host for lport, configures lport 357 * Creates fc_lport struct and scsi_host for lport, configures lport
@@ -440,8 +437,8 @@ out_host_put:
440 return rc; 437 return rc;
441} 438}
442 439
443/* 440/**
444 * fcoe_sw_match - the fcoe sw transport match function 441 * fcoe_sw_match() - The FCoE SW transport match function
445 * 442 *
446 * Returns : false always 443 * Returns : false always
447 */ 444 */
@@ -461,8 +458,8 @@ struct fcoe_transport fcoe_sw_transport = {
461 .device = 0xffff, 458 .device = 0xffff,
462}; 459};
463 460
464/* 461/**
465 * fcoe_sw_init - registers fcoe_sw_transport 462 * fcoe_sw_init() - Registers fcoe_sw_transport
466 * 463 *
467 * Returns : 0 on success 464 * Returns : 0 on success
468 */ 465 */
@@ -471,17 +468,22 @@ int __init fcoe_sw_init(void)
471 /* attach to scsi transport */ 468 /* attach to scsi transport */
472 scsi_transport_fcoe_sw = 469 scsi_transport_fcoe_sw =
473 fc_attach_transport(&fcoe_sw_transport_function); 470 fc_attach_transport(&fcoe_sw_transport_function);
471
474 if (!scsi_transport_fcoe_sw) { 472 if (!scsi_transport_fcoe_sw) {
475 printk(KERN_ERR "fcoe_sw_init:fc_attach_transport() failed\n"); 473 printk(KERN_ERR "fcoe_sw_init:fc_attach_transport() failed\n");
476 return -ENODEV; 474 return -ENODEV;
477 } 475 }
476
477 mutex_init(&fcoe_sw_transport.devlock);
478 INIT_LIST_HEAD(&fcoe_sw_transport.devlist);
479
478 /* register sw transport */ 480 /* register sw transport */
479 fcoe_transport_register(&fcoe_sw_transport); 481 fcoe_transport_register(&fcoe_sw_transport);
480 return 0; 482 return 0;
481} 483}
482 484
483/* 485/**
484 * fcoe_sw_exit - unregisters fcoe_sw_transport 486 * fcoe_sw_exit() - Unregisters fcoe_sw_transport
485 * 487 *
486 * Returns : 0 on success 488 * Returns : 0 on success
487 */ 489 */
diff --git a/drivers/scsi/fcoe/libfcoe.c b/drivers/scsi/fcoe/libfcoe.c
index e419f486cdb3..5548bf3bb58b 100644
--- a/drivers/scsi/fcoe/libfcoe.c
+++ b/drivers/scsi/fcoe/libfcoe.c
@@ -49,6 +49,7 @@
49static int debug_fcoe; 49static int debug_fcoe;
50 50
51#define FCOE_MAX_QUEUE_DEPTH 256 51#define FCOE_MAX_QUEUE_DEPTH 256
52#define FCOE_LOW_QUEUE_DEPTH 32
52 53
53/* destination address mode */ 54/* destination address mode */
54#define FCOE_GW_ADDR_MODE 0x00 55#define FCOE_GW_ADDR_MODE 0x00
@@ -69,8 +70,6 @@ struct fcoe_percpu_s *fcoe_percpu[NR_CPUS];
69 70
70/* Function Prototyes */ 71/* Function Prototyes */
71static int fcoe_check_wait_queue(struct fc_lport *); 72static int fcoe_check_wait_queue(struct fc_lport *);
72static void fcoe_insert_wait_queue_head(struct fc_lport *, struct sk_buff *);
73static void fcoe_insert_wait_queue(struct fc_lport *, struct sk_buff *);
74static void fcoe_recv_flogi(struct fcoe_softc *, struct fc_frame *, u8 *); 73static void fcoe_recv_flogi(struct fcoe_softc *, struct fc_frame *, u8 *);
75#ifdef CONFIG_HOTPLUG_CPU 74#ifdef CONFIG_HOTPLUG_CPU
76static int fcoe_cpu_callback(struct notifier_block *, ulong, void *); 75static int fcoe_cpu_callback(struct notifier_block *, ulong, void *);
@@ -91,13 +90,13 @@ static struct notifier_block fcoe_cpu_notifier = {
91}; 90};
92 91
93/** 92/**
94 * fcoe_create_percpu_data - creates the associated cpu data 93 * fcoe_create_percpu_data() - creates the associated cpu data
95 * @cpu: index for the cpu where fcoe cpu data will be created 94 * @cpu: index for the cpu where fcoe cpu data will be created
96 * 95 *
97 * create percpu stats block, from cpu add notifier 96 * create percpu stats block, from cpu add notifier
98 * 97 *
99 * Returns: none 98 * Returns: none
100 **/ 99 */
101static void fcoe_create_percpu_data(int cpu) 100static void fcoe_create_percpu_data(int cpu)
102{ 101{
103 struct fc_lport *lp; 102 struct fc_lport *lp;
@@ -115,13 +114,13 @@ static void fcoe_create_percpu_data(int cpu)
115} 114}
116 115
117/** 116/**
118 * fcoe_destroy_percpu_data - destroys the associated cpu data 117 * fcoe_destroy_percpu_data() - destroys the associated cpu data
119 * @cpu: index for the cpu where fcoe cpu data will destroyed 118 * @cpu: index for the cpu where fcoe cpu data will destroyed
120 * 119 *
121 * destroy percpu stats block called by cpu add/remove notifier 120 * destroy percpu stats block called by cpu add/remove notifier
122 * 121 *
123 * Retuns: none 122 * Retuns: none
124 **/ 123 */
125static void fcoe_destroy_percpu_data(int cpu) 124static void fcoe_destroy_percpu_data(int cpu)
126{ 125{
127 struct fc_lport *lp; 126 struct fc_lport *lp;
@@ -137,7 +136,7 @@ static void fcoe_destroy_percpu_data(int cpu)
137} 136}
138 137
139/** 138/**
140 * fcoe_cpu_callback - fcoe cpu hotplug event callback 139 * fcoe_cpu_callback() - fcoe cpu hotplug event callback
141 * @nfb: callback data block 140 * @nfb: callback data block
142 * @action: event triggering the callback 141 * @action: event triggering the callback
143 * @hcpu: index for the cpu of this event 142 * @hcpu: index for the cpu of this event
@@ -145,7 +144,7 @@ static void fcoe_destroy_percpu_data(int cpu)
145 * this creates or destroys per cpu data for fcoe 144 * this creates or destroys per cpu data for fcoe
146 * 145 *
147 * Returns NOTIFY_OK always. 146 * Returns NOTIFY_OK always.
148 **/ 147 */
149static int fcoe_cpu_callback(struct notifier_block *nfb, unsigned long action, 148static int fcoe_cpu_callback(struct notifier_block *nfb, unsigned long action,
150 void *hcpu) 149 void *hcpu)
151{ 150{
@@ -166,7 +165,7 @@ static int fcoe_cpu_callback(struct notifier_block *nfb, unsigned long action,
166#endif /* CONFIG_HOTPLUG_CPU */ 165#endif /* CONFIG_HOTPLUG_CPU */
167 166
168/** 167/**
169 * fcoe_rcv - this is the fcoe receive function called by NET_RX_SOFTIRQ 168 * fcoe_rcv() - this is the fcoe receive function called by NET_RX_SOFTIRQ
170 * @skb: the receive skb 169 * @skb: the receive skb
171 * @dev: associated net device 170 * @dev: associated net device
172 * @ptype: context 171 * @ptype: context
@@ -175,7 +174,7 @@ static int fcoe_cpu_callback(struct notifier_block *nfb, unsigned long action,
175 * this function will receive the packet and build fc frame and pass it up 174 * this function will receive the packet and build fc frame and pass it up
176 * 175 *
177 * Returns: 0 for success 176 * Returns: 0 for success
178 **/ 177 */
179int fcoe_rcv(struct sk_buff *skb, struct net_device *dev, 178int fcoe_rcv(struct sk_buff *skb, struct net_device *dev,
180 struct packet_type *ptype, struct net_device *olddev) 179 struct packet_type *ptype, struct net_device *olddev)
181{ 180{
@@ -265,11 +264,11 @@ err2:
265EXPORT_SYMBOL_GPL(fcoe_rcv); 264EXPORT_SYMBOL_GPL(fcoe_rcv);
266 265
267/** 266/**
268 * fcoe_start_io - pass to netdev to start xmit for fcoe 267 * fcoe_start_io() - pass to netdev to start xmit for fcoe
269 * @skb: the skb to be xmitted 268 * @skb: the skb to be xmitted
270 * 269 *
271 * Returns: 0 for success 270 * Returns: 0 for success
272 **/ 271 */
273static inline int fcoe_start_io(struct sk_buff *skb) 272static inline int fcoe_start_io(struct sk_buff *skb)
274{ 273{
275 int rc; 274 int rc;
@@ -283,12 +282,12 @@ static inline int fcoe_start_io(struct sk_buff *skb)
283} 282}
284 283
285/** 284/**
286 * fcoe_get_paged_crc_eof - in case we need alloc a page for crc_eof 285 * fcoe_get_paged_crc_eof() - in case we need alloc a page for crc_eof
287 * @skb: the skb to be xmitted 286 * @skb: the skb to be xmitted
288 * @tlen: total len 287 * @tlen: total len
289 * 288 *
290 * Returns: 0 for success 289 * Returns: 0 for success
291 **/ 290 */
292static int fcoe_get_paged_crc_eof(struct sk_buff *skb, int tlen) 291static int fcoe_get_paged_crc_eof(struct sk_buff *skb, int tlen)
293{ 292{
294 struct fcoe_percpu_s *fps; 293 struct fcoe_percpu_s *fps;
@@ -326,13 +325,12 @@ static int fcoe_get_paged_crc_eof(struct sk_buff *skb, int tlen)
326} 325}
327 326
328/** 327/**
329 * fcoe_fc_crc - calculates FC CRC in this fcoe skb 328 * fcoe_fc_crc() - calculates FC CRC in this fcoe skb
330 * @fp: the fc_frame containg data to be checksummed 329 * @fp: the fc_frame containg data to be checksummed
331 * 330 *
332 * This uses crc32() to calculate the crc for fc frame 331 * This uses crc32() to calculate the crc for fc frame
333 * Return : 32 bit crc 332 * Return : 32 bit crc
334 * 333 */
335 **/
336u32 fcoe_fc_crc(struct fc_frame *fp) 334u32 fcoe_fc_crc(struct fc_frame *fp)
337{ 335{
338 struct sk_buff *skb = fp_skb(fp); 336 struct sk_buff *skb = fp_skb(fp);
@@ -363,13 +361,12 @@ u32 fcoe_fc_crc(struct fc_frame *fp)
363EXPORT_SYMBOL_GPL(fcoe_fc_crc); 361EXPORT_SYMBOL_GPL(fcoe_fc_crc);
364 362
365/** 363/**
366 * fcoe_xmit - FCoE frame transmit function 364 * fcoe_xmit() - FCoE frame transmit function
367 * @lp: the associated local port 365 * @lp: the associated local port
368 * @fp: the fc_frame to be transmitted 366 * @fp: the fc_frame to be transmitted
369 * 367 *
370 * Return : 0 for success 368 * Return : 0 for success
371 * 369 */
372 **/
373int fcoe_xmit(struct fc_lport *lp, struct fc_frame *fp) 370int fcoe_xmit(struct fc_lport *lp, struct fc_frame *fp)
374{ 371{
375 int wlen, rc = 0; 372 int wlen, rc = 0;
@@ -389,7 +386,7 @@ int fcoe_xmit(struct fc_lport *lp, struct fc_frame *fp)
389 386
390 WARN_ON((fr_len(fp) % sizeof(u32)) != 0); 387 WARN_ON((fr_len(fp) % sizeof(u32)) != 0);
391 388
392 fc = fcoe_softc(lp); 389 fc = lport_priv(lp);
393 /* 390 /*
394 * if it is a flogi then we need to learn gw-addr 391 * if it is a flogi then we need to learn gw-addr
395 * and my own fcid 392 * and my own fcid
@@ -439,7 +436,7 @@ int fcoe_xmit(struct fc_lport *lp, struct fc_frame *fp)
439 if (skb_is_nonlinear(skb)) { 436 if (skb_is_nonlinear(skb)) {
440 skb_frag_t *frag; 437 skb_frag_t *frag;
441 if (fcoe_get_paged_crc_eof(skb, tlen)) { 438 if (fcoe_get_paged_crc_eof(skb, tlen)) {
442 kfree(skb); 439 kfree_skb(skb);
443 return -ENOMEM; 440 return -ENOMEM;
444 } 441 }
445 frag = &skb_shinfo(skb)->frags[skb_shinfo(skb)->nr_frags - 1]; 442 frag = &skb_shinfo(skb)->frags[skb_shinfo(skb)->nr_frags - 1];
@@ -502,21 +499,22 @@ int fcoe_xmit(struct fc_lport *lp, struct fc_frame *fp)
502 rc = fcoe_start_io(skb); 499 rc = fcoe_start_io(skb);
503 500
504 if (rc) { 501 if (rc) {
505 fcoe_insert_wait_queue(lp, skb); 502 spin_lock_bh(&fc->fcoe_pending_queue.lock);
503 __skb_queue_tail(&fc->fcoe_pending_queue, skb);
504 spin_unlock_bh(&fc->fcoe_pending_queue.lock);
506 if (fc->fcoe_pending_queue.qlen > FCOE_MAX_QUEUE_DEPTH) 505 if (fc->fcoe_pending_queue.qlen > FCOE_MAX_QUEUE_DEPTH)
507 fc_pause(lp); 506 lp->qfull = 1;
508 } 507 }
509 508
510 return 0; 509 return 0;
511} 510}
512EXPORT_SYMBOL_GPL(fcoe_xmit); 511EXPORT_SYMBOL_GPL(fcoe_xmit);
513 512
514/* 513/**
515 * fcoe_percpu_receive_thread - recv thread per cpu 514 * fcoe_percpu_receive_thread() - recv thread per cpu
516 * @arg: ptr to the fcoe per cpu struct 515 * @arg: ptr to the fcoe per cpu struct
517 * 516 *
518 * Return: 0 for success 517 * Return: 0 for success
519 *
520 */ 518 */
521int fcoe_percpu_receive_thread(void *arg) 519int fcoe_percpu_receive_thread(void *arg)
522{ 520{
@@ -533,7 +531,7 @@ int fcoe_percpu_receive_thread(void *arg)
533 struct fcoe_softc *fc; 531 struct fcoe_softc *fc;
534 struct fcoe_hdr *hp; 532 struct fcoe_hdr *hp;
535 533
536 set_user_nice(current, 19); 534 set_user_nice(current, -20);
537 535
538 while (!kthread_should_stop()) { 536 while (!kthread_should_stop()) {
539 537
@@ -658,7 +656,7 @@ int fcoe_percpu_receive_thread(void *arg)
658} 656}
659 657
660/** 658/**
661 * fcoe_recv_flogi - flogi receive function 659 * fcoe_recv_flogi() - flogi receive function
662 * @fc: associated fcoe_softc 660 * @fc: associated fcoe_softc
663 * @fp: the recieved frame 661 * @fp: the recieved frame
664 * @sa: the source address of this flogi 662 * @sa: the source address of this flogi
@@ -667,7 +665,7 @@ int fcoe_percpu_receive_thread(void *arg)
667 * mac address for the initiator, eitehr OUI based or GW based. 665 * mac address for the initiator, eitehr OUI based or GW based.
668 * 666 *
669 * Returns: none 667 * Returns: none
670 **/ 668 */
671static void fcoe_recv_flogi(struct fcoe_softc *fc, struct fc_frame *fp, u8 *sa) 669static void fcoe_recv_flogi(struct fcoe_softc *fc, struct fc_frame *fp, u8 *sa)
672{ 670{
673 struct fc_frame_header *fh; 671 struct fc_frame_header *fh;
@@ -715,32 +713,23 @@ static void fcoe_recv_flogi(struct fcoe_softc *fc, struct fc_frame *fp, u8 *sa)
715} 713}
716 714
717/** 715/**
718 * fcoe_watchdog - fcoe timer callback 716 * fcoe_watchdog() - fcoe timer callback
719 * @vp: 717 * @vp:
720 * 718 *
721 * This checks the pending queue length for fcoe and put fcoe to be paused state 719 * This checks the pending queue length for fcoe and set lport qfull
722 * if the FCOE_MAX_QUEUE_DEPTH is reached. This is done for all fc_lport on the 720 * if the FCOE_MAX_QUEUE_DEPTH is reached. This is done for all fc_lport on the
723 * fcoe_hostlist. 721 * fcoe_hostlist.
724 * 722 *
725 * Returns: 0 for success 723 * Returns: 0 for success
726 **/ 724 */
727void fcoe_watchdog(ulong vp) 725void fcoe_watchdog(ulong vp)
728{ 726{
729 struct fc_lport *lp;
730 struct fcoe_softc *fc; 727 struct fcoe_softc *fc;
731 int paused = 0;
732 728
733 read_lock(&fcoe_hostlist_lock); 729 read_lock(&fcoe_hostlist_lock);
734 list_for_each_entry(fc, &fcoe_hostlist, list) { 730 list_for_each_entry(fc, &fcoe_hostlist, list) {
735 lp = fc->lp; 731 if (fc->lp)
736 if (lp) { 732 fcoe_check_wait_queue(fc->lp);
737 if (fc->fcoe_pending_queue.qlen > FCOE_MAX_QUEUE_DEPTH)
738 paused = 1;
739 if (fcoe_check_wait_queue(lp) < FCOE_MAX_QUEUE_DEPTH) {
740 if (paused)
741 fc_unpause(lp);
742 }
743 }
744 } 733 }
745 read_unlock(&fcoe_hostlist_lock); 734 read_unlock(&fcoe_hostlist_lock);
746 735
@@ -750,96 +739,64 @@ void fcoe_watchdog(ulong vp)
750 739
751 740
752/** 741/**
753 * fcoe_check_wait_queue - put the skb into fcoe pending xmit queue 742 * fcoe_check_wait_queue() - put the skb into fcoe pending xmit queue
754 * @lp: the fc_port for this skb 743 * @lp: the fc_port for this skb
755 * @skb: the associated skb to be xmitted 744 * @skb: the associated skb to be xmitted
756 * 745 *
757 * This empties the wait_queue, dequeue the head of the wait_queue queue 746 * This empties the wait_queue, dequeue the head of the wait_queue queue
758 * and calls fcoe_start_io() for each packet, if all skb have been 747 * and calls fcoe_start_io() for each packet, if all skb have been
759 * transmitted, return 0 if a error occurs, then restore wait_queue and 748 * transmitted, return qlen or -1 if a error occurs, then restore
760 * try again later. 749 * wait_queue and try again later.
761 * 750 *
762 * The wait_queue is used when the skb transmit fails. skb will go 751 * The wait_queue is used when the skb transmit fails. skb will go
763 * in the wait_queue which will be emptied by the time function OR 752 * in the wait_queue which will be emptied by the time function OR
764 * by the next skb transmit. 753 * by the next skb transmit.
765 * 754 *
766 * Returns: 0 for success 755 * Returns: 0 for success
767 **/ 756 */
768static int fcoe_check_wait_queue(struct fc_lport *lp) 757static int fcoe_check_wait_queue(struct fc_lport *lp)
769{ 758{
770 int rc, unpause = 0; 759 struct fcoe_softc *fc = lport_priv(lp);
771 int paused = 0;
772 struct sk_buff *skb; 760 struct sk_buff *skb;
773 struct fcoe_softc *fc; 761 int rc = -1;
774 762
775 fc = fcoe_softc(lp);
776 spin_lock_bh(&fc->fcoe_pending_queue.lock); 763 spin_lock_bh(&fc->fcoe_pending_queue.lock);
764 if (fc->fcoe_pending_queue_active)
765 goto out;
766 fc->fcoe_pending_queue_active = 1;
777 767
778 /* 768 while (fc->fcoe_pending_queue.qlen) {
779 * is this interface paused? 769 /* keep qlen > 0 until fcoe_start_io succeeds */
780 */ 770 fc->fcoe_pending_queue.qlen++;
781 if (fc->fcoe_pending_queue.qlen > FCOE_MAX_QUEUE_DEPTH) 771 skb = __skb_dequeue(&fc->fcoe_pending_queue);
782 paused = 1;
783 if (fc->fcoe_pending_queue.qlen) {
784 while ((skb = __skb_dequeue(&fc->fcoe_pending_queue)) != NULL) {
785 spin_unlock_bh(&fc->fcoe_pending_queue.lock);
786 rc = fcoe_start_io(skb);
787 if (rc) {
788 fcoe_insert_wait_queue_head(lp, skb);
789 return rc;
790 }
791 spin_lock_bh(&fc->fcoe_pending_queue.lock);
792 }
793 if (fc->fcoe_pending_queue.qlen < FCOE_MAX_QUEUE_DEPTH)
794 unpause = 1;
795 }
796 spin_unlock_bh(&fc->fcoe_pending_queue.lock);
797 if ((unpause) && (paused))
798 fc_unpause(lp);
799 return fc->fcoe_pending_queue.qlen;
800}
801
802/**
803 * fcoe_insert_wait_queue_head - puts skb to fcoe pending queue head
804 * @lp: the fc_port for this skb
805 * @skb: the associated skb to be xmitted
806 *
807 * Returns: none
808 **/
809static void fcoe_insert_wait_queue_head(struct fc_lport *lp,
810 struct sk_buff *skb)
811{
812 struct fcoe_softc *fc;
813 772
814 fc = fcoe_softc(lp); 773 spin_unlock_bh(&fc->fcoe_pending_queue.lock);
815 spin_lock_bh(&fc->fcoe_pending_queue.lock); 774 rc = fcoe_start_io(skb);
816 __skb_queue_head(&fc->fcoe_pending_queue, skb); 775 spin_lock_bh(&fc->fcoe_pending_queue.lock);
817 spin_unlock_bh(&fc->fcoe_pending_queue.lock);
818}
819 776
820/** 777 if (rc) {
821 * fcoe_insert_wait_queue - put the skb into fcoe pending queue tail 778 __skb_queue_head(&fc->fcoe_pending_queue, skb);
822 * @lp: the fc_port for this skb 779 /* undo temporary increment above */
823 * @skb: the associated skb to be xmitted 780 fc->fcoe_pending_queue.qlen--;
824 * 781 break;
825 * Returns: none 782 }
826 **/ 783 /* undo temporary increment above */
827static void fcoe_insert_wait_queue(struct fc_lport *lp, 784 fc->fcoe_pending_queue.qlen--;
828 struct sk_buff *skb) 785 }
829{
830 struct fcoe_softc *fc;
831 786
832 fc = fcoe_softc(lp); 787 if (fc->fcoe_pending_queue.qlen < FCOE_LOW_QUEUE_DEPTH)
833 spin_lock_bh(&fc->fcoe_pending_queue.lock); 788 lp->qfull = 0;
834 __skb_queue_tail(&fc->fcoe_pending_queue, skb); 789 fc->fcoe_pending_queue_active = 0;
790 rc = fc->fcoe_pending_queue.qlen;
791out:
835 spin_unlock_bh(&fc->fcoe_pending_queue.lock); 792 spin_unlock_bh(&fc->fcoe_pending_queue.lock);
793 return rc;
836} 794}
837 795
838/** 796/**
839 * fcoe_dev_setup - setup link change notification interface 797 * fcoe_dev_setup() - setup link change notification interface
840 * 798 */
841 **/ 799static void fcoe_dev_setup()
842static void fcoe_dev_setup(void)
843{ 800{
844 /* 801 /*
845 * here setup a interface specific wd time to 802 * here setup a interface specific wd time to
@@ -849,15 +806,15 @@ static void fcoe_dev_setup(void)
849} 806}
850 807
851/** 808/**
852 * fcoe_dev_setup - cleanup link change notification interface 809 * fcoe_dev_setup() - cleanup link change notification interface
853 **/ 810 */
854static void fcoe_dev_cleanup(void) 811static void fcoe_dev_cleanup(void)
855{ 812{
856 unregister_netdevice_notifier(&fcoe_notifier); 813 unregister_netdevice_notifier(&fcoe_notifier);
857} 814}
858 815
859/** 816/**
860 * fcoe_device_notification - netdev event notification callback 817 * fcoe_device_notification() - netdev event notification callback
861 * @notifier: context of the notification 818 * @notifier: context of the notification
862 * @event: type of event 819 * @event: type of event
863 * @ptr: fixed array for output parsed ifname 820 * @ptr: fixed array for output parsed ifname
@@ -865,7 +822,7 @@ static void fcoe_dev_cleanup(void)
865 * This function is called by the ethernet driver in case of link change event 822 * This function is called by the ethernet driver in case of link change event
866 * 823 *
867 * Returns: 0 for success 824 * Returns: 0 for success
868 **/ 825 */
869static int fcoe_device_notification(struct notifier_block *notifier, 826static int fcoe_device_notification(struct notifier_block *notifier,
870 ulong event, void *ptr) 827 ulong event, void *ptr)
871{ 828{
@@ -873,7 +830,7 @@ static int fcoe_device_notification(struct notifier_block *notifier,
873 struct net_device *real_dev = ptr; 830 struct net_device *real_dev = ptr;
874 struct fcoe_softc *fc; 831 struct fcoe_softc *fc;
875 struct fcoe_dev_stats *stats; 832 struct fcoe_dev_stats *stats;
876 u16 new_status; 833 u32 new_link_up;
877 u32 mfs; 834 u32 mfs;
878 int rc = NOTIFY_OK; 835 int rc = NOTIFY_OK;
879 836
@@ -890,17 +847,15 @@ static int fcoe_device_notification(struct notifier_block *notifier,
890 goto out; 847 goto out;
891 } 848 }
892 849
893 new_status = lp->link_status; 850 new_link_up = lp->link_up;
894 switch (event) { 851 switch (event) {
895 case NETDEV_DOWN: 852 case NETDEV_DOWN:
896 case NETDEV_GOING_DOWN: 853 case NETDEV_GOING_DOWN:
897 new_status &= ~FC_LINK_UP; 854 new_link_up = 0;
898 break; 855 break;
899 case NETDEV_UP: 856 case NETDEV_UP:
900 case NETDEV_CHANGE: 857 case NETDEV_CHANGE:
901 new_status &= ~FC_LINK_UP; 858 new_link_up = !fcoe_link_ok(lp);
902 if (!fcoe_link_ok(lp))
903 new_status |= FC_LINK_UP;
904 break; 859 break;
905 case NETDEV_CHANGEMTU: 860 case NETDEV_CHANGEMTU:
906 mfs = fc->real_dev->mtu - 861 mfs = fc->real_dev->mtu -
@@ -908,17 +863,15 @@ static int fcoe_device_notification(struct notifier_block *notifier,
908 sizeof(struct fcoe_crc_eof)); 863 sizeof(struct fcoe_crc_eof));
909 if (mfs >= FC_MIN_MAX_FRAME) 864 if (mfs >= FC_MIN_MAX_FRAME)
910 fc_set_mfs(lp, mfs); 865 fc_set_mfs(lp, mfs);
911 new_status &= ~FC_LINK_UP; 866 new_link_up = !fcoe_link_ok(lp);
912 if (!fcoe_link_ok(lp))
913 new_status |= FC_LINK_UP;
914 break; 867 break;
915 case NETDEV_REGISTER: 868 case NETDEV_REGISTER:
916 break; 869 break;
917 default: 870 default:
918 FC_DBG("unknown event %ld call", event); 871 FC_DBG("unknown event %ld call", event);
919 } 872 }
920 if (lp->link_status != new_status) { 873 if (lp->link_up != new_link_up) {
921 if ((new_status & FC_LINK_UP) == FC_LINK_UP) 874 if (new_link_up)
922 fc_linkup(lp); 875 fc_linkup(lp);
923 else { 876 else {
924 stats = lp->dev_stats[smp_processor_id()]; 877 stats = lp->dev_stats[smp_processor_id()];
@@ -933,12 +886,12 @@ out:
933} 886}
934 887
935/** 888/**
936 * fcoe_if_to_netdev - parse a name buffer to get netdev 889 * fcoe_if_to_netdev() - parse a name buffer to get netdev
937 * @ifname: fixed array for output parsed ifname 890 * @ifname: fixed array for output parsed ifname
938 * @buffer: incoming buffer to be copied 891 * @buffer: incoming buffer to be copied
939 * 892 *
940 * Returns: NULL or ptr to netdeive 893 * Returns: NULL or ptr to netdeive
941 **/ 894 */
942static struct net_device *fcoe_if_to_netdev(const char *buffer) 895static struct net_device *fcoe_if_to_netdev(const char *buffer)
943{ 896{
944 char *cp; 897 char *cp;
@@ -955,13 +908,13 @@ static struct net_device *fcoe_if_to_netdev(const char *buffer)
955} 908}
956 909
957/** 910/**
958 * fcoe_netdev_to_module_owner - finds out the nic drive moddule of the netdev 911 * fcoe_netdev_to_module_owner() - finds out the nic drive moddule of the netdev
959 * @netdev: the target netdev 912 * @netdev: the target netdev
960 * 913 *
961 * Returns: ptr to the struct module, NULL for failure 914 * Returns: ptr to the struct module, NULL for failure
962 **/ 915 */
963static struct module *fcoe_netdev_to_module_owner( 916static struct module *
964 const struct net_device *netdev) 917fcoe_netdev_to_module_owner(const struct net_device *netdev)
965{ 918{
966 struct device *dev; 919 struct device *dev;
967 920
@@ -979,12 +932,14 @@ static struct module *fcoe_netdev_to_module_owner(
979} 932}
980 933
981/** 934/**
982 * fcoe_ethdrv_get - holds the nic driver module by try_module_get() for 935 * fcoe_ethdrv_get() - Hold the Ethernet driver
983 * the corresponding netdev.
984 * @netdev: the target netdev 936 * @netdev: the target netdev
985 * 937 *
938 * Holds the Ethernet driver module by try_module_get() for
939 * the corresponding netdev.
940 *
986 * Returns: 0 for succsss 941 * Returns: 0 for succsss
987 **/ 942 */
988static int fcoe_ethdrv_get(const struct net_device *netdev) 943static int fcoe_ethdrv_get(const struct net_device *netdev)
989{ 944{
990 struct module *owner; 945 struct module *owner;
@@ -999,12 +954,14 @@ static int fcoe_ethdrv_get(const struct net_device *netdev)
999} 954}
1000 955
1001/** 956/**
1002 * fcoe_ethdrv_get - releases the nic driver module by module_put for 957 * fcoe_ethdrv_put() - Release the Ethernet driver
1003 * the corresponding netdev.
1004 * @netdev: the target netdev 958 * @netdev: the target netdev
1005 * 959 *
960 * Releases the Ethernet driver module by module_put for
961 * the corresponding netdev.
962 *
1006 * Returns: 0 for succsss 963 * Returns: 0 for succsss
1007 **/ 964 */
1008static int fcoe_ethdrv_put(const struct net_device *netdev) 965static int fcoe_ethdrv_put(const struct net_device *netdev)
1009{ 966{
1010 struct module *owner; 967 struct module *owner;
@@ -1020,12 +977,12 @@ static int fcoe_ethdrv_put(const struct net_device *netdev)
1020} 977}
1021 978
1022/** 979/**
1023 * fcoe_destroy- handles the destroy from sysfs 980 * fcoe_destroy() - handles the destroy from sysfs
1024 * @buffer: expcted to be a eth if name 981 * @buffer: expcted to be a eth if name
1025 * @kp: associated kernel param 982 * @kp: associated kernel param
1026 * 983 *
1027 * Returns: 0 for success 984 * Returns: 0 for success
1028 **/ 985 */
1029static int fcoe_destroy(const char *buffer, struct kernel_param *kp) 986static int fcoe_destroy(const char *buffer, struct kernel_param *kp)
1030{ 987{
1031 int rc; 988 int rc;
@@ -1058,12 +1015,12 @@ out_nodev:
1058} 1015}
1059 1016
1060/** 1017/**
1061 * fcoe_create - handles the create call from sysfs 1018 * fcoe_create() - Handles the create call from sysfs
1062 * @buffer: expcted to be a eth if name 1019 * @buffer: expcted to be a eth if name
1063 * @kp: associated kernel param 1020 * @kp: associated kernel param
1064 * 1021 *
1065 * Returns: 0 for success 1022 * Returns: 0 for success
1066 **/ 1023 */
1067static int fcoe_create(const char *buffer, struct kernel_param *kp) 1024static int fcoe_create(const char *buffer, struct kernel_param *kp)
1068{ 1025{
1069 int rc; 1026 int rc;
@@ -1104,8 +1061,8 @@ module_param_call(destroy, fcoe_destroy, NULL, NULL, S_IWUSR);
1104__MODULE_PARM_TYPE(destroy, "string"); 1061__MODULE_PARM_TYPE(destroy, "string");
1105MODULE_PARM_DESC(destroy, "Destroy fcoe port"); 1062MODULE_PARM_DESC(destroy, "Destroy fcoe port");
1106 1063
1107/* 1064/**
1108 * fcoe_link_ok - check if link is ok for the fc_lport 1065 * fcoe_link_ok() - Check if link is ok for the fc_lport
1109 * @lp: ptr to the fc_lport 1066 * @lp: ptr to the fc_lport
1110 * 1067 *
1111 * Any permanently-disqualifying conditions have been previously checked. 1068 * Any permanently-disqualifying conditions have been previously checked.
@@ -1120,7 +1077,7 @@ MODULE_PARM_DESC(destroy, "Destroy fcoe port");
1120 */ 1077 */
1121int fcoe_link_ok(struct fc_lport *lp) 1078int fcoe_link_ok(struct fc_lport *lp)
1122{ 1079{
1123 struct fcoe_softc *fc = fcoe_softc(lp); 1080 struct fcoe_softc *fc = lport_priv(lp);
1124 struct net_device *dev = fc->real_dev; 1081 struct net_device *dev = fc->real_dev;
1125 struct ethtool_cmd ecmd = { ETHTOOL_GSET }; 1082 struct ethtool_cmd ecmd = { ETHTOOL_GSET };
1126 int rc = 0; 1083 int rc = 0;
@@ -1149,9 +1106,8 @@ int fcoe_link_ok(struct fc_lport *lp)
1149} 1106}
1150EXPORT_SYMBOL_GPL(fcoe_link_ok); 1107EXPORT_SYMBOL_GPL(fcoe_link_ok);
1151 1108
1152/* 1109/**
1153 * fcoe_percpu_clean - frees skb of the corresponding lport from the per 1110 * fcoe_percpu_clean() - Clear the pending skbs for an lport
1154 * cpu queue.
1155 * @lp: the fc_lport 1111 * @lp: the fc_lport
1156 */ 1112 */
1157void fcoe_percpu_clean(struct fc_lport *lp) 1113void fcoe_percpu_clean(struct fc_lport *lp)
@@ -1185,11 +1141,11 @@ void fcoe_percpu_clean(struct fc_lport *lp)
1185EXPORT_SYMBOL_GPL(fcoe_percpu_clean); 1141EXPORT_SYMBOL_GPL(fcoe_percpu_clean);
1186 1142
1187/** 1143/**
1188 * fcoe_clean_pending_queue - dequeue skb and free it 1144 * fcoe_clean_pending_queue() - Dequeue a skb and free it
1189 * @lp: the corresponding fc_lport 1145 * @lp: the corresponding fc_lport
1190 * 1146 *
1191 * Returns: none 1147 * Returns: none
1192 **/ 1148 */
1193void fcoe_clean_pending_queue(struct fc_lport *lp) 1149void fcoe_clean_pending_queue(struct fc_lport *lp)
1194{ 1150{
1195 struct fcoe_softc *fc = lport_priv(lp); 1151 struct fcoe_softc *fc = lport_priv(lp);
@@ -1206,21 +1162,21 @@ void fcoe_clean_pending_queue(struct fc_lport *lp)
1206EXPORT_SYMBOL_GPL(fcoe_clean_pending_queue); 1162EXPORT_SYMBOL_GPL(fcoe_clean_pending_queue);
1207 1163
1208/** 1164/**
1209 * libfc_host_alloc - allocate a Scsi_Host with room for the fc_lport 1165 * libfc_host_alloc() - Allocate a Scsi_Host with room for the fc_lport
1210 * @sht: ptr to the scsi host templ 1166 * @sht: ptr to the scsi host templ
1211 * @priv_size: size of private data after fc_lport 1167 * @priv_size: size of private data after fc_lport
1212 * 1168 *
1213 * Returns: ptr to Scsi_Host 1169 * Returns: ptr to Scsi_Host
1214 * TODO - to libfc? 1170 * TODO: to libfc?
1215 */ 1171 */
1216static inline struct Scsi_Host *libfc_host_alloc( 1172static inline struct Scsi_Host *
1217 struct scsi_host_template *sht, int priv_size) 1173libfc_host_alloc(struct scsi_host_template *sht, int priv_size)
1218{ 1174{
1219 return scsi_host_alloc(sht, sizeof(struct fc_lport) + priv_size); 1175 return scsi_host_alloc(sht, sizeof(struct fc_lport) + priv_size);
1220} 1176}
1221 1177
1222/** 1178/**
1223 * fcoe_host_alloc - allocate a Scsi_Host with room for the fcoe_softc 1179 * fcoe_host_alloc() - Allocate a Scsi_Host with room for the fcoe_softc
1224 * @sht: ptr to the scsi host templ 1180 * @sht: ptr to the scsi host templ
1225 * @priv_size: size of private data after fc_lport 1181 * @priv_size: size of private data after fc_lport
1226 * 1182 *
@@ -1232,8 +1188,8 @@ struct Scsi_Host *fcoe_host_alloc(struct scsi_host_template *sht, int priv_size)
1232} 1188}
1233EXPORT_SYMBOL_GPL(fcoe_host_alloc); 1189EXPORT_SYMBOL_GPL(fcoe_host_alloc);
1234 1190
1235/* 1191/**
1236 * fcoe_reset - resets the fcoe 1192 * fcoe_reset() - Resets the fcoe
1237 * @shost: shost the reset is from 1193 * @shost: shost the reset is from
1238 * 1194 *
1239 * Returns: always 0 1195 * Returns: always 0
@@ -1246,8 +1202,8 @@ int fcoe_reset(struct Scsi_Host *shost)
1246} 1202}
1247EXPORT_SYMBOL_GPL(fcoe_reset); 1203EXPORT_SYMBOL_GPL(fcoe_reset);
1248 1204
1249/* 1205/**
1250 * fcoe_wwn_from_mac - converts 48-bit IEEE MAC address to 64-bit FC WWN. 1206 * fcoe_wwn_from_mac() - Converts 48-bit IEEE MAC address to 64-bit FC WWN.
1251 * @mac: mac address 1207 * @mac: mac address
1252 * @scheme: check port 1208 * @scheme: check port
1253 * @port: port indicator for converting 1209 * @port: port indicator for converting
@@ -1286,14 +1242,15 @@ u64 fcoe_wwn_from_mac(unsigned char mac[MAX_ADDR_LEN],
1286 return wwn; 1242 return wwn;
1287} 1243}
1288EXPORT_SYMBOL_GPL(fcoe_wwn_from_mac); 1244EXPORT_SYMBOL_GPL(fcoe_wwn_from_mac);
1289/* 1245
1290 * fcoe_hostlist_lookup_softc - find the corresponding lport by a given device 1246/**
1247 * fcoe_hostlist_lookup_softc() - find the corresponding lport by a given device
1291 * @device: this is currently ptr to net_device 1248 * @device: this is currently ptr to net_device
1292 * 1249 *
1293 * Returns: NULL or the located fcoe_softc 1250 * Returns: NULL or the located fcoe_softc
1294 */ 1251 */
1295static struct fcoe_softc *fcoe_hostlist_lookup_softc( 1252static struct fcoe_softc *
1296 const struct net_device *dev) 1253fcoe_hostlist_lookup_softc(const struct net_device *dev)
1297{ 1254{
1298 struct fcoe_softc *fc; 1255 struct fcoe_softc *fc;
1299 1256
@@ -1308,8 +1265,8 @@ static struct fcoe_softc *fcoe_hostlist_lookup_softc(
1308 return NULL; 1265 return NULL;
1309} 1266}
1310 1267
1311/* 1268/**
1312 * fcoe_hostlist_lookup - find the corresponding lport by netdev 1269 * fcoe_hostlist_lookup() - Find the corresponding lport by netdev
1313 * @netdev: ptr to net_device 1270 * @netdev: ptr to net_device
1314 * 1271 *
1315 * Returns: 0 for success 1272 * Returns: 0 for success
@@ -1324,8 +1281,8 @@ struct fc_lport *fcoe_hostlist_lookup(const struct net_device *netdev)
1324} 1281}
1325EXPORT_SYMBOL_GPL(fcoe_hostlist_lookup); 1282EXPORT_SYMBOL_GPL(fcoe_hostlist_lookup);
1326 1283
1327/* 1284/**
1328 * fcoe_hostlist_add - add a lport to lports list 1285 * fcoe_hostlist_add() - Add a lport to lports list
1329 * @lp: ptr to the fc_lport to badded 1286 * @lp: ptr to the fc_lport to badded
1330 * 1287 *
1331 * Returns: 0 for success 1288 * Returns: 0 for success
@@ -1336,7 +1293,7 @@ int fcoe_hostlist_add(const struct fc_lport *lp)
1336 1293
1337 fc = fcoe_hostlist_lookup_softc(fcoe_netdev(lp)); 1294 fc = fcoe_hostlist_lookup_softc(fcoe_netdev(lp));
1338 if (!fc) { 1295 if (!fc) {
1339 fc = fcoe_softc(lp); 1296 fc = lport_priv(lp);
1340 write_lock_bh(&fcoe_hostlist_lock); 1297 write_lock_bh(&fcoe_hostlist_lock);
1341 list_add_tail(&fc->list, &fcoe_hostlist); 1298 list_add_tail(&fc->list, &fcoe_hostlist);
1342 write_unlock_bh(&fcoe_hostlist_lock); 1299 write_unlock_bh(&fcoe_hostlist_lock);
@@ -1345,8 +1302,8 @@ int fcoe_hostlist_add(const struct fc_lport *lp)
1345} 1302}
1346EXPORT_SYMBOL_GPL(fcoe_hostlist_add); 1303EXPORT_SYMBOL_GPL(fcoe_hostlist_add);
1347 1304
1348/* 1305/**
1349 * fcoe_hostlist_remove - remove a lport from lports list 1306 * fcoe_hostlist_remove() - remove a lport from lports list
1350 * @lp: ptr to the fc_lport to badded 1307 * @lp: ptr to the fc_lport to badded
1351 * 1308 *
1352 * Returns: 0 for success 1309 * Returns: 0 for success
@@ -1366,12 +1323,12 @@ int fcoe_hostlist_remove(const struct fc_lport *lp)
1366EXPORT_SYMBOL_GPL(fcoe_hostlist_remove); 1323EXPORT_SYMBOL_GPL(fcoe_hostlist_remove);
1367 1324
1368/** 1325/**
1369 * fcoe_libfc_config - sets up libfc related properties for lport 1326 * fcoe_libfc_config() - sets up libfc related properties for lport
1370 * @lp: ptr to the fc_lport 1327 * @lp: ptr to the fc_lport
1371 * @tt: libfc function template 1328 * @tt: libfc function template
1372 * 1329 *
1373 * Returns : 0 for success 1330 * Returns : 0 for success
1374 **/ 1331 */
1375int fcoe_libfc_config(struct fc_lport *lp, struct libfc_function_template *tt) 1332int fcoe_libfc_config(struct fc_lport *lp, struct libfc_function_template *tt)
1376{ 1333{
1377 /* Set the function pointers set by the LLDD */ 1334 /* Set the function pointers set by the LLDD */
@@ -1389,14 +1346,14 @@ int fcoe_libfc_config(struct fc_lport *lp, struct libfc_function_template *tt)
1389EXPORT_SYMBOL_GPL(fcoe_libfc_config); 1346EXPORT_SYMBOL_GPL(fcoe_libfc_config);
1390 1347
1391/** 1348/**
1392 * fcoe_init - fcoe module loading initialization 1349 * fcoe_init() - fcoe module loading initialization
1393 * 1350 *
1394 * Initialization routine 1351 * Initialization routine
1395 * 1. Will create fc transport software structure 1352 * 1. Will create fc transport software structure
1396 * 2. initialize the link list of port information structure 1353 * 2. initialize the link list of port information structure
1397 * 1354 *
1398 * Returns 0 on success, negative on failure 1355 * Returns 0 on success, negative on failure
1399 **/ 1356 */
1400static int __init fcoe_init(void) 1357static int __init fcoe_init(void)
1401{ 1358{
1402 int cpu; 1359 int cpu;
@@ -1433,7 +1390,6 @@ static int __init fcoe_init(void)
1433 } else { 1390 } else {
1434 fcoe_percpu[cpu] = NULL; 1391 fcoe_percpu[cpu] = NULL;
1435 kfree(p); 1392 kfree(p);
1436
1437 } 1393 }
1438 } 1394 }
1439 } 1395 }
@@ -1443,11 +1399,9 @@ static int __init fcoe_init(void)
1443 */ 1399 */
1444 fcoe_dev_setup(); 1400 fcoe_dev_setup();
1445 1401
1446 init_timer(&fcoe_timer); 1402 setup_timer(&fcoe_timer, fcoe_watchdog, 0);
1447 fcoe_timer.data = 0; 1403
1448 fcoe_timer.function = fcoe_watchdog; 1404 mod_timer(&fcoe_timer, jiffies + (10 * HZ));
1449 fcoe_timer.expires = (jiffies + (10 * HZ));
1450 add_timer(&fcoe_timer);
1451 1405
1452 /* initiatlize the fcoe transport */ 1406 /* initiatlize the fcoe transport */
1453 fcoe_transport_init(); 1407 fcoe_transport_init();
@@ -1459,10 +1413,10 @@ static int __init fcoe_init(void)
1459module_init(fcoe_init); 1413module_init(fcoe_init);
1460 1414
1461/** 1415/**
1462 * fcoe_exit - fcoe module unloading cleanup 1416 * fcoe_exit() - fcoe module unloading cleanup
1463 * 1417 *
1464 * Returns 0 on success, negative on failure 1418 * Returns 0 on success, negative on failure
1465 **/ 1419 */
1466static void __exit fcoe_exit(void) 1420static void __exit fcoe_exit(void)
1467{ 1421{
1468 u32 idx; 1422 u32 idx;
@@ -1483,7 +1437,7 @@ static void __exit fcoe_exit(void)
1483 */ 1437 */
1484 del_timer_sync(&fcoe_timer); 1438 del_timer_sync(&fcoe_timer);
1485 1439
1486 /* releases the assocaited fcoe transport for each lport */ 1440 /* releases the associated fcoe transport for each lport */
1487 list_for_each_entry_safe(fc, tmp, &fcoe_hostlist, list) 1441 list_for_each_entry_safe(fc, tmp, &fcoe_hostlist, list)
1488 fcoe_transport_release(fc->real_dev); 1442 fcoe_transport_release(fc->real_dev);
1489 1443
diff --git a/drivers/scsi/lasi700.c b/drivers/scsi/lasi700.c
index 4a4e6954ec79..f23c4ca9a2ee 100644
--- a/drivers/scsi/lasi700.c
+++ b/drivers/scsi/lasi700.c
@@ -103,7 +103,7 @@ lasi700_probe(struct parisc_device *dev)
103 103
104 hostdata = kzalloc(sizeof(*hostdata), GFP_KERNEL); 104 hostdata = kzalloc(sizeof(*hostdata), GFP_KERNEL);
105 if (!hostdata) { 105 if (!hostdata) {
106 dev_printk(KERN_ERR, dev, "Failed to allocate host data\n"); 106 dev_printk(KERN_ERR, &dev->dev, "Failed to allocate host data\n");
107 return -ENOMEM; 107 return -ENOMEM;
108 } 108 }
109 109
diff --git a/drivers/scsi/libfc/fc_disc.c b/drivers/scsi/libfc/fc_disc.c
index dd1564c9e04a..e57556ea5b48 100644
--- a/drivers/scsi/libfc/fc_disc.c
+++ b/drivers/scsi/libfc/fc_disc.c
@@ -64,7 +64,7 @@ static void fc_disc_single(struct fc_disc *, struct fc_disc_port *);
64static void fc_disc_restart(struct fc_disc *); 64static void fc_disc_restart(struct fc_disc *);
65 65
66/** 66/**
67 * fc_disc_lookup_rport - lookup a remote port by port_id 67 * fc_disc_lookup_rport() - lookup a remote port by port_id
68 * @lport: Fibre Channel host port instance 68 * @lport: Fibre Channel host port instance
69 * @port_id: remote port port_id to match 69 * @port_id: remote port port_id to match
70 */ 70 */
@@ -92,7 +92,7 @@ struct fc_rport *fc_disc_lookup_rport(const struct fc_lport *lport,
92} 92}
93 93
94/** 94/**
95 * fc_disc_stop_rports - delete all the remote ports associated with the lport 95 * fc_disc_stop_rports() - delete all the remote ports associated with the lport
96 * @disc: The discovery job to stop rports on 96 * @disc: The discovery job to stop rports on
97 * 97 *
98 * Locking Note: This function expects that the lport mutex is locked before 98 * Locking Note: This function expects that the lport mutex is locked before
@@ -117,7 +117,7 @@ void fc_disc_stop_rports(struct fc_disc *disc)
117} 117}
118 118
119/** 119/**
120 * fc_disc_rport_callback - Event handler for rport events 120 * fc_disc_rport_callback() - Event handler for rport events
121 * @lport: The lport which is receiving the event 121 * @lport: The lport which is receiving the event
122 * @rport: The rport which the event has occured on 122 * @rport: The rport which the event has occured on
123 * @event: The event that occured 123 * @event: The event that occured
@@ -151,7 +151,7 @@ static void fc_disc_rport_callback(struct fc_lport *lport,
151} 151}
152 152
153/** 153/**
154 * fc_disc_recv_rscn_req - Handle Registered State Change Notification (RSCN) 154 * fc_disc_recv_rscn_req() - Handle Registered State Change Notification (RSCN)
155 * @sp: Current sequence of the RSCN exchange 155 * @sp: Current sequence of the RSCN exchange
156 * @fp: RSCN Frame 156 * @fp: RSCN Frame
157 * @lport: Fibre Channel host port instance 157 * @lport: Fibre Channel host port instance
@@ -246,7 +246,7 @@ static void fc_disc_recv_rscn_req(struct fc_seq *sp, struct fc_frame *fp,
246 list_del(&dp->peers); 246 list_del(&dp->peers);
247 rport = lport->tt.rport_lookup(lport, dp->ids.port_id); 247 rport = lport->tt.rport_lookup(lport, dp->ids.port_id);
248 if (rport) { 248 if (rport) {
249 rdata = RPORT_TO_PRIV(rport); 249 rdata = rport->dd_data;
250 list_del(&rdata->peers); 250 list_del(&rdata->peers);
251 lport->tt.rport_logoff(rport); 251 lport->tt.rport_logoff(rport);
252 } 252 }
@@ -265,7 +265,7 @@ reject:
265} 265}
266 266
267/** 267/**
268 * fc_disc_recv_req - Handle incoming requests 268 * fc_disc_recv_req() - Handle incoming requests
269 * @sp: Current sequence of the request exchange 269 * @sp: Current sequence of the request exchange
270 * @fp: The frame 270 * @fp: The frame
271 * @lport: The FC local port 271 * @lport: The FC local port
@@ -294,7 +294,7 @@ static void fc_disc_recv_req(struct fc_seq *sp, struct fc_frame *fp,
294} 294}
295 295
296/** 296/**
297 * fc_disc_restart - Restart discovery 297 * fc_disc_restart() - Restart discovery
298 * @lport: FC discovery context 298 * @lport: FC discovery context
299 * 299 *
300 * Locking Note: This function expects that the disc mutex 300 * Locking Note: This function expects that the disc mutex
@@ -322,7 +322,7 @@ static void fc_disc_restart(struct fc_disc *disc)
322} 322}
323 323
324/** 324/**
325 * fc_disc_start - Fibre Channel Target discovery 325 * fc_disc_start() - Fibre Channel Target discovery
326 * @lport: FC local port 326 * @lport: FC local port
327 * 327 *
328 * Returns non-zero if discovery cannot be started. 328 * Returns non-zero if discovery cannot be started.
@@ -383,7 +383,7 @@ static struct fc_rport_operations fc_disc_rport_ops = {
383}; 383};
384 384
385/** 385/**
386 * fc_disc_new_target - Handle new target found by discovery 386 * fc_disc_new_target() - Handle new target found by discovery
387 * @lport: FC local port 387 * @lport: FC local port
388 * @rport: The previous FC remote port (NULL if new remote port) 388 * @rport: The previous FC remote port (NULL if new remote port)
389 * @ids: Identifiers for the new FC remote port 389 * @ids: Identifiers for the new FC remote port
@@ -396,7 +396,7 @@ static int fc_disc_new_target(struct fc_disc *disc,
396 struct fc_rport_identifiers *ids) 396 struct fc_rport_identifiers *ids)
397{ 397{
398 struct fc_lport *lport = disc->lport; 398 struct fc_lport *lport = disc->lport;
399 struct fc_rport_libfc_priv *rp; 399 struct fc_rport_libfc_priv *rdata;
400 int error = 0; 400 int error = 0;
401 401
402 if (rport && ids->port_name) { 402 if (rport && ids->port_name) {
@@ -430,15 +430,15 @@ static int fc_disc_new_target(struct fc_disc *disc,
430 dp.ids.port_name = ids->port_name; 430 dp.ids.port_name = ids->port_name;
431 dp.ids.node_name = ids->node_name; 431 dp.ids.node_name = ids->node_name;
432 dp.ids.roles = ids->roles; 432 dp.ids.roles = ids->roles;
433 rport = fc_rport_rogue_create(&dp); 433 rport = lport->tt.rport_create(&dp);
434 } 434 }
435 if (!rport) 435 if (!rport)
436 error = -ENOMEM; 436 error = -ENOMEM;
437 } 437 }
438 if (rport) { 438 if (rport) {
439 rp = rport->dd_data; 439 rdata = rport->dd_data;
440 rp->ops = &fc_disc_rport_ops; 440 rdata->ops = &fc_disc_rport_ops;
441 rp->rp_state = RPORT_ST_INIT; 441 rdata->rp_state = RPORT_ST_INIT;
442 lport->tt.rport_login(rport); 442 lport->tt.rport_login(rport);
443 } 443 }
444 } 444 }
@@ -446,20 +446,20 @@ static int fc_disc_new_target(struct fc_disc *disc,
446} 446}
447 447
448/** 448/**
449 * fc_disc_del_target - Delete a target 449 * fc_disc_del_target() - Delete a target
450 * @disc: FC discovery context 450 * @disc: FC discovery context
451 * @rport: The remote port to be removed 451 * @rport: The remote port to be removed
452 */ 452 */
453static void fc_disc_del_target(struct fc_disc *disc, struct fc_rport *rport) 453static void fc_disc_del_target(struct fc_disc *disc, struct fc_rport *rport)
454{ 454{
455 struct fc_lport *lport = disc->lport; 455 struct fc_lport *lport = disc->lport;
456 struct fc_rport_libfc_priv *rdata = RPORT_TO_PRIV(rport); 456 struct fc_rport_libfc_priv *rdata = rport->dd_data;
457 list_del(&rdata->peers); 457 list_del(&rdata->peers);
458 lport->tt.rport_logoff(rport); 458 lport->tt.rport_logoff(rport);
459} 459}
460 460
461/** 461/**
462 * fc_disc_done - Discovery has been completed 462 * fc_disc_done() - Discovery has been completed
463 * @disc: FC discovery context 463 * @disc: FC discovery context
464 */ 464 */
465static void fc_disc_done(struct fc_disc *disc) 465static void fc_disc_done(struct fc_disc *disc)
@@ -479,7 +479,7 @@ static void fc_disc_done(struct fc_disc *disc)
479} 479}
480 480
481/** 481/**
482 * fc_disc_error - Handle error on dNS request 482 * fc_disc_error() - Handle error on dNS request
483 * @disc: FC discovery context 483 * @disc: FC discovery context
484 * @fp: The frame pointer 484 * @fp: The frame pointer
485 */ 485 */
@@ -519,7 +519,7 @@ static void fc_disc_error(struct fc_disc *disc, struct fc_frame *fp)
519} 519}
520 520
521/** 521/**
522 * fc_disc_gpn_ft_req - Send Get Port Names by FC-4 type (GPN_FT) request 522 * fc_disc_gpn_ft_req() - Send Get Port Names by FC-4 type (GPN_FT) request
523 * @lport: FC discovery context 523 * @lport: FC discovery context
524 * 524 *
525 * Locking Note: This function expects that the disc_mutex is locked 525 * Locking Note: This function expects that the disc_mutex is locked
@@ -553,7 +553,7 @@ err:
553} 553}
554 554
555/** 555/**
556 * fc_disc_gpn_ft_parse - Parse the list of IDs and names resulting from a request 556 * fc_disc_gpn_ft_parse() - Parse the list of IDs and names resulting from a request
557 * @lport: Fibre Channel host port instance 557 * @lport: Fibre Channel host port instance
558 * @buf: GPN_FT response buffer 558 * @buf: GPN_FT response buffer
559 * @len: size of response buffer 559 * @len: size of response buffer
@@ -617,7 +617,7 @@ static int fc_disc_gpn_ft_parse(struct fc_disc *disc, void *buf, size_t len)
617 617
618 if ((dp.ids.port_id != fc_host_port_id(lport->host)) && 618 if ((dp.ids.port_id != fc_host_port_id(lport->host)) &&
619 (dp.ids.port_name != lport->wwpn)) { 619 (dp.ids.port_name != lport->wwpn)) {
620 rport = fc_rport_rogue_create(&dp); 620 rport = lport->tt.rport_create(&dp);
621 if (rport) { 621 if (rport) {
622 rdata = rport->dd_data; 622 rdata = rport->dd_data;
623 rdata->ops = &fc_disc_rport_ops; 623 rdata->ops = &fc_disc_rport_ops;
@@ -658,7 +658,10 @@ static int fc_disc_gpn_ft_parse(struct fc_disc *disc, void *buf, size_t len)
658 return error; 658 return error;
659} 659}
660 660
661/* 661/**
662 * fc_disc_timeout() - Retry handler for the disc component
663 * @work: Structure holding disc obj that needs retry discovery
664 *
662 * Handle retry of memory allocation for remote ports. 665 * Handle retry of memory allocation for remote ports.
663 */ 666 */
664static void fc_disc_timeout(struct work_struct *work) 667static void fc_disc_timeout(struct work_struct *work)
@@ -673,7 +676,7 @@ static void fc_disc_timeout(struct work_struct *work)
673} 676}
674 677
675/** 678/**
676 * fc_disc_gpn_ft_resp - Handle a response frame from Get Port Names (GPN_FT) 679 * fc_disc_gpn_ft_resp() - Handle a response frame from Get Port Names (GPN_FT)
677 * @sp: Current sequence of GPN_FT exchange 680 * @sp: Current sequence of GPN_FT exchange
678 * @fp: response frame 681 * @fp: response frame
679 * @lp_arg: Fibre Channel host port instance 682 * @lp_arg: Fibre Channel host port instance
@@ -712,9 +715,7 @@ static void fc_disc_gpn_ft_resp(struct fc_seq *sp, struct fc_frame *fp,
712 fr_len(fp)); 715 fr_len(fp));
713 } else if (ntohs(cp->ct_cmd) == FC_FS_ACC) { 716 } else if (ntohs(cp->ct_cmd) == FC_FS_ACC) {
714 717
715 /* 718 /* Accepted, parse the response. */
716 * Accepted. Parse response.
717 */
718 buf = cp + 1; 719 buf = cp + 1;
719 len -= sizeof(*cp); 720 len -= sizeof(*cp);
720 } else if (ntohs(cp->ct_cmd) == FC_FS_RJT) { 721 } else if (ntohs(cp->ct_cmd) == FC_FS_RJT) {
@@ -746,7 +747,7 @@ static void fc_disc_gpn_ft_resp(struct fc_seq *sp, struct fc_frame *fp,
746} 747}
747 748
748/** 749/**
749 * fc_disc_single - Discover the directory information for a single target 750 * fc_disc_single() - Discover the directory information for a single target
750 * @lport: FC local port 751 * @lport: FC local port
751 * @dp: The port to rediscover 752 * @dp: The port to rediscover
752 * 753 *
@@ -769,7 +770,7 @@ static void fc_disc_single(struct fc_disc *disc, struct fc_disc_port *dp)
769 if (rport) 770 if (rport)
770 fc_disc_del_target(disc, rport); 771 fc_disc_del_target(disc, rport);
771 772
772 new_rport = fc_rport_rogue_create(dp); 773 new_rport = lport->tt.rport_create(dp);
773 if (new_rport) { 774 if (new_rport) {
774 rdata = new_rport->dd_data; 775 rdata = new_rport->dd_data;
775 rdata->ops = &fc_disc_rport_ops; 776 rdata->ops = &fc_disc_rport_ops;
@@ -782,7 +783,7 @@ out:
782} 783}
783 784
784/** 785/**
785 * fc_disc_stop - Stop discovery for a given lport 786 * fc_disc_stop() - Stop discovery for a given lport
786 * @lport: The lport that discovery should stop for 787 * @lport: The lport that discovery should stop for
787 */ 788 */
788void fc_disc_stop(struct fc_lport *lport) 789void fc_disc_stop(struct fc_lport *lport)
@@ -796,7 +797,7 @@ void fc_disc_stop(struct fc_lport *lport)
796} 797}
797 798
798/** 799/**
799 * fc_disc_stop_final - Stop discovery for a given lport 800 * fc_disc_stop_final() - Stop discovery for a given lport
800 * @lport: The lport that discovery should stop for 801 * @lport: The lport that discovery should stop for
801 * 802 *
802 * This function will block until discovery has been 803 * This function will block until discovery has been
@@ -809,7 +810,7 @@ void fc_disc_stop_final(struct fc_lport *lport)
809} 810}
810 811
811/** 812/**
812 * fc_disc_init - Initialize the discovery block 813 * fc_disc_init() - Initialize the discovery block
813 * @lport: FC local port 814 * @lport: FC local port
814 */ 815 */
815int fc_disc_init(struct fc_lport *lport) 816int fc_disc_init(struct fc_lport *lport)
diff --git a/drivers/scsi/libfc/fc_exch.c b/drivers/scsi/libfc/fc_exch.c
index 66db08a5f27f..505825b6124d 100644
--- a/drivers/scsi/libfc/fc_exch.c
+++ b/drivers/scsi/libfc/fc_exch.c
@@ -32,8 +32,6 @@
32#include <scsi/libfc.h> 32#include <scsi/libfc.h>
33#include <scsi/fc_encode.h> 33#include <scsi/fc_encode.h>
34 34
35#define FC_DEF_R_A_TOV (10 * 1000) /* resource allocation timeout */
36
37/* 35/*
38 * fc_exch_debug can be set in debugger or at compile time to get more logs. 36 * fc_exch_debug can be set in debugger or at compile time to get more logs.
39 */ 37 */
@@ -627,7 +625,6 @@ static struct fc_exch *fc_exch_resp(struct fc_exch_mgr *mp, struct fc_frame *fp)
627{ 625{
628 struct fc_exch *ep; 626 struct fc_exch *ep;
629 struct fc_frame_header *fh; 627 struct fc_frame_header *fh;
630 u16 rxid;
631 628
632 ep = mp->lp->tt.exch_get(mp->lp, fp); 629 ep = mp->lp->tt.exch_get(mp->lp, fp);
633 if (ep) { 630 if (ep) {
@@ -654,18 +651,6 @@ static struct fc_exch *fc_exch_resp(struct fc_exch_mgr *mp, struct fc_frame *fp)
654 if ((ntoh24(fh->fh_f_ctl) & FC_FC_SEQ_INIT) == 0) 651 if ((ntoh24(fh->fh_f_ctl) & FC_FC_SEQ_INIT) == 0)
655 ep->esb_stat &= ~ESB_ST_SEQ_INIT; 652 ep->esb_stat &= ~ESB_ST_SEQ_INIT;
656 653
657 /*
658 * Set the responder ID in the frame header.
659 * The old one should've been 0xffff.
660 * If it isn't, don't assign one.
661 * Incoming basic link service frames may specify
662 * a referenced RX_ID.
663 */
664 if (fh->fh_type != FC_TYPE_BLS) {
665 rxid = ntohs(fh->fh_rx_id);
666 WARN_ON(rxid != FC_XID_UNKNOWN);
667 fh->fh_rx_id = htons(ep->rxid);
668 }
669 fc_exch_hold(ep); /* hold for caller */ 654 fc_exch_hold(ep); /* hold for caller */
670 spin_unlock_bh(&ep->ex_lock); /* lock from exch_get */ 655 spin_unlock_bh(&ep->ex_lock); /* lock from exch_get */
671 } 656 }
@@ -677,8 +662,8 @@ static struct fc_exch *fc_exch_resp(struct fc_exch_mgr *mp, struct fc_frame *fp)
677 * If fc_pf_rjt_reason is FC_RJT_NONE then this function will have a hold 662 * If fc_pf_rjt_reason is FC_RJT_NONE then this function will have a hold
678 * on the ep that should be released by the caller. 663 * on the ep that should be released by the caller.
679 */ 664 */
680static enum fc_pf_rjt_reason 665static enum fc_pf_rjt_reason fc_seq_lookup_recip(struct fc_exch_mgr *mp,
681fc_seq_lookup_recip(struct fc_exch_mgr *mp, struct fc_frame *fp) 666 struct fc_frame *fp)
682{ 667{
683 struct fc_frame_header *fh = fc_frame_header_get(fp); 668 struct fc_frame_header *fh = fc_frame_header_get(fp);
684 struct fc_exch *ep = NULL; 669 struct fc_exch *ep = NULL;
@@ -996,9 +981,9 @@ static void fc_seq_send_ack(struct fc_seq *sp, const struct fc_frame *rx_fp)
996 * Send BLS Reject. 981 * Send BLS Reject.
997 * This is for rejecting BA_ABTS only. 982 * This is for rejecting BA_ABTS only.
998 */ 983 */
999static void 984static void fc_exch_send_ba_rjt(struct fc_frame *rx_fp,
1000fc_exch_send_ba_rjt(struct fc_frame *rx_fp, enum fc_ba_rjt_reason reason, 985 enum fc_ba_rjt_reason reason,
1001 enum fc_ba_rjt_explan explan) 986 enum fc_ba_rjt_explan explan)
1002{ 987{
1003 struct fc_frame *fp; 988 struct fc_frame *fp;
1004 struct fc_frame_header *rx_fh; 989 struct fc_frame_header *rx_fh;
@@ -1096,7 +1081,7 @@ static void fc_exch_recv_abts(struct fc_exch *ep, struct fc_frame *rx_fp)
1096 ap->ba_high_seq_cnt = fh->fh_seq_cnt; 1081 ap->ba_high_seq_cnt = fh->fh_seq_cnt;
1097 ap->ba_low_seq_cnt = htons(sp->cnt); 1082 ap->ba_low_seq_cnt = htons(sp->cnt);
1098 } 1083 }
1099 sp = fc_seq_start_next(sp); 1084 sp = fc_seq_start_next_locked(sp);
1100 spin_unlock_bh(&ep->ex_lock); 1085 spin_unlock_bh(&ep->ex_lock);
1101 fc_seq_send_last(sp, fp, FC_RCTL_BA_ACC, FC_TYPE_BLS); 1086 fc_seq_send_last(sp, fp, FC_RCTL_BA_ACC, FC_TYPE_BLS);
1102 fc_frame_free(rx_fp); 1087 fc_frame_free(rx_fp);
@@ -1480,10 +1465,11 @@ static void fc_exch_reset(struct fc_exch *ep)
1480 * If sid is non-zero, reset only exchanges we source from that FID. 1465 * If sid is non-zero, reset only exchanges we source from that FID.
1481 * If did is non-zero, reset only exchanges destined to that FID. 1466 * If did is non-zero, reset only exchanges destined to that FID.
1482 */ 1467 */
1483void fc_exch_mgr_reset(struct fc_exch_mgr *mp, u32 sid, u32 did) 1468void fc_exch_mgr_reset(struct fc_lport *lp, u32 sid, u32 did)
1484{ 1469{
1485 struct fc_exch *ep; 1470 struct fc_exch *ep;
1486 struct fc_exch *next; 1471 struct fc_exch *next;
1472 struct fc_exch_mgr *mp = lp->emp;
1487 1473
1488 spin_lock_bh(&mp->em_lock); 1474 spin_lock_bh(&mp->em_lock);
1489restart: 1475restart:
@@ -1607,7 +1593,7 @@ static void fc_exch_rrq_resp(struct fc_seq *sp, struct fc_frame *fp, void *arg)
1607 if (IS_ERR(fp)) { 1593 if (IS_ERR(fp)) {
1608 int err = PTR_ERR(fp); 1594 int err = PTR_ERR(fp);
1609 1595
1610 if (err == -FC_EX_CLOSED) 1596 if (err == -FC_EX_CLOSED || err == -FC_EX_TIMEOUT)
1611 goto cleanup; 1597 goto cleanup;
1612 FC_DBG("Cannot process RRQ, because of frame error %d\n", err); 1598 FC_DBG("Cannot process RRQ, because of frame error %d\n", err);
1613 return; 1599 return;
diff --git a/drivers/scsi/libfc/fc_fcp.c b/drivers/scsi/libfc/fc_fcp.c
index 404e63ff46b8..2a631d7dbcec 100644
--- a/drivers/scsi/libfc/fc_fcp.c
+++ b/drivers/scsi/libfc/fc_fcp.c
@@ -161,7 +161,7 @@ static struct fc_fcp_pkt *fc_fcp_pkt_alloc(struct fc_lport *lp, gfp_t gfp)
161} 161}
162 162
163/** 163/**
164 * fc_fcp_pkt_release - release hold on scsi_pkt packet 164 * fc_fcp_pkt_release() - release hold on scsi_pkt packet
165 * @fsp: fcp packet struct 165 * @fsp: fcp packet struct
166 * 166 *
167 * This is used by upper layer scsi driver. 167 * This is used by upper layer scsi driver.
@@ -183,8 +183,7 @@ static void fc_fcp_pkt_hold(struct fc_fcp_pkt *fsp)
183} 183}
184 184
185/** 185/**
186 * fc_fcp_pkt_destory - release hold on scsi_pkt packet 186 * fc_fcp_pkt_destory() - release hold on scsi_pkt packet
187 *
188 * @seq: exchange sequence 187 * @seq: exchange sequence
189 * @fsp: fcp packet struct 188 * @fsp: fcp packet struct
190 * 189 *
@@ -199,7 +198,7 @@ static void fc_fcp_pkt_destroy(struct fc_seq *seq, void *fsp)
199} 198}
200 199
201/** 200/**
202 * fc_fcp_lock_pkt - lock a packet and get a ref to it. 201 * fc_fcp_lock_pkt() - lock a packet and get a ref to it.
203 * @fsp: fcp packet 202 * @fsp: fcp packet
204 * 203 *
205 * We should only return error if we return a command to scsi-ml before 204 * We should only return error if we return a command to scsi-ml before
@@ -291,9 +290,7 @@ static void fc_fcp_recv_data(struct fc_fcp_pkt *fsp, struct fc_frame *fp)
291 buf = fc_frame_payload_get(fp, 0); 290 buf = fc_frame_payload_get(fp, 0);
292 291
293 if (offset + len > fsp->data_len) { 292 if (offset + len > fsp->data_len) {
294 /* 293 /* this should never happen */
295 * this should never happen
296 */
297 if ((fr_flags(fp) & FCPHF_CRC_UNCHECKED) && 294 if ((fr_flags(fp) & FCPHF_CRC_UNCHECKED) &&
298 fc_frame_crc_check(fp)) 295 fc_frame_crc_check(fp))
299 goto crc_err; 296 goto crc_err;
@@ -387,8 +384,8 @@ crc_err:
387 fc_fcp_complete_locked(fsp); 384 fc_fcp_complete_locked(fsp);
388} 385}
389 386
390/* 387/**
391 * fc_fcp_send_data - Send SCSI data to target. 388 * fc_fcp_send_data() - Send SCSI data to target.
392 * @fsp: ptr to fc_fcp_pkt 389 * @fsp: ptr to fc_fcp_pkt
393 * @sp: ptr to this sequence 390 * @sp: ptr to this sequence
394 * @offset: starting offset for this data request 391 * @offset: starting offset for this data request
@@ -610,8 +607,8 @@ static void fc_fcp_abts_resp(struct fc_fcp_pkt *fsp, struct fc_frame *fp)
610 } 607 }
611} 608}
612 609
613/* 610/**
614 * fc_fcp_reduce_can_queue - drop can_queue 611 * fc_fcp_reduce_can_queue() - drop can_queue
615 * @lp: lport to drop queueing for 612 * @lp: lport to drop queueing for
616 * 613 *
617 * If we are getting memory allocation failures, then we may 614 * If we are getting memory allocation failures, then we may
@@ -642,9 +639,11 @@ done:
642 spin_unlock_irqrestore(lp->host->host_lock, flags); 639 spin_unlock_irqrestore(lp->host->host_lock, flags);
643} 640}
644 641
645/* 642/**
646 * exch mgr calls this routine to process scsi 643 * fc_fcp_recv() - Reveive FCP frames
647 * exchanges. 644 * @seq: The sequence the frame is on
645 * @fp: The FC frame
646 * @arg: The related FCP packet
648 * 647 *
649 * Return : None 648 * Return : None
650 * Context : called from Soft IRQ context 649 * Context : called from Soft IRQ context
@@ -832,7 +831,7 @@ err:
832} 831}
833 832
834/** 833/**
835 * fc_fcp_complete_locked - complete processing of a fcp packet 834 * fc_fcp_complete_locked() - complete processing of a fcp packet
836 * @fsp: fcp packet 835 * @fsp: fcp packet
837 * 836 *
838 * This function may sleep if a timer is pending. The packet lock must be 837 * This function may sleep if a timer is pending. The packet lock must be
@@ -900,7 +899,7 @@ static void fc_fcp_cleanup_cmd(struct fc_fcp_pkt *fsp, int error)
900} 899}
901 900
902/** 901/**
903 * fc_fcp_cleanup_each_cmd - run fn on each active command 902 * fc_fcp_cleanup_each_cmd() - Cleanup active commads
904 * @lp: logical port 903 * @lp: logical port
905 * @id: target id 904 * @id: target id
906 * @lun: lun 905 * @lun: lun
@@ -952,7 +951,7 @@ static void fc_fcp_abort_io(struct fc_lport *lp)
952} 951}
953 952
954/** 953/**
955 * fc_fcp_pkt_send - send a fcp packet to the lower level. 954 * fc_fcp_pkt_send() - send a fcp packet to the lower level.
956 * @lp: fc lport 955 * @lp: fc lport
957 * @fsp: fc packet. 956 * @fsp: fc packet.
958 * 957 *
@@ -1621,7 +1620,7 @@ out:
1621static inline int fc_fcp_lport_queue_ready(struct fc_lport *lp) 1620static inline int fc_fcp_lport_queue_ready(struct fc_lport *lp)
1622{ 1621{
1623 /* lock ? */ 1622 /* lock ? */
1624 return (lp->state == LPORT_ST_READY) && (lp->link_status & FC_LINK_UP); 1623 return (lp->state == LPORT_ST_READY) && lp->link_up && !lp->qfull;
1625} 1624}
1626 1625
1627/** 1626/**
@@ -1727,7 +1726,7 @@ out:
1727EXPORT_SYMBOL(fc_queuecommand); 1726EXPORT_SYMBOL(fc_queuecommand);
1728 1727
1729/** 1728/**
1730 * fc_io_compl - Handle responses for completed commands 1729 * fc_io_compl() - Handle responses for completed commands
1731 * @fsp: scsi packet 1730 * @fsp: scsi packet
1732 * 1731 *
1733 * Translates a error to a Linux SCSI error. 1732 * Translates a error to a Linux SCSI error.
@@ -1810,12 +1809,12 @@ static void fc_io_compl(struct fc_fcp_pkt *fsp)
1810 sc_cmd->result = DID_ERROR << 16; 1809 sc_cmd->result = DID_ERROR << 16;
1811 break; 1810 break;
1812 case FC_DATA_UNDRUN: 1811 case FC_DATA_UNDRUN:
1813 if (fsp->cdb_status == 0) { 1812 if ((fsp->cdb_status == 0) && !(fsp->req_flags & FC_SRB_READ)) {
1814 /* 1813 /*
1815 * scsi status is good but transport level 1814 * scsi status is good but transport level
1816 * underrun. for read it should be an error?? 1815 * underrun.
1817 */ 1816 */
1818 sc_cmd->result = (DID_OK << 16) | fsp->cdb_status; 1817 sc_cmd->result = DID_OK << 16;
1819 } else { 1818 } else {
1820 /* 1819 /*
1821 * scsi got underrun, this is an error 1820 * scsi got underrun, this is an error
@@ -1857,7 +1856,7 @@ static void fc_io_compl(struct fc_fcp_pkt *fsp)
1857} 1856}
1858 1857
1859/** 1858/**
1860 * fc_fcp_complete - complete processing of a fcp packet 1859 * fc_fcp_complete() - complete processing of a fcp packet
1861 * @fsp: fcp packet 1860 * @fsp: fcp packet
1862 * 1861 *
1863 * This function may sleep if a fsp timer is pending. 1862 * This function may sleep if a fsp timer is pending.
@@ -1874,9 +1873,10 @@ void fc_fcp_complete(struct fc_fcp_pkt *fsp)
1874EXPORT_SYMBOL(fc_fcp_complete); 1873EXPORT_SYMBOL(fc_fcp_complete);
1875 1874
1876/** 1875/**
1877 * fc_eh_abort - Abort a command...from scsi host template 1876 * fc_eh_abort() - Abort a command
1878 * @sc_cmd: scsi command to abort 1877 * @sc_cmd: scsi command to abort
1879 * 1878 *
1879 * From scsi host template.
1880 * send ABTS to the target device and wait for the response 1880 * send ABTS to the target device and wait for the response
1881 * sc_cmd is the pointer to the command to be aborted. 1881 * sc_cmd is the pointer to the command to be aborted.
1882 */ 1882 */
@@ -1890,7 +1890,7 @@ int fc_eh_abort(struct scsi_cmnd *sc_cmd)
1890 lp = shost_priv(sc_cmd->device->host); 1890 lp = shost_priv(sc_cmd->device->host);
1891 if (lp->state != LPORT_ST_READY) 1891 if (lp->state != LPORT_ST_READY)
1892 return rc; 1892 return rc;
1893 else if (!(lp->link_status & FC_LINK_UP)) 1893 else if (!lp->link_up)
1894 return rc; 1894 return rc;
1895 1895
1896 spin_lock_irqsave(lp->host->host_lock, flags); 1896 spin_lock_irqsave(lp->host->host_lock, flags);
@@ -1920,7 +1920,7 @@ release_pkt:
1920EXPORT_SYMBOL(fc_eh_abort); 1920EXPORT_SYMBOL(fc_eh_abort);
1921 1921
1922/** 1922/**
1923 * fc_eh_device_reset: Reset a single LUN 1923 * fc_eh_device_reset() Reset a single LUN
1924 * @sc_cmd: scsi command 1924 * @sc_cmd: scsi command
1925 * 1925 *
1926 * Set from scsi host template to send tm cmd to the target and wait for the 1926 * Set from scsi host template to send tm cmd to the target and wait for the
@@ -1973,7 +1973,7 @@ out:
1973EXPORT_SYMBOL(fc_eh_device_reset); 1973EXPORT_SYMBOL(fc_eh_device_reset);
1974 1974
1975/** 1975/**
1976 * fc_eh_host_reset - The reset function will reset the ports on the host. 1976 * fc_eh_host_reset() - The reset function will reset the ports on the host.
1977 * @sc_cmd: scsi command 1977 * @sc_cmd: scsi command
1978 */ 1978 */
1979int fc_eh_host_reset(struct scsi_cmnd *sc_cmd) 1979int fc_eh_host_reset(struct scsi_cmnd *sc_cmd)
@@ -1999,7 +1999,7 @@ int fc_eh_host_reset(struct scsi_cmnd *sc_cmd)
1999EXPORT_SYMBOL(fc_eh_host_reset); 1999EXPORT_SYMBOL(fc_eh_host_reset);
2000 2000
2001/** 2001/**
2002 * fc_slave_alloc - configure queue depth 2002 * fc_slave_alloc() - configure queue depth
2003 * @sdev: scsi device 2003 * @sdev: scsi device
2004 * 2004 *
2005 * Configures queue depth based on host's cmd_per_len. If not set 2005 * Configures queue depth based on host's cmd_per_len. If not set
diff --git a/drivers/scsi/libfc/fc_lport.c b/drivers/scsi/libfc/fc_lport.c
index 0b9bdb1fb807..2ae50a1188e6 100644
--- a/drivers/scsi/libfc/fc_lport.c
+++ b/drivers/scsi/libfc/fc_lport.c
@@ -139,7 +139,7 @@ static int fc_frame_drop(struct fc_lport *lport, struct fc_frame *fp)
139} 139}
140 140
141/** 141/**
142 * fc_lport_rport_callback - Event handler for rport events 142 * fc_lport_rport_callback() - Event handler for rport events
143 * @lport: The lport which is receiving the event 143 * @lport: The lport which is receiving the event
144 * @rport: The rport which the event has occured on 144 * @rport: The rport which the event has occured on
145 * @event: The event that occured 145 * @event: The event that occured
@@ -195,7 +195,7 @@ static void fc_lport_rport_callback(struct fc_lport *lport,
195} 195}
196 196
197/** 197/**
198 * fc_lport_state - Return a string which represents the lport's state 198 * fc_lport_state() - Return a string which represents the lport's state
199 * @lport: The lport whose state is to converted to a string 199 * @lport: The lport whose state is to converted to a string
200 */ 200 */
201static const char *fc_lport_state(struct fc_lport *lport) 201static const char *fc_lport_state(struct fc_lport *lport)
@@ -209,7 +209,7 @@ static const char *fc_lport_state(struct fc_lport *lport)
209} 209}
210 210
211/** 211/**
212 * fc_lport_ptp_setup - Create an rport for point-to-point mode 212 * fc_lport_ptp_setup() - Create an rport for point-to-point mode
213 * @lport: The lport to attach the ptp rport to 213 * @lport: The lport to attach the ptp rport to
214 * @fid: The FID of the ptp rport 214 * @fid: The FID of the ptp rport
215 * @remote_wwpn: The WWPN of the ptp rport 215 * @remote_wwpn: The WWPN of the ptp rport
@@ -232,7 +232,7 @@ static void fc_lport_ptp_setup(struct fc_lport *lport,
232 lport->ptp_rp = NULL; 232 lport->ptp_rp = NULL;
233 } 233 }
234 234
235 lport->ptp_rp = fc_rport_rogue_create(&dp); 235 lport->ptp_rp = lport->tt.rport_create(&dp);
236 236
237 lport->tt.rport_login(lport->ptp_rp); 237 lport->tt.rport_login(lport->ptp_rp);
238 238
@@ -250,7 +250,7 @@ void fc_get_host_port_state(struct Scsi_Host *shost)
250{ 250{
251 struct fc_lport *lp = shost_priv(shost); 251 struct fc_lport *lp = shost_priv(shost);
252 252
253 if ((lp->link_status & FC_LINK_UP) == FC_LINK_UP) 253 if (lp->link_up)
254 fc_host_port_state(shost) = FC_PORTSTATE_ONLINE; 254 fc_host_port_state(shost) = FC_PORTSTATE_ONLINE;
255 else 255 else
256 fc_host_port_state(shost) = FC_PORTSTATE_OFFLINE; 256 fc_host_port_state(shost) = FC_PORTSTATE_OFFLINE;
@@ -351,7 +351,7 @@ static void fc_lport_add_fc4_type(struct fc_lport *lport, enum fc_fh_type type)
351} 351}
352 352
353/** 353/**
354 * fc_lport_recv_rlir_req - Handle received Registered Link Incident Report. 354 * fc_lport_recv_rlir_req() - Handle received Registered Link Incident Report.
355 * @lport: Fibre Channel local port recieving the RLIR 355 * @lport: Fibre Channel local port recieving the RLIR
356 * @sp: current sequence in the RLIR exchange 356 * @sp: current sequence in the RLIR exchange
357 * @fp: RLIR request frame 357 * @fp: RLIR request frame
@@ -370,7 +370,7 @@ static void fc_lport_recv_rlir_req(struct fc_seq *sp, struct fc_frame *fp,
370} 370}
371 371
372/** 372/**
373 * fc_lport_recv_echo_req - Handle received ECHO request 373 * fc_lport_recv_echo_req() - Handle received ECHO request
374 * @lport: Fibre Channel local port recieving the ECHO 374 * @lport: Fibre Channel local port recieving the ECHO
375 * @sp: current sequence in the ECHO exchange 375 * @sp: current sequence in the ECHO exchange
376 * @fp: ECHO request frame 376 * @fp: ECHO request frame
@@ -412,7 +412,7 @@ static void fc_lport_recv_echo_req(struct fc_seq *sp, struct fc_frame *in_fp,
412} 412}
413 413
414/** 414/**
415 * fc_lport_recv_echo_req - Handle received Request Node ID data request 415 * fc_lport_recv_echo_req() - Handle received Request Node ID data request
416 * @lport: Fibre Channel local port recieving the RNID 416 * @lport: Fibre Channel local port recieving the RNID
417 * @sp: current sequence in the RNID exchange 417 * @sp: current sequence in the RNID exchange
418 * @fp: RNID request frame 418 * @fp: RNID request frame
@@ -479,7 +479,7 @@ static void fc_lport_recv_rnid_req(struct fc_seq *sp, struct fc_frame *in_fp,
479} 479}
480 480
481/** 481/**
482 * fc_lport_recv_adisc_req - Handle received Address Discovery Request 482 * fc_lport_recv_adisc_req() - Handle received Address Discovery Request
483 * @lport: Fibre Channel local port recieving the ADISC 483 * @lport: Fibre Channel local port recieving the ADISC
484 * @sp: current sequence in the ADISC exchange 484 * @sp: current sequence in the ADISC exchange
485 * @fp: ADISC request frame 485 * @fp: ADISC request frame
@@ -529,7 +529,7 @@ static void fc_lport_recv_adisc_req(struct fc_seq *sp, struct fc_frame *in_fp,
529} 529}
530 530
531/** 531/**
532 * fc_lport_recv_logo_req - Handle received fabric LOGO request 532 * fc_lport_recv_logo_req() - Handle received fabric LOGO request
533 * @lport: Fibre Channel local port recieving the LOGO 533 * @lport: Fibre Channel local port recieving the LOGO
534 * @sp: current sequence in the LOGO exchange 534 * @sp: current sequence in the LOGO exchange
535 * @fp: LOGO request frame 535 * @fp: LOGO request frame
@@ -546,7 +546,7 @@ static void fc_lport_recv_logo_req(struct fc_seq *sp, struct fc_frame *fp,
546} 546}
547 547
548/** 548/**
549 * fc_fabric_login - Start the lport state machine 549 * fc_fabric_login() - Start the lport state machine
550 * @lport: The lport that should log into the fabric 550 * @lport: The lport that should log into the fabric
551 * 551 *
552 * Locking Note: This function should not be called 552 * Locking Note: This function should not be called
@@ -568,7 +568,7 @@ int fc_fabric_login(struct fc_lport *lport)
568EXPORT_SYMBOL(fc_fabric_login); 568EXPORT_SYMBOL(fc_fabric_login);
569 569
570/** 570/**
571 * fc_linkup - Handler for transport linkup events 571 * fc_linkup() - Handler for transport linkup events
572 * @lport: The lport whose link is up 572 * @lport: The lport whose link is up
573 */ 573 */
574void fc_linkup(struct fc_lport *lport) 574void fc_linkup(struct fc_lport *lport)
@@ -577,8 +577,8 @@ void fc_linkup(struct fc_lport *lport)
577 fc_host_port_id(lport->host)); 577 fc_host_port_id(lport->host));
578 578
579 mutex_lock(&lport->lp_mutex); 579 mutex_lock(&lport->lp_mutex);
580 if ((lport->link_status & FC_LINK_UP) != FC_LINK_UP) { 580 if (!lport->link_up) {
581 lport->link_status |= FC_LINK_UP; 581 lport->link_up = 1;
582 582
583 if (lport->state == LPORT_ST_RESET) 583 if (lport->state == LPORT_ST_RESET)
584 fc_lport_enter_flogi(lport); 584 fc_lport_enter_flogi(lport);
@@ -588,7 +588,7 @@ void fc_linkup(struct fc_lport *lport)
588EXPORT_SYMBOL(fc_linkup); 588EXPORT_SYMBOL(fc_linkup);
589 589
590/** 590/**
591 * fc_linkdown - Handler for transport linkdown events 591 * fc_linkdown() - Handler for transport linkdown events
592 * @lport: The lport whose link is down 592 * @lport: The lport whose link is down
593 */ 593 */
594void fc_linkdown(struct fc_lport *lport) 594void fc_linkdown(struct fc_lport *lport)
@@ -597,8 +597,8 @@ void fc_linkdown(struct fc_lport *lport)
597 FC_DEBUG_LPORT("Link is down for port (%6x)\n", 597 FC_DEBUG_LPORT("Link is down for port (%6x)\n",
598 fc_host_port_id(lport->host)); 598 fc_host_port_id(lport->host));
599 599
600 if ((lport->link_status & FC_LINK_UP) == FC_LINK_UP) { 600 if (lport->link_up) {
601 lport->link_status &= ~(FC_LINK_UP); 601 lport->link_up = 0;
602 fc_lport_enter_reset(lport); 602 fc_lport_enter_reset(lport);
603 lport->tt.fcp_cleanup(lport); 603 lport->tt.fcp_cleanup(lport);
604 } 604 }
@@ -607,48 +607,25 @@ void fc_linkdown(struct fc_lport *lport)
607EXPORT_SYMBOL(fc_linkdown); 607EXPORT_SYMBOL(fc_linkdown);
608 608
609/** 609/**
610 * fc_pause - Pause the flow of frames 610 * fc_fabric_logoff() - Logout of the fabric
611 * @lport: The lport to be paused
612 */
613void fc_pause(struct fc_lport *lport)
614{
615 mutex_lock(&lport->lp_mutex);
616 lport->link_status |= FC_PAUSE;
617 mutex_unlock(&lport->lp_mutex);
618}
619EXPORT_SYMBOL(fc_pause);
620
621/**
622 * fc_unpause - Unpause the flow of frames
623 * @lport: The lport to be unpaused
624 */
625void fc_unpause(struct fc_lport *lport)
626{
627 mutex_lock(&lport->lp_mutex);
628 lport->link_status &= ~(FC_PAUSE);
629 mutex_unlock(&lport->lp_mutex);
630}
631EXPORT_SYMBOL(fc_unpause);
632
633/**
634 * fc_fabric_logoff - Logout of the fabric
635 * @lport: fc_lport pointer to logoff the fabric 611 * @lport: fc_lport pointer to logoff the fabric
636 * 612 *
637 * Return value: 613 * Return value:
638 * 0 for success, -1 for failure 614 * 0 for success, -1 for failure
639 **/ 615 */
640int fc_fabric_logoff(struct fc_lport *lport) 616int fc_fabric_logoff(struct fc_lport *lport)
641{ 617{
642 lport->tt.disc_stop_final(lport); 618 lport->tt.disc_stop_final(lport);
643 mutex_lock(&lport->lp_mutex); 619 mutex_lock(&lport->lp_mutex);
644 fc_lport_enter_logo(lport); 620 fc_lport_enter_logo(lport);
645 mutex_unlock(&lport->lp_mutex); 621 mutex_unlock(&lport->lp_mutex);
622 cancel_delayed_work_sync(&lport->retry_work);
646 return 0; 623 return 0;
647} 624}
648EXPORT_SYMBOL(fc_fabric_logoff); 625EXPORT_SYMBOL(fc_fabric_logoff);
649 626
650/** 627/**
651 * fc_lport_destroy - unregister a fc_lport 628 * fc_lport_destroy() - unregister a fc_lport
652 * @lport: fc_lport pointer to unregister 629 * @lport: fc_lport pointer to unregister
653 * 630 *
654 * Return value: 631 * Return value:
@@ -658,26 +635,25 @@ EXPORT_SYMBOL(fc_fabric_logoff);
658 * clean-up all the allocated memory 635 * clean-up all the allocated memory
659 * and free up other system resources. 636 * and free up other system resources.
660 * 637 *
661 **/ 638 */
662int fc_lport_destroy(struct fc_lport *lport) 639int fc_lport_destroy(struct fc_lport *lport)
663{ 640{
664 lport->tt.frame_send = fc_frame_drop; 641 lport->tt.frame_send = fc_frame_drop;
665 lport->tt.fcp_abort_io(lport); 642 lport->tt.fcp_abort_io(lport);
666 lport->tt.exch_mgr_reset(lport->emp, 0, 0); 643 lport->tt.exch_mgr_reset(lport, 0, 0);
667 return 0; 644 return 0;
668} 645}
669EXPORT_SYMBOL(fc_lport_destroy); 646EXPORT_SYMBOL(fc_lport_destroy);
670 647
671/** 648/**
672 * fc_set_mfs - sets up the mfs for the corresponding fc_lport 649 * fc_set_mfs() - sets up the mfs for the corresponding fc_lport
673 * @lport: fc_lport pointer to unregister 650 * @lport: fc_lport pointer to unregister
674 * @mfs: the new mfs for fc_lport 651 * @mfs: the new mfs for fc_lport
675 * 652 *
676 * Set mfs for the given fc_lport to the new mfs. 653 * Set mfs for the given fc_lport to the new mfs.
677 * 654 *
678 * Return: 0 for success 655 * Return: 0 for success
679 * 656 */
680 **/
681int fc_set_mfs(struct fc_lport *lport, u32 mfs) 657int fc_set_mfs(struct fc_lport *lport, u32 mfs)
682{ 658{
683 unsigned int old_mfs; 659 unsigned int old_mfs;
@@ -706,7 +682,7 @@ int fc_set_mfs(struct fc_lport *lport, u32 mfs)
706EXPORT_SYMBOL(fc_set_mfs); 682EXPORT_SYMBOL(fc_set_mfs);
707 683
708/** 684/**
709 * fc_lport_disc_callback - Callback for discovery events 685 * fc_lport_disc_callback() - Callback for discovery events
710 * @lport: FC local port 686 * @lport: FC local port
711 * @event: The discovery event 687 * @event: The discovery event
712 */ 688 */
@@ -731,7 +707,7 @@ void fc_lport_disc_callback(struct fc_lport *lport, enum fc_disc_event event)
731} 707}
732 708
733/** 709/**
734 * fc_rport_enter_ready - Enter the ready state and start discovery 710 * fc_rport_enter_ready() - Enter the ready state and start discovery
735 * @lport: Fibre Channel local port that is ready 711 * @lport: Fibre Channel local port that is ready
736 * 712 *
737 * Locking Note: The lport lock is expected to be held before calling 713 * Locking Note: The lport lock is expected to be held before calling
@@ -748,7 +724,7 @@ static void fc_lport_enter_ready(struct fc_lport *lport)
748} 724}
749 725
750/** 726/**
751 * fc_lport_recv_flogi_req - Receive a FLOGI request 727 * fc_lport_recv_flogi_req() - Receive a FLOGI request
752 * @sp_in: The sequence the FLOGI is on 728 * @sp_in: The sequence the FLOGI is on
753 * @rx_fp: The frame the FLOGI is in 729 * @rx_fp: The frame the FLOGI is in
754 * @lport: The lport that recieved the request 730 * @lport: The lport that recieved the request
@@ -838,7 +814,7 @@ out:
838} 814}
839 815
840/** 816/**
841 * fc_lport_recv_req - The generic lport request handler 817 * fc_lport_recv_req() - The generic lport request handler
842 * @lport: The lport that received the request 818 * @lport: The lport that received the request
843 * @sp: The sequence the request is on 819 * @sp: The sequence the request is on
844 * @fp: The frame the request is in 820 * @fp: The frame the request is in
@@ -934,7 +910,7 @@ static void fc_lport_recv_req(struct fc_lport *lport, struct fc_seq *sp,
934} 910}
935 911
936/** 912/**
937 * fc_lport_reset - Reset an lport 913 * fc_lport_reset() - Reset an lport
938 * @lport: The lport which should be reset 914 * @lport: The lport which should be reset
939 * 915 *
940 * Locking Note: This functions should not be called with the 916 * Locking Note: This functions should not be called with the
@@ -942,6 +918,7 @@ static void fc_lport_recv_req(struct fc_lport *lport, struct fc_seq *sp,
942 */ 918 */
943int fc_lport_reset(struct fc_lport *lport) 919int fc_lport_reset(struct fc_lport *lport)
944{ 920{
921 cancel_delayed_work_sync(&lport->retry_work);
945 mutex_lock(&lport->lp_mutex); 922 mutex_lock(&lport->lp_mutex);
946 fc_lport_enter_reset(lport); 923 fc_lport_enter_reset(lport);
947 mutex_unlock(&lport->lp_mutex); 924 mutex_unlock(&lport->lp_mutex);
@@ -950,7 +927,7 @@ int fc_lport_reset(struct fc_lport *lport)
950EXPORT_SYMBOL(fc_lport_reset); 927EXPORT_SYMBOL(fc_lport_reset);
951 928
952/** 929/**
953 * fc_rport_enter_reset - Reset the local port 930 * fc_rport_enter_reset() - Reset the local port
954 * @lport: Fibre Channel local port to be reset 931 * @lport: Fibre Channel local port to be reset
955 * 932 *
956 * Locking Note: The lport lock is expected to be held before calling 933 * Locking Note: The lport lock is expected to be held before calling
@@ -973,16 +950,16 @@ static void fc_lport_enter_reset(struct fc_lport *lport)
973 950
974 lport->tt.disc_stop(lport); 951 lport->tt.disc_stop(lport);
975 952
976 lport->tt.exch_mgr_reset(lport->emp, 0, 0); 953 lport->tt.exch_mgr_reset(lport, 0, 0);
977 fc_host_fabric_name(lport->host) = 0; 954 fc_host_fabric_name(lport->host) = 0;
978 fc_host_port_id(lport->host) = 0; 955 fc_host_port_id(lport->host) = 0;
979 956
980 if ((lport->link_status & FC_LINK_UP) == FC_LINK_UP) 957 if (lport->link_up)
981 fc_lport_enter_flogi(lport); 958 fc_lport_enter_flogi(lport);
982} 959}
983 960
984/** 961/**
985 * fc_lport_error - Handler for any errors 962 * fc_lport_error() - Handler for any errors
986 * @lport: The fc_lport object 963 * @lport: The fc_lport object
987 * @fp: The frame pointer 964 * @fp: The frame pointer
988 * 965 *
@@ -1029,8 +1006,8 @@ static void fc_lport_error(struct fc_lport *lport, struct fc_frame *fp)
1029} 1006}
1030 1007
1031/** 1008/**
1032 * fc_lport_rft_id_resp - Handle response to Register Fibre 1009 * fc_lport_rft_id_resp() - Handle response to Register Fibre
1033 * Channel Types by ID (RPN_ID) request 1010 * Channel Types by ID (RPN_ID) request
1034 * @sp: current sequence in RPN_ID exchange 1011 * @sp: current sequence in RPN_ID exchange
1035 * @fp: response frame 1012 * @fp: response frame
1036 * @lp_arg: Fibre Channel host port instance 1013 * @lp_arg: Fibre Channel host port instance
@@ -1053,17 +1030,17 @@ static void fc_lport_rft_id_resp(struct fc_seq *sp, struct fc_frame *fp,
1053 1030
1054 FC_DEBUG_LPORT("Received a RFT_ID response\n"); 1031 FC_DEBUG_LPORT("Received a RFT_ID response\n");
1055 1032
1033 if (IS_ERR(fp)) {
1034 fc_lport_error(lport, fp);
1035 goto err;
1036 }
1037
1056 if (lport->state != LPORT_ST_RFT_ID) { 1038 if (lport->state != LPORT_ST_RFT_ID) {
1057 FC_DBG("Received a RFT_ID response, but in state %s\n", 1039 FC_DBG("Received a RFT_ID response, but in state %s\n",
1058 fc_lport_state(lport)); 1040 fc_lport_state(lport));
1059 goto out; 1041 goto out;
1060 } 1042 }
1061 1043
1062 if (IS_ERR(fp)) {
1063 fc_lport_error(lport, fp);
1064 goto err;
1065 }
1066
1067 fh = fc_frame_header_get(fp); 1044 fh = fc_frame_header_get(fp);
1068 ct = fc_frame_payload_get(fp, sizeof(*ct)); 1045 ct = fc_frame_payload_get(fp, sizeof(*ct));
1069 1046
@@ -1081,8 +1058,8 @@ err:
1081} 1058}
1082 1059
1083/** 1060/**
1084 * fc_lport_rpn_id_resp - Handle response to Register Port 1061 * fc_lport_rpn_id_resp() - Handle response to Register Port
1085 * Name by ID (RPN_ID) request 1062 * Name by ID (RPN_ID) request
1086 * @sp: current sequence in RPN_ID exchange 1063 * @sp: current sequence in RPN_ID exchange
1087 * @fp: response frame 1064 * @fp: response frame
1088 * @lp_arg: Fibre Channel host port instance 1065 * @lp_arg: Fibre Channel host port instance
@@ -1105,17 +1082,17 @@ static void fc_lport_rpn_id_resp(struct fc_seq *sp, struct fc_frame *fp,
1105 1082
1106 FC_DEBUG_LPORT("Received a RPN_ID response\n"); 1083 FC_DEBUG_LPORT("Received a RPN_ID response\n");
1107 1084
1085 if (IS_ERR(fp)) {
1086 fc_lport_error(lport, fp);
1087 goto err;
1088 }
1089
1108 if (lport->state != LPORT_ST_RPN_ID) { 1090 if (lport->state != LPORT_ST_RPN_ID) {
1109 FC_DBG("Received a RPN_ID response, but in state %s\n", 1091 FC_DBG("Received a RPN_ID response, but in state %s\n",
1110 fc_lport_state(lport)); 1092 fc_lport_state(lport));
1111 goto out; 1093 goto out;
1112 } 1094 }
1113 1095
1114 if (IS_ERR(fp)) {
1115 fc_lport_error(lport, fp);
1116 goto err;
1117 }
1118
1119 fh = fc_frame_header_get(fp); 1096 fh = fc_frame_header_get(fp);
1120 ct = fc_frame_payload_get(fp, sizeof(*ct)); 1097 ct = fc_frame_payload_get(fp, sizeof(*ct));
1121 if (fh && ct && fh->fh_type == FC_TYPE_CT && 1098 if (fh && ct && fh->fh_type == FC_TYPE_CT &&
@@ -1133,7 +1110,7 @@ err:
1133} 1110}
1134 1111
1135/** 1112/**
1136 * fc_lport_scr_resp - Handle response to State Change Register (SCR) request 1113 * fc_lport_scr_resp() - Handle response to State Change Register (SCR) request
1137 * @sp: current sequence in SCR exchange 1114 * @sp: current sequence in SCR exchange
1138 * @fp: response frame 1115 * @fp: response frame
1139 * @lp_arg: Fibre Channel lport port instance that sent the registration request 1116 * @lp_arg: Fibre Channel lport port instance that sent the registration request
@@ -1155,17 +1132,17 @@ static void fc_lport_scr_resp(struct fc_seq *sp, struct fc_frame *fp,
1155 1132
1156 FC_DEBUG_LPORT("Received a SCR response\n"); 1133 FC_DEBUG_LPORT("Received a SCR response\n");
1157 1134
1135 if (IS_ERR(fp)) {
1136 fc_lport_error(lport, fp);
1137 goto err;
1138 }
1139
1158 if (lport->state != LPORT_ST_SCR) { 1140 if (lport->state != LPORT_ST_SCR) {
1159 FC_DBG("Received a SCR response, but in state %s\n", 1141 FC_DBG("Received a SCR response, but in state %s\n",
1160 fc_lport_state(lport)); 1142 fc_lport_state(lport));
1161 goto out; 1143 goto out;
1162 } 1144 }
1163 1145
1164 if (IS_ERR(fp)) {
1165 fc_lport_error(lport, fp);
1166 goto err;
1167 }
1168
1169 op = fc_frame_payload_op(fp); 1146 op = fc_frame_payload_op(fp);
1170 if (op == ELS_LS_ACC) 1147 if (op == ELS_LS_ACC)
1171 fc_lport_enter_ready(lport); 1148 fc_lport_enter_ready(lport);
@@ -1179,7 +1156,7 @@ err:
1179} 1156}
1180 1157
1181/** 1158/**
1182 * fc_lport_enter_scr - Send a State Change Register (SCR) request 1159 * fc_lport_enter_scr() - Send a State Change Register (SCR) request
1183 * @lport: Fibre Channel local port to register for state changes 1160 * @lport: Fibre Channel local port to register for state changes
1184 * 1161 *
1185 * Locking Note: The lport lock is expected to be held before calling 1162 * Locking Note: The lport lock is expected to be held before calling
@@ -1206,7 +1183,7 @@ static void fc_lport_enter_scr(struct fc_lport *lport)
1206} 1183}
1207 1184
1208/** 1185/**
1209 * fc_lport_enter_rft_id - Register FC4-types with the name server 1186 * fc_lport_enter_rft_id() - Register FC4-types with the name server
1210 * @lport: Fibre Channel local port to register 1187 * @lport: Fibre Channel local port to register
1211 * 1188 *
1212 * Locking Note: The lport lock is expected to be held before calling 1189 * Locking Note: The lport lock is expected to be held before calling
@@ -1248,7 +1225,7 @@ static void fc_lport_enter_rft_id(struct fc_lport *lport)
1248} 1225}
1249 1226
1250/** 1227/**
1251 * fc_rport_enter_rft_id - Register port name with the name server 1228 * fc_rport_enter_rft_id() - Register port name with the name server
1252 * @lport: Fibre Channel local port to register 1229 * @lport: Fibre Channel local port to register
1253 * 1230 *
1254 * Locking Note: The lport lock is expected to be held before calling 1231 * Locking Note: The lport lock is expected to be held before calling
@@ -1281,7 +1258,7 @@ static struct fc_rport_operations fc_lport_rport_ops = {
1281}; 1258};
1282 1259
1283/** 1260/**
1284 * fc_rport_enter_dns - Create a rport to the name server 1261 * fc_rport_enter_dns() - Create a rport to the name server
1285 * @lport: Fibre Channel local port requesting a rport for the name server 1262 * @lport: Fibre Channel local port requesting a rport for the name server
1286 * 1263 *
1287 * Locking Note: The lport lock is expected to be held before calling 1264 * Locking Note: The lport lock is expected to be held before calling
@@ -1304,7 +1281,7 @@ static void fc_lport_enter_dns(struct fc_lport *lport)
1304 1281
1305 fc_lport_state_enter(lport, LPORT_ST_DNS); 1282 fc_lport_state_enter(lport, LPORT_ST_DNS);
1306 1283
1307 rport = fc_rport_rogue_create(&dp); 1284 rport = lport->tt.rport_create(&dp);
1308 if (!rport) 1285 if (!rport)
1309 goto err; 1286 goto err;
1310 1287
@@ -1318,7 +1295,7 @@ err:
1318} 1295}
1319 1296
1320/** 1297/**
1321 * fc_lport_timeout - Handler for the retry_work timer. 1298 * fc_lport_timeout() - Handler for the retry_work timer.
1322 * @work: The work struct of the fc_lport 1299 * @work: The work struct of the fc_lport
1323 */ 1300 */
1324static void fc_lport_timeout(struct work_struct *work) 1301static void fc_lport_timeout(struct work_struct *work)
@@ -1359,7 +1336,7 @@ static void fc_lport_timeout(struct work_struct *work)
1359} 1336}
1360 1337
1361/** 1338/**
1362 * fc_lport_logo_resp - Handle response to LOGO request 1339 * fc_lport_logo_resp() - Handle response to LOGO request
1363 * @sp: current sequence in LOGO exchange 1340 * @sp: current sequence in LOGO exchange
1364 * @fp: response frame 1341 * @fp: response frame
1365 * @lp_arg: Fibre Channel lport port instance that sent the LOGO request 1342 * @lp_arg: Fibre Channel lport port instance that sent the LOGO request
@@ -1381,17 +1358,17 @@ static void fc_lport_logo_resp(struct fc_seq *sp, struct fc_frame *fp,
1381 1358
1382 FC_DEBUG_LPORT("Received a LOGO response\n"); 1359 FC_DEBUG_LPORT("Received a LOGO response\n");
1383 1360
1361 if (IS_ERR(fp)) {
1362 fc_lport_error(lport, fp);
1363 goto err;
1364 }
1365
1384 if (lport->state != LPORT_ST_LOGO) { 1366 if (lport->state != LPORT_ST_LOGO) {
1385 FC_DBG("Received a LOGO response, but in state %s\n", 1367 FC_DBG("Received a LOGO response, but in state %s\n",
1386 fc_lport_state(lport)); 1368 fc_lport_state(lport));
1387 goto out; 1369 goto out;
1388 } 1370 }
1389 1371
1390 if (IS_ERR(fp)) {
1391 fc_lport_error(lport, fp);
1392 goto err;
1393 }
1394
1395 op = fc_frame_payload_op(fp); 1372 op = fc_frame_payload_op(fp);
1396 if (op == ELS_LS_ACC) 1373 if (op == ELS_LS_ACC)
1397 fc_lport_enter_reset(lport); 1374 fc_lport_enter_reset(lport);
@@ -1405,7 +1382,7 @@ err:
1405} 1382}
1406 1383
1407/** 1384/**
1408 * fc_rport_enter_logo - Logout of the fabric 1385 * fc_rport_enter_logo() - Logout of the fabric
1409 * @lport: Fibre Channel local port to be logged out 1386 * @lport: Fibre Channel local port to be logged out
1410 * 1387 *
1411 * Locking Note: The lport lock is expected to be held before calling 1388 * Locking Note: The lport lock is expected to be held before calling
@@ -1437,7 +1414,7 @@ static void fc_lport_enter_logo(struct fc_lport *lport)
1437} 1414}
1438 1415
1439/** 1416/**
1440 * fc_lport_flogi_resp - Handle response to FLOGI request 1417 * fc_lport_flogi_resp() - Handle response to FLOGI request
1441 * @sp: current sequence in FLOGI exchange 1418 * @sp: current sequence in FLOGI exchange
1442 * @fp: response frame 1419 * @fp: response frame
1443 * @lp_arg: Fibre Channel lport port instance that sent the FLOGI request 1420 * @lp_arg: Fibre Channel lport port instance that sent the FLOGI request
@@ -1465,17 +1442,17 @@ static void fc_lport_flogi_resp(struct fc_seq *sp, struct fc_frame *fp,
1465 1442
1466 FC_DEBUG_LPORT("Received a FLOGI response\n"); 1443 FC_DEBUG_LPORT("Received a FLOGI response\n");
1467 1444
1445 if (IS_ERR(fp)) {
1446 fc_lport_error(lport, fp);
1447 goto err;
1448 }
1449
1468 if (lport->state != LPORT_ST_FLOGI) { 1450 if (lport->state != LPORT_ST_FLOGI) {
1469 FC_DBG("Received a FLOGI response, but in state %s\n", 1451 FC_DBG("Received a FLOGI response, but in state %s\n",
1470 fc_lport_state(lport)); 1452 fc_lport_state(lport));
1471 goto out; 1453 goto out;
1472 } 1454 }
1473 1455
1474 if (IS_ERR(fp)) {
1475 fc_lport_error(lport, fp);
1476 goto err;
1477 }
1478
1479 fh = fc_frame_header_get(fp); 1456 fh = fc_frame_header_get(fp);
1480 did = ntoh24(fh->fh_d_id); 1457 did = ntoh24(fh->fh_d_id);
1481 if (fc_frame_payload_op(fp) == ELS_LS_ACC && did != 0) { 1458 if (fc_frame_payload_op(fp) == ELS_LS_ACC && did != 0) {
@@ -1532,7 +1509,7 @@ err:
1532} 1509}
1533 1510
1534/** 1511/**
1535 * fc_rport_enter_flogi - Send a FLOGI request to the fabric manager 1512 * fc_rport_enter_flogi() - Send a FLOGI request to the fabric manager
1536 * @lport: Fibre Channel local port to be logged in to the fabric 1513 * @lport: Fibre Channel local port to be logged in to the fabric
1537 * 1514 *
1538 * Locking Note: The lport lock is expected to be held before calling 1515 * Locking Note: The lport lock is expected to be held before calling
diff --git a/drivers/scsi/libfc/fc_rport.c b/drivers/scsi/libfc/fc_rport.c
index e780d8caf70e..dae65133a833 100644
--- a/drivers/scsi/libfc/fc_rport.c
+++ b/drivers/scsi/libfc/fc_rport.c
@@ -81,6 +81,7 @@ static void fc_rport_recv_logo_req(struct fc_rport *,
81 struct fc_seq *, struct fc_frame *); 81 struct fc_seq *, struct fc_frame *);
82static void fc_rport_timeout(struct work_struct *); 82static void fc_rport_timeout(struct work_struct *);
83static void fc_rport_error(struct fc_rport *, struct fc_frame *); 83static void fc_rport_error(struct fc_rport *, struct fc_frame *);
84static void fc_rport_error_retry(struct fc_rport *, struct fc_frame *);
84static void fc_rport_work(struct work_struct *); 85static void fc_rport_work(struct work_struct *);
85 86
86static const char *fc_rport_state_names[] = { 87static const char *fc_rport_state_names[] = {
@@ -145,7 +146,7 @@ struct fc_rport *fc_rport_rogue_create(struct fc_disc_port *dp)
145} 146}
146 147
147/** 148/**
148 * fc_rport_state - return a string for the state the rport is in 149 * fc_rport_state() - return a string for the state the rport is in
149 * @rport: The rport whose state we want to get a string for 150 * @rport: The rport whose state we want to get a string for
150 */ 151 */
151static const char *fc_rport_state(struct fc_rport *rport) 152static const char *fc_rport_state(struct fc_rport *rport)
@@ -160,7 +161,7 @@ static const char *fc_rport_state(struct fc_rport *rport)
160} 161}
161 162
162/** 163/**
163 * fc_set_rport_loss_tmo - Set the remote port loss timeout in seconds. 164 * fc_set_rport_loss_tmo() - Set the remote port loss timeout in seconds.
164 * @rport: Pointer to Fibre Channel remote port structure 165 * @rport: Pointer to Fibre Channel remote port structure
165 * @timeout: timeout in seconds 166 * @timeout: timeout in seconds
166 */ 167 */
@@ -174,12 +175,12 @@ void fc_set_rport_loss_tmo(struct fc_rport *rport, u32 timeout)
174EXPORT_SYMBOL(fc_set_rport_loss_tmo); 175EXPORT_SYMBOL(fc_set_rport_loss_tmo);
175 176
176/** 177/**
177 * fc_plogi_get_maxframe - Get max payload from the common service parameters 178 * fc_plogi_get_maxframe() - Get max payload from the common service parameters
178 * @flp: FLOGI payload structure 179 * @flp: FLOGI payload structure
179 * @maxval: upper limit, may be less than what is in the service parameters 180 * @maxval: upper limit, may be less than what is in the service parameters
180 */ 181 */
181static unsigned int 182static unsigned int fc_plogi_get_maxframe(struct fc_els_flogi *flp,
182fc_plogi_get_maxframe(struct fc_els_flogi *flp, unsigned int maxval) 183 unsigned int maxval)
183{ 184{
184 unsigned int mfs; 185 unsigned int mfs;
185 186
@@ -197,7 +198,7 @@ fc_plogi_get_maxframe(struct fc_els_flogi *flp, unsigned int maxval)
197} 198}
198 199
199/** 200/**
200 * fc_rport_state_enter - Change the rport's state 201 * fc_rport_state_enter() - Change the rport's state
201 * @rport: The rport whose state should change 202 * @rport: The rport whose state should change
202 * @new: The new state of the rport 203 * @new: The new state of the rport
203 * 204 *
@@ -214,6 +215,7 @@ static void fc_rport_state_enter(struct fc_rport *rport,
214 215
215static void fc_rport_work(struct work_struct *work) 216static void fc_rport_work(struct work_struct *work)
216{ 217{
218 u32 port_id;
217 struct fc_rport_libfc_priv *rdata = 219 struct fc_rport_libfc_priv *rdata =
218 container_of(work, struct fc_rport_libfc_priv, event_work); 220 container_of(work, struct fc_rport_libfc_priv, event_work);
219 enum fc_rport_event event; 221 enum fc_rport_event event;
@@ -279,14 +281,18 @@ static void fc_rport_work(struct work_struct *work)
279 rport_ops->event_callback(lport, rport, event); 281 rport_ops->event_callback(lport, rport, event);
280 if (trans_state == FC_PORTSTATE_ROGUE) 282 if (trans_state == FC_PORTSTATE_ROGUE)
281 put_device(&rport->dev); 283 put_device(&rport->dev);
282 else 284 else {
285 port_id = rport->port_id;
283 fc_remote_port_delete(rport); 286 fc_remote_port_delete(rport);
287 lport->tt.exch_mgr_reset(lport, 0, port_id);
288 lport->tt.exch_mgr_reset(lport, port_id, 0);
289 }
284 } else 290 } else
285 mutex_unlock(&rdata->rp_mutex); 291 mutex_unlock(&rdata->rp_mutex);
286} 292}
287 293
288/** 294/**
289 * fc_rport_login - Start the remote port login state machine 295 * fc_rport_login() - Start the remote port login state machine
290 * @rport: Fibre Channel remote port 296 * @rport: Fibre Channel remote port
291 * 297 *
292 * Locking Note: Called without the rport lock held. This 298 * Locking Note: Called without the rport lock held. This
@@ -309,7 +315,7 @@ int fc_rport_login(struct fc_rport *rport)
309} 315}
310 316
311/** 317/**
312 * fc_rport_logoff - Logoff and remove an rport 318 * fc_rport_logoff() - Logoff and remove an rport
313 * @rport: Fibre Channel remote port to be removed 319 * @rport: Fibre Channel remote port to be removed
314 * 320 *
315 * Locking Note: Called without the rport lock held. This 321 * Locking Note: Called without the rport lock held. This
@@ -347,7 +353,7 @@ int fc_rport_logoff(struct fc_rport *rport)
347} 353}
348 354
349/** 355/**
350 * fc_rport_enter_ready - The rport is ready 356 * fc_rport_enter_ready() - The rport is ready
351 * @rport: Fibre Channel remote port that is ready 357 * @rport: Fibre Channel remote port that is ready
352 * 358 *
353 * Locking Note: The rport lock is expected to be held before calling 359 * Locking Note: The rport lock is expected to be held before calling
@@ -366,7 +372,7 @@ static void fc_rport_enter_ready(struct fc_rport *rport)
366} 372}
367 373
368/** 374/**
369 * fc_rport_timeout - Handler for the retry_work timer. 375 * fc_rport_timeout() - Handler for the retry_work timer.
370 * @work: The work struct of the fc_rport_libfc_priv 376 * @work: The work struct of the fc_rport_libfc_priv
371 * 377 *
372 * Locking Note: Called without the rport lock held. This 378 * Locking Note: Called without the rport lock held. This
@@ -405,59 +411,75 @@ static void fc_rport_timeout(struct work_struct *work)
405} 411}
406 412
407/** 413/**
408 * fc_rport_error - Handler for any errors 414 * fc_rport_error() - Error handler, called once retries have been exhausted
409 * @rport: The fc_rport object 415 * @rport: The fc_rport object
410 * @fp: The frame pointer 416 * @fp: The frame pointer
411 * 417 *
412 * If the error was caused by a resource allocation failure
413 * then wait for half a second and retry, otherwise retry
414 * immediately.
415 *
416 * Locking Note: The rport lock is expected to be held before 418 * Locking Note: The rport lock is expected to be held before
417 * calling this routine 419 * calling this routine
418 */ 420 */
419static void fc_rport_error(struct fc_rport *rport, struct fc_frame *fp) 421static void fc_rport_error(struct fc_rport *rport, struct fc_frame *fp)
420{ 422{
421 struct fc_rport_libfc_priv *rdata = rport->dd_data; 423 struct fc_rport_libfc_priv *rdata = rport->dd_data;
422 unsigned long delay = 0;
423 424
424 FC_DEBUG_RPORT("Error %ld in state %s, retries %d\n", 425 FC_DEBUG_RPORT("Error %ld in state %s, retries %d\n",
425 PTR_ERR(fp), fc_rport_state(rport), rdata->retries); 426 PTR_ERR(fp), fc_rport_state(rport), rdata->retries);
426 427
427 if (!fp || PTR_ERR(fp) == -FC_EX_TIMEOUT) { 428 switch (rdata->rp_state) {
428 /* 429 case RPORT_ST_PLOGI:
429 * Memory allocation failure, or the exchange timed out. 430 case RPORT_ST_PRLI:
430 * Retry after delay 431 case RPORT_ST_LOGO:
431 */ 432 rdata->event = RPORT_EV_FAILED;
432 if (rdata->retries < rdata->local_port->max_retry_count) { 433 queue_work(rport_event_queue,
433 rdata->retries++; 434 &rdata->event_work);
434 if (!fp) 435 break;
435 delay = msecs_to_jiffies(500); 436 case RPORT_ST_RTV:
436 get_device(&rport->dev); 437 fc_rport_enter_ready(rport);
437 schedule_delayed_work(&rdata->retry_work, delay); 438 break;
438 } else { 439 case RPORT_ST_NONE:
439 switch (rdata->rp_state) { 440 case RPORT_ST_READY:
440 case RPORT_ST_PLOGI: 441 case RPORT_ST_INIT:
441 case RPORT_ST_PRLI: 442 break;
442 case RPORT_ST_LOGO:
443 rdata->event = RPORT_EV_FAILED;
444 queue_work(rport_event_queue,
445 &rdata->event_work);
446 break;
447 case RPORT_ST_RTV:
448 fc_rport_enter_ready(rport);
449 break;
450 case RPORT_ST_NONE:
451 case RPORT_ST_READY:
452 case RPORT_ST_INIT:
453 break;
454 }
455 }
456 } 443 }
457} 444}
458 445
459/** 446/**
460 * fc_rport_plogi_recv_resp - Handle incoming ELS PLOGI response 447 * fc_rport_error_retry() - Error handler when retries are desired
448 * @rport: The fc_rport object
449 * @fp: The frame pointer
450 *
451 * If the error was an exchange timeout retry immediately,
452 * otherwise wait for E_D_TOV.
453 *
454 * Locking Note: The rport lock is expected to be held before
455 * calling this routine
456 */
457static void fc_rport_error_retry(struct fc_rport *rport, struct fc_frame *fp)
458{
459 struct fc_rport_libfc_priv *rdata = rport->dd_data;
460 unsigned long delay = FC_DEF_E_D_TOV;
461
462 /* make sure this isn't an FC_EX_CLOSED error, never retry those */
463 if (PTR_ERR(fp) == -FC_EX_CLOSED)
464 return fc_rport_error(rport, fp);
465
466 if (rdata->retries < rdata->local_port->max_retry_count) {
467 FC_DEBUG_RPORT("Error %ld in state %s, retrying\n",
468 PTR_ERR(fp), fc_rport_state(rport));
469 rdata->retries++;
470 /* no additional delay on exchange timeouts */
471 if (PTR_ERR(fp) == -FC_EX_TIMEOUT)
472 delay = 0;
473 get_device(&rport->dev);
474 schedule_delayed_work(&rdata->retry_work, delay);
475 return;
476 }
477
478 return fc_rport_error(rport, fp);
479}
480
481/**
482 * fc_rport_plogi_recv_resp() - Handle incoming ELS PLOGI response
461 * @sp: current sequence in the PLOGI exchange 483 * @sp: current sequence in the PLOGI exchange
462 * @fp: response frame 484 * @fp: response frame
463 * @rp_arg: Fibre Channel remote port 485 * @rp_arg: Fibre Channel remote port
@@ -483,17 +505,17 @@ static void fc_rport_plogi_resp(struct fc_seq *sp, struct fc_frame *fp,
483 FC_DEBUG_RPORT("Received a PLOGI response from port (%6x)\n", 505 FC_DEBUG_RPORT("Received a PLOGI response from port (%6x)\n",
484 rport->port_id); 506 rport->port_id);
485 507
508 if (IS_ERR(fp)) {
509 fc_rport_error_retry(rport, fp);
510 goto err;
511 }
512
486 if (rdata->rp_state != RPORT_ST_PLOGI) { 513 if (rdata->rp_state != RPORT_ST_PLOGI) {
487 FC_DBG("Received a PLOGI response, but in state %s\n", 514 FC_DBG("Received a PLOGI response, but in state %s\n",
488 fc_rport_state(rport)); 515 fc_rport_state(rport));
489 goto out; 516 goto out;
490 } 517 }
491 518
492 if (IS_ERR(fp)) {
493 fc_rport_error(rport, fp);
494 goto err;
495 }
496
497 op = fc_frame_payload_op(fp); 519 op = fc_frame_payload_op(fp);
498 if (op == ELS_LS_ACC && 520 if (op == ELS_LS_ACC &&
499 (plp = fc_frame_payload_get(fp, sizeof(*plp))) != NULL) { 521 (plp = fc_frame_payload_get(fp, sizeof(*plp))) != NULL) {
@@ -522,7 +544,7 @@ static void fc_rport_plogi_resp(struct fc_seq *sp, struct fc_frame *fp,
522 else 544 else
523 fc_rport_enter_prli(rport); 545 fc_rport_enter_prli(rport);
524 } else 546 } else
525 fc_rport_error(rport, fp); 547 fc_rport_error_retry(rport, fp);
526 548
527out: 549out:
528 fc_frame_free(fp); 550 fc_frame_free(fp);
@@ -532,7 +554,7 @@ err:
532} 554}
533 555
534/** 556/**
535 * fc_rport_enter_plogi - Send Port Login (PLOGI) request to peer 557 * fc_rport_enter_plogi() - Send Port Login (PLOGI) request to peer
536 * @rport: Fibre Channel remote port to send PLOGI to 558 * @rport: Fibre Channel remote port to send PLOGI to
537 * 559 *
538 * Locking Note: The rport lock is expected to be held before calling 560 * Locking Note: The rport lock is expected to be held before calling
@@ -552,20 +574,20 @@ static void fc_rport_enter_plogi(struct fc_rport *rport)
552 rport->maxframe_size = FC_MIN_MAX_PAYLOAD; 574 rport->maxframe_size = FC_MIN_MAX_PAYLOAD;
553 fp = fc_frame_alloc(lport, sizeof(struct fc_els_flogi)); 575 fp = fc_frame_alloc(lport, sizeof(struct fc_els_flogi));
554 if (!fp) { 576 if (!fp) {
555 fc_rport_error(rport, fp); 577 fc_rport_error_retry(rport, fp);
556 return; 578 return;
557 } 579 }
558 rdata->e_d_tov = lport->e_d_tov; 580 rdata->e_d_tov = lport->e_d_tov;
559 581
560 if (!lport->tt.elsct_send(lport, rport, fp, ELS_PLOGI, 582 if (!lport->tt.elsct_send(lport, rport, fp, ELS_PLOGI,
561 fc_rport_plogi_resp, rport, lport->e_d_tov)) 583 fc_rport_plogi_resp, rport, lport->e_d_tov))
562 fc_rport_error(rport, fp); 584 fc_rport_error_retry(rport, fp);
563 else 585 else
564 get_device(&rport->dev); 586 get_device(&rport->dev);
565} 587}
566 588
567/** 589/**
568 * fc_rport_prli_resp - Process Login (PRLI) response handler 590 * fc_rport_prli_resp() - Process Login (PRLI) response handler
569 * @sp: current sequence in the PRLI exchange 591 * @sp: current sequence in the PRLI exchange
570 * @fp: response frame 592 * @fp: response frame
571 * @rp_arg: Fibre Channel remote port 593 * @rp_arg: Fibre Channel remote port
@@ -592,17 +614,17 @@ static void fc_rport_prli_resp(struct fc_seq *sp, struct fc_frame *fp,
592 FC_DEBUG_RPORT("Received a PRLI response from port (%6x)\n", 614 FC_DEBUG_RPORT("Received a PRLI response from port (%6x)\n",
593 rport->port_id); 615 rport->port_id);
594 616
617 if (IS_ERR(fp)) {
618 fc_rport_error_retry(rport, fp);
619 goto err;
620 }
621
595 if (rdata->rp_state != RPORT_ST_PRLI) { 622 if (rdata->rp_state != RPORT_ST_PRLI) {
596 FC_DBG("Received a PRLI response, but in state %s\n", 623 FC_DBG("Received a PRLI response, but in state %s\n",
597 fc_rport_state(rport)); 624 fc_rport_state(rport));
598 goto out; 625 goto out;
599 } 626 }
600 627
601 if (IS_ERR(fp)) {
602 fc_rport_error(rport, fp);
603 goto err;
604 }
605
606 op = fc_frame_payload_op(fp); 628 op = fc_frame_payload_op(fp);
607 if (op == ELS_LS_ACC) { 629 if (op == ELS_LS_ACC) {
608 pp = fc_frame_payload_get(fp, sizeof(*pp)); 630 pp = fc_frame_payload_get(fp, sizeof(*pp));
@@ -635,7 +657,7 @@ err:
635} 657}
636 658
637/** 659/**
638 * fc_rport_logo_resp - Logout (LOGO) response handler 660 * fc_rport_logo_resp() - Logout (LOGO) response handler
639 * @sp: current sequence in the LOGO exchange 661 * @sp: current sequence in the LOGO exchange
640 * @fp: response frame 662 * @fp: response frame
641 * @rp_arg: Fibre Channel remote port 663 * @rp_arg: Fibre Channel remote port
@@ -657,7 +679,7 @@ static void fc_rport_logo_resp(struct fc_seq *sp, struct fc_frame *fp,
657 rport->port_id); 679 rport->port_id);
658 680
659 if (IS_ERR(fp)) { 681 if (IS_ERR(fp)) {
660 fc_rport_error(rport, fp); 682 fc_rport_error_retry(rport, fp);
661 goto err; 683 goto err;
662 } 684 }
663 685
@@ -684,7 +706,7 @@ err:
684} 706}
685 707
686/** 708/**
687 * fc_rport_enter_prli - Send Process Login (PRLI) request to peer 709 * fc_rport_enter_prli() - Send Process Login (PRLI) request to peer
688 * @rport: Fibre Channel remote port to send PRLI to 710 * @rport: Fibre Channel remote port to send PRLI to
689 * 711 *
690 * Locking Note: The rport lock is expected to be held before calling 712 * Locking Note: The rport lock is expected to be held before calling
@@ -707,19 +729,19 @@ static void fc_rport_enter_prli(struct fc_rport *rport)
707 729
708 fp = fc_frame_alloc(lport, sizeof(*pp)); 730 fp = fc_frame_alloc(lport, sizeof(*pp));
709 if (!fp) { 731 if (!fp) {
710 fc_rport_error(rport, fp); 732 fc_rport_error_retry(rport, fp);
711 return; 733 return;
712 } 734 }
713 735
714 if (!lport->tt.elsct_send(lport, rport, fp, ELS_PRLI, 736 if (!lport->tt.elsct_send(lport, rport, fp, ELS_PRLI,
715 fc_rport_prli_resp, rport, lport->e_d_tov)) 737 fc_rport_prli_resp, rport, lport->e_d_tov))
716 fc_rport_error(rport, fp); 738 fc_rport_error_retry(rport, fp);
717 else 739 else
718 get_device(&rport->dev); 740 get_device(&rport->dev);
719} 741}
720 742
721/** 743/**
722 * fc_rport_els_rtv_resp - Request Timeout Value response handler 744 * fc_rport_els_rtv_resp() - Request Timeout Value response handler
723 * @sp: current sequence in the RTV exchange 745 * @sp: current sequence in the RTV exchange
724 * @fp: response frame 746 * @fp: response frame
725 * @rp_arg: Fibre Channel remote port 747 * @rp_arg: Fibre Channel remote port
@@ -742,17 +764,17 @@ static void fc_rport_rtv_resp(struct fc_seq *sp, struct fc_frame *fp,
742 FC_DEBUG_RPORT("Received a RTV response from port (%6x)\n", 764 FC_DEBUG_RPORT("Received a RTV response from port (%6x)\n",
743 rport->port_id); 765 rport->port_id);
744 766
767 if (IS_ERR(fp)) {
768 fc_rport_error(rport, fp);
769 goto err;
770 }
771
745 if (rdata->rp_state != RPORT_ST_RTV) { 772 if (rdata->rp_state != RPORT_ST_RTV) {
746 FC_DBG("Received a RTV response, but in state %s\n", 773 FC_DBG("Received a RTV response, but in state %s\n",
747 fc_rport_state(rport)); 774 fc_rport_state(rport));
748 goto out; 775 goto out;
749 } 776 }
750 777
751 if (IS_ERR(fp)) {
752 fc_rport_error(rport, fp);
753 goto err;
754 }
755
756 op = fc_frame_payload_op(fp); 778 op = fc_frame_payload_op(fp);
757 if (op == ELS_LS_ACC) { 779 if (op == ELS_LS_ACC) {
758 struct fc_els_rtv_acc *rtv; 780 struct fc_els_rtv_acc *rtv;
@@ -785,7 +807,7 @@ err:
785} 807}
786 808
787/** 809/**
788 * fc_rport_enter_rtv - Send Request Timeout Value (RTV) request to peer 810 * fc_rport_enter_rtv() - Send Request Timeout Value (RTV) request to peer
789 * @rport: Fibre Channel remote port to send RTV to 811 * @rport: Fibre Channel remote port to send RTV to
790 * 812 *
791 * Locking Note: The rport lock is expected to be held before calling 813 * Locking Note: The rport lock is expected to be held before calling
@@ -804,19 +826,19 @@ static void fc_rport_enter_rtv(struct fc_rport *rport)
804 826
805 fp = fc_frame_alloc(lport, sizeof(struct fc_els_rtv)); 827 fp = fc_frame_alloc(lport, sizeof(struct fc_els_rtv));
806 if (!fp) { 828 if (!fp) {
807 fc_rport_error(rport, fp); 829 fc_rport_error_retry(rport, fp);
808 return; 830 return;
809 } 831 }
810 832
811 if (!lport->tt.elsct_send(lport, rport, fp, ELS_RTV, 833 if (!lport->tt.elsct_send(lport, rport, fp, ELS_RTV,
812 fc_rport_rtv_resp, rport, lport->e_d_tov)) 834 fc_rport_rtv_resp, rport, lport->e_d_tov))
813 fc_rport_error(rport, fp); 835 fc_rport_error_retry(rport, fp);
814 else 836 else
815 get_device(&rport->dev); 837 get_device(&rport->dev);
816} 838}
817 839
818/** 840/**
819 * fc_rport_enter_logo - Send Logout (LOGO) request to peer 841 * fc_rport_enter_logo() - Send Logout (LOGO) request to peer
820 * @rport: Fibre Channel remote port to send LOGO to 842 * @rport: Fibre Channel remote port to send LOGO to
821 * 843 *
822 * Locking Note: The rport lock is expected to be held before calling 844 * Locking Note: The rport lock is expected to be held before calling
@@ -835,20 +857,20 @@ static void fc_rport_enter_logo(struct fc_rport *rport)
835 857
836 fp = fc_frame_alloc(lport, sizeof(struct fc_els_logo)); 858 fp = fc_frame_alloc(lport, sizeof(struct fc_els_logo));
837 if (!fp) { 859 if (!fp) {
838 fc_rport_error(rport, fp); 860 fc_rport_error_retry(rport, fp);
839 return; 861 return;
840 } 862 }
841 863
842 if (!lport->tt.elsct_send(lport, rport, fp, ELS_LOGO, 864 if (!lport->tt.elsct_send(lport, rport, fp, ELS_LOGO,
843 fc_rport_logo_resp, rport, lport->e_d_tov)) 865 fc_rport_logo_resp, rport, lport->e_d_tov))
844 fc_rport_error(rport, fp); 866 fc_rport_error_retry(rport, fp);
845 else 867 else
846 get_device(&rport->dev); 868 get_device(&rport->dev);
847} 869}
848 870
849 871
850/** 872/**
851 * fc_rport_recv_req - Receive a request from a rport 873 * fc_rport_recv_req() - Receive a request from a rport
852 * @sp: current sequence in the PLOGI exchange 874 * @sp: current sequence in the PLOGI exchange
853 * @fp: response frame 875 * @fp: response frame
854 * @rp_arg: Fibre Channel remote port 876 * @rp_arg: Fibre Channel remote port
@@ -909,7 +931,7 @@ void fc_rport_recv_req(struct fc_seq *sp, struct fc_frame *fp,
909} 931}
910 932
911/** 933/**
912 * fc_rport_recv_plogi_req - Handle incoming Port Login (PLOGI) request 934 * fc_rport_recv_plogi_req() - Handle incoming Port Login (PLOGI) request
913 * @rport: Fibre Channel remote port that initiated PLOGI 935 * @rport: Fibre Channel remote port that initiated PLOGI
914 * @sp: current sequence in the PLOGI exchange 936 * @sp: current sequence in the PLOGI exchange
915 * @fp: PLOGI request frame 937 * @fp: PLOGI request frame
@@ -1031,7 +1053,7 @@ static void fc_rport_recv_plogi_req(struct fc_rport *rport,
1031} 1053}
1032 1054
1033/** 1055/**
1034 * fc_rport_recv_prli_req - Handle incoming Process Login (PRLI) request 1056 * fc_rport_recv_prli_req() - Handle incoming Process Login (PRLI) request
1035 * @rport: Fibre Channel remote port that initiated PRLI 1057 * @rport: Fibre Channel remote port that initiated PRLI
1036 * @sp: current sequence in the PRLI exchange 1058 * @sp: current sequence in the PRLI exchange
1037 * @fp: PRLI request frame 1059 * @fp: PRLI request frame
@@ -1182,7 +1204,7 @@ static void fc_rport_recv_prli_req(struct fc_rport *rport,
1182} 1204}
1183 1205
1184/** 1206/**
1185 * fc_rport_recv_prlo_req - Handle incoming Process Logout (PRLO) request 1207 * fc_rport_recv_prlo_req() - Handle incoming Process Logout (PRLO) request
1186 * @rport: Fibre Channel remote port that initiated PRLO 1208 * @rport: Fibre Channel remote port that initiated PRLO
1187 * @sp: current sequence in the PRLO exchange 1209 * @sp: current sequence in the PRLO exchange
1188 * @fp: PRLO request frame 1210 * @fp: PRLO request frame
@@ -1213,7 +1235,7 @@ static void fc_rport_recv_prlo_req(struct fc_rport *rport, struct fc_seq *sp,
1213} 1235}
1214 1236
1215/** 1237/**
1216 * fc_rport_recv_logo_req - Handle incoming Logout (LOGO) request 1238 * fc_rport_recv_logo_req() - Handle incoming Logout (LOGO) request
1217 * @rport: Fibre Channel remote port that initiated LOGO 1239 * @rport: Fibre Channel remote port that initiated LOGO
1218 * @sp: current sequence in the LOGO exchange 1240 * @sp: current sequence in the LOGO exchange
1219 * @fp: LOGO request frame 1241 * @fp: LOGO request frame
@@ -1249,6 +1271,9 @@ static void fc_rport_flush_queue(void)
1249 1271
1250int fc_rport_init(struct fc_lport *lport) 1272int fc_rport_init(struct fc_lport *lport)
1251{ 1273{
1274 if (!lport->tt.rport_create)
1275 lport->tt.rport_create = fc_rport_rogue_create;
1276
1252 if (!lport->tt.rport_login) 1277 if (!lport->tt.rport_login)
1253 lport->tt.rport_login = fc_rport_login; 1278 lport->tt.rport_login = fc_rport_login;
1254 1279
@@ -1285,7 +1310,7 @@ void fc_rport_terminate_io(struct fc_rport *rport)
1285 struct fc_rport_libfc_priv *rdata = rport->dd_data; 1310 struct fc_rport_libfc_priv *rdata = rport->dd_data;
1286 struct fc_lport *lport = rdata->local_port; 1311 struct fc_lport *lport = rdata->local_port;
1287 1312
1288 lport->tt.exch_mgr_reset(lport->emp, 0, rport->port_id); 1313 lport->tt.exch_mgr_reset(lport, 0, rport->port_id);
1289 lport->tt.exch_mgr_reset(lport->emp, rport->port_id, 0); 1314 lport->tt.exch_mgr_reset(lport, rport->port_id, 0);
1290} 1315}
1291EXPORT_SYMBOL(fc_rport_terminate_io); 1316EXPORT_SYMBOL(fc_rport_terminate_io);
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c
index f4c57227ec18..ee9d40152430 100644
--- a/drivers/scsi/qla2xxx/qla_attr.c
+++ b/drivers/scsi/qla2xxx/qla_attr.c
@@ -244,12 +244,6 @@ qla2x00_sysfs_write_optrom_ctl(struct kobject *kobj,
244 if (ha->optrom_state != QLA_SWAITING) 244 if (ha->optrom_state != QLA_SWAITING)
245 break; 245 break;
246 246
247 if (start & 0xfff) {
248 qla_printk(KERN_WARNING, ha,
249 "Invalid start region 0x%x/0x%x.\n", start, size);
250 return -EINVAL;
251 }
252
253 ha->optrom_region_start = start; 247 ha->optrom_region_start = start;
254 ha->optrom_region_size = start + size > ha->optrom_size ? 248 ha->optrom_region_size = start + size > ha->optrom_size ?
255 ha->optrom_size - start : size; 249 ha->optrom_size - start : size;
@@ -303,8 +297,7 @@ qla2x00_sysfs_write_optrom_ctl(struct kobject *kobj,
303 else if (start == (ha->flt_region_boot * 4) || 297 else if (start == (ha->flt_region_boot * 4) ||
304 start == (ha->flt_region_fw * 4)) 298 start == (ha->flt_region_fw * 4))
305 valid = 1; 299 valid = 1;
306 else if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && 300 else if (IS_QLA25XX(ha) || IS_QLA81XX(ha))
307 start == (ha->flt_region_vpd_nvram * 4))
308 valid = 1; 301 valid = 1;
309 if (!valid) { 302 if (!valid) {
310 qla_printk(KERN_WARNING, ha, 303 qla_printk(KERN_WARNING, ha,
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index 986501759ad4..87f9abc71460 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -1308,8 +1308,12 @@ qla2x00_init_rings(scsi_qla_host_t *vha)
1308 1308
1309 DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no)); 1309 DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
1310 1310
1311 if (ha->flags.npiv_supported) 1311 if (ha->flags.npiv_supported) {
1312 if (ha->operating_mode == LOOP)
1313 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
1312 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 1314 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
1315 }
1316
1313 1317
1314 mid_init_cb->options = __constant_cpu_to_le16(BIT_1); 1318 mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
1315 1319
@@ -2610,6 +2614,7 @@ qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
2610 port_id_t wrap, nxt_d_id; 2614 port_id_t wrap, nxt_d_id;
2611 struct qla_hw_data *ha = vha->hw; 2615 struct qla_hw_data *ha = vha->hw;
2612 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); 2616 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
2617 struct scsi_qla_host *tvp;
2613 2618
2614 rval = QLA_SUCCESS; 2619 rval = QLA_SUCCESS;
2615 2620
@@ -2709,7 +2714,7 @@ qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
2709 /* Bypass virtual ports of the same host. */ 2714 /* Bypass virtual ports of the same host. */
2710 found = 0; 2715 found = 0;
2711 if (ha->num_vhosts) { 2716 if (ha->num_vhosts) {
2712 list_for_each_entry(vp, &ha->vp_list, list) { 2717 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
2713 if (new_fcport->d_id.b24 == vp->d_id.b24) { 2718 if (new_fcport->d_id.b24 == vp->d_id.b24) {
2714 found = 1; 2719 found = 1;
2715 break; 2720 break;
@@ -2832,6 +2837,7 @@ qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
2832 uint16_t first_loop_id; 2837 uint16_t first_loop_id;
2833 struct qla_hw_data *ha = vha->hw; 2838 struct qla_hw_data *ha = vha->hw;
2834 struct scsi_qla_host *vp; 2839 struct scsi_qla_host *vp;
2840 struct scsi_qla_host *tvp;
2835 2841
2836 rval = QLA_SUCCESS; 2842 rval = QLA_SUCCESS;
2837 2843
@@ -2856,7 +2862,7 @@ qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
2856 /* Check for loop ID being already in use. */ 2862 /* Check for loop ID being already in use. */
2857 found = 0; 2863 found = 0;
2858 fcport = NULL; 2864 fcport = NULL;
2859 list_for_each_entry(vp, &ha->vp_list, list) { 2865 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
2860 list_for_each_entry(fcport, &vp->vp_fcports, list) { 2866 list_for_each_entry(fcport, &vp->vp_fcports, list) {
2861 if (fcport->loop_id == dev->loop_id && 2867 if (fcport->loop_id == dev->loop_id &&
2862 fcport != dev) { 2868 fcport != dev) {
@@ -3291,6 +3297,7 @@ qla2x00_abort_isp(scsi_qla_host_t *vha)
3291 uint8_t status = 0; 3297 uint8_t status = 0;
3292 struct qla_hw_data *ha = vha->hw; 3298 struct qla_hw_data *ha = vha->hw;
3293 struct scsi_qla_host *vp; 3299 struct scsi_qla_host *vp;
3300 struct scsi_qla_host *tvp;
3294 struct req_que *req = ha->req_q_map[0]; 3301 struct req_que *req = ha->req_q_map[0];
3295 3302
3296 if (vha->flags.online) { 3303 if (vha->flags.online) {
@@ -3306,7 +3313,7 @@ qla2x00_abort_isp(scsi_qla_host_t *vha)
3306 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 3313 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3307 atomic_set(&vha->loop_state, LOOP_DOWN); 3314 atomic_set(&vha->loop_state, LOOP_DOWN);
3308 qla2x00_mark_all_devices_lost(vha, 0); 3315 qla2x00_mark_all_devices_lost(vha, 0);
3309 list_for_each_entry(vp, &ha->vp_list, list) 3316 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
3310 qla2x00_mark_all_devices_lost(vp, 0); 3317 qla2x00_mark_all_devices_lost(vp, 0);
3311 } else { 3318 } else {
3312 if (!atomic_read(&vha->loop_down_timer)) 3319 if (!atomic_read(&vha->loop_down_timer))
@@ -3403,7 +3410,7 @@ qla2x00_abort_isp(scsi_qla_host_t *vha)
3403 DEBUG(printk(KERN_INFO 3410 DEBUG(printk(KERN_INFO
3404 "qla2x00_abort_isp(%ld): succeeded.\n", 3411 "qla2x00_abort_isp(%ld): succeeded.\n",
3405 vha->host_no)); 3412 vha->host_no));
3406 list_for_each_entry(vp, &ha->vp_list, list) { 3413 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
3407 if (vp->vp_idx) 3414 if (vp->vp_idx)
3408 qla2x00_vp_abort_isp(vp); 3415 qla2x00_vp_abort_isp(vp);
3409 } 3416 }
@@ -3428,7 +3435,7 @@ qla2x00_abort_isp(scsi_qla_host_t *vha)
3428static int 3435static int
3429qla2x00_restart_isp(scsi_qla_host_t *vha) 3436qla2x00_restart_isp(scsi_qla_host_t *vha)
3430{ 3437{
3431 uint8_t status = 0; 3438 int status = 0;
3432 uint32_t wait_time; 3439 uint32_t wait_time;
3433 struct qla_hw_data *ha = vha->hw; 3440 struct qla_hw_data *ha = vha->hw;
3434 struct req_que *req = ha->req_q_map[0]; 3441 struct req_que *req = ha->req_q_map[0];
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
index 4c7504cb3990..4aab7acf7525 100644
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -2685,6 +2685,7 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
2685 uint16_t stat = le16_to_cpu(rptid_entry->vp_idx); 2685 uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
2686 struct qla_hw_data *ha = vha->hw; 2686 struct qla_hw_data *ha = vha->hw;
2687 scsi_qla_host_t *vp; 2687 scsi_qla_host_t *vp;
2688 scsi_qla_host_t *tvp;
2688 2689
2689 if (rptid_entry->entry_status != 0) 2690 if (rptid_entry->entry_status != 0)
2690 return; 2691 return;
@@ -2710,7 +2711,7 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
2710 if (MSB(stat) == 1) 2711 if (MSB(stat) == 1)
2711 return; 2712 return;
2712 2713
2713 list_for_each_entry(vp, &ha->vp_list, list) 2714 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
2714 if (vp_idx == vp->vp_idx) 2715 if (vp_idx == vp->vp_idx)
2715 break; 2716 break;
2716 if (!vp) 2717 if (!vp)
diff --git a/drivers/scsi/qla2xxx/qla_mid.c b/drivers/scsi/qla2xxx/qla_mid.c
index 3f23932210c4..785c61279e6e 100644
--- a/drivers/scsi/qla2xxx/qla_mid.c
+++ b/drivers/scsi/qla2xxx/qla_mid.c
@@ -69,9 +69,10 @@ static scsi_qla_host_t *
69qla24xx_find_vhost_by_name(struct qla_hw_data *ha, uint8_t *port_name) 69qla24xx_find_vhost_by_name(struct qla_hw_data *ha, uint8_t *port_name)
70{ 70{
71 scsi_qla_host_t *vha; 71 scsi_qla_host_t *vha;
72 struct scsi_qla_host *tvha;
72 73
73 /* Locate matching device in database. */ 74 /* Locate matching device in database. */
74 list_for_each_entry(vha, &ha->vp_list, list) { 75 list_for_each_entry_safe(vha, tvha, &ha->vp_list, list) {
75 if (!memcmp(port_name, vha->port_name, WWN_SIZE)) 76 if (!memcmp(port_name, vha->port_name, WWN_SIZE))
76 return vha; 77 return vha;
77 } 78 }
@@ -194,11 +195,11 @@ qla24xx_configure_vp(scsi_qla_host_t *vha)
194void 195void
195qla2x00_alert_all_vps(struct rsp_que *rsp, uint16_t *mb) 196qla2x00_alert_all_vps(struct rsp_que *rsp, uint16_t *mb)
196{ 197{
197 scsi_qla_host_t *vha; 198 scsi_qla_host_t *vha, *tvha;
198 struct qla_hw_data *ha = rsp->hw; 199 struct qla_hw_data *ha = rsp->hw;
199 int i = 0; 200 int i = 0;
200 201
201 list_for_each_entry(vha, &ha->vp_list, list) { 202 list_for_each_entry_safe(vha, tvha, &ha->vp_list, list) {
202 if (vha->vp_idx) { 203 if (vha->vp_idx) {
203 switch (mb[0]) { 204 switch (mb[0]) {
204 case MBA_LIP_OCCURRED: 205 case MBA_LIP_OCCURRED:
@@ -300,6 +301,7 @@ qla2x00_do_dpc_all_vps(scsi_qla_host_t *vha)
300 int ret; 301 int ret;
301 struct qla_hw_data *ha = vha->hw; 302 struct qla_hw_data *ha = vha->hw;
302 scsi_qla_host_t *vp; 303 scsi_qla_host_t *vp;
304 struct scsi_qla_host *tvp;
303 305
304 if (vha->vp_idx) 306 if (vha->vp_idx)
305 return; 307 return;
@@ -308,7 +310,7 @@ qla2x00_do_dpc_all_vps(scsi_qla_host_t *vha)
308 310
309 clear_bit(VP_DPC_NEEDED, &vha->dpc_flags); 311 clear_bit(VP_DPC_NEEDED, &vha->dpc_flags);
310 312
311 list_for_each_entry(vp, &ha->vp_list, list) { 313 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
312 if (vp->vp_idx) 314 if (vp->vp_idx)
313 ret = qla2x00_do_dpc_vp(vp); 315 ret = qla2x00_do_dpc_vp(vp);
314 } 316 }
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index 2f5f72531e23..3ddfa889e949 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -2222,10 +2222,6 @@ qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2222{ 2222{
2223 char name[16]; 2223 char name[16];
2224 2224
2225 ha->init_cb_size = sizeof(init_cb_t);
2226 if (IS_QLA2XXX_MIDTYPE(ha))
2227 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2228
2229 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size, 2225 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
2230 &ha->init_cb_dma, GFP_KERNEL); 2226 &ha->init_cb_dma, GFP_KERNEL);
2231 if (!ha->init_cb) 2227 if (!ha->init_cb)
@@ -2568,7 +2564,7 @@ qla2x00_do_work(struct scsi_qla_host *vha)
2568void qla2x00_relogin(struct scsi_qla_host *vha) 2564void qla2x00_relogin(struct scsi_qla_host *vha)
2569{ 2565{
2570 fc_port_t *fcport; 2566 fc_port_t *fcport;
2571 uint8_t status; 2567 int status;
2572 uint16_t next_loopid = 0; 2568 uint16_t next_loopid = 0;
2573 struct qla_hw_data *ha = vha->hw; 2569 struct qla_hw_data *ha = vha->hw;
2574 2570
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h
index 79f7053da99b..a772eab2f0ea 100644
--- a/drivers/scsi/qla2xxx/qla_version.h
+++ b/drivers/scsi/qla2xxx/qla_version.h
@@ -7,7 +7,7 @@
7/* 7/*
8 * Driver version 8 * Driver version
9 */ 9 */
10#define QLA2XXX_VERSION "8.03.00-k3" 10#define QLA2XXX_VERSION "8.03.00-k4"
11 11
12#define QLA_DRIVER_MAJOR_VER 8 12#define QLA_DRIVER_MAJOR_VER 8
13#define QLA_DRIVER_MINOR_VER 3 13#define QLA_DRIVER_MINOR_VER 3
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 55310dbc10a6..4970ae4a62d6 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -1167,23 +1167,19 @@ sd_spinup_disk(struct scsi_disk *sdkp)
1167 /* 1167 /*
1168 * The device does not want the automatic start to be issued. 1168 * The device does not want the automatic start to be issued.
1169 */ 1169 */
1170 if (sdkp->device->no_start_on_add) { 1170 if (sdkp->device->no_start_on_add)
1171 break; 1171 break;
1172 }
1173
1174 /*
1175 * If manual intervention is required, or this is an
1176 * absent USB storage device, a spinup is meaningless.
1177 */
1178 if (sense_valid &&
1179 sshdr.sense_key == NOT_READY &&
1180 sshdr.asc == 4 && sshdr.ascq == 3) {
1181 break; /* manual intervention required */
1182 1172
1183 /* 1173 if (sense_valid && sshdr.sense_key == NOT_READY) {
1184 * Issue command to spin up drive when not ready 1174 if (sshdr.asc == 4 && sshdr.ascq == 3)
1185 */ 1175 break; /* manual intervention required */
1186 } else if (sense_valid && sshdr.sense_key == NOT_READY) { 1176 if (sshdr.asc == 4 && sshdr.ascq == 0xb)
1177 break; /* standby */
1178 if (sshdr.asc == 4 && sshdr.ascq == 0xc)
1179 break; /* unavailable */
1180 /*
1181 * Issue command to spin up drive when not ready
1182 */
1187 if (!spintime) { 1183 if (!spintime) {
1188 sd_printk(KERN_NOTICE, sdkp, "Spinning up disk..."); 1184 sd_printk(KERN_NOTICE, sdkp, "Spinning up disk...");
1189 cmd[0] = START_STOP; 1185 cmd[0] = START_STOP;
diff --git a/drivers/scsi/zalon.c b/drivers/scsi/zalon.c
index a8d61a62522e..97f3158fa7b5 100644
--- a/drivers/scsi/zalon.c
+++ b/drivers/scsi/zalon.c
@@ -137,7 +137,7 @@ zalon_probe(struct parisc_device *dev)
137 goto fail; 137 goto fail;
138 138
139 if (request_irq(dev->irq, ncr53c8xx_intr, IRQF_SHARED, "zalon", host)) { 139 if (request_irq(dev->irq, ncr53c8xx_intr, IRQF_SHARED, "zalon", host)) {
140 dev_printk(KERN_ERR, dev, "irq problem with %d, detaching\n ", 140 dev_printk(KERN_ERR, &dev->dev, "irq problem with %d, detaching\n ",
141 dev->irq); 141 dev->irq);
142 goto fail; 142 goto fail;
143 } 143 }
diff --git a/drivers/video/logo/logo_linux_clut224.ppm b/drivers/video/logo/logo_linux_clut224.ppm
index 3c14e43b82fe..de93ff3fc1ad 100644
--- a/drivers/video/logo/logo_linux_clut224.ppm
+++ b/drivers/video/logo/logo_linux_clut224.ppm
@@ -1,1604 +1,2828 @@
1P3 1P3
2# Standard 224-color Linux logo 2145 113
380 80
4255 3255
5 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
6 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
7 0 0 0 0 0 0 0 0 0 0 0 0 60 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
8 0 0 0 0 0 0 0 0 0 0 0 0 70 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
9 0 0 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
10 0 0 0 0 0 0 0 0 0 0 0 0 90 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
11 0 0 0 0 0 0 0 0 0 0 0 0 100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
12 0 0 0 0 0 0 0 0 0 0 0 0 110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
13 0 0 0 0 0 0 0 0 0 0 0 0 120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
14 6 6 6 6 6 6 10 10 10 10 10 10 130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15 10 10 10 6 6 6 6 6 6 6 6 6 140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 0 0 0 0 0 0 0 0 0 0 0 0 150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17 0 0 0 0 0 0 0 0 0 0 0 0 160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18 0 0 0 0 0 0 0 0 0 0 0 0 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19 0 0 0 0 0 0 0 0 0 0 0 0 180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20 0 0 0 0 0 0 0 0 0 0 0 0 190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21 0 0 0 0 0 0 0 0 0 0 0 0 200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22 0 0 0 0 0 0 0 0 0 0 0 0 210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23 0 0 0 0 0 0 0 0 0 0 0 0 220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24 0 0 0 0 0 0 0 0 0 0 0 0 230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25 0 0 0 0 0 0 0 0 0 0 0 0 240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26 0 0 0 0 0 0 0 0 0 0 0 0 250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27 0 0 0 0 0 0 0 0 0 0 0 0 260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28 0 0 0 0 0 0 0 0 0 0 0 0 270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
29 0 0 0 0 0 0 0 0 0 0 0 0 280 0 0
30 0 0 0 0 0 0 0 0 0 0 0 0 290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
31 0 0 0 0 0 0 0 0 0 0 0 0 300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
32 0 0 0 0 0 0 0 0 0 0 0 0 310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
33 0 0 0 6 6 6 10 10 10 14 14 14 320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
34 22 22 22 26 26 26 30 30 30 34 34 34 330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
35 30 30 30 30 30 30 26 26 26 18 18 18 340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
36 14 14 14 10 10 10 6 6 6 0 0 0 350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
37 0 0 0 0 0 0 0 0 0 0 0 0 360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
38 0 0 0 0 0 0 0 0 0 0 0 0 370 0 0 0 0 0 0 0 0 0 0 0 3 4 4 6 7 7
39 0 0 0 0 0 0 0 0 0 0 0 0 388 10 10 8 10 10 6 8 8 6 7 7 3 4 4 2 2 2
40 0 0 0 0 0 0 0 0 0 0 0 0 390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
41 0 0 0 0 0 0 0 0 0 0 0 0 400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
42 0 0 0 0 0 0 0 0 0 0 0 0 410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
43 0 0 0 0 0 0 0 0 0 0 0 0 420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
44 0 0 0 0 0 0 0 0 0 0 0 0 430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
45 0 0 0 0 0 0 0 0 0 0 0 0 440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
46 0 0 0 0 0 1 0 0 1 0 0 0 450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
47 0 0 0 0 0 0 0 0 0 0 0 0 460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
48 0 0 0 0 0 0 0 0 0 0 0 0 470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
49 0 0 0 0 0 0 0 0 0 0 0 0 480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
50 0 0 0 0 0 0 0 0 0 0 0 0 490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
51 0 0 0 0 0 0 0 0 0 0 0 0 500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
52 0 0 0 0 0 0 0 0 0 0 0 0 510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
53 6 6 6 14 14 14 26 26 26 42 42 42 520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
54 54 54 54 66 66 66 78 78 78 78 78 78 530 0 0
55 78 78 78 74 74 74 66 66 66 54 54 54 540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
56 42 42 42 26 26 26 18 18 18 10 10 10 550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
57 6 6 6 0 0 0 0 0 0 0 0 0 560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
58 0 0 0 0 0 0 0 0 0 0 0 0 570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
59 0 0 0 0 0 0 0 0 0 0 0 0 580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
60 0 0 0 0 0 0 0 0 0 0 0 0 590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
61 0 0 0 0 0 0 0 0 0 0 0 0 600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
62 0 0 0 0 0 0 0 0 0 0 0 0 610 0 0 0 0 0 0 0 0 0 0 0 4 5 5 17 18 17
63 0 0 0 0 0 0 0 0 0 0 0 0 6227 29 28 35 37 36 40 43 41 43 45 43 40 43 41 37 39 37
64 0 0 0 0 0 0 0 0 0 0 0 0 6332 34 33 27 30 29 23 25 24 17 21 21 15 18 18 12 15 15
65 0 0 0 0 0 0 0 0 0 0 0 0 6411 13 13 8 10 10 6 7 7 3 4 4 1 1 1 0 0 0
66 0 0 1 0 0 0 0 0 0 0 0 0 650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
67 0 0 0 0 0 0 0 0 0 0 0 0 660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
68 0 0 0 0 0 0 0 0 0 0 0 0 670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
69 0 0 0 0 0 0 0 0 0 0 0 0 680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
70 0 0 0 0 0 0 0 0 0 0 0 0 690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
71 0 0 0 0 0 0 0 0 0 0 0 0 700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
72 0 0 0 0 0 0 0 0 0 10 10 10 710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
73 22 22 22 42 42 42 66 66 66 86 86 86 720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
74 66 66 66 38 38 38 38 38 38 22 22 22 730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
75 26 26 26 34 34 34 54 54 54 66 66 66 740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
76 86 86 86 70 70 70 46 46 46 26 26 26 750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
77 14 14 14 6 6 6 0 0 0 0 0 0 760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
78 0 0 0 0 0 0 0 0 0 0 0 0 770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
79 0 0 0 0 0 0 0 0 0 0 0 0 780 0 0
80 0 0 0 0 0 0 0 0 0 0 0 0 790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
81 0 0 0 0 0 0 0 0 0 0 0 0 800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
82 0 0 0 0 0 0 0 0 0 0 0 0 810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
83 0 0 0 0 0 0 0 0 0 0 0 0 820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
84 0 0 0 0 0 0 0 0 0 0 0 0 830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
85 0 0 0 0 0 0 0 0 0 0 0 0 840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
86 0 0 1 0 0 1 0 0 1 0 0 0 850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
87 0 0 0 0 0 0 0 0 0 0 0 0 860 0 0 13 13 13 32 34 33 49 51 48 60 60 56 58 59 55
88 0 0 0 0 0 0 0 0 0 0 0 0 8755 57 54 55 56 53 49 51 48 43 45 43 39 40 39 33 37 35
89 0 0 0 0 0 0 0 0 0 0 0 0 8828 31 30 23 27 26 20 23 23 17 20 20 14 17 17 13 16 16
90 0 0 0 0 0 0 0 0 0 0 0 0 8911 14 14 10 13 13 10 12 12 9 11 11 8 10 10 6 7 7
91 0 0 0 0 0 0 0 0 0 0 0 0 902 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
92 0 0 0 0 0 0 10 10 10 26 26 26 910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
93 50 50 50 82 82 82 58 58 58 6 6 6 920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
94 2 2 6 2 2 6 2 2 6 2 2 6 930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
95 2 2 6 2 2 6 2 2 6 2 2 6 940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
96 6 6 6 54 54 54 86 86 86 66 66 66 950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
97 38 38 38 18 18 18 6 6 6 0 0 0 960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
98 0 0 0 0 0 0 0 0 0 0 0 0 970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
99 0 0 0 0 0 0 0 0 0 0 0 0 980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
100 0 0 0 0 0 0 0 0 0 0 0 0 990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
101 0 0 0 0 0 0 0 0 0 0 0 0 1000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
102 0 0 0 0 0 0 0 0 0 0 0 0 1010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
103 0 0 0 0 0 0 0 0 0 0 0 0 1020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
104 0 0 0 0 0 0 0 0 0 0 0 0 1030 0 0
105 0 0 0 0 0 0 0 0 0 0 0 0 1040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
106 0 0 0 0 0 0 0 0 0 0 0 0 1050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
107 0 0 0 0 0 0 0 0 0 0 0 0 1060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
108 0 0 0 0 0 0 0 0 0 0 0 0 1070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
109 0 0 0 0 0 0 0 0 0 0 0 0 1080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
110 0 0 0 0 0 0 0 0 0 0 0 0 1090 0 0 0 0 0 0 0 0 0 0 0 6 7 7 12 15 15
111 0 0 0 0 0 0 0 0 0 0 0 0 11012 15 15 8 9 9 2 3 3 0 0 0 1 1 1 25 27 26
112 0 0 0 6 6 6 22 22 22 50 50 50 11155 56 53 68 70 65 65 66 61 65 66 61 63 64 60 63 64 60
113 78 78 78 34 34 34 2 2 6 2 2 6 11258 59 55 51 52 50 47 48 46 41 42 42 35 37 36 30 32 31
114 2 2 6 2 2 6 2 2 6 2 2 6 11326 28 27 20 24 24 18 22 22 16 19 19 14 17 17 13 16 16
115 2 2 6 2 2 6 2 2 6 2 2 6 11412 15 15 11 14 14 10 13 13 10 12 12 9 11 11 8 10 10
116 2 2 6 2 2 6 6 6 6 70 70 70 1158 9 9 6 8 8 3 3 3 0 0 0 0 0 0 0 0 0
117 78 78 78 46 46 46 22 22 22 6 6 6 1160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
118 0 0 0 0 0 0 0 0 0 0 0 0 1170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
119 0 0 0 0 0 0 0 0 0 0 0 0 1180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
120 0 0 0 0 0 0 0 0 0 0 0 0 1190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
121 0 0 0 0 0 0 0 0 0 0 0 0 1200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
122 0 0 0 0 0 0 0 0 0 0 0 0 1210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
123 0 0 0 0 0 0 0 0 0 0 0 0 1220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
124 0 0 0 0 0 0 0 0 0 0 0 0 1230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
125 0 0 0 0 0 0 0 0 0 0 0 0 1240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
126 0 0 1 0 0 1 0 0 1 0 0 0 1250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
127 0 0 0 0 0 0 0 0 0 0 0 0 1260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
128 0 0 0 0 0 0 0 0 0 0 0 0 1270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
129 0 0 0 0 0 0 0 0 0 0 0 0 1280 0 0
130 0 0 0 0 0 0 0 0 0 0 0 0 1290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
131 0 0 0 0 0 0 0 0 0 0 0 0 1300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
132 6 6 6 18 18 18 42 42 42 82 82 82 1310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
133 26 26 26 2 2 6 2 2 6 2 2 6 1320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
134 2 2 6 2 2 6 2 2 6 2 2 6 1330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
135 2 2 6 2 2 6 2 2 6 14 14 14 1340 0 0 0 0 0 0 0 0 6 7 7 20 24 24 23 27 26
136 46 46 46 34 34 34 6 6 6 2 2 6 13523 27 26 18 22 22 11 13 13 23 24 24 61 63 57 72 73 67
137 42 42 42 78 78 78 42 42 42 18 18 18 13672 73 67 68 70 65 68 70 65 68 70 65 63 64 60 58 59 55
138 6 6 6 0 0 0 0 0 0 0 0 0 13755 56 53 47 48 46 41 42 42 35 37 36 30 32 31 26 28 27
139 0 0 0 0 0 0 0 0 0 0 0 0 13820 24 24 18 22 22 16 20 20 15 19 19 14 17 17 13 16 16
140 0 0 0 0 0 0 0 0 0 0 0 0 13912 15 15 12 15 15 11 14 14 10 13 13 10 12 12 9 11 11
141 0 0 0 0 0 0 0 0 0 0 0 0 1408 10 10 8 9 9 7 9 9 6 7 7 1 2 2 0 0 0
142 0 0 0 0 0 0 0 0 0 0 0 0 1410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
143 0 0 0 0 0 0 0 0 0 0 0 0 1420 0 0 0 0 0 1 1 1 4 5 5 5 6 5 4 5 5
144 0 0 0 0 0 0 0 0 0 0 0 0 1430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
145 0 0 0 0 0 0 0 0 0 0 0 0 1440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
146 0 0 1 0 0 0 0 0 1 0 0 0 1450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
147 0 0 0 0 0 0 0 0 0 0 0 0 1460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
148 0 0 0 0 0 0 0 0 0 0 0 0 1470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
149 0 0 0 0 0 0 0 0 0 0 0 0 1480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
150 0 0 0 0 0 0 0 0 0 0 0 0 1490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
151 0 0 0 0 0 0 0 0 0 0 0 0 1500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
152 10 10 10 30 30 30 66 66 66 58 58 58 1510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
153 2 2 6 2 2 6 2 2 6 2 2 6 1520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
154 2 2 6 2 2 6 2 2 6 2 2 6 1530 0 0
155 2 2 6 2 2 6 2 2 6 26 26 26 1540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
156 86 86 86 101 101 101 46 46 46 10 10 10 1550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
157 2 2 6 58 58 58 70 70 70 34 34 34 1560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
158 10 10 10 0 0 0 0 0 0 0 0 0 1570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
159 0 0 0 0 0 0 0 0 0 0 0 0 1580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
160 0 0 0 0 0 0 0 0 0 0 0 0 1590 0 0 0 0 0 0 0 0 15 19 19 40 41 39 53 55 47
161 0 0 0 0 0 0 0 0 0 0 0 0 16033 36 34 27 30 29 51 52 50 72 73 67 72 73 67 72 73 67
162 0 0 0 0 0 0 0 0 0 0 0 0 16172 73 67 68 70 65 68 70 65 63 64 60 58 59 55 51 52 50
163 0 0 0 0 0 0 0 0 0 0 0 0 16247 48 46 40 43 41 33 37 35 30 32 31 26 28 27 20 24 24
164 0 0 0 0 0 0 0 0 0 0 0 0 16318 22 22 17 21 21 16 19 19 14 18 18 14 17 17 13 17 17
165 0 0 0 0 0 0 0 0 0 0 0 0 16413 16 16 12 15 15 12 15 15 11 14 14 10 13 13 10 12 12
166 0 0 1 0 0 1 0 0 1 0 0 0 1659 11 11 8 10 10 8 9 9 7 9 9 6 8 8 3 4 4
167 0 0 0 0 0 0 0 0 0 0 0 0 1660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
168 0 0 0 0 0 0 0 0 0 0 0 0 1672 2 2 6 8 8 10 12 12 10 12 12 10 12 12 10 12 12
169 0 0 0 0 0 0 0 0 0 0 0 0 1686 8 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
170 0 0 0 0 0 0 0 0 0 0 0 0 1690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
171 0 0 0 0 0 0 0 0 0 0 0 0 1700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
172 14 14 14 42 42 42 86 86 86 10 10 10 1710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
173 2 2 6 2 2 6 2 2 6 2 2 6 1720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
174 2 2 6 2 2 6 2 2 6 2 2 6 1730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
175 2 2 6 2 2 6 2 2 6 30 30 30 1740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
176 94 94 94 94 94 94 58 58 58 26 26 26 1750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
177 2 2 6 6 6 6 78 78 78 54 54 54 1760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
178 22 22 22 6 6 6 0 0 0 0 0 0 1770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
179 0 0 0 0 0 0 0 0 0 0 0 0 1780 0 0
180 0 0 0 0 0 0 0 0 0 0 0 0 1790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
181 0 0 0 0 0 0 0 0 0 0 0 0 1800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
182 0 0 0 0 0 0 0 0 0 0 0 0 1810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
183 0 0 0 0 0 0 0 0 0 0 0 0 1820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
184 0 0 0 0 0 0 0 0 0 0 0 0 1830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
185 0 0 0 0 0 0 0 0 0 0 0 0 1840 0 0 0 0 0 0 0 0 20 23 23 71 71 57 131 127 93
186 0 0 0 0 0 0 0 0 0 0 0 0 185115 113 82 63 64 60 72 73 67 72 73 67 72 73 67 72 73 67
187 0 0 0 0 0 0 0 0 0 0 0 0 18668 70 65 65 66 61 61 63 57 55 57 54 49 51 48 43 45 43
188 0 0 0 0 0 0 0 0 0 0 0 0 18739 40 39 33 36 34 28 31 30 23 27 26 20 24 24 20 23 23
189 0 0 0 0 0 0 0 0 0 0 0 0 18817 21 21 16 20 20 15 19 19 15 18 18 14 18 18 14 17 17
190 0 0 0 0 0 0 0 0 0 0 0 0 18913 17 17 13 16 16 12 15 15 12 15 15 11 14 14 10 13 13
191 0 0 0 0 0 0 0 0 0 6 6 6 19010 12 12 9 11 11 8 10 10 7 9 9 7 9 9 6 8 8
192 22 22 22 62 62 62 62 62 62 2 2 6 1914 5 5 0 0 0 0 0 0 0 0 0 1 1 1 6 7 7
193 2 2 6 2 2 6 2 2 6 2 2 6 19210 12 12 10 12 12 10 12 12 10 12 12 10 12 12 10 12 12
194 2 2 6 2 2 6 2 2 6 2 2 6 19310 12 12 3 4 4 0 0 0 0 0 0 0 0 0 0 0 0
195 2 2 6 2 2 6 2 2 6 26 26 26 1940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
196 54 54 54 38 38 38 18 18 18 10 10 10 1950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
197 2 2 6 2 2 6 34 34 34 82 82 82 1960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
198 38 38 38 14 14 14 0 0 0 0 0 0 1970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
199 0 0 0 0 0 0 0 0 0 0 0 0 1980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
200 0 0 0 0 0 0 0 0 0 0 0 0 1990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
201 0 0 0 0 0 0 0 0 0 0 0 0 2000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
202 0 0 0 0 0 0 0 0 0 0 0 0 2010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
203 0 0 0 0 0 0 0 0 0 0 0 0 2020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
204 0 0 0 0 0 0 0 0 0 0 0 0 2030 0 0
205 0 0 0 0 0 0 0 0 0 0 0 0 2040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
206 0 0 0 0 0 1 0 0 1 0 0 0 2050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
207 0 0 0 0 0 0 0 0 0 0 0 0 2060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
208 0 0 0 0 0 0 0 0 0 0 0 0 2070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
209 0 0 0 0 0 0 0 0 0 0 0 0 2080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
210 0 0 0 0 0 0 0 0 0 0 0 0 2090 0 0 0 0 0 0 0 0 18 22 22 71 71 57 144 139 99
211 0 0 0 0 0 0 0 0 0 6 6 6 21084 83 72 68 70 65 72 73 67 72 73 67 68 70 65 65 66 61
212 30 30 30 78 78 78 30 30 30 2 2 6 21163 64 60 55 57 54 51 52 50 47 48 46 40 43 41 35 37 36
213 2 2 6 2 2 6 2 2 6 2 2 6 21230 32 31 27 29 28 23 27 26 20 24 24 18 22 22 17 21 21
214 2 2 6 2 2 6 2 2 6 2 2 6 21316 20 20 15 19 19 15 19 19 15 19 19 15 18 18 14 18 18
215 2 2 6 2 2 6 2 2 6 10 10 10 21414 17 17 13 17 17 13 16 16 12 15 15 12 15 15 11 14 14
216 10 10 10 2 2 6 2 2 6 2 2 6 21510 13 13 9 12 12 9 11 11 8 10 10 7 9 9 6 8 8
217 2 2 6 2 2 6 2 2 6 78 78 78 2166 8 8 3 4 4 0 0 0 2 2 2 8 10 10 10 12 12
218 50 50 50 18 18 18 6 6 6 0 0 0 21710 12 12 10 12 12 11 13 13 36 38 35 61 61 53 48 49 45
219 0 0 0 0 0 0 0 0 0 0 0 0 21810 12 12 7 9 9 0 0 0 0 0 0 0 0 0 0 0 0
220 0 0 0 0 0 0 0 0 0 0 0 0 2190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
221 0 0 0 0 0 0 0 0 0 0 0 0 2200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
222 0 0 0 0 0 0 0 0 0 0 0 0 2210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
223 0 0 0 0 0 0 0 0 0 0 0 0 2220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
224 0 0 0 0 0 0 0 0 0 0 0 0 2230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
225 0 0 0 0 0 0 0 0 0 0 0 0 2240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
226 0 0 1 0 0 0 0 0 0 0 0 0 2250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
227 0 0 0 0 0 0 0 0 0 0 0 0 2260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
228 0 0 0 0 0 0 0 0 0 0 0 0 2270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
229 0 0 0 0 0 0 0 0 0 0 0 0 2280 0 0
230 0 0 0 0 0 0 0 0 0 0 0 0 2290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
231 0 0 0 0 0 0 0 0 0 10 10 10 2300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
232 38 38 38 86 86 86 14 14 14 2 2 6 2310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
233 2 2 6 2 2 6 2 2 6 2 2 6 2320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
234 2 2 6 2 2 6 2 2 6 2 2 6 2330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
235 2 2 6 2 2 6 2 2 6 2 2 6 2340 0 0 0 0 0 0 0 0 15 19 19 61 61 53 84 83 72
236 2 2 6 2 2 6 2 2 6 2 2 6 23568 70 65 72 73 67 68 70 65 68 70 65 63 64 60 58 59 55
237 2 2 6 2 2 6 2 2 6 54 54 54 23651 52 50 47 48 46 41 42 42 37 39 37 32 35 33 28 31 30
238 66 66 66 26 26 26 6 6 6 0 0 0 23723 27 26 20 24 24 20 23 23 18 22 22 17 21 21 17 21 21
239 0 0 0 0 0 0 0 0 0 0 0 0 23817 21 21 17 21 21 17 20 20 16 20 20 16 20 20 16 19 19
240 0 0 0 0 0 0 0 0 0 0 0 0 23915 18 18 14 18 18 13 17 17 13 16 16 12 15 15 12 15 15
241 0 0 0 0 0 0 0 0 0 0 0 0 24011 14 14 10 13 13 9 12 12 9 11 11 8 10 10 7 9 9
242 0 0 0 0 0 0 0 0 0 0 0 0 2416 8 8 6 8 8 5 6 5 9 11 11 10 12 12 10 12 12
243 0 0 0 0 0 0 0 0 0 0 0 0 24219 20 18 82 81 62 149 145 103 160 154 106 142 137 94 96 95 69
244 0 0 0 0 0 0 0 0 0 0 0 0 24310 12 12 10 12 12 1 1 1 0 0 0 0 0 0 0 0 0
245 0 0 0 0 0 0 0 0 0 0 0 0 2440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
246 0 0 0 0 0 1 0 0 1 0 0 0 2450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
247 0 0 0 0 0 0 0 0 0 0 0 0 2460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
248 0 0 0 0 0 0 0 0 0 0 0 0 2470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
249 0 0 0 0 0 0 0 0 0 0 0 0 2480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
250 0 0 0 0 0 0 0 0 0 0 0 0 2490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
251 0 0 0 0 0 0 0 0 0 14 14 14 2500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
252 42 42 42 82 82 82 2 2 6 2 2 6 2510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
253 2 2 6 6 6 6 10 10 10 2 2 6 2520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
254 2 2 6 2 2 6 2 2 6 2 2 6 2530 0 0
255 2 2 6 2 2 6 2 2 6 6 6 6 2540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
256 14 14 14 10 10 10 2 2 6 2 2 6 2550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
257 2 2 6 2 2 6 2 2 6 18 18 18 2560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
258 82 82 82 34 34 34 10 10 10 0 0 0 2570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
259 0 0 0 0 0 0 0 0 0 0 0 0 2580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
260 0 0 0 0 0 0 0 0 0 0 0 0 2590 0 0 0 0 0 0 0 0 10 12 12 44 46 43 68 70 65
261 0 0 0 0 0 0 0 0 0 0 0 0 26072 73 67 68 70 65 68 70 65 63 64 60 55 57 54 49 51 48
262 0 0 0 0 0 0 0 0 0 0 0 0 26143 45 43 39 40 39 33 37 35 30 32 31 26 28 27 23 27 26
263 0 0 0 0 0 0 0 0 0 0 0 0 26220 24 24 18 22 22 18 22 22 18 22 22 18 22 22 20 23 23
264 0 0 0 0 0 0 0 0 0 0 0 0 26320 24 24 23 25 24 23 25 24 22 24 23 20 23 23 18 22 22
265 0 0 0 0 0 0 0 0 0 0 0 0 26417 20 20 15 19 19 15 18 18 14 17 17 13 16 16 12 15 15
266 0 0 1 0 0 0 0 0 0 0 0 0 26511 14 14 11 13 13 10 12 12 9 11 11 8 10 10 8 9 9
267 0 0 0 0 0 0 0 0 0 0 0 0 2667 9 9 7 9 9 10 12 12 10 12 12 10 12 12 71 71 57
268 0 0 0 0 0 0 0 0 0 0 0 0 267164 159 111 186 182 128 186 182 128 171 165 117 151 147 98 96 95 69
269 0 0 0 0 0 0 0 0 0 0 0 0 26810 12 12 10 12 12 3 3 3 0 0 0 0 0 0 0 0 0
270 0 0 0 0 0 0 0 0 0 0 0 0 2690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
271 0 0 0 0 0 0 0 0 0 14 14 14 2700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
272 46 46 46 86 86 86 2 2 6 2 2 6 2710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
273 6 6 6 6 6 6 22 22 22 34 34 34 2720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
274 6 6 6 2 2 6 2 2 6 2 2 6 2730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
275 2 2 6 2 2 6 18 18 18 34 34 34 2740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
276 10 10 10 50 50 50 22 22 22 2 2 6 2750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
277 2 2 6 2 2 6 2 2 6 10 10 10 2760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
278 86 86 86 42 42 42 14 14 14 0 0 0 2770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
279 0 0 0 0 0 0 0 0 0 0 0 0 2780 0 0
280 0 0 0 0 0 0 0 0 0 0 0 0 2790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
281 0 0 0 0 0 0 0 0 0 0 0 0 2800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
282 0 0 0 0 0 0 0 0 0 0 0 0 2810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
283 0 0 0 0 0 0 0 0 0 0 0 0 2820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
284 0 0 0 0 0 0 0 0 0 0 0 0 2830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
285 0 0 0 0 0 0 0 0 0 0 0 0 2840 0 0 0 0 0 0 0 0 8 10 10 63 64 60 68 70 65
286 0 0 1 0 0 1 0 0 1 0 0 0 28572 73 67 68 70 65 63 64 60 55 57 54 47 48 46 40 43 41
287 0 0 0 0 0 0 0 0 0 0 0 0 28633 37 35 30 32 31 27 29 28 23 27 26 20 24 24 20 23 23
288 0 0 0 0 0 0 0 0 0 0 0 0 28718 22 22 18 22 22 20 23 22 21 25 23 23 27 26 27 29 28
289 0 0 0 0 0 0 0 0 0 0 0 0 28828 31 30 31 33 31 31 33 31 31 33 31 28 31 30 26 28 27
290 0 0 0 0 0 0 0 0 0 0 0 0 28923 25 24 20 23 22 16 20 20 15 18 18 14 17 17 13 16 16
291 0 0 0 0 0 0 0 0 0 14 14 14 29012 15 15 11 14 14 10 13 13 10 12 12 9 11 11 8 10 10
292 46 46 46 86 86 86 2 2 6 2 2 6 29110 12 12 10 13 13 10 12 12 12 14 14 96 95 69 165 161 109
293 38 38 38 116 116 116 94 94 94 22 22 22 292186 182 128 192 187 134 192 187 134 176 171 126 160 154 106 103 101 77
294 22 22 22 2 2 6 2 2 6 2 2 6 29310 12 12 10 12 12 5 6 5 0 0 0 0 0 0 0 0 0
295 14 14 14 86 86 86 138 138 138 162 162 162 2940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
296154 154 154 38 38 38 26 26 26 6 6 6 2950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
297 2 2 6 2 2 6 2 2 6 2 2 6 2960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
298 86 86 86 46 46 46 14 14 14 0 0 0 2970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
299 0 0 0 0 0 0 0 0 0 0 0 0 2980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
300 0 0 0 0 0 0 0 0 0 0 0 0 2990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
301 0 0 0 0 0 0 0 0 0 0 0 0 3000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
302 0 0 0 0 0 0 0 0 0 0 0 0 3010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
303 0 0 0 0 0 0 0 0 0 0 0 0 3020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
304 0 0 0 0 0 0 0 0 0 0 0 0 3030 0 0
305 0 0 0 0 0 0 0 0 0 0 0 0 3040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
306 0 0 0 0 0 0 0 0 0 0 0 0 3050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
307 0 0 0 0 0 0 0 0 0 0 0 0 3060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
308 0 0 0 0 0 0 0 0 0 0 0 0 3070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
309 0 0 0 0 0 0 0 0 0 0 0 0 3080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
310 0 0 0 0 0 0 0 0 0 0 0 0 3090 0 0 0 0 0 0 0 0 35 37 36 68 70 65 72 73 67
311 0 0 0 0 0 0 0 0 0 14 14 14 31068 70 65 65 66 61 58 59 55 49 51 48 40 43 41 33 37 35
312 46 46 46 86 86 86 2 2 6 14 14 14 31128 31 30 23 27 26 20 24 24 20 23 23 18 22 22 18 22 22
313134 134 134 198 198 198 195 195 195 116 116 116 31218 22 22 20 23 23 23 27 26 27 30 29 32 35 33 37 39 37
314 10 10 10 2 2 6 2 2 6 6 6 6 31340 43 41 44 46 43 46 47 43 44 46 43 40 43 41 36 38 35
315101 98 89 187 187 187 210 210 210 218 218 218 31431 33 31 27 29 28 22 24 23 17 21 21 15 18 18 14 17 17
316214 214 214 134 134 134 14 14 14 6 6 6 31513 16 16 12 15 15 11 14 14 11 14 14 11 13 13 13 16 16
317 2 2 6 2 2 6 2 2 6 2 2 6 31613 16 16 11 14 14 10 12 12 79 78 62 142 137 94 164 159 111
318 86 86 86 50 50 50 18 18 18 6 6 6 317178 174 128 192 187 134 192 187 134 176 171 126 160 154 106 96 95 69
319 0 0 0 0 0 0 0 0 0 0 0 0 31810 12 12 10 12 12 6 7 7 0 0 0 0 0 0 0 0 0
320 0 0 0 0 0 0 0 0 0 0 0 0 3190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
321 0 0 0 0 0 0 0 0 0 0 0 0 3200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
322 0 0 0 0 0 0 0 0 0 0 0 0 3210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
323 0 0 0 0 0 0 0 0 0 0 0 0 3220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
324 0 0 0 0 0 0 0 0 0 0 0 0 3230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
325 0 0 0 0 0 0 0 0 1 0 0 0 3240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
326 0 0 1 0 0 1 0 0 1 0 0 0 3250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
327 0 0 0 0 0 0 0 0 0 0 0 0 3260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
328 0 0 0 0 0 0 0 0 0 0 0 0 3270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
329 0 0 0 0 0 0 0 0 0 0 0 0 3280 0 0
330 0 0 0 0 0 0 0 0 0 0 0 0 3290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
331 0 0 0 0 0 0 0 0 0 14 14 14 3300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
332 46 46 46 86 86 86 2 2 6 54 54 54 3310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
333218 218 218 195 195 195 226 226 226 246 246 246 3320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
334 58 58 58 2 2 6 2 2 6 30 30 30 3330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
335210 210 210 253 253 253 174 174 174 123 123 123 3340 0 0 0 0 0 0 0 0 55 57 54 68 70 65 72 73 67
336221 221 221 234 234 234 74 74 74 2 2 6 33568 70 65 63 64 60 55 56 53 43 45 43 35 37 36 28 31 30
337 2 2 6 2 2 6 2 2 6 2 2 6 33623 27 26 20 24 24 18 22 22 17 21 21 17 21 21 17 21 21
338 70 70 70 58 58 58 22 22 22 6 6 6 33720 24 24 25 27 26 31 33 31 38 39 37 46 47 43 53 55 47
339 0 0 0 0 0 0 0 0 0 0 0 0 33861 61 53 66 65 55 66 65 55 66 65 55 61 61 53 53 55 47
340 0 0 0 0 0 0 0 0 0 0 0 0 33946 47 43 37 39 37 30 33 30 24 26 24 17 21 21 15 18 18
341 0 0 0 0 0 0 0 0 0 0 0 0 34013 17 17 12 15 15 12 15 15 13 16 16 14 18 18 14 18 18
342 0 0 0 0 0 0 0 0 0 0 0 0 34114 17 17 12 15 15 30 31 28 118 116 76 134 131 96 160 154 106
343 0 0 0 0 0 0 0 0 0 0 0 0 342174 170 121 178 174 128 178 174 128 171 165 117 151 147 98 96 95 69
344 0 0 0 0 0 0 0 0 0 0 0 0 34310 12 12 10 12 12 6 8 8 0 0 0 0 0 0 0 0 0
345 0 0 0 0 0 0 0 0 0 0 0 0 3440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
346 0 0 0 0 0 0 0 0 0 0 0 0 3450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
347 0 0 0 0 0 0 0 0 0 0 0 0 3460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
348 0 0 0 0 0 0 0 0 0 0 0 0 3470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
349 0 0 0 0 0 0 0 0 0 0 0 0 3480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
350 0 0 0 0 0 0 0 0 0 0 0 0 3490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
351 0 0 0 0 0 0 0 0 0 14 14 14 3500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
352 46 46 46 82 82 82 2 2 6 106 106 106 3510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
353170 170 170 26 26 26 86 86 86 226 226 226 3520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
354123 123 123 10 10 10 14 14 14 46 46 46 3530 0 0
355231 231 231 190 190 190 6 6 6 70 70 70 3540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
356 90 90 90 238 238 238 158 158 158 2 2 6 3550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
357 2 2 6 2 2 6 2 2 6 2 2 6 3560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
358 70 70 70 58 58 58 22 22 22 6 6 6 3570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
359 0 0 0 0 0 0 0 0 0 0 0 0 3580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
360 0 0 0 0 0 0 0 0 0 0 0 0 3590 0 0 0 0 0 0 0 0 63 64 60 68 70 65 68 70 65
361 0 0 0 0 0 0 0 0 0 0 0 0 36065 66 61 58 59 55 49 51 48 39 40 39 30 32 31 23 27 26
362 0 0 0 0 0 0 0 0 0 0 0 0 36120 24 24 18 22 22 17 21 21 16 20 20 17 21 21 20 23 23
363 0 0 0 0 0 0 0 0 0 0 0 0 36225 27 26 32 35 33 43 44 41 53 55 47 66 65 55 75 75 61
364 0 0 0 0 0 0 0 0 0 0 0 0 36382 81 62 84 83 72 87 86 72 87 86 72 82 81 62 75 75 61
365 0 0 0 0 0 0 0 0 1 0 0 0 36466 65 55 53 55 47 40 41 39 31 33 31 23 25 24 17 20 20
366 0 0 1 0 0 1 0 0 1 0 0 0 36514 18 18 13 16 16 12 15 15 12 15 15 13 17 17 14 18 18
367 0 0 0 0 0 0 0 0 0 0 0 0 36614 18 18 13 16 16 46 47 43 96 95 69 125 122 87 142 137 94
368 0 0 0 0 0 0 0 0 0 0 0 0 367160 154 106 165 161 109 164 159 111 155 149 109 142 137 94 75 75 61
369 0 0 0 0 0 0 0 0 0 0 0 0 36810 12 12 10 12 12 6 8 8 0 0 0 0 0 0 0 0 0
370 0 0 0 0 0 0 0 0 0 0 0 0 3690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
371 0 0 0 0 0 0 0 0 0 14 14 14 3700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
372 42 42 42 86 86 86 6 6 6 116 116 116 3710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
373106 106 106 6 6 6 70 70 70 149 149 149 3720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
374128 128 128 18 18 18 38 38 38 54 54 54 3730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
375221 221 221 106 106 106 2 2 6 14 14 14 3740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
376 46 46 46 190 190 190 198 198 198 2 2 6 3750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
377 2 2 6 2 2 6 2 2 6 2 2 6 3760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
378 74 74 74 62 62 62 22 22 22 6 6 6 3770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
379 0 0 0 0 0 0 0 0 0 0 0 0 3780 0 0
380 0 0 0 0 0 0 0 0 0 0 0 0 3790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
381 0 0 0 0 0 0 0 0 0 0 0 0 3800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
382 0 0 0 0 0 0 0 0 0 0 0 0 3810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
383 0 0 0 0 0 0 0 0 0 0 0 0 3820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
384 0 0 0 0 0 0 0 0 0 0 0 0 3830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
385 0 0 0 0 0 0 0 0 1 0 0 0 3840 0 0 0 0 0 0 0 0 60 60 56 68 70 65 68 70 65
386 0 0 1 0 0 0 0 0 1 0 0 0 38563 64 60 55 57 54 46 47 45 35 37 36 27 30 29 23 25 24
387 0 0 0 0 0 0 0 0 0 0 0 0 38618 22 22 17 21 21 16 20 20 17 21 21 18 22 22 23 27 26
388 0 0 0 0 0 0 0 0 0 0 0 0 38731 33 31 43 44 41 55 56 53 71 71 57 84 83 72 92 91 72
389 0 0 0 0 0 0 0 0 0 0 0 0 388103 101 77 92 91 72 82 81 62 82 81 62 87 86 72 92 91 72
390 0 0 0 0 0 0 0 0 0 0 0 0 38984 83 72 71 71 57 55 56 53 43 44 41 30 33 30 22 24 23
391 0 0 0 0 0 0 0 0 0 14 14 14 39016 19 19 14 17 17 12 15 15 12 15 15 13 16 16 14 18 18
392 42 42 42 94 94 94 14 14 14 101 101 101 39114 18 18 14 17 17 43 44 41 82 81 62 118 116 76 125 122 87
393128 128 128 2 2 6 18 18 18 116 116 116 392142 137 94 144 139 99 144 139 99 134 131 96 118 116 76 53 55 47
394118 98 46 121 92 8 121 92 8 98 78 10 39310 12 12 10 12 12 6 8 8 0 0 0 0 0 0 0 0 0
395162 162 162 106 106 106 2 2 6 2 2 6 3940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
396 2 2 6 195 195 195 195 195 195 6 6 6 3950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
397 2 2 6 2 2 6 2 2 6 2 2 6 3960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
398 74 74 74 62 62 62 22 22 22 6 6 6 3970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
399 0 0 0 0 0 0 0 0 0 0 0 0 3980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
400 0 0 0 0 0 0 0 0 0 0 0 0 3990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
401 0 0 0 0 0 0 0 0 0 0 0 0 4000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
402 0 0 0 0 0 0 0 0 0 0 0 0 4010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
403 0 0 0 0 0 0 0 0 0 0 0 0 4020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
404 0 0 0 0 0 0 0 0 0 0 0 0 4030 0 0
405 0 0 0 0 0 0 0 0 1 0 0 1 4040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
406 0 0 1 0 0 0 0 0 1 0 0 0 4050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
407 0 0 0 0 0 0 0 0 0 0 0 0 4060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
408 0 0 0 0 0 0 0 0 0 0 0 0 4070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
409 0 0 0 0 0 0 0 0 0 0 0 0 4080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
410 0 0 0 0 0 0 0 0 0 0 0 0 4090 0 0 0 0 0 0 0 0 47 48 46 63 64 60 63 64 60
411 0 0 0 0 0 0 0 0 0 10 10 10 41055 57 54 49 51 48 40 43 41 32 34 33 26 28 27 20 24 24
412 38 38 38 90 90 90 14 14 14 58 58 58 41118 22 22 16 20 20 16 20 20 17 21 21 20 24 24 28 31 30
413210 210 210 26 26 26 54 38 6 154 114 10 41240 41 39 53 55 47 75 75 61 90 89 73 87 86 72 48 49 45
414226 170 11 236 186 11 225 175 15 184 144 12 41314 14 13 2 2 2 1 2 2 1 1 1 1 1 1 2 2 2
415215 174 15 175 146 61 37 26 9 2 2 6 41419 20 18 43 44 41 66 65 55 53 55 47 38 39 37 26 28 27
416 70 70 70 246 246 246 138 138 138 2 2 6 41518 22 22 14 18 18 13 16 16 12 15 15 12 15 15 13 17 17
417 2 2 6 2 2 6 2 2 6 2 2 6 41614 18 18 14 18 18 30 31 28 66 65 55 96 95 69 103 101 77
418 70 70 70 66 66 66 26 26 26 6 6 6 417118 116 76 118 116 76 118 116 76 118 116 76 103 101 77 36 38 35
419 0 0 0 0 0 0 0 0 0 0 0 0 41810 12 12 10 12 12 6 7 7 0 0 0 0 0 0 0 0 0
420 0 0 0 0 0 0 0 0 0 0 0 0 4190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
421 0 0 0 0 0 0 0 0 0 0 0 0 4200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
422 0 0 0 0 0 0 0 0 0 0 0 0 4210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
423 0 0 0 0 0 0 0 0 0 0 0 0 4220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
424 0 0 0 0 0 0 0 0 0 0 0 0 4230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
425 0 0 0 0 0 0 0 0 0 0 0 0 4240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
426 0 0 0 0 0 0 0 0 0 0 0 0 4250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
427 0 0 0 0 0 0 0 0 0 0 0 0 4260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
428 0 0 0 0 0 0 0 0 0 0 0 0 4270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
429 0 0 0 0 0 0 0 0 0 0 0 0 4280 0 0
430 0 0 0 0 0 0 0 0 0 0 0 0 4290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
431 0 0 0 0 0 0 0 0 0 10 10 10 4300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
432 38 38 38 86 86 86 14 14 14 10 10 10 4310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
433195 195 195 188 164 115 192 133 9 225 175 15 4320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
434239 182 13 234 190 10 232 195 16 232 200 30 4330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
435245 207 45 241 208 19 232 195 16 184 144 12 4340 0 0 0 0 0 0 0 0 28 31 30 55 57 54 51 52 50
436218 194 134 211 206 186 42 42 42 2 2 6 43549 51 48 41 42 42 35 37 36 28 31 30 23 27 26 20 23 23
437 2 2 6 2 2 6 2 2 6 2 2 6 43617 21 21 16 20 20 16 20 20 18 22 22 23 27 26 33 36 34
438 50 50 50 74 74 74 30 30 30 6 6 6 43748 49 45 71 71 57 82 81 62 43 44 41 8 9 9 6 7 7
439 0 0 0 0 0 0 0 0 0 0 0 0 4386 7 7 6 7 7 6 7 7 5 6 5 4 5 5 3 4 4
440 0 0 0 0 0 0 0 0 0 0 0 0 4392 3 3 1 2 2 4 5 4 36 38 35 48 49 45 32 35 33
441 0 0 0 0 0 0 0 0 0 0 0 0 44021 25 23 16 19 19 13 17 17 12 15 15 12 15 15 13 16 16
442 0 0 0 0 0 0 0 0 0 0 0 0 44114 18 18 14 18 18 16 18 16 36 38 35 61 61 53 82 81 62
443 0 0 0 0 0 0 0 0 0 0 0 0 44296 95 69 96 95 69 96 95 69 96 95 69 79 78 62 19 20 18
444 0 0 0 0 0 0 0 0 0 0 0 0 44310 12 12 10 12 12 4 5 5 0 0 0 0 0 0 0 0 0
445 0 0 0 0 0 0 0 0 0 0 0 0 4440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
446 0 0 0 0 0 0 0 0 0 0 0 0 4450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
447 0 0 0 0 0 0 0 0 0 0 0 0 4460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
448 0 0 0 0 0 0 0 0 0 0 0 0 4470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
449 0 0 0 0 0 0 0 0 0 0 0 0 4480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
450 0 0 0 0 0 0 0 0 0 0 0 0 4490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
451 0 0 0 0 0 0 0 0 0 10 10 10 4500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
452 34 34 34 86 86 86 14 14 14 2 2 6 4510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
453121 87 25 192 133 9 219 162 10 239 182 13 4520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
454236 186 11 232 195 16 241 208 19 244 214 54 4530 0 0
455246 218 60 246 218 38 246 215 20 241 208 19 4540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
456241 208 19 226 184 13 121 87 25 2 2 6 4550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
457 2 2 6 2 2 6 2 2 6 2 2 6 4560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
458 50 50 50 82 82 82 34 34 34 10 10 10 4570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
459 0 0 0 0 0 0 0 0 0 0 0 0 4580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
460 0 0 0 0 0 0 0 0 0 0 0 0 4590 0 0 0 0 0 0 0 0 13 13 13 46 47 45 43 45 43
461 0 0 0 0 0 0 0 0 0 0 0 0 46040 43 41 35 37 36 30 32 31 23 27 26 20 24 24 18 22 22
462 0 0 0 0 0 0 0 0 0 0 0 0 46117 21 21 16 20 20 17 21 21 20 23 23 27 30 29 40 41 39
463 0 0 0 0 0 0 0 0 0 0 0 0 46261 61 53 53 55 47 16 17 16 9 11 11 10 12 12 10 12 12
464 0 0 0 0 0 0 0 0 0 0 0 0 46310 12 12 10 12 12 10 12 12 9 11 11 8 10 10 8 9 9
465 0 0 0 0 0 0 0 0 0 0 0 0 4646 8 8 5 6 5 4 5 5 2 3 3 19 20 18 38 39 37
466 0 0 0 0 0 0 0 0 0 0 0 0 46526 28 27 17 21 21 14 17 17 13 16 16 12 15 15 12 15 15
467 0 0 0 0 0 0 0 0 0 0 0 0 46613 17 17 14 18 18 12 15 15 13 12 7 30 31 28 46 47 43
468 0 0 0 0 0 0 0 0 0 0 0 0 46753 55 47 66 65 55 66 65 55 53 55 47 36 38 35 10 12 12
469 0 0 0 0 0 0 0 0 0 0 0 0 46810 12 12 10 12 12 2 3 3 0 0 0 0 0 0 0 0 0
470 0 0 0 0 0 0 0 0 0 0 0 0 4690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
471 0 0 0 0 0 0 0 0 0 10 10 10 4700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
472 34 34 34 82 82 82 30 30 30 61 42 6 4710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
473180 123 7 206 145 10 230 174 11 239 182 13 4720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
474234 190 10 238 202 15 241 208 19 246 218 74 4730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
475246 218 38 246 215 20 246 215 20 246 215 20 4740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
476226 184 13 215 174 15 184 144 12 6 6 6 4750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
477 2 2 6 2 2 6 2 2 6 2 2 6 4760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
478 26 26 26 94 94 94 42 42 42 14 14 14 4770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
479 0 0 0 0 0 0 0 0 0 0 0 0 4780 0 0
480 0 0 0 0 0 0 0 0 0 0 0 0 4790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
481 0 0 0 0 0 0 0 0 0 0 0 0 4800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
482 0 0 0 0 0 0 0 0 0 0 0 0 4810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
483 0 0 0 0 0 0 0 0 0 0 0 0 4820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
484 0 0 0 0 0 0 0 0 0 0 0 0 4830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
485 0 0 0 0 0 0 0 0 0 0 0 0 4840 0 0 0 0 0 0 0 0 1 1 1 33 37 35 35 37 36
486 0 0 0 0 0 0 0 0 0 0 0 0 48532 35 33 28 31 30 23 27 26 20 24 24 18 22 22 17 21 21
487 0 0 0 0 0 0 0 0 0 0 0 0 48616 20 20 16 20 20 17 21 21 21 25 23 31 33 31 44 46 43
488 0 0 0 0 0 0 0 0 0 0 0 0 48731 33 31 11 13 13 12 14 14 12 15 15 13 16 16 14 17 17
489 0 0 0 0 0 0 0 0 0 0 0 0 48814 17 17 14 17 17 14 17 17 13 16 16 12 15 15 12 14 14
490 0 0 0 0 0 0 0 0 0 0 0 0 48911 13 13 9 11 11 8 10 10 6 8 8 4 5 5 17 18 17
491 0 0 0 0 0 0 0 0 0 10 10 10 49030 33 30 20 23 22 15 18 18 13 16 16 12 15 15 12 14 14
492 30 30 30 78 78 78 50 50 50 104 69 6 49113 16 16 14 17 17 14 18 18 11 12 11 7 7 5 16 17 12
493192 133 9 216 158 10 236 178 12 236 186 11 49221 22 20 30 31 28 25 27 25 21 22 20 14 14 13 10 12 12
494232 195 16 241 208 19 244 214 54 245 215 43 49310 12 12 9 11 11 0 0 0 0 0 0 0 0 0 0 0 0
495246 215 20 246 215 20 241 208 19 198 155 10 4940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
496200 144 11 216 158 10 156 118 10 2 2 6 4950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
497 2 2 6 2 2 6 2 2 6 2 2 6 4960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
498 6 6 6 90 90 90 54 54 54 18 18 18 4970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
499 6 6 6 0 0 0 0 0 0 0 0 0 4980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
500 0 0 0 0 0 0 0 0 0 0 0 0 4990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
501 0 0 0 0 0 0 0 0 0 0 0 0 5000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
502 0 0 0 0 0 0 0 0 0 0 0 0 5010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
503 0 0 0 0 0 0 0 0 0 0 0 0 5020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
504 0 0 0 0 0 0 0 0 0 0 0 0 5030 0 0
505 0 0 0 0 0 0 0 0 0 0 0 0 5040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
506 0 0 0 0 0 0 0 0 0 0 0 0 5050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
507 0 0 0 0 0 0 0 0 0 0 0 0 5060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
508 0 0 0 0 0 0 0 0 0 0 0 0 5070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
509 0 0 0 0 0 0 0 0 0 0 0 0 5080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
510 0 0 0 0 0 0 0 0 0 0 0 0 5090 0 0 0 0 0 0 0 0 0 0 0 18 22 22 27 30 29
511 0 0 0 0 0 0 0 0 0 10 10 10 51027 29 28 40 41 39 53 55 47 53 55 47 53 55 47 46 47 43
512 30 30 30 78 78 78 46 46 46 22 22 22 51125 27 25 16 20 20 17 21 21 23 25 24 31 33 31 20 20 20
513137 92 6 210 162 10 239 182 13 238 190 10 51212 15 15 14 17 17 15 19 19 16 20 20 17 21 21 18 22 22
514238 202 15 241 208 19 246 215 20 246 215 20 51318 22 22 18 22 22 18 22 22 17 21 21 17 21 21 16 19 19
515241 208 19 203 166 17 185 133 11 210 150 10 51415 18 18 13 16 16 12 15 15 10 12 12 8 10 10 6 8 8
516216 158 10 210 150 10 102 78 10 2 2 6 51521 22 21 22 24 23 15 19 19 13 17 17 13 16 16 12 15 15
517 6 6 6 54 54 54 14 14 14 2 2 6 51612 15 15 13 17 17 14 18 18 14 18 18 13 15 14 10 9 6
518 2 2 6 62 62 62 74 74 74 30 30 30 5177 7 5 7 7 5 7 7 5 9 11 11 10 12 12 10 12 12
519 10 10 10 0 0 0 0 0 0 0 0 0 51810 12 12 6 7 7 0 0 0 0 0 0 0 0 0 0 0 0
520 0 0 0 0 0 0 0 0 0 0 0 0 5190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
521 0 0 0 0 0 0 0 0 0 0 0 0 5200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
522 0 0 0 0 0 0 0 0 0 0 0 0 5210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
523 0 0 0 0 0 0 0 0 0 0 0 0 5220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
524 0 0 0 0 0 0 0 0 0 0 0 0 5230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
525 0 0 0 0 0 0 0 0 0 0 0 0 5240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
526 0 0 0 0 0 0 0 0 0 0 0 0 5250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
527 0 0 0 0 0 0 0 0 0 0 0 0 5260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
528 0 0 0 0 0 0 0 0 0 0 0 0 5270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
529 0 0 0 0 0 0 0 0 0 0 0 0 5280 0 0
530 0 0 0 0 0 0 0 0 0 0 0 0 5290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
531 0 0 0 0 0 0 0 0 0 10 10 10 5300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
532 34 34 34 78 78 78 50 50 50 6 6 6 5310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
533 94 70 30 139 102 15 190 146 13 226 184 13 5320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
534232 200 30 232 195 16 215 174 15 190 146 13 5330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
535168 122 10 192 133 9 210 150 10 213 154 11 5340 0 0 0 0 0 0 0 0 0 0 0 16 17 12 82 81 62
536202 150 34 182 157 106 101 98 89 2 2 6 535118 116 76 118 116 76 161 156 96 161 156 96 161 156 96 118 116 76
537 2 2 6 78 78 78 116 116 116 58 58 58 536118 116 76 96 95 69 53 55 47 22 24 23 14 17 17 13 16 16
538 2 2 6 22 22 22 90 90 90 46 46 46 53715 19 19 17 21 21 18 22 22 20 24 24 20 24 24 23 27 26
539 18 18 18 6 6 6 0 0 0 0 0 0 53823 27 26 23 27 26 23 27 26 23 27 26 23 27 26 20 24 24
540 0 0 0 0 0 0 0 0 0 0 0 0 53920 23 23 17 21 21 16 19 19 14 17 17 12 15 15 10 12 12
541 0 0 0 0 0 0 0 0 0 0 0 0 5409 11 11 20 23 22 16 19 19 14 17 17 13 16 16 12 15 15
542 0 0 0 0 0 0 0 0 0 0 0 0 54111 14 14 13 16 16 14 17 17 14 18 18 14 17 17 12 15 15
543 0 0 0 0 0 0 0 0 0 0 0 0 54210 12 12 10 12 12 10 12 12 10 12 12 10 12 12 10 12 12
544 0 0 0 0 0 0 0 0 0 0 0 0 5439 11 11 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
545 0 0 0 0 0 0 0 0 0 0 0 0 5440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
546 0 0 0 0 0 0 0 0 0 0 0 0 5450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
547 0 0 0 0 0 0 0 0 0 0 0 0 5460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
548 0 0 0 0 0 0 0 0 0 0 0 0 5470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
549 0 0 0 0 0 0 0 0 0 0 0 0 5480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
550 0 0 0 0 0 0 0 0 0 0 0 0 5490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
551 0 0 0 0 0 0 0 0 0 10 10 10 5500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
552 38 38 38 86 86 86 50 50 50 6 6 6 5510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
553128 128 128 174 154 114 156 107 11 168 122 10 5520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
554198 155 10 184 144 12 197 138 11 200 144 11 5530 0 0
555206 145 10 206 145 10 197 138 11 188 164 115 5540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
556195 195 195 198 198 198 174 174 174 14 14 14 5550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
557 2 2 6 22 22 22 116 116 116 116 116 116 5560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
558 22 22 22 2 2 6 74 74 74 70 70 70 5570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
559 30 30 30 10 10 10 0 0 0 0 0 0 5580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
560 0 0 0 0 0 0 0 0 0 0 0 0 5590 0 0 0 0 0 0 0 0 0 0 0 53 55 47 161 156 96
561 0 0 0 0 0 0 0 0 0 0 0 0 560161 156 96 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
562 0 0 0 0 0 0 0 0 0 0 0 0 561230 229 82 161 156 96 118 116 76 96 95 69 21 22 20 16 19 19
563 0 0 0 0 0 0 0 0 0 0 0 0 56218 22 22 20 24 24 23 27 26 23 27 26 26 28 27 27 30 29
564 0 0 0 0 0 0 0 0 0 0 0 0 56327 30 29 18 22 22 12 14 14 8 10 10 9 11 11 17 21 21
565 0 0 0 0 0 0 0 0 0 0 0 0 56423 27 26 23 27 26 20 24 24 18 22 22 16 20 20 14 17 17
566 0 0 0 0 0 0 0 0 0 0 0 0 56512 14 14 14 17 17 16 20 20 14 17 17 13 17 17 13 16 16
567 0 0 0 0 0 0 0 0 0 0 0 0 56612 15 15 12 15 15 13 17 17 14 18 18 14 17 17 13 16 16
568 0 0 0 0 0 0 0 0 0 0 0 0 56711 13 13 10 12 12 10 12 12 10 12 12 10 12 12 10 12 12
569 0 0 0 0 0 0 0 0 0 0 0 0 5684 5 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
570 0 0 0 0 0 0 0 0 0 0 0 0 5690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
571 0 0 0 0 0 0 6 6 6 18 18 18 5700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
572 50 50 50 101 101 101 26 26 26 10 10 10 5710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
573138 138 138 190 190 190 174 154 114 156 107 11 5720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
574197 138 11 200 144 11 197 138 11 192 133 9 5730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
575180 123 7 190 142 34 190 178 144 187 187 187 5740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
576202 202 202 221 221 221 214 214 214 66 66 66 5750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
577 2 2 6 2 2 6 50 50 50 62 62 62 5760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
578 6 6 6 2 2 6 10 10 10 90 90 90 5770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
579 50 50 50 18 18 18 6 6 6 0 0 0 5780 0 0
580 0 0 0 0 0 0 0 0 0 0 0 0 5790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
581 0 0 0 0 0 0 0 0 0 0 0 0 5800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
582 0 0 0 0 0 0 0 0 0 0 0 0 5810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
583 0 0 0 0 0 0 0 0 0 0 0 0 5820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
584 0 0 0 0 0 0 0 0 0 0 0 0 5830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
585 0 0 0 0 0 0 0 0 0 0 0 0 5840 0 0 0 0 0 0 0 0 13 12 7 118 116 76 230 229 82
586 0 0 0 0 0 0 0 0 0 0 0 0 585230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
587 0 0 0 0 0 0 0 0 0 0 0 0 586230 229 82 230 229 82 230 229 82 161 156 96 118 116 76 30 31 28
588 0 0 0 0 0 0 0 0 0 0 0 0 58720 24 24 23 27 26 27 30 29 28 31 30 30 32 31 23 27 26
589 0 0 0 0 0 0 0 0 0 0 0 0 58816 19 19 17 21 21 12 15 15 9 11 11 10 12 12 9 11 11
590 0 0 0 0 0 0 0 0 0 0 0 0 58920 24 24 28 31 30 26 28 27 23 27 26 20 24 24 17 21 21
591 0 0 0 0 0 0 10 10 10 34 34 34 59015 19 19 13 16 16 16 19 19 14 18 18 14 17 17 13 16 16
592 74 74 74 74 74 74 2 2 6 6 6 6 59112 15 15 11 14 14 13 16 16 14 17 17 14 18 18 14 17 17
593144 144 144 198 198 198 190 190 190 178 166 146 59212 15 15 10 12 12 10 12 12 10 12 12 10 12 12 8 9 9
594154 121 60 156 107 11 156 107 11 168 124 44 5930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
595174 154 114 187 187 187 190 190 190 210 210 210 5940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
596246 246 246 253 253 253 253 253 253 182 182 182 5950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
597 6 6 6 2 2 6 2 2 6 2 2 6 5960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
598 2 2 6 2 2 6 2 2 6 62 62 62 5970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
599 74 74 74 34 34 34 14 14 14 0 0 0 5980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
600 0 0 0 0 0 0 0 0 0 0 0 0 5990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
601 0 0 0 0 0 0 0 0 0 0 0 0 6000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
602 0 0 0 0 0 0 0 0 0 0 0 0 6010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
603 0 0 0 0 0 0 0 0 0 0 0 0 6020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
604 0 0 0 0 0 0 0 0 0 0 0 0 6030 0 0
605 0 0 0 0 0 0 0 0 0 0 0 0 6040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
606 0 0 0 0 0 0 0 0 0 0 0 0 6050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
607 0 0 0 0 0 0 0 0 0 0 0 0 6060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
608 0 0 0 0 0 0 0 0 0 0 0 0 6070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
609 0 0 0 0 0 0 0 0 0 0 0 0 6080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
610 0 0 0 0 0 0 0 0 0 0 0 0 6090 0 0 0 0 0 0 0 0 82 81 62 161 156 96 230 229 82
611 0 0 0 10 10 10 22 22 22 54 54 54 610230 229 82 233 233 100 230 229 82 230 229 82 230 229 82 230 229 82
612 94 94 94 18 18 18 2 2 6 46 46 46 611230 229 82 230 229 82 230 229 82 230 229 82 161 156 96 118 116 76
613234 234 234 221 221 221 190 190 190 190 190 190 61227 29 28 27 30 29 30 32 31 30 32 31 23 27 26 20 24 24
614190 190 190 187 187 187 187 187 187 190 190 190 61326 28 27 17 21 21 6 7 7 72 73 67 145 141 105 15 15 15
615190 190 190 195 195 195 214 214 214 242 242 242 61414 17 17 33 37 35 30 32 31 28 31 30 26 28 27 23 27 26
616253 253 253 253 253 253 253 253 253 253 253 253 61520 23 23 16 20 20 15 19 19 14 18 18 14 17 17 13 16 16
617 82 82 82 2 2 6 2 2 6 2 2 6 61612 15 15 11 14 14 12 15 15 13 17 17 14 18 18 14 17 17
618 2 2 6 2 2 6 2 2 6 14 14 14 61713 16 16 11 13 13 10 12 12 10 12 12 9 11 11 1 1 1
619 86 86 86 54 54 54 22 22 22 6 6 6 6180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
620 0 0 0 0 0 0 0 0 0 0 0 0 6190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
621 0 0 0 0 0 0 0 0 0 0 0 0 6200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
622 0 0 0 0 0 0 0 0 0 0 0 0 6210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
623 0 0 0 0 0 0 0 0 0 0 0 0 6220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
624 0 0 0 0 0 0 0 0 0 0 0 0 6230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
625 0 0 0 0 0 0 0 0 0 0 0 0 6240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
626 0 0 0 0 0 0 0 0 0 0 0 0 6250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
627 0 0 0 0 0 0 0 0 0 0 0 0 6260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
628 0 0 0 0 0 0 0 0 0 0 0 0 6270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
629 0 0 0 0 0 0 0 0 0 0 0 0 6280 0 0
630 0 0 0 0 0 0 0 0 0 0 0 0 6290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
631 6 6 6 18 18 18 46 46 46 90 90 90 6300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
632 46 46 46 18 18 18 6 6 6 182 182 182 6310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
633253 253 253 246 246 246 206 206 206 190 190 190 6320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
634190 190 190 190 190 190 190 190 190 190 190 190 6330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
635206 206 206 231 231 231 250 250 250 253 253 253 6340 0 0 0 0 0 16 17 12 161 156 96 230 229 82 230 229 82
636253 253 253 253 253 253 253 253 253 253 253 253 635243 242 120 235 234 117 230 229 82 230 229 82 230 229 82 230 229 82
637202 202 202 14 14 14 2 2 6 2 2 6 636230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 161 156 96
638 2 2 6 2 2 6 2 2 6 2 2 6 63782 81 62 28 31 30 28 31 30 27 30 29 28 31 30 30 32 31
639 42 42 42 86 86 86 42 42 42 18 18 18 63833 37 35 13 16 16 3 3 3 105 104 92 210 208 158 12 14 14
640 6 6 6 0 0 0 0 0 0 0 0 0 63917 21 21 33 37 35 33 37 35 32 35 33 30 32 31 27 30 29
641 0 0 0 0 0 0 0 0 0 0 0 0 64023 27 26 20 23 23 17 20 20 15 18 18 14 18 18 13 17 17
642 0 0 0 0 0 0 0 0 0 0 0 0 64113 16 16 12 15 15 11 14 14 13 16 16 14 17 17 14 18 18
643 0 0 0 0 0 0 0 0 0 0 0 0 64213 17 17 12 15 15 10 12 12 10 12 12 3 4 4 0 0 0
644 0 0 0 0 0 0 0 0 0 0 0 0 6430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
645 0 0 0 0 0 0 0 0 0 0 0 0 6440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
646 0 0 0 0 0 0 0 0 0 0 0 0 6450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
647 0 0 0 0 0 0 0 0 0 0 0 0 6460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
648 0 0 0 0 0 0 0 0 0 0 0 0 6470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
649 0 0 0 0 0 0 0 0 0 0 0 0 6480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
650 0 0 0 0 0 0 0 0 0 6 6 6 6490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
651 14 14 14 38 38 38 74 74 74 66 66 66 6500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
652 2 2 6 6 6 6 90 90 90 250 250 250 6510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
653253 253 253 253 253 253 238 238 238 198 198 198 6520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
654190 190 190 190 190 190 195 195 195 221 221 221 6530 0 0
655246 246 246 253 253 253 253 253 253 253 253 253 6540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
656253 253 253 253 253 253 253 253 253 253 253 253 6550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
657253 253 253 82 82 82 2 2 6 2 2 6 6560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
658 2 2 6 2 2 6 2 2 6 2 2 6 6570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
659 2 2 6 78 78 78 70 70 70 34 34 34 6580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
660 14 14 14 6 6 6 0 0 0 0 0 0 6590 0 0 0 0 0 96 95 69 230 229 82 230 229 82 244 244 132
661 0 0 0 0 0 0 0 0 0 0 0 0 660241 241 143 243 242 120 230 229 82 230 229 82 230 229 82 230 229 82
662 0 0 0 0 0 0 0 0 0 0 0 0 661230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
663 0 0 0 0 0 0 0 0 0 0 0 0 662161 156 96 46 47 43 32 35 33 33 37 35 33 37 35 33 37 35
664 0 0 0 0 0 0 0 0 0 0 0 0 66340 43 41 23 27 26 1 1 1 2 2 2 24 26 24 14 17 17
665 0 0 0 0 0 0 0 0 0 0 0 0 66423 27 26 33 37 35 33 37 35 33 37 35 33 37 35 30 32 31
666 0 0 0 0 0 0 0 0 0 0 0 0 66527 30 29 23 27 26 20 23 23 15 18 18 14 18 18 14 17 17
667 0 0 0 0 0 0 0 0 0 0 0 0 66613 16 16 12 15 15 11 14 14 12 15 15 13 17 17 14 17 17
668 0 0 0 0 0 0 0 0 0 0 0 0 66714 17 17 13 16 16 11 13 13 6 8 8 0 0 0 0 0 0
669 0 0 0 0 0 0 0 0 0 0 0 0 6680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
670 0 0 0 0 0 0 0 0 0 14 14 14 6690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
671 34 34 34 66 66 66 78 78 78 6 6 6 6700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
672 2 2 6 18 18 18 218 218 218 253 253 253 6710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
673253 253 253 253 253 253 253 253 253 246 246 246 6720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
674226 226 226 231 231 231 246 246 246 253 253 253 6730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
675253 253 253 253 253 253 253 253 253 253 253 253 6740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
676253 253 253 253 253 253 253 253 253 253 253 253 6750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
677253 253 253 178 178 178 2 2 6 2 2 6 6760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
678 2 2 6 2 2 6 2 2 6 2 2 6 6770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
679 2 2 6 18 18 18 90 90 90 62 62 62 6780 0 0
680 30 30 30 10 10 10 0 0 0 0 0 0 6790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
681 0 0 0 0 0 0 0 0 0 0 0 0 6800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
682 0 0 0 0 0 0 0 0 0 0 0 0 6810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
683 0 0 0 0 0 0 0 0 0 0 0 0 6820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
684 0 0 0 0 0 0 0 0 0 0 0 0 6830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
685 0 0 0 0 0 0 0 0 0 0 0 0 6840 0 0 16 17 12 161 156 96 230 229 82 235 234 117 239 239 170
686 0 0 0 0 0 0 0 0 0 0 0 0 685239 239 170 236 236 101 230 229 82 230 229 82 230 229 82 230 229 82
687 0 0 0 0 0 0 0 0 0 0 0 0 686230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
688 0 0 0 0 0 0 0 0 0 0 0 0 687230 229 82 118 116 76 33 37 35 33 37 35 37 39 37 37 39 37
689 0 0 0 0 0 0 0 0 0 0 0 0 68843 45 43 49 51 48 20 24 24 8 10 10 17 20 20 35 37 36
690 0 0 0 0 0 0 10 10 10 26 26 26 68933 37 35 40 43 41 37 39 37 35 37 36 33 37 35 33 37 35
691 58 58 58 90 90 90 18 18 18 2 2 6 69030 32 31 27 30 29 23 27 26 15 19 19 14 18 18 14 17 17
692 2 2 6 110 110 110 253 253 253 253 253 253 69113 17 17 13 16 16 12 15 15 11 14 14 13 16 16 14 17 17
693253 253 253 253 253 253 253 253 253 253 253 253 69214 17 17 13 17 17 11 14 14 4 5 5 0 0 0 0 0 0
694250 250 250 253 253 253 253 253 253 253 253 253 6930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
695253 253 253 253 253 253 253 253 253 253 253 253 6940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
696253 253 253 253 253 253 253 253 253 253 253 253 6950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
697253 253 253 231 231 231 18 18 18 2 2 6 6960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
698 2 2 6 2 2 6 2 2 6 2 2 6 6970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
699 2 2 6 2 2 6 18 18 18 94 94 94 6980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
700 54 54 54 26 26 26 10 10 10 0 0 0 6990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
701 0 0 0 0 0 0 0 0 0 0 0 0 7000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
702 0 0 0 0 0 0 0 0 0 0 0 0 7010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
703 0 0 0 0 0 0 0 0 0 0 0 0 7020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
704 0 0 0 0 0 0 0 0 0 0 0 0 7030 0 0
705 0 0 0 0 0 0 0 0 0 0 0 0 7040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
706 0 0 0 0 0 0 0 0 0 0 0 0 7050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
707 0 0 0 0 0 0 0 0 0 0 0 0 7060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
708 0 0 0 0 0 0 0 0 0 0 0 0 7070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
709 0 0 0 0 0 0 0 0 0 0 0 0 7080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
710 0 0 0 6 6 6 22 22 22 50 50 50 7090 0 0 96 95 69 230 229 82 230 229 82 239 239 170 251 251 187
711 90 90 90 26 26 26 2 2 6 2 2 6 710241 241 143 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
712 14 14 14 195 195 195 250 250 250 253 253 253 711230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
713253 253 253 253 253 253 253 253 253 253 253 253 712230 229 82 161 156 96 36 38 35 33 37 35 33 37 35 33 37 35
714253 253 253 253 253 253 253 253 253 253 253 253 71337 39 37 47 48 46 55 57 54 55 57 54 49 51 48 43 45 43
715253 253 253 253 253 253 253 253 253 253 253 253 71443 45 43 43 45 43 40 43 41 40 43 41 37 39 37 33 37 35
716253 253 253 253 253 253 253 253 253 253 253 253 71533 37 35 28 31 30 26 28 27 16 20 20 15 18 18 14 18 18
717250 250 250 242 242 242 54 54 54 2 2 6 71614 17 17 13 16 16 12 15 15 11 14 14 12 15 15 13 17 17
718 2 2 6 2 2 6 2 2 6 2 2 6 71714 17 17 14 17 17 8 10 10 5 7 7 0 0 0 0 0 0
719 2 2 6 2 2 6 2 2 6 38 38 38 7180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
720 86 86 86 50 50 50 22 22 22 6 6 6 7190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
721 0 0 0 0 0 0 0 0 0 0 0 0 7200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
722 0 0 0 0 0 0 0 0 0 0 0 0 7210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
723 0 0 0 0 0 0 0 0 0 0 0 0 7220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
724 0 0 0 0 0 0 0 0 0 0 0 0 7230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
725 0 0 0 0 0 0 0 0 0 0 0 0 7240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
726 0 0 0 0 0 0 0 0 0 0 0 0 7250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
727 0 0 0 0 0 0 0 0 0 0 0 0 7260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
728 0 0 0 0 0 0 0 0 0 0 0 0 7270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
729 0 0 0 0 0 0 0 0 0 0 0 0 7280 0 0
730 6 6 6 14 14 14 38 38 38 82 82 82 7290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
731 34 34 34 2 2 6 2 2 6 2 2 6 7300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
732 42 42 42 195 195 195 246 246 246 253 253 253 7310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
733253 253 253 253 253 253 253 253 253 250 250 250 7320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
734242 242 242 242 242 242 250 250 250 253 253 253 7330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
735253 253 253 253 253 253 253 253 253 253 253 253 73416 17 12 230 229 82 230 229 82 243 242 120 251 251 187 251 251 187
736253 253 253 250 250 250 246 246 246 238 238 238 735246 246 123 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
737226 226 226 231 231 231 101 101 101 6 6 6 736230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
738 2 2 6 2 2 6 2 2 6 2 2 6 737230 229 82 230 229 82 66 65 55 30 32 31 32 35 33 33 37 35
739 2 2 6 2 2 6 2 2 6 2 2 6 73833 37 35 37 39 37 40 43 41 47 48 46 49 51 48 51 52 50
740 38 38 38 82 82 82 42 42 42 14 14 14 73955 57 54 55 57 54 51 52 50 47 48 46 43 45 43 39 40 39
741 6 6 6 0 0 0 0 0 0 0 0 0 74033 37 35 30 32 31 26 28 27 17 21 21 15 19 19 14 18 18
742 0 0 0 0 0 0 0 0 0 0 0 0 74114 17 17 13 16 16 12 15 15 12 14 14 11 14 14 13 16 16
743 0 0 0 0 0 0 0 0 0 0 0 0 74214 17 17 12 15 15 7 9 9 6 8 8 1 1 1 0 0 0
744 0 0 0 0 0 0 0 0 0 0 0 0 7430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
745 0 0 0 0 0 0 0 0 0 0 0 0 7440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
746 0 0 0 0 0 0 0 0 0 0 0 0 7450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
747 0 0 0 0 0 0 0 0 0 0 0 0 7460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
748 0 0 0 0 0 0 0 0 0 0 0 0 7470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
749 0 0 0 0 0 0 0 0 0 0 0 0 7480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
750 10 10 10 26 26 26 62 62 62 66 66 66 7490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
751 2 2 6 2 2 6 2 2 6 6 6 6 7500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
752 70 70 70 170 170 170 206 206 206 234 234 234 7510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
753246 246 246 250 250 250 250 250 250 238 238 238 7520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
754226 226 226 231 231 231 238 238 238 250 250 250 7530 0 0
755250 250 250 250 250 250 246 246 246 231 231 231 7540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
756214 214 214 206 206 206 202 202 202 202 202 202 7550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
757198 198 198 202 202 202 182 182 182 18 18 18 7560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
758 2 2 6 2 2 6 2 2 6 2 2 6 7570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
759 2 2 6 2 2 6 2 2 6 2 2 6 7580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
760 2 2 6 62 62 62 66 66 66 30 30 30 75996 95 69 230 229 82 230 229 82 239 239 170 251 251 187 239 239 170
761 10 10 10 0 0 0 0 0 0 0 0 0 760230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
762 0 0 0 0 0 0 0 0 0 0 0 0 761230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
763 0 0 0 0 0 0 0 0 0 0 0 0 762230 229 82 230 229 82 96 95 69 27 30 29 28 31 30 30 32 31
764 0 0 0 0 0 0 0 0 0 0 0 0 76333 37 35 40 43 41 46 47 45 55 57 54 63 64 60 72 73 67
765 0 0 0 0 0 0 0 0 0 0 0 0 76472 73 67 72 73 67 72 73 67 65 66 61 55 57 54 47 48 46
766 0 0 0 0 0 0 0 0 0 0 0 0 76539 40 39 32 35 33 27 30 29 17 21 21 15 19 19 15 18 18
767 0 0 0 0 0 0 0 0 0 0 0 0 76614 18 18 13 17 17 13 16 16 12 15 15 11 14 14 12 14 14
768 0 0 0 0 0 0 0 0 0 0 0 0 76713 16 16 9 11 11 7 9 9 9 11 11 66 65 55 115 113 82
769 0 0 0 0 0 0 0 0 0 0 0 0 76821 22 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
770 14 14 14 42 42 42 82 82 82 18 18 18 7690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
771 2 2 6 2 2 6 2 2 6 10 10 10 7700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
772 94 94 94 182 182 182 218 218 218 242 242 242 7710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
773250 250 250 253 253 253 253 253 253 250 250 250 7720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
774234 234 234 253 253 253 253 253 253 253 253 253 7730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
775253 253 253 253 253 253 253 253 253 246 246 246 7740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
776238 238 238 226 226 226 210 210 210 202 202 202 7750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
777195 195 195 195 195 195 210 210 210 158 158 158 7760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
778 6 6 6 14 14 14 50 50 50 14 14 14 7770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
779 2 2 6 2 2 6 2 2 6 2 2 6 7780 0 0
780 2 2 6 6 6 6 86 86 86 46 46 46 7790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
781 18 18 18 6 6 6 0 0 0 0 0 0 7800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
782 0 0 0 0 0 0 0 0 0 0 0 0 7810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
783 0 0 0 0 0 0 0 0 0 0 0 0 7820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
784 0 0 0 0 0 0 0 0 0 0 0 0 7830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13 12 7
785 0 0 0 0 0 0 0 0 0 0 0 0 784230 229 82 230 229 82 236 236 101 251 251 187 251 251 187 246 246 123
786 0 0 0 0 0 0 0 0 0 0 0 0 785230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
787 0 0 0 0 0 0 0 0 0 0 0 0 786230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
788 0 0 0 0 0 0 0 0 0 0 0 0 787230 229 82 230 229 82 118 116 76 23 27 26 26 28 27 32 35 33
789 0 0 0 0 0 0 0 0 0 6 6 6 78851 52 50 90 89 73 110 109 94 145 141 105 168 163 120 177 172 135
790 22 22 22 54 54 54 70 70 70 2 2 6 789177 172 135 188 184 146 188 184 146 181 176 137 194 191 148 188 184 146
791 2 2 6 10 10 10 2 2 6 22 22 22 790184 179 149 188 184 146 188 184 146 156 151 111 177 172 135 181 176 137
792166 166 166 231 231 231 250 250 250 253 253 253 791177 172 135 168 163 120 168 163 120 158 153 112 156 151 111 158 153 112
793253 253 253 253 253 253 253 253 253 250 250 250 792156 151 111 158 153 112 177 172 135 188 184 146 188 184 146 194 189 146
794242 242 242 253 253 253 253 253 253 253 253 253 79336 38 35 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
795253 253 253 253 253 253 253 253 253 253 253 253 7940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
796253 253 253 253 253 253 253 253 253 246 246 246 7950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
797231 231 231 206 206 206 198 198 198 226 226 226 7960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
798 94 94 94 2 2 6 6 6 6 38 38 38 7970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
799 30 30 30 2 2 6 2 2 6 2 2 6 7980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
800 2 2 6 2 2 6 62 62 62 66 66 66 7990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
801 26 26 26 10 10 10 0 0 0 0 0 0 8000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
802 0 0 0 0 0 0 0 0 0 0 0 0 8010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
803 0 0 0 0 0 0 0 0 0 0 0 0 8020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
804 0 0 0 0 0 0 0 0 0 0 0 0 8030 0 0
805 0 0 0 0 0 0 0 0 0 0 0 0 8040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
806 0 0 0 0 0 0 0 0 0 0 0 0 8050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
807 0 0 0 0 0 0 0 0 0 0 0 0 8060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
808 0 0 0 0 0 0 0 0 0 0 0 0 8070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
809 0 0 0 0 0 0 0 0 0 10 10 10 8080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 82 81 62
810 30 30 30 74 74 74 50 50 50 2 2 6 809230 229 82 230 229 82 244 244 132 251 251 187 244 244 132 230 229 82
811 26 26 26 26 26 26 2 2 6 106 106 106 810230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
812238 238 238 253 253 253 253 253 253 253 253 253 811230 229 82 230 229 82 230 229 82 230 229 82 161 156 96 82 81 62
813253 253 253 253 253 253 253 253 253 253 253 253 81296 95 69 230 229 82 181 178 103 110 109 94 156 151 111 188 184 146
814253 253 253 253 253 253 253 253 253 253 253 253 813188 184 146 197 193 154 188 184 146 184 181 136 188 184 146 168 163 120
815253 253 253 253 253 253 253 253 253 253 253 253 814168 163 120 178 174 128 156 151 111 158 153 112 174 170 121 156 151 111
816253 253 253 253 253 253 253 253 253 253 253 253 815156 151 111 158 153 112 156 151 111 168 163 120 178 174 128 181 176 137
817253 253 253 246 246 246 218 218 218 202 202 202 816176 171 126 178 174 128 184 181 136 176 171 126 178 174 128 184 181 136
818210 210 210 14 14 14 2 2 6 2 2 6 817176 171 126 178 174 128 184 181 136 164 159 111 155 149 109 96 95 69
819 30 30 30 22 22 22 2 2 6 2 2 6 8181 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
820 2 2 6 2 2 6 18 18 18 86 86 86 8190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
821 42 42 42 14 14 14 0 0 0 0 0 0 8200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
822 0 0 0 0 0 0 0 0 0 0 0 0 8210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
823 0 0 0 0 0 0 0 0 0 0 0 0 8220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
824 0 0 0 0 0 0 0 0 0 0 0 0 8230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
825 0 0 0 0 0 0 0 0 0 0 0 0 8240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
826 0 0 0 0 0 0 0 0 0 0 0 0 8250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
827 0 0 0 0 0 0 0 0 0 0 0 0 8260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
828 0 0 0 0 0 0 0 0 0 0 0 0 8270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
829 0 0 0 0 0 0 0 0 0 14 14 14 8280 0 0
830 42 42 42 90 90 90 22 22 22 2 2 6 8290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
831 42 42 42 2 2 6 18 18 18 218 218 218 8300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
832253 253 253 253 253 253 253 253 253 253 253 253 8310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
833253 253 253 253 253 253 253 253 253 253 253 253 8320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
834253 253 253 253 253 253 253 253 253 253 253 253 8330 0 0 0 0 0 0 0 0 0 0 0 2 2 1 161 156 96
835253 253 253 253 253 253 253 253 253 253 253 253 834230 229 82 230 229 82 244 244 132 244 244 132 236 236 101 230 229 82
836253 253 253 253 253 253 253 253 253 253 253 253 835230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
837253 253 253 253 253 253 250 250 250 221 221 221 836230 229 82 230 229 82 230 229 82 230 229 82 46 47 43 82 81 62
838218 218 218 101 101 101 2 2 6 14 14 14 837158 153 112 197 193 154 194 189 146 184 181 136 188 184 146 168 163 120
839 18 18 18 38 38 38 10 10 10 2 2 6 838156 151 111 137 133 100 131 127 93 137 133 100 137 133 100 158 153 112
840 2 2 6 2 2 6 2 2 6 78 78 78 839121 119 87 137 133 100 156 151 111 145 141 105 99 98 80 84 83 72
841 58 58 58 22 22 22 6 6 6 0 0 0 84063 64 60 52 53 49 40 43 41 33 36 34 36 38 35 36 38 35
842 0 0 0 0 0 0 0 0 0 0 0 0 84138 39 37 43 44 41 43 44 41 46 47 43 48 49 45 48 49 45
843 0 0 0 0 0 0 0 0 0 0 0 0 84246 47 43 36 38 35 30 31 28 19 20 18 6 7 7 0 0 0
844 0 0 0 0 0 0 0 0 0 0 0 0 8430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
845 0 0 0 0 0 0 0 0 0 0 0 0 8440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
846 0 0 0 0 0 0 0 0 0 0 0 0 8450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
847 0 0 0 0 0 0 0 0 0 0 0 0 8460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
848 0 0 0 0 0 0 0 0 0 0 0 0 8470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
849 0 0 0 0 0 0 6 6 6 18 18 18 8480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
850 54 54 54 82 82 82 2 2 6 26 26 26 8490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
851 22 22 22 2 2 6 123 123 123 253 253 253 8500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
852253 253 253 253 253 253 253 253 253 253 253 253 8510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
853253 253 253 253 253 253 253 253 253 253 253 253 8520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
854253 253 253 253 253 253 253 253 253 253 253 253 8530 0 0
855253 253 253 253 253 253 253 253 253 253 253 253 8540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
856253 253 253 253 253 253 253 253 253 253 253 253 8550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
857253 253 253 253 253 253 253 253 253 250 250 250 8560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
858238 238 238 198 198 198 6 6 6 38 38 38 8570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
859 58 58 58 26 26 26 38 38 38 2 2 6 8580 0 0 0 0 0 0 0 0 0 0 0 36 38 35 230 229 82
860 2 2 6 2 2 6 2 2 6 46 46 46 859230 229 82 230 229 82 246 246 123 236 236 101 230 229 82 230 229 82
861 78 78 78 30 30 30 10 10 10 0 0 0 860230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
862 0 0 0 0 0 0 0 0 0 0 0 0 861230 229 82 230 229 82 230 229 82 230 229 82 53 55 47 121 119 87
863 0 0 0 0 0 0 0 0 0 0 0 0 862176 171 126 171 165 117 161 156 96 82 81 62 53 55 47 33 37 35
864 0 0 0 0 0 0 0 0 0 0 0 0 86339 40 39 63 64 60 99 98 80 121 119 87 137 133 100 177 172 135
865 0 0 0 0 0 0 0 0 0 0 0 0 864176 171 126 184 181 136 131 127 93 131 127 93 110 109 94 84 83 72
866 0 0 0 0 0 0 0 0 0 0 0 0 86551 52 50 39 40 39 27 29 28 18 22 22 16 19 19 15 19 19
867 0 0 0 0 0 0 0 0 0 0 0 0 86615 19 19 14 18 18 14 17 17 13 16 16 12 15 15 11 14 14
868 0 0 0 0 0 0 0 0 0 0 0 0 86710 13 13 9 12 12 9 11 11 8 9 9 7 9 9 1 1 1
869 0 0 0 0 0 0 10 10 10 30 30 30 8680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
870 74 74 74 58 58 58 2 2 6 42 42 42 8690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
871 2 2 6 22 22 22 231 231 231 253 253 253 8700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
872253 253 253 253 253 253 253 253 253 253 253 253 8710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
873253 253 253 253 253 253 253 253 253 250 250 250 8720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
874253 253 253 253 253 253 253 253 253 253 253 253 8730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
875253 253 253 253 253 253 253 253 253 253 253 253 8740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
876253 253 253 253 253 253 253 253 253 253 253 253 8750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
877253 253 253 253 253 253 253 253 253 253 253 253 8760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
878253 253 253 246 246 246 46 46 46 38 38 38 8770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
879 42 42 42 14 14 14 38 38 38 14 14 14 8780 0 0
880 2 2 6 2 2 6 2 2 6 6 6 6 8790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
881 86 86 86 46 46 46 14 14 14 0 0 0 8800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
882 0 0 0 0 0 0 0 0 0 0 0 0 8810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
883 0 0 0 0 0 0 0 0 0 0 0 0 8820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
884 0 0 0 0 0 0 0 0 0 0 0 0 8830 0 0 0 0 0 0 0 0 0 0 0 118 116 76 230 229 82
885 0 0 0 0 0 0 0 0 0 0 0 0 884230 229 82 230 229 82 236 236 101 230 229 82 230 229 82 230 229 82
886 0 0 0 0 0 0 0 0 0 0 0 0 885230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
887 0 0 0 0 0 0 0 0 0 0 0 0 886230 229 82 230 229 82 230 229 82 230 229 82 96 95 69 71 71 57
888 0 0 0 0 0 0 0 0 0 0 0 0 88736 38 35 118 116 76 118 116 76 12 15 15 15 18 18 20 24 24
889 0 0 0 6 6 6 14 14 14 42 42 42 88833 37 35 55 56 53 84 83 72 110 109 94 145 141 105 110 109 94
890 90 90 90 18 18 18 18 18 18 26 26 26 889168 163 120 121 119 87 156 151 111 131 127 93 87 86 72 61 63 57
891 2 2 6 116 116 116 253 253 253 253 253 253 89047 48 46 28 31 30 18 22 22 15 19 19 15 18 18 15 19 19
892253 253 253 253 253 253 253 253 253 253 253 253 89115 19 19 14 18 18 14 17 17 13 17 17 13 16 16 12 15 15
893253 253 253 253 253 253 250 250 250 238 238 238 89211 13 13 10 12 12 9 11 11 8 10 10 7 9 9 3 3 3
894253 253 253 253 253 253 253 253 253 253 253 253 8930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
895253 253 253 253 253 253 253 253 253 253 253 253 8940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
896253 253 253 253 253 253 253 253 253 253 253 253 8950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
897253 253 253 253 253 253 253 253 253 253 253 253 8960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
898253 253 253 253 253 253 94 94 94 6 6 6 8970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
899 2 2 6 2 2 6 10 10 10 34 34 34 8980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
900 2 2 6 2 2 6 2 2 6 2 2 6 8990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
901 74 74 74 58 58 58 22 22 22 6 6 6 9000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
902 0 0 0 0 0 0 0 0 0 0 0 0 9010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
903 0 0 0 0 0 0 0 0 0 0 0 0 9020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
904 0 0 0 0 0 0 0 0 0 0 0 0 9030 0 0
905 0 0 0 0 0 0 0 0 0 0 0 0 9040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
906 0 0 0 0 0 0 0 0 0 0 0 0 9050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
907 0 0 0 0 0 0 0 0 0 0 0 0 9060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
908 0 0 0 0 0 0 0 0 0 0 0 0 9070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
909 0 0 0 10 10 10 26 26 26 66 66 66 9080 0 0 0 0 0 0 0 0 1 1 0 230 229 82 230 229 82
910 82 82 82 2 2 6 38 38 38 6 6 6 909230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
911 14 14 14 210 210 210 253 253 253 253 253 253 910230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
912253 253 253 253 253 253 253 253 253 253 253 253 911230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 161 156 96
913253 253 253 253 253 253 246 246 246 242 242 242 912161 156 96 230 229 82 118 116 76 11 14 14 14 17 17 18 22 22
914253 253 253 253 253 253 253 253 253 253 253 253 91327 30 29 40 43 41 60 60 56 84 83 72 105 104 92 110 109 94
915253 253 253 253 253 253 253 253 253 253 253 253 914110 109 94 110 109 94 99 98 80 90 89 73 68 70 65 47 48 46
916253 253 253 253 253 253 253 253 253 253 253 253 91532 34 33 23 25 24 20 23 23 17 21 21 15 19 19 14 17 17
917253 253 253 253 253 253 253 253 253 253 253 253 91615 19 19 15 18 18 14 18 18 13 17 17 13 16 16 12 15 15
918253 253 253 253 253 253 144 144 144 2 2 6 91711 14 14 10 12 12 9 11 11 8 10 10 7 9 9 4 5 5
919 2 2 6 2 2 6 2 2 6 46 46 46 9180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
920 2 2 6 2 2 6 2 2 6 2 2 6 9190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
921 42 42 42 74 74 74 30 30 30 10 10 10 9200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
922 0 0 0 0 0 0 0 0 0 0 0 0 9210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
923 0 0 0 0 0 0 0 0 0 0 0 0 9220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
924 0 0 0 0 0 0 0 0 0 0 0 0 9230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
925 0 0 0 0 0 0 0 0 0 0 0 0 9240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
926 0 0 0 0 0 0 0 0 0 0 0 0 9250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
927 0 0 0 0 0 0 0 0 0 0 0 0 9260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
928 0 0 0 0 0 0 0 0 0 0 0 0 9270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
929 6 6 6 14 14 14 42 42 42 90 90 90 9280 0 0
930 26 26 26 6 6 6 42 42 42 2 2 6 9290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
931 74 74 74 250 250 250 253 253 253 253 253 253 9300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
932253 253 253 253 253 253 253 253 253 253 253 253 9310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
933253 253 253 253 253 253 242 242 242 242 242 242 9320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
934253 253 253 253 253 253 253 253 253 253 253 253 9330 0 0 0 0 0 0 0 0 16 17 12 230 229 82 230 229 82
935253 253 253 253 253 253 253 253 253 253 253 253 934230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
936253 253 253 253 253 253 253 253 253 253 253 253 935230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
937253 253 253 253 253 253 253 253 253 253 253 253 936230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
938253 253 253 253 253 253 182 182 182 2 2 6 937230 229 82 161 156 96 118 116 76 11 13 13 13 16 16 15 19 19
939 2 2 6 2 2 6 2 2 6 46 46 46 93820 24 24 30 32 31 40 43 41 51 52 50 63 64 60 72 73 67
940 2 2 6 2 2 6 2 2 6 2 2 6 93965 66 61 65 66 61 65 66 61 55 57 54 46 47 45 33 37 35
941 10 10 10 86 86 86 38 38 38 10 10 10 94027 29 28 20 24 24 17 21 21 16 20 20 16 20 20 15 19 19
942 0 0 0 0 0 0 0 0 0 0 0 0 94115 19 19 15 19 19 14 18 18 14 17 17 13 16 16 12 15 15
943 0 0 0 0 0 0 0 0 0 0 0 0 94211 14 14 10 13 13 9 12 12 8 10 10 7 9 9 6 7 7
944 0 0 0 0 0 0 0 0 0 0 0 0 9430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
945 0 0 0 0 0 0 0 0 0 0 0 0 9440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
946 0 0 0 0 0 0 0 0 0 0 0 0 9450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
947 0 0 0 0 0 0 0 0 0 0 0 0 9460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
948 0 0 0 0 0 0 0 0 0 0 0 0 9470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
949 10 10 10 26 26 26 66 66 66 82 82 82 9480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
950 2 2 6 22 22 22 18 18 18 2 2 6 9490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
951149 149 149 253 253 253 253 253 253 253 253 253 9500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
952253 253 253 253 253 253 253 253 253 253 253 253 9510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
953253 253 253 253 253 253 234 234 234 242 242 242 9520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
954253 253 253 253 253 253 253 253 253 253 253 253 9530 0 0
955253 253 253 253 253 253 253 253 253 253 253 253 9540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
956253 253 253 253 253 253 253 253 253 253 253 253 9550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
957253 253 253 253 253 253 253 253 253 253 253 253 9560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
958253 253 253 253 253 253 206 206 206 2 2 6 9570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
959 2 2 6 2 2 6 2 2 6 38 38 38 9580 0 0 0 0 0 0 0 0 53 55 47 230 229 82 230 229 82
960 2 2 6 2 2 6 2 2 6 2 2 6 959230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
961 6 6 6 86 86 86 46 46 46 14 14 14 960230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
962 0 0 0 0 0 0 0 0 0 0 0 0 961230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
963 0 0 0 0 0 0 0 0 0 0 0 0 962161 156 96 118 116 76 53 55 47 10 13 13 12 15 15 14 17 17
964 0 0 0 0 0 0 0 0 0 0 0 0 96317 20 20 20 24 24 27 29 28 32 34 33 37 39 37 40 43 41
965 0 0 0 0 0 0 0 0 0 0 0 0 96443 45 43 41 42 42 35 37 36 30 32 31 28 31 30 23 27 26
966 0 0 0 0 0 0 0 0 0 0 0 0 96520 23 23 17 21 21 16 20 20 16 20 20 16 20 20 16 19 19
967 0 0 0 0 0 0 0 0 0 0 0 0 96615 19 19 15 19 19 14 18 18 14 17 17 13 16 16 12 15 15
968 0 0 0 0 0 0 0 0 0 6 6 6 96711 14 14 10 13 13 9 12 12 9 11 11 8 10 10 10 12 12
969 18 18 18 46 46 46 86 86 86 18 18 18 9681 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
970 2 2 6 34 34 34 10 10 10 6 6 6 9690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
971210 210 210 253 253 253 253 253 253 253 253 253 9700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
972253 253 253 253 253 253 253 253 253 253 253 253 9710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
973253 253 253 253 253 253 234 234 234 242 242 242 9720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
974253 253 253 253 253 253 253 253 253 253 253 253 9730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
975253 253 253 253 253 253 253 253 253 253 253 253 9740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
976253 253 253 253 253 253 253 253 253 253 253 253 9750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
977253 253 253 253 253 253 253 253 253 253 253 253 9760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
978253 253 253 253 253 253 221 221 221 6 6 6 9770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
979 2 2 6 2 2 6 6 6 6 30 30 30 9780 0 0
980 2 2 6 2 2 6 2 2 6 2 2 6 9790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
981 2 2 6 82 82 82 54 54 54 18 18 18 9800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
982 6 6 6 0 0 0 0 0 0 0 0 0 9810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
983 0 0 0 0 0 0 0 0 0 0 0 0 9820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
984 0 0 0 0 0 0 0 0 0 0 0 0 9830 0 0 0 0 0 0 0 0 82 81 62 230 229 82 230 229 82
985 0 0 0 0 0 0 0 0 0 0 0 0 984230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
986 0 0 0 0 0 0 0 0 0 0 0 0 985230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
987 0 0 0 0 0 0 0 0 0 0 0 0 986230 229 82 230 229 82 230 229 82 230 229 82 161 156 96 161 156 96
988 0 0 0 0 0 0 0 0 0 10 10 10 987118 116 76 82 81 62 13 14 12 10 13 13 12 15 15 13 17 17
989 26 26 26 66 66 66 62 62 62 2 2 6 98815 19 19 16 20 20 20 23 23 20 24 24 23 27 26 26 28 27
990 2 2 6 38 38 38 10 10 10 26 26 26 98926 28 27 26 28 27 23 27 26 18 22 22 20 23 23 17 21 21
991238 238 238 253 253 253 253 253 253 253 253 253 99017 21 21 16 20 20 16 20 20 16 20 20 16 20 20 16 19 19
992253 253 253 253 253 253 253 253 253 253 253 253 99115 19 19 15 19 19 15 18 18 14 17 17 13 17 17 13 16 16
993253 253 253 253 253 253 231 231 231 238 238 238 99212 15 15 12 14 14 12 14 14 12 14 14 12 14 14 23 24 24
994253 253 253 253 253 253 253 253 253 253 253 253 9936 8 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
995253 253 253 253 253 253 253 253 253 253 253 253 9940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
996253 253 253 253 253 253 253 253 253 253 253 253 9950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
997253 253 253 253 253 253 253 253 253 253 253 253 9960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
998253 253 253 253 253 253 231 231 231 6 6 6 9970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
999 2 2 6 2 2 6 10 10 10 30 30 30 9980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1000 2 2 6 2 2 6 2 2 6 2 2 6 9990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1001 2 2 6 66 66 66 58 58 58 22 22 22 10000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1002 6 6 6 0 0 0 0 0 0 0 0 0 10010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1003 0 0 0 0 0 0 0 0 0 0 0 0 10020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1004 0 0 0 0 0 0 0 0 0 0 0 0 10030 0 0
1005 0 0 0 0 0 0 0 0 0 0 0 0 10040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1006 0 0 0 0 0 0 0 0 0 0 0 0 10050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1007 0 0 0 0 0 0 0 0 0 0 0 0 10060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1008 0 0 0 0 0 0 0 0 0 10 10 10 10070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1009 38 38 38 78 78 78 6 6 6 2 2 6 10080 0 0 0 0 0 0 0 0 118 116 76 230 229 82 230 229 82
1010 2 2 6 46 46 46 14 14 14 42 42 42 1009230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
1011246 246 246 253 253 253 253 253 253 253 253 253 1010230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
1012253 253 253 253 253 253 253 253 253 253 253 253 1011230 229 82 230 229 82 230 229 82 161 156 96 161 156 96 118 116 76
1013253 253 253 253 253 253 231 231 231 242 242 242 101271 71 57 13 14 12 9 12 12 10 13 13 12 15 15 13 17 17
1014253 253 253 253 253 253 253 253 253 253 253 253 101315 18 18 15 19 19 16 20 20 17 21 21 17 21 21 18 22 22
1015253 253 253 253 253 253 253 253 253 253 253 253 101418 22 22 18 22 22 17 21 21 16 19 19 15 18 18 14 18 18
1016253 253 253 253 253 253 253 253 253 253 253 253 101516 19 19 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1017253 253 253 253 253 253 253 253 253 253 253 253 101615 19 19 15 19 19 15 18 18 14 18 18 16 20 20 23 25 24
1018253 253 253 253 253 253 234 234 234 10 10 10 101717 21 21 25 27 26 47 48 46 47 48 46 51 52 50 72 73 67
1019 2 2 6 2 2 6 22 22 22 14 14 14 101833 36 34 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1020 2 2 6 2 2 6 2 2 6 2 2 6 10190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1021 2 2 6 66 66 66 62 62 62 22 22 22 10200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1022 6 6 6 0 0 0 0 0 0 0 0 0 10210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1023 0 0 0 0 0 0 0 0 0 0 0 0 10220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1024 0 0 0 0 0 0 0 0 0 0 0 0 10230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1025 0 0 0 0 0 0 0 0 0 0 0 0 10240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1026 0 0 0 0 0 0 0 0 0 0 0 0 10250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1027 0 0 0 0 0 0 0 0 0 0 0 0 10260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1028 0 0 0 0 0 0 6 6 6 18 18 18 10270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1029 50 50 50 74 74 74 2 2 6 2 2 6 10280 0 0
1030 14 14 14 70 70 70 34 34 34 62 62 62 10290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1031250 250 250 253 253 253 253 253 253 253 253 253 10300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1032253 253 253 253 253 253 253 253 253 253 253 253 10310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1033253 253 253 253 253 253 231 231 231 246 246 246 10320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1034253 253 253 253 253 253 253 253 253 253 253 253 10330 0 0 0 0 0 0 0 0 118 116 76 230 229 82 230 229 82
1035253 253 253 253 253 253 253 253 253 253 253 253 1034230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
1036253 253 253 253 253 253 253 253 253 253 253 253 1035230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
1037253 253 253 253 253 253 253 253 253 253 253 253 1036230 229 82 230 229 82 161 156 96 118 116 76 118 116 76 46 47 43
1038253 253 253 253 253 253 234 234 234 14 14 14 10379 11 11 9 11 11 10 12 12 11 13 13 12 15 15 14 17 17
1039 2 2 6 2 2 6 30 30 30 2 2 6 103815 18 18 15 19 19 16 20 20 16 20 20 16 20 20 16 20 20
1040 2 2 6 2 2 6 2 2 6 2 2 6 103916 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1041 2 2 6 66 66 66 62 62 62 22 22 22 104015 19 19 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1042 6 6 6 0 0 0 0 0 0 0 0 0 104115 19 19 16 20 20 20 24 24 55 56 53 32 34 33 84 83 72
1043 0 0 0 0 0 0 0 0 0 0 0 0 104290 89 73 110 109 94 110 109 94 105 104 92 110 109 94 110 109 94
1044 0 0 0 0 0 0 0 0 0 0 0 0 104372 73 67 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1045 0 0 0 0 0 0 0 0 0 0 0 0 10440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1046 0 0 0 0 0 0 0 0 0 0 0 0 10450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1047 0 0 0 0 0 0 0 0 0 0 0 0 10460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1048 0 0 0 0 0 0 6 6 6 18 18 18 10470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1049 54 54 54 62 62 62 2 2 6 2 2 6 10480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1050 2 2 6 30 30 30 46 46 46 70 70 70 10490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1051250 250 250 253 253 253 253 253 253 253 253 253 10500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1052253 253 253 253 253 253 253 253 253 253 253 253 10510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1053253 253 253 253 253 253 231 231 231 246 246 246 10520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1054253 253 253 253 253 253 253 253 253 253 253 253 10530 0 0
1055253 253 253 253 253 253 253 253 253 253 253 253 10540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1056253 253 253 253 253 253 253 253 253 253 253 253 10550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1057253 253 253 253 253 253 253 253 253 253 253 253 10560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1058253 253 253 253 253 253 226 226 226 10 10 10 10570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1059 2 2 6 6 6 6 30 30 30 2 2 6 10580 0 0 0 0 0 0 0 0 96 95 69 230 229 82 230 229 82
1060 2 2 6 2 2 6 2 2 6 2 2 6 1059230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
1061 2 2 6 66 66 66 58 58 58 22 22 22 1060230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
1062 6 6 6 0 0 0 0 0 0 0 0 0 1061230 229 82 161 156 96 118 116 76 82 81 62 16 17 12 9 11 11
1063 0 0 0 0 0 0 0 0 0 0 0 0 10629 11 11 9 12 12 10 13 13 12 14 14 13 16 16 14 18 18
1064 0 0 0 0 0 0 0 0 0 0 0 0 106315 19 19 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1065 0 0 0 0 0 0 0 0 0 0 0 0 106416 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1066 0 0 0 0 0 0 0 0 0 0 0 0 106516 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1067 0 0 0 0 0 0 0 0 0 0 0 0 106616 19 19 33 36 34 99 98 80 156 151 111 145 141 105 184 179 149
1068 0 0 0 0 0 0 6 6 6 22 22 22 1067168 163 120 184 179 149 177 172 135 156 151 111 145 141 105 110 109 94
1069 58 58 58 62 62 62 2 2 6 2 2 6 106890 89 73 2 2 2 0 0 0 0 0 0 0 0 0 0 0 0
1070 2 2 6 2 2 6 30 30 30 78 78 78 10690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1071250 250 250 253 253 253 253 253 253 253 253 253 10700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1072253 253 253 253 253 253 253 253 253 253 253 253 10710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1073253 253 253 253 253 253 231 231 231 246 246 246 10720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1074253 253 253 253 253 253 253 253 253 253 253 253 10730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1075253 253 253 253 253 253 253 253 253 253 253 253 10740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1076253 253 253 253 253 253 253 253 253 253 253 253 10750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1077253 253 253 253 253 253 253 253 253 253 253 253 10760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1078253 253 253 253 253 253 206 206 206 2 2 6 10770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1079 22 22 22 34 34 34 18 14 6 22 22 22 10780 0 0
1080 26 26 26 18 18 18 6 6 6 2 2 6 10790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1081 2 2 6 82 82 82 54 54 54 18 18 18 10800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1082 6 6 6 0 0 0 0 0 0 0 0 0 10810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1083 0 0 0 0 0 0 0 0 0 0 0 0 10820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1084 0 0 0 0 0 0 0 0 0 0 0 0 10830 0 0 0 0 0 0 0 0 71 71 57 230 229 82 230 229 82
1085 0 0 0 0 0 0 0 0 0 0 0 0 1084230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
1086 0 0 0 0 0 0 0 0 0 0 0 0 1085230 229 82 161 156 96 230 229 82 230 229 82 230 229 82 161 156 96
1087 0 0 0 0 0 0 0 0 0 0 0 0 1086118 116 76 82 81 62 30 31 28 9 11 11 9 11 11 9 11 11
1088 0 0 0 0 0 0 6 6 6 26 26 26 108710 12 12 10 13 13 11 14 14 13 16 16 14 17 17 15 18 18
1089 62 62 62 106 106 106 74 54 14 185 133 11 108815 19 19 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1090210 162 10 121 92 8 6 6 6 62 62 62 108916 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1091238 238 238 253 253 253 253 253 253 253 253 253 109016 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1092253 253 253 253 253 253 253 253 253 253 253 253 109118 22 22 58 59 55 137 133 100 197 193 154 214 212 158 210 208 158
1093253 253 253 253 253 253 231 231 231 246 246 246 1092197 193 154 184 179 149 184 179 149 137 133 100 110 109 94 99 98 80
1094253 253 253 253 253 253 253 253 253 253 253 253 109384 83 72 10 10 9 0 0 0 0 0 0 0 0 0 0 0 0
1095253 253 253 253 253 253 253 253 253 253 253 253 10940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1096253 253 253 253 253 253 253 253 253 253 253 253 10950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1097253 253 253 253 253 253 253 253 253 253 253 253 10960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1098253 253 253 253 253 253 158 158 158 18 18 18 10970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1099 14 14 14 2 2 6 2 2 6 2 2 6 10980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1100 6 6 6 18 18 18 66 66 66 38 38 38 10990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1101 6 6 6 94 94 94 50 50 50 18 18 18 11000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1102 6 6 6 0 0 0 0 0 0 0 0 0 11010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1103 0 0 0 0 0 0 0 0 0 0 0 0 11020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1104 0 0 0 0 0 0 0 0 0 0 0 0 11030 0 0
1105 0 0 0 0 0 0 0 0 0 0 0 0 11040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1106 0 0 0 0 0 0 0 0 0 0 0 0 11050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1107 0 0 0 0 0 0 0 0 0 6 6 6 11060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1108 10 10 10 10 10 10 18 18 18 38 38 38 11070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1109 78 78 78 142 134 106 216 158 10 242 186 14 11080 0 0 0 0 0 0 0 0 16 17 12 230 229 82 230 229 82
1110246 190 14 246 190 14 156 118 10 10 10 10 1109230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 161 156 96
1111 90 90 90 238 238 238 253 253 253 253 253 253 1110161 156 96 161 156 96 161 156 96 161 156 96 118 116 76 71 71 57
1112253 253 253 253 253 253 253 253 253 253 253 253 111121 22 20 12 14 14 11 13 13 10 12 12 10 12 12 10 13 13
1113253 253 253 253 253 253 231 231 231 250 250 250 111211 13 13 12 15 15 13 16 16 14 17 17 14 18 18 15 19 19
1114253 253 253 253 253 253 253 253 253 253 253 253 111316 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1115253 253 253 253 253 253 253 253 253 253 253 253 111416 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1116253 253 253 253 253 253 253 253 253 253 253 253 111516 20 20 16 20 20 16 20 20 16 20 20 16 20 20 17 21 21
1117253 253 253 253 253 253 253 253 253 246 230 190 111623 27 26 84 83 72 184 179 149 251 251 187 210 208 158 184 179 149
1118238 204 91 238 204 91 181 142 44 37 26 9 1117184 179 149 156 151 111 110 109 94 84 83 72 63 64 60 51 52 50
1119 2 2 6 2 2 6 2 2 6 2 2 6 111818 22 22 6 8 8 0 0 0 0 0 0 0 0 0 0 0 0
1120 2 2 6 2 2 6 38 38 38 46 46 46 11190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1121 26 26 26 106 106 106 54 54 54 18 18 18 11200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1122 6 6 6 0 0 0 0 0 0 0 0 0 11210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1123 0 0 0 0 0 0 0 0 0 0 0 0 11220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1124 0 0 0 0 0 0 0 0 0 0 0 0 11230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1125 0 0 0 0 0 0 0 0 0 0 0 0 11240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1126 0 0 0 0 0 0 0 0 0 0 0 0 11250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1127 0 0 0 6 6 6 14 14 14 22 22 22 11260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1128 30 30 30 38 38 38 50 50 50 70 70 70 11270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1129106 106 106 190 142 34 226 170 11 242 186 14 11280 0 0
1130246 190 14 246 190 14 246 190 14 154 114 10 11290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1131 6 6 6 74 74 74 226 226 226 253 253 253 11300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1132253 253 253 253 253 253 253 253 253 253 253 253 11310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1133253 253 253 253 253 253 231 231 231 250 250 250 11320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1134253 253 253 253 253 253 253 253 253 253 253 253 11330 0 0 0 0 0 0 0 0 0 0 0 118 116 76 230 229 82
1135253 253 253 253 253 253 253 253 253 253 253 253 1134230 229 82 230 229 82 230 229 82 230 229 82 161 156 96 161 156 96
1136253 253 253 253 253 253 253 253 253 253 253 253 1135161 156 96 161 156 96 118 116 76 53 55 47 20 23 22 16 19 19
1137253 253 253 253 253 253 253 253 253 228 184 62 113613 16 16 12 15 15 12 14 14 11 14 14 11 14 14 11 14 14
1138241 196 14 241 208 19 232 195 16 38 30 10 113712 15 15 13 16 16 14 17 17 15 19 19 16 20 20 17 21 21
1139 2 2 6 2 2 6 2 2 6 2 2 6 113823 27 26 18 22 22 20 24 24 23 27 26 30 32 31 17 21 21
1140 2 2 6 6 6 6 30 30 30 26 26 26 113916 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1141203 166 17 154 142 90 66 66 66 26 26 26 114016 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1142 6 6 6 0 0 0 0 0 0 0 0 0 114123 27 26 33 37 35 137 133 100 156 151 111 158 153 112 105 104 92
1143 0 0 0 0 0 0 0 0 0 0 0 0 1142105 104 92 68 70 65 39 40 39 18 22 22 12 14 14 12 15 15
1144 0 0 0 0 0 0 0 0 0 0 0 0 11439 11 11 4 5 5 0 0 0 0 0 0 0 0 0 0 0 0
1145 0 0 0 0 0 0 0 0 0 0 0 0 11440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1146 0 0 0 0 0 0 0 0 0 0 0 0 11450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1147 6 6 6 18 18 18 38 38 38 58 58 58 11460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1148 78 78 78 86 86 86 101 101 101 123 123 123 11470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1149175 146 61 210 150 10 234 174 13 246 186 14 11480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1150246 190 14 246 190 14 246 190 14 238 190 10 11490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1151102 78 10 2 2 6 46 46 46 198 198 198 11500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1152253 253 253 253 253 253 253 253 253 253 253 253 11510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1153253 253 253 253 253 253 234 234 234 242 242 242 11520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1154253 253 253 253 253 253 253 253 253 253 253 253 11530 0 0
1155253 253 253 253 253 253 253 253 253 253 253 253 11540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1156253 253 253 253 253 253 253 253 253 253 253 253 11550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1157253 253 253 253 253 253 253 253 253 224 178 62 11560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1158242 186 14 241 196 14 210 166 10 22 18 6 11570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1159 2 2 6 2 2 6 2 2 6 2 2 6 11580 0 0 0 0 0 0 0 0 0 0 0 16 17 12 230 229 82
1160 2 2 6 2 2 6 6 6 6 121 92 8 1159230 229 82 230 229 82 230 229 82 161 156 96 118 116 76 118 116 76
1161238 202 15 232 195 16 82 82 82 34 34 34 1160118 116 76 66 65 55 43 45 43 32 34 33 25 27 26 20 23 22
1162 10 10 10 0 0 0 0 0 0 0 0 0 116117 20 20 15 18 18 14 17 17 15 18 18 13 16 16 14 17 17
1163 0 0 0 0 0 0 0 0 0 0 0 0 116214 18 18 16 20 20 32 34 33 55 57 54 58 59 55 72 73 67
1164 0 0 0 0 0 0 0 0 0 0 0 0 1163105 104 92 55 57 54 65 66 61 63 64 60 40 43 41 33 37 35
1165 0 0 0 0 0 0 0 0 0 0 0 0 116441 42 42 20 24 24 16 20 20 16 20 20 16 20 20 16 20 20
1166 0 0 0 0 0 0 0 0 0 0 0 0 116516 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1167 14 14 14 38 38 38 70 70 70 154 122 46 116617 21 21 26 28 27 30 32 31 35 37 36 68 70 65 39 40 39
1168190 142 34 200 144 11 197 138 11 197 138 11 116723 27 26 15 18 18 13 16 16 11 14 14 9 12 12 8 10 10
1169213 154 11 226 170 11 242 186 14 246 190 14 11687 9 9 6 7 7 0 0 0 0 0 0 0 0 0 0 0 0
1170246 190 14 246 190 14 246 190 14 246 190 14 11690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1171225 175 15 46 32 6 2 2 6 22 22 22 11700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1172158 158 158 250 250 250 253 253 253 253 253 253 11710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1173253 253 253 253 253 253 253 253 253 253 253 253 11720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1174253 253 253 253 253 253 253 253 253 253 253 253 11730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1175253 253 253 253 253 253 253 253 253 253 253 253 11740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1176253 253 253 253 253 253 253 253 253 253 253 253 11750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1177253 253 253 250 250 250 242 242 242 224 178 62 11760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1178239 182 13 236 186 11 213 154 11 46 32 6 11770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1179 2 2 6 2 2 6 2 2 6 2 2 6 11780 0 0
1180 2 2 6 2 2 6 61 42 6 225 175 15 11790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1181238 190 10 236 186 11 112 100 78 42 42 42 11800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1182 14 14 14 0 0 0 0 0 0 0 0 0 11810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1183 0 0 0 0 0 0 0 0 0 0 0 0 11820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1184 0 0 0 0 0 0 0 0 0 0 0 0 11830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 36 38 35
1185 0 0 0 0 0 0 0 0 0 0 0 0 1184230 229 82 230 229 82 230 229 82 96 95 69 30 31 28 49 51 48
1186 0 0 0 0 0 0 0 0 0 6 6 6 118590 89 73 68 70 65 55 57 54 47 48 46 47 48 46 43 45 43
1187 22 22 22 54 54 54 154 122 46 213 154 11 118632 34 33 43 45 43 43 45 43 23 27 26 25 27 26 40 43 41
1188226 170 11 230 174 11 226 170 11 226 170 11 118740 43 41 90 89 73 110 109 94 145 141 105 156 151 111 156 151 111
1189236 178 12 242 186 14 246 190 14 246 190 14 1188184 179 149 184 179 149 177 172 135 184 179 149 137 133 100 84 83 72
1190246 190 14 246 190 14 246 190 14 246 190 14 1189105 104 92 63 64 60 49 51 48 47 48 46 28 31 30 18 22 22
1191241 196 14 184 144 12 10 10 10 2 2 6 119016 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1192 6 6 6 116 116 116 242 242 242 253 253 253 119116 20 20 15 19 19 15 19 19 15 19 19 18 22 22 15 19 19
1193253 253 253 253 253 253 253 253 253 253 253 253 119213 16 16 12 15 15 11 14 14 10 13 13 9 12 12 9 11 11
1194253 253 253 253 253 253 253 253 253 253 253 253 11938 10 10 6 8 8 0 0 0 0 0 0 0 0 0 0 0 0
1195253 253 253 253 253 253 253 253 253 253 253 253 11940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1196253 253 253 253 253 253 253 253 253 253 253 253 11950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1197253 253 253 231 231 231 198 198 198 214 170 54 11960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1198236 178 12 236 178 12 210 150 10 137 92 6 11970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1199 18 14 6 2 2 6 2 2 6 2 2 6 11980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1200 6 6 6 70 47 6 200 144 11 236 178 12 11990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1201239 182 13 239 182 13 124 112 88 58 58 58 12000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1202 22 22 22 6 6 6 0 0 0 0 0 0 12010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1203 0 0 0 0 0 0 0 0 0 0 0 0 12020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1204 0 0 0 0 0 0 0 0 0 0 0 0 12030 0 0
1205 0 0 0 0 0 0 0 0 0 0 0 0 12040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1206 0 0 0 0 0 0 0 0 0 10 10 10 12050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1207 30 30 30 70 70 70 180 133 36 226 170 11 12060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1208239 182 13 242 186 14 242 186 14 246 186 14 12070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1209246 190 14 246 190 14 246 190 14 246 190 14 12080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1210246 190 14 246 190 14 246 190 14 246 190 14 120930 31 28 230 229 82 71 71 57 2 2 1 0 0 0 58 59 55
1211246 190 14 232 195 16 98 70 6 2 2 6 1210105 104 92 84 83 72 65 66 61 84 83 72 110 109 94 110 109 94
1212 2 2 6 2 2 6 66 66 66 221 221 221 1211145 141 105 105 104 92 110 109 94 110 109 94 84 83 72 110 109 94
1213253 253 253 253 253 253 253 253 253 253 253 253 1212158 153 112 197 193 154 197 193 154 239 239 170 251 251 187 251 251 187
1214253 253 253 253 253 253 253 253 253 253 253 253 1213251 251 187 251 251 187 251 251 187 251 251 187 210 208 158 197 193 154
1215253 253 253 253 253 253 253 253 253 253 253 253 1214197 193 154 184 179 149 145 141 105 137 133 100 105 104 92 47 48 46
1216253 253 253 253 253 253 253 253 253 253 253 253 121520 23 23 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1217253 253 253 206 206 206 198 198 198 214 166 58 121616 20 20 16 19 19 15 19 19 15 19 19 14 18 18 14 17 17
1218230 174 11 230 174 11 216 158 10 192 133 9 121713 17 17 13 16 16 12 14 14 12 14 14 13 13 13 13 13 13
1219163 110 8 116 81 8 102 78 10 116 81 8 121813 13 13 12 12 12 10 10 9 6 7 7 2 2 2 0 0 0
1220167 114 7 197 138 11 226 170 11 239 182 13 12190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1221242 186 14 242 186 14 162 146 94 78 78 78 12200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1222 34 34 34 14 14 14 6 6 6 0 0 0 12210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1223 0 0 0 0 0 0 0 0 0 0 0 0 12220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1224 0 0 0 0 0 0 0 0 0 0 0 0 12230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1225 0 0 0 0 0 0 0 0 0 0 0 0 12240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1226 0 0 0 0 0 0 0 0 0 6 6 6 12250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1227 30 30 30 78 78 78 190 142 34 226 170 11 12260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1228239 182 13 246 190 14 246 190 14 246 190 14 12270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1229246 190 14 246 190 14 246 190 14 246 190 14 12280 0 0
1230246 190 14 246 190 14 246 190 14 246 190 14 12290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1231246 190 14 241 196 14 203 166 17 22 18 6 12300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1232 2 2 6 2 2 6 2 2 6 38 38 38 12310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1233218 218 218 253 253 253 253 253 253 253 253 253 12320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1234253 253 253 253 253 253 253 253 253 253 253 253 12330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1235253 253 253 253 253 253 253 253 253 253 253 253 12340 0 0 0 0 0 1 1 0 0 0 0 0 0 0 65 66 61
1236253 253 253 253 253 253 253 253 253 253 253 253 1235105 104 92 84 83 72 84 83 72 110 109 94 184 179 149 210 208 158
1237250 250 250 206 206 206 198 198 198 202 162 69 1236210 208 158 210 208 158 214 212 158 197 193 154 214 212 158 210 208 158
1238226 170 11 236 178 12 224 166 10 210 150 10 1237251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
1239200 144 11 197 138 11 192 133 9 197 138 11 1238251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
1240210 150 10 226 170 11 242 186 14 246 190 14 1239251 251 187 251 251 187 239 239 170 251 251 187 184 179 149 84 83 72
1241246 190 14 246 186 14 225 175 15 124 112 88 124026 28 27 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1242 62 62 62 30 30 30 14 14 14 6 6 6 124116 20 20 16 20 20 15 19 19 15 19 19 15 18 18 14 18 18
1243 0 0 0 0 0 0 0 0 0 0 0 0 124213 17 17 13 16 16 15 15 15 14 14 13 14 14 13 14 14 13
1244 0 0 0 0 0 0 0 0 0 0 0 0 124313 13 13 13 13 13 12 12 12 12 12 12 12 12 12 3 4 4
1245 0 0 0 0 0 0 0 0 0 0 0 0 12440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1246 0 0 0 0 0 0 0 0 0 10 10 10 12450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1247 30 30 30 78 78 78 174 135 50 224 166 10 12460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1248239 182 13 246 190 14 246 190 14 246 190 14 12470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1249246 190 14 246 190 14 246 190 14 246 190 14 12480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1250246 190 14 246 190 14 246 190 14 246 190 14 12490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1251246 190 14 246 190 14 241 196 14 139 102 15 12500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1252 2 2 6 2 2 6 2 2 6 2 2 6 12510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1253 78 78 78 250 250 250 253 253 253 253 253 253 12520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1254253 253 253 253 253 253 253 253 253 253 253 253 12530 0 0
1255253 253 253 253 253 253 253 253 253 253 253 253 12540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1256253 253 253 253 253 253 253 253 253 253 253 253 12550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1257250 250 250 214 214 214 198 198 198 190 150 46 12560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1258219 162 10 236 178 12 234 174 13 224 166 10 12570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1259216 158 10 213 154 11 213 154 11 216 158 10 12580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1260226 170 11 239 182 13 246 190 14 246 190 14 12590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 72 73 67
1261246 190 14 246 190 14 242 186 14 206 162 42 1260105 104 92 99 98 80 84 83 72 99 98 80 177 172 135 197 193 154
1262101 101 101 58 58 58 30 30 30 14 14 14 1261251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
1263 6 6 6 0 0 0 0 0 0 0 0 0 1262251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
1264 0 0 0 0 0 0 0 0 0 0 0 0 1263251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
1265 0 0 0 0 0 0 0 0 0 0 0 0 1264251 251 187 251 251 187 251 251 187 214 212 158 197 193 154 99 98 80
1266 0 0 0 0 0 0 0 0 0 10 10 10 126523 27 26 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1267 30 30 30 74 74 74 174 135 50 216 158 10 126616 20 20 16 20 20 15 19 19 15 19 19 15 18 18 14 18 18
1268236 178 12 246 190 14 246 190 14 246 190 14 126714 17 17 16 16 16 16 16 16 16 16 16 15 15 15 14 14 13
1269246 190 14 246 190 14 246 190 14 246 190 14 126814 14 13 13 13 13 13 13 13 12 12 12 12 12 12 12 12 12
1270246 190 14 246 190 14 246 190 14 246 190 14 12693 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1271246 190 14 246 190 14 241 196 14 226 184 13 12700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1272 61 42 6 2 2 6 2 2 6 2 2 6 12710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1273 22 22 22 238 238 238 253 253 253 253 253 253 12720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1274253 253 253 253 253 253 253 253 253 253 253 253 12730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1275253 253 253 253 253 253 253 253 253 253 253 253 12740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1276253 253 253 253 253 253 253 253 253 253 253 253 12750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1277253 253 253 226 226 226 187 187 187 180 133 36 12760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1278216 158 10 236 178 12 239 182 13 236 178 12 12770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1279230 174 11 226 170 11 226 170 11 230 174 11 12780 0 0
1280236 178 12 242 186 14 246 190 14 246 190 14 12790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1281246 190 14 246 190 14 246 186 14 239 182 13 12800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1282206 162 42 106 106 106 66 66 66 34 34 34 12810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1283 14 14 14 6 6 6 0 0 0 0 0 0 12820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1284 0 0 0 0 0 0 0 0 0 0 0 0 12830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1285 0 0 0 0 0 0 0 0 0 0 0 0 12840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 84 83 72
1286 0 0 0 0 0 0 0 0 0 6 6 6 1285110 109 94 99 98 80 72 73 67 63 64 60 99 98 80 177 172 135
1287 26 26 26 70 70 70 163 133 67 213 154 11 1286184 179 149 210 208 158 251 251 187 251 251 187 251 251 187 251 251 187
1288236 178 12 246 190 14 246 190 14 246 190 14 1287251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
1289246 190 14 246 190 14 246 190 14 246 190 14 1288251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
1290246 190 14 246 190 14 246 190 14 246 190 14 1289251 251 187 210 208 158 184 179 149 177 172 135 110 109 94 33 37 35
1291246 190 14 246 190 14 246 190 14 241 196 14 129017 21 21 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1292190 146 13 18 14 6 2 2 6 2 2 6 129116 20 20 16 20 20 15 19 19 15 19 19 15 19 19 14 18 18
1293 46 46 46 246 246 246 253 253 253 253 253 253 129215 18 18 18 19 18 18 19 18 17 17 17 16 16 16 15 15 15
1294253 253 253 253 253 253 253 253 253 253 253 253 129314 14 13 13 13 13 13 13 13 12 12 12 12 12 12 12 12 12
1295253 253 253 253 253 253 253 253 253 253 253 253 129410 10 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1296253 253 253 253 253 253 253 253 253 253 253 253 12950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1297253 253 253 221 221 221 86 86 86 156 107 11 12960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1298216 158 10 236 178 12 242 186 14 246 186 14 12970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1299242 186 14 239 182 13 239 182 13 242 186 14 12980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1300242 186 14 246 186 14 246 190 14 246 190 14 12990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1301246 190 14 246 190 14 246 190 14 246 190 14 13000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1302242 186 14 225 175 15 142 122 72 66 66 66 13010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1303 30 30 30 10 10 10 0 0 0 0 0 0 13020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1304 0 0 0 0 0 0 0 0 0 0 0 0 13030 0 0
1305 0 0 0 0 0 0 0 0 0 0 0 0 13040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1306 0 0 0 0 0 0 0 0 0 6 6 6 13050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1307 26 26 26 70 70 70 163 133 67 210 150 10 13060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1308236 178 12 246 190 14 246 190 14 246 190 14 13070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1309246 190 14 246 190 14 246 190 14 246 190 14 13080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1310246 190 14 246 190 14 246 190 14 246 190 14 13090 0 0 0 0 0 0 0 0 0 0 0 2 2 2 105 104 92
1311246 190 14 246 190 14 246 190 14 246 190 14 1310108 107 93 99 98 80 72 73 67 63 64 60 51 52 50 87 86 72
1312232 195 16 121 92 8 34 34 34 106 106 106 1311105 104 92 110 109 94 108 107 93 156 151 111 184 179 149 184 179 149
1313221 221 221 253 253 253 253 253 253 253 253 253 1312197 193 154 197 193 154 197 193 154 184 179 149 184 179 149 177 172 135
1314253 253 253 253 253 253 253 253 253 253 253 253 1313197 193 154 156 151 111 177 172 135 184 179 149 168 163 120 137 133 100
1315253 253 253 253 253 253 253 253 253 253 253 253 1314145 141 105 110 109 94 99 98 80 47 48 46 55 57 54 15 19 19
1316253 253 253 253 253 253 253 253 253 253 253 253 131516 19 19 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
1317242 242 242 82 82 82 18 14 6 163 110 8 131617 20 20 17 21 21 16 20 20 16 19 19 15 19 19 16 19 19
1318216 158 10 236 178 12 242 186 14 246 190 14 131720 20 20 21 22 21 20 20 20 19 20 19 18 19 18 16 16 16
1319246 190 14 246 190 14 246 190 14 246 190 14 131815 15 15 14 14 13 13 13 13 13 13 13 12 12 12 12 12 12
1320246 190 14 246 190 14 246 190 14 246 190 14 131912 12 12 4 5 5 0 0 0 0 0 0 0 0 0 0 0 0
1321246 190 14 246 190 14 246 190 14 246 190 14 13200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1322246 190 14 246 190 14 242 186 14 163 133 67 13210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1323 46 46 46 18 18 18 6 6 6 0 0 0 13220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1324 0 0 0 0 0 0 0 0 0 0 0 0 13230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1325 0 0 0 0 0 0 0 0 0 0 0 0 13240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1326 0 0 0 0 0 0 0 0 0 10 10 10 13250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1327 30 30 30 78 78 78 163 133 67 210 150 10 13260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1328236 178 12 246 186 14 246 190 14 246 190 14 13270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1329246 190 14 246 190 14 246 190 14 246 190 14 13280 0 0
1330246 190 14 246 190 14 246 190 14 246 190 14 13290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1331246 190 14 246 190 14 246 190 14 246 190 14 13300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1332241 196 14 215 174 15 190 178 144 253 253 253 13310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1333253 253 253 253 253 253 253 253 253 253 253 253 13320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1334253 253 253 253 253 253 253 253 253 253 253 253 13330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1335253 253 253 253 253 253 253 253 253 253 253 253 13340 0 0 0 0 0 0 0 0 0 0 0 58 59 55 110 109 94
1336253 253 253 253 253 253 253 253 253 218 218 218 1335105 104 92 90 89 73 72 73 67 55 57 54 43 45 43 39 40 39
1337 58 58 58 2 2 6 22 18 6 167 114 7 133643 45 43 46 47 45 43 45 43 68 70 65 65 66 61 63 64 60
1338216 158 10 236 178 12 246 186 14 246 190 14 1337108 107 93 72 73 67 105 104 92 90 89 73 72 73 67 40 43 41
1339246 190 14 246 190 14 246 190 14 246 190 14 133872 73 67 68 70 65 68 70 65 58 59 55 63 64 60 49 51 48
1340246 190 14 246 190 14 246 190 14 246 190 14 133943 45 43 33 36 34 27 30 29 20 24 24 16 20 20 15 19 19
1341246 190 14 246 190 14 246 190 14 246 190 14 134015 19 19 15 19 19 15 19 19 16 19 19 16 20 20 16 20 20
1342246 190 14 246 186 14 242 186 14 190 150 46 134117 21 21 20 24 24 20 23 22 17 21 21 17 20 20 20 20 20
1343 54 54 54 22 22 22 6 6 6 0 0 0 134221 22 21 21 22 21 21 22 21 21 22 21 20 20 20 18 19 18
1344 0 0 0 0 0 0 0 0 0 0 0 0 134316 16 16 15 15 15 13 13 13 13 13 13 12 12 12 12 12 12
1345 0 0 0 0 0 0 0 0 0 0 0 0 134412 12 12 10 10 9 0 0 0 0 0 0 0 0 0 0 0 0
1346 0 0 0 0 0 0 0 0 0 14 14 14 13450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1347 38 38 38 86 86 86 180 133 36 213 154 11 13460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1348236 178 12 246 186 14 246 190 14 246 190 14 13470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1349246 190 14 246 190 14 246 190 14 246 190 14 13480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1350246 190 14 246 190 14 246 190 14 246 190 14 13490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1351246 190 14 246 190 14 246 190 14 246 190 14 13500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1352246 190 14 232 195 16 190 146 13 214 214 214 13510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1353253 253 253 253 253 253 253 253 253 253 253 253 13520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1354253 253 253 253 253 253 253 253 253 253 253 253 13530 0 0
1355253 253 253 253 253 253 253 253 253 253 253 253 13540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1356253 253 253 250 250 250 170 170 170 26 26 26 13550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1357 2 2 6 2 2 6 37 26 9 163 110 8 13560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1358219 162 10 239 182 13 246 186 14 246 190 14 13570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1359246 190 14 246 190 14 246 190 14 246 190 14 13580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1360246 190 14 246 190 14 246 190 14 246 190 14 13590 0 0 0 0 0 0 0 0 21 22 21 110 109 94 110 109 94
1361246 190 14 246 190 14 246 190 14 246 190 14 1360105 104 92 84 83 72 68 70 65 51 52 50 41 42 42 33 37 35
1362246 186 14 236 178 12 224 166 10 142 122 72 136128 31 30 23 27 26 20 23 23 18 22 22 17 20 20 25 27 26
1363 46 46 46 18 18 18 6 6 6 0 0 0 136226 28 27 27 30 29 25 27 26 20 23 23 23 27 26 30 32 31
1364 0 0 0 0 0 0 0 0 0 0 0 0 136320 24 24 17 21 21 18 22 22 15 19 19 26 28 27 20 23 23
1365 0 0 0 0 0 0 0 0 0 0 0 0 136414 18 18 15 19 19 15 18 18 15 19 19 15 19 19 15 19 19
1366 0 0 0 0 0 0 6 6 6 18 18 18 136515 19 19 15 19 19 15 19 19 15 19 19 15 19 19 16 19 19
1367 50 50 50 109 106 95 192 133 9 224 166 10 136616 20 20 22 24 23 24 26 24 22 24 23 20 23 22 22 24 23
1368242 186 14 246 190 14 246 190 14 246 190 14 136724 26 24 24 26 24 23 24 24 22 24 23 21 22 21 19 20 19
1369246 190 14 246 190 14 246 190 14 246 190 14 136817 17 17 15 15 15 14 14 13 13 13 13 12 12 12 12 12 12
1370246 190 14 246 190 14 246 190 14 246 190 14 136912 12 12 12 12 12 2 2 2 0 0 0 0 0 0 0 0 0
1371246 190 14 246 190 14 246 190 14 246 190 14 13700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1372242 186 14 226 184 13 210 162 10 142 110 46 13710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1373226 226 226 253 253 253 253 253 253 253 253 253 13720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1374253 253 253 253 253 253 253 253 253 253 253 253 13730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1375253 253 253 253 253 253 253 253 253 253 253 253 13740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1376198 198 198 66 66 66 2 2 6 2 2 6 13750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1377 2 2 6 2 2 6 50 34 6 156 107 11 13760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1378219 162 10 239 182 13 246 186 14 246 190 14 13770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1379246 190 14 246 190 14 246 190 14 246 190 14 13780 0 0
1380246 190 14 246 190 14 246 190 14 246 190 14 13790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1381246 190 14 246 190 14 246 190 14 242 186 14 13800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1382234 174 13 213 154 11 154 122 46 66 66 66 13810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1383 30 30 30 10 10 10 0 0 0 0 0 0 13820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1384 0 0 0 0 0 0 0 0 0 0 0 0 13830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1385 0 0 0 0 0 0 0 0 0 0 0 0 13840 0 0 0 0 0 2 2 2 99 98 80 110 109 94 108 107 93
1386 0 0 0 0 0 0 6 6 6 22 22 22 1385105 104 92 84 83 72 63 64 60 49 51 48 39 40 39 32 34 33
1387 58 58 58 154 121 60 206 145 10 234 174 13 138627 30 29 23 25 24 20 23 23 17 20 20 15 19 19 14 18 18
1388242 186 14 246 186 14 246 190 14 246 190 14 138714 17 17 13 17 17 13 17 17 13 17 17 13 17 17 13 17 17
1389246 190 14 246 190 14 246 190 14 246 190 14 138814 17 17 14 17 17 14 17 17 14 17 17 14 17 17 14 17 17
1390246 190 14 246 190 14 246 190 14 246 190 14 138914 18 18 14 18 18 14 18 18 14 18 18 15 18 18 15 19 19
1391246 190 14 246 190 14 246 190 14 246 190 14 139015 19 19 15 19 19 15 19 19 15 19 19 15 19 19 15 19 19
1392246 186 14 236 178 12 210 162 10 163 110 8 139115 19 19 17 21 21 27 29 28 26 28 27 25 27 26 25 27 26
1393 61 42 6 138 138 138 218 218 218 250 250 250 139227 29 28 27 29 28 26 28 27 24 26 24 21 22 21 20 20 20
1394253 253 253 253 253 253 253 253 253 250 250 250 139318 19 18 16 16 16 14 14 13 13 13 13 12 12 12 12 12 12
1395242 242 242 210 210 210 144 144 144 66 66 66 139412 12 12 12 12 12 4 5 5 0 0 0 0 0 0 0 0 0
1396 6 6 6 2 2 6 2 2 6 2 2 6 13950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1397 2 2 6 2 2 6 61 42 6 163 110 8 13960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1398216 158 10 236 178 12 246 190 14 246 190 14 13970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1399246 190 14 246 190 14 246 190 14 246 190 14 13980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1400246 190 14 246 190 14 246 190 14 246 190 14 13990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1401246 190 14 239 182 13 230 174 11 216 158 10 14000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1402190 142 34 124 112 88 70 70 70 38 38 38 14010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1403 18 18 18 6 6 6 0 0 0 0 0 0 14020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1404 0 0 0 0 0 0 0 0 0 0 0 0 14030 0 0
1405 0 0 0 0 0 0 0 0 0 0 0 0 14040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1406 0 0 0 0 0 0 6 6 6 22 22 22 14050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1407 62 62 62 168 124 44 206 145 10 224 166 10 14060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1408236 178 12 239 182 13 242 186 14 242 186 14 14070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1409246 186 14 246 190 14 246 190 14 246 190 14 14080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1410246 190 14 246 190 14 246 190 14 246 190 14 14090 0 0 0 0 0 51 52 50 110 109 94 110 109 94 105 104 92
1411246 190 14 246 190 14 246 190 14 246 190 14 141090 89 73 72 73 67 55 57 54 43 45 43 35 37 36 30 32 31
1412246 190 14 236 178 12 216 158 10 175 118 6 141126 28 27 20 24 24 17 21 21 16 19 19 15 18 18 14 17 17
1413 80 54 7 2 2 6 6 6 6 30 30 30 141213 16 16 13 16 16 13 16 16 13 16 16 13 16 16 13 16 16
1414 54 54 54 62 62 62 50 50 50 38 38 38 141313 16 16 13 16 16 13 16 16 13 17 17 13 17 17 14 17 17
1415 14 14 14 2 2 6 2 2 6 2 2 6 141414 17 17 14 17 17 14 17 17 14 18 18 14 18 18 14 18 18
1416 2 2 6 2 2 6 2 2 6 2 2 6 141515 18 18 15 18 18 15 19 19 15 19 19 15 19 19 15 19 19
1417 2 2 6 6 6 6 80 54 7 167 114 7 141615 19 19 15 19 19 27 29 28 32 34 33 28 31 30 27 29 28
1418213 154 11 236 178 12 246 190 14 246 190 14 141730 32 31 30 32 31 30 31 28 26 28 27 23 24 24 21 22 21
1419246 190 14 246 190 14 246 190 14 246 190 14 141819 20 19 16 16 16 14 14 13 13 13 13 12 12 12 12 12 12
1420246 190 14 242 186 14 239 182 13 239 182 13 141912 12 12 12 12 12 6 7 7 0 0 0 0 0 0 0 0 0
1421230 174 11 210 150 10 174 135 50 124 112 88 14200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1422 82 82 82 54 54 54 34 34 34 18 18 18 14210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1423 6 6 6 0 0 0 0 0 0 0 0 0 14220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1424 0 0 0 0 0 0 0 0 0 0 0 0 14230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1425 0 0 0 0 0 0 0 0 0 0 0 0 14240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1426 0 0 0 0 0 0 6 6 6 18 18 18 14250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1427 50 50 50 158 118 36 192 133 9 200 144 11 14260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1428216 158 10 219 162 10 224 166 10 226 170 11 14270 0 0 0 0 0 0 0 0 3 3 3 0 0 0 0 0 0
1429230 174 11 236 178 12 239 182 13 239 182 13 14280 0 0
1430242 186 14 246 186 14 246 190 14 246 190 14 14290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1431246 190 14 246 190 14 246 190 14 246 190 14 14300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1432246 186 14 230 174 11 210 150 10 163 110 8 14310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1433104 69 6 10 10 10 2 2 6 2 2 6 14320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1434 2 2 6 2 2 6 2 2 6 2 2 6 14330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1435 2 2 6 2 2 6 2 2 6 2 2 6 14340 0 0 10 10 9 108 107 93 110 109 94 108 107 93 99 98 80
1436 2 2 6 2 2 6 2 2 6 2 2 6 143584 83 72 63 64 60 49 51 48 40 43 41 33 36 34 27 30 29
1437 2 2 6 6 6 6 91 60 6 167 114 7 143623 27 26 18 22 22 17 20 20 15 18 18 14 17 17 13 16 16
1438206 145 10 230 174 11 242 186 14 246 190 14 143713 16 16 13 16 16 12 15 15 12 15 15 12 15 15 12 15 15
1439246 190 14 246 190 14 246 186 14 242 186 14 143813 16 16 13 16 16 13 16 16 13 16 16 13 16 16 13 16 16
1440239 182 13 230 174 11 224 166 10 213 154 11 143913 17 17 13 17 17 14 17 17 14 17 17 14 17 17 14 18 18
1441180 133 36 124 112 88 86 86 86 58 58 58 144014 18 18 14 18 18 15 18 18 15 18 18 15 19 19 15 19 19
1442 38 38 38 22 22 22 10 10 10 6 6 6 144115 19 19 15 19 19 17 21 21 33 36 34 32 34 33 31 33 31
1443 0 0 0 0 0 0 0 0 0 0 0 0 144233 36 34 33 36 34 31 33 31 27 29 28 25 27 26 21 22 21
1444 0 0 0 0 0 0 0 0 0 0 0 0 144319 20 19 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
1445 0 0 0 0 0 0 0 0 0 0 0 0 144412 12 12 12 12 12 8 8 7 0 0 0 0 0 0 0 0 0
1446 0 0 0 0 0 0 0 0 0 14 14 14 14450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1447 34 34 34 70 70 70 138 110 50 158 118 36 14460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1448167 114 7 180 123 7 192 133 9 197 138 11 14470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1449200 144 11 206 145 10 213 154 11 219 162 10 14480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1450224 166 10 230 174 11 239 182 13 242 186 14 14490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1451246 186 14 246 186 14 246 186 14 246 186 14 14500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1452239 182 13 216 158 10 185 133 11 152 99 6 14510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1453104 69 6 18 14 6 2 2 6 2 2 6 14520 0 0 0 0 0 63 64 60 137 133 100 43 45 43 0 0 0
1454 2 2 6 2 2 6 2 2 6 2 2 6 14530 0 0
1455 2 2 6 2 2 6 2 2 6 2 2 6 14540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1456 2 2 6 2 2 6 2 2 6 2 2 6 14550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1457 2 2 6 6 6 6 80 54 7 152 99 6 14560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1458192 133 9 219 162 10 236 178 12 239 182 13 14570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1459246 186 14 242 186 14 239 182 13 236 178 12 14580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1460224 166 10 206 145 10 192 133 9 154 121 60 14590 0 0 68 70 65 110 109 94 110 109 94 105 104 92 84 83 72
1461 94 94 94 62 62 62 42 42 42 22 22 22 146068 70 65 55 57 54 43 45 43 35 37 36 30 32 31 26 28 27
1462 14 14 14 6 6 6 0 0 0 0 0 0 146120 24 24 17 21 21 16 19 19 14 17 17 13 16 16 12 15 15
1463 0 0 0 0 0 0 0 0 0 0 0 0 146212 15 15 12 15 15 12 15 15 12 15 15 12 15 15 12 15 15
1464 0 0 0 0 0 0 0 0 0 0 0 0 146312 15 15 12 15 15 12 15 15 12 15 15 12 15 15 13 16 16
1465 0 0 0 0 0 0 0 0 0 0 0 0 146413 16 16 13 16 16 13 16 16 13 17 17 13 17 17 14 17 17
1466 0 0 0 0 0 0 0 0 0 6 6 6 146514 17 17 14 17 17 14 18 18 14 18 18 14 18 18 15 18 18
1467 18 18 18 34 34 34 58 58 58 78 78 78 146615 19 19 15 19 19 15 19 19 20 24 24 32 34 33 35 37 36
1468101 98 89 124 112 88 142 110 46 156 107 11 146737 39 37 35 37 36 33 36 34 30 32 31 26 28 27 22 24 23
1469163 110 8 167 114 7 175 118 6 180 123 7 146820 20 20 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
1470185 133 11 197 138 11 210 150 10 219 162 10 146912 12 12 12 12 12 8 8 7 0 0 0 0 0 0 0 0 0
1471226 170 11 236 178 12 236 178 12 234 174 13 14700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1472219 162 10 197 138 11 163 110 8 130 83 6 14710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1473 91 60 6 10 10 10 2 2 6 2 2 6 14720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1474 18 18 18 38 38 38 38 38 38 38 38 38 14730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1475 38 38 38 38 38 38 38 38 38 38 38 38 14740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1476 38 38 38 38 38 38 26 26 26 2 2 6 14750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1477 2 2 6 6 6 6 70 47 6 137 92 6 14760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1478175 118 6 200 144 11 219 162 10 230 174 11 14771 1 1 99 98 80 184 179 149 184 179 149 68 70 65 0 0 0
1479234 174 13 230 174 11 219 162 10 210 150 10 14780 0 0
1480192 133 9 163 110 8 124 112 88 82 82 82 14790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1481 50 50 50 30 30 30 14 14 14 6 6 6 14800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1482 0 0 0 0 0 0 0 0 0 0 0 0 14810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1483 0 0 0 0 0 0 0 0 0 0 0 0 14820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1484 0 0 0 0 0 0 0 0 0 0 0 0 14830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1485 0 0 0 0 0 0 0 0 0 0 0 0 148415 15 15 110 109 94 110 109 94 108 107 93 99 98 80 72 73 67
1486 0 0 0 0 0 0 0 0 0 0 0 0 148561 63 57 49 51 48 39 40 39 33 36 34 27 30 29 23 25 24
1487 6 6 6 14 14 14 22 22 22 34 34 34 148618 22 22 16 19 19 14 17 17 13 16 16 12 15 15 12 15 15
1488 42 42 42 58 58 58 74 74 74 86 86 86 148711 14 14 11 14 14 11 14 14 11 14 14 11 14 14 11 14 14
1489101 98 89 122 102 70 130 98 46 121 87 25 148811 14 14 11 14 14 12 14 14 12 15 15 12 15 15 12 15 15
1490137 92 6 152 99 6 163 110 8 180 123 7 148912 15 15 13 16 16 13 16 16 13 16 16 13 16 16 13 16 16
1491185 133 11 197 138 11 206 145 10 200 144 11 149013 17 17 14 17 17 14 17 17 14 17 17 14 18 18 14 18 18
1492180 123 7 156 107 11 130 83 6 104 69 6 149114 18 18 15 18 18 15 19 19 15 19 19 30 32 31 38 39 37
1493 50 34 6 54 54 54 110 110 110 101 98 89 149239 40 39 39 40 39 35 37 36 31 33 31 27 29 28 22 24 23
1494 86 86 86 82 82 82 78 78 78 78 78 78 149320 20 20 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
1495 78 78 78 78 78 78 78 78 78 78 78 78 149412 12 12 12 12 12 8 8 7 0 0 0 0 0 0 0 0 0
1496 78 78 78 82 82 82 86 86 86 94 94 94 14950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1497106 106 106 101 101 101 86 66 34 124 80 6 14960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1498156 107 11 180 123 7 192 133 9 200 144 11 14970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1499206 145 10 200 144 11 192 133 9 175 118 6 14980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1500139 102 15 109 106 95 70 70 70 42 42 42 14990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1501 22 22 22 10 10 10 0 0 0 0 0 0 15000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1502 0 0 0 0 0 0 0 0 0 0 0 0 15010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 3 3
1503 0 0 0 0 0 0 0 0 0 0 0 0 1502110 109 94 197 193 154 210 208 158 184 179 149 68 70 65 0 0 0
1504 0 0 0 0 0 0 0 0 0 0 0 0 15030 0 0
1505 0 0 0 0 0 0 0 0 0 0 0 0 15040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1506 0 0 0 0 0 0 0 0 0 0 0 0 15050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1507 0 0 0 0 0 0 6 6 6 10 10 10 15060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1508 14 14 14 22 22 22 30 30 30 38 38 38 15070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1509 50 50 50 62 62 62 74 74 74 90 90 90 15080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1510101 98 89 112 100 78 121 87 25 124 80 6 150968 70 65 110 109 94 110 109 94 105 104 92 84 83 72 65 66 61
1511137 92 6 152 99 6 152 99 6 152 99 6 151051 52 50 43 45 43 35 37 36 30 32 31 25 27 26 20 23 23
1512138 86 6 124 80 6 98 70 6 86 66 30 151117 20 20 15 18 18 13 16 16 12 15 15 12 15 15 11 14 14
1513101 98 89 82 82 82 58 58 58 46 46 46 151211 14 14 11 14 14 11 13 13 11 13 13 11 13 13 11 13 13
1514 38 38 38 34 34 34 34 34 34 34 34 34 151311 14 14 11 14 14 11 14 14 11 14 14 11 14 14 11 14 14
1515 34 34 34 34 34 34 34 34 34 34 34 34 151412 15 15 12 15 15 12 15 15 12 15 15 13 16 16 13 16 16
1516 34 34 34 34 34 34 38 38 38 42 42 42 151513 16 16 13 16 16 13 17 17 13 17 17 14 17 17 14 17 17
1517 54 54 54 82 82 82 94 86 76 91 60 6 151614 18 18 14 18 18 14 18 18 16 19 19 37 39 37 41 42 42
1518134 86 6 156 107 11 167 114 7 175 118 6 151741 42 42 41 42 42 38 39 37 32 34 33 27 29 28 23 24 24
1519175 118 6 167 114 7 152 99 6 121 87 25 151821 22 21 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
1520101 98 89 62 62 62 34 34 34 18 18 18 151912 12 12 12 12 12 8 8 7 0 0 0 0 0 0 0 0 0
1521 6 6 6 0 0 0 0 0 0 0 0 0 15200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1522 0 0 0 0 0 0 0 0 0 0 0 0 15210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1523 0 0 0 0 0 0 0 0 0 0 0 0 15220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1524 0 0 0 0 0 0 0 0 0 0 0 0 15230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1525 0 0 0 0 0 0 0 0 0 0 0 0 15240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1526 0 0 0 0 0 0 0 0 0 0 0 0 15250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1527 0 0 0 0 0 0 0 0 0 0 0 0 15260 0 0 0 0 0 0 0 0 0 0 0 11 11 11 137 133 100
1528 0 0 0 6 6 6 6 6 6 10 10 10 1527197 193 154 251 251 187 239 239 170 184 179 149 31 33 31 0 0 0
1529 18 18 18 22 22 22 30 30 30 42 42 42 15280 0 0
1530 50 50 50 66 66 66 86 86 86 101 98 89 15290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1531106 86 58 98 70 6 104 69 6 104 69 6 15300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1532104 69 6 91 60 6 82 62 34 90 90 90 15310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1533 62 62 62 38 38 38 22 22 22 14 14 14 15320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1534 10 10 10 10 10 10 10 10 10 10 10 10 15330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 12 12
1535 10 10 10 10 10 10 6 6 6 10 10 10 1534110 109 94 110 109 94 105 104 92 90 89 73 72 73 67 58 59 55
1536 10 10 10 10 10 10 10 10 10 14 14 14 153546 47 45 37 39 37 31 33 31 26 28 27 20 24 24 17 21 21
1537 22 22 22 42 42 42 70 70 70 89 81 66 153615 18 18 13 16 16 12 15 15 12 14 14 11 13 13 11 13 13
1538 80 54 7 104 69 6 124 80 6 137 92 6 153710 13 13 10 13 13 10 13 13 10 13 13 10 13 13 10 13 13
1539134 86 6 116 81 8 100 82 52 86 86 86 153810 13 13 10 13 13 11 13 13 11 13 13 11 14 14 11 14 14
1540 58 58 58 30 30 30 14 14 14 6 6 6 153911 14 14 11 14 14 12 14 14 12 15 15 12 15 15 12 15 15
1541 0 0 0 0 0 0 0 0 0 0 0 0 154013 16 16 13 16 16 13 16 16 13 16 16 13 17 17 13 17 17
1542 0 0 0 0 0 0 0 0 0 0 0 0 154114 17 17 14 17 17 14 18 18 23 27 26 41 42 42 41 42 42
1543 0 0 0 0 0 0 0 0 0 0 0 0 154243 45 43 41 42 42 39 40 39 33 36 34 27 29 28 23 24 24
1544 0 0 0 0 0 0 0 0 0 0 0 0 154321 22 21 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
1545 0 0 0 0 0 0 0 0 0 0 0 0 154412 12 12 12 12 12 6 7 7 0 0 0 0 0 0 0 0 0
1546 0 0 0 0 0 0 0 0 0 0 0 0 15450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1547 0 0 0 0 0 0 0 0 0 0 0 0 15460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1548 0 0 0 0 0 0 0 0 0 0 0 0 15470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1549 0 0 0 6 6 6 10 10 10 14 14 14 15480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1550 18 18 18 26 26 26 38 38 38 54 54 54 15490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1551 70 70 70 86 86 86 94 86 76 89 81 66 15500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1552 89 81 66 86 86 86 74 74 74 50 50 50 15510 0 0 0 0 0 0 0 0 27 29 28 168 163 120 210 208 158
1553 30 30 30 14 14 14 6 6 6 0 0 0 1552251 251 187 251 251 187 210 208 158 137 133 100 1 1 1 0 0 0
1554 0 0 0 0 0 0 0 0 0 0 0 0 15530 0 0
1555 0 0 0 0 0 0 0 0 0 0 0 0 15540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1556 0 0 0 0 0 0 0 0 0 0 0 0 15550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1557 6 6 6 18 18 18 34 34 34 58 58 58 15560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1558 82 82 82 89 81 66 89 81 66 89 81 66 15570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1559 94 86 66 94 86 76 74 74 74 50 50 50 15580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 60 56
1560 26 26 26 14 14 14 6 6 6 0 0 0 1559110 109 94 105 104 92 105 104 92 84 83 72 65 66 61 51 52 50
1561 0 0 0 0 0 0 0 0 0 0 0 0 156040 43 41 33 36 34 27 30 29 23 25 24 18 22 22 16 19 19
1562 0 0 0 0 0 0 0 0 0 0 0 0 156114 17 17 12 15 15 11 14 14 11 14 14 10 13 13 10 13 13
1563 0 0 0 0 0 0 0 0 0 0 0 0 156210 13 13 10 12 12 10 12 12 10 12 12 10 12 12 10 12 12
1564 0 0 0 0 0 0 0 0 0 0 0 0 156310 12 12 10 12 12 10 13 13 10 13 13 10 13 13 11 13 13
1565 0 0 0 0 0 0 0 0 0 0 0 0 156411 13 13 11 14 14 11 14 14 11 14 14 11 14 14 12 15 15
1566 0 0 0 0 0 0 0 0 0 0 0 0 156512 15 15 12 15 15 12 15 15 13 16 16 13 16 16 13 16 16
1567 0 0 0 0 0 0 0 0 0 0 0 0 156613 17 17 13 17 17 14 17 17 32 34 33 43 45 43 43 45 43
1568 0 0 0 0 0 0 0 0 0 0 0 0 156743 45 43 43 45 43 39 40 39 33 36 34 27 29 28 23 24 24
1569 0 0 0 0 0 0 0 0 0 0 0 0 156821 22 21 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
1570 6 6 6 6 6 6 14 14 14 18 18 18 156912 12 12 12 12 12 6 7 7 0 0 0 0 0 0 0 0 0
1571 30 30 30 38 38 38 46 46 46 54 54 54 15700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1572 50 50 50 42 42 42 30 30 30 18 18 18 15710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1573 10 10 10 0 0 0 0 0 0 0 0 0 15720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1574 0 0 0 0 0 0 0 0 0 0 0 0 15730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1575 0 0 0 0 0 0 0 0 0 0 0 0 15740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1576 0 0 0 0 0 0 0 0 0 0 0 0 15750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1577 0 0 0 6 6 6 14 14 14 26 26 26 15760 0 0 1 1 1 68 70 65 184 179 149 210 208 158 251 251 187
1578 38 38 38 50 50 50 58 58 58 58 58 58 1577251 251 187 214 212 158 184 179 149 37 39 37 0 0 0 0 0 0
1579 54 54 54 42 42 42 30 30 30 18 18 18 15780 0 0
1580 10 10 10 0 0 0 0 0 0 0 0 0 15790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1581 0 0 0 0 0 0 0 0 0 0 0 0 15800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1582 0 0 0 0 0 0 0 0 0 0 0 0 15810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1583 0 0 0 0 0 0 0 0 0 0 0 0 15820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1584 0 0 0 0 0 0 0 0 0 0 0 0 15830 0 0 0 0 0 0 0 0 0 0 0 6 7 7 105 104 92
1585 0 0 0 0 0 0 0 0 0 0 0 0 1584105 104 92 105 104 92 99 98 80 72 73 67 58 59 55 46 47 45
1586 0 0 0 0 0 0 0 0 0 0 0 0 158535 37 36 30 32 31 25 27 26 20 23 23 16 19 19 14 17 17
1587 0 0 0 0 0 0 0 0 0 0 0 0 158612 15 15 12 14 14 11 13 13 10 13 13 10 12 12 10 12 12
1588 0 0 0 0 0 0 0 0 0 0 0 0 158710 12 12 10 12 12 9 12 12 9 12 12 9 12 12 9 12 12
1589 0 0 0 0 0 0 0 0 0 0 0 0 158810 12 12 10 12 12 10 12 12 10 12 12 10 12 12 10 13 13
1590 0 0 0 0 0 0 0 0 0 6 6 6 158910 13 13 10 13 13 11 13 13 11 13 13 11 14 14 11 14 14
1591 6 6 6 10 10 10 14 14 14 18 18 18 159011 14 14 12 15 15 12 15 15 12 15 15 12 15 15 13 16 16
1592 18 18 18 14 14 14 10 10 10 6 6 6 159113 16 16 13 16 16 17 20 20 41 42 42 46 47 45 46 47 45
1593 0 0 0 0 0 0 0 0 0 0 0 0 159246 47 45 43 45 43 40 41 39 33 36 34 27 29 28 23 24 24
1594 0 0 0 0 0 0 0 0 0 0 0 0 159320 20 20 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
1595 0 0 0 0 0 0 0 0 0 0 0 0 159412 12 12 12 12 12 4 5 5 0 0 0 0 0 0 0 0 0
1596 0 0 0 0 0 0 0 0 0 0 0 0 15950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1597 0 0 0 0 0 0 0 0 0 6 6 6 15960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1598 14 14 14 18 18 18 22 22 22 22 22 22 15970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1599 18 18 18 14 14 14 10 10 10 6 6 6 15980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1600 0 0 0 0 0 0 0 0 0 0 0 0 15990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1601 0 0 0 0 0 0 0 0 0 0 0 0 16000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1602 0 0 0 0 0 0 0 0 0 0 0 0 160115 15 15 110 109 94 197 193 154 214 212 158 251 251 187 251 251 187
1603 0 0 0 0 0 0 0 0 0 0 0 0 1602239 239 170 184 179 149 84 83 72 0 0 0 0 0 0 0 0 0
1604 0 0 0 0 0 0 0 0 0 0 0 0 16030 0 0
16040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16080 0 0 0 0 0 0 0 0 0 0 0 47 48 46 105 104 92
1609105 104 92 99 98 80 84 83 72 68 70 65 51 52 50 40 43 41
161032 34 33 27 29 28 22 24 23 17 21 21 15 18 18 13 16 16
161112 15 15 11 13 13 10 13 13 10 12 12 9 12 12 9 12 12
16129 12 12 9 12 12 9 11 11 9 11 11 9 11 11 9 11 11
16139 12 12 9 12 12 9 12 12 9 12 12 10 12 12 10 12 12
161410 12 12 10 12 12 10 13 13 10 13 13 10 13 13 11 13 13
161511 14 14 11 14 14 11 14 14 12 14 14 12 15 15 12 15 15
161612 15 15 13 16 16 28 31 30 43 45 43 47 48 46 47 48 46
161747 48 46 43 45 43 40 41 39 33 36 34 27 29 28 22 24 23
161820 20 20 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
161912 12 12 12 12 12 3 4 4 0 0 0 0 0 0 0 0 0
16200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16250 0 0 0 0 0 0 0 0 0 0 0 1 1 1 60 60 56
1626177 172 135 197 193 154 251 251 187 251 251 187 251 251 187 251 251 187
1627184 179 149 110 109 94 3 4 4 0 0 0 0 0 0 0 0 0
16280 0 0
16290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16330 0 0 0 0 0 0 0 0 1 1 1 99 98 80 105 104 92
163499 98 80 87 86 72 84 83 72 63 64 60 46 47 45 35 37 36
163530 32 31 25 27 26 18 22 22 16 19 19 14 17 17 12 15 15
163611 14 14 10 13 13 9 12 12 9 12 12 9 11 11 9 11 11
16379 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
16389 11 11 9 11 11 9 11 11 9 11 11 9 12 12 9 12 12
16399 12 12 10 12 12 10 12 12 10 12 12 10 13 13 10 13 13
164010 13 13 11 13 13 11 14 14 11 14 14 11 14 14 12 15 15
164112 15 15 14 17 17 41 42 42 47 48 46 49 51 48 51 52 50
164247 48 46 43 45 43 40 41 39 33 36 34 27 29 28 22 24 23
164319 20 19 16 16 16 14 14 13 13 13 13 12 12 12 12 12 12
164412 12 12 12 12 12 2 2 2 0 0 0 0 0 0 0 0 0
16450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16500 0 0 0 0 0 0 0 0 23 24 24 137 133 100 184 179 149
1651210 208 158 251 251 187 251 251 187 251 251 187 251 251 187 184 179 149
1652110 109 94 13 13 13 0 0 0 0 0 0 0 0 0 0 0 0
16530 0 0
16540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16580 0 0 0 0 0 0 0 0 30 32 31 105 104 92 99 98 80
165984 83 72 84 83 72 72 73 67 55 57 54 41 42 42 32 34 33
166027 29 28 20 24 24 17 20 20 14 17 17 13 16 16 12 14 14
166110 13 13 10 12 12 9 11 11 9 11 11 9 11 11 9 11 11
16629 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
16639 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
16649 11 11 9 12 12 9 12 12 10 12 12 10 12 12 10 12 12
166510 13 13 10 13 13 10 13 13 11 13 13 11 14 14 11 14 14
166611 14 14 27 29 28 55 56 53 72 73 67 51 52 50 51 52 50
166749 51 48 43 45 43 39 40 39 32 34 33 26 28 27 21 22 21
166819 20 19 16 16 16 18 19 17 13 13 13 12 12 12 12 12 12
166912 12 12 12 12 12 1 1 1 0 0 0 0 0 0 0 0 0
16700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16750 0 0 8 8 7 84 83 72 184 179 149 197 193 154 251 251 187
1676251 251 187 251 251 187 251 251 187 251 251 187 184 179 149 145 141 105
167719 20 19 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16780 0 0
16790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16820 0 0 14 14 13 0 0 0 0 0 0 0 0 0 0 0 0
16830 0 0 0 0 0 0 0 0 72 73 67 105 104 92 84 83 72
168472 73 67 84 83 72 68 70 65 49 51 48 39 40 39 30 32 31
168525 27 26 18 22 22 15 18 18 13 16 16 12 15 15 11 13 13
168610 12 12 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
16879 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
16889 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
16899 11 11 9 11 11 9 11 11 9 12 12 9 12 12 9 12 12
169010 12 12 10 12 12 10 12 12 10 13 13 10 13 13 11 13 13
169113 16 16 41 42 42 99 98 80 158 153 112 65 66 61 51 52 50
169249 51 48 43 45 43 39 40 39 31 33 31 25 27 26 21 22 21
169321 22 21 68 70 65 55 56 53 13 13 13 12 12 12 12 12 12
169412 12 12 11 11 11 0 0 0 0 0 0 0 0 0 0 0 0
16950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 3 3
170063 64 60 158 153 112 184 179 149 210 208 158 251 251 187 251 251 187
1701251 251 187 251 251 187 251 251 187 184 179 149 137 133 100 27 29 28
17020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17030 0 0
17040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
170721 22 21 110 109 94 5 6 5 0 0 0 0 0 0 0 0 0
17080 0 0 0 0 0 13 13 13 105 104 92 90 89 73 72 73 67
170968 70 65 84 83 72 63 64 60 46 47 45 35 37 36 27 29 28
171022 24 23 17 20 20 14 17 17 12 15 15 11 14 14 10 12 12
171110 12 12 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
17129 11 11 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
17138 10 10 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
17149 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
17159 12 12 9 12 12 10 12 12 10 12 12 10 13 13 10 13 13
171630 32 31 47 48 46 177 172 135 210 208 158 137 133 100 55 56 53
171749 51 48 43 45 43 38 39 37 31 33 31 25 27 26 22 24 23
1718110 109 94 184 179 149 63 64 60 13 13 13 12 12 12 12 12 12
171912 12 12 8 9 9 0 0 0 1 1 1 0 0 0 0 0 0
17200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17240 0 0 0 0 0 0 0 0 0 0 0 21 22 21 105 104 92
1725184 179 149 210 208 158 251 251 187 251 251 187 251 251 187 251 251 187
1726251 251 187 251 251 187 184 179 149 145 141 105 23 24 24 0 0 0
17270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17280 0 0
17290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
173268 70 65 184 179 149 105 104 92 0 0 0 0 0 0 0 0 0
17330 0 0 0 0 0 51 52 50 99 98 80 84 83 72 63 64 60
173468 70 65 72 73 67 55 57 54 41 42 42 32 34 33 25 27 26
173520 23 23 16 19 19 13 16 16 12 14 14 10 13 13 10 12 12
17369 11 11 9 11 11 9 11 11 9 11 11 9 11 11 8 10 10
17378 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
17388 10 10 8 10 10 8 10 10 8 10 10 9 11 11 9 11 11
17399 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
17409 11 11 9 11 11 9 12 12 9 12 12 10 12 12 17 20 20
174146 47 45 72 73 67 210 208 158 251 251 187 210 208 158 63 64 60
174249 51 48 43 45 43 37 39 37 30 32 31 24 26 24 105 104 92
1743210 208 158 197 193 154 47 48 46 13 13 13 12 12 12 12 12 12
174412 12 12 6 7 7 33 36 34 48 49 45 0 0 0 0 0 0
17450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17490 0 0 0 0 0 8 8 7 23 24 24 55 56 53 110 109 94
1750210 208 158 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
1751251 251 187 184 179 149 110 109 94 20 20 20 0 0 0 0 0 0
17520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17530 0 0
17540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1757110 109 94 251 251 187 210 208 158 47 48 46 0 0 0 0 0 0
17580 0 0 1 1 1 90 89 73 90 89 73 72 73 67 55 56 53
175972 73 67 68 70 65 51 52 50 37 39 37 28 31 30 23 25 24
176017 21 21 15 18 18 12 15 15 11 14 14 10 13 13 9 12 12
17619 11 11 9 11 11 9 11 11 8 10 10 8 10 10 8 10 10
17628 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
17638 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
17648 10 10 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
17659 11 11 9 11 11 9 11 11 9 12 12 13 16 16 41 42 42
176649 51 48 110 109 94 251 251 187 251 251 187 251 251 187 105 104 92
176749 51 48 43 45 43 35 37 36 30 31 28 47 48 46 197 193 154
1768251 251 187 197 193 154 31 33 31 12 12 12 12 12 12 12 12 12
176912 12 12 51 52 50 184 179 149 72 73 67 0 0 0 0 0 0
17700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 2
177411 11 11 21 22 21 30 32 31 40 41 39 60 60 56 145 141 105
1775251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 214 212 158
1776184 179 149 110 109 94 13 13 13 0 0 0 0 0 0 0 0 0
17770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17780 0 0
17790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17800 0 0 0 0 0 4 5 4 61 61 53 48 49 45 3 4 3
17810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1782156 151 111 251 251 187 251 251 187 184 179 149 11 11 11 0 0 0
17830 0 0 26 28 27 99 98 80 84 83 72 60 60 56 43 45 43
178472 73 67 65 66 61 49 51 48 35 37 36 27 29 28 20 24 24
178517 20 20 14 17 17 12 15 15 11 13 13 10 12 12 9 11 11
17869 11 11 9 11 11 8 10 10 8 10 10 8 10 10 8 10 10
17878 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
17888 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
17898 10 10 8 10 10 8 10 10 8 10 10 9 11 11 9 11 11
17909 11 11 9 11 11 9 11 11 11 13 13 37 39 37 47 48 46
179151 52 50 184 179 149 251 251 187 251 251 187 251 251 187 145 141 105
179247 48 46 41 42 42 35 37 36 27 29 28 137 133 100 251 251 187
1793251 251 187 197 193 154 19 20 19 12 12 12 12 12 12 12 12 12
179427 29 28 184 179 149 214 212 158 63 64 60 0 0 0 0 0 0
17950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17980 0 0 0 0 0 1 1 1 6 7 7 16 16 16 24 26 24
179930 32 31 38 39 37 47 48 46 55 57 54 68 70 65 110 109 94
1800197 193 154 251 251 187 251 251 187 251 251 187 210 208 158 184 179 149
1801105 104 92 8 8 7 0 0 0 0 0 0 0 0 0 0 0 0
18020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18030 0 0
18040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18050 0 0 0 0 0 0 0 0 65 66 61 184 179 149 156 151 111
180630 32 31 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1807168 163 120 251 251 187 251 251 187 251 251 187 110 109 94 0 0 0
18080 0 0 60 60 56 84 83 72 68 70 65 51 52 50 38 39 37
180984 83 72 63 64 60 43 45 43 33 36 34 25 27 26 20 23 22
181015 18 18 13 16 16 12 14 14 10 13 13 9 12 12 9 11 11
18119 11 11 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18128 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18138 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18148 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18159 11 11 9 11 11 10 12 12 33 36 34 46 47 45 51 52 50
181672 73 67 210 208 158 251 251 187 251 251 187 251 251 187 177 172 135
181747 48 46 41 42 42 35 37 36 37 39 37 184 179 149 251 251 187
1818251 251 187 197 193 154 13 13 13 12 12 12 12 12 12 12 12 12
1819110 109 94 251 251 187 251 251 187 37 39 37 0 0 0 0 0 0
18200 0 0 21 22 20 2 2 1 0 0 0 0 0 0 0 0 0
18210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18234 5 5 12 12 12 21 22 21 25 27 26 30 32 31 38 39 37
182446 47 45 55 56 53 60 60 56 65 66 61 68 70 65 105 104 92
1825110 109 94 197 193 154 210 208 158 197 193 154 184 179 149 84 83 72
18262 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18280 0 0
18290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18300 0 0 0 0 0 0 0 0 13 13 13 184 179 149 251 251 187
1831197 193 154 43 44 41 0 0 0 0 0 0 0 0 0 0 0 0
1832145 141 105 251 251 187 251 251 187 251 251 187 214 212 158 43 45 43
18332 2 2 84 83 72 72 73 67 58 59 55 41 42 42 38 39 37
183472 73 67 58 59 55 41 42 42 31 33 31 25 27 26 18 22 22
183514 17 17 12 15 15 12 14 14 10 12 12 9 12 12 9 11 11
18369 11 11 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18378 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18388 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18398 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18408 10 10 9 12 12 31 33 31 43 45 43 49 51 48 55 56 53
1841110 109 94 251 251 187 251 251 187 251 251 187 251 251 187 168 163 120
184247 48 46 41 42 42 33 36 34 63 64 60 197 193 154 251 251 187
1843251 251 187 184 179 149 13 13 13 12 12 12 12 12 12 16 16 16
1844197 193 154 251 251 187 239 239 170 20 20 20 0 0 0 2 2 1
1845108 107 93 110 109 94 0 0 0 0 0 0 0 0 0 0 0 0
18460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18470 0 0 0 0 0 1 1 1 4 5 5 11 11 11 18 19 18
184822 24 23 26 28 27 32 34 33 39 40 39 46 47 45 51 52 50
184955 57 54 60 60 56 63 64 60 63 64 60 63 64 60 58 59 55
185063 64 60 99 98 80 145 141 105 137 133 100 43 45 43 0 0 0
18510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18530 0 0
18540 0 0 0 0 0 0 0 0 3 4 3 0 0 0 0 0 0
18550 0 0 0 0 0 0 0 0 0 0 0 110 109 94 251 251 187
1856251 251 187 184 179 149 25 27 26 0 0 0 0 0 0 0 0 0
185799 98 80 251 251 187 251 251 187 251 251 187 251 251 187 156 151 111
185825 27 26 84 83 72 65 66 61 47 48 46 32 34 33 39 40 39
185972 73 67 55 57 54 40 41 39 30 32 31 23 25 24 18 22 22
186014 17 17 12 15 15 11 13 13 10 12 12 9 11 11 9 11 11
18619 11 11 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18628 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18638 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18648 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18659 11 11 28 31 30 41 42 42 47 48 46 55 56 53 58 59 55
1866137 133 100 251 251 187 251 251 187 251 251 187 210 208 158 137 133 100
186747 48 46 40 41 39 32 34 33 75 75 61 184 179 149 239 239 170
1868251 251 187 177 172 135 13 13 13 12 12 12 12 12 12 43 44 41
1869197 193 154 251 251 187 210 208 158 10 10 9 0 0 0 84 83 72
1870251 251 187 84 83 72 0 0 0 0 0 0 0 0 0 0 0 0
18710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
18726 7 7 11 11 11 17 17 17 20 20 20 23 24 24 27 29 28
187332 34 33 38 39 37 43 45 43 47 48 46 51 52 50 55 56 53
187458 59 55 58 59 55 55 57 54 55 56 53 47 48 46 41 42 42
187535 37 36 31 33 31 47 48 46 14 14 13 0 0 0 0 0 0
18760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18780 0 0
18790 0 0 0 0 0 0 0 0 66 65 55 99 98 80 20 20 20
18800 0 0 0 0 0 0 0 0 0 0 0 43 45 43 214 212 158
1881251 251 187 251 251 187 145 141 105 3 3 3 0 0 0 0 0 0
188248 49 45 184 179 149 239 239 170 251 251 187 239 239 170 177 172 135
188384 83 72 72 73 67 55 56 53 39 40 39 26 28 27 39 40 39
188468 70 65 51 52 50 39 40 39 28 31 30 22 24 23 17 20 20
188514 17 17 12 14 14 10 13 13 9 11 11 9 11 11 9 11 11
18868 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18878 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18888 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
18898 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
189027 29 28 40 41 39 46 47 45 51 52 50 55 57 54 63 64 60
1891131 127 93 197 193 154 210 208 158 197 193 154 168 163 120 96 95 69
189247 48 46 40 41 39 32 34 33 71 71 57 145 141 105 184 179 149
1893184 179 149 131 127 93 13 13 13 12 12 12 12 12 12 48 49 45
1894168 163 120 184 179 149 156 151 111 6 7 7 14 14 13 177 172 135
1895239 239 170 40 41 39 0 0 0 0 0 0 0 0 0 0 0 0
18960 0 0 0 0 0 3 3 3 6 7 7 11 11 11 16 16 16
189718 19 18 21 22 21 23 24 24 27 29 28 32 34 33 37 39 37
189841 42 42 43 45 43 47 48 46 51 52 50 51 52 50 51 52 50
189951 52 50 49 51 48 46 47 45 40 41 39 32 34 33 25 27 26
190020 20 20 14 14 13 2 2 2 0 0 0 0 0 0 0 0 0
19010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19030 0 0
19040 0 0 0 0 0 0 0 0 33 36 34 197 193 154 184 179 149
190541 42 42 0 0 0 0 0 0 0 0 0 3 3 3 184 179 149
1906251 251 187 251 251 187 184 179 149 48 49 45 0 0 0 0 0 0
190716 17 12 121 119 87 177 172 135 194 189 146 188 184 146 145 141 105
190882 81 62 63 64 60 46 47 45 31 33 31 21 22 21 35 37 36
190968 70 65 51 52 50 37 39 37 27 30 29 22 24 23 17 20 20
191013 16 16 12 14 14 10 13 13 9 11 11 8 10 10 8 10 10
19118 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
19128 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
19138 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
19148 10 10 8 10 10 8 10 10 8 10 10 8 10 10 25 27 26
191538 39 37 43 45 43 51 52 50 55 56 53 60 60 56 63 64 60
191692 91 72 158 153 112 176 171 126 171 165 117 149 143 98 82 81 62
191744 46 43 38 39 37 30 32 31 71 71 57 131 127 93 160 154 106
1918149 143 98 82 81 62 13 13 13 12 12 12 12 12 12 46 47 43
1919121 119 87 134 131 96 96 95 69 7 7 6 38 39 37 131 127 93
1920145 141 105 12 13 12 0 0 0 1 1 1 3 3 3 6 7 7
192110 10 9 12 12 12 14 14 13 16 16 16 18 19 18 21 22 21
192222 24 23 26 28 27 30 31 28 33 36 34 37 39 37 40 41 39
192341 42 42 43 45 43 46 47 45 46 47 45 46 47 45 43 45 43
192441 42 42 37 39 37 31 33 31 26 28 27 21 22 21 16 16 16
19256 7 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19280 0 0
19290 0 0 0 0 0 0 0 0 0 0 0 177 172 135 251 251 187
1930197 193 154 27 29 28 0 0 0 0 0 0 0 0 0 110 109 94
1931239 239 170 239 239 170 184 179 149 87 86 72 2 2 1 0 0 0
19321 1 1 82 81 62 142 137 94 165 161 109 165 161 109 131 127 93
193375 75 61 55 56 53 37 39 37 25 27 26 19 20 19 32 34 33
193465 66 61 49 51 48 35 37 36 27 29 28 20 23 23 16 19 19
193513 16 16 13 13 13 10 12 12 9 11 11 8 10 10 8 10 10
19368 9 9 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
19378 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
19388 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
19398 10 10 8 10 10 8 10 10 8 10 10 22 24 23 35 37 36
194041 42 42 47 48 46 55 56 53 58 59 55 63 64 60 65 66 61
194171 71 57 131 127 93 160 154 106 160 154 106 142 137 94 82 81 62
194246 47 43 40 41 39 33 36 34 66 65 55 125 122 87 149 143 98
1943142 137 94 82 81 62 17 17 17 18 19 17 14 14 13 46 47 43
1944118 116 76 125 122 87 96 95 69 16 17 12 71 71 57 103 101 77
194582 81 62 11 11 11 11 11 11 13 13 13 14 14 13 14 14 13
194615 15 15 16 16 16 17 17 17 19 20 19 21 22 21 23 24 24
194726 28 27 27 29 28 31 33 31 33 36 34 35 37 36 38 39 37
194839 40 39 39 40 39 38 39 37 37 39 37 35 37 36 31 33 31
194927 29 28 24 26 24 21 22 21 17 17 17 12 12 12 2 2 2
19500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19530 0 0
19540 0 0 0 0 0 0 0 0 0 0 0 68 70 65 251 251 187
1955251 251 187 156 151 111 2 2 1 0 0 0 0 0 0 43 44 41
1956177 172 135 184 179 149 158 153 112 103 101 77 19 20 18 0 0 0
19570 0 0 46 47 43 131 127 93 160 154 106 160 154 106 131 127 93
195871 71 57 43 45 43 30 32 31 21 22 21 16 16 16 26 28 27
195963 64 60 47 48 46 35 37 36 26 28 27 20 23 23 16 19 19
196013 16 16 13 13 13 10 12 12 9 11 11 8 10 10 8 10 10
19617 9 9 7 9 9 8 9 9 8 10 10 8 10 10 8 10 10
19628 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
19638 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
19648 10 10 8 10 10 8 10 10 20 20 20 33 36 34 40 41 39
196546 47 45 51 52 50 55 57 54 60 60 56 63 64 60 65 66 61
196666 65 55 118 116 76 151 147 98 165 161 109 151 147 98 121 119 87
196796 95 69 96 95 69 96 95 69 103 101 77 142 137 94 151 147 98
1968142 137 94 103 101 77 82 81 62 82 81 62 82 81 62 96 95 69
1969131 127 93 142 137 94 103 101 77 46 47 43 96 95 69 118 116 76
197071 71 57 14 14 13 14 14 13 15 15 15 15 15 15 16 16 16
197116 16 16 17 17 17 18 19 18 20 20 20 21 22 21 23 24 24
197225 27 26 27 29 28 30 31 28 30 32 31 31 33 31 31 33 31
197331 33 31 31 33 31 30 31 28 27 29 28 25 27 26 22 24 23
197420 20 20 16 16 16 13 13 13 6 7 7 0 0 0 0 0 0
19750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19780 0 0
197958 59 55 68 70 65 8 8 7 0 0 0 10 10 9 210 208 158
1980251 251 187 184 179 149 38 39 37 0 0 0 0 0 0 8 8 7
1981103 101 77 149 143 98 149 143 98 118 116 76 40 41 39 25 27 25
198253 55 47 82 81 62 144 139 99 165 161 109 165 161 109 142 137 94
198371 71 57 35 37 36 24 26 24 18 19 18 15 15 15 22 24 23
198463 64 60 46 47 45 33 36 34 26 28 27 20 23 22 17 18 17
198512 15 15 11 13 13 10 12 12 9 11 11 8 10 10 8 10 10
19867 9 9 7 9 9 7 9 9 7 9 9 8 9 9 8 10 10
19878 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
19888 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
19898 10 10 8 10 10 16 16 16 30 31 28 35 37 36 41 42 42
199047 48 46 55 56 53 58 59 55 63 64 60 65 66 61 65 66 61
199161 61 53 103 101 77 151 147 98 171 165 117 171 165 117 168 163 120
1992158 153 112 158 153 112 155 149 109 151 147 98 151 147 98 160 154 106
1993151 147 98 149 143 98 142 137 94 149 143 98 149 143 98 149 143 98
1994155 149 109 151 147 98 131 127 93 103 101 77 125 122 87 118 116 76
199571 71 57 16 16 16 16 16 16 16 16 16 17 17 17 17 17 17
199617 17 17 17 17 17 18 19 18 19 20 19 20 20 20 21 22 21
199723 24 24 24 26 24 25 27 26 26 28 27 26 28 27 26 28 27
199825 27 26 24 26 24 22 24 23 21 22 21 19 20 19 16 16 16
199914 14 13 8 8 7 1 1 1 0 0 0 0 0 0 0 0 0
20000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20030 0 0
200420 20 20 184 179 149 168 163 120 21 22 21 0 0 0 105 104 92
2005177 172 135 145 141 105 71 71 57 0 0 0 0 0 0 0 0 0
200666 65 55 131 127 93 151 147 98 142 137 94 118 116 76 121 119 87
2007145 141 105 158 153 112 176 171 126 178 174 128 176 171 126 149 145 103
200896 95 69 31 33 31 21 22 21 16 16 16 14 14 13 18 19 18
200960 60 56 46 47 45 33 36 34 25 27 26 21 22 21 15 18 18
201012 15 15 11 13 13 9 11 11 8 10 10 8 10 10 8 9 9
20117 9 9 7 9 9 7 9 9 7 9 9 7 9 9 8 9 9
20128 9 9 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
20138 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
20148 10 10 10 12 12 26 28 27 31 33 31 38 39 37 43 45 43
201551 52 50 55 56 53 60 60 56 63 64 60 65 66 61 68 70 65
201663 64 60 96 95 69 158 153 112 178 174 128 188 184 146 194 189 146
2017194 189 146 188 184 146 184 181 136 176 171 126 171 165 117 173 167 111
2018173 167 111 165 161 109 171 165 117 174 170 121 176 171 126 178 174 128
2019178 174 128 174 170 121 160 154 106 149 143 98 149 143 98 125 122 87
202071 71 57 16 16 16 16 16 16 17 17 17 17 17 17 17 17 17
202117 17 17 17 17 17 17 17 17 18 19 18 19 20 19 20 20 20
202221 22 21 21 22 21 21 22 21 22 24 23 21 22 21 21 22 21
202321 22 21 19 20 19 18 19 18 16 16 16 14 14 13 11 11 11
20243 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20280 0 0
20290 0 0 105 104 92 197 193 154 110 109 94 9 9 8 36 38 35
2030121 119 87 131 127 93 96 95 69 18 19 17 30 31 28 66 65 55
203196 95 69 142 137 94 160 154 106 160 154 106 160 154 106 168 163 120
2032184 181 136 194 191 148 197 193 154 197 193 154 194 189 146 168 163 120
2033125 122 87 46 47 43 18 19 18 15 15 15 13 13 13 14 14 13
203455 57 54 43 45 43 32 34 33 25 27 26 18 22 22 17 17 17
203512 14 14 10 12 12 9 11 11 8 10 10 8 9 9 7 9 9
20366 8 8 7 9 9 7 9 9 7 9 9 7 9 9 7 9 9
20377 9 9 8 9 9 8 9 9 8 10 10 8 10 10 8 10 10
20388 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
20398 10 10 32 34 33 41 42 42 35 37 36 39 40 39 37 39 37
204035 37 36 55 57 54 60 60 56 63 64 60 65 66 61 65 66 61
204161 63 57 115 113 82 168 163 120 194 191 148 204 201 155 210 208 158
2042210 208 158 210 208 158 197 193 154 194 189 146 186 182 128 176 171 126
2043174 170 121 176 171 126 186 182 128 190 186 136 194 191 148 197 193 154
2044197 193 154 188 184 146 181 176 137 174 170 121 165 161 109 142 137 94
204582 81 62 24 26 24 16 16 16 16 16 16 16 16 16 16 16 16
204617 17 17 17 17 17 17 17 17 17 17 17 18 19 18 19 20 19
204719 20 19 19 20 19 20 20 20 19 20 19 19 20 19 18 19 18
204817 17 17 15 15 15 13 13 13 12 12 12 6 7 7 0 0 0
20490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20530 0 0
20540 0 0 17 18 17 137 133 100 115 113 82 53 55 47 19 20 18
2055103 101 77 144 139 99 137 133 100 115 113 82 137 133 100 156 151 111
2056158 153 112 164 159 111 171 165 117 174 170 121 178 174 128 194 189 146
2057204 201 155 214 212 158 214 212 158 214 212 158 210 208 158 188 184 146
2058158 153 112 87 86 72 17 17 17 13 13 13 13 13 13 15 15 15
205955 56 53 43 45 43 32 34 33 24 26 24 17 20 20 16 16 16
206012 14 14 10 12 12 8 10 10 8 10 10 7 9 9 6 8 8
20616 8 8 6 8 8 6 8 8 7 9 9 7 9 9 7 9 9
20627 9 9 7 9 9 7 9 9 7 9 9 8 9 9 8 10 10
20638 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
20648 10 10 110 109 94 84 83 72 49 51 48 26 28 27 8 10 10
20658 9 9 51 52 50 58 59 55 63 64 60 63 64 60 63 64 60
206666 65 55 134 131 96 181 176 137 210 208 158 214 212 158 239 239 170
2067239 239 170 224 223 159 210 208 158 204 201 155 194 189 146 186 182 128
2068186 182 128 184 181 136 194 189 146 204 201 155 210 208 158 210 208 158
2069210 208 158 210 208 158 197 193 154 190 186 136 176 171 126 155 149 109
2070118 116 76 36 38 35 15 15 15 16 16 16 16 16 16 16 16 16
207116 16 16 16 16 16 16 16 16 16 16 16 16 16 16 17 17 17
207217 17 17 17 17 17 17 17 17 16 16 16 16 16 16 15 15 15
207313 13 13 12 12 12 8 8 7 2 2 2 0 0 0 0 0 0
20740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20780 0 0
20790 0 0 0 0 0 53 55 47 103 101 77 96 95 69 53 55 47
2080103 101 77 158 153 112 177 172 135 184 179 149 188 184 146 197 193 154
2081194 189 146 190 186 136 184 181 136 184 181 136 194 189 146 210 208 158
2082214 212 158 239 239 170 251 251 187 251 251 187 224 223 159 204 201 155
2083177 172 135 121 119 87 30 31 28 13 13 13 12 12 12 39 40 39
208460 60 56 43 45 43 32 34 33 23 25 24 18 19 18 13 16 16
208513 13 13 9 11 11 8 10 10 8 9 9 6 8 8 6 8 8
20866 8 8 6 8 8 6 8 8 6 8 8 6 8 8 7 9 9
20877 9 9 7 9 9 7 9 9 7 9 9 7 9 9 7 9 9
20887 9 9 8 9 9 8 9 9 8 10 10 8 10 10 8 10 10
208914 17 17 197 193 154 158 153 112 55 57 54 7 9 9 7 9 9
20908 10 10 51 52 50 58 59 55 60 60 56 63 64 60 63 64 60
209171 71 57 155 149 109 194 191 148 214 212 158 251 251 187 251 251 187
2092251 251 187 251 251 187 239 239 170 210 208 158 197 193 154 190 186 136
2093190 186 136 194 189 146 204 201 155 210 208 158 224 223 159 239 239 170
2094239 239 170 224 223 159 210 208 158 204 201 155 190 186 136 164 159 111
2095125 122 87 40 41 39 15 15 15 15 15 15 15 15 15 15 15 15
209616 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16
209716 16 16 16 16 16 15 15 15 14 14 13 13 13 13 12 12 12
20988 9 9 3 3 3 0 0 0 0 0 0 0 0 0 0 0 0
20990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21030 0 0
21040 0 0 0 0 0 21 22 20 96 95 69 125 122 87 121 119 87
2105144 139 99 177 172 135 197 193 154 210 208 158 214 212 158 214 212 158
2106210 208 158 204 201 155 194 191 148 194 189 146 204 201 155 214 212 158
2107239 239 170 251 251 187 251 251 187 251 251 187 251 251 187 214 212 158
2108188 184 146 145 141 105 53 55 47 12 12 12 15 15 15 63 64 60
210963 64 60 41 42 42 31 33 31 23 24 24 17 18 17 12 15 15
211011 13 13 9 11 11 8 9 9 7 9 9 6 8 8 6 8 8
21116 7 7 6 7 7 6 8 8 6 8 8 6 8 8 6 8 8
21126 8 8 7 9 9 7 9 9 7 9 9 7 9 9 7 9 9
21137 9 9 7 9 9 7 9 9 7 9 9 7 9 9 8 8 7
211443 45 43 251 251 187 156 151 111 8 10 10 7 9 9 7 9 9
211521 22 21 51 52 50 55 56 53 55 57 54 58 59 55 58 59 55
211675 75 61 158 153 112 197 193 154 224 223 159 251 251 187 251 251 187
2117251 251 187 251 251 187 251 251 187 214 212 158 204 201 155 194 189 146
2118190 186 136 197 193 154 210 208 158 224 223 159 251 251 187 251 251 187
2119251 251 187 251 251 187 239 239 170 210 208 158 197 193 154 176 171 126
2120125 122 87 36 38 35 14 14 13 14 14 13 15 15 15 15 15 15
212115 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15
212215 15 15 14 14 13 13 13 13 12 12 12 10 10 9 3 4 4
21230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21280 0 0
21290 0 0 0 0 0 7 7 5 71 71 57 131 127 93 158 153 112
2130177 172 135 197 193 154 214 212 158 239 239 170 251 251 187 251 251 187
2131238 237 168 210 208 158 204 201 155 197 193 154 204 201 155 214 212 158
2132251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 214 212 158
2133197 193 154 156 151 111 66 65 55 12 12 12 37 39 37 58 59 55
213458 59 55 41 42 42 31 33 31 22 24 23 17 17 17 12 14 14
213510 12 12 8 10 10 6 8 8 6 8 8 6 7 7 6 7 7
21366 7 7 5 7 7 6 7 7 6 7 7 6 8 8 6 8 8
21376 8 8 6 8 8 6 8 8 7 9 9 7 9 9 7 9 9
21387 9 9 6 8 8 6 8 8 6 8 8 6 8 8 6 8 8
213961 63 57 197 193 154 16 19 19 6 8 8 6 8 8 8 9 9
214041 42 42 47 48 46 51 52 50 51 52 50 55 56 53 55 56 53
214171 71 57 158 153 112 197 193 154 224 223 159 251 251 187 251 251 187
2142251 251 187 251 251 187 239 239 170 214 212 158 204 201 155 194 189 146
2143190 186 136 197 193 154 210 208 158 239 239 170 251 251 187 251 251 187
2144251 251 187 251 251 187 251 251 187 224 223 159 204 201 155 177 172 135
2145121 119 87 30 31 28 13 13 13 14 14 13 14 14 13 14 14 13
214614 14 13 14 14 13 15 15 15 15 15 15 14 14 13 13 13 13
214712 12 12 12 12 12 10 10 9 4 5 5 0 0 0 0 0 0
21480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21530 0 0
21540 0 0 0 0 0 0 0 0 48 49 45 131 127 93 174 170 121
2155194 189 146 210 208 158 239 239 170 251 251 187 251 251 187 251 251 187
2156251 251 187 214 212 158 204 201 155 197 193 154 204 201 155 210 208 158
2157239 239 170 251 251 187 251 251 187 251 251 187 239 239 170 214 212 158
2158194 191 148 156 151 111 71 71 57 19 20 19 51 52 50 51 52 50
215951 52 50 41 42 42 30 32 31 21 22 21 17 17 17 13 13 13
21609 11 11 8 9 9 6 8 8 6 7 7 6 7 7 5 7 7
21615 6 5 5 6 5 5 7 7 5 7 7 6 7 7 6 7 7
21626 8 8 6 8 8 6 8 8 6 7 7 6 7 7 6 7 7
21636 7 7 6 8 8 6 8 8 6 8 8 6 8 8 6 8 8
216455 56 53 43 45 43 6 8 8 6 8 8 6 8 8 47 48 46
216560 60 56 47 48 46 46 47 45 47 48 46 38 39 37 10 12 12
216666 65 55 145 141 105 197 193 154 214 212 158 251 251 187 251 251 187
2167251 251 187 251 251 187 224 223 159 210 208 158 194 191 148 184 181 136
2168184 181 136 194 189 146 204 201 155 224 223 159 251 251 187 251 251 187
2169251 251 187 251 251 187 251 251 187 239 239 170 210 208 158 181 176 137
2170115 113 82 21 22 20 13 13 13 13 13 13 13 13 13 13 13 13
217114 14 13 13 13 13 13 13 13 13 13 13 12 12 12 11 11 11
217210 10 9 6 7 7 1 1 1 0 0 0 0 0 0 0 0 0
21730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21780 0 0
21790 0 0 0 0 0 2 2 1 66 65 55 144 139 99 178 174 128
2180204 201 155 214 212 158 251 251 187 251 251 187 251 251 187 251 251 187
2181251 251 187 214 212 158 204 201 155 194 191 148 197 193 154 204 201 155
2182214 212 158 239 239 170 239 239 170 239 239 170 214 212 158 210 208 158
2183184 181 136 149 145 103 66 65 55 41 42 42 47 48 46 46 47 45
218443 45 43 39 40 39 28 31 30 21 22 21 16 16 16 10 12 12
21858 10 10 6 8 8 6 7 7 6 7 7 5 6 5 5 6 5
21865 6 5 5 6 5 5 6 5 5 6 5 5 7 7 5 7 7
21876 7 7 6 7 7 6 7 7 5 7 7 5 7 7 5 7 7
21885 7 7 6 7 7 6 7 7 6 7 7 6 7 7 6 8 8
21896 8 8 6 8 8 6 7 7 6 7 7 46 47 45 156 151 111
2190105 104 92 58 59 55 43 45 43 32 34 33 6 8 8 6 8 8
219149 51 48 125 122 87 181 176 137 204 201 155 214 212 158 239 239 170
2192239 239 170 214 212 158 210 208 158 197 193 154 181 176 137 176 171 126
2193176 171 126 184 181 136 197 193 154 210 208 158 239 239 170 251 251 187
2194251 251 187 251 251 187 251 251 187 251 251 187 210 208 158 177 172 135
219599 98 80 13 13 13 12 12 12 12 12 12 13 13 13 12 12 12
219612 12 12 12 12 12 11 11 11 11 11 11 8 9 9 4 5 5
21971 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22030 0 0
22040 0 0 0 0 0 1 1 0 61 61 53 142 137 94 181 176 137
2205204 201 155 224 223 159 251 251 187 251 251 187 251 251 187 251 251 187
2206251 251 187 214 212 158 197 193 154 190 186 136 184 181 136 188 184 146
2207197 193 154 204 201 155 210 208 158 210 208 158 204 201 155 194 189 146
2208176 171 126 134 131 96 66 65 55 43 45 43 41 42 42 39 40 39
220935 37 36 33 36 34 27 29 28 20 20 20 15 15 15 9 11 11
22108 9 9 6 7 7 5 6 5 5 6 5 4 5 5 4 5 5
22114 5 5 4 5 5 4 5 5 4 5 5 5 6 5 4 5 5
22124 5 5 5 6 5 4 5 5 5 6 5 5 6 5 5 6 5
22135 7 7 5 7 7 5 7 7 5 7 7 5 7 7 5 7 7
22146 7 7 6 7 7 6 7 7 28 31 30 184 179 149 184 179 149
2215145 141 105 84 83 72 27 29 28 5 7 7 5 6 5 16 16 16
221643 44 41 96 95 69 158 153 112 188 184 146 204 201 155 210 208 158
2217204 201 155 197 193 154 184 179 149 177 172 135 168 163 120 164 159 111
2218164 159 111 174 170 121 184 181 136 197 193 154 214 212 158 251 251 187
2219251 251 187 251 251 187 251 251 187 251 251 187 210 208 158 177 172 135
222071 71 57 11 11 11 12 12 12 11 11 11 11 11 11 11 11 11
222110 10 9 10 10 9 8 8 7 3 4 4 0 0 0 0 0 0
22220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22280 0 0
22290 0 0 0 0 0 0 0 0 31 33 31 121 119 87 176 171 126
2230197 193 154 214 212 158 251 251 187 251 251 187 251 251 187 251 251 187
2231239 239 170 210 208 158 194 189 146 178 174 128 174 170 121 176 171 126
2232177 172 135 181 176 137 184 179 149 184 179 149 181 176 137 178 174 128
2233158 153 112 121 119 87 53 55 47 37 39 37 33 36 34 30 32 31
223427 29 28 25 27 26 24 26 24 19 20 19 13 13 13 8 10 10
22356 8 8 6 7 7 5 6 5 4 5 5 4 5 5 4 5 5
22364 5 5 4 5 5 4 5 5 3 4 4 3 4 4 4 5 5
22374 5 5 4 5 5 4 5 5 4 5 5 4 5 5 4 5 5
22385 6 5 5 6 5 5 6 5 5 6 5 5 6 5 5 6 5
22395 6 5 5 6 5 12 14 14 145 141 105 184 179 149 177 172 135
224090 89 73 21 22 21 5 6 5 5 6 5 4 5 5 37 39 37
224138 39 37 61 61 53 134 131 96 168 163 120 184 181 136 188 184 146
2242184 179 149 177 172 135 168 163 120 164 159 111 155 149 109 151 147 98
2243151 147 98 164 159 111 176 171 126 184 179 149 210 208 158 239 239 170
2244251 251 187 251 251 187 251 251 187 239 239 170 210 208 158 158 153 112
224546 47 43 10 10 9 10 10 9 10 10 9 8 9 9 8 9 9
22466 7 7 3 3 3 0 0 0 0 0 0 0 0 0 0 0 0
22470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22530 0 0
22540 0 0 0 0 0 0 0 0 13 12 7 82 81 62 158 153 112
2255188 184 146 210 208 158 239 239 170 251 251 187 251 251 187 251 251 187
2256224 223 159 204 201 155 184 181 136 171 165 117 164 159 111 160 154 106
2257158 153 112 164 159 111 168 163 120 168 163 120 168 163 120 164 159 111
2258142 137 94 96 95 69 43 44 41 27 29 28 26 28 27 23 24 24
225921 22 21 18 19 18 17 17 17 18 19 18 13 13 13 8 8 7
22606 7 7 5 6 5 4 5 5 3 4 4 3 4 4 3 4 4
22613 4 4 3 4 4 3 3 3 3 3 3 3 4 4 3 4 4
22623 4 4 3 4 4 4 5 5 4 5 5 4 5 5 4 5 5
22634 5 5 4 5 5 4 5 5 4 5 5 4 5 5 4 5 5
22644 5 5 4 5 5 4 5 5 4 5 5 4 5 5 4 5 5
22654 5 5 4 5 5 4 5 5 4 5 5 31 33 31 65 66 61
226637 39 37 38 39 37 96 95 69 144 139 99 168 163 120 174 170 121
2267168 163 120 164 159 111 155 149 109 149 145 103 149 143 98 142 137 94
2268149 143 98 151 147 98 164 159 111 177 172 135 197 193 154 210 208 158
2269251 251 187 251 251 187 251 251 187 239 239 170 197 193 154 137 133 100
227024 26 24 8 9 9 8 9 9 8 8 7 6 7 7 2 2 2
22710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22780 0 0
22790 0 0 0 0 0 0 0 0 0 0 0 46 47 43 125 122 87
2280176 171 126 197 193 154 210 208 158 239 239 170 251 251 187 239 239 170
2281214 212 158 197 193 154 181 176 137 164 159 111 151 147 98 149 143 98
2282149 143 98 149 143 98 149 145 103 155 149 109 160 154 106 149 143 98
2283118 116 76 82 81 62 30 31 28 21 22 21 19 20 19 17 17 17
228414 14 13 12 12 12 10 10 9 12 12 12 10 12 12 6 8 8
22854 5 5 3 4 4 3 4 4 3 4 4 3 3 3 3 3 3
22863 3 3 3 3 3 3 3 3 3 3 3 2 3 3 2 3 3
22873 4 4 3 4 4 3 4 4 3 4 4 3 4 4 4 5 5
22884 5 5 3 4 4 3 4 4 3 4 4 3 4 4 3 4 4
22894 5 5 4 5 5 4 5 5 4 5 5 4 5 5 4 5 5
22904 5 5 3 4 4 3 4 4 23 24 24 110 109 94 72 73 67
229139 40 39 22 24 23 46 47 43 103 101 77 142 137 94 155 149 109
2292160 154 106 155 149 109 149 143 98 142 137 94 142 137 94 142 137 94
2293142 137 94 149 143 98 155 149 109 176 171 126 184 179 149 210 208 158
2294239 239 170 251 251 187 251 251 187 214 212 158 184 179 149 105 104 92
229510 10 9 6 7 7 3 4 4 1 1 1 0 0 0 0 0 0
22960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23030 0 0
23040 0 0 0 0 0 0 0 0 0 0 0 12 12 9 82 81 62
2305149 145 103 181 176 137 197 193 154 210 208 158 214 212 158 214 212 158
2306210 208 158 197 193 154 177 172 135 158 153 112 149 143 98 142 137 94
2307142 137 94 142 137 94 149 143 98 151 147 98 151 147 98 131 127 93
2308103 101 77 71 71 57 22 24 23 15 15 15 13 13 13 11 11 11
23098 9 9 6 7 7 6 7 7 4 5 5 8 9 9 6 7 7
23104 5 5 3 3 3 3 3 3 3 3 3 3 3 3 2 2 2
23112 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 3
23122 3 3 2 3 3 2 3 3 3 4 4 3 4 4 3 4 4
23133 4 4 3 4 4 3 3 3 3 4 4 3 4 4 3 4 4
23143 4 4 3 4 4 3 4 4 3 4 4 3 4 4 3 4 4
23153 4 4 3 4 4 21 22 21 145 141 105 145 141 105 72 73 67
231617 18 17 3 4 4 21 22 20 66 65 55 118 116 76 142 137 94
2317149 143 98 151 147 98 149 143 98 142 137 94 142 137 94 142 137 94
2318142 137 94 149 143 98 155 149 109 168 163 120 184 179 149 210 208 158
2319239 239 170 251 251 187 251 251 187 210 208 158 177 172 135 71 71 57
23203 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23280 0 0
23290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 36 38 35
2330115 113 82 158 153 112 181 176 137 197 193 154 204 201 155 210 208 158
2331204 201 155 188 184 146 177 172 135 164 159 111 149 145 103 142 137 94
2332142 137 94 142 137 94 149 143 98 151 147 98 149 143 98 125 122 87
233396 95 69 61 61 53 16 17 12 8 9 9 8 8 7 6 7 7
23344 5 5 3 4 4 3 3 3 3 3 3 3 3 3 5 6 5
23353 4 4 2 3 3 2 2 2 2 2 2 2 2 2 2 2 2
23362 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2
23372 2 2 2 2 2 2 3 3 2 3 3 2 3 3 2 3 3
23383 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3
23393 3 3 2 3 3 2 3 3 3 4 4 3 4 4 3 4 4
23403 4 4 3 4 4 3 4 4 8 9 9 8 8 7 3 3 3
23413 3 3 3 3 3 9 9 8 36 38 35 82 81 62 118 116 76
2342142 137 94 151 147 98 151 147 98 151 147 98 149 143 98 149 143 98
2343149 143 98 151 147 98 160 154 106 176 171 126 188 184 146 210 208 158
2344239 239 170 251 251 187 239 239 170 210 208 158 156 151 111 31 33 31
23450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23530 0 0
23540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 7 5
235566 65 55 125 122 87 158 153 112 181 176 137 194 189 146 197 193 154
2356197 193 154 184 179 149 177 172 135 168 163 120 156 151 111 151 147 98
2357151 147 98 151 147 98 151 147 98 161 156 96 149 143 98 118 116 76
235882 81 62 53 55 47 12 12 9 4 5 5 3 4 4 3 3 3
23593 3 3 3 3 3 2 2 2 2 2 2 1 1 1 1 2 2
23603 3 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
23611 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 2 2
23621 2 2 1 2 2 1 2 2 2 2 2 2 2 2 2 3 3
23632 3 3 2 3 3 2 3 3 2 3 3 2 2 2 2 2 2
23642 3 3 2 3 3 2 3 3 2 3 3 2 3 3 2 3 3
23652 3 3 2 3 3 2 3 3 2 3 3 2 3 3 3 3 3
23663 3 3 3 3 3 72 73 67 61 61 53 53 55 47 96 95 69
2367131 127 93 151 147 98 161 156 96 161 156 96 151 147 98 151 147 98
2368161 156 96 160 154 106 164 159 111 177 172 135 197 193 154 210 208 158
2369239 239 170 251 251 187 224 223 159 197 193 154 131 127 93 9 9 8
23700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23780 0 0
23790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
238024 26 24 82 81 62 131 127 93 164 159 111 178 174 128 188 184 146
2381188 184 146 188 184 146 181 176 137 176 171 126 168 163 120 164 159 111
2382160 154 106 160 154 106 160 154 106 160 154 106 151 147 98 125 122 87
238382 81 62 61 61 53 12 12 9 3 3 3 3 3 3 2 2 2
23842 2 2 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0
23850 0 0 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1
23861 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
23871 1 1 1 1 1 1 2 2 1 2 2 1 2 2 1 2 2
23881 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
23892 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
23902 3 3 2 3 3 2 3 3 2 3 3 2 3 3 2 3 3
23912 3 3 30 32 31 72 73 67 31 33 31 36 38 35 82 81 62
2392118 116 76 149 143 98 161 156 96 161 156 96 161 156 96 160 154 106
2393165 161 109 165 161 109 176 171 126 188 184 146 204 201 155 214 212 158
2394239 239 170 239 239 170 214 212 158 184 179 149 82 81 62 0 0 0
23950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24030 0 0
24040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24052 2 2 43 44 41 96 95 69 131 127 93 160 154 106 176 171 126
2406184 181 136 184 181 136 184 181 136 181 176 137 178 174 128 174 170 121
2407171 165 117 173 167 111 173 167 111 173 167 111 160 154 106 131 127 93
240896 95 69 66 65 55 16 17 12 2 2 2 1 1 1 1 1 1
24091 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
24100 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
24111 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
24121 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
24131 2 2 1 2 2 1 2 2 1 2 2 1 2 2 2 2 2
24142 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
24152 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
24162 2 2 2 2 2 2 2 2 10 9 6 30 31 28 71 71 57
2417118 116 76 149 143 98 165 161 109 165 161 109 165 161 109 173 167 111
2418173 167 111 176 171 126 184 181 136 197 193 154 210 208 158 224 223 159
2419251 251 187 239 239 170 210 208 158 168 163 120 40 41 39 0 0 0
24200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24280 0 0
24290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24300 0 0 13 12 7 61 61 53 96 95 69 131 127 93 160 154 106
2431176 171 126 184 181 136 184 181 136 188 184 146 184 181 136 184 181 136
2432184 181 136 186 182 128 186 182 128 178 174 128 174 170 121 149 145 103
2433118 116 76 82 81 62 21 22 20 1 1 1 1 1 1 0 0 0
24340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24350 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1
24361 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
24371 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
24381 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2
24391 2 2 1 2 2 1 2 2 1 2 2 1 2 2 2 2 2
24402 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
24412 2 2 2 2 2 2 2 2 3 3 3 30 31 28 66 65 55
2442118 116 76 149 143 98 165 161 109 173 167 111 173 167 111 174 170 121
2443186 182 128 190 186 136 197 193 154 210 208 158 224 223 159 251 251 187
2444251 251 187 239 239 170 197 193 154 137 133 100 12 12 9 0 0 0
24450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24530 0 0
24540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24550 0 0 0 0 0 30 31 28 71 71 57 103 101 77 134 131 96
2456164 159 111 176 171 126 184 181 136 188 184 146 194 189 146 197 193 154
2457197 193 154 197 193 154 194 191 148 194 189 146 190 186 136 176 171 126
2458145 141 105 103 101 77 40 41 39 0 0 0 0 0 0 0 0 0
24590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24611 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
24621 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
24631 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
24641 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 2 2
24651 2 2 1 2 2 1 2 2 1 2 2 1 2 2 1 2 2
24661 2 2 1 2 2 1 2 2 1 2 2 30 31 28 71 71 57
2467118 116 76 160 154 106 173 167 111 178 174 128 186 182 128 190 186 136
2468194 191 148 204 201 155 210 208 158 224 223 159 251 251 187 251 251 187
2469251 251 187 214 212 158 184 179 149 84 83 72 0 0 0 0 0 0
24700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24780 0 0
24790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24800 0 0 0 0 0 5 5 3 43 44 41 82 81 62 103 101 77
2481142 137 94 165 161 109 178 174 128 190 186 136 197 193 154 204 201 155
2482210 208 158 210 208 158 210 208 158 210 208 158 210 208 158 197 193 154
2483177 172 135 145 141 105 79 78 62 5 4 3 0 0 0 0 0 0
24840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24860 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
24871 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
24881 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
24891 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
24901 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
24911 1 1 1 1 1 1 2 2 1 2 2 30 31 28 82 81 62
2492142 137 94 165 161 109 178 174 128 190 186 136 194 191 148 204 201 155
2493210 208 158 214 212 158 239 239 170 251 251 187 251 251 187 251 251 187
2494251 251 187 210 208 158 168 163 120 36 38 35 0 0 0 0 0 0
24950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25030 0 0
25040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25050 0 0 0 0 0 0 0 0 16 17 12 53 55 47 82 81 62
2506118 116 76 151 147 98 171 165 117 184 181 136 194 191 148 210 208 158
2507214 212 158 224 223 159 239 239 170 239 239 170 224 223 159 214 212 158
2508197 193 154 176 171 126 115 113 82 24 26 24 0 0 0 0 0 0
25090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25110 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1
25121 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
25131 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
25141 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
25151 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
25161 1 1 1 1 1 1 1 1 1 1 1 40 41 39 103 101 77
2517151 147 98 176 171 126 190 186 136 197 193 154 210 208 158 214 212 158
2518239 239 170 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
2519239 239 170 197 193 154 110 109 94 3 4 3 0 0 0 0 0 0
25200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25280 0 0
25290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25300 0 0 0 0 0 0 0 0 0 0 0 30 31 28 66 65 55
253196 95 69 125 122 87 160 154 106 178 174 128 194 189 146 204 201 155
2532214 212 158 239 239 170 251 251 187 251 251 187 251 251 187 239 239 170
2533210 208 158 188 184 146 149 145 103 61 61 53 0 0 0 0 0 0
25340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25370 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
25381 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
25391 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
25401 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
25411 1 1 1 1 1 1 1 1 1 1 1 61 61 53 131 127 93
2542164 159 111 184 181 136 197 193 154 210 208 158 224 223 159 251 251 187
2543251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
2544210 208 158 168 163 120 43 44 41 0 0 0 0 0 0 0 0 0
25450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25530 0 0
25540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25550 0 0 0 0 0 0 0 0 0 0 0 4 3 2 36 38 35
255671 71 57 96 95 69 142 137 94 165 161 109 184 181 136 197 193 154
2557210 208 158 239 239 170 251 251 187 251 251 187 251 251 187 251 251 187
2558214 212 158 197 193 154 168 163 120 103 101 77 7 7 5 0 0 0
25590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
25631 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
25641 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
25651 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
25661 1 1 0 0 0 0 0 0 0 0 0 82 81 62 142 137 94
2567174 170 121 194 189 146 210 208 158 224 223 159 251 251 187 251 251 187
2568251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 224 223 159
2569184 179 149 99 98 80 3 3 3 0 0 0 0 0 0 0 0 0
25700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25780 0 0
25790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 7 5
258143 44 41 82 81 62 118 116 76 142 137 94 171 165 117 190 186 136
2582204 201 155 224 223 159 251 251 187 251 251 187 251 251 187 251 251 187
2583214 212 158 197 193 154 174 170 121 125 122 87 30 31 28 0 0 0
25840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
25891 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
25900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25910 0 0 0 0 0 0 0 0 3 4 3 82 81 62 149 143 98
2592176 171 126 194 191 148 210 208 158 239 239 170 251 251 187 251 251 187
2593251 251 187 251 251 187 251 251 187 251 251 187 239 239 170 204 201 155
2594145 141 105 30 31 28 0 0 0 0 0 0 0 0 0 0 0 0
25950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26030 0 0
26040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
260610 9 6 46 47 43 82 81 62 118 116 76 149 143 98 174 170 121
2607194 189 146 210 208 158 224 223 159 251 251 187 251 251 187 224 223 159
2608210 208 158 194 191 148 174 170 121 134 131 96 53 55 47 0 0 0
26090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26160 0 0 0 0 0 0 0 0 7 7 5 96 95 69 149 143 98
2617176 171 126 194 191 148 210 208 158 239 239 170 251 251 187 251 251 187
2618251 251 187 251 251 187 251 251 187 239 239 170 210 208 158 177 172 135
261975 75 61 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26280 0 0
26290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26310 0 0 10 9 6 46 47 43 82 81 62 118 116 76 149 143 98
2632176 171 126 194 191 148 210 208 158 214 212 158 214 212 158 210 208 158
2633197 193 154 184 181 136 164 159 111 131 127 93 53 55 47 0 0 0
26340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26410 0 0 0 0 0 0 0 0 7 7 5 96 95 69 149 143 98
2642174 170 121 194 189 146 204 201 155 214 212 158 239 239 170 251 251 187
2643251 251 187 251 251 187 239 239 170 210 208 158 184 179 149 110 109 94
264412 12 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26530 0 0
26540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26560 0 0 0 0 0 10 9 6 43 44 41 82 81 62 115 113 82
2657144 139 99 168 163 120 188 184 146 197 193 154 197 193 154 194 189 146
2658184 181 136 174 170 121 151 147 98 118 116 76 36 38 35 0 0 0
26590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26660 0 0 0 0 0 0 0 0 4 3 2 82 81 62 142 137 94
2667171 165 117 186 182 128 194 191 148 210 208 158 214 212 158 224 223 159
2668239 239 170 224 223 159 210 208 158 184 179 149 137 133 100 36 38 35
26690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26780 0 0
26790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26810 0 0 0 0 0 0 0 0 7 7 5 36 38 35 71 71 57
2682103 101 77 131 127 93 155 149 109 168 163 120 168 163 120 168 163 120
2683164 159 111 149 143 98 125 122 87 82 81 62 13 12 7 0 0 0
26840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26910 0 0 0 0 0 0 0 0 0 0 0 61 61 53 125 122 87
2692160 154 106 174 170 121 184 181 136 194 189 146 204 201 155 210 208 158
2693210 208 158 204 201 155 184 179 149 145 141 105 61 61 53 0 0 0
26940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27030 0 0
27040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27060 0 0 0 0 0 0 0 0 0 0 0 3 3 2 30 31 28
270761 61 53 82 81 62 103 101 77 121 119 87 125 122 87 125 122 87
2708118 116 76 103 101 77 79 78 62 24 26 24 0 0 0 0 0 0
27090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27160 0 0 0 0 0 0 0 0 0 0 0 25 27 25 96 95 69
2717142 137 94 160 154 106 171 165 117 178 174 128 184 181 136 184 181 136
2718181 176 137 177 172 135 145 141 105 75 75 61 5 5 3 0 0 0
27190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27280 0 0
27290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
273216 17 12 40 41 39 61 61 53 71 71 57 71 71 57 71 71 57
273366 65 55 43 44 41 12 12 9 0 0 0 0 0 0 0 0 0
27340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27410 0 0 0 0 0 0 0 0 0 0 0 1 1 1 46 47 43
274296 95 69 125 122 87 142 137 94 149 145 103 155 149 109 155 149 109
2743145 141 105 121 119 87 66 65 55 7 7 5 0 0 0 0 0 0
27440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27530 0 0
27540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27570 0 0 1 1 1 16 17 12 24 26 24 25 27 25 19 20 18
27587 7 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 1
276725 27 25 61 61 53 82 81 62 96 95 69 96 95 69 82 81 62
276861 61 53 25 27 25 2 2 1 0 0 0 0 0 0 0 0 0
27690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27780 0 0
27790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27920 0 0 0 0 0 5 6 5 13 12 7 10 9 6 3 4 3
27930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28030 0 0
28040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28280 0 0
diff --git a/drivers/video/logo/logo_linux_vga16.ppm b/drivers/video/logo/logo_linux_vga16.ppm
index 1850c15e6feb..12ac3a5454c0 100644
--- a/drivers/video/logo/logo_linux_vga16.ppm
+++ b/drivers/video/logo/logo_linux_vga16.ppm
@@ -1,1604 +1,2739 @@
1P3 1P3
2# Standard 16-color Linux logo 2142 114
380 80
4255 3255
5 0 0 0 0 0 0 0 0 0 0 0 0 40 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
6 0 0 0 0 0 0 0 0 0 0 0 0 50 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
7 0 0 0 0 0 0 0 0 0 0 0 0 60 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
8 0 0 0 0 0 0 0 0 0 0 0 0 70 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
9 0 0 0 0 0 0 0 0 0 0 0 0 80 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
10 0 0 0 0 0 0 0 0 0 0 0 0 90 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
11 0 0 0 0 0 0 0 0 0 0 0 0 100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
12 0 0 0 0 0 0 0 0 0 0 0 0 110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
13 0 0 0 0 0 0 0 0 0 0 0 0 120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
14 0 0 0 0 0 0 0 0 0 0 0 0 130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15 0 0 0 0 0 0 0 0 0 0 0 0 140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 0 0 0 0 0 0 0 0 0 0 0 0 150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17 0 0 0 0 0 0 0 0 0 0 0 0 160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18 0 0 0 0 0 0 0 0 0 0 0 0 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19 0 0 0 0 0 0 0 0 0 0 0 0 180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20 0 0 0 0 0 0 0 0 0 0 0 0 190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21 0 0 0 0 0 0 0 0 0 0 0 0 200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22 0 0 0 0 0 0 0 0 0 0 0 0 210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23 0 0 0 0 0 0 0 0 0 0 0 0 220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24 0 0 0 0 0 0 0 0 0 0 0 0 230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25 0 0 0 0 0 0 0 0 0 0 0 0 240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26 0 0 0 0 0 0 0 0 0 0 0 0 250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27 0 0 0 0 0 0 0 0 0 0 0 0 260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
28 0 0 0 0 0 0 0 0 0 0 0 0 270 0 0 0 0 0 0 0 0 0 0 0
29 0 0 0 0 0 0 0 0 0 0 0 0 280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
30 0 0 0 0 0 0 0 0 0 0 0 0 290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
31 0 0 0 0 0 0 0 0 0 0 0 0 300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
32 0 0 0 0 0 0 0 0 0 0 0 0 310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
33 0 0 0 0 0 0 0 0 0 0 0 0 320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
34 0 0 0 0 0 0 0 0 0 0 0 0 330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
35 0 0 0 0 0 0 0 0 0 0 0 0 340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
36 0 0 0 0 0 0 0 0 0 0 0 0 350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
37 0 0 0 0 0 0 0 0 0 0 0 0 360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
38 0 0 0 0 0 0 0 0 0 0 0 0 370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
39 0 0 0 0 0 0 0 0 0 0 0 0 380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
40 0 0 0 0 0 0 0 0 0 0 0 0 390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
41 0 0 0 0 0 0 0 0 0 0 0 0 400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
42 0 0 0 0 0 0 0 0 0 0 0 0 410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
43 0 0 0 0 0 0 0 0 0 0 0 0 420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
44 0 0 0 0 0 0 0 0 0 0 0 0 430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
45 0 0 0 0 0 0 0 0 0 0 0 0 440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
46 0 0 0 0 0 0 0 0 0 0 0 0 450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
47 0 0 0 0 0 0 0 0 0 0 0 0 460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
48 0 0 0 0 0 0 0 0 0 0 0 0 470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
49 0 0 0 0 0 0 0 0 0 0 0 0 480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
50 0 0 0 0 0 0 0 0 0 0 0 0 490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
51 0 0 0 0 0 0 0 0 0 0 0 0 500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
52 0 0 0 0 0 0 0 0 0 0 0 0 510 0 0 0 0 0 0 0 0 0 0 0
53 0 0 0 0 0 0 0 0 0 0 0 0 520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
54 85 85 85 85 85 85 85 85 85 85 85 85 530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
55 85 85 85 85 85 85 85 85 85 0 0 0 540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
56 0 0 0 0 0 0 0 0 0 0 0 0 550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
57 0 0 0 0 0 0 0 0 0 0 0 0 560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
58 0 0 0 0 0 0 0 0 0 0 0 0 570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
59 0 0 0 0 0 0 0 0 0 0 0 0 580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
60 0 0 0 0 0 0 0 0 0 0 0 0 590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
61 0 0 0 0 0 0 0 0 0 0 0 0 600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
62 0 0 0 0 0 0 0 0 0 0 0 0 610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
63 0 0 0 0 0 0 0 0 0 0 0 0 620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
64 0 0 0 0 0 0 0 0 0 0 0 0 630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
65 0 0 0 0 0 0 0 0 0 0 0 0 640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
66 0 0 0 0 0 0 0 0 0 0 0 0 650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
67 0 0 0 0 0 0 0 0 0 0 0 0 660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
68 0 0 0 0 0 0 0 0 0 0 0 0 670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
69 0 0 0 0 0 0 0 0 0 0 0 0 680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
70 0 0 0 0 0 0 0 0 0 0 0 0 690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
71 0 0 0 0 0 0 0 0 0 0 0 0 700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
72 0 0 0 0 0 0 0 0 0 0 0 0 710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
73 0 0 0 0 0 0 85 85 85 85 85 85 720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
74 85 85 85 0 0 0 0 0 0 0 0 0 730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
75 0 0 0 0 0 0 0 0 0 85 85 85 740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
76 85 85 85 85 85 85 0 0 0 0 0 0 750 0 0 0 0 0 0 0 0 0 0 0
77 0 0 0 0 0 0 0 0 0 0 0 0 760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
78 0 0 0 0 0 0 0 0 0 0 0 0 770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
79 0 0 0 0 0 0 0 0 0 0 0 0 780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
80 0 0 0 0 0 0 0 0 0 0 0 0 790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
81 0 0 0 0 0 0 0 0 0 0 0 0 800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
82 0 0 0 0 0 0 0 0 0 0 0 0 810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
83 0 0 0 0 0 0 0 0 0 0 0 0 820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
84 0 0 0 0 0 0 0 0 0 0 0 0 830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
85 0 0 0 0 0 0 0 0 0 0 0 0 840 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
86 0 0 0 0 0 0 0 0 0 0 0 0 8585 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
87 0 0 0 0 0 0 0 0 0 0 0 0 860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
88 0 0 0 0 0 0 0 0 0 0 0 0 870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
89 0 0 0 0 0 0 0 0 0 0 0 0 880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
90 0 0 0 0 0 0 0 0 0 0 0 0 890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
91 0 0 0 0 0 0 0 0 0 0 0 0 900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
92 0 0 0 0 0 0 0 0 0 0 0 0 910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
93 0 0 0 85 85 85 0 0 0 0 0 0 920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
94 0 0 0 0 0 0 0 0 0 0 0 0 930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
95 0 0 0 0 0 0 0 0 0 0 0 0 940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
96 0 0 0 0 0 0 85 85 85 85 85 85 950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
97 0 0 0 0 0 0 0 0 0 0 0 0 960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
98 0 0 0 0 0 0 0 0 0 0 0 0 970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
99 0 0 0 0 0 0 0 0 0 0 0 0 980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
100 0 0 0 0 0 0 0 0 0 0 0 0 990 0 0 0 0 0 0 0 0 0 0 0
101 0 0 0 0 0 0 0 0 0 0 0 0 1000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
102 0 0 0 0 0 0 0 0 0 0 0 0 1010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
103 0 0 0 0 0 0 0 0 0 0 0 0 1020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
104 0 0 0 0 0 0 0 0 0 0 0 0 1030 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
105 0 0 0 0 0 0 0 0 0 0 0 0 1040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
106 0 0 0 0 0 0 0 0 0 0 0 0 1050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
107 0 0 0 0 0 0 0 0 0 0 0 0 1060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
108 0 0 0 0 0 0 0 0 0 0 0 0 1070 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
109 0 0 0 0 0 0 0 0 0 0 0 0 10885 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
110 0 0 0 0 0 0 0 0 0 0 0 0 1090 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
111 0 0 0 0 0 0 0 0 0 0 0 0 1100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
112 0 0 0 0 0 0 0 0 0 0 0 0 1110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
113 85 85 85 0 0 0 0 0 0 0 0 0 1120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
114 0 0 0 0 0 0 0 0 0 0 0 0 1130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
115 0 0 0 0 0 0 0 0 0 0 0 0 1140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
116 0 0 0 0 0 0 0 0 0 85 85 85 1150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
117 85 85 85 0 0 0 0 0 0 0 0 0 1160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
118 0 0 0 0 0 0 0 0 0 0 0 0 1170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
119 0 0 0 0 0 0 0 0 0 0 0 0 1180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
120 0 0 0 0 0 0 0 0 0 0 0 0 1190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
121 0 0 0 0 0 0 0 0 0 0 0 0 1200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
122 0 0 0 0 0 0 0 0 0 0 0 0 1210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
123 0 0 0 0 0 0 0 0 0 0 0 0 1220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
124 0 0 0 0 0 0 0 0 0 0 0 0 1230 0 0 0 0 0 0 0 0 0 0 0
125 0 0 0 0 0 0 0 0 0 0 0 0 1240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
126 0 0 0 0 0 0 0 0 0 0 0 0 1250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
127 0 0 0 0 0 0 0 0 0 0 0 0 1260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
128 0 0 0 0 0 0 0 0 0 0 0 0 1270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
129 0 0 0 0 0 0 0 0 0 0 0 0 1280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
130 0 0 0 0 0 0 0 0 0 0 0 0 1290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
131 0 0 0 0 0 0 0 0 0 0 0 0 1300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
132 0 0 0 0 0 0 0 0 0 85 85 85 13185 85 85 85 85 85 85 85 85 0 0 0 85 85 85 85 85 85
133 0 0 0 0 0 0 0 0 0 0 0 0 1320 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
134 0 0 0 0 0 0 0 0 0 0 0 0 13385 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
135 0 0 0 0 0 0 0 0 0 0 0 0 1340 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
136 0 0 0 0 0 0 0 0 0 0 0 0 1350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
137 85 85 85 85 85 85 0 0 0 0 0 0 1360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
138 0 0 0 0 0 0 0 0 0 0 0 0 1370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
139 0 0 0 0 0 0 0 0 0 0 0 0 1380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
140 0 0 0 0 0 0 0 0 0 0 0 0 1390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
141 0 0 0 0 0 0 0 0 0 0 0 0 1400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
142 0 0 0 0 0 0 0 0 0 0 0 0 1410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
143 0 0 0 0 0 0 0 0 0 0 0 0 1420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
144 0 0 0 0 0 0 0 0 0 0 0 0 1430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
145 0 0 0 0 0 0 0 0 0 0 0 0 1440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
146 0 0 0 0 0 0 0 0 0 0 0 0 1450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
147 0 0 0 0 0 0 0 0 0 0 0 0 1460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
148 0 0 0 0 0 0 0 0 0 0 0 0 1470 0 0 0 0 0 0 0 0 0 0 0
149 0 0 0 0 0 0 0 0 0 0 0 0 1480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
150 0 0 0 0 0 0 0 0 0 0 0 0 1490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
151 0 0 0 0 0 0 0 0 0 0 0 0 1500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
152 0 0 0 0 0 0 0 0 0 85 85 85 1510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
153 0 0 0 0 0 0 0 0 0 0 0 0 1520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
154 0 0 0 0 0 0 0 0 0 0 0 0 1530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
155 0 0 0 0 0 0 0 0 0 0 0 0 1540 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
156 85 85 85 170 170 170 0 0 0 0 0 0 15585 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
157 0 0 0 85 85 85 0 0 0 0 0 0 15685 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
158 0 0 0 0 0 0 0 0 0 0 0 0 1570 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
159 0 0 0 0 0 0 0 0 0 0 0 0 1580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
160 0 0 0 0 0 0 0 0 0 0 0 0 1590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
161 0 0 0 0 0 0 0 0 0 0 0 0 1600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
162 0 0 0 0 0 0 0 0 0 0 0 0 1610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
163 0 0 0 0 0 0 0 0 0 0 0 0 1620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
164 0 0 0 0 0 0 0 0 0 0 0 0 1630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
165 0 0 0 0 0 0 0 0 0 0 0 0 1640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
166 0 0 0 0 0 0 0 0 0 0 0 0 1650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
167 0 0 0 0 0 0 0 0 0 0 0 0 1660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
168 0 0 0 0 0 0 0 0 0 0 0 0 1670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
169 0 0 0 0 0 0 0 0 0 0 0 0 1680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
170 0 0 0 0 0 0 0 0 0 0 0 0 1690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
171 0 0 0 0 0 0 0 0 0 0 0 0 1700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
172 0 0 0 0 0 0 85 85 85 0 0 0 1710 0 0 0 0 0 0 0 0 0 0 0
173 0 0 0 0 0 0 0 0 0 0 0 0 1720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
174 0 0 0 0 0 0 0 0 0 0 0 0 1730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
175 0 0 0 0 0 0 0 0 0 0 0 0 1740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
176170 170 170 170 170 170 85 85 85 0 0 0 1750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
177 0 0 0 0 0 0 85 85 85 0 0 0 1760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
178 0 0 0 0 0 0 0 0 0 0 0 0 1770 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
179 0 0 0 0 0 0 0 0 0 0 0 0 17885 85 85 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
180 0 0 0 0 0 0 0 0 0 0 0 0 1790 0 0 85 85 85 85 85 85 0 0 0 85 85 85 85 85 85
181 0 0 0 0 0 0 0 0 0 0 0 0 1800 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
182 0 0 0 0 0 0 0 0 0 0 0 0 1810 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
183 0 0 0 0 0 0 0 0 0 0 0 0 18285 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
184 0 0 0 0 0 0 0 0 0 0 0 0 1830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
185 0 0 0 0 0 0 0 0 0 0 0 0 1840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
186 0 0 0 0 0 0 0 0 0 0 0 0 1850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
187 0 0 0 0 0 0 0 0 0 0 0 0 1860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
188 0 0 0 0 0 0 0 0 0 0 0 0 1870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
189 0 0 0 0 0 0 0 0 0 0 0 0 1880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
190 0 0 0 0 0 0 0 0 0 0 0 0 1890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
191 0 0 0 0 0 0 0 0 0 0 0 0 1900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
192 0 0 0 0 0 0 85 85 85 0 0 0 1910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
193 0 0 0 0 0 0 0 0 0 0 0 0 1920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
194 0 0 0 0 0 0 0 0 0 0 0 0 1930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
195 0 0 0 0 0 0 0 0 0 0 0 0 1940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
196 0 0 0 85 85 85 0 0 0 0 0 0 1950 0 0 0 0 0 0 0 0 0 0 0
197 0 0 0 0 0 0 0 0 0 85 85 85 1960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
198 0 0 0 0 0 0 0 0 0 0 0 0 1970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
199 0 0 0 0 0 0 0 0 0 0 0 0 1980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
200 0 0 0 0 0 0 0 0 0 0 0 0 1990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
201 0 0 0 0 0 0 0 0 0 0 0 0 2000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
202 0 0 0 0 0 0 0 0 0 0 0 0 2010 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
203 0 0 0 0 0 0 0 0 0 0 0 0 20285 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
204 0 0 0 0 0 0 0 0 0 0 0 0 20385 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
205 0 0 0 0 0 0 0 0 0 0 0 0 2040 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
206 0 0 0 0 0 0 0 0 0 0 0 0 2050 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
207 0 0 0 0 0 0 0 0 0 0 0 0 2060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
208 0 0 0 0 0 0 0 0 0 0 0 0 2070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
209 0 0 0 0 0 0 0 0 0 0 0 0 2080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
210 0 0 0 0 0 0 0 0 0 0 0 0 2090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
211 0 0 0 0 0 0 0 0 0 0 0 0 2100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
212 0 0 0 0 0 0 85 85 85 0 0 0 2110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
213 0 0 0 0 0 0 0 0 0 0 0 0 2120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
214 0 0 0 0 0 0 0 0 0 0 0 0 2130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
215 0 0 0 0 0 0 0 0 0 0 0 0 2140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
216 0 0 0 0 0 0 0 0 0 0 0 0 2150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
217 0 0 0 0 0 0 0 0 0 85 85 85 2160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
218 0 0 0 0 0 0 0 0 0 0 0 0 2170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
219 0 0 0 0 0 0 0 0 0 0 0 0 2180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
220 0 0 0 0 0 0 0 0 0 0 0 0 2190 0 0 0 0 0 0 0 0 0 0 0
221 0 0 0 0 0 0 0 0 0 0 0 0 2200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
222 0 0 0 0 0 0 0 0 0 0 0 0 2210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
223 0 0 0 0 0 0 0 0 0 0 0 0 2220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
224 0 0 0 0 0 0 0 0 0 0 0 0 2230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
225 0 0 0 0 0 0 0 0 0 0 0 0 2240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
226 0 0 0 0 0 0 0 0 0 0 0 0 2250 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
227 0 0 0 0 0 0 0 0 0 0 0 0 22685 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
228 0 0 0 0 0 0 0 0 0 0 0 0 2270 0 0 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
229 0 0 0 0 0 0 0 0 0 0 0 0 22885 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
230 0 0 0 0 0 0 0 0 0 0 0 0 2290 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
231 0 0 0 0 0 0 0 0 0 0 0 0 23085 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
232 0 0 0 85 85 85 0 0 0 0 0 0 23185 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
233 0 0 0 0 0 0 0 0 0 0 0 0 2320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
234 0 0 0 0 0 0 0 0 0 0 0 0 2330 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
235 0 0 0 0 0 0 0 0 0 0 0 0 2340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
236 0 0 0 0 0 0 0 0 0 0 0 0 2350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
237 0 0 0 0 0 0 0 0 0 85 85 85 2360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
238 0 0 0 0 0 0 0 0 0 0 0 0 2370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
239 0 0 0 0 0 0 0 0 0 0 0 0 2380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
240 0 0 0 0 0 0 0 0 0 0 0 0 2390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
241 0 0 0 0 0 0 0 0 0 0 0 0 2400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
242 0 0 0 0 0 0 0 0 0 0 0 0 2410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
243 0 0 0 0 0 0 0 0 0 0 0 0 2420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
244 0 0 0 0 0 0 0 0 0 0 0 0 2430 0 0 0 0 0 0 0 0 0 0 0
245 0 0 0 0 0 0 0 0 0 0 0 0 2440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
246 0 0 0 0 0 0 0 0 0 0 0 0 2450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
247 0 0 0 0 0 0 0 0 0 0 0 0 2460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
248 0 0 0 0 0 0 0 0 0 0 0 0 2470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
249 0 0 0 0 0 0 0 0 0 0 0 0 2480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
250 0 0 0 0 0 0 0 0 0 0 0 0 2490 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
251 0 0 0 0 0 0 0 0 0 0 0 0 25085 85 85 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
252 0 0 0 85 85 85 0 0 0 0 0 0 2510 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
253 0 0 0 0 0 0 0 0 0 0 0 0 2520 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
254 0 0 0 0 0 0 0 0 0 0 0 0 2530 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
255 0 0 0 0 0 0 0 0 0 0 0 0 2540 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
256 0 0 0 0 0 0 0 0 0 0 0 0 2550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
257 0 0 0 0 0 0 0 0 0 0 0 0 2560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
258 85 85 85 0 0 0 0 0 0 0 0 0 2570 0 0 85 85 85 170 170 170 170 85 0 170 170 170 85 85 85
259 0 0 0 0 0 0 0 0 0 0 0 0 2580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
260 0 0 0 0 0 0 0 0 0 0 0 0 2590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
261 0 0 0 0 0 0 0 0 0 0 0 0 2600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
262 0 0 0 0 0 0 0 0 0 0 0 0 2610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
263 0 0 0 0 0 0 0 0 0 0 0 0 2620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
264 0 0 0 0 0 0 0 0 0 0 0 0 2630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
265 0 0 0 0 0 0 0 0 0 0 0 0 2640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
266 0 0 0 0 0 0 0 0 0 0 0 0 2650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
267 0 0 0 0 0 0 0 0 0 0 0 0 2660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
268 0 0 0 0 0 0 0 0 0 0 0 0 2670 0 0 0 0 0 0 0 0 0 0 0
269 0 0 0 0 0 0 0 0 0 0 0 0 2680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
270 0 0 0 0 0 0 0 0 0 0 0 0 2690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
271 0 0 0 0 0 0 0 0 0 0 0 0 2700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
272 0 0 0 85 85 85 0 0 0 0 0 0 2710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
273 0 0 0 0 0 0 0 0 0 0 0 0 2720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
274 0 0 0 0 0 0 0 0 0 0 0 0 2730 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
275 0 0 0 0 0 0 0 0 0 0 0 0 27485 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
276 0 0 0 0 0 0 0 0 0 0 0 0 2750 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
277 0 0 0 0 0 0 0 0 0 0 0 0 27685 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
278 85 85 85 0 0 0 0 0 0 0 0 0 27785 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
279 0 0 0 0 0 0 0 0 0 0 0 0 27885 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
280 0 0 0 0 0 0 0 0 0 0 0 0 2790 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
281 0 0 0 0 0 0 0 0 0 0 0 0 2800 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
282 0 0 0 0 0 0 0 0 0 0 0 0 281170 170 170 255 255 85 170 170 170 170 170 170 170 170 170 85 85 85
283 0 0 0 0 0 0 0 0 0 0 0 0 2820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
284 0 0 0 0 0 0 0 0 0 0 0 0 2830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
285 0 0 0 0 0 0 0 0 0 0 0 0 2840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
286 0 0 0 0 0 0 0 0 0 0 0 0 2850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
287 0 0 0 0 0 0 0 0 0 0 0 0 2860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
288 0 0 0 0 0 0 0 0 0 0 0 0 2870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
289 0 0 0 0 0 0 0 0 0 0 0 0 2880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
290 0 0 0 0 0 0 0 0 0 0 0 0 2890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
291 0 0 0 0 0 0 0 0 0 0 0 0 2900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
292 0 0 0 85 85 85 0 0 0 0 0 0 2910 0 0 0 0 0 0 0 0 0 0 0
293 0 0 0 85 85 85 170 170 170 0 0 0 2920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
294 0 0 0 0 0 0 0 0 0 0 0 0 2930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
295 0 0 0 0 0 0 170 170 170 170 170 170 2940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
296170 170 170 0 0 0 0 0 0 0 0 0 2950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
297 0 0 0 0 0 0 0 0 0 0 0 0 2960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
298 85 85 85 0 0 0 0 0 0 0 0 0 2970 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
299 0 0 0 0 0 0 0 0 0 0 0 0 29885 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
300 0 0 0 0 0 0 0 0 0 0 0 0 29985 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
301 0 0 0 0 0 0 0 0 0 0 0 0 3000 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
302 0 0 0 0 0 0 0 0 0 0 0 0 3010 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
303 0 0 0 0 0 0 0 0 0 0 0 0 3020 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
304 0 0 0 0 0 0 0 0 0 0 0 0 3030 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
305 0 0 0 0 0 0 0 0 0 0 0 0 3040 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
306 0 0 0 0 0 0 0 0 0 0 0 0 305255 255 85 170 170 170 170 170 170 170 85 0 85 255 85 170 85 0
307 0 0 0 0 0 0 0 0 0 0 0 0 3060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
308 0 0 0 0 0 0 0 0 0 0 0 0 3070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
309 0 0 0 0 0 0 0 0 0 0 0 0 3080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
310 0 0 0 0 0 0 0 0 0 0 0 0 3090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
311 0 0 0 0 0 0 0 0 0 0 0 0 3100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
312 0 0 0 85 85 85 0 0 0 0 0 0 3110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
313 85 85 85 170 170 170 170 170 170 170 170 170 3120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
314 0 0 0 0 0 0 0 0 0 0 0 0 3130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
315 0 0 0 170 170 170 255 255 255 255 255 255 3140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
316255 255 255 170 170 170 0 0 0 0 0 0 3150 0 0 0 0 0 0 0 0 0 0 0
317 0 0 0 0 0 0 0 0 0 0 0 0 3160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
318 85 85 85 0 0 0 0 0 0 0 0 0 3170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
319 0 0 0 0 0 0 0 0 0 0 0 0 3180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
320 0 0 0 0 0 0 0 0 0 0 0 0 3190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
321 0 0 0 0 0 0 0 0 0 0 0 0 3200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
322 0 0 0 0 0 0 0 0 0 0 0 0 3210 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
323 0 0 0 0 0 0 0 0 0 0 0 0 32285 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
324 0 0 0 0 0 0 0 0 0 0 0 0 3230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
325 0 0 0 0 0 0 0 0 0 0 0 0 3240 0 0 85 85 85 0 0 0 0 0 0 85 85 85 85 85 85
326 0 0 0 0 0 0 0 0 0 0 0 0 3250 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
327 0 0 0 0 0 0 0 0 0 0 0 0 3260 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
328 0 0 0 0 0 0 0 0 0 0 0 0 3270 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
329 0 0 0 0 0 0 0 0 0 0 0 0 32885 85 85 0 0 0 0 0 0 85 85 85 170 170 170 170 85 0
330 0 0 0 0 0 0 0 0 0 0 0 0 329170 170 170 170 170 170 255 255 85 170 170 170 170 170 170 85 85 85
331 0 0 0 0 0 0 0 0 0 0 0 0 3300 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
332 0 0 0 85 85 85 0 0 0 85 85 85 3310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
333170 170 170 170 170 170 255 255 255 255 255 255 3320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
334 0 0 0 0 0 0 0 0 0 0 0 0 3330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
335170 170 170 255 255 255 170 170 170 170 170 170 3340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
336255 255 255 170 170 170 0 0 0 0 0 0 3350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
337 0 0 0 0 0 0 0 0 0 0 0 0 3360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
338 85 85 85 0 0 0 0 0 0 0 0 0 3370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
339 0 0 0 0 0 0 0 0 0 0 0 0 3380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
340 0 0 0 0 0 0 0 0 0 0 0 0 3390 0 0 0 0 0 0 0 0 0 0 0
341 0 0 0 0 0 0 0 0 0 0 0 0 3400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
342 0 0 0 0 0 0 0 0 0 0 0 0 3410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
343 0 0 0 0 0 0 0 0 0 0 0 0 3420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
344 0 0 0 0 0 0 0 0 0 0 0 0 3430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
345 0 0 0 0 0 0 0 0 0 0 0 0 3440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
346 0 0 0 0 0 0 0 0 0 0 0 0 3450 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
347 0 0 0 0 0 0 0 0 0 0 0 0 3460 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
348 0 0 0 0 0 0 0 0 0 0 0 0 34785 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
349 0 0 0 0 0 0 0 0 0 0 0 0 3480 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
350 0 0 0 0 0 0 0 0 0 0 0 0 34985 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
351 0 0 0 0 0 0 0 0 0 0 0 0 35085 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
352 0 0 0 85 85 85 0 0 0 85 85 85 3510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
353170 170 170 0 0 0 0 0 0 255 255 255 3520 0 0 0 0 0 85 85 85 85 85 85 170 85 0 170 170 170
354 85 85 85 0 0 0 0 0 0 0 0 0 353170 170 170 170 85 0 170 170 170 170 170 170 170 85 0 85 85 85
355255 255 255 170 170 170 0 0 0 85 85 85 3540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
356170 170 170 255 255 255 170 170 170 0 0 0 3550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
357 0 0 0 0 0 0 0 0 0 0 0 0 3560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
358 85 85 85 0 0 0 0 0 0 0 0 0 3570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
359 0 0 0 0 0 0 0 0 0 0 0 0 3580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
360 0 0 0 0 0 0 0 0 0 0 0 0 3590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
361 0 0 0 0 0 0 0 0 0 0 0 0 3600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
362 0 0 0 0 0 0 0 0 0 0 0 0 3610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
363 0 0 0 0 0 0 0 0 0 0 0 0 3620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
364 0 0 0 0 0 0 0 0 0 0 0 0 3630 0 0 0 0 0 0 0 0 0 0 0
365 0 0 0 0 0 0 0 0 0 0 0 0 3640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
366 0 0 0 0 0 0 0 0 0 0 0 0 3650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
367 0 0 0 0 0 0 0 0 0 0 0 0 3660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
368 0 0 0 0 0 0 0 0 0 0 0 0 3670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
369 0 0 0 0 0 0 0 0 0 0 0 0 3680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
370 0 0 0 0 0 0 0 0 0 0 0 0 3690 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
371 0 0 0 0 0 0 0 0 0 0 0 0 37085 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
372 0 0 0 85 85 85 0 0 0 85 85 85 3710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
373 85 85 85 0 0 0 0 0 0 170 170 170 37285 85 85 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
374 85 85 85 0 0 0 0 0 0 0 0 0 37385 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
375255 255 255 85 85 85 0 0 0 0 0 0 37485 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
376 85 85 85 255 255 255 170 170 170 0 0 0 37585 85 85 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
377 0 0 0 0 0 0 0 0 0 0 0 0 3760 0 0 0 0 0 85 85 85 85 85 85 85 85 85 85 255 85
378 85 85 85 0 0 0 0 0 0 0 0 0 377255 85 85 85 255 85 170 170 170 170 85 0 170 170 170 85 85 85
379 0 0 0 0 0 0 0 0 0 0 0 0 3780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
380 0 0 0 0 0 0 0 0 0 0 0 0 3790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
381 0 0 0 0 0 0 0 0 0 0 0 0 3800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
382 0 0 0 0 0 0 0 0 0 0 0 0 3810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
383 0 0 0 0 0 0 0 0 0 0 0 0 3820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
384 0 0 0 0 0 0 0 0 0 0 0 0 3830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
385 0 0 0 0 0 0 0 0 0 0 0 0 3840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
386 0 0 0 0 0 0 0 0 0 0 0 0 3850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
387 0 0 0 0 0 0 0 0 0 0 0 0 3860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
388 0 0 0 0 0 0 0 0 0 0 0 0 3870 0 0 0 0 0 0 0 0 0 0 0
389 0 0 0 0 0 0 0 0 0 0 0 0 3880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
390 0 0 0 0 0 0 0 0 0 0 0 0 3890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
391 0 0 0 0 0 0 0 0 0 0 0 0 3900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
392 0 0 0 85 85 85 0 0 0 85 85 85 3910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
393170 170 170 0 0 0 0 0 0 170 170 170 3920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
394 85 85 85 85 85 85 85 85 85 85 85 85 3930 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
395255 255 255 85 85 85 0 0 0 0 0 0 3940 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
396 85 85 85 255 255 255 170 170 170 0 0 0 3950 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
397 0 0 0 0 0 0 0 0 0 0 0 0 3960 0 0 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
398 85 85 85 0 0 0 0 0 0 0 0 0 39785 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
399 0 0 0 0 0 0 0 0 0 0 0 0 39885 85 85 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
400 0 0 0 0 0 0 0 0 0 0 0 0 3990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
401 0 0 0 0 0 0 0 0 0 0 0 0 4000 0 0 0 0 0 85 85 85 170 85 0 85 85 85 85 85 85
402 0 0 0 0 0 0 0 0 0 0 0 0 401170 170 170 170 85 0 170 170 170 85 85 85 170 85 0 85 85 85
403 0 0 0 0 0 0 0 0 0 0 0 0 4020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
404 0 0 0 0 0 0 0 0 0 0 0 0 4030 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
405 0 0 0 0 0 0 0 0 0 0 0 0 4040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
406 0 0 0 0 0 0 0 0 0 0 0 0 4050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
407 0 0 0 0 0 0 0 0 0 0 0 0 4060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
408 0 0 0 0 0 0 0 0 0 0 0 0 4070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
409 0 0 0 0 0 0 0 0 0 0 0 0 4080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
410 0 0 0 0 0 0 0 0 0 0 0 0 4090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
411 0 0 0 0 0 0 0 0 0 0 0 0 4100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
412 0 0 0 85 85 85 0 0 0 0 0 0 4110 0 0 0 0 0 0 0 0 0 0 0
413255 255 255 0 0 0 0 0 0 170 85 0 4120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
414255 255 85 170 85 0 255 255 85 170 85 0 4130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
415255 255 85 170 85 0 0 0 0 0 0 0 4140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
416 85 85 85 255 255 255 0 0 0 0 0 0 4150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
417 0 0 0 0 0 0 0 0 0 0 0 0 4160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
418 85 85 85 0 0 0 0 0 0 0 0 0 4170 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
419 0 0 0 0 0 0 0 0 0 0 0 0 41885 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
420 0 0 0 0 0 0 0 0 0 0 0 0 4190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
421 0 0 0 0 0 0 0 0 0 0 0 0 4200 0 0 85 85 85 0 0 0 85 85 85 85 85 85 0 0 0
422 0 0 0 0 0 0 0 0 0 0 0 0 4210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
423 0 0 0 0 0 0 0 0 0 0 0 0 4220 0 0 0 0 0 85 85 85 85 85 85 0 0 0 85 85 85
424 0 0 0 0 0 0 0 0 0 0 0 0 4230 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
425 0 0 0 0 0 0 0 0 0 0 0 0 42485 85 85 0 0 0 0 0 0 85 85 85 85 85 85 170 85 0
426 0 0 0 0 0 0 0 0 0 0 0 0 42585 85 85 85 85 85 170 85 0 85 255 85 85 85 85 85 85 85
427 0 0 0 0 0 0 0 0 0 0 0 0 4260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
428 0 0 0 0 0 0 0 0 0 0 0 0 4270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
429 0 0 0 0 0 0 0 0 0 0 0 0 4280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
430 0 0 0 0 0 0 0 0 0 0 0 0 4290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
431 0 0 0 0 0 0 0 0 0 0 0 0 4300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
432 0 0 0 85 85 85 0 0 0 0 0 0 4310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
433170 170 170 170 170 170 170 85 0 255 255 85 4320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
434170 85 0 255 255 85 170 85 0 255 255 85 4330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
435170 85 0 255 255 85 170 85 0 255 255 85 4340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
436170 170 170 170 170 170 0 0 0 0 0 0 4350 0 0 0 0 0 0 0 0 0 0 0
437 0 0 0 0 0 0 0 0 0 0 0 0 4360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
438 85 85 85 0 0 0 0 0 0 0 0 0 4370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
439 0 0 0 0 0 0 0 0 0 0 0 0 4380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
440 0 0 0 0 0 0 0 0 0 0 0 0 4390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
441 0 0 0 0 0 0 0 0 0 0 0 0 4400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
442 0 0 0 0 0 0 0 0 0 0 0 0 4410 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
443 0 0 0 0 0 0 0 0 0 0 0 0 44285 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
444 0 0 0 0 0 0 0 0 0 0 0 0 4430 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
445 0 0 0 0 0 0 0 0 0 0 0 0 4440 0 0 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
446 0 0 0 0 0 0 0 0 0 0 0 0 4450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
447 0 0 0 0 0 0 0 0 0 0 0 0 4460 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
448 0 0 0 0 0 0 0 0 0 0 0 0 4470 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
449 0 0 0 0 0 0 0 0 0 0 0 0 4480 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
450 0 0 0 0 0 0 0 0 0 0 0 0 44985 85 85 85 85 85 85 85 85 85 85 85 170 85 0 0 0 0
451 0 0 0 0 0 0 0 0 0 0 0 0 4500 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
452 0 0 0 85 85 85 0 0 0 0 0 0 4510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
453 0 0 0 170 85 0 255 255 85 170 85 0 4520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
454255 255 85 170 85 0 255 255 85 170 85 0 4530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
455255 255 85 170 85 0 255 255 85 170 85 0 4540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
456255 255 85 170 85 0 0 0 0 0 0 0 4550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
457 0 0 0 0 0 0 0 0 0 0 0 0 4560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
458 85 85 85 0 0 0 0 0 0 0 0 0 4570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
459 0 0 0 0 0 0 0 0 0 0 0 0 4580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
460 0 0 0 0 0 0 0 0 0 0 0 0 4590 0 0 0 0 0 0 0 0 0 0 0
461 0 0 0 0 0 0 0 0 0 0 0 0 4600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
462 0 0 0 0 0 0 0 0 0 0 0 0 4610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
463 0 0 0 0 0 0 0 0 0 0 0 0 4620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
464 0 0 0 0 0 0 0 0 0 0 0 0 4630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
465 0 0 0 0 0 0 0 0 0 0 0 0 4640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
466 0 0 0 0 0 0 0 0 0 0 0 0 4650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
467 0 0 0 0 0 0 0 0 0 0 0 0 4660 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
468 0 0 0 0 0 0 0 0 0 0 0 0 4670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
469 0 0 0 0 0 0 0 0 0 0 0 0 46885 85 85 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
470 0 0 0 0 0 0 0 0 0 0 0 0 4690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
471 0 0 0 0 0 0 0 0 0 0 0 0 4700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
472 0 0 0 85 85 85 0 0 0 0 0 0 47185 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
473170 85 0 255 255 85 170 85 0 255 255 85 4720 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
474170 85 0 255 255 85 170 85 0 255 255 85 47385 85 85 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
475170 85 0 255 255 85 170 85 0 255 255 85 4740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
476170 85 0 255 255 85 170 85 0 0 0 0 4750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
477 0 0 0 0 0 0 0 0 0 0 0 0 4760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
478 0 0 0 85 85 85 0 0 0 0 0 0 4770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
479 0 0 0 0 0 0 0 0 0 0 0 0 4780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
480 0 0 0 0 0 0 0 0 0 0 0 0 4790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
481 0 0 0 0 0 0 0 0 0 0 0 0 4800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
482 0 0 0 0 0 0 0 0 0 0 0 0 4810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
483 0 0 0 0 0 0 0 0 0 0 0 0 4820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
484 0 0 0 0 0 0 0 0 0 0 0 0 4830 0 0 0 0 0 0 0 0 0 0 0
485 0 0 0 0 0 0 0 0 0 0 0 0 4840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
486 0 0 0 0 0 0 0 0 0 0 0 0 4850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
487 0 0 0 0 0 0 0 0 0 0 0 0 4860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
488 0 0 0 0 0 0 0 0 0 0 0 0 4870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
489 0 0 0 0 0 0 0 0 0 0 0 0 4880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
490 0 0 0 0 0 0 0 0 0 0 0 0 4890 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
491 0 0 0 0 0 0 0 0 0 0 0 0 4900 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
492 0 0 0 85 85 85 85 85 85 0 0 0 4910 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
493255 255 85 170 85 0 255 255 85 170 85 0 4920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
494255 255 85 170 85 0 255 255 85 170 85 0 4930 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
495255 255 85 170 85 0 255 255 85 170 85 0 4940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
496255 255 85 170 85 0 170 85 0 0 0 0 4950 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
497 0 0 0 0 0 0 0 0 0 0 0 0 4960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
498 0 0 0 85 85 85 0 0 0 0 0 0 4970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
499 0 0 0 0 0 0 0 0 0 0 0 0 4980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
500 0 0 0 0 0 0 0 0 0 0 0 0 4990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
501 0 0 0 0 0 0 0 0 0 0 0 0 5000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
502 0 0 0 0 0 0 0 0 0 0 0 0 5010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
503 0 0 0 0 0 0 0 0 0 0 0 0 5020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
504 0 0 0 0 0 0 0 0 0 0 0 0 5030 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
505 0 0 0 0 0 0 0 0 0 0 0 0 5040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
506 0 0 0 0 0 0 0 0 0 0 0 0 5050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
507 0 0 0 0 0 0 0 0 0 0 0 0 5060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
508 0 0 0 0 0 0 0 0 0 0 0 0 5070 0 0 0 0 0 0 0 0 0 0 0
509 0 0 0 0 0 0 0 0 0 0 0 0 5080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
510 0 0 0 0 0 0 0 0 0 0 0 0 5090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
511 0 0 0 0 0 0 0 0 0 0 0 0 5100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
512 0 0 0 85 85 85 85 85 85 0 0 0 5110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
513170 85 0 255 255 85 170 85 0 255 255 85 5120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
514170 85 0 255 255 85 170 85 0 255 255 85 5130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
515170 85 0 255 255 85 170 85 0 170 85 0 5140 0 0 85 85 85 0 0 0 0 170 0 85 85 85 0 0 0
516170 85 0 170 85 0 85 85 85 0 0 0 51585 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
517 0 0 0 85 85 85 0 0 0 0 0 0 5160 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
518 0 0 0 0 0 0 85 85 85 0 0 0 5170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
519 0 0 0 0 0 0 0 0 0 0 0 0 5180 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
520 0 0 0 0 0 0 0 0 0 0 0 0 5190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
521 0 0 0 0 0 0 0 0 0 0 0 0 5200 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
522 0 0 0 0 0 0 0 0 0 0 0 0 5210 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
523 0 0 0 0 0 0 0 0 0 0 0 0 5220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
524 0 0 0 0 0 0 0 0 0 0 0 0 5230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
525 0 0 0 0 0 0 0 0 0 0 0 0 5240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
526 0 0 0 0 0 0 0 0 0 0 0 0 5250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
527 0 0 0 0 0 0 0 0 0 0 0 0 5260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
528 0 0 0 0 0 0 0 0 0 0 0 0 5270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
529 0 0 0 0 0 0 0 0 0 0 0 0 5280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
530 0 0 0 0 0 0 0 0 0 0 0 0 5290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
531 0 0 0 0 0 0 0 0 0 0 0 0 5300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
532 0 0 0 85 85 85 85 85 85 0 0 0 5310 0 0 0 0 0 0 0 0 0 0 0
533 85 85 85 170 85 0 255 255 85 170 85 0 5320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
534255 255 85 170 85 0 255 255 85 170 85 0 5330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
535170 85 0 170 85 0 170 85 0 170 85 0 5340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
536170 85 0 170 85 0 85 85 85 0 0 0 5350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
537 0 0 0 85 85 85 170 170 170 85 85 85 5360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
538 0 0 0 0 0 0 85 85 85 0 0 0 5370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
539 0 0 0 0 0 0 0 0 0 0 0 0 538170 85 0 85 255 85 170 85 0 170 85 0 170 85 0 85 255 85
540 0 0 0 0 0 0 0 0 0 0 0 0 539170 85 0 170 85 0 0 170 0 0 0 0 0 0 0 0 0 0
541 0 0 0 0 0 0 0 0 0 0 0 0 54085 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
542 0 0 0 0 0 0 0 0 0 0 0 0 5410 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
543 0 0 0 0 0 0 0 0 0 0 0 0 5420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
544 0 0 0 0 0 0 0 0 0 0 0 0 54385 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
545 0 0 0 0 0 0 0 0 0 0 0 0 5440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
546 0 0 0 0 0 0 0 0 0 0 0 0 54585 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
547 0 0 0 0 0 0 0 0 0 0 0 0 5460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
548 0 0 0 0 0 0 0 0 0 0 0 0 5470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
549 0 0 0 0 0 0 0 0 0 0 0 0 5480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
550 0 0 0 0 0 0 0 0 0 0 0 0 5490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
551 0 0 0 0 0 0 0 0 0 0 0 0 5500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
552 0 0 0 85 85 85 85 85 85 0 0 0 5510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
553 85 85 85 170 85 0 170 85 0 170 85 0 5520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
554170 85 0 170 85 0 170 85 0 170 85 0 5530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
555170 85 0 170 85 0 170 85 0 170 85 0 5540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
556170 170 170 170 170 170 170 170 170 0 0 0 5550 0 0 0 0 0 0 0 0 0 0 0
557 0 0 0 0 0 0 170 170 170 170 170 170 5560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
558 0 0 0 0 0 0 0 0 0 85 85 85 5570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
559 0 0 0 0 0 0 0 0 0 0 0 0 5580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
560 0 0 0 0 0 0 0 0 0 0 0 0 5590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
561 0 0 0 0 0 0 0 0 0 0 0 0 5600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
562 0 0 0 0 0 0 0 0 0 0 0 0 5610 0 0 0 0 0 0 0 0 0 0 0 0 170 0 170 85 0
563 0 0 0 0 0 0 0 0 0 0 0 0 562255 255 85 170 85 0 255 255 85 255 255 85 255 255 85 170 85 0
564 0 0 0 0 0 0 0 0 0 0 0 0 563255 255 85 85 255 85 170 85 0 170 85 0 85 85 85 0 0 0
565 0 0 0 0 0 0 0 0 0 0 0 0 5640 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
566 0 0 0 0 0 0 0 0 0 0 0 0 56585 85 85 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
567 0 0 0 0 0 0 0 0 0 0 0 0 5660 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
568 0 0 0 0 0 0 0 0 0 0 0 0 5670 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
569 0 0 0 0 0 0 0 0 0 0 0 0 56885 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
570 0 0 0 0 0 0 0 0 0 0 0 0 5690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
571 0 0 0 0 0 0 0 0 0 0 0 0 5700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
572 0 0 0 85 85 85 0 0 0 0 0 0 5710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
573 85 85 85 170 170 170 170 85 0 170 85 0 5720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
574170 85 0 170 85 0 170 85 0 170 85 0 5730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
575170 85 0 170 85 0 170 170 170 170 170 170 5740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
576170 170 170 170 170 170 170 170 170 85 85 85 5750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
577 0 0 0 0 0 0 85 85 85 85 85 85 5760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
578 0 0 0 0 0 0 0 0 0 85 85 85 5770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
579 0 0 0 0 0 0 0 0 0 0 0 0 5780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
580 0 0 0 0 0 0 0 0 0 0 0 0 5790 0 0 0 0 0 0 0 0 0 0 0
581 0 0 0 0 0 0 0 0 0 0 0 0 5800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
582 0 0 0 0 0 0 0 0 0 0 0 0 5810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
583 0 0 0 0 0 0 0 0 0 0 0 0 5820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
584 0 0 0 0 0 0 0 0 0 0 0 0 5830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
585 0 0 0 0 0 0 0 0 0 0 0 0 5840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
586 0 0 0 0 0 0 0 0 0 0 0 0 5850 0 0 0 0 0 0 0 0 0 0 0 170 85 0 255 255 85
587 0 0 0 0 0 0 0 0 0 0 0 0 58685 255 85 255 255 85 255 255 85 170 85 0 255 255 85 255 255 85
588 0 0 0 0 0 0 0 0 0 0 0 0 587255 255 85 170 85 0 255 255 85 85 255 85 170 85 0 0 0 0
589 0 0 0 0 0 0 0 0 0 0 0 0 58885 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
590 0 0 0 0 0 0 0 0 0 0 0 0 5890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
591 0 0 0 0 0 0 0 0 0 0 0 0 5900 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
592 0 0 0 85 85 85 0 0 0 0 0 0 5910 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
593 85 85 85 170 170 170 170 170 170 170 85 0 5920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
594170 85 0 170 85 0 170 85 0 170 85 0 5930 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
595170 170 170 170 170 170 170 170 170 170 170 170 5940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
596255 255 255 255 255 255 255 255 255 170 170 170 5950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
597 0 0 0 0 0 0 0 0 0 0 0 0 5960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
598 0 0 0 0 0 0 0 0 0 85 85 85 5970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
599 0 0 0 0 0 0 0 0 0 0 0 0 5980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
600 0 0 0 0 0 0 0 0 0 0 0 0 5990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
601 0 0 0 0 0 0 0 0 0 0 0 0 6000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
602 0 0 0 0 0 0 0 0 0 0 0 0 6010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
603 0 0 0 0 0 0 0 0 0 0 0 0 6020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
604 0 0 0 0 0 0 0 0 0 0 0 0 6030 0 0 0 0 0 0 0 0 0 0 0
605 0 0 0 0 0 0 0 0 0 0 0 0 6040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
606 0 0 0 0 0 0 0 0 0 0 0 0 6050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
607 0 0 0 0 0 0 0 0 0 0 0 0 6060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
608 0 0 0 0 0 0 0 0 0 0 0 0 6070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
609 0 0 0 0 0 0 0 0 0 0 0 0 6080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
610 0 0 0 0 0 0 0 0 0 0 0 0 6090 0 0 0 0 0 0 0 0 85 85 85 255 255 85 170 85 0
611 0 0 0 0 0 0 0 0 0 0 0 0 610255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 170 85 0
612 85 85 85 0 0 0 0 0 0 85 85 85 611255 255 85 255 255 85 255 255 85 255 255 85 170 85 0 85 255 85
613255 255 255 255 255 255 170 170 170 170 170 170 6120 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
614170 170 170 170 170 170 170 170 170 170 170 170 6130 0 0 85 85 85 0 0 0 85 85 85 170 170 170 0 0 0
615170 170 170 170 170 170 255 255 255 255 255 255 6140 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
616255 255 255 255 255 255 255 255 255 255 255 255 61585 85 85 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
617 85 85 85 0 0 0 0 0 0 0 0 0 6160 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
618 0 0 0 0 0 0 0 0 0 0 0 0 6170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
619 85 85 85 0 0 0 0 0 0 0 0 0 6180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
620 0 0 0 0 0 0 0 0 0 0 0 0 6190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
621 0 0 0 0 0 0 0 0 0 0 0 0 6200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
622 0 0 0 0 0 0 0 0 0 0 0 0 6210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
623 0 0 0 0 0 0 0 0 0 0 0 0 6220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
624 0 0 0 0 0 0 0 0 0 0 0 0 6230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
625 0 0 0 0 0 0 0 0 0 0 0 0 6240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
626 0 0 0 0 0 0 0 0 0 0 0 0 6250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
627 0 0 0 0 0 0 0 0 0 0 0 0 6260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
628 0 0 0 0 0 0 0 0 0 0 0 0 6270 0 0 0 0 0 0 0 0 0 0 0
629 0 0 0 0 0 0 0 0 0 0 0 0 6280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
630 0 0 0 0 0 0 0 0 0 0 0 0 6290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
631 0 0 0 0 0 0 0 0 0 0 0 0 6300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
632 85 85 85 0 0 0 0 0 0 170 170 170 6310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
633255 255 255 255 255 255 170 170 170 170 170 170 6320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
634170 170 170 170 170 170 170 170 170 170 170 170 6330 0 0 0 0 0 0 0 0 170 85 0 255 255 85 255 255 85
635170 170 170 255 255 255 255 255 255 255 255 255 634255 255 85 255 255 85 170 85 0 255 255 85 85 255 85 255 255 85
636255 255 255 255 255 255 255 255 255 255 255 255 635255 255 85 170 85 0 255 255 85 170 85 0 255 255 85 170 85 0
637170 170 170 0 0 0 0 0 0 0 0 0 636170 85 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
638 0 0 0 0 0 0 0 0 0 0 0 0 63785 85 85 0 0 0 0 0 0 85 85 85 170 170 170 0 0 0
639 85 85 85 0 0 0 0 0 0 0 0 0 63885 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
640 0 0 0 0 0 0 0 0 0 0 0 0 6390 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
641 0 0 0 0 0 0 0 0 0 0 0 0 6400 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
642 0 0 0 0 0 0 0 0 0 0 0 0 6410 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
643 0 0 0 0 0 0 0 0 0 0 0 0 6420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
644 0 0 0 0 0 0 0 0 0 0 0 0 6430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
645 0 0 0 0 0 0 0 0 0 0 0 0 6440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
646 0 0 0 0 0 0 0 0 0 0 0 0 6450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
647 0 0 0 0 0 0 0 0 0 0 0 0 6460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
648 0 0 0 0 0 0 0 0 0 0 0 0 6470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
649 0 0 0 0 0 0 0 0 0 0 0 0 6480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
650 0 0 0 0 0 0 0 0 0 0 0 0 6490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
651 0 0 0 0 0 0 0 0 0 85 85 85 6500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
652 0 0 0 0 0 0 85 85 85 255 255 255 6510 0 0 0 0 0 0 0 0 0 0 0
653255 255 255 255 255 255 255 255 255 170 170 170 6520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
654170 170 170 170 170 170 170 170 170 170 170 170 6530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
655255 255 255 255 255 255 255 255 255 255 255 255 6540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
656255 255 255 255 255 255 255 255 255 255 255 255 6550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
657255 255 255 0 0 0 0 0 0 0 0 0 6560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
658 0 0 0 0 0 0 0 0 0 0 0 0 6570 0 0 0 0 0 170 85 0 255 255 85 85 255 85 255 255 85
659 0 0 0 85 85 85 0 0 0 0 0 0 658170 170 170 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
660 0 0 0 0 0 0 0 0 0 0 0 0 659255 255 85 255 255 85 85 255 85 255 255 85 255 255 85 255 255 85
661 0 0 0 0 0 0 0 0 0 0 0 0 66085 255 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
662 0 0 0 0 0 0 0 0 0 0 0 0 66185 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
663 0 0 0 0 0 0 0 0 0 0 0 0 6620 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
664 0 0 0 0 0 0 0 0 0 0 0 0 66385 85 85 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
665 0 0 0 0 0 0 0 0 0 0 0 0 6640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
666 0 0 0 0 0 0 0 0 0 0 0 0 6650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
667 0 0 0 0 0 0 0 0 0 0 0 0 6660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
668 0 0 0 0 0 0 0 0 0 0 0 0 6670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
669 0 0 0 0 0 0 0 0 0 0 0 0 6680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
670 0 0 0 0 0 0 0 0 0 0 0 0 6690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
671 0 0 0 0 0 0 85 85 85 0 0 0 6700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
672 0 0 0 85 85 85 170 170 170 255 255 255 6710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
673255 255 255 255 255 255 255 255 255 255 255 255 6720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
674255 255 255 255 255 255 255 255 255 255 255 255 6730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
675255 255 255 255 255 255 255 255 255 255 255 255 6740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
676255 255 255 255 255 255 255 255 255 255 255 255 6750 0 0 0 0 0 0 0 0 0 0 0
677255 255 255 85 85 85 0 0 0 0 0 0 6760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
678 0 0 0 0 0 0 0 0 0 0 0 0 6770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
679 0 0 0 0 0 0 85 85 85 0 0 0 6780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
680 0 0 0 0 0 0 0 0 0 0 0 0 6790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
681 0 0 0 0 0 0 0 0 0 0 0 0 6800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
682 0 0 0 0 0 0 0 0 0 0 0 0 6810 0 0 0 0 0 170 85 0 255 255 85 255 255 85 255 255 85
683 0 0 0 0 0 0 0 0 0 0 0 0 682255 255 255 255 255 85 255 255 85 170 85 0 255 255 85 170 85 0
684 0 0 0 0 0 0 0 0 0 0 0 0 683255 255 85 255 255 85 255 255 85 255 255 85 170 85 0 255 255 85
685 0 0 0 0 0 0 0 0 0 0 0 0 684170 85 0 170 85 0 0 170 0 0 0 0 85 85 85 0 0 0
686 0 0 0 0 0 0 0 0 0 0 0 0 68585 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
687 0 0 0 0 0 0 0 0 0 0 0 0 6860 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
688 0 0 0 0 0 0 0 0 0 0 0 0 6870 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
689 0 0 0 0 0 0 0 0 0 0 0 0 6880 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
690 0 0 0 0 0 0 0 0 0 0 0 0 6890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
691 0 0 0 85 85 85 0 0 0 0 0 0 6900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
692 0 0 0 85 85 85 255 255 255 255 255 255 6910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
693255 255 255 255 255 255 255 255 255 255 255 255 6920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
694255 255 255 255 255 255 255 255 255 255 255 255 6930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
695255 255 255 255 255 255 255 255 255 255 255 255 6940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
696255 255 255 255 255 255 255 255 255 255 255 255 6950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
697255 255 255 170 170 170 0 0 0 0 0 0 6960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
698 0 0 0 0 0 0 0 0 0 0 0 0 6970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
699 0 0 0 0 0 0 0 0 0 85 85 85 6980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
700 0 0 0 0 0 0 0 0 0 0 0 0 6990 0 0 0 0 0 0 0 0 0 0 0
701 0 0 0 0 0 0 0 0 0 0 0 0 7000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
702 0 0 0 0 0 0 0 0 0 0 0 0 7010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
703 0 0 0 0 0 0 0 0 0 0 0 0 7020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
704 0 0 0 0 0 0 0 0 0 0 0 0 7030 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
705 0 0 0 0 0 0 0 0 0 0 0 0 7040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
706 0 0 0 0 0 0 0 0 0 0 0 0 7050 0 0 170 85 0 85 255 85 255 255 85 170 170 170 255 255 255
707 0 0 0 0 0 0 0 0 0 0 0 0 706255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
708 0 0 0 0 0 0 0 0 0 0 0 0 707255 255 85 255 255 85 170 85 0 255 255 85 85 255 85 255 255 85
709 0 0 0 0 0 0 0 0 0 0 0 0 708255 255 85 85 255 85 0 0 0 85 85 85 0 0 0 85 85 85
710 0 0 0 0 0 0 0 0 0 0 0 0 7090 0 0 85 85 85 0 0 0 85 85 85 85 85 85 0 0 0
711 0 0 0 85 85 85 0 0 0 0 0 0 71085 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
712 0 0 0 85 85 85 255 255 255 255 255 255 71185 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
713255 255 255 255 255 255 255 255 255 255 255 255 71285 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
714255 255 255 255 255 255 255 255 255 255 255 255 7130 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
715255 255 255 255 255 255 255 255 255 255 255 255 7140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
716255 255 255 255 255 255 255 255 255 255 255 255 7150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
717255 255 255 255 255 255 0 0 0 0 0 0 7160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
718 0 0 0 0 0 0 0 0 0 0 0 0 7170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
719 0 0 0 0 0 0 0 0 0 0 0 0 7180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
720 85 85 85 0 0 0 0 0 0 0 0 0 7190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
721 0 0 0 0 0 0 0 0 0 0 0 0 7200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
722 0 0 0 0 0 0 0 0 0 0 0 0 7210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
723 0 0 0 0 0 0 0 0 0 0 0 0 7220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
724 0 0 0 0 0 0 0 0 0 0 0 0 7230 0 0 0 0 0 0 0 0 0 0 0
725 0 0 0 0 0 0 0 0 0 0 0 0 7240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
726 0 0 0 0 0 0 0 0 0 0 0 0 7250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
727 0 0 0 0 0 0 0 0 0 0 0 0 7260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
728 0 0 0 0 0 0 0 0 0 0 0 0 7270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
729 0 0 0 0 0 0 0 0 0 0 0 0 7280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
730 0 0 0 0 0 0 0 0 0 0 0 0 7290 0 0 255 255 85 255 255 85 255 255 85 255 255 255 255 255 85
731 85 85 85 0 0 0 0 0 0 0 0 0 730255 255 85 255 255 85 85 255 85 255 255 85 255 255 85 85 255 85
732 85 85 85 170 170 170 255 255 255 255 255 255 731255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 170 85 0
733255 255 255 255 255 255 255 255 255 255 255 255 732255 255 85 170 85 0 85 85 85 0 0 0 0 0 0 85 85 85
734255 255 255 255 255 255 255 255 255 255 255 255 7330 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
735255 255 255 255 255 255 255 255 255 255 255 255 73485 85 85 0 0 0 85 85 85 85 85 85 0 0 0 85 85 85
736255 255 255 255 255 255 255 255 255 255 255 255 7350 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
737255 255 255 255 255 255 85 85 85 0 0 0 7360 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
738 0 0 0 0 0 0 0 0 0 0 0 0 73785 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
739 0 0 0 0 0 0 0 0 0 0 0 0 7380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
740 0 0 0 85 85 85 0 0 0 0 0 0 7390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
741 0 0 0 0 0 0 0 0 0 0 0 0 7400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
742 0 0 0 0 0 0 0 0 0 0 0 0 7410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
743 0 0 0 0 0 0 0 0 0 0 0 0 7420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
744 0 0 0 0 0 0 0 0 0 0 0 0 7430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
745 0 0 0 0 0 0 0 0 0 0 0 0 7440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
746 0 0 0 0 0 0 0 0 0 0 0 0 7450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
747 0 0 0 0 0 0 0 0 0 0 0 0 7460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
748 0 0 0 0 0 0 0 0 0 0 0 0 7470 0 0 0 0 0 0 0 0 0 0 0
749 0 0 0 0 0 0 0 0 0 0 0 0 7480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
750 0 0 0 0 0 0 0 0 0 85 85 85 7490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
751 0 0 0 0 0 0 0 0 0 0 0 0 7500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
752 85 85 85 170 170 170 170 170 170 170 170 170 7510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
753255 255 255 255 255 255 255 255 255 170 170 170 7520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
754170 170 170 170 170 170 255 255 255 255 255 255 753170 85 0 170 85 0 255 255 85 255 255 85 255 255 255 170 170 170
755255 255 255 255 255 255 255 255 255 255 255 255 754255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
756170 170 170 170 170 170 170 170 170 170 170 170 755170 85 0 255 255 85 255 255 85 170 85 0 255 255 85 255 255 85
757170 170 170 170 170 170 170 170 170 85 85 85 756255 255 85 85 255 85 170 85 0 85 85 85 0 0 0 0 0 0
758 0 0 0 0 0 0 0 0 0 0 0 0 75785 85 85 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
759 0 0 0 0 0 0 0 0 0 0 0 0 75885 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
760 0 0 0 85 85 85 0 0 0 0 0 0 75985 85 85 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
761 0 0 0 0 0 0 0 0 0 0 0 0 7600 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
762 0 0 0 0 0 0 0 0 0 0 0 0 7610 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
763 0 0 0 0 0 0 0 0 0 0 0 0 7620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
764 0 0 0 0 0 0 0 0 0 0 0 0 7630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
765 0 0 0 0 0 0 0 0 0 0 0 0 7640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
766 0 0 0 0 0 0 0 0 0 0 0 0 7650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
767 0 0 0 0 0 0 0 0 0 0 0 0 7660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
768 0 0 0 0 0 0 0 0 0 0 0 0 7670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
769 0 0 0 0 0 0 0 0 0 0 0 0 7680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
770 0 0 0 0 0 0 0 0 0 85 85 85 7690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
771 0 0 0 0 0 0 0 0 0 0 0 0 7700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
772170 170 170 170 170 170 170 170 170 255 255 255 7710 0 0 0 0 0 0 0 0 0 0 0
773255 255 255 255 255 255 255 255 255 255 255 255 7720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
774170 170 170 255 255 255 255 255 255 255 255 255 7730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
775255 255 255 255 255 255 255 255 255 255 255 255 7740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
776255 255 255 255 255 255 170 170 170 170 170 170 7750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
777170 170 170 170 170 170 170 170 170 85 85 85 7760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
778 0 0 0 0 0 0 85 85 85 0 0 0 777255 255 85 85 255 85 255 255 85 170 170 170 255 255 255 255 255 85
779 0 0 0 0 0 0 0 0 0 0 0 0 778255 255 85 255 255 85 170 85 0 255 255 85 255 255 85 255 255 85
780 0 0 0 0 0 0 85 85 85 0 0 0 779255 255 85 255 255 85 255 255 85 255 255 85 85 255 85 170 85 0
781 0 0 0 0 0 0 0 0 0 0 0 0 780255 255 85 170 85 0 170 85 0 0 0 0 85 85 85 0 0 0
782 0 0 0 0 0 0 0 0 0 0 0 0 78185 85 85 85 85 85 85 85 85 170 170 170 170 170 170 170 170 170
783 0 0 0 0 0 0 0 0 0 0 0 0 78285 255 85 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
784 0 0 0 0 0 0 0 0 0 0 0 0 783170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
785 0 0 0 0 0 0 0 0 0 0 0 0 784170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
786 0 0 0 0 0 0 0 0 0 0 0 0 785170 170 170 170 170 170 170 170 170 170 170 170 255 255 85 170 170 170
787 0 0 0 0 0 0 0 0 0 0 0 0 78685 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
788 0 0 0 0 0 0 0 0 0 0 0 0 7870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
789 0 0 0 0 0 0 0 0 0 0 0 0 7880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
790 0 0 0 0 0 0 85 85 85 0 0 0 7890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
791 0 0 0 0 0 0 0 0 0 0 0 0 7900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
792170 170 170 255 255 255 255 255 255 255 255 255 7910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
793255 255 255 255 255 255 255 255 255 255 255 255 7920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
794255 255 255 255 255 255 255 255 255 255 255 255 7930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
795255 255 255 255 255 255 255 255 255 255 255 255 7940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
796255 255 255 255 255 255 255 255 255 255 255 255 7950 0 0 0 0 0 0 0 0 0 0 0
797255 255 255 170 170 170 170 170 170 170 170 170 7960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
798 0 0 0 0 0 0 0 0 0 85 85 85 7970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
799 85 85 85 0 0 0 0 0 0 0 0 0 7980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
800 0 0 0 0 0 0 85 85 85 0 0 0 7990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
801 0 0 0 0 0 0 0 0 0 0 0 0 8000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 170 0
802 0 0 0 0 0 0 0 0 0 0 0 0 801170 85 0 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
803 0 0 0 0 0 0 0 0 0 0 0 0 802255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
804 0 0 0 0 0 0 0 0 0 0 0 0 803255 255 85 255 255 85 85 255 85 255 255 85 170 85 0 170 85 0
805 0 0 0 0 0 0 0 0 0 0 0 0 804170 85 0 85 255 85 255 255 85 85 85 85 170 170 170 170 170 170
806 0 0 0 0 0 0 0 0 0 0 0 0 805170 170 170 170 170 170 170 170 170 85 255 85 170 170 170 170 170 170
807 0 0 0 0 0 0 0 0 0 0 0 0 80685 85 85 170 170 170 170 170 170 170 85 0 170 170 170 170 170 170
808 0 0 0 0 0 0 0 0 0 0 0 0 80785 255 85 170 170 170 170 85 0 170 170 170 85 255 85 255 85 85
809 0 0 0 0 0 0 0 0 0 0 0 0 80885 255 85 170 170 170 255 255 85 85 85 85 255 255 85 170 170 170
810 0 0 0 0 0 0 85 85 85 0 0 0 80985 255 85 170 170 170 255 255 85 170 170 170 170 170 170 85 85 85
811 85 85 85 0 0 0 0 0 0 85 85 85 8100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
812255 255 255 255 255 255 255 255 255 255 255 255 8110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
813255 255 255 255 255 255 255 255 255 255 255 255 8120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
814255 255 255 255 255 255 255 255 255 255 255 255 8130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
815255 255 255 255 255 255 255 255 255 255 255 255 8140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
816255 255 255 255 255 255 255 255 255 255 255 255 8150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
817255 255 255 255 255 255 170 170 170 170 170 170 8160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
818 85 85 85 0 0 0 0 0 0 0 0 0 8170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
819 0 0 0 85 85 85 0 0 0 0 0 0 8180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
820 0 0 0 0 0 0 0 0 0 85 85 85 8190 0 0 0 0 0 0 0 0 0 0 0
821 0 0 0 0 0 0 0 0 0 0 0 0 8200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
822 0 0 0 0 0 0 0 0 0 0 0 0 8210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
823 0 0 0 0 0 0 0 0 0 0 0 0 8220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
824 0 0 0 0 0 0 0 0 0 0 0 0 8230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
825 0 0 0 0 0 0 0 0 0 0 0 0 8240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 255 255 85
826 0 0 0 0 0 0 0 0 0 0 0 0 825255 255 85 255 255 85 255 255 85 255 255 255 255 255 85 255 255 85
827 0 0 0 0 0 0 0 0 0 0 0 0 826255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 170 85 0
828 0 0 0 0 0 0 0 0 0 0 0 0 827255 255 85 255 255 85 255 255 85 170 85 0 0 170 0 85 85 85
829 0 0 0 0 0 0 0 0 0 0 0 0 828170 170 170 170 170 170 255 255 85 170 170 170 170 170 170 85 255 85
830 0 0 0 85 85 85 0 0 0 0 0 0 829255 85 85 85 255 85 85 85 85 255 85 85 85 85 85 170 170 170
831 85 85 85 0 0 0 0 0 0 170 170 170 830170 85 0 170 170 170 85 85 85 85 255 85 85 85 85 85 85 85
832255 255 255 255 255 255 255 255 255 255 255 255 83185 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
833255 255 255 255 255 255 255 255 255 255 255 255 8320 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
834255 255 255 255 255 255 255 255 255 255 255 255 833170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
835255 255 255 255 255 255 255 255 255 255 255 255 8340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
836255 255 255 255 255 255 255 255 255 255 255 255 8350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
837255 255 255 255 255 255 255 255 255 255 255 255 8360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
838170 170 170 85 85 85 0 0 0 0 0 0 8370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
839 0 0 0 85 85 85 85 85 85 0 0 0 8380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
840 0 0 0 0 0 0 0 0 0 85 85 85 8390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
841 0 0 0 0 0 0 0 0 0 0 0 0 8400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
842 0 0 0 0 0 0 0 0 0 0 0 0 8410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
843 0 0 0 0 0 0 0 0 0 0 0 0 8420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
844 0 0 0 0 0 0 0 0 0 0 0 0 8430 0 0 0 0 0 0 0 0 0 0 0
845 0 0 0 0 0 0 0 0 0 0 0 0 8440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
846 0 0 0 0 0 0 0 0 0 0 0 0 8450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
847 0 0 0 0 0 0 0 0 0 0 0 0 8460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
848 0 0 0 0 0 0 0 0 0 0 0 0 8470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
849 0 0 0 0 0 0 0 0 0 0 0 0 8480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 255 255 85
850 0 0 0 85 85 85 0 0 0 85 85 85 849170 85 0 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
851 0 0 0 0 0 0 85 85 85 255 255 255 850255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
852255 255 255 255 255 255 255 255 255 255 255 255 851255 255 85 255 255 85 170 85 0 255 255 85 85 85 85 85 85 85
853255 255 255 255 255 255 255 255 255 255 255 255 852255 255 85 170 170 170 85 85 85 85 85 85 0 0 0 85 85 85
854255 255 255 255 255 255 255 255 255 255 255 255 8530 0 0 85 85 85 85 85 85 170 170 170 170 85 0 170 170 170
855255 255 255 255 255 255 255 255 255 255 255 255 854170 170 170 255 255 85 170 170 170 85 85 85 85 85 85 85 85 85
856255 255 255 255 255 255 255 255 255 255 255 255 8550 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
857255 255 255 255 255 255 255 255 255 255 255 255 85685 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
858255 255 255 170 170 170 0 0 0 85 85 85 8570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
859 85 85 85 0 0 0 85 85 85 0 0 0 8580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
860 0 0 0 0 0 0 0 0 0 85 85 85 8590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
861 0 0 0 0 0 0 0 0 0 0 0 0 8600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
862 0 0 0 0 0 0 0 0 0 0 0 0 8610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
863 0 0 0 0 0 0 0 0 0 0 0 0 8620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
864 0 0 0 0 0 0 0 0 0 0 0 0 8630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
865 0 0 0 0 0 0 0 0 0 0 0 0 8640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
866 0 0 0 0 0 0 0 0 0 0 0 0 8650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
867 0 0 0 0 0 0 0 0 0 0 0 0 8660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
868 0 0 0 0 0 0 0 0 0 0 0 0 8670 0 0 0 0 0 0 0 0 0 0 0
869 0 0 0 0 0 0 0 0 0 0 0 0 8680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
870 0 0 0 85 85 85 0 0 0 85 85 85 8690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
871 0 0 0 85 85 85 170 170 170 255 255 255 8700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
872255 255 255 255 255 255 255 255 255 255 255 255 8710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
873255 255 255 255 255 255 255 255 255 255 255 255 8720 0 0 0 0 0 0 0 0 0 0 0 170 85 0 255 255 85
874255 255 255 255 255 255 255 255 255 255 255 255 873255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
875255 255 255 255 255 255 255 255 255 255 255 255 874255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
876255 255 255 255 255 255 255 255 255 255 255 255 875255 255 85 255 255 85 255 255 85 170 85 0 170 85 0 0 170 0
877255 255 255 255 255 255 255 255 255 255 255 255 8760 0 0 170 85 0 170 85 0 0 170 0 0 0 0 0 0 0
878255 255 255 170 170 170 0 0 0 85 85 85 87785 85 85 0 0 0 85 85 85 85 85 85 170 170 170 85 85 85
879 85 85 85 0 0 0 85 85 85 0 0 0 878170 170 170 85 85 85 85 85 85 170 170 170 170 85 0 85 85 85
880 0 0 0 0 0 0 0 0 0 0 0 0 87985 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
881 85 85 85 0 0 0 0 0 0 0 0 0 8800 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
882 0 0 0 0 0 0 0 0 0 0 0 0 88185 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
883 0 0 0 0 0 0 0 0 0 0 0 0 8820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
884 0 0 0 0 0 0 0 0 0 0 0 0 8830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
885 0 0 0 0 0 0 0 0 0 0 0 0 8840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
886 0 0 0 0 0 0 0 0 0 0 0 0 8850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
887 0 0 0 0 0 0 0 0 0 0 0 0 8860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
888 0 0 0 0 0 0 0 0 0 0 0 0 8870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
889 0 0 0 0 0 0 0 0 0 0 0 0 8880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
890 85 85 85 0 0 0 0 0 0 85 85 85 8890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
891 0 0 0 170 170 170 255 255 255 255 255 255 8900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
892255 255 255 255 255 255 255 255 255 255 255 255 8910 0 0 0 0 0 0 0 0 0 0 0
893255 255 255 255 255 255 255 255 255 255 255 255 8920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
894255 255 255 255 255 255 255 255 255 255 255 255 8930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
895255 255 255 255 255 255 255 255 255 255 255 255 8940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
896255 255 255 255 255 255 255 255 255 255 255 255 8950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
897255 255 255 255 255 255 255 255 255 255 255 255 8960 0 0 0 0 0 0 0 0 0 0 0 255 255 85 170 85 0
898255 255 255 255 255 255 85 85 85 0 0 0 897255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 170 85 0
899 0 0 0 0 0 0 0 0 0 85 85 85 898255 255 85 255 255 85 255 255 85 170 85 0 255 255 85 255 255 85
900 0 0 0 0 0 0 0 0 0 0 0 0 899170 85 0 255 255 85 85 255 85 255 255 85 255 255 85 170 85 0
901 85 85 85 0 0 0 0 0 0 0 0 0 900170 85 0 255 255 85 170 85 0 0 0 0 0 0 0 0 0 0
902 0 0 0 0 0 0 0 0 0 0 0 0 9010 0 0 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
903 0 0 0 0 0 0 0 0 0 0 0 0 90285 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
904 0 0 0 0 0 0 0 0 0 0 0 0 9030 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
905 0 0 0 0 0 0 0 0 0 0 0 0 90485 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
906 0 0 0 0 0 0 0 0 0 0 0 0 9050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
907 0 0 0 0 0 0 0 0 0 0 0 0 9060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
908 0 0 0 0 0 0 0 0 0 0 0 0 9070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
909 0 0 0 0 0 0 0 0 0 0 0 0 9080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
910 85 85 85 0 0 0 85 85 85 0 0 0 9090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
911 0 0 0 255 255 255 255 255 255 255 255 255 9100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
912255 255 255 255 255 255 255 255 255 255 255 255 9110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
913255 255 255 255 255 255 255 255 255 255 255 255 9120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
914255 255 255 255 255 255 255 255 255 255 255 255 9130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
915255 255 255 255 255 255 255 255 255 255 255 255 9140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
916255 255 255 255 255 255 255 255 255 255 255 255 9150 0 0 0 0 0 0 0 0 0 0 0
917255 255 255 255 255 255 255 255 255 255 255 255 9160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
918255 255 255 255 255 255 170 170 170 0 0 0 9170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
919 0 0 0 0 0 0 0 0 0 85 85 85 9180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
920 0 0 0 0 0 0 0 0 0 0 0 0 9190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
921 85 85 85 0 0 0 0 0 0 0 0 0 9200 0 0 0 0 0 0 0 0 0 0 0 255 255 85 255 255 85
922 0 0 0 0 0 0 0 0 0 0 0 0 921255 255 85 255 255 85 170 85 0 255 255 85 255 255 85 255 255 85
923 0 0 0 0 0 0 0 0 0 0 0 0 922255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
924 0 0 0 0 0 0 0 0 0 0 0 0 923255 255 85 255 255 85 255 255 85 170 85 0 255 255 85 255 255 85
925 0 0 0 0 0 0 0 0 0 0 0 0 92485 255 85 170 85 0 0 170 0 85 85 85 0 0 0 85 85 85
926 0 0 0 0 0 0 0 0 0 0 0 0 9250 0 0 85 85 85 0 0 0 85 85 85 85 85 85 85 85 85
927 0 0 0 0 0 0 0 0 0 0 0 0 92685 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
928 0 0 0 0 0 0 0 0 0 0 0 0 9270 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
929 0 0 0 0 0 0 0 0 0 85 85 85 9280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
930 0 0 0 0 0 0 85 85 85 0 0 0 9290 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
931 85 85 85 255 255 255 255 255 255 255 255 255 9300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
932255 255 255 255 255 255 255 255 255 255 255 255 9310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
933255 255 255 255 255 255 255 255 255 255 255 255 9320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
934255 255 255 255 255 255 255 255 255 255 255 255 9330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
935255 255 255 255 255 255 255 255 255 255 255 255 9340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
936255 255 255 255 255 255 255 255 255 255 255 255 9350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
937255 255 255 255 255 255 255 255 255 255 255 255 9360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
938255 255 255 255 255 255 170 170 170 0 0 0 9370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
939 0 0 0 0 0 0 0 0 0 85 85 85 9380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
940 0 0 0 0 0 0 0 0 0 0 0 0 9390 0 0 0 0 0 0 0 0 0 0 0
941 85 85 85 0 0 0 0 0 0 0 0 0 9400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
942 0 0 0 0 0 0 0 0 0 0 0 0 9410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
943 0 0 0 0 0 0 0 0 0 0 0 0 9420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
944 0 0 0 0 0 0 0 0 0 0 0 0 9430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
945 0 0 0 0 0 0 0 0 0 0 0 0 9440 0 0 0 0 0 0 0 0 0 170 0 170 85 0 255 255 85
946 0 0 0 0 0 0 0 0 0 0 0 0 94585 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
947 0 0 0 0 0 0 0 0 0 0 0 0 946255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
948 0 0 0 0 0 0 0 0 0 0 0 0 947170 85 0 255 255 85 85 255 85 255 255 85 255 255 85 170 85 0
949 0 0 0 0 0 0 0 0 0 85 85 85 94885 255 85 170 85 0 170 85 0 0 0 0 0 0 0 0 0 0
950 0 0 0 85 85 85 0 0 0 0 0 0 9490 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
951170 170 170 255 255 255 255 255 255 255 255 255 9500 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
952255 255 255 255 255 255 255 255 255 255 255 255 9510 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
953255 255 255 255 255 255 255 255 255 255 255 255 9520 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
954255 255 255 255 255 255 255 255 255 255 255 255 9530 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
955255 255 255 255 255 255 255 255 255 255 255 255 9540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
956255 255 255 255 255 255 255 255 255 255 255 255 9550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
957255 255 255 255 255 255 255 255 255 255 255 255 9560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
958255 255 255 255 255 255 170 170 170 0 0 0 9570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
959 0 0 0 0 0 0 0 0 0 85 85 85 9580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
960 0 0 0 0 0 0 0 0 0 0 0 0 9590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
961 0 0 0 85 85 85 0 0 0 0 0 0 9600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
962 0 0 0 0 0 0 0 0 0 0 0 0 9610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
963 0 0 0 0 0 0 0 0 0 0 0 0 9620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
964 0 0 0 0 0 0 0 0 0 0 0 0 9630 0 0 0 0 0 0 0 0 0 0 0
965 0 0 0 0 0 0 0 0 0 0 0 0 9640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
966 0 0 0 0 0 0 0 0 0 0 0 0 9650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
967 0 0 0 0 0 0 0 0 0 0 0 0 9660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
968 0 0 0 0 0 0 0 0 0 0 0 0 9670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
969 0 0 0 0 0 0 85 85 85 0 0 0 9680 0 0 0 0 0 0 0 0 170 85 0 255 255 85 255 255 85
970 0 0 0 85 85 85 0 0 0 0 0 0 969255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
971255 255 255 255 255 255 255 255 255 255 255 255 970255 255 85 170 85 0 255 255 85 85 255 85 255 255 85 170 85 0
972255 255 255 255 255 255 255 255 255 255 255 255 971255 255 85 255 255 85 170 85 0 255 255 85 170 85 0 85 255 85
973255 255 255 255 255 255 170 170 170 255 255 255 972170 85 0 170 85 0 0 0 0 0 0 0 0 0 0 85 85 85
974255 255 255 255 255 255 255 255 255 255 255 255 9730 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
975255 255 255 255 255 255 255 255 255 255 255 255 9740 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
976255 255 255 255 255 255 255 255 255 255 255 255 9750 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
977255 255 255 255 255 255 255 255 255 255 255 255 9760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
978255 255 255 255 255 255 255 255 255 0 0 0 97785 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
979 0 0 0 0 0 0 0 0 0 85 85 85 9780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
980 0 0 0 0 0 0 0 0 0 0 0 0 9790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
981 0 0 0 85 85 85 0 0 0 0 0 0 9800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
982 0 0 0 0 0 0 0 0 0 0 0 0 9810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
983 0 0 0 0 0 0 0 0 0 0 0 0 9820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
984 0 0 0 0 0 0 0 0 0 0 0 0 9830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
985 0 0 0 0 0 0 0 0 0 0 0 0 9840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
986 0 0 0 0 0 0 0 0 0 0 0 0 9850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
987 0 0 0 0 0 0 0 0 0 0 0 0 9860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
988 0 0 0 0 0 0 0 0 0 0 0 0 9870 0 0 0 0 0 0 0 0 0 0 0
989 0 0 0 85 85 85 0 0 0 0 0 0 9880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
990 0 0 0 85 85 85 0 0 0 0 0 0 9890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
991255 255 255 255 255 255 255 255 255 255 255 255 9900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
992255 255 255 255 255 255 255 255 255 255 255 255 9910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
993255 255 255 255 255 255 170 170 170 255 255 255 9920 0 0 0 0 0 0 0 0 85 85 85 255 255 85 170 85 0
994255 255 255 255 255 255 255 255 255 255 255 255 993255 255 85 170 85 0 255 255 85 170 85 0 255 255 85 85 255 85
995255 255 255 255 255 255 255 255 255 255 255 255 994255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
996255 255 255 255 255 255 255 255 255 255 255 255 995255 255 85 170 85 0 255 255 85 85 255 85 170 85 0 170 85 0
997255 255 255 255 255 255 255 255 255 255 255 255 9960 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
998255 255 255 255 255 255 255 255 255 0 0 0 9970 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
999 0 0 0 0 0 0 0 0 0 85 85 85 9980 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
1000 0 0 0 0 0 0 0 0 0 0 0 0 9990 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1001 0 0 0 85 85 85 0 0 0 0 0 0 10000 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
1002 0 0 0 0 0 0 0 0 0 0 0 0 10010 0 0 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
1003 0 0 0 0 0 0 0 0 0 0 0 0 100285 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1004 0 0 0 0 0 0 0 0 0 0 0 0 10030 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1005 0 0 0 0 0 0 0 0 0 0 0 0 10040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1006 0 0 0 0 0 0 0 0 0 0 0 0 10050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1007 0 0 0 0 0 0 0 0 0 0 0 0 10060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1008 0 0 0 0 0 0 0 0 0 0 0 0 10070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1009 0 0 0 85 85 85 0 0 0 0 0 0 10080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1010 0 0 0 85 85 85 0 0 0 85 85 85 10090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1011255 255 255 255 255 255 255 255 255 255 255 255 10100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1012255 255 255 255 255 255 255 255 255 255 255 255 10110 0 0 0 0 0 0 0 0 0 0 0
1013255 255 255 255 255 255 170 170 170 255 255 255 10120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1014255 255 255 255 255 255 255 255 255 255 255 255 10130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1015255 255 255 255 255 255 255 255 255 255 255 255 10140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1016255 255 255 255 255 255 255 255 255 255 255 255 10150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1017255 255 255 255 255 255 255 255 255 255 255 255 10160 0 0 0 0 0 0 0 0 170 85 0 255 255 85 255 255 85
1018255 255 255 255 255 255 255 255 255 0 0 0 1017255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
1019 0 0 0 0 0 0 0 0 0 85 85 85 1018255 255 85 255 255 85 170 85 0 255 255 85 170 85 0 85 255 85
1020 0 0 0 0 0 0 0 0 0 0 0 0 1019255 255 85 85 255 85 170 85 0 170 85 0 85 255 85 170 85 0
1021 0 0 0 85 85 85 0 0 0 0 0 0 10200 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
1022 0 0 0 0 0 0 0 0 0 0 0 0 10210 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1023 0 0 0 0 0 0 0 0 0 0 0 0 102285 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1024 0 0 0 0 0 0 0 0 0 0 0 0 10230 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
1025 0 0 0 0 0 0 0 0 0 0 0 0 10240 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
1026 0 0 0 0 0 0 0 0 0 0 0 0 102585 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
1027 0 0 0 0 0 0 0 0 0 0 0 0 102685 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1028 0 0 0 0 0 0 0 0 0 0 0 0 10270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1029 0 0 0 85 85 85 0 0 0 0 0 0 10280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1030 0 0 0 85 85 85 0 0 0 85 85 85 10290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1031255 255 255 255 255 255 255 255 255 255 255 255 10300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1032255 255 255 255 255 255 255 255 255 255 255 255 10310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1033255 255 255 255 255 255 170 170 170 255 255 255 10320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1034255 255 255 255 255 255 255 255 255 255 255 255 10330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1035255 255 255 255 255 255 255 255 255 255 255 255 10340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1036255 255 255 255 255 255 255 255 255 255 255 255 10350 0 0 0 0 0 0 0 0 0 0 0
1037255 255 255 255 255 255 255 255 255 255 255 255 10360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1038255 255 255 255 255 255 255 255 255 0 0 0 10370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1039 0 0 0 0 0 0 0 0 0 85 85 85 10380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1040 0 0 0 0 0 0 0 0 0 0 0 0 10390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1041 0 0 0 85 85 85 0 0 0 0 0 0 10400 0 0 0 0 0 0 0 0 85 85 85 255 255 85 85 255 85
1042 0 0 0 0 0 0 0 0 0 0 0 0 1041255 255 85 255 255 85 85 255 85 255 255 85 255 255 85 255 255 85
1043 0 0 0 0 0 0 0 0 0 0 0 0 1042255 255 85 170 85 0 255 255 85 85 255 85 255 255 85 255 255 85
1044 0 0 0 0 0 0 0 0 0 0 0 0 1043170 85 0 170 85 0 85 255 85 170 85 0 0 0 0 0 0 0
1045 0 0 0 0 0 0 0 0 0 0 0 0 10440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1046 0 0 0 0 0 0 0 0 0 0 0 0 10450 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1047 0 0 0 0 0 0 0 0 0 0 0 0 10460 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
1048 0 0 0 0 0 0 0 0 0 0 0 0 10470 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1049 0 0 0 85 85 85 0 0 0 0 0 0 10480 0 0 85 85 85 85 85 85 170 170 170 170 170 170 170 170 170
1050 0 0 0 0 0 0 85 85 85 85 85 85 1049170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 85 85 85
1051255 255 255 255 255 255 255 255 255 255 255 255 105085 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1052255 255 255 255 255 255 255 255 255 255 255 255 10510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1053255 255 255 255 255 255 170 170 170 255 255 255 10520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1054255 255 255 255 255 255 255 255 255 255 255 255 10530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1055255 255 255 255 255 255 255 255 255 255 255 255 10540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1056255 255 255 255 255 255 255 255 255 255 255 255 10550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1057255 255 255 255 255 255 255 255 255 255 255 255 10560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1058255 255 255 255 255 255 255 255 255 0 0 0 10570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1059 0 0 0 0 0 0 0 0 0 85 85 85 10580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1060 0 0 0 0 0 0 0 0 0 0 0 0 10590 0 0 0 0 0 0 0 0 0 0 0
1061 0 0 0 85 85 85 0 0 0 0 0 0 10600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1062 0 0 0 0 0 0 0 0 0 0 0 0 10610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1063 0 0 0 0 0 0 0 0 0 0 0 0 10620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1064 0 0 0 0 0 0 0 0 0 0 0 0 10630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1065 0 0 0 0 0 0 0 0 0 0 0 0 10640 0 0 0 0 0 0 0 0 85 85 85 255 255 85 255 255 85
1066 0 0 0 0 0 0 0 0 0 0 0 0 1065170 85 0 255 255 85 255 255 85 170 85 0 255 255 85 170 85 0
1067 0 0 0 0 0 0 0 0 0 0 0 0 1066255 255 85 85 255 85 170 85 0 255 255 85 170 85 0 85 255 85
1068 0 0 0 0 0 0 0 0 0 0 0 0 1067170 85 0 170 85 0 0 0 0 0 0 0 0 0 0 0 0 0
1069 0 0 0 85 85 85 0 0 0 0 0 0 10680 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
1070 0 0 0 0 0 0 0 0 0 85 85 85 106985 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1071255 255 255 255 255 255 255 255 255 255 255 255 10700 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1072255 255 255 255 255 255 255 255 255 255 255 255 10710 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1073255 255 255 255 255 255 170 170 170 255 255 255 107285 85 85 0 0 0 170 170 170 170 170 170 170 170 170 170 170 170
1074255 255 255 255 255 255 255 255 255 255 255 255 1073170 170 170 170 170 170 170 170 170 85 85 85 85 85 85 85 85 85
1075255 255 255 255 255 255 255 255 255 255 255 255 107485 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1076255 255 255 255 255 255 255 255 255 255 255 255 10750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1077255 255 255 255 255 255 255 255 255 255 255 255 10760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1078255 255 255 255 255 255 255 255 255 0 0 0 10770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1079 85 85 85 85 85 85 85 85 85 85 85 85 10780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1080 85 85 85 0 0 0 0 0 0 0 0 0 10790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1081 0 0 0 85 85 85 0 0 0 0 0 0 10800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1082 0 0 0 0 0 0 0 0 0 0 0 0 10810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1083 0 0 0 0 0 0 0 0 0 0 0 0 10820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1084 0 0 0 0 0 0 0 0 0 0 0 0 10830 0 0 0 0 0 0 0 0 0 0 0
1085 0 0 0 0 0 0 0 0 0 0 0 0 10840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1086 0 0 0 0 0 0 0 0 0 0 0 0 10850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1087 0 0 0 0 0 0 0 0 0 0 0 0 10860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1088 0 0 0 0 0 0 0 0 0 0 0 0 10870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1089 0 0 0 85 85 85 0 0 0 170 85 0 10880 0 0 0 0 0 0 0 0 0 0 0 170 85 0 255 255 85
1090255 255 85 170 85 0 0 0 0 0 0 0 1089255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 85 255 85
1091 85 85 85 255 255 255 255 255 255 255 255 255 1090170 85 0 255 255 85 170 85 0 85 255 85 170 85 0 170 85 0
1092255 255 255 255 255 255 255 255 255 255 255 255 10910 170 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1093255 255 255 255 255 255 170 170 170 255 255 255 10920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1094255 255 255 255 255 255 255 255 255 255 255 255 10930 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
1095255 255 255 255 255 255 255 255 255 255 255 255 10940 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1096255 255 255 255 255 255 255 255 255 255 255 255 10950 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
1097255 255 255 255 255 255 255 255 255 255 255 255 10960 0 0 85 85 85 170 170 170 170 170 170 255 255 255 170 170 170
1098255 255 255 255 255 255 255 255 255 85 85 85 1097170 170 170 170 170 170 85 85 85 85 85 85 85 85 85 85 85 85
1099 0 0 0 0 0 0 0 0 0 0 0 0 10980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1100 0 0 0 85 85 85 85 85 85 0 0 0 10990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1101 0 0 0 85 85 85 0 0 0 0 0 0 11000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1102 0 0 0 0 0 0 0 0 0 0 0 0 11010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1103 0 0 0 0 0 0 0 0 0 0 0 0 11020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1104 0 0 0 0 0 0 0 0 0 0 0 0 11030 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1105 0 0 0 0 0 0 0 0 0 0 0 0 11040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1106 0 0 0 0 0 0 0 0 0 0 0 0 11050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1107 0 0 0 0 0 0 0 0 0 0 0 0 11060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1108 0 0 0 0 0 0 0 0 0 0 0 0 11070 0 0 0 0 0 0 0 0 0 0 0
1109 0 0 0 0 0 0 170 85 0 255 255 85 11080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1110170 85 0 255 255 85 170 85 0 0 0 0 11090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1111 0 0 0 85 85 85 255 255 255 255 255 255 11100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1112255 255 255 255 255 255 255 255 255 255 255 255 11110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1113255 255 255 255 255 255 170 170 170 255 255 255 11120 0 0 0 0 0 0 0 0 0 0 0 85 255 85 255 255 85
1114255 255 255 255 255 255 255 255 255 255 255 255 1113170 85 0 255 255 85 255 255 85 170 85 0 85 255 85 170 85 0
1115255 255 255 255 255 255 255 255 255 255 255 255 1114255 255 85 170 85 0 0 170 0 170 85 0 0 0 0 0 0 0
1116255 255 255 255 255 255 255 255 255 255 255 255 11150 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1117255 255 255 255 255 255 255 255 255 255 255 255 11160 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
1118255 255 85 170 85 0 255 255 85 0 0 0 111785 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1119 0 0 0 0 0 0 0 0 0 0 0 0 11180 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1120 0 0 0 0 0 0 85 85 85 85 85 85 111985 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1121 85 85 85 0 0 0 0 0 0 0 0 0 112085 85 85 0 0 0 170 170 170 170 170 170 170 170 170 85 85 85
1122 0 0 0 0 0 0 0 0 0 0 0 0 112185 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
1123 0 0 0 0 0 0 0 0 0 0 0 0 11220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1124 0 0 0 0 0 0 0 0 0 0 0 0 11230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1125 0 0 0 0 0 0 0 0 0 0 0 0 11240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1126 0 0 0 0 0 0 0 0 0 0 0 0 11250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1127 0 0 0 0 0 0 0 0 0 0 0 0 11260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1128 0 0 0 0 0 0 0 0 0 0 0 0 11270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1129 0 0 0 170 85 0 255 255 85 170 85 0 11280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1130255 255 85 170 85 0 255 255 85 170 85 0 11290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1131 0 0 0 0 0 0 85 85 85 255 255 255 11300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1132255 255 255 255 255 255 255 255 255 255 255 255 11310 0 0 0 0 0 0 0 0 0 0 0
1133255 255 255 255 255 255 255 255 255 255 255 255 11320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1134255 255 255 255 255 255 255 255 255 255 255 255 11330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1135255 255 255 255 255 255 255 255 255 255 255 255 11340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1136255 255 255 255 255 255 255 255 255 255 255 255 11350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1137255 255 255 255 255 255 255 255 255 255 255 85 11360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 255 255 85
1138170 85 0 255 255 85 170 85 0 0 0 0 1137255 255 85 255 255 85 255 255 85 255 255 85 170 85 0 170 85 0
1139 0 0 0 0 0 0 0 0 0 0 0 0 11380 170 0 85 85 85 85 85 85 0 0 0 0 0 0 85 85 85
1140 0 0 0 0 0 0 0 0 0 0 0 0 11390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1141170 85 0 0 0 0 0 0 0 0 0 0 11400 0 0 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
1142 0 0 0 0 0 0 0 0 0 0 0 0 114185 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
1143 0 0 0 0 0 0 0 0 0 0 0 0 114285 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1144 0 0 0 0 0 0 0 0 0 0 0 0 11430 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1145 0 0 0 0 0 0 0 0 0 0 0 0 11440 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1146 0 0 0 0 0 0 0 0 0 0 0 0 114585 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1147 0 0 0 0 0 0 0 0 0 0 0 0 11460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1148 0 0 0 0 0 0 0 0 0 0 0 0 11470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1149170 85 0 255 255 85 170 85 0 255 255 85 11480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1150170 85 0 255 255 85 170 85 0 255 255 85 11490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1151170 85 0 0 0 0 0 0 0 85 85 85 11500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1152255 255 255 255 255 255 255 255 255 255 255 255 11510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1153255 255 255 255 255 255 255 255 255 255 255 255 11520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1154255 255 255 255 255 255 255 255 255 255 255 255 11530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1155255 255 255 255 255 255 255 255 255 255 255 255 11540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1156255 255 255 255 255 255 255 255 255 255 255 255 11550 0 0 0 0 0 0 0 0 0 0 0
1157255 255 255 255 255 255 255 255 255 170 85 0 11560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1158255 255 85 170 85 0 255 255 85 0 0 0 11570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1159 0 0 0 0 0 0 0 0 0 0 0 0 11580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1160 0 0 0 0 0 0 0 0 0 170 85 0 11590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1161255 255 85 170 85 0 0 0 0 0 0 0 11600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1162 0 0 0 0 0 0 0 0 0 0 0 0 1161255 255 85 255 255 85 170 85 0 0 170 0 85 85 85 85 85 85
1163 0 0 0 0 0 0 0 0 0 0 0 0 116285 85 85 85 85 85 0 0 0 85 85 85 85 85 85 0 0 0
1164 0 0 0 0 0 0 0 0 0 0 0 0 116385 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
1165 0 0 0 0 0 0 0 0 0 0 0 0 116485 85 85 85 85 85 85 85 85 170 170 170 170 170 170 85 85 85
1166 0 0 0 0 0 0 0 0 0 0 0 0 1165170 170 170 170 170 170 170 170 170 170 170 170 85 85 85 85 85 85
1167 0 0 0 0 0 0 0 0 0 170 85 0 116685 85 85 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
1168255 255 85 170 85 0 255 255 85 170 85 0 116785 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1169255 255 85 170 85 0 255 255 85 170 85 0 116885 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1170255 255 85 170 85 0 255 255 85 170 85 0 11690 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1171255 255 85 0 0 0 0 0 0 0 0 0 117085 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1172 85 85 85 255 255 255 255 255 255 255 255 255 11710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1173255 255 255 255 255 255 255 255 255 255 255 255 11720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1174255 255 255 255 255 255 255 255 255 255 255 255 11730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1175255 255 255 255 255 255 255 255 255 255 255 255 11740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1176255 255 255 255 255 255 255 255 255 255 255 255 11750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1177255 255 255 255 255 255 255 255 255 255 255 85 11760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1178170 85 0 255 255 85 170 85 0 0 0 0 11770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1179 0 0 0 0 0 0 0 0 0 0 0 0 11780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1180 0 0 0 0 0 0 0 0 0 255 255 85 11790 0 0 0 0 0 0 0 0 0 0 0
1181170 85 0 255 255 85 0 0 0 0 0 0 11800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1182 0 0 0 0 0 0 0 0 0 0 0 0 11810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1183 0 0 0 0 0 0 0 0 0 0 0 0 11820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1184 0 0 0 0 0 0 0 0 0 0 0 0 11830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1185 0 0 0 0 0 0 0 0 0 0 0 0 11840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1186 0 0 0 0 0 0 0 0 0 0 0 0 11850 0 0 170 85 0 85 85 85 0 0 0 0 0 0 0 0 0
1187 0 0 0 0 0 0 170 85 0 255 255 85 118685 85 85 85 85 85 85 85 85 85 85 85 170 170 170 85 85 85
1188170 85 0 255 255 85 170 85 0 255 255 85 118785 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
1189170 85 0 255 255 85 170 85 0 255 255 85 1188170 170 170 170 170 170 170 170 170 170 170 170 255 255 255 255 255 255
1190170 85 0 255 255 85 170 85 0 255 255 85 1189255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 170 170 170
1191170 85 0 255 255 85 0 0 0 0 0 0 1190170 170 170 170 170 170 170 170 170 85 85 85 85 85 85 85 85 85
1192 0 0 0 85 85 85 255 255 255 255 255 255 11910 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1193255 255 255 255 255 255 255 255 255 255 255 255 11920 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1194255 255 255 255 255 255 255 255 255 255 255 255 11930 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1195255 255 255 255 255 255 255 255 255 255 255 255 11940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1196255 255 255 255 255 255 255 255 255 255 255 255 11950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1197255 255 255 255 255 255 170 170 170 170 85 0 11960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1198255 255 85 170 85 0 255 255 85 170 85 0 11970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1199 0 0 0 0 0 0 0 0 0 0 0 0 11980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1200 0 0 0 0 0 0 255 255 85 170 85 0 11990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1201255 255 85 170 85 0 0 0 0 0 0 0 12000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1202 0 0 0 0 0 0 0 0 0 0 0 0 12010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1203 0 0 0 0 0 0 0 0 0 0 0 0 12020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1204 0 0 0 0 0 0 0 0 0 0 0 0 12030 0 0 0 0 0 0 0 0 0 0 0
1205 0 0 0 0 0 0 0 0 0 0 0 0 12040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1206 0 0 0 0 0 0 0 0 0 0 0 0 12050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1207 0 0 0 0 0 0 255 255 85 170 85 0 12060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1208255 255 85 170 85 0 255 255 85 170 85 0 12070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1209255 255 85 170 85 0 255 255 85 170 85 0 12080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1210255 255 85 170 85 0 255 255 85 170 85 0 12090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1211255 255 85 170 85 0 255 255 85 0 0 0 121085 85 85 85 85 85 85 85 85 85 85 85 170 170 170 170 170 170
1212 0 0 0 0 0 0 85 85 85 255 255 255 1211255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 170 170 170
1213255 255 255 255 255 255 255 255 255 255 255 255 1212255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
1214255 255 255 255 255 255 255 255 255 255 255 255 1213255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
1215255 255 255 255 255 255 255 255 255 255 255 255 1214255 255 255 255 255 255 170 170 170 255 255 255 170 170 170 85 85 85
1216255 255 255 255 255 255 255 255 255 255 255 255 12150 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1217255 255 255 170 170 170 170 170 170 255 255 85 121685 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1218170 85 0 255 255 85 170 85 0 255 255 85 121785 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1219170 85 0 255 255 85 170 85 0 255 255 85 12180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1220170 85 0 255 255 85 170 85 0 255 255 85 12190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1221170 85 0 255 255 85 0 0 0 0 0 0 12200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1222 0 0 0 0 0 0 0 0 0 0 0 0 12210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1223 0 0 0 0 0 0 0 0 0 0 0 0 12220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1224 0 0 0 0 0 0 0 0 0 0 0 0 12230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1225 0 0 0 0 0 0 0 0 0 0 0 0 12240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1226 0 0 0 0 0 0 0 0 0 0 0 0 12250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1227 0 0 0 0 0 0 170 85 0 255 255 85 12260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1228170 85 0 255 255 85 170 85 0 255 255 85 12270 0 0 0 0 0 0 0 0 0 0 0
1229170 85 0 255 255 85 170 85 0 255 255 85 12280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1230170 85 0 255 255 85 170 85 0 255 255 85 12290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1231170 85 0 255 255 85 170 85 0 0 0 0 12300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1232 0 0 0 0 0 0 0 0 0 85 85 85 12310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1233255 255 255 255 255 255 255 255 255 255 255 255 12320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1234255 255 255 255 255 255 255 255 255 255 255 255 12330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1235255 255 255 255 255 255 255 255 255 255 255 255 123485 85 85 85 85 85 85 85 85 85 85 85 170 170 170 170 170 170
1236255 255 255 255 255 255 255 255 255 255 255 255 1235255 255 255 170 170 170 255 255 255 255 255 255 255 255 255 255 255 255
1237255 255 255 170 170 170 170 170 170 170 85 0 1236255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 170 170 170
1238255 255 85 170 85 0 255 255 85 170 85 0 1237255 255 255 255 255 255 170 170 170 255 255 255 255 255 255 255 255 255
1239255 255 85 170 85 0 255 255 85 170 85 0 1238255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 85 85 85
1240255 255 85 170 85 0 255 255 85 170 85 0 12390 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1241255 255 85 170 85 0 255 255 85 0 0 0 12400 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1242 0 0 0 0 0 0 0 0 0 0 0 0 12410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1243 0 0 0 0 0 0 0 0 0 0 0 0 124285 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1244 0 0 0 0 0 0 0 0 0 0 0 0 12430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1245 0 0 0 0 0 0 0 0 0 0 0 0 12440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1246 0 0 0 0 0 0 0 0 0 0 0 0 12450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1247 0 0 0 0 0 0 255 255 85 170 85 0 12460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1248255 255 85 170 85 0 255 255 85 170 85 0 12470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1249255 255 85 170 85 0 255 255 85 170 85 0 12480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1250255 255 85 170 85 0 255 255 85 170 85 0 12490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1251255 255 85 170 85 0 255 255 85 170 85 0 12500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1252 0 0 0 0 0 0 0 0 0 0 0 0 12510 0 0 0 0 0 0 0 0 0 0 0
1253 0 0 0 255 255 255 255 255 255 255 255 255 12520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1254255 255 255 255 255 255 255 255 255 255 255 255 12530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1255255 255 255 255 255 255 255 255 255 255 255 255 12540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1256255 255 255 255 255 255 255 255 255 255 255 255 12550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1257255 255 255 170 170 170 170 170 170 255 255 85 12560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1258170 85 0 255 255 85 170 85 0 255 255 85 12570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1259170 85 0 255 255 85 170 85 0 255 255 85 125885 85 85 85 85 85 85 85 85 85 85 85 85 85 85 170 170 170
1260170 85 0 255 255 85 170 85 0 255 255 85 1259170 170 170 170 170 170 255 255 255 170 170 170 255 255 255 170 170 170
1261170 85 0 255 255 85 170 85 0 255 255 85 1260255 255 255 170 170 170 255 255 255 170 170 170 255 255 255 255 255 255
1262 0 0 0 0 0 0 0 0 0 0 0 0 1261255 255 255 170 170 170 255 255 255 170 170 170 255 255 255 170 170 170
1263 0 0 0 0 0 0 0 0 0 0 0 0 1262170 170 170 170 170 170 170 170 170 170 170 170 85 85 85 85 85 85
1264 0 0 0 0 0 0 0 0 0 0 0 0 12630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1265 0 0 0 0 0 0 0 0 0 0 0 0 126485 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1266 0 0 0 0 0 0 0 0 0 0 0 0 126585 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1267 0 0 0 0 0 0 170 85 0 255 255 85 12660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1268170 85 0 255 255 85 170 85 0 255 255 85 12670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1269170 85 0 255 255 85 170 85 0 255 255 85 12680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1270170 85 0 255 255 85 170 85 0 255 255 85 12690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1271170 85 0 255 255 85 170 85 0 255 255 85 12700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1272170 85 0 0 0 0 0 0 0 0 0 0 12710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1273 0 0 0 255 255 255 255 255 255 255 255 255 12720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1274255 255 255 255 255 255 255 255 255 255 255 255 12730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1275255 255 255 255 255 255 255 255 255 255 255 255 12740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1276255 255 255 255 255 255 255 255 255 255 255 255 12750 0 0 0 0 0 0 0 0 0 0 0
1277255 255 255 170 170 170 170 170 170 170 85 0 12760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1278255 255 85 170 85 0 255 255 85 170 85 0 12770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1279255 255 85 170 85 0 255 255 85 170 85 0 12780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1280255 255 85 170 85 0 255 255 85 170 85 0 12790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1281255 255 85 170 85 0 255 255 85 170 85 0 12800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1282255 255 85 0 0 0 0 0 0 0 0 0 12810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1283 0 0 0 0 0 0 0 0 0 0 0 0 128285 85 85 85 85 85 85 85 85 0 0 0 85 85 85 85 85 85
1284 0 0 0 0 0 0 0 0 0 0 0 0 128385 85 85 85 85 85 85 85 85 170 170 170 170 170 170 170 170 170
1285 0 0 0 0 0 0 0 0 0 0 0 0 1284170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
1286 0 0 0 0 0 0 0 0 0 0 0 0 1285170 170 170 170 170 170 170 170 170 170 170 170 85 85 85 170 170 170
1287 0 0 0 0 0 0 255 255 85 170 85 0 1286170 170 170 170 170 170 85 85 85 0 0 0 85 85 85 0 0 0
1288255 255 85 170 85 0 255 255 85 170 85 0 12870 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1289255 255 85 170 85 0 255 255 85 170 85 0 12880 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
1290255 255 85 170 85 0 255 255 85 170 85 0 12890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1291255 255 85 170 85 0 255 255 85 170 85 0 12900 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
1292255 255 85 0 0 0 0 0 0 0 0 0 12910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1293 85 85 85 255 255 255 255 255 255 255 255 255 12920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1294255 255 255 255 255 255 255 255 255 255 255 255 12930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1295255 255 255 255 255 255 255 255 255 255 255 255 12940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1296255 255 255 255 255 255 255 255 255 255 255 255 12950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1297255 255 255 170 170 170 85 85 85 255 255 85 12960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1298170 85 0 255 255 85 170 85 0 255 255 85 12970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1299170 85 0 255 255 85 170 85 0 255 255 85 12980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1300170 85 0 255 255 85 170 85 0 255 255 85 12990 0 0 0 0 0 0 0 0 0 0 0
1301170 85 0 255 255 85 170 85 0 255 255 85 13000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1302170 85 0 255 255 85 0 0 0 0 0 0 13010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1303 0 0 0 0 0 0 0 0 0 0 0 0 13020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1304 0 0 0 0 0 0 0 0 0 0 0 0 13030 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1305 0 0 0 0 0 0 0 0 0 0 0 0 13040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1306 0 0 0 0 0 0 0 0 0 0 0 0 13050 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
1307 0 0 0 0 0 0 170 85 0 255 255 85 1306170 170 170 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
1308170 85 0 255 255 85 170 85 0 255 255 85 13070 0 0 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
1309170 85 0 255 255 85 170 85 0 255 255 85 130885 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
1310170 85 0 255 255 85 170 85 0 255 255 85 130985 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
1311170 85 0 255 255 85 170 85 0 255 255 85 13100 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1312170 85 0 255 255 85 85 85 85 85 85 85 131185 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1313255 255 255 255 255 255 255 255 255 255 255 255 13120 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1314255 255 255 255 255 255 255 255 255 255 255 255 131385 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1315255 255 255 255 255 255 255 255 255 255 255 255 13140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1316255 255 255 255 255 255 255 255 255 255 255 255 13150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1317170 170 170 85 85 85 85 85 85 170 85 0 13160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1318255 255 85 170 85 0 255 255 85 170 85 0 13170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1319255 255 85 170 85 0 255 255 85 170 85 0 13180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1320255 255 85 170 85 0 255 255 85 170 85 0 13190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1321255 255 85 170 85 0 255 255 85 170 85 0 13200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1322255 255 85 170 85 0 255 255 85 170 85 0 13210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1323 0 0 0 0 0 0 0 0 0 0 0 0 13220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1324 0 0 0 0 0 0 0 0 0 0 0 0 13230 0 0 0 0 0 0 0 0 0 0 0
1325 0 0 0 0 0 0 0 0 0 0 0 0 13240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1326 0 0 0 0 0 0 0 0 0 0 0 0 13250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1327 0 0 0 0 0 0 255 255 85 170 85 0 13260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1328255 255 85 170 85 0 255 255 85 170 85 0 13270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1329255 255 85 170 85 0 255 255 85 170 85 0 13280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1330255 255 85 170 85 0 255 255 85 170 85 0 13290 0 0 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85
1331255 255 85 170 85 0 255 255 85 170 85 0 133085 85 85 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
1332255 255 85 170 85 0 255 255 85 255 255 255 133185 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1333255 255 255 255 255 255 255 255 255 255 255 255 133285 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
1334255 255 255 255 255 255 255 255 255 255 255 255 13330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1335255 255 255 255 255 255 255 255 255 255 255 255 133485 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1336255 255 255 255 255 255 255 255 255 170 170 170 13350 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
1337 85 85 85 0 0 0 0 0 0 170 85 0 13360 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
1338170 85 0 255 255 85 170 85 0 255 255 85 13370 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1339170 85 0 255 255 85 170 85 0 255 255 85 133885 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1340170 85 0 255 255 85 170 85 0 255 255 85 13390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1341170 85 0 255 255 85 170 85 0 255 255 85 13400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1342170 85 0 255 255 85 170 85 0 255 255 85 13410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1343 0 0 0 0 0 0 0 0 0 0 0 0 13420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1344 0 0 0 0 0 0 0 0 0 0 0 0 13430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1345 0 0 0 0 0 0 0 0 0 0 0 0 13440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1346 0 0 0 0 0 0 0 0 0 0 0 0 13450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1347 0 0 0 0 0 0 170 85 0 255 255 85 13460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1348170 85 0 255 255 85 170 85 0 255 255 85 13470 0 0 0 0 0 0 0 0 0 0 0
1349170 85 0 255 255 85 170 85 0 255 255 85 13480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1350170 85 0 255 255 85 170 85 0 255 255 85 13490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1351170 85 0 255 255 85 170 85 0 255 255 85 13500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1352170 85 0 255 255 85 170 85 0 255 255 85 13510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1353255 255 255 255 255 255 255 255 255 255 255 255 13520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1354255 255 255 255 255 255 255 255 255 255 255 255 13530 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
1355255 255 255 255 255 255 255 255 255 255 255 255 135485 85 85 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
1356255 255 255 255 255 255 170 170 170 85 85 85 13550 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1357 0 0 0 0 0 0 0 0 0 170 85 0 13560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1358255 255 85 170 85 0 255 255 85 170 85 0 13570 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1359255 255 85 170 85 0 255 255 85 170 85 0 13580 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1360255 255 85 170 85 0 255 255 85 170 85 0 135985 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1361255 255 85 170 85 0 255 255 85 170 85 0 13600 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1362255 255 85 170 85 0 255 255 85 0 0 0 136185 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1363 0 0 0 0 0 0 0 0 0 0 0 0 13620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1364 0 0 0 0 0 0 0 0 0 0 0 0 13630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1365 0 0 0 0 0 0 0 0 0 0 0 0 13640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1366 0 0 0 0 0 0 0 0 0 0 0 0 13650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1367 0 0 0 0 0 0 255 255 85 170 85 0 13660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1368255 255 85 170 85 0 255 255 85 170 85 0 13670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1369255 255 85 170 85 0 255 255 85 170 85 0 13680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1370255 255 85 170 85 0 255 255 85 170 85 0 13690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1371255 255 85 170 85 0 255 255 85 170 85 0 13700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1372255 255 85 170 85 0 255 255 85 170 85 0 13710 0 0 0 0 0 0 0 0 0 0 0
1373170 170 170 255 255 255 255 255 255 255 255 255 13720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1374255 255 255 255 255 255 255 255 255 255 255 255 13730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1375255 255 255 255 255 255 255 255 255 255 255 255 13740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1376170 170 170 85 85 85 85 85 85 0 0 0 13750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1377 0 0 0 0 0 0 0 0 0 170 85 0 13760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1378170 85 0 255 255 85 170 85 0 255 255 85 13770 0 0 0 0 0 85 85 85 85 85 85 170 170 170 85 85 85
1379170 85 0 255 255 85 170 85 0 255 255 85 137885 85 85 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
1380170 85 0 255 255 85 170 85 0 255 255 85 137985 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1381170 85 0 255 255 85 170 85 0 255 255 85 13800 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
1382170 85 0 255 255 85 0 0 0 0 0 0 13810 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1383 0 0 0 0 0 0 0 0 0 0 0 0 138285 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1384 0 0 0 0 0 0 0 0 0 0 0 0 13830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1385 0 0 0 0 0 0 0 0 0 0 0 0 138485 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1386 0 0 0 0 0 0 0 0 0 0 0 0 138585 85 85 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
1387 0 0 0 255 255 85 170 85 0 255 255 85 13860 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1388170 85 0 255 255 85 170 85 0 255 255 85 13870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1389170 85 0 255 255 85 170 85 0 255 255 85 13880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1390170 85 0 255 255 85 170 85 0 255 255 85 13890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1391170 85 0 255 255 85 170 85 0 255 255 85 13900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1392170 85 0 255 255 85 170 85 0 170 85 0 13910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1393170 85 0 170 170 170 255 255 255 255 255 255 13920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1394255 255 255 255 255 255 255 255 255 255 255 255 13930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1395255 255 255 255 255 255 170 170 170 85 85 85 13940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1396 85 85 85 0 0 0 0 0 0 0 0 0 13950 0 0 0 0 0 0 0 0 0 0 0
1397 0 0 0 0 0 0 85 85 85 170 85 0 13960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1398255 255 85 170 85 0 255 255 85 170 85 0 13970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1399255 255 85 170 85 0 255 255 85 170 85 0 13980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1400255 255 85 170 85 0 255 255 85 170 85 0 13990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1401255 255 85 170 85 0 255 255 85 170 85 0 14000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1402255 255 85 0 0 0 0 0 0 0 0 0 14010 0 0 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
1403 0 0 0 0 0 0 0 0 0 0 0 0 140285 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
1404 0 0 0 0 0 0 0 0 0 0 0 0 14030 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1405 0 0 0 0 0 0 0 0 0 0 0 0 14040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1406 0 0 0 0 0 0 0 0 0 0 0 0 14050 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1407 0 0 0 170 85 0 255 255 85 170 85 0 14060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1408255 255 85 170 85 0 255 255 85 170 85 0 140785 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1409255 255 85 170 85 0 255 255 85 170 85 0 14080 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1410255 255 85 170 85 0 255 255 85 170 85 0 14090 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1411255 255 85 170 85 0 255 255 85 170 85 0 141085 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1412255 255 85 170 85 0 255 255 85 170 85 0 141185 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1413170 85 0 0 0 0 0 0 0 0 0 0 14120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1414 0 0 0 0 0 0 0 0 0 0 0 0 14130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1415 0 0 0 0 0 0 0 0 0 0 0 0 14140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1416 0 0 0 0 0 0 0 0 0 0 0 0 14150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1417 0 0 0 0 0 0 85 85 85 170 85 0 14160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1418170 85 0 255 255 85 170 85 0 255 255 85 14170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1419170 85 0 255 255 85 170 85 0 255 255 85 14180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1420170 85 0 255 255 85 170 85 0 255 255 85 14190 0 0 0 0 0 85 85 85 85 85 85
1421170 85 0 170 85 0 170 85 0 0 0 0 14200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1422 0 0 0 0 0 0 0 0 0 0 0 0 14210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1423 0 0 0 0 0 0 0 0 0 0 0 0 14220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1424 0 0 0 0 0 0 0 0 0 0 0 0 14230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1425 0 0 0 0 0 0 0 0 0 0 0 0 14240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1426 0 0 0 0 0 0 0 0 0 0 0 0 14250 0 0 85 85 85 85 85 85 170 170 170 85 85 85 85 85 85
1427 0 0 0 255 255 85 170 85 0 255 255 85 142685 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
1428170 85 0 255 255 85 170 85 0 255 255 85 142785 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1429170 85 0 255 255 85 170 85 0 255 255 85 142885 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1430170 85 0 255 255 85 170 85 0 255 255 85 142985 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1431170 85 0 255 255 85 170 85 0 255 255 85 143085 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1432170 85 0 255 255 85 170 85 0 170 85 0 14310 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1433170 85 0 0 0 0 0 0 0 0 0 0 143285 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1434 0 0 0 0 0 0 0 0 0 0 0 0 143385 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1435 0 0 0 0 0 0 0 0 0 0 0 0 14340 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1436 0 0 0 0 0 0 0 0 0 0 0 0 14350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1437 0 0 0 0 0 0 85 85 85 170 85 0 14360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1438255 255 85 170 85 0 255 255 85 170 85 0 14370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1439255 255 85 170 85 0 255 255 85 170 85 0 14380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1440255 255 85 170 85 0 255 255 85 170 85 0 14390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1441170 85 0 0 0 0 0 0 0 0 0 0 14400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1442 0 0 0 0 0 0 0 0 0 0 0 0 14410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1443 0 0 0 0 0 0 0 0 0 0 0 0 14420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1444 0 0 0 0 0 0 0 0 0 0 0 0 14430 0 0 85 85 85 170 170 170 170 170 170
1445 0 0 0 0 0 0 0 0 0 0 0 0 14440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1446 0 0 0 0 0 0 0 0 0 0 0 0 14450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1447 0 0 0 0 0 0 255 255 85 170 85 0 14460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1448255 255 85 170 85 0 255 255 85 170 85 0 14470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1449255 255 85 170 85 0 255 255 85 170 85 0 14480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1450255 255 85 170 85 0 255 255 85 170 85 0 14490 0 0 85 85 85 170 170 170 85 85 85 85 85 85 85 85 85
1451255 255 85 170 85 0 255 255 85 170 85 0 145085 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
1452255 255 85 170 85 0 255 255 85 170 85 0 14510 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1453170 85 0 0 0 0 0 0 0 0 0 0 14520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1454 0 0 0 0 0 0 0 0 0 0 0 0 14530 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1455 0 0 0 0 0 0 0 0 0 0 0 0 14540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1456 0 0 0 0 0 0 0 0 0 0 0 0 14550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1457 0 0 0 0 0 0 85 85 85 170 85 0 14560 0 0 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
1458170 85 0 255 255 85 170 85 0 255 255 85 14570 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
1459170 85 0 255 255 85 170 85 0 255 255 85 145885 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1460170 85 0 170 85 0 170 85 0 170 85 0 14590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1461 0 0 0 0 0 0 0 0 0 0 0 0 14600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1462 0 0 0 0 0 0 0 0 0 0 0 0 14610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1463 0 0 0 0 0 0 0 0 0 0 0 0 14620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1464 0 0 0 0 0 0 0 0 0 0 0 0 14630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1465 0 0 0 0 0 0 0 0 0 0 0 0 14640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1466 0 0 0 0 0 0 0 0 0 0 0 0 14650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1467 0 0 0 0 0 0 0 0 0 0 0 0 14660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1468 0 0 0 0 0 0 170 85 0 170 85 0 146785 85 85 170 170 170 255 255 255 170 170 170
1469170 85 0 170 85 0 170 85 0 170 85 0 14680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1470170 85 0 255 255 85 170 85 0 255 255 85 14690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1471170 85 0 255 255 85 170 85 0 255 255 85 14700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1472170 85 0 255 255 85 170 85 0 170 85 0 14710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1473170 85 0 0 0 0 0 0 0 0 0 0 14720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1474 85 85 85 85 85 85 85 85 85 85 85 85 147385 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
1475 85 85 85 85 85 85 85 85 85 85 85 85 147485 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1476 85 85 85 85 85 85 85 85 85 0 0 0 14750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1477 0 0 0 0 0 0 0 0 0 170 85 0 14760 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
1478170 85 0 170 85 0 255 255 85 170 85 0 14770 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1479255 255 85 170 85 0 255 255 85 170 85 0 14780 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
1480170 85 0 170 85 0 0 0 0 0 0 0 14790 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
1481 0 0 0 0 0 0 0 0 0 0 0 0 148085 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1482 0 0 0 0 0 0 0 0 0 0 0 0 148185 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
1483 0 0 0 0 0 0 0 0 0 0 0 0 14820 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1484 0 0 0 0 0 0 0 0 0 0 0 0 14830 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1485 0 0 0 0 0 0 0 0 0 0 0 0 14840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1486 0 0 0 0 0 0 0 0 0 0 0 0 14850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1487 0 0 0 0 0 0 0 0 0 0 0 0 14860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1488 0 0 0 0 0 0 0 0 0 0 0 0 14870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1489 0 0 0 0 0 0 170 85 0 170 85 0 14880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1490170 85 0 170 85 0 170 85 0 170 85 0 14890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1491170 85 0 170 85 0 255 255 85 170 85 0 14900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 170 170 170
1492255 255 85 170 85 0 170 85 0 170 85 0 1491170 170 170 255 255 255 170 170 170 170 170 170
1493 85 85 85 85 85 85 85 85 85 85 85 85 14920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1494 0 0 0 0 0 0 0 0 0 0 0 0 14930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1495 0 0 0 0 0 0 0 0 0 0 0 0 14940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1496 0 0 0 0 0 0 0 0 0 85 85 85 14950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1497 85 85 85 85 85 85 85 85 85 170 85 0 14960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1498170 85 0 170 85 0 170 85 0 255 255 85 149785 85 85 170 170 170 85 85 85 85 85 85 85 85 85 0 0 0
1499170 85 0 255 255 85 170 85 0 170 85 0 149885 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1500170 85 0 0 0 0 0 0 0 0 0 0 149985 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1501 0 0 0 0 0 0 0 0 0 0 0 0 15000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1502 0 0 0 0 0 0 0 0 0 0 0 0 15010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1503 0 0 0 0 0 0 0 0 0 0 0 0 15020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1504 0 0 0 0 0 0 0 0 0 0 0 0 15030 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1505 0 0 0 0 0 0 0 0 0 0 0 0 15040 0 0 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
1506 0 0 0 0 0 0 0 0 0 0 0 0 15050 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
1507 0 0 0 0 0 0 0 0 0 0 0 0 15060 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1508 0 0 0 0 0 0 0 0 0 0 0 0 15070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1509 0 0 0 0 0 0 0 0 0 0 0 0 15080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1510 0 0 0 0 0 0 0 0 0 170 85 0 15090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1511170 85 0 170 85 0 170 85 0 170 85 0 15100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1512170 85 0 170 85 0 170 85 0 170 85 0 15110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1513 0 0 0 0 0 0 0 0 0 0 0 0 15120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1514 0 0 0 0 0 0 0 0 0 0 0 0 15130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1515 0 0 0 0 0 0 0 0 0 0 0 0 15140 0 0 0 0 0 0 0 0 0 0 0 170 170 170 170 170 170
1516 0 0 0 0 0 0 0 0 0 0 0 0 1515255 255 255 255 255 255 170 170 170 170 170 170
1517 0 0 0 0 0 0 0 0 0 170 85 0 15160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1518170 85 0 170 85 0 170 85 0 170 85 0 15170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1519170 85 0 170 85 0 170 85 0 170 85 0 15180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1520 0 0 0 0 0 0 0 0 0 0 0 0 15190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1521 0 0 0 0 0 0 0 0 0 0 0 0 15200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1522 0 0 0 0 0 0 0 0 0 0 0 0 152185 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
1523 0 0 0 0 0 0 0 0 0 0 0 0 152285 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1524 0 0 0 0 0 0 0 0 0 0 0 0 15230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1525 0 0 0 0 0 0 0 0 0 0 0 0 152485 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1526 0 0 0 0 0 0 0 0 0 0 0 0 15250 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1527 0 0 0 0 0 0 0 0 0 0 0 0 152685 85 85 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1528 0 0 0 0 0 0 0 0 0 0 0 0 15270 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
1529 0 0 0 0 0 0 0 0 0 0 0 0 15280 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1530 0 0 0 0 0 0 0 0 0 0 0 0 152985 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
1531 0 0 0 170 85 0 170 85 0 170 85 0 15300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1532170 85 0 170 85 0 170 85 0 0 0 0 153185 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1533 0 0 0 0 0 0 0 0 0 0 0 0 15320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1534 0 0 0 0 0 0 0 0 0 0 0 0 15330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1535 0 0 0 0 0 0 0 0 0 0 0 0 15340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1536 0 0 0 0 0 0 0 0 0 0 0 0 15350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1537 0 0 0 0 0 0 0 0 0 0 0 0 15360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1538170 85 0 170 85 0 170 85 0 170 85 0 15370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1539170 85 0 170 85 0 170 85 0 0 0 0 15380 0 0 0 0 0 85 85 85 170 170 170 170 170 170 255 255 255
1540 0 0 0 0 0 0 0 0 0 0 0 0 1539255 255 255 170 170 170 170 170 170 0 0 0
1541 0 0 0 0 0 0 0 0 0 0 0 0 15400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1542 0 0 0 0 0 0 0 0 0 0 0 0 15410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1543 0 0 0 0 0 0 0 0 0 0 0 0 15420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1544 0 0 0 0 0 0 0 0 0 0 0 0 15430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1545 0 0 0 0 0 0 0 0 0 0 0 0 15440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1546 0 0 0 0 0 0 0 0 0 0 0 0 1545170 170 170 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
1547 0 0 0 0 0 0 0 0 0 0 0 0 15460 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1548 0 0 0 0 0 0 0 0 0 0 0 0 154785 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1549 0 0 0 0 0 0 0 0 0 0 0 0 15480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1550 0 0 0 0 0 0 0 0 0 0 0 0 154985 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1551 0 0 0 0 0 0 0 0 0 0 0 0 15500 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1552 0 0 0 0 0 0 0 0 0 0 0 0 15510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1553 0 0 0 0 0 0 0 0 0 0 0 0 15520 0 0 85 85 85 0 0 0 0 0 0 85 85 85 85 85 85
1554 0 0 0 0 0 0 0 0 0 0 0 0 15530 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
1555 0 0 0 0 0 0 0 0 0 0 0 0 155485 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1556 0 0 0 0 0 0 0 0 0 0 0 0 15550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1557 0 0 0 0 0 0 0 0 0 0 0 0 15560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1558 0 0 0 0 0 0 0 0 0 0 0 0 15570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1559 0 0 0 0 0 0 0 0 0 0 0 0 15580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1560 0 0 0 0 0 0 0 0 0 0 0 0 15590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1561 0 0 0 0 0 0 0 0 0 0 0 0 15600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1562 0 0 0 0 0 0 0 0 0 0 0 0 15610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1563 0 0 0 0 0 0 0 0 0 0 0 0 15620 0 0 85 85 85 170 170 170 255 255 255 255 255 255 255 255 255
1564 0 0 0 0 0 0 0 0 0 0 0 0 1563170 170 170 170 170 170 85 85 85 0 0 0
1565 0 0 0 0 0 0 0 0 0 0 0 0 15640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1566 0 0 0 0 0 0 0 0 0 0 0 0 15650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1567 0 0 0 0 0 0 0 0 0 0 0 0 15660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1568 0 0 0 0 0 0 0 0 0 0 0 0 15670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1569 0 0 0 0 0 0 0 0 0 0 0 0 15680 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
1570 0 0 0 0 0 0 0 0 0 0 0 0 156985 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
1571 0 0 0 0 0 0 0 0 0 0 0 0 15700 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1572 0 0 0 0 0 0 0 0 0 0 0 0 15710 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
1573 0 0 0 0 0 0 0 0 0 0 0 0 15720 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1574 0 0 0 0 0 0 0 0 0 0 0 0 15730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1575 0 0 0 0 0 0 0 0 0 0 0 0 15740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1576 0 0 0 0 0 0 0 0 0 0 0 0 15750 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
1577 0 0 0 0 0 0 0 0 0 0 0 0 15760 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1578 0 0 0 0 0 0 0 0 0 0 0 0 157785 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1579 0 0 0 0 0 0 0 0 0 0 0 0 15780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1580 0 0 0 0 0 0 0 0 0 0 0 0 15790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1581 0 0 0 0 0 0 0 0 0 0 0 0 15800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1582 0 0 0 0 0 0 0 0 0 0 0 0 15810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1583 0 0 0 0 0 0 0 0 0 0 0 0 15820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1584 0 0 0 0 0 0 0 0 0 0 0 0 15830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1585 0 0 0 0 0 0 0 0 0 0 0 0 15840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1586 0 0 0 0 0 0 0 0 0 0 0 0 15850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1587 0 0 0 0 0 0 0 0 0 0 0 0 1586170 170 170 170 170 170 255 255 255 255 255 255 255 255 255 170 170 170
1588 0 0 0 0 0 0 0 0 0 0 0 0 1587170 170 170 170 170 170 0 0 0 0 0 0
1589 0 0 0 0 0 0 0 0 0 0 0 0 15880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1590 0 0 0 0 0 0 0 0 0 0 0 0 15890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1591 0 0 0 0 0 0 0 0 0 0 0 0 15900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1592 0 0 0 0 0 0 0 0 0 0 0 0 15910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1593 0 0 0 0 0 0 0 0 0 0 0 0 15920 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
1594 0 0 0 0 0 0 0 0 0 0 0 0 159385 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
1595 0 0 0 0 0 0 0 0 0 0 0 0 15940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1596 0 0 0 0 0 0 0 0 0 0 0 0 15950 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1597 0 0 0 0 0 0 0 0 0 0 0 0 15960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1598 0 0 0 0 0 0 0 0 0 0 0 0 15970 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
1599 0 0 0 0 0 0 0 0 0 0 0 0 15980 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
1600 0 0 0 0 0 0 0 0 0 0 0 0 15990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1601 0 0 0 0 0 0 0 0 0 0 0 0 16000 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1602 0 0 0 0 0 0 0 0 0 0 0 0 160185 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
1603 0 0 0 0 0 0 0 0 0 0 0 0 16020 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
1604 0 0 0 0 0 0 0 0 0 0 0 0 16030 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
16040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16090 0 0 0 0 0 0 0 0 0 0 0 170 170 170 170 170 170
1610170 170 170 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170
1611170 170 170 0 0 0 0 0 0 0 0 0
16120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16160 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
161785 85 85 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
161885 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
16190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
162085 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
162185 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
162285 85 85 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
16230 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
16240 0 0 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
16250 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
16260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16330 0 0 0 0 0 85 85 85 170 170 170 170 170 170 170 170 170
1634255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170
16350 0 0 0 0 0 0 0 0 0 0 0
16360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16400 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
164185 85 85 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
16420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16430 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
16440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16480 0 0 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
164985 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
165085 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
16510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
165785 85 85 170 170 170 170 170 170 255 255 255 255 255 255 255 255 255
1658255 255 255 255 255 255 170 170 170 170 170 170 85 85 85 0 0 0
16590 0 0 0 0 0 0 0 0 0 0 0
16600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16630 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
16640 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
166585 85 85 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
166685 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
16670 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
16680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16690 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
16700 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
167185 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
167285 85 85 0 0 0 170 170 170 255 255 255 85 85 85 85 85 85
167385 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
167485 85 85 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
167585 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1681170 170 170 170 170 170 255 255 255 170 170 170 255 255 255 255 255 255
1682255 255 255 255 255 255 170 170 170 170 170 170 85 85 85 0 0 0
16830 0 0 0 0 0 0 0 0 0 0 0
16840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
168785 85 85 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
16880 0 0 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
168985 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
16900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16920 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
16930 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
16940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16950 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
16960 0 0 85 85 85 170 170 170 255 255 255 170 170 170 85 85 85
16970 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
1698255 255 255 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
16990 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
17000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17030 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17040 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
1705255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
1706170 170 170 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
17070 0 0 0 0 0 0 0 0 0 0 0
17080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
171185 85 85 255 255 255 170 170 170 85 85 85 0 0 0 0 0 0
17120 0 0 0 0 0 85 85 85 85 85 85 85 85 85 0 0 0
171385 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
17140 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
17150 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
17160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
171885 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
17190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
172085 85 85 85 85 85 255 255 255 255 255 255 255 255 255 85 85 85
172185 85 85 0 0 0 85 85 85 0 0 0 85 85 85 170 170 170
1722255 255 255 170 170 170 0 0 0 0 0 0 85 85 85 0 0 0
17230 0 0 85 85 85 170 170 170 85 85 85 0 0 0 0 0 0
17240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17280 0 0 0 0 0 85 85 85 0 0 0 85 85 85 170 170 170
1729170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 170 170 170
1730170 170 170 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
17310 0 0 0 0 0 0 0 0 0 0 0
17320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17330 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
17340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1735170 170 170 255 255 255 255 255 255 170 170 170 0 0 0 0 0 0
17360 0 0 0 0 0 85 85 85 85 85 85 85 85 85 0 0 0
173785 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
17380 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
17390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
17400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17410 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
17420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17430 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
174485 85 85 170 170 170 255 255 255 255 255 255 255 255 255 85 85 85
174585 85 85 0 0 0 85 85 85 0 0 0 85 85 85 255 255 255
1746255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
174785 85 85 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
17480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
175285 85 85 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
1753170 170 170 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170
175485 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17550 0 0 0 0 0 0 0 0 0 0 0
17560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17570 0 0 0 0 0 0 0 0 85 85 85 170 170 170 170 170 170
17580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1759170 170 170 255 255 255 255 255 255 255 255 255 85 85 85 0 0 0
17600 0 0 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
176185 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
17620 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
17630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17640 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
176585 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17660 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
17670 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
176885 85 85 170 170 170 255 255 255 255 255 255 255 255 255 170 170 170
17690 0 0 85 85 85 0 0 0 85 85 85 170 170 170 255 255 255
1770255 255 255 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
177185 85 85 255 255 255 255 255 255 0 0 0 0 0 0 0 0 0
17720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17750 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
17760 0 0 85 85 85 85 85 85 0 0 0 85 85 85 85 85 85
1777170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 85 85 85
17780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17790 0 0 0 0 0 0 0 0 0 0 0
17800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17810 0 0 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255
1782170 170 170 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
178385 85 85 255 255 255 255 255 255 255 255 255 255 255 255 0 0 0
17840 0 0 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
178585 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
17860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
17870 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
17880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
17910 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
179285 85 85 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170
179385 85 85 0 0 0 0 0 0 85 85 85 170 170 170 255 255 255
1794255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
1795170 170 170 255 255 255 170 170 170 0 0 0 0 0 0 0 0 0
179685 85 85 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
17970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
17990 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
180085 85 85 85 85 85 0 0 0 85 85 85 85 85 85 0 0 0
180185 85 85 85 85 85 170 170 170 85 85 85 85 85 85 0 0 0
18020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18030 0 0 0 0 0 0 0 0 0 0 0
18040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18050 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
1806255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
180785 85 85 170 170 170 255 255 255 255 255 255 255 255 255 170 170 170
18080 0 0 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
180985 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
18100 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
18110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
18120 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
18130 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
181485 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18150 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
1816170 170 170 170 170 170 255 255 255 170 170 170 255 255 255 85 85 85
18170 0 0 85 85 85 0 0 0 85 85 85 170 170 170 255 255 255
1818170 170 170 170 170 170 0 0 0 0 0 0 0 0 0 85 85 85
1819170 170 170 255 255 255 255 255 255 0 0 0 0 0 0 85 85 85
1820255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
18210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18220 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
182385 85 85 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
182485 85 85 0 0 0 85 85 85 85 85 85 0 0 0 85 85 85
18250 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
18260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18270 0 0 0 0 0 0 0 0 0 0 0
18280 0 0 0 0 0 0 0 0 85 85 85 85 85 85 0 0 0
18290 0 0 0 0 0 0 0 0 0 0 0 85 85 85 255 255 255
1830255 255 255 255 255 255 170 170 170 0 0 0 0 0 0 0 0 0
183185 85 85 170 170 170 255 255 255 170 170 170 170 170 170 170 170 170
183285 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
183385 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
18340 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
18350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
18370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18380 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
183985 85 85 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
184085 85 85 170 170 170 255 255 255 170 170 170 170 170 170 85 85 85
184185 85 85 0 0 0 85 85 85 85 85 85 85 85 85 170 170 170
1842170 170 170 85 85 85 85 85 85 0 0 0 0 0 0 85 85 85
1843170 170 170 170 170 170 85 85 85 0 0 0 0 0 0 170 170 170
1844170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18460 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
18470 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
18480 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
184985 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18510 0 0 0 0 0 0 0 0 0 0 0
18520 0 0 0 0 0 0 0 0 0 0 0 170 170 170 170 170 170
185385 85 85 0 0 0 0 0 0 0 0 0 0 0 0 170 170 170
1854255 255 255 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
18550 0 0 85 85 85 170 170 170 170 170 170 255 255 85 85 85 85
185685 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
185785 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
18580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18590 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
18600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18610 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
18620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
186385 85 85 0 0 0 85 85 85 85 85 85 0 0 0 85 85 85
186485 85 85 170 170 170 170 170 170 170 170 170 170 85 0 85 85 85
18650 0 0 85 85 85 0 0 0 85 85 85 170 170 170 170 85 0
1866170 170 170 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
1867170 85 0 170 170 170 85 85 85 0 0 0 85 85 85 85 85 85
1868170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
18700 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
187185 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
187285 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
18730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18750 0 0 0 0 0 0 0 0 0 0 0
18760 0 0 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255
1877170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
1878255 255 255 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
18790 0 0 85 85 85 170 85 0 170 170 170 170 170 170 85 85 85
188085 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
188185 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
18820 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
18830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
18840 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
18850 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
18860 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
188785 85 85 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
188885 85 85 170 85 0 85 255 85 170 85 0 170 170 170 85 85 85
188985 85 85 0 0 0 0 0 0 85 85 85 170 85 0 85 255 85
1890170 85 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
189185 85 85 85 85 85 170 85 0 0 0 0 85 85 85 85 85 85
189285 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18930 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
18940 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
18950 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
18960 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
18970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
18990 0 0 0 0 0 0 0 0 0 0 0
19000 0 0 0 0 0 0 0 0 0 0 0 85 85 85 255 255 255
1901255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
1902170 170 170 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
19030 0 0 0 0 0 170 170 170 170 85 0 170 170 170 170 85 0
190485 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
190585 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
19060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
190785 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
191085 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
191185 85 85 0 0 0 85 85 85 85 85 85 85 85 85 0 0 0
191285 85 85 85 85 85 255 85 85 170 170 170 85 255 85 170 85 0
191385 85 85 85 85 85 170 85 0 85 85 85 170 170 170 85 85 85
1914170 170 170 170 85 0 85 85 85 85 85 85 85 85 85 85 85 85
1915170 85 0 85 255 85 85 85 85 85 85 85 85 85 85 170 85 0
191685 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
19170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
191885 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
19190 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
19200 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
19210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19230 0 0 0 0 0 0 0 0 0 0 0
192485 85 85 85 85 85 0 0 0 0 0 0 0 0 0 170 170 170
1925255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
192685 85 85 170 85 0 170 170 170 170 85 0 85 85 85 0 0 0
192785 85 85 85 85 85 85 255 85 170 170 170 170 170 170 170 85 0
192885 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
192985 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
193085 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19310 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
19320 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
19330 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
19340 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
19350 0 0 85 85 85 85 85 85 0 0 0 85 85 85 85 85 85
193685 85 85 85 85 85 85 255 85 255 85 85 170 170 170 170 170 170
1937170 170 170 85 255 85 170 170 170 170 85 0 170 170 170 170 85 0
1938170 170 170 85 85 85 85 255 85 170 85 0 170 170 170 170 85 0
1939170 170 170 170 170 170 170 85 0 85 85 85 85 85 85 85 255 85
194085 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19410 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
19420 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
19430 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
19440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19470 0 0 0 0 0 0 0 0 0 0 0
19480 0 0 170 170 170 170 170 170 0 0 0 0 0 0 85 85 85
1949170 170 170 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
195085 85 85 85 85 85 255 255 85 85 85 85 85 85 85 85 85 85
195185 255 85 255 85 85 170 170 170 170 85 0 170 170 170 85 255 85
195285 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
195385 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
19540 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
19550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19560 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
19570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19580 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
195985 85 85 0 0 0 85 85 85 85 85 85 85 85 85 0 0 0
196085 85 85 85 85 85 170 85 0 170 170 170 170 170 170 255 255 85
1961170 170 170 255 85 85 170 170 170 170 170 170 255 255 85 170 170 170
196285 255 85 170 170 170 255 85 85 170 170 170 170 170 170 170 170 170
1963170 170 170 170 170 170 170 170 170 170 85 0 170 170 170 170 85 0
196485 85 85 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
19650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
196685 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
19670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19710 0 0 0 0 0 0 0 0 0 0 0
19720 0 0 85 85 85 170 170 170 85 85 85 0 0 0 85 85 85
197385 85 85 170 85 0 85 85 85 0 0 0 85 85 85 85 85 85
197485 85 85 170 85 0 170 170 170 170 170 170 255 255 85 170 170 170
1975170 170 170 170 170 170 255 255 85 170 170 170 170 170 170 255 85 85
197685 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
197785 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
197885 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19810 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
198285 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
198385 85 85 85 85 85 0 0 0 85 85 85 85 85 85 85 85 85
198485 85 85 85 85 85 170 170 170 255 255 85 170 170 170 170 170 170
1985170 170 170 255 255 85 170 170 170 170 170 170 170 170 170 170 85 0
1986170 170 170 255 255 85 170 170 170 255 255 85 170 170 170 255 255 85
1987170 170 170 255 255 85 170 170 170 170 170 170 85 255 85 170 85 0
198885 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19890 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
19900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
19910 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
19920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
19950 0 0 0 0 0 0 0 0 0 0 0
19960 0 0 0 0 0 170 170 170 85 85 85 85 85 85 0 0 0
199785 85 85 85 85 85 170 170 170 85 85 85 170 170 170 170 85 0
1998170 170 170 85 255 85 170 170 170 170 85 0 170 170 170 170 170 170
1999255 255 85 170 170 170 170 170 170 255 255 255 255 255 85 170 170 170
2000255 255 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
200185 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
20020 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
20030 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
20040 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
200585 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20060 0 0 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
20070 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
200885 85 85 170 85 0 170 170 170 170 170 170 170 170 170 255 255 255
2009170 170 170 255 255 255 255 255 85 170 170 170 255 255 85 170 170 170
2010255 255 85 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
2011170 170 170 170 170 170 170 170 170 255 85 85 170 170 170 170 170 170
201285 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
20130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20140 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
20150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20190 0 0 0 0 0 0 0 0 0 0 0
20200 0 0 0 0 0 85 85 85 85 85 85 170 85 0 85 85 85
202185 85 85 255 255 85 170 170 170 170 170 170 170 170 170 170 170 170
2022255 255 85 170 170 170 170 170 170 255 255 85 170 170 170 170 170 170
2023170 170 170 255 255 255 255 255 255 170 170 170 255 255 255 170 170 170
2024170 170 170 85 85 85 85 85 85 0 0 0 0 0 0 85 85 85
20250 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
20260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
203085 85 85 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
20310 0 0 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
203285 85 85 85 255 85 170 170 170 255 255 85 255 255 255 255 255 255
2033255 255 255 170 170 170 255 255 255 170 170 170 170 170 170 170 170 170
2034170 170 170 170 170 170 255 255 85 170 170 170 255 255 85 255 255 255
2035255 255 85 255 255 255 255 255 85 170 170 170 170 170 170 170 85 0
2036170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
203785 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
20380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20430 0 0 0 0 0 0 0 0 0 0 0
20440 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
204585 85 85 170 170 170 255 255 85 170 170 170 255 255 85 170 170 170
2046170 170 170 255 255 85 170 170 170 170 170 170 170 170 170 255 255 85
2047255 255 255 255 255 255 255 255 85 255 255 255 255 255 255 170 170 170
2048255 255 85 85 85 85 85 85 85 0 0 0 0 0 0 85 85 85
204985 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
20500 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
20510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20520 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
20530 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
205485 85 85 170 170 170 170 170 170 0 0 0 0 0 0 0 0 0
205585 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
205685 85 85 170 170 170 170 170 170 170 170 170 255 255 255 170 170 170
2057255 255 255 255 255 255 255 255 255 170 170 170 170 170 170 255 255 85
2058170 170 170 255 255 85 170 170 170 255 255 255 170 170 170 255 255 255
2059255 255 255 255 255 255 170 170 170 255 255 85 170 170 170 255 255 85
206085 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
20610 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
20620 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
20630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20670 0 0 0 0 0 0 0 0 0 0 0
20680 0 0 0 0 0 0 0 0 85 85 85 170 85 0 170 170 170
2069255 255 85 170 170 170 170 170 170 255 255 255 255 255 255 255 255 255
2070170 170 170 170 170 170 170 170 170 255 255 85 170 170 170 170 170 170
2071255 255 255 170 170 170 255 255 255 255 255 255 170 170 170 255 255 255
2072170 170 170 170 170 170 85 85 85 0 0 0 85 85 85 0 0 0
207385 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
20740 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
20750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
20770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
207885 85 85 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
20790 0 0 85 85 85 0 0 0 85 85 85 85 85 85 0 0 0
208085 85 85 170 85 0 255 255 255 170 170 170 255 255 255 255 255 255
2081255 255 85 255 255 255 170 170 170 255 255 85 170 170 170 170 170 170
2082170 170 170 170 170 170 170 170 170 255 255 85 255 255 255 255 255 255
2083170 170 170 255 255 255 255 255 255 170 170 170 170 170 170 170 170 170
208485 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20850 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
20860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20910 0 0 0 0 0 0 0 0 0 0 0
20920 0 0 0 0 0 0 0 0 85 85 85 85 255 85 170 170 170
2093170 170 170 255 255 85 170 170 170 255 255 255 170 170 170 255 255 255
2094255 255 255 255 255 255 255 255 85 170 170 170 170 170 170 255 255 255
2095170 170 170 255 255 255 255 255 255 170 170 170 255 255 255 255 255 85
2096170 170 170 170 85 0 85 85 85 0 0 0 0 0 0 85 85 85
20970 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
20980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
20990 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
21000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
210285 85 85 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
210385 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
210485 85 85 170 170 170 170 170 170 255 255 85 170 170 170 255 255 255
2105255 255 255 170 170 170 255 255 255 170 170 170 170 170 170 255 255 85
2106170 170 170 255 255 85 170 170 170 255 255 255 170 170 170 255 255 255
2107255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 255 255 85
210885 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
21090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
21100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21150 0 0 0 0 0 0 0 0 0 0 0
21160 0 0 0 0 0 0 0 0 85 85 85 170 85 0 170 170 170
2117170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
2118170 170 170 170 170 170 170 170 170 170 170 170 255 255 85 170 170 170
2119255 255 85 255 255 255 170 170 170 255 255 255 170 170 170 170 170 170
2120170 170 170 170 170 170 85 85 85 0 0 0 85 85 85 85 85 85
21210 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
21220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
212385 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21260 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
212785 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
212885 85 85 85 85 85 170 170 170 170 170 170 255 255 255 170 170 170
2129255 255 255 170 170 170 255 255 85 170 170 170 170 170 170 170 170 170
2130255 85 85 170 170 170 170 170 170 170 170 170 255 255 255 255 255 255
2131170 170 170 255 255 255 255 255 255 170 170 170 255 255 255 170 170 170
213285 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21330 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
21340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21390 0 0 0 0 0 0 0 0 0 0 0
21400 0 0 0 0 0 0 0 0 85 85 85 85 85 85 170 170 170
2141255 255 85 170 170 170 255 255 255 170 170 170 255 255 255 255 255 255
2142255 255 85 255 255 255 170 170 170 255 255 85 170 170 170 170 170 170
2143170 170 170 170 170 170 255 255 85 170 170 170 170 170 170 255 255 85
2144170 170 170 170 85 0 85 85 85 0 0 0 85 85 85 0 0 0
21450 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
214685 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21480 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
21490 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
21500 0 0 0 0 0 0 0 0 0 0 0 170 170 170 170 170 170
2151170 170 170 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
21520 0 0 85 85 85 170 170 170 255 255 85 170 170 170 170 170 170
2153255 255 85 170 170 170 170 170 170 170 170 170 170 170 170 255 85 85
215485 255 85 170 170 170 170 170 170 170 170 170 255 255 85 170 170 170
2155255 255 255 255 255 255 255 255 255 255 255 85 170 170 170 170 170 170
215685 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
21570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21630 0 0 0 0 0 0 0 0 0 0 0
21640 0 0 0 0 0 0 0 0 0 0 0 85 85 85 255 255 85
2165170 170 170 170 170 170 255 255 255 255 255 255 255 255 255 170 170 170
2166255 255 255 170 170 170 170 170 170 170 170 170 170 170 170 255 85 85
2167170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
2168170 170 170 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
216985 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
21700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
217285 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21740 0 0 0 0 0 0 0 0 170 170 170 170 170 170 170 170 170
217585 85 85 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
21760 0 0 85 85 85 170 85 0 170 170 170 170 170 170 170 170 170
2177170 170 170 170 170 170 170 170 170 170 85 0 170 170 170 85 255 85
2178255 85 85 170 170 170 255 255 85 170 170 170 170 170 170 255 255 255
2179255 255 255 170 170 170 255 255 255 255 255 255 170 170 170 170 170 170
21800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21870 0 0 0 0 0 0 0 0 0 0 0
21880 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
2189170 170 170 255 255 85 170 170 170 255 255 85 255 255 255 255 255 255
2190170 170 170 170 170 170 255 255 85 170 170 170 255 85 85 85 255 85
2191170 170 170 170 85 0 170 170 170 170 170 170 255 255 85 170 170 170
2192170 85 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
21930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21940 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
21950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
21990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
22000 0 0 85 85 85 85 85 85 85 85 85 170 170 170 255 255 85
2201170 170 170 170 85 0 170 170 170 170 170 170 170 85 0 85 85 85
2202170 170 170 170 85 0 85 85 85 170 170 170 170 170 170 170 170 170
2203170 170 170 255 255 255 255 255 255 255 255 85 170 170 170 170 170 170
22040 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
22050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22110 0 0 0 0 0 0 0 0 0 0 0
22120 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 85 0
2213170 170 170 170 170 170 255 255 255 170 170 170 255 255 255 170 170 170
2214255 255 255 170 170 170 170 170 170 170 85 0 170 170 170 85 85 85
2215170 170 170 170 170 170 170 85 0 170 170 170 170 85 0 85 85 85
221685 255 85 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
22170 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
22180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
222185 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22230 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
222485 85 85 0 0 0 85 85 85 170 85 0 85 85 85 170 170 170
2225170 85 0 170 170 170 85 255 85 170 85 0 170 170 170 85 85 85
2226170 85 0 170 170 170 170 170 170 255 255 85 170 170 170 255 255 255
2227255 255 85 255 255 255 170 170 170 170 170 170 170 170 170 170 85 0
22280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22350 0 0 0 0 0 0 0 0 0 0 0
22360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
2237170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 255 255 85
2238170 170 170 255 255 85 170 170 170 170 170 170 85 255 85 170 170 170
2239170 85 0 170 85 0 170 170 170 85 255 85 85 85 85 170 170 170
2240170 85 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
22410 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
22420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22460 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
22470 0 0 0 0 0 0 0 0 85 85 85 170 170 170 85 85 85
22480 0 0 0 0 0 0 0 0 85 85 85 170 85 0 85 85 85
2249170 170 170 170 85 0 170 170 170 85 85 85 170 170 170 170 85 0
2250170 170 170 85 255 85 170 85 0 170 170 170 170 170 170 170 170 170
2251255 255 255 170 170 170 255 255 255 255 255 255 170 170 170 85 85 85
22520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22590 0 0 0 0 0 0 0 0 0 0 0
22600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
2261170 85 0 170 170 170 255 255 85 170 170 170 255 255 255 170 170 170
2262170 170 170 170 170 170 170 170 170 170 85 0 170 170 170 170 85 0
2263170 170 170 85 255 85 170 85 0 170 170 170 170 85 0 85 85 85
226485 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
22650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22670 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
22680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22710 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
22720 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
227385 255 85 170 170 170 170 85 0 170 170 170 170 85 0 85 255 85
2274170 170 170 170 85 0 170 170 170 170 170 170 170 170 170 255 255 85
2275170 170 170 255 255 255 170 170 170 170 170 170 170 170 170 0 0 0
22760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22830 0 0 0 0 0 0 0 0 0 0 0
22840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
228585 85 85 170 85 0 85 85 85 170 170 170 255 255 85 170 170 170
2286170 170 170 255 255 85 170 170 170 170 170 170 170 170 170 170 85 0
2287170 170 170 85 85 85 170 170 170 170 85 0 170 170 170 85 85 85
2288170 85 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
22890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22960 0 0 0 0 0 85 85 85 0 0 0 85 85 85 170 85 0
229785 85 85 255 85 85 85 255 85 170 85 0 170 170 170 170 170 170
2298170 85 0 170 170 170 85 85 85 255 255 85 170 170 170 170 170 170
2299255 255 255 170 170 170 255 255 255 255 255 85 85 85 85 0 0 0
23000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23030 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23070 0 0 0 0 0 0 0 0 0 0 0
23080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23090 0 0 85 85 85 170 170 170 170 85 0 170 170 170 170 170 170
2310170 170 170 170 170 170 170 170 170 255 255 85 85 85 85 170 170 170
231185 255 85 255 85 85 170 170 170 85 255 85 255 85 85 85 255 85
231285 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23200 0 0 0 0 0 85 85 85 85 85 85 0 0 0 85 85 85
232185 85 85 85 255 85 255 85 85 170 170 170 85 255 85 170 85 0
2322170 170 170 170 170 170 255 255 85 170 170 170 170 170 170 255 255 255
2323170 170 170 255 255 255 170 170 170 170 170 170 85 85 85 0 0 0
23240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23310 0 0 0 0 0 0 0 0 0 0 0
23320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23330 0 0 0 0 0 85 85 85 170 170 170 85 85 85 255 255 85
2334170 170 170 255 255 85 170 170 170 170 170 170 170 170 170 255 255 85
233585 85 85 255 255 85 170 170 170 170 85 0 170 170 170 85 85 85
2336170 85 0 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
23370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
2345170 170 170 170 85 0 170 170 170 170 85 0 170 170 170 170 170 170
2346170 85 0 170 170 170 170 170 170 170 170 170 255 255 85 170 170 170
2347255 255 85 255 255 255 170 170 170 170 170 170 85 85 85 0 0 0
23480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23550 0 0 0 0 0 0 0 0 0 0 0
23560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23570 0 0 0 0 0 85 85 85 170 85 0 85 85 85 170 170 170
2358170 85 0 170 170 170 170 170 170 255 255 85 170 170 170 170 170 170
2359170 170 170 170 170 170 170 170 170 255 255 85 170 170 170 170 85 0
236085 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
23610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23680 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
2369170 85 0 85 255 85 170 170 170 170 170 170 255 255 85 170 170 170
2370255 255 85 170 170 170 170 170 170 170 170 170 255 255 255 255 255 255
2371255 255 255 170 170 170 255 255 85 85 85 85 0 0 0 0 0 0
23720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23790 0 0 0 0 0 0 0 0 0 0 0
23800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23810 0 0 0 0 0 0 0 0 85 85 85 85 85 85 170 85 0
2382170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 255 255 85
2383170 170 170 255 255 85 170 170 170 170 170 170 170 170 170 170 170 170
2384170 170 170 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
23850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
239385 85 85 170 85 0 170 170 170 170 85 0 170 170 170 170 170 170
2394170 170 170 255 255 85 170 170 170 255 255 85 170 170 170 255 255 255
2395170 170 170 255 255 255 170 170 170 85 85 85 0 0 0 0 0 0
23960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
23990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24030 0 0 0 0 0 0 0 0 0 0 0
24040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24050 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
2406170 85 0 170 170 170 170 85 0 255 255 85 170 170 170 170 170 170
2407170 170 170 170 170 170 255 255 85 170 170 170 255 255 85 170 170 170
2408255 255 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
24090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24160 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
241785 85 85 170 170 170 255 255 85 170 170 170 255 255 85 170 170 170
2418170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
2419170 170 170 170 170 170 170 170 170 0 0 0 0 0 0 0 0 0
24200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24270 0 0 0 0 0 0 0 0 0 0 0
24280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24290 0 0 0 0 0 0 0 0 0 0 0 0 170 0 85 85 85
2430170 85 0 85 255 85 170 170 170 170 170 170 170 170 170 255 255 85
2431255 255 255 170 170 170 255 255 255 170 170 170 255 255 255 170 170 170
2432170 170 170 255 255 85 85 85 85 0 0 0 0 0 0 0 0 0
24330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
2441170 85 0 170 170 170 170 170 170 170 170 170 170 170 170 255 255 85
2442170 170 170 255 255 255 170 170 170 255 255 255 170 170 170 255 255 255
2443255 255 255 255 255 85 85 85 85 0 0 0 0 0 0 0 0 0
24440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24470 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24510 0 0 0 0 0 0 0 0 0 0 0
24520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
245485 85 85 170 85 0 170 170 170 170 170 170 255 255 85 170 170 170
2455170 170 170 255 255 255 255 255 255 255 255 255 170 170 170 255 255 255
2456170 170 170 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
24570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24640 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 255 85
2465170 170 170 255 255 85 170 170 170 255 255 85 255 255 255 255 255 255
2466255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 170 170 170
2467170 170 170 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
24680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24750 0 0 0 0 0 0 0 0 0 0 0
24760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
247885 85 85 85 85 85 85 85 85 170 85 0 170 170 170 170 170 170
2479255 255 85 170 170 170 255 255 255 255 255 85 255 255 255 255 255 255
2480170 170 170 255 255 85 170 170 170 85 85 85 0 0 0 0 0 0
24810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24880 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 85 0
2489170 170 170 170 170 170 170 170 170 255 255 255 170 170 170 255 255 255
2490170 170 170 255 255 255 170 170 170 255 255 255 255 255 85 255 255 255
2491170 170 170 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
24920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
24990 0 0 0 0 0 0 0 0 0 0 0
25000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
250285 85 85 170 85 0 85 85 85 170 170 170 170 170 170 170 170 170
2503170 170 170 255 255 255 170 170 170 255 255 255 255 255 255 170 170 170
2504255 255 85 170 170 170 170 170 170 170 85 0 85 85 85 0 0 0
25050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25120 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
2513255 255 85 170 170 170 255 255 85 170 170 170 255 255 255 255 255 255
2514255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170
2515170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25230 0 0 0 0 0 0 0 0 0 0 0
25240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25260 0 0 85 85 85 85 85 85 85 85 85 170 85 0 170 170 170
2527255 255 85 170 170 170 255 255 85 255 255 255 170 170 170 255 255 255
2528170 170 170 170 170 170 170 170 170 170 170 170 0 0 0 0 0 0
25290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25360 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
2537170 85 0 170 170 170 255 255 255 170 170 170 255 255 255 170 170 170
2538255 255 255 255 255 255 170 170 170 255 255 255 255 255 85 170 170 170
253985 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25430 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25470 0 0 0 0 0 0 0 0 0 0 0
25480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25500 0 0 0 0 0 85 85 85 170 85 0 85 85 85 170 170 170
2551170 170 170 170 170 170 170 170 170 170 170 170 255 255 85 170 170 170
2552255 255 85 170 170 170 170 85 0 85 255 85 85 85 85 0 0 0
25530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25570 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25600 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 85 0
2561170 170 170 170 170 170 255 255 85 170 170 170 255 255 255 255 255 255
2562255 255 85 255 255 255 170 170 170 255 255 255 170 170 170 85 85 85
25630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25710 0 0 0 0 0 0 0 0 0 0 0
25720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25740 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
2575170 85 0 170 170 170 170 170 170 255 255 85 170 170 170 170 170 170
2576170 170 170 170 170 170 170 170 170 170 85 0 0 0 0 0 0 0
25770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25810 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25820 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25840 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
2585255 255 85 170 170 170 170 170 170 170 170 170 255 255 85 170 170 170
2586255 255 255 170 170 170 255 255 85 170 170 170 85 85 85 85 85 85
25870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25910 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25950 0 0 0 0 0 0 0 0 0 0 0
25960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25980 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
259985 85 85 170 85 0 170 170 170 170 170 170 170 170 170 170 170 170
2600170 85 0 170 170 170 170 85 0 85 85 85 0 0 0 0 0 0
26010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26030 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26080 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
2609170 170 170 170 170 170 255 255 85 170 170 170 170 170 170 170 170 170
2610170 170 170 255 255 255 170 170 170 170 170 170 85 85 85 0 0 0
26110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26150 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26190 0 0 0 0 0 0 0 0 0 0 0
26200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
262385 85 85 85 85 85 85 85 85 170 85 0 85 85 85 170 85 0
262485 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
26250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 170 85 0
263385 85 85 170 85 0 170 170 170 170 170 170 170 170 170 255 255 85
2634170 170 170 170 170 170 170 85 0 85 85 85 0 0 0 0 0 0
26350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26390 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26410 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26430 0 0 0 0 0 0 0 0 0 0 0
26440 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26450 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26470 0 0 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
264885 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
26490 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26500 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26530 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26540 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26550 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
265785 85 85 85 255 85 170 85 0 170 170 170 170 85 0 170 170 170
265885 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
26590 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26610 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26620 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26630 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26650 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26660 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26670 0 0 0 0 0 0 0 0 0 0 0
26680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26690 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26700 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26710 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26730 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26770 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26780 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26790 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26810 0 0 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
268285 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26830 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26850 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26860 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26870 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26890 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26910 0 0 0 0 0 0 0 0 0 0 0
26920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26930 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26940 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26950 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26970 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26980 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
26990 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27010 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27020 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27030 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27050 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27060 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27070 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27090 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27110 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27130 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27150 0 0 0 0 0 0 0 0 0 0 0
27160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27190 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27210 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27230 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27250 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27260 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27270 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27290 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27310 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27330 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27340 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27350 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27370 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27390 0 0 0 0 0 0 0 0 0 0 0
diff --git a/drivers/w1/masters/w1-gpio.c b/drivers/w1/masters/w1-gpio.c
index 9e1138a75e8b..a411702413d6 100644
--- a/drivers/w1/masters/w1-gpio.c
+++ b/drivers/w1/masters/w1-gpio.c
@@ -39,7 +39,7 @@ static u8 w1_gpio_read_bit(void *data)
39{ 39{
40 struct w1_gpio_platform_data *pdata = data; 40 struct w1_gpio_platform_data *pdata = data;
41 41
42 return gpio_get_value(pdata->pin); 42 return gpio_get_value(pdata->pin) ? 1 : 0;
43} 43}
44 44
45static int __init w1_gpio_probe(struct platform_device *pdev) 45static int __init w1_gpio_probe(struct platform_device *pdev)