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-rw-r--r--drivers/acpi/acpica/acconfig.h4
-rw-r--r--drivers/acpi/acpica/exregion.c35
-rw-r--r--drivers/acpi/power_meter.c6
-rw-r--r--drivers/acpi/proc.c2
-rw-r--r--drivers/acpi/processor_core.c2
-rw-r--r--drivers/acpi/processor_throttling.c6
-rw-r--r--drivers/acpi/sleep.c24
-rw-r--r--drivers/acpi/video.c8
-rw-r--r--drivers/ata/ahci.c40
-rw-r--r--drivers/ata/libata-core.c9
-rw-r--r--drivers/ata/sata_via.c1
-rw-r--r--drivers/bluetooth/btusb.c5
-rw-r--r--drivers/char/agp/intel-agp.c11
-rw-r--r--drivers/char/hvc_xen.c25
-rw-r--r--drivers/char/tty_port.c3
-rw-r--r--drivers/char/vt_ioctl.c6
-rw-r--r--drivers/cpufreq/cpufreq.c48
-rw-r--r--drivers/cpufreq/cpufreq_conservative.c4
-rw-r--r--drivers/cpufreq/cpufreq_ondemand.c4
-rw-r--r--drivers/edac/amd64_edac.c6
-rw-r--r--drivers/gpio/gpiolib.c8
-rw-r--r--drivers/gpu/drm/drm_crtc_helper.c1
-rw-r--r--drivers/gpu/drm/drm_fb_helper.c2
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c3
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h39
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h30
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c305
-rw-r--r--drivers/gpu/drm/i915/intel_bios.c14
-rw-r--r--drivers/gpu/drm/i915/intel_display.c178
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c2
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c10
-rw-r--r--drivers/gpu/drm/radeon/Makefile2
-rw-r--r--drivers/gpu/drm/radeon/atombios.h2
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c357
-rw-r--r--drivers/gpu/drm/radeon/mkregtable.c12
-rw-r--r--drivers/gpu/drm/radeon/r100.c42
-rw-r--r--drivers/gpu/drm/radeon/r300.c2
-rw-r--r--drivers/gpu/drm/radeon/r420.c2
-rw-r--r--drivers/gpu/drm/radeon/r500_reg.h9
-rw-r--r--drivers/gpu/drm/radeon/r520.c2
-rw-r--r--drivers/gpu/drm/radeon/r600.c108
-rw-r--r--drivers/gpu/drm/radeon/r600_blit.c58
-rw-r--r--drivers/gpu/drm/radeon/r600_blit_kms.c5
-rw-r--r--drivers/gpu/drm/radeon/r600_cs.c18
-rw-r--r--drivers/gpu/drm/radeon/r600d.h14
-rw-r--r--drivers/gpu/drm/radeon/radeon.h11
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h23
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c282
-rw-r--r--drivers/gpu/drm/radeon/radeon_benchmark.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_bios.c3
-rw-r--r--drivers/gpu/drm/radeon/radeon_clocks.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_combios.c287
-rw-r--r--drivers/gpu/drm/radeon/radeon_connectors.c199
-rw-r--r--drivers/gpu/drm/radeon/radeon_cursor.c10
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c29
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c28
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c125
-rw-r--r--drivers/gpu/drm/radeon/radeon_gart.c20
-rw-r--r--drivers/gpu/drm/radeon/radeon_irq_kms.c9
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_crtc.c40
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_encoders.c27
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h34
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c65
-rw-r--r--drivers/gpu/drm/radeon/radeon_reg.h6
-rw-r--r--drivers/gpu/drm/radeon/radeon_test.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c6
-rw-r--r--drivers/gpu/drm/radeon/rs400.c2
-rw-r--r--drivers/gpu/drm/radeon/rs600.c20
-rw-r--r--drivers/gpu/drm/radeon/rs690.c2
-rw-r--r--drivers/gpu/drm/radeon/rv515.c4
-rw-r--r--drivers/gpu/drm/radeon/rv770.c59
-rw-r--r--drivers/gpu/drm/radeon/rv770d.h5
-rw-r--r--drivers/gpu/drm/ttm/ttm_tt.c1
-rw-r--r--drivers/hwmon/adt7475.c17
-rw-r--r--drivers/hwmon/s3c-hwmon.c11
-rw-r--r--drivers/i2c/busses/Kconfig2
-rw-r--r--drivers/i2c/busses/i2c-piix4.c8
-rw-r--r--drivers/ide/ide-probe.c9
-rw-r--r--drivers/input/ff-core.c20
-rw-r--r--drivers/input/ff-memless.c26
-rw-r--r--drivers/input/input.c29
-rw-r--r--drivers/input/keyboard/atkbd.c13
-rw-r--r--drivers/input/mouse/lifebook.c3
-rw-r--r--drivers/input/mouse/psmouse-base.c4
-rw-r--r--drivers/isdn/hardware/eicon/maintidi.c5
-rw-r--r--drivers/isdn/hardware/eicon/message.c18
-rw-r--r--drivers/isdn/hardware/mISDN/hfcmulti.c2
-rw-r--r--drivers/isdn/hisax/amd7930_fn.c1
-rw-r--r--drivers/isdn/hisax/diva.c2
-rw-r--r--drivers/isdn/hisax/elsa_ser.c22
-rw-r--r--drivers/isdn/hisax/hfc_usb.c4
-rw-r--r--drivers/isdn/hisax/hscx_irq.c2
-rw-r--r--drivers/isdn/hisax/icc.c1
-rw-r--r--drivers/isdn/i4l/isdn_ppp.c352
-rw-r--r--drivers/isdn/mISDN/stack.c2
-rw-r--r--drivers/leds/leds-gpio.c2
-rw-r--r--drivers/md/md.c46
-rw-r--r--drivers/md/raid5.c87
-rw-r--r--drivers/media/common/tuners/tda18271-fe.c8
-rw-r--r--drivers/media/dvb/dvb-usb/Kconfig2
-rw-r--r--drivers/media/dvb/dvb-usb/ce6230.c2
-rw-r--r--drivers/media/dvb/dvb-usb/dib0700_devices.c15
-rw-r--r--drivers/media/dvb/firewire/firedtv-avc.c38
-rw-r--r--drivers/media/dvb/firewire/firedtv-fe.c8
-rw-r--r--drivers/media/dvb/frontends/dib0070.h7
-rw-r--r--drivers/media/dvb/frontends/dib7000p.c5
-rw-r--r--drivers/media/dvb/pt1/pt1.c1
-rw-r--r--drivers/media/dvb/siano/smsusb.c6
-rw-r--r--drivers/media/video/bt8xx/bttv-driver.c33
-rw-r--r--drivers/media/video/em28xx/em28xx-audio.c5
-rw-r--r--drivers/media/video/gspca/m5602/m5602_s5k4aa.c20
-rw-r--r--drivers/media/video/gspca/mr97310a.c2
-rw-r--r--drivers/media/video/gspca/ov519.c2
-rw-r--r--drivers/media/video/gspca/stv06xx/stv06xx.c3
-rw-r--r--drivers/media/video/pxa_camera.c5
-rw-r--r--drivers/media/video/s2255drv.c5
-rw-r--r--drivers/media/video/saa7134/saa7134-cards.c1
-rw-r--r--drivers/media/video/saa7134/saa7134-ts.c6
-rw-r--r--drivers/media/video/saa7134/saa7134.h1
-rw-r--r--drivers/media/video/saa7164/saa7164-cmd.c2
-rw-r--r--drivers/media/video/sh_mobile_ceu_camera.c4
-rw-r--r--drivers/media/video/soc_camera.c16
-rw-r--r--drivers/media/video/uvc/uvc_ctrl.c2
-rw-r--r--drivers/media/video/uvc/uvc_video.c3
-rw-r--r--drivers/misc/sgi-gru/gruprocfs.c13
-rw-r--r--drivers/mmc/host/omap.c1
-rw-r--r--drivers/mtd/maps/Kconfig1
-rw-r--r--drivers/mtd/maps/Makefile2
-rw-r--r--drivers/mtd/maps/gpio-addr-flash.c5
-rw-r--r--drivers/mtd/maps/sa1100-flash.c4
-rw-r--r--drivers/mtd/nand/nand_base.c6
-rw-r--r--drivers/net/benet/be.h2
-rw-r--r--drivers/net/benet/be_cmds.h2
-rw-r--r--drivers/net/benet/be_ethtool.c8
-rw-r--r--drivers/net/benet/be_main.c28
-rw-r--r--drivers/net/can/Kconfig60
-rw-r--r--drivers/net/can/dev.c23
-rw-r--r--drivers/net/can/sja1000/Kconfig47
-rw-r--r--drivers/net/can/usb/Kconfig10
-rw-r--r--drivers/net/can/usb/Makefile2
-rw-r--r--drivers/net/can/usb/ems_usb.c5
-rw-r--r--drivers/net/cassini.c5
-rw-r--r--drivers/net/cxgb3/sge.c4
-rw-r--r--drivers/net/davinci_emac.c5
-rw-r--r--drivers/net/forcedeth.c5
-rw-r--r--drivers/net/fsl_pq_mdio.c1
-rw-r--r--drivers/net/ibm_newemac/emac.h4
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c85
-rw-r--r--drivers/net/macsonic.c117
-rw-r--r--drivers/net/phy/mdio-gpio.c2
-rw-r--r--drivers/net/ppp_generic.c11
-rw-r--r--drivers/net/qlge/qlge_main.c2
-rw-r--r--drivers/net/qlge/qlge_mpi.c2
-rw-r--r--drivers/net/r6040.c2
-rw-r--r--drivers/net/r8169.c4
-rw-r--r--drivers/net/s2io.c1
-rw-r--r--drivers/net/sfc/sfe4001.c4
-rw-r--r--drivers/net/smsc911x.c2
-rw-r--r--drivers/net/sungem.c10
-rw-r--r--drivers/net/usb/Kconfig2
-rw-r--r--drivers/net/usb/cdc_ether.c42
-rw-r--r--drivers/net/virtio_net.c6
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c1
-rw-r--r--drivers/net/wireless/ath/ath5k/led.c4
-rw-r--r--drivers/net/wireless/b43/main.c3
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2100.c11
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2200.c143
-rw-r--r--drivers/net/wireless/ipw2x00/libipw.h9
-rw-r--r--drivers/net/wireless/ipw2x00/libipw_module.c46
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-1000.c1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-6000.c5
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rs.c9
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c10
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.h2
-rw-r--r--drivers/net/wireless/libertas/ethtool.c17
-rw-r--r--drivers/net/wireless/p54/p54usb.c10
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c4
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00link.c11
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00usb.c9
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_leds.c4
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_rfkill.c1
-rw-r--r--drivers/pci/dmar.c52
-rw-r--r--drivers/pci/intel-iommu.c39
-rw-r--r--drivers/pci/pcie/aspm.c6
-rw-r--r--drivers/platform/x86/eeepc-laptop.c30
-rw-r--r--drivers/pps/kapi.c20
-rw-r--r--drivers/pps/pps.c11
-rw-r--r--drivers/regulator/core.c3
-rw-r--r--drivers/regulator/fixed.c5
-rw-r--r--drivers/regulator/wm831x-ldo.c6
-rw-r--r--drivers/rtc/rtc-coh901331.c11
-rw-r--r--drivers/rtc/rtc-pcf50633.c7
-rw-r--r--drivers/rtc/rtc-v3020.c2
-rw-r--r--drivers/rtc/rtc-vr41xx.c9
-rw-r--r--drivers/s390/char/monreader.c1
-rw-r--r--drivers/s390/char/sclp_quiesce.c48
-rw-r--r--drivers/scsi/bfa/bfad_fwimg.c2
-rw-r--r--drivers/scsi/bfa/bfad_im.c2
-rw-r--r--drivers/scsi/gdth.c2
-rw-r--r--drivers/scsi/ipr.c42
-rw-r--r--drivers/scsi/ipr.h1
-rw-r--r--drivers/scsi/libsas/sas_expander.c1
-rw-r--r--drivers/scsi/pmcraid.c10
-rw-r--r--drivers/scsi/scsi_transport_fc.c3
-rw-r--r--drivers/serial/8250.c2
-rw-r--r--drivers/serial/8250_pci.c8
-rw-r--r--drivers/serial/sh-sci.c2
-rw-r--r--drivers/spi/spi_stmp.c2
-rw-r--r--drivers/ssb/scan.c6
-rw-r--r--drivers/thermal/thermal_sys.c10
-rw-r--r--drivers/uio/uio_pdrv_genirq.c1
-rw-r--r--drivers/usb/class/cdc-acm.c18
-rw-r--r--drivers/usb/host/ohci-hcd.c5
-rw-r--r--drivers/usb/host/ohci-pci.c20
-rw-r--r--drivers/usb/host/ohci-q.c18
-rw-r--r--drivers/usb/host/ohci.h9
-rw-r--r--drivers/usb/host/xhci-mem.c10
-rw-r--r--drivers/usb/host/xhci-ring.c7
-rw-r--r--drivers/usb/mon/mon_bin.c11
-rw-r--r--drivers/usb/serial/cp210x.c21
-rw-r--r--drivers/usb/serial/option.c2
-rw-r--r--drivers/video/Kconfig2
-rw-r--r--drivers/video/atafb.c6
-rw-r--r--drivers/video/atmel_lcdfb.c11
-rw-r--r--drivers/video/backlight/corgi_lcd.c5
-rw-r--r--drivers/video/backlight/lcd.c2
-rw-r--r--drivers/video/console/fbcon.c5
-rw-r--r--drivers/video/da8xx-fb.c2
-rw-r--r--drivers/video/msm/mddi.c1
-rw-r--r--drivers/video/msm/mddi_client_nt35399.c1
-rw-r--r--drivers/video/msm/mddi_client_toshiba.c1
-rw-r--r--drivers/video/msm/mdp.c18
-rw-r--r--drivers/video/msm/mdp_ppp.c20
-rw-r--r--drivers/video/savage/savagefb_driver.c20
-rw-r--r--drivers/video/uvesafb.c28
-rw-r--r--drivers/watchdog/sbc_fitpc2_wdt.c2
236 files changed, 3337 insertions, 1760 deletions
diff --git a/drivers/acpi/acpica/acconfig.h b/drivers/acpi/acpica/acconfig.h
index 8e679ef5b231..a4471e3d3853 100644
--- a/drivers/acpi/acpica/acconfig.h
+++ b/drivers/acpi/acpica/acconfig.h
@@ -103,9 +103,9 @@
103 103
104#define ACPI_MAX_REFERENCE_COUNT 0x1000 104#define ACPI_MAX_REFERENCE_COUNT 0x1000
105 105
106/* Size of cached memory mapping for system memory operation region */ 106/* Default page size for use in mapping memory for operation regions */
107 107
108#define ACPI_SYSMEM_REGION_WINDOW_SIZE 4096 108#define ACPI_DEFAULT_PAGE_SIZE 4096 /* Must be power of 2 */
109 109
110/* owner_id tracking. 8 entries allows for 255 owner_ids */ 110/* owner_id tracking. 8 entries allows for 255 owner_ids */
111 111
diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c
index 3a54b737d2da..2bd83ac57c3a 100644
--- a/drivers/acpi/acpica/exregion.c
+++ b/drivers/acpi/acpica/exregion.c
@@ -77,7 +77,8 @@ acpi_ex_system_memory_space_handler(u32 function,
77 void *logical_addr_ptr = NULL; 77 void *logical_addr_ptr = NULL;
78 struct acpi_mem_space_context *mem_info = region_context; 78 struct acpi_mem_space_context *mem_info = region_context;
79 u32 length; 79 u32 length;
80 acpi_size window_size; 80 acpi_size map_length;
81 acpi_size page_boundary_map_length;
81#ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED 82#ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED
82 u32 remainder; 83 u32 remainder;
83#endif 84#endif
@@ -144,25 +145,39 @@ acpi_ex_system_memory_space_handler(u32 function,
144 } 145 }
145 146
146 /* 147 /*
147 * Don't attempt to map memory beyond the end of the region, and 148 * Attempt to map from the requested address to the end of the region.
148 * constrain the maximum mapping size to something reasonable. 149 * However, we will never map more than one page, nor will we cross
150 * a page boundary.
149 */ 151 */
150 window_size = (acpi_size) 152 map_length = (acpi_size)
151 ((mem_info->address + mem_info->length) - address); 153 ((mem_info->address + mem_info->length) - address);
152 154
153 if (window_size > ACPI_SYSMEM_REGION_WINDOW_SIZE) { 155 /*
154 window_size = ACPI_SYSMEM_REGION_WINDOW_SIZE; 156 * If mapping the entire remaining portion of the region will cross
157 * a page boundary, just map up to the page boundary, do not cross.
158 * On some systems, crossing a page boundary while mapping regions
159 * can cause warnings if the pages have different attributes
160 * due to resource management
161 */
162 page_boundary_map_length =
163 ACPI_ROUND_UP(address, ACPI_DEFAULT_PAGE_SIZE) - address;
164
165 if (!page_boundary_map_length) {
166 page_boundary_map_length = ACPI_DEFAULT_PAGE_SIZE;
167 }
168
169 if (map_length > page_boundary_map_length) {
170 map_length = page_boundary_map_length;
155 } 171 }
156 172
157 /* Create a new mapping starting at the address given */ 173 /* Create a new mapping starting at the address given */
158 174
159 mem_info->mapped_logical_address = 175 mem_info->mapped_logical_address = acpi_os_map_memory((acpi_physical_address) address, map_length);
160 acpi_os_map_memory((acpi_physical_address) address, window_size);
161 if (!mem_info->mapped_logical_address) { 176 if (!mem_info->mapped_logical_address) {
162 ACPI_ERROR((AE_INFO, 177 ACPI_ERROR((AE_INFO,
163 "Could not map memory at %8.8X%8.8X, size %X", 178 "Could not map memory at %8.8X%8.8X, size %X",
164 ACPI_FORMAT_NATIVE_UINT(address), 179 ACPI_FORMAT_NATIVE_UINT(address),
165 (u32) window_size)); 180 (u32) map_length));
166 mem_info->mapped_length = 0; 181 mem_info->mapped_length = 0;
167 return_ACPI_STATUS(AE_NO_MEMORY); 182 return_ACPI_STATUS(AE_NO_MEMORY);
168 } 183 }
@@ -170,7 +185,7 @@ acpi_ex_system_memory_space_handler(u32 function,
170 /* Save the physical address and mapping size */ 185 /* Save the physical address and mapping size */
171 186
172 mem_info->mapped_physical_address = address; 187 mem_info->mapped_physical_address = address;
173 mem_info->mapped_length = window_size; 188 mem_info->mapped_length = map_length;
174 } 189 }
175 190
176 /* 191 /*
diff --git a/drivers/acpi/power_meter.c b/drivers/acpi/power_meter.c
index e6bfd77986b8..2ef7030a0c28 100644
--- a/drivers/acpi/power_meter.c
+++ b/drivers/acpi/power_meter.c
@@ -294,7 +294,11 @@ static int set_acpi_trip(struct acpi_power_meter_resource *resource)
294 return -EINVAL; 294 return -EINVAL;
295 } 295 }
296 296
297 return data; 297 /* _PTP returns 0 on success, nonzero otherwise */
298 if (data)
299 return -EINVAL;
300
301 return 0;
298} 302}
299 303
300static ssize_t set_trip(struct device *dev, struct device_attribute *devattr, 304static ssize_t set_trip(struct device *dev, struct device_attribute *devattr,
diff --git a/drivers/acpi/proc.c b/drivers/acpi/proc.c
index f8b6f555ba52..d0d25e2e1ced 100644
--- a/drivers/acpi/proc.c
+++ b/drivers/acpi/proc.c
@@ -393,7 +393,7 @@ acpi_system_write_wakeup_device(struct file *file,
393 struct list_head *node, *next; 393 struct list_head *node, *next;
394 char strbuf[5]; 394 char strbuf[5];
395 char str[5] = ""; 395 char str[5] = "";
396 int len = count; 396 unsigned int len = count;
397 struct acpi_device *found_dev = NULL; 397 struct acpi_device *found_dev = NULL;
398 398
399 if (len > 4) 399 if (len > 4)
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
index c567b46dfa0f..ec742a4e5635 100644
--- a/drivers/acpi/processor_core.c
+++ b/drivers/acpi/processor_core.c
@@ -770,7 +770,7 @@ static struct notifier_block acpi_cpu_notifier =
770 .notifier_call = acpi_cpu_soft_notify, 770 .notifier_call = acpi_cpu_soft_notify,
771}; 771};
772 772
773static int acpi_processor_add(struct acpi_device *device) 773static int __cpuinit acpi_processor_add(struct acpi_device *device)
774{ 774{
775 struct acpi_processor *pr = NULL; 775 struct acpi_processor *pr = NULL;
776 int result = 0; 776 int result = 0;
diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c
index 4c6c14c1e307..1c5d7a8b2fdf 100644
--- a/drivers/acpi/processor_throttling.c
+++ b/drivers/acpi/processor_throttling.c
@@ -1133,15 +1133,15 @@ int acpi_processor_get_throttling_info(struct acpi_processor *pr)
1133 int result = 0; 1133 int result = 0;
1134 struct acpi_processor_throttling *pthrottling; 1134 struct acpi_processor_throttling *pthrottling;
1135 1135
1136 if (!pr)
1137 return -EINVAL;
1138
1136 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1139 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1137 "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n", 1140 "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n",
1138 pr->throttling.address, 1141 pr->throttling.address,
1139 pr->throttling.duty_offset, 1142 pr->throttling.duty_offset,
1140 pr->throttling.duty_width)); 1143 pr->throttling.duty_width));
1141 1144
1142 if (!pr)
1143 return -EINVAL;
1144
1145 /* 1145 /*
1146 * Evaluate _PTC, _TSS and _TPC 1146 * Evaluate _PTC, _TSS and _TPC
1147 * They must all be present or none of them can be used. 1147 * They must all be present or none of them can be used.
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index a90afcc723ab..4cc1b8116e76 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -413,6 +413,30 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = {
413 }, 413 },
414 }, 414 },
415 { 415 {
416 .callback = init_set_sci_en_on_resume,
417 .ident = "Hewlett-Packard Pavilion dv4",
418 .matches = {
419 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
420 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv4"),
421 },
422 },
423 {
424 .callback = init_set_sci_en_on_resume,
425 .ident = "Hewlett-Packard Pavilion dv7",
426 .matches = {
427 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
428 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv7"),
429 },
430 },
431 {
432 .callback = init_set_sci_en_on_resume,
433 .ident = "Hewlett-Packard Compaq Presario CQ40 Notebook PC",
434 .matches = {
435 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
436 DMI_MATCH(DMI_PRODUCT_NAME, "Compaq Presario CQ40 Notebook PC"),
437 },
438 },
439 {
416 .callback = init_old_suspend_ordering, 440 .callback = init_old_suspend_ordering,
417 .ident = "Panasonic CF51-2L", 441 .ident = "Panasonic CF51-2L",
418 .matches = { 442 .matches = {
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c
index 64e3c581b7a9..05dff631591c 100644
--- a/drivers/acpi/video.c
+++ b/drivers/acpi/video.c
@@ -1223,7 +1223,7 @@ acpi_video_device_write_state(struct file *file,
1223 u32 state = 0; 1223 u32 state = 0;
1224 1224
1225 1225
1226 if (!dev || count + 1 > sizeof str) 1226 if (!dev || count >= sizeof(str))
1227 return -EINVAL; 1227 return -EINVAL;
1228 1228
1229 if (copy_from_user(str, buffer, count)) 1229 if (copy_from_user(str, buffer, count))
@@ -1280,7 +1280,7 @@ acpi_video_device_write_brightness(struct file *file,
1280 int i; 1280 int i;
1281 1281
1282 1282
1283 if (!dev || !dev->brightness || count + 1 > sizeof str) 1283 if (!dev || !dev->brightness || count >= sizeof(str))
1284 return -EINVAL; 1284 return -EINVAL;
1285 1285
1286 if (copy_from_user(str, buffer, count)) 1286 if (copy_from_user(str, buffer, count))
@@ -1562,7 +1562,7 @@ acpi_video_bus_write_POST(struct file *file,
1562 unsigned long long opt, options; 1562 unsigned long long opt, options;
1563 1563
1564 1564
1565 if (!video || count + 1 > sizeof str) 1565 if (!video || count >= sizeof(str))
1566 return -EINVAL; 1566 return -EINVAL;
1567 1567
1568 status = acpi_video_bus_POST_options(video, &options); 1568 status = acpi_video_bus_POST_options(video, &options);
@@ -1602,7 +1602,7 @@ acpi_video_bus_write_DOS(struct file *file,
1602 unsigned long opt; 1602 unsigned long opt;
1603 1603
1604 1604
1605 if (!video || count + 1 > sizeof str) 1605 if (!video || count >= sizeof(str))
1606 return -EINVAL; 1606 return -EINVAL;
1607 1607
1608 if (copy_from_user(str, buffer, count)) 1608 if (copy_from_user(str, buffer, count))
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index a06f5d6375a8..a3241a1a710b 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -2718,6 +2718,30 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)
2718 }, 2718 },
2719 .driver_data = "20071026", /* yyyymmdd */ 2719 .driver_data = "20071026", /* yyyymmdd */
2720 }, 2720 },
2721 /*
2722 * All BIOS versions for the MSI K9A2 Platinum (MS-7376)
2723 * support 64bit DMA.
2724 *
2725 * BIOS versions earlier than 1.5 had the Manufacturer DMI
2726 * fields as "MICRO-STAR INTERANTIONAL CO.,LTD".
2727 * This spelling mistake was fixed in BIOS version 1.5, so
2728 * 1.5 and later have the Manufacturer as
2729 * "MICRO-STAR INTERNATIONAL CO.,LTD".
2730 * So try to match on DMI_BOARD_VENDOR of "MICRO-STAR INTER".
2731 *
2732 * BIOS versions earlier than 1.9 had a Board Product Name
2733 * DMI field of "MS-7376". This was changed to be
2734 * "K9A2 Platinum (MS-7376)" in version 1.9, but we can still
2735 * match on DMI_BOARD_NAME of "MS-7376".
2736 */
2737 {
2738 .ident = "MSI K9A2 Platinum",
2739 .matches = {
2740 DMI_MATCH(DMI_BOARD_VENDOR,
2741 "MICRO-STAR INTER"),
2742 DMI_MATCH(DMI_BOARD_NAME, "MS-7376"),
2743 },
2744 },
2721 { } 2745 { }
2722 }; 2746 };
2723 const struct dmi_system_id *match; 2747 const struct dmi_system_id *match;
@@ -2729,18 +2753,24 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)
2729 !match) 2753 !match)
2730 return false; 2754 return false;
2731 2755
2756 if (!match->driver_data)
2757 goto enable_64bit;
2758
2732 dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); 2759 dmi_get_date(DMI_BIOS_DATE, &year, &month, &date);
2733 snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); 2760 snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date);
2734 2761
2735 if (strcmp(buf, match->driver_data) >= 0) { 2762 if (strcmp(buf, match->driver_data) >= 0)
2736 dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n", 2763 goto enable_64bit;
2737 match->ident); 2764 else {
2738 return true;
2739 } else {
2740 dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, " 2765 dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, "
2741 "forcing 32bit DMA, update BIOS\n", match->ident); 2766 "forcing 32bit DMA, update BIOS\n", match->ident);
2742 return false; 2767 return false;
2743 } 2768 }
2769
2770enable_64bit:
2771 dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n",
2772 match->ident);
2773 return true;
2744} 2774}
2745 2775
2746static bool ahci_broken_system_poweroff(struct pci_dev *pdev) 2776static bool ahci_broken_system_poweroff(struct pci_dev *pdev)
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index d7f0f1b1ae3e..dc72690ed5db 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4919,10 +4919,11 @@ struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4919 */ 4919 */
4920void ata_qc_free(struct ata_queued_cmd *qc) 4920void ata_qc_free(struct ata_queued_cmd *qc)
4921{ 4921{
4922 struct ata_port *ap = qc->ap; 4922 struct ata_port *ap;
4923 unsigned int tag; 4923 unsigned int tag;
4924 4924
4925 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 4925 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4926 ap = qc->ap;
4926 4927
4927 qc->flags = 0; 4928 qc->flags = 0;
4928 tag = qc->tag; 4929 tag = qc->tag;
@@ -4934,11 +4935,13 @@ void ata_qc_free(struct ata_queued_cmd *qc)
4934 4935
4935void __ata_qc_complete(struct ata_queued_cmd *qc) 4936void __ata_qc_complete(struct ata_queued_cmd *qc)
4936{ 4937{
4937 struct ata_port *ap = qc->ap; 4938 struct ata_port *ap;
4938 struct ata_link *link = qc->dev->link; 4939 struct ata_link *link;
4939 4940
4940 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 4941 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4941 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE)); 4942 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));
4943 ap = qc->ap;
4944 link = qc->dev->link;
4942 4945
4943 if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) 4946 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4944 ata_sg_clean(qc); 4947 ata_sg_clean(qc);
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index bdd43c7f432e..02efd9a83d26 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -93,7 +93,6 @@ static const struct pci_device_id svia_pci_tbl[] = {
93 { PCI_VDEVICE(VIA, 0x7372), vt6420 }, 93 { PCI_VDEVICE(VIA, 0x7372), vt6420 },
94 { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */ 94 { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */
95 { PCI_VDEVICE(VIA, 0x9000), vt8251 }, 95 { PCI_VDEVICE(VIA, 0x9000), vt8251 },
96 { PCI_VDEVICE(VIA, 0x9040), vt8251 },
97 96
98 { } /* terminate list */ 97 { } /* terminate list */
99}; 98};
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index 7ba91aa3fe8b..44bc8bbabf54 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -591,6 +591,7 @@ static int btusb_close(struct hci_dev *hdev)
591 return 0; 591 return 0;
592 592
593 cancel_work_sync(&data->work); 593 cancel_work_sync(&data->work);
594 cancel_work_sync(&data->waker);
594 595
595 clear_bit(BTUSB_ISOC_RUNNING, &data->flags); 596 clear_bit(BTUSB_ISOC_RUNNING, &data->flags);
596 clear_bit(BTUSB_BULK_RUNNING, &data->flags); 597 clear_bit(BTUSB_BULK_RUNNING, &data->flags);
@@ -599,11 +600,13 @@ static int btusb_close(struct hci_dev *hdev)
599 btusb_stop_traffic(data); 600 btusb_stop_traffic(data);
600 err = usb_autopm_get_interface(data->intf); 601 err = usb_autopm_get_interface(data->intf);
601 if (err < 0) 602 if (err < 0)
602 return 0; 603 goto failed;
603 604
604 data->intf->needs_remote_wakeup = 0; 605 data->intf->needs_remote_wakeup = 0;
605 usb_autopm_put_interface(data->intf); 606 usb_autopm_put_interface(data->intf);
606 607
608failed:
609 usb_scuttle_anchored_urbs(&data->deferred);
607 return 0; 610 return 0;
608} 611}
609 612
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 4068467ce7b9..10e1f0390bbb 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -1161,12 +1161,6 @@ static int intel_i915_configure(void)
1161 1161
1162 intel_i9xx_setup_flush(); 1162 intel_i9xx_setup_flush();
1163 1163
1164#ifdef USE_PCI_DMA_API
1165 if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36)))
1166 dev_err(&intel_private.pcidev->dev,
1167 "set gfx device dma mask 36bit failed!\n");
1168#endif
1169
1170 return 0; 1164 return 0;
1171} 1165}
1172 1166
@@ -2456,6 +2450,11 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
2456 &bridge->mode); 2450 &bridge->mode);
2457 } 2451 }
2458 2452
2453 if (bridge->driver->mask_memory == intel_i965_mask_memory)
2454 if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36)))
2455 dev_err(&intel_private.pcidev->dev,
2456 "set gfx device dma mask 36bit failed!\n");
2457
2459 pci_set_drvdata(pdev, bridge); 2458 pci_set_drvdata(pdev, bridge);
2460 return agp_add_bridge(bridge); 2459 return agp_add_bridge(bridge);
2461} 2460}
diff --git a/drivers/char/hvc_xen.c b/drivers/char/hvc_xen.c
index eba999f8598d..a6ee32b599a8 100644
--- a/drivers/char/hvc_xen.c
+++ b/drivers/char/hvc_xen.c
@@ -55,7 +55,7 @@ static inline void notify_daemon(void)
55 notify_remote_via_evtchn(xen_start_info->console.domU.evtchn); 55 notify_remote_via_evtchn(xen_start_info->console.domU.evtchn);
56} 56}
57 57
58static int write_console(uint32_t vtermno, const char *data, int len) 58static int __write_console(const char *data, int len)
59{ 59{
60 struct xencons_interface *intf = xencons_interface(); 60 struct xencons_interface *intf = xencons_interface();
61 XENCONS_RING_IDX cons, prod; 61 XENCONS_RING_IDX cons, prod;
@@ -76,6 +76,29 @@ static int write_console(uint32_t vtermno, const char *data, int len)
76 return sent; 76 return sent;
77} 77}
78 78
79static int write_console(uint32_t vtermno, const char *data, int len)
80{
81 int ret = len;
82
83 /*
84 * Make sure the whole buffer is emitted, polling if
85 * necessary. We don't ever want to rely on the hvc daemon
86 * because the most interesting console output is when the
87 * kernel is crippled.
88 */
89 while (len) {
90 int sent = __write_console(data, len);
91
92 data += sent;
93 len -= sent;
94
95 if (unlikely(len))
96 HYPERVISOR_sched_op(SCHEDOP_yield, NULL);
97 }
98
99 return ret;
100}
101
79static int read_console(uint32_t vtermno, char *buf, int len) 102static int read_console(uint32_t vtermno, char *buf, int len)
80{ 103{
81 struct xencons_interface *intf = xencons_interface(); 104 struct xencons_interface *intf = xencons_interface();
diff --git a/drivers/char/tty_port.c b/drivers/char/tty_port.c
index a4bbb28f10be..2e8552dc5eda 100644
--- a/drivers/char/tty_port.c
+++ b/drivers/char/tty_port.c
@@ -221,6 +221,9 @@ int tty_port_block_til_ready(struct tty_port *port,
221 the port has just hung up or is in another error state */ 221 the port has just hung up or is in another error state */
222 if ((filp->f_flags & O_NONBLOCK) || 222 if ((filp->f_flags & O_NONBLOCK) ||
223 (tty->flags & (1 << TTY_IO_ERROR))) { 223 (tty->flags & (1 << TTY_IO_ERROR))) {
224 /* Indicate we are open */
225 if (tty->termios->c_cflag & CBAUD)
226 tty_port_raise_dtr_rts(port);
224 port->flags |= ASYNC_NORMAL_ACTIVE; 227 port->flags |= ASYNC_NORMAL_ACTIVE;
225 return 0; 228 return 0;
226 } 229 }
diff --git a/drivers/char/vt_ioctl.c b/drivers/char/vt_ioctl.c
index ed86d3bf249a..6aa10284104a 100644
--- a/drivers/char/vt_ioctl.c
+++ b/drivers/char/vt_ioctl.c
@@ -103,8 +103,8 @@ void vt_event_post(unsigned int event, unsigned int old, unsigned int new)
103 ve->event.event = event; 103 ve->event.event = event;
104 /* kernel view is consoles 0..n-1, user space view is 104 /* kernel view is consoles 0..n-1, user space view is
105 console 1..n with 0 meaning current, so we must bias */ 105 console 1..n with 0 meaning current, so we must bias */
106 ve->event.old = old + 1; 106 ve->event.oldev = old + 1;
107 ve->event.new = new + 1; 107 ve->event.newev = new + 1;
108 wake = 1; 108 wake = 1;
109 ve->done = 1; 109 ve->done = 1;
110 } 110 }
@@ -186,7 +186,7 @@ int vt_waitactive(int n)
186 vt_event_wait(&vw); 186 vt_event_wait(&vw);
187 if (vw.done == 0) 187 if (vw.done == 0)
188 return -EINTR; 188 return -EINTR;
189 } while (vw.event.new != n); 189 } while (vw.event.newev != n);
190 return 0; 190 return 0;
191} 191}
192 192
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 3938c7817095..ff57c40e9b8b 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -41,7 +41,7 @@ static struct cpufreq_driver *cpufreq_driver;
41static DEFINE_PER_CPU(struct cpufreq_policy *, cpufreq_cpu_data); 41static DEFINE_PER_CPU(struct cpufreq_policy *, cpufreq_cpu_data);
42#ifdef CONFIG_HOTPLUG_CPU 42#ifdef CONFIG_HOTPLUG_CPU
43/* This one keeps track of the previously set governor of a removed CPU */ 43/* This one keeps track of the previously set governor of a removed CPU */
44static DEFINE_PER_CPU(struct cpufreq_governor *, cpufreq_cpu_governor); 44static DEFINE_PER_CPU(char[CPUFREQ_NAME_LEN], cpufreq_cpu_governor);
45#endif 45#endif
46static DEFINE_SPINLOCK(cpufreq_driver_lock); 46static DEFINE_SPINLOCK(cpufreq_driver_lock);
47 47
@@ -774,10 +774,12 @@ int cpufreq_add_dev_policy(unsigned int cpu, struct cpufreq_policy *policy,
774#ifdef CONFIG_SMP 774#ifdef CONFIG_SMP
775 unsigned long flags; 775 unsigned long flags;
776 unsigned int j; 776 unsigned int j;
777
778#ifdef CONFIG_HOTPLUG_CPU 777#ifdef CONFIG_HOTPLUG_CPU
779 if (per_cpu(cpufreq_cpu_governor, cpu)) { 778 struct cpufreq_governor *gov;
780 policy->governor = per_cpu(cpufreq_cpu_governor, cpu); 779
780 gov = __find_governor(per_cpu(cpufreq_cpu_governor, cpu));
781 if (gov) {
782 policy->governor = gov;
781 dprintk("Restoring governor %s for cpu %d\n", 783 dprintk("Restoring governor %s for cpu %d\n",
782 policy->governor->name, cpu); 784 policy->governor->name, cpu);
783 } 785 }
@@ -949,10 +951,13 @@ err_out_kobj_put:
949static int cpufreq_add_dev(struct sys_device *sys_dev) 951static int cpufreq_add_dev(struct sys_device *sys_dev)
950{ 952{
951 unsigned int cpu = sys_dev->id; 953 unsigned int cpu = sys_dev->id;
952 int ret = 0; 954 int ret = 0, found = 0;
953 struct cpufreq_policy *policy; 955 struct cpufreq_policy *policy;
954 unsigned long flags; 956 unsigned long flags;
955 unsigned int j; 957 unsigned int j;
958#ifdef CONFIG_HOTPLUG_CPU
959 int sibling;
960#endif
956 961
957 if (cpu_is_offline(cpu)) 962 if (cpu_is_offline(cpu))
958 return 0; 963 return 0;
@@ -999,7 +1004,19 @@ static int cpufreq_add_dev(struct sys_device *sys_dev)
999 INIT_WORK(&policy->update, handle_update); 1004 INIT_WORK(&policy->update, handle_update);
1000 1005
1001 /* Set governor before ->init, so that driver could check it */ 1006 /* Set governor before ->init, so that driver could check it */
1002 policy->governor = CPUFREQ_DEFAULT_GOVERNOR; 1007#ifdef CONFIG_HOTPLUG_CPU
1008 for_each_online_cpu(sibling) {
1009 struct cpufreq_policy *cp = per_cpu(cpufreq_cpu_data, sibling);
1010 if (cp && cp->governor &&
1011 (cpumask_test_cpu(cpu, cp->related_cpus))) {
1012 policy->governor = cp->governor;
1013 found = 1;
1014 break;
1015 }
1016 }
1017#endif
1018 if (!found)
1019 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
1003 /* call driver. From then on the cpufreq must be able 1020 /* call driver. From then on the cpufreq must be able
1004 * to accept all calls to ->verify and ->setpolicy for this CPU 1021 * to accept all calls to ->verify and ->setpolicy for this CPU
1005 */ 1022 */
@@ -1111,7 +1128,8 @@ static int __cpufreq_remove_dev(struct sys_device *sys_dev)
1111#ifdef CONFIG_SMP 1128#ifdef CONFIG_SMP
1112 1129
1113#ifdef CONFIG_HOTPLUG_CPU 1130#ifdef CONFIG_HOTPLUG_CPU
1114 per_cpu(cpufreq_cpu_governor, cpu) = data->governor; 1131 strncpy(per_cpu(cpufreq_cpu_governor, cpu), data->governor->name,
1132 CPUFREQ_NAME_LEN);
1115#endif 1133#endif
1116 1134
1117 /* if we have other CPUs still registered, we need to unlink them, 1135 /* if we have other CPUs still registered, we need to unlink them,
@@ -1135,7 +1153,8 @@ static int __cpufreq_remove_dev(struct sys_device *sys_dev)
1135 continue; 1153 continue;
1136 dprintk("removing link for cpu %u\n", j); 1154 dprintk("removing link for cpu %u\n", j);
1137#ifdef CONFIG_HOTPLUG_CPU 1155#ifdef CONFIG_HOTPLUG_CPU
1138 per_cpu(cpufreq_cpu_governor, j) = data->governor; 1156 strncpy(per_cpu(cpufreq_cpu_governor, j),
1157 data->governor->name, CPUFREQ_NAME_LEN);
1139#endif 1158#endif
1140 cpu_sys_dev = get_cpu_sysdev(j); 1159 cpu_sys_dev = get_cpu_sysdev(j);
1141 sysfs_remove_link(&cpu_sys_dev->kobj, "cpufreq"); 1160 sysfs_remove_link(&cpu_sys_dev->kobj, "cpufreq");
@@ -1606,9 +1625,22 @@ EXPORT_SYMBOL_GPL(cpufreq_register_governor);
1606 1625
1607void cpufreq_unregister_governor(struct cpufreq_governor *governor) 1626void cpufreq_unregister_governor(struct cpufreq_governor *governor)
1608{ 1627{
1628#ifdef CONFIG_HOTPLUG_CPU
1629 int cpu;
1630#endif
1631
1609 if (!governor) 1632 if (!governor)
1610 return; 1633 return;
1611 1634
1635#ifdef CONFIG_HOTPLUG_CPU
1636 for_each_present_cpu(cpu) {
1637 if (cpu_online(cpu))
1638 continue;
1639 if (!strcmp(per_cpu(cpufreq_cpu_governor, cpu), governor->name))
1640 strcpy(per_cpu(cpufreq_cpu_governor, cpu), "\0");
1641 }
1642#endif
1643
1612 mutex_lock(&cpufreq_governor_mutex); 1644 mutex_lock(&cpufreq_governor_mutex);
1613 list_del(&governor->governor_list); 1645 list_del(&governor->governor_list);
1614 mutex_unlock(&cpufreq_governor_mutex); 1646 mutex_unlock(&cpufreq_governor_mutex);
diff --git a/drivers/cpufreq/cpufreq_conservative.c b/drivers/cpufreq/cpufreq_conservative.c
index bc33ddc9c97c..c7b081b839ff 100644
--- a/drivers/cpufreq/cpufreq_conservative.c
+++ b/drivers/cpufreq/cpufreq_conservative.c
@@ -116,9 +116,9 @@ static inline cputime64_t get_cpu_idle_time_jiffy(unsigned int cpu,
116 116
117 idle_time = cputime64_sub(cur_wall_time, busy_time); 117 idle_time = cputime64_sub(cur_wall_time, busy_time);
118 if (wall) 118 if (wall)
119 *wall = cur_wall_time; 119 *wall = (cputime64_t)jiffies_to_usecs(cur_wall_time);
120 120
121 return idle_time; 121 return (cputime64_t)jiffies_to_usecs(idle_time);;
122} 122}
123 123
124static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall) 124static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall)
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c
index 071699de50ee..4b34ade2332b 100644
--- a/drivers/cpufreq/cpufreq_ondemand.c
+++ b/drivers/cpufreq/cpufreq_ondemand.c
@@ -133,9 +133,9 @@ static inline cputime64_t get_cpu_idle_time_jiffy(unsigned int cpu,
133 133
134 idle_time = cputime64_sub(cur_wall_time, busy_time); 134 idle_time = cputime64_sub(cur_wall_time, busy_time);
135 if (wall) 135 if (wall)
136 *wall = cur_wall_time; 136 *wall = (cputime64_t)jiffies_to_usecs(cur_wall_time);
137 137
138 return idle_time; 138 return (cputime64_t)jiffies_to_usecs(idle_time);
139} 139}
140 140
141static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall) 141static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index d4560d9d5a83..a38831c82649 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2254,7 +2254,7 @@ static inline void __amd64_decode_bus_error(struct mem_ctl_info *mci,
2254{ 2254{
2255 u32 ec = ERROR_CODE(info->nbsl); 2255 u32 ec = ERROR_CODE(info->nbsl);
2256 u32 xec = EXT_ERROR_CODE(info->nbsl); 2256 u32 xec = EXT_ERROR_CODE(info->nbsl);
2257 int ecc_type = info->nbsh & (0x3 << 13); 2257 int ecc_type = (info->nbsh >> 13) & 0x3;
2258 2258
2259 /* Bail early out if this was an 'observed' error */ 2259 /* Bail early out if this was an 'observed' error */
2260 if (PP(ec) == K8_NBSL_PP_OBS) 2260 if (PP(ec) == K8_NBSL_PP_OBS)
@@ -3163,7 +3163,7 @@ static int __init amd64_edac_init(void)
3163 opstate_init(); 3163 opstate_init();
3164 3164
3165 if (cache_k8_northbridges() < 0) 3165 if (cache_k8_northbridges() < 0)
3166 goto err_exit; 3166 return err;
3167 3167
3168 err = pci_register_driver(&amd64_pci_driver); 3168 err = pci_register_driver(&amd64_pci_driver);
3169 if (err) 3169 if (err)
@@ -3189,8 +3189,6 @@ static int __init amd64_edac_init(void)
3189 3189
3190err_2nd_stage: 3190err_2nd_stage:
3191 debugf0("2nd stage failed\n"); 3191 debugf0("2nd stage failed\n");
3192
3193err_exit:
3194 pci_unregister_driver(&amd64_pci_driver); 3192 pci_unregister_driver(&amd64_pci_driver);
3195 3193
3196 return err; 3194 return err;
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 662ed923d9eb..50de0f5750d8 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -661,7 +661,7 @@ int gpio_export(unsigned gpio, bool direction_may_change)
661 661
662 dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0), 662 dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0),
663 desc, ioname ? ioname : "gpio%d", gpio); 663 desc, ioname ? ioname : "gpio%d", gpio);
664 if (dev) { 664 if (!IS_ERR(dev)) {
665 if (direction_may_change) 665 if (direction_may_change)
666 status = sysfs_create_group(&dev->kobj, 666 status = sysfs_create_group(&dev->kobj,
667 &gpio_attr_group); 667 &gpio_attr_group);
@@ -679,7 +679,7 @@ int gpio_export(unsigned gpio, bool direction_may_change)
679 if (status != 0) 679 if (status != 0)
680 device_unregister(dev); 680 device_unregister(dev);
681 } else 681 } else
682 status = -ENODEV; 682 status = PTR_ERR(dev);
683 if (status == 0) 683 if (status == 0)
684 set_bit(FLAG_EXPORT, &desc->flags); 684 set_bit(FLAG_EXPORT, &desc->flags);
685 } 685 }
@@ -800,11 +800,11 @@ static int gpiochip_export(struct gpio_chip *chip)
800 mutex_lock(&sysfs_lock); 800 mutex_lock(&sysfs_lock);
801 dev = device_create(&gpio_class, chip->dev, MKDEV(0, 0), chip, 801 dev = device_create(&gpio_class, chip->dev, MKDEV(0, 0), chip,
802 "gpiochip%d", chip->base); 802 "gpiochip%d", chip->base);
803 if (dev) { 803 if (!IS_ERR(dev)) {
804 status = sysfs_create_group(&dev->kobj, 804 status = sysfs_create_group(&dev->kobj,
805 &gpiochip_attr_group); 805 &gpiochip_attr_group);
806 } else 806 } else
807 status = -ENODEV; 807 status = PTR_ERR(dev);
808 chip->exported = (status == 0); 808 chip->exported = (status == 0);
809 mutex_unlock(&sysfs_lock); 809 mutex_unlock(&sysfs_lock);
810 810
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 1fe4e1d344fd..bbfd110a7168 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -331,6 +331,7 @@ create_mode:
331 cmdline_mode->refresh_specified ? cmdline_mode->refresh : 60, 331 cmdline_mode->refresh_specified ? cmdline_mode->refresh : 60,
332 cmdline_mode->rb, cmdline_mode->interlace, 332 cmdline_mode->rb, cmdline_mode->interlace,
333 cmdline_mode->margins); 333 cmdline_mode->margins);
334 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
334 list_add(&mode->head, &connector->modes); 335 list_add(&mode->head, &connector->modes);
335 return mode; 336 return mode;
336} 337}
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 9c924614c418..dc8e374a0b55 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -707,7 +707,7 @@ int drm_fb_helper_set_par(struct fb_info *info)
707 707
708 if (crtc->fb == fb_helper->crtc_info[i].mode_set.fb) { 708 if (crtc->fb == fb_helper->crtc_info[i].mode_set.fb) {
709 mutex_lock(&dev->mode_config.mutex); 709 mutex_lock(&dev->mode_config.mutex);
710 ret = crtc->funcs->set_config(&fb_helper->crtc_info->mode_set); 710 ret = crtc->funcs->set_config(&fb_helper->crtc_info[i].mode_set);
711 mutex_unlock(&dev->mode_config.mutex); 711 mutex_unlock(&dev->mode_config.mutex);
712 if (ret) 712 if (ret)
713 return ret; 713 return ret;
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 92aeb918e0c0..e5b138be45fa 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1227,8 +1227,7 @@ static int i915_load_modeset_init(struct drm_device *dev,
1227 goto out; 1227 goto out;
1228 1228
1229 /* Try to set up FBC with a reasonable compressed buffer size */ 1229 /* Try to set up FBC with a reasonable compressed buffer size */
1230 if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev) || IS_GM45(dev)) && 1230 if (I915_HAS_FBC(dev) && i915_powersave) {
1231 i915_powersave) {
1232 int cfb_size; 1231 int cfb_size;
1233 1232
1234 /* Try to get an 8M buffer... */ 1233 /* Try to get an 8M buffer... */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c5df2234418d..57204e298975 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -296,6 +296,12 @@ typedef struct drm_i915_private {
296 u32 saveVBLANK_A; 296 u32 saveVBLANK_A;
297 u32 saveVSYNC_A; 297 u32 saveVSYNC_A;
298 u32 saveBCLRPAT_A; 298 u32 saveBCLRPAT_A;
299 u32 saveTRANS_HTOTAL_A;
300 u32 saveTRANS_HBLANK_A;
301 u32 saveTRANS_HSYNC_A;
302 u32 saveTRANS_VTOTAL_A;
303 u32 saveTRANS_VBLANK_A;
304 u32 saveTRANS_VSYNC_A;
299 u32 savePIPEASTAT; 305 u32 savePIPEASTAT;
300 u32 saveDSPASTRIDE; 306 u32 saveDSPASTRIDE;
301 u32 saveDSPASIZE; 307 u32 saveDSPASIZE;
@@ -304,8 +310,11 @@ typedef struct drm_i915_private {
304 u32 saveDSPASURF; 310 u32 saveDSPASURF;
305 u32 saveDSPATILEOFF; 311 u32 saveDSPATILEOFF;
306 u32 savePFIT_PGM_RATIOS; 312 u32 savePFIT_PGM_RATIOS;
313 u32 saveBLC_HIST_CTL;
307 u32 saveBLC_PWM_CTL; 314 u32 saveBLC_PWM_CTL;
308 u32 saveBLC_PWM_CTL2; 315 u32 saveBLC_PWM_CTL2;
316 u32 saveBLC_CPU_PWM_CTL;
317 u32 saveBLC_CPU_PWM_CTL2;
309 u32 saveFPB0; 318 u32 saveFPB0;
310 u32 saveFPB1; 319 u32 saveFPB1;
311 u32 saveDPLL_B; 320 u32 saveDPLL_B;
@@ -317,6 +326,12 @@ typedef struct drm_i915_private {
317 u32 saveVBLANK_B; 326 u32 saveVBLANK_B;
318 u32 saveVSYNC_B; 327 u32 saveVSYNC_B;
319 u32 saveBCLRPAT_B; 328 u32 saveBCLRPAT_B;
329 u32 saveTRANS_HTOTAL_B;
330 u32 saveTRANS_HBLANK_B;
331 u32 saveTRANS_HSYNC_B;
332 u32 saveTRANS_VTOTAL_B;
333 u32 saveTRANS_VBLANK_B;
334 u32 saveTRANS_VSYNC_B;
320 u32 savePIPEBSTAT; 335 u32 savePIPEBSTAT;
321 u32 saveDSPBSTRIDE; 336 u32 saveDSPBSTRIDE;
322 u32 saveDSPBSIZE; 337 u32 saveDSPBSIZE;
@@ -342,6 +357,7 @@ typedef struct drm_i915_private {
342 u32 savePFIT_CONTROL; 357 u32 savePFIT_CONTROL;
343 u32 save_palette_a[256]; 358 u32 save_palette_a[256];
344 u32 save_palette_b[256]; 359 u32 save_palette_b[256];
360 u32 saveDPFC_CB_BASE;
345 u32 saveFBC_CFB_BASE; 361 u32 saveFBC_CFB_BASE;
346 u32 saveFBC_LL_BASE; 362 u32 saveFBC_LL_BASE;
347 u32 saveFBC_CONTROL; 363 u32 saveFBC_CONTROL;
@@ -349,6 +365,12 @@ typedef struct drm_i915_private {
349 u32 saveIER; 365 u32 saveIER;
350 u32 saveIIR; 366 u32 saveIIR;
351 u32 saveIMR; 367 u32 saveIMR;
368 u32 saveDEIER;
369 u32 saveDEIMR;
370 u32 saveGTIER;
371 u32 saveGTIMR;
372 u32 saveFDI_RXA_IMR;
373 u32 saveFDI_RXB_IMR;
352 u32 saveCACHE_MODE_0; 374 u32 saveCACHE_MODE_0;
353 u32 saveD_STATE; 375 u32 saveD_STATE;
354 u32 saveDSPCLK_GATE_D; 376 u32 saveDSPCLK_GATE_D;
@@ -382,6 +404,16 @@ typedef struct drm_i915_private {
382 u32 savePIPEB_DP_LINK_M; 404 u32 savePIPEB_DP_LINK_M;
383 u32 savePIPEA_DP_LINK_N; 405 u32 savePIPEA_DP_LINK_N;
384 u32 savePIPEB_DP_LINK_N; 406 u32 savePIPEB_DP_LINK_N;
407 u32 saveFDI_RXA_CTL;
408 u32 saveFDI_TXA_CTL;
409 u32 saveFDI_RXB_CTL;
410 u32 saveFDI_TXB_CTL;
411 u32 savePFA_CTL_1;
412 u32 savePFB_CTL_1;
413 u32 savePFA_WIN_SZ;
414 u32 savePFB_WIN_SZ;
415 u32 savePFA_WIN_POS;
416 u32 savePFB_WIN_POS;
385 417
386 struct { 418 struct {
387 struct drm_mm gtt_space; 419 struct drm_mm gtt_space;
@@ -492,6 +524,8 @@ typedef struct drm_i915_private {
492 struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT]; 524 struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
493 } mm; 525 } mm;
494 struct sdvo_device_mapping sdvo_mappings[2]; 526 struct sdvo_device_mapping sdvo_mappings[2];
527 /* indicate whether the LVDS_BORDER should be enabled or not */
528 unsigned int lvds_border_bits;
495 529
496 /* Reclocking support */ 530 /* Reclocking support */
497 bool render_reclock_avail; 531 bool render_reclock_avail;
@@ -981,7 +1015,10 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
981 1015
982#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev)) 1016#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev))
983#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev)) 1017#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev))
984#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev))) 1018#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \
1019 (IS_I9XX(dev) || IS_GM45(dev)) && \
1020 !IS_IGD(dev) && \
1021 !IS_IGDNG(dev))
985 1022
986#define PRIMARY_RINGBUFFER_SIZE (128*1024) 1023#define PRIMARY_RINGBUFFER_SIZE (128*1024)
987 1024
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0466ddbeba32..1687edf68795 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -968,6 +968,8 @@
968#define LVDS_PORT_EN (1 << 31) 968#define LVDS_PORT_EN (1 << 31)
969/* Selects pipe B for LVDS data. Must be set on pre-965. */ 969/* Selects pipe B for LVDS data. Must be set on pre-965. */
970#define LVDS_PIPEB_SELECT (1 << 30) 970#define LVDS_PIPEB_SELECT (1 << 30)
971/* Enable border for unscaled (or aspect-scaled) display */
972#define LVDS_BORDER_ENABLE (1 << 15)
971/* 973/*
972 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per 974 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per
973 * pixel. 975 * pixel.
@@ -1078,6 +1080,8 @@
1078#define BACKLIGHT_DUTY_CYCLE_SHIFT (0) 1080#define BACKLIGHT_DUTY_CYCLE_SHIFT (0)
1079#define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) 1081#define BACKLIGHT_DUTY_CYCLE_MASK (0xffff)
1080 1082
1083#define BLC_HIST_CTL 0x61260
1084
1081/* TV port control */ 1085/* TV port control */
1082#define TV_CTL 0x68000 1086#define TV_CTL 0x68000
1083/** Enables the TV encoder */ 1087/** Enables the TV encoder */
@@ -1780,6 +1784,11 @@
1780#define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */ 1784#define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */
1781#define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1) 1785#define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1)
1782#define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0) 1786#define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0)
1787#define PIPE_BPC_MASK (7 << 5) /* Ironlake */
1788#define PIPE_8BPC (0 << 5)
1789#define PIPE_10BPC (1 << 5)
1790#define PIPE_6BPC (2 << 5)
1791#define PIPE_12BPC (3 << 5)
1783 1792
1784#define DSPARB 0x70030 1793#define DSPARB 0x70030
1785#define DSPARB_CSTART_MASK (0x7f << 7) 1794#define DSPARB_CSTART_MASK (0x7f << 7)
@@ -1790,17 +1799,29 @@
1790#define DSPARB_AEND_SHIFT 0 1799#define DSPARB_AEND_SHIFT 0
1791 1800
1792#define DSPFW1 0x70034 1801#define DSPFW1 0x70034
1802#define DSPFW_SR_SHIFT 23
1803#define DSPFW_CURSORB_SHIFT 16
1804#define DSPFW_PLANEB_SHIFT 8
1793#define DSPFW2 0x70038 1805#define DSPFW2 0x70038
1806#define DSPFW_CURSORA_MASK 0x00003f00
1807#define DSPFW_CURSORA_SHIFT 16
1794#define DSPFW3 0x7003c 1808#define DSPFW3 0x7003c
1809#define DSPFW_HPLL_SR_EN (1<<31)
1810#define DSPFW_CURSOR_SR_SHIFT 24
1795#define IGD_SELF_REFRESH_EN (1<<30) 1811#define IGD_SELF_REFRESH_EN (1<<30)
1796 1812
1797/* FIFO watermark sizes etc */ 1813/* FIFO watermark sizes etc */
1814#define G4X_FIFO_LINE_SIZE 64
1798#define I915_FIFO_LINE_SIZE 64 1815#define I915_FIFO_LINE_SIZE 64
1799#define I830_FIFO_LINE_SIZE 32 1816#define I830_FIFO_LINE_SIZE 32
1817
1818#define G4X_FIFO_SIZE 127
1800#define I945_FIFO_SIZE 127 /* 945 & 965 */ 1819#define I945_FIFO_SIZE 127 /* 945 & 965 */
1801#define I915_FIFO_SIZE 95 1820#define I915_FIFO_SIZE 95
1802#define I855GM_FIFO_SIZE 127 /* In cachelines */ 1821#define I855GM_FIFO_SIZE 127 /* In cachelines */
1803#define I830_FIFO_SIZE 95 1822#define I830_FIFO_SIZE 95
1823
1824#define G4X_MAX_WM 0x3f
1804#define I915_MAX_WM 0x3f 1825#define I915_MAX_WM 0x3f
1805 1826
1806#define IGD_DISPLAY_FIFO 512 /* in 64byte unit */ 1827#define IGD_DISPLAY_FIFO 512 /* in 64byte unit */
@@ -2030,6 +2051,11 @@
2030#define PFA_CTL_1 0x68080 2051#define PFA_CTL_1 0x68080
2031#define PFB_CTL_1 0x68880 2052#define PFB_CTL_1 0x68880
2032#define PF_ENABLE (1<<31) 2053#define PF_ENABLE (1<<31)
2054#define PF_FILTER_MASK (3<<23)
2055#define PF_FILTER_PROGRAMMED (0<<23)
2056#define PF_FILTER_MED_3x3 (1<<23)
2057#define PF_FILTER_EDGE_ENHANCE (2<<23)
2058#define PF_FILTER_EDGE_SOFTEN (3<<23)
2033#define PFA_WIN_SZ 0x68074 2059#define PFA_WIN_SZ 0x68074
2034#define PFB_WIN_SZ 0x68874 2060#define PFB_WIN_SZ 0x68874
2035#define PFA_WIN_POS 0x68070 2061#define PFA_WIN_POS 0x68070
@@ -2149,11 +2175,11 @@
2149#define DREF_CPU_SOURCE_OUTPUT_MASK (3<<13) 2175#define DREF_CPU_SOURCE_OUTPUT_MASK (3<<13)
2150#define DREF_SSC_SOURCE_DISABLE (0<<11) 2176#define DREF_SSC_SOURCE_DISABLE (0<<11)
2151#define DREF_SSC_SOURCE_ENABLE (2<<11) 2177#define DREF_SSC_SOURCE_ENABLE (2<<11)
2152#define DREF_SSC_SOURCE_MASK (2<<11) 2178#define DREF_SSC_SOURCE_MASK (3<<11)
2153#define DREF_NONSPREAD_SOURCE_DISABLE (0<<9) 2179#define DREF_NONSPREAD_SOURCE_DISABLE (0<<9)
2154#define DREF_NONSPREAD_CK505_ENABLE (1<<9) 2180#define DREF_NONSPREAD_CK505_ENABLE (1<<9)
2155#define DREF_NONSPREAD_SOURCE_ENABLE (2<<9) 2181#define DREF_NONSPREAD_SOURCE_ENABLE (2<<9)
2156#define DREF_NONSPREAD_SOURCE_MASK (2<<9) 2182#define DREF_NONSPREAD_SOURCE_MASK (3<<9)
2157#define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7) 2183#define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7)
2158#define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7) 2184#define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7)
2159#define DREF_SSC4_DOWNSPREAD (0<<6) 2185#define DREF_SSC4_DOWNSPREAD (0<<6)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index bd6d8d91ca9f..992d5617e798 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -32,11 +32,15 @@
32static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe) 32static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
33{ 33{
34 struct drm_i915_private *dev_priv = dev->dev_private; 34 struct drm_i915_private *dev_priv = dev->dev_private;
35 u32 dpll_reg;
35 36
36 if (pipe == PIPE_A) 37 if (IS_IGDNG(dev)) {
37 return (I915_READ(DPLL_A) & DPLL_VCO_ENABLE); 38 dpll_reg = (pipe == PIPE_A) ? PCH_DPLL_A: PCH_DPLL_B;
38 else 39 } else {
39 return (I915_READ(DPLL_B) & DPLL_VCO_ENABLE); 40 dpll_reg = (pipe == PIPE_A) ? DPLL_A: DPLL_B;
41 }
42
43 return (I915_READ(dpll_reg) & DPLL_VCO_ENABLE);
40} 44}
41 45
42static void i915_save_palette(struct drm_device *dev, enum pipe pipe) 46static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
@@ -49,6 +53,9 @@ static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
49 if (!i915_pipe_enabled(dev, pipe)) 53 if (!i915_pipe_enabled(dev, pipe))
50 return; 54 return;
51 55
56 if (IS_IGDNG(dev))
57 reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
58
52 if (pipe == PIPE_A) 59 if (pipe == PIPE_A)
53 array = dev_priv->save_palette_a; 60 array = dev_priv->save_palette_a;
54 else 61 else
@@ -68,6 +75,9 @@ static void i915_restore_palette(struct drm_device *dev, enum pipe pipe)
68 if (!i915_pipe_enabled(dev, pipe)) 75 if (!i915_pipe_enabled(dev, pipe))
69 return; 76 return;
70 77
78 if (IS_IGDNG(dev))
79 reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
80
71 if (pipe == PIPE_A) 81 if (pipe == PIPE_A)
72 array = dev_priv->save_palette_a; 82 array = dev_priv->save_palette_a;
73 else 83 else
@@ -232,10 +242,16 @@ static void i915_save_modeset_reg(struct drm_device *dev)
232 /* Pipe & plane A info */ 242 /* Pipe & plane A info */
233 dev_priv->savePIPEACONF = I915_READ(PIPEACONF); 243 dev_priv->savePIPEACONF = I915_READ(PIPEACONF);
234 dev_priv->savePIPEASRC = I915_READ(PIPEASRC); 244 dev_priv->savePIPEASRC = I915_READ(PIPEASRC);
235 dev_priv->saveFPA0 = I915_READ(FPA0); 245 if (IS_IGDNG(dev)) {
236 dev_priv->saveFPA1 = I915_READ(FPA1); 246 dev_priv->saveFPA0 = I915_READ(PCH_FPA0);
237 dev_priv->saveDPLL_A = I915_READ(DPLL_A); 247 dev_priv->saveFPA1 = I915_READ(PCH_FPA1);
238 if (IS_I965G(dev)) 248 dev_priv->saveDPLL_A = I915_READ(PCH_DPLL_A);
249 } else {
250 dev_priv->saveFPA0 = I915_READ(FPA0);
251 dev_priv->saveFPA1 = I915_READ(FPA1);
252 dev_priv->saveDPLL_A = I915_READ(DPLL_A);
253 }
254 if (IS_I965G(dev) && !IS_IGDNG(dev))
239 dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD); 255 dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD);
240 dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A); 256 dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A);
241 dev_priv->saveHBLANK_A = I915_READ(HBLANK_A); 257 dev_priv->saveHBLANK_A = I915_READ(HBLANK_A);
@@ -243,7 +259,24 @@ static void i915_save_modeset_reg(struct drm_device *dev)
243 dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A); 259 dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A);
244 dev_priv->saveVBLANK_A = I915_READ(VBLANK_A); 260 dev_priv->saveVBLANK_A = I915_READ(VBLANK_A);
245 dev_priv->saveVSYNC_A = I915_READ(VSYNC_A); 261 dev_priv->saveVSYNC_A = I915_READ(VSYNC_A);
246 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); 262 if (!IS_IGDNG(dev))
263 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
264
265 if (IS_IGDNG(dev)) {
266 dev_priv->saveFDI_TXA_CTL = I915_READ(FDI_TXA_CTL);
267 dev_priv->saveFDI_RXA_CTL = I915_READ(FDI_RXA_CTL);
268
269 dev_priv->savePFA_CTL_1 = I915_READ(PFA_CTL_1);
270 dev_priv->savePFA_WIN_SZ = I915_READ(PFA_WIN_SZ);
271 dev_priv->savePFA_WIN_POS = I915_READ(PFA_WIN_POS);
272
273 dev_priv->saveTRANS_HTOTAL_A = I915_READ(TRANS_HTOTAL_A);
274 dev_priv->saveTRANS_HBLANK_A = I915_READ(TRANS_HBLANK_A);
275 dev_priv->saveTRANS_HSYNC_A = I915_READ(TRANS_HSYNC_A);
276 dev_priv->saveTRANS_VTOTAL_A = I915_READ(TRANS_VTOTAL_A);
277 dev_priv->saveTRANS_VBLANK_A = I915_READ(TRANS_VBLANK_A);
278 dev_priv->saveTRANS_VSYNC_A = I915_READ(TRANS_VSYNC_A);
279 }
247 280
248 dev_priv->saveDSPACNTR = I915_READ(DSPACNTR); 281 dev_priv->saveDSPACNTR = I915_READ(DSPACNTR);
249 dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE); 282 dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE);
@@ -260,10 +293,16 @@ static void i915_save_modeset_reg(struct drm_device *dev)
260 /* Pipe & plane B info */ 293 /* Pipe & plane B info */
261 dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF); 294 dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF);
262 dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC); 295 dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC);
263 dev_priv->saveFPB0 = I915_READ(FPB0); 296 if (IS_IGDNG(dev)) {
264 dev_priv->saveFPB1 = I915_READ(FPB1); 297 dev_priv->saveFPB0 = I915_READ(PCH_FPB0);
265 dev_priv->saveDPLL_B = I915_READ(DPLL_B); 298 dev_priv->saveFPB1 = I915_READ(PCH_FPB1);
266 if (IS_I965G(dev)) 299 dev_priv->saveDPLL_B = I915_READ(PCH_DPLL_B);
300 } else {
301 dev_priv->saveFPB0 = I915_READ(FPB0);
302 dev_priv->saveFPB1 = I915_READ(FPB1);
303 dev_priv->saveDPLL_B = I915_READ(DPLL_B);
304 }
305 if (IS_I965G(dev) && !IS_IGDNG(dev))
267 dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD); 306 dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD);
268 dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B); 307 dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B);
269 dev_priv->saveHBLANK_B = I915_READ(HBLANK_B); 308 dev_priv->saveHBLANK_B = I915_READ(HBLANK_B);
@@ -271,7 +310,24 @@ static void i915_save_modeset_reg(struct drm_device *dev)
271 dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B); 310 dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B);
272 dev_priv->saveVBLANK_B = I915_READ(VBLANK_B); 311 dev_priv->saveVBLANK_B = I915_READ(VBLANK_B);
273 dev_priv->saveVSYNC_B = I915_READ(VSYNC_B); 312 dev_priv->saveVSYNC_B = I915_READ(VSYNC_B);
274 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); 313 if (!IS_IGDNG(dev))
314 dev_priv->saveBCLRPAT_B = I915_READ(BCLRPAT_B);
315
316 if (IS_IGDNG(dev)) {
317 dev_priv->saveFDI_TXB_CTL = I915_READ(FDI_TXB_CTL);
318 dev_priv->saveFDI_RXB_CTL = I915_READ(FDI_RXB_CTL);
319
320 dev_priv->savePFB_CTL_1 = I915_READ(PFB_CTL_1);
321 dev_priv->savePFB_WIN_SZ = I915_READ(PFB_WIN_SZ);
322 dev_priv->savePFB_WIN_POS = I915_READ(PFB_WIN_POS);
323
324 dev_priv->saveTRANS_HTOTAL_B = I915_READ(TRANS_HTOTAL_B);
325 dev_priv->saveTRANS_HBLANK_B = I915_READ(TRANS_HBLANK_B);
326 dev_priv->saveTRANS_HSYNC_B = I915_READ(TRANS_HSYNC_B);
327 dev_priv->saveTRANS_VTOTAL_B = I915_READ(TRANS_VTOTAL_B);
328 dev_priv->saveTRANS_VBLANK_B = I915_READ(TRANS_VBLANK_B);
329 dev_priv->saveTRANS_VSYNC_B = I915_READ(TRANS_VSYNC_B);
330 }
275 331
276 dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR); 332 dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR);
277 dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE); 333 dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE);
@@ -290,23 +346,41 @@ static void i915_save_modeset_reg(struct drm_device *dev)
290static void i915_restore_modeset_reg(struct drm_device *dev) 346static void i915_restore_modeset_reg(struct drm_device *dev)
291{ 347{
292 struct drm_i915_private *dev_priv = dev->dev_private; 348 struct drm_i915_private *dev_priv = dev->dev_private;
349 int dpll_a_reg, fpa0_reg, fpa1_reg;
350 int dpll_b_reg, fpb0_reg, fpb1_reg;
293 351
294 if (drm_core_check_feature(dev, DRIVER_MODESET)) 352 if (drm_core_check_feature(dev, DRIVER_MODESET))
295 return; 353 return;
296 354
355 if (IS_IGDNG(dev)) {
356 dpll_a_reg = PCH_DPLL_A;
357 dpll_b_reg = PCH_DPLL_B;
358 fpa0_reg = PCH_FPA0;
359 fpb0_reg = PCH_FPB0;
360 fpa1_reg = PCH_FPA1;
361 fpb1_reg = PCH_FPB1;
362 } else {
363 dpll_a_reg = DPLL_A;
364 dpll_b_reg = DPLL_B;
365 fpa0_reg = FPA0;
366 fpb0_reg = FPB0;
367 fpa1_reg = FPA1;
368 fpb1_reg = FPB1;
369 }
370
297 /* Pipe & plane A info */ 371 /* Pipe & plane A info */
298 /* Prime the clock */ 372 /* Prime the clock */
299 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { 373 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
300 I915_WRITE(DPLL_A, dev_priv->saveDPLL_A & 374 I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A &
301 ~DPLL_VCO_ENABLE); 375 ~DPLL_VCO_ENABLE);
302 DRM_UDELAY(150); 376 DRM_UDELAY(150);
303 } 377 }
304 I915_WRITE(FPA0, dev_priv->saveFPA0); 378 I915_WRITE(fpa0_reg, dev_priv->saveFPA0);
305 I915_WRITE(FPA1, dev_priv->saveFPA1); 379 I915_WRITE(fpa1_reg, dev_priv->saveFPA1);
306 /* Actually enable it */ 380 /* Actually enable it */
307 I915_WRITE(DPLL_A, dev_priv->saveDPLL_A); 381 I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A);
308 DRM_UDELAY(150); 382 DRM_UDELAY(150);
309 if (IS_I965G(dev)) 383 if (IS_I965G(dev) && !IS_IGDNG(dev))
310 I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD); 384 I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD);
311 DRM_UDELAY(150); 385 DRM_UDELAY(150);
312 386
@@ -317,7 +391,24 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
317 I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A); 391 I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A);
318 I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A); 392 I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A);
319 I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A); 393 I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A);
320 I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A); 394 if (!IS_IGDNG(dev))
395 I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A);
396
397 if (IS_IGDNG(dev)) {
398 I915_WRITE(FDI_RXA_CTL, dev_priv->saveFDI_RXA_CTL);
399 I915_WRITE(FDI_TXA_CTL, dev_priv->saveFDI_TXA_CTL);
400
401 I915_WRITE(PFA_CTL_1, dev_priv->savePFA_CTL_1);
402 I915_WRITE(PFA_WIN_SZ, dev_priv->savePFA_WIN_SZ);
403 I915_WRITE(PFA_WIN_POS, dev_priv->savePFA_WIN_POS);
404
405 I915_WRITE(TRANS_HTOTAL_A, dev_priv->saveTRANS_HTOTAL_A);
406 I915_WRITE(TRANS_HBLANK_A, dev_priv->saveTRANS_HBLANK_A);
407 I915_WRITE(TRANS_HSYNC_A, dev_priv->saveTRANS_HSYNC_A);
408 I915_WRITE(TRANS_VTOTAL_A, dev_priv->saveTRANS_VTOTAL_A);
409 I915_WRITE(TRANS_VBLANK_A, dev_priv->saveTRANS_VBLANK_A);
410 I915_WRITE(TRANS_VSYNC_A, dev_priv->saveTRANS_VSYNC_A);
411 }
321 412
322 /* Restore plane info */ 413 /* Restore plane info */
323 I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE); 414 I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE);
@@ -339,14 +430,14 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
339 430
340 /* Pipe & plane B info */ 431 /* Pipe & plane B info */
341 if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) { 432 if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) {
342 I915_WRITE(DPLL_B, dev_priv->saveDPLL_B & 433 I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B &
343 ~DPLL_VCO_ENABLE); 434 ~DPLL_VCO_ENABLE);
344 DRM_UDELAY(150); 435 DRM_UDELAY(150);
345 } 436 }
346 I915_WRITE(FPB0, dev_priv->saveFPB0); 437 I915_WRITE(fpb0_reg, dev_priv->saveFPB0);
347 I915_WRITE(FPB1, dev_priv->saveFPB1); 438 I915_WRITE(fpb1_reg, dev_priv->saveFPB1);
348 /* Actually enable it */ 439 /* Actually enable it */
349 I915_WRITE(DPLL_B, dev_priv->saveDPLL_B); 440 I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B);
350 DRM_UDELAY(150); 441 DRM_UDELAY(150);
351 if (IS_I965G(dev)) 442 if (IS_I965G(dev))
352 I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD); 443 I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD);
@@ -359,7 +450,24 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
359 I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B); 450 I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B);
360 I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B); 451 I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B);
361 I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B); 452 I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B);
362 I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B); 453 if (!IS_IGDNG(dev))
454 I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B);
455
456 if (IS_IGDNG(dev)) {
457 I915_WRITE(FDI_RXB_CTL, dev_priv->saveFDI_RXB_CTL);
458 I915_WRITE(FDI_TXB_CTL, dev_priv->saveFDI_TXB_CTL);
459
460 I915_WRITE(PFB_CTL_1, dev_priv->savePFB_CTL_1);
461 I915_WRITE(PFB_WIN_SZ, dev_priv->savePFB_WIN_SZ);
462 I915_WRITE(PFB_WIN_POS, dev_priv->savePFB_WIN_POS);
463
464 I915_WRITE(TRANS_HTOTAL_B, dev_priv->saveTRANS_HTOTAL_B);
465 I915_WRITE(TRANS_HBLANK_B, dev_priv->saveTRANS_HBLANK_B);
466 I915_WRITE(TRANS_HSYNC_B, dev_priv->saveTRANS_HSYNC_B);
467 I915_WRITE(TRANS_VTOTAL_B, dev_priv->saveTRANS_VTOTAL_B);
468 I915_WRITE(TRANS_VBLANK_B, dev_priv->saveTRANS_VBLANK_B);
469 I915_WRITE(TRANS_VSYNC_B, dev_priv->saveTRANS_VSYNC_B);
470 }
363 471
364 /* Restore plane info */ 472 /* Restore plane info */
365 I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE); 473 I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE);
@@ -404,21 +512,43 @@ void i915_save_display(struct drm_device *dev)
404 dev_priv->saveCURSIZE = I915_READ(CURSIZE); 512 dev_priv->saveCURSIZE = I915_READ(CURSIZE);
405 513
406 /* CRT state */ 514 /* CRT state */
407 dev_priv->saveADPA = I915_READ(ADPA); 515 if (IS_IGDNG(dev)) {
516 dev_priv->saveADPA = I915_READ(PCH_ADPA);
517 } else {
518 dev_priv->saveADPA = I915_READ(ADPA);
519 }
408 520
409 /* LVDS state */ 521 /* LVDS state */
410 dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL); 522 if (IS_IGDNG(dev)) {
411 dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS); 523 dev_priv->savePP_CONTROL = I915_READ(PCH_PP_CONTROL);
412 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL); 524 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_PCH_CTL1);
413 if (IS_I965G(dev)) 525 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_PCH_CTL2);
414 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); 526 dev_priv->saveBLC_CPU_PWM_CTL = I915_READ(BLC_PWM_CPU_CTL);
415 if (IS_MOBILE(dev) && !IS_I830(dev)) 527 dev_priv->saveBLC_CPU_PWM_CTL2 = I915_READ(BLC_PWM_CPU_CTL2);
416 dev_priv->saveLVDS = I915_READ(LVDS); 528 dev_priv->saveLVDS = I915_READ(PCH_LVDS);
417 if (!IS_I830(dev) && !IS_845G(dev)) 529 } else {
530 dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL);
531 dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS);
532 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL);
533 dev_priv->saveBLC_HIST_CTL = I915_READ(BLC_HIST_CTL);
534 if (IS_I965G(dev))
535 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
536 if (IS_MOBILE(dev) && !IS_I830(dev))
537 dev_priv->saveLVDS = I915_READ(LVDS);
538 }
539
540 if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
418 dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL); 541 dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
419 dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS); 542
420 dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS); 543 if (IS_IGDNG(dev)) {
421 dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR); 544 dev_priv->savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS);
545 dev_priv->savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS);
546 dev_priv->savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR);
547 } else {
548 dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS);
549 dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);
550 dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR);
551 }
422 552
423 /* Display Port state */ 553 /* Display Port state */
424 if (SUPPORTS_INTEGRATED_DP(dev)) { 554 if (SUPPORTS_INTEGRATED_DP(dev)) {
@@ -437,16 +567,23 @@ void i915_save_display(struct drm_device *dev)
437 /* FIXME: save TV & SDVO state */ 567 /* FIXME: save TV & SDVO state */
438 568
439 /* FBC state */ 569 /* FBC state */
440 dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE); 570 if (IS_GM45(dev)) {
441 dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE); 571 dev_priv->saveDPFC_CB_BASE = I915_READ(DPFC_CB_BASE);
442 dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2); 572 } else {
443 dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL); 573 dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
574 dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE);
575 dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2);
576 dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
577 }
444 578
445 /* VGA state */ 579 /* VGA state */
446 dev_priv->saveVGA0 = I915_READ(VGA0); 580 dev_priv->saveVGA0 = I915_READ(VGA0);
447 dev_priv->saveVGA1 = I915_READ(VGA1); 581 dev_priv->saveVGA1 = I915_READ(VGA1);
448 dev_priv->saveVGA_PD = I915_READ(VGA_PD); 582 dev_priv->saveVGA_PD = I915_READ(VGA_PD);
449 dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); 583 if (IS_IGDNG(dev))
584 dev_priv->saveVGACNTRL = I915_READ(CPU_VGACNTRL);
585 else
586 dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
450 587
451 i915_save_vga(dev); 588 i915_save_vga(dev);
452} 589}
@@ -485,22 +622,41 @@ void i915_restore_display(struct drm_device *dev)
485 I915_WRITE(CURSIZE, dev_priv->saveCURSIZE); 622 I915_WRITE(CURSIZE, dev_priv->saveCURSIZE);
486 623
487 /* CRT state */ 624 /* CRT state */
488 I915_WRITE(ADPA, dev_priv->saveADPA); 625 if (IS_IGDNG(dev))
626 I915_WRITE(PCH_ADPA, dev_priv->saveADPA);
627 else
628 I915_WRITE(ADPA, dev_priv->saveADPA);
489 629
490 /* LVDS state */ 630 /* LVDS state */
491 if (IS_I965G(dev)) 631 if (IS_I965G(dev) && !IS_IGDNG(dev))
492 I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2); 632 I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2);
493 if (IS_MOBILE(dev) && !IS_I830(dev)) 633
634 if (IS_IGDNG(dev)) {
635 I915_WRITE(PCH_LVDS, dev_priv->saveLVDS);
636 } else if (IS_MOBILE(dev) && !IS_I830(dev))
494 I915_WRITE(LVDS, dev_priv->saveLVDS); 637 I915_WRITE(LVDS, dev_priv->saveLVDS);
495 if (!IS_I830(dev) && !IS_845G(dev)) 638
639 if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
496 I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL); 640 I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL);
497 641
498 I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); 642 if (IS_IGDNG(dev)) {
499 I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL); 643 I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->saveBLC_PWM_CTL);
500 I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); 644 I915_WRITE(BLC_PWM_PCH_CTL2, dev_priv->saveBLC_PWM_CTL2);
501 I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); 645 I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL);
502 I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR); 646 I915_WRITE(BLC_PWM_CPU_CTL2, dev_priv->saveBLC_CPU_PWM_CTL2);
503 I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL); 647 I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
648 I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
649 I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR);
650 I915_WRITE(PCH_PP_CONTROL, dev_priv->savePP_CONTROL);
651 } else {
652 I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
653 I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
654 I915_WRITE(BLC_HIST_CTL, dev_priv->saveBLC_HIST_CTL);
655 I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
656 I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
657 I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);
658 I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
659 }
504 660
505 /* Display Port state */ 661 /* Display Port state */
506 if (SUPPORTS_INTEGRATED_DP(dev)) { 662 if (SUPPORTS_INTEGRATED_DP(dev)) {
@@ -511,13 +667,22 @@ void i915_restore_display(struct drm_device *dev)
511 /* FIXME: restore TV & SDVO state */ 667 /* FIXME: restore TV & SDVO state */
512 668
513 /* FBC info */ 669 /* FBC info */
514 I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE); 670 if (IS_GM45(dev)) {
515 I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE); 671 g4x_disable_fbc(dev);
516 I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2); 672 I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE);
517 I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL); 673 } else {
674 i8xx_disable_fbc(dev);
675 I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
676 I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
677 I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
678 I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL);
679 }
518 680
519 /* VGA state */ 681 /* VGA state */
520 I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); 682 if (IS_IGDNG(dev))
683 I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL);
684 else
685 I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
521 I915_WRITE(VGA0, dev_priv->saveVGA0); 686 I915_WRITE(VGA0, dev_priv->saveVGA0);
522 I915_WRITE(VGA1, dev_priv->saveVGA1); 687 I915_WRITE(VGA1, dev_priv->saveVGA1);
523 I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); 688 I915_WRITE(VGA_PD, dev_priv->saveVGA_PD);
@@ -543,8 +708,17 @@ int i915_save_state(struct drm_device *dev)
543 i915_save_display(dev); 708 i915_save_display(dev);
544 709
545 /* Interrupt state */ 710 /* Interrupt state */
546 dev_priv->saveIER = I915_READ(IER); 711 if (IS_IGDNG(dev)) {
547 dev_priv->saveIMR = I915_READ(IMR); 712 dev_priv->saveDEIER = I915_READ(DEIER);
713 dev_priv->saveDEIMR = I915_READ(DEIMR);
714 dev_priv->saveGTIER = I915_READ(GTIER);
715 dev_priv->saveGTIMR = I915_READ(GTIMR);
716 dev_priv->saveFDI_RXA_IMR = I915_READ(FDI_RXA_IMR);
717 dev_priv->saveFDI_RXB_IMR = I915_READ(FDI_RXB_IMR);
718 } else {
719 dev_priv->saveIER = I915_READ(IER);
720 dev_priv->saveIMR = I915_READ(IMR);
721 }
548 722
549 /* Clock gating state */ 723 /* Clock gating state */
550 dev_priv->saveD_STATE = I915_READ(D_STATE); 724 dev_priv->saveD_STATE = I915_READ(D_STATE);
@@ -609,8 +783,17 @@ int i915_restore_state(struct drm_device *dev)
609 i915_restore_display(dev); 783 i915_restore_display(dev);
610 784
611 /* Interrupt state */ 785 /* Interrupt state */
612 I915_WRITE (IER, dev_priv->saveIER); 786 if (IS_IGDNG(dev)) {
613 I915_WRITE (IMR, dev_priv->saveIMR); 787 I915_WRITE(DEIER, dev_priv->saveDEIER);
788 I915_WRITE(DEIMR, dev_priv->saveDEIMR);
789 I915_WRITE(GTIER, dev_priv->saveGTIER);
790 I915_WRITE(GTIMR, dev_priv->saveGTIMR);
791 I915_WRITE(FDI_RXA_IMR, dev_priv->saveFDI_RXA_IMR);
792 I915_WRITE(FDI_RXB_IMR, dev_priv->saveFDI_RXB_IMR);
793 } else {
794 I915_WRITE (IER, dev_priv->saveIER);
795 I915_WRITE (IMR, dev_priv->saveIMR);
796 }
614 797
615 /* Clock gating state */ 798 /* Clock gating state */
616 I915_WRITE (D_STATE, dev_priv->saveD_STATE); 799 I915_WRITE (D_STATE, dev_priv->saveD_STATE);
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 4337414846b6..96cd256e60e6 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -351,20 +351,18 @@ parse_driver_features(struct drm_i915_private *dev_priv,
351 struct drm_device *dev = dev_priv->dev; 351 struct drm_device *dev = dev_priv->dev;
352 struct bdb_driver_features *driver; 352 struct bdb_driver_features *driver;
353 353
354 /* set default for chips without eDP */
355 if (!SUPPORTS_EDP(dev)) {
356 dev_priv->edp_support = 0;
357 return;
358 }
359
360 driver = find_section(bdb, BDB_DRIVER_FEATURES); 354 driver = find_section(bdb, BDB_DRIVER_FEATURES);
361 if (!driver) 355 if (!driver)
362 return; 356 return;
363 357
364 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP) 358 if (driver && SUPPORTS_EDP(dev) &&
359 driver->lvds_config == BDB_DRIVER_FEATURE_EDP) {
365 dev_priv->edp_support = 1; 360 dev_priv->edp_support = 1;
361 } else {
362 dev_priv->edp_support = 0;
363 }
366 364
367 if (driver->dual_frequency) 365 if (driver && driver->dual_frequency)
368 dev_priv->render_reclock_avail = true; 366 dev_priv->render_reclock_avail = true;
369} 367}
370 368
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3c14240cc002..3ba6546b7c7f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -943,6 +943,7 @@ intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
943 clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2); 943 clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2);
944 clock.p = (clock.p1 * clock.p2); 944 clock.p = (clock.p1 * clock.p2);
945 clock.dot = 96000 * clock.m / (clock.n + 2) / clock.p; 945 clock.dot = 96000 * clock.m / (clock.n + 2) / clock.p;
946 clock.vco = 0;
946 memcpy(best_clock, &clock, sizeof(intel_clock_t)); 947 memcpy(best_clock, &clock, sizeof(intel_clock_t));
947 return true; 948 return true;
948} 949}
@@ -1260,9 +1261,11 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
1260 return ret; 1261 return ret;
1261 } 1262 }
1262 1263
1263 /* Pre-i965 needs to install a fence for tiled scan-out */ 1264 /* Install a fence for tiled scan-out. Pre-i965 always needs a fence,
1264 if (!IS_I965G(dev) && 1265 * whereas 965+ only requires a fence if using framebuffer compression.
1265 obj_priv->fence_reg == I915_FENCE_REG_NONE && 1266 * For simplicity, we always install a fence as the cost is not that onerous.
1267 */
1268 if (obj_priv->fence_reg == I915_FENCE_REG_NONE &&
1266 obj_priv->tiling_mode != I915_TILING_NONE) { 1269 obj_priv->tiling_mode != I915_TILING_NONE) {
1267 ret = i915_gem_object_get_fence_reg(obj); 1270 ret = i915_gem_object_get_fence_reg(obj);
1268 if (ret != 0) { 1271 if (ret != 0) {
@@ -1513,7 +1516,7 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1513 /* Enable panel fitting for LVDS */ 1516 /* Enable panel fitting for LVDS */
1514 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { 1517 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
1515 temp = I915_READ(pf_ctl_reg); 1518 temp = I915_READ(pf_ctl_reg);
1516 I915_WRITE(pf_ctl_reg, temp | PF_ENABLE); 1519 I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3);
1517 1520
1518 /* currently full aspect */ 1521 /* currently full aspect */
1519 I915_WRITE(pf_win_pos, 0); 1522 I915_WRITE(pf_win_pos, 0);
@@ -1801,6 +1804,8 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
1801 case DRM_MODE_DPMS_ON: 1804 case DRM_MODE_DPMS_ON:
1802 case DRM_MODE_DPMS_STANDBY: 1805 case DRM_MODE_DPMS_STANDBY:
1803 case DRM_MODE_DPMS_SUSPEND: 1806 case DRM_MODE_DPMS_SUSPEND:
1807 intel_update_watermarks(dev);
1808
1804 /* Enable the DPLL */ 1809 /* Enable the DPLL */
1805 temp = I915_READ(dpll_reg); 1810 temp = I915_READ(dpll_reg);
1806 if ((temp & DPLL_VCO_ENABLE) == 0) { 1811 if ((temp & DPLL_VCO_ENABLE) == 0) {
@@ -1838,7 +1843,6 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
1838 1843
1839 /* Give the overlay scaler a chance to enable if it's on this pipe */ 1844 /* Give the overlay scaler a chance to enable if it's on this pipe */
1840 //intel_crtc_dpms_video(crtc, true); TODO 1845 //intel_crtc_dpms_video(crtc, true); TODO
1841 intel_update_watermarks(dev);
1842 break; 1846 break;
1843 case DRM_MODE_DPMS_OFF: 1847 case DRM_MODE_DPMS_OFF:
1844 intel_update_watermarks(dev); 1848 intel_update_watermarks(dev);
@@ -2082,7 +2086,7 @@ fdi_reduce_ratio(u32 *num, u32 *den)
2082#define LINK_N 0x80000 2086#define LINK_N 0x80000
2083 2087
2084static void 2088static void
2085igdng_compute_m_n(int bytes_per_pixel, int nlanes, 2089igdng_compute_m_n(int bits_per_pixel, int nlanes,
2086 int pixel_clock, int link_clock, 2090 int pixel_clock, int link_clock,
2087 struct fdi_m_n *m_n) 2091 struct fdi_m_n *m_n)
2088{ 2092{
@@ -2092,7 +2096,8 @@ igdng_compute_m_n(int bytes_per_pixel, int nlanes,
2092 2096
2093 temp = (u64) DATA_N * pixel_clock; 2097 temp = (u64) DATA_N * pixel_clock;
2094 temp = div_u64(temp, link_clock); 2098 temp = div_u64(temp, link_clock);
2095 m_n->gmch_m = div_u64(temp * bytes_per_pixel, nlanes); 2099 m_n->gmch_m = div_u64(temp * bits_per_pixel, nlanes);
2100 m_n->gmch_m >>= 3; /* convert to bytes_per_pixel */
2096 m_n->gmch_n = DATA_N; 2101 m_n->gmch_n = DATA_N;
2097 fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n); 2102 fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n);
2098 2103
@@ -2140,6 +2145,13 @@ static struct intel_watermark_params igd_cursor_hplloff_wm = {
2140 IGD_CURSOR_GUARD_WM, 2145 IGD_CURSOR_GUARD_WM,
2141 IGD_FIFO_LINE_SIZE 2146 IGD_FIFO_LINE_SIZE
2142}; 2147};
2148static struct intel_watermark_params g4x_wm_info = {
2149 G4X_FIFO_SIZE,
2150 G4X_MAX_WM,
2151 G4X_MAX_WM,
2152 2,
2153 G4X_FIFO_LINE_SIZE,
2154};
2143static struct intel_watermark_params i945_wm_info = { 2155static struct intel_watermark_params i945_wm_info = {
2144 I945_FIFO_SIZE, 2156 I945_FIFO_SIZE,
2145 I915_MAX_WM, 2157 I915_MAX_WM,
@@ -2430,17 +2442,74 @@ static int i830_get_fifo_size(struct drm_device *dev, int plane)
2430 return size; 2442 return size;
2431} 2443}
2432 2444
2433static void g4x_update_wm(struct drm_device *dev, int unused, int unused2, 2445static void g4x_update_wm(struct drm_device *dev, int planea_clock,
2434 int unused3, int unused4) 2446 int planeb_clock, int sr_hdisplay, int pixel_size)
2435{ 2447{
2436 struct drm_i915_private *dev_priv = dev->dev_private; 2448 struct drm_i915_private *dev_priv = dev->dev_private;
2437 u32 fw_blc_self = I915_READ(FW_BLC_SELF); 2449 int total_size, cacheline_size;
2450 int planea_wm, planeb_wm, cursora_wm, cursorb_wm, cursor_sr;
2451 struct intel_watermark_params planea_params, planeb_params;
2452 unsigned long line_time_us;
2453 int sr_clock, sr_entries = 0, entries_required;
2438 2454
2439 if (i915_powersave) 2455 /* Create copies of the base settings for each pipe */
2440 fw_blc_self |= FW_BLC_SELF_EN; 2456 planea_params = planeb_params = g4x_wm_info;
2441 else 2457
2442 fw_blc_self &= ~FW_BLC_SELF_EN; 2458 /* Grab a couple of global values before we overwrite them */
2443 I915_WRITE(FW_BLC_SELF, fw_blc_self); 2459 total_size = planea_params.fifo_size;
2460 cacheline_size = planea_params.cacheline_size;
2461
2462 /*
2463 * Note: we need to make sure we don't overflow for various clock &
2464 * latency values.
2465 * clocks go from a few thousand to several hundred thousand.
2466 * latency is usually a few thousand
2467 */
2468 entries_required = ((planea_clock / 1000) * pixel_size * latency_ns) /
2469 1000;
2470 entries_required /= G4X_FIFO_LINE_SIZE;
2471 planea_wm = entries_required + planea_params.guard_size;
2472
2473 entries_required = ((planeb_clock / 1000) * pixel_size * latency_ns) /
2474 1000;
2475 entries_required /= G4X_FIFO_LINE_SIZE;
2476 planeb_wm = entries_required + planeb_params.guard_size;
2477
2478 cursora_wm = cursorb_wm = 16;
2479 cursor_sr = 32;
2480
2481 DRM_DEBUG("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
2482
2483 /* Calc sr entries for one plane configs */
2484 if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
2485 /* self-refresh has much higher latency */
2486 const static int sr_latency_ns = 12000;
2487
2488 sr_clock = planea_clock ? planea_clock : planeb_clock;
2489 line_time_us = ((sr_hdisplay * 1000) / sr_clock);
2490
2491 /* Use ns/us then divide to preserve precision */
2492 sr_entries = (((sr_latency_ns / line_time_us) + 1) *
2493 pixel_size * sr_hdisplay) / 1000;
2494 sr_entries = roundup(sr_entries / cacheline_size, 1);
2495 DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
2496 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
2497 }
2498
2499 DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n",
2500 planea_wm, planeb_wm, sr_entries);
2501
2502 planea_wm &= 0x3f;
2503 planeb_wm &= 0x3f;
2504
2505 I915_WRITE(DSPFW1, (sr_entries << DSPFW_SR_SHIFT) |
2506 (cursorb_wm << DSPFW_CURSORB_SHIFT) |
2507 (planeb_wm << DSPFW_PLANEB_SHIFT) | planea_wm);
2508 I915_WRITE(DSPFW2, (I915_READ(DSPFW2) & DSPFW_CURSORA_MASK) |
2509 (cursora_wm << DSPFW_CURSORA_SHIFT));
2510 /* HPLL off in SR has some issues on G4x... disable it */
2511 I915_WRITE(DSPFW3, (I915_READ(DSPFW3) & ~DSPFW_HPLL_SR_EN) |
2512 (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
2444} 2513}
2445 2514
2446static void i965_update_wm(struct drm_device *dev, int unused, int unused2, 2515static void i965_update_wm(struct drm_device *dev, int unused, int unused2,
@@ -2586,6 +2655,9 @@ static void intel_update_watermarks(struct drm_device *dev)
2586 unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0; 2655 unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0;
2587 int enabled = 0, pixel_size = 0; 2656 int enabled = 0, pixel_size = 0;
2588 2657
2658 if (!dev_priv->display.update_wm)
2659 return;
2660
2589 /* Get the clock config from both planes */ 2661 /* Get the clock config from both planes */
2590 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 2662 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
2591 intel_crtc = to_intel_crtc(crtc); 2663 intel_crtc = to_intel_crtc(crtc);
@@ -2763,7 +2835,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2763 2835
2764 /* FDI link */ 2836 /* FDI link */
2765 if (IS_IGDNG(dev)) { 2837 if (IS_IGDNG(dev)) {
2766 int lane, link_bw; 2838 int lane, link_bw, bpp;
2767 /* eDP doesn't require FDI link, so just set DP M/N 2839 /* eDP doesn't require FDI link, so just set DP M/N
2768 according to current link config */ 2840 according to current link config */
2769 if (is_edp) { 2841 if (is_edp) {
@@ -2782,10 +2854,72 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2782 lane = 4; 2854 lane = 4;
2783 link_bw = 270000; 2855 link_bw = 270000;
2784 } 2856 }
2785 igdng_compute_m_n(3, lane, target_clock, 2857
2858 /* determine panel color depth */
2859 temp = I915_READ(pipeconf_reg);
2860
2861 switch (temp & PIPE_BPC_MASK) {
2862 case PIPE_8BPC:
2863 bpp = 24;
2864 break;
2865 case PIPE_10BPC:
2866 bpp = 30;
2867 break;
2868 case PIPE_6BPC:
2869 bpp = 18;
2870 break;
2871 case PIPE_12BPC:
2872 bpp = 36;
2873 break;
2874 default:
2875 DRM_ERROR("unknown pipe bpc value\n");
2876 bpp = 24;
2877 }
2878
2879 igdng_compute_m_n(bpp, lane, target_clock,
2786 link_bw, &m_n); 2880 link_bw, &m_n);
2787 } 2881 }
2788 2882
2883 /* Ironlake: try to setup display ref clock before DPLL
2884 * enabling. This is only under driver's control after
2885 * PCH B stepping, previous chipset stepping should be
2886 * ignoring this setting.
2887 */
2888 if (IS_IGDNG(dev)) {
2889 temp = I915_READ(PCH_DREF_CONTROL);
2890 /* Always enable nonspread source */
2891 temp &= ~DREF_NONSPREAD_SOURCE_MASK;
2892 temp |= DREF_NONSPREAD_SOURCE_ENABLE;
2893 I915_WRITE(PCH_DREF_CONTROL, temp);
2894 POSTING_READ(PCH_DREF_CONTROL);
2895
2896 temp &= ~DREF_SSC_SOURCE_MASK;
2897 temp |= DREF_SSC_SOURCE_ENABLE;
2898 I915_WRITE(PCH_DREF_CONTROL, temp);
2899 POSTING_READ(PCH_DREF_CONTROL);
2900
2901 udelay(200);
2902
2903 if (is_edp) {
2904 if (dev_priv->lvds_use_ssc) {
2905 temp |= DREF_SSC1_ENABLE;
2906 I915_WRITE(PCH_DREF_CONTROL, temp);
2907 POSTING_READ(PCH_DREF_CONTROL);
2908
2909 udelay(200);
2910
2911 temp &= ~DREF_CPU_SOURCE_OUTPUT_MASK;
2912 temp |= DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD;
2913 I915_WRITE(PCH_DREF_CONTROL, temp);
2914 POSTING_READ(PCH_DREF_CONTROL);
2915 } else {
2916 temp |= DREF_CPU_SOURCE_OUTPUT_NONSPREAD;
2917 I915_WRITE(PCH_DREF_CONTROL, temp);
2918 POSTING_READ(PCH_DREF_CONTROL);
2919 }
2920 }
2921 }
2922
2789 if (IS_IGD(dev)) { 2923 if (IS_IGD(dev)) {
2790 fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2; 2924 fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2;
2791 if (has_reduced_clock) 2925 if (has_reduced_clock)
@@ -2936,6 +3070,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2936 3070
2937 lvds = I915_READ(lvds_reg); 3071 lvds = I915_READ(lvds_reg);
2938 lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT; 3072 lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT;
3073 /* set the corresponsding LVDS_BORDER bit */
3074 lvds |= dev_priv->lvds_border_bits;
2939 /* Set the B0-B3 data pairs corresponding to whether we're going to 3075 /* Set the B0-B3 data pairs corresponding to whether we're going to
2940 * set the DPLLs for dual-channel mode or not. 3076 * set the DPLLs for dual-channel mode or not.
2941 */ 3077 */
@@ -4124,7 +4260,9 @@ void intel_init_clock_gating(struct drm_device *dev)
4124 * Disable clock gating reported to work incorrectly according to the 4260 * Disable clock gating reported to work incorrectly according to the
4125 * specs, but enable as much else as we can. 4261 * specs, but enable as much else as we can.
4126 */ 4262 */
4127 if (IS_G4X(dev)) { 4263 if (IS_IGDNG(dev)) {
4264 return;
4265 } else if (IS_G4X(dev)) {
4128 uint32_t dspclk_gate; 4266 uint32_t dspclk_gate;
4129 I915_WRITE(RENCLK_GATE_D1, 0); 4267 I915_WRITE(RENCLK_GATE_D1, 0);
4130 I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE | 4268 I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE |
@@ -4212,7 +4350,9 @@ static void intel_init_display(struct drm_device *dev)
4212 i830_get_display_clock_speed; 4350 i830_get_display_clock_speed;
4213 4351
4214 /* For FIFO watermark updates */ 4352 /* For FIFO watermark updates */
4215 if (IS_G4X(dev)) 4353 if (IS_IGDNG(dev))
4354 dev_priv->display.update_wm = NULL;
4355 else if (IS_G4X(dev))
4216 dev_priv->display.update_wm = g4x_update_wm; 4356 dev_priv->display.update_wm = g4x_update_wm;
4217 else if (IS_I965G(dev)) 4357 else if (IS_I965G(dev))
4218 dev_priv->display.update_wm = i965_update_wm; 4358 dev_priv->display.update_wm = i965_update_wm;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f4856a510476..d83447557f9b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -400,7 +400,7 @@ intel_dp_i2c_init(struct intel_output *intel_output, const char *name)
400{ 400{
401 struct intel_dp_priv *dp_priv = intel_output->dev_priv; 401 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
402 402
403 DRM_ERROR("i2c_init %s\n", name); 403 DRM_DEBUG_KMS("i2c_init %s\n", name);
404 dp_priv->algo.running = false; 404 dp_priv->algo.running = false;
405 dp_priv->algo.address = 0; 405 dp_priv->algo.address = 0;
406 dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch; 406 dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 808bbe412ba8..05598ae10c4b 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -380,7 +380,7 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
380 adjusted_mode->crtc_vblank_start + vsync_pos; 380 adjusted_mode->crtc_vblank_start + vsync_pos;
381 /* keep the vsync width constant */ 381 /* keep the vsync width constant */
382 adjusted_mode->crtc_vsync_end = 382 adjusted_mode->crtc_vsync_end =
383 adjusted_mode->crtc_vblank_start + vsync_width; 383 adjusted_mode->crtc_vsync_start + vsync_width;
384 border = 1; 384 border = 1;
385 break; 385 break;
386 case DRM_MODE_SCALE_ASPECT: 386 case DRM_MODE_SCALE_ASPECT:
@@ -526,6 +526,14 @@ out:
526 lvds_priv->pfit_control = pfit_control; 526 lvds_priv->pfit_control = pfit_control;
527 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios; 527 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
528 /* 528 /*
529 * When there exists the border, it means that the LVDS_BORDR
530 * should be enabled.
531 */
532 if (border)
533 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
534 else
535 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
536 /*
529 * XXX: It would be nice to support lower refresh rates on the 537 * XXX: It would be nice to support lower refresh rates on the
530 * panels to reduce power consumption, and perhaps match the 538 * panels to reduce power consumption, and perhaps match the
531 * user's requested refresh rate. 539 * user's requested refresh rate.
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index 09a28923f46e..b5713eedd6e1 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -49,7 +49,7 @@ radeon-y += radeon_device.o radeon_kms.o \
49 radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \ 49 radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \
50 rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \ 50 rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \
51 r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \ 51 r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \
52 r600_blit_kms.o 52 r600_blit_kms.o radeon_pm.o
53 53
54radeon-$(CONFIG_COMPAT) += radeon_ioc32.o 54radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
55 55
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h
index 5d402086bc47..c11ddddfb3b6 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -2314,7 +2314,7 @@ typedef struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT {
2314 UCHAR ucSS_Step; 2314 UCHAR ucSS_Step;
2315 UCHAR ucSS_Delay; 2315 UCHAR ucSS_Delay;
2316 UCHAR ucSS_Id; 2316 UCHAR ucSS_Id;
2317 UCHAR ucRecommandedRef_Div; 2317 UCHAR ucRecommendedRef_Div;
2318 UCHAR ucSS_Range; /* it was reserved for V11 */ 2318 UCHAR ucSS_Range; /* it was reserved for V11 */
2319} ATOM_SPREAD_SPECTRUM_ASSIGNMENT; 2319} ATOM_SPREAD_SPECTRUM_ASSIGNMENT;
2320 2320
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 14fa9701aeb3..c15287a590ff 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -31,10 +31,6 @@
31#include "atom.h" 31#include "atom.h"
32#include "atom-bits.h" 32#include "atom-bits.h"
33 33
34/* evil but including atombios.h is much worse */
35bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
36 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION *crtc_timing,
37 int32_t *pixel_clock);
38static void atombios_overscan_setup(struct drm_crtc *crtc, 34static void atombios_overscan_setup(struct drm_crtc *crtc,
39 struct drm_display_mode *mode, 35 struct drm_display_mode *mode,
40 struct drm_display_mode *adjusted_mode) 36 struct drm_display_mode *adjusted_mode)
@@ -248,18 +244,18 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
248 244
249 switch (mode) { 245 switch (mode) {
250 case DRM_MODE_DPMS_ON: 246 case DRM_MODE_DPMS_ON:
247 atombios_enable_crtc(crtc, 1);
251 if (ASIC_IS_DCE3(rdev)) 248 if (ASIC_IS_DCE3(rdev))
252 atombios_enable_crtc_memreq(crtc, 1); 249 atombios_enable_crtc_memreq(crtc, 1);
253 atombios_enable_crtc(crtc, 1);
254 atombios_blank_crtc(crtc, 0); 250 atombios_blank_crtc(crtc, 0);
255 break; 251 break;
256 case DRM_MODE_DPMS_STANDBY: 252 case DRM_MODE_DPMS_STANDBY:
257 case DRM_MODE_DPMS_SUSPEND: 253 case DRM_MODE_DPMS_SUSPEND:
258 case DRM_MODE_DPMS_OFF: 254 case DRM_MODE_DPMS_OFF:
259 atombios_blank_crtc(crtc, 1); 255 atombios_blank_crtc(crtc, 1);
260 atombios_enable_crtc(crtc, 0);
261 if (ASIC_IS_DCE3(rdev)) 256 if (ASIC_IS_DCE3(rdev))
262 atombios_enable_crtc_memreq(crtc, 0); 257 atombios_enable_crtc_memreq(crtc, 0);
258 atombios_enable_crtc(crtc, 0);
263 break; 259 break;
264 } 260 }
265 261
@@ -270,59 +266,147 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
270 266
271static void 267static void
272atombios_set_crtc_dtd_timing(struct drm_crtc *crtc, 268atombios_set_crtc_dtd_timing(struct drm_crtc *crtc,
273 SET_CRTC_USING_DTD_TIMING_PARAMETERS * crtc_param) 269 struct drm_display_mode *mode)
274{ 270{
271 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
275 struct drm_device *dev = crtc->dev; 272 struct drm_device *dev = crtc->dev;
276 struct radeon_device *rdev = dev->dev_private; 273 struct radeon_device *rdev = dev->dev_private;
277 SET_CRTC_USING_DTD_TIMING_PARAMETERS conv_param; 274 SET_CRTC_USING_DTD_TIMING_PARAMETERS args;
278 int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_UsingDTDTiming); 275 int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_UsingDTDTiming);
276 u16 misc = 0;
279 277
280 conv_param.usH_Size = cpu_to_le16(crtc_param->usH_Size); 278 memset(&args, 0, sizeof(args));
281 conv_param.usH_Blanking_Time = 279 args.usH_Size = cpu_to_le16(mode->crtc_hdisplay);
282 cpu_to_le16(crtc_param->usH_Blanking_Time); 280 args.usH_Blanking_Time =
283 conv_param.usV_Size = cpu_to_le16(crtc_param->usV_Size); 281 cpu_to_le16(mode->crtc_hblank_end - mode->crtc_hdisplay);
284 conv_param.usV_Blanking_Time = 282 args.usV_Size = cpu_to_le16(mode->crtc_vdisplay);
285 cpu_to_le16(crtc_param->usV_Blanking_Time); 283 args.usV_Blanking_Time =
286 conv_param.usH_SyncOffset = cpu_to_le16(crtc_param->usH_SyncOffset); 284 cpu_to_le16(mode->crtc_vblank_end - mode->crtc_vdisplay);
287 conv_param.usH_SyncWidth = cpu_to_le16(crtc_param->usH_SyncWidth); 285 args.usH_SyncOffset =
288 conv_param.usV_SyncOffset = cpu_to_le16(crtc_param->usV_SyncOffset); 286 cpu_to_le16(mode->crtc_hsync_start - mode->crtc_hdisplay);
289 conv_param.usV_SyncWidth = cpu_to_le16(crtc_param->usV_SyncWidth); 287 args.usH_SyncWidth =
290 conv_param.susModeMiscInfo.usAccess = 288 cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start);
291 cpu_to_le16(crtc_param->susModeMiscInfo.usAccess); 289 args.usV_SyncOffset =
292 conv_param.ucCRTC = crtc_param->ucCRTC; 290 cpu_to_le16(mode->crtc_vsync_start - mode->crtc_vdisplay);
291 args.usV_SyncWidth =
292 cpu_to_le16(mode->crtc_vsync_end - mode->crtc_vsync_start);
293 /*args.ucH_Border = mode->hborder;*/
294 /*args.ucV_Border = mode->vborder;*/
295
296 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
297 misc |= ATOM_VSYNC_POLARITY;
298 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
299 misc |= ATOM_HSYNC_POLARITY;
300 if (mode->flags & DRM_MODE_FLAG_CSYNC)
301 misc |= ATOM_COMPOSITESYNC;
302 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
303 misc |= ATOM_INTERLACE;
304 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
305 misc |= ATOM_DOUBLE_CLOCK_MODE;
306
307 args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
308 args.ucCRTC = radeon_crtc->crtc_id;
293 309
294 printk("executing set crtc dtd timing\n"); 310 printk("executing set crtc dtd timing\n");
295 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&conv_param); 311 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
296} 312}
297 313
298void atombios_crtc_set_timing(struct drm_crtc *crtc, 314static void atombios_crtc_set_timing(struct drm_crtc *crtc,
299 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION * 315 struct drm_display_mode *mode)
300 crtc_param)
301{ 316{
317 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
302 struct drm_device *dev = crtc->dev; 318 struct drm_device *dev = crtc->dev;
303 struct radeon_device *rdev = dev->dev_private; 319 struct radeon_device *rdev = dev->dev_private;
304 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION conv_param; 320 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION args;
305 int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_Timing); 321 int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_Timing);
322 u16 misc = 0;
306 323
307 conv_param.usH_Total = cpu_to_le16(crtc_param->usH_Total); 324 memset(&args, 0, sizeof(args));
308 conv_param.usH_Disp = cpu_to_le16(crtc_param->usH_Disp); 325 args.usH_Total = cpu_to_le16(mode->crtc_htotal);
309 conv_param.usH_SyncStart = cpu_to_le16(crtc_param->usH_SyncStart); 326 args.usH_Disp = cpu_to_le16(mode->crtc_hdisplay);
310 conv_param.usH_SyncWidth = cpu_to_le16(crtc_param->usH_SyncWidth); 327 args.usH_SyncStart = cpu_to_le16(mode->crtc_hsync_start);
311 conv_param.usV_Total = cpu_to_le16(crtc_param->usV_Total); 328 args.usH_SyncWidth =
312 conv_param.usV_Disp = cpu_to_le16(crtc_param->usV_Disp); 329 cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start);
313 conv_param.usV_SyncStart = cpu_to_le16(crtc_param->usV_SyncStart); 330 args.usV_Total = cpu_to_le16(mode->crtc_vtotal);
314 conv_param.usV_SyncWidth = cpu_to_le16(crtc_param->usV_SyncWidth); 331 args.usV_Disp = cpu_to_le16(mode->crtc_vdisplay);
315 conv_param.susModeMiscInfo.usAccess = 332 args.usV_SyncStart = cpu_to_le16(mode->crtc_vsync_start);
316 cpu_to_le16(crtc_param->susModeMiscInfo.usAccess); 333 args.usV_SyncWidth =
317 conv_param.ucCRTC = crtc_param->ucCRTC; 334 cpu_to_le16(mode->crtc_vsync_end - mode->crtc_vsync_start);
318 conv_param.ucOverscanRight = crtc_param->ucOverscanRight; 335
319 conv_param.ucOverscanLeft = crtc_param->ucOverscanLeft; 336 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
320 conv_param.ucOverscanBottom = crtc_param->ucOverscanBottom; 337 misc |= ATOM_VSYNC_POLARITY;
321 conv_param.ucOverscanTop = crtc_param->ucOverscanTop; 338 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
322 conv_param.ucReserved = crtc_param->ucReserved; 339 misc |= ATOM_HSYNC_POLARITY;
340 if (mode->flags & DRM_MODE_FLAG_CSYNC)
341 misc |= ATOM_COMPOSITESYNC;
342 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
343 misc |= ATOM_INTERLACE;
344 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
345 misc |= ATOM_DOUBLE_CLOCK_MODE;
346
347 args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
348 args.ucCRTC = radeon_crtc->crtc_id;
323 349
324 printk("executing set crtc timing\n"); 350 printk("executing set crtc timing\n");
325 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&conv_param); 351 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
352}
353
354static void atombios_set_ss(struct drm_crtc *crtc, int enable)
355{
356 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
357 struct drm_device *dev = crtc->dev;
358 struct radeon_device *rdev = dev->dev_private;
359 struct drm_encoder *encoder = NULL;
360 struct radeon_encoder *radeon_encoder = NULL;
361 struct radeon_encoder_atom_dig *dig = NULL;
362 int index = GetIndexIntoMasterTable(COMMAND, EnableSpreadSpectrumOnPPLL);
363 ENABLE_SPREAD_SPECTRUM_ON_PPLL_PS_ALLOCATION args;
364 ENABLE_LVDS_SS_PARAMETERS legacy_args;
365 uint16_t percentage = 0;
366 uint8_t type = 0, step = 0, delay = 0, range = 0;
367
368 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
369 if (encoder->crtc == crtc) {
370 radeon_encoder = to_radeon_encoder(encoder);
371 /* only enable spread spectrum on LVDS */
372 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
373 dig = radeon_encoder->enc_priv;
374 if (dig && dig->ss) {
375 percentage = dig->ss->percentage;
376 type = dig->ss->type;
377 step = dig->ss->step;
378 delay = dig->ss->delay;
379 range = dig->ss->range;
380 } else if (enable)
381 return;
382 } else if (enable)
383 return;
384 break;
385 }
386 }
387
388 if (!radeon_encoder)
389 return;
390
391 if (ASIC_IS_AVIVO(rdev)) {
392 memset(&args, 0, sizeof(args));
393 args.usSpreadSpectrumPercentage = cpu_to_le16(percentage);
394 args.ucSpreadSpectrumType = type;
395 args.ucSpreadSpectrumStep = step;
396 args.ucSpreadSpectrumDelay = delay;
397 args.ucSpreadSpectrumRange = range;
398 args.ucPpll = radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1;
399 args.ucEnable = enable;
400 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
401 } else {
402 memset(&legacy_args, 0, sizeof(legacy_args));
403 legacy_args.usSpreadSpectrumPercentage = cpu_to_le16(percentage);
404 legacy_args.ucSpreadSpectrumType = type;
405 legacy_args.ucSpreadSpectrumStepSize_Delay = (step & 3) << 2;
406 legacy_args.ucSpreadSpectrumStepSize_Delay |= (delay & 7) << 4;
407 legacy_args.ucEnable = enable;
408 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&legacy_args);
409 }
326} 410}
327 411
328void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) 412void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
@@ -333,12 +417,13 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
333 struct drm_encoder *encoder = NULL; 417 struct drm_encoder *encoder = NULL;
334 struct radeon_encoder *radeon_encoder = NULL; 418 struct radeon_encoder *radeon_encoder = NULL;
335 uint8_t frev, crev; 419 uint8_t frev, crev;
336 int index = GetIndexIntoMasterTable(COMMAND, SetPixelClock); 420 int index;
337 SET_PIXEL_CLOCK_PS_ALLOCATION args; 421 SET_PIXEL_CLOCK_PS_ALLOCATION args;
338 PIXEL_CLOCK_PARAMETERS *spc1_ptr; 422 PIXEL_CLOCK_PARAMETERS *spc1_ptr;
339 PIXEL_CLOCK_PARAMETERS_V2 *spc2_ptr; 423 PIXEL_CLOCK_PARAMETERS_V2 *spc2_ptr;
340 PIXEL_CLOCK_PARAMETERS_V3 *spc3_ptr; 424 PIXEL_CLOCK_PARAMETERS_V3 *spc3_ptr;
341 uint32_t sclock = mode->clock; 425 uint32_t pll_clock = mode->clock;
426 uint32_t adjusted_clock;
342 uint32_t ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; 427 uint32_t ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0;
343 struct radeon_pll *pll; 428 struct radeon_pll *pll;
344 int pll_flags = 0; 429 int pll_flags = 0;
@@ -346,8 +431,6 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
346 memset(&args, 0, sizeof(args)); 431 memset(&args, 0, sizeof(args));
347 432
348 if (ASIC_IS_AVIVO(rdev)) { 433 if (ASIC_IS_AVIVO(rdev)) {
349 uint32_t ss_cntl;
350
351 if ((rdev->family == CHIP_RS600) || 434 if ((rdev->family == CHIP_RS600) ||
352 (rdev->family == CHIP_RS690) || 435 (rdev->family == CHIP_RS690) ||
353 (rdev->family == CHIP_RS740)) 436 (rdev->family == CHIP_RS740))
@@ -358,15 +441,6 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
358 pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; 441 pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
359 else 442 else
360 pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; 443 pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
361
362 /* disable spread spectrum clocking for now -- thanks Hedy Lamarr */
363 if (radeon_crtc->crtc_id == 0) {
364 ss_cntl = RREG32(AVIVO_P1PLL_INT_SS_CNTL);
365 WREG32(AVIVO_P1PLL_INT_SS_CNTL, ss_cntl & ~1);
366 } else {
367 ss_cntl = RREG32(AVIVO_P2PLL_INT_SS_CNTL);
368 WREG32(AVIVO_P2PLL_INT_SS_CNTL, ss_cntl & ~1);
369 }
370 } else { 444 } else {
371 pll_flags |= RADEON_PLL_LEGACY; 445 pll_flags |= RADEON_PLL_LEGACY;
372 446
@@ -393,14 +467,43 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
393 } 467 }
394 } 468 }
395 469
470 /* DCE3+ has an AdjustDisplayPll that will adjust the pixel clock
471 * accordingly based on the encoder/transmitter to work around
472 * special hw requirements.
473 */
474 if (ASIC_IS_DCE3(rdev)) {
475 ADJUST_DISPLAY_PLL_PS_ALLOCATION adjust_pll_args;
476
477 if (!encoder)
478 return;
479
480 memset(&adjust_pll_args, 0, sizeof(adjust_pll_args));
481 adjust_pll_args.usPixelClock = cpu_to_le16(mode->clock / 10);
482 adjust_pll_args.ucTransmitterID = radeon_encoder->encoder_id;
483 adjust_pll_args.ucEncodeMode = atombios_get_encoder_mode(encoder);
484
485 index = GetIndexIntoMasterTable(COMMAND, AdjustDisplayPll);
486 atom_execute_table(rdev->mode_info.atom_context,
487 index, (uint32_t *)&adjust_pll_args);
488 adjusted_clock = le16_to_cpu(adjust_pll_args.usPixelClock) * 10;
489 } else {
490 /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
491 if (ASIC_IS_AVIVO(rdev) &&
492 (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1))
493 adjusted_clock = mode->clock * 2;
494 else
495 adjusted_clock = mode->clock;
496 }
497
396 if (radeon_crtc->crtc_id == 0) 498 if (radeon_crtc->crtc_id == 0)
397 pll = &rdev->clock.p1pll; 499 pll = &rdev->clock.p1pll;
398 else 500 else
399 pll = &rdev->clock.p2pll; 501 pll = &rdev->clock.p2pll;
400 502
401 radeon_compute_pll(pll, mode->clock, &sclock, &fb_div, &frac_fb_div, 503 radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
402 &ref_div, &post_div, pll_flags); 504 &ref_div, &post_div, pll_flags);
403 505
506 index = GetIndexIntoMasterTable(COMMAND, SetPixelClock);
404 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, 507 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,
405 &crev); 508 &crev);
406 509
@@ -409,7 +512,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
409 switch (crev) { 512 switch (crev) {
410 case 1: 513 case 1:
411 spc1_ptr = (PIXEL_CLOCK_PARAMETERS *) & args.sPCLKInput; 514 spc1_ptr = (PIXEL_CLOCK_PARAMETERS *) & args.sPCLKInput;
412 spc1_ptr->usPixelClock = cpu_to_le16(sclock); 515 spc1_ptr->usPixelClock = cpu_to_le16(mode->clock / 10);
413 spc1_ptr->usRefDiv = cpu_to_le16(ref_div); 516 spc1_ptr->usRefDiv = cpu_to_le16(ref_div);
414 spc1_ptr->usFbDiv = cpu_to_le16(fb_div); 517 spc1_ptr->usFbDiv = cpu_to_le16(fb_div);
415 spc1_ptr->ucFracFbDiv = frac_fb_div; 518 spc1_ptr->ucFracFbDiv = frac_fb_div;
@@ -422,7 +525,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
422 case 2: 525 case 2:
423 spc2_ptr = 526 spc2_ptr =
424 (PIXEL_CLOCK_PARAMETERS_V2 *) & args.sPCLKInput; 527 (PIXEL_CLOCK_PARAMETERS_V2 *) & args.sPCLKInput;
425 spc2_ptr->usPixelClock = cpu_to_le16(sclock); 528 spc2_ptr->usPixelClock = cpu_to_le16(mode->clock / 10);
426 spc2_ptr->usRefDiv = cpu_to_le16(ref_div); 529 spc2_ptr->usRefDiv = cpu_to_le16(ref_div);
427 spc2_ptr->usFbDiv = cpu_to_le16(fb_div); 530 spc2_ptr->usFbDiv = cpu_to_le16(fb_div);
428 spc2_ptr->ucFracFbDiv = frac_fb_div; 531 spc2_ptr->ucFracFbDiv = frac_fb_div;
@@ -437,7 +540,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
437 return; 540 return;
438 spc3_ptr = 541 spc3_ptr =
439 (PIXEL_CLOCK_PARAMETERS_V3 *) & args.sPCLKInput; 542 (PIXEL_CLOCK_PARAMETERS_V3 *) & args.sPCLKInput;
440 spc3_ptr->usPixelClock = cpu_to_le16(sclock); 543 spc3_ptr->usPixelClock = cpu_to_le16(mode->clock / 10);
441 spc3_ptr->usRefDiv = cpu_to_le16(ref_div); 544 spc3_ptr->usRefDiv = cpu_to_le16(ref_div);
442 spc3_ptr->usFbDiv = cpu_to_le16(fb_div); 545 spc3_ptr->usFbDiv = cpu_to_le16(fb_div);
443 spc3_ptr->ucFracFbDiv = frac_fb_div; 546 spc3_ptr->ucFracFbDiv = frac_fb_div;
@@ -527,6 +630,16 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
527 WREG32(AVIVO_D1VGA_CONTROL, 0); 630 WREG32(AVIVO_D1VGA_CONTROL, 0);
528 else 631 else
529 WREG32(AVIVO_D2VGA_CONTROL, 0); 632 WREG32(AVIVO_D2VGA_CONTROL, 0);
633
634 if (rdev->family >= CHIP_RV770) {
635 if (radeon_crtc->crtc_id) {
636 WREG32(R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, 0);
637 WREG32(R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, 0);
638 } else {
639 WREG32(R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, 0);
640 WREG32(R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, 0);
641 }
642 }
530 WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, 643 WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
531 (u32) fb_location); 644 (u32) fb_location);
532 WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + 645 WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS +
@@ -563,6 +676,10 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
563 radeon_fb = to_radeon_framebuffer(old_fb); 676 radeon_fb = to_radeon_framebuffer(old_fb);
564 radeon_gem_object_unpin(radeon_fb->obj); 677 radeon_gem_object_unpin(radeon_fb->obj);
565 } 678 }
679
680 /* Bytes per pixel may have changed */
681 radeon_bandwidth_update(rdev);
682
566 return 0; 683 return 0;
567} 684}
568 685
@@ -574,134 +691,24 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc,
574 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 691 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
575 struct drm_device *dev = crtc->dev; 692 struct drm_device *dev = crtc->dev;
576 struct radeon_device *rdev = dev->dev_private; 693 struct radeon_device *rdev = dev->dev_private;
577 struct drm_encoder *encoder;
578 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION crtc_timing;
579 int need_tv_timings = 0;
580 bool ret;
581 694
582 /* TODO color tiling */ 695 /* TODO color tiling */
583 memset(&crtc_timing, 0, sizeof(crtc_timing));
584
585 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
586 /* find tv std */
587 if (encoder->crtc == crtc) {
588 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
589
590 if (radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT) {
591 struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv;
592 if (tv_dac) {
593 if (tv_dac->tv_std == TV_STD_NTSC ||
594 tv_dac->tv_std == TV_STD_NTSC_J ||
595 tv_dac->tv_std == TV_STD_PAL_M)
596 need_tv_timings = 1;
597 else
598 need_tv_timings = 2;
599 break;
600 }
601 }
602 }
603 }
604
605 crtc_timing.ucCRTC = radeon_crtc->crtc_id;
606 if (need_tv_timings) {
607 ret = radeon_atom_get_tv_timings(rdev, need_tv_timings - 1,
608 &crtc_timing, &adjusted_mode->clock);
609 if (ret == false)
610 need_tv_timings = 0;
611 }
612
613 if (!need_tv_timings) {
614 crtc_timing.usH_Total = adjusted_mode->crtc_htotal;
615 crtc_timing.usH_Disp = adjusted_mode->crtc_hdisplay;
616 crtc_timing.usH_SyncStart = adjusted_mode->crtc_hsync_start;
617 crtc_timing.usH_SyncWidth =
618 adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
619
620 crtc_timing.usV_Total = adjusted_mode->crtc_vtotal;
621 crtc_timing.usV_Disp = adjusted_mode->crtc_vdisplay;
622 crtc_timing.usV_SyncStart = adjusted_mode->crtc_vsync_start;
623 crtc_timing.usV_SyncWidth =
624 adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
625
626 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
627 crtc_timing.susModeMiscInfo.usAccess |= ATOM_VSYNC_POLARITY;
628
629 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
630 crtc_timing.susModeMiscInfo.usAccess |= ATOM_HSYNC_POLARITY;
631
632 if (adjusted_mode->flags & DRM_MODE_FLAG_CSYNC)
633 crtc_timing.susModeMiscInfo.usAccess |= ATOM_COMPOSITESYNC;
634
635 if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
636 crtc_timing.susModeMiscInfo.usAccess |= ATOM_INTERLACE;
637
638 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
639 crtc_timing.susModeMiscInfo.usAccess |= ATOM_DOUBLE_CLOCK_MODE;
640 }
641 696
697 atombios_set_ss(crtc, 0);
642 atombios_crtc_set_pll(crtc, adjusted_mode); 698 atombios_crtc_set_pll(crtc, adjusted_mode);
643 atombios_crtc_set_timing(crtc, &crtc_timing); 699 atombios_set_ss(crtc, 1);
700 atombios_crtc_set_timing(crtc, adjusted_mode);
644 701
645 if (ASIC_IS_AVIVO(rdev)) 702 if (ASIC_IS_AVIVO(rdev))
646 atombios_crtc_set_base(crtc, x, y, old_fb); 703 atombios_crtc_set_base(crtc, x, y, old_fb);
647 else { 704 else {
648 if (radeon_crtc->crtc_id == 0) { 705 if (radeon_crtc->crtc_id == 0)
649 SET_CRTC_USING_DTD_TIMING_PARAMETERS crtc_dtd_timing; 706 atombios_set_crtc_dtd_timing(crtc, adjusted_mode);
650 memset(&crtc_dtd_timing, 0, sizeof(crtc_dtd_timing));
651
652 /* setup FP shadow regs on R4xx */
653 crtc_dtd_timing.ucCRTC = radeon_crtc->crtc_id;
654 crtc_dtd_timing.usH_Size = adjusted_mode->crtc_hdisplay;
655 crtc_dtd_timing.usV_Size = adjusted_mode->crtc_vdisplay;
656 crtc_dtd_timing.usH_Blanking_Time =
657 adjusted_mode->crtc_hblank_end -
658 adjusted_mode->crtc_hdisplay;
659 crtc_dtd_timing.usV_Blanking_Time =
660 adjusted_mode->crtc_vblank_end -
661 adjusted_mode->crtc_vdisplay;
662 crtc_dtd_timing.usH_SyncOffset =
663 adjusted_mode->crtc_hsync_start -
664 adjusted_mode->crtc_hdisplay;
665 crtc_dtd_timing.usV_SyncOffset =
666 adjusted_mode->crtc_vsync_start -
667 adjusted_mode->crtc_vdisplay;
668 crtc_dtd_timing.usH_SyncWidth =
669 adjusted_mode->crtc_hsync_end -
670 adjusted_mode->crtc_hsync_start;
671 crtc_dtd_timing.usV_SyncWidth =
672 adjusted_mode->crtc_vsync_end -
673 adjusted_mode->crtc_vsync_start;
674 /* crtc_dtd_timing.ucH_Border = adjusted_mode->crtc_hborder; */
675 /* crtc_dtd_timing.ucV_Border = adjusted_mode->crtc_vborder; */
676
677 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
678 crtc_dtd_timing.susModeMiscInfo.usAccess |=
679 ATOM_VSYNC_POLARITY;
680
681 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
682 crtc_dtd_timing.susModeMiscInfo.usAccess |=
683 ATOM_HSYNC_POLARITY;
684
685 if (adjusted_mode->flags & DRM_MODE_FLAG_CSYNC)
686 crtc_dtd_timing.susModeMiscInfo.usAccess |=
687 ATOM_COMPOSITESYNC;
688
689 if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
690 crtc_dtd_timing.susModeMiscInfo.usAccess |=
691 ATOM_INTERLACE;
692
693 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
694 crtc_dtd_timing.susModeMiscInfo.usAccess |=
695 ATOM_DOUBLE_CLOCK_MODE;
696
697 atombios_set_crtc_dtd_timing(crtc, &crtc_dtd_timing);
698 }
699 radeon_crtc_set_base(crtc, x, y, old_fb); 707 radeon_crtc_set_base(crtc, x, y, old_fb);
700 radeon_legacy_atom_set_surface(crtc); 708 radeon_legacy_atom_set_surface(crtc);
701 } 709 }
702 atombios_overscan_setup(crtc, mode, adjusted_mode); 710 atombios_overscan_setup(crtc, mode, adjusted_mode);
703 atombios_scaler_setup(crtc); 711 atombios_scaler_setup(crtc);
704 radeon_bandwidth_update(rdev);
705 return 0; 712 return 0;
706} 713}
707 714
diff --git a/drivers/gpu/drm/radeon/mkregtable.c b/drivers/gpu/drm/radeon/mkregtable.c
index fb211e585dea..0d79577c1576 100644
--- a/drivers/gpu/drm/radeon/mkregtable.c
+++ b/drivers/gpu/drm/radeon/mkregtable.c
@@ -561,7 +561,7 @@ struct table {
561 char *gpu_prefix; 561 char *gpu_prefix;
562}; 562};
563 563
564struct offset *offset_new(unsigned o) 564static struct offset *offset_new(unsigned o)
565{ 565{
566 struct offset *offset; 566 struct offset *offset;
567 567
@@ -573,12 +573,12 @@ struct offset *offset_new(unsigned o)
573 return offset; 573 return offset;
574} 574}
575 575
576void table_offset_add(struct table *t, struct offset *offset) 576static void table_offset_add(struct table *t, struct offset *offset)
577{ 577{
578 list_add_tail(&offset->list, &t->offsets); 578 list_add_tail(&offset->list, &t->offsets);
579} 579}
580 580
581void table_init(struct table *t) 581static void table_init(struct table *t)
582{ 582{
583 INIT_LIST_HEAD(&t->offsets); 583 INIT_LIST_HEAD(&t->offsets);
584 t->offset_max = 0; 584 t->offset_max = 0;
@@ -586,7 +586,7 @@ void table_init(struct table *t)
586 t->table = NULL; 586 t->table = NULL;
587} 587}
588 588
589void table_print(struct table *t) 589static void table_print(struct table *t)
590{ 590{
591 unsigned nlloop, i, j, n, c, id; 591 unsigned nlloop, i, j, n, c, id;
592 592
@@ -611,7 +611,7 @@ void table_print(struct table *t)
611 printf("};\n"); 611 printf("};\n");
612} 612}
613 613
614int table_build(struct table *t) 614static int table_build(struct table *t)
615{ 615{
616 struct offset *offset; 616 struct offset *offset;
617 unsigned i, m; 617 unsigned i, m;
@@ -631,7 +631,7 @@ int table_build(struct table *t)
631} 631}
632 632
633static char gpu_name[10]; 633static char gpu_name[10];
634int parser_auth(struct table *t, const char *filename) 634static int parser_auth(struct table *t, const char *filename)
635{ 635{
636 FILE *file; 636 FILE *file;
637 regex_t mask_rex; 637 regex_t mask_rex;
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 161094c07d94..c9e93eabcf16 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -186,7 +186,7 @@ static inline uint32_t r100_irq_ack(struct radeon_device *rdev)
186 186
187int r100_irq_process(struct radeon_device *rdev) 187int r100_irq_process(struct radeon_device *rdev)
188{ 188{
189 uint32_t status; 189 uint32_t status, msi_rearm;
190 190
191 status = r100_irq_ack(rdev); 191 status = r100_irq_ack(rdev);
192 if (!status) { 192 if (!status) {
@@ -209,6 +209,21 @@ int r100_irq_process(struct radeon_device *rdev)
209 } 209 }
210 status = r100_irq_ack(rdev); 210 status = r100_irq_ack(rdev);
211 } 211 }
212 if (rdev->msi_enabled) {
213 switch (rdev->family) {
214 case CHIP_RS400:
215 case CHIP_RS480:
216 msi_rearm = RREG32(RADEON_AIC_CNTL) & ~RS400_MSI_REARM;
217 WREG32(RADEON_AIC_CNTL, msi_rearm);
218 WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM);
219 break;
220 default:
221 msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN;
222 WREG32(RADEON_MSI_REARM_EN, msi_rearm);
223 WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
224 break;
225 }
226 }
212 return IRQ_HANDLED; 227 return IRQ_HANDLED;
213} 228}
214 229
@@ -240,7 +255,7 @@ int r100_wb_init(struct radeon_device *rdev)
240 int r; 255 int r;
241 256
242 if (rdev->wb.wb_obj == NULL) { 257 if (rdev->wb.wb_obj == NULL) {
243 r = radeon_object_create(rdev, NULL, 4096, 258 r = radeon_object_create(rdev, NULL, RADEON_GPU_PAGE_SIZE,
244 true, 259 true,
245 RADEON_GEM_DOMAIN_GTT, 260 RADEON_GEM_DOMAIN_GTT,
246 false, &rdev->wb.wb_obj); 261 false, &rdev->wb.wb_obj);
@@ -563,19 +578,19 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size)
563 indirect1_start = 16; 578 indirect1_start = 16;
564 /* cp setup */ 579 /* cp setup */
565 WREG32(0x718, pre_write_timer | (pre_write_limit << 28)); 580 WREG32(0x718, pre_write_timer | (pre_write_limit << 28));
566 WREG32(RADEON_CP_RB_CNTL, 581 tmp = (REG_SET(RADEON_RB_BUFSZ, rb_bufsz) |
567#ifdef __BIG_ENDIAN
568 RADEON_BUF_SWAP_32BIT |
569#endif
570 REG_SET(RADEON_RB_BUFSZ, rb_bufsz) |
571 REG_SET(RADEON_RB_BLKSZ, rb_blksz) | 582 REG_SET(RADEON_RB_BLKSZ, rb_blksz) |
572 REG_SET(RADEON_MAX_FETCH, max_fetch) | 583 REG_SET(RADEON_MAX_FETCH, max_fetch) |
573 RADEON_RB_NO_UPDATE); 584 RADEON_RB_NO_UPDATE);
585#ifdef __BIG_ENDIAN
586 tmp |= RADEON_BUF_SWAP_32BIT;
587#endif
588 WREG32(RADEON_CP_RB_CNTL, tmp);
589
574 /* Set ring address */ 590 /* Set ring address */
575 DRM_INFO("radeon: ring at 0x%016lX\n", (unsigned long)rdev->cp.gpu_addr); 591 DRM_INFO("radeon: ring at 0x%016lX\n", (unsigned long)rdev->cp.gpu_addr);
576 WREG32(RADEON_CP_RB_BASE, rdev->cp.gpu_addr); 592 WREG32(RADEON_CP_RB_BASE, rdev->cp.gpu_addr);
577 /* Force read & write ptr to 0 */ 593 /* Force read & write ptr to 0 */
578 tmp = RREG32(RADEON_CP_RB_CNTL);
579 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); 594 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA);
580 WREG32(RADEON_CP_RB_RPTR_WR, 0); 595 WREG32(RADEON_CP_RB_RPTR_WR, 0);
581 WREG32(RADEON_CP_RB_WPTR, 0); 596 WREG32(RADEON_CP_RB_WPTR, 0);
@@ -2364,7 +2379,7 @@ void r100_bandwidth_update(struct radeon_device *rdev)
2364 /* 2379 /*
2365 Find the total latency for the display data. 2380 Find the total latency for the display data.
2366 */ 2381 */
2367 disp_latency_overhead.full = rfixed_const(80); 2382 disp_latency_overhead.full = rfixed_const(8);
2368 disp_latency_overhead.full = rfixed_div(disp_latency_overhead, sclk_ff); 2383 disp_latency_overhead.full = rfixed_div(disp_latency_overhead, sclk_ff);
2369 mc_latency_mclk.full += disp_latency_overhead.full + cur_latency_mclk.full; 2384 mc_latency_mclk.full += disp_latency_overhead.full + cur_latency_mclk.full;
2370 mc_latency_sclk.full += disp_latency_overhead.full + cur_latency_sclk.full; 2385 mc_latency_sclk.full += disp_latency_overhead.full + cur_latency_sclk.full;
@@ -2562,8 +2577,11 @@ void r100_bandwidth_update(struct radeon_device *rdev)
2562static inline void r100_cs_track_texture_print(struct r100_cs_track_texture *t) 2577static inline void r100_cs_track_texture_print(struct r100_cs_track_texture *t)
2563{ 2578{
2564 DRM_ERROR("pitch %d\n", t->pitch); 2579 DRM_ERROR("pitch %d\n", t->pitch);
2580 DRM_ERROR("use_pitch %d\n", t->use_pitch);
2565 DRM_ERROR("width %d\n", t->width); 2581 DRM_ERROR("width %d\n", t->width);
2582 DRM_ERROR("width_11 %d\n", t->width_11);
2566 DRM_ERROR("height %d\n", t->height); 2583 DRM_ERROR("height %d\n", t->height);
2584 DRM_ERROR("height_11 %d\n", t->height_11);
2567 DRM_ERROR("num levels %d\n", t->num_levels); 2585 DRM_ERROR("num levels %d\n", t->num_levels);
2568 DRM_ERROR("depth %d\n", t->txdepth); 2586 DRM_ERROR("depth %d\n", t->txdepth);
2569 DRM_ERROR("bpp %d\n", t->cpp); 2587 DRM_ERROR("bpp %d\n", t->cpp);
@@ -2623,15 +2641,17 @@ static int r100_cs_track_texture_check(struct radeon_device *rdev,
2623 else 2641 else
2624 w = track->textures[u].pitch / (1 << i); 2642 w = track->textures[u].pitch / (1 << i);
2625 } else { 2643 } else {
2626 w = track->textures[u].width / (1 << i); 2644 w = track->textures[u].width;
2627 if (rdev->family >= CHIP_RV515) 2645 if (rdev->family >= CHIP_RV515)
2628 w |= track->textures[u].width_11; 2646 w |= track->textures[u].width_11;
2647 w = w / (1 << i);
2629 if (track->textures[u].roundup_w) 2648 if (track->textures[u].roundup_w)
2630 w = roundup_pow_of_two(w); 2649 w = roundup_pow_of_two(w);
2631 } 2650 }
2632 h = track->textures[u].height / (1 << i); 2651 h = track->textures[u].height;
2633 if (rdev->family >= CHIP_RV515) 2652 if (rdev->family >= CHIP_RV515)
2634 h |= track->textures[u].height_11; 2653 h |= track->textures[u].height_11;
2654 h = h / (1 << i);
2635 if (track->textures[u].roundup_h) 2655 if (track->textures[u].roundup_h)
2636 h = roundup_pow_of_two(h); 2656 h = roundup_pow_of_two(h);
2637 size += w * h; 2657 size += w * h;
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index e08c4a8974ca..2f43ee8e4048 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -113,7 +113,7 @@ int rv370_pcie_gart_enable(struct radeon_device *rdev)
113 tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD; 113 tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD;
114 WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp); 114 WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
115 WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_location); 115 WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_location);
116 tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 4096; 116 tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - RADEON_GPU_PAGE_SIZE;
117 WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, tmp); 117 WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, tmp);
118 WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0); 118 WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0);
119 WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0); 119 WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0);
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index 5c7fe52de30e..1cefdbcc0850 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -311,6 +311,8 @@ int r420_init(struct radeon_device *rdev)
311 } 311 }
312 /* Initialize clocks */ 312 /* Initialize clocks */
313 radeon_get_clock_info(rdev->ddev); 313 radeon_get_clock_info(rdev->ddev);
314 /* Initialize power management */
315 radeon_pm_init(rdev);
314 /* Get vram informations */ 316 /* Get vram informations */
315 r300_vram_info(rdev); 317 r300_vram_info(rdev);
316 /* Initialize memory controller (also test AGP) */ 318 /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/r500_reg.h b/drivers/gpu/drm/radeon/r500_reg.h
index 868add6e166d..7baa73955563 100644
--- a/drivers/gpu/drm/radeon/r500_reg.h
+++ b/drivers/gpu/drm/radeon/r500_reg.h
@@ -384,9 +384,16 @@
384# define AVIVO_D1GRPH_TILED (1 << 20) 384# define AVIVO_D1GRPH_TILED (1 << 20)
385# define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21) 385# define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21)
386 386
387/* The R7xx *_HIGH surface regs are backwards; the D1 regs are in the D2
388 * block and vice versa. This applies to GRPH, CUR, etc.
389 */
387#define AVIVO_D1GRPH_LUT_SEL 0x6108 390#define AVIVO_D1GRPH_LUT_SEL 0x6108
388#define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 391#define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110
392#define R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6914
393#define R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6114
389#define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 394#define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118
395#define R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x691c
396#define R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x611c
390#define AVIVO_D1GRPH_PITCH 0x6120 397#define AVIVO_D1GRPH_PITCH 0x6120
391#define AVIVO_D1GRPH_SURFACE_OFFSET_X 0x6124 398#define AVIVO_D1GRPH_SURFACE_OFFSET_X 0x6124
392#define AVIVO_D1GRPH_SURFACE_OFFSET_Y 0x6128 399#define AVIVO_D1GRPH_SURFACE_OFFSET_Y 0x6128
@@ -404,6 +411,8 @@
404# define AVIVO_D1CURSOR_MODE_MASK (3 << 8) 411# define AVIVO_D1CURSOR_MODE_MASK (3 << 8)
405# define AVIVO_D1CURSOR_MODE_24BPP 2 412# define AVIVO_D1CURSOR_MODE_24BPP 2
406#define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408 413#define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408
414#define R700_D1CUR_SURFACE_ADDRESS_HIGH 0x6c0c
415#define R700_D2CUR_SURFACE_ADDRESS_HIGH 0x640c
407#define AVIVO_D1CUR_SIZE 0x6410 416#define AVIVO_D1CUR_SIZE 0x6410
408#define AVIVO_D1CUR_POSITION 0x6414 417#define AVIVO_D1CUR_POSITION 0x6414
409#define AVIVO_D1CUR_HOT_SPOT 0x6418 418#define AVIVO_D1CUR_HOT_SPOT 0x6418
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index a555b7b19b48..f7435185c0a6 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -260,6 +260,8 @@ int r520_init(struct radeon_device *rdev)
260 } 260 }
261 /* Initialize clocks */ 261 /* Initialize clocks */
262 radeon_get_clock_info(rdev->ddev); 262 radeon_get_clock_info(rdev->ddev);
263 /* Initialize power management */
264 radeon_pm_init(rdev);
263 /* Get vram informations */ 265 /* Get vram informations */
264 r520_vram_info(rdev); 266 r520_vram_info(rdev);
265 /* Initialize memory controller (also test AGP) */ 267 /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 609719490ec2..278f646bc18e 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -339,11 +339,10 @@ int r600_mc_init(struct radeon_device *rdev)
339{ 339{
340 fixed20_12 a; 340 fixed20_12 a;
341 u32 tmp; 341 u32 tmp;
342 int chansize; 342 int chansize, numchan;
343 int r; 343 int r;
344 344
345 /* Get VRAM informations */ 345 /* Get VRAM informations */
346 rdev->mc.vram_width = 128;
347 rdev->mc.vram_is_ddr = true; 346 rdev->mc.vram_is_ddr = true;
348 tmp = RREG32(RAMCFG); 347 tmp = RREG32(RAMCFG);
349 if (tmp & CHANSIZE_OVERRIDE) { 348 if (tmp & CHANSIZE_OVERRIDE) {
@@ -353,17 +352,23 @@ int r600_mc_init(struct radeon_device *rdev)
353 } else { 352 } else {
354 chansize = 32; 353 chansize = 32;
355 } 354 }
356 if (rdev->family == CHIP_R600) { 355 tmp = RREG32(CHMAP);
357 rdev->mc.vram_width = 8 * chansize; 356 switch ((tmp & NOOFCHAN_MASK) >> NOOFCHAN_SHIFT) {
358 } else if (rdev->family == CHIP_RV670) { 357 case 0:
359 rdev->mc.vram_width = 4 * chansize; 358 default:
360 } else if ((rdev->family == CHIP_RV610) || 359 numchan = 1;
361 (rdev->family == CHIP_RV620)) { 360 break;
362 rdev->mc.vram_width = chansize; 361 case 1:
363 } else if ((rdev->family == CHIP_RV630) || 362 numchan = 2;
364 (rdev->family == CHIP_RV635)) { 363 break;
365 rdev->mc.vram_width = 2 * chansize; 364 case 2:
365 numchan = 4;
366 break;
367 case 3:
368 numchan = 8;
369 break;
366 } 370 }
371 rdev->mc.vram_width = numchan * chansize;
367 /* Could aper size report 0 ? */ 372 /* Could aper size report 0 ? */
368 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 373 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
369 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 374 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
@@ -404,35 +409,29 @@ int r600_mc_init(struct radeon_device *rdev)
404 rdev->mc.gtt_location = rdev->mc.mc_vram_size; 409 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
405 } 410 }
406 } else { 411 } else {
407 if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) { 412 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
408 rdev->mc.vram_location = (RREG32(MC_VM_FB_LOCATION) & 413 rdev->mc.vram_location = (RREG32(MC_VM_FB_LOCATION) &
409 0xFFFF) << 24; 414 0xFFFF) << 24;
410 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; 415 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size;
411 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size; 416 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) {
412 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) { 417 /* Enough place after vram */
413 /* Enough place after vram */ 418 rdev->mc.gtt_location = tmp;
414 rdev->mc.gtt_location = tmp; 419 } else if (rdev->mc.vram_location >= rdev->mc.gtt_size) {
415 } else if (rdev->mc.vram_location >= rdev->mc.gtt_size) { 420 /* Enough place before vram */
416 /* Enough place before vram */ 421 rdev->mc.gtt_location = 0;
422 } else {
423 /* Not enough place after or before shrink
424 * gart size
425 */
426 if (rdev->mc.vram_location > (0xFFFFFFFFUL - tmp)) {
417 rdev->mc.gtt_location = 0; 427 rdev->mc.gtt_location = 0;
428 rdev->mc.gtt_size = rdev->mc.vram_location;
418 } else { 429 } else {
419 /* Not enough place after or before shrink 430 rdev->mc.gtt_location = tmp;
420 * gart size 431 rdev->mc.gtt_size = 0xFFFFFFFFUL - tmp;
421 */
422 if (rdev->mc.vram_location > (0xFFFFFFFFUL - tmp)) {
423 rdev->mc.gtt_location = 0;
424 rdev->mc.gtt_size = rdev->mc.vram_location;
425 } else {
426 rdev->mc.gtt_location = tmp;
427 rdev->mc.gtt_size = 0xFFFFFFFFUL - tmp;
428 }
429 } 432 }
430 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
431 } else {
432 rdev->mc.vram_location = 0x00000000UL;
433 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
434 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
435 } 433 }
434 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
436 } 435 }
437 rdev->mc.vram_start = rdev->mc.vram_location; 436 rdev->mc.vram_start = rdev->mc.vram_location;
438 rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1; 437 rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
@@ -859,7 +858,8 @@ void r600_gpu_init(struct radeon_device *rdev)
859 ((rdev->family) == CHIP_RV630) || 858 ((rdev->family) == CHIP_RV630) ||
860 ((rdev->family) == CHIP_RV610) || 859 ((rdev->family) == CHIP_RV610) ||
861 ((rdev->family) == CHIP_RV620) || 860 ((rdev->family) == CHIP_RV620) ||
862 ((rdev->family) == CHIP_RS780)) { 861 ((rdev->family) == CHIP_RS780) ||
862 ((rdev->family) == CHIP_RS880)) {
863 WREG32(DB_DEBUG, PREZ_MUST_WAIT_FOR_POSTZ_DONE); 863 WREG32(DB_DEBUG, PREZ_MUST_WAIT_FOR_POSTZ_DONE);
864 } else { 864 } else {
865 WREG32(DB_DEBUG, 0); 865 WREG32(DB_DEBUG, 0);
@@ -876,7 +876,8 @@ void r600_gpu_init(struct radeon_device *rdev)
876 tmp = RREG32(SQ_MS_FIFO_SIZES); 876 tmp = RREG32(SQ_MS_FIFO_SIZES);
877 if (((rdev->family) == CHIP_RV610) || 877 if (((rdev->family) == CHIP_RV610) ||
878 ((rdev->family) == CHIP_RV620) || 878 ((rdev->family) == CHIP_RV620) ||
879 ((rdev->family) == CHIP_RS780)) { 879 ((rdev->family) == CHIP_RS780) ||
880 ((rdev->family) == CHIP_RS880)) {
880 tmp = (CACHE_FIFO_SIZE(0xa) | 881 tmp = (CACHE_FIFO_SIZE(0xa) |
881 FETCH_FIFO_HIWATER(0xa) | 882 FETCH_FIFO_HIWATER(0xa) |
882 DONE_FIFO_HIWATER(0xe0) | 883 DONE_FIFO_HIWATER(0xe0) |
@@ -919,7 +920,8 @@ void r600_gpu_init(struct radeon_device *rdev)
919 NUM_ES_STACK_ENTRIES(0)); 920 NUM_ES_STACK_ENTRIES(0));
920 } else if (((rdev->family) == CHIP_RV610) || 921 } else if (((rdev->family) == CHIP_RV610) ||
921 ((rdev->family) == CHIP_RV620) || 922 ((rdev->family) == CHIP_RV620) ||
922 ((rdev->family) == CHIP_RS780)) { 923 ((rdev->family) == CHIP_RS780) ||
924 ((rdev->family) == CHIP_RS880)) {
923 /* no vertex cache */ 925 /* no vertex cache */
924 sq_config &= ~VC_ENABLE; 926 sq_config &= ~VC_ENABLE;
925 927
@@ -976,7 +978,8 @@ void r600_gpu_init(struct radeon_device *rdev)
976 978
977 if (((rdev->family) == CHIP_RV610) || 979 if (((rdev->family) == CHIP_RV610) ||
978 ((rdev->family) == CHIP_RV620) || 980 ((rdev->family) == CHIP_RV620) ||
979 ((rdev->family) == CHIP_RS780)) { 981 ((rdev->family) == CHIP_RS780) ||
982 ((rdev->family) == CHIP_RS880)) {
980 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(TC_ONLY)); 983 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(TC_ONLY));
981 } else { 984 } else {
982 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC)); 985 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC));
@@ -1002,8 +1005,9 @@ void r600_gpu_init(struct radeon_device *rdev)
1002 tmp = rdev->config.r600.max_pipes * 16; 1005 tmp = rdev->config.r600.max_pipes * 16;
1003 switch (rdev->family) { 1006 switch (rdev->family) {
1004 case CHIP_RV610: 1007 case CHIP_RV610:
1005 case CHIP_RS780:
1006 case CHIP_RV620: 1008 case CHIP_RV620:
1009 case CHIP_RS780:
1010 case CHIP_RS880:
1007 tmp += 32; 1011 tmp += 32;
1008 break; 1012 break;
1009 case CHIP_RV670: 1013 case CHIP_RV670:
@@ -1044,8 +1048,9 @@ void r600_gpu_init(struct radeon_device *rdev)
1044 1048
1045 switch (rdev->family) { 1049 switch (rdev->family) {
1046 case CHIP_RV610: 1050 case CHIP_RV610:
1047 case CHIP_RS780:
1048 case CHIP_RV620: 1051 case CHIP_RV620:
1052 case CHIP_RS780:
1053 case CHIP_RS880:
1049 tmp = TC_L2_SIZE(8); 1054 tmp = TC_L2_SIZE(8);
1050 break; 1055 break;
1051 case CHIP_RV630: 1056 case CHIP_RV630:
@@ -1267,19 +1272,17 @@ int r600_cp_resume(struct radeon_device *rdev)
1267 1272
1268 /* Set ring buffer size */ 1273 /* Set ring buffer size */
1269 rb_bufsz = drm_order(rdev->cp.ring_size / 8); 1274 rb_bufsz = drm_order(rdev->cp.ring_size / 8);
1275 tmp = RB_NO_UPDATE | (drm_order(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;
1270#ifdef __BIG_ENDIAN 1276#ifdef __BIG_ENDIAN
1271 WREG32(CP_RB_CNTL, BUF_SWAP_32BIT | RB_NO_UPDATE | 1277 tmp |= BUF_SWAP_32BIT;
1272 (drm_order(4096/8) << 8) | rb_bufsz);
1273#else
1274 WREG32(CP_RB_CNTL, RB_NO_UPDATE | (drm_order(4096/8) << 8) | rb_bufsz);
1275#endif 1278#endif
1279 WREG32(CP_RB_CNTL, tmp);
1276 WREG32(CP_SEM_WAIT_TIMER, 0x4); 1280 WREG32(CP_SEM_WAIT_TIMER, 0x4);
1277 1281
1278 /* Set the write pointer delay */ 1282 /* Set the write pointer delay */
1279 WREG32(CP_RB_WPTR_DELAY, 0); 1283 WREG32(CP_RB_WPTR_DELAY, 0);
1280 1284
1281 /* Initialize the ring buffer's read and write pointers */ 1285 /* Initialize the ring buffer's read and write pointers */
1282 tmp = RREG32(CP_RB_CNTL);
1283 WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA); 1286 WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA);
1284 WREG32(CP_RB_RPTR_WR, 0); 1287 WREG32(CP_RB_RPTR_WR, 0);
1285 WREG32(CP_RB_WPTR, 0); 1288 WREG32(CP_RB_WPTR, 0);
@@ -1400,7 +1403,7 @@ int r600_wb_enable(struct radeon_device *rdev)
1400 int r; 1403 int r;
1401 1404
1402 if (rdev->wb.wb_obj == NULL) { 1405 if (rdev->wb.wb_obj == NULL) {
1403 r = radeon_object_create(rdev, NULL, 4096, true, 1406 r = radeon_object_create(rdev, NULL, RADEON_GPU_PAGE_SIZE, true,
1404 RADEON_GEM_DOMAIN_GTT, false, &rdev->wb.wb_obj); 1407 RADEON_GEM_DOMAIN_GTT, false, &rdev->wb.wb_obj);
1405 if (r) { 1408 if (r) {
1406 dev_warn(rdev->dev, "failed to create WB buffer (%d).\n", r); 1409 dev_warn(rdev->dev, "failed to create WB buffer (%d).\n", r);
@@ -1450,8 +1453,8 @@ int r600_copy_blit(struct radeon_device *rdev,
1450 uint64_t src_offset, uint64_t dst_offset, 1453 uint64_t src_offset, uint64_t dst_offset,
1451 unsigned num_pages, struct radeon_fence *fence) 1454 unsigned num_pages, struct radeon_fence *fence)
1452{ 1455{
1453 r600_blit_prepare_copy(rdev, num_pages * 4096); 1456 r600_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE);
1454 r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * 4096); 1457 r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * RADEON_GPU_PAGE_SIZE);
1455 r600_blit_done_copy(rdev, fence); 1458 r600_blit_done_copy(rdev, fence);
1456 return 0; 1459 return 0;
1457} 1460}
@@ -1632,10 +1635,13 @@ int r600_init(struct radeon_device *rdev)
1632 r600_scratch_init(rdev); 1635 r600_scratch_init(rdev);
1633 /* Initialize surface registers */ 1636 /* Initialize surface registers */
1634 radeon_surface_init(rdev); 1637 radeon_surface_init(rdev);
1638 /* Initialize clocks */
1635 radeon_get_clock_info(rdev->ddev); 1639 radeon_get_clock_info(rdev->ddev);
1636 r = radeon_clocks_init(rdev); 1640 r = radeon_clocks_init(rdev);
1637 if (r) 1641 if (r)
1638 return r; 1642 return r;
1643 /* Initialize power management */
1644 radeon_pm_init(rdev);
1639 /* Fence driver */ 1645 /* Fence driver */
1640 r = radeon_fence_driver_init(rdev); 1646 r = radeon_fence_driver_init(rdev);
1641 if (r) 1647 if (r)
diff --git a/drivers/gpu/drm/radeon/r600_blit.c b/drivers/gpu/drm/radeon/r600_blit.c
index dec501081608..5ea432347589 100644
--- a/drivers/gpu/drm/radeon/r600_blit.c
+++ b/drivers/gpu/drm/radeon/r600_blit.c
@@ -582,6 +582,8 @@ r600_blit_copy(struct drm_device *dev,
582 u64 vb_addr; 582 u64 vb_addr;
583 u32 *vb; 583 u32 *vb;
584 584
585 vb = r600_nomm_get_vb_ptr(dev);
586
585 if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { 587 if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) {
586 max_bytes = 8192; 588 max_bytes = 8192;
587 589
@@ -617,8 +619,8 @@ r600_blit_copy(struct drm_device *dev,
617 if (!dev_priv->blit_vb) 619 if (!dev_priv->blit_vb)
618 return; 620 return;
619 set_shaders(dev); 621 set_shaders(dev);
622 vb = r600_nomm_get_vb_ptr(dev);
620 } 623 }
621 vb = r600_nomm_get_vb_ptr(dev);
622 624
623 vb[0] = i2f(dst_x); 625 vb[0] = i2f(dst_x);
624 vb[1] = 0; 626 vb[1] = 0;
@@ -706,8 +708,8 @@ r600_blit_copy(struct drm_device *dev,
706 return; 708 return;
707 709
708 set_shaders(dev); 710 set_shaders(dev);
711 vb = r600_nomm_get_vb_ptr(dev);
709 } 712 }
710 vb = r600_nomm_get_vb_ptr(dev);
711 713
712 vb[0] = i2f(dst_x / 4); 714 vb[0] = i2f(dst_x / 4);
713 vb[1] = 0; 715 vb[1] = 0;
@@ -772,6 +774,7 @@ r600_blit_swap(struct drm_device *dev,
772{ 774{
773 drm_radeon_private_t *dev_priv = dev->dev_private; 775 drm_radeon_private_t *dev_priv = dev->dev_private;
774 int cb_format, tex_format; 776 int cb_format, tex_format;
777 int sx2, sy2, dx2, dy2;
775 u64 vb_addr; 778 u64 vb_addr;
776 u32 *vb; 779 u32 *vb;
777 780
@@ -786,16 +789,10 @@ r600_blit_swap(struct drm_device *dev,
786 } 789 }
787 vb = r600_nomm_get_vb_ptr(dev); 790 vb = r600_nomm_get_vb_ptr(dev);
788 791
789 if (cpp == 4) { 792 sx2 = sx + w;
790 cb_format = COLOR_8_8_8_8; 793 sy2 = sy + h;
791 tex_format = FMT_8_8_8_8; 794 dx2 = dx + w;
792 } else if (cpp == 2) { 795 dy2 = dy + h;
793 cb_format = COLOR_5_6_5;
794 tex_format = FMT_5_6_5;
795 } else {
796 cb_format = COLOR_8;
797 tex_format = FMT_8;
798 }
799 796
800 vb[0] = i2f(dx); 797 vb[0] = i2f(dx);
801 vb[1] = i2f(dy); 798 vb[1] = i2f(dy);
@@ -803,31 +800,46 @@ r600_blit_swap(struct drm_device *dev,
803 vb[3] = i2f(sy); 800 vb[3] = i2f(sy);
804 801
805 vb[4] = i2f(dx); 802 vb[4] = i2f(dx);
806 vb[5] = i2f(dy + h); 803 vb[5] = i2f(dy2);
807 vb[6] = i2f(sx); 804 vb[6] = i2f(sx);
808 vb[7] = i2f(sy + h); 805 vb[7] = i2f(sy2);
806
807 vb[8] = i2f(dx2);
808 vb[9] = i2f(dy2);
809 vb[10] = i2f(sx2);
810 vb[11] = i2f(sy2);
809 811
810 vb[8] = i2f(dx + w); 812 switch(cpp) {
811 vb[9] = i2f(dy + h); 813 case 4:
812 vb[10] = i2f(sx + w); 814 cb_format = COLOR_8_8_8_8;
813 vb[11] = i2f(sy + h); 815 tex_format = FMT_8_8_8_8;
816 break;
817 case 2:
818 cb_format = COLOR_5_6_5;
819 tex_format = FMT_5_6_5;
820 break;
821 default:
822 cb_format = COLOR_8;
823 tex_format = FMT_8;
824 break;
825 }
814 826
815 /* src */ 827 /* src */
816 set_tex_resource(dev_priv, tex_format, 828 set_tex_resource(dev_priv, tex_format,
817 src_pitch / cpp, 829 src_pitch / cpp,
818 sy + h, src_pitch / cpp, 830 sy2, src_pitch / cpp,
819 src_gpu_addr); 831 src_gpu_addr);
820 832
821 cp_set_surface_sync(dev_priv, 833 cp_set_surface_sync(dev_priv,
822 R600_TC_ACTION_ENA, (src_pitch * (sy + h)), src_gpu_addr); 834 R600_TC_ACTION_ENA, src_pitch * sy2, src_gpu_addr);
823 835
824 /* dst */ 836 /* dst */
825 set_render_target(dev_priv, cb_format, 837 set_render_target(dev_priv, cb_format,
826 dst_pitch / cpp, dy + h, 838 dst_pitch / cpp, dy2,
827 dst_gpu_addr); 839 dst_gpu_addr);
828 840
829 /* scissors */ 841 /* scissors */
830 set_scissors(dev_priv, dx, dy, dx + w, dy + h); 842 set_scissors(dev_priv, dx, dy, dx2, dy2);
831 843
832 /* Vertex buffer setup */ 844 /* Vertex buffer setup */
833 vb_addr = dev_priv->gart_buffers_offset + 845 vb_addr = dev_priv->gart_buffers_offset +
@@ -840,7 +852,7 @@ r600_blit_swap(struct drm_device *dev,
840 852
841 cp_set_surface_sync(dev_priv, 853 cp_set_surface_sync(dev_priv,
842 R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA, 854 R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA,
843 dst_pitch * (dy + h), dst_gpu_addr); 855 dst_pitch * dy2, dst_gpu_addr);
844 856
845 dev_priv->blit_vb->used += 12 * 4; 857 dev_priv->blit_vb->used += 12 * 4;
846} 858}
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c
index 93108bb31d1d..dbf716e1fbf3 100644
--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -368,7 +368,7 @@ set_default_state(struct radeon_device *rdev)
368 if ((rdev->family == CHIP_RV610) || 368 if ((rdev->family == CHIP_RV610) ||
369 (rdev->family == CHIP_RV620) || 369 (rdev->family == CHIP_RV620) ||
370 (rdev->family == CHIP_RS780) || 370 (rdev->family == CHIP_RS780) ||
371 (rdev->family == CHIP_RS780) || 371 (rdev->family == CHIP_RS880) ||
372 (rdev->family == CHIP_RV710)) 372 (rdev->family == CHIP_RV710))
373 sq_config = 0; 373 sq_config = 0;
374 else 374 else
@@ -610,6 +610,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
610 610
611 DRM_DEBUG("emitting copy %16llx %16llx %d %d\n", src_gpu_addr, dst_gpu_addr, 611 DRM_DEBUG("emitting copy %16llx %16llx %d %d\n", src_gpu_addr, dst_gpu_addr,
612 size_bytes, rdev->r600_blit.vb_used); 612 size_bytes, rdev->r600_blit.vb_used);
613 vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used);
613 if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { 614 if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) {
614 max_bytes = 8192; 615 max_bytes = 8192;
615 616
@@ -652,7 +653,6 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
652 vb = r600_nomm_get_vb_ptr(dev); 653 vb = r600_nomm_get_vb_ptr(dev);
653#endif 654#endif
654 } 655 }
655 vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used);
656 656
657 vb[0] = i2f(dst_x); 657 vb[0] = i2f(dst_x);
658 vb[1] = 0; 658 vb[1] = 0;
@@ -747,7 +747,6 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
747 vb = r600_nomm_get_vb_ptr(dev); 747 vb = r600_nomm_get_vb_ptr(dev);
748 } 748 }
749#endif 749#endif
750 vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used);
751 750
752 vb[0] = i2f(dst_x / 4); 751 vb[0] = i2f(dst_x / 4);
753 vb[1] = 0; 752 vb[1] = 0;
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 17e42195c632..0d820764f340 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -466,6 +466,23 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
466 for (i = 0; i < pkt->count; i++) { 466 for (i = 0; i < pkt->count; i++) {
467 reg = start_reg + (4 * i); 467 reg = start_reg + (4 * i);
468 switch (reg) { 468 switch (reg) {
469 case SQ_ESGS_RING_BASE:
470 case SQ_GSVS_RING_BASE:
471 case SQ_ESTMP_RING_BASE:
472 case SQ_GSTMP_RING_BASE:
473 case SQ_VSTMP_RING_BASE:
474 case SQ_PSTMP_RING_BASE:
475 case SQ_FBUF_RING_BASE:
476 case SQ_REDUC_RING_BASE:
477 case SX_MEMORY_EXPORT_BASE:
478 r = r600_cs_packet_next_reloc(p, &reloc);
479 if (r) {
480 DRM_ERROR("bad SET_CONFIG_REG "
481 "0x%04X\n", reg);
482 return -EINVAL;
483 }
484 ib[idx+1+i] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
485 break;
469 case CP_COHER_BASE: 486 case CP_COHER_BASE:
470 /* use PACKET3_SURFACE_SYNC */ 487 /* use PACKET3_SURFACE_SYNC */
471 return -EINVAL; 488 return -EINVAL;
@@ -487,6 +504,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
487 reg = start_reg + (4 * i); 504 reg = start_reg + (4 * i);
488 switch (reg) { 505 switch (reg) {
489 case DB_DEPTH_BASE: 506 case DB_DEPTH_BASE:
507 case DB_HTILE_DATA_BASE:
490 case CB_COLOR0_BASE: 508 case CB_COLOR0_BASE:
491 case CB_COLOR1_BASE: 509 case CB_COLOR1_BASE:
492 case CB_COLOR2_BASE: 510 case CB_COLOR2_BASE:
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 9b64d47f1f82..27ab428b149b 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -119,6 +119,7 @@
119#define DB_DEBUG 0x9830 119#define DB_DEBUG 0x9830
120#define PREZ_MUST_WAIT_FOR_POSTZ_DONE (1 << 31) 120#define PREZ_MUST_WAIT_FOR_POSTZ_DONE (1 << 31)
121#define DB_DEPTH_BASE 0x2800C 121#define DB_DEPTH_BASE 0x2800C
122#define DB_HTILE_DATA_BASE 0x28014
122#define DB_WATERMARKS 0x9838 123#define DB_WATERMARKS 0x9838
123#define DEPTH_FREE(x) ((x) << 0) 124#define DEPTH_FREE(x) ((x) << 0)
124#define DEPTH_FLUSH(x) ((x) << 5) 125#define DEPTH_FLUSH(x) ((x) << 5)
@@ -171,6 +172,14 @@
171#define SQ_STACK_RESOURCE_MGMT_2 0x8c14 172#define SQ_STACK_RESOURCE_MGMT_2 0x8c14
172# define NUM_GS_STACK_ENTRIES(x) ((x) << 0) 173# define NUM_GS_STACK_ENTRIES(x) ((x) << 0)
173# define NUM_ES_STACK_ENTRIES(x) ((x) << 16) 174# define NUM_ES_STACK_ENTRIES(x) ((x) << 16)
175#define SQ_ESGS_RING_BASE 0x8c40
176#define SQ_GSVS_RING_BASE 0x8c48
177#define SQ_ESTMP_RING_BASE 0x8c50
178#define SQ_GSTMP_RING_BASE 0x8c58
179#define SQ_VSTMP_RING_BASE 0x8c60
180#define SQ_PSTMP_RING_BASE 0x8c68
181#define SQ_FBUF_RING_BASE 0x8c70
182#define SQ_REDUC_RING_BASE 0x8c78
174 183
175#define GRBM_CNTL 0x8000 184#define GRBM_CNTL 0x8000
176# define GRBM_READ_TIMEOUT(x) ((x) << 0) 185# define GRBM_READ_TIMEOUT(x) ((x) << 0)
@@ -271,6 +280,10 @@
271#define PCIE_PORT_INDEX 0x0038 280#define PCIE_PORT_INDEX 0x0038
272#define PCIE_PORT_DATA 0x003C 281#define PCIE_PORT_DATA 0x003C
273 282
283#define CHMAP 0x2004
284#define NOOFCHAN_SHIFT 12
285#define NOOFCHAN_MASK 0x00003000
286
274#define RAMCFG 0x2408 287#define RAMCFG 0x2408
275#define NOOFBANK_SHIFT 0 288#define NOOFBANK_SHIFT 0
276#define NOOFBANK_MASK 0x00000001 289#define NOOFBANK_MASK 0x00000001
@@ -352,6 +365,7 @@
352 365
353 366
354#define SX_MISC 0x28350 367#define SX_MISC 0x28350
368#define SX_MEMORY_EXPORT_BASE 0x9010
355#define SX_DEBUG_1 0x9054 369#define SX_DEBUG_1 0x9054
356#define SMX_EVENT_RELEASE (1 << 0) 370#define SMX_EVENT_RELEASE (1 << 0)
357#define ENABLE_NEW_SMX_ADDRESS (1 << 16) 371#define ENABLE_NEW_SMX_ADDRESS (1 << 16)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 5ab35b81c86b..757f5cd37744 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -139,6 +139,10 @@ struct radeon_clock {
139 uint32_t default_sclk; 139 uint32_t default_sclk;
140}; 140};
141 141
142/*
143 * Power management
144 */
145int radeon_pm_init(struct radeon_device *rdev);
142 146
143/* 147/*
144 * Fences. 148 * Fences.
@@ -276,6 +280,8 @@ union radeon_gart_table {
276 struct radeon_gart_table_vram vram; 280 struct radeon_gart_table_vram vram;
277}; 281};
278 282
283#define RADEON_GPU_PAGE_SIZE 4096
284
279struct radeon_gart { 285struct radeon_gart {
280 dma_addr_t table_addr; 286 dma_addr_t table_addr;
281 unsigned num_gpu_pages; 287 unsigned num_gpu_pages;
@@ -621,7 +627,9 @@ struct radeon_asic {
621 uint64_t dst_offset, 627 uint64_t dst_offset,
622 unsigned num_pages, 628 unsigned num_pages,
623 struct radeon_fence *fence); 629 struct radeon_fence *fence);
630 uint32_t (*get_engine_clock)(struct radeon_device *rdev);
624 void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); 631 void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock);
632 uint32_t (*get_memory_clock)(struct radeon_device *rdev);
625 void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); 633 void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock);
626 void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); 634 void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes);
627 void (*set_clock_gating)(struct radeon_device *rdev, int enable); 635 void (*set_clock_gating)(struct radeon_device *rdev, int enable);
@@ -783,6 +791,7 @@ struct radeon_device {
783 const struct firmware *me_fw; /* all family ME firmware */ 791 const struct firmware *me_fw; /* all family ME firmware */
784 const struct firmware *pfp_fw; /* r6/700 PFP firmware */ 792 const struct firmware *pfp_fw; /* r6/700 PFP firmware */
785 struct r600_blit r600_blit; 793 struct r600_blit r600_blit;
794 int msi_enabled; /* msi enabled */
786}; 795};
787 796
788int radeon_device_init(struct radeon_device *rdev, 797int radeon_device_init(struct radeon_device *rdev,
@@ -952,7 +961,9 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v)
952#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f)) 961#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f))
953#define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f)) 962#define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f))
954#define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f)) 963#define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f))
964#define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev))
955#define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) 965#define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e))
966#define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev))
956#define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) 967#define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e))
957#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) 968#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l))
958#define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) 969#define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index c3532c7a6f3f..c18fbee387d7 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -31,10 +31,13 @@
31/* 31/*
32 * common functions 32 * common functions
33 */ 33 */
34uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev);
34void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); 35void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
35void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); 36void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
36 37
38uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev);
37void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); 39void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
40uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev);
38void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); 41void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock);
39void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); 42void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
40 43
@@ -95,7 +98,9 @@ static struct radeon_asic r100_asic = {
95 .copy_blit = &r100_copy_blit, 98 .copy_blit = &r100_copy_blit,
96 .copy_dma = NULL, 99 .copy_dma = NULL,
97 .copy = &r100_copy_blit, 100 .copy = &r100_copy_blit,
101 .get_engine_clock = &radeon_legacy_get_engine_clock,
98 .set_engine_clock = &radeon_legacy_set_engine_clock, 102 .set_engine_clock = &radeon_legacy_set_engine_clock,
103 .get_memory_clock = NULL,
99 .set_memory_clock = NULL, 104 .set_memory_clock = NULL,
100 .set_pcie_lanes = NULL, 105 .set_pcie_lanes = NULL,
101 .set_clock_gating = &radeon_legacy_set_clock_gating, 106 .set_clock_gating = &radeon_legacy_set_clock_gating,
@@ -148,7 +153,9 @@ static struct radeon_asic r300_asic = {
148 .copy_blit = &r100_copy_blit, 153 .copy_blit = &r100_copy_blit,
149 .copy_dma = &r300_copy_dma, 154 .copy_dma = &r300_copy_dma,
150 .copy = &r100_copy_blit, 155 .copy = &r100_copy_blit,
156 .get_engine_clock = &radeon_legacy_get_engine_clock,
151 .set_engine_clock = &radeon_legacy_set_engine_clock, 157 .set_engine_clock = &radeon_legacy_set_engine_clock,
158 .get_memory_clock = NULL,
152 .set_memory_clock = NULL, 159 .set_memory_clock = NULL,
153 .set_pcie_lanes = &rv370_set_pcie_lanes, 160 .set_pcie_lanes = &rv370_set_pcie_lanes,
154 .set_clock_gating = &radeon_legacy_set_clock_gating, 161 .set_clock_gating = &radeon_legacy_set_clock_gating,
@@ -185,7 +192,9 @@ static struct radeon_asic r420_asic = {
185 .copy_blit = &r100_copy_blit, 192 .copy_blit = &r100_copy_blit,
186 .copy_dma = &r300_copy_dma, 193 .copy_dma = &r300_copy_dma,
187 .copy = &r100_copy_blit, 194 .copy = &r100_copy_blit,
195 .get_engine_clock = &radeon_atom_get_engine_clock,
188 .set_engine_clock = &radeon_atom_set_engine_clock, 196 .set_engine_clock = &radeon_atom_set_engine_clock,
197 .get_memory_clock = &radeon_atom_get_memory_clock,
189 .set_memory_clock = &radeon_atom_set_memory_clock, 198 .set_memory_clock = &radeon_atom_set_memory_clock,
190 .set_pcie_lanes = &rv370_set_pcie_lanes, 199 .set_pcie_lanes = &rv370_set_pcie_lanes,
191 .set_clock_gating = &radeon_atom_set_clock_gating, 200 .set_clock_gating = &radeon_atom_set_clock_gating,
@@ -227,7 +236,9 @@ static struct radeon_asic rs400_asic = {
227 .copy_blit = &r100_copy_blit, 236 .copy_blit = &r100_copy_blit,
228 .copy_dma = &r300_copy_dma, 237 .copy_dma = &r300_copy_dma,
229 .copy = &r100_copy_blit, 238 .copy = &r100_copy_blit,
239 .get_engine_clock = &radeon_legacy_get_engine_clock,
230 .set_engine_clock = &radeon_legacy_set_engine_clock, 240 .set_engine_clock = &radeon_legacy_set_engine_clock,
241 .get_memory_clock = NULL,
231 .set_memory_clock = NULL, 242 .set_memory_clock = NULL,
232 .set_pcie_lanes = NULL, 243 .set_pcie_lanes = NULL,
233 .set_clock_gating = &radeon_legacy_set_clock_gating, 244 .set_clock_gating = &radeon_legacy_set_clock_gating,
@@ -273,7 +284,9 @@ static struct radeon_asic rs600_asic = {
273 .copy_blit = &r100_copy_blit, 284 .copy_blit = &r100_copy_blit,
274 .copy_dma = &r300_copy_dma, 285 .copy_dma = &r300_copy_dma,
275 .copy = &r100_copy_blit, 286 .copy = &r100_copy_blit,
287 .get_engine_clock = &radeon_atom_get_engine_clock,
276 .set_engine_clock = &radeon_atom_set_engine_clock, 288 .set_engine_clock = &radeon_atom_set_engine_clock,
289 .get_memory_clock = &radeon_atom_get_memory_clock,
277 .set_memory_clock = &radeon_atom_set_memory_clock, 290 .set_memory_clock = &radeon_atom_set_memory_clock,
278 .set_pcie_lanes = NULL, 291 .set_pcie_lanes = NULL,
279 .set_clock_gating = &radeon_atom_set_clock_gating, 292 .set_clock_gating = &radeon_atom_set_clock_gating,
@@ -312,7 +325,9 @@ static struct radeon_asic rs690_asic = {
312 .copy_blit = &r100_copy_blit, 325 .copy_blit = &r100_copy_blit,
313 .copy_dma = &r300_copy_dma, 326 .copy_dma = &r300_copy_dma,
314 .copy = &r300_copy_dma, 327 .copy = &r300_copy_dma,
328 .get_engine_clock = &radeon_atom_get_engine_clock,
315 .set_engine_clock = &radeon_atom_set_engine_clock, 329 .set_engine_clock = &radeon_atom_set_engine_clock,
330 .get_memory_clock = &radeon_atom_get_memory_clock,
316 .set_memory_clock = &radeon_atom_set_memory_clock, 331 .set_memory_clock = &radeon_atom_set_memory_clock,
317 .set_pcie_lanes = NULL, 332 .set_pcie_lanes = NULL,
318 .set_clock_gating = &radeon_atom_set_clock_gating, 333 .set_clock_gating = &radeon_atom_set_clock_gating,
@@ -357,7 +372,9 @@ static struct radeon_asic rv515_asic = {
357 .copy_blit = &r100_copy_blit, 372 .copy_blit = &r100_copy_blit,
358 .copy_dma = &r300_copy_dma, 373 .copy_dma = &r300_copy_dma,
359 .copy = &r100_copy_blit, 374 .copy = &r100_copy_blit,
375 .get_engine_clock = &radeon_atom_get_engine_clock,
360 .set_engine_clock = &radeon_atom_set_engine_clock, 376 .set_engine_clock = &radeon_atom_set_engine_clock,
377 .get_memory_clock = &radeon_atom_get_memory_clock,
361 .set_memory_clock = &radeon_atom_set_memory_clock, 378 .set_memory_clock = &radeon_atom_set_memory_clock,
362 .set_pcie_lanes = &rv370_set_pcie_lanes, 379 .set_pcie_lanes = &rv370_set_pcie_lanes,
363 .set_clock_gating = &radeon_atom_set_clock_gating, 380 .set_clock_gating = &radeon_atom_set_clock_gating,
@@ -393,7 +410,9 @@ static struct radeon_asic r520_asic = {
393 .copy_blit = &r100_copy_blit, 410 .copy_blit = &r100_copy_blit,
394 .copy_dma = &r300_copy_dma, 411 .copy_dma = &r300_copy_dma,
395 .copy = &r100_copy_blit, 412 .copy = &r100_copy_blit,
413 .get_engine_clock = &radeon_atom_get_engine_clock,
396 .set_engine_clock = &radeon_atom_set_engine_clock, 414 .set_engine_clock = &radeon_atom_set_engine_clock,
415 .get_memory_clock = &radeon_atom_get_memory_clock,
397 .set_memory_clock = &radeon_atom_set_memory_clock, 416 .set_memory_clock = &radeon_atom_set_memory_clock,
398 .set_pcie_lanes = &rv370_set_pcie_lanes, 417 .set_pcie_lanes = &rv370_set_pcie_lanes,
399 .set_clock_gating = &radeon_atom_set_clock_gating, 418 .set_clock_gating = &radeon_atom_set_clock_gating,
@@ -456,7 +475,9 @@ static struct radeon_asic r600_asic = {
456 .copy_blit = &r600_copy_blit, 475 .copy_blit = &r600_copy_blit,
457 .copy_dma = &r600_copy_blit, 476 .copy_dma = &r600_copy_blit,
458 .copy = &r600_copy_blit, 477 .copy = &r600_copy_blit,
478 .get_engine_clock = &radeon_atom_get_engine_clock,
459 .set_engine_clock = &radeon_atom_set_engine_clock, 479 .set_engine_clock = &radeon_atom_set_engine_clock,
480 .get_memory_clock = &radeon_atom_get_memory_clock,
460 .set_memory_clock = &radeon_atom_set_memory_clock, 481 .set_memory_clock = &radeon_atom_set_memory_clock,
461 .set_pcie_lanes = NULL, 482 .set_pcie_lanes = NULL,
462 .set_clock_gating = &radeon_atom_set_clock_gating, 483 .set_clock_gating = &radeon_atom_set_clock_gating,
@@ -493,7 +514,9 @@ static struct radeon_asic rv770_asic = {
493 .copy_blit = &r600_copy_blit, 514 .copy_blit = &r600_copy_blit,
494 .copy_dma = &r600_copy_blit, 515 .copy_dma = &r600_copy_blit,
495 .copy = &r600_copy_blit, 516 .copy = &r600_copy_blit,
517 .get_engine_clock = &radeon_atom_get_engine_clock,
496 .set_engine_clock = &radeon_atom_set_engine_clock, 518 .set_engine_clock = &radeon_atom_set_engine_clock,
519 .get_memory_clock = &radeon_atom_get_memory_clock,
497 .set_memory_clock = &radeon_atom_set_memory_clock, 520 .set_memory_clock = &radeon_atom_set_memory_clock,
498 .set_pcie_lanes = NULL, 521 .set_pcie_lanes = NULL,
499 .set_clock_gating = &radeon_atom_set_clock_gating, 522 .set_clock_gating = &radeon_atom_set_clock_gating,
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 5b6c08cee40e..2ed88a820935 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -46,7 +46,8 @@ radeon_add_atom_connector(struct drm_device *dev,
46 uint32_t supported_device, 46 uint32_t supported_device,
47 int connector_type, 47 int connector_type,
48 struct radeon_i2c_bus_rec *i2c_bus, 48 struct radeon_i2c_bus_rec *i2c_bus,
49 bool linkb, uint32_t igp_lane_info); 49 bool linkb, uint32_t igp_lane_info,
50 uint16_t connector_object_id);
50 51
51/* from radeon_legacy_encoder.c */ 52/* from radeon_legacy_encoder.c */
52extern void 53extern void
@@ -193,6 +194,23 @@ const int supported_devices_connector_convert[] = {
193 DRM_MODE_CONNECTOR_DisplayPort 194 DRM_MODE_CONNECTOR_DisplayPort
194}; 195};
195 196
197const uint16_t supported_devices_connector_object_id_convert[] = {
198 CONNECTOR_OBJECT_ID_NONE,
199 CONNECTOR_OBJECT_ID_VGA,
200 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I, /* not all boards support DL */
201 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D, /* not all boards support DL */
202 CONNECTOR_OBJECT_ID_VGA, /* technically DVI-A */
203 CONNECTOR_OBJECT_ID_COMPOSITE,
204 CONNECTOR_OBJECT_ID_SVIDEO,
205 CONNECTOR_OBJECT_ID_LVDS,
206 CONNECTOR_OBJECT_ID_9PIN_DIN,
207 CONNECTOR_OBJECT_ID_9PIN_DIN,
208 CONNECTOR_OBJECT_ID_DISPLAYPORT,
209 CONNECTOR_OBJECT_ID_HDMI_TYPE_A,
210 CONNECTOR_OBJECT_ID_HDMI_TYPE_B,
211 CONNECTOR_OBJECT_ID_SVIDEO
212};
213
196const int object_connector_convert[] = { 214const int object_connector_convert[] = {
197 DRM_MODE_CONNECTOR_Unknown, 215 DRM_MODE_CONNECTOR_Unknown,
198 DRM_MODE_CONNECTOR_DVII, 216 DRM_MODE_CONNECTOR_DVII,
@@ -229,7 +247,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
229 ATOM_OBJECT_HEADER *obj_header; 247 ATOM_OBJECT_HEADER *obj_header;
230 int i, j, path_size, device_support; 248 int i, j, path_size, device_support;
231 int connector_type; 249 int connector_type;
232 uint16_t igp_lane_info, conn_id; 250 uint16_t igp_lane_info, conn_id, connector_object_id;
233 bool linkb; 251 bool linkb;
234 struct radeon_i2c_bus_rec ddc_bus; 252 struct radeon_i2c_bus_rec ddc_bus;
235 253
@@ -277,7 +295,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
277 ATOM_DEVICE_CV_SUPPORT) 295 ATOM_DEVICE_CV_SUPPORT)
278 continue; 296 continue;
279 297
280 if ((rdev->family == CHIP_RS780) && 298 /* IGP chips */
299 if ((rdev->flags & RADEON_IS_IGP) &&
281 (con_obj_id == 300 (con_obj_id ==
282 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR)) { 301 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR)) {
283 uint16_t igp_offset = 0; 302 uint16_t igp_offset = 0;
@@ -311,6 +330,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
311 connector_type = 330 connector_type =
312 object_connector_convert 331 object_connector_convert
313 [ct]; 332 [ct];
333 connector_object_id = ct;
314 igp_lane_info = 334 igp_lane_info =
315 slot_config & 0xffff; 335 slot_config & 0xffff;
316 } else 336 } else
@@ -321,6 +341,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
321 igp_lane_info = 0; 341 igp_lane_info = 0;
322 connector_type = 342 connector_type =
323 object_connector_convert[con_obj_id]; 343 object_connector_convert[con_obj_id];
344 connector_object_id = con_obj_id;
324 } 345 }
325 346
326 if (connector_type == DRM_MODE_CONNECTOR_Unknown) 347 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
@@ -425,7 +446,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
425 le16_to_cpu(path-> 446 le16_to_cpu(path->
426 usDeviceTag), 447 usDeviceTag),
427 connector_type, &ddc_bus, 448 connector_type, &ddc_bus,
428 linkb, igp_lane_info); 449 linkb, igp_lane_info,
450 connector_object_id);
429 451
430 } 452 }
431 } 453 }
@@ -435,6 +457,45 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
435 return true; 457 return true;
436} 458}
437 459
460static uint16_t atombios_get_connector_object_id(struct drm_device *dev,
461 int connector_type,
462 uint16_t devices)
463{
464 struct radeon_device *rdev = dev->dev_private;
465
466 if (rdev->flags & RADEON_IS_IGP) {
467 return supported_devices_connector_object_id_convert
468 [connector_type];
469 } else if (((connector_type == DRM_MODE_CONNECTOR_DVII) ||
470 (connector_type == DRM_MODE_CONNECTOR_DVID)) &&
471 (devices & ATOM_DEVICE_DFP2_SUPPORT)) {
472 struct radeon_mode_info *mode_info = &rdev->mode_info;
473 struct atom_context *ctx = mode_info->atom_context;
474 int index = GetIndexIntoMasterTable(DATA, XTMDS_Info);
475 uint16_t size, data_offset;
476 uint8_t frev, crev;
477 ATOM_XTMDS_INFO *xtmds;
478
479 atom_parse_data_header(ctx, index, &size, &frev, &crev, &data_offset);
480 xtmds = (ATOM_XTMDS_INFO *)(ctx->bios + data_offset);
481
482 if (xtmds->ucSupportedLink & ATOM_XTMDS_SUPPORTED_DUALLINK) {
483 if (connector_type == DRM_MODE_CONNECTOR_DVII)
484 return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I;
485 else
486 return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D;
487 } else {
488 if (connector_type == DRM_MODE_CONNECTOR_DVII)
489 return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I;
490 else
491 return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D;
492 }
493 } else {
494 return supported_devices_connector_object_id_convert
495 [connector_type];
496 }
497}
498
438struct bios_connector { 499struct bios_connector {
439 bool valid; 500 bool valid;
440 uint16_t line_mux; 501 uint16_t line_mux;
@@ -593,14 +654,20 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct
593 654
594 /* add the connectors */ 655 /* add the connectors */
595 for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) { 656 for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) {
596 if (bios_connectors[i].valid) 657 if (bios_connectors[i].valid) {
658 uint16_t connector_object_id =
659 atombios_get_connector_object_id(dev,
660 bios_connectors[i].connector_type,
661 bios_connectors[i].devices);
597 radeon_add_atom_connector(dev, 662 radeon_add_atom_connector(dev,
598 bios_connectors[i].line_mux, 663 bios_connectors[i].line_mux,
599 bios_connectors[i].devices, 664 bios_connectors[i].devices,
600 bios_connectors[i]. 665 bios_connectors[i].
601 connector_type, 666 connector_type,
602 &bios_connectors[i].ddc_bus, 667 &bios_connectors[i].ddc_bus,
603 false, 0); 668 false, 0,
669 connector_object_id);
670 }
604 } 671 }
605 672
606 radeon_link_encoder_connector(dev); 673 radeon_link_encoder_connector(dev);
@@ -641,8 +708,12 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
641 le16_to_cpu(firmware_info->info.usReferenceClock); 708 le16_to_cpu(firmware_info->info.usReferenceClock);
642 p1pll->reference_div = 0; 709 p1pll->reference_div = 0;
643 710
644 p1pll->pll_out_min = 711 if (crev < 2)
645 le16_to_cpu(firmware_info->info.usMinPixelClockPLL_Output); 712 p1pll->pll_out_min =
713 le16_to_cpu(firmware_info->info.usMinPixelClockPLL_Output);
714 else
715 p1pll->pll_out_min =
716 le32_to_cpu(firmware_info->info_12.ulMinPixelClockPLL_Output);
646 p1pll->pll_out_max = 717 p1pll->pll_out_max =
647 le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output); 718 le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output);
648 719
@@ -651,6 +722,16 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
651 p1pll->pll_out_min = 64800; 722 p1pll->pll_out_min = 64800;
652 else 723 else
653 p1pll->pll_out_min = 20000; 724 p1pll->pll_out_min = 20000;
725 } else if (p1pll->pll_out_min > 64800) {
726 /* Limiting the pll output range is a good thing generally as
727 * it limits the number of possible pll combinations for a given
728 * frequency presumably to the ones that work best on each card.
729 * However, certain duallink DVI monitors seem to like
730 * pll combinations that would be limited by this at least on
731 * pre-DCE 3.0 r6xx hardware. This might need to be adjusted per
732 * family.
733 */
734 p1pll->pll_out_min = 64800;
654 } 735 }
655 736
656 p1pll->pll_in_min = 737 p1pll->pll_in_min =
@@ -767,6 +848,46 @@ bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
767 return false; 848 return false;
768} 849}
769 850
851static struct radeon_atom_ss *radeon_atombios_get_ss_info(struct
852 radeon_encoder
853 *encoder,
854 int id)
855{
856 struct drm_device *dev = encoder->base.dev;
857 struct radeon_device *rdev = dev->dev_private;
858 struct radeon_mode_info *mode_info = &rdev->mode_info;
859 int index = GetIndexIntoMasterTable(DATA, PPLL_SS_Info);
860 uint16_t data_offset;
861 struct _ATOM_SPREAD_SPECTRUM_INFO *ss_info;
862 uint8_t frev, crev;
863 struct radeon_atom_ss *ss = NULL;
864
865 if (id > ATOM_MAX_SS_ENTRY)
866 return NULL;
867
868 atom_parse_data_header(mode_info->atom_context, index, NULL, &frev,
869 &crev, &data_offset);
870
871 ss_info =
872 (struct _ATOM_SPREAD_SPECTRUM_INFO *)(mode_info->atom_context->bios + data_offset);
873
874 if (ss_info) {
875 ss =
876 kzalloc(sizeof(struct radeon_atom_ss), GFP_KERNEL);
877
878 if (!ss)
879 return NULL;
880
881 ss->percentage = le16_to_cpu(ss_info->asSS_Info[id].usSpreadSpectrumPercentage);
882 ss->type = ss_info->asSS_Info[id].ucSpreadSpectrumType;
883 ss->step = ss_info->asSS_Info[id].ucSS_Step;
884 ss->delay = ss_info->asSS_Info[id].ucSS_Delay;
885 ss->range = ss_info->asSS_Info[id].ucSS_Range;
886 ss->refdiv = ss_info->asSS_Info[id].ucRecommendedRef_Div;
887 }
888 return ss;
889}
890
770union lvds_info { 891union lvds_info {
771 struct _ATOM_LVDS_INFO info; 892 struct _ATOM_LVDS_INFO info;
772 struct _ATOM_LVDS_INFO_V12 info_12; 893 struct _ATOM_LVDS_INFO_V12 info_12;
@@ -798,27 +919,31 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct
798 if (!lvds) 919 if (!lvds)
799 return NULL; 920 return NULL;
800 921
801 lvds->native_mode.dotclock = 922 lvds->native_mode.clock =
802 le16_to_cpu(lvds_info->info.sLCDTiming.usPixClk) * 10; 923 le16_to_cpu(lvds_info->info.sLCDTiming.usPixClk) * 10;
803 lvds->native_mode.panel_xres = 924 lvds->native_mode.hdisplay =
804 le16_to_cpu(lvds_info->info.sLCDTiming.usHActive); 925 le16_to_cpu(lvds_info->info.sLCDTiming.usHActive);
805 lvds->native_mode.panel_yres = 926 lvds->native_mode.vdisplay =
806 le16_to_cpu(lvds_info->info.sLCDTiming.usVActive); 927 le16_to_cpu(lvds_info->info.sLCDTiming.usVActive);
807 lvds->native_mode.hblank = 928 lvds->native_mode.htotal = lvds->native_mode.hdisplay +
808 le16_to_cpu(lvds_info->info.sLCDTiming.usHBlanking_Time); 929 le16_to_cpu(lvds_info->info.sLCDTiming.usHBlanking_Time);
809 lvds->native_mode.hoverplus = 930 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay +
810 le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncOffset); 931 le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncOffset);
811 lvds->native_mode.hsync_width = 932 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start +
812 le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncWidth); 933 le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncWidth);
813 lvds->native_mode.vblank = 934 lvds->native_mode.vtotal = lvds->native_mode.vdisplay +
814 le16_to_cpu(lvds_info->info.sLCDTiming.usVBlanking_Time); 935 le16_to_cpu(lvds_info->info.sLCDTiming.usVBlanking_Time);
815 lvds->native_mode.voverplus = 936 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay +
816 le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncOffset); 937 le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth);
817 lvds->native_mode.vsync_width = 938 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start +
818 le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth); 939 le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth);
819 lvds->panel_pwr_delay = 940 lvds->panel_pwr_delay =
820 le16_to_cpu(lvds_info->info.usOffDelayInMs); 941 le16_to_cpu(lvds_info->info.usOffDelayInMs);
821 lvds->lvds_misc = lvds_info->info.ucLVDS_Misc; 942 lvds->lvds_misc = lvds_info->info.ucLVDS_Misc;
943 /* set crtc values */
944 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V);
945
946 lvds->ss = radeon_atombios_get_ss_info(encoder, lvds_info->info.ucSS_Id);
822 947
823 encoder->native_mode = lvds->native_mode; 948 encoder->native_mode = lvds->native_mode;
824 } 949 }
@@ -857,8 +982,7 @@ radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder)
857} 982}
858 983
859bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, 984bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
860 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION *crtc_timing, 985 struct drm_display_mode *mode)
861 int32_t *pixel_clock)
862{ 986{
863 struct radeon_mode_info *mode_info = &rdev->mode_info; 987 struct radeon_mode_info *mode_info = &rdev->mode_info;
864 ATOM_ANALOG_TV_INFO *tv_info; 988 ATOM_ANALOG_TV_INFO *tv_info;
@@ -866,7 +990,7 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
866 ATOM_DTD_FORMAT *dtd_timings; 990 ATOM_DTD_FORMAT *dtd_timings;
867 int data_index = GetIndexIntoMasterTable(DATA, AnalogTV_Info); 991 int data_index = GetIndexIntoMasterTable(DATA, AnalogTV_Info);
868 u8 frev, crev; 992 u8 frev, crev;
869 uint16_t data_offset; 993 u16 data_offset, misc;
870 994
871 atom_parse_data_header(mode_info->atom_context, data_index, NULL, &frev, &crev, &data_offset); 995 atom_parse_data_header(mode_info->atom_context, data_index, NULL, &frev, &crev, &data_offset);
872 996
@@ -876,28 +1000,37 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
876 if (index > MAX_SUPPORTED_TV_TIMING) 1000 if (index > MAX_SUPPORTED_TV_TIMING)
877 return false; 1001 return false;
878 1002
879 crtc_timing->usH_Total = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Total); 1003 mode->crtc_htotal = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Total);
880 crtc_timing->usH_Disp = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Disp); 1004 mode->crtc_hdisplay = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Disp);
881 crtc_timing->usH_SyncStart = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart); 1005 mode->crtc_hsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart);
882 crtc_timing->usH_SyncWidth = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncWidth); 1006 mode->crtc_hsync_end = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart) +
883 1007 le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncWidth);
884 crtc_timing->usV_Total = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Total); 1008
885 crtc_timing->usV_Disp = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Disp); 1009 mode->crtc_vtotal = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Total);
886 crtc_timing->usV_SyncStart = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart); 1010 mode->crtc_vdisplay = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Disp);
887 crtc_timing->usV_SyncWidth = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncWidth); 1011 mode->crtc_vsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart);
888 1012 mode->crtc_vsync_end = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart) +
889 crtc_timing->susModeMiscInfo = tv_info->aModeTimings[index].susModeMiscInfo; 1013 le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncWidth);
890 1014
891 crtc_timing->ucOverscanRight = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanRight); 1015 mode->flags = 0;
892 crtc_timing->ucOverscanLeft = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanLeft); 1016 misc = le16_to_cpu(tv_info->aModeTimings[index].susModeMiscInfo.usAccess);
893 crtc_timing->ucOverscanBottom = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanBottom); 1017 if (misc & ATOM_VSYNC_POLARITY)
894 crtc_timing->ucOverscanTop = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanTop); 1018 mode->flags |= DRM_MODE_FLAG_NVSYNC;
895 *pixel_clock = le16_to_cpu(tv_info->aModeTimings[index].usPixelClock) * 10; 1019 if (misc & ATOM_HSYNC_POLARITY)
1020 mode->flags |= DRM_MODE_FLAG_NHSYNC;
1021 if (misc & ATOM_COMPOSITESYNC)
1022 mode->flags |= DRM_MODE_FLAG_CSYNC;
1023 if (misc & ATOM_INTERLACE)
1024 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1025 if (misc & ATOM_DOUBLE_CLOCK_MODE)
1026 mode->flags |= DRM_MODE_FLAG_DBLSCAN;
1027
1028 mode->clock = le16_to_cpu(tv_info->aModeTimings[index].usPixelClock) * 10;
896 1029
897 if (index == 1) { 1030 if (index == 1) {
898 /* PAL timings appear to have wrong values for totals */ 1031 /* PAL timings appear to have wrong values for totals */
899 crtc_timing->usH_Total -= 1; 1032 mode->crtc_htotal -= 1;
900 crtc_timing->usV_Total -= 1; 1033 mode->crtc_vtotal -= 1;
901 } 1034 }
902 break; 1035 break;
903 case 2: 1036 case 2:
@@ -906,17 +1039,36 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
906 return false; 1039 return false;
907 1040
908 dtd_timings = &tv_info_v1_2->aModeTimings[index]; 1041 dtd_timings = &tv_info_v1_2->aModeTimings[index];
909 crtc_timing->usH_Total = le16_to_cpu(dtd_timings->usHActive) + le16_to_cpu(dtd_timings->usHBlanking_Time); 1042 mode->crtc_htotal = le16_to_cpu(dtd_timings->usHActive) +
910 crtc_timing->usH_Disp = le16_to_cpu(dtd_timings->usHActive); 1043 le16_to_cpu(dtd_timings->usHBlanking_Time);
911 crtc_timing->usH_SyncStart = le16_to_cpu(dtd_timings->usHActive) + le16_to_cpu(dtd_timings->usHSyncOffset); 1044 mode->crtc_hdisplay = le16_to_cpu(dtd_timings->usHActive);
912 crtc_timing->usH_SyncWidth = le16_to_cpu(dtd_timings->usHSyncWidth); 1045 mode->crtc_hsync_start = le16_to_cpu(dtd_timings->usHActive) +
913 crtc_timing->usV_Total = le16_to_cpu(dtd_timings->usVActive) + le16_to_cpu(dtd_timings->usVBlanking_Time); 1046 le16_to_cpu(dtd_timings->usHSyncOffset);
914 crtc_timing->usV_Disp = le16_to_cpu(dtd_timings->usVActive); 1047 mode->crtc_hsync_end = mode->crtc_hsync_start +
915 crtc_timing->usV_SyncStart = le16_to_cpu(dtd_timings->usVActive) + le16_to_cpu(dtd_timings->usVSyncOffset); 1048 le16_to_cpu(dtd_timings->usHSyncWidth);
916 crtc_timing->usV_SyncWidth = le16_to_cpu(dtd_timings->usVSyncWidth); 1049
917 1050 mode->crtc_vtotal = le16_to_cpu(dtd_timings->usVActive) +
918 crtc_timing->susModeMiscInfo.usAccess = le16_to_cpu(dtd_timings->susModeMiscInfo.usAccess); 1051 le16_to_cpu(dtd_timings->usVBlanking_Time);
919 *pixel_clock = le16_to_cpu(dtd_timings->usPixClk) * 10; 1052 mode->crtc_vdisplay = le16_to_cpu(dtd_timings->usVActive);
1053 mode->crtc_vsync_start = le16_to_cpu(dtd_timings->usVActive) +
1054 le16_to_cpu(dtd_timings->usVSyncOffset);
1055 mode->crtc_vsync_end = mode->crtc_vsync_start +
1056 le16_to_cpu(dtd_timings->usVSyncWidth);
1057
1058 mode->flags = 0;
1059 misc = le16_to_cpu(dtd_timings->susModeMiscInfo.usAccess);
1060 if (misc & ATOM_VSYNC_POLARITY)
1061 mode->flags |= DRM_MODE_FLAG_NVSYNC;
1062 if (misc & ATOM_HSYNC_POLARITY)
1063 mode->flags |= DRM_MODE_FLAG_NHSYNC;
1064 if (misc & ATOM_COMPOSITESYNC)
1065 mode->flags |= DRM_MODE_FLAG_CSYNC;
1066 if (misc & ATOM_INTERLACE)
1067 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1068 if (misc & ATOM_DOUBLE_CLOCK_MODE)
1069 mode->flags |= DRM_MODE_FLAG_DBLSCAN;
1070
1071 mode->clock = le16_to_cpu(dtd_timings->usPixClk) * 10;
920 break; 1072 break;
921 } 1073 }
922 return true; 1074 return true;
@@ -981,6 +1133,24 @@ void radeon_atom_static_pwrmgt_setup(struct radeon_device *rdev, int enable)
981 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 1133 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
982} 1134}
983 1135
1136uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev)
1137{
1138 GET_ENGINE_CLOCK_PS_ALLOCATION args;
1139 int index = GetIndexIntoMasterTable(COMMAND, GetEngineClock);
1140
1141 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
1142 return args.ulReturnEngineClock;
1143}
1144
1145uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev)
1146{
1147 GET_MEMORY_CLOCK_PS_ALLOCATION args;
1148 int index = GetIndexIntoMasterTable(COMMAND, GetMemoryClock);
1149
1150 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
1151 return args.ulReturnMemoryClock;
1152}
1153
984void radeon_atom_set_engine_clock(struct radeon_device *rdev, 1154void radeon_atom_set_engine_clock(struct radeon_device *rdev,
985 uint32_t eng_clock) 1155 uint32_t eng_clock)
986{ 1156{
diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c b/drivers/gpu/drm/radeon/radeon_benchmark.c
index 2e938f7496fb..10bd50a7db87 100644
--- a/drivers/gpu/drm/radeon/radeon_benchmark.c
+++ b/drivers/gpu/drm/radeon/radeon_benchmark.c
@@ -63,7 +63,7 @@ void radeon_benchmark_move(struct radeon_device *rdev, unsigned bsize,
63 if (r) { 63 if (r) {
64 goto out_cleanup; 64 goto out_cleanup;
65 } 65 }
66 r = radeon_copy_dma(rdev, saddr, daddr, size / 4096, fence); 66 r = radeon_copy_dma(rdev, saddr, daddr, size / RADEON_GPU_PAGE_SIZE, fence);
67 if (r) { 67 if (r) {
68 goto out_cleanup; 68 goto out_cleanup;
69 } 69 }
@@ -88,7 +88,7 @@ void radeon_benchmark_move(struct radeon_device *rdev, unsigned bsize,
88 if (r) { 88 if (r) {
89 goto out_cleanup; 89 goto out_cleanup;
90 } 90 }
91 r = radeon_copy_blit(rdev, saddr, daddr, size / 4096, fence); 91 r = radeon_copy_blit(rdev, saddr, daddr, size / RADEON_GPU_PAGE_SIZE, fence);
92 if (r) { 92 if (r) {
93 goto out_cleanup; 93 goto out_cleanup;
94 } 94 }
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c
index 34a9b9119518..906921740c60 100644
--- a/drivers/gpu/drm/radeon/radeon_bios.c
+++ b/drivers/gpu/drm/radeon/radeon_bios.c
@@ -50,19 +50,16 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev)
50 vram_base = drm_get_resource_start(rdev->ddev, 0); 50 vram_base = drm_get_resource_start(rdev->ddev, 0);
51 bios = ioremap(vram_base, size); 51 bios = ioremap(vram_base, size);
52 if (!bios) { 52 if (!bios) {
53 DRM_ERROR("Unable to mmap vram\n");
54 return false; 53 return false;
55 } 54 }
56 55
57 if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) { 56 if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) {
58 iounmap(bios); 57 iounmap(bios);
59 DRM_ERROR("bad rom signature\n");
60 return false; 58 return false;
61 } 59 }
62 rdev->bios = kmalloc(size, GFP_KERNEL); 60 rdev->bios = kmalloc(size, GFP_KERNEL);
63 if (rdev->bios == NULL) { 61 if (rdev->bios == NULL) {
64 iounmap(bios); 62 iounmap(bios);
65 DRM_ERROR("kmalloc failed\n");
66 return false; 63 return false;
67 } 64 }
68 memcpy(rdev->bios, bios, size); 65 memcpy(rdev->bios, bios, size);
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c
index f5c32a766b10..a81354167621 100644
--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -32,7 +32,7 @@
32#include "atom.h" 32#include "atom.h"
33 33
34/* 10 khz */ 34/* 10 khz */
35static uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev) 35uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev)
36{ 36{
37 struct radeon_pll *spll = &rdev->clock.spll; 37 struct radeon_pll *spll = &rdev->clock.spll;
38 uint32_t fb_div, ref_div, post_div, sclk; 38 uint32_t fb_div, ref_div, post_div, sclk;
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 748265a105b3..5253cbf6db1f 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -49,7 +49,8 @@ radeon_add_legacy_connector(struct drm_device *dev,
49 uint32_t connector_id, 49 uint32_t connector_id,
50 uint32_t supported_device, 50 uint32_t supported_device,
51 int connector_type, 51 int connector_type,
52 struct radeon_i2c_bus_rec *i2c_bus); 52 struct radeon_i2c_bus_rec *i2c_bus,
53 uint16_t connector_object_id);
53 54
54/* from radeon_legacy_encoder.c */ 55/* from radeon_legacy_encoder.c */
55extern void 56extern void
@@ -808,25 +809,25 @@ static struct radeon_encoder_lvds *radeon_legacy_get_lvds_info_from_regs(struct
808 lvds->panel_blon_delay = (lvds_ss_gen_cntl >> RADEON_LVDS_PWRSEQ_DELAY2_SHIFT) & 0xf; 809 lvds->panel_blon_delay = (lvds_ss_gen_cntl >> RADEON_LVDS_PWRSEQ_DELAY2_SHIFT) & 0xf;
809 810
810 if (fp_vert_stretch & RADEON_VERT_STRETCH_ENABLE) 811 if (fp_vert_stretch & RADEON_VERT_STRETCH_ENABLE)
811 lvds->native_mode.panel_yres = 812 lvds->native_mode.vdisplay =
812 ((fp_vert_stretch & RADEON_VERT_PANEL_SIZE) >> 813 ((fp_vert_stretch & RADEON_VERT_PANEL_SIZE) >>
813 RADEON_VERT_PANEL_SHIFT) + 1; 814 RADEON_VERT_PANEL_SHIFT) + 1;
814 else 815 else
815 lvds->native_mode.panel_yres = 816 lvds->native_mode.vdisplay =
816 (RREG32(RADEON_CRTC_V_TOTAL_DISP) >> 16) + 1; 817 (RREG32(RADEON_CRTC_V_TOTAL_DISP) >> 16) + 1;
817 818
818 if (fp_horz_stretch & RADEON_HORZ_STRETCH_ENABLE) 819 if (fp_horz_stretch & RADEON_HORZ_STRETCH_ENABLE)
819 lvds->native_mode.panel_xres = 820 lvds->native_mode.hdisplay =
820 (((fp_horz_stretch & RADEON_HORZ_PANEL_SIZE) >> 821 (((fp_horz_stretch & RADEON_HORZ_PANEL_SIZE) >>
821 RADEON_HORZ_PANEL_SHIFT) + 1) * 8; 822 RADEON_HORZ_PANEL_SHIFT) + 1) * 8;
822 else 823 else
823 lvds->native_mode.panel_xres = 824 lvds->native_mode.hdisplay =
824 ((RREG32(RADEON_CRTC_H_TOTAL_DISP) >> 16) + 1) * 8; 825 ((RREG32(RADEON_CRTC_H_TOTAL_DISP) >> 16) + 1) * 8;
825 826
826 if ((lvds->native_mode.panel_xres < 640) || 827 if ((lvds->native_mode.hdisplay < 640) ||
827 (lvds->native_mode.panel_yres < 480)) { 828 (lvds->native_mode.vdisplay < 480)) {
828 lvds->native_mode.panel_xres = 640; 829 lvds->native_mode.hdisplay = 640;
829 lvds->native_mode.panel_yres = 480; 830 lvds->native_mode.vdisplay = 480;
830 } 831 }
831 832
832 ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3; 833 ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3;
@@ -846,8 +847,8 @@ static struct radeon_encoder_lvds *radeon_legacy_get_lvds_info_from_regs(struct
846 lvds->panel_vcc_delay = 200; 847 lvds->panel_vcc_delay = 200;
847 848
848 DRM_INFO("Panel info derived from registers\n"); 849 DRM_INFO("Panel info derived from registers\n");
849 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.panel_xres, 850 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay,
850 lvds->native_mode.panel_yres); 851 lvds->native_mode.vdisplay);
851 852
852 return lvds; 853 return lvds;
853} 854}
@@ -882,11 +883,11 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder
882 883
883 DRM_INFO("Panel ID String: %s\n", stmp); 884 DRM_INFO("Panel ID String: %s\n", stmp);
884 885
885 lvds->native_mode.panel_xres = RBIOS16(lcd_info + 0x19); 886 lvds->native_mode.hdisplay = RBIOS16(lcd_info + 0x19);
886 lvds->native_mode.panel_yres = RBIOS16(lcd_info + 0x1b); 887 lvds->native_mode.vdisplay = RBIOS16(lcd_info + 0x1b);
887 888
888 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.panel_xres, 889 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay,
889 lvds->native_mode.panel_yres); 890 lvds->native_mode.vdisplay);
890 891
891 lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c); 892 lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c);
892 if (lvds->panel_vcc_delay > 2000 || lvds->panel_vcc_delay < 0) 893 if (lvds->panel_vcc_delay > 2000 || lvds->panel_vcc_delay < 0)
@@ -944,27 +945,25 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder
944 if (tmp == 0) 945 if (tmp == 0)
945 break; 946 break;
946 947
947 if ((RBIOS16(tmp) == lvds->native_mode.panel_xres) && 948 if ((RBIOS16(tmp) == lvds->native_mode.hdisplay) &&
948 (RBIOS16(tmp + 2) == 949 (RBIOS16(tmp + 2) ==
949 lvds->native_mode.panel_yres)) { 950 lvds->native_mode.vdisplay)) {
950 lvds->native_mode.hblank = 951 lvds->native_mode.htotal = RBIOS16(tmp + 17) * 8;
951 (RBIOS16(tmp + 17) - RBIOS16(tmp + 19)) * 8; 952 lvds->native_mode.hsync_start = RBIOS16(tmp + 21) * 8;
952 lvds->native_mode.hoverplus = 953 lvds->native_mode.hsync_end = (RBIOS8(tmp + 23) +
953 (RBIOS16(tmp + 21) - RBIOS16(tmp + 19) - 954 RBIOS16(tmp + 21)) * 8;
954 1) * 8; 955
955 lvds->native_mode.hsync_width = 956 lvds->native_mode.vtotal = RBIOS16(tmp + 24);
956 RBIOS8(tmp + 23) * 8; 957 lvds->native_mode.vsync_start = RBIOS16(tmp + 28) & 0x7ff;
957 958 lvds->native_mode.vsync_end =
958 lvds->native_mode.vblank = (RBIOS16(tmp + 24) - 959 ((RBIOS16(tmp + 28) & 0xf800) >> 11) +
959 RBIOS16(tmp + 26)); 960 (RBIOS16(tmp + 28) & 0x7ff);
960 lvds->native_mode.voverplus = 961
961 ((RBIOS16(tmp + 28) & 0x7ff) - 962 lvds->native_mode.clock = RBIOS16(tmp + 9) * 10;
962 RBIOS16(tmp + 26));
963 lvds->native_mode.vsync_width =
964 ((RBIOS16(tmp + 28) & 0xf800) >> 11);
965 lvds->native_mode.dotclock =
966 RBIOS16(tmp + 9) * 10;
967 lvds->native_mode.flags = 0; 963 lvds->native_mode.flags = 0;
964 /* set crtc values */
965 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V);
966
968 } 967 }
969 } 968 }
970 } else { 969 } else {
@@ -1178,7 +1177,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1178 radeon_add_legacy_connector(dev, 0, 1177 radeon_add_legacy_connector(dev, 0,
1179 ATOM_DEVICE_CRT1_SUPPORT, 1178 ATOM_DEVICE_CRT1_SUPPORT,
1180 DRM_MODE_CONNECTOR_VGA, 1179 DRM_MODE_CONNECTOR_VGA,
1181 &ddc_i2c); 1180 &ddc_i2c,
1181 CONNECTOR_OBJECT_ID_VGA);
1182 } else if (rdev->flags & RADEON_IS_MOBILITY) { 1182 } else if (rdev->flags & RADEON_IS_MOBILITY) {
1183 /* LVDS */ 1183 /* LVDS */
1184 ddc_i2c = combios_setup_i2c_bus(RADEON_LCD_GPIO_MASK); 1184 ddc_i2c = combios_setup_i2c_bus(RADEON_LCD_GPIO_MASK);
@@ -1190,7 +1190,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1190 radeon_add_legacy_connector(dev, 0, 1190 radeon_add_legacy_connector(dev, 0,
1191 ATOM_DEVICE_LCD1_SUPPORT, 1191 ATOM_DEVICE_LCD1_SUPPORT,
1192 DRM_MODE_CONNECTOR_LVDS, 1192 DRM_MODE_CONNECTOR_LVDS,
1193 &ddc_i2c); 1193 &ddc_i2c,
1194 CONNECTOR_OBJECT_ID_LVDS);
1194 1195
1195 /* VGA - primary dac */ 1196 /* VGA - primary dac */
1196 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1197 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
@@ -1202,7 +1203,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1202 radeon_add_legacy_connector(dev, 1, 1203 radeon_add_legacy_connector(dev, 1,
1203 ATOM_DEVICE_CRT1_SUPPORT, 1204 ATOM_DEVICE_CRT1_SUPPORT,
1204 DRM_MODE_CONNECTOR_VGA, 1205 DRM_MODE_CONNECTOR_VGA,
1205 &ddc_i2c); 1206 &ddc_i2c,
1207 CONNECTOR_OBJECT_ID_VGA);
1206 } else { 1208 } else {
1207 /* DVI-I - tv dac, int tmds */ 1209 /* DVI-I - tv dac, int tmds */
1208 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 1210 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
@@ -1220,7 +1222,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1220 ATOM_DEVICE_DFP1_SUPPORT | 1222 ATOM_DEVICE_DFP1_SUPPORT |
1221 ATOM_DEVICE_CRT2_SUPPORT, 1223 ATOM_DEVICE_CRT2_SUPPORT,
1222 DRM_MODE_CONNECTOR_DVII, 1224 DRM_MODE_CONNECTOR_DVII,
1223 &ddc_i2c); 1225 &ddc_i2c,
1226 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
1224 1227
1225 /* VGA - primary dac */ 1228 /* VGA - primary dac */
1226 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1229 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
@@ -1232,7 +1235,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1232 radeon_add_legacy_connector(dev, 1, 1235 radeon_add_legacy_connector(dev, 1,
1233 ATOM_DEVICE_CRT1_SUPPORT, 1236 ATOM_DEVICE_CRT1_SUPPORT,
1234 DRM_MODE_CONNECTOR_VGA, 1237 DRM_MODE_CONNECTOR_VGA,
1235 &ddc_i2c); 1238 &ddc_i2c,
1239 CONNECTOR_OBJECT_ID_VGA);
1236 } 1240 }
1237 1241
1238 if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { 1242 if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) {
@@ -1245,7 +1249,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1245 radeon_add_legacy_connector(dev, 2, 1249 radeon_add_legacy_connector(dev, 2,
1246 ATOM_DEVICE_TV1_SUPPORT, 1250 ATOM_DEVICE_TV1_SUPPORT,
1247 DRM_MODE_CONNECTOR_SVIDEO, 1251 DRM_MODE_CONNECTOR_SVIDEO,
1248 &ddc_i2c); 1252 &ddc_i2c,
1253 CONNECTOR_OBJECT_ID_SVIDEO);
1249 } 1254 }
1250 break; 1255 break;
1251 case CT_IBOOK: 1256 case CT_IBOOK:
@@ -1259,7 +1264,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1259 0), 1264 0),
1260 ATOM_DEVICE_LCD1_SUPPORT); 1265 ATOM_DEVICE_LCD1_SUPPORT);
1261 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, 1266 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
1262 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); 1267 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
1268 CONNECTOR_OBJECT_ID_LVDS);
1263 /* VGA - TV DAC */ 1269 /* VGA - TV DAC */
1264 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1270 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
1265 radeon_add_legacy_encoder(dev, 1271 radeon_add_legacy_encoder(dev,
@@ -1268,7 +1274,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1268 2), 1274 2),
1269 ATOM_DEVICE_CRT2_SUPPORT); 1275 ATOM_DEVICE_CRT2_SUPPORT);
1270 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, 1276 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
1271 DRM_MODE_CONNECTOR_VGA, &ddc_i2c); 1277 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1278 CONNECTOR_OBJECT_ID_VGA);
1272 /* TV - TV DAC */ 1279 /* TV - TV DAC */
1273 radeon_add_legacy_encoder(dev, 1280 radeon_add_legacy_encoder(dev,
1274 radeon_get_encoder_id(dev, 1281 radeon_get_encoder_id(dev,
@@ -1277,7 +1284,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1277 ATOM_DEVICE_TV1_SUPPORT); 1284 ATOM_DEVICE_TV1_SUPPORT);
1278 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1285 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1279 DRM_MODE_CONNECTOR_SVIDEO, 1286 DRM_MODE_CONNECTOR_SVIDEO,
1280 &ddc_i2c); 1287 &ddc_i2c,
1288 CONNECTOR_OBJECT_ID_SVIDEO);
1281 break; 1289 break;
1282 case CT_POWERBOOK_EXTERNAL: 1290 case CT_POWERBOOK_EXTERNAL:
1283 DRM_INFO("Connector Table: %d (powerbook external tmds)\n", 1291 DRM_INFO("Connector Table: %d (powerbook external tmds)\n",
@@ -1290,7 +1298,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1290 0), 1298 0),
1291 ATOM_DEVICE_LCD1_SUPPORT); 1299 ATOM_DEVICE_LCD1_SUPPORT);
1292 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, 1300 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
1293 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); 1301 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
1302 CONNECTOR_OBJECT_ID_LVDS);
1294 /* DVI-I - primary dac, ext tmds */ 1303 /* DVI-I - primary dac, ext tmds */
1295 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1304 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
1296 radeon_add_legacy_encoder(dev, 1305 radeon_add_legacy_encoder(dev,
@@ -1303,10 +1312,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1303 ATOM_DEVICE_CRT1_SUPPORT, 1312 ATOM_DEVICE_CRT1_SUPPORT,
1304 1), 1313 1),
1305 ATOM_DEVICE_CRT1_SUPPORT); 1314 ATOM_DEVICE_CRT1_SUPPORT);
1315 /* XXX some are SL */
1306 radeon_add_legacy_connector(dev, 1, 1316 radeon_add_legacy_connector(dev, 1,
1307 ATOM_DEVICE_DFP2_SUPPORT | 1317 ATOM_DEVICE_DFP2_SUPPORT |
1308 ATOM_DEVICE_CRT1_SUPPORT, 1318 ATOM_DEVICE_CRT1_SUPPORT,
1309 DRM_MODE_CONNECTOR_DVII, &ddc_i2c); 1319 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
1320 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I);
1310 /* TV - TV DAC */ 1321 /* TV - TV DAC */
1311 radeon_add_legacy_encoder(dev, 1322 radeon_add_legacy_encoder(dev,
1312 radeon_get_encoder_id(dev, 1323 radeon_get_encoder_id(dev,
@@ -1315,7 +1326,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1315 ATOM_DEVICE_TV1_SUPPORT); 1326 ATOM_DEVICE_TV1_SUPPORT);
1316 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1327 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1317 DRM_MODE_CONNECTOR_SVIDEO, 1328 DRM_MODE_CONNECTOR_SVIDEO,
1318 &ddc_i2c); 1329 &ddc_i2c,
1330 CONNECTOR_OBJECT_ID_SVIDEO);
1319 break; 1331 break;
1320 case CT_POWERBOOK_INTERNAL: 1332 case CT_POWERBOOK_INTERNAL:
1321 DRM_INFO("Connector Table: %d (powerbook internal tmds)\n", 1333 DRM_INFO("Connector Table: %d (powerbook internal tmds)\n",
@@ -1328,7 +1340,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1328 0), 1340 0),
1329 ATOM_DEVICE_LCD1_SUPPORT); 1341 ATOM_DEVICE_LCD1_SUPPORT);
1330 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, 1342 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
1331 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); 1343 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
1344 CONNECTOR_OBJECT_ID_LVDS);
1332 /* DVI-I - primary dac, int tmds */ 1345 /* DVI-I - primary dac, int tmds */
1333 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1346 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
1334 radeon_add_legacy_encoder(dev, 1347 radeon_add_legacy_encoder(dev,
@@ -1344,7 +1357,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1344 radeon_add_legacy_connector(dev, 1, 1357 radeon_add_legacy_connector(dev, 1,
1345 ATOM_DEVICE_DFP1_SUPPORT | 1358 ATOM_DEVICE_DFP1_SUPPORT |
1346 ATOM_DEVICE_CRT1_SUPPORT, 1359 ATOM_DEVICE_CRT1_SUPPORT,
1347 DRM_MODE_CONNECTOR_DVII, &ddc_i2c); 1360 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
1361 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
1348 /* TV - TV DAC */ 1362 /* TV - TV DAC */
1349 radeon_add_legacy_encoder(dev, 1363 radeon_add_legacy_encoder(dev,
1350 radeon_get_encoder_id(dev, 1364 radeon_get_encoder_id(dev,
@@ -1353,7 +1367,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1353 ATOM_DEVICE_TV1_SUPPORT); 1367 ATOM_DEVICE_TV1_SUPPORT);
1354 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1368 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1355 DRM_MODE_CONNECTOR_SVIDEO, 1369 DRM_MODE_CONNECTOR_SVIDEO,
1356 &ddc_i2c); 1370 &ddc_i2c,
1371 CONNECTOR_OBJECT_ID_SVIDEO);
1357 break; 1372 break;
1358 case CT_POWERBOOK_VGA: 1373 case CT_POWERBOOK_VGA:
1359 DRM_INFO("Connector Table: %d (powerbook vga)\n", 1374 DRM_INFO("Connector Table: %d (powerbook vga)\n",
@@ -1366,7 +1381,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1366 0), 1381 0),
1367 ATOM_DEVICE_LCD1_SUPPORT); 1382 ATOM_DEVICE_LCD1_SUPPORT);
1368 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, 1383 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
1369 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); 1384 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
1385 CONNECTOR_OBJECT_ID_LVDS);
1370 /* VGA - primary dac */ 1386 /* VGA - primary dac */
1371 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1387 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
1372 radeon_add_legacy_encoder(dev, 1388 radeon_add_legacy_encoder(dev,
@@ -1375,7 +1391,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1375 1), 1391 1),
1376 ATOM_DEVICE_CRT1_SUPPORT); 1392 ATOM_DEVICE_CRT1_SUPPORT);
1377 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT, 1393 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT,
1378 DRM_MODE_CONNECTOR_VGA, &ddc_i2c); 1394 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1395 CONNECTOR_OBJECT_ID_VGA);
1379 /* TV - TV DAC */ 1396 /* TV - TV DAC */
1380 radeon_add_legacy_encoder(dev, 1397 radeon_add_legacy_encoder(dev,
1381 radeon_get_encoder_id(dev, 1398 radeon_get_encoder_id(dev,
@@ -1384,7 +1401,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1384 ATOM_DEVICE_TV1_SUPPORT); 1401 ATOM_DEVICE_TV1_SUPPORT);
1385 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1402 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1386 DRM_MODE_CONNECTOR_SVIDEO, 1403 DRM_MODE_CONNECTOR_SVIDEO,
1387 &ddc_i2c); 1404 &ddc_i2c,
1405 CONNECTOR_OBJECT_ID_SVIDEO);
1388 break; 1406 break;
1389 case CT_MINI_EXTERNAL: 1407 case CT_MINI_EXTERNAL:
1390 DRM_INFO("Connector Table: %d (mini external tmds)\n", 1408 DRM_INFO("Connector Table: %d (mini external tmds)\n",
@@ -1401,10 +1419,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1401 ATOM_DEVICE_CRT2_SUPPORT, 1419 ATOM_DEVICE_CRT2_SUPPORT,
1402 2), 1420 2),
1403 ATOM_DEVICE_CRT2_SUPPORT); 1421 ATOM_DEVICE_CRT2_SUPPORT);
1422 /* XXX are any DL? */
1404 radeon_add_legacy_connector(dev, 0, 1423 radeon_add_legacy_connector(dev, 0,
1405 ATOM_DEVICE_DFP2_SUPPORT | 1424 ATOM_DEVICE_DFP2_SUPPORT |
1406 ATOM_DEVICE_CRT2_SUPPORT, 1425 ATOM_DEVICE_CRT2_SUPPORT,
1407 DRM_MODE_CONNECTOR_DVII, &ddc_i2c); 1426 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
1427 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
1408 /* TV - TV DAC */ 1428 /* TV - TV DAC */
1409 radeon_add_legacy_encoder(dev, 1429 radeon_add_legacy_encoder(dev,
1410 radeon_get_encoder_id(dev, 1430 radeon_get_encoder_id(dev,
@@ -1413,7 +1433,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1413 ATOM_DEVICE_TV1_SUPPORT); 1433 ATOM_DEVICE_TV1_SUPPORT);
1414 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, 1434 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT,
1415 DRM_MODE_CONNECTOR_SVIDEO, 1435 DRM_MODE_CONNECTOR_SVIDEO,
1416 &ddc_i2c); 1436 &ddc_i2c,
1437 CONNECTOR_OBJECT_ID_SVIDEO);
1417 break; 1438 break;
1418 case CT_MINI_INTERNAL: 1439 case CT_MINI_INTERNAL:
1419 DRM_INFO("Connector Table: %d (mini internal tmds)\n", 1440 DRM_INFO("Connector Table: %d (mini internal tmds)\n",
@@ -1433,7 +1454,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1433 radeon_add_legacy_connector(dev, 0, 1454 radeon_add_legacy_connector(dev, 0,
1434 ATOM_DEVICE_DFP1_SUPPORT | 1455 ATOM_DEVICE_DFP1_SUPPORT |
1435 ATOM_DEVICE_CRT2_SUPPORT, 1456 ATOM_DEVICE_CRT2_SUPPORT,
1436 DRM_MODE_CONNECTOR_DVII, &ddc_i2c); 1457 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
1458 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
1437 /* TV - TV DAC */ 1459 /* TV - TV DAC */
1438 radeon_add_legacy_encoder(dev, 1460 radeon_add_legacy_encoder(dev,
1439 radeon_get_encoder_id(dev, 1461 radeon_get_encoder_id(dev,
@@ -1442,7 +1464,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1442 ATOM_DEVICE_TV1_SUPPORT); 1464 ATOM_DEVICE_TV1_SUPPORT);
1443 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, 1465 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT,
1444 DRM_MODE_CONNECTOR_SVIDEO, 1466 DRM_MODE_CONNECTOR_SVIDEO,
1445 &ddc_i2c); 1467 &ddc_i2c,
1468 CONNECTOR_OBJECT_ID_SVIDEO);
1446 break; 1469 break;
1447 case CT_IMAC_G5_ISIGHT: 1470 case CT_IMAC_G5_ISIGHT:
1448 DRM_INFO("Connector Table: %d (imac g5 isight)\n", 1471 DRM_INFO("Connector Table: %d (imac g5 isight)\n",
@@ -1455,7 +1478,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1455 0), 1478 0),
1456 ATOM_DEVICE_DFP1_SUPPORT); 1479 ATOM_DEVICE_DFP1_SUPPORT);
1457 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT, 1480 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT,
1458 DRM_MODE_CONNECTOR_DVID, &ddc_i2c); 1481 DRM_MODE_CONNECTOR_DVID, &ddc_i2c,
1482 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D);
1459 /* VGA - tv dac */ 1483 /* VGA - tv dac */
1460 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 1484 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
1461 radeon_add_legacy_encoder(dev, 1485 radeon_add_legacy_encoder(dev,
@@ -1464,7 +1488,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1464 2), 1488 2),
1465 ATOM_DEVICE_CRT2_SUPPORT); 1489 ATOM_DEVICE_CRT2_SUPPORT);
1466 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, 1490 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
1467 DRM_MODE_CONNECTOR_VGA, &ddc_i2c); 1491 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1492 CONNECTOR_OBJECT_ID_VGA);
1468 /* TV - TV DAC */ 1493 /* TV - TV DAC */
1469 radeon_add_legacy_encoder(dev, 1494 radeon_add_legacy_encoder(dev,
1470 radeon_get_encoder_id(dev, 1495 radeon_get_encoder_id(dev,
@@ -1473,7 +1498,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1473 ATOM_DEVICE_TV1_SUPPORT); 1498 ATOM_DEVICE_TV1_SUPPORT);
1474 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1499 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1475 DRM_MODE_CONNECTOR_SVIDEO, 1500 DRM_MODE_CONNECTOR_SVIDEO,
1476 &ddc_i2c); 1501 &ddc_i2c,
1502 CONNECTOR_OBJECT_ID_SVIDEO);
1477 break; 1503 break;
1478 case CT_EMAC: 1504 case CT_EMAC:
1479 DRM_INFO("Connector Table: %d (emac)\n", 1505 DRM_INFO("Connector Table: %d (emac)\n",
@@ -1486,7 +1512,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1486 1), 1512 1),
1487 ATOM_DEVICE_CRT1_SUPPORT); 1513 ATOM_DEVICE_CRT1_SUPPORT);
1488 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT, 1514 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT,
1489 DRM_MODE_CONNECTOR_VGA, &ddc_i2c); 1515 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1516 CONNECTOR_OBJECT_ID_VGA);
1490 /* VGA - tv dac */ 1517 /* VGA - tv dac */
1491 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 1518 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC);
1492 radeon_add_legacy_encoder(dev, 1519 radeon_add_legacy_encoder(dev,
@@ -1495,7 +1522,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1495 2), 1522 2),
1496 ATOM_DEVICE_CRT2_SUPPORT); 1523 ATOM_DEVICE_CRT2_SUPPORT);
1497 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, 1524 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
1498 DRM_MODE_CONNECTOR_VGA, &ddc_i2c); 1525 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1526 CONNECTOR_OBJECT_ID_VGA);
1499 /* TV - TV DAC */ 1527 /* TV - TV DAC */
1500 radeon_add_legacy_encoder(dev, 1528 radeon_add_legacy_encoder(dev,
1501 radeon_get_encoder_id(dev, 1529 radeon_get_encoder_id(dev,
@@ -1504,7 +1532,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1504 ATOM_DEVICE_TV1_SUPPORT); 1532 ATOM_DEVICE_TV1_SUPPORT);
1505 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1533 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1506 DRM_MODE_CONNECTOR_SVIDEO, 1534 DRM_MODE_CONNECTOR_SVIDEO,
1507 &ddc_i2c); 1535 &ddc_i2c,
1536 CONNECTOR_OBJECT_ID_SVIDEO);
1508 break; 1537 break;
1509 default: 1538 default:
1510 DRM_INFO("Connector table: %d (invalid)\n", 1539 DRM_INFO("Connector table: %d (invalid)\n",
@@ -1581,11 +1610,63 @@ static bool radeon_apply_legacy_quirks(struct drm_device *dev,
1581 return true; 1610 return true;
1582} 1611}
1583 1612
1613static bool radeon_apply_legacy_tv_quirks(struct drm_device *dev)
1614{
1615 /* Acer 5102 has non-existent TV port */
1616 if (dev->pdev->device == 0x5975 &&
1617 dev->pdev->subsystem_vendor == 0x1025 &&
1618 dev->pdev->subsystem_device == 0x009f)
1619 return false;
1620
1621 /* HP dc5750 has non-existent TV port */
1622 if (dev->pdev->device == 0x5974 &&
1623 dev->pdev->subsystem_vendor == 0x103c &&
1624 dev->pdev->subsystem_device == 0x280a)
1625 return false;
1626
1627 return true;
1628}
1629
1630static uint16_t combios_check_dl_dvi(struct drm_device *dev, int is_dvi_d)
1631{
1632 struct radeon_device *rdev = dev->dev_private;
1633 uint32_t ext_tmds_info;
1634
1635 if (rdev->flags & RADEON_IS_IGP) {
1636 if (is_dvi_d)
1637 return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D;
1638 else
1639 return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I;
1640 }
1641 ext_tmds_info = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE);
1642 if (ext_tmds_info) {
1643 uint8_t rev = RBIOS8(ext_tmds_info);
1644 uint8_t flags = RBIOS8(ext_tmds_info + 4 + 5);
1645 if (rev >= 3) {
1646 if (is_dvi_d)
1647 return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D;
1648 else
1649 return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I;
1650 } else {
1651 if (flags & 1) {
1652 if (is_dvi_d)
1653 return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D;
1654 else
1655 return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I;
1656 }
1657 }
1658 }
1659 if (is_dvi_d)
1660 return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D;
1661 else
1662 return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I;
1663}
1664
1584bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) 1665bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1585{ 1666{
1586 struct radeon_device *rdev = dev->dev_private; 1667 struct radeon_device *rdev = dev->dev_private;
1587 uint32_t conn_info, entry, devices; 1668 uint32_t conn_info, entry, devices;
1588 uint16_t tmp; 1669 uint16_t tmp, connector_object_id;
1589 enum radeon_combios_ddc ddc_type; 1670 enum radeon_combios_ddc ddc_type;
1590 enum radeon_combios_connector connector; 1671 enum radeon_combios_connector connector;
1591 int i = 0; 1672 int i = 0;
@@ -1628,8 +1709,9 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1628 break; 1709 break;
1629 } 1710 }
1630 1711
1631 radeon_apply_legacy_quirks(dev, i, &connector, 1712 if (!radeon_apply_legacy_quirks(dev, i, &connector,
1632 &ddc_i2c); 1713 &ddc_i2c))
1714 continue;
1633 1715
1634 switch (connector) { 1716 switch (connector) {
1635 case CONNECTOR_PROPRIETARY_LEGACY: 1717 case CONNECTOR_PROPRIETARY_LEGACY:
@@ -1644,7 +1726,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1644 radeon_add_legacy_connector(dev, i, devices, 1726 radeon_add_legacy_connector(dev, i, devices,
1645 legacy_connector_convert 1727 legacy_connector_convert
1646 [connector], 1728 [connector],
1647 &ddc_i2c); 1729 &ddc_i2c,
1730 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D);
1648 break; 1731 break;
1649 case CONNECTOR_CRT_LEGACY: 1732 case CONNECTOR_CRT_LEGACY:
1650 if (tmp & 0x1) { 1733 if (tmp & 0x1) {
@@ -1669,7 +1752,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1669 devices, 1752 devices,
1670 legacy_connector_convert 1753 legacy_connector_convert
1671 [connector], 1754 [connector],
1672 &ddc_i2c); 1755 &ddc_i2c,
1756 CONNECTOR_OBJECT_ID_VGA);
1673 break; 1757 break;
1674 case CONNECTOR_DVI_I_LEGACY: 1758 case CONNECTOR_DVI_I_LEGACY:
1675 devices = 0; 1759 devices = 0;
@@ -1698,6 +1782,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1698 ATOM_DEVICE_DFP2_SUPPORT, 1782 ATOM_DEVICE_DFP2_SUPPORT,
1699 0), 1783 0),
1700 ATOM_DEVICE_DFP2_SUPPORT); 1784 ATOM_DEVICE_DFP2_SUPPORT);
1785 connector_object_id = combios_check_dl_dvi(dev, 0);
1701 } else { 1786 } else {
1702 devices |= ATOM_DEVICE_DFP1_SUPPORT; 1787 devices |= ATOM_DEVICE_DFP1_SUPPORT;
1703 radeon_add_legacy_encoder(dev, 1788 radeon_add_legacy_encoder(dev,
@@ -1706,19 +1791,24 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1706 ATOM_DEVICE_DFP1_SUPPORT, 1791 ATOM_DEVICE_DFP1_SUPPORT,
1707 0), 1792 0),
1708 ATOM_DEVICE_DFP1_SUPPORT); 1793 ATOM_DEVICE_DFP1_SUPPORT);
1794 connector_object_id = CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I;
1709 } 1795 }
1710 radeon_add_legacy_connector(dev, 1796 radeon_add_legacy_connector(dev,
1711 i, 1797 i,
1712 devices, 1798 devices,
1713 legacy_connector_convert 1799 legacy_connector_convert
1714 [connector], 1800 [connector],
1715 &ddc_i2c); 1801 &ddc_i2c,
1802 connector_object_id);
1716 break; 1803 break;
1717 case CONNECTOR_DVI_D_LEGACY: 1804 case CONNECTOR_DVI_D_LEGACY:
1718 if ((tmp >> 4) & 0x1) 1805 if ((tmp >> 4) & 0x1) {
1719 devices = ATOM_DEVICE_DFP2_SUPPORT; 1806 devices = ATOM_DEVICE_DFP2_SUPPORT;
1720 else 1807 connector_object_id = combios_check_dl_dvi(dev, 1);
1808 } else {
1721 devices = ATOM_DEVICE_DFP1_SUPPORT; 1809 devices = ATOM_DEVICE_DFP1_SUPPORT;
1810 connector_object_id = CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I;
1811 }
1722 radeon_add_legacy_encoder(dev, 1812 radeon_add_legacy_encoder(dev,
1723 radeon_get_encoder_id 1813 radeon_get_encoder_id
1724 (dev, devices, 0), 1814 (dev, devices, 0),
@@ -1726,7 +1816,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1726 radeon_add_legacy_connector(dev, i, devices, 1816 radeon_add_legacy_connector(dev, i, devices,
1727 legacy_connector_convert 1817 legacy_connector_convert
1728 [connector], 1818 [connector],
1729 &ddc_i2c); 1819 &ddc_i2c,
1820 connector_object_id);
1730 break; 1821 break;
1731 case CONNECTOR_CTV_LEGACY: 1822 case CONNECTOR_CTV_LEGACY:
1732 case CONNECTOR_STV_LEGACY: 1823 case CONNECTOR_STV_LEGACY:
@@ -1740,7 +1831,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1740 ATOM_DEVICE_TV1_SUPPORT, 1831 ATOM_DEVICE_TV1_SUPPORT,
1741 legacy_connector_convert 1832 legacy_connector_convert
1742 [connector], 1833 [connector],
1743 &ddc_i2c); 1834 &ddc_i2c,
1835 CONNECTOR_OBJECT_ID_SVIDEO);
1744 break; 1836 break;
1745 default: 1837 default:
1746 DRM_ERROR("Unknown connector type: %d\n", 1838 DRM_ERROR("Unknown connector type: %d\n",
@@ -1772,10 +1864,29 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1772 ATOM_DEVICE_CRT1_SUPPORT | 1864 ATOM_DEVICE_CRT1_SUPPORT |
1773 ATOM_DEVICE_DFP1_SUPPORT, 1865 ATOM_DEVICE_DFP1_SUPPORT,
1774 DRM_MODE_CONNECTOR_DVII, 1866 DRM_MODE_CONNECTOR_DVII,
1775 &ddc_i2c); 1867 &ddc_i2c,
1868 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
1776 } else { 1869 } else {
1777 DRM_DEBUG("No connector info found\n"); 1870 uint16_t crt_info =
1778 return false; 1871 combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE);
1872 DRM_DEBUG("Found CRT table, assuming VGA connector\n");
1873 if (crt_info) {
1874 radeon_add_legacy_encoder(dev,
1875 radeon_get_encoder_id(dev,
1876 ATOM_DEVICE_CRT1_SUPPORT,
1877 1),
1878 ATOM_DEVICE_CRT1_SUPPORT);
1879 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
1880 radeon_add_legacy_connector(dev,
1881 0,
1882 ATOM_DEVICE_CRT1_SUPPORT,
1883 DRM_MODE_CONNECTOR_VGA,
1884 &ddc_i2c,
1885 CONNECTOR_OBJECT_ID_VGA);
1886 } else {
1887 DRM_DEBUG("No connector info found\n");
1888 return false;
1889 }
1779 } 1890 }
1780 } 1891 }
1781 1892
@@ -1870,7 +1981,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1870 5, 1981 5,
1871 ATOM_DEVICE_LCD1_SUPPORT, 1982 ATOM_DEVICE_LCD1_SUPPORT,
1872 DRM_MODE_CONNECTOR_LVDS, 1983 DRM_MODE_CONNECTOR_LVDS,
1873 &ddc_i2c); 1984 &ddc_i2c,
1985 CONNECTOR_OBJECT_ID_LVDS);
1874 } 1986 }
1875 } 1987 }
1876 1988
@@ -1880,16 +1992,19 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1880 combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); 1992 combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE);
1881 if (tv_info) { 1993 if (tv_info) {
1882 if (RBIOS8(tv_info + 6) == 'T') { 1994 if (RBIOS8(tv_info + 6) == 'T') {
1883 radeon_add_legacy_encoder(dev, 1995 if (radeon_apply_legacy_tv_quirks(dev)) {
1884 radeon_get_encoder_id 1996 radeon_add_legacy_encoder(dev,
1885 (dev, 1997 radeon_get_encoder_id
1886 ATOM_DEVICE_TV1_SUPPORT, 1998 (dev,
1887 2), 1999 ATOM_DEVICE_TV1_SUPPORT,
1888 ATOM_DEVICE_TV1_SUPPORT); 2000 2),
1889 radeon_add_legacy_connector(dev, 6, 2001 ATOM_DEVICE_TV1_SUPPORT);
1890 ATOM_DEVICE_TV1_SUPPORT, 2002 radeon_add_legacy_connector(dev, 6,
1891 DRM_MODE_CONNECTOR_SVIDEO, 2003 ATOM_DEVICE_TV1_SUPPORT,
1892 &ddc_i2c); 2004 DRM_MODE_CONNECTOR_SVIDEO,
2005 &ddc_i2c,
2006 CONNECTOR_OBJECT_ID_SVIDEO);
2007 }
1893 } 2008 }
1894 } 2009 }
1895 } 2010 }
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index e376be47a4a0..fce4c4087fda 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -178,25 +178,12 @@ static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encode
178 struct drm_device *dev = encoder->dev; 178 struct drm_device *dev = encoder->dev;
179 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 179 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
180 struct drm_display_mode *mode = NULL; 180 struct drm_display_mode *mode = NULL;
181 struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; 181 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
182
183 if (native_mode->panel_xres != 0 &&
184 native_mode->panel_yres != 0 &&
185 native_mode->dotclock != 0) {
186 mode = drm_mode_create(dev);
187
188 mode->hdisplay = native_mode->panel_xres;
189 mode->vdisplay = native_mode->panel_yres;
190
191 mode->htotal = mode->hdisplay + native_mode->hblank;
192 mode->hsync_start = mode->hdisplay + native_mode->hoverplus;
193 mode->hsync_end = mode->hsync_start + native_mode->hsync_width;
194 mode->vtotal = mode->vdisplay + native_mode->vblank;
195 mode->vsync_start = mode->vdisplay + native_mode->voverplus;
196 mode->vsync_end = mode->vsync_start + native_mode->vsync_width;
197 mode->clock = native_mode->dotclock;
198 mode->flags = 0;
199 182
183 if (native_mode->hdisplay != 0 &&
184 native_mode->vdisplay != 0 &&
185 native_mode->clock != 0) {
186 mode = drm_mode_duplicate(dev, native_mode);
200 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; 187 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
201 drm_mode_set_name(mode); 188 drm_mode_set_name(mode);
202 189
@@ -210,7 +197,7 @@ static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_conn
210 struct drm_device *dev = encoder->dev; 197 struct drm_device *dev = encoder->dev;
211 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 198 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
212 struct drm_display_mode *mode = NULL; 199 struct drm_display_mode *mode = NULL;
213 struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; 200 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
214 int i; 201 int i;
215 struct mode_size { 202 struct mode_size {
216 int w; 203 int w;
@@ -236,11 +223,16 @@ static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_conn
236 }; 223 };
237 224
238 for (i = 0; i < 17; i++) { 225 for (i = 0; i < 17; i++) {
226 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
227 if (common_modes[i].w > 1024 ||
228 common_modes[i].h > 768)
229 continue;
230 }
239 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 231 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
240 if (common_modes[i].w > native_mode->panel_xres || 232 if (common_modes[i].w > native_mode->hdisplay ||
241 common_modes[i].h > native_mode->panel_yres || 233 common_modes[i].h > native_mode->vdisplay ||
242 (common_modes[i].w == native_mode->panel_xres && 234 (common_modes[i].w == native_mode->hdisplay &&
243 common_modes[i].h == native_mode->panel_yres)) 235 common_modes[i].h == native_mode->vdisplay))
244 continue; 236 continue;
245 } 237 }
246 if (common_modes[i].w < 320 || common_modes[i].h < 200) 238 if (common_modes[i].w < 320 || common_modes[i].h < 200)
@@ -344,28 +336,23 @@ static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
344 struct drm_connector *connector) 336 struct drm_connector *connector)
345{ 337{
346 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 338 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
347 struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; 339 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
348 340
349 /* Try to get native mode details from EDID if necessary */ 341 /* Try to get native mode details from EDID if necessary */
350 if (!native_mode->dotclock) { 342 if (!native_mode->clock) {
351 struct drm_display_mode *t, *mode; 343 struct drm_display_mode *t, *mode;
352 344
353 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { 345 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
354 if (mode->hdisplay == native_mode->panel_xres && 346 if (mode->hdisplay == native_mode->hdisplay &&
355 mode->vdisplay == native_mode->panel_yres) { 347 mode->vdisplay == native_mode->vdisplay) {
356 native_mode->hblank = mode->htotal - mode->hdisplay; 348 *native_mode = *mode;
357 native_mode->hoverplus = mode->hsync_start - mode->hdisplay; 349 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
358 native_mode->hsync_width = mode->hsync_end - mode->hsync_start;
359 native_mode->vblank = mode->vtotal - mode->vdisplay;
360 native_mode->voverplus = mode->vsync_start - mode->vdisplay;
361 native_mode->vsync_width = mode->vsync_end - mode->vsync_start;
362 native_mode->dotclock = mode->clock;
363 DRM_INFO("Determined LVDS native mode details from EDID\n"); 350 DRM_INFO("Determined LVDS native mode details from EDID\n");
364 break; 351 break;
365 } 352 }
366 } 353 }
367 } 354 }
368 if (!native_mode->dotclock) { 355 if (!native_mode->clock) {
369 DRM_INFO("No LVDS native mode details, disabling RMX\n"); 356 DRM_INFO("No LVDS native mode details, disabling RMX\n");
370 radeon_encoder->rmx_type = RMX_OFF; 357 radeon_encoder->rmx_type = RMX_OFF;
371 } 358 }
@@ -410,13 +397,64 @@ static int radeon_lvds_get_modes(struct drm_connector *connector)
410static int radeon_lvds_mode_valid(struct drm_connector *connector, 397static int radeon_lvds_mode_valid(struct drm_connector *connector,
411 struct drm_display_mode *mode) 398 struct drm_display_mode *mode)
412{ 399{
400 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
401
402 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
403 return MODE_PANEL;
404
405 if (encoder) {
406 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
407 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
408
409 /* AVIVO hardware supports downscaling modes larger than the panel
410 * to the panel size, but I'm not sure this is desirable.
411 */
412 if ((mode->hdisplay > native_mode->hdisplay) ||
413 (mode->vdisplay > native_mode->vdisplay))
414 return MODE_PANEL;
415
416 /* if scaling is disabled, block non-native modes */
417 if (radeon_encoder->rmx_type == RMX_OFF) {
418 if ((mode->hdisplay != native_mode->hdisplay) ||
419 (mode->vdisplay != native_mode->vdisplay))
420 return MODE_PANEL;
421 }
422 }
423
413 return MODE_OK; 424 return MODE_OK;
414} 425}
415 426
416static enum drm_connector_status radeon_lvds_detect(struct drm_connector *connector) 427static enum drm_connector_status radeon_lvds_detect(struct drm_connector *connector)
417{ 428{
418 enum drm_connector_status ret = connector_status_connected; 429 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
430 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
431 enum drm_connector_status ret = connector_status_disconnected;
432
433 if (encoder) {
434 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
435 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
436
437 /* check if panel is valid */
438 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
439 ret = connector_status_connected;
440
441 }
442
443 /* check for edid as well */
444 if (radeon_connector->edid)
445 ret = connector_status_connected;
446 else {
447 if (radeon_connector->ddc_bus) {
448 radeon_i2c_do_lock(radeon_connector, 1);
449 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
450 &radeon_connector->ddc_bus->adapter);
451 radeon_i2c_do_lock(radeon_connector, 0);
452 if (radeon_connector->edid)
453 ret = connector_status_connected;
454 }
455 }
419 /* check acpi lid status ??? */ 456 /* check acpi lid status ??? */
457
420 radeon_connector_update_scratch_regs(connector, ret); 458 radeon_connector_update_scratch_regs(connector, ret);
421 return ret; 459 return ret;
422} 460}
@@ -427,6 +465,8 @@ static void radeon_connector_destroy(struct drm_connector *connector)
427 465
428 if (radeon_connector->ddc_bus) 466 if (radeon_connector->ddc_bus)
429 radeon_i2c_destroy(radeon_connector->ddc_bus); 467 radeon_i2c_destroy(radeon_connector->ddc_bus);
468 if (radeon_connector->edid)
469 kfree(radeon_connector->edid);
430 kfree(radeon_connector->con_priv); 470 kfree(radeon_connector->con_priv);
431 drm_sysfs_connector_remove(connector); 471 drm_sysfs_connector_remove(connector);
432 drm_connector_cleanup(connector); 472 drm_connector_cleanup(connector);
@@ -496,6 +536,8 @@ static int radeon_vga_get_modes(struct drm_connector *connector)
496static int radeon_vga_mode_valid(struct drm_connector *connector, 536static int radeon_vga_mode_valid(struct drm_connector *connector,
497 struct drm_display_mode *mode) 537 struct drm_display_mode *mode)
498{ 538{
539 /* XXX check mode bandwidth */
540 /* XXX verify against max DAC output frequency */
499 return MODE_OK; 541 return MODE_OK;
500} 542}
501 543
@@ -514,9 +556,32 @@ static enum drm_connector_status radeon_vga_detect(struct drm_connector *connect
514 radeon_i2c_do_lock(radeon_connector, 1); 556 radeon_i2c_do_lock(radeon_connector, 1);
515 dret = radeon_ddc_probe(radeon_connector); 557 dret = radeon_ddc_probe(radeon_connector);
516 radeon_i2c_do_lock(radeon_connector, 0); 558 radeon_i2c_do_lock(radeon_connector, 0);
517 if (dret) 559 if (dret) {
518 ret = connector_status_connected; 560 if (radeon_connector->edid) {
519 else { 561 kfree(radeon_connector->edid);
562 radeon_connector->edid = NULL;
563 }
564 radeon_i2c_do_lock(radeon_connector, 1);
565 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
566 radeon_i2c_do_lock(radeon_connector, 0);
567
568 if (!radeon_connector->edid) {
569 DRM_ERROR("DDC responded but not EDID found for %s\n",
570 drm_get_connector_name(connector));
571 } else {
572 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
573
574 /* some oems have boards with separate digital and analog connectors
575 * with a shared ddc line (often vga + hdmi)
576 */
577 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
578 kfree(radeon_connector->edid);
579 radeon_connector->edid = NULL;
580 ret = connector_status_disconnected;
581 } else
582 ret = connector_status_connected;
583 }
584 } else {
520 if (radeon_connector->dac_load_detect) { 585 if (radeon_connector->dac_load_detect) {
521 encoder_funcs = encoder->helper_private; 586 encoder_funcs = encoder->helper_private;
522 ret = encoder_funcs->detect(encoder, connector); 587 ret = encoder_funcs->detect(encoder, connector);
@@ -570,6 +635,8 @@ static int radeon_tv_get_modes(struct drm_connector *connector)
570static int radeon_tv_mode_valid(struct drm_connector *connector, 635static int radeon_tv_mode_valid(struct drm_connector *connector,
571 struct drm_display_mode *mode) 636 struct drm_display_mode *mode)
572{ 637{
638 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
639 return MODE_CLOCK_RANGE;
573 return MODE_OK; 640 return MODE_OK;
574} 641}
575 642
@@ -644,6 +711,10 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
644 dret = radeon_ddc_probe(radeon_connector); 711 dret = radeon_ddc_probe(radeon_connector);
645 radeon_i2c_do_lock(radeon_connector, 0); 712 radeon_i2c_do_lock(radeon_connector, 0);
646 if (dret) { 713 if (dret) {
714 if (radeon_connector->edid) {
715 kfree(radeon_connector->edid);
716 radeon_connector->edid = NULL;
717 }
647 radeon_i2c_do_lock(radeon_connector, 1); 718 radeon_i2c_do_lock(radeon_connector, 1);
648 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); 719 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
649 radeon_i2c_do_lock(radeon_connector, 0); 720 radeon_i2c_do_lock(radeon_connector, 0);
@@ -654,10 +725,15 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
654 } else { 725 } else {
655 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); 726 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
656 727
657 /* if this isn't a digital monitor 728 /* some oems have boards with separate digital and analog connectors
658 then we need to make sure we don't have any 729 * with a shared ddc line (often vga + hdmi)
659 TV conflicts */ 730 */
660 ret = connector_status_connected; 731 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
732 kfree(radeon_connector->edid);
733 radeon_connector->edid = NULL;
734 ret = connector_status_disconnected;
735 } else
736 ret = connector_status_connected;
661 } 737 }
662 } 738 }
663 739
@@ -753,9 +829,27 @@ static void radeon_dvi_force(struct drm_connector *connector)
753 radeon_connector->use_digital = true; 829 radeon_connector->use_digital = true;
754} 830}
755 831
832static int radeon_dvi_mode_valid(struct drm_connector *connector,
833 struct drm_display_mode *mode)
834{
835 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
836
837 /* XXX check mode bandwidth */
838
839 if (radeon_connector->use_digital && (mode->clock > 165000)) {
840 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
841 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
842 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
843 return MODE_OK;
844 else
845 return MODE_CLOCK_HIGH;
846 }
847 return MODE_OK;
848}
849
756struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { 850struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
757 .get_modes = radeon_dvi_get_modes, 851 .get_modes = radeon_dvi_get_modes,
758 .mode_valid = radeon_vga_mode_valid, 852 .mode_valid = radeon_dvi_mode_valid,
759 .best_encoder = radeon_dvi_encoder, 853 .best_encoder = radeon_dvi_encoder,
760}; 854};
761 855
@@ -775,13 +869,15 @@ radeon_add_atom_connector(struct drm_device *dev,
775 int connector_type, 869 int connector_type,
776 struct radeon_i2c_bus_rec *i2c_bus, 870 struct radeon_i2c_bus_rec *i2c_bus,
777 bool linkb, 871 bool linkb,
778 uint32_t igp_lane_info) 872 uint32_t igp_lane_info,
873 uint16_t connector_object_id)
779{ 874{
780 struct radeon_device *rdev = dev->dev_private; 875 struct radeon_device *rdev = dev->dev_private;
781 struct drm_connector *connector; 876 struct drm_connector *connector;
782 struct radeon_connector *radeon_connector; 877 struct radeon_connector *radeon_connector;
783 struct radeon_connector_atom_dig *radeon_dig_connector; 878 struct radeon_connector_atom_dig *radeon_dig_connector;
784 uint32_t subpixel_order = SubPixelNone; 879 uint32_t subpixel_order = SubPixelNone;
880 bool shared_ddc = false;
785 int ret; 881 int ret;
786 882
787 /* fixme - tv/cv/din */ 883 /* fixme - tv/cv/din */
@@ -795,6 +891,13 @@ radeon_add_atom_connector(struct drm_device *dev,
795 radeon_connector->devices |= supported_device; 891 radeon_connector->devices |= supported_device;
796 return; 892 return;
797 } 893 }
894 if (radeon_connector->ddc_bus && i2c_bus->valid) {
895 if (memcmp(&radeon_connector->ddc_bus->rec, i2c_bus,
896 sizeof(struct radeon_i2c_bus_rec)) == 0) {
897 radeon_connector->shared_ddc = true;
898 shared_ddc = true;
899 }
900 }
798 } 901 }
799 902
800 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); 903 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
@@ -805,6 +908,8 @@ radeon_add_atom_connector(struct drm_device *dev,
805 908
806 radeon_connector->connector_id = connector_id; 909 radeon_connector->connector_id = connector_id;
807 radeon_connector->devices = supported_device; 910 radeon_connector->devices = supported_device;
911 radeon_connector->shared_ddc = shared_ddc;
912 radeon_connector->connector_object_id = connector_object_id;
808 switch (connector_type) { 913 switch (connector_type) {
809 case DRM_MODE_CONNECTOR_VGA: 914 case DRM_MODE_CONNECTOR_VGA:
810 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); 915 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
@@ -956,7 +1061,8 @@ radeon_add_legacy_connector(struct drm_device *dev,
956 uint32_t connector_id, 1061 uint32_t connector_id,
957 uint32_t supported_device, 1062 uint32_t supported_device,
958 int connector_type, 1063 int connector_type,
959 struct radeon_i2c_bus_rec *i2c_bus) 1064 struct radeon_i2c_bus_rec *i2c_bus,
1065 uint16_t connector_object_id)
960{ 1066{
961 struct radeon_device *rdev = dev->dev_private; 1067 struct radeon_device *rdev = dev->dev_private;
962 struct drm_connector *connector; 1068 struct drm_connector *connector;
@@ -985,6 +1091,7 @@ radeon_add_legacy_connector(struct drm_device *dev,
985 1091
986 radeon_connector->connector_id = connector_id; 1092 radeon_connector->connector_id = connector_id;
987 radeon_connector->devices = supported_device; 1093 radeon_connector->devices = supported_device;
1094 radeon_connector->connector_object_id = connector_object_id;
988 switch (connector_type) { 1095 switch (connector_type) {
989 case DRM_MODE_CONNECTOR_VGA: 1096 case DRM_MODE_CONNECTOR_VGA:
990 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); 1097 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c
index b13c79e38bc0..28772a37009c 100644
--- a/drivers/gpu/drm/radeon/radeon_cursor.c
+++ b/drivers/gpu/drm/radeon/radeon_cursor.c
@@ -109,9 +109,15 @@ static void radeon_set_cursor(struct drm_crtc *crtc, struct drm_gem_object *obj,
109 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 109 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
110 struct radeon_device *rdev = crtc->dev->dev_private; 110 struct radeon_device *rdev = crtc->dev->dev_private;
111 111
112 if (ASIC_IS_AVIVO(rdev)) 112 if (ASIC_IS_AVIVO(rdev)) {
113 if (rdev->family >= CHIP_RV770) {
114 if (radeon_crtc->crtc_id)
115 WREG32(R700_D2CUR_SURFACE_ADDRESS_HIGH, 0);
116 else
117 WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH, 0);
118 }
113 WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); 119 WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr);
114 else { 120 } else {
115 radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr; 121 radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr;
116 /* offset is from DISP(2)_BASE_ADDRESS */ 122 /* offset is from DISP(2)_BASE_ADDRESS */
117 WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); 123 WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset);
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index df988142e6b0..e3f9edfa40fe 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -444,20 +444,24 @@ static uint32_t cail_reg_read(struct card_info *info, uint32_t reg)
444 return r; 444 return r;
445} 445}
446 446
447static struct card_info atom_card_info = {
448 .dev = NULL,
449 .reg_read = cail_reg_read,
450 .reg_write = cail_reg_write,
451 .mc_read = cail_mc_read,
452 .mc_write = cail_mc_write,
453 .pll_read = cail_pll_read,
454 .pll_write = cail_pll_write,
455};
456
457int radeon_atombios_init(struct radeon_device *rdev) 447int radeon_atombios_init(struct radeon_device *rdev)
458{ 448{
459 atom_card_info.dev = rdev->ddev; 449 struct card_info *atom_card_info =
460 rdev->mode_info.atom_context = atom_parse(&atom_card_info, rdev->bios); 450 kzalloc(sizeof(struct card_info), GFP_KERNEL);
451
452 if (!atom_card_info)
453 return -ENOMEM;
454
455 rdev->mode_info.atom_card_info = atom_card_info;
456 atom_card_info->dev = rdev->ddev;
457 atom_card_info->reg_read = cail_reg_read;
458 atom_card_info->reg_write = cail_reg_write;
459 atom_card_info->mc_read = cail_mc_read;
460 atom_card_info->mc_write = cail_mc_write;
461 atom_card_info->pll_read = cail_pll_read;
462 atom_card_info->pll_write = cail_pll_write;
463
464 rdev->mode_info.atom_context = atom_parse(atom_card_info, rdev->bios);
461 radeon_atom_initialize_bios_scratch_regs(rdev->ddev); 465 radeon_atom_initialize_bios_scratch_regs(rdev->ddev);
462 return 0; 466 return 0;
463} 467}
@@ -465,6 +469,7 @@ int radeon_atombios_init(struct radeon_device *rdev)
465void radeon_atombios_fini(struct radeon_device *rdev) 469void radeon_atombios_fini(struct radeon_device *rdev)
466{ 470{
467 kfree(rdev->mode_info.atom_context); 471 kfree(rdev->mode_info.atom_context);
472 kfree(rdev->mode_info.atom_card_info);
468} 473}
469 474
470int radeon_combios_init(struct radeon_device *rdev) 475int radeon_combios_init(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 3655d91993a6..c85df4afcb7a 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -137,9 +137,6 @@ static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
137 if (size != 256) { 137 if (size != 256) {
138 return; 138 return;
139 } 139 }
140 if (crtc->fb == NULL) {
141 return;
142 }
143 140
144 /* userspace palettes are always correct as is */ 141 /* userspace palettes are always correct as is */
145 for (i = 0; i < 256; i++) { 142 for (i = 0; i < 256; i++) {
@@ -147,7 +144,6 @@ static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
147 radeon_crtc->lut_g[i] = green[i] >> 6; 144 radeon_crtc->lut_g[i] = green[i] >> 6;
148 radeon_crtc->lut_b[i] = blue[i] >> 6; 145 radeon_crtc->lut_b[i] = blue[i] >> 6;
149 } 146 }
150
151 radeon_crtc_load_lut(crtc); 147 radeon_crtc_load_lut(crtc);
152} 148}
153 149
@@ -338,27 +334,19 @@ static bool radeon_setup_enc_conn(struct drm_device *dev)
338 334
339int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) 335int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
340{ 336{
341 struct edid *edid;
342 int ret = 0; 337 int ret = 0;
343 338
344 if (!radeon_connector->ddc_bus) 339 if (!radeon_connector->ddc_bus)
345 return -1; 340 return -1;
346 if (!radeon_connector->edid) { 341 if (!radeon_connector->edid) {
347 radeon_i2c_do_lock(radeon_connector, 1); 342 radeon_i2c_do_lock(radeon_connector, 1);
348 edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); 343 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
349 radeon_i2c_do_lock(radeon_connector, 0); 344 radeon_i2c_do_lock(radeon_connector, 0);
350 } else 345 }
351 edid = radeon_connector->edid;
352 346
353 if (edid) { 347 if (radeon_connector->edid) {
354 /* update digital bits here */ 348 drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid);
355 if (edid->input & DRM_EDID_INPUT_DIGITAL) 349 ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid);
356 radeon_connector->use_digital = 1;
357 else
358 radeon_connector->use_digital = 0;
359 drm_mode_connector_update_edid_property(&radeon_connector->base, edid);
360 ret = drm_add_edid_modes(&radeon_connector->base, edid);
361 kfree(edid);
362 return ret; 350 return ret;
363 } 351 }
364 drm_mode_connector_update_edid_property(&radeon_connector->base, NULL); 352 drm_mode_connector_update_edid_property(&radeon_connector->base, NULL);
@@ -765,7 +753,7 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
765 radeon_crtc->rmx_type = radeon_encoder->rmx_type; 753 radeon_crtc->rmx_type = radeon_encoder->rmx_type;
766 memcpy(&radeon_crtc->native_mode, 754 memcpy(&radeon_crtc->native_mode,
767 &radeon_encoder->native_mode, 755 &radeon_encoder->native_mode,
768 sizeof(struct radeon_native_mode)); 756 sizeof(struct drm_display_mode));
769 first = false; 757 first = false;
770 } else { 758 } else {
771 if (radeon_crtc->rmx_type != radeon_encoder->rmx_type) { 759 if (radeon_crtc->rmx_type != radeon_encoder->rmx_type) {
@@ -783,10 +771,10 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
783 if (radeon_crtc->rmx_type != RMX_OFF) { 771 if (radeon_crtc->rmx_type != RMX_OFF) {
784 fixed20_12 a, b; 772 fixed20_12 a, b;
785 a.full = rfixed_const(crtc->mode.vdisplay); 773 a.full = rfixed_const(crtc->mode.vdisplay);
786 b.full = rfixed_const(radeon_crtc->native_mode.panel_xres); 774 b.full = rfixed_const(radeon_crtc->native_mode.hdisplay);
787 radeon_crtc->vsc.full = rfixed_div(a, b); 775 radeon_crtc->vsc.full = rfixed_div(a, b);
788 a.full = rfixed_const(crtc->mode.hdisplay); 776 a.full = rfixed_const(crtc->mode.hdisplay);
789 b.full = rfixed_const(radeon_crtc->native_mode.panel_yres); 777 b.full = rfixed_const(radeon_crtc->native_mode.vdisplay);
790 radeon_crtc->hsc.full = rfixed_div(a, b); 778 radeon_crtc->hsc.full = rfixed_div(a, b);
791 } else { 779 } else {
792 radeon_crtc->vsc.full = rfixed_const(1); 780 radeon_crtc->vsc.full = rfixed_const(1);
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index a65ab1a0dad2..d42bc512d75a 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -31,6 +31,10 @@
31 31
32extern int atom_debug; 32extern int atom_debug;
33 33
34/* evil but including atombios.h is much worse */
35bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
36 struct drm_display_mode *mode);
37
34uint32_t 38uint32_t
35radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t dac) 39radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
36{ 40{
@@ -167,49 +171,17 @@ void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
167 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 171 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
168 struct drm_device *dev = encoder->dev; 172 struct drm_device *dev = encoder->dev;
169 struct radeon_device *rdev = dev->dev_private; 173 struct radeon_device *rdev = dev->dev_private;
170 struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; 174 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
171 175
172 if (mode->hdisplay < native_mode->panel_xres || 176 if (mode->hdisplay < native_mode->hdisplay ||
173 mode->vdisplay < native_mode->panel_yres) { 177 mode->vdisplay < native_mode->vdisplay) {
174 if (ASIC_IS_AVIVO(rdev)) { 178 int mode_id = adjusted_mode->base.id;
175 adjusted_mode->hdisplay = native_mode->panel_xres; 179 *adjusted_mode = *native_mode;
176 adjusted_mode->vdisplay = native_mode->panel_yres; 180 if (!ASIC_IS_AVIVO(rdev)) {
177 adjusted_mode->htotal = native_mode->panel_xres + native_mode->hblank; 181 adjusted_mode->hdisplay = mode->hdisplay;
178 adjusted_mode->hsync_start = native_mode->panel_xres + native_mode->hoverplus; 182 adjusted_mode->vdisplay = mode->vdisplay;
179 adjusted_mode->hsync_end = adjusted_mode->hsync_start + native_mode->hsync_width;
180 adjusted_mode->vtotal = native_mode->panel_yres + native_mode->vblank;
181 adjusted_mode->vsync_start = native_mode->panel_yres + native_mode->voverplus;
182 adjusted_mode->vsync_end = adjusted_mode->vsync_start + native_mode->vsync_width;
183 /* update crtc values */
184 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
185 /* adjust crtc values */
186 adjusted_mode->crtc_hdisplay = native_mode->panel_xres;
187 adjusted_mode->crtc_vdisplay = native_mode->panel_yres;
188 adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + native_mode->hblank;
189 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + native_mode->hoverplus;
190 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + native_mode->hsync_width;
191 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + native_mode->vblank;
192 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + native_mode->voverplus;
193 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + native_mode->vsync_width;
194 } else {
195 adjusted_mode->htotal = native_mode->panel_xres + native_mode->hblank;
196 adjusted_mode->hsync_start = native_mode->panel_xres + native_mode->hoverplus;
197 adjusted_mode->hsync_end = adjusted_mode->hsync_start + native_mode->hsync_width;
198 adjusted_mode->vtotal = native_mode->panel_yres + native_mode->vblank;
199 adjusted_mode->vsync_start = native_mode->panel_yres + native_mode->voverplus;
200 adjusted_mode->vsync_end = adjusted_mode->vsync_start + native_mode->vsync_width;
201 /* update crtc values */
202 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
203 /* adjust crtc values */
204 adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + native_mode->hblank;
205 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + native_mode->hoverplus;
206 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + native_mode->hsync_width;
207 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + native_mode->vblank;
208 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + native_mode->voverplus;
209 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + native_mode->vsync_width;
210 } 183 }
211 adjusted_mode->flags = native_mode->flags; 184 adjusted_mode->base.id = mode_id;
212 adjusted_mode->clock = native_mode->dotclock;
213 } 185 }
214} 186}
215 187
@@ -219,7 +191,11 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
219 struct drm_display_mode *adjusted_mode) 191 struct drm_display_mode *adjusted_mode)
220{ 192{
221 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 193 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
194 struct drm_device *dev = encoder->dev;
195 struct radeon_device *rdev = dev->dev_private;
222 196
197 /* set the active encoder to connector routing */
198 radeon_encoder_set_active_device(encoder);
223 drm_mode_set_crtcinfo(adjusted_mode, 0); 199 drm_mode_set_crtcinfo(adjusted_mode, 0);
224 200
225 if (radeon_encoder->rmx_type != RMX_OFF) 201 if (radeon_encoder->rmx_type != RMX_OFF)
@@ -230,6 +206,18 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
230 && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2))) 206 && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))
231 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2; 207 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;
232 208
209 if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
210 struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv;
211 if (tv_dac) {
212 if (tv_dac->tv_std == TV_STD_NTSC ||
213 tv_dac->tv_std == TV_STD_NTSC_J ||
214 tv_dac->tv_std == TV_STD_PAL_M)
215 radeon_atom_get_tv_timings(rdev, 0, adjusted_mode);
216 else
217 radeon_atom_get_tv_timings(rdev, 1, adjusted_mode);
218 }
219 }
220
233 return true; 221 return true;
234} 222}
235 223
@@ -461,7 +449,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
461 case 1: 449 case 1:
462 args.v1.ucMisc = 0; 450 args.v1.ucMisc = 0;
463 args.v1.ucAction = action; 451 args.v1.ucAction = action;
464 if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) 452 if (drm_detect_hdmi_monitor(radeon_connector->edid))
465 args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; 453 args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
466 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); 454 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
467 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 455 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
@@ -486,7 +474,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
486 if (dig->coherent_mode) 474 if (dig->coherent_mode)
487 args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT; 475 args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT;
488 } 476 }
489 if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) 477 if (drm_detect_hdmi_monitor(radeon_connector->edid))
490 args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; 478 args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
491 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); 479 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
492 args.v2.ucTruncate = 0; 480 args.v2.ucTruncate = 0;
@@ -544,7 +532,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
544 switch (connector->connector_type) { 532 switch (connector->connector_type) {
545 case DRM_MODE_CONNECTOR_DVII: 533 case DRM_MODE_CONNECTOR_DVII:
546 case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ 534 case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */
547 if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) 535 if (drm_detect_hdmi_monitor(radeon_connector->edid))
548 return ATOM_ENCODER_MODE_HDMI; 536 return ATOM_ENCODER_MODE_HDMI;
549 else if (radeon_connector->use_digital) 537 else if (radeon_connector->use_digital)
550 return ATOM_ENCODER_MODE_DVI; 538 return ATOM_ENCODER_MODE_DVI;
@@ -554,7 +542,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
554 case DRM_MODE_CONNECTOR_DVID: 542 case DRM_MODE_CONNECTOR_DVID:
555 case DRM_MODE_CONNECTOR_HDMIA: 543 case DRM_MODE_CONNECTOR_HDMIA:
556 default: 544 default:
557 if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) 545 if (drm_detect_hdmi_monitor(radeon_connector->edid))
558 return ATOM_ENCODER_MODE_HDMI; 546 return ATOM_ENCODER_MODE_HDMI;
559 else 547 else
560 return ATOM_ENCODER_MODE_DVI; 548 return ATOM_ENCODER_MODE_DVI;
@@ -566,7 +554,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
566 /*if (radeon_output->MonType == MT_DP) 554 /*if (radeon_output->MonType == MT_DP)
567 return ATOM_ENCODER_MODE_DP; 555 return ATOM_ENCODER_MODE_DP;
568 else*/ 556 else*/
569 if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) 557 if (drm_detect_hdmi_monitor(radeon_connector->edid))
570 return ATOM_ENCODER_MODE_HDMI; 558 return ATOM_ENCODER_MODE_HDMI;
571 else 559 else
572 return ATOM_ENCODER_MODE_DVI; 560 return ATOM_ENCODER_MODE_DVI;
@@ -734,14 +722,17 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action)
734 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); 722 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev);
735 723
736 args.v1.ucAction = action; 724 args.v1.ucAction = action;
737 725 if (action == ATOM_TRANSMITTER_ACTION_INIT) {
726 args.v1.usInitInfo = radeon_connector->connector_object_id;
727 } else {
728 if (radeon_encoder->pixel_clock > 165000)
729 args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);
730 else
731 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
732 }
738 if (ASIC_IS_DCE32(rdev)) { 733 if (ASIC_IS_DCE32(rdev)) {
739 if (radeon_encoder->pixel_clock > 165000) { 734 if (radeon_encoder->pixel_clock > 165000)
740 args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock * 10 * 2) / 100); 735 args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);
741 args.v2.acConfig.fDualLinkConnector = 1;
742 } else {
743 args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock * 10 * 4) / 100);
744 }
745 if (dig->dig_block) 736 if (dig->dig_block)
746 args.v2.acConfig.ucEncoderSel = 1; 737 args.v2.acConfig.ucEncoderSel = 1;
747 738
@@ -766,7 +757,6 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action)
766 } 757 }
767 } else { 758 } else {
768 args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; 759 args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;
769 args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock) / 10);
770 760
771 switch (radeon_encoder->encoder_id) { 761 switch (radeon_encoder->encoder_id) {
772 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 762 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
@@ -874,16 +864,9 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
874 DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args; 864 DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args;
875 int index = 0; 865 int index = 0;
876 bool is_dig = false; 866 bool is_dig = false;
877 int devices;
878 867
879 memset(&args, 0, sizeof(args)); 868 memset(&args, 0, sizeof(args));
880 869
881 /* on DPMS off we have no idea if active device is meaningful */
882 if (mode != DRM_MODE_DPMS_ON && !radeon_encoder->active_device)
883 devices = radeon_encoder->devices;
884 else
885 devices = radeon_encoder->active_device;
886
887 DRM_DEBUG("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", 870 DRM_DEBUG("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n",
888 radeon_encoder->encoder_id, mode, radeon_encoder->devices, 871 radeon_encoder->encoder_id, mode, radeon_encoder->devices,
889 radeon_encoder->active_device); 872 radeon_encoder->active_device);
@@ -914,18 +897,18 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
914 break; 897 break;
915 case ENCODER_OBJECT_ID_INTERNAL_DAC1: 898 case ENCODER_OBJECT_ID_INTERNAL_DAC1:
916 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: 899 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
917 if (devices & (ATOM_DEVICE_TV_SUPPORT)) 900 if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
918 index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); 901 index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl);
919 else if (devices & (ATOM_DEVICE_CV_SUPPORT)) 902 else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT))
920 index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); 903 index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl);
921 else 904 else
922 index = GetIndexIntoMasterTable(COMMAND, DAC1OutputControl); 905 index = GetIndexIntoMasterTable(COMMAND, DAC1OutputControl);
923 break; 906 break;
924 case ENCODER_OBJECT_ID_INTERNAL_DAC2: 907 case ENCODER_OBJECT_ID_INTERNAL_DAC2:
925 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: 908 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
926 if (devices & (ATOM_DEVICE_TV_SUPPORT)) 909 if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
927 index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); 910 index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl);
928 else if (devices & (ATOM_DEVICE_CV_SUPPORT)) 911 else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT))
929 index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); 912 index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl);
930 else 913 else
931 index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl); 914 index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl);
@@ -1104,8 +1087,11 @@ atombios_apply_encoder_quirks(struct drm_encoder *encoder,
1104 } 1087 }
1105 1088
1106 /* set scaler clears this on some chips */ 1089 /* set scaler clears this on some chips */
1107 if (ASIC_IS_AVIVO(rdev) && (mode->flags & DRM_MODE_FLAG_INTERLACE)) 1090 if (!(radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))) {
1108 WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, AVIVO_D1MODE_INTERLEAVE_EN); 1091 if (ASIC_IS_AVIVO(rdev) && (mode->flags & DRM_MODE_FLAG_INTERLACE))
1092 WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset,
1093 AVIVO_D1MODE_INTERLEAVE_EN);
1094 }
1109} 1095}
1110 1096
1111static void 1097static void
@@ -1153,6 +1139,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1153 1139
1154 /* setup and enable the encoder and transmitter */ 1140 /* setup and enable the encoder and transmitter */
1155 atombios_dig_encoder_setup(encoder, ATOM_ENABLE); 1141 atombios_dig_encoder_setup(encoder, ATOM_ENABLE);
1142 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT);
1156 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP); 1143 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP);
1157 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE); 1144 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE);
1158 break; 1145 break;
@@ -1268,8 +1255,6 @@ static void radeon_atom_encoder_prepare(struct drm_encoder *encoder)
1268{ 1255{
1269 radeon_atom_output_lock(encoder, true); 1256 radeon_atom_output_lock(encoder, true);
1270 radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); 1257 radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
1271
1272 radeon_encoder_set_active_device(encoder);
1273} 1258}
1274 1259
1275static void radeon_atom_encoder_commit(struct drm_encoder *encoder) 1260static void radeon_atom_encoder_commit(struct drm_encoder *encoder)
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c
index a931af065dd4..a68d7566178c 100644
--- a/drivers/gpu/drm/radeon/radeon_gart.c
+++ b/drivers/gpu/drm/radeon/radeon_gart.c
@@ -140,15 +140,15 @@ void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
140 WARN(1, "trying to unbind memory to unitialized GART !\n"); 140 WARN(1, "trying to unbind memory to unitialized GART !\n");
141 return; 141 return;
142 } 142 }
143 t = offset / 4096; 143 t = offset / RADEON_GPU_PAGE_SIZE;
144 p = t / (PAGE_SIZE / 4096); 144 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
145 for (i = 0; i < pages; i++, p++) { 145 for (i = 0; i < pages; i++, p++) {
146 if (rdev->gart.pages[p]) { 146 if (rdev->gart.pages[p]) {
147 pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p], 147 pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p],
148 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); 148 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
149 rdev->gart.pages[p] = NULL; 149 rdev->gart.pages[p] = NULL;
150 rdev->gart.pages_addr[p] = 0; 150 rdev->gart.pages_addr[p] = 0;
151 for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) { 151 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
152 radeon_gart_set_page(rdev, t, 0); 152 radeon_gart_set_page(rdev, t, 0);
153 } 153 }
154 } 154 }
@@ -169,8 +169,8 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
169 DRM_ERROR("trying to bind memory to unitialized GART !\n"); 169 DRM_ERROR("trying to bind memory to unitialized GART !\n");
170 return -EINVAL; 170 return -EINVAL;
171 } 171 }
172 t = offset / 4096; 172 t = offset / RADEON_GPU_PAGE_SIZE;
173 p = t / (PAGE_SIZE / 4096); 173 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
174 174
175 for (i = 0; i < pages; i++, p++) { 175 for (i = 0; i < pages; i++, p++) {
176 /* we need to support large memory configurations */ 176 /* we need to support large memory configurations */
@@ -185,9 +185,9 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
185 } 185 }
186 rdev->gart.pages[p] = pagelist[i]; 186 rdev->gart.pages[p] = pagelist[i];
187 page_base = rdev->gart.pages_addr[p]; 187 page_base = rdev->gart.pages_addr[p];
188 for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) { 188 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
189 radeon_gart_set_page(rdev, t, page_base); 189 radeon_gart_set_page(rdev, t, page_base);
190 page_base += 4096; 190 page_base += RADEON_GPU_PAGE_SIZE;
191 } 191 }
192 } 192 }
193 mb(); 193 mb();
@@ -200,14 +200,14 @@ int radeon_gart_init(struct radeon_device *rdev)
200 if (rdev->gart.pages) { 200 if (rdev->gart.pages) {
201 return 0; 201 return 0;
202 } 202 }
203 /* We need PAGE_SIZE >= 4096 */ 203 /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
204 if (PAGE_SIZE < 4096) { 204 if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
205 DRM_ERROR("Page size is smaller than GPU page size!\n"); 205 DRM_ERROR("Page size is smaller than GPU page size!\n");
206 return -EINVAL; 206 return -EINVAL;
207 } 207 }
208 /* Compute table size */ 208 /* Compute table size */
209 rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE; 209 rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
210 rdev->gart.num_gpu_pages = rdev->mc.gtt_size / 4096; 210 rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
211 DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n", 211 DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
212 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); 212 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
213 /* Allocate pages table */ 213 /* Allocate pages table */
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index 8e0a8759e428..a0fe6232dcb6 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -92,6 +92,13 @@ int radeon_irq_kms_init(struct radeon_device *rdev)
92 if (r) { 92 if (r) {
93 return r; 93 return r;
94 } 94 }
95 /* enable msi */
96 rdev->msi_enabled = 0;
97 if (rdev->family >= CHIP_RV380) {
98 int ret = pci_enable_msi(rdev->pdev);
99 if (!ret)
100 rdev->msi_enabled = 1;
101 }
95 drm_irq_install(rdev->ddev); 102 drm_irq_install(rdev->ddev);
96 rdev->irq.installed = true; 103 rdev->irq.installed = true;
97 DRM_INFO("radeon: irq initialized.\n"); 104 DRM_INFO("radeon: irq initialized.\n");
@@ -103,5 +110,7 @@ void radeon_irq_kms_fini(struct radeon_device *rdev)
103 if (rdev->irq.installed) { 110 if (rdev->irq.installed) {
104 rdev->irq.installed = false; 111 rdev->irq.installed = false;
105 drm_irq_uninstall(rdev->ddev); 112 drm_irq_uninstall(rdev->ddev);
113 if (rdev->msi_enabled)
114 pci_disable_msi(rdev->pdev);
106 } 115 }
107} 116}
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index 36410f85d705..8d0b7aa87fa4 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -48,7 +48,7 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
48 u32 fp_horz_stretch, fp_vert_stretch, fp_horz_vert_active; 48 u32 fp_horz_stretch, fp_vert_stretch, fp_horz_vert_active;
49 u32 fp_h_sync_strt_wid, fp_crtc_h_total_disp; 49 u32 fp_h_sync_strt_wid, fp_crtc_h_total_disp;
50 u32 fp_v_sync_strt_wid, fp_crtc_v_total_disp; 50 u32 fp_v_sync_strt_wid, fp_crtc_v_total_disp;
51 struct radeon_native_mode *native_mode = &radeon_crtc->native_mode; 51 struct drm_display_mode *native_mode = &radeon_crtc->native_mode;
52 52
53 fp_vert_stretch = RREG32(RADEON_FP_VERT_STRETCH) & 53 fp_vert_stretch = RREG32(RADEON_FP_VERT_STRETCH) &
54 (RADEON_VERT_STRETCH_RESERVED | 54 (RADEON_VERT_STRETCH_RESERVED |
@@ -95,19 +95,19 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
95 95
96 fp_horz_vert_active = 0; 96 fp_horz_vert_active = 0;
97 97
98 if (native_mode->panel_xres == 0 || 98 if (native_mode->hdisplay == 0 ||
99 native_mode->panel_yres == 0) { 99 native_mode->vdisplay == 0) {
100 hscale = false; 100 hscale = false;
101 vscale = false; 101 vscale = false;
102 } else { 102 } else {
103 if (xres > native_mode->panel_xres) 103 if (xres > native_mode->hdisplay)
104 xres = native_mode->panel_xres; 104 xres = native_mode->hdisplay;
105 if (yres > native_mode->panel_yres) 105 if (yres > native_mode->vdisplay)
106 yres = native_mode->panel_yres; 106 yres = native_mode->vdisplay;
107 107
108 if (xres == native_mode->panel_xres) 108 if (xres == native_mode->hdisplay)
109 hscale = false; 109 hscale = false;
110 if (yres == native_mode->panel_yres) 110 if (yres == native_mode->vdisplay)
111 vscale = false; 111 vscale = false;
112 } 112 }
113 113
@@ -119,11 +119,11 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
119 else { 119 else {
120 inc = (fp_horz_stretch & RADEON_HORZ_AUTO_RATIO_INC) ? 1 : 0; 120 inc = (fp_horz_stretch & RADEON_HORZ_AUTO_RATIO_INC) ? 1 : 0;
121 scale = ((xres + inc) * RADEON_HORZ_STRETCH_RATIO_MAX) 121 scale = ((xres + inc) * RADEON_HORZ_STRETCH_RATIO_MAX)
122 / native_mode->panel_xres + 1; 122 / native_mode->hdisplay + 1;
123 fp_horz_stretch |= (((scale) & RADEON_HORZ_STRETCH_RATIO_MASK) | 123 fp_horz_stretch |= (((scale) & RADEON_HORZ_STRETCH_RATIO_MASK) |
124 RADEON_HORZ_STRETCH_BLEND | 124 RADEON_HORZ_STRETCH_BLEND |
125 RADEON_HORZ_STRETCH_ENABLE | 125 RADEON_HORZ_STRETCH_ENABLE |
126 ((native_mode->panel_xres/8-1) << 16)); 126 ((native_mode->hdisplay/8-1) << 16));
127 } 127 }
128 128
129 if (!vscale) 129 if (!vscale)
@@ -131,11 +131,11 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
131 else { 131 else {
132 inc = (fp_vert_stretch & RADEON_VERT_AUTO_RATIO_INC) ? 1 : 0; 132 inc = (fp_vert_stretch & RADEON_VERT_AUTO_RATIO_INC) ? 1 : 0;
133 scale = ((yres + inc) * RADEON_VERT_STRETCH_RATIO_MAX) 133 scale = ((yres + inc) * RADEON_VERT_STRETCH_RATIO_MAX)
134 / native_mode->panel_yres + 1; 134 / native_mode->vdisplay + 1;
135 fp_vert_stretch |= (((scale) & RADEON_VERT_STRETCH_RATIO_MASK) | 135 fp_vert_stretch |= (((scale) & RADEON_VERT_STRETCH_RATIO_MASK) |
136 RADEON_VERT_STRETCH_ENABLE | 136 RADEON_VERT_STRETCH_ENABLE |
137 RADEON_VERT_STRETCH_BLEND | 137 RADEON_VERT_STRETCH_BLEND |
138 ((native_mode->panel_yres-1) << 12)); 138 ((native_mode->vdisplay-1) << 12));
139 } 139 }
140 break; 140 break;
141 case RMX_CENTER: 141 case RMX_CENTER:
@@ -175,8 +175,8 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
175 ? RADEON_CRTC_V_SYNC_POL 175 ? RADEON_CRTC_V_SYNC_POL
176 : 0))); 176 : 0)));
177 177
178 fp_horz_vert_active = (((native_mode->panel_yres) & 0xfff) | 178 fp_horz_vert_active = (((native_mode->vdisplay) & 0xfff) |
179 (((native_mode->panel_xres / 8) & 0x1ff) << 16)); 179 (((native_mode->hdisplay / 8) & 0x1ff) << 16));
180 break; 180 break;
181 case RMX_OFF: 181 case RMX_OFF:
182 default: 182 default:
@@ -532,6 +532,10 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
532 radeon_fb = to_radeon_framebuffer(old_fb); 532 radeon_fb = to_radeon_framebuffer(old_fb);
533 radeon_gem_object_unpin(radeon_fb->obj); 533 radeon_gem_object_unpin(radeon_fb->obj);
534 } 534 }
535
536 /* Bytes per pixel may have changed */
537 radeon_bandwidth_update(rdev);
538
535 return 0; 539 return 0;
536} 540}
537 541
@@ -664,6 +668,9 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
664 668
665 WREG32(RADEON_DISP2_MERGE_CNTL, disp2_merge_cntl); 669 WREG32(RADEON_DISP2_MERGE_CNTL, disp2_merge_cntl);
666 WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); 670 WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
671
672 WREG32(RADEON_FP_H2_SYNC_STRT_WID, crtc_h_sync_strt_wid);
673 WREG32(RADEON_FP_V2_SYNC_STRT_WID, crtc_v_sync_strt_wid);
667 } else { 674 } else {
668 uint32_t crtc_gen_cntl; 675 uint32_t crtc_gen_cntl;
669 uint32_t crtc_ext_cntl; 676 uint32_t crtc_ext_cntl;
@@ -1015,14 +1022,11 @@ static int radeon_crtc_mode_set(struct drm_crtc *crtc,
1015 int x, int y, struct drm_framebuffer *old_fb) 1022 int x, int y, struct drm_framebuffer *old_fb)
1016{ 1023{
1017 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 1024 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1018 struct drm_device *dev = crtc->dev;
1019 struct radeon_device *rdev = dev->dev_private;
1020 1025
1021 /* TODO TV */ 1026 /* TODO TV */
1022 radeon_crtc_set_base(crtc, x, y, old_fb); 1027 radeon_crtc_set_base(crtc, x, y, old_fb);
1023 radeon_set_crtc_timing(crtc, adjusted_mode); 1028 radeon_set_crtc_timing(crtc, adjusted_mode);
1024 radeon_set_pll(crtc, adjusted_mode); 1029 radeon_set_pll(crtc, adjusted_mode);
1025 radeon_bandwidth_update(rdev);
1026 if (radeon_crtc->crtc_id == 0) { 1030 if (radeon_crtc->crtc_id == 0) {
1027 radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode); 1031 radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode);
1028 } else { 1032 } else {
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index 6ceb958fd194..00382122869b 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -107,8 +107,6 @@ static void radeon_legacy_lvds_prepare(struct drm_encoder *encoder)
107 else 107 else
108 radeon_combios_output_lock(encoder, true); 108 radeon_combios_output_lock(encoder, true);
109 radeon_legacy_lvds_dpms(encoder, DRM_MODE_DPMS_OFF); 109 radeon_legacy_lvds_dpms(encoder, DRM_MODE_DPMS_OFF);
110
111 radeon_encoder_set_active_device(encoder);
112} 110}
113 111
114static void radeon_legacy_lvds_commit(struct drm_encoder *encoder) 112static void radeon_legacy_lvds_commit(struct drm_encoder *encoder)
@@ -192,6 +190,8 @@ static bool radeon_legacy_lvds_mode_fixup(struct drm_encoder *encoder,
192{ 190{
193 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 191 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
194 192
193 /* set the active encoder to connector routing */
194 radeon_encoder_set_active_device(encoder);
195 drm_mode_set_crtcinfo(adjusted_mode, 0); 195 drm_mode_set_crtcinfo(adjusted_mode, 0);
196 196
197 if (radeon_encoder->rmx_type != RMX_OFF) 197 if (radeon_encoder->rmx_type != RMX_OFF)
@@ -218,7 +218,8 @@ static bool radeon_legacy_primary_dac_mode_fixup(struct drm_encoder *encoder,
218 struct drm_display_mode *mode, 218 struct drm_display_mode *mode,
219 struct drm_display_mode *adjusted_mode) 219 struct drm_display_mode *adjusted_mode)
220{ 220{
221 221 /* set the active encoder to connector routing */
222 radeon_encoder_set_active_device(encoder);
222 drm_mode_set_crtcinfo(adjusted_mode, 0); 223 drm_mode_set_crtcinfo(adjusted_mode, 0);
223 224
224 return true; 225 return true;
@@ -272,7 +273,6 @@ static void radeon_legacy_primary_dac_prepare(struct drm_encoder *encoder)
272 else 273 else
273 radeon_combios_output_lock(encoder, true); 274 radeon_combios_output_lock(encoder, true);
274 radeon_legacy_primary_dac_dpms(encoder, DRM_MODE_DPMS_OFF); 275 radeon_legacy_primary_dac_dpms(encoder, DRM_MODE_DPMS_OFF);
275 radeon_encoder_set_active_device(encoder);
276} 276}
277 277
278static void radeon_legacy_primary_dac_commit(struct drm_encoder *encoder) 278static void radeon_legacy_primary_dac_commit(struct drm_encoder *encoder)
@@ -468,7 +468,6 @@ static void radeon_legacy_tmds_int_prepare(struct drm_encoder *encoder)
468 else 468 else
469 radeon_combios_output_lock(encoder, true); 469 radeon_combios_output_lock(encoder, true);
470 radeon_legacy_tmds_int_dpms(encoder, DRM_MODE_DPMS_OFF); 470 radeon_legacy_tmds_int_dpms(encoder, DRM_MODE_DPMS_OFF);
471 radeon_encoder_set_active_device(encoder);
472} 471}
473 472
474static void radeon_legacy_tmds_int_commit(struct drm_encoder *encoder) 473static void radeon_legacy_tmds_int_commit(struct drm_encoder *encoder)
@@ -543,6 +542,14 @@ static void radeon_legacy_tmds_int_mode_set(struct drm_encoder *encoder,
543 542
544 fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN); 543 fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN);
545 544
545 fp_gen_cntl &= ~(RADEON_FP_RMX_HVSYNC_CONTROL_EN |
546 RADEON_FP_DFP_SYNC_SEL |
547 RADEON_FP_CRT_SYNC_SEL |
548 RADEON_FP_CRTC_LOCK_8DOT |
549 RADEON_FP_USE_SHADOW_EN |
550 RADEON_FP_CRTC_USE_SHADOW_VEND |
551 RADEON_FP_CRT_SYNC_ALT);
552
546 if (1) /* FIXME rgbBits == 8 */ 553 if (1) /* FIXME rgbBits == 8 */
547 fp_gen_cntl |= RADEON_FP_PANEL_FORMAT; /* 24 bit format */ 554 fp_gen_cntl |= RADEON_FP_PANEL_FORMAT; /* 24 bit format */
548 else 555 else
@@ -556,7 +563,7 @@ static void radeon_legacy_tmds_int_mode_set(struct drm_encoder *encoder,
556 else 563 else
557 fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1; 564 fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1;
558 } else 565 } else
559 fp_gen_cntl |= RADEON_FP_SEL_CRTC1; 566 fp_gen_cntl &= ~RADEON_FP_SEL_CRTC2;
560 } else { 567 } else {
561 if (ASIC_IS_R300(rdev) || rdev->family == CHIP_R200) { 568 if (ASIC_IS_R300(rdev) || rdev->family == CHIP_R200) {
562 fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK; 569 fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;
@@ -593,7 +600,8 @@ static bool radeon_legacy_tmds_ext_mode_fixup(struct drm_encoder *encoder,
593 struct drm_display_mode *mode, 600 struct drm_display_mode *mode,
594 struct drm_display_mode *adjusted_mode) 601 struct drm_display_mode *adjusted_mode)
595{ 602{
596 603 /* set the active encoder to connector routing */
604 radeon_encoder_set_active_device(encoder);
597 drm_mode_set_crtcinfo(adjusted_mode, 0); 605 drm_mode_set_crtcinfo(adjusted_mode, 0);
598 606
599 return true; 607 return true;
@@ -636,7 +644,6 @@ static void radeon_legacy_tmds_ext_prepare(struct drm_encoder *encoder)
636 else 644 else
637 radeon_combios_output_lock(encoder, true); 645 radeon_combios_output_lock(encoder, true);
638 radeon_legacy_tmds_ext_dpms(encoder, DRM_MODE_DPMS_OFF); 646 radeon_legacy_tmds_ext_dpms(encoder, DRM_MODE_DPMS_OFF);
639 radeon_encoder_set_active_device(encoder);
640} 647}
641 648
642static void radeon_legacy_tmds_ext_commit(struct drm_encoder *encoder) 649static void radeon_legacy_tmds_ext_commit(struct drm_encoder *encoder)
@@ -735,7 +742,8 @@ static bool radeon_legacy_tv_dac_mode_fixup(struct drm_encoder *encoder,
735 struct drm_display_mode *mode, 742 struct drm_display_mode *mode,
736 struct drm_display_mode *adjusted_mode) 743 struct drm_display_mode *adjusted_mode)
737{ 744{
738 745 /* set the active encoder to connector routing */
746 radeon_encoder_set_active_device(encoder);
739 drm_mode_set_crtcinfo(adjusted_mode, 0); 747 drm_mode_set_crtcinfo(adjusted_mode, 0);
740 748
741 return true; 749 return true;
@@ -839,7 +847,6 @@ static void radeon_legacy_tv_dac_prepare(struct drm_encoder *encoder)
839 else 847 else
840 radeon_combios_output_lock(encoder, true); 848 radeon_combios_output_lock(encoder, true);
841 radeon_legacy_tv_dac_dpms(encoder, DRM_MODE_DPMS_OFF); 849 radeon_legacy_tv_dac_dpms(encoder, DRM_MODE_DPMS_OFF);
842 radeon_encoder_set_active_device(encoder);
843} 850}
844 851
845static void radeon_legacy_tv_dac_commit(struct drm_encoder *encoder) 852static void radeon_legacy_tv_dac_commit(struct drm_encoder *encoder)
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index e61226817ccf..ace726aa0d76 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -172,6 +172,7 @@ enum radeon_connector_table {
172 172
173struct radeon_mode_info { 173struct radeon_mode_info {
174 struct atom_context *atom_context; 174 struct atom_context *atom_context;
175 struct card_info *atom_card_info;
175 enum radeon_connector_table connector_table; 176 enum radeon_connector_table connector_table;
176 bool mode_config_initialized; 177 bool mode_config_initialized;
177 struct radeon_crtc *crtcs[2]; 178 struct radeon_crtc *crtcs[2];
@@ -186,17 +187,6 @@ struct radeon_mode_info {
186 187
187}; 188};
188 189
189struct radeon_native_mode {
190 /* preferred mode */
191 uint32_t panel_xres, panel_yres;
192 uint32_t hoverplus, hsync_width;
193 uint32_t hblank;
194 uint32_t voverplus, vsync_width;
195 uint32_t vblank;
196 uint32_t dotclock;
197 uint32_t flags;
198};
199
200#define MAX_H_CODE_TIMING_LEN 32 190#define MAX_H_CODE_TIMING_LEN 32
201#define MAX_V_CODE_TIMING_LEN 32 191#define MAX_V_CODE_TIMING_LEN 32
202 192
@@ -228,7 +218,7 @@ struct radeon_crtc {
228 enum radeon_rmx_type rmx_type; 218 enum radeon_rmx_type rmx_type;
229 fixed20_12 vsc; 219 fixed20_12 vsc;
230 fixed20_12 hsc; 220 fixed20_12 hsc;
231 struct radeon_native_mode native_mode; 221 struct drm_display_mode native_mode;
232}; 222};
233 223
234struct radeon_encoder_primary_dac { 224struct radeon_encoder_primary_dac {
@@ -248,7 +238,7 @@ struct radeon_encoder_lvds {
248 bool use_bios_dividers; 238 bool use_bios_dividers;
249 uint32_t lvds_gen_cntl; 239 uint32_t lvds_gen_cntl;
250 /* panel mode */ 240 /* panel mode */
251 struct radeon_native_mode native_mode; 241 struct drm_display_mode native_mode;
252}; 242};
253 243
254struct radeon_encoder_tv_dac { 244struct radeon_encoder_tv_dac {
@@ -271,6 +261,16 @@ struct radeon_encoder_int_tmds {
271 struct radeon_tmds_pll tmds_pll[4]; 261 struct radeon_tmds_pll tmds_pll[4];
272}; 262};
273 263
264/* spread spectrum */
265struct radeon_atom_ss {
266 uint16_t percentage;
267 uint8_t type;
268 uint8_t step;
269 uint8_t delay;
270 uint8_t range;
271 uint8_t refdiv;
272};
273
274struct radeon_encoder_atom_dig { 274struct radeon_encoder_atom_dig {
275 /* atom dig */ 275 /* atom dig */
276 bool coherent_mode; 276 bool coherent_mode;
@@ -278,8 +278,9 @@ struct radeon_encoder_atom_dig {
278 /* atom lvds */ 278 /* atom lvds */
279 uint32_t lvds_misc; 279 uint32_t lvds_misc;
280 uint16_t panel_pwr_delay; 280 uint16_t panel_pwr_delay;
281 struct radeon_atom_ss *ss;
281 /* panel mode */ 282 /* panel mode */
282 struct radeon_native_mode native_mode; 283 struct drm_display_mode native_mode;
283}; 284};
284 285
285struct radeon_encoder_atom_dac { 286struct radeon_encoder_atom_dac {
@@ -294,7 +295,7 @@ struct radeon_encoder {
294 uint32_t flags; 295 uint32_t flags;
295 uint32_t pixel_clock; 296 uint32_t pixel_clock;
296 enum radeon_rmx_type rmx_type; 297 enum radeon_rmx_type rmx_type;
297 struct radeon_native_mode native_mode; 298 struct drm_display_mode native_mode;
298 void *enc_priv; 299 void *enc_priv;
299}; 300};
300 301
@@ -308,12 +309,15 @@ struct radeon_connector {
308 uint32_t connector_id; 309 uint32_t connector_id;
309 uint32_t devices; 310 uint32_t devices;
310 struct radeon_i2c_chan *ddc_bus; 311 struct radeon_i2c_chan *ddc_bus;
312 /* some systems have a an hdmi and vga port with a shared ddc line */
313 bool shared_ddc;
311 bool use_digital; 314 bool use_digital;
312 /* we need to mind the EDID between detect 315 /* we need to mind the EDID between detect
313 and get modes due to analog/digital/tvencoder */ 316 and get modes due to analog/digital/tvencoder */
314 struct edid *edid; 317 struct edid *edid;
315 void *con_priv; 318 void *con_priv;
316 bool dac_load_detect; 319 bool dac_load_detect;
320 uint16_t connector_object_id;
317}; 321};
318 322
319struct radeon_framebuffer { 323struct radeon_framebuffer {
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
new file mode 100644
index 000000000000..46146c6a2a06
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -0,0 +1,65 @@
1/*
2 * Permission is hereby granted, free of charge, to any person obtaining a
3 * copy of this software and associated documentation files (the "Software"),
4 * to deal in the Software without restriction, including without limitation
5 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
6 * and/or sell copies of the Software, and to permit persons to whom the
7 * Software is furnished to do so, subject to the following conditions:
8 *
9 * The above copyright notice and this permission notice shall be included in
10 * all copies or substantial portions of the Software.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
16 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
17 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
18 * OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * Authors: Rafał Miłecki <zajec5@gmail.com>
21 */
22#include "drmP.h"
23#include "radeon.h"
24
25int radeon_debugfs_pm_init(struct radeon_device *rdev);
26
27int radeon_pm_init(struct radeon_device *rdev)
28{
29 if (radeon_debugfs_pm_init(rdev)) {
30 DRM_ERROR("Failed to register debugfs file for CP !\n");
31 }
32
33 return 0;
34}
35
36/*
37 * Debugfs info
38 */
39#if defined(CONFIG_DEBUG_FS)
40
41static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
42{
43 struct drm_info_node *node = (struct drm_info_node *) m->private;
44 struct drm_device *dev = node->minor->dev;
45 struct radeon_device *rdev = dev->dev_private;
46
47 seq_printf(m, "engine clock: %u0 Hz\n", radeon_get_engine_clock(rdev));
48 seq_printf(m, "memory clock: %u0 Hz\n", radeon_get_memory_clock(rdev));
49
50 return 0;
51}
52
53static struct drm_info_list radeon_pm_info_list[] = {
54 {"radeon_pm_info", radeon_debugfs_pm_info, 0, NULL},
55};
56#endif
57
58int radeon_debugfs_pm_init(struct radeon_device *rdev)
59{
60#if defined(CONFIG_DEBUG_FS)
61 return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list));
62#else
63 return 0;
64#endif
65}
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h
index bfa1ab9c93e1..29ab75903ec1 100644
--- a/drivers/gpu/drm/radeon/radeon_reg.h
+++ b/drivers/gpu/drm/radeon/radeon_reg.h
@@ -290,6 +290,8 @@
290#define RADEON_BUS_CNTL 0x0030 290#define RADEON_BUS_CNTL 0x0030
291# define RADEON_BUS_MASTER_DIS (1 << 6) 291# define RADEON_BUS_MASTER_DIS (1 << 6)
292# define RADEON_BUS_BIOS_DIS_ROM (1 << 12) 292# define RADEON_BUS_BIOS_DIS_ROM (1 << 12)
293# define RS600_BUS_MASTER_DIS (1 << 14)
294# define RS600_MSI_REARM (1 << 20) /* rs600/rs690/rs740 */
293# define RADEON_BUS_RD_DISCARD_EN (1 << 24) 295# define RADEON_BUS_RD_DISCARD_EN (1 << 24)
294# define RADEON_BUS_RD_ABORT_EN (1 << 25) 296# define RADEON_BUS_RD_ABORT_EN (1 << 25)
295# define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28) 297# define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28)
@@ -297,6 +299,9 @@
297# define RADEON_BUS_READ_BURST (1 << 30) 299# define RADEON_BUS_READ_BURST (1 << 30)
298#define RADEON_BUS_CNTL1 0x0034 300#define RADEON_BUS_CNTL1 0x0034
299# define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) 301# define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4)
302/* rv370/rv380, rv410, r423/r430/r480, r5xx */
303#define RADEON_MSI_REARM_EN 0x0160
304# define RV370_MSI_REARM_EN (1 << 0)
300 305
301/* #define RADEON_PCIE_INDEX 0x0030 */ 306/* #define RADEON_PCIE_INDEX 0x0030 */
302/* #define RADEON_PCIE_DATA 0x0034 */ 307/* #define RADEON_PCIE_DATA 0x0034 */
@@ -3311,6 +3316,7 @@
3311#define RADEON_AIC_CNTL 0x01d0 3316#define RADEON_AIC_CNTL 0x01d0
3312# define RADEON_PCIGART_TRANSLATE_EN (1 << 0) 3317# define RADEON_PCIGART_TRANSLATE_EN (1 << 0)
3313# define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1) 3318# define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1)
3319# define RS400_MSI_REARM (1 << 3) /* rs400/rs480 */
3314#define RADEON_AIC_LO_ADDR 0x01dc 3320#define RADEON_AIC_LO_ADDR 0x01dc
3315#define RADEON_AIC_PT_BASE 0x01d8 3321#define RADEON_AIC_PT_BASE 0x01d8
3316#define RADEON_AIC_HI_ADDR 0x01e0 3322#define RADEON_AIC_HI_ADDR 0x01e0
diff --git a/drivers/gpu/drm/radeon/radeon_test.c b/drivers/gpu/drm/radeon/radeon_test.c
index 03c33cf4e14c..f8a465d9a1cf 100644
--- a/drivers/gpu/drm/radeon/radeon_test.c
+++ b/drivers/gpu/drm/radeon/radeon_test.c
@@ -42,7 +42,7 @@ void radeon_test_moves(struct radeon_device *rdev)
42 /* Number of tests = 42 /* Number of tests =
43 * (Total GTT - IB pool - writeback page - ring buffer) / test size 43 * (Total GTT - IB pool - writeback page - ring buffer) / test size
44 */ 44 */
45 n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - 4096 - 45 n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - RADEON_GPU_PAGE_SIZE -
46 rdev->cp.ring_size) / size; 46 rdev->cp.ring_size) / size;
47 47
48 gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); 48 gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
@@ -102,7 +102,7 @@ void radeon_test_moves(struct radeon_device *rdev)
102 goto out_cleanup; 102 goto out_cleanup;
103 } 103 }
104 104
105 r = radeon_copy(rdev, gtt_addr, vram_addr, size / 4096, fence); 105 r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence);
106 if (r) { 106 if (r) {
107 DRM_ERROR("Failed GTT->VRAM copy %d\n", i); 107 DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
108 goto out_cleanup; 108 goto out_cleanup;
@@ -145,7 +145,7 @@ void radeon_test_moves(struct radeon_device *rdev)
145 goto out_cleanup; 145 goto out_cleanup;
146 } 146 }
147 147
148 r = radeon_copy(rdev, vram_addr, gtt_addr, size / 4096, fence); 148 r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence);
149 if (r) { 149 if (r) {
150 DRM_ERROR("Failed VRAM->GTT copy %d\n", i); 150 DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
151 goto out_cleanup; 151 goto out_cleanup;
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 765bd184b6fc..1381e06d6af3 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -295,6 +295,12 @@ static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
295 if (unlikely(r)) { 295 if (unlikely(r)) {
296 return r; 296 return r;
297 } 297 }
298
299 r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
300 if (unlikely(r)) {
301 goto out_cleanup;
302 }
303
298 r = ttm_tt_bind(bo->ttm, &tmp_mem); 304 r = ttm_tt_bind(bo->ttm, &tmp_mem);
299 if (unlikely(r)) { 305 if (unlikely(r)) {
300 goto out_cleanup; 306 goto out_cleanup;
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index a769c296f6a6..ca037160a582 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -418,6 +418,8 @@ int rs400_resume(struct radeon_device *rdev)
418 rs400_gart_disable(rdev); 418 rs400_gart_disable(rdev);
419 /* Resume clock before doing reset */ 419 /* Resume clock before doing reset */
420 r300_clock_startup(rdev); 420 r300_clock_startup(rdev);
421 /* setup MC before calling post tables */
422 rs400_mc_program(rdev);
421 /* Reset gpu before posting otherwise ATOM will enter infinite loop */ 423 /* Reset gpu before posting otherwise ATOM will enter infinite loop */
422 if (radeon_gpu_reset(rdev)) { 424 if (radeon_gpu_reset(rdev)) {
423 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", 425 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 10dfa78762da..5f117cd8736a 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -242,7 +242,7 @@ void rs600_irq_disable(struct radeon_device *rdev)
242 242
243int rs600_irq_process(struct radeon_device *rdev) 243int rs600_irq_process(struct radeon_device *rdev)
244{ 244{
245 uint32_t status; 245 uint32_t status, msi_rearm;
246 uint32_t r500_disp_int; 246 uint32_t r500_disp_int;
247 247
248 status = rs600_irq_ack(rdev, &r500_disp_int); 248 status = rs600_irq_ack(rdev, &r500_disp_int);
@@ -260,6 +260,22 @@ int rs600_irq_process(struct radeon_device *rdev)
260 drm_handle_vblank(rdev->ddev, 1); 260 drm_handle_vblank(rdev->ddev, 1);
261 status = rs600_irq_ack(rdev, &r500_disp_int); 261 status = rs600_irq_ack(rdev, &r500_disp_int);
262 } 262 }
263 if (rdev->msi_enabled) {
264 switch (rdev->family) {
265 case CHIP_RS600:
266 case CHIP_RS690:
267 case CHIP_RS740:
268 msi_rearm = RREG32(RADEON_BUS_CNTL) & ~RS600_MSI_REARM;
269 WREG32(RADEON_BUS_CNTL, msi_rearm);
270 WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM);
271 break;
272 default:
273 msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN;
274 WREG32(RADEON_MSI_REARM_EN, msi_rearm);
275 WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
276 break;
277 }
278 }
263 return IRQ_HANDLED; 279 return IRQ_HANDLED;
264} 280}
265 281
@@ -472,6 +488,8 @@ int rs600_init(struct radeon_device *rdev)
472 } 488 }
473 /* Initialize clocks */ 489 /* Initialize clocks */
474 radeon_get_clock_info(rdev->ddev); 490 radeon_get_clock_info(rdev->ddev);
491 /* Initialize power management */
492 radeon_pm_init(rdev);
475 /* Get vram informations */ 493 /* Get vram informations */
476 rs600_vram_info(rdev); 494 rs600_vram_info(rdev);
477 /* Initialize memory controller (also test AGP) */ 495 /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 025e3225346c..27547175cf93 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -706,6 +706,8 @@ int rs690_init(struct radeon_device *rdev)
706 } 706 }
707 /* Initialize clocks */ 707 /* Initialize clocks */
708 radeon_get_clock_info(rdev->ddev); 708 radeon_get_clock_info(rdev->ddev);
709 /* Initialize power management */
710 radeon_pm_init(rdev);
709 /* Get vram informations */ 711 /* Get vram informations */
710 rs690_vram_info(rdev); 712 rs690_vram_info(rdev);
711 /* Initialize memory controller (also test AGP) */ 713 /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 41a34c23e6d8..7935f793bf62 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -137,6 +137,8 @@ int rv515_mc_wait_for_idle(struct radeon_device *rdev)
137 137
138void rv515_vga_render_disable(struct radeon_device *rdev) 138void rv515_vga_render_disable(struct radeon_device *rdev)
139{ 139{
140 WREG32(R_000330_D1VGA_CONTROL, 0);
141 WREG32(R_000338_D2VGA_CONTROL, 0);
140 WREG32(R_000300_VGA_RENDER_CONTROL, 142 WREG32(R_000300_VGA_RENDER_CONTROL,
141 RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL); 143 RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL);
142} 144}
@@ -585,6 +587,8 @@ int rv515_init(struct radeon_device *rdev)
585 } 587 }
586 /* Initialize clocks */ 588 /* Initialize clocks */
587 radeon_get_clock_info(rdev->ddev); 589 radeon_get_clock_info(rdev->ddev);
590 /* Initialize power management */
591 radeon_pm_init(rdev);
588 /* Get vram informations */ 592 /* Get vram informations */
589 rv515_vram_info(rdev); 593 rv515_vram_info(rdev);
590 /* Initialize memory controller (also test AGP) */ 594 /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 595ac638039d..b0efd0ddae7a 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -529,11 +529,11 @@ static void rv770_gpu_init(struct radeon_device *rdev)
529 if (rdev->family == CHIP_RV770) 529 if (rdev->family == CHIP_RV770)
530 gb_tiling_config |= BANK_TILING(1); 530 gb_tiling_config |= BANK_TILING(1);
531 else 531 else
532 gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_SHIFT) >> NOOFBANK_MASK); 532 gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
533 533
534 gb_tiling_config |= GROUP_SIZE(0); 534 gb_tiling_config |= GROUP_SIZE(0);
535 535
536 if (((mc_arb_ramcfg & NOOFROWS_MASK) & NOOFROWS_SHIFT) > 3) { 536 if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) {
537 gb_tiling_config |= ROW_TILING(3); 537 gb_tiling_config |= ROW_TILING(3);
538 gb_tiling_config |= SAMPLE_SPLIT(3); 538 gb_tiling_config |= SAMPLE_SPLIT(3);
539 } else { 539 } else {
@@ -579,14 +579,14 @@ static void rv770_gpu_init(struct radeon_device *rdev)
579 579
580 /* set HW defaults for 3D engine */ 580 /* set HW defaults for 3D engine */
581 WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) | 581 WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) |
582 ROQ_IB2_START(0x2b))); 582 ROQ_IB2_START(0x2b)));
583 583
584 WREG32(CP_MEQ_THRESHOLDS, STQ_SPLIT(0x30)); 584 WREG32(CP_MEQ_THRESHOLDS, STQ_SPLIT(0x30));
585 585
586 WREG32(TA_CNTL_AUX, (DISABLE_CUBE_ANISO | 586 WREG32(TA_CNTL_AUX, (DISABLE_CUBE_ANISO |
587 SYNC_GRADIENT | 587 SYNC_GRADIENT |
588 SYNC_WALKER | 588 SYNC_WALKER |
589 SYNC_ALIGNER)); 589 SYNC_ALIGNER));
590 590
591 sx_debug_1 = RREG32(SX_DEBUG_1); 591 sx_debug_1 = RREG32(SX_DEBUG_1);
592 sx_debug_1 |= ENABLE_NEW_SMX_ADDRESS; 592 sx_debug_1 |= ENABLE_NEW_SMX_ADDRESS;
@@ -598,9 +598,9 @@ static void rv770_gpu_init(struct radeon_device *rdev)
598 WREG32(SMX_DC_CTL0, smx_dc_ctl0); 598 WREG32(SMX_DC_CTL0, smx_dc_ctl0);
599 599
600 WREG32(SMX_EVENT_CTL, (ES_FLUSH_CTL(4) | 600 WREG32(SMX_EVENT_CTL, (ES_FLUSH_CTL(4) |
601 GS_FLUSH_CTL(4) | 601 GS_FLUSH_CTL(4) |
602 ACK_FLUSH_CTL(3) | 602 ACK_FLUSH_CTL(3) |
603 SYNC_FLUSH_CTL)); 603 SYNC_FLUSH_CTL));
604 604
605 if (rdev->family == CHIP_RV770) 605 if (rdev->family == CHIP_RV770)
606 WREG32(DB_DEBUG3, DB_CLK_OFF_DELAY(0x1f)); 606 WREG32(DB_DEBUG3, DB_CLK_OFF_DELAY(0x1f));
@@ -611,12 +611,12 @@ static void rv770_gpu_init(struct radeon_device *rdev)
611 } 611 }
612 612
613 WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.rv770.sx_max_export_size / 4) - 1) | 613 WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.rv770.sx_max_export_size / 4) - 1) |
614 POSITION_BUFFER_SIZE((rdev->config.rv770.sx_max_export_pos_size / 4) - 1) | 614 POSITION_BUFFER_SIZE((rdev->config.rv770.sx_max_export_pos_size / 4) - 1) |
615 SMX_BUFFER_SIZE((rdev->config.rv770.sx_max_export_smx_size / 4) - 1))); 615 SMX_BUFFER_SIZE((rdev->config.rv770.sx_max_export_smx_size / 4) - 1)));
616 616
617 WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.rv770.sc_prim_fifo_size) | 617 WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.rv770.sc_prim_fifo_size) |
618 SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) | 618 SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) |
619 SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_earlyz_tile_fifo_fize))); 619 SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_earlyz_tile_fifo_fize)));
620 620
621 WREG32(PA_SC_MULTI_CHIP_CNTL, 0); 621 WREG32(PA_SC_MULTI_CHIP_CNTL, 0);
622 622
@@ -774,14 +774,36 @@ int rv770_mc_init(struct radeon_device *rdev)
774{ 774{
775 fixed20_12 a; 775 fixed20_12 a;
776 u32 tmp; 776 u32 tmp;
777 int chansize, numchan;
777 int r; 778 int r;
778 779
779 /* Get VRAM informations */ 780 /* Get VRAM informations */
780 /* FIXME: Don't know how to determine vram width, need to check
781 * vram_width usage
782 */
783 rdev->mc.vram_width = 128;
784 rdev->mc.vram_is_ddr = true; 781 rdev->mc.vram_is_ddr = true;
782 tmp = RREG32(MC_ARB_RAMCFG);
783 if (tmp & CHANSIZE_OVERRIDE) {
784 chansize = 16;
785 } else if (tmp & CHANSIZE_MASK) {
786 chansize = 64;
787 } else {
788 chansize = 32;
789 }
790 tmp = RREG32(MC_SHARED_CHMAP);
791 switch ((tmp & NOOFCHAN_MASK) >> NOOFCHAN_SHIFT) {
792 case 0:
793 default:
794 numchan = 1;
795 break;
796 case 1:
797 numchan = 2;
798 break;
799 case 2:
800 numchan = 4;
801 break;
802 case 3:
803 numchan = 8;
804 break;
805 }
806 rdev->mc.vram_width = numchan * chansize;
785 /* Could aper size report 0 ? */ 807 /* Could aper size report 0 ? */
786 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 808 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
787 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 809 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
@@ -961,10 +983,13 @@ int rv770_init(struct radeon_device *rdev)
961 r600_scratch_init(rdev); 983 r600_scratch_init(rdev);
962 /* Initialize surface registers */ 984 /* Initialize surface registers */
963 radeon_surface_init(rdev); 985 radeon_surface_init(rdev);
986 /* Initialize clocks */
964 radeon_get_clock_info(rdev->ddev); 987 radeon_get_clock_info(rdev->ddev);
965 r = radeon_clocks_init(rdev); 988 r = radeon_clocks_init(rdev);
966 if (r) 989 if (r)
967 return r; 990 return r;
991 /* Initialize power management */
992 radeon_pm_init(rdev);
968 /* Fence driver */ 993 /* Fence driver */
969 r = radeon_fence_driver_init(rdev); 994 r = radeon_fence_driver_init(rdev);
970 if (r) 995 if (r)
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index 4b9c3d6396ff..a1367ab6f261 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -129,6 +129,10 @@
129#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0 129#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0
130#define HDP_TILING_CONFIG 0x2F3C 130#define HDP_TILING_CONFIG 0x2F3C
131 131
132#define MC_SHARED_CHMAP 0x2004
133#define NOOFCHAN_SHIFT 12
134#define NOOFCHAN_MASK 0x00003000
135
132#define MC_ARB_RAMCFG 0x2760 136#define MC_ARB_RAMCFG 0x2760
133#define NOOFBANK_SHIFT 0 137#define NOOFBANK_SHIFT 0
134#define NOOFBANK_MASK 0x00000003 138#define NOOFBANK_MASK 0x00000003
@@ -142,6 +146,7 @@
142#define CHANSIZE_MASK 0x00000100 146#define CHANSIZE_MASK 0x00000100
143#define BURSTLENGTH_SHIFT 9 147#define BURSTLENGTH_SHIFT 9
144#define BURSTLENGTH_MASK 0x00000200 148#define BURSTLENGTH_MASK 0x00000200
149#define CHANSIZE_OVERRIDE (1 << 11)
145#define MC_VM_AGP_TOP 0x2028 150#define MC_VM_AGP_TOP 0x2028
146#define MC_VM_AGP_BOT 0x202C 151#define MC_VM_AGP_BOT 0x202C
147#define MC_VM_AGP_BASE 0x2030 152#define MC_VM_AGP_BASE 0x2030
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index a55ee1a56c16..7bcb89f39ce8 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/gpu/drm/ttm/ttm_tt.c
@@ -279,6 +279,7 @@ int ttm_tt_set_placement_caching(struct ttm_tt *ttm, uint32_t placement)
279 279
280 return ttm_tt_set_caching(ttm, state); 280 return ttm_tt_set_caching(ttm, state);
281} 281}
282EXPORT_SYMBOL(ttm_tt_set_placement_caching);
282 283
283static void ttm_tt_free_alloced_pages(struct ttm_tt *ttm) 284static void ttm_tt_free_alloced_pages(struct ttm_tt *ttm)
284{ 285{
diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c
index d39877a7da63..b5a95193c694 100644
--- a/drivers/hwmon/adt7475.c
+++ b/drivers/hwmon/adt7475.c
@@ -350,8 +350,7 @@ static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
350 350
351 case FAULT: 351 case FAULT:
352 /* Note - only for remote1 and remote2 */ 352 /* Note - only for remote1 and remote2 */
353 out = data->alarms & (sattr->index ? 0x8000 : 0x4000); 353 out = !!(data->alarms & (sattr->index ? 0x8000 : 0x4000));
354 out = out ? 0 : 1;
355 break; 354 break;
356 355
357 default: 356 default:
@@ -863,7 +862,7 @@ static SENSOR_DEVICE_ATTR_2(pwm1_freq, S_IRUGO | S_IWUSR, show_pwmfreq,
863 set_pwmfreq, INPUT, 0); 862 set_pwmfreq, INPUT, 0);
864static SENSOR_DEVICE_ATTR_2(pwm1_enable, S_IRUGO | S_IWUSR, show_pwmctrl, 863static SENSOR_DEVICE_ATTR_2(pwm1_enable, S_IRUGO | S_IWUSR, show_pwmctrl,
865 set_pwmctrl, INPUT, 0); 864 set_pwmctrl, INPUT, 0);
866static SENSOR_DEVICE_ATTR_2(pwm1_auto_channel_temp, S_IRUGO | S_IWUSR, 865static SENSOR_DEVICE_ATTR_2(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR,
867 show_pwmchan, set_pwmchan, INPUT, 0); 866 show_pwmchan, set_pwmchan, INPUT, 0);
868static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm, 867static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm,
869 set_pwm, MIN, 0); 868 set_pwm, MIN, 0);
@@ -875,7 +874,7 @@ static SENSOR_DEVICE_ATTR_2(pwm2_freq, S_IRUGO | S_IWUSR, show_pwmfreq,
875 set_pwmfreq, INPUT, 1); 874 set_pwmfreq, INPUT, 1);
876static SENSOR_DEVICE_ATTR_2(pwm2_enable, S_IRUGO | S_IWUSR, show_pwmctrl, 875static SENSOR_DEVICE_ATTR_2(pwm2_enable, S_IRUGO | S_IWUSR, show_pwmctrl,
877 set_pwmctrl, INPUT, 1); 876 set_pwmctrl, INPUT, 1);
878static SENSOR_DEVICE_ATTR_2(pwm2_auto_channel_temp, S_IRUGO | S_IWUSR, 877static SENSOR_DEVICE_ATTR_2(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR,
879 show_pwmchan, set_pwmchan, INPUT, 1); 878 show_pwmchan, set_pwmchan, INPUT, 1);
880static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm, 879static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm,
881 set_pwm, MIN, 1); 880 set_pwm, MIN, 1);
@@ -887,7 +886,7 @@ static SENSOR_DEVICE_ATTR_2(pwm3_freq, S_IRUGO | S_IWUSR, show_pwmfreq,
887 set_pwmfreq, INPUT, 2); 886 set_pwmfreq, INPUT, 2);
888static SENSOR_DEVICE_ATTR_2(pwm3_enable, S_IRUGO | S_IWUSR, show_pwmctrl, 887static SENSOR_DEVICE_ATTR_2(pwm3_enable, S_IRUGO | S_IWUSR, show_pwmctrl,
889 set_pwmctrl, INPUT, 2); 888 set_pwmctrl, INPUT, 2);
890static SENSOR_DEVICE_ATTR_2(pwm3_auto_channel_temp, S_IRUGO | S_IWUSR, 889static SENSOR_DEVICE_ATTR_2(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR,
891 show_pwmchan, set_pwmchan, INPUT, 2); 890 show_pwmchan, set_pwmchan, INPUT, 2);
892static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm, 891static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm,
893 set_pwm, MIN, 2); 892 set_pwm, MIN, 2);
@@ -947,19 +946,19 @@ static struct attribute *adt7475_attrs[] = {
947 &sensor_dev_attr_pwm1.dev_attr.attr, 946 &sensor_dev_attr_pwm1.dev_attr.attr,
948 &sensor_dev_attr_pwm1_freq.dev_attr.attr, 947 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
949 &sensor_dev_attr_pwm1_enable.dev_attr.attr, 948 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
950 &sensor_dev_attr_pwm1_auto_channel_temp.dev_attr.attr, 949 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
951 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, 950 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
952 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, 951 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
953 &sensor_dev_attr_pwm2.dev_attr.attr, 952 &sensor_dev_attr_pwm2.dev_attr.attr,
954 &sensor_dev_attr_pwm2_freq.dev_attr.attr, 953 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
955 &sensor_dev_attr_pwm2_enable.dev_attr.attr, 954 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
956 &sensor_dev_attr_pwm2_auto_channel_temp.dev_attr.attr, 955 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
957 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, 956 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
958 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, 957 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
959 &sensor_dev_attr_pwm3.dev_attr.attr, 958 &sensor_dev_attr_pwm3.dev_attr.attr,
960 &sensor_dev_attr_pwm3_freq.dev_attr.attr, 959 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
961 &sensor_dev_attr_pwm3_enable.dev_attr.attr, 960 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
962 &sensor_dev_attr_pwm3_auto_channel_temp.dev_attr.attr, 961 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
963 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, 962 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
964 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, 963 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
965 NULL, 964 NULL,
@@ -1152,7 +1151,7 @@ static struct adt7475_data *adt7475_update_device(struct device *dev)
1152 } 1151 }
1153 1152
1154 /* Limits and settings, should never change update every 60 seconds */ 1153 /* Limits and settings, should never change update every 60 seconds */
1155 if (time_after(jiffies, data->limits_updated + HZ * 2) || 1154 if (time_after(jiffies, data->limits_updated + HZ * 60) ||
1156 !data->valid) { 1155 !data->valid) {
1157 data->config5 = adt7475_read(REG_CONFIG5); 1156 data->config5 = adt7475_read(REG_CONFIG5);
1158 1157
diff --git a/drivers/hwmon/s3c-hwmon.c b/drivers/hwmon/s3c-hwmon.c
index 3a524f2fe493..71835412529f 100644
--- a/drivers/hwmon/s3c-hwmon.c
+++ b/drivers/hwmon/s3c-hwmon.c
@@ -323,14 +323,21 @@ static int __devinit s3c_hwmon_probe(struct platform_device *dev)
323 } 323 }
324 324
325 for (i = 0; i < ARRAY_SIZE(pdata->in); i++) { 325 for (i = 0; i < ARRAY_SIZE(pdata->in); i++) {
326 if (!pdata->in[i]) 326 struct s3c24xx_adc_hwmon_incfg *cfg = pdata->in[i];
327
328 if (!cfg)
327 continue; 329 continue;
328 330
329 if (pdata->in[i]->mult >= 0x10000) 331 if (cfg->mult >= 0x10000)
330 dev_warn(&dev->dev, 332 dev_warn(&dev->dev,
331 "channel %d multiplier too large\n", 333 "channel %d multiplier too large\n",
332 i); 334 i);
333 335
336 if (cfg->divider == 0) {
337 dev_err(&dev->dev, "channel %d divider zero\n", i);
338 continue;
339 }
340
334 ret = s3c_hwmon_create_attr(&dev->dev, pdata->in[i], 341 ret = s3c_hwmon_create_attr(&dev->dev, pdata->in[i],
335 &hwmon->attrs[i], i); 342 &hwmon->attrs[i], i);
336 if (ret) { 343 if (ret) {
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 737335ff2b21..e8fe7f169e25 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -128,7 +128,7 @@ config I2C_PIIX4
128 ATI SB600 128 ATI SB600
129 ATI SB700 129 ATI SB700
130 ATI SB800 130 ATI SB800
131 AMD SB900 131 AMD Hudson-2
132 Serverworks OSB4 132 Serverworks OSB4
133 Serverworks CSB5 133 Serverworks CSB5
134 Serverworks CSB6 134 Serverworks CSB6
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index d26a972aacaa..1e245e9cad31 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -22,7 +22,7 @@
22 Intel PIIX4, 440MX 22 Intel PIIX4, 440MX
23 Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100 23 Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100
24 ATI IXP200, IXP300, IXP400, SB600, SB700, SB800 24 ATI IXP200, IXP300, IXP400, SB600, SB700, SB800
25 AMD SB900 25 AMD Hudson-2
26 SMSC Victory66 26 SMSC Victory66
27 27
28 Note: we assume there can only be one device, with one SMBus interface. 28 Note: we assume there can only be one device, with one SMBus interface.
@@ -233,9 +233,9 @@ static int __devinit piix4_setup_sb800(struct pci_dev *PIIX4_dev,
233 unsigned short smba_idx = 0xcd6; 233 unsigned short smba_idx = 0xcd6;
234 u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c; 234 u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c;
235 235
236 /* SB800 SMBus does not support forcing address */ 236 /* SB800 and later SMBus does not support forcing address */
237 if (force || force_addr) { 237 if (force || force_addr) {
238 dev_err(&PIIX4_dev->dev, "SB800 SMBus does not support " 238 dev_err(&PIIX4_dev->dev, "SMBus does not support "
239 "forcing address!\n"); 239 "forcing address!\n");
240 return -EINVAL; 240 return -EINVAL;
241 } 241 }
@@ -480,7 +480,7 @@ static struct pci_device_id piix4_ids[] = {
480 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) }, 480 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
481 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) }, 481 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
482 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) }, 482 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
483 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_SB900_SMBUS) }, 483 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) },
484 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 484 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
485 PCI_DEVICE_ID_SERVERWORKS_OSB4) }, 485 PCI_DEVICE_ID_SERVERWORKS_OSB4) },
486 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 486 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index 63c53d65e875..4d76ba473097 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -1046,15 +1046,6 @@ static void ide_port_init_devices(ide_hwif_t *hwif)
1046 if (port_ops && port_ops->init_dev) 1046 if (port_ops && port_ops->init_dev)
1047 port_ops->init_dev(drive); 1047 port_ops->init_dev(drive);
1048 } 1048 }
1049
1050 ide_port_for_each_dev(i, drive, hwif) {
1051 /*
1052 * default to PIO Mode 0 before we figure out
1053 * the most suited mode for the attached device
1054 */
1055 if (port_ops && port_ops->set_pio_mode)
1056 port_ops->set_pio_mode(drive, 0);
1057 }
1058} 1049}
1059 1050
1060static void ide_init_port(ide_hwif_t *hwif, unsigned int port, 1051static void ide_init_port(ide_hwif_t *hwif, unsigned int port,
diff --git a/drivers/input/ff-core.c b/drivers/input/ff-core.c
index 72c63e5dd630..38df81fcdc3a 100644
--- a/drivers/input/ff-core.c
+++ b/drivers/input/ff-core.c
@@ -337,16 +337,16 @@ int input_ff_create(struct input_dev *dev, int max_effects)
337 dev->ff = ff; 337 dev->ff = ff;
338 dev->flush = flush_effects; 338 dev->flush = flush_effects;
339 dev->event = input_ff_event; 339 dev->event = input_ff_event;
340 set_bit(EV_FF, dev->evbit); 340 __set_bit(EV_FF, dev->evbit);
341 341
342 /* Copy "true" bits into ff device bitmap */ 342 /* Copy "true" bits into ff device bitmap */
343 for (i = 0; i <= FF_MAX; i++) 343 for (i = 0; i <= FF_MAX; i++)
344 if (test_bit(i, dev->ffbit)) 344 if (test_bit(i, dev->ffbit))
345 set_bit(i, ff->ffbit); 345 __set_bit(i, ff->ffbit);
346 346
347 /* we can emulate RUMBLE with periodic effects */ 347 /* we can emulate RUMBLE with periodic effects */
348 if (test_bit(FF_PERIODIC, ff->ffbit)) 348 if (test_bit(FF_PERIODIC, ff->ffbit))
349 set_bit(FF_RUMBLE, dev->ffbit); 349 __set_bit(FF_RUMBLE, dev->ffbit);
350 350
351 return 0; 351 return 0;
352} 352}
@@ -362,12 +362,14 @@ EXPORT_SYMBOL_GPL(input_ff_create);
362 */ 362 */
363void input_ff_destroy(struct input_dev *dev) 363void input_ff_destroy(struct input_dev *dev)
364{ 364{
365 clear_bit(EV_FF, dev->evbit); 365 struct ff_device *ff = dev->ff;
366 if (dev->ff) { 366
367 if (dev->ff->destroy) 367 __clear_bit(EV_FF, dev->evbit);
368 dev->ff->destroy(dev->ff); 368 if (ff) {
369 kfree(dev->ff->private); 369 if (ff->destroy)
370 kfree(dev->ff); 370 ff->destroy(ff);
371 kfree(ff->private);
372 kfree(ff);
371 dev->ff = NULL; 373 dev->ff = NULL;
372 } 374 }
373} 375}
diff --git a/drivers/input/ff-memless.c b/drivers/input/ff-memless.c
index 2d1415e16834..b483b2995fa9 100644
--- a/drivers/input/ff-memless.c
+++ b/drivers/input/ff-memless.c
@@ -61,7 +61,6 @@ struct ml_device {
61 struct ml_effect_state states[FF_MEMLESS_EFFECTS]; 61 struct ml_effect_state states[FF_MEMLESS_EFFECTS];
62 int gain; 62 int gain;
63 struct timer_list timer; 63 struct timer_list timer;
64 spinlock_t timer_lock;
65 struct input_dev *dev; 64 struct input_dev *dev;
66 65
67 int (*play_effect)(struct input_dev *dev, void *data, 66 int (*play_effect)(struct input_dev *dev, void *data,
@@ -368,38 +367,38 @@ static void ml_effect_timer(unsigned long timer_data)
368{ 367{
369 struct input_dev *dev = (struct input_dev *)timer_data; 368 struct input_dev *dev = (struct input_dev *)timer_data;
370 struct ml_device *ml = dev->ff->private; 369 struct ml_device *ml = dev->ff->private;
370 unsigned long flags;
371 371
372 debug("timer: updating effects"); 372 debug("timer: updating effects");
373 373
374 spin_lock(&ml->timer_lock); 374 spin_lock_irqsave(&dev->event_lock, flags);
375 ml_play_effects(ml); 375 ml_play_effects(ml);
376 spin_unlock(&ml->timer_lock); 376 spin_unlock_irqrestore(&dev->event_lock, flags);
377} 377}
378 378
379/*
380 * Sets requested gain for FF effects. Called with dev->event_lock held.
381 */
379static void ml_ff_set_gain(struct input_dev *dev, u16 gain) 382static void ml_ff_set_gain(struct input_dev *dev, u16 gain)
380{ 383{
381 struct ml_device *ml = dev->ff->private; 384 struct ml_device *ml = dev->ff->private;
382 int i; 385 int i;
383 386
384 spin_lock_bh(&ml->timer_lock);
385
386 ml->gain = gain; 387 ml->gain = gain;
387 388
388 for (i = 0; i < FF_MEMLESS_EFFECTS; i++) 389 for (i = 0; i < FF_MEMLESS_EFFECTS; i++)
389 __clear_bit(FF_EFFECT_PLAYING, &ml->states[i].flags); 390 __clear_bit(FF_EFFECT_PLAYING, &ml->states[i].flags);
390 391
391 ml_play_effects(ml); 392 ml_play_effects(ml);
392
393 spin_unlock_bh(&ml->timer_lock);
394} 393}
395 394
395/*
396 * Start/stop specified FF effect. Called with dev->event_lock held.
397 */
396static int ml_ff_playback(struct input_dev *dev, int effect_id, int value) 398static int ml_ff_playback(struct input_dev *dev, int effect_id, int value)
397{ 399{
398 struct ml_device *ml = dev->ff->private; 400 struct ml_device *ml = dev->ff->private;
399 struct ml_effect_state *state = &ml->states[effect_id]; 401 struct ml_effect_state *state = &ml->states[effect_id];
400 unsigned long flags;
401
402 spin_lock_irqsave(&ml->timer_lock, flags);
403 402
404 if (value > 0) { 403 if (value > 0) {
405 debug("initiated play"); 404 debug("initiated play");
@@ -425,8 +424,6 @@ static int ml_ff_playback(struct input_dev *dev, int effect_id, int value)
425 ml_play_effects(ml); 424 ml_play_effects(ml);
426 } 425 }
427 426
428 spin_unlock_irqrestore(&ml->timer_lock, flags);
429
430 return 0; 427 return 0;
431} 428}
432 429
@@ -436,7 +433,7 @@ static int ml_ff_upload(struct input_dev *dev,
436 struct ml_device *ml = dev->ff->private; 433 struct ml_device *ml = dev->ff->private;
437 struct ml_effect_state *state = &ml->states[effect->id]; 434 struct ml_effect_state *state = &ml->states[effect->id];
438 435
439 spin_lock_bh(&ml->timer_lock); 436 spin_lock_irq(&dev->event_lock);
440 437
441 if (test_bit(FF_EFFECT_STARTED, &state->flags)) { 438 if (test_bit(FF_EFFECT_STARTED, &state->flags)) {
442 __clear_bit(FF_EFFECT_PLAYING, &state->flags); 439 __clear_bit(FF_EFFECT_PLAYING, &state->flags);
@@ -448,7 +445,7 @@ static int ml_ff_upload(struct input_dev *dev,
448 ml_schedule_timer(ml); 445 ml_schedule_timer(ml);
449 } 446 }
450 447
451 spin_unlock_bh(&ml->timer_lock); 448 spin_unlock_irq(&dev->event_lock);
452 449
453 return 0; 450 return 0;
454} 451}
@@ -482,7 +479,6 @@ int input_ff_create_memless(struct input_dev *dev, void *data,
482 ml->private = data; 479 ml->private = data;
483 ml->play_effect = play_effect; 480 ml->play_effect = play_effect;
484 ml->gain = 0xffff; 481 ml->gain = 0xffff;
485 spin_lock_init(&ml->timer_lock);
486 setup_timer(&ml->timer, ml_effect_timer, (unsigned long)dev); 482 setup_timer(&ml->timer, ml_effect_timer, (unsigned long)dev);
487 483
488 set_bit(FF_GAIN, dev->ffbit); 484 set_bit(FF_GAIN, dev->ffbit);
diff --git a/drivers/input/input.c b/drivers/input/input.c
index cc763c96fada..2266ecbfbc01 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -1292,17 +1292,24 @@ static int input_dev_uevent(struct device *device, struct kobj_uevent_env *env)
1292 return 0; 1292 return 0;
1293} 1293}
1294 1294
1295#define INPUT_DO_TOGGLE(dev, type, bits, on) \ 1295#define INPUT_DO_TOGGLE(dev, type, bits, on) \
1296 do { \ 1296 do { \
1297 int i; \ 1297 int i; \
1298 if (!test_bit(EV_##type, dev->evbit)) \ 1298 bool active; \
1299 break; \ 1299 \
1300 for (i = 0; i < type##_MAX; i++) { \ 1300 if (!test_bit(EV_##type, dev->evbit)) \
1301 if (!test_bit(i, dev->bits##bit) || \ 1301 break; \
1302 !test_bit(i, dev->bits)) \ 1302 \
1303 continue; \ 1303 for (i = 0; i < type##_MAX; i++) { \
1304 dev->event(dev, EV_##type, i, on); \ 1304 if (!test_bit(i, dev->bits##bit)) \
1305 } \ 1305 continue; \
1306 \
1307 active = test_bit(i, dev->bits); \
1308 if (!active && !on) \
1309 continue; \
1310 \
1311 dev->event(dev, EV_##type, i, on ? active : 0); \
1312 } \
1306 } while (0) 1313 } while (0)
1307 1314
1308#ifdef CONFIG_PM 1315#ifdef CONFIG_PM
diff --git a/drivers/input/keyboard/atkbd.c b/drivers/input/keyboard/atkbd.c
index 4452eabbee6d..28e6110d1ff8 100644
--- a/drivers/input/keyboard/atkbd.c
+++ b/drivers/input/keyboard/atkbd.c
@@ -1174,6 +1174,18 @@ static int atkbd_reconnect(struct serio *serio)
1174 return -1; 1174 return -1;
1175 1175
1176 atkbd_activate(atkbd); 1176 atkbd_activate(atkbd);
1177
1178 /*
1179 * Restore LED state and repeat rate. While input core
1180 * will do this for us at resume time reconnect may happen
1181 * because user requested it via sysfs or simply because
1182 * keyboard was unplugged and plugged in again so we need
1183 * to do it ourselves here.
1184 */
1185 atkbd_set_leds(atkbd);
1186 if (!atkbd->softrepeat)
1187 atkbd_set_repeat_rate(atkbd);
1188
1177 } 1189 }
1178 1190
1179 atkbd_enable(atkbd); 1191 atkbd_enable(atkbd);
@@ -1422,6 +1434,7 @@ static ssize_t atkbd_set_set(struct atkbd *atkbd, const char *buf, size_t count)
1422 1434
1423 atkbd->dev = new_dev; 1435 atkbd->dev = new_dev;
1424 atkbd->set = atkbd_select_set(atkbd, value, atkbd->extra); 1436 atkbd->set = atkbd_select_set(atkbd, value, atkbd->extra);
1437 atkbd_reset_state(atkbd);
1425 atkbd_activate(atkbd); 1438 atkbd_activate(atkbd);
1426 atkbd_set_keycode_table(atkbd); 1439 atkbd_set_keycode_table(atkbd);
1427 atkbd_set_device_attrs(atkbd); 1440 atkbd_set_device_attrs(atkbd);
diff --git a/drivers/input/mouse/lifebook.c b/drivers/input/mouse/lifebook.c
index 5e6308694408..82811558ec33 100644
--- a/drivers/input/mouse/lifebook.c
+++ b/drivers/input/mouse/lifebook.c
@@ -107,8 +107,7 @@ static const struct dmi_system_id lifebook_dmi_table[] = {
107 .matches = { 107 .matches = {
108 DMI_MATCH(DMI_PRODUCT_NAME, "CF-72"), 108 DMI_MATCH(DMI_PRODUCT_NAME, "CF-72"),
109 }, 109 },
110 .callback = lifebook_set_serio_phys, 110 .callback = lifebook_set_6byte_proto,
111 .driver_data = "isa0060/serio3",
112 }, 111 },
113 { 112 {
114 .ident = "Lifebook B142", 113 .ident = "Lifebook B142",
diff --git a/drivers/input/mouse/psmouse-base.c b/drivers/input/mouse/psmouse-base.c
index 690aed905436..07c53798301a 100644
--- a/drivers/input/mouse/psmouse-base.c
+++ b/drivers/input/mouse/psmouse-base.c
@@ -581,7 +581,7 @@ static int cortron_detect(struct psmouse *psmouse, bool set_properties)
581static int psmouse_extensions(struct psmouse *psmouse, 581static int psmouse_extensions(struct psmouse *psmouse,
582 unsigned int max_proto, bool set_properties) 582 unsigned int max_proto, bool set_properties)
583{ 583{
584 bool synaptics_hardware = true; 584 bool synaptics_hardware = false;
585 585
586/* 586/*
587 * We always check for lifebook because it does not disturb mouse 587 * We always check for lifebook because it does not disturb mouse
@@ -1673,7 +1673,7 @@ static int psmouse_get_maxproto(char *buffer, struct kernel_param *kp)
1673{ 1673{
1674 int type = *((unsigned int *)kp->arg); 1674 int type = *((unsigned int *)kp->arg);
1675 1675
1676 return sprintf(buffer, "%s\n", psmouse_protocol_by_type(type)->name); 1676 return sprintf(buffer, "%s", psmouse_protocol_by_type(type)->name);
1677} 1677}
1678 1678
1679static int __init psmouse_init(void) 1679static int __init psmouse_init(void)
diff --git a/drivers/isdn/hardware/eicon/maintidi.c b/drivers/isdn/hardware/eicon/maintidi.c
index 23960cb6eaab..41c26e756452 100644
--- a/drivers/isdn/hardware/eicon/maintidi.c
+++ b/drivers/isdn/hardware/eicon/maintidi.c
@@ -959,8 +959,9 @@ static int process_idi_event (diva_strace_context_t* pLib,
959 } 959 }
960 if (!strncmp("State\\Layer2 No1", path, pVar->path_length)) { 960 if (!strncmp("State\\Layer2 No1", path, pVar->path_length)) {
961 char* tmp = &pLib->lines[0].pInterface->Layer2[0]; 961 char* tmp = &pLib->lines[0].pInterface->Layer2[0];
962 dword l2_state; 962 dword l2_state;
963 diva_strace_read_uint (pVar, &l2_state); 963 if (diva_strace_read_uint(pVar, &l2_state))
964 return -1;
964 965
965 switch (l2_state) { 966 switch (l2_state) {
966 case 0: 967 case 0:
diff --git a/drivers/isdn/hardware/eicon/message.c b/drivers/isdn/hardware/eicon/message.c
index 27d5dd68f4fb..ae89fb89da64 100644
--- a/drivers/isdn/hardware/eicon/message.c
+++ b/drivers/isdn/hardware/eicon/message.c
@@ -2692,7 +2692,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
2692 if (!(fax_control_bits & T30_CONTROL_BIT_MORE_DOCUMENTS) 2692 if (!(fax_control_bits & T30_CONTROL_BIT_MORE_DOCUMENTS)
2693 || (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS)) 2693 || (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS))
2694 { 2694 {
2695 len = (byte)(&(((T30_INFO *) 0)->universal_6)); 2695 len = offsetof(T30_INFO, universal_6);
2696 fax_info_change = false; 2696 fax_info_change = false;
2697 if (ncpi->length >= 4) 2697 if (ncpi->length >= 4)
2698 { 2698 {
@@ -2754,7 +2754,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
2754 for (i = 0; i < w; i++) 2754 for (i = 0; i < w; i++)
2755 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id[i] = fax_parms[4].info[1+i]; 2755 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id[i] = fax_parms[4].info[1+i];
2756 ((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0; 2756 ((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0;
2757 len = (byte)(((T30_INFO *) 0)->station_id + 20); 2757 len = offsetof(T30_INFO, station_id) + 20;
2758 w = fax_parms[5].length; 2758 w = fax_parms[5].length;
2759 if (w > 20) 2759 if (w > 20)
2760 w = 20; 2760 w = 20;
@@ -2788,7 +2788,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
2788 } 2788 }
2789 else 2789 else
2790 { 2790 {
2791 len = (byte)(&(((T30_INFO *) 0)->universal_6)); 2791 len = offsetof(T30_INFO, universal_6);
2792 } 2792 }
2793 fax_info_change = true; 2793 fax_info_change = true;
2794 2794
@@ -2892,7 +2892,7 @@ static byte connect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
2892 && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF) 2892 && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF)
2893 && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP)) 2893 && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP))
2894 { 2894 {
2895 len = ((byte)(((T30_INFO *) 0)->station_id + 20)); 2895 len = offsetof(T30_INFO, station_id) + 20;
2896 if (plci->fax_connect_info_length < len) 2896 if (plci->fax_connect_info_length < len)
2897 { 2897 {
2898 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; 2898 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0;
@@ -3802,7 +3802,7 @@ static byte manufacturer_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
3802 break; 3802 break;
3803 } 3803 }
3804 ncpi = &m_parms[1]; 3804 ncpi = &m_parms[1];
3805 len = ((byte)(((T30_INFO *) 0)->station_id + 20)); 3805 len = offsetof(T30_INFO, station_id) + 20;
3806 if (plci->fax_connect_info_length < len) 3806 if (plci->fax_connect_info_length < len)
3807 { 3807 {
3808 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; 3808 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0;
@@ -6844,7 +6844,7 @@ static void nl_ind(PLCI *plci)
6844 if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id-1]) 6844 if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id-1])
6845 & ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD))) 6845 & ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD)))
6846 { 6846 {
6847 i = ((word)(((T30_INFO *) 0)->station_id + 20)) + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len; 6847 i = offsetof(T30_INFO, station_id) + 20 + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len;
6848 while (i < plci->NL.RBuffer->length) 6848 while (i < plci->NL.RBuffer->length)
6849 plci->ncpi_buffer[++len] = plci->NL.RBuffer->P[i++]; 6849 plci->ncpi_buffer[++len] = plci->NL.RBuffer->P[i++];
6850 } 6850 }
@@ -7236,7 +7236,7 @@ static void nl_ind(PLCI *plci)
7236 { 7236 {
7237 plci->RData[1].P = plci->RData[0].P; 7237 plci->RData[1].P = plci->RData[0].P;
7238 plci->RData[1].PLength = plci->RData[0].PLength; 7238 plci->RData[1].PLength = plci->RData[0].PLength;
7239 plci->RData[0].P = v120_header_buffer + (-((int) v120_header_buffer) & 3); 7239 plci->RData[0].P = v120_header_buffer + (-((unsigned long)v120_header_buffer) & 3);
7240 if ((plci->NL.RBuffer->P[0] & V120_HEADER_EXTEND_BIT) || (plci->NL.RLength == 1)) 7240 if ((plci->NL.RBuffer->P[0] & V120_HEADER_EXTEND_BIT) || (plci->NL.RLength == 1))
7241 plci->RData[0].PLength = 1; 7241 plci->RData[0].PLength = 1;
7242 else 7242 else
@@ -8473,7 +8473,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp)
8473 fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING; 8473 fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING;
8474 } 8474 }
8475 len = nlc[0]; 8475 len = nlc[0];
8476 pos = ((byte)(((T30_INFO *) 0)->station_id + 20)); 8476 pos = offsetof(T30_INFO, station_id) + 20;
8477 if (pos < plci->fax_connect_info_length) 8477 if (pos < plci->fax_connect_info_length)
8478 { 8478 {
8479 for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--) 8479 for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--)
@@ -8525,7 +8525,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp)
8525 } 8525 }
8526 8526
8527 PUT_WORD(&(((T30_INFO *)&nlc[1])->control_bits_low), fax_control_bits); 8527 PUT_WORD(&(((T30_INFO *)&nlc[1])->control_bits_low), fax_control_bits);
8528 len = ((byte)(((T30_INFO *) 0)->station_id + 20)); 8528 len = offsetof(T30_INFO, station_id) + 20;
8529 for (i = 0; i < len; i++) 8529 for (i = 0; i < len; i++)
8530 plci->fax_connect_info_buffer[i] = nlc[1+i]; 8530 plci->fax_connect_info_buffer[i] = nlc[1+i];
8531 ((T30_INFO *) plci->fax_connect_info_buffer)->head_line_len = 0; 8531 ((T30_INFO *) plci->fax_connect_info_buffer)->head_line_len = 0;
diff --git a/drivers/isdn/hardware/mISDN/hfcmulti.c b/drivers/isdn/hardware/mISDN/hfcmulti.c
index faed794cf75a..a6624ad252c5 100644
--- a/drivers/isdn/hardware/mISDN/hfcmulti.c
+++ b/drivers/isdn/hardware/mISDN/hfcmulti.c
@@ -5481,7 +5481,7 @@ HFCmulti_init(void)
5481 if (err) { 5481 if (err) {
5482 printk(KERN_ERR "error registering embedded driver: " 5482 printk(KERN_ERR "error registering embedded driver: "
5483 "%x\n", err); 5483 "%x\n", err);
5484 return -err; 5484 return err;
5485 } 5485 }
5486 HFC_cnt++; 5486 HFC_cnt++;
5487 printk(KERN_INFO "%d devices registered\n", HFC_cnt); 5487 printk(KERN_INFO "%d devices registered\n", HFC_cnt);
diff --git a/drivers/isdn/hisax/amd7930_fn.c b/drivers/isdn/hisax/amd7930_fn.c
index bf526a7a63af..d6fdf1f66754 100644
--- a/drivers/isdn/hisax/amd7930_fn.c
+++ b/drivers/isdn/hisax/amd7930_fn.c
@@ -594,6 +594,7 @@ Amd7930_l1hw(struct PStack *st, int pr, void *arg)
594 if (cs->debug & L1_DEB_WARN) 594 if (cs->debug & L1_DEB_WARN)
595 debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen"); 595 debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen");
596 skb_queue_tail(&cs->sq, skb); 596 skb_queue_tail(&cs->sq, skb);
597 spin_unlock_irqrestore(&cs->lock, flags);
597 break; 598 break;
598 } 599 }
599 if (cs->debug & DEB_DLOG_HEX) 600 if (cs->debug & DEB_DLOG_HEX)
diff --git a/drivers/isdn/hisax/diva.c b/drivers/isdn/hisax/diva.c
index 018bd293e580..0b0c2e5d806b 100644
--- a/drivers/isdn/hisax/diva.c
+++ b/drivers/isdn/hisax/diva.c
@@ -382,7 +382,7 @@ MemwaitforXFW(struct IsdnCardState *cs, int hscx)
382{ 382{
383 int to = 50; 383 int to = 50;
384 384
385 while ((!(MemReadHSCX(cs, hscx, HSCX_STAR) & 0x44) == 0x40) && to) { 385 while (((MemReadHSCX(cs, hscx, HSCX_STAR) & 0x44) != 0x40) && to) {
386 udelay(1); 386 udelay(1);
387 to--; 387 to--;
388 } 388 }
diff --git a/drivers/isdn/hisax/elsa_ser.c b/drivers/isdn/hisax/elsa_ser.c
index f181db464392..1657bba7879e 100644
--- a/drivers/isdn/hisax/elsa_ser.c
+++ b/drivers/isdn/hisax/elsa_ser.c
@@ -477,62 +477,62 @@ static void
477modem_set_init(struct IsdnCardState *cs) { 477modem_set_init(struct IsdnCardState *cs) {
478 int timeout; 478 int timeout;
479 479
480#define RCV_DELAY 20000 480#define RCV_DELAY 20
481 modem_write_cmd(cs, MInit_1, strlen(MInit_1)); 481 modem_write_cmd(cs, MInit_1, strlen(MInit_1));
482 timeout = 1000; 482 timeout = 1000;
483 while(timeout-- && cs->hw.elsa.transcnt) 483 while(timeout-- && cs->hw.elsa.transcnt)
484 udelay(1000); 484 udelay(1000);
485 debugl1(cs, "msi tout=%d", timeout); 485 debugl1(cs, "msi tout=%d", timeout);
486 udelay(RCV_DELAY); 486 mdelay(RCV_DELAY);
487 modem_write_cmd(cs, MInit_2, strlen(MInit_2)); 487 modem_write_cmd(cs, MInit_2, strlen(MInit_2));
488 timeout = 1000; 488 timeout = 1000;
489 while(timeout-- && cs->hw.elsa.transcnt) 489 while(timeout-- && cs->hw.elsa.transcnt)
490 udelay(1000); 490 udelay(1000);
491 debugl1(cs, "msi tout=%d", timeout); 491 debugl1(cs, "msi tout=%d", timeout);
492 udelay(RCV_DELAY); 492 mdelay(RCV_DELAY);
493 modem_write_cmd(cs, MInit_3, strlen(MInit_3)); 493 modem_write_cmd(cs, MInit_3, strlen(MInit_3));
494 timeout = 1000; 494 timeout = 1000;
495 while(timeout-- && cs->hw.elsa.transcnt) 495 while(timeout-- && cs->hw.elsa.transcnt)
496 udelay(1000); 496 udelay(1000);
497 debugl1(cs, "msi tout=%d", timeout); 497 debugl1(cs, "msi tout=%d", timeout);
498 udelay(RCV_DELAY); 498 mdelay(RCV_DELAY);
499 modem_write_cmd(cs, MInit_4, strlen(MInit_4)); 499 modem_write_cmd(cs, MInit_4, strlen(MInit_4));
500 timeout = 1000; 500 timeout = 1000;
501 while(timeout-- && cs->hw.elsa.transcnt) 501 while(timeout-- && cs->hw.elsa.transcnt)
502 udelay(1000); 502 udelay(1000);
503 debugl1(cs, "msi tout=%d", timeout); 503 debugl1(cs, "msi tout=%d", timeout);
504 udelay(RCV_DELAY ); 504 mdelay(RCV_DELAY);
505 modem_write_cmd(cs, MInit_5, strlen(MInit_5)); 505 modem_write_cmd(cs, MInit_5, strlen(MInit_5));
506 timeout = 1000; 506 timeout = 1000;
507 while(timeout-- && cs->hw.elsa.transcnt) 507 while(timeout-- && cs->hw.elsa.transcnt)
508 udelay(1000); 508 udelay(1000);
509 debugl1(cs, "msi tout=%d", timeout); 509 debugl1(cs, "msi tout=%d", timeout);
510 udelay(RCV_DELAY); 510 mdelay(RCV_DELAY);
511 modem_write_cmd(cs, MInit_6, strlen(MInit_6)); 511 modem_write_cmd(cs, MInit_6, strlen(MInit_6));
512 timeout = 1000; 512 timeout = 1000;
513 while(timeout-- && cs->hw.elsa.transcnt) 513 while(timeout-- && cs->hw.elsa.transcnt)
514 udelay(1000); 514 udelay(1000);
515 debugl1(cs, "msi tout=%d", timeout); 515 debugl1(cs, "msi tout=%d", timeout);
516 udelay(RCV_DELAY); 516 mdelay(RCV_DELAY);
517 modem_write_cmd(cs, MInit_7, strlen(MInit_7)); 517 modem_write_cmd(cs, MInit_7, strlen(MInit_7));
518 timeout = 1000; 518 timeout = 1000;
519 while(timeout-- && cs->hw.elsa.transcnt) 519 while(timeout-- && cs->hw.elsa.transcnt)
520 udelay(1000); 520 udelay(1000);
521 debugl1(cs, "msi tout=%d", timeout); 521 debugl1(cs, "msi tout=%d", timeout);
522 udelay(RCV_DELAY); 522 mdelay(RCV_DELAY);
523} 523}
524 524
525static void 525static void
526modem_set_dial(struct IsdnCardState *cs, int outgoing) { 526modem_set_dial(struct IsdnCardState *cs, int outgoing) {
527 int timeout; 527 int timeout;
528#define RCV_DELAY 20000 528#define RCV_DELAY 20
529 529
530 modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800)); 530 modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800));
531 timeout = 1000; 531 timeout = 1000;
532 while(timeout-- && cs->hw.elsa.transcnt) 532 while(timeout-- && cs->hw.elsa.transcnt)
533 udelay(1000); 533 udelay(1000);
534 debugl1(cs, "msi tout=%d", timeout); 534 debugl1(cs, "msi tout=%d", timeout);
535 udelay(RCV_DELAY); 535 mdelay(RCV_DELAY);
536 if (outgoing) 536 if (outgoing)
537 modem_write_cmd(cs, MInit_dialout, strlen(MInit_dialout)); 537 modem_write_cmd(cs, MInit_dialout, strlen(MInit_dialout));
538 else 538 else
@@ -541,7 +541,7 @@ modem_set_dial(struct IsdnCardState *cs, int outgoing) {
541 while(timeout-- && cs->hw.elsa.transcnt) 541 while(timeout-- && cs->hw.elsa.transcnt)
542 udelay(1000); 542 udelay(1000);
543 debugl1(cs, "msi tout=%d", timeout); 543 debugl1(cs, "msi tout=%d", timeout);
544 udelay(RCV_DELAY); 544 mdelay(RCV_DELAY);
545} 545}
546 546
547static void 547static void
diff --git a/drivers/isdn/hisax/hfc_usb.c b/drivers/isdn/hisax/hfc_usb.c
index 9de54202c90c..a420b64472e3 100644
--- a/drivers/isdn/hisax/hfc_usb.c
+++ b/drivers/isdn/hisax/hfc_usb.c
@@ -817,8 +817,8 @@ collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, int finish)
817 } 817 }
818 /* we have a complete hdlc packet */ 818 /* we have a complete hdlc packet */
819 if (finish) { 819 if (finish) {
820 if ((!fifo->skbuff->data[fifo->skbuff->len - 1]) 820 if (fifo->skbuff->len > 3 &&
821 && (fifo->skbuff->len > 3)) { 821 !fifo->skbuff->data[fifo->skbuff->len - 1]) {
822 822
823 if (fifon == HFCUSB_D_RX) { 823 if (fifon == HFCUSB_D_RX) {
824 DBG(HFCUSB_DBG_DCHANNEL, 824 DBG(HFCUSB_DBG_DCHANNEL,
diff --git a/drivers/isdn/hisax/hscx_irq.c b/drivers/isdn/hisax/hscx_irq.c
index 7b1ad5e4ecda..2387d76c721a 100644
--- a/drivers/isdn/hisax/hscx_irq.c
+++ b/drivers/isdn/hisax/hscx_irq.c
@@ -32,7 +32,7 @@ waitforXFW(struct IsdnCardState *cs, int hscx)
32{ 32{
33 int to = 50; 33 int to = 50;
34 34
35 while ((!(READHSCX(cs, hscx, HSCX_STAR) & 0x44) == 0x40) && to) { 35 while (((READHSCX(cs, hscx, HSCX_STAR) & 0x44) != 0x40) && to) {
36 udelay(1); 36 udelay(1);
37 to--; 37 to--;
38 } 38 }
diff --git a/drivers/isdn/hisax/icc.c b/drivers/isdn/hisax/icc.c
index 9aba646ba221..c80cbb8a2ef9 100644
--- a/drivers/isdn/hisax/icc.c
+++ b/drivers/isdn/hisax/icc.c
@@ -468,6 +468,7 @@ ICC_l1hw(struct PStack *st, int pr, void *arg)
468 if (cs->debug & L1_DEB_WARN) 468 if (cs->debug & L1_DEB_WARN)
469 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen"); 469 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
470 skb_queue_tail(&cs->sq, skb); 470 skb_queue_tail(&cs->sq, skb);
471 spin_unlock_irqrestore(&cs->lock, flags);
471 break; 472 break;
472 } 473 }
473 if (cs->debug & DEB_DLOG_HEX) 474 if (cs->debug & DEB_DLOG_HEX)
diff --git a/drivers/isdn/i4l/isdn_ppp.c b/drivers/isdn/i4l/isdn_ppp.c
index 2d14b64202a3..642d5aaf53ce 100644
--- a/drivers/isdn/i4l/isdn_ppp.c
+++ b/drivers/isdn/i4l/isdn_ppp.c
@@ -1535,10 +1535,8 @@ static int isdn_ppp_mp_bundle_array_init(void)
1535 int sz = ISDN_MAX_CHANNELS*sizeof(ippp_bundle); 1535 int sz = ISDN_MAX_CHANNELS*sizeof(ippp_bundle);
1536 if( (isdn_ppp_bundle_arr = kzalloc(sz, GFP_KERNEL)) == NULL ) 1536 if( (isdn_ppp_bundle_arr = kzalloc(sz, GFP_KERNEL)) == NULL )
1537 return -ENOMEM; 1537 return -ENOMEM;
1538 for (i = 0; i < ISDN_MAX_CHANNELS; i++) { 1538 for( i = 0; i < ISDN_MAX_CHANNELS; i++ )
1539 spin_lock_init(&isdn_ppp_bundle_arr[i].lock); 1539 spin_lock_init(&isdn_ppp_bundle_arr[i].lock);
1540 skb_queue_head_init(&isdn_ppp_bundle_arr[i].frags);
1541 }
1542 return 0; 1540 return 0;
1543} 1541}
1544 1542
@@ -1571,7 +1569,7 @@ static int isdn_ppp_mp_init( isdn_net_local * lp, ippp_bundle * add_to )
1571 if ((lp->netdev->pb = isdn_ppp_mp_bundle_alloc()) == NULL) 1569 if ((lp->netdev->pb = isdn_ppp_mp_bundle_alloc()) == NULL)
1572 return -ENOMEM; 1570 return -ENOMEM;
1573 lp->next = lp->last = lp; /* nobody else in a queue */ 1571 lp->next = lp->last = lp; /* nobody else in a queue */
1574 skb_queue_head_init(&lp->netdev->pb->frags); 1572 lp->netdev->pb->frags = NULL;
1575 lp->netdev->pb->frames = 0; 1573 lp->netdev->pb->frames = 0;
1576 lp->netdev->pb->seq = UINT_MAX; 1574 lp->netdev->pb->seq = UINT_MAX;
1577 } 1575 }
@@ -1583,29 +1581,28 @@ static int isdn_ppp_mp_init( isdn_net_local * lp, ippp_bundle * add_to )
1583 1581
1584static u32 isdn_ppp_mp_get_seq( int short_seq, 1582static u32 isdn_ppp_mp_get_seq( int short_seq,
1585 struct sk_buff * skb, u32 last_seq ); 1583 struct sk_buff * skb, u32 last_seq );
1586static void isdn_ppp_mp_discard(ippp_bundle *mp, struct sk_buff *from, 1584static struct sk_buff * isdn_ppp_mp_discard( ippp_bundle * mp,
1587 struct sk_buff *to); 1585 struct sk_buff * from, struct sk_buff * to );
1588static void isdn_ppp_mp_reassembly(isdn_net_dev *net_dev, isdn_net_local *lp, 1586static void isdn_ppp_mp_reassembly( isdn_net_dev * net_dev, isdn_net_local * lp,
1589 struct sk_buff *from, struct sk_buff *to, 1587 struct sk_buff * from, struct sk_buff * to );
1590 u32 lastseq); 1588static void isdn_ppp_mp_free_skb( ippp_bundle * mp, struct sk_buff * skb );
1591static void isdn_ppp_mp_free_skb(ippp_bundle *mp, struct sk_buff *skb);
1592static void isdn_ppp_mp_print_recv_pkt( int slot, struct sk_buff * skb ); 1589static void isdn_ppp_mp_print_recv_pkt( int slot, struct sk_buff * skb );
1593 1590
1594static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp, 1591static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1595 struct sk_buff *skb) 1592 struct sk_buff *skb)
1596{ 1593{
1597 struct sk_buff *newfrag, *frag, *start, *nextf;
1598 u32 newseq, minseq, thisseq;
1599 isdn_mppp_stats *stats;
1600 struct ippp_struct *is; 1594 struct ippp_struct *is;
1595 isdn_net_local * lpq;
1596 ippp_bundle * mp;
1597 isdn_mppp_stats * stats;
1598 struct sk_buff * newfrag, * frag, * start, *nextf;
1599 u32 newseq, minseq, thisseq;
1601 unsigned long flags; 1600 unsigned long flags;
1602 isdn_net_local *lpq;
1603 ippp_bundle *mp;
1604 int slot; 1601 int slot;
1605 1602
1606 spin_lock_irqsave(&net_dev->pb->lock, flags); 1603 spin_lock_irqsave(&net_dev->pb->lock, flags);
1607 mp = net_dev->pb; 1604 mp = net_dev->pb;
1608 stats = &mp->stats; 1605 stats = &mp->stats;
1609 slot = lp->ppp_slot; 1606 slot = lp->ppp_slot;
1610 if (slot < 0 || slot >= ISDN_MAX_CHANNELS) { 1607 if (slot < 0 || slot >= ISDN_MAX_CHANNELS) {
1611 printk(KERN_ERR "%s: lp->ppp_slot(%d)\n", 1608 printk(KERN_ERR "%s: lp->ppp_slot(%d)\n",
@@ -1616,19 +1613,20 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1616 return; 1613 return;
1617 } 1614 }
1618 is = ippp_table[slot]; 1615 is = ippp_table[slot];
1619 if (++mp->frames > stats->max_queue_len) 1616 if( ++mp->frames > stats->max_queue_len )
1620 stats->max_queue_len = mp->frames; 1617 stats->max_queue_len = mp->frames;
1621 1618
1622 if (is->debug & 0x8) 1619 if (is->debug & 0x8)
1623 isdn_ppp_mp_print_recv_pkt(lp->ppp_slot, skb); 1620 isdn_ppp_mp_print_recv_pkt(lp->ppp_slot, skb);
1624 1621
1625 newseq = isdn_ppp_mp_get_seq(is->mpppcfg & SC_IN_SHORT_SEQ, 1622 newseq = isdn_ppp_mp_get_seq(is->mpppcfg & SC_IN_SHORT_SEQ,
1626 skb, is->last_link_seqno); 1623 skb, is->last_link_seqno);
1624
1627 1625
1628 /* if this packet seq # is less than last already processed one, 1626 /* if this packet seq # is less than last already processed one,
1629 * toss it right away, but check for sequence start case first 1627 * toss it right away, but check for sequence start case first
1630 */ 1628 */
1631 if (mp->seq > MP_LONGSEQ_MAX && (newseq & MP_LONGSEQ_MAXBIT)) { 1629 if( mp->seq > MP_LONGSEQ_MAX && (newseq & MP_LONGSEQ_MAXBIT) ) {
1632 mp->seq = newseq; /* the first packet: required for 1630 mp->seq = newseq; /* the first packet: required for
1633 * rfc1990 non-compliant clients -- 1631 * rfc1990 non-compliant clients --
1634 * prevents constant packet toss */ 1632 * prevents constant packet toss */
@@ -1638,7 +1636,7 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1638 spin_unlock_irqrestore(&mp->lock, flags); 1636 spin_unlock_irqrestore(&mp->lock, flags);
1639 return; 1637 return;
1640 } 1638 }
1641 1639
1642 /* find the minimum received sequence number over all links */ 1640 /* find the minimum received sequence number over all links */
1643 is->last_link_seqno = minseq = newseq; 1641 is->last_link_seqno = minseq = newseq;
1644 for (lpq = net_dev->queue;;) { 1642 for (lpq = net_dev->queue;;) {
@@ -1659,31 +1657,22 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1659 * packets */ 1657 * packets */
1660 newfrag = skb; 1658 newfrag = skb;
1661 1659
1662 /* Insert new fragment into the proper sequence slot. */ 1660 /* if this new fragment is before the first one, then enqueue it now. */
1663 skb_queue_walk(&mp->frags, frag) { 1661 if ((frag = mp->frags) == NULL || MP_LT(newseq, MP_SEQ(frag))) {
1664 if (MP_SEQ(frag) == newseq) { 1662 newfrag->next = frag;
1665 isdn_ppp_mp_free_skb(mp, newfrag); 1663 mp->frags = frag = newfrag;
1666 newfrag = NULL; 1664 newfrag = NULL;
1667 break; 1665 }
1668 }
1669 if (MP_LT(newseq, MP_SEQ(frag))) {
1670 __skb_queue_before(&mp->frags, frag, newfrag);
1671 newfrag = NULL;
1672 break;
1673 }
1674 }
1675 if (newfrag)
1676 __skb_queue_tail(&mp->frags, newfrag);
1677 1666
1678 frag = skb_peek(&mp->frags); 1667 start = MP_FLAGS(frag) & MP_BEGIN_FRAG &&
1679 start = ((MP_FLAGS(frag) & MP_BEGIN_FRAG) && 1668 MP_SEQ(frag) == mp->seq ? frag : NULL;
1680 (MP_SEQ(frag) == mp->seq)) ? frag : NULL;
1681 if (!start)
1682 goto check_overflow;
1683 1669
1684 /* main fragment traversing loop 1670 /*
1671 * main fragment traversing loop
1685 * 1672 *
1686 * try to accomplish several tasks: 1673 * try to accomplish several tasks:
1674 * - insert new fragment into the proper sequence slot (once that's done
1675 * newfrag will be set to NULL)
1687 * - reassemble any complete fragment sequence (non-null 'start' 1676 * - reassemble any complete fragment sequence (non-null 'start'
1688 * indicates there is a continguous sequence present) 1677 * indicates there is a continguous sequence present)
1689 * - discard any incomplete sequences that are below minseq -- due 1678 * - discard any incomplete sequences that are below minseq -- due
@@ -1692,46 +1681,71 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1692 * come to complete such sequence and it should be discarded 1681 * come to complete such sequence and it should be discarded
1693 * 1682 *
1694 * loop completes when we accomplished the following tasks: 1683 * loop completes when we accomplished the following tasks:
1684 * - new fragment is inserted in the proper sequence ('newfrag' is
1685 * set to NULL)
1695 * - we hit a gap in the sequence, so no reassembly/processing is 1686 * - we hit a gap in the sequence, so no reassembly/processing is
1696 * possible ('start' would be set to NULL) 1687 * possible ('start' would be set to NULL)
1697 * 1688 *
1698 * algorithm for this code is derived from code in the book 1689 * algorithm for this code is derived from code in the book
1699 * 'PPP Design And Debugging' by James Carlson (Addison-Wesley) 1690 * 'PPP Design And Debugging' by James Carlson (Addison-Wesley)
1700 */ 1691 */
1701 skb_queue_walk_safe(&mp->frags, frag, nextf) { 1692 while (start != NULL || newfrag != NULL) {
1702 thisseq = MP_SEQ(frag); 1693
1703 1694 thisseq = MP_SEQ(frag);
1704 /* check for misplaced start */ 1695 nextf = frag->next;
1705 if (start != frag && (MP_FLAGS(frag) & MP_BEGIN_FRAG)) { 1696
1706 printk(KERN_WARNING"isdn_mppp(seq %d): new " 1697 /* drop any duplicate fragments */
1707 "BEGIN flag with no prior END", thisseq); 1698 if (newfrag != NULL && thisseq == newseq) {
1708 stats->seqerrs++; 1699 isdn_ppp_mp_free_skb(mp, newfrag);
1709 stats->frame_drops++; 1700 newfrag = NULL;
1710 isdn_ppp_mp_discard(mp, start, frag); 1701 }
1711 start = frag; 1702
1712 } else if (MP_LE(thisseq, minseq)) { 1703 /* insert new fragment before next element if possible. */
1713 if (MP_FLAGS(frag) & MP_BEGIN_FRAG) 1704 if (newfrag != NULL && (nextf == NULL ||
1705 MP_LT(newseq, MP_SEQ(nextf)))) {
1706 newfrag->next = nextf;
1707 frag->next = nextf = newfrag;
1708 newfrag = NULL;
1709 }
1710
1711 if (start != NULL) {
1712 /* check for misplaced start */
1713 if (start != frag && (MP_FLAGS(frag) & MP_BEGIN_FRAG)) {
1714 printk(KERN_WARNING"isdn_mppp(seq %d): new "
1715 "BEGIN flag with no prior END", thisseq);
1716 stats->seqerrs++;
1717 stats->frame_drops++;
1718 start = isdn_ppp_mp_discard(mp, start,frag);
1719 nextf = frag->next;
1720 }
1721 } else if (MP_LE(thisseq, minseq)) {
1722 if (MP_FLAGS(frag) & MP_BEGIN_FRAG)
1714 start = frag; 1723 start = frag;
1715 else { 1724 else {
1716 if (MP_FLAGS(frag) & MP_END_FRAG) 1725 if (MP_FLAGS(frag) & MP_END_FRAG)
1717 stats->frame_drops++; 1726 stats->frame_drops++;
1718 __skb_unlink(skb, &mp->frags); 1727 if( mp->frags == frag )
1728 mp->frags = nextf;
1719 isdn_ppp_mp_free_skb(mp, frag); 1729 isdn_ppp_mp_free_skb(mp, frag);
1730 frag = nextf;
1720 continue; 1731 continue;
1721 } 1732 }
1722 } 1733 }
1723 1734
1724 /* if we have end fragment, then we have full reassembly 1735 /* if start is non-null and we have end fragment, then
1725 * sequence -- reassemble and process packet now 1736 * we have full reassembly sequence -- reassemble
1737 * and process packet now
1726 */ 1738 */
1727 if (MP_FLAGS(frag) & MP_END_FRAG) { 1739 if (start != NULL && (MP_FLAGS(frag) & MP_END_FRAG)) {
1728 minseq = mp->seq = (thisseq+1) & MP_LONGSEQ_MASK; 1740 minseq = mp->seq = (thisseq+1) & MP_LONGSEQ_MASK;
1729 /* Reassemble the packet then dispatch it */ 1741 /* Reassemble the packet then dispatch it */
1730 isdn_ppp_mp_reassembly(net_dev, lp, start, frag, thisseq); 1742 isdn_ppp_mp_reassembly(net_dev, lp, start, nextf);
1743
1744 start = NULL;
1745 frag = NULL;
1731 1746
1732 start = NULL; 1747 mp->frags = nextf;
1733 frag = NULL; 1748 }
1734 }
1735 1749
1736 /* check if need to update start pointer: if we just 1750 /* check if need to update start pointer: if we just
1737 * reassembled the packet and sequence is contiguous 1751 * reassembled the packet and sequence is contiguous
@@ -1742,25 +1756,26 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1742 * below low watermark and set start to the next frag or 1756 * below low watermark and set start to the next frag or
1743 * clear start ptr. 1757 * clear start ptr.
1744 */ 1758 */
1745 if (nextf != (struct sk_buff *)&mp->frags && 1759 if (nextf != NULL &&
1746 ((thisseq+1) & MP_LONGSEQ_MASK) == MP_SEQ(nextf)) { 1760 ((thisseq+1) & MP_LONGSEQ_MASK) == MP_SEQ(nextf)) {
1747 /* if we just reassembled and the next one is here, 1761 /* if we just reassembled and the next one is here,
1748 * then start another reassembly. 1762 * then start another reassembly. */
1749 */ 1763
1750 if (frag == NULL) { 1764 if (frag == NULL) {
1751 if (MP_FLAGS(nextf) & MP_BEGIN_FRAG) 1765 if (MP_FLAGS(nextf) & MP_BEGIN_FRAG)
1752 start = nextf; 1766 start = nextf;
1753 else { 1767 else
1754 printk(KERN_WARNING"isdn_mppp(seq %d):" 1768 {
1755 " END flag with no following " 1769 printk(KERN_WARNING"isdn_mppp(seq %d):"
1756 "BEGIN", thisseq); 1770 " END flag with no following "
1771 "BEGIN", thisseq);
1757 stats->seqerrs++; 1772 stats->seqerrs++;
1758 } 1773 }
1759 } 1774 }
1760 } else { 1775
1761 if (nextf != (struct sk_buff *)&mp->frags && 1776 } else {
1762 frag != NULL && 1777 if ( nextf != NULL && frag != NULL &&
1763 MP_LT(thisseq, minseq)) { 1778 MP_LT(thisseq, minseq)) {
1764 /* we've got a break in the sequence 1779 /* we've got a break in the sequence
1765 * and we not at the end yet 1780 * and we not at the end yet
1766 * and we did not just reassembled 1781 * and we did not just reassembled
@@ -1769,39 +1784,41 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1769 * discard all the frames below low watermark 1784 * discard all the frames below low watermark
1770 * and start over */ 1785 * and start over */
1771 stats->frame_drops++; 1786 stats->frame_drops++;
1772 isdn_ppp_mp_discard(mp, start, nextf); 1787 mp->frags = isdn_ppp_mp_discard(mp,start,nextf);
1773 } 1788 }
1774 /* break in the sequence, no reassembly */ 1789 /* break in the sequence, no reassembly */
1775 start = NULL; 1790 start = NULL;
1776 } 1791 }
1777 if (!start) 1792
1778 break; 1793 frag = nextf;
1779 } 1794 } /* while -- main loop */
1780 1795
1781check_overflow: 1796 if (mp->frags == NULL)
1797 mp->frags = frag;
1798
1782 /* rather straighforward way to deal with (not very) possible 1799 /* rather straighforward way to deal with (not very) possible
1783 * queue overflow 1800 * queue overflow */
1784 */
1785 if (mp->frames > MP_MAX_QUEUE_LEN) { 1801 if (mp->frames > MP_MAX_QUEUE_LEN) {
1786 stats->overflows++; 1802 stats->overflows++;
1787 skb_queue_walk_safe(&mp->frags, frag, nextf) { 1803 while (mp->frames > MP_MAX_QUEUE_LEN) {
1788 if (mp->frames <= MP_MAX_QUEUE_LEN) 1804 frag = mp->frags->next;
1789 break; 1805 isdn_ppp_mp_free_skb(mp, mp->frags);
1790 __skb_unlink(frag, &mp->frags); 1806 mp->frags = frag;
1791 isdn_ppp_mp_free_skb(mp, frag);
1792 } 1807 }
1793 } 1808 }
1794 spin_unlock_irqrestore(&mp->lock, flags); 1809 spin_unlock_irqrestore(&mp->lock, flags);
1795} 1810}
1796 1811
1797static void isdn_ppp_mp_cleanup(isdn_net_local *lp) 1812static void isdn_ppp_mp_cleanup( isdn_net_local * lp )
1798{ 1813{
1799 struct sk_buff *skb, *tmp; 1814 struct sk_buff * frag = lp->netdev->pb->frags;
1800 1815 struct sk_buff * nextfrag;
1801 skb_queue_walk_safe(&lp->netdev->pb->frags, skb, tmp) { 1816 while( frag ) {
1802 __skb_unlink(skb, &lp->netdev->pb->frags); 1817 nextfrag = frag->next;
1803 isdn_ppp_mp_free_skb(lp->netdev->pb, skb); 1818 isdn_ppp_mp_free_skb(lp->netdev->pb, frag);
1804 } 1819 frag = nextfrag;
1820 }
1821 lp->netdev->pb->frags = NULL;
1805} 1822}
1806 1823
1807static u32 isdn_ppp_mp_get_seq( int short_seq, 1824static u32 isdn_ppp_mp_get_seq( int short_seq,
@@ -1838,115 +1855,72 @@ static u32 isdn_ppp_mp_get_seq( int short_seq,
1838 return seq; 1855 return seq;
1839} 1856}
1840 1857
1841static void isdn_ppp_mp_discard(ippp_bundle *mp, struct sk_buff *from, 1858struct sk_buff * isdn_ppp_mp_discard( ippp_bundle * mp,
1842 struct sk_buff *to) 1859 struct sk_buff * from, struct sk_buff * to )
1843{ 1860{
1844 if (from) { 1861 if( from )
1845 struct sk_buff *skb, *tmp; 1862 while (from != to) {
1846 int freeing = 0; 1863 struct sk_buff * next = from->next;
1847 1864 isdn_ppp_mp_free_skb(mp, from);
1848 skb_queue_walk_safe(&mp->frags, skb, tmp) { 1865 from = next;
1849 if (skb == to)
1850 break;
1851 if (skb == from)
1852 freeing = 1;
1853 if (!freeing)
1854 continue;
1855 __skb_unlink(skb, &mp->frags);
1856 isdn_ppp_mp_free_skb(mp, skb);
1857 } 1866 }
1858 } 1867 return from;
1859}
1860
1861static unsigned int calc_tot_len(struct sk_buff_head *queue,
1862 struct sk_buff *from, struct sk_buff *to)
1863{
1864 unsigned int tot_len = 0;
1865 struct sk_buff *skb;
1866 int found_start = 0;
1867
1868 skb_queue_walk(queue, skb) {
1869 if (skb == from)
1870 found_start = 1;
1871 if (!found_start)
1872 continue;
1873 tot_len += skb->len - MP_HEADER_LEN;
1874 if (skb == to)
1875 break;
1876 }
1877 return tot_len;
1878} 1868}
1879 1869
1880/* Reassemble packet using fragments in the reassembly queue from 1870void isdn_ppp_mp_reassembly( isdn_net_dev * net_dev, isdn_net_local * lp,
1881 * 'from' until 'to', inclusive. 1871 struct sk_buff * from, struct sk_buff * to )
1882 */
1883static void isdn_ppp_mp_reassembly(isdn_net_dev *net_dev, isdn_net_local *lp,
1884 struct sk_buff *from, struct sk_buff *to,
1885 u32 lastseq)
1886{ 1872{
1887 ippp_bundle *mp = net_dev->pb; 1873 ippp_bundle * mp = net_dev->pb;
1888 unsigned int tot_len;
1889 struct sk_buff *skb;
1890 int proto; 1874 int proto;
1875 struct sk_buff * skb;
1876 unsigned int tot_len;
1891 1877
1892 if (lp->ppp_slot < 0 || lp->ppp_slot >= ISDN_MAX_CHANNELS) { 1878 if (lp->ppp_slot < 0 || lp->ppp_slot >= ISDN_MAX_CHANNELS) {
1893 printk(KERN_ERR "%s: lp->ppp_slot(%d) out of range\n", 1879 printk(KERN_ERR "%s: lp->ppp_slot(%d) out of range\n",
1894 __func__, lp->ppp_slot); 1880 __func__, lp->ppp_slot);
1895 return; 1881 return;
1896 } 1882 }
1897 1883 if( MP_FLAGS(from) == (MP_BEGIN_FRAG | MP_END_FRAG) ) {
1898 tot_len = calc_tot_len(&mp->frags, from, to); 1884 if( ippp_table[lp->ppp_slot]->debug & 0x40 )
1899
1900 if (MP_FLAGS(from) == (MP_BEGIN_FRAG | MP_END_FRAG)) {
1901 if (ippp_table[lp->ppp_slot]->debug & 0x40)
1902 printk(KERN_DEBUG "isdn_mppp: reassembly: frame %d, " 1885 printk(KERN_DEBUG "isdn_mppp: reassembly: frame %d, "
1903 "len %d\n", MP_SEQ(from), from->len); 1886 "len %d\n", MP_SEQ(from), from->len );
1904 skb = from; 1887 skb = from;
1905 skb_pull(skb, MP_HEADER_LEN); 1888 skb_pull(skb, MP_HEADER_LEN);
1906 __skb_unlink(skb, &mp->frags);
1907 mp->frames--; 1889 mp->frames--;
1908 } else { 1890 } else {
1909 struct sk_buff *walk, *tmp; 1891 struct sk_buff * frag;
1910 int found_start = 0; 1892 int n;
1911 1893
1912 if (ippp_table[lp->ppp_slot]->debug & 0x40) 1894 for(tot_len=n=0, frag=from; frag != to; frag=frag->next, n++)
1913 printk(KERN_DEBUG"isdn_mppp: reassembling frames %d " 1895 tot_len += frag->len - MP_HEADER_LEN;
1914 "to %d, len %d\n", MP_SEQ(from), lastseq,
1915 tot_len);
1916 1896
1917 skb = dev_alloc_skb(tot_len); 1897 if( ippp_table[lp->ppp_slot]->debug & 0x40 )
1918 if (!skb) 1898 printk(KERN_DEBUG"isdn_mppp: reassembling frames %d "
1899 "to %d, len %d\n", MP_SEQ(from),
1900 (MP_SEQ(from)+n-1) & MP_LONGSEQ_MASK, tot_len );
1901 if( (skb = dev_alloc_skb(tot_len)) == NULL ) {
1919 printk(KERN_ERR "isdn_mppp: cannot allocate sk buff " 1902 printk(KERN_ERR "isdn_mppp: cannot allocate sk buff "
1920 "of size %d\n", tot_len); 1903 "of size %d\n", tot_len);
1921 1904 isdn_ppp_mp_discard(mp, from, to);
1922 found_start = 0; 1905 return;
1923 skb_queue_walk_safe(&mp->frags, walk, tmp) { 1906 }
1924 if (walk == from)
1925 found_start = 1;
1926 if (!found_start)
1927 continue;
1928 1907
1929 if (skb) { 1908 while( from != to ) {
1930 unsigned int len = walk->len - MP_HEADER_LEN; 1909 unsigned int len = from->len - MP_HEADER_LEN;
1931 skb_copy_from_linear_data_offset(walk, MP_HEADER_LEN,
1932 skb_put(skb, len),
1933 len);
1934 }
1935 __skb_unlink(walk, &mp->frags);
1936 isdn_ppp_mp_free_skb(mp, walk);
1937 1910
1938 if (walk == to) 1911 skb_copy_from_linear_data_offset(from, MP_HEADER_LEN,
1939 break; 1912 skb_put(skb,len),
1913 len);
1914 frag = from->next;
1915 isdn_ppp_mp_free_skb(mp, from);
1916 from = frag;
1940 } 1917 }
1941 } 1918 }
1942 if (!skb)
1943 return;
1944
1945 proto = isdn_ppp_strip_proto(skb); 1919 proto = isdn_ppp_strip_proto(skb);
1946 isdn_ppp_push_higher(net_dev, lp, skb, proto); 1920 isdn_ppp_push_higher(net_dev, lp, skb, proto);
1947} 1921}
1948 1922
1949static void isdn_ppp_mp_free_skb(ippp_bundle *mp, struct sk_buff *skb) 1923static void isdn_ppp_mp_free_skb(ippp_bundle * mp, struct sk_buff * skb)
1950{ 1924{
1951 dev_kfree_skb(skb); 1925 dev_kfree_skb(skb);
1952 mp->frames--; 1926 mp->frames--;
diff --git a/drivers/isdn/mISDN/stack.c b/drivers/isdn/mISDN/stack.c
index 3e1532a180ff..0d05ec43012c 100644
--- a/drivers/isdn/mISDN/stack.c
+++ b/drivers/isdn/mISDN/stack.c
@@ -364,7 +364,7 @@ add_layer2(struct mISDNchannel *ch, struct mISDNstack *st)
364static int 364static int
365st_own_ctrl(struct mISDNchannel *ch, u_int cmd, void *arg) 365st_own_ctrl(struct mISDNchannel *ch, u_int cmd, void *arg)
366{ 366{
367 if (!ch->st || ch->st->layer1) 367 if (!ch->st || !ch->st->layer1)
368 return -EINVAL; 368 return -EINVAL;
369 return ch->st->layer1->ctrl(ch->st->layer1, cmd, arg); 369 return ch->st->layer1->ctrl(ch->st->layer1, cmd, arg);
370} 370}
diff --git a/drivers/leds/leds-gpio.c b/drivers/leds/leds-gpio.c
index 7467980b8cf9..e5225d28f392 100644
--- a/drivers/leds/leds-gpio.c
+++ b/drivers/leds/leds-gpio.c
@@ -78,6 +78,8 @@ static int __devinit create_gpio_led(const struct gpio_led *template,
78{ 78{
79 int ret, state; 79 int ret, state;
80 80
81 led_dat->gpio = -1;
82
81 /* skip leds that aren't available */ 83 /* skip leds that aren't available */
82 if (!gpio_is_valid(template->gpio)) { 84 if (!gpio_is_valid(template->gpio)) {
83 printk(KERN_INFO "Skipping unavailable LED gpio %d (%s)\n", 85 printk(KERN_INFO "Skipping unavailable LED gpio %d (%s)\n",
diff --git a/drivers/md/md.c b/drivers/md/md.c
index 10eb1fce975e..b182f86a19dd 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -944,6 +944,14 @@ static int super_90_validate(mddev_t *mddev, mdk_rdev_t *rdev)
944 desc->raid_disk < mddev->raid_disks */) { 944 desc->raid_disk < mddev->raid_disks */) {
945 set_bit(In_sync, &rdev->flags); 945 set_bit(In_sync, &rdev->flags);
946 rdev->raid_disk = desc->raid_disk; 946 rdev->raid_disk = desc->raid_disk;
947 } else if (desc->state & (1<<MD_DISK_ACTIVE)) {
948 /* active but not in sync implies recovery up to
949 * reshape position. We don't know exactly where
950 * that is, so set to zero for now */
951 if (mddev->minor_version >= 91) {
952 rdev->recovery_offset = 0;
953 rdev->raid_disk = desc->raid_disk;
954 }
947 } 955 }
948 if (desc->state & (1<<MD_DISK_WRITEMOSTLY)) 956 if (desc->state & (1<<MD_DISK_WRITEMOSTLY))
949 set_bit(WriteMostly, &rdev->flags); 957 set_bit(WriteMostly, &rdev->flags);
@@ -1032,8 +1040,19 @@ static void super_90_sync(mddev_t *mddev, mdk_rdev_t *rdev)
1032 list_for_each_entry(rdev2, &mddev->disks, same_set) { 1040 list_for_each_entry(rdev2, &mddev->disks, same_set) {
1033 mdp_disk_t *d; 1041 mdp_disk_t *d;
1034 int desc_nr; 1042 int desc_nr;
1035 if (rdev2->raid_disk >= 0 && test_bit(In_sync, &rdev2->flags) 1043 int is_active = test_bit(In_sync, &rdev2->flags);
1036 && !test_bit(Faulty, &rdev2->flags)) 1044
1045 if (rdev2->raid_disk >= 0 &&
1046 sb->minor_version >= 91)
1047 /* we have nowhere to store the recovery_offset,
1048 * but if it is not below the reshape_position,
1049 * we can piggy-back on that.
1050 */
1051 is_active = 1;
1052 if (rdev2->raid_disk < 0 ||
1053 test_bit(Faulty, &rdev2->flags))
1054 is_active = 0;
1055 if (is_active)
1037 desc_nr = rdev2->raid_disk; 1056 desc_nr = rdev2->raid_disk;
1038 else 1057 else
1039 desc_nr = next_spare++; 1058 desc_nr = next_spare++;
@@ -1043,16 +1062,16 @@ static void super_90_sync(mddev_t *mddev, mdk_rdev_t *rdev)
1043 d->number = rdev2->desc_nr; 1062 d->number = rdev2->desc_nr;
1044 d->major = MAJOR(rdev2->bdev->bd_dev); 1063 d->major = MAJOR(rdev2->bdev->bd_dev);
1045 d->minor = MINOR(rdev2->bdev->bd_dev); 1064 d->minor = MINOR(rdev2->bdev->bd_dev);
1046 if (rdev2->raid_disk >= 0 && test_bit(In_sync, &rdev2->flags) 1065 if (is_active)
1047 && !test_bit(Faulty, &rdev2->flags))
1048 d->raid_disk = rdev2->raid_disk; 1066 d->raid_disk = rdev2->raid_disk;
1049 else 1067 else
1050 d->raid_disk = rdev2->desc_nr; /* compatibility */ 1068 d->raid_disk = rdev2->desc_nr; /* compatibility */
1051 if (test_bit(Faulty, &rdev2->flags)) 1069 if (test_bit(Faulty, &rdev2->flags))
1052 d->state = (1<<MD_DISK_FAULTY); 1070 d->state = (1<<MD_DISK_FAULTY);
1053 else if (test_bit(In_sync, &rdev2->flags)) { 1071 else if (is_active) {
1054 d->state = (1<<MD_DISK_ACTIVE); 1072 d->state = (1<<MD_DISK_ACTIVE);
1055 d->state |= (1<<MD_DISK_SYNC); 1073 if (test_bit(In_sync, &rdev2->flags))
1074 d->state |= (1<<MD_DISK_SYNC);
1056 active++; 1075 active++;
1057 working++; 1076 working++;
1058 } else { 1077 } else {
@@ -1382,8 +1401,6 @@ static void super_1_sync(mddev_t *mddev, mdk_rdev_t *rdev)
1382 1401
1383 if (rdev->raid_disk >= 0 && 1402 if (rdev->raid_disk >= 0 &&
1384 !test_bit(In_sync, &rdev->flags)) { 1403 !test_bit(In_sync, &rdev->flags)) {
1385 if (mddev->curr_resync_completed > rdev->recovery_offset)
1386 rdev->recovery_offset = mddev->curr_resync_completed;
1387 if (rdev->recovery_offset > 0) { 1404 if (rdev->recovery_offset > 0) {
1388 sb->feature_map |= 1405 sb->feature_map |=
1389 cpu_to_le32(MD_FEATURE_RECOVERY_OFFSET); 1406 cpu_to_le32(MD_FEATURE_RECOVERY_OFFSET);
@@ -1917,6 +1934,14 @@ static void sync_sbs(mddev_t * mddev, int nospares)
1917 */ 1934 */
1918 mdk_rdev_t *rdev; 1935 mdk_rdev_t *rdev;
1919 1936
1937 /* First make sure individual recovery_offsets are correct */
1938 list_for_each_entry(rdev, &mddev->disks, same_set) {
1939 if (rdev->raid_disk >= 0 &&
1940 !test_bit(In_sync, &rdev->flags) &&
1941 mddev->curr_resync_completed > rdev->recovery_offset)
1942 rdev->recovery_offset = mddev->curr_resync_completed;
1943
1944 }
1920 list_for_each_entry(rdev, &mddev->disks, same_set) { 1945 list_for_each_entry(rdev, &mddev->disks, same_set) {
1921 if (rdev->sb_events == mddev->events || 1946 if (rdev->sb_events == mddev->events ||
1922 (nospares && 1947 (nospares &&
@@ -6504,8 +6529,9 @@ void md_do_sync(mddev_t *mddev)
6504 skip: 6529 skip:
6505 mddev->curr_resync = 0; 6530 mddev->curr_resync = 0;
6506 mddev->curr_resync_completed = 0; 6531 mddev->curr_resync_completed = 0;
6507 mddev->resync_min = 0; 6532 if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery))
6508 mddev->resync_max = MaxSector; 6533 /* We completed so max setting can be forgotten. */
6534 mddev->resync_max = MaxSector;
6509 sysfs_notify(&mddev->kobj, NULL, "sync_completed"); 6535 sysfs_notify(&mddev->kobj, NULL, "sync_completed");
6510 wake_up(&resync_wait); 6536 wake_up(&resync_wait);
6511 set_bit(MD_RECOVERY_DONE, &mddev->recovery); 6537 set_bit(MD_RECOVERY_DONE, &mddev->recovery);
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index 81abefc172d9..d29215d966da 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -4049,6 +4049,8 @@ static sector_t reshape_request(mddev_t *mddev, sector_t sector_nr, int *skipped
4049 sector_nr = conf->reshape_progress; 4049 sector_nr = conf->reshape_progress;
4050 sector_div(sector_nr, new_data_disks); 4050 sector_div(sector_nr, new_data_disks);
4051 if (sector_nr) { 4051 if (sector_nr) {
4052 mddev->curr_resync_completed = sector_nr;
4053 sysfs_notify(&mddev->kobj, NULL, "sync_completed");
4052 *skipped = 1; 4054 *skipped = 1;
4053 return sector_nr; 4055 return sector_nr;
4054 } 4056 }
@@ -4821,11 +4823,40 @@ static raid5_conf_t *setup_conf(mddev_t *mddev)
4821 return ERR_PTR(-ENOMEM); 4823 return ERR_PTR(-ENOMEM);
4822} 4824}
4823 4825
4826
4827static int only_parity(int raid_disk, int algo, int raid_disks, int max_degraded)
4828{
4829 switch (algo) {
4830 case ALGORITHM_PARITY_0:
4831 if (raid_disk < max_degraded)
4832 return 1;
4833 break;
4834 case ALGORITHM_PARITY_N:
4835 if (raid_disk >= raid_disks - max_degraded)
4836 return 1;
4837 break;
4838 case ALGORITHM_PARITY_0_6:
4839 if (raid_disk == 0 ||
4840 raid_disk == raid_disks - 1)
4841 return 1;
4842 break;
4843 case ALGORITHM_LEFT_ASYMMETRIC_6:
4844 case ALGORITHM_RIGHT_ASYMMETRIC_6:
4845 case ALGORITHM_LEFT_SYMMETRIC_6:
4846 case ALGORITHM_RIGHT_SYMMETRIC_6:
4847 if (raid_disk == raid_disks - 1)
4848 return 1;
4849 }
4850 return 0;
4851}
4852
4824static int run(mddev_t *mddev) 4853static int run(mddev_t *mddev)
4825{ 4854{
4826 raid5_conf_t *conf; 4855 raid5_conf_t *conf;
4827 int working_disks = 0, chunk_size; 4856 int working_disks = 0, chunk_size;
4857 int dirty_parity_disks = 0;
4828 mdk_rdev_t *rdev; 4858 mdk_rdev_t *rdev;
4859 sector_t reshape_offset = 0;
4829 4860
4830 if (mddev->recovery_cp != MaxSector) 4861 if (mddev->recovery_cp != MaxSector)
4831 printk(KERN_NOTICE "raid5: %s is not clean" 4862 printk(KERN_NOTICE "raid5: %s is not clean"
@@ -4859,6 +4890,7 @@ static int run(mddev_t *mddev)
4859 "on a stripe boundary\n"); 4890 "on a stripe boundary\n");
4860 return -EINVAL; 4891 return -EINVAL;
4861 } 4892 }
4893 reshape_offset = here_new * mddev->new_chunk_sectors;
4862 /* here_new is the stripe we will write to */ 4894 /* here_new is the stripe we will write to */
4863 here_old = mddev->reshape_position; 4895 here_old = mddev->reshape_position;
4864 sector_div(here_old, mddev->chunk_sectors * 4896 sector_div(here_old, mddev->chunk_sectors *
@@ -4914,10 +4946,51 @@ static int run(mddev_t *mddev)
4914 /* 4946 /*
4915 * 0 for a fully functional array, 1 or 2 for a degraded array. 4947 * 0 for a fully functional array, 1 or 2 for a degraded array.
4916 */ 4948 */
4917 list_for_each_entry(rdev, &mddev->disks, same_set) 4949 list_for_each_entry(rdev, &mddev->disks, same_set) {
4918 if (rdev->raid_disk >= 0 && 4950 if (rdev->raid_disk < 0)
4919 test_bit(In_sync, &rdev->flags)) 4951 continue;
4952 if (test_bit(In_sync, &rdev->flags))
4920 working_disks++; 4953 working_disks++;
4954 /* This disc is not fully in-sync. However if it
4955 * just stored parity (beyond the recovery_offset),
4956 * when we don't need to be concerned about the
4957 * array being dirty.
4958 * When reshape goes 'backwards', we never have
4959 * partially completed devices, so we only need
4960 * to worry about reshape going forwards.
4961 */
4962 /* Hack because v0.91 doesn't store recovery_offset properly. */
4963 if (mddev->major_version == 0 &&
4964 mddev->minor_version > 90)
4965 rdev->recovery_offset = reshape_offset;
4966
4967 printk("%d: w=%d pa=%d pr=%d m=%d a=%d r=%d op1=%d op2=%d\n",
4968 rdev->raid_disk, working_disks, conf->prev_algo,
4969 conf->previous_raid_disks, conf->max_degraded,
4970 conf->algorithm, conf->raid_disks,
4971 only_parity(rdev->raid_disk,
4972 conf->prev_algo,
4973 conf->previous_raid_disks,
4974 conf->max_degraded),
4975 only_parity(rdev->raid_disk,
4976 conf->algorithm,
4977 conf->raid_disks,
4978 conf->max_degraded));
4979 if (rdev->recovery_offset < reshape_offset) {
4980 /* We need to check old and new layout */
4981 if (!only_parity(rdev->raid_disk,
4982 conf->algorithm,
4983 conf->raid_disks,
4984 conf->max_degraded))
4985 continue;
4986 }
4987 if (!only_parity(rdev->raid_disk,
4988 conf->prev_algo,
4989 conf->previous_raid_disks,
4990 conf->max_degraded))
4991 continue;
4992 dirty_parity_disks++;
4993 }
4921 4994
4922 mddev->degraded = (max(conf->raid_disks, conf->previous_raid_disks) 4995 mddev->degraded = (max(conf->raid_disks, conf->previous_raid_disks)
4923 - working_disks); 4996 - working_disks);
@@ -4933,7 +5006,7 @@ static int run(mddev_t *mddev)
4933 mddev->dev_sectors &= ~(mddev->chunk_sectors - 1); 5006 mddev->dev_sectors &= ~(mddev->chunk_sectors - 1);
4934 mddev->resync_max_sectors = mddev->dev_sectors; 5007 mddev->resync_max_sectors = mddev->dev_sectors;
4935 5008
4936 if (mddev->degraded > 0 && 5009 if (mddev->degraded > dirty_parity_disks &&
4937 mddev->recovery_cp != MaxSector) { 5010 mddev->recovery_cp != MaxSector) {
4938 if (mddev->ok_start_degraded) 5011 if (mddev->ok_start_degraded)
4939 printk(KERN_WARNING 5012 printk(KERN_WARNING
@@ -5359,9 +5432,11 @@ static int raid5_start_reshape(mddev_t *mddev)
5359 !test_bit(Faulty, &rdev->flags)) { 5432 !test_bit(Faulty, &rdev->flags)) {
5360 if (raid5_add_disk(mddev, rdev) == 0) { 5433 if (raid5_add_disk(mddev, rdev) == 0) {
5361 char nm[20]; 5434 char nm[20];
5362 set_bit(In_sync, &rdev->flags); 5435 if (rdev->raid_disk >= conf->previous_raid_disks)
5436 set_bit(In_sync, &rdev->flags);
5437 else
5438 rdev->recovery_offset = 0;
5363 added_devices++; 5439 added_devices++;
5364 rdev->recovery_offset = 0;
5365 sprintf(nm, "rd%d", rdev->raid_disk); 5440 sprintf(nm, "rd%d", rdev->raid_disk);
5366 if (sysfs_create_link(&mddev->kobj, 5441 if (sysfs_create_link(&mddev->kobj,
5367 &rdev->kobj, nm)) 5442 &rdev->kobj, nm))
diff --git a/drivers/media/common/tuners/tda18271-fe.c b/drivers/media/common/tuners/tda18271-fe.c
index 64595112000d..3a50ce96fcb9 100644
--- a/drivers/media/common/tuners/tda18271-fe.c
+++ b/drivers/media/common/tuners/tda18271-fe.c
@@ -616,13 +616,13 @@ static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
616 case RF2: 616 case RF2:
617 map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] - 617 map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] -
618 prog_cal[RF1] + prog_tab[RF1]) / 618 prog_cal[RF1] + prog_tab[RF1]) /
619 ((rf_freq[RF2] - rf_freq[RF1]) / 1000); 619 (s32)((rf_freq[RF2] - rf_freq[RF1]) / 1000);
620 map[i].rf2 = rf_freq[RF2] / 1000; 620 map[i].rf2 = rf_freq[RF2] / 1000;
621 break; 621 break;
622 case RF3: 622 case RF3:
623 map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] - 623 map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] -
624 prog_cal[RF2] + prog_tab[RF2]) / 624 prog_cal[RF2] + prog_tab[RF2]) /
625 ((rf_freq[RF3] - rf_freq[RF2]) / 1000); 625 (s32)((rf_freq[RF3] - rf_freq[RF2]) / 1000);
626 map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2]; 626 map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2];
627 map[i].rf3 = rf_freq[RF3] / 1000; 627 map[i].rf3 = rf_freq[RF3] / 1000;
628 break; 628 break;
@@ -1000,12 +1000,12 @@ static int tda18271_set_analog_params(struct dvb_frontend *fe,
1000 struct tda18271_std_map_item *map; 1000 struct tda18271_std_map_item *map;
1001 char *mode; 1001 char *mode;
1002 int ret; 1002 int ret;
1003 u32 freq = params->frequency * 62500; 1003 u32 freq = params->frequency * 125 *
1004 ((params->mode == V4L2_TUNER_RADIO) ? 1 : 1000) / 2;
1004 1005
1005 priv->mode = TDA18271_ANALOG; 1006 priv->mode = TDA18271_ANALOG;
1006 1007
1007 if (params->mode == V4L2_TUNER_RADIO) { 1008 if (params->mode == V4L2_TUNER_RADIO) {
1008 freq = freq / 1000;
1009 map = &std_map->fm_radio; 1009 map = &std_map->fm_radio;
1010 mode = "fm"; 1010 mode = "fm";
1011 } else if (params->std & V4L2_STD_MN) { 1011 } else if (params->std & V4L2_STD_MN) {
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig
index 9744b0692417..0e4b97fba384 100644
--- a/drivers/media/dvb/dvb-usb/Kconfig
+++ b/drivers/media/dvb/dvb-usb/Kconfig
@@ -75,7 +75,7 @@ config DVB_USB_DIB0700
75 select DVB_DIB3000MC if !DVB_FE_CUSTOMISE 75 select DVB_DIB3000MC if !DVB_FE_CUSTOMISE
76 select DVB_S5H1411 if !DVB_FE_CUSTOMISE 76 select DVB_S5H1411 if !DVB_FE_CUSTOMISE
77 select DVB_LGDT3305 if !DVB_FE_CUSTOMISE 77 select DVB_LGDT3305 if !DVB_FE_CUSTOMISE
78 select DVB_TUNER_DIB0070 78 select DVB_TUNER_DIB0070 if !DVB_FE_CUSTOMISE
79 select MEDIA_TUNER_MT2060 if !MEDIA_TUNER_CUSTOMISE 79 select MEDIA_TUNER_MT2060 if !MEDIA_TUNER_CUSTOMISE
80 select MEDIA_TUNER_MT2266 if !MEDIA_TUNER_CUSTOMISE 80 select MEDIA_TUNER_MT2266 if !MEDIA_TUNER_CUSTOMISE
81 select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE 81 select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE
diff --git a/drivers/media/dvb/dvb-usb/ce6230.c b/drivers/media/dvb/dvb-usb/ce6230.c
index 0737c6377892..3df2045b7d2d 100644
--- a/drivers/media/dvb/dvb-usb/ce6230.c
+++ b/drivers/media/dvb/dvb-usb/ce6230.c
@@ -105,7 +105,7 @@ static int ce6230_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[],
105 int i = 0; 105 int i = 0;
106 struct req_t req; 106 struct req_t req;
107 int ret = 0; 107 int ret = 0;
108 memset(&req, 0, sizeof(&req)); 108 memset(&req, 0, sizeof(req));
109 109
110 if (num > 2) 110 if (num > 2)
111 return -EINVAL; 111 return -EINVAL;
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c
index 0b2812aa30a4..6bd8951ea02b 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -1925,7 +1925,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {
1925 { NULL }, 1925 { NULL },
1926 }, 1926 },
1927 { "Leadtek Winfast DTV Dongle (STK7700P based)", 1927 { "Leadtek Winfast DTV Dongle (STK7700P based)",
1928 { &dib0700_usb_id_table[8] }, 1928 { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] },
1929 { NULL }, 1929 { NULL },
1930 }, 1930 },
1931 { "AVerMedia AVerTV DVB-T Express", 1931 { "AVerMedia AVerTV DVB-T Express",
@@ -2064,7 +2064,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2064 }, 2064 },
2065 }, 2065 },
2066 2066
2067 .num_device_descs = 12, 2067 .num_device_descs = 11,
2068 .devices = { 2068 .devices = {
2069 { "DiBcom STK7070P reference design", 2069 { "DiBcom STK7070P reference design",
2070 { &dib0700_usb_id_table[15], NULL }, 2070 { &dib0700_usb_id_table[15], NULL },
@@ -2098,11 +2098,6 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2098 { &dib0700_usb_id_table[30], NULL }, 2098 { &dib0700_usb_id_table[30], NULL },
2099 { NULL }, 2099 { NULL },
2100 }, 2100 },
2101 { "Terratec Cinergy T USB XXS/ T3",
2102 { &dib0700_usb_id_table[33],
2103 &dib0700_usb_id_table[52], NULL },
2104 { NULL },
2105 },
2106 { "Elgato EyeTV DTT", 2101 { "Elgato EyeTV DTT",
2107 { &dib0700_usb_id_table[49], NULL }, 2102 { &dib0700_usb_id_table[49], NULL },
2108 { NULL }, 2103 { NULL },
@@ -2343,8 +2338,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2343 { &dib0700_usb_id_table[59], NULL }, 2338 { &dib0700_usb_id_table[59], NULL },
2344 { NULL }, 2339 { NULL },
2345 }, 2340 },
2346 { "Terratec Cinergy T USB XXS (HD)", 2341 { "Terratec Cinergy T USB XXS (HD)/ T3",
2347 { &dib0700_usb_id_table[34], &dib0700_usb_id_table[60] }, 2342 { &dib0700_usb_id_table[33],
2343 &dib0700_usb_id_table[52],
2344 &dib0700_usb_id_table[60], NULL},
2348 { NULL }, 2345 { NULL },
2349 }, 2346 },
2350 }, 2347 },
diff --git a/drivers/media/dvb/firewire/firedtv-avc.c b/drivers/media/dvb/firewire/firedtv-avc.c
index d1b67fe0f011..485d061319ab 100644
--- a/drivers/media/dvb/firewire/firedtv-avc.c
+++ b/drivers/media/dvb/firewire/firedtv-avc.c
@@ -1050,28 +1050,28 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
1050 c->operand[4] = 0; /* slot */ 1050 c->operand[4] = 0; /* slot */
1051 c->operand[5] = SFE_VENDOR_TAG_CA_PMT; /* ca tag */ 1051 c->operand[5] = SFE_VENDOR_TAG_CA_PMT; /* ca tag */
1052 c->operand[6] = 0; /* more/last */ 1052 c->operand[6] = 0; /* more/last */
1053 /* c->operand[7] = XXXprogram_info_length + 17; */ /* length */ 1053 /* Use three bytes for length field in case length > 127 */
1054 c->operand[8] = list_management; 1054 c->operand[10] = list_management;
1055 c->operand[9] = 0x01; /* pmt_cmd=OK_descramble */ 1055 c->operand[11] = 0x01; /* pmt_cmd=OK_descramble */
1056 1056
1057 /* TS program map table */ 1057 /* TS program map table */
1058 1058
1059 c->operand[10] = 0x02; /* Table id=2 */ 1059 c->operand[12] = 0x02; /* Table id=2 */
1060 c->operand[11] = 0x80; /* Section syntax + length */ 1060 c->operand[13] = 0x80; /* Section syntax + length */
1061 /* c->operand[12] = XXXprogram_info_length + 12; */ 1061 /* c->operand[14] = XXXprogram_info_length + 12; */
1062 c->operand[13] = msg[1]; /* Program number */ 1062 c->operand[15] = msg[1]; /* Program number */
1063 c->operand[14] = msg[2]; 1063 c->operand[16] = msg[2];
1064 c->operand[15] = 0x01; /* Version number=0 + current/next=1 */ 1064 c->operand[17] = 0x01; /* Version number=0 + current/next=1 */
1065 c->operand[16] = 0x00; /* Section number=0 */ 1065 c->operand[18] = 0x00; /* Section number=0 */
1066 c->operand[17] = 0x00; /* Last section number=0 */ 1066 c->operand[19] = 0x00; /* Last section number=0 */
1067 c->operand[18] = 0x1f; /* PCR_PID=1FFF */ 1067 c->operand[20] = 0x1f; /* PCR_PID=1FFF */
1068 c->operand[19] = 0xff; 1068 c->operand[21] = 0xff;
1069 c->operand[20] = (program_info_length >> 8); /* Program info length */ 1069 c->operand[22] = (program_info_length >> 8); /* Program info length */
1070 c->operand[21] = (program_info_length & 0xff); 1070 c->operand[23] = (program_info_length & 0xff);
1071 1071
1072 /* CA descriptors at programme level */ 1072 /* CA descriptors at programme level */
1073 read_pos = 6; 1073 read_pos = 6;
1074 write_pos = 22; 1074 write_pos = 24;
1075 if (program_info_length > 0) { 1075 if (program_info_length > 0) {
1076 pmt_cmd_id = msg[read_pos++]; 1076 pmt_cmd_id = msg[read_pos++];
1077 if (pmt_cmd_id != 1 && pmt_cmd_id != 4) 1077 if (pmt_cmd_id != 1 && pmt_cmd_id != 4)
@@ -1113,8 +1113,10 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
1113 c->operand[write_pos++] = 0x00; 1113 c->operand[write_pos++] = 0x00;
1114 c->operand[write_pos++] = 0x00; 1114 c->operand[write_pos++] = 0x00;
1115 1115
1116 c->operand[7] = write_pos - 8; 1116 c->operand[7] = 0x82;
1117 c->operand[12] = write_pos - 13; 1117 c->operand[8] = (write_pos - 10) >> 8;
1118 c->operand[9] = (write_pos - 10) & 0xff;
1119 c->operand[14] = write_pos - 15;
1118 1120
1119 crc32_csum = crc32_be(0, &c->operand[10], c->operand[12] - 1); 1121 crc32_csum = crc32_be(0, &c->operand[10], c->operand[12] - 1);
1120 c->operand[write_pos - 4] = (crc32_csum >> 24) & 0xff; 1122 c->operand[write_pos - 4] = (crc32_csum >> 24) & 0xff;
diff --git a/drivers/media/dvb/firewire/firedtv-fe.c b/drivers/media/dvb/firewire/firedtv-fe.c
index 7ba43630a25d..e49cdc88b0c7 100644
--- a/drivers/media/dvb/firewire/firedtv-fe.c
+++ b/drivers/media/dvb/firewire/firedtv-fe.c
@@ -141,18 +141,12 @@ static int fdtv_read_uncorrected_blocks(struct dvb_frontend *fe, u32 *ucblocks)
141 return -EOPNOTSUPP; 141 return -EOPNOTSUPP;
142} 142}
143 143
144#define ACCEPTED 0x9
145
146static int fdtv_set_frontend(struct dvb_frontend *fe, 144static int fdtv_set_frontend(struct dvb_frontend *fe,
147 struct dvb_frontend_parameters *params) 145 struct dvb_frontend_parameters *params)
148{ 146{
149 struct firedtv *fdtv = fe->sec_priv; 147 struct firedtv *fdtv = fe->sec_priv;
150 148
151 /* FIXME: avc_tuner_dsd never returns ACCEPTED. Check status? */ 149 return avc_tuner_dsd(fdtv, params);
152 if (avc_tuner_dsd(fdtv, params) != ACCEPTED)
153 return -EINVAL;
154 else
155 return 0; /* not sure of this... */
156} 150}
157 151
158static int fdtv_get_frontend(struct dvb_frontend *fe, 152static int fdtv_get_frontend(struct dvb_frontend *fe,
diff --git a/drivers/media/dvb/frontends/dib0070.h b/drivers/media/dvb/frontends/dib0070.h
index 8a2e1e710adb..eec9e52ffa75 100644
--- a/drivers/media/dvb/frontends/dib0070.h
+++ b/drivers/media/dvb/frontends/dib0070.h
@@ -51,6 +51,7 @@ struct dib0070_config {
51#if defined(CONFIG_DVB_TUNER_DIB0070) || (defined(CONFIG_DVB_TUNER_DIB0070_MODULE) && defined(MODULE)) 51#if defined(CONFIG_DVB_TUNER_DIB0070) || (defined(CONFIG_DVB_TUNER_DIB0070_MODULE) && defined(MODULE))
52extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg); 52extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg);
53extern u16 dib0070_wbd_offset(struct dvb_frontend *); 53extern u16 dib0070_wbd_offset(struct dvb_frontend *);
54extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, u8 open);
54#else 55#else
55static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg) 56static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg)
56{ 57{
@@ -63,7 +64,11 @@ static inline u16 dib0070_wbd_offset(struct dvb_frontend *fe)
63 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 64 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
64 return -ENODEV; 65 return -ENODEV;
65} 66}
67
68static inline void dib0070_ctrl_agc_filter(struct dvb_frontend *fe, u8 open)
69{
70 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
71}
66#endif 72#endif
67extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, u8 open);
68 73
69#endif 74#endif
diff --git a/drivers/media/dvb/frontends/dib7000p.c b/drivers/media/dvb/frontends/dib7000p.c
index 55ef6eeb0769..0781f94e05d2 100644
--- a/drivers/media/dvb/frontends/dib7000p.c
+++ b/drivers/media/dvb/frontends/dib7000p.c
@@ -1375,6 +1375,11 @@ struct dvb_frontend * dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr,
1375 if (dib7000p_identify(st) != 0) 1375 if (dib7000p_identify(st) != 0)
1376 goto error; 1376 goto error;
1377 1377
1378 /* FIXME: make sure the dev.parent field is initialized, or else
1379 request_firmware() will hit an OOPS (this should be moved somewhere
1380 more common) */
1381 st->i2c_master.gated_tuner_i2c_adap.dev.parent = i2c_adap->dev.parent;
1382
1378 dibx000_init_i2c_master(&st->i2c_master, DIB7000P, st->i2c_adap, st->i2c_addr); 1383 dibx000_init_i2c_master(&st->i2c_master, DIB7000P, st->i2c_adap, st->i2c_addr);
1379 1384
1380 dib7000p_demod_reset(st); 1385 dib7000p_demod_reset(st);
diff --git a/drivers/media/dvb/pt1/pt1.c b/drivers/media/dvb/pt1/pt1.c
index 81e623a90f09..1fd8306371e2 100644
--- a/drivers/media/dvb/pt1/pt1.c
+++ b/drivers/media/dvb/pt1/pt1.c
@@ -27,6 +27,7 @@
27#include <linux/pci.h> 27#include <linux/pci.h>
28#include <linux/kthread.h> 28#include <linux/kthread.h>
29#include <linux/freezer.h> 29#include <linux/freezer.h>
30#include <linux/vmalloc.h>
30 31
31#include "dvbdev.h" 32#include "dvbdev.h"
32#include "dvb_demux.h" 33#include "dvb_demux.h"
diff --git a/drivers/media/dvb/siano/smsusb.c b/drivers/media/dvb/siano/smsusb.c
index cb8a358b7310..8f88a586b0dd 100644
--- a/drivers/media/dvb/siano/smsusb.c
+++ b/drivers/media/dvb/siano/smsusb.c
@@ -529,6 +529,12 @@ struct usb_device_id smsusb_id_table[] = {
529 .driver_info = SMS1XXX_BOARD_SIANO_NICE }, 529 .driver_info = SMS1XXX_BOARD_SIANO_NICE },
530 { USB_DEVICE(0x187f, 0x0301), 530 { USB_DEVICE(0x187f, 0x0301),
531 .driver_info = SMS1XXX_BOARD_SIANO_VENICE }, 531 .driver_info = SMS1XXX_BOARD_SIANO_VENICE },
532 { USB_DEVICE(0x2040, 0xb900),
533 .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
534 { USB_DEVICE(0x2040, 0xb910),
535 .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
536 { USB_DEVICE(0x2040, 0xc000),
537 .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
532 { } /* Terminating entry */ 538 { } /* Terminating entry */
533 }; 539 };
534 540
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c
index 939d1e512974..a6724019c66f 100644
--- a/drivers/media/video/bt8xx/bttv-driver.c
+++ b/drivers/media/video/bt8xx/bttv-driver.c
@@ -1299,7 +1299,7 @@ set_tvnorm(struct bttv *btv, unsigned int norm)
1299 1299
1300 tvnorm = &bttv_tvnorms[norm]; 1300 tvnorm = &bttv_tvnorms[norm];
1301 1301
1302 if (!memcmp(&bttv_tvnorms[btv->tvnorm].cropcap, &tvnorm->cropcap, 1302 if (memcmp(&bttv_tvnorms[btv->tvnorm].cropcap, &tvnorm->cropcap,
1303 sizeof (tvnorm->cropcap))) { 1303 sizeof (tvnorm->cropcap))) {
1304 bttv_crop_reset(&btv->crop[0], norm); 1304 bttv_crop_reset(&btv->crop[0], norm);
1305 btv->crop[1] = btv->crop[0]; /* current = default */ 1305 btv->crop[1] = btv->crop[0]; /* current = default */
@@ -3800,11 +3800,34 @@ bttv_irq_next_video(struct bttv *btv, struct bttv_buffer_set *set)
3800 if (!V4L2_FIELD_HAS_BOTH(item->vb.field) && 3800 if (!V4L2_FIELD_HAS_BOTH(item->vb.field) &&
3801 (item->vb.queue.next != &btv->capture)) { 3801 (item->vb.queue.next != &btv->capture)) {
3802 item = list_entry(item->vb.queue.next, struct bttv_buffer, vb.queue); 3802 item = list_entry(item->vb.queue.next, struct bttv_buffer, vb.queue);
3803 /* Mike Isely <isely@pobox.com> - Only check
3804 * and set up the bottom field in the logic
3805 * below. Don't ever do the top field. This
3806 * of course means that if we set up the
3807 * bottom field in the above code that we'll
3808 * actually skip a field. But that's OK.
3809 * Having processed only a single buffer this
3810 * time, then the next time around the first
3811 * available buffer should be for a top field.
3812 * That will then cause us here to set up a
3813 * top then a bottom field in the normal way.
3814 * The alternative to this understanding is
3815 * that we set up the second available buffer
3816 * as a top field, but that's out of order
3817 * since this driver always processes the top
3818 * field first - the effect will be the two
3819 * buffers being returned in the wrong order,
3820 * with the second buffer also being delayed
3821 * by one field time (owing to the fifo nature
3822 * of videobuf). Worse still, we'll be stuck
3823 * doing fields out of order now every time
3824 * until something else causes a field to be
3825 * dropped. By effectively forcing a field to
3826 * drop this way then we always get back into
3827 * sync within a single frame time. (Out of
3828 * order fields can screw up deinterlacing
3829 * algorithms.) */
3803 if (!V4L2_FIELD_HAS_BOTH(item->vb.field)) { 3830 if (!V4L2_FIELD_HAS_BOTH(item->vb.field)) {
3804 if (NULL == set->top &&
3805 V4L2_FIELD_TOP == item->vb.field) {
3806 set->top = item;
3807 }
3808 if (NULL == set->bottom && 3831 if (NULL == set->bottom &&
3809 V4L2_FIELD_BOTTOM == item->vb.field) { 3832 V4L2_FIELD_BOTTOM == item->vb.field) {
3810 set->bottom = item; 3833 set->bottom = item;
diff --git a/drivers/media/video/em28xx/em28xx-audio.c b/drivers/media/video/em28xx/em28xx-audio.c
index 7bd8a70f0a0b..ac947aecb9c3 100644
--- a/drivers/media/video/em28xx/em28xx-audio.c
+++ b/drivers/media/video/em28xx/em28xx-audio.c
@@ -383,6 +383,11 @@ static int snd_em28xx_hw_capture_free(struct snd_pcm_substream *substream)
383 383
384static int snd_em28xx_prepare(struct snd_pcm_substream *substream) 384static int snd_em28xx_prepare(struct snd_pcm_substream *substream)
385{ 385{
386 struct em28xx *dev = snd_pcm_substream_chip(substream);
387
388 dev->adev.hwptr_done_capture = 0;
389 dev->adev.capture_transfer_done = 0;
390
386 return 0; 391 return 0;
387} 392}
388 393
diff --git a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
index 59400e858965..a27afeb6f39b 100644
--- a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
+++ b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
@@ -35,12 +35,25 @@ static
35 const 35 const
36 struct dmi_system_id s5k4aa_vflip_dmi_table[] = { 36 struct dmi_system_id s5k4aa_vflip_dmi_table[] = {
37 { 37 {
38 .ident = "BRUNEINIT",
39 .matches = {
40 DMI_MATCH(DMI_SYS_VENDOR, "BRUNENIT"),
41 DMI_MATCH(DMI_PRODUCT_NAME, "BRUNENIT"),
42 DMI_MATCH(DMI_BOARD_VERSION, "00030D0000000001")
43 }
44 }, {
38 .ident = "Fujitsu-Siemens Amilo Xa 2528", 45 .ident = "Fujitsu-Siemens Amilo Xa 2528",
39 .matches = { 46 .matches = {
40 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), 47 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
41 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xa 2528") 48 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xa 2528")
42 } 49 }
43 }, { 50 }, {
51 .ident = "Fujitsu-Siemens Amilo Xi 2528",
52 .matches = {
53 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
54 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xi 2528")
55 }
56 }, {
44 .ident = "Fujitsu-Siemens Amilo Xi 2550", 57 .ident = "Fujitsu-Siemens Amilo Xi 2550",
45 .matches = { 58 .matches = {
46 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), 59 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
@@ -57,6 +70,13 @@ static
57 .matches = { 70 .matches = {
58 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"), 71 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"),
59 DMI_MATCH(DMI_PRODUCT_NAME, "GX700"), 72 DMI_MATCH(DMI_PRODUCT_NAME, "GX700"),
73 DMI_MATCH(DMI_BIOS_DATE, "12/02/2008")
74 }
75 }, {
76 .ident = "MSI GX700",
77 .matches = {
78 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"),
79 DMI_MATCH(DMI_PRODUCT_NAME, "GX700"),
60 DMI_MATCH(DMI_BIOS_DATE, "07/26/2007") 80 DMI_MATCH(DMI_BIOS_DATE, "07/26/2007")
61 } 81 }
62 }, { 82 }, {
diff --git a/drivers/media/video/gspca/mr97310a.c b/drivers/media/video/gspca/mr97310a.c
index 140c8f320e47..f8328b9efae5 100644
--- a/drivers/media/video/gspca/mr97310a.c
+++ b/drivers/media/video/gspca/mr97310a.c
@@ -483,7 +483,7 @@ static int start_cif_cam(struct gspca_dev *gspca_dev)
483 data[3] = 0x2c; /* reg 2, H size/8 */ 483 data[3] = 0x2c; /* reg 2, H size/8 */
484 data[4] = 0x48; /* reg 3, V size/4 */ 484 data[4] = 0x48; /* reg 3, V size/4 */
485 data[6] = 0x06; /* reg 5, H start */ 485 data[6] = 0x06; /* reg 5, H start */
486 data[8] = 0x06 + sd->sensor_type; /* reg 7, V start */ 486 data[8] = 0x06 - sd->sensor_type; /* reg 7, V start */
487 break; 487 break;
488 } 488 }
489 err_code = mr_write(gspca_dev, 11); 489 err_code = mr_write(gspca_dev, 11);
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c
index 2f6e135d94bc..a5c190e93799 100644
--- a/drivers/media/video/gspca/ov519.c
+++ b/drivers/media/video/gspca/ov519.c
@@ -2919,7 +2919,7 @@ static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
2919 /* A false positive here is likely, until OVT gives me 2919 /* A false positive here is likely, until OVT gives me
2920 * the definitive SOF/EOF format */ 2920 * the definitive SOF/EOF format */
2921 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) { 2921 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
2922 gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0); 2922 frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0);
2923 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0); 2923 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0);
2924 sd->packet_nr = 0; 2924 sd->packet_nr = 0;
2925 } 2925 }
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx.c b/drivers/media/video/gspca/stv06xx/stv06xx.c
index 65489d6b0d89..bfae63f5584c 100644
--- a/drivers/media/video/gspca/stv06xx/stv06xx.c
+++ b/drivers/media/video/gspca/stv06xx/stv06xx.c
@@ -394,7 +394,8 @@ frame_data:
394 PDEBUG(D_PACK, "End of frame detected"); 394 PDEBUG(D_PACK, "End of frame detected");
395 395
396 /* Complete the last frame (if any) */ 396 /* Complete the last frame (if any) */
397 gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0); 397 frame = gspca_frame_add(gspca_dev, LAST_PACKET,
398 frame, data, 0);
398 399
399 if (chunk_len) 400 if (chunk_len)
400 PDEBUG(D_ERR, "Chunk length is " 401 PDEBUG(D_ERR, "Chunk length is "
diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c
index 6952e9602d5d..51b683c63b70 100644
--- a/drivers/media/video/pxa_camera.c
+++ b/drivers/media/video/pxa_camera.c
@@ -26,6 +26,7 @@
26#include <linux/device.h> 26#include <linux/device.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/sched.h>
29 30
30#include <media/v4l2-common.h> 31#include <media/v4l2-common.h>
31#include <media/v4l2-dev.h> 32#include <media/v4l2-dev.h>
@@ -1432,7 +1433,9 @@ static int pxa_camera_set_fmt(struct soc_camera_device *icd,
1432 icd->sense = &sense; 1433 icd->sense = &sense;
1433 1434
1434 cam_f.fmt.pix.pixelformat = cam_fmt->fourcc; 1435 cam_f.fmt.pix.pixelformat = cam_fmt->fourcc;
1435 ret = v4l2_subdev_call(sd, video, s_fmt, f); 1436 ret = v4l2_subdev_call(sd, video, s_fmt, &cam_f);
1437 cam_f.fmt.pix.pixelformat = pix->pixelformat;
1438 *pix = cam_f.fmt.pix;
1436 1439
1437 icd->sense = NULL; 1440 icd->sense = NULL;
1438 1441
diff --git a/drivers/media/video/s2255drv.c b/drivers/media/video/s2255drv.c
index 9e3262c0ba37..2c0bb06cab3b 100644
--- a/drivers/media/video/s2255drv.c
+++ b/drivers/media/video/s2255drv.c
@@ -598,11 +598,6 @@ static int s2255_got_frame(struct s2255_dev *dev, int chn, int jpgsize)
598 buf = list_entry(dma_q->active.next, 598 buf = list_entry(dma_q->active.next,
599 struct s2255_buffer, vb.queue); 599 struct s2255_buffer, vb.queue);
600 600
601 if (!waitqueue_active(&buf->vb.done)) {
602 /* no one active */
603 rc = -1;
604 goto unlock;
605 }
606 list_del(&buf->vb.queue); 601 list_del(&buf->vb.queue);
607 do_gettimeofday(&buf->vb.ts); 602 do_gettimeofday(&buf->vb.ts);
608 dprintk(100, "[%p/%d] wakeup\n", buf, buf->vb.i); 603 dprintk(100, "[%p/%d] wakeup\n", buf, buf->vb.i);
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c
index 71145bff94fa..09013229d4aa 100644
--- a/drivers/media/video/saa7134/saa7134-cards.c
+++ b/drivers/media/video/saa7134/saa7134-cards.c
@@ -3428,6 +3428,7 @@ struct saa7134_board saa7134_boards[] = {
3428 .tuner_config = 3, 3428 .tuner_config = 3,
3429 .mpeg = SAA7134_MPEG_DVB, 3429 .mpeg = SAA7134_MPEG_DVB,
3430 .ts_type = SAA7134_MPEG_TS_SERIAL, 3430 .ts_type = SAA7134_MPEG_TS_SERIAL,
3431 .ts_force_val = 1,
3431 .gpiomask = 0x0800100, /* GPIO 21 is an INPUT */ 3432 .gpiomask = 0x0800100, /* GPIO 21 is an INPUT */
3432 .inputs = {{ 3433 .inputs = {{
3433 .name = name_tv, 3434 .name = name_tv,
diff --git a/drivers/media/video/saa7134/saa7134-ts.c b/drivers/media/video/saa7134/saa7134-ts.c
index 3fa652279ac0..03488ba4c99c 100644
--- a/drivers/media/video/saa7134/saa7134-ts.c
+++ b/drivers/media/video/saa7134/saa7134-ts.c
@@ -262,11 +262,13 @@ int saa7134_ts_start(struct saa7134_dev *dev)
262 switch (saa7134_boards[dev->board].ts_type) { 262 switch (saa7134_boards[dev->board].ts_type) {
263 case SAA7134_MPEG_TS_PARALLEL: 263 case SAA7134_MPEG_TS_PARALLEL:
264 saa_writeb(SAA7134_TS_SERIAL0, 0x40); 264 saa_writeb(SAA7134_TS_SERIAL0, 0x40);
265 saa_writeb(SAA7134_TS_PARALLEL, 0xec); 265 saa_writeb(SAA7134_TS_PARALLEL, 0xec |
266 (saa7134_boards[dev->board].ts_force_val << 4));
266 break; 267 break;
267 case SAA7134_MPEG_TS_SERIAL: 268 case SAA7134_MPEG_TS_SERIAL:
268 saa_writeb(SAA7134_TS_SERIAL0, 0xd8); 269 saa_writeb(SAA7134_TS_SERIAL0, 0xd8);
269 saa_writeb(SAA7134_TS_PARALLEL, 0x6c); 270 saa_writeb(SAA7134_TS_PARALLEL, 0x6c |
271 (saa7134_boards[dev->board].ts_force_val << 4));
270 saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc); 272 saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc);
271 saa_writeb(SAA7134_TS_SERIAL1, 0x02); 273 saa_writeb(SAA7134_TS_SERIAL1, 0x02);
272 break; 274 break;
diff --git a/drivers/media/video/saa7134/saa7134.h b/drivers/media/video/saa7134/saa7134.h
index 6ee3e9b7769e..f8697d46ff5f 100644
--- a/drivers/media/video/saa7134/saa7134.h
+++ b/drivers/media/video/saa7134/saa7134.h
@@ -360,6 +360,7 @@ struct saa7134_board {
360 enum saa7134_mpeg_type mpeg; 360 enum saa7134_mpeg_type mpeg;
361 enum saa7134_mpeg_ts_type ts_type; 361 enum saa7134_mpeg_ts_type ts_type;
362 unsigned int vid_port_opts; 362 unsigned int vid_port_opts;
363 unsigned int ts_force_val:1;
363}; 364};
364 365
365#define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name) 366#define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name)
diff --git a/drivers/media/video/saa7164/saa7164-cmd.c b/drivers/media/video/saa7164/saa7164-cmd.c
index c45966edc0cf..9c1d3ac43869 100644
--- a/drivers/media/video/saa7164/saa7164-cmd.c
+++ b/drivers/media/video/saa7164/saa7164-cmd.c
@@ -347,7 +347,7 @@ int saa7164_cmd_send(struct saa7164_dev *dev, u8 id, tmComResCmd_t command,
347 347
348 /* Prepare some basic command/response structures */ 348 /* Prepare some basic command/response structures */
349 memset(&command_t, 0, sizeof(command_t)); 349 memset(&command_t, 0, sizeof(command_t));
350 memset(&response_t, 0, sizeof(&response_t)); 350 memset(&response_t, 0, sizeof(response_t));
351 pcommand_t = &command_t; 351 pcommand_t = &command_t;
352 presponse_t = &response_t; 352 presponse_t = &response_t;
353 command_t.id = id; 353 command_t.id = id;
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c
index 65ac474c517a..2f78b4f263f5 100644
--- a/drivers/media/video/sh_mobile_ceu_camera.c
+++ b/drivers/media/video/sh_mobile_ceu_camera.c
@@ -1173,8 +1173,8 @@ static int get_scales(struct soc_camera_device *icd,
1173 width_in = scale_up(cam->ceu_rect.width, *scale_h); 1173 width_in = scale_up(cam->ceu_rect.width, *scale_h);
1174 height_in = scale_up(cam->ceu_rect.height, *scale_v); 1174 height_in = scale_up(cam->ceu_rect.height, *scale_v);
1175 1175
1176 *scale_h = calc_generic_scale(cam->ceu_rect.width, icd->user_width); 1176 *scale_h = calc_generic_scale(width_in, icd->user_width);
1177 *scale_v = calc_generic_scale(cam->ceu_rect.height, icd->user_height); 1177 *scale_v = calc_generic_scale(height_in, icd->user_height);
1178 1178
1179 return 0; 1179 return 0;
1180} 1180}
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c
index 59aa7a3694c2..36e617bd13c7 100644
--- a/drivers/media/video/soc_camera.c
+++ b/drivers/media/video/soc_camera.c
@@ -1160,13 +1160,15 @@ void soc_camera_host_unregister(struct soc_camera_host *ici)
1160 if (icd->iface == ici->nr) { 1160 if (icd->iface == ici->nr) {
1161 /* The bus->remove will be called */ 1161 /* The bus->remove will be called */
1162 device_unregister(&icd->dev); 1162 device_unregister(&icd->dev);
1163 /* Not before device_unregister(), .remove 1163 /*
1164 * needs parent to call ici->ops->remove() */ 1164 * Not before device_unregister(), .remove
1165 icd->dev.parent = NULL; 1165 * needs parent to call ici->ops->remove().
1166 1166 * If the host module is loaded again, device_register()
1167 /* If the host module is loaded again, device_register() 1167 * would complain "already initialised," since 2.6.32
1168 * would complain "already initialised" */ 1168 * this is also needed to prevent use-after-free of the
1169 memset(&icd->dev.kobj, 0, sizeof(icd->dev.kobj)); 1169 * device private data.
1170 */
1171 memset(&icd->dev, 0, sizeof(icd->dev));
1170 } 1172 }
1171 } 1173 }
1172 1174
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c
index c3225a561748..1b89735e62fd 100644
--- a/drivers/media/video/uvc/uvc_ctrl.c
+++ b/drivers/media/video/uvc/uvc_ctrl.c
@@ -348,7 +348,7 @@ static void uvc_ctrl_set_zoom(struct uvc_control_mapping *mapping,
348 __s32 value, __u8 *data) 348 __s32 value, __u8 *data)
349{ 349{
350 data[0] = value == 0 ? 0 : (value > 0) ? 1 : 0xff; 350 data[0] = value == 0 ? 0 : (value > 0) ? 1 : 0xff;
351 data[2] = min(abs(value), 0xff); 351 data[2] = min((int)abs(value), 0xff);
352} 352}
353 353
354static struct uvc_control_mapping uvc_ctrl_mappings[] = { 354static struct uvc_control_mapping uvc_ctrl_mappings[] = {
diff --git a/drivers/media/video/uvc/uvc_video.c b/drivers/media/video/uvc/uvc_video.c
index f960e8ea4f17..a6e41d12b221 100644
--- a/drivers/media/video/uvc/uvc_video.c
+++ b/drivers/media/video/uvc/uvc_video.c
@@ -90,7 +90,8 @@ static void uvc_fixup_video_ctrl(struct uvc_streaming *stream,
90 ctrl->dwMaxVideoFrameSize = 90 ctrl->dwMaxVideoFrameSize =
91 frame->dwMaxVideoFrameBufferSize; 91 frame->dwMaxVideoFrameBufferSize;
92 92
93 if (stream->dev->quirks & UVC_QUIRK_FIX_BANDWIDTH && 93 if (!(format->flags & UVC_FMT_FLAG_COMPRESSED) &&
94 stream->dev->quirks & UVC_QUIRK_FIX_BANDWIDTH &&
94 stream->intf->num_altsetting > 1) { 95 stream->intf->num_altsetting > 1) {
95 u32 interval; 96 u32 interval;
96 u32 bandwidth; 97 u32 bandwidth;
diff --git a/drivers/misc/sgi-gru/gruprocfs.c b/drivers/misc/sgi-gru/gruprocfs.c
index ccd4408a26c7..3f2375c5ba5b 100644
--- a/drivers/misc/sgi-gru/gruprocfs.c
+++ b/drivers/misc/sgi-gru/gruprocfs.c
@@ -161,14 +161,15 @@ static int options_show(struct seq_file *s, void *p)
161static ssize_t options_write(struct file *file, const char __user *userbuf, 161static ssize_t options_write(struct file *file, const char __user *userbuf,
162 size_t count, loff_t *data) 162 size_t count, loff_t *data)
163{ 163{
164 unsigned long val; 164 char buf[20];
165 char buf[80];
166 165
167 if (strncpy_from_user(buf, userbuf, sizeof(buf) - 1) < 0) 166 if (count >= sizeof(buf))
167 return -EINVAL;
168 if (copy_from_user(buf, userbuf, count))
168 return -EFAULT; 169 return -EFAULT;
169 buf[count - 1] = '\0'; 170 buf[count] = '\0';
170 if (!strict_strtoul(buf, 10, &val)) 171 if (strict_strtoul(buf, 0, &gru_options))
171 gru_options = val; 172 return -EINVAL;
172 173
173 return count; 174 return count;
174} 175}
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index 5d773b89af7c..5f970e253e50 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -1529,6 +1529,7 @@ static int mmc_omap_remove(struct platform_device *pdev)
1529 host->pdata->cleanup(&pdev->dev); 1529 host->pdata->cleanup(&pdev->dev);
1530 1530
1531 mmc_omap_fclk_enable(host, 0); 1531 mmc_omap_fclk_enable(host, 0);
1532 free_irq(host->irq, host);
1532 clk_put(host->fclk); 1533 clk_put(host->fclk);
1533 clk_disable(host->iclk); 1534 clk_disable(host->iclk);
1534 clk_put(host->iclk); 1535 clk_put(host->iclk);
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 841e085ab74a..14be0755d7cd 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -486,6 +486,7 @@ config MTD_BFIN_ASYNC
486 486
487config MTD_GPIO_ADDR 487config MTD_GPIO_ADDR
488 tristate "GPIO-assisted Flash Chip Support" 488 tristate "GPIO-assisted Flash Chip Support"
489 depends on GENERIC_GPIO || GPIOLIB
489 depends on MTD_COMPLEX_MAPPINGS 490 depends on MTD_COMPLEX_MAPPINGS
490 select MTD_PARTITIONS 491 select MTD_PARTITIONS
491 help 492 help
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index 1d5cf8636723..ae2f6dbe43c3 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -58,4 +58,6 @@ obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
58obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o 58obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
59obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o 59obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o
60obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o 60obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o
61obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o
62obj-$(CONFIG_MTD_VMU) += vmu-flash.o
61obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o 63obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o
diff --git a/drivers/mtd/maps/gpio-addr-flash.c b/drivers/mtd/maps/gpio-addr-flash.c
index 44ef9a49a860..1ad5caf9fe69 100644
--- a/drivers/mtd/maps/gpio-addr-flash.c
+++ b/drivers/mtd/maps/gpio-addr-flash.c
@@ -13,7 +13,9 @@
13 * Licensed under the GPL-2 or later. 13 * Licensed under the GPL-2 or later.
14 */ 14 */
15 15
16#include <linux/gpio.h>
16#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/io.h>
17#include <linux/kernel.h> 19#include <linux/kernel.h>
18#include <linux/module.h> 20#include <linux/module.h>
19#include <linux/mtd/mtd.h> 21#include <linux/mtd/mtd.h>
@@ -23,9 +25,6 @@
23#include <linux/platform_device.h> 25#include <linux/platform_device.h>
24#include <linux/types.h> 26#include <linux/types.h>
25 27
26#include <asm/gpio.h>
27#include <asm/io.h>
28
29#define pr_devinit(fmt, args...) ({ static const __devinitconst char __fmt[] = fmt; printk(__fmt, ## args); }) 28#define pr_devinit(fmt, args...) ({ static const __devinitconst char __fmt[] = fmt; printk(__fmt, ## args); })
30 29
31#define DRIVER_NAME "gpio-addr-flash" 30#define DRIVER_NAME "gpio-addr-flash"
diff --git a/drivers/mtd/maps/sa1100-flash.c b/drivers/mtd/maps/sa1100-flash.c
index fdb97f3d30e9..d7a47574d21e 100644
--- a/drivers/mtd/maps/sa1100-flash.c
+++ b/drivers/mtd/maps/sa1100-flash.c
@@ -209,8 +209,8 @@ static int sa1100_probe_subdev(struct sa_subdev_info *subdev, struct resource *r
209 } 209 }
210 subdev->mtd->owner = THIS_MODULE; 210 subdev->mtd->owner = THIS_MODULE;
211 211
212 printk(KERN_INFO "SA1100 flash: CFI device at 0x%08lx, %dMiB, " 212 printk(KERN_INFO "SA1100 flash: CFI device at 0x%08lx, %uMiB, %d-bit\n",
213 "%d-bit\n", phys, subdev->mtd->size >> 20, 213 phys, (unsigned)(subdev->mtd->size >> 20),
214 subdev->map.bankwidth * 8); 214 subdev->map.bankwidth * 8);
215 215
216 return 0; 216 return 0;
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 22113865438b..2957cc70da3d 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -761,6 +761,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
761 * @mtd: mtd info structure 761 * @mtd: mtd info structure
762 * @chip: nand chip info structure 762 * @chip: nand chip info structure
763 * @buf: buffer to store read data 763 * @buf: buffer to store read data
764 * @page: page number to read
764 * 765 *
765 * Not for syndrome calculating ecc controllers, which use a special oob layout 766 * Not for syndrome calculating ecc controllers, which use a special oob layout
766 */ 767 */
@@ -777,6 +778,7 @@ static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
777 * @mtd: mtd info structure 778 * @mtd: mtd info structure
778 * @chip: nand chip info structure 779 * @chip: nand chip info structure
779 * @buf: buffer to store read data 780 * @buf: buffer to store read data
781 * @page: page number to read
780 * 782 *
781 * We need a special oob layout and handling even when OOB isn't used. 783 * We need a special oob layout and handling even when OOB isn't used.
782 */ 784 */
@@ -818,6 +820,7 @@ static int nand_read_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *c
818 * @mtd: mtd info structure 820 * @mtd: mtd info structure
819 * @chip: nand chip info structure 821 * @chip: nand chip info structure
820 * @buf: buffer to store read data 822 * @buf: buffer to store read data
823 * @page: page number to read
821 */ 824 */
822static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, 825static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
823 uint8_t *buf, int page) 826 uint8_t *buf, int page)
@@ -939,6 +942,7 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, uint3
939 * @mtd: mtd info structure 942 * @mtd: mtd info structure
940 * @chip: nand chip info structure 943 * @chip: nand chip info structure
941 * @buf: buffer to store read data 944 * @buf: buffer to store read data
945 * @page: page number to read
942 * 946 *
943 * Not for syndrome calculating ecc controllers which need a special oob layout 947 * Not for syndrome calculating ecc controllers which need a special oob layout
944 */ 948 */
@@ -983,6 +987,7 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
983 * @mtd: mtd info structure 987 * @mtd: mtd info structure
984 * @chip: nand chip info structure 988 * @chip: nand chip info structure
985 * @buf: buffer to store read data 989 * @buf: buffer to store read data
990 * @page: page number to read
986 * 991 *
987 * Hardware ECC for large page chips, require OOB to be read first. 992 * Hardware ECC for large page chips, require OOB to be read first.
988 * For this ECC mode, the write_page method is re-used from ECC_HW. 993 * For this ECC mode, the write_page method is re-used from ECC_HW.
@@ -1031,6 +1036,7 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
1031 * @mtd: mtd info structure 1036 * @mtd: mtd info structure
1032 * @chip: nand chip info structure 1037 * @chip: nand chip info structure
1033 * @buf: buffer to store read data 1038 * @buf: buffer to store read data
1039 * @page: page number to read
1034 * 1040 *
1035 * The hw generator calculates the error syndrome automatically. Therefor 1041 * The hw generator calculates the error syndrome automatically. Therefor
1036 * we need a special oob layout and handling. 1042 * we need a special oob layout and handling.
diff --git a/drivers/net/benet/be.h b/drivers/net/benet/be.h
index a80da0e14a52..3b79a225628a 100644
--- a/drivers/net/benet/be.h
+++ b/drivers/net/benet/be.h
@@ -259,6 +259,8 @@ struct be_adapter {
259 u32 port_num; 259 u32 port_num;
260 bool promiscuous; 260 bool promiscuous;
261 u32 cap; 261 u32 cap;
262 u32 rx_fc; /* Rx flow control */
263 u32 tx_fc; /* Tx flow control */
262}; 264};
263 265
264extern const struct ethtool_ops be_ethtool_ops; 266extern const struct ethtool_ops be_ethtool_ops;
diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h
index 49953787e41c..e5f9676cf1bc 100644
--- a/drivers/net/benet/be_cmds.h
+++ b/drivers/net/benet/be_cmds.h
@@ -68,7 +68,7 @@ enum {
68#define CQE_STATUS_COMPL_MASK 0xFFFF 68#define CQE_STATUS_COMPL_MASK 0xFFFF
69#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ 69#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */
70#define CQE_STATUS_EXTD_MASK 0xFFFF 70#define CQE_STATUS_EXTD_MASK 0xFFFF
71#define CQE_STATUS_EXTD_SHIFT 0 /* bits 0 - 15 */ 71#define CQE_STATUS_EXTD_SHIFT 16 /* bits 16 - 31 */
72 72
73struct be_mcc_compl { 73struct be_mcc_compl {
74 u32 status; /* dword 0 */ 74 u32 status; /* dword 0 */
diff --git a/drivers/net/benet/be_ethtool.c b/drivers/net/benet/be_ethtool.c
index cda5bf2fc50a..f0fd95b43c07 100644
--- a/drivers/net/benet/be_ethtool.c
+++ b/drivers/net/benet/be_ethtool.c
@@ -323,10 +323,12 @@ be_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
323 323
324 if (ecmd->autoneg != 0) 324 if (ecmd->autoneg != 0)
325 return -EINVAL; 325 return -EINVAL;
326 adapter->tx_fc = ecmd->tx_pause;
327 adapter->rx_fc = ecmd->rx_pause;
326 328
327 status = be_cmd_set_flow_control(adapter, ecmd->tx_pause, 329 status = be_cmd_set_flow_control(adapter,
328 ecmd->rx_pause); 330 adapter->tx_fc, adapter->rx_fc);
329 if (!status) 331 if (status)
330 dev_warn(&adapter->pdev->dev, "Pause param set failed.\n"); 332 dev_warn(&adapter->pdev->dev, "Pause param set failed.\n");
331 333
332 return status; 334 return status;
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
index 1f941f027718..876b357101fa 100644
--- a/drivers/net/benet/be_main.c
+++ b/drivers/net/benet/be_main.c
@@ -1610,11 +1610,21 @@ static int be_open(struct net_device *netdev)
1610 1610
1611 status = be_cmd_link_status_query(adapter, &link_up); 1611 status = be_cmd_link_status_query(adapter, &link_up);
1612 if (status) 1612 if (status)
1613 return status; 1613 goto ret_sts;
1614 be_link_status_update(adapter, link_up); 1614 be_link_status_update(adapter, link_up);
1615 1615
1616 status = be_vid_config(adapter);
1617 if (status)
1618 goto ret_sts;
1619
1620 status = be_cmd_set_flow_control(adapter,
1621 adapter->tx_fc, adapter->rx_fc);
1622 if (status)
1623 goto ret_sts;
1624
1616 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); 1625 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
1617 return 0; 1626ret_sts:
1627 return status;
1618} 1628}
1619 1629
1620static int be_setup(struct be_adapter *adapter) 1630static int be_setup(struct be_adapter *adapter)
@@ -1648,17 +1658,8 @@ static int be_setup(struct be_adapter *adapter)
1648 if (status != 0) 1658 if (status != 0)
1649 goto rx_qs_destroy; 1659 goto rx_qs_destroy;
1650 1660
1651 status = be_vid_config(adapter);
1652 if (status != 0)
1653 goto mccqs_destroy;
1654
1655 status = be_cmd_set_flow_control(adapter, true, true);
1656 if (status != 0)
1657 goto mccqs_destroy;
1658 return 0; 1661 return 0;
1659 1662
1660mccqs_destroy:
1661 be_mcc_queues_destroy(adapter);
1662rx_qs_destroy: 1663rx_qs_destroy:
1663 be_rx_queues_destroy(adapter); 1664 be_rx_queues_destroy(adapter);
1664tx_qs_destroy: 1665tx_qs_destroy:
@@ -1909,6 +1910,10 @@ static void be_netdev_init(struct net_device *netdev)
1909 1910
1910 adapter->rx_csum = true; 1911 adapter->rx_csum = true;
1911 1912
1913 /* Default settings for Rx and Tx flow control */
1914 adapter->rx_fc = true;
1915 adapter->tx_fc = true;
1916
1912 netif_set_gso_max_size(netdev, 65535); 1917 netif_set_gso_max_size(netdev, 65535);
1913 1918
1914 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops); 1919 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
@@ -2171,6 +2176,7 @@ static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2171 be_close(netdev); 2176 be_close(netdev);
2172 rtnl_unlock(); 2177 rtnl_unlock();
2173 } 2178 }
2179 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
2174 be_clear(adapter); 2180 be_clear(adapter);
2175 2181
2176 pci_save_state(pdev); 2182 pci_save_state(pdev);
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
index df32c109b7ac..772f6d2489ce 100644
--- a/drivers/net/can/Kconfig
+++ b/drivers/net/can/Kconfig
@@ -35,66 +35,16 @@ config CAN_CALC_BITTIMING
35 arguments "tq", "prop_seg", "phase_seg1", "phase_seg2" and "sjw". 35 arguments "tq", "prop_seg", "phase_seg1", "phase_seg2" and "sjw".
36 If unsure, say Y. 36 If unsure, say Y.
37 37
38config CAN_SJA1000
39 depends on CAN_DEV && HAS_IOMEM
40 tristate "Philips SJA1000"
41 ---help---
42 Driver for the SJA1000 CAN controllers from Philips or NXP
43
44config CAN_SJA1000_ISA
45 depends on CAN_SJA1000 && ISA
46 tristate "ISA Bus based legacy SJA1000 driver"
47 ---help---
48 This driver adds legacy support for SJA1000 chips connected to
49 the ISA bus using I/O port, memory mapped or indirect access.
50
51config CAN_SJA1000_PLATFORM
52 depends on CAN_SJA1000
53 tristate "Generic Platform Bus based SJA1000 driver"
54 ---help---
55 This driver adds support for the SJA1000 chips connected to
56 the "platform bus" (Linux abstraction for directly to the
57 processor attached devices). Which can be found on various
58 boards from Phytec (http://www.phytec.de) like the PCM027,
59 PCM038.
60
61config CAN_SJA1000_OF_PLATFORM
62 depends on CAN_SJA1000 && PPC_OF
63 tristate "Generic OF Platform Bus based SJA1000 driver"
64 ---help---
65 This driver adds support for the SJA1000 chips connected to
66 the OpenFirmware "platform bus" found on embedded systems with
67 OpenFirmware bindings, e.g. if you have a PowerPC based system
68 you may want to enable this option.
69
70config CAN_EMS_PCI
71 tristate "EMS CPC-PCI, CPC-PCIe and CPC-104P Card"
72 depends on PCI && CAN_SJA1000
73 ---help---
74 This driver is for the one, two or four channel CPC-PCI,
75 CPC-PCIe and CPC-104P cards from EMS Dr. Thomas Wuensche
76 (http://www.ems-wuensche.de).
77
78config CAN_EMS_USB
79 tristate "EMS CPC-USB/ARM7 CAN/USB interface"
80 depends on USB && CAN_DEV
81 ---help---
82 This driver is for the one channel CPC-USB/ARM7 CAN/USB interface
83 from from EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de).
84
85config CAN_KVASER_PCI
86 tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards"
87 depends on PCI && CAN_SJA1000
88 ---help---
89 This driver is for the the PCIcanx and PCIcan cards (1, 2 or
90 4 channel) from Kvaser (http://www.kvaser.com).
91
92config CAN_AT91 38config CAN_AT91
93 tristate "Atmel AT91 onchip CAN controller" 39 tristate "Atmel AT91 onchip CAN controller"
94 depends on CAN && CAN_DEV && ARCH_AT91SAM9263 40 depends on CAN_DEV && ARCH_AT91SAM9263
95 ---help--- 41 ---help---
96 This is a driver for the SoC CAN controller in Atmel's AT91SAM9263. 42 This is a driver for the SoC CAN controller in Atmel's AT91SAM9263.
97 43
44source "drivers/net/can/sja1000/Kconfig"
45
46source "drivers/net/can/usb/Kconfig"
47
98config CAN_DEBUG_DEVICES 48config CAN_DEBUG_DEVICES
99 bool "CAN devices debugging messages" 49 bool "CAN devices debugging messages"
100 depends on CAN 50 depends on CAN
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c
index f0b9a1e1db46..2868fe842a41 100644
--- a/drivers/net/can/dev.c
+++ b/drivers/net/can/dev.c
@@ -589,6 +589,22 @@ static int can_changelink(struct net_device *dev,
589 return 0; 589 return 0;
590} 590}
591 591
592static size_t can_get_size(const struct net_device *dev)
593{
594 struct can_priv *priv = netdev_priv(dev);
595 size_t size;
596
597 size = nla_total_size(sizeof(u32)); /* IFLA_CAN_STATE */
598 size += sizeof(struct can_ctrlmode); /* IFLA_CAN_CTRLMODE */
599 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_RESTART_MS */
600 size += sizeof(struct can_bittiming); /* IFLA_CAN_BITTIMING */
601 size += sizeof(struct can_clock); /* IFLA_CAN_CLOCK */
602 if (priv->bittiming_const) /* IFLA_CAN_BITTIMING_CONST */
603 size += sizeof(struct can_bittiming_const);
604
605 return size;
606}
607
592static int can_fill_info(struct sk_buff *skb, const struct net_device *dev) 608static int can_fill_info(struct sk_buff *skb, const struct net_device *dev)
593{ 609{
594 struct can_priv *priv = netdev_priv(dev); 610 struct can_priv *priv = netdev_priv(dev);
@@ -613,6 +629,11 @@ nla_put_failure:
613 return -EMSGSIZE; 629 return -EMSGSIZE;
614} 630}
615 631
632static size_t can_get_xstats_size(const struct net_device *dev)
633{
634 return sizeof(struct can_device_stats);
635}
636
616static int can_fill_xstats(struct sk_buff *skb, const struct net_device *dev) 637static int can_fill_xstats(struct sk_buff *skb, const struct net_device *dev)
617{ 638{
618 struct can_priv *priv = netdev_priv(dev); 639 struct can_priv *priv = netdev_priv(dev);
@@ -639,7 +660,9 @@ static struct rtnl_link_ops can_link_ops __read_mostly = {
639 .setup = can_setup, 660 .setup = can_setup,
640 .newlink = can_newlink, 661 .newlink = can_newlink,
641 .changelink = can_changelink, 662 .changelink = can_changelink,
663 .get_size = can_get_size,
642 .fill_info = can_fill_info, 664 .fill_info = can_fill_info,
665 .get_xstats_size = can_get_xstats_size,
643 .fill_xstats = can_fill_xstats, 666 .fill_xstats = can_fill_xstats,
644}; 667};
645 668
diff --git a/drivers/net/can/sja1000/Kconfig b/drivers/net/can/sja1000/Kconfig
new file mode 100644
index 000000000000..4c674927f247
--- /dev/null
+++ b/drivers/net/can/sja1000/Kconfig
@@ -0,0 +1,47 @@
1menuconfig CAN_SJA1000
2 tristate "Philips/NXP SJA1000 devices"
3 depends on CAN_DEV && HAS_IOMEM
4
5if CAN_SJA1000
6
7config CAN_SJA1000_ISA
8 tristate "ISA Bus based legacy SJA1000 driver"
9 depends on ISA
10 ---help---
11 This driver adds legacy support for SJA1000 chips connected to
12 the ISA bus using I/O port, memory mapped or indirect access.
13
14config CAN_SJA1000_PLATFORM
15 tristate "Generic Platform Bus based SJA1000 driver"
16 ---help---
17 This driver adds support for the SJA1000 chips connected to
18 the "platform bus" (Linux abstraction for directly to the
19 processor attached devices). Which can be found on various
20 boards from Phytec (http://www.phytec.de) like the PCM027,
21 PCM038.
22
23config CAN_SJA1000_OF_PLATFORM
24 tristate "Generic OF Platform Bus based SJA1000 driver"
25 depends on PPC_OF
26 ---help---
27 This driver adds support for the SJA1000 chips connected to
28 the OpenFirmware "platform bus" found on embedded systems with
29 OpenFirmware bindings, e.g. if you have a PowerPC based system
30 you may want to enable this option.
31
32config CAN_EMS_PCI
33 tristate "EMS CPC-PCI, CPC-PCIe and CPC-104P Card"
34 depends on PCI
35 ---help---
36 This driver is for the one, two or four channel CPC-PCI,
37 CPC-PCIe and CPC-104P cards from EMS Dr. Thomas Wuensche
38 (http://www.ems-wuensche.de).
39
40config CAN_KVASER_PCI
41 tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards"
42 depends on PCI
43 ---help---
44 This driver is for the the PCIcanx and PCIcan cards (1, 2 or
45 4 channel) from Kvaser (http://www.kvaser.com).
46
47endif
diff --git a/drivers/net/can/usb/Kconfig b/drivers/net/can/usb/Kconfig
new file mode 100644
index 000000000000..bbc78e0b8a15
--- /dev/null
+++ b/drivers/net/can/usb/Kconfig
@@ -0,0 +1,10 @@
1menu "CAN USB interfaces"
2 depends on USB && CAN_DEV
3
4config CAN_EMS_USB
5 tristate "EMS CPC-USB/ARM7 CAN/USB interface"
6 ---help---
7 This driver is for the one channel CPC-USB/ARM7 CAN/USB interface
8 from from EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de).
9
10endmenu
diff --git a/drivers/net/can/usb/Makefile b/drivers/net/can/usb/Makefile
index c3f75ba701b1..0afd51d4c7a5 100644
--- a/drivers/net/can/usb/Makefile
+++ b/drivers/net/can/usb/Makefile
@@ -3,3 +3,5 @@
3# 3#
4 4
5obj-$(CONFIG_CAN_EMS_USB) += ems_usb.o 5obj-$(CONFIG_CAN_EMS_USB) += ems_usb.o
6
7ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c
index 9012e0abc626..abdbd9c2b788 100644
--- a/drivers/net/can/usb/ems_usb.c
+++ b/drivers/net/can/usb/ems_usb.c
@@ -319,7 +319,7 @@ static void ems_usb_rx_can_msg(struct ems_usb *dev, struct ems_cpc_msg *msg)
319 319
320 cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame)); 320 cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame));
321 321
322 cf->can_id = msg->msg.can_msg.id; 322 cf->can_id = le32_to_cpu(msg->msg.can_msg.id);
323 cf->can_dlc = min_t(u8, msg->msg.can_msg.length, 8); 323 cf->can_dlc = min_t(u8, msg->msg.can_msg.length, 8);
324 324
325 if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME 325 if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME
@@ -813,6 +813,9 @@ static netdev_tx_t ems_usb_start_xmit(struct sk_buff *skb, struct net_device *ne
813 msg->length = CPC_CAN_MSG_MIN_SIZE + cf->can_dlc; 813 msg->length = CPC_CAN_MSG_MIN_SIZE + cf->can_dlc;
814 } 814 }
815 815
816 /* Respect byte order */
817 msg->msg.can_msg.id = cpu_to_le32(msg->msg.can_msg.id);
818
816 for (i = 0; i < MAX_TX_URBS; i++) { 819 for (i = 0; i < MAX_TX_URBS; i++) {
817 if (dev->tx_contexts[i].echo_index == MAX_TX_URBS) { 820 if (dev->tx_contexts[i].echo_index == MAX_TX_URBS) {
818 context = &dev->tx_contexts[i]; 821 context = &dev->tx_contexts[i];
diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c
index 05916aafa4f1..f857afe8e488 100644
--- a/drivers/net/cassini.c
+++ b/drivers/net/cassini.c
@@ -4342,11 +4342,11 @@ static int cas_open(struct net_device *dev)
4342 cas_unlock_all_restore(cp, flags); 4342 cas_unlock_all_restore(cp, flags);
4343 } 4343 }
4344 4344
4345 err = -ENOMEM;
4345 if (cas_tx_tiny_alloc(cp) < 0) 4346 if (cas_tx_tiny_alloc(cp) < 0)
4346 return -ENOMEM; 4347 goto err_unlock;
4347 4348
4348 /* alloc rx descriptors */ 4349 /* alloc rx descriptors */
4349 err = -ENOMEM;
4350 if (cas_alloc_rxds(cp) < 0) 4350 if (cas_alloc_rxds(cp) < 0)
4351 goto err_tx_tiny; 4351 goto err_tx_tiny;
4352 4352
@@ -4386,6 +4386,7 @@ err_spare:
4386 cas_free_rxds(cp); 4386 cas_free_rxds(cp);
4387err_tx_tiny: 4387err_tx_tiny:
4388 cas_tx_tiny_free(cp); 4388 cas_tx_tiny_free(cp);
4389err_unlock:
4389 mutex_unlock(&cp->pm_mutex); 4390 mutex_unlock(&cp->pm_mutex);
4390 return err; 4391 return err;
4391} 4392}
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c
index f86612857a73..6366061712f4 100644
--- a/drivers/net/cxgb3/sge.c
+++ b/drivers/net/cxgb3/sge.c
@@ -879,7 +879,7 @@ recycle:
879 pci_dma_sync_single_for_cpu(adap->pdev, dma_addr, len, 879 pci_dma_sync_single_for_cpu(adap->pdev, dma_addr, len,
880 PCI_DMA_FROMDEVICE); 880 PCI_DMA_FROMDEVICE);
881 (*sd->pg_chunk.p_cnt)--; 881 (*sd->pg_chunk.p_cnt)--;
882 if (!*sd->pg_chunk.p_cnt) 882 if (!*sd->pg_chunk.p_cnt && sd->pg_chunk.page != fl->pg_chunk.page)
883 pci_unmap_page(adap->pdev, 883 pci_unmap_page(adap->pdev,
884 sd->pg_chunk.mapping, 884 sd->pg_chunk.mapping,
885 fl->alloc_size, 885 fl->alloc_size,
@@ -2088,7 +2088,7 @@ static void lro_add_page(struct adapter *adap, struct sge_qset *qs,
2088 PCI_DMA_FROMDEVICE); 2088 PCI_DMA_FROMDEVICE);
2089 2089
2090 (*sd->pg_chunk.p_cnt)--; 2090 (*sd->pg_chunk.p_cnt)--;
2091 if (!*sd->pg_chunk.p_cnt) 2091 if (!*sd->pg_chunk.p_cnt && sd->pg_chunk.page != fl->pg_chunk.page)
2092 pci_unmap_page(adap->pdev, 2092 pci_unmap_page(adap->pdev,
2093 sd->pg_chunk.mapping, 2093 sd->pg_chunk.mapping,
2094 fl->alloc_size, 2094 fl->alloc_size,
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index f72c56dec33c..db6380379478 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -2140,9 +2140,6 @@ static int emac_poll(struct napi_struct *napi, int budget)
2140 u32 status = 0; 2140 u32 status = 0;
2141 u32 num_pkts = 0; 2141 u32 num_pkts = 0;
2142 2142
2143 if (!netif_running(ndev))
2144 return 0;
2145
2146 /* Check interrupt vectors and call packet processing */ 2143 /* Check interrupt vectors and call packet processing */
2147 status = emac_read(EMAC_MACINVECTOR); 2144 status = emac_read(EMAC_MACINVECTOR);
2148 2145
@@ -2221,7 +2218,7 @@ void emac_poll_controller(struct net_device *ndev)
2221 struct emac_priv *priv = netdev_priv(ndev); 2218 struct emac_priv *priv = netdev_priv(ndev);
2222 2219
2223 emac_int_disable(priv); 2220 emac_int_disable(priv);
2224 emac_irq(ndev->irq, priv); 2221 emac_irq(ndev->irq, ndev);
2225 emac_int_enable(priv); 2222 emac_int_enable(priv);
2226} 2223}
2227#endif 2224#endif
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index e1da4666f204..3116601dbfea 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -5821,10 +5821,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
5821 dev->dev_addr); 5821 dev->dev_addr);
5822 dev_printk(KERN_ERR, &pci_dev->dev, 5822 dev_printk(KERN_ERR, &pci_dev->dev,
5823 "Please complain to your hardware vendor. Switching to a random MAC.\n"); 5823 "Please complain to your hardware vendor. Switching to a random MAC.\n");
5824 dev->dev_addr[0] = 0x00; 5824 random_ether_addr(dev->dev_addr);
5825 dev->dev_addr[1] = 0x00;
5826 dev->dev_addr[2] = 0x6c;
5827 get_random_bytes(&dev->dev_addr[3], 3);
5828 } 5825 }
5829 5826
5830 dprintk(KERN_DEBUG "%s: MAC Address %pM\n", 5827 dprintk(KERN_DEBUG "%s: MAC Address %pM\n",
diff --git a/drivers/net/fsl_pq_mdio.c b/drivers/net/fsl_pq_mdio.c
index 6ac464866972..efbf67689eca 100644
--- a/drivers/net/fsl_pq_mdio.c
+++ b/drivers/net/fsl_pq_mdio.c
@@ -427,3 +427,4 @@ void fsl_pq_mdio_exit(void)
427 of_unregister_platform_driver(&fsl_pq_mdio_driver); 427 of_unregister_platform_driver(&fsl_pq_mdio_driver);
428} 428}
429module_exit(fsl_pq_mdio_exit); 429module_exit(fsl_pq_mdio_exit);
430MODULE_LICENSE("GPL");
diff --git a/drivers/net/ibm_newemac/emac.h b/drivers/net/ibm_newemac/emac.h
index d34adf99fc6a..8a61b597a169 100644
--- a/drivers/net/ibm_newemac/emac.h
+++ b/drivers/net/ibm_newemac/emac.h
@@ -263,8 +263,8 @@ struct emac_regs {
263 263
264 264
265/* EMACx_TRTR */ 265/* EMACx_TRTR */
266#define EMAC_TRTR_SHIFT_EMAC4 27 266#define EMAC_TRTR_SHIFT_EMAC4 24
267#define EMAC_TRTR_SHIFT 24 267#define EMAC_TRTR_SHIFT 27
268 268
269/* EMAC specific TX descriptor control fields (write access) */ 269/* EMAC specific TX descriptor control fields (write access) */
270#define EMAC_TX_CTRL_GFCS 0x0200 270#define EMAC_TX_CTRL_GFCS 0x0200
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index cbb143ca1eb8..a5036f7c1923 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -44,6 +44,7 @@
44 44
45#include "ixgbe.h" 45#include "ixgbe.h"
46#include "ixgbe_common.h" 46#include "ixgbe_common.h"
47#include "ixgbe_dcb_82599.h"
47 48
48char ixgbe_driver_name[] = "ixgbe"; 49char ixgbe_driver_name[] = "ixgbe";
49static const char ixgbe_driver_string[] = 50static const char ixgbe_driver_string[] =
@@ -226,6 +227,56 @@ static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
226 /* tx_buffer_info must be completely set up in the transmit path */ 227 /* tx_buffer_info must be completely set up in the transmit path */
227} 228}
228 229
230/**
231 * ixgbe_tx_is_paused - check if the tx ring is paused
232 * @adapter: the ixgbe adapter
233 * @tx_ring: the corresponding tx_ring
234 *
235 * If not in DCB mode, checks TFCS.TXOFF, otherwise, find out the
236 * corresponding TC of this tx_ring when checking TFCS.
237 *
238 * Returns : true if paused
239 */
240static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter *adapter,
241 struct ixgbe_ring *tx_ring)
242{
243 int tc;
244 u32 txoff = IXGBE_TFCS_TXOFF;
245
246#ifdef CONFIG_IXGBE_DCB
247 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
248 int reg_idx = tx_ring->reg_idx;
249 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
250
251 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
252 tc = reg_idx >> 2;
253 txoff = IXGBE_TFCS_TXOFF0;
254 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
255 tc = 0;
256 txoff = IXGBE_TFCS_TXOFF;
257 if (dcb_i == 8) {
258 /* TC0, TC1 */
259 tc = reg_idx >> 5;
260 if (tc == 2) /* TC2, TC3 */
261 tc += (reg_idx - 64) >> 4;
262 else if (tc == 3) /* TC4, TC5, TC6, TC7 */
263 tc += 1 + ((reg_idx - 96) >> 3);
264 } else if (dcb_i == 4) {
265 /* TC0, TC1 */
266 tc = reg_idx >> 6;
267 if (tc == 1) {
268 tc += (reg_idx - 64) >> 5;
269 if (tc == 2) /* TC2, TC3 */
270 tc += (reg_idx - 96) >> 4;
271 }
272 }
273 }
274 txoff <<= tc;
275 }
276#endif
277 return IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & txoff;
278}
279
229static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter, 280static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
230 struct ixgbe_ring *tx_ring, 281 struct ixgbe_ring *tx_ring,
231 unsigned int eop) 282 unsigned int eop)
@@ -237,7 +288,7 @@ static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
237 adapter->detect_tx_hung = false; 288 adapter->detect_tx_hung = false;
238 if (tx_ring->tx_buffer_info[eop].time_stamp && 289 if (tx_ring->tx_buffer_info[eop].time_stamp &&
239 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) && 290 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
240 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) { 291 !ixgbe_tx_is_paused(adapter, tx_ring)) {
241 /* detected Tx unit hang */ 292 /* detected Tx unit hang */
242 union ixgbe_adv_tx_desc *tx_desc; 293 union ixgbe_adv_tx_desc *tx_desc;
243 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); 294 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
@@ -412,19 +463,23 @@ static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
412 u32 txctrl; 463 u32 txctrl;
413 int cpu = get_cpu(); 464 int cpu = get_cpu();
414 int q = tx_ring - adapter->tx_ring; 465 int q = tx_ring - adapter->tx_ring;
466 struct ixgbe_hw *hw = &adapter->hw;
415 467
416 if (tx_ring->cpu != cpu) { 468 if (tx_ring->cpu != cpu) {
417 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
418 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 469 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
470 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(q));
419 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK; 471 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
420 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); 472 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
473 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
474 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(q), txctrl);
421 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 475 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
476 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(q));
422 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599; 477 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599;
423 txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << 478 txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
424 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599); 479 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599);
480 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
481 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(q), txctrl);
425 } 482 }
426 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
427 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
428 tx_ring->cpu = cpu; 483 tx_ring->cpu = cpu;
429 } 484 }
430 put_cpu(); 485 put_cpu();
@@ -1913,11 +1968,25 @@ static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1913 break; 1968 break;
1914 } 1969 }
1915 } 1970 }
1971
1916 if (hw->mac.type == ixgbe_mac_82599EB) { 1972 if (hw->mac.type == ixgbe_mac_82599EB) {
1973 u32 rttdcs;
1974
1975 /* disable the arbiter while setting MTQC */
1976 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
1977 rttdcs |= IXGBE_RTTDCS_ARBDIS;
1978 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
1979
1917 /* We enable 8 traffic classes, DCB only */ 1980 /* We enable 8 traffic classes, DCB only */
1918 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) 1981 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
1919 IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA | 1982 IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA |
1920 IXGBE_MTQC_8TC_8TQ)); 1983 IXGBE_MTQC_8TC_8TQ));
1984 else
1985 IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB);
1986
1987 /* re-eable the arbiter */
1988 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
1989 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
1921 } 1990 }
1922} 1991}
1923 1992
@@ -2471,7 +2540,10 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter)
2471 ixgbe_restore_vlan(adapter); 2540 ixgbe_restore_vlan(adapter);
2472#ifdef CONFIG_IXGBE_DCB 2541#ifdef CONFIG_IXGBE_DCB
2473 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { 2542 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2474 netif_set_gso_max_size(netdev, 32768); 2543 if (hw->mac.type == ixgbe_mac_82598EB)
2544 netif_set_gso_max_size(netdev, 32768);
2545 else
2546 netif_set_gso_max_size(netdev, 65536);
2475 ixgbe_configure_dcb(adapter); 2547 ixgbe_configure_dcb(adapter);
2476 } else { 2548 } else {
2477 netif_set_gso_max_size(netdev, 65536); 2549 netif_set_gso_max_size(netdev, 65536);
@@ -5922,6 +5994,7 @@ static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
5922 } else { 5994 } else {
5923 pci_set_master(pdev); 5995 pci_set_master(pdev);
5924 pci_restore_state(pdev); 5996 pci_restore_state(pdev);
5997 pci_save_state(pdev);
5925 5998
5926 pci_wake_from_d3(pdev, false); 5999 pci_wake_from_d3(pdev, false);
5927 6000
diff --git a/drivers/net/macsonic.c b/drivers/net/macsonic.c
index 61eabcac734c..b3d7d8d77f46 100644
--- a/drivers/net/macsonic.c
+++ b/drivers/net/macsonic.c
@@ -223,69 +223,73 @@ static int __devinit macsonic_init(struct net_device *dev)
223 return 0; 223 return 0;
224} 224}
225 225
226static int __devinit mac_onboard_sonic_ethernet_addr(struct net_device *dev) 226#define INVALID_MAC(mac) (memcmp(mac, "\x08\x00\x07", 3) && \
227 memcmp(mac, "\x00\xA0\x40", 3) && \
228 memcmp(mac, "\x00\x80\x19", 3) && \
229 memcmp(mac, "\x00\x05\x02", 3))
230
231static void __devinit mac_onboard_sonic_ethernet_addr(struct net_device *dev)
227{ 232{
228 struct sonic_local *lp = netdev_priv(dev); 233 struct sonic_local *lp = netdev_priv(dev);
229 const int prom_addr = ONBOARD_SONIC_PROM_BASE; 234 const int prom_addr = ONBOARD_SONIC_PROM_BASE;
230 int i; 235 unsigned short val;
231 236
232 /* On NuBus boards we can sometimes look in the ROM resources. 237 /*
233 No such luck for comm-slot/onboard. */ 238 * On NuBus boards we can sometimes look in the ROM resources.
234 for(i = 0; i < 6; i++) 239 * No such luck for comm-slot/onboard.
235 dev->dev_addr[i] = SONIC_READ_PROM(i); 240 * On the PowerBook 520, the PROM base address is a mystery.
241 */
242 if (hwreg_present((void *)prom_addr)) {
243 int i;
244
245 for (i = 0; i < 6; i++)
246 dev->dev_addr[i] = SONIC_READ_PROM(i);
247 if (!INVALID_MAC(dev->dev_addr))
248 return;
236 249
237 /* Most of the time, the address is bit-reversed. The NetBSD 250 /*
238 source has a rather long and detailed historical account of 251 * Most of the time, the address is bit-reversed. The NetBSD
239 why this is so. */ 252 * source has a rather long and detailed historical account of
240 if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) && 253 * why this is so.
241 memcmp(dev->dev_addr, "\x00\xA0\x40", 3) && 254 */
242 memcmp(dev->dev_addr, "\x00\x80\x19", 3) &&
243 memcmp(dev->dev_addr, "\x00\x05\x02", 3))
244 bit_reverse_addr(dev->dev_addr); 255 bit_reverse_addr(dev->dev_addr);
245 else 256 if (!INVALID_MAC(dev->dev_addr))
246 return 0; 257 return;
247 258
248 /* If we still have what seems to be a bogus address, we'll
249 look in the CAM. The top entry should be ours. */
250 /* Danger! This only works if MacOS has already initialized
251 the card... */
252 if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) &&
253 memcmp(dev->dev_addr, "\x00\xA0\x40", 3) &&
254 memcmp(dev->dev_addr, "\x00\x80\x19", 3) &&
255 memcmp(dev->dev_addr, "\x00\x05\x02", 3))
256 {
257 unsigned short val;
258
259 printk(KERN_INFO "macsonic: PROM seems to be wrong, trying CAM entry 15\n");
260
261 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
262 SONIC_WRITE(SONIC_CEP, 15);
263
264 val = SONIC_READ(SONIC_CAP2);
265 dev->dev_addr[5] = val >> 8;
266 dev->dev_addr[4] = val & 0xff;
267 val = SONIC_READ(SONIC_CAP1);
268 dev->dev_addr[3] = val >> 8;
269 dev->dev_addr[2] = val & 0xff;
270 val = SONIC_READ(SONIC_CAP0);
271 dev->dev_addr[1] = val >> 8;
272 dev->dev_addr[0] = val & 0xff;
273
274 printk(KERN_INFO "HW Address from CAM 15: %pM\n",
275 dev->dev_addr);
276 } else return 0;
277
278 if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) &&
279 memcmp(dev->dev_addr, "\x00\xA0\x40", 3) &&
280 memcmp(dev->dev_addr, "\x00\x80\x19", 3) &&
281 memcmp(dev->dev_addr, "\x00\x05\x02", 3))
282 {
283 /* 259 /*
284 * Still nonsense ... messed up someplace! 260 * If we still have what seems to be a bogus address, we'll
261 * look in the CAM. The top entry should be ours.
285 */ 262 */
286 printk(KERN_ERR "macsonic: ERROR (INVALID MAC)\n"); 263 printk(KERN_WARNING "macsonic: MAC address in PROM seems "
287 return -EIO; 264 "to be invalid, trying CAM\n");
288 } else return 0; 265 } else {
266 printk(KERN_WARNING "macsonic: cannot read MAC address from "
267 "PROM, trying CAM\n");
268 }
269
270 /* This only works if MacOS has already initialized the card. */
271
272 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
273 SONIC_WRITE(SONIC_CEP, 15);
274
275 val = SONIC_READ(SONIC_CAP2);
276 dev->dev_addr[5] = val >> 8;
277 dev->dev_addr[4] = val & 0xff;
278 val = SONIC_READ(SONIC_CAP1);
279 dev->dev_addr[3] = val >> 8;
280 dev->dev_addr[2] = val & 0xff;
281 val = SONIC_READ(SONIC_CAP0);
282 dev->dev_addr[1] = val >> 8;
283 dev->dev_addr[0] = val & 0xff;
284
285 if (!INVALID_MAC(dev->dev_addr))
286 return;
287
288 /* Still nonsense ... messed up someplace! */
289
290 printk(KERN_WARNING "macsonic: MAC address in CAM entry 15 "
291 "seems invalid, will use a random MAC\n");
292 random_ether_addr(dev->dev_addr);
289} 293}
290 294
291static int __devinit mac_onboard_sonic_probe(struct net_device *dev) 295static int __devinit mac_onboard_sonic_probe(struct net_device *dev)
@@ -402,8 +406,7 @@ static int __devinit mac_onboard_sonic_probe(struct net_device *dev)
402 SONIC_WRITE(SONIC_ISR, 0x7fff); 406 SONIC_WRITE(SONIC_ISR, 0x7fff);
403 407
404 /* Now look for the MAC address. */ 408 /* Now look for the MAC address. */
405 if (mac_onboard_sonic_ethernet_addr(dev) != 0) 409 mac_onboard_sonic_ethernet_addr(dev);
406 return -ENODEV;
407 410
408 /* Shared init code */ 411 /* Shared init code */
409 return macsonic_init(dev); 412 return macsonic_init(dev);
diff --git a/drivers/net/phy/mdio-gpio.c b/drivers/net/phy/mdio-gpio.c
index 8659d341e769..35897134a5dd 100644
--- a/drivers/net/phy/mdio-gpio.c
+++ b/drivers/net/phy/mdio-gpio.c
@@ -139,7 +139,7 @@ out:
139 return NULL; 139 return NULL;
140} 140}
141 141
142static void __devinit mdio_gpio_bus_deinit(struct device *dev) 142static void mdio_gpio_bus_deinit(struct device *dev)
143{ 143{
144 struct mii_bus *bus = dev_get_drvdata(dev); 144 struct mii_bus *bus = dev_get_drvdata(dev);
145 struct mdio_gpio_info *bitbang = bus->priv; 145 struct mdio_gpio_info *bitbang = bus->priv;
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c
index 9bf2a6be9031..965adb6174c3 100644
--- a/drivers/net/ppp_generic.c
+++ b/drivers/net/ppp_generic.c
@@ -1944,8 +1944,15 @@ ppp_receive_mp_frame(struct ppp *ppp, struct sk_buff *skb, struct channel *pch)
1944 } 1944 }
1945 1945
1946 /* Pull completed packets off the queue and receive them. */ 1946 /* Pull completed packets off the queue and receive them. */
1947 while ((skb = ppp_mp_reconstruct(ppp))) 1947 while ((skb = ppp_mp_reconstruct(ppp))) {
1948 ppp_receive_nonmp_frame(ppp, skb); 1948 if (pskb_may_pull(skb, 2))
1949 ppp_receive_nonmp_frame(ppp, skb);
1950 else {
1951 ++ppp->dev->stats.rx_length_errors;
1952 kfree_skb(skb);
1953 ppp_receive_error(ppp);
1954 }
1955 }
1949 1956
1950 return; 1957 return;
1951 1958
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index cea7531f4f40..a2fc70a0d0cc 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -3916,6 +3916,8 @@ static int __devinit ql_init_device(struct pci_dev *pdev,
3916 goto err_out; 3916 goto err_out;
3917 } 3917 }
3918 3918
3919 /* Set PCIe reset type for EEH to fundamental. */
3920 pdev->needs_freset = 1;
3919 pci_save_state(pdev); 3921 pci_save_state(pdev);
3920 qdev->reg_base = 3922 qdev->reg_base =
3921 ioremap_nocache(pci_resource_start(pdev, 1), 3923 ioremap_nocache(pci_resource_start(pdev, 1),
diff --git a/drivers/net/qlge/qlge_mpi.c b/drivers/net/qlge/qlge_mpi.c
index bcf13c96f73f..aec05f266107 100644
--- a/drivers/net/qlge/qlge_mpi.c
+++ b/drivers/net/qlge/qlge_mpi.c
@@ -499,7 +499,7 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp)
499 /* Wait for the interrupt to come in. */ 499 /* Wait for the interrupt to come in. */
500 status = ql_wait_mbx_cmd_cmplt(qdev); 500 status = ql_wait_mbx_cmd_cmplt(qdev);
501 if (status) 501 if (status)
502 goto end; 502 continue;
503 503
504 /* Process the event. If it's an AEN, it 504 /* Process the event. If it's an AEN, it
505 * will be handled in-line or a worker 505 * will be handled in-line or a worker
diff --git a/drivers/net/r6040.c b/drivers/net/r6040.c
index 7dfcb58b0eb4..8b14c6eda7c3 100644
--- a/drivers/net/r6040.c
+++ b/drivers/net/r6040.c
@@ -1085,7 +1085,7 @@ static int __devinit r6040_init_one(struct pci_dev *pdev,
1085 int bar = 0; 1085 int bar = 0;
1086 u16 *adrp; 1086 u16 *adrp;
1087 1087
1088 printk(KERN_INFO "%s\n", version); 1088 printk("%s\n", version);
1089 1089
1090 err = pci_enable_device(pdev); 1090 err = pci_enable_device(pdev);
1091 if (err) 1091 if (err)
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index fa4935678488..b9221bdc7184 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -3243,9 +3243,9 @@ static void __devexit rtl8169_remove_one(struct pci_dev *pdev)
3243static void rtl8169_set_rxbufsize(struct rtl8169_private *tp, 3243static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
3244 struct net_device *dev) 3244 struct net_device *dev)
3245{ 3245{
3246 unsigned int mtu = dev->mtu; 3246 unsigned int max_frame = dev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
3247 3247
3248 tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE; 3248 tp->rx_buf_sz = (max_frame > RX_BUF_SIZE) ? max_frame : RX_BUF_SIZE;
3249} 3249}
3250 3250
3251static int rtl8169_open(struct net_device *dev) 3251static int rtl8169_open(struct net_device *dev)
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c
index ddccf5fa56b6..0dd7839322bc 100644
--- a/drivers/net/s2io.c
+++ b/drivers/net/s2io.c
@@ -3494,6 +3494,7 @@ static void s2io_reset(struct s2io_nic *sp)
3494 3494
3495 /* Restore the PCI state saved during initialization. */ 3495 /* Restore the PCI state saved during initialization. */
3496 pci_restore_state(sp->pdev); 3496 pci_restore_state(sp->pdev);
3497 pci_save_state(sp->pdev);
3497 pci_read_config_word(sp->pdev, 0x2, &val16); 3498 pci_read_config_word(sp->pdev, 0x2, &val16);
3498 if (check_pci_device_id(val16) != (u16)PCI_ANY_ID) 3499 if (check_pci_device_id(val16) != (u16)PCI_ANY_ID)
3499 break; 3500 break;
diff --git a/drivers/net/sfc/sfe4001.c b/drivers/net/sfc/sfe4001.c
index cee00ad49b57..49eb91b5f50c 100644
--- a/drivers/net/sfc/sfe4001.c
+++ b/drivers/net/sfc/sfe4001.c
@@ -188,7 +188,7 @@ static int sfn4111t_reset(struct efx_nic *efx)
188 efx_oword_t reg; 188 efx_oword_t reg;
189 189
190 /* GPIO 3 and the GPIO register are shared with I2C, so block that */ 190 /* GPIO 3 and the GPIO register are shared with I2C, so block that */
191 mutex_lock(&efx->i2c_adap.bus_lock); 191 i2c_lock_adapter(&efx->i2c_adap);
192 192
193 /* Pull RST_N (GPIO 2) low then let it up again, setting the 193 /* Pull RST_N (GPIO 2) low then let it up again, setting the
194 * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the 194 * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
@@ -204,7 +204,7 @@ static int sfn4111t_reset(struct efx_nic *efx)
204 falcon_write(efx, &reg, GPIO_CTL_REG_KER); 204 falcon_write(efx, &reg, GPIO_CTL_REG_KER);
205 msleep(1); 205 msleep(1);
206 206
207 mutex_unlock(&efx->i2c_adap.bus_lock); 207 i2c_unlock_adapter(&efx->i2c_adap);
208 208
209 ssleep(1); 209 ssleep(1);
210 return 0; 210 return 0;
diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c
index ccdd196f5297..f9cdcbcb77d4 100644
--- a/drivers/net/smsc911x.c
+++ b/drivers/net/smsc911x.c
@@ -986,7 +986,7 @@ static int smsc911x_poll(struct napi_struct *napi, int budget)
986 struct net_device *dev = pdata->dev; 986 struct net_device *dev = pdata->dev;
987 int npackets = 0; 987 int npackets = 0;
988 988
989 while (likely(netif_running(dev)) && (npackets < budget)) { 989 while (npackets < budget) {
990 unsigned int pktlength; 990 unsigned int pktlength;
991 unsigned int pktwords; 991 unsigned int pktwords;
992 struct sk_buff *skb; 992 struct sk_buff *skb;
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c
index 7019a0d1a82b..61640b99b705 100644
--- a/drivers/net/sungem.c
+++ b/drivers/net/sungem.c
@@ -2063,7 +2063,15 @@ static int gem_check_invariants(struct gem *gp)
2063 mif_cfg &= ~MIF_CFG_PSELECT; 2063 mif_cfg &= ~MIF_CFG_PSELECT;
2064 writel(mif_cfg, gp->regs + MIF_CFG); 2064 writel(mif_cfg, gp->regs + MIF_CFG);
2065 } else { 2065 } else {
2066 gp->phy_type = phy_serialink; 2066#ifdef CONFIG_SPARC
2067 const char *p;
2068
2069 p = of_get_property(gp->of_node, "shared-pins", NULL);
2070 if (p && !strcmp(p, "serdes"))
2071 gp->phy_type = phy_serdes;
2072 else
2073#endif
2074 gp->phy_type = phy_serialink;
2067 } 2075 }
2068 if (gp->phy_type == phy_mii_mdio1 || 2076 if (gp->phy_type == phy_mii_mdio1 ||
2069 gp->phy_type == phy_mii_mdio0) { 2077 gp->phy_type == phy_mii_mdio0) {
diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig
index c47237c2d638..32d93564a74d 100644
--- a/drivers/net/usb/Kconfig
+++ b/drivers/net/usb/Kconfig
@@ -174,7 +174,7 @@ config USB_NET_CDCETHER
174 * Ericsson Mobile Broadband Module (all variants) 174 * Ericsson Mobile Broadband Module (all variants)
175 * Motorola (DM100 and SB4100) 175 * Motorola (DM100 and SB4100)
176 * Broadcom Cable Modem (reference design) 176 * Broadcom Cable Modem (reference design)
177 * Toshiba (PCX1100U and F3507g) 177 * Toshiba (PCX1100U and F3507g/F3607gw)
178 * ... 178 * ...
179 179
180 This driver creates an interface named "ethX", where X depends on 180 This driver creates an interface named "ethX", where X depends on
diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c
index 4a6aff579403..21e1ba160008 100644
--- a/drivers/net/usb/cdc_ether.c
+++ b/drivers/net/usb/cdc_ether.c
@@ -544,20 +544,60 @@ static const struct usb_device_id products [] = {
544 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 544 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
545 .driver_info = (unsigned long) &cdc_info, 545 .driver_info = (unsigned long) &cdc_info,
546}, { 546}, {
547 /* Ericsson F3307 */ 547 /* Ericsson F3607gw ver 2 */
548 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1905, USB_CLASS_COMM,
549 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
550 .driver_info = (unsigned long) &cdc_info,
551}, {
552 /* Ericsson F3607gw ver 3 */
548 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1906, USB_CLASS_COMM, 553 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1906, USB_CLASS_COMM,
549 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 554 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
550 .driver_info = (unsigned long) &cdc_info, 555 .driver_info = (unsigned long) &cdc_info,
551}, { 556}, {
557 /* Ericsson F3307 */
558 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x190a, USB_CLASS_COMM,
559 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
560 .driver_info = (unsigned long) &cdc_info,
561}, {
562 /* Ericsson F3307 ver 2 */
563 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1909, USB_CLASS_COMM,
564 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
565 .driver_info = (unsigned long) &cdc_info,
566}, {
567 /* Ericsson C3607w */
568 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1049, USB_CLASS_COMM,
569 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
570 .driver_info = (unsigned long) &cdc_info,
571}, {
552 /* Toshiba F3507g */ 572 /* Toshiba F3507g */
553 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM, 573 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM,
554 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 574 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
555 .driver_info = (unsigned long) &cdc_info, 575 .driver_info = (unsigned long) &cdc_info,
556}, { 576}, {
577 /* Toshiba F3607gw */
578 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130c, USB_CLASS_COMM,
579 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
580 .driver_info = (unsigned long) &cdc_info,
581}, {
582 /* Toshiba F3607gw ver 2 */
583 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x1311, USB_CLASS_COMM,
584 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
585 .driver_info = (unsigned long) &cdc_info,
586}, {
557 /* Dell F3507g */ 587 /* Dell F3507g */
558 USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8147, USB_CLASS_COMM, 588 USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8147, USB_CLASS_COMM,
559 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 589 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
560 .driver_info = (unsigned long) &cdc_info, 590 .driver_info = (unsigned long) &cdc_info,
591}, {
592 /* Dell F3607gw */
593 USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8183, USB_CLASS_COMM,
594 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
595 .driver_info = (unsigned long) &cdc_info,
596}, {
597 /* Dell F3607gw ver 2 */
598 USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8184, USB_CLASS_COMM,
599 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
600 .driver_info = (unsigned long) &cdc_info,
561}, 601},
562 { }, // END 602 { }, // END
563}; 603};
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index 05630f2f6930..b9e002fccbca 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -998,7 +998,7 @@ static unsigned int features[] = {
998 VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN, 998 VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN,
999}; 999};
1000 1000
1001static struct virtio_driver virtio_net = { 1001static struct virtio_driver virtio_net_driver = {
1002 .feature_table = features, 1002 .feature_table = features,
1003 .feature_table_size = ARRAY_SIZE(features), 1003 .feature_table_size = ARRAY_SIZE(features),
1004 .driver.name = KBUILD_MODNAME, 1004 .driver.name = KBUILD_MODNAME,
@@ -1011,12 +1011,12 @@ static struct virtio_driver virtio_net = {
1011 1011
1012static int __init init(void) 1012static int __init init(void)
1013{ 1013{
1014 return register_virtio_driver(&virtio_net); 1014 return register_virtio_driver(&virtio_net_driver);
1015} 1015}
1016 1016
1017static void __exit fini(void) 1017static void __exit fini(void)
1018{ 1018{
1019 unregister_virtio_driver(&virtio_net); 1019 unregister_virtio_driver(&virtio_net_driver);
1020} 1020}
1021module_init(init); 1021module_init(init);
1022module_exit(fini); 1022module_exit(fini);
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index 9c6ab5378f6e..95a8e232b58f 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -1125,7 +1125,6 @@ ath5k_mode_setup(struct ath5k_softc *sc)
1125 /* configure operational mode */ 1125 /* configure operational mode */
1126 ath5k_hw_set_opmode(ah); 1126 ath5k_hw_set_opmode(ah);
1127 1127
1128 ath5k_hw_set_mcast_filter(ah, 0, 0);
1129 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt); 1128 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt);
1130} 1129}
1131 1130
diff --git a/drivers/net/wireless/ath/ath5k/led.c b/drivers/net/wireless/ath/ath5k/led.c
index b767c3b67b24..b548c8eaaae1 100644
--- a/drivers/net/wireless/ath/ath5k/led.c
+++ b/drivers/net/wireless/ath/ath5k/led.c
@@ -63,12 +63,16 @@ static const struct pci_device_id ath5k_led_devices[] = {
63 { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0422), ATH_LED(1, 1) }, 63 { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0422), ATH_LED(1, 1) },
64 /* E-machines E510 (tuliom@gmail.com) */ 64 /* E-machines E510 (tuliom@gmail.com) */
65 { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0428), ATH_LED(3, 0) }, 65 { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0428), ATH_LED(3, 0) },
66 /* BenQ Joybook R55v (nowymarluk@wp.pl) */
67 { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0100), ATH_LED(1, 0) },
66 /* Acer Extensa 5620z (nekoreeve@gmail.com) */ 68 /* Acer Extensa 5620z (nekoreeve@gmail.com) */
67 { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0105), ATH_LED(3, 0) }, 69 { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0105), ATH_LED(3, 0) },
68 /* Fukato Datacask Jupiter 1014a (mrb74@gmx.at) */ 70 /* Fukato Datacask Jupiter 1014a (mrb74@gmx.at) */
69 { ATH_SDEVICE(PCI_VENDOR_ID_AZWAVE, 0x1026), ATH_LED(3, 0) }, 71 { ATH_SDEVICE(PCI_VENDOR_ID_AZWAVE, 0x1026), ATH_LED(3, 0) },
70 /* IBM ThinkPad AR5BXB6 (legovini@spiro.fisica.unipd.it) */ 72 /* IBM ThinkPad AR5BXB6 (legovini@spiro.fisica.unipd.it) */
71 { ATH_SDEVICE(PCI_VENDOR_ID_IBM, 0x058a), ATH_LED(1, 0) }, 73 { ATH_SDEVICE(PCI_VENDOR_ID_IBM, 0x058a), ATH_LED(1, 0) },
74 /* HP Compaq CQ60-206US (ddreggors@jumptv.com) */
75 { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137a), ATH_LED(3, 1) },
72 /* HP Compaq C700 (nitrousnrg@gmail.com) */ 76 /* HP Compaq C700 (nitrousnrg@gmail.com) */
73 { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137b), ATH_LED(3, 1) }, 77 { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137b), ATH_LED(3, 1) },
74 /* IBM-specific AR5212 (all others) */ 78 /* IBM-specific AR5212 (all others) */
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 86f35827f008..098dda1a67c1 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -4521,9 +4521,8 @@ static int b43_op_beacon_set_tim(struct ieee80211_hw *hw,
4521{ 4521{
4522 struct b43_wl *wl = hw_to_b43_wl(hw); 4522 struct b43_wl *wl = hw_to_b43_wl(hw);
4523 4523
4524 mutex_lock(&wl->mutex); 4524 /* FIXME: add locking */
4525 b43_update_templates(wl); 4525 b43_update_templates(wl);
4526 mutex_unlock(&wl->mutex);
4527 4526
4528 return 0; 4527 return 0;
4529} 4528}
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c
index a741d37fd96f..6e2fc0cb6f8a 100644
--- a/drivers/net/wireless/ipw2x00/ipw2100.c
+++ b/drivers/net/wireless/ipw2x00/ipw2100.c
@@ -6029,7 +6029,7 @@ static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev,
6029 struct ipw2100_priv *priv; 6029 struct ipw2100_priv *priv;
6030 struct net_device *dev; 6030 struct net_device *dev;
6031 6031
6032 dev = alloc_ieee80211(sizeof(struct ipw2100_priv), 0); 6032 dev = alloc_ieee80211(sizeof(struct ipw2100_priv));
6033 if (!dev) 6033 if (!dev)
6034 return NULL; 6034 return NULL;
6035 priv = libipw_priv(dev); 6035 priv = libipw_priv(dev);
@@ -6325,10 +6325,8 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6325 6325
6326 fail: 6326 fail:
6327 if (dev) { 6327 if (dev) {
6328 if (registered) { 6328 if (registered)
6329 unregister_ieee80211(priv->ieee);
6330 unregister_netdev(dev); 6329 unregister_netdev(dev);
6331 }
6332 6330
6333 ipw2100_hw_stop_adapter(priv); 6331 ipw2100_hw_stop_adapter(priv);
6334 6332
@@ -6344,7 +6342,7 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6344 sysfs_remove_group(&pci_dev->dev.kobj, 6342 sysfs_remove_group(&pci_dev->dev.kobj,
6345 &ipw2100_attribute_group); 6343 &ipw2100_attribute_group);
6346 6344
6347 free_ieee80211(dev, 0); 6345 free_ieee80211(dev);
6348 pci_set_drvdata(pci_dev, NULL); 6346 pci_set_drvdata(pci_dev, NULL);
6349 } 6347 }
6350 6348
@@ -6385,7 +6383,6 @@ static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev)
6385 /* Unregister the device first - this results in close() 6383 /* Unregister the device first - this results in close()
6386 * being called if the device is open. If we free storage 6384 * being called if the device is open. If we free storage
6387 * first, then close() will crash. */ 6385 * first, then close() will crash. */
6388 unregister_ieee80211(priv->ieee);
6389 unregister_netdev(dev); 6386 unregister_netdev(dev);
6390 6387
6391 /* ipw2100_down will ensure that there is no more pending work 6388 /* ipw2100_down will ensure that there is no more pending work
@@ -6403,7 +6400,7 @@ static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev)
6403 if (dev->base_addr) 6400 if (dev->base_addr)
6404 iounmap((void __iomem *)dev->base_addr); 6401 iounmap((void __iomem *)dev->base_addr);
6405 6402
6406 free_ieee80211(dev, 0); 6403 free_ieee80211(dev);
6407 } 6404 }
6408 6405
6409 pci_release_regions(pci_dev); 6406 pci_release_regions(pci_dev);
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c
index 9b0f2c0646e0..a6ca536e44f8 100644
--- a/drivers/net/wireless/ipw2x00/ipw2200.c
+++ b/drivers/net/wireless/ipw2x00/ipw2200.c
@@ -104,25 +104,6 @@ static int antenna = CFG_SYS_ANTENNA_BOTH;
104static int rtap_iface = 0; /* def: 0 -- do not create rtap interface */ 104static int rtap_iface = 0; /* def: 0 -- do not create rtap interface */
105#endif 105#endif
106 106
107static struct ieee80211_rate ipw2200_rates[] = {
108 { .bitrate = 10 },
109 { .bitrate = 20, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
110 { .bitrate = 55, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
111 { .bitrate = 110, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
112 { .bitrate = 60 },
113 { .bitrate = 90 },
114 { .bitrate = 120 },
115 { .bitrate = 180 },
116 { .bitrate = 240 },
117 { .bitrate = 360 },
118 { .bitrate = 480 },
119 { .bitrate = 540 }
120};
121
122#define ipw2200_a_rates (ipw2200_rates + 4)
123#define ipw2200_num_a_rates 8
124#define ipw2200_bg_rates (ipw2200_rates + 0)
125#define ipw2200_num_bg_rates 12
126 107
127#ifdef CONFIG_IPW2200_QOS 108#ifdef CONFIG_IPW2200_QOS
128static int qos_enable = 0; 109static int qos_enable = 0;
@@ -8674,6 +8655,24 @@ static int ipw_sw_reset(struct ipw_priv *priv, int option)
8674 * 8655 *
8675 */ 8656 */
8676 8657
8658static int ipw_wx_get_name(struct net_device *dev,
8659 struct iw_request_info *info,
8660 union iwreq_data *wrqu, char *extra)
8661{
8662 struct ipw_priv *priv = libipw_priv(dev);
8663 mutex_lock(&priv->mutex);
8664 if (priv->status & STATUS_RF_KILL_MASK)
8665 strcpy(wrqu->name, "radio off");
8666 else if (!(priv->status & STATUS_ASSOCIATED))
8667 strcpy(wrqu->name, "unassociated");
8668 else
8669 snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11%c",
8670 ipw_modes[priv->assoc_request.ieee_mode]);
8671 IPW_DEBUG_WX("Name: %s\n", wrqu->name);
8672 mutex_unlock(&priv->mutex);
8673 return 0;
8674}
8675
8677static int ipw_set_channel(struct ipw_priv *priv, u8 channel) 8676static int ipw_set_channel(struct ipw_priv *priv, u8 channel)
8678{ 8677{
8679 if (channel == 0) { 8678 if (channel == 0) {
@@ -9973,7 +9972,7 @@ static int ipw_wx_sw_reset(struct net_device *dev,
9973/* Rebase the WE IOCTLs to zero for the handler array */ 9972/* Rebase the WE IOCTLs to zero for the handler array */
9974#define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT] 9973#define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT]
9975static iw_handler ipw_wx_handlers[] = { 9974static iw_handler ipw_wx_handlers[] = {
9976 IW_IOCTL(SIOCGIWNAME) = (iw_handler) cfg80211_wext_giwname, 9975 IW_IOCTL(SIOCGIWNAME) = ipw_wx_get_name,
9977 IW_IOCTL(SIOCSIWFREQ) = ipw_wx_set_freq, 9976 IW_IOCTL(SIOCSIWFREQ) = ipw_wx_set_freq,
9978 IW_IOCTL(SIOCGIWFREQ) = ipw_wx_get_freq, 9977 IW_IOCTL(SIOCGIWFREQ) = ipw_wx_get_freq,
9979 IW_IOCTL(SIOCSIWMODE) = ipw_wx_set_mode, 9978 IW_IOCTL(SIOCSIWMODE) = ipw_wx_set_mode,
@@ -11417,100 +11416,16 @@ static void ipw_bg_down(struct work_struct *work)
11417/* Called by register_netdev() */ 11416/* Called by register_netdev() */
11418static int ipw_net_init(struct net_device *dev) 11417static int ipw_net_init(struct net_device *dev)
11419{ 11418{
11420 int i, rc = 0;
11421 struct ipw_priv *priv = libipw_priv(dev); 11419 struct ipw_priv *priv = libipw_priv(dev);
11422 const struct libipw_geo *geo = libipw_get_geo(priv->ieee);
11423 struct wireless_dev *wdev = &priv->ieee->wdev;
11424 mutex_lock(&priv->mutex); 11420 mutex_lock(&priv->mutex);
11425 11421
11426 if (ipw_up(priv)) { 11422 if (ipw_up(priv)) {
11427 rc = -EIO; 11423 mutex_unlock(&priv->mutex);
11428 goto out; 11424 return -EIO;
11429 }
11430
11431 memcpy(wdev->wiphy->perm_addr, priv->mac_addr, ETH_ALEN);
11432
11433 /* fill-out priv->ieee->bg_band */
11434 if (geo->bg_channels) {
11435 struct ieee80211_supported_band *bg_band = &priv->ieee->bg_band;
11436
11437 bg_band->band = IEEE80211_BAND_2GHZ;
11438 bg_band->n_channels = geo->bg_channels;
11439 bg_band->channels =
11440 kzalloc(geo->bg_channels *
11441 sizeof(struct ieee80211_channel), GFP_KERNEL);
11442 /* translate geo->bg to bg_band.channels */
11443 for (i = 0; i < geo->bg_channels; i++) {
11444 bg_band->channels[i].band = IEEE80211_BAND_2GHZ;
11445 bg_band->channels[i].center_freq = geo->bg[i].freq;
11446 bg_band->channels[i].hw_value = geo->bg[i].channel;
11447 bg_band->channels[i].max_power = geo->bg[i].max_power;
11448 if (geo->bg[i].flags & LIBIPW_CH_PASSIVE_ONLY)
11449 bg_band->channels[i].flags |=
11450 IEEE80211_CHAN_PASSIVE_SCAN;
11451 if (geo->bg[i].flags & LIBIPW_CH_NO_IBSS)
11452 bg_band->channels[i].flags |=
11453 IEEE80211_CHAN_NO_IBSS;
11454 if (geo->bg[i].flags & LIBIPW_CH_RADAR_DETECT)
11455 bg_band->channels[i].flags |=
11456 IEEE80211_CHAN_RADAR;
11457 /* No equivalent for LIBIPW_CH_80211H_RULES,
11458 LIBIPW_CH_UNIFORM_SPREADING, or
11459 LIBIPW_CH_B_ONLY... */
11460 }
11461 /* point at bitrate info */
11462 bg_band->bitrates = ipw2200_bg_rates;
11463 bg_band->n_bitrates = ipw2200_num_bg_rates;
11464
11465 wdev->wiphy->bands[IEEE80211_BAND_2GHZ] = bg_band;
11466 }
11467
11468 /* fill-out priv->ieee->a_band */
11469 if (geo->a_channels) {
11470 struct ieee80211_supported_band *a_band = &priv->ieee->a_band;
11471
11472 a_band->band = IEEE80211_BAND_5GHZ;
11473 a_band->n_channels = geo->a_channels;
11474 a_band->channels =
11475 kzalloc(geo->a_channels *
11476 sizeof(struct ieee80211_channel), GFP_KERNEL);
11477 /* translate geo->bg to a_band.channels */
11478 for (i = 0; i < geo->a_channels; i++) {
11479 a_band->channels[i].band = IEEE80211_BAND_2GHZ;
11480 a_band->channels[i].center_freq = geo->a[i].freq;
11481 a_band->channels[i].hw_value = geo->a[i].channel;
11482 a_band->channels[i].max_power = geo->a[i].max_power;
11483 if (geo->a[i].flags & LIBIPW_CH_PASSIVE_ONLY)
11484 a_band->channels[i].flags |=
11485 IEEE80211_CHAN_PASSIVE_SCAN;
11486 if (geo->a[i].flags & LIBIPW_CH_NO_IBSS)
11487 a_band->channels[i].flags |=
11488 IEEE80211_CHAN_NO_IBSS;
11489 if (geo->a[i].flags & LIBIPW_CH_RADAR_DETECT)
11490 a_band->channels[i].flags |=
11491 IEEE80211_CHAN_RADAR;
11492 /* No equivalent for LIBIPW_CH_80211H_RULES,
11493 LIBIPW_CH_UNIFORM_SPREADING, or
11494 LIBIPW_CH_B_ONLY... */
11495 }
11496 /* point at bitrate info */
11497 a_band->bitrates = ipw2200_a_rates;
11498 a_band->n_bitrates = ipw2200_num_a_rates;
11499
11500 wdev->wiphy->bands[IEEE80211_BAND_5GHZ] = a_band;
11501 }
11502
11503 set_wiphy_dev(wdev->wiphy, &priv->pci_dev->dev);
11504
11505 /* With that information in place, we can now register the wiphy... */
11506 if (wiphy_register(wdev->wiphy)) {
11507 rc = -EIO;
11508 goto out;
11509 } 11425 }
11510 11426
11511out:
11512 mutex_unlock(&priv->mutex); 11427 mutex_unlock(&priv->mutex);
11513 return rc; 11428 return 0;
11514} 11429}
11515 11430
11516/* PCI driver stuff */ 11431/* PCI driver stuff */
@@ -11641,7 +11556,7 @@ static int ipw_prom_alloc(struct ipw_priv *priv)
11641 if (priv->prom_net_dev) 11556 if (priv->prom_net_dev)
11642 return -EPERM; 11557 return -EPERM;
11643 11558
11644 priv->prom_net_dev = alloc_ieee80211(sizeof(struct ipw_prom_priv), 1); 11559 priv->prom_net_dev = alloc_ieee80211(sizeof(struct ipw_prom_priv));
11645 if (priv->prom_net_dev == NULL) 11560 if (priv->prom_net_dev == NULL)
11646 return -ENOMEM; 11561 return -ENOMEM;
11647 11562
@@ -11660,7 +11575,7 @@ static int ipw_prom_alloc(struct ipw_priv *priv)
11660 11575
11661 rc = register_netdev(priv->prom_net_dev); 11576 rc = register_netdev(priv->prom_net_dev);
11662 if (rc) { 11577 if (rc) {
11663 free_ieee80211(priv->prom_net_dev, 1); 11578 free_ieee80211(priv->prom_net_dev);
11664 priv->prom_net_dev = NULL; 11579 priv->prom_net_dev = NULL;
11665 return rc; 11580 return rc;
11666 } 11581 }
@@ -11674,7 +11589,7 @@ static void ipw_prom_free(struct ipw_priv *priv)
11674 return; 11589 return;
11675 11590
11676 unregister_netdev(priv->prom_net_dev); 11591 unregister_netdev(priv->prom_net_dev);
11677 free_ieee80211(priv->prom_net_dev, 1); 11592 free_ieee80211(priv->prom_net_dev);
11678 11593
11679 priv->prom_net_dev = NULL; 11594 priv->prom_net_dev = NULL;
11680} 11595}
@@ -11702,7 +11617,7 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,
11702 struct ipw_priv *priv; 11617 struct ipw_priv *priv;
11703 int i; 11618 int i;
11704 11619
11705 net_dev = alloc_ieee80211(sizeof(struct ipw_priv), 0); 11620 net_dev = alloc_ieee80211(sizeof(struct ipw_priv));
11706 if (net_dev == NULL) { 11621 if (net_dev == NULL) {
11707 err = -ENOMEM; 11622 err = -ENOMEM;
11708 goto out; 11623 goto out;
@@ -11822,7 +11737,6 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,
11822 if (err) { 11737 if (err) {
11823 IPW_ERROR("Failed to register promiscuous network " 11738 IPW_ERROR("Failed to register promiscuous network "
11824 "device (error %d).\n", err); 11739 "device (error %d).\n", err);
11825 unregister_ieee80211(priv->ieee);
11826 unregister_netdev(priv->net_dev); 11740 unregister_netdev(priv->net_dev);
11827 goto out_remove_sysfs; 11741 goto out_remove_sysfs;
11828 } 11742 }
@@ -11851,7 +11765,7 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,
11851 pci_disable_device(pdev); 11765 pci_disable_device(pdev);
11852 pci_set_drvdata(pdev, NULL); 11766 pci_set_drvdata(pdev, NULL);
11853 out_free_ieee80211: 11767 out_free_ieee80211:
11854 free_ieee80211(priv->net_dev, 0); 11768 free_ieee80211(priv->net_dev);
11855 out: 11769 out:
11856 return err; 11770 return err;
11857} 11771}
@@ -11873,7 +11787,6 @@ static void __devexit ipw_pci_remove(struct pci_dev *pdev)
11873 11787
11874 mutex_unlock(&priv->mutex); 11788 mutex_unlock(&priv->mutex);
11875 11789
11876 unregister_ieee80211(priv->ieee);
11877 unregister_netdev(priv->net_dev); 11790 unregister_netdev(priv->net_dev);
11878 11791
11879 if (priv->rxq) { 11792 if (priv->rxq) {
@@ -11919,7 +11832,7 @@ static void __devexit ipw_pci_remove(struct pci_dev *pdev)
11919 pci_release_regions(pdev); 11832 pci_release_regions(pdev);
11920 pci_disable_device(pdev); 11833 pci_disable_device(pdev);
11921 pci_set_drvdata(pdev, NULL); 11834 pci_set_drvdata(pdev, NULL);
11922 free_ieee80211(priv->net_dev, 0); 11835 free_ieee80211(priv->net_dev);
11923 free_firmware(); 11836 free_firmware();
11924} 11837}
11925 11838
diff --git a/drivers/net/wireless/ipw2x00/libipw.h b/drivers/net/wireless/ipw2x00/libipw.h
index f42ade6c2d3e..1e334ff6bd52 100644
--- a/drivers/net/wireless/ipw2x00/libipw.h
+++ b/drivers/net/wireless/ipw2x00/libipw.h
@@ -31,7 +31,6 @@
31#include <linux/ieee80211.h> 31#include <linux/ieee80211.h>
32 32
33#include <net/lib80211.h> 33#include <net/lib80211.h>
34#include <net/cfg80211.h>
35 34
36#define LIBIPW_VERSION "git-1.1.13" 35#define LIBIPW_VERSION "git-1.1.13"
37 36
@@ -784,15 +783,12 @@ struct libipw_geo {
784 783
785struct libipw_device { 784struct libipw_device {
786 struct net_device *dev; 785 struct net_device *dev;
787 struct wireless_dev wdev;
788 struct libipw_security sec; 786 struct libipw_security sec;
789 787
790 /* Bookkeeping structures */ 788 /* Bookkeeping structures */
791 struct libipw_stats ieee_stats; 789 struct libipw_stats ieee_stats;
792 790
793 struct libipw_geo geo; 791 struct libipw_geo geo;
794 struct ieee80211_supported_band bg_band;
795 struct ieee80211_supported_band a_band;
796 792
797 /* Probe / Beacon management */ 793 /* Probe / Beacon management */
798 struct list_head network_free_list; 794 struct list_head network_free_list;
@@ -1018,9 +1014,8 @@ static inline int libipw_is_cck_rate(u8 rate)
1018} 1014}
1019 1015
1020/* ieee80211.c */ 1016/* ieee80211.c */
1021extern void free_ieee80211(struct net_device *dev, int monitor); 1017extern void free_ieee80211(struct net_device *dev);
1022extern struct net_device *alloc_ieee80211(int sizeof_priv, int monitor); 1018extern struct net_device *alloc_ieee80211(int sizeof_priv);
1023extern void unregister_ieee80211(struct libipw_device *ieee);
1024extern int libipw_change_mtu(struct net_device *dev, int new_mtu); 1019extern int libipw_change_mtu(struct net_device *dev, int new_mtu);
1025 1020
1026extern void libipw_networks_age(struct libipw_device *ieee, 1021extern void libipw_networks_age(struct libipw_device *ieee,
diff --git a/drivers/net/wireless/ipw2x00/libipw_module.c b/drivers/net/wireless/ipw2x00/libipw_module.c
index be5b809ec97a..eb2b60834c17 100644
--- a/drivers/net/wireless/ipw2x00/libipw_module.c
+++ b/drivers/net/wireless/ipw2x00/libipw_module.c
@@ -62,9 +62,6 @@ MODULE_DESCRIPTION(DRV_DESCRIPTION);
62MODULE_AUTHOR(DRV_COPYRIGHT); 62MODULE_AUTHOR(DRV_COPYRIGHT);
63MODULE_LICENSE("GPL"); 63MODULE_LICENSE("GPL");
64 64
65struct cfg80211_ops libipw_config_ops = { };
66void *libipw_wiphy_privid = &libipw_wiphy_privid;
67
68static int libipw_networks_allocate(struct libipw_device *ieee) 65static int libipw_networks_allocate(struct libipw_device *ieee)
69{ 66{
70 if (ieee->networks) 67 if (ieee->networks)
@@ -143,7 +140,7 @@ int libipw_change_mtu(struct net_device *dev, int new_mtu)
143} 140}
144EXPORT_SYMBOL(libipw_change_mtu); 141EXPORT_SYMBOL(libipw_change_mtu);
145 142
146struct net_device *alloc_ieee80211(int sizeof_priv, int monitor) 143struct net_device *alloc_ieee80211(int sizeof_priv)
147{ 144{
148 struct libipw_device *ieee; 145 struct libipw_device *ieee;
149 struct net_device *dev; 146 struct net_device *dev;
@@ -160,31 +157,10 @@ struct net_device *alloc_ieee80211(int sizeof_priv, int monitor)
160 157
161 ieee->dev = dev; 158 ieee->dev = dev;
162 159
163 if (!monitor) {
164 ieee->wdev.wiphy = wiphy_new(&libipw_config_ops, 0);
165 if (!ieee->wdev.wiphy) {
166 LIBIPW_ERROR("Unable to allocate wiphy.\n");
167 goto failed_free_netdev;
168 }
169
170 ieee->dev->ieee80211_ptr = &ieee->wdev;
171 ieee->wdev.iftype = NL80211_IFTYPE_STATION;
172
173 /* Fill-out wiphy structure bits we know... Not enough info
174 here to call set_wiphy_dev or set MAC address or channel info
175 -- have to do that in ->ndo_init... */
176 ieee->wdev.wiphy->privid = libipw_wiphy_privid;
177
178 ieee->wdev.wiphy->max_scan_ssids = 1;
179 ieee->wdev.wiphy->max_scan_ie_len = 0;
180 ieee->wdev.wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION)
181 | BIT(NL80211_IFTYPE_ADHOC);
182 }
183
184 err = libipw_networks_allocate(ieee); 160 err = libipw_networks_allocate(ieee);
185 if (err) { 161 if (err) {
186 LIBIPW_ERROR("Unable to allocate beacon storage: %d\n", err); 162 LIBIPW_ERROR("Unable to allocate beacon storage: %d\n", err);
187 goto failed_free_wiphy; 163 goto failed_free_netdev;
188 } 164 }
189 libipw_networks_initialize(ieee); 165 libipw_networks_initialize(ieee);
190 166
@@ -217,37 +193,22 @@ struct net_device *alloc_ieee80211(int sizeof_priv, int monitor)
217 193
218 return dev; 194 return dev;
219 195
220failed_free_wiphy:
221 if (!monitor)
222 wiphy_free(ieee->wdev.wiphy);
223failed_free_netdev: 196failed_free_netdev:
224 free_netdev(dev); 197 free_netdev(dev);
225failed: 198failed:
226 return NULL; 199 return NULL;
227} 200}
228 201
229void free_ieee80211(struct net_device *dev, int monitor) 202void free_ieee80211(struct net_device *dev)
230{ 203{
231 struct libipw_device *ieee = netdev_priv(dev); 204 struct libipw_device *ieee = netdev_priv(dev);
232 205
233 lib80211_crypt_info_free(&ieee->crypt_info); 206 lib80211_crypt_info_free(&ieee->crypt_info);
234 207
235 libipw_networks_free(ieee); 208 libipw_networks_free(ieee);
236
237 /* free cfg80211 resources */
238 if (!monitor)
239 wiphy_free(ieee->wdev.wiphy);
240
241 free_netdev(dev); 209 free_netdev(dev);
242} 210}
243 211
244void unregister_ieee80211(struct libipw_device *ieee)
245{
246 wiphy_unregister(ieee->wdev.wiphy);
247 kfree(ieee->a_band.channels);
248 kfree(ieee->bg_band.channels);
249}
250
251#ifdef CONFIG_LIBIPW_DEBUG 212#ifdef CONFIG_LIBIPW_DEBUG
252 213
253static int debug = 0; 214static int debug = 0;
@@ -333,4 +294,3 @@ module_init(libipw_init);
333 294
334EXPORT_SYMBOL(alloc_ieee80211); 295EXPORT_SYMBOL(alloc_ieee80211);
335EXPORT_SYMBOL(free_ieee80211); 296EXPORT_SYMBOL(free_ieee80211);
336EXPORT_SYMBOL(unregister_ieee80211);
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c
index 2716b91ba9fa..950267ab556a 100644
--- a/drivers/net/wireless/iwlwifi/iwl-1000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-1000.c
@@ -161,5 +161,6 @@ struct iwl_cfg iwl1000_bgn_cfg = {
161 .max_ll_items = OTP_MAX_LL_ITEMS_1000, 161 .max_ll_items = OTP_MAX_LL_ITEMS_1000,
162 .shadow_ram_support = false, 162 .shadow_ram_support = false,
163 .ht_greenfield_support = true, 163 .ht_greenfield_support = true,
164 .use_rts_for_ht = true, /* use rts/cts protection */
164}; 165};
165 166
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c
index c295b8ee9228..1473452ba22f 100644
--- a/drivers/net/wireless/iwlwifi/iwl-6000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-6000.c
@@ -175,6 +175,7 @@ struct iwl_cfg iwl6000h_2agn_cfg = {
175 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 175 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
176 .shadow_ram_support = true, 176 .shadow_ram_support = true,
177 .ht_greenfield_support = true, 177 .ht_greenfield_support = true,
178 .use_rts_for_ht = true, /* use rts/cts protection */
178}; 179};
179 180
180/* 181/*
@@ -198,6 +199,7 @@ struct iwl_cfg iwl6000i_2agn_cfg = {
198 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 199 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
199 .shadow_ram_support = true, 200 .shadow_ram_support = true,
200 .ht_greenfield_support = true, 201 .ht_greenfield_support = true,
202 .use_rts_for_ht = true, /* use rts/cts protection */
201}; 203};
202 204
203struct iwl_cfg iwl6050_2agn_cfg = { 205struct iwl_cfg iwl6050_2agn_cfg = {
@@ -218,6 +220,7 @@ struct iwl_cfg iwl6050_2agn_cfg = {
218 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 220 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
219 .shadow_ram_support = true, 221 .shadow_ram_support = true,
220 .ht_greenfield_support = true, 222 .ht_greenfield_support = true,
223 .use_rts_for_ht = true, /* use rts/cts protection */
221}; 224};
222 225
223struct iwl_cfg iwl6000_3agn_cfg = { 226struct iwl_cfg iwl6000_3agn_cfg = {
@@ -238,6 +241,7 @@ struct iwl_cfg iwl6000_3agn_cfg = {
238 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 241 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
239 .shadow_ram_support = true, 242 .shadow_ram_support = true,
240 .ht_greenfield_support = true, 243 .ht_greenfield_support = true,
244 .use_rts_for_ht = true, /* use rts/cts protection */
241}; 245};
242 246
243struct iwl_cfg iwl6050_3agn_cfg = { 247struct iwl_cfg iwl6050_3agn_cfg = {
@@ -258,6 +262,7 @@ struct iwl_cfg iwl6050_3agn_cfg = {
258 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 262 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
259 .shadow_ram_support = true, 263 .shadow_ram_support = true,
260 .ht_greenfield_support = true, 264 .ht_greenfield_support = true,
265 .use_rts_for_ht = true, /* use rts/cts protection */
261}; 266};
262 267
263MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX)); 268MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX));
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
index 346dc06fa7b7..81726ee32858 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
@@ -418,6 +418,15 @@ static void rs_tl_turn_on_agg(struct iwl_priv *priv, u8 tid,
418 else if (tid == IWL_AGG_ALL_TID) 418 else if (tid == IWL_AGG_ALL_TID)
419 for (tid = 0; tid < TID_MAX_LOAD_COUNT; tid++) 419 for (tid = 0; tid < TID_MAX_LOAD_COUNT; tid++)
420 rs_tl_turn_on_agg_for_tid(priv, lq_data, tid, sta); 420 rs_tl_turn_on_agg_for_tid(priv, lq_data, tid, sta);
421 if (priv->cfg->use_rts_for_ht) {
422 /*
423 * switch to RTS/CTS if it is the prefer protection method
424 * for HT traffic
425 */
426 IWL_DEBUG_HT(priv, "use RTS/CTS protection for HT\n");
427 priv->staging_rxon.flags &= ~RXON_FLG_SELF_CTS_EN;
428 iwlcore_commit_rxon(priv);
429 }
421} 430}
422 431
423static inline int get_num_of_ant_from_rate(u32 rate_n_flags) 432static inline int get_num_of_ant_from_rate(u32 rate_n_flags)
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index eaafae091f5b..921dc4a26fe2 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -116,9 +116,6 @@ int iwl_commit_rxon(struct iwl_priv *priv)
116 116
117 /* always get timestamp with Rx frame */ 117 /* always get timestamp with Rx frame */
118 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; 118 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
119 /* allow CTS-to-self if possible. this is relevant only for
120 * 5000, but will not damage 4965 */
121 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
122 119
123 ret = iwl_check_rxon_cmd(priv); 120 ret = iwl_check_rxon_cmd(priv);
124 if (ret) { 121 if (ret) {
@@ -218,6 +215,13 @@ int iwl_commit_rxon(struct iwl_priv *priv)
218 "Could not send WEP static key.\n"); 215 "Could not send WEP static key.\n");
219 } 216 }
220 217
218 /*
219 * allow CTS-to-self if possible for new association.
220 * this is relevant only for 5000 series and up,
221 * but will not damage 4965
222 */
223 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
224
221 /* Apply the new configuration 225 /* Apply the new configuration
222 * RXON assoc doesn't clear the station table in uCode, 226 * RXON assoc doesn't clear the station table in uCode,
223 */ 227 */
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h
index e50103a956b1..7754538c2194 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.h
+++ b/drivers/net/wireless/iwlwifi/iwl-core.h
@@ -213,6 +213,7 @@ struct iwl_mod_params {
213 * @pa_type: used by 6000 series only to identify the type of Power Amplifier 213 * @pa_type: used by 6000 series only to identify the type of Power Amplifier
214 * @max_ll_items: max number of OTP blocks 214 * @max_ll_items: max number of OTP blocks
215 * @shadow_ram_support: shadow support for OTP memory 215 * @shadow_ram_support: shadow support for OTP memory
216 * @use_rts_for_ht: use rts/cts protection for HT traffic
216 * 217 *
217 * We enable the driver to be backward compatible wrt API version. The 218 * We enable the driver to be backward compatible wrt API version. The
218 * driver specifies which APIs it supports (with @ucode_api_max being the 219 * driver specifies which APIs it supports (with @ucode_api_max being the
@@ -255,6 +256,7 @@ struct iwl_cfg {
255 const bool shadow_ram_support; 256 const bool shadow_ram_support;
256 const bool ht_greenfield_support; 257 const bool ht_greenfield_support;
257 const bool broken_powersave; 258 const bool broken_powersave;
259 bool use_rts_for_ht;
258}; 260};
259 261
260/*************************** 262/***************************
diff --git a/drivers/net/wireless/libertas/ethtool.c b/drivers/net/wireless/libertas/ethtool.c
index 039b555e4d76..53d56ab83c03 100644
--- a/drivers/net/wireless/libertas/ethtool.c
+++ b/drivers/net/wireless/libertas/ethtool.c
@@ -169,16 +169,19 @@ static int lbs_ethtool_set_wol(struct net_device *dev,
169 struct lbs_private *priv = dev->ml_priv; 169 struct lbs_private *priv = dev->ml_priv;
170 uint32_t criteria = 0; 170 uint32_t criteria = 0;
171 171
172 if (priv->wol_criteria == 0xffffffff && wol->wolopts)
173 return -EOPNOTSUPP;
174
175 if (wol->wolopts & ~(WAKE_UCAST|WAKE_MCAST|WAKE_BCAST|WAKE_PHY)) 172 if (wol->wolopts & ~(WAKE_UCAST|WAKE_MCAST|WAKE_BCAST|WAKE_PHY))
176 return -EOPNOTSUPP; 173 return -EOPNOTSUPP;
177 174
178 if (wol->wolopts & WAKE_UCAST) criteria |= EHS_WAKE_ON_UNICAST_DATA; 175 if (wol->wolopts & WAKE_UCAST)
179 if (wol->wolopts & WAKE_MCAST) criteria |= EHS_WAKE_ON_MULTICAST_DATA; 176 criteria |= EHS_WAKE_ON_UNICAST_DATA;
180 if (wol->wolopts & WAKE_BCAST) criteria |= EHS_WAKE_ON_BROADCAST_DATA; 177 if (wol->wolopts & WAKE_MCAST)
181 if (wol->wolopts & WAKE_PHY) criteria |= EHS_WAKE_ON_MAC_EVENT; 178 criteria |= EHS_WAKE_ON_MULTICAST_DATA;
179 if (wol->wolopts & WAKE_BCAST)
180 criteria |= EHS_WAKE_ON_BROADCAST_DATA;
181 if (wol->wolopts & WAKE_PHY)
182 criteria |= EHS_WAKE_ON_MAC_EVENT;
183 if (wol->wolopts == 0)
184 criteria |= EHS_REMOVE_WAKEUP;
182 185
183 return lbs_host_sleep_cfg(priv, criteria, (struct wol_config *)NULL); 186 return lbs_host_sleep_cfg(priv, criteria, (struct wol_config *)NULL);
184} 187}
diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c
index 17e199546eeb..92af9b96bb7a 100644
--- a/drivers/net/wireless/p54/p54usb.c
+++ b/drivers/net/wireless/p54/p54usb.c
@@ -426,12 +426,16 @@ static const char p54u_romboot_3887[] = "~~~~";
426static int p54u_firmware_reset_3887(struct ieee80211_hw *dev) 426static int p54u_firmware_reset_3887(struct ieee80211_hw *dev)
427{ 427{
428 struct p54u_priv *priv = dev->priv; 428 struct p54u_priv *priv = dev->priv;
429 u8 buf[4]; 429 u8 *buf;
430 int ret; 430 int ret;
431 431
432 memcpy(&buf, p54u_romboot_3887, sizeof(buf)); 432 buf = kmalloc(4, GFP_KERNEL);
433 if (!buf)
434 return -ENOMEM;
435 memcpy(buf, p54u_romboot_3887, 4);
433 ret = p54u_bulk_msg(priv, P54U_PIPE_DATA, 436 ret = p54u_bulk_msg(priv, P54U_PIPE_DATA,
434 buf, sizeof(buf)); 437 buf, 4);
438 kfree(buf);
435 if (ret) 439 if (ret)
436 dev_err(&priv->udev->dev, "(p54usb) unable to jump to " 440 dev_err(&priv->udev->dev, "(p54usb) unable to jump to "
437 "boot ROM (%d)!\n", ret); 441 "boot ROM (%d)!\n", ret);
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index 71761b343839..73bbec58341e 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -815,6 +815,8 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev)
815 815
816 mutex_init(&rt2x00dev->csr_mutex); 816 mutex_init(&rt2x00dev->csr_mutex);
817 817
818 set_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags);
819
818 /* 820 /*
819 * Make room for rt2x00_intf inside the per-interface 821 * Make room for rt2x00_intf inside the per-interface
820 * structure ieee80211_vif. 822 * structure ieee80211_vif.
@@ -871,8 +873,6 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev)
871 rt2x00leds_register(rt2x00dev); 873 rt2x00leds_register(rt2x00dev);
872 rt2x00debug_register(rt2x00dev); 874 rt2x00debug_register(rt2x00dev);
873 875
874 set_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags);
875
876 return 0; 876 return 0;
877 877
878exit: 878exit:
diff --git a/drivers/net/wireless/rt2x00/rt2x00link.c b/drivers/net/wireless/rt2x00/rt2x00link.c
index c64db0ba7f40..c708d0be9155 100644
--- a/drivers/net/wireless/rt2x00/rt2x00link.c
+++ b/drivers/net/wireless/rt2x00/rt2x00link.c
@@ -362,8 +362,9 @@ void rt2x00link_start_tuner(struct rt2x00_dev *rt2x00dev)
362 362
363 rt2x00link_reset_tuner(rt2x00dev, false); 363 rt2x00link_reset_tuner(rt2x00dev, false);
364 364
365 ieee80211_queue_delayed_work(rt2x00dev->hw, 365 if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
366 &link->work, LINK_TUNE_INTERVAL); 366 ieee80211_queue_delayed_work(rt2x00dev->hw,
367 &link->work, LINK_TUNE_INTERVAL);
367} 368}
368 369
369void rt2x00link_stop_tuner(struct rt2x00_dev *rt2x00dev) 370void rt2x00link_stop_tuner(struct rt2x00_dev *rt2x00dev)
@@ -469,8 +470,10 @@ static void rt2x00link_tuner(struct work_struct *work)
469 * Increase tuner counter, and reschedule the next link tuner run. 470 * Increase tuner counter, and reschedule the next link tuner run.
470 */ 471 */
471 link->count++; 472 link->count++;
472 ieee80211_queue_delayed_work(rt2x00dev->hw, 473
473 &link->work, LINK_TUNE_INTERVAL); 474 if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
475 ieee80211_queue_delayed_work(rt2x00dev->hw,
476 &link->work, LINK_TUNE_INTERVAL);
474} 477}
475 478
476void rt2x00link_register(struct rt2x00_dev *rt2x00dev) 479void rt2x00link_register(struct rt2x00_dev *rt2x00dev)
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c
index 501544882c2c..f02b48a90593 100644
--- a/drivers/net/wireless/rt2x00/rt2x00usb.c
+++ b/drivers/net/wireless/rt2x00/rt2x00usb.c
@@ -47,6 +47,8 @@ int rt2x00usb_vendor_request(struct rt2x00_dev *rt2x00dev,
47 (requesttype == USB_VENDOR_REQUEST_IN) ? 47 (requesttype == USB_VENDOR_REQUEST_IN) ?
48 usb_rcvctrlpipe(usb_dev, 0) : usb_sndctrlpipe(usb_dev, 0); 48 usb_rcvctrlpipe(usb_dev, 0) : usb_sndctrlpipe(usb_dev, 0);
49 49
50 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
51 return -ENODEV;
50 52
51 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 53 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
52 status = usb_control_msg(usb_dev, pipe, request, requesttype, 54 status = usb_control_msg(usb_dev, pipe, request, requesttype,
@@ -60,8 +62,10 @@ int rt2x00usb_vendor_request(struct rt2x00_dev *rt2x00dev,
60 * -ENODEV: Device has disappeared, no point continuing. 62 * -ENODEV: Device has disappeared, no point continuing.
61 * All other errors: Try again. 63 * All other errors: Try again.
62 */ 64 */
63 else if (status == -ENODEV) 65 else if (status == -ENODEV) {
66 clear_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags);
64 break; 67 break;
68 }
65 } 69 }
66 70
67 ERROR(rt2x00dev, 71 ERROR(rt2x00dev,
@@ -161,6 +165,9 @@ int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
161{ 165{
162 unsigned int i; 166 unsigned int i;
163 167
168 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
169 return -ENODEV;
170
164 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 171 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
165 rt2x00usb_register_read_lock(rt2x00dev, offset, reg); 172 rt2x00usb_register_read_lock(rt2x00dev, offset, reg);
166 if (!rt2x00_get_field32(*reg, field)) 173 if (!rt2x00_get_field32(*reg, field))
diff --git a/drivers/net/wireless/rtl818x/rtl8187_leds.c b/drivers/net/wireless/rtl818x/rtl8187_leds.c
index a1c670fc1552..cf8a4a40fdf6 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_leds.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_leds.c
@@ -210,10 +210,10 @@ void rtl8187_leds_exit(struct ieee80211_hw *dev)
210 210
211 /* turn the LED off before exiting */ 211 /* turn the LED off before exiting */
212 ieee80211_queue_delayed_work(dev, &priv->led_off, 0); 212 ieee80211_queue_delayed_work(dev, &priv->led_off, 0);
213 cancel_delayed_work_sync(&priv->led_off);
214 cancel_delayed_work_sync(&priv->led_on);
215 rtl8187_unregister_led(&priv->led_rx); 213 rtl8187_unregister_led(&priv->led_rx);
216 rtl8187_unregister_led(&priv->led_tx); 214 rtl8187_unregister_led(&priv->led_tx);
215 cancel_delayed_work_sync(&priv->led_off);
216 cancel_delayed_work_sync(&priv->led_on);
217} 217}
218#endif /* def CONFIG_RTL8187_LED */ 218#endif /* def CONFIG_RTL8187_LED */
219 219
diff --git a/drivers/net/wireless/rtl818x/rtl8187_rfkill.c b/drivers/net/wireless/rtl818x/rtl8187_rfkill.c
index 9fab13e4004e..cad8037ab2af 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_rfkill.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_rfkill.c
@@ -18,6 +18,7 @@
18#include <net/mac80211.h> 18#include <net/mac80211.h>
19 19
20#include "rtl8187.h" 20#include "rtl8187.h"
21#include "rtl8187_rfkill.h"
21 22
22static bool rtl8187_is_radio_enabled(struct rtl8187_priv *priv) 23static bool rtl8187_is_radio_enabled(struct rtl8187_priv *priv)
23{ 24{
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index 22b02c6df854..b952ebc7a78b 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -175,15 +175,6 @@ dmar_parse_one_drhd(struct acpi_dmar_header *header)
175 int ret = 0; 175 int ret = 0;
176 176
177 drhd = (struct acpi_dmar_hardware_unit *)header; 177 drhd = (struct acpi_dmar_hardware_unit *)header;
178 if (!drhd->address) {
179 /* Promote an attitude of violence to a BIOS engineer today */
180 WARN(1, "Your BIOS is broken; DMAR reported at address zero!\n"
181 "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
182 dmi_get_system_info(DMI_BIOS_VENDOR),
183 dmi_get_system_info(DMI_BIOS_VERSION),
184 dmi_get_system_info(DMI_PRODUCT_VERSION));
185 return -ENODEV;
186 }
187 dmaru = kzalloc(sizeof(*dmaru), GFP_KERNEL); 178 dmaru = kzalloc(sizeof(*dmaru), GFP_KERNEL);
188 if (!dmaru) 179 if (!dmaru)
189 return -ENOMEM; 180 return -ENOMEM;
@@ -591,12 +582,53 @@ int __init dmar_table_init(void)
591 return 0; 582 return 0;
592} 583}
593 584
585int __init check_zero_address(void)
586{
587 struct acpi_table_dmar *dmar;
588 struct acpi_dmar_header *entry_header;
589 struct acpi_dmar_hardware_unit *drhd;
590
591 dmar = (struct acpi_table_dmar *)dmar_tbl;
592 entry_header = (struct acpi_dmar_header *)(dmar + 1);
593
594 while (((unsigned long)entry_header) <
595 (((unsigned long)dmar) + dmar_tbl->length)) {
596 /* Avoid looping forever on bad ACPI tables */
597 if (entry_header->length == 0) {
598 printk(KERN_WARNING PREFIX
599 "Invalid 0-length structure\n");
600 return 0;
601 }
602
603 if (entry_header->type == ACPI_DMAR_TYPE_HARDWARE_UNIT) {
604 drhd = (void *)entry_header;
605 if (!drhd->address) {
606 /* Promote an attitude of violence to a BIOS engineer today */
607 WARN(1, "Your BIOS is broken; DMAR reported at address zero!\n"
608 "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
609 dmi_get_system_info(DMI_BIOS_VENDOR),
610 dmi_get_system_info(DMI_BIOS_VERSION),
611 dmi_get_system_info(DMI_PRODUCT_VERSION));
612#ifdef CONFIG_DMAR
613 dmar_disabled = 1;
614#endif
615 return 0;
616 }
617 break;
618 }
619
620 entry_header = ((void *)entry_header + entry_header->length);
621 }
622 return 1;
623}
624
594void __init detect_intel_iommu(void) 625void __init detect_intel_iommu(void)
595{ 626{
596 int ret; 627 int ret;
597 628
598 ret = dmar_table_detect(); 629 ret = dmar_table_detect();
599 630 if (ret)
631 ret = check_zero_address();
600 { 632 {
601#ifdef CONFIG_INTR_REMAP 633#ifdef CONFIG_INTR_REMAP
602 struct acpi_table_dmar *dmar; 634 struct acpi_table_dmar *dmar;
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index b1e97e682500..1840a0578a42 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -2767,7 +2767,15 @@ static void *intel_alloc_coherent(struct device *hwdev, size_t size,
2767 2767
2768 size = PAGE_ALIGN(size); 2768 size = PAGE_ALIGN(size);
2769 order = get_order(size); 2769 order = get_order(size);
2770 flags &= ~(GFP_DMA | GFP_DMA32); 2770
2771 if (!iommu_no_mapping(hwdev))
2772 flags &= ~(GFP_DMA | GFP_DMA32);
2773 else if (hwdev->coherent_dma_mask < dma_get_required_mask(hwdev)) {
2774 if (hwdev->coherent_dma_mask < DMA_BIT_MASK(32))
2775 flags |= GFP_DMA;
2776 else
2777 flags |= GFP_DMA32;
2778 }
2771 2779
2772 vaddr = (void *)__get_free_pages(flags, order); 2780 vaddr = (void *)__get_free_pages(flags, order);
2773 if (!vaddr) 2781 if (!vaddr)
@@ -3207,6 +3215,33 @@ static int __init init_iommu_sysfs(void)
3207} 3215}
3208#endif /* CONFIG_PM */ 3216#endif /* CONFIG_PM */
3209 3217
3218/*
3219 * Here we only respond to action of unbound device from driver.
3220 *
3221 * Added device is not attached to its DMAR domain here yet. That will happen
3222 * when mapping the device to iova.
3223 */
3224static int device_notifier(struct notifier_block *nb,
3225 unsigned long action, void *data)
3226{
3227 struct device *dev = data;
3228 struct pci_dev *pdev = to_pci_dev(dev);
3229 struct dmar_domain *domain;
3230
3231 domain = find_domain(pdev);
3232 if (!domain)
3233 return 0;
3234
3235 if (action == BUS_NOTIFY_UNBOUND_DRIVER && !iommu_pass_through)
3236 domain_remove_one_dev_info(domain, pdev);
3237
3238 return 0;
3239}
3240
3241static struct notifier_block device_nb = {
3242 .notifier_call = device_notifier,
3243};
3244
3210int __init intel_iommu_init(void) 3245int __init intel_iommu_init(void)
3211{ 3246{
3212 int ret = 0; 3247 int ret = 0;
@@ -3259,6 +3294,8 @@ int __init intel_iommu_init(void)
3259 3294
3260 register_iommu(&intel_iommu_ops); 3295 register_iommu(&intel_iommu_ops);
3261 3296
3297 bus_register_notifier(&pci_bus_type, &device_nb);
3298
3262 return 0; 3299 return 0;
3263} 3300}
3264 3301
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 745402e8e498..5b7056cec00c 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -656,8 +656,10 @@ void pcie_aspm_exit_link_state(struct pci_dev *pdev)
656 free_link_state(link); 656 free_link_state(link);
657 657
658 /* Recheck latencies and configure upstream links */ 658 /* Recheck latencies and configure upstream links */
659 pcie_update_aspm_capable(root); 659 if (parent_link) {
660 pcie_config_aspm_path(parent_link); 660 pcie_update_aspm_capable(root);
661 pcie_config_aspm_path(parent_link);
662 }
661out: 663out:
662 mutex_unlock(&aspm_lock); 664 mutex_unlock(&aspm_lock);
663 up_read(&pci_bus_sem); 665 up_read(&pci_bus_sem);
diff --git a/drivers/platform/x86/eeepc-laptop.c b/drivers/platform/x86/eeepc-laptop.c
index d379e74a05d0..4226e5352738 100644
--- a/drivers/platform/x86/eeepc-laptop.c
+++ b/drivers/platform/x86/eeepc-laptop.c
@@ -150,8 +150,6 @@ struct eeepc_hotk {
150/* The actual device the driver binds to */ 150/* The actual device the driver binds to */
151static struct eeepc_hotk *ehotk; 151static struct eeepc_hotk *ehotk;
152 152
153static void eeepc_rfkill_hotplug(bool real);
154
155/* Platform device/driver */ 153/* Platform device/driver */
156static int eeepc_hotk_thaw(struct device *device); 154static int eeepc_hotk_thaw(struct device *device);
157static int eeepc_hotk_restore(struct device *device); 155static int eeepc_hotk_restore(struct device *device);
@@ -345,16 +343,7 @@ static bool eeepc_wlan_rfkill_blocked(void)
345static int eeepc_rfkill_set(void *data, bool blocked) 343static int eeepc_rfkill_set(void *data, bool blocked)
346{ 344{
347 unsigned long asl = (unsigned long)data; 345 unsigned long asl = (unsigned long)data;
348 int ret; 346 return set_acpi(asl, !blocked);
349
350 if (asl != CM_ASL_WLAN)
351 return set_acpi(asl, !blocked);
352
353 /* hack to avoid panic with rt2860sta */
354 if (blocked)
355 eeepc_rfkill_hotplug(false);
356 ret = set_acpi(asl, !blocked);
357 return ret;
358} 347}
359 348
360static const struct rfkill_ops eeepc_rfkill_ops = { 349static const struct rfkill_ops eeepc_rfkill_ops = {
@@ -367,7 +356,8 @@ static void __devinit eeepc_enable_camera(void)
367 * If the following call to set_acpi() fails, it's because there's no 356 * If the following call to set_acpi() fails, it's because there's no
368 * camera so we can ignore the error. 357 * camera so we can ignore the error.
369 */ 358 */
370 set_acpi(CM_ASL_CAMERA, 1); 359 if (get_acpi(CM_ASL_CAMERA) == 0)
360 set_acpi(CM_ASL_CAMERA, 1);
371} 361}
372 362
373/* 363/*
@@ -654,13 +644,13 @@ static int eeepc_get_adapter_status(struct hotplug_slot *hotplug_slot,
654 return 0; 644 return 0;
655} 645}
656 646
657static void eeepc_rfkill_hotplug(bool real) 647static void eeepc_rfkill_hotplug(void)
658{ 648{
659 struct pci_dev *dev; 649 struct pci_dev *dev;
660 struct pci_bus *bus; 650 struct pci_bus *bus;
661 bool blocked = real ? eeepc_wlan_rfkill_blocked() : true; 651 bool blocked = eeepc_wlan_rfkill_blocked();
662 652
663 if (real && ehotk->wlan_rfkill) 653 if (ehotk->wlan_rfkill)
664 rfkill_set_sw_state(ehotk->wlan_rfkill, blocked); 654 rfkill_set_sw_state(ehotk->wlan_rfkill, blocked);
665 655
666 mutex_lock(&ehotk->hotplug_lock); 656 mutex_lock(&ehotk->hotplug_lock);
@@ -703,7 +693,7 @@ static void eeepc_rfkill_notify(acpi_handle handle, u32 event, void *data)
703 if (event != ACPI_NOTIFY_BUS_CHECK) 693 if (event != ACPI_NOTIFY_BUS_CHECK)
704 return; 694 return;
705 695
706 eeepc_rfkill_hotplug(true); 696 eeepc_rfkill_hotplug();
707} 697}
708 698
709static void eeepc_hotk_notify(struct acpi_device *device, u32 event) 699static void eeepc_hotk_notify(struct acpi_device *device, u32 event)
@@ -861,7 +851,7 @@ static int eeepc_hotk_restore(struct device *device)
861{ 851{
862 /* Refresh both wlan rfkill state and pci hotplug */ 852 /* Refresh both wlan rfkill state and pci hotplug */
863 if (ehotk->wlan_rfkill) 853 if (ehotk->wlan_rfkill)
864 eeepc_rfkill_hotplug(true); 854 eeepc_rfkill_hotplug();
865 855
866 if (ehotk->bluetooth_rfkill) 856 if (ehotk->bluetooth_rfkill)
867 rfkill_set_sw_state(ehotk->bluetooth_rfkill, 857 rfkill_set_sw_state(ehotk->bluetooth_rfkill,
@@ -1004,7 +994,7 @@ static void eeepc_rfkill_exit(void)
1004 * Refresh pci hotplug in case the rfkill state was changed after 994 * Refresh pci hotplug in case the rfkill state was changed after
1005 * eeepc_unregister_rfkill_notifier() 995 * eeepc_unregister_rfkill_notifier()
1006 */ 996 */
1007 eeepc_rfkill_hotplug(true); 997 eeepc_rfkill_hotplug();
1008 if (ehotk->hotplug_slot) 998 if (ehotk->hotplug_slot)
1009 pci_hp_deregister(ehotk->hotplug_slot); 999 pci_hp_deregister(ehotk->hotplug_slot);
1010 1000
@@ -1120,7 +1110,7 @@ static int eeepc_rfkill_init(struct device *dev)
1120 * Refresh pci hotplug in case the rfkill state was changed during 1110 * Refresh pci hotplug in case the rfkill state was changed during
1121 * setup. 1111 * setup.
1122 */ 1112 */
1123 eeepc_rfkill_hotplug(true); 1113 eeepc_rfkill_hotplug();
1124 1114
1125exit: 1115exit:
1126 if (result && result != -ENODEV) 1116 if (result && result != -ENODEV)
diff --git a/drivers/pps/kapi.c b/drivers/pps/kapi.c
index 35a0b192d768..2d414e23d390 100644
--- a/drivers/pps/kapi.c
+++ b/drivers/pps/kapi.c
@@ -271,6 +271,7 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data)
271{ 271{
272 struct pps_device *pps; 272 struct pps_device *pps;
273 unsigned long flags; 273 unsigned long flags;
274 int captured = 0;
274 275
275 if ((event & (PPS_CAPTUREASSERT | PPS_CAPTURECLEAR)) == 0) { 276 if ((event & (PPS_CAPTUREASSERT | PPS_CAPTURECLEAR)) == 0) {
276 printk(KERN_ERR "pps: unknown event (%x) for source %d\n", 277 printk(KERN_ERR "pps: unknown event (%x) for source %d\n",
@@ -293,7 +294,8 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data)
293 294
294 /* Check the event */ 295 /* Check the event */
295 pps->current_mode = pps->params.mode; 296 pps->current_mode = pps->params.mode;
296 if (event & PPS_CAPTUREASSERT) { 297 if ((event & PPS_CAPTUREASSERT) &
298 (pps->params.mode & PPS_CAPTUREASSERT)) {
297 /* We have to add an offset? */ 299 /* We have to add an offset? */
298 if (pps->params.mode & PPS_OFFSETASSERT) 300 if (pps->params.mode & PPS_OFFSETASSERT)
299 pps_add_offset(ts, &pps->params.assert_off_tu); 301 pps_add_offset(ts, &pps->params.assert_off_tu);
@@ -303,8 +305,11 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data)
303 pps->assert_sequence++; 305 pps->assert_sequence++;
304 pr_debug("capture assert seq #%u for source %d\n", 306 pr_debug("capture assert seq #%u for source %d\n",
305 pps->assert_sequence, source); 307 pps->assert_sequence, source);
308
309 captured = ~0;
306 } 310 }
307 if (event & PPS_CAPTURECLEAR) { 311 if ((event & PPS_CAPTURECLEAR) &
312 (pps->params.mode & PPS_CAPTURECLEAR)) {
308 /* We have to add an offset? */ 313 /* We have to add an offset? */
309 if (pps->params.mode & PPS_OFFSETCLEAR) 314 if (pps->params.mode & PPS_OFFSETCLEAR)
310 pps_add_offset(ts, &pps->params.clear_off_tu); 315 pps_add_offset(ts, &pps->params.clear_off_tu);
@@ -314,12 +319,17 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data)
314 pps->clear_sequence++; 319 pps->clear_sequence++;
315 pr_debug("capture clear seq #%u for source %d\n", 320 pr_debug("capture clear seq #%u for source %d\n",
316 pps->clear_sequence, source); 321 pps->clear_sequence, source);
322
323 captured = ~0;
317 } 324 }
318 325
319 pps->go = ~0; 326 /* Wake up iif captured somthing */
320 wake_up_interruptible(&pps->queue); 327 if (captured) {
328 pps->go = ~0;
329 wake_up_interruptible(&pps->queue);
321 330
322 kill_fasync(&pps->async_queue, SIGIO, POLL_IN); 331 kill_fasync(&pps->async_queue, SIGIO, POLL_IN);
332 }
323 333
324 spin_unlock_irqrestore(&pps->lock, flags); 334 spin_unlock_irqrestore(&pps->lock, flags);
325 335
diff --git a/drivers/pps/pps.c b/drivers/pps/pps.c
index fea17e7805e9..ca5183bdad85 100644
--- a/drivers/pps/pps.c
+++ b/drivers/pps/pps.c
@@ -71,9 +71,14 @@ static long pps_cdev_ioctl(struct file *file,
71 case PPS_GETPARAMS: 71 case PPS_GETPARAMS:
72 pr_debug("PPS_GETPARAMS: source %d\n", pps->id); 72 pr_debug("PPS_GETPARAMS: source %d\n", pps->id);
73 73
74 /* Return current parameters */ 74 spin_lock_irq(&pps->lock);
75 err = copy_to_user(uarg, &pps->params, 75
76 sizeof(struct pps_kparams)); 76 /* Get the current parameters */
77 params = pps->params;
78
79 spin_unlock_irq(&pps->lock);
80
81 err = copy_to_user(uarg, &params, sizeof(struct pps_kparams));
77 if (err) 82 if (err)
78 return -EFAULT; 83 return -EFAULT;
79 84
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index 744ea1d0b59b..efe568deda12 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -1283,7 +1283,8 @@ static int _regulator_disable(struct regulator_dev *rdev)
1283 return -EIO; 1283 return -EIO;
1284 1284
1285 /* are we the last user and permitted to disable ? */ 1285 /* are we the last user and permitted to disable ? */
1286 if (rdev->use_count == 1 && !rdev->constraints->always_on) { 1286 if (rdev->use_count == 1 &&
1287 (rdev->constraints && !rdev->constraints->always_on)) {
1287 1288
1288 /* we are last user */ 1289 /* we are last user */
1289 if (_regulator_can_change_status(rdev) && 1290 if (_regulator_can_change_status(rdev) &&
diff --git a/drivers/regulator/fixed.c b/drivers/regulator/fixed.c
index f8b295700d7d..f9f516a3028a 100644
--- a/drivers/regulator/fixed.c
+++ b/drivers/regulator/fixed.c
@@ -196,11 +196,10 @@ static int regulator_fixed_voltage_remove(struct platform_device *pdev)
196 struct fixed_voltage_data *drvdata = platform_get_drvdata(pdev); 196 struct fixed_voltage_data *drvdata = platform_get_drvdata(pdev);
197 197
198 regulator_unregister(drvdata->dev); 198 regulator_unregister(drvdata->dev);
199 kfree(drvdata->desc.name);
200 kfree(drvdata);
201
202 if (gpio_is_valid(drvdata->gpio)) 199 if (gpio_is_valid(drvdata->gpio))
203 gpio_free(drvdata->gpio); 200 gpio_free(drvdata->gpio);
201 kfree(drvdata->desc.name);
202 kfree(drvdata);
204 203
205 return 0; 204 return 0;
206} 205}
diff --git a/drivers/regulator/wm831x-ldo.c b/drivers/regulator/wm831x-ldo.c
index bb61aede4801..902db56ce099 100644
--- a/drivers/regulator/wm831x-ldo.c
+++ b/drivers/regulator/wm831x-ldo.c
@@ -175,18 +175,18 @@ static unsigned int wm831x_gp_ldo_get_mode(struct regulator_dev *rdev)
175 struct wm831x *wm831x = ldo->wm831x; 175 struct wm831x *wm831x = ldo->wm831x;
176 int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; 176 int ctrl_reg = ldo->base + WM831X_LDO_CONTROL;
177 int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; 177 int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
178 unsigned int ret; 178 int ret;
179 179
180 ret = wm831x_reg_read(wm831x, on_reg); 180 ret = wm831x_reg_read(wm831x, on_reg);
181 if (ret < 0) 181 if (ret < 0)
182 return 0; 182 return ret;
183 183
184 if (!(ret & WM831X_LDO1_ON_MODE)) 184 if (!(ret & WM831X_LDO1_ON_MODE))
185 return REGULATOR_MODE_NORMAL; 185 return REGULATOR_MODE_NORMAL;
186 186
187 ret = wm831x_reg_read(wm831x, ctrl_reg); 187 ret = wm831x_reg_read(wm831x, ctrl_reg);
188 if (ret < 0) 188 if (ret < 0)
189 return 0; 189 return ret;
190 190
191 if (ret & WM831X_LDO1_LP_MODE) 191 if (ret & WM831X_LDO1_LP_MODE)
192 return REGULATOR_MODE_STANDBY; 192 return REGULATOR_MODE_STANDBY;
diff --git a/drivers/rtc/rtc-coh901331.c b/drivers/rtc/rtc-coh901331.c
index 7fe1fa26c52c..03ea530981d1 100644
--- a/drivers/rtc/rtc-coh901331.c
+++ b/drivers/rtc/rtc-coh901331.c
@@ -58,7 +58,16 @@ static irqreturn_t coh901331_interrupt(int irq, void *data)
58 clk_enable(rtap->clk); 58 clk_enable(rtap->clk);
59 /* Ack IRQ */ 59 /* Ack IRQ */
60 writel(1, rtap->virtbase + COH901331_IRQ_EVENT); 60 writel(1, rtap->virtbase + COH901331_IRQ_EVENT);
61 /*
62 * Disable the interrupt. This is necessary because
63 * the RTC lives on a lower-clocked line and will
64 * not release the IRQ line until after a few (slower)
65 * clock cycles. The interrupt will be re-enabled when
66 * a new alarm is set anyway.
67 */
68 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
61 clk_disable(rtap->clk); 69 clk_disable(rtap->clk);
70
62 /* Set alarm flag */ 71 /* Set alarm flag */
63 rtc_update_irq(rtap->rtc, 1, RTC_AF); 72 rtc_update_irq(rtap->rtc, 1, RTC_AF);
64 73
@@ -128,6 +137,8 @@ static int coh901331_alarm_irq_enable(struct device *dev, unsigned int enabled)
128 else 137 else
129 writel(0, rtap->virtbase + COH901331_IRQ_MASK); 138 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
130 clk_disable(rtap->clk); 139 clk_disable(rtap->clk);
140
141 return 0;
131} 142}
132 143
133static struct rtc_class_ops coh901331_ops = { 144static struct rtc_class_ops coh901331_ops = {
diff --git a/drivers/rtc/rtc-pcf50633.c b/drivers/rtc/rtc-pcf50633.c
index f4dd87e29075..33a10c47260e 100644
--- a/drivers/rtc/rtc-pcf50633.c
+++ b/drivers/rtc/rtc-pcf50633.c
@@ -70,7 +70,7 @@ static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50633_time *pcf)
70 rtc->tm_hour = bcd2bin(pcf->time[PCF50633_TI_HOUR]); 70 rtc->tm_hour = bcd2bin(pcf->time[PCF50633_TI_HOUR]);
71 rtc->tm_wday = bcd2bin(pcf->time[PCF50633_TI_WKDAY]); 71 rtc->tm_wday = bcd2bin(pcf->time[PCF50633_TI_WKDAY]);
72 rtc->tm_mday = bcd2bin(pcf->time[PCF50633_TI_DAY]); 72 rtc->tm_mday = bcd2bin(pcf->time[PCF50633_TI_DAY]);
73 rtc->tm_mon = bcd2bin(pcf->time[PCF50633_TI_MONTH]); 73 rtc->tm_mon = bcd2bin(pcf->time[PCF50633_TI_MONTH]) - 1;
74 rtc->tm_year = bcd2bin(pcf->time[PCF50633_TI_YEAR]) + 100; 74 rtc->tm_year = bcd2bin(pcf->time[PCF50633_TI_YEAR]) + 100;
75} 75}
76 76
@@ -81,7 +81,7 @@ static void rtc2pcf_time(struct pcf50633_time *pcf, struct rtc_time *rtc)
81 pcf->time[PCF50633_TI_HOUR] = bin2bcd(rtc->tm_hour); 81 pcf->time[PCF50633_TI_HOUR] = bin2bcd(rtc->tm_hour);
82 pcf->time[PCF50633_TI_WKDAY] = bin2bcd(rtc->tm_wday); 82 pcf->time[PCF50633_TI_WKDAY] = bin2bcd(rtc->tm_wday);
83 pcf->time[PCF50633_TI_DAY] = bin2bcd(rtc->tm_mday); 83 pcf->time[PCF50633_TI_DAY] = bin2bcd(rtc->tm_mday);
84 pcf->time[PCF50633_TI_MONTH] = bin2bcd(rtc->tm_mon); 84 pcf->time[PCF50633_TI_MONTH] = bin2bcd(rtc->tm_mon + 1);
85 pcf->time[PCF50633_TI_YEAR] = bin2bcd(rtc->tm_year % 100); 85 pcf->time[PCF50633_TI_YEAR] = bin2bcd(rtc->tm_year % 100);
86} 86}
87 87
@@ -245,8 +245,9 @@ static int pcf50633_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
245 ret = pcf50633_write_block(rtc->pcf, PCF50633_REG_RTCSCA, 245 ret = pcf50633_write_block(rtc->pcf, PCF50633_REG_RTCSCA,
246 PCF50633_TI_EXTENT, &pcf_tm.time[0]); 246 PCF50633_TI_EXTENT, &pcf_tm.time[0]);
247 247
248 if (!alarm_masked) 248 if (!alarm_masked || alrm->enabled)
249 pcf50633_irq_unmask(rtc->pcf, PCF50633_IRQ_ALARM); 249 pcf50633_irq_unmask(rtc->pcf, PCF50633_IRQ_ALARM);
250 rtc->alarm_enabled = alrm->enabled;
250 251
251 return ret; 252 return ret;
252} 253}
diff --git a/drivers/rtc/rtc-v3020.c b/drivers/rtc/rtc-v3020.c
index ad164056feb6..423cd5a30b10 100644
--- a/drivers/rtc/rtc-v3020.c
+++ b/drivers/rtc/rtc-v3020.c
@@ -96,7 +96,7 @@ static void v3020_mmio_write_bit(struct v3020 *chip, unsigned char bit)
96 96
97static unsigned char v3020_mmio_read_bit(struct v3020 *chip) 97static unsigned char v3020_mmio_read_bit(struct v3020 *chip)
98{ 98{
99 return readl(chip->ioaddress) & (1 << chip->leftshift); 99 return !!(readl(chip->ioaddress) & (1 << chip->leftshift));
100} 100}
101 101
102static struct v3020_chip_ops v3020_mmio_ops = { 102static struct v3020_chip_ops v3020_mmio_ops = {
diff --git a/drivers/rtc/rtc-vr41xx.c b/drivers/rtc/rtc-vr41xx.c
index 2c839d0d21bd..fadddac1e5a4 100644
--- a/drivers/rtc/rtc-vr41xx.c
+++ b/drivers/rtc/rtc-vr41xx.c
@@ -209,19 +209,18 @@ static int vr41xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
209 209
210static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq) 210static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq)
211{ 211{
212 unsigned long count; 212 u64 count;
213 213
214 if (!is_power_of_2(freq)) 214 if (!is_power_of_2(freq))
215 return -EINVAL; 215 return -EINVAL;
216 count = RTC_FREQUENCY; 216 count = RTC_FREQUENCY;
217 do_div(count, freq); 217 do_div(count, freq);
218 218
219 periodic_count = count;
220
221 spin_lock_irq(&rtc_lock); 219 spin_lock_irq(&rtc_lock);
222 220
223 rtc1_write(RTCL1LREG, count); 221 periodic_count = count;
224 rtc1_write(RTCL1HREG, count >> 16); 222 rtc1_write(RTCL1LREG, periodic_count);
223 rtc1_write(RTCL1HREG, periodic_count >> 16);
225 224
226 spin_unlock_irq(&rtc_lock); 225 spin_unlock_irq(&rtc_lock);
227 226
diff --git a/drivers/s390/char/monreader.c b/drivers/s390/char/monreader.c
index 89ece1c235aa..66e21dd23154 100644
--- a/drivers/s390/char/monreader.c
+++ b/drivers/s390/char/monreader.c
@@ -357,6 +357,7 @@ static int mon_close(struct inode *inode, struct file *filp)
357 atomic_set(&monpriv->msglim_count, 0); 357 atomic_set(&monpriv->msglim_count, 0);
358 monpriv->write_index = 0; 358 monpriv->write_index = 0;
359 monpriv->read_index = 0; 359 monpriv->read_index = 0;
360 dev_set_drvdata(monreader_device, NULL);
360 361
361 for (i = 0; i < MON_MSGLIM; i++) 362 for (i = 0; i < MON_MSGLIM; i++)
362 kfree(monpriv->msg_array[i]); 363 kfree(monpriv->msg_array[i]);
diff --git a/drivers/s390/char/sclp_quiesce.c b/drivers/s390/char/sclp_quiesce.c
index 84c191c1cd62..05909a7df8b3 100644
--- a/drivers/s390/char/sclp_quiesce.c
+++ b/drivers/s390/char/sclp_quiesce.c
@@ -20,9 +20,12 @@
20 20
21#include "sclp.h" 21#include "sclp.h"
22 22
23static void (*old_machine_restart)(char *);
24static void (*old_machine_halt)(void);
25static void (*old_machine_power_off)(void);
26
23/* Shutdown handler. Signal completion of shutdown by loading special PSW. */ 27/* Shutdown handler. Signal completion of shutdown by loading special PSW. */
24static void 28static void do_machine_quiesce(void)
25do_machine_quiesce(void)
26{ 29{
27 psw_t quiesce_psw; 30 psw_t quiesce_psw;
28 31
@@ -33,23 +36,48 @@ do_machine_quiesce(void)
33} 36}
34 37
35/* Handler for quiesce event. Start shutdown procedure. */ 38/* Handler for quiesce event. Start shutdown procedure. */
36static void 39static void sclp_quiesce_handler(struct evbuf_header *evbuf)
37sclp_quiesce_handler(struct evbuf_header *evbuf)
38{ 40{
39 _machine_restart = (void *) do_machine_quiesce; 41 if (_machine_restart != (void *) do_machine_quiesce) {
40 _machine_halt = do_machine_quiesce; 42 old_machine_restart = _machine_restart;
41 _machine_power_off = do_machine_quiesce; 43 old_machine_halt = _machine_halt;
44 old_machine_power_off = _machine_power_off;
45 _machine_restart = (void *) do_machine_quiesce;
46 _machine_halt = do_machine_quiesce;
47 _machine_power_off = do_machine_quiesce;
48 }
42 ctrl_alt_del(); 49 ctrl_alt_del();
43} 50}
44 51
52/* Undo machine restart/halt/power_off modification on resume */
53static void sclp_quiesce_pm_event(struct sclp_register *reg,
54 enum sclp_pm_event sclp_pm_event)
55{
56 switch (sclp_pm_event) {
57 case SCLP_PM_EVENT_RESTORE:
58 if (old_machine_restart) {
59 _machine_restart = old_machine_restart;
60 _machine_halt = old_machine_halt;
61 _machine_power_off = old_machine_power_off;
62 old_machine_restart = NULL;
63 old_machine_halt = NULL;
64 old_machine_power_off = NULL;
65 }
66 break;
67 case SCLP_PM_EVENT_FREEZE:
68 case SCLP_PM_EVENT_THAW:
69 break;
70 }
71}
72
45static struct sclp_register sclp_quiesce_event = { 73static struct sclp_register sclp_quiesce_event = {
46 .receive_mask = EVTYP_SIGQUIESCE_MASK, 74 .receive_mask = EVTYP_SIGQUIESCE_MASK,
47 .receiver_fn = sclp_quiesce_handler 75 .receiver_fn = sclp_quiesce_handler,
76 .pm_event_fn = sclp_quiesce_pm_event
48}; 77};
49 78
50/* Initialize quiesce driver. */ 79/* Initialize quiesce driver. */
51static int __init 80static int __init sclp_quiesce_init(void)
52sclp_quiesce_init(void)
53{ 81{
54 return sclp_register(&sclp_quiesce_event); 82 return sclp_register(&sclp_quiesce_event);
55} 83}
diff --git a/drivers/scsi/bfa/bfad_fwimg.c b/drivers/scsi/bfa/bfad_fwimg.c
index b2f6949bc8d3..bd34b0db2d6b 100644
--- a/drivers/scsi/bfa/bfad_fwimg.c
+++ b/drivers/scsi/bfa/bfad_fwimg.c
@@ -41,6 +41,8 @@ u32 *bfi_image_cb;
41 41
42#define BFAD_FW_FILE_CT "ctfw.bin" 42#define BFAD_FW_FILE_CT "ctfw.bin"
43#define BFAD_FW_FILE_CB "cbfw.bin" 43#define BFAD_FW_FILE_CB "cbfw.bin"
44MODULE_FIRMWARE(BFAD_FW_FILE_CT);
45MODULE_FIRMWARE(BFAD_FW_FILE_CB);
44 46
45u32 * 47u32 *
46bfad_read_firmware(struct pci_dev *pdev, u32 **bfi_image, 48bfad_read_firmware(struct pci_dev *pdev, u32 **bfi_image,
diff --git a/drivers/scsi/bfa/bfad_im.c b/drivers/scsi/bfa/bfad_im.c
index 158c99243c08..55d012a9a668 100644
--- a/drivers/scsi/bfa/bfad_im.c
+++ b/drivers/scsi/bfa/bfad_im.c
@@ -948,7 +948,7 @@ bfad_os_fc_host_init(struct bfad_im_port_s *im_port)
948 if (bfad_supported_fc4s & (BFA_PORT_ROLE_FCP_IM | BFA_PORT_ROLE_FCP_TM)) 948 if (bfad_supported_fc4s & (BFA_PORT_ROLE_FCP_IM | BFA_PORT_ROLE_FCP_TM))
949 /* For FCP type 0x08 */ 949 /* For FCP type 0x08 */
950 fc_host_supported_fc4s(host)[2] = 1; 950 fc_host_supported_fc4s(host)[2] = 1;
951 if (bfad_supported_fc4s | BFA_PORT_ROLE_FCP_IPFC) 951 if (bfad_supported_fc4s & BFA_PORT_ROLE_FCP_IPFC)
952 /* For LLC/SNAP type 0x05 */ 952 /* For LLC/SNAP type 0x05 */
953 fc_host_supported_fc4s(host)[3] = 0x20; 953 fc_host_supported_fc4s(host)[3] = 0x20;
954 /* For fibre channel services type 0x20 */ 954 /* For fibre channel services type 0x20 */
diff --git a/drivers/scsi/gdth.c b/drivers/scsi/gdth.c
index 185e6bc4dd40..9e8fce0f0c1b 100644
--- a/drivers/scsi/gdth.c
+++ b/drivers/scsi/gdth.c
@@ -2900,7 +2900,7 @@ static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
2900 eindex = handle; 2900 eindex = handle;
2901 estr->event_source = 0; 2901 estr->event_source = 0;
2902 2902
2903 if (eindex >= MAX_EVENTS) { 2903 if (eindex < 0 || eindex >= MAX_EVENTS) {
2904 spin_unlock_irqrestore(&ha->smp_lock, flags); 2904 spin_unlock_irqrestore(&ha->smp_lock, flags);
2905 return eindex; 2905 return eindex;
2906 } 2906 }
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 5f045505a1f4..76d294fc7846 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -4189,6 +4189,25 @@ static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
4189} 4189}
4190 4190
4191/** 4191/**
4192 * ipr_isr_eh - Interrupt service routine error handler
4193 * @ioa_cfg: ioa config struct
4194 * @msg: message to log
4195 *
4196 * Return value:
4197 * none
4198 **/
4199static void ipr_isr_eh(struct ipr_ioa_cfg *ioa_cfg, char *msg)
4200{
4201 ioa_cfg->errors_logged++;
4202 dev_err(&ioa_cfg->pdev->dev, "%s\n", msg);
4203
4204 if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
4205 ioa_cfg->sdt_state = GET_DUMP;
4206
4207 ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
4208}
4209
4210/**
4192 * ipr_isr - Interrupt service routine 4211 * ipr_isr - Interrupt service routine
4193 * @irq: irq number 4212 * @irq: irq number
4194 * @devp: pointer to ioa config struct 4213 * @devp: pointer to ioa config struct
@@ -4203,6 +4222,7 @@ static irqreturn_t ipr_isr(int irq, void *devp)
4203 volatile u32 int_reg, int_mask_reg; 4222 volatile u32 int_reg, int_mask_reg;
4204 u32 ioasc; 4223 u32 ioasc;
4205 u16 cmd_index; 4224 u16 cmd_index;
4225 int num_hrrq = 0;
4206 struct ipr_cmnd *ipr_cmd; 4226 struct ipr_cmnd *ipr_cmd;
4207 irqreturn_t rc = IRQ_NONE; 4227 irqreturn_t rc = IRQ_NONE;
4208 4228
@@ -4233,13 +4253,7 @@ static irqreturn_t ipr_isr(int irq, void *devp)
4233 IPR_HRRQ_REQ_RESP_HANDLE_MASK) >> IPR_HRRQ_REQ_RESP_HANDLE_SHIFT; 4253 IPR_HRRQ_REQ_RESP_HANDLE_MASK) >> IPR_HRRQ_REQ_RESP_HANDLE_SHIFT;
4234 4254
4235 if (unlikely(cmd_index >= IPR_NUM_CMD_BLKS)) { 4255 if (unlikely(cmd_index >= IPR_NUM_CMD_BLKS)) {
4236 ioa_cfg->errors_logged++; 4256 ipr_isr_eh(ioa_cfg, "Invalid response handle from IOA");
4237 dev_err(&ioa_cfg->pdev->dev, "Invalid response handle from IOA\n");
4238
4239 if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
4240 ioa_cfg->sdt_state = GET_DUMP;
4241
4242 ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
4243 spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags); 4257 spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
4244 return IRQ_HANDLED; 4258 return IRQ_HANDLED;
4245 } 4259 }
@@ -4266,8 +4280,18 @@ static irqreturn_t ipr_isr(int irq, void *devp)
4266 4280
4267 if (ipr_cmd != NULL) { 4281 if (ipr_cmd != NULL) {
4268 /* Clear the PCI interrupt */ 4282 /* Clear the PCI interrupt */
4269 writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg); 4283 do {
4270 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg; 4284 writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg);
4285 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
4286 } while (int_reg & IPR_PCII_HRRQ_UPDATED &&
4287 num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
4288
4289 if (int_reg & IPR_PCII_HRRQ_UPDATED) {
4290 ipr_isr_eh(ioa_cfg, "Error clearing HRRQ");
4291 spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
4292 return IRQ_HANDLED;
4293 }
4294
4271 } else 4295 } else
4272 break; 4296 break;
4273 } 4297 }
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h
index 163245a1c3e5..19bbcf39f0c9 100644
--- a/drivers/scsi/ipr.h
+++ b/drivers/scsi/ipr.h
@@ -144,6 +144,7 @@
144#define IPR_IOA_MAX_SECTORS 32767 144#define IPR_IOA_MAX_SECTORS 32767
145#define IPR_VSET_MAX_SECTORS 512 145#define IPR_VSET_MAX_SECTORS 512
146#define IPR_MAX_CDB_LEN 16 146#define IPR_MAX_CDB_LEN 16
147#define IPR_MAX_HRRQ_RETRIES 3
147 148
148#define IPR_DEFAULT_BUS_WIDTH 16 149#define IPR_DEFAULT_BUS_WIDTH 16
149#define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8)) 150#define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
diff --git a/drivers/scsi/libsas/sas_expander.c b/drivers/scsi/libsas/sas_expander.c
index b3381959acce..33cf988c8c8a 100644
--- a/drivers/scsi/libsas/sas_expander.c
+++ b/drivers/scsi/libsas/sas_expander.c
@@ -960,7 +960,6 @@ static int sas_ex_discover_dev(struct domain_device *dev, int phy_id)
960 960
961 } 961 }
962 } 962 }
963 res = 0;
964 } 963 }
965 964
966 return res; 965 return res;
diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c
index f7c70e2a8224..0a97bc9074bb 100644
--- a/drivers/scsi/pmcraid.c
+++ b/drivers/scsi/pmcraid.c
@@ -1071,7 +1071,7 @@ static struct pmcraid_cmd *pmcraid_init_hcam
1071 1071
1072 ioarcb->data_transfer_length = cpu_to_le32(rcb_size); 1072 ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
1073 1073
1074 ioadl[0].flags |= cpu_to_le32(IOADL_FLAGS_READ_LAST); 1074 ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
1075 ioadl[0].data_len = cpu_to_le32(rcb_size); 1075 ioadl[0].data_len = cpu_to_le32(rcb_size);
1076 ioadl[0].address = cpu_to_le32(dma); 1076 ioadl[0].address = cpu_to_le32(dma);
1077 1077
@@ -2251,7 +2251,7 @@ static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
2251 2251
2252 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma); 2252 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
2253 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); 2253 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2254 ioadl->flags = cpu_to_le32(IOADL_FLAGS_LAST_DESC); 2254 ioadl->flags = IOADL_FLAGS_LAST_DESC;
2255 2255
2256 /* request sense might be called as part of error response processing 2256 /* request sense might be called as part of error response processing
2257 * which runs in tasklets context. It is possible that mid-layer might 2257 * which runs in tasklets context. It is possible that mid-layer might
@@ -3017,7 +3017,7 @@ static int pmcraid_build_ioadl(
3017 ioadl[i].flags = 0; 3017 ioadl[i].flags = 0;
3018 } 3018 }
3019 /* setup last descriptor */ 3019 /* setup last descriptor */
3020 ioadl[i - 1].flags = cpu_to_le32(IOADL_FLAGS_LAST_DESC); 3020 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
3021 3021
3022 return 0; 3022 return 0;
3023} 3023}
@@ -3387,7 +3387,7 @@ static int pmcraid_build_passthrough_ioadls(
3387 } 3387 }
3388 3388
3389 /* setup the last descriptor */ 3389 /* setup the last descriptor */
3390 ioadl[i - 1].flags = cpu_to_le32(IOADL_FLAGS_LAST_DESC); 3390 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
3391 3391
3392 return 0; 3392 return 0;
3393} 3393}
@@ -5314,7 +5314,7 @@ static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
5314 cpu_to_le32(sizeof(struct pmcraid_config_table)); 5314 cpu_to_le32(sizeof(struct pmcraid_config_table));
5315 5315
5316 ioadl = &(ioarcb->add_data.u.ioadl[0]); 5316 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5317 ioadl->flags = cpu_to_le32(IOADL_FLAGS_LAST_DESC); 5317 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5318 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr); 5318 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
5319 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table)); 5319 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
5320 5320
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c
index a67fed10598a..c6f70dae9b2e 100644
--- a/drivers/scsi/scsi_transport_fc.c
+++ b/drivers/scsi/scsi_transport_fc.c
@@ -3656,6 +3656,7 @@ fc_bsg_host_dispatch(struct request_queue *q, struct Scsi_Host *shost,
3656fail_host_msg: 3656fail_host_msg:
3657 /* return the errno failure code as the only status */ 3657 /* return the errno failure code as the only status */
3658 BUG_ON(job->reply_len < sizeof(uint32_t)); 3658 BUG_ON(job->reply_len < sizeof(uint32_t));
3659 job->reply->reply_payload_rcv_len = 0;
3659 job->reply->result = ret; 3660 job->reply->result = ret;
3660 job->reply_len = sizeof(uint32_t); 3661 job->reply_len = sizeof(uint32_t);
3661 fc_bsg_jobdone(job); 3662 fc_bsg_jobdone(job);
@@ -3741,6 +3742,7 @@ check_bidi:
3741fail_rport_msg: 3742fail_rport_msg:
3742 /* return the errno failure code as the only status */ 3743 /* return the errno failure code as the only status */
3743 BUG_ON(job->reply_len < sizeof(uint32_t)); 3744 BUG_ON(job->reply_len < sizeof(uint32_t));
3745 job->reply->reply_payload_rcv_len = 0;
3744 job->reply->result = ret; 3746 job->reply->result = ret;
3745 job->reply_len = sizeof(uint32_t); 3747 job->reply_len = sizeof(uint32_t);
3746 fc_bsg_jobdone(job); 3748 fc_bsg_jobdone(job);
@@ -3797,6 +3799,7 @@ fc_bsg_request_handler(struct request_queue *q, struct Scsi_Host *shost,
3797 /* check if we have the msgcode value at least */ 3799 /* check if we have the msgcode value at least */
3798 if (job->request_len < sizeof(uint32_t)) { 3800 if (job->request_len < sizeof(uint32_t)) {
3799 BUG_ON(job->reply_len < sizeof(uint32_t)); 3801 BUG_ON(job->reply_len < sizeof(uint32_t));
3802 job->reply->reply_payload_rcv_len = 0;
3800 job->reply->result = -ENOMSG; 3803 job->reply->result = -ENOMSG;
3801 job->reply_len = sizeof(uint32_t); 3804 job->reply_len = sizeof(uint32_t);
3802 fc_bsg_jobdone(job); 3805 fc_bsg_jobdone(job);
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index b1ae774016f1..737b4c960971 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -1089,7 +1089,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1089 if (!up->port.iobase && !up->port.mapbase && !up->port.membase) 1089 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
1090 return; 1090 return;
1091 1091
1092 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ", 1092 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1093 serial_index(&up->port), up->port.iobase, up->port.membase); 1093 serial_index(&up->port), up->port.iobase, up->port.membase);
1094 1094
1095 /* 1095 /*
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index 42e8550cd2b6..b28af13c45a1 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -2383,7 +2383,7 @@ pciserial_init_ports(struct pci_dev *dev, const struct pciserial_board *board)
2383 break; 2383 break;
2384 2384
2385#ifdef SERIAL_DEBUG_PCI 2385#ifdef SERIAL_DEBUG_PCI
2386 printk(KERN_DEBUG "Setup PCI port: port %x, irq %d, type %d\n", 2386 printk(KERN_DEBUG "Setup PCI port: port %lx, irq %d, type %d\n",
2387 serial_port.iobase, serial_port.irq, serial_port.iotype); 2387 serial_port.iobase, serial_port.irq, serial_port.iotype);
2388#endif 2388#endif
2389 2389
@@ -3139,6 +3139,12 @@ static struct pci_device_id serial_pci_tbl[] = {
3139 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_B, 3139 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_B,
3140 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3140 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3141 pbn_b0_bt_2_115200 }, 3141 pbn_b0_bt_2_115200 },
3142 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATTRO_A,
3143 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3144 pbn_b0_bt_2_115200 },
3145 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATTRO_B,
3146 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3147 pbn_b0_bt_2_115200 },
3142 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_A, 3148 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_A,
3143 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3149 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3144 pbn_b0_bt_4_460800 }, 3150 pbn_b0_bt_4_460800 },
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 85119fb7cb50..6498bd1fb6dd 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -1143,7 +1143,7 @@ static void serial_console_write(struct console *co, const char *s,
1143 while ((sci_in(port, SCxSR) & bits) != bits) 1143 while ((sci_in(port, SCxSR) & bits) != bits)
1144 cpu_relax(); 1144 cpu_relax();
1145 1145
1146 if (sci_port->disable); 1146 if (sci_port->disable)
1147 sci_port->disable(port); 1147 sci_port->disable(port);
1148} 1148}
1149 1149
diff --git a/drivers/spi/spi_stmp.c b/drivers/spi/spi_stmp.c
index d871dc23909c..2552bb364005 100644
--- a/drivers/spi/spi_stmp.c
+++ b/drivers/spi/spi_stmp.c
@@ -242,7 +242,7 @@ static int stmp_spi_txrx_dma(struct stmp_spi *ss, int cs,
242 wait_for_completion(&ss->done); 242 wait_for_completion(&ss->done);
243 243
244 if (!busy_wait(readl(ss->regs + HW_SSP_CTRL0) & BM_SSP_CTRL0_RUN)) 244 if (!busy_wait(readl(ss->regs + HW_SSP_CTRL0) & BM_SSP_CTRL0_RUN))
245 status = ETIMEDOUT; 245 status = -ETIMEDOUT;
246 246
247 if (!dma_buf) 247 if (!dma_buf)
248 dma_unmap_single(ss->master_dev, spi_buf_dma, len, dir); 248 dma_unmap_single(ss->master_dev, spi_buf_dma, len, dir);
diff --git a/drivers/ssb/scan.c b/drivers/ssb/scan.c
index b74212d698c7..e8b89e8ac9bd 100644
--- a/drivers/ssb/scan.c
+++ b/drivers/ssb/scan.c
@@ -162,6 +162,8 @@ static u8 chipid_to_nrcores(u16 chipid)
162static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx, 162static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
163 u16 offset) 163 u16 offset)
164{ 164{
165 u32 lo, hi;
166
165 switch (bus->bustype) { 167 switch (bus->bustype) {
166 case SSB_BUSTYPE_SSB: 168 case SSB_BUSTYPE_SSB:
167 offset += current_coreidx * SSB_CORE_SIZE; 169 offset += current_coreidx * SSB_CORE_SIZE;
@@ -174,7 +176,9 @@ static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
174 offset -= 0x800; 176 offset -= 0x800;
175 } else 177 } else
176 ssb_pcmcia_switch_segment(bus, 0); 178 ssb_pcmcia_switch_segment(bus, 0);
177 break; 179 lo = readw(bus->mmio + offset);
180 hi = readw(bus->mmio + offset + 2);
181 return lo | (hi << 16);
178 case SSB_BUSTYPE_SDIO: 182 case SSB_BUSTYPE_SDIO:
179 offset += current_coreidx * SSB_CORE_SIZE; 183 offset += current_coreidx * SSB_CORE_SIZE;
180 return ssb_sdio_scan_read32(bus, offset); 184 return ssb_sdio_scan_read32(bus, offset);
diff --git a/drivers/thermal/thermal_sys.c b/drivers/thermal/thermal_sys.c
index 4e83c297ec9e..6f8d8f971212 100644
--- a/drivers/thermal/thermal_sys.c
+++ b/drivers/thermal/thermal_sys.c
@@ -180,15 +180,15 @@ trip_point_type_show(struct device *dev, struct device_attribute *attr,
180 180
181 switch (type) { 181 switch (type) {
182 case THERMAL_TRIP_CRITICAL: 182 case THERMAL_TRIP_CRITICAL:
183 return sprintf(buf, "critical"); 183 return sprintf(buf, "critical\n");
184 case THERMAL_TRIP_HOT: 184 case THERMAL_TRIP_HOT:
185 return sprintf(buf, "hot"); 185 return sprintf(buf, "hot\n");
186 case THERMAL_TRIP_PASSIVE: 186 case THERMAL_TRIP_PASSIVE:
187 return sprintf(buf, "passive"); 187 return sprintf(buf, "passive\n");
188 case THERMAL_TRIP_ACTIVE: 188 case THERMAL_TRIP_ACTIVE:
189 return sprintf(buf, "active"); 189 return sprintf(buf, "active\n");
190 default: 190 default:
191 return sprintf(buf, "unknown"); 191 return sprintf(buf, "unknown\n");
192 } 192 }
193} 193}
194 194
diff --git a/drivers/uio/uio_pdrv_genirq.c b/drivers/uio/uio_pdrv_genirq.c
index 02347c57357d..aa53db9f2e88 100644
--- a/drivers/uio/uio_pdrv_genirq.c
+++ b/drivers/uio/uio_pdrv_genirq.c
@@ -178,6 +178,7 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev)
178 return 0; 178 return 0;
179 bad1: 179 bad1:
180 kfree(priv); 180 kfree(priv);
181 pm_runtime_disable(&pdev->dev);
181 bad0: 182 bad0:
182 return ret; 183 return ret;
183} 184}
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index e3861b21e776..e4eca7810bcf 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -609,9 +609,9 @@ static int acm_tty_open(struct tty_struct *tty, struct file *filp)
609 609
610 acm->throttle = 0; 610 acm->throttle = 0;
611 611
612 tasklet_schedule(&acm->urb_task);
613 set_bit(ASYNCB_INITIALIZED, &acm->port.flags); 612 set_bit(ASYNCB_INITIALIZED, &acm->port.flags);
614 rv = tty_port_block_til_ready(&acm->port, tty, filp); 613 rv = tty_port_block_til_ready(&acm->port, tty, filp);
614 tasklet_schedule(&acm->urb_task);
615done: 615done:
616 mutex_unlock(&acm->mutex); 616 mutex_unlock(&acm->mutex);
617err_out: 617err_out:
@@ -686,15 +686,21 @@ static void acm_tty_close(struct tty_struct *tty, struct file *filp)
686 686
687 /* Perform the closing process and see if we need to do the hardware 687 /* Perform the closing process and see if we need to do the hardware
688 shutdown */ 688 shutdown */
689 if (!acm || tty_port_close_start(&acm->port, tty, filp) == 0) 689 if (!acm)
690 return;
691 if (tty_port_close_start(&acm->port, tty, filp) == 0) {
692 mutex_lock(&open_mutex);
693 if (!acm->dev) {
694 tty_port_tty_set(&acm->port, NULL);
695 acm_tty_unregister(acm);
696 tty->driver_data = NULL;
697 }
698 mutex_unlock(&open_mutex);
690 return; 699 return;
700 }
691 acm_port_down(acm, 0); 701 acm_port_down(acm, 0);
692 tty_port_close_end(&acm->port, tty); 702 tty_port_close_end(&acm->port, tty);
693 mutex_lock(&open_mutex);
694 tty_port_tty_set(&acm->port, NULL); 703 tty_port_tty_set(&acm->port, NULL);
695 if (!acm->dev)
696 acm_tty_unregister(acm);
697 mutex_unlock(&open_mutex);
698} 704}
699 705
700static int acm_tty_write(struct tty_struct *tty, 706static int acm_tty_write(struct tty_struct *tty,
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 78bb7710f36d..24eb74781919 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -87,6 +87,7 @@ static int ohci_restart (struct ohci_hcd *ohci);
87#ifdef CONFIG_PCI 87#ifdef CONFIG_PCI
88static void quirk_amd_pll(int state); 88static void quirk_amd_pll(int state);
89static void amd_iso_dev_put(void); 89static void amd_iso_dev_put(void);
90static void sb800_prefetch(struct ohci_hcd *ohci, int on);
90#else 91#else
91static inline void quirk_amd_pll(int state) 92static inline void quirk_amd_pll(int state)
92{ 93{
@@ -96,6 +97,10 @@ static inline void amd_iso_dev_put(void)
96{ 97{
97 return; 98 return;
98} 99}
100static inline void sb800_prefetch(struct ohci_hcd *ohci, int on)
101{
102 return;
103}
99#endif 104#endif
100 105
101 106
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c
index d2ba04dd785e..b8a1148f248e 100644
--- a/drivers/usb/host/ohci-pci.c
+++ b/drivers/usb/host/ohci-pci.c
@@ -177,6 +177,13 @@ static int ohci_quirk_amd700(struct usb_hcd *hcd)
177 return 0; 177 return 0;
178 178
179 pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev); 179 pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev);
180
181 /* SB800 needs pre-fetch fix */
182 if ((rev >= 0x40) && (rev <= 0x4f)) {
183 ohci->flags |= OHCI_QUIRK_AMD_PREFETCH;
184 ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
185 }
186
180 if ((rev > 0x3b) || (rev < 0x30)) { 187 if ((rev > 0x3b) || (rev < 0x30)) {
181 pci_dev_put(amd_smbus_dev); 188 pci_dev_put(amd_smbus_dev);
182 amd_smbus_dev = NULL; 189 amd_smbus_dev = NULL;
@@ -262,6 +269,19 @@ static void amd_iso_dev_put(void)
262 269
263} 270}
264 271
272static void sb800_prefetch(struct ohci_hcd *ohci, int on)
273{
274 struct pci_dev *pdev;
275 u16 misc;
276
277 pdev = to_pci_dev(ohci_to_hcd(ohci)->self.controller);
278 pci_read_config_word(pdev, 0x50, &misc);
279 if (on == 0)
280 pci_write_config_word(pdev, 0x50, misc & 0xfcff);
281 else
282 pci_write_config_word(pdev, 0x50, misc | 0x0300);
283}
284
265/* List of quirks for OHCI */ 285/* List of quirks for OHCI */
266static const struct pci_device_id ohci_pci_quirks[] = { 286static const struct pci_device_id ohci_pci_quirks[] = {
267 { 287 {
diff --git a/drivers/usb/host/ohci-q.c b/drivers/usb/host/ohci-q.c
index 16fecb8ecc39..35288bcae0db 100644
--- a/drivers/usb/host/ohci-q.c
+++ b/drivers/usb/host/ohci-q.c
@@ -49,9 +49,12 @@ __acquires(ohci->lock)
49 switch (usb_pipetype (urb->pipe)) { 49 switch (usb_pipetype (urb->pipe)) {
50 case PIPE_ISOCHRONOUS: 50 case PIPE_ISOCHRONOUS:
51 ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs--; 51 ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs--;
52 if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0 52 if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0) {
53 && quirk_amdiso(ohci)) 53 if (quirk_amdiso(ohci))
54 quirk_amd_pll(1); 54 quirk_amd_pll(1);
55 if (quirk_amdprefetch(ohci))
56 sb800_prefetch(ohci, 0);
57 }
55 break; 58 break;
56 case PIPE_INTERRUPT: 59 case PIPE_INTERRUPT:
57 ohci_to_hcd(ohci)->self.bandwidth_int_reqs--; 60 ohci_to_hcd(ohci)->self.bandwidth_int_reqs--;
@@ -680,9 +683,12 @@ static void td_submit_urb (
680 data + urb->iso_frame_desc [cnt].offset, 683 data + urb->iso_frame_desc [cnt].offset,
681 urb->iso_frame_desc [cnt].length, urb, cnt); 684 urb->iso_frame_desc [cnt].length, urb, cnt);
682 } 685 }
683 if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0 686 if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0) {
684 && quirk_amdiso(ohci)) 687 if (quirk_amdiso(ohci))
685 quirk_amd_pll(0); 688 quirk_amd_pll(0);
689 if (quirk_amdprefetch(ohci))
690 sb800_prefetch(ohci, 1);
691 }
686 periodic = ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs++ == 0 692 periodic = ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs++ == 0
687 && ohci_to_hcd(ohci)->self.bandwidth_int_reqs == 0; 693 && ohci_to_hcd(ohci)->self.bandwidth_int_reqs == 0;
688 break; 694 break;
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index 222011f6172c..5bf15fed0d9f 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -402,6 +402,7 @@ struct ohci_hcd {
402#define OHCI_QUIRK_FRAME_NO 0x80 /* no big endian frame_no shift */ 402#define OHCI_QUIRK_FRAME_NO 0x80 /* no big endian frame_no shift */
403#define OHCI_QUIRK_HUB_POWER 0x100 /* distrust firmware power/oc setup */ 403#define OHCI_QUIRK_HUB_POWER 0x100 /* distrust firmware power/oc setup */
404#define OHCI_QUIRK_AMD_ISO 0x200 /* ISO transfers*/ 404#define OHCI_QUIRK_AMD_ISO 0x200 /* ISO transfers*/
405#define OHCI_QUIRK_AMD_PREFETCH 0x400 /* pre-fetch for ISO transfer */
405 // there are also chip quirks/bugs in init logic 406 // there are also chip quirks/bugs in init logic
406 407
407 struct work_struct nec_work; /* Worker for NEC quirk */ 408 struct work_struct nec_work; /* Worker for NEC quirk */
@@ -433,6 +434,10 @@ static inline int quirk_amdiso(struct ohci_hcd *ohci)
433{ 434{
434 return ohci->flags & OHCI_QUIRK_AMD_ISO; 435 return ohci->flags & OHCI_QUIRK_AMD_ISO;
435} 436}
437static inline int quirk_amdprefetch(struct ohci_hcd *ohci)
438{
439 return ohci->flags & OHCI_QUIRK_AMD_PREFETCH;
440}
436#else 441#else
437static inline int quirk_nec(struct ohci_hcd *ohci) 442static inline int quirk_nec(struct ohci_hcd *ohci)
438{ 443{
@@ -446,6 +451,10 @@ static inline int quirk_amdiso(struct ohci_hcd *ohci)
446{ 451{
447 return 0; 452 return 0;
448} 453}
454static inline int quirk_amdprefetch(struct ohci_hcd *ohci)
455{
456 return 0;
457}
449#endif 458#endif
450 459
451/* convert between an hcd pointer and the corresponding ohci_hcd */ 460/* convert between an hcd pointer and the corresponding ohci_hcd */
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 1db4fea8c170..b8fd270a8b0d 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -802,9 +802,11 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
802 int i; 802 int i;
803 803
804 /* Free the Event Ring Segment Table and the actual Event Ring */ 804 /* Free the Event Ring Segment Table and the actual Event Ring */
805 xhci_writel(xhci, 0, &xhci->ir_set->erst_size); 805 if (xhci->ir_set) {
806 xhci_write_64(xhci, 0, &xhci->ir_set->erst_base); 806 xhci_writel(xhci, 0, &xhci->ir_set->erst_size);
807 xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue); 807 xhci_write_64(xhci, 0, &xhci->ir_set->erst_base);
808 xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue);
809 }
808 size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries); 810 size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);
809 if (xhci->erst.entries) 811 if (xhci->erst.entries)
810 pci_free_consistent(pdev, size, 812 pci_free_consistent(pdev, size,
@@ -841,9 +843,9 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
841 xhci->dcbaa, xhci->dcbaa->dma); 843 xhci->dcbaa, xhci->dcbaa->dma);
842 xhci->dcbaa = NULL; 844 xhci->dcbaa = NULL;
843 845
846 scratchpad_free(xhci);
844 xhci->page_size = 0; 847 xhci->page_size = 0;
845 xhci->page_shift = 0; 848 xhci->page_shift = 0;
846 scratchpad_free(xhci);
847} 849}
848 850
849int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 851int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 173c39c76489..821b7b4709de 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -864,9 +864,11 @@ static struct xhci_segment *trb_in_td(
864 cur_seg = start_seg; 864 cur_seg = start_seg;
865 865
866 do { 866 do {
867 if (start_dma == 0)
868 return 0;
867 /* We may get an event for a Link TRB in the middle of a TD */ 869 /* We may get an event for a Link TRB in the middle of a TD */
868 end_seg_dma = xhci_trb_virt_to_dma(cur_seg, 870 end_seg_dma = xhci_trb_virt_to_dma(cur_seg,
869 &start_seg->trbs[TRBS_PER_SEGMENT - 1]); 871 &cur_seg->trbs[TRBS_PER_SEGMENT - 1]);
870 /* If the end TRB isn't in this segment, this is set to 0 */ 872 /* If the end TRB isn't in this segment, this is set to 0 */
871 end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb); 873 end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb);
872 874
@@ -893,8 +895,9 @@ static struct xhci_segment *trb_in_td(
893 } 895 }
894 cur_seg = cur_seg->next; 896 cur_seg = cur_seg->next;
895 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]); 897 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]);
896 } while (1); 898 } while (cur_seg != start_seg);
897 899
900 return 0;
898} 901}
899 902
900/* 903/*
diff --git a/drivers/usb/mon/mon_bin.c b/drivers/usb/mon/mon_bin.c
index 9ed3e741bee1..10f3205798e8 100644
--- a/drivers/usb/mon/mon_bin.c
+++ b/drivers/usb/mon/mon_bin.c
@@ -348,12 +348,12 @@ static unsigned int mon_buff_area_alloc_contiguous(struct mon_reader_bin *rp,
348 348
349/* 349/*
350 * Return a few (kilo-)bytes to the head of the buffer. 350 * Return a few (kilo-)bytes to the head of the buffer.
351 * This is used if a DMA fetch fails. 351 * This is used if a data fetch fails.
352 */ 352 */
353static void mon_buff_area_shrink(struct mon_reader_bin *rp, unsigned int size) 353static void mon_buff_area_shrink(struct mon_reader_bin *rp, unsigned int size)
354{ 354{
355 355
356 size = (size + PKT_ALIGN-1) & ~(PKT_ALIGN-1); 356 /* size &= ~(PKT_ALIGN-1); -- we're called with aligned size */
357 rp->b_cnt -= size; 357 rp->b_cnt -= size;
358 if (rp->b_in < size) 358 if (rp->b_in < size)
359 rp->b_in += rp->b_size; 359 rp->b_in += rp->b_size;
@@ -433,6 +433,7 @@ static void mon_bin_event(struct mon_reader_bin *rp, struct urb *urb,
433 unsigned int urb_length; 433 unsigned int urb_length;
434 unsigned int offset; 434 unsigned int offset;
435 unsigned int length; 435 unsigned int length;
436 unsigned int delta;
436 unsigned int ndesc, lendesc; 437 unsigned int ndesc, lendesc;
437 unsigned char dir; 438 unsigned char dir;
438 struct mon_bin_hdr *ep; 439 struct mon_bin_hdr *ep;
@@ -537,8 +538,10 @@ static void mon_bin_event(struct mon_reader_bin *rp, struct urb *urb,
537 if (length != 0) { 538 if (length != 0) {
538 ep->flag_data = mon_bin_get_data(rp, offset, urb, length); 539 ep->flag_data = mon_bin_get_data(rp, offset, urb, length);
539 if (ep->flag_data != 0) { /* Yes, it's 0x00, not '0' */ 540 if (ep->flag_data != 0) { /* Yes, it's 0x00, not '0' */
540 ep->len_cap = 0; 541 delta = (ep->len_cap + PKT_ALIGN-1) & ~(PKT_ALIGN-1);
541 mon_buff_area_shrink(rp, length); 542 ep->len_cap -= length;
543 delta -= (ep->len_cap + PKT_ALIGN-1) & ~(PKT_ALIGN-1);
544 mon_buff_area_shrink(rp, delta);
542 } 545 }
543 } else { 546 } else {
544 ep->flag_data = data_tag; 547 ep->flag_data = data_tag;
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index 698252a4dc5d..bd254ec97d14 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -50,6 +50,8 @@ static int cp210x_tiocmset_port(struct usb_serial_port *port, struct file *,
50static void cp210x_break_ctl(struct tty_struct *, int); 50static void cp210x_break_ctl(struct tty_struct *, int);
51static int cp210x_startup(struct usb_serial *); 51static int cp210x_startup(struct usb_serial *);
52static void cp210x_disconnect(struct usb_serial *); 52static void cp210x_disconnect(struct usb_serial *);
53static void cp210x_dtr_rts(struct usb_serial_port *p, int on);
54static int cp210x_carrier_raised(struct usb_serial_port *p);
53 55
54static int debug; 56static int debug;
55 57
@@ -143,6 +145,8 @@ static struct usb_serial_driver cp210x_device = {
143 .tiocmset = cp210x_tiocmset, 145 .tiocmset = cp210x_tiocmset,
144 .attach = cp210x_startup, 146 .attach = cp210x_startup,
145 .disconnect = cp210x_disconnect, 147 .disconnect = cp210x_disconnect,
148 .dtr_rts = cp210x_dtr_rts,
149 .carrier_raised = cp210x_carrier_raised
146}; 150};
147 151
148/* Config request types */ 152/* Config request types */
@@ -746,6 +750,14 @@ static int cp210x_tiocmset_port(struct usb_serial_port *port, struct file *file,
746 return cp210x_set_config(port, CP210X_SET_MHS, &control, 2); 750 return cp210x_set_config(port, CP210X_SET_MHS, &control, 2);
747} 751}
748 752
753static void cp210x_dtr_rts(struct usb_serial_port *p, int on)
754{
755 if (on)
756 cp210x_tiocmset_port(p, NULL, TIOCM_DTR|TIOCM_RTS, 0);
757 else
758 cp210x_tiocmset_port(p, NULL, 0, TIOCM_DTR|TIOCM_RTS);
759}
760
749static int cp210x_tiocmget (struct tty_struct *tty, struct file *file) 761static int cp210x_tiocmget (struct tty_struct *tty, struct file *file)
750{ 762{
751 struct usb_serial_port *port = tty->driver_data; 763 struct usb_serial_port *port = tty->driver_data;
@@ -768,6 +780,15 @@ static int cp210x_tiocmget (struct tty_struct *tty, struct file *file)
768 return result; 780 return result;
769} 781}
770 782
783static int cp210x_carrier_raised(struct usb_serial_port *p)
784{
785 unsigned int control;
786 cp210x_get_config(p, CP210X_GET_MDMSTS, &control, 1);
787 if (control & CONTROL_DCD)
788 return 1;
789 return 0;
790}
791
771static void cp210x_break_ctl (struct tty_struct *tty, int break_state) 792static void cp210x_break_ctl (struct tty_struct *tty, int break_state)
772{ 793{
773 struct usb_serial_port *port = tty->driver_data; 794 struct usb_serial_port *port = tty->driver_data;
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index cd44c68954df..319aaf9725b3 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -308,6 +308,7 @@ static int option_resume(struct usb_serial *serial);
308 308
309#define DLINK_VENDOR_ID 0x1186 309#define DLINK_VENDOR_ID 0x1186
310#define DLINK_PRODUCT_DWM_652 0x3e04 310#define DLINK_PRODUCT_DWM_652 0x3e04
311#define DLINK_PRODUCT_DWM_652_U5 0xce16
311 312
312#define QISDA_VENDOR_ID 0x1da5 313#define QISDA_VENDOR_ID 0x1da5
313#define QISDA_PRODUCT_H21_4512 0x4512 314#define QISDA_PRODUCT_H21_4512 0x4512
@@ -586,6 +587,7 @@ static struct usb_device_id option_ids[] = {
586 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC2726, 0xff, 0xff, 0xff) }, 587 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC2726, 0xff, 0xff, 0xff) },
587 { USB_DEVICE(BENQ_VENDOR_ID, BENQ_PRODUCT_H10) }, 588 { USB_DEVICE(BENQ_VENDOR_ID, BENQ_PRODUCT_H10) },
588 { USB_DEVICE(DLINK_VENDOR_ID, DLINK_PRODUCT_DWM_652) }, 589 { USB_DEVICE(DLINK_VENDOR_ID, DLINK_PRODUCT_DWM_652) },
590 { USB_DEVICE(ALINK_VENDOR_ID, DLINK_PRODUCT_DWM_652_U5) }, /* Yes, ALINK_VENDOR_ID */
589 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4512) }, 591 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4512) },
590 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4523) }, 592 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4523) },
591 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4515) }, 593 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4515) },
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 9bbb2855ea91..188e1ba3b69f 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -2121,7 +2121,7 @@ config FB_EP93XX
2121 2121
2122config FB_PRE_INIT_FB 2122config FB_PRE_INIT_FB
2123 bool "Don't reinitialize, use bootloader's GDC/Display configuration" 2123 bool "Don't reinitialize, use bootloader's GDC/Display configuration"
2124 depends on FB_MB862XX_LIME 2124 depends on FB && FB_MB862XX_LIME
2125 ---help--- 2125 ---help---
2126 Select this option if display contents should be inherited as set by 2126 Select this option if display contents should be inherited as set by
2127 the bootloader. 2127 the bootloader.
diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c
index 8cd279be74e5..37624f74e88b 100644
--- a/drivers/video/atafb.c
+++ b/drivers/video/atafb.c
@@ -329,12 +329,6 @@ extern unsigned char fontdata_8x16[];
329 * 329 *
330 * * perform fb specific mmap * 330 * * perform fb specific mmap *
331 * int (*fb_mmap)(struct fb_info *info, struct vm_area_struct *vma); 331 * int (*fb_mmap)(struct fb_info *info, struct vm_area_struct *vma);
332 *
333 * * save current hardware state *
334 * void (*fb_save_state)(struct fb_info *info);
335 *
336 * * restore saved state *
337 * void (*fb_restore_state)(struct fb_info *info);
338 * } ; 332 * } ;
339 */ 333 */
340 334
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
index 2830ffd72976..d5e801076d33 100644
--- a/drivers/video/atmel_lcdfb.c
+++ b/drivers/video/atmel_lcdfb.c
@@ -484,6 +484,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
484 unsigned long value; 484 unsigned long value;
485 unsigned long clk_value_khz; 485 unsigned long clk_value_khz;
486 unsigned long bits_per_line; 486 unsigned long bits_per_line;
487 unsigned long pix_factor = 2;
487 488
488 might_sleep(); 489 might_sleep();
489 490
@@ -516,20 +517,24 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
516 /* Now, the LCDC core... */ 517 /* Now, the LCDC core... */
517 518
518 /* Set pixel clock */ 519 /* Set pixel clock */
520 if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
521 pix_factor = 1;
522
519 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; 523 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
520 524
521 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); 525 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
522 526
523 if (value < 2) { 527 if (value < pix_factor) {
524 dev_notice(info->device, "Bypassing pixel clock divider\n"); 528 dev_notice(info->device, "Bypassing pixel clock divider\n");
525 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); 529 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
526 } else { 530 } else {
527 value = (value / 2) - 1; 531 value = (value / pix_factor) - 1;
528 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", 532 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
529 value); 533 value);
530 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, 534 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
531 value << ATMEL_LCDC_CLKVAL_OFFSET); 535 value << ATMEL_LCDC_CLKVAL_OFFSET);
532 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1))); 536 info->var.pixclock =
537 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
533 dev_dbg(info->device, " updated pixclk: %lu KHz\n", 538 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
534 PICOS2KHZ(info->var.pixclock)); 539 PICOS2KHZ(info->var.pixclock));
535 } 540 }
diff --git a/drivers/video/backlight/corgi_lcd.c b/drivers/video/backlight/corgi_lcd.c
index 2211a852af9c..96774949cd30 100644
--- a/drivers/video/backlight/corgi_lcd.c
+++ b/drivers/video/backlight/corgi_lcd.c
@@ -433,8 +433,9 @@ static int corgi_bl_update_status(struct backlight_device *bd)
433 433
434 if (corgibl_flags & CORGIBL_SUSPENDED) 434 if (corgibl_flags & CORGIBL_SUSPENDED)
435 intensity = 0; 435 intensity = 0;
436 if (corgibl_flags & CORGIBL_BATTLOW) 436
437 intensity &= lcd->limit_mask; 437 if ((corgibl_flags & CORGIBL_BATTLOW) && intensity > lcd->limit_mask)
438 intensity = lcd->limit_mask;
438 439
439 return corgi_bl_set_intensity(lcd, intensity); 440 return corgi_bl_set_intensity(lcd, intensity);
440} 441}
diff --git a/drivers/video/backlight/lcd.c b/drivers/video/backlight/lcd.c
index b6449470106c..a482dd7b0311 100644
--- a/drivers/video/backlight/lcd.c
+++ b/drivers/video/backlight/lcd.c
@@ -56,7 +56,7 @@ static int fb_notifier_callback(struct notifier_block *self,
56 56
57static int lcd_register_fb(struct lcd_device *ld) 57static int lcd_register_fb(struct lcd_device *ld)
58{ 58{
59 memset(&ld->fb_notif, 0, sizeof(&ld->fb_notif)); 59 memset(&ld->fb_notif, 0, sizeof(ld->fb_notif));
60 ld->fb_notif.notifier_call = fb_notifier_callback; 60 ld->fb_notif.notifier_call = fb_notifier_callback;
61 return fb_register_client(&ld->fb_notif); 61 return fb_register_client(&ld->fb_notif);
62} 62}
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c
index 5a686cea23f4..3681c6a88212 100644
--- a/drivers/video/console/fbcon.c
+++ b/drivers/video/console/fbcon.c
@@ -2311,14 +2311,11 @@ static int fbcon_blank(struct vc_data *vc, int blank, int mode_switch)
2311 ops->graphics = 1; 2311 ops->graphics = 1;
2312 2312
2313 if (!blank) { 2313 if (!blank) {
2314 if (info->fbops->fb_save_state)
2315 info->fbops->fb_save_state(info);
2316 var.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE; 2314 var.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE;
2317 fb_set_var(info, &var); 2315 fb_set_var(info, &var);
2318 ops->graphics = 0; 2316 ops->graphics = 0;
2319 ops->var = info->var; 2317 ops->var = info->var;
2320 } else if (info->fbops->fb_restore_state) 2318 }
2321 info->fbops->fb_restore_state(info);
2322 } 2319 }
2323 2320
2324 if (!fbcon_is_inactive(vc, info)) { 2321 if (!fbcon_is_inactive(vc, info)) {
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index d065894ce38f..035d56835b75 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -704,7 +704,7 @@ static int __init fb_probe(struct platform_device *device)
704 704
705 if (i == ARRAY_SIZE(known_lcd_panels)) { 705 if (i == ARRAY_SIZE(known_lcd_panels)) {
706 dev_err(&device->dev, "GLCD: No valid panel found\n"); 706 dev_err(&device->dev, "GLCD: No valid panel found\n");
707 ret = ENODEV; 707 ret = -ENODEV;
708 goto err_clk_disable; 708 goto err_clk_disable;
709 } else 709 } else
710 dev_info(&device->dev, "GLCD: Found %s panel\n", 710 dev_info(&device->dev, "GLCD: Found %s panel\n",
diff --git a/drivers/video/msm/mddi.c b/drivers/video/msm/mddi.c
index 5c5a1ad1d397..474421fe79a6 100644
--- a/drivers/video/msm/mddi.c
+++ b/drivers/video/msm/mddi.c
@@ -24,6 +24,7 @@
24#include <linux/spinlock.h> 24#include <linux/spinlock.h>
25#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/sched.h>
27#include <mach/msm_iomap.h> 28#include <mach/msm_iomap.h>
28#include <mach/irqs.h> 29#include <mach/irqs.h>
29#include <mach/board.h> 30#include <mach/board.h>
diff --git a/drivers/video/msm/mddi_client_nt35399.c b/drivers/video/msm/mddi_client_nt35399.c
index 9c78050ac799..c9e9349451cb 100644
--- a/drivers/video/msm/mddi_client_nt35399.c
+++ b/drivers/video/msm/mddi_client_nt35399.c
@@ -19,6 +19,7 @@
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/sched.h>
22#include <linux/gpio.h> 23#include <linux/gpio.h>
23#include <mach/msm_fb.h> 24#include <mach/msm_fb.h>
24 25
diff --git a/drivers/video/msm/mddi_client_toshiba.c b/drivers/video/msm/mddi_client_toshiba.c
index 80d0f5fdf0b1..71048e78f7f0 100644
--- a/drivers/video/msm/mddi_client_toshiba.c
+++ b/drivers/video/msm/mddi_client_toshiba.c
@@ -20,6 +20,7 @@
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <linux/sched.h>
23#include <mach/msm_fb.h> 24#include <mach/msm_fb.h>
24 25
25 26
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c
index 99636a2b20f2..6c519e2fa2b7 100644
--- a/drivers/video/msm/mdp.c
+++ b/drivers/video/msm/mdp.c
@@ -22,9 +22,6 @@
22#include <linux/wait.h> 22#include <linux/wait.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/file.h> 24#include <linux/file.h>
25#ifdef CONFIG_ANDROID_PMEM
26#include <linux/android_pmem.h>
27#endif
28#include <linux/major.h> 25#include <linux/major.h>
29 26
30#include <mach/msm_iomap.h> 27#include <mach/msm_iomap.h>
@@ -262,11 +259,6 @@ int get_img(struct mdp_img *img, struct fb_info *info,
262 struct file *file; 259 struct file *file;
263 unsigned long vstart; 260 unsigned long vstart;
264 261
265#ifdef CONFIG_ANDROID_PMEM
266 if (!get_pmem_file(img->memory_id, start, &vstart, len, filep))
267 return 0;
268#endif
269
270 file = fget_light(img->memory_id, &put_needed); 262 file = fget_light(img->memory_id, &put_needed);
271 if (file == NULL) 263 if (file == NULL)
272 return -1; 264 return -1;
@@ -283,12 +275,6 @@ int get_img(struct mdp_img *img, struct fb_info *info,
283 275
284void put_img(struct file *src_file, struct file *dst_file) 276void put_img(struct file *src_file, struct file *dst_file)
285{ 277{
286#ifdef CONFIG_ANDROID_PMEM
287 if (src_file)
288 put_pmem_file(src_file);
289 if (dst_file)
290 put_pmem_file(dst_file);
291#endif
292} 278}
293 279
294int mdp_blit(struct mdp_device *mdp_dev, struct fb_info *fb, 280int mdp_blit(struct mdp_device *mdp_dev, struct fb_info *fb,
@@ -320,9 +306,6 @@ int mdp_blit(struct mdp_device *mdp_dev, struct fb_info *fb,
320 if (unlikely(get_img(&req->dst, fb, &dst_start, &dst_len, &dst_file))) { 306 if (unlikely(get_img(&req->dst, fb, &dst_start, &dst_len, &dst_file))) {
321 printk(KERN_ERR "mpd_ppp: could not retrieve dst image from " 307 printk(KERN_ERR "mpd_ppp: could not retrieve dst image from "
322 "memory\n"); 308 "memory\n");
323#ifdef CONFIG_ANDROID_PMEM
324 put_pmem_file(src_file);
325#endif
326 return -EINVAL; 309 return -EINVAL;
327 } 310 }
328 mutex_lock(&mdp_mutex); 311 mutex_lock(&mdp_mutex);
@@ -499,7 +482,6 @@ int mdp_probe(struct platform_device *pdev)
499 /* register mdp device */ 482 /* register mdp device */
500 mdp->mdp_dev.dev.parent = &pdev->dev; 483 mdp->mdp_dev.dev.parent = &pdev->dev;
501 mdp->mdp_dev.dev.class = mdp_class; 484 mdp->mdp_dev.dev.class = mdp_class;
502 snprintf(mdp->mdp_dev.dev.bus_id, BUS_ID_SIZE, "mdp%d", pdev->id);
503 485
504 /* if you can remove the platform device you'd have to implement 486 /* if you can remove the platform device you'd have to implement
505 * this: 487 * this:
diff --git a/drivers/video/msm/mdp_ppp.c b/drivers/video/msm/mdp_ppp.c
index ba2c4673b648..4ff001f4cbbd 100644
--- a/drivers/video/msm/mdp_ppp.c
+++ b/drivers/video/msm/mdp_ppp.c
@@ -16,7 +16,6 @@
16#include <linux/file.h> 16#include <linux/file.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/msm_mdp.h> 18#include <linux/msm_mdp.h>
19#include <linux/android_pmem.h>
20#include <mach/msm_fb.h> 19#include <mach/msm_fb.h>
21 20
22#include "mdp_hw.h" 21#include "mdp_hw.h"
@@ -579,25 +578,6 @@ static int valid_src_dst(unsigned long src_start, unsigned long src_len,
579static void flush_imgs(struct mdp_blit_req *req, struct mdp_regs *regs, 578static void flush_imgs(struct mdp_blit_req *req, struct mdp_regs *regs,
580 struct file *src_file, struct file *dst_file) 579 struct file *src_file, struct file *dst_file)
581{ 580{
582#ifdef CONFIG_ANDROID_PMEM
583 uint32_t src0_len, src1_len, dst0_len, dst1_len;
584
585 /* flush src images to memory before dma to mdp */
586 get_len(&req->src, &req->src_rect, regs->src_bpp, &src0_len,
587 &src1_len);
588 flush_pmem_file(src_file, req->src.offset, src0_len);
589 if (IS_PSEUDOPLNR(req->src.format))
590 flush_pmem_file(src_file, req->src.offset + src0_len,
591 src1_len);
592
593 /* flush dst images */
594 get_len(&req->dst, &req->dst_rect, regs->dst_bpp, &dst0_len,
595 &dst1_len);
596 flush_pmem_file(dst_file, req->dst.offset, dst0_len);
597 if (IS_PSEUDOPLNR(req->dst.format))
598 flush_pmem_file(dst_file, req->dst.offset + dst0_len,
599 dst1_len);
600#endif
601} 581}
602 582
603static void get_chroma_addr(struct mdp_img *img, struct mdp_rect *rect, 583static void get_chroma_addr(struct mdp_img *img, struct mdp_rect *rect,
diff --git a/drivers/video/savage/savagefb_driver.c b/drivers/video/savage/savagefb_driver.c
index 37b135d5d12e..842d157e1025 100644
--- a/drivers/video/savage/savagefb_driver.c
+++ b/drivers/video/savage/savagefb_driver.c
@@ -1565,7 +1565,7 @@ static int savagefb_blank(int blank, struct fb_info *info)
1565 vga_out8(0x3c5, sr8, par); 1565 vga_out8(0x3c5, sr8, par);
1566 vga_out8(0x3c4, 0x0d, par); 1566 vga_out8(0x3c4, 0x0d, par);
1567 srd = vga_in8(0x3c5, par); 1567 srd = vga_in8(0x3c5, par);
1568 srd &= 0x03; 1568 srd &= 0x50;
1569 1569
1570 switch (blank) { 1570 switch (blank) {
1571 case FB_BLANK_UNBLANK: 1571 case FB_BLANK_UNBLANK:
@@ -1606,22 +1606,6 @@ static int savagefb_blank(int blank, struct fb_info *info)
1606 return (blank == FB_BLANK_NORMAL) ? 1 : 0; 1606 return (blank == FB_BLANK_NORMAL) ? 1 : 0;
1607} 1607}
1608 1608
1609static void savagefb_save_state(struct fb_info *info)
1610{
1611 struct savagefb_par *par = info->par;
1612
1613 savage_get_default_par(par, &par->save);
1614}
1615
1616static void savagefb_restore_state(struct fb_info *info)
1617{
1618 struct savagefb_par *par = info->par;
1619
1620 savagefb_blank(FB_BLANK_POWERDOWN, info);
1621 savage_set_default_par(par, &par->save);
1622 savagefb_blank(FB_BLANK_UNBLANK, info);
1623}
1624
1625static int savagefb_open(struct fb_info *info, int user) 1609static int savagefb_open(struct fb_info *info, int user)
1626{ 1610{
1627 struct savagefb_par *par = info->par; 1611 struct savagefb_par *par = info->par;
@@ -1667,8 +1651,6 @@ static struct fb_ops savagefb_ops = {
1667 .fb_setcolreg = savagefb_setcolreg, 1651 .fb_setcolreg = savagefb_setcolreg,
1668 .fb_pan_display = savagefb_pan_display, 1652 .fb_pan_display = savagefb_pan_display,
1669 .fb_blank = savagefb_blank, 1653 .fb_blank = savagefb_blank,
1670 .fb_save_state = savagefb_save_state,
1671 .fb_restore_state = savagefb_restore_state,
1672#if defined(CONFIG_FB_SAVAGE_ACCEL) 1654#if defined(CONFIG_FB_SAVAGE_ACCEL)
1673 .fb_fillrect = savagefb_fillrect, 1655 .fb_fillrect = savagefb_fillrect,
1674 .fb_copyarea = savagefb_copyarea, 1656 .fb_copyarea = savagefb_copyarea,
diff --git a/drivers/video/uvesafb.c b/drivers/video/uvesafb.c
index e35232a18571..54fbb2995a5f 100644
--- a/drivers/video/uvesafb.c
+++ b/drivers/video/uvesafb.c
@@ -1411,23 +1411,6 @@ static int uvesafb_check_var(struct fb_var_screeninfo *var,
1411 return 0; 1411 return 0;
1412} 1412}
1413 1413
1414static void uvesafb_save_state(struct fb_info *info)
1415{
1416 struct uvesafb_par *par = info->par;
1417
1418 if (par->vbe_state_saved)
1419 kfree(par->vbe_state_saved);
1420
1421 par->vbe_state_saved = uvesafb_vbe_state_save(par);
1422}
1423
1424static void uvesafb_restore_state(struct fb_info *info)
1425{
1426 struct uvesafb_par *par = info->par;
1427
1428 uvesafb_vbe_state_restore(par, par->vbe_state_saved);
1429}
1430
1431static struct fb_ops uvesafb_ops = { 1414static struct fb_ops uvesafb_ops = {
1432 .owner = THIS_MODULE, 1415 .owner = THIS_MODULE,
1433 .fb_open = uvesafb_open, 1416 .fb_open = uvesafb_open,
@@ -1441,8 +1424,6 @@ static struct fb_ops uvesafb_ops = {
1441 .fb_imageblit = cfb_imageblit, 1424 .fb_imageblit = cfb_imageblit,
1442 .fb_check_var = uvesafb_check_var, 1425 .fb_check_var = uvesafb_check_var,
1443 .fb_set_par = uvesafb_set_par, 1426 .fb_set_par = uvesafb_set_par,
1444 .fb_save_state = uvesafb_save_state,
1445 .fb_restore_state = uvesafb_restore_state,
1446}; 1427};
1447 1428
1448static void __devinit uvesafb_init_info(struct fb_info *info, 1429static void __devinit uvesafb_init_info(struct fb_info *info,
@@ -1459,15 +1440,6 @@ static void __devinit uvesafb_init_info(struct fb_info *info,
1459 info->fix.ypanstep = par->ypan ? 1 : 0; 1440 info->fix.ypanstep = par->ypan ? 1 : 0;
1460 info->fix.ywrapstep = (par->ypan > 1) ? 1 : 0; 1441 info->fix.ywrapstep = (par->ypan > 1) ? 1 : 0;
1461 1442
1462 /*
1463 * If we were unable to get the state buffer size, disable
1464 * functions for saving and restoring the hardware state.
1465 */
1466 if (par->vbe_state_size == 0) {
1467 info->fbops->fb_save_state = NULL;
1468 info->fbops->fb_restore_state = NULL;
1469 }
1470
1471 /* Disable blanking if the user requested so. */ 1443 /* Disable blanking if the user requested so. */
1472 if (!blank) 1444 if (!blank)
1473 info->fbops->fb_blank = NULL; 1445 info->fbops->fb_blank = NULL;
diff --git a/drivers/watchdog/sbc_fitpc2_wdt.c b/drivers/watchdog/sbc_fitpc2_wdt.c
index 852ca1977917..91430a89107c 100644
--- a/drivers/watchdog/sbc_fitpc2_wdt.c
+++ b/drivers/watchdog/sbc_fitpc2_wdt.c
@@ -227,7 +227,7 @@ static int __init fitpc2_wdt_init(void)
227 } 227 }
228 228
229 err = misc_register(&fitpc2_wdt_miscdev); 229 err = misc_register(&fitpc2_wdt_miscdev);
230 if (!err) { 230 if (err) {
231 pr_err("cannot register miscdev on minor=%d (err=%d)\n", 231 pr_err("cannot register miscdev on minor=%d (err=%d)\n",
232 WATCHDOG_MINOR, err); 232 WATCHDOG_MINOR, err);
233 goto err_margin; 233 goto err_margin;