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-rw-r--r--drivers/acpi/acpica/acconfig.h4
-rw-r--r--drivers/acpi/acpica/exregion.c35
-rw-r--r--drivers/acpi/power_meter.c6
-rw-r--r--drivers/acpi/proc.c2
-rw-r--r--drivers/acpi/processor_core.c2
-rw-r--r--drivers/acpi/processor_throttling.c6
-rw-r--r--drivers/acpi/sleep.c24
-rw-r--r--drivers/acpi/video.c8
-rw-r--r--drivers/ata/ahci.c40
-rw-r--r--drivers/ata/libata-core.c9
-rw-r--r--drivers/ata/sata_via.c1
-rw-r--r--drivers/char/hvc_xen.c25
-rw-r--r--drivers/edac/amd64_edac.c6
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c3
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h39
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h30
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c305
-rw-r--r--drivers/gpu/drm/i915/intel_bios.c14
-rw-r--r--drivers/gpu/drm/i915/intel_display.c178
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c2
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c10
-rw-r--r--drivers/ide/ide-probe.c9
-rw-r--r--drivers/isdn/hardware/eicon/maintidi.c5
-rw-r--r--drivers/isdn/hardware/eicon/message.c18
-rw-r--r--drivers/isdn/hisax/amd7930_fn.c1
-rw-r--r--drivers/isdn/hisax/diva.c2
-rw-r--r--drivers/isdn/hisax/elsa_ser.c22
-rw-r--r--drivers/isdn/hisax/hfc_usb.c4
-rw-r--r--drivers/isdn/hisax/hscx_irq.c2
-rw-r--r--drivers/isdn/hisax/icc.c1
-rw-r--r--drivers/isdn/mISDN/stack.c2
-rw-r--r--drivers/misc/sgi-gru/gruprocfs.c13
-rw-r--r--drivers/mtd/maps/Kconfig1
-rw-r--r--drivers/mtd/maps/gpio-addr-flash.c5
-rw-r--r--drivers/mtd/nand/nand_base.c6
-rw-r--r--drivers/net/benet/be.h2
-rw-r--r--drivers/net/benet/be_cmds.h2
-rw-r--r--drivers/net/benet/be_ethtool.c8
-rw-r--r--drivers/net/benet/be_main.c28
-rw-r--r--drivers/net/can/dev.c17
-rw-r--r--drivers/net/can/usb/ems_usb.c5
-rw-r--r--drivers/net/cassini.c5
-rw-r--r--drivers/net/davinci_emac.c2
-rw-r--r--drivers/net/fsl_pq_mdio.c1
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c84
-rw-r--r--drivers/net/macsonic.c117
-rw-r--r--drivers/net/qlge/qlge_main.c2
-rw-r--r--drivers/net/qlge/qlge_mpi.c2
-rw-r--r--drivers/net/usb/Kconfig2
-rw-r--r--drivers/net/usb/cdc_ether.c42
-rw-r--r--drivers/net/virtio_net.c6
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2100.c5
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2200.c2
-rw-r--r--drivers/net/wireless/ipw2x00/libipw.h1
-rw-r--r--drivers/net/wireless/ipw2x00/libipw_module.c14
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c4
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00link.c11
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00usb.c9
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_leds.c4
-rw-r--r--drivers/platform/x86/eeepc-laptop.c30
-rw-r--r--drivers/serial/sh-sci.c2
-rw-r--r--drivers/thermal/thermal_sys.c10
62 files changed, 942 insertions, 315 deletions
diff --git a/drivers/acpi/acpica/acconfig.h b/drivers/acpi/acpica/acconfig.h
index 8e679ef5b231..a4471e3d3853 100644
--- a/drivers/acpi/acpica/acconfig.h
+++ b/drivers/acpi/acpica/acconfig.h
@@ -103,9 +103,9 @@
103 103
104#define ACPI_MAX_REFERENCE_COUNT 0x1000 104#define ACPI_MAX_REFERENCE_COUNT 0x1000
105 105
106/* Size of cached memory mapping for system memory operation region */ 106/* Default page size for use in mapping memory for operation regions */
107 107
108#define ACPI_SYSMEM_REGION_WINDOW_SIZE 4096 108#define ACPI_DEFAULT_PAGE_SIZE 4096 /* Must be power of 2 */
109 109
110/* owner_id tracking. 8 entries allows for 255 owner_ids */ 110/* owner_id tracking. 8 entries allows for 255 owner_ids */
111 111
diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c
index 3a54b737d2da..2bd83ac57c3a 100644
--- a/drivers/acpi/acpica/exregion.c
+++ b/drivers/acpi/acpica/exregion.c
@@ -77,7 +77,8 @@ acpi_ex_system_memory_space_handler(u32 function,
77 void *logical_addr_ptr = NULL; 77 void *logical_addr_ptr = NULL;
78 struct acpi_mem_space_context *mem_info = region_context; 78 struct acpi_mem_space_context *mem_info = region_context;
79 u32 length; 79 u32 length;
80 acpi_size window_size; 80 acpi_size map_length;
81 acpi_size page_boundary_map_length;
81#ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED 82#ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED
82 u32 remainder; 83 u32 remainder;
83#endif 84#endif
@@ -144,25 +145,39 @@ acpi_ex_system_memory_space_handler(u32 function,
144 } 145 }
145 146
146 /* 147 /*
147 * Don't attempt to map memory beyond the end of the region, and 148 * Attempt to map from the requested address to the end of the region.
148 * constrain the maximum mapping size to something reasonable. 149 * However, we will never map more than one page, nor will we cross
150 * a page boundary.
149 */ 151 */
150 window_size = (acpi_size) 152 map_length = (acpi_size)
151 ((mem_info->address + mem_info->length) - address); 153 ((mem_info->address + mem_info->length) - address);
152 154
153 if (window_size > ACPI_SYSMEM_REGION_WINDOW_SIZE) { 155 /*
154 window_size = ACPI_SYSMEM_REGION_WINDOW_SIZE; 156 * If mapping the entire remaining portion of the region will cross
157 * a page boundary, just map up to the page boundary, do not cross.
158 * On some systems, crossing a page boundary while mapping regions
159 * can cause warnings if the pages have different attributes
160 * due to resource management
161 */
162 page_boundary_map_length =
163 ACPI_ROUND_UP(address, ACPI_DEFAULT_PAGE_SIZE) - address;
164
165 if (!page_boundary_map_length) {
166 page_boundary_map_length = ACPI_DEFAULT_PAGE_SIZE;
167 }
168
169 if (map_length > page_boundary_map_length) {
170 map_length = page_boundary_map_length;
155 } 171 }
156 172
157 /* Create a new mapping starting at the address given */ 173 /* Create a new mapping starting at the address given */
158 174
159 mem_info->mapped_logical_address = 175 mem_info->mapped_logical_address = acpi_os_map_memory((acpi_physical_address) address, map_length);
160 acpi_os_map_memory((acpi_physical_address) address, window_size);
161 if (!mem_info->mapped_logical_address) { 176 if (!mem_info->mapped_logical_address) {
162 ACPI_ERROR((AE_INFO, 177 ACPI_ERROR((AE_INFO,
163 "Could not map memory at %8.8X%8.8X, size %X", 178 "Could not map memory at %8.8X%8.8X, size %X",
164 ACPI_FORMAT_NATIVE_UINT(address), 179 ACPI_FORMAT_NATIVE_UINT(address),
165 (u32) window_size)); 180 (u32) map_length));
166 mem_info->mapped_length = 0; 181 mem_info->mapped_length = 0;
167 return_ACPI_STATUS(AE_NO_MEMORY); 182 return_ACPI_STATUS(AE_NO_MEMORY);
168 } 183 }
@@ -170,7 +185,7 @@ acpi_ex_system_memory_space_handler(u32 function,
170 /* Save the physical address and mapping size */ 185 /* Save the physical address and mapping size */
171 186
172 mem_info->mapped_physical_address = address; 187 mem_info->mapped_physical_address = address;
173 mem_info->mapped_length = window_size; 188 mem_info->mapped_length = map_length;
174 } 189 }
175 190
176 /* 191 /*
diff --git a/drivers/acpi/power_meter.c b/drivers/acpi/power_meter.c
index e6bfd77986b8..2ef7030a0c28 100644
--- a/drivers/acpi/power_meter.c
+++ b/drivers/acpi/power_meter.c
@@ -294,7 +294,11 @@ static int set_acpi_trip(struct acpi_power_meter_resource *resource)
294 return -EINVAL; 294 return -EINVAL;
295 } 295 }
296 296
297 return data; 297 /* _PTP returns 0 on success, nonzero otherwise */
298 if (data)
299 return -EINVAL;
300
301 return 0;
298} 302}
299 303
300static ssize_t set_trip(struct device *dev, struct device_attribute *devattr, 304static ssize_t set_trip(struct device *dev, struct device_attribute *devattr,
diff --git a/drivers/acpi/proc.c b/drivers/acpi/proc.c
index f8b6f555ba52..d0d25e2e1ced 100644
--- a/drivers/acpi/proc.c
+++ b/drivers/acpi/proc.c
@@ -393,7 +393,7 @@ acpi_system_write_wakeup_device(struct file *file,
393 struct list_head *node, *next; 393 struct list_head *node, *next;
394 char strbuf[5]; 394 char strbuf[5];
395 char str[5] = ""; 395 char str[5] = "";
396 int len = count; 396 unsigned int len = count;
397 struct acpi_device *found_dev = NULL; 397 struct acpi_device *found_dev = NULL;
398 398
399 if (len > 4) 399 if (len > 4)
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
index c567b46dfa0f..ec742a4e5635 100644
--- a/drivers/acpi/processor_core.c
+++ b/drivers/acpi/processor_core.c
@@ -770,7 +770,7 @@ static struct notifier_block acpi_cpu_notifier =
770 .notifier_call = acpi_cpu_soft_notify, 770 .notifier_call = acpi_cpu_soft_notify,
771}; 771};
772 772
773static int acpi_processor_add(struct acpi_device *device) 773static int __cpuinit acpi_processor_add(struct acpi_device *device)
774{ 774{
775 struct acpi_processor *pr = NULL; 775 struct acpi_processor *pr = NULL;
776 int result = 0; 776 int result = 0;
diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c
index 4c6c14c1e307..1c5d7a8b2fdf 100644
--- a/drivers/acpi/processor_throttling.c
+++ b/drivers/acpi/processor_throttling.c
@@ -1133,15 +1133,15 @@ int acpi_processor_get_throttling_info(struct acpi_processor *pr)
1133 int result = 0; 1133 int result = 0;
1134 struct acpi_processor_throttling *pthrottling; 1134 struct acpi_processor_throttling *pthrottling;
1135 1135
1136 if (!pr)
1137 return -EINVAL;
1138
1136 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1139 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1137 "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n", 1140 "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n",
1138 pr->throttling.address, 1141 pr->throttling.address,
1139 pr->throttling.duty_offset, 1142 pr->throttling.duty_offset,
1140 pr->throttling.duty_width)); 1143 pr->throttling.duty_width));
1141 1144
1142 if (!pr)
1143 return -EINVAL;
1144
1145 /* 1145 /*
1146 * Evaluate _PTC, _TSS and _TPC 1146 * Evaluate _PTC, _TSS and _TPC
1147 * They must all be present or none of them can be used. 1147 * They must all be present or none of them can be used.
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index a90afcc723ab..4cc1b8116e76 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -413,6 +413,30 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = {
413 }, 413 },
414 }, 414 },
415 { 415 {
416 .callback = init_set_sci_en_on_resume,
417 .ident = "Hewlett-Packard Pavilion dv4",
418 .matches = {
419 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
420 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv4"),
421 },
422 },
423 {
424 .callback = init_set_sci_en_on_resume,
425 .ident = "Hewlett-Packard Pavilion dv7",
426 .matches = {
427 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
428 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv7"),
429 },
430 },
431 {
432 .callback = init_set_sci_en_on_resume,
433 .ident = "Hewlett-Packard Compaq Presario CQ40 Notebook PC",
434 .matches = {
435 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
436 DMI_MATCH(DMI_PRODUCT_NAME, "Compaq Presario CQ40 Notebook PC"),
437 },
438 },
439 {
416 .callback = init_old_suspend_ordering, 440 .callback = init_old_suspend_ordering,
417 .ident = "Panasonic CF51-2L", 441 .ident = "Panasonic CF51-2L",
418 .matches = { 442 .matches = {
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c
index 64e3c581b7a9..05dff631591c 100644
--- a/drivers/acpi/video.c
+++ b/drivers/acpi/video.c
@@ -1223,7 +1223,7 @@ acpi_video_device_write_state(struct file *file,
1223 u32 state = 0; 1223 u32 state = 0;
1224 1224
1225 1225
1226 if (!dev || count + 1 > sizeof str) 1226 if (!dev || count >= sizeof(str))
1227 return -EINVAL; 1227 return -EINVAL;
1228 1228
1229 if (copy_from_user(str, buffer, count)) 1229 if (copy_from_user(str, buffer, count))
@@ -1280,7 +1280,7 @@ acpi_video_device_write_brightness(struct file *file,
1280 int i; 1280 int i;
1281 1281
1282 1282
1283 if (!dev || !dev->brightness || count + 1 > sizeof str) 1283 if (!dev || !dev->brightness || count >= sizeof(str))
1284 return -EINVAL; 1284 return -EINVAL;
1285 1285
1286 if (copy_from_user(str, buffer, count)) 1286 if (copy_from_user(str, buffer, count))
@@ -1562,7 +1562,7 @@ acpi_video_bus_write_POST(struct file *file,
1562 unsigned long long opt, options; 1562 unsigned long long opt, options;
1563 1563
1564 1564
1565 if (!video || count + 1 > sizeof str) 1565 if (!video || count >= sizeof(str))
1566 return -EINVAL; 1566 return -EINVAL;
1567 1567
1568 status = acpi_video_bus_POST_options(video, &options); 1568 status = acpi_video_bus_POST_options(video, &options);
@@ -1602,7 +1602,7 @@ acpi_video_bus_write_DOS(struct file *file,
1602 unsigned long opt; 1602 unsigned long opt;
1603 1603
1604 1604
1605 if (!video || count + 1 > sizeof str) 1605 if (!video || count >= sizeof(str))
1606 return -EINVAL; 1606 return -EINVAL;
1607 1607
1608 if (copy_from_user(str, buffer, count)) 1608 if (copy_from_user(str, buffer, count))
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index a06f5d6375a8..a3241a1a710b 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -2718,6 +2718,30 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)
2718 }, 2718 },
2719 .driver_data = "20071026", /* yyyymmdd */ 2719 .driver_data = "20071026", /* yyyymmdd */
2720 }, 2720 },
2721 /*
2722 * All BIOS versions for the MSI K9A2 Platinum (MS-7376)
2723 * support 64bit DMA.
2724 *
2725 * BIOS versions earlier than 1.5 had the Manufacturer DMI
2726 * fields as "MICRO-STAR INTERANTIONAL CO.,LTD".
2727 * This spelling mistake was fixed in BIOS version 1.5, so
2728 * 1.5 and later have the Manufacturer as
2729 * "MICRO-STAR INTERNATIONAL CO.,LTD".
2730 * So try to match on DMI_BOARD_VENDOR of "MICRO-STAR INTER".
2731 *
2732 * BIOS versions earlier than 1.9 had a Board Product Name
2733 * DMI field of "MS-7376". This was changed to be
2734 * "K9A2 Platinum (MS-7376)" in version 1.9, but we can still
2735 * match on DMI_BOARD_NAME of "MS-7376".
2736 */
2737 {
2738 .ident = "MSI K9A2 Platinum",
2739 .matches = {
2740 DMI_MATCH(DMI_BOARD_VENDOR,
2741 "MICRO-STAR INTER"),
2742 DMI_MATCH(DMI_BOARD_NAME, "MS-7376"),
2743 },
2744 },
2721 { } 2745 { }
2722 }; 2746 };
2723 const struct dmi_system_id *match; 2747 const struct dmi_system_id *match;
@@ -2729,18 +2753,24 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)
2729 !match) 2753 !match)
2730 return false; 2754 return false;
2731 2755
2756 if (!match->driver_data)
2757 goto enable_64bit;
2758
2732 dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); 2759 dmi_get_date(DMI_BIOS_DATE, &year, &month, &date);
2733 snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); 2760 snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date);
2734 2761
2735 if (strcmp(buf, match->driver_data) >= 0) { 2762 if (strcmp(buf, match->driver_data) >= 0)
2736 dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n", 2763 goto enable_64bit;
2737 match->ident); 2764 else {
2738 return true;
2739 } else {
2740 dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, " 2765 dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, "
2741 "forcing 32bit DMA, update BIOS\n", match->ident); 2766 "forcing 32bit DMA, update BIOS\n", match->ident);
2742 return false; 2767 return false;
2743 } 2768 }
2769
2770enable_64bit:
2771 dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n",
2772 match->ident);
2773 return true;
2744} 2774}
2745 2775
2746static bool ahci_broken_system_poweroff(struct pci_dev *pdev) 2776static bool ahci_broken_system_poweroff(struct pci_dev *pdev)
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index d7f0f1b1ae3e..dc72690ed5db 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4919,10 +4919,11 @@ struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4919 */ 4919 */
4920void ata_qc_free(struct ata_queued_cmd *qc) 4920void ata_qc_free(struct ata_queued_cmd *qc)
4921{ 4921{
4922 struct ata_port *ap = qc->ap; 4922 struct ata_port *ap;
4923 unsigned int tag; 4923 unsigned int tag;
4924 4924
4925 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 4925 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4926 ap = qc->ap;
4926 4927
4927 qc->flags = 0; 4928 qc->flags = 0;
4928 tag = qc->tag; 4929 tag = qc->tag;
@@ -4934,11 +4935,13 @@ void ata_qc_free(struct ata_queued_cmd *qc)
4934 4935
4935void __ata_qc_complete(struct ata_queued_cmd *qc) 4936void __ata_qc_complete(struct ata_queued_cmd *qc)
4936{ 4937{
4937 struct ata_port *ap = qc->ap; 4938 struct ata_port *ap;
4938 struct ata_link *link = qc->dev->link; 4939 struct ata_link *link;
4939 4940
4940 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 4941 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4941 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE)); 4942 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));
4943 ap = qc->ap;
4944 link = qc->dev->link;
4942 4945
4943 if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) 4946 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4944 ata_sg_clean(qc); 4947 ata_sg_clean(qc);
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index bdd43c7f432e..02efd9a83d26 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -93,7 +93,6 @@ static const struct pci_device_id svia_pci_tbl[] = {
93 { PCI_VDEVICE(VIA, 0x7372), vt6420 }, 93 { PCI_VDEVICE(VIA, 0x7372), vt6420 },
94 { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */ 94 { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */
95 { PCI_VDEVICE(VIA, 0x9000), vt8251 }, 95 { PCI_VDEVICE(VIA, 0x9000), vt8251 },
96 { PCI_VDEVICE(VIA, 0x9040), vt8251 },
97 96
98 { } /* terminate list */ 97 { } /* terminate list */
99}; 98};
diff --git a/drivers/char/hvc_xen.c b/drivers/char/hvc_xen.c
index eba999f8598d..a6ee32b599a8 100644
--- a/drivers/char/hvc_xen.c
+++ b/drivers/char/hvc_xen.c
@@ -55,7 +55,7 @@ static inline void notify_daemon(void)
55 notify_remote_via_evtchn(xen_start_info->console.domU.evtchn); 55 notify_remote_via_evtchn(xen_start_info->console.domU.evtchn);
56} 56}
57 57
58static int write_console(uint32_t vtermno, const char *data, int len) 58static int __write_console(const char *data, int len)
59{ 59{
60 struct xencons_interface *intf = xencons_interface(); 60 struct xencons_interface *intf = xencons_interface();
61 XENCONS_RING_IDX cons, prod; 61 XENCONS_RING_IDX cons, prod;
@@ -76,6 +76,29 @@ static int write_console(uint32_t vtermno, const char *data, int len)
76 return sent; 76 return sent;
77} 77}
78 78
79static int write_console(uint32_t vtermno, const char *data, int len)
80{
81 int ret = len;
82
83 /*
84 * Make sure the whole buffer is emitted, polling if
85 * necessary. We don't ever want to rely on the hvc daemon
86 * because the most interesting console output is when the
87 * kernel is crippled.
88 */
89 while (len) {
90 int sent = __write_console(data, len);
91
92 data += sent;
93 len -= sent;
94
95 if (unlikely(len))
96 HYPERVISOR_sched_op(SCHEDOP_yield, NULL);
97 }
98
99 return ret;
100}
101
79static int read_console(uint32_t vtermno, char *buf, int len) 102static int read_console(uint32_t vtermno, char *buf, int len)
80{ 103{
81 struct xencons_interface *intf = xencons_interface(); 104 struct xencons_interface *intf = xencons_interface();
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index d4560d9d5a83..a38831c82649 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2254,7 +2254,7 @@ static inline void __amd64_decode_bus_error(struct mem_ctl_info *mci,
2254{ 2254{
2255 u32 ec = ERROR_CODE(info->nbsl); 2255 u32 ec = ERROR_CODE(info->nbsl);
2256 u32 xec = EXT_ERROR_CODE(info->nbsl); 2256 u32 xec = EXT_ERROR_CODE(info->nbsl);
2257 int ecc_type = info->nbsh & (0x3 << 13); 2257 int ecc_type = (info->nbsh >> 13) & 0x3;
2258 2258
2259 /* Bail early out if this was an 'observed' error */ 2259 /* Bail early out if this was an 'observed' error */
2260 if (PP(ec) == K8_NBSL_PP_OBS) 2260 if (PP(ec) == K8_NBSL_PP_OBS)
@@ -3163,7 +3163,7 @@ static int __init amd64_edac_init(void)
3163 opstate_init(); 3163 opstate_init();
3164 3164
3165 if (cache_k8_northbridges() < 0) 3165 if (cache_k8_northbridges() < 0)
3166 goto err_exit; 3166 return err;
3167 3167
3168 err = pci_register_driver(&amd64_pci_driver); 3168 err = pci_register_driver(&amd64_pci_driver);
3169 if (err) 3169 if (err)
@@ -3189,8 +3189,6 @@ static int __init amd64_edac_init(void)
3189 3189
3190err_2nd_stage: 3190err_2nd_stage:
3191 debugf0("2nd stage failed\n"); 3191 debugf0("2nd stage failed\n");
3192
3193err_exit:
3194 pci_unregister_driver(&amd64_pci_driver); 3192 pci_unregister_driver(&amd64_pci_driver);
3195 3193
3196 return err; 3194 return err;
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 92aeb918e0c0..e5b138be45fa 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1227,8 +1227,7 @@ static int i915_load_modeset_init(struct drm_device *dev,
1227 goto out; 1227 goto out;
1228 1228
1229 /* Try to set up FBC with a reasonable compressed buffer size */ 1229 /* Try to set up FBC with a reasonable compressed buffer size */
1230 if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev) || IS_GM45(dev)) && 1230 if (I915_HAS_FBC(dev) && i915_powersave) {
1231 i915_powersave) {
1232 int cfb_size; 1231 int cfb_size;
1233 1232
1234 /* Try to get an 8M buffer... */ 1233 /* Try to get an 8M buffer... */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c5df2234418d..57204e298975 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -296,6 +296,12 @@ typedef struct drm_i915_private {
296 u32 saveVBLANK_A; 296 u32 saveVBLANK_A;
297 u32 saveVSYNC_A; 297 u32 saveVSYNC_A;
298 u32 saveBCLRPAT_A; 298 u32 saveBCLRPAT_A;
299 u32 saveTRANS_HTOTAL_A;
300 u32 saveTRANS_HBLANK_A;
301 u32 saveTRANS_HSYNC_A;
302 u32 saveTRANS_VTOTAL_A;
303 u32 saveTRANS_VBLANK_A;
304 u32 saveTRANS_VSYNC_A;
299 u32 savePIPEASTAT; 305 u32 savePIPEASTAT;
300 u32 saveDSPASTRIDE; 306 u32 saveDSPASTRIDE;
301 u32 saveDSPASIZE; 307 u32 saveDSPASIZE;
@@ -304,8 +310,11 @@ typedef struct drm_i915_private {
304 u32 saveDSPASURF; 310 u32 saveDSPASURF;
305 u32 saveDSPATILEOFF; 311 u32 saveDSPATILEOFF;
306 u32 savePFIT_PGM_RATIOS; 312 u32 savePFIT_PGM_RATIOS;
313 u32 saveBLC_HIST_CTL;
307 u32 saveBLC_PWM_CTL; 314 u32 saveBLC_PWM_CTL;
308 u32 saveBLC_PWM_CTL2; 315 u32 saveBLC_PWM_CTL2;
316 u32 saveBLC_CPU_PWM_CTL;
317 u32 saveBLC_CPU_PWM_CTL2;
309 u32 saveFPB0; 318 u32 saveFPB0;
310 u32 saveFPB1; 319 u32 saveFPB1;
311 u32 saveDPLL_B; 320 u32 saveDPLL_B;
@@ -317,6 +326,12 @@ typedef struct drm_i915_private {
317 u32 saveVBLANK_B; 326 u32 saveVBLANK_B;
318 u32 saveVSYNC_B; 327 u32 saveVSYNC_B;
319 u32 saveBCLRPAT_B; 328 u32 saveBCLRPAT_B;
329 u32 saveTRANS_HTOTAL_B;
330 u32 saveTRANS_HBLANK_B;
331 u32 saveTRANS_HSYNC_B;
332 u32 saveTRANS_VTOTAL_B;
333 u32 saveTRANS_VBLANK_B;
334 u32 saveTRANS_VSYNC_B;
320 u32 savePIPEBSTAT; 335 u32 savePIPEBSTAT;
321 u32 saveDSPBSTRIDE; 336 u32 saveDSPBSTRIDE;
322 u32 saveDSPBSIZE; 337 u32 saveDSPBSIZE;
@@ -342,6 +357,7 @@ typedef struct drm_i915_private {
342 u32 savePFIT_CONTROL; 357 u32 savePFIT_CONTROL;
343 u32 save_palette_a[256]; 358 u32 save_palette_a[256];
344 u32 save_palette_b[256]; 359 u32 save_palette_b[256];
360 u32 saveDPFC_CB_BASE;
345 u32 saveFBC_CFB_BASE; 361 u32 saveFBC_CFB_BASE;
346 u32 saveFBC_LL_BASE; 362 u32 saveFBC_LL_BASE;
347 u32 saveFBC_CONTROL; 363 u32 saveFBC_CONTROL;
@@ -349,6 +365,12 @@ typedef struct drm_i915_private {
349 u32 saveIER; 365 u32 saveIER;
350 u32 saveIIR; 366 u32 saveIIR;
351 u32 saveIMR; 367 u32 saveIMR;
368 u32 saveDEIER;
369 u32 saveDEIMR;
370 u32 saveGTIER;
371 u32 saveGTIMR;
372 u32 saveFDI_RXA_IMR;
373 u32 saveFDI_RXB_IMR;
352 u32 saveCACHE_MODE_0; 374 u32 saveCACHE_MODE_0;
353 u32 saveD_STATE; 375 u32 saveD_STATE;
354 u32 saveDSPCLK_GATE_D; 376 u32 saveDSPCLK_GATE_D;
@@ -382,6 +404,16 @@ typedef struct drm_i915_private {
382 u32 savePIPEB_DP_LINK_M; 404 u32 savePIPEB_DP_LINK_M;
383 u32 savePIPEA_DP_LINK_N; 405 u32 savePIPEA_DP_LINK_N;
384 u32 savePIPEB_DP_LINK_N; 406 u32 savePIPEB_DP_LINK_N;
407 u32 saveFDI_RXA_CTL;
408 u32 saveFDI_TXA_CTL;
409 u32 saveFDI_RXB_CTL;
410 u32 saveFDI_TXB_CTL;
411 u32 savePFA_CTL_1;
412 u32 savePFB_CTL_1;
413 u32 savePFA_WIN_SZ;
414 u32 savePFB_WIN_SZ;
415 u32 savePFA_WIN_POS;
416 u32 savePFB_WIN_POS;
385 417
386 struct { 418 struct {
387 struct drm_mm gtt_space; 419 struct drm_mm gtt_space;
@@ -492,6 +524,8 @@ typedef struct drm_i915_private {
492 struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT]; 524 struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
493 } mm; 525 } mm;
494 struct sdvo_device_mapping sdvo_mappings[2]; 526 struct sdvo_device_mapping sdvo_mappings[2];
527 /* indicate whether the LVDS_BORDER should be enabled or not */
528 unsigned int lvds_border_bits;
495 529
496 /* Reclocking support */ 530 /* Reclocking support */
497 bool render_reclock_avail; 531 bool render_reclock_avail;
@@ -981,7 +1015,10 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
981 1015
982#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev)) 1016#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev))
983#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev)) 1017#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev))
984#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev))) 1018#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \
1019 (IS_I9XX(dev) || IS_GM45(dev)) && \
1020 !IS_IGD(dev) && \
1021 !IS_IGDNG(dev))
985 1022
986#define PRIMARY_RINGBUFFER_SIZE (128*1024) 1023#define PRIMARY_RINGBUFFER_SIZE (128*1024)
987 1024
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0466ddbeba32..1687edf68795 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -968,6 +968,8 @@
968#define LVDS_PORT_EN (1 << 31) 968#define LVDS_PORT_EN (1 << 31)
969/* Selects pipe B for LVDS data. Must be set on pre-965. */ 969/* Selects pipe B for LVDS data. Must be set on pre-965. */
970#define LVDS_PIPEB_SELECT (1 << 30) 970#define LVDS_PIPEB_SELECT (1 << 30)
971/* Enable border for unscaled (or aspect-scaled) display */
972#define LVDS_BORDER_ENABLE (1 << 15)
971/* 973/*
972 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per 974 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per
973 * pixel. 975 * pixel.
@@ -1078,6 +1080,8 @@
1078#define BACKLIGHT_DUTY_CYCLE_SHIFT (0) 1080#define BACKLIGHT_DUTY_CYCLE_SHIFT (0)
1079#define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) 1081#define BACKLIGHT_DUTY_CYCLE_MASK (0xffff)
1080 1082
1083#define BLC_HIST_CTL 0x61260
1084
1081/* TV port control */ 1085/* TV port control */
1082#define TV_CTL 0x68000 1086#define TV_CTL 0x68000
1083/** Enables the TV encoder */ 1087/** Enables the TV encoder */
@@ -1780,6 +1784,11 @@
1780#define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */ 1784#define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */
1781#define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1) 1785#define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1)
1782#define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0) 1786#define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0)
1787#define PIPE_BPC_MASK (7 << 5) /* Ironlake */
1788#define PIPE_8BPC (0 << 5)
1789#define PIPE_10BPC (1 << 5)
1790#define PIPE_6BPC (2 << 5)
1791#define PIPE_12BPC (3 << 5)
1783 1792
1784#define DSPARB 0x70030 1793#define DSPARB 0x70030
1785#define DSPARB_CSTART_MASK (0x7f << 7) 1794#define DSPARB_CSTART_MASK (0x7f << 7)
@@ -1790,17 +1799,29 @@
1790#define DSPARB_AEND_SHIFT 0 1799#define DSPARB_AEND_SHIFT 0
1791 1800
1792#define DSPFW1 0x70034 1801#define DSPFW1 0x70034
1802#define DSPFW_SR_SHIFT 23
1803#define DSPFW_CURSORB_SHIFT 16
1804#define DSPFW_PLANEB_SHIFT 8
1793#define DSPFW2 0x70038 1805#define DSPFW2 0x70038
1806#define DSPFW_CURSORA_MASK 0x00003f00
1807#define DSPFW_CURSORA_SHIFT 16
1794#define DSPFW3 0x7003c 1808#define DSPFW3 0x7003c
1809#define DSPFW_HPLL_SR_EN (1<<31)
1810#define DSPFW_CURSOR_SR_SHIFT 24
1795#define IGD_SELF_REFRESH_EN (1<<30) 1811#define IGD_SELF_REFRESH_EN (1<<30)
1796 1812
1797/* FIFO watermark sizes etc */ 1813/* FIFO watermark sizes etc */
1814#define G4X_FIFO_LINE_SIZE 64
1798#define I915_FIFO_LINE_SIZE 64 1815#define I915_FIFO_LINE_SIZE 64
1799#define I830_FIFO_LINE_SIZE 32 1816#define I830_FIFO_LINE_SIZE 32
1817
1818#define G4X_FIFO_SIZE 127
1800#define I945_FIFO_SIZE 127 /* 945 & 965 */ 1819#define I945_FIFO_SIZE 127 /* 945 & 965 */
1801#define I915_FIFO_SIZE 95 1820#define I915_FIFO_SIZE 95
1802#define I855GM_FIFO_SIZE 127 /* In cachelines */ 1821#define I855GM_FIFO_SIZE 127 /* In cachelines */
1803#define I830_FIFO_SIZE 95 1822#define I830_FIFO_SIZE 95
1823
1824#define G4X_MAX_WM 0x3f
1804#define I915_MAX_WM 0x3f 1825#define I915_MAX_WM 0x3f
1805 1826
1806#define IGD_DISPLAY_FIFO 512 /* in 64byte unit */ 1827#define IGD_DISPLAY_FIFO 512 /* in 64byte unit */
@@ -2030,6 +2051,11 @@
2030#define PFA_CTL_1 0x68080 2051#define PFA_CTL_1 0x68080
2031#define PFB_CTL_1 0x68880 2052#define PFB_CTL_1 0x68880
2032#define PF_ENABLE (1<<31) 2053#define PF_ENABLE (1<<31)
2054#define PF_FILTER_MASK (3<<23)
2055#define PF_FILTER_PROGRAMMED (0<<23)
2056#define PF_FILTER_MED_3x3 (1<<23)
2057#define PF_FILTER_EDGE_ENHANCE (2<<23)
2058#define PF_FILTER_EDGE_SOFTEN (3<<23)
2033#define PFA_WIN_SZ 0x68074 2059#define PFA_WIN_SZ 0x68074
2034#define PFB_WIN_SZ 0x68874 2060#define PFB_WIN_SZ 0x68874
2035#define PFA_WIN_POS 0x68070 2061#define PFA_WIN_POS 0x68070
@@ -2149,11 +2175,11 @@
2149#define DREF_CPU_SOURCE_OUTPUT_MASK (3<<13) 2175#define DREF_CPU_SOURCE_OUTPUT_MASK (3<<13)
2150#define DREF_SSC_SOURCE_DISABLE (0<<11) 2176#define DREF_SSC_SOURCE_DISABLE (0<<11)
2151#define DREF_SSC_SOURCE_ENABLE (2<<11) 2177#define DREF_SSC_SOURCE_ENABLE (2<<11)
2152#define DREF_SSC_SOURCE_MASK (2<<11) 2178#define DREF_SSC_SOURCE_MASK (3<<11)
2153#define DREF_NONSPREAD_SOURCE_DISABLE (0<<9) 2179#define DREF_NONSPREAD_SOURCE_DISABLE (0<<9)
2154#define DREF_NONSPREAD_CK505_ENABLE (1<<9) 2180#define DREF_NONSPREAD_CK505_ENABLE (1<<9)
2155#define DREF_NONSPREAD_SOURCE_ENABLE (2<<9) 2181#define DREF_NONSPREAD_SOURCE_ENABLE (2<<9)
2156#define DREF_NONSPREAD_SOURCE_MASK (2<<9) 2182#define DREF_NONSPREAD_SOURCE_MASK (3<<9)
2157#define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7) 2183#define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7)
2158#define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7) 2184#define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7)
2159#define DREF_SSC4_DOWNSPREAD (0<<6) 2185#define DREF_SSC4_DOWNSPREAD (0<<6)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index bd6d8d91ca9f..992d5617e798 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -32,11 +32,15 @@
32static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe) 32static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
33{ 33{
34 struct drm_i915_private *dev_priv = dev->dev_private; 34 struct drm_i915_private *dev_priv = dev->dev_private;
35 u32 dpll_reg;
35 36
36 if (pipe == PIPE_A) 37 if (IS_IGDNG(dev)) {
37 return (I915_READ(DPLL_A) & DPLL_VCO_ENABLE); 38 dpll_reg = (pipe == PIPE_A) ? PCH_DPLL_A: PCH_DPLL_B;
38 else 39 } else {
39 return (I915_READ(DPLL_B) & DPLL_VCO_ENABLE); 40 dpll_reg = (pipe == PIPE_A) ? DPLL_A: DPLL_B;
41 }
42
43 return (I915_READ(dpll_reg) & DPLL_VCO_ENABLE);
40} 44}
41 45
42static void i915_save_palette(struct drm_device *dev, enum pipe pipe) 46static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
@@ -49,6 +53,9 @@ static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
49 if (!i915_pipe_enabled(dev, pipe)) 53 if (!i915_pipe_enabled(dev, pipe))
50 return; 54 return;
51 55
56 if (IS_IGDNG(dev))
57 reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
58
52 if (pipe == PIPE_A) 59 if (pipe == PIPE_A)
53 array = dev_priv->save_palette_a; 60 array = dev_priv->save_palette_a;
54 else 61 else
@@ -68,6 +75,9 @@ static void i915_restore_palette(struct drm_device *dev, enum pipe pipe)
68 if (!i915_pipe_enabled(dev, pipe)) 75 if (!i915_pipe_enabled(dev, pipe))
69 return; 76 return;
70 77
78 if (IS_IGDNG(dev))
79 reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
80
71 if (pipe == PIPE_A) 81 if (pipe == PIPE_A)
72 array = dev_priv->save_palette_a; 82 array = dev_priv->save_palette_a;
73 else 83 else
@@ -232,10 +242,16 @@ static void i915_save_modeset_reg(struct drm_device *dev)
232 /* Pipe & plane A info */ 242 /* Pipe & plane A info */
233 dev_priv->savePIPEACONF = I915_READ(PIPEACONF); 243 dev_priv->savePIPEACONF = I915_READ(PIPEACONF);
234 dev_priv->savePIPEASRC = I915_READ(PIPEASRC); 244 dev_priv->savePIPEASRC = I915_READ(PIPEASRC);
235 dev_priv->saveFPA0 = I915_READ(FPA0); 245 if (IS_IGDNG(dev)) {
236 dev_priv->saveFPA1 = I915_READ(FPA1); 246 dev_priv->saveFPA0 = I915_READ(PCH_FPA0);
237 dev_priv->saveDPLL_A = I915_READ(DPLL_A); 247 dev_priv->saveFPA1 = I915_READ(PCH_FPA1);
238 if (IS_I965G(dev)) 248 dev_priv->saveDPLL_A = I915_READ(PCH_DPLL_A);
249 } else {
250 dev_priv->saveFPA0 = I915_READ(FPA0);
251 dev_priv->saveFPA1 = I915_READ(FPA1);
252 dev_priv->saveDPLL_A = I915_READ(DPLL_A);
253 }
254 if (IS_I965G(dev) && !IS_IGDNG(dev))
239 dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD); 255 dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD);
240 dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A); 256 dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A);
241 dev_priv->saveHBLANK_A = I915_READ(HBLANK_A); 257 dev_priv->saveHBLANK_A = I915_READ(HBLANK_A);
@@ -243,7 +259,24 @@ static void i915_save_modeset_reg(struct drm_device *dev)
243 dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A); 259 dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A);
244 dev_priv->saveVBLANK_A = I915_READ(VBLANK_A); 260 dev_priv->saveVBLANK_A = I915_READ(VBLANK_A);
245 dev_priv->saveVSYNC_A = I915_READ(VSYNC_A); 261 dev_priv->saveVSYNC_A = I915_READ(VSYNC_A);
246 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); 262 if (!IS_IGDNG(dev))
263 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
264
265 if (IS_IGDNG(dev)) {
266 dev_priv->saveFDI_TXA_CTL = I915_READ(FDI_TXA_CTL);
267 dev_priv->saveFDI_RXA_CTL = I915_READ(FDI_RXA_CTL);
268
269 dev_priv->savePFA_CTL_1 = I915_READ(PFA_CTL_1);
270 dev_priv->savePFA_WIN_SZ = I915_READ(PFA_WIN_SZ);
271 dev_priv->savePFA_WIN_POS = I915_READ(PFA_WIN_POS);
272
273 dev_priv->saveTRANS_HTOTAL_A = I915_READ(TRANS_HTOTAL_A);
274 dev_priv->saveTRANS_HBLANK_A = I915_READ(TRANS_HBLANK_A);
275 dev_priv->saveTRANS_HSYNC_A = I915_READ(TRANS_HSYNC_A);
276 dev_priv->saveTRANS_VTOTAL_A = I915_READ(TRANS_VTOTAL_A);
277 dev_priv->saveTRANS_VBLANK_A = I915_READ(TRANS_VBLANK_A);
278 dev_priv->saveTRANS_VSYNC_A = I915_READ(TRANS_VSYNC_A);
279 }
247 280
248 dev_priv->saveDSPACNTR = I915_READ(DSPACNTR); 281 dev_priv->saveDSPACNTR = I915_READ(DSPACNTR);
249 dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE); 282 dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE);
@@ -260,10 +293,16 @@ static void i915_save_modeset_reg(struct drm_device *dev)
260 /* Pipe & plane B info */ 293 /* Pipe & plane B info */
261 dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF); 294 dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF);
262 dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC); 295 dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC);
263 dev_priv->saveFPB0 = I915_READ(FPB0); 296 if (IS_IGDNG(dev)) {
264 dev_priv->saveFPB1 = I915_READ(FPB1); 297 dev_priv->saveFPB0 = I915_READ(PCH_FPB0);
265 dev_priv->saveDPLL_B = I915_READ(DPLL_B); 298 dev_priv->saveFPB1 = I915_READ(PCH_FPB1);
266 if (IS_I965G(dev)) 299 dev_priv->saveDPLL_B = I915_READ(PCH_DPLL_B);
300 } else {
301 dev_priv->saveFPB0 = I915_READ(FPB0);
302 dev_priv->saveFPB1 = I915_READ(FPB1);
303 dev_priv->saveDPLL_B = I915_READ(DPLL_B);
304 }
305 if (IS_I965G(dev) && !IS_IGDNG(dev))
267 dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD); 306 dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD);
268 dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B); 307 dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B);
269 dev_priv->saveHBLANK_B = I915_READ(HBLANK_B); 308 dev_priv->saveHBLANK_B = I915_READ(HBLANK_B);
@@ -271,7 +310,24 @@ static void i915_save_modeset_reg(struct drm_device *dev)
271 dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B); 310 dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B);
272 dev_priv->saveVBLANK_B = I915_READ(VBLANK_B); 311 dev_priv->saveVBLANK_B = I915_READ(VBLANK_B);
273 dev_priv->saveVSYNC_B = I915_READ(VSYNC_B); 312 dev_priv->saveVSYNC_B = I915_READ(VSYNC_B);
274 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); 313 if (!IS_IGDNG(dev))
314 dev_priv->saveBCLRPAT_B = I915_READ(BCLRPAT_B);
315
316 if (IS_IGDNG(dev)) {
317 dev_priv->saveFDI_TXB_CTL = I915_READ(FDI_TXB_CTL);
318 dev_priv->saveFDI_RXB_CTL = I915_READ(FDI_RXB_CTL);
319
320 dev_priv->savePFB_CTL_1 = I915_READ(PFB_CTL_1);
321 dev_priv->savePFB_WIN_SZ = I915_READ(PFB_WIN_SZ);
322 dev_priv->savePFB_WIN_POS = I915_READ(PFB_WIN_POS);
323
324 dev_priv->saveTRANS_HTOTAL_B = I915_READ(TRANS_HTOTAL_B);
325 dev_priv->saveTRANS_HBLANK_B = I915_READ(TRANS_HBLANK_B);
326 dev_priv->saveTRANS_HSYNC_B = I915_READ(TRANS_HSYNC_B);
327 dev_priv->saveTRANS_VTOTAL_B = I915_READ(TRANS_VTOTAL_B);
328 dev_priv->saveTRANS_VBLANK_B = I915_READ(TRANS_VBLANK_B);
329 dev_priv->saveTRANS_VSYNC_B = I915_READ(TRANS_VSYNC_B);
330 }
275 331
276 dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR); 332 dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR);
277 dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE); 333 dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE);
@@ -290,23 +346,41 @@ static void i915_save_modeset_reg(struct drm_device *dev)
290static void i915_restore_modeset_reg(struct drm_device *dev) 346static void i915_restore_modeset_reg(struct drm_device *dev)
291{ 347{
292 struct drm_i915_private *dev_priv = dev->dev_private; 348 struct drm_i915_private *dev_priv = dev->dev_private;
349 int dpll_a_reg, fpa0_reg, fpa1_reg;
350 int dpll_b_reg, fpb0_reg, fpb1_reg;
293 351
294 if (drm_core_check_feature(dev, DRIVER_MODESET)) 352 if (drm_core_check_feature(dev, DRIVER_MODESET))
295 return; 353 return;
296 354
355 if (IS_IGDNG(dev)) {
356 dpll_a_reg = PCH_DPLL_A;
357 dpll_b_reg = PCH_DPLL_B;
358 fpa0_reg = PCH_FPA0;
359 fpb0_reg = PCH_FPB0;
360 fpa1_reg = PCH_FPA1;
361 fpb1_reg = PCH_FPB1;
362 } else {
363 dpll_a_reg = DPLL_A;
364 dpll_b_reg = DPLL_B;
365 fpa0_reg = FPA0;
366 fpb0_reg = FPB0;
367 fpa1_reg = FPA1;
368 fpb1_reg = FPB1;
369 }
370
297 /* Pipe & plane A info */ 371 /* Pipe & plane A info */
298 /* Prime the clock */ 372 /* Prime the clock */
299 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { 373 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
300 I915_WRITE(DPLL_A, dev_priv->saveDPLL_A & 374 I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A &
301 ~DPLL_VCO_ENABLE); 375 ~DPLL_VCO_ENABLE);
302 DRM_UDELAY(150); 376 DRM_UDELAY(150);
303 } 377 }
304 I915_WRITE(FPA0, dev_priv->saveFPA0); 378 I915_WRITE(fpa0_reg, dev_priv->saveFPA0);
305 I915_WRITE(FPA1, dev_priv->saveFPA1); 379 I915_WRITE(fpa1_reg, dev_priv->saveFPA1);
306 /* Actually enable it */ 380 /* Actually enable it */
307 I915_WRITE(DPLL_A, dev_priv->saveDPLL_A); 381 I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A);
308 DRM_UDELAY(150); 382 DRM_UDELAY(150);
309 if (IS_I965G(dev)) 383 if (IS_I965G(dev) && !IS_IGDNG(dev))
310 I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD); 384 I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD);
311 DRM_UDELAY(150); 385 DRM_UDELAY(150);
312 386
@@ -317,7 +391,24 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
317 I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A); 391 I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A);
318 I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A); 392 I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A);
319 I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A); 393 I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A);
320 I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A); 394 if (!IS_IGDNG(dev))
395 I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A);
396
397 if (IS_IGDNG(dev)) {
398 I915_WRITE(FDI_RXA_CTL, dev_priv->saveFDI_RXA_CTL);
399 I915_WRITE(FDI_TXA_CTL, dev_priv->saveFDI_TXA_CTL);
400
401 I915_WRITE(PFA_CTL_1, dev_priv->savePFA_CTL_1);
402 I915_WRITE(PFA_WIN_SZ, dev_priv->savePFA_WIN_SZ);
403 I915_WRITE(PFA_WIN_POS, dev_priv->savePFA_WIN_POS);
404
405 I915_WRITE(TRANS_HTOTAL_A, dev_priv->saveTRANS_HTOTAL_A);
406 I915_WRITE(TRANS_HBLANK_A, dev_priv->saveTRANS_HBLANK_A);
407 I915_WRITE(TRANS_HSYNC_A, dev_priv->saveTRANS_HSYNC_A);
408 I915_WRITE(TRANS_VTOTAL_A, dev_priv->saveTRANS_VTOTAL_A);
409 I915_WRITE(TRANS_VBLANK_A, dev_priv->saveTRANS_VBLANK_A);
410 I915_WRITE(TRANS_VSYNC_A, dev_priv->saveTRANS_VSYNC_A);
411 }
321 412
322 /* Restore plane info */ 413 /* Restore plane info */
323 I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE); 414 I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE);
@@ -339,14 +430,14 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
339 430
340 /* Pipe & plane B info */ 431 /* Pipe & plane B info */
341 if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) { 432 if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) {
342 I915_WRITE(DPLL_B, dev_priv->saveDPLL_B & 433 I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B &
343 ~DPLL_VCO_ENABLE); 434 ~DPLL_VCO_ENABLE);
344 DRM_UDELAY(150); 435 DRM_UDELAY(150);
345 } 436 }
346 I915_WRITE(FPB0, dev_priv->saveFPB0); 437 I915_WRITE(fpb0_reg, dev_priv->saveFPB0);
347 I915_WRITE(FPB1, dev_priv->saveFPB1); 438 I915_WRITE(fpb1_reg, dev_priv->saveFPB1);
348 /* Actually enable it */ 439 /* Actually enable it */
349 I915_WRITE(DPLL_B, dev_priv->saveDPLL_B); 440 I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B);
350 DRM_UDELAY(150); 441 DRM_UDELAY(150);
351 if (IS_I965G(dev)) 442 if (IS_I965G(dev))
352 I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD); 443 I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD);
@@ -359,7 +450,24 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
359 I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B); 450 I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B);
360 I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B); 451 I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B);
361 I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B); 452 I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B);
362 I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B); 453 if (!IS_IGDNG(dev))
454 I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B);
455
456 if (IS_IGDNG(dev)) {
457 I915_WRITE(FDI_RXB_CTL, dev_priv->saveFDI_RXB_CTL);
458 I915_WRITE(FDI_TXB_CTL, dev_priv->saveFDI_TXB_CTL);
459
460 I915_WRITE(PFB_CTL_1, dev_priv->savePFB_CTL_1);
461 I915_WRITE(PFB_WIN_SZ, dev_priv->savePFB_WIN_SZ);
462 I915_WRITE(PFB_WIN_POS, dev_priv->savePFB_WIN_POS);
463
464 I915_WRITE(TRANS_HTOTAL_B, dev_priv->saveTRANS_HTOTAL_B);
465 I915_WRITE(TRANS_HBLANK_B, dev_priv->saveTRANS_HBLANK_B);
466 I915_WRITE(TRANS_HSYNC_B, dev_priv->saveTRANS_HSYNC_B);
467 I915_WRITE(TRANS_VTOTAL_B, dev_priv->saveTRANS_VTOTAL_B);
468 I915_WRITE(TRANS_VBLANK_B, dev_priv->saveTRANS_VBLANK_B);
469 I915_WRITE(TRANS_VSYNC_B, dev_priv->saveTRANS_VSYNC_B);
470 }
363 471
364 /* Restore plane info */ 472 /* Restore plane info */
365 I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE); 473 I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE);
@@ -404,21 +512,43 @@ void i915_save_display(struct drm_device *dev)
404 dev_priv->saveCURSIZE = I915_READ(CURSIZE); 512 dev_priv->saveCURSIZE = I915_READ(CURSIZE);
405 513
406 /* CRT state */ 514 /* CRT state */
407 dev_priv->saveADPA = I915_READ(ADPA); 515 if (IS_IGDNG(dev)) {
516 dev_priv->saveADPA = I915_READ(PCH_ADPA);
517 } else {
518 dev_priv->saveADPA = I915_READ(ADPA);
519 }
408 520
409 /* LVDS state */ 521 /* LVDS state */
410 dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL); 522 if (IS_IGDNG(dev)) {
411 dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS); 523 dev_priv->savePP_CONTROL = I915_READ(PCH_PP_CONTROL);
412 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL); 524 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_PCH_CTL1);
413 if (IS_I965G(dev)) 525 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_PCH_CTL2);
414 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); 526 dev_priv->saveBLC_CPU_PWM_CTL = I915_READ(BLC_PWM_CPU_CTL);
415 if (IS_MOBILE(dev) && !IS_I830(dev)) 527 dev_priv->saveBLC_CPU_PWM_CTL2 = I915_READ(BLC_PWM_CPU_CTL2);
416 dev_priv->saveLVDS = I915_READ(LVDS); 528 dev_priv->saveLVDS = I915_READ(PCH_LVDS);
417 if (!IS_I830(dev) && !IS_845G(dev)) 529 } else {
530 dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL);
531 dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS);
532 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL);
533 dev_priv->saveBLC_HIST_CTL = I915_READ(BLC_HIST_CTL);
534 if (IS_I965G(dev))
535 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
536 if (IS_MOBILE(dev) && !IS_I830(dev))
537 dev_priv->saveLVDS = I915_READ(LVDS);
538 }
539
540 if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
418 dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL); 541 dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
419 dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS); 542
420 dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS); 543 if (IS_IGDNG(dev)) {
421 dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR); 544 dev_priv->savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS);
545 dev_priv->savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS);
546 dev_priv->savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR);
547 } else {
548 dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS);
549 dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);
550 dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR);
551 }
422 552
423 /* Display Port state */ 553 /* Display Port state */
424 if (SUPPORTS_INTEGRATED_DP(dev)) { 554 if (SUPPORTS_INTEGRATED_DP(dev)) {
@@ -437,16 +567,23 @@ void i915_save_display(struct drm_device *dev)
437 /* FIXME: save TV & SDVO state */ 567 /* FIXME: save TV & SDVO state */
438 568
439 /* FBC state */ 569 /* FBC state */
440 dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE); 570 if (IS_GM45(dev)) {
441 dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE); 571 dev_priv->saveDPFC_CB_BASE = I915_READ(DPFC_CB_BASE);
442 dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2); 572 } else {
443 dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL); 573 dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
574 dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE);
575 dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2);
576 dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
577 }
444 578
445 /* VGA state */ 579 /* VGA state */
446 dev_priv->saveVGA0 = I915_READ(VGA0); 580 dev_priv->saveVGA0 = I915_READ(VGA0);
447 dev_priv->saveVGA1 = I915_READ(VGA1); 581 dev_priv->saveVGA1 = I915_READ(VGA1);
448 dev_priv->saveVGA_PD = I915_READ(VGA_PD); 582 dev_priv->saveVGA_PD = I915_READ(VGA_PD);
449 dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); 583 if (IS_IGDNG(dev))
584 dev_priv->saveVGACNTRL = I915_READ(CPU_VGACNTRL);
585 else
586 dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
450 587
451 i915_save_vga(dev); 588 i915_save_vga(dev);
452} 589}
@@ -485,22 +622,41 @@ void i915_restore_display(struct drm_device *dev)
485 I915_WRITE(CURSIZE, dev_priv->saveCURSIZE); 622 I915_WRITE(CURSIZE, dev_priv->saveCURSIZE);
486 623
487 /* CRT state */ 624 /* CRT state */
488 I915_WRITE(ADPA, dev_priv->saveADPA); 625 if (IS_IGDNG(dev))
626 I915_WRITE(PCH_ADPA, dev_priv->saveADPA);
627 else
628 I915_WRITE(ADPA, dev_priv->saveADPA);
489 629
490 /* LVDS state */ 630 /* LVDS state */
491 if (IS_I965G(dev)) 631 if (IS_I965G(dev) && !IS_IGDNG(dev))
492 I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2); 632 I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2);
493 if (IS_MOBILE(dev) && !IS_I830(dev)) 633
634 if (IS_IGDNG(dev)) {
635 I915_WRITE(PCH_LVDS, dev_priv->saveLVDS);
636 } else if (IS_MOBILE(dev) && !IS_I830(dev))
494 I915_WRITE(LVDS, dev_priv->saveLVDS); 637 I915_WRITE(LVDS, dev_priv->saveLVDS);
495 if (!IS_I830(dev) && !IS_845G(dev)) 638
639 if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
496 I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL); 640 I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL);
497 641
498 I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); 642 if (IS_IGDNG(dev)) {
499 I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL); 643 I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->saveBLC_PWM_CTL);
500 I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); 644 I915_WRITE(BLC_PWM_PCH_CTL2, dev_priv->saveBLC_PWM_CTL2);
501 I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); 645 I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL);
502 I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR); 646 I915_WRITE(BLC_PWM_CPU_CTL2, dev_priv->saveBLC_CPU_PWM_CTL2);
503 I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL); 647 I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
648 I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
649 I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR);
650 I915_WRITE(PCH_PP_CONTROL, dev_priv->savePP_CONTROL);
651 } else {
652 I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
653 I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
654 I915_WRITE(BLC_HIST_CTL, dev_priv->saveBLC_HIST_CTL);
655 I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
656 I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
657 I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);
658 I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
659 }
504 660
505 /* Display Port state */ 661 /* Display Port state */
506 if (SUPPORTS_INTEGRATED_DP(dev)) { 662 if (SUPPORTS_INTEGRATED_DP(dev)) {
@@ -511,13 +667,22 @@ void i915_restore_display(struct drm_device *dev)
511 /* FIXME: restore TV & SDVO state */ 667 /* FIXME: restore TV & SDVO state */
512 668
513 /* FBC info */ 669 /* FBC info */
514 I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE); 670 if (IS_GM45(dev)) {
515 I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE); 671 g4x_disable_fbc(dev);
516 I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2); 672 I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE);
517 I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL); 673 } else {
674 i8xx_disable_fbc(dev);
675 I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
676 I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
677 I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
678 I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL);
679 }
518 680
519 /* VGA state */ 681 /* VGA state */
520 I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); 682 if (IS_IGDNG(dev))
683 I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL);
684 else
685 I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
521 I915_WRITE(VGA0, dev_priv->saveVGA0); 686 I915_WRITE(VGA0, dev_priv->saveVGA0);
522 I915_WRITE(VGA1, dev_priv->saveVGA1); 687 I915_WRITE(VGA1, dev_priv->saveVGA1);
523 I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); 688 I915_WRITE(VGA_PD, dev_priv->saveVGA_PD);
@@ -543,8 +708,17 @@ int i915_save_state(struct drm_device *dev)
543 i915_save_display(dev); 708 i915_save_display(dev);
544 709
545 /* Interrupt state */ 710 /* Interrupt state */
546 dev_priv->saveIER = I915_READ(IER); 711 if (IS_IGDNG(dev)) {
547 dev_priv->saveIMR = I915_READ(IMR); 712 dev_priv->saveDEIER = I915_READ(DEIER);
713 dev_priv->saveDEIMR = I915_READ(DEIMR);
714 dev_priv->saveGTIER = I915_READ(GTIER);
715 dev_priv->saveGTIMR = I915_READ(GTIMR);
716 dev_priv->saveFDI_RXA_IMR = I915_READ(FDI_RXA_IMR);
717 dev_priv->saveFDI_RXB_IMR = I915_READ(FDI_RXB_IMR);
718 } else {
719 dev_priv->saveIER = I915_READ(IER);
720 dev_priv->saveIMR = I915_READ(IMR);
721 }
548 722
549 /* Clock gating state */ 723 /* Clock gating state */
550 dev_priv->saveD_STATE = I915_READ(D_STATE); 724 dev_priv->saveD_STATE = I915_READ(D_STATE);
@@ -609,8 +783,17 @@ int i915_restore_state(struct drm_device *dev)
609 i915_restore_display(dev); 783 i915_restore_display(dev);
610 784
611 /* Interrupt state */ 785 /* Interrupt state */
612 I915_WRITE (IER, dev_priv->saveIER); 786 if (IS_IGDNG(dev)) {
613 I915_WRITE (IMR, dev_priv->saveIMR); 787 I915_WRITE(DEIER, dev_priv->saveDEIER);
788 I915_WRITE(DEIMR, dev_priv->saveDEIMR);
789 I915_WRITE(GTIER, dev_priv->saveGTIER);
790 I915_WRITE(GTIMR, dev_priv->saveGTIMR);
791 I915_WRITE(FDI_RXA_IMR, dev_priv->saveFDI_RXA_IMR);
792 I915_WRITE(FDI_RXB_IMR, dev_priv->saveFDI_RXB_IMR);
793 } else {
794 I915_WRITE (IER, dev_priv->saveIER);
795 I915_WRITE (IMR, dev_priv->saveIMR);
796 }
614 797
615 /* Clock gating state */ 798 /* Clock gating state */
616 I915_WRITE (D_STATE, dev_priv->saveD_STATE); 799 I915_WRITE (D_STATE, dev_priv->saveD_STATE);
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 4337414846b6..96cd256e60e6 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -351,20 +351,18 @@ parse_driver_features(struct drm_i915_private *dev_priv,
351 struct drm_device *dev = dev_priv->dev; 351 struct drm_device *dev = dev_priv->dev;
352 struct bdb_driver_features *driver; 352 struct bdb_driver_features *driver;
353 353
354 /* set default for chips without eDP */
355 if (!SUPPORTS_EDP(dev)) {
356 dev_priv->edp_support = 0;
357 return;
358 }
359
360 driver = find_section(bdb, BDB_DRIVER_FEATURES); 354 driver = find_section(bdb, BDB_DRIVER_FEATURES);
361 if (!driver) 355 if (!driver)
362 return; 356 return;
363 357
364 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP) 358 if (driver && SUPPORTS_EDP(dev) &&
359 driver->lvds_config == BDB_DRIVER_FEATURE_EDP) {
365 dev_priv->edp_support = 1; 360 dev_priv->edp_support = 1;
361 } else {
362 dev_priv->edp_support = 0;
363 }
366 364
367 if (driver->dual_frequency) 365 if (driver && driver->dual_frequency)
368 dev_priv->render_reclock_avail = true; 366 dev_priv->render_reclock_avail = true;
369} 367}
370 368
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3c14240cc002..3ba6546b7c7f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -943,6 +943,7 @@ intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
943 clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2); 943 clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2);
944 clock.p = (clock.p1 * clock.p2); 944 clock.p = (clock.p1 * clock.p2);
945 clock.dot = 96000 * clock.m / (clock.n + 2) / clock.p; 945 clock.dot = 96000 * clock.m / (clock.n + 2) / clock.p;
946 clock.vco = 0;
946 memcpy(best_clock, &clock, sizeof(intel_clock_t)); 947 memcpy(best_clock, &clock, sizeof(intel_clock_t));
947 return true; 948 return true;
948} 949}
@@ -1260,9 +1261,11 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
1260 return ret; 1261 return ret;
1261 } 1262 }
1262 1263
1263 /* Pre-i965 needs to install a fence for tiled scan-out */ 1264 /* Install a fence for tiled scan-out. Pre-i965 always needs a fence,
1264 if (!IS_I965G(dev) && 1265 * whereas 965+ only requires a fence if using framebuffer compression.
1265 obj_priv->fence_reg == I915_FENCE_REG_NONE && 1266 * For simplicity, we always install a fence as the cost is not that onerous.
1267 */
1268 if (obj_priv->fence_reg == I915_FENCE_REG_NONE &&
1266 obj_priv->tiling_mode != I915_TILING_NONE) { 1269 obj_priv->tiling_mode != I915_TILING_NONE) {
1267 ret = i915_gem_object_get_fence_reg(obj); 1270 ret = i915_gem_object_get_fence_reg(obj);
1268 if (ret != 0) { 1271 if (ret != 0) {
@@ -1513,7 +1516,7 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1513 /* Enable panel fitting for LVDS */ 1516 /* Enable panel fitting for LVDS */
1514 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { 1517 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
1515 temp = I915_READ(pf_ctl_reg); 1518 temp = I915_READ(pf_ctl_reg);
1516 I915_WRITE(pf_ctl_reg, temp | PF_ENABLE); 1519 I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3);
1517 1520
1518 /* currently full aspect */ 1521 /* currently full aspect */
1519 I915_WRITE(pf_win_pos, 0); 1522 I915_WRITE(pf_win_pos, 0);
@@ -1801,6 +1804,8 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
1801 case DRM_MODE_DPMS_ON: 1804 case DRM_MODE_DPMS_ON:
1802 case DRM_MODE_DPMS_STANDBY: 1805 case DRM_MODE_DPMS_STANDBY:
1803 case DRM_MODE_DPMS_SUSPEND: 1806 case DRM_MODE_DPMS_SUSPEND:
1807 intel_update_watermarks(dev);
1808
1804 /* Enable the DPLL */ 1809 /* Enable the DPLL */
1805 temp = I915_READ(dpll_reg); 1810 temp = I915_READ(dpll_reg);
1806 if ((temp & DPLL_VCO_ENABLE) == 0) { 1811 if ((temp & DPLL_VCO_ENABLE) == 0) {
@@ -1838,7 +1843,6 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
1838 1843
1839 /* Give the overlay scaler a chance to enable if it's on this pipe */ 1844 /* Give the overlay scaler a chance to enable if it's on this pipe */
1840 //intel_crtc_dpms_video(crtc, true); TODO 1845 //intel_crtc_dpms_video(crtc, true); TODO
1841 intel_update_watermarks(dev);
1842 break; 1846 break;
1843 case DRM_MODE_DPMS_OFF: 1847 case DRM_MODE_DPMS_OFF:
1844 intel_update_watermarks(dev); 1848 intel_update_watermarks(dev);
@@ -2082,7 +2086,7 @@ fdi_reduce_ratio(u32 *num, u32 *den)
2082#define LINK_N 0x80000 2086#define LINK_N 0x80000
2083 2087
2084static void 2088static void
2085igdng_compute_m_n(int bytes_per_pixel, int nlanes, 2089igdng_compute_m_n(int bits_per_pixel, int nlanes,
2086 int pixel_clock, int link_clock, 2090 int pixel_clock, int link_clock,
2087 struct fdi_m_n *m_n) 2091 struct fdi_m_n *m_n)
2088{ 2092{
@@ -2092,7 +2096,8 @@ igdng_compute_m_n(int bytes_per_pixel, int nlanes,
2092 2096
2093 temp = (u64) DATA_N * pixel_clock; 2097 temp = (u64) DATA_N * pixel_clock;
2094 temp = div_u64(temp, link_clock); 2098 temp = div_u64(temp, link_clock);
2095 m_n->gmch_m = div_u64(temp * bytes_per_pixel, nlanes); 2099 m_n->gmch_m = div_u64(temp * bits_per_pixel, nlanes);
2100 m_n->gmch_m >>= 3; /* convert to bytes_per_pixel */
2096 m_n->gmch_n = DATA_N; 2101 m_n->gmch_n = DATA_N;
2097 fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n); 2102 fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n);
2098 2103
@@ -2140,6 +2145,13 @@ static struct intel_watermark_params igd_cursor_hplloff_wm = {
2140 IGD_CURSOR_GUARD_WM, 2145 IGD_CURSOR_GUARD_WM,
2141 IGD_FIFO_LINE_SIZE 2146 IGD_FIFO_LINE_SIZE
2142}; 2147};
2148static struct intel_watermark_params g4x_wm_info = {
2149 G4X_FIFO_SIZE,
2150 G4X_MAX_WM,
2151 G4X_MAX_WM,
2152 2,
2153 G4X_FIFO_LINE_SIZE,
2154};
2143static struct intel_watermark_params i945_wm_info = { 2155static struct intel_watermark_params i945_wm_info = {
2144 I945_FIFO_SIZE, 2156 I945_FIFO_SIZE,
2145 I915_MAX_WM, 2157 I915_MAX_WM,
@@ -2430,17 +2442,74 @@ static int i830_get_fifo_size(struct drm_device *dev, int plane)
2430 return size; 2442 return size;
2431} 2443}
2432 2444
2433static void g4x_update_wm(struct drm_device *dev, int unused, int unused2, 2445static void g4x_update_wm(struct drm_device *dev, int planea_clock,
2434 int unused3, int unused4) 2446 int planeb_clock, int sr_hdisplay, int pixel_size)
2435{ 2447{
2436 struct drm_i915_private *dev_priv = dev->dev_private; 2448 struct drm_i915_private *dev_priv = dev->dev_private;
2437 u32 fw_blc_self = I915_READ(FW_BLC_SELF); 2449 int total_size, cacheline_size;
2450 int planea_wm, planeb_wm, cursora_wm, cursorb_wm, cursor_sr;
2451 struct intel_watermark_params planea_params, planeb_params;
2452 unsigned long line_time_us;
2453 int sr_clock, sr_entries = 0, entries_required;
2438 2454
2439 if (i915_powersave) 2455 /* Create copies of the base settings for each pipe */
2440 fw_blc_self |= FW_BLC_SELF_EN; 2456 planea_params = planeb_params = g4x_wm_info;
2441 else 2457
2442 fw_blc_self &= ~FW_BLC_SELF_EN; 2458 /* Grab a couple of global values before we overwrite them */
2443 I915_WRITE(FW_BLC_SELF, fw_blc_self); 2459 total_size = planea_params.fifo_size;
2460 cacheline_size = planea_params.cacheline_size;
2461
2462 /*
2463 * Note: we need to make sure we don't overflow for various clock &
2464 * latency values.
2465 * clocks go from a few thousand to several hundred thousand.
2466 * latency is usually a few thousand
2467 */
2468 entries_required = ((planea_clock / 1000) * pixel_size * latency_ns) /
2469 1000;
2470 entries_required /= G4X_FIFO_LINE_SIZE;
2471 planea_wm = entries_required + planea_params.guard_size;
2472
2473 entries_required = ((planeb_clock / 1000) * pixel_size * latency_ns) /
2474 1000;
2475 entries_required /= G4X_FIFO_LINE_SIZE;
2476 planeb_wm = entries_required + planeb_params.guard_size;
2477
2478 cursora_wm = cursorb_wm = 16;
2479 cursor_sr = 32;
2480
2481 DRM_DEBUG("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
2482
2483 /* Calc sr entries for one plane configs */
2484 if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
2485 /* self-refresh has much higher latency */
2486 const static int sr_latency_ns = 12000;
2487
2488 sr_clock = planea_clock ? planea_clock : planeb_clock;
2489 line_time_us = ((sr_hdisplay * 1000) / sr_clock);
2490
2491 /* Use ns/us then divide to preserve precision */
2492 sr_entries = (((sr_latency_ns / line_time_us) + 1) *
2493 pixel_size * sr_hdisplay) / 1000;
2494 sr_entries = roundup(sr_entries / cacheline_size, 1);
2495 DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
2496 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
2497 }
2498
2499 DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n",
2500 planea_wm, planeb_wm, sr_entries);
2501
2502 planea_wm &= 0x3f;
2503 planeb_wm &= 0x3f;
2504
2505 I915_WRITE(DSPFW1, (sr_entries << DSPFW_SR_SHIFT) |
2506 (cursorb_wm << DSPFW_CURSORB_SHIFT) |
2507 (planeb_wm << DSPFW_PLANEB_SHIFT) | planea_wm);
2508 I915_WRITE(DSPFW2, (I915_READ(DSPFW2) & DSPFW_CURSORA_MASK) |
2509 (cursora_wm << DSPFW_CURSORA_SHIFT));
2510 /* HPLL off in SR has some issues on G4x... disable it */
2511 I915_WRITE(DSPFW3, (I915_READ(DSPFW3) & ~DSPFW_HPLL_SR_EN) |
2512 (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
2444} 2513}
2445 2514
2446static void i965_update_wm(struct drm_device *dev, int unused, int unused2, 2515static void i965_update_wm(struct drm_device *dev, int unused, int unused2,
@@ -2586,6 +2655,9 @@ static void intel_update_watermarks(struct drm_device *dev)
2586 unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0; 2655 unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0;
2587 int enabled = 0, pixel_size = 0; 2656 int enabled = 0, pixel_size = 0;
2588 2657
2658 if (!dev_priv->display.update_wm)
2659 return;
2660
2589 /* Get the clock config from both planes */ 2661 /* Get the clock config from both planes */
2590 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 2662 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
2591 intel_crtc = to_intel_crtc(crtc); 2663 intel_crtc = to_intel_crtc(crtc);
@@ -2763,7 +2835,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2763 2835
2764 /* FDI link */ 2836 /* FDI link */
2765 if (IS_IGDNG(dev)) { 2837 if (IS_IGDNG(dev)) {
2766 int lane, link_bw; 2838 int lane, link_bw, bpp;
2767 /* eDP doesn't require FDI link, so just set DP M/N 2839 /* eDP doesn't require FDI link, so just set DP M/N
2768 according to current link config */ 2840 according to current link config */
2769 if (is_edp) { 2841 if (is_edp) {
@@ -2782,10 +2854,72 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2782 lane = 4; 2854 lane = 4;
2783 link_bw = 270000; 2855 link_bw = 270000;
2784 } 2856 }
2785 igdng_compute_m_n(3, lane, target_clock, 2857
2858 /* determine panel color depth */
2859 temp = I915_READ(pipeconf_reg);
2860
2861 switch (temp & PIPE_BPC_MASK) {
2862 case PIPE_8BPC:
2863 bpp = 24;
2864 break;
2865 case PIPE_10BPC:
2866 bpp = 30;
2867 break;
2868 case PIPE_6BPC:
2869 bpp = 18;
2870 break;
2871 case PIPE_12BPC:
2872 bpp = 36;
2873 break;
2874 default:
2875 DRM_ERROR("unknown pipe bpc value\n");
2876 bpp = 24;
2877 }
2878
2879 igdng_compute_m_n(bpp, lane, target_clock,
2786 link_bw, &m_n); 2880 link_bw, &m_n);
2787 } 2881 }
2788 2882
2883 /* Ironlake: try to setup display ref clock before DPLL
2884 * enabling. This is only under driver's control after
2885 * PCH B stepping, previous chipset stepping should be
2886 * ignoring this setting.
2887 */
2888 if (IS_IGDNG(dev)) {
2889 temp = I915_READ(PCH_DREF_CONTROL);
2890 /* Always enable nonspread source */
2891 temp &= ~DREF_NONSPREAD_SOURCE_MASK;
2892 temp |= DREF_NONSPREAD_SOURCE_ENABLE;
2893 I915_WRITE(PCH_DREF_CONTROL, temp);
2894 POSTING_READ(PCH_DREF_CONTROL);
2895
2896 temp &= ~DREF_SSC_SOURCE_MASK;
2897 temp |= DREF_SSC_SOURCE_ENABLE;
2898 I915_WRITE(PCH_DREF_CONTROL, temp);
2899 POSTING_READ(PCH_DREF_CONTROL);
2900
2901 udelay(200);
2902
2903 if (is_edp) {
2904 if (dev_priv->lvds_use_ssc) {
2905 temp |= DREF_SSC1_ENABLE;
2906 I915_WRITE(PCH_DREF_CONTROL, temp);
2907 POSTING_READ(PCH_DREF_CONTROL);
2908
2909 udelay(200);
2910
2911 temp &= ~DREF_CPU_SOURCE_OUTPUT_MASK;
2912 temp |= DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD;
2913 I915_WRITE(PCH_DREF_CONTROL, temp);
2914 POSTING_READ(PCH_DREF_CONTROL);
2915 } else {
2916 temp |= DREF_CPU_SOURCE_OUTPUT_NONSPREAD;
2917 I915_WRITE(PCH_DREF_CONTROL, temp);
2918 POSTING_READ(PCH_DREF_CONTROL);
2919 }
2920 }
2921 }
2922
2789 if (IS_IGD(dev)) { 2923 if (IS_IGD(dev)) {
2790 fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2; 2924 fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2;
2791 if (has_reduced_clock) 2925 if (has_reduced_clock)
@@ -2936,6 +3070,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2936 3070
2937 lvds = I915_READ(lvds_reg); 3071 lvds = I915_READ(lvds_reg);
2938 lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT; 3072 lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT;
3073 /* set the corresponsding LVDS_BORDER bit */
3074 lvds |= dev_priv->lvds_border_bits;
2939 /* Set the B0-B3 data pairs corresponding to whether we're going to 3075 /* Set the B0-B3 data pairs corresponding to whether we're going to
2940 * set the DPLLs for dual-channel mode or not. 3076 * set the DPLLs for dual-channel mode or not.
2941 */ 3077 */
@@ -4124,7 +4260,9 @@ void intel_init_clock_gating(struct drm_device *dev)
4124 * Disable clock gating reported to work incorrectly according to the 4260 * Disable clock gating reported to work incorrectly according to the
4125 * specs, but enable as much else as we can. 4261 * specs, but enable as much else as we can.
4126 */ 4262 */
4127 if (IS_G4X(dev)) { 4263 if (IS_IGDNG(dev)) {
4264 return;
4265 } else if (IS_G4X(dev)) {
4128 uint32_t dspclk_gate; 4266 uint32_t dspclk_gate;
4129 I915_WRITE(RENCLK_GATE_D1, 0); 4267 I915_WRITE(RENCLK_GATE_D1, 0);
4130 I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE | 4268 I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE |
@@ -4212,7 +4350,9 @@ static void intel_init_display(struct drm_device *dev)
4212 i830_get_display_clock_speed; 4350 i830_get_display_clock_speed;
4213 4351
4214 /* For FIFO watermark updates */ 4352 /* For FIFO watermark updates */
4215 if (IS_G4X(dev)) 4353 if (IS_IGDNG(dev))
4354 dev_priv->display.update_wm = NULL;
4355 else if (IS_G4X(dev))
4216 dev_priv->display.update_wm = g4x_update_wm; 4356 dev_priv->display.update_wm = g4x_update_wm;
4217 else if (IS_I965G(dev)) 4357 else if (IS_I965G(dev))
4218 dev_priv->display.update_wm = i965_update_wm; 4358 dev_priv->display.update_wm = i965_update_wm;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f4856a510476..d83447557f9b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -400,7 +400,7 @@ intel_dp_i2c_init(struct intel_output *intel_output, const char *name)
400{ 400{
401 struct intel_dp_priv *dp_priv = intel_output->dev_priv; 401 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
402 402
403 DRM_ERROR("i2c_init %s\n", name); 403 DRM_DEBUG_KMS("i2c_init %s\n", name);
404 dp_priv->algo.running = false; 404 dp_priv->algo.running = false;
405 dp_priv->algo.address = 0; 405 dp_priv->algo.address = 0;
406 dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch; 406 dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 808bbe412ba8..05598ae10c4b 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -380,7 +380,7 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
380 adjusted_mode->crtc_vblank_start + vsync_pos; 380 adjusted_mode->crtc_vblank_start + vsync_pos;
381 /* keep the vsync width constant */ 381 /* keep the vsync width constant */
382 adjusted_mode->crtc_vsync_end = 382 adjusted_mode->crtc_vsync_end =
383 adjusted_mode->crtc_vblank_start + vsync_width; 383 adjusted_mode->crtc_vsync_start + vsync_width;
384 border = 1; 384 border = 1;
385 break; 385 break;
386 case DRM_MODE_SCALE_ASPECT: 386 case DRM_MODE_SCALE_ASPECT:
@@ -526,6 +526,14 @@ out:
526 lvds_priv->pfit_control = pfit_control; 526 lvds_priv->pfit_control = pfit_control;
527 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios; 527 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
528 /* 528 /*
529 * When there exists the border, it means that the LVDS_BORDR
530 * should be enabled.
531 */
532 if (border)
533 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
534 else
535 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
536 /*
529 * XXX: It would be nice to support lower refresh rates on the 537 * XXX: It would be nice to support lower refresh rates on the
530 * panels to reduce power consumption, and perhaps match the 538 * panels to reduce power consumption, and perhaps match the
531 * user's requested refresh rate. 539 * user's requested refresh rate.
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index 63c53d65e875..4d76ba473097 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -1046,15 +1046,6 @@ static void ide_port_init_devices(ide_hwif_t *hwif)
1046 if (port_ops && port_ops->init_dev) 1046 if (port_ops && port_ops->init_dev)
1047 port_ops->init_dev(drive); 1047 port_ops->init_dev(drive);
1048 } 1048 }
1049
1050 ide_port_for_each_dev(i, drive, hwif) {
1051 /*
1052 * default to PIO Mode 0 before we figure out
1053 * the most suited mode for the attached device
1054 */
1055 if (port_ops && port_ops->set_pio_mode)
1056 port_ops->set_pio_mode(drive, 0);
1057 }
1058} 1049}
1059 1050
1060static void ide_init_port(ide_hwif_t *hwif, unsigned int port, 1051static void ide_init_port(ide_hwif_t *hwif, unsigned int port,
diff --git a/drivers/isdn/hardware/eicon/maintidi.c b/drivers/isdn/hardware/eicon/maintidi.c
index 23960cb6eaab..41c26e756452 100644
--- a/drivers/isdn/hardware/eicon/maintidi.c
+++ b/drivers/isdn/hardware/eicon/maintidi.c
@@ -959,8 +959,9 @@ static int process_idi_event (diva_strace_context_t* pLib,
959 } 959 }
960 if (!strncmp("State\\Layer2 No1", path, pVar->path_length)) { 960 if (!strncmp("State\\Layer2 No1", path, pVar->path_length)) {
961 char* tmp = &pLib->lines[0].pInterface->Layer2[0]; 961 char* tmp = &pLib->lines[0].pInterface->Layer2[0];
962 dword l2_state; 962 dword l2_state;
963 diva_strace_read_uint (pVar, &l2_state); 963 if (diva_strace_read_uint(pVar, &l2_state))
964 return -1;
964 965
965 switch (l2_state) { 966 switch (l2_state) {
966 case 0: 967 case 0:
diff --git a/drivers/isdn/hardware/eicon/message.c b/drivers/isdn/hardware/eicon/message.c
index 27d5dd68f4fb..ae89fb89da64 100644
--- a/drivers/isdn/hardware/eicon/message.c
+++ b/drivers/isdn/hardware/eicon/message.c
@@ -2692,7 +2692,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
2692 if (!(fax_control_bits & T30_CONTROL_BIT_MORE_DOCUMENTS) 2692 if (!(fax_control_bits & T30_CONTROL_BIT_MORE_DOCUMENTS)
2693 || (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS)) 2693 || (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS))
2694 { 2694 {
2695 len = (byte)(&(((T30_INFO *) 0)->universal_6)); 2695 len = offsetof(T30_INFO, universal_6);
2696 fax_info_change = false; 2696 fax_info_change = false;
2697 if (ncpi->length >= 4) 2697 if (ncpi->length >= 4)
2698 { 2698 {
@@ -2754,7 +2754,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
2754 for (i = 0; i < w; i++) 2754 for (i = 0; i < w; i++)
2755 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id[i] = fax_parms[4].info[1+i]; 2755 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id[i] = fax_parms[4].info[1+i];
2756 ((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0; 2756 ((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0;
2757 len = (byte)(((T30_INFO *) 0)->station_id + 20); 2757 len = offsetof(T30_INFO, station_id) + 20;
2758 w = fax_parms[5].length; 2758 w = fax_parms[5].length;
2759 if (w > 20) 2759 if (w > 20)
2760 w = 20; 2760 w = 20;
@@ -2788,7 +2788,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
2788 } 2788 }
2789 else 2789 else
2790 { 2790 {
2791 len = (byte)(&(((T30_INFO *) 0)->universal_6)); 2791 len = offsetof(T30_INFO, universal_6);
2792 } 2792 }
2793 fax_info_change = true; 2793 fax_info_change = true;
2794 2794
@@ -2892,7 +2892,7 @@ static byte connect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
2892 && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF) 2892 && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF)
2893 && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP)) 2893 && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP))
2894 { 2894 {
2895 len = ((byte)(((T30_INFO *) 0)->station_id + 20)); 2895 len = offsetof(T30_INFO, station_id) + 20;
2896 if (plci->fax_connect_info_length < len) 2896 if (plci->fax_connect_info_length < len)
2897 { 2897 {
2898 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; 2898 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0;
@@ -3802,7 +3802,7 @@ static byte manufacturer_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
3802 break; 3802 break;
3803 } 3803 }
3804 ncpi = &m_parms[1]; 3804 ncpi = &m_parms[1];
3805 len = ((byte)(((T30_INFO *) 0)->station_id + 20)); 3805 len = offsetof(T30_INFO, station_id) + 20;
3806 if (plci->fax_connect_info_length < len) 3806 if (plci->fax_connect_info_length < len)
3807 { 3807 {
3808 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; 3808 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0;
@@ -6844,7 +6844,7 @@ static void nl_ind(PLCI *plci)
6844 if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id-1]) 6844 if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id-1])
6845 & ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD))) 6845 & ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD)))
6846 { 6846 {
6847 i = ((word)(((T30_INFO *) 0)->station_id + 20)) + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len; 6847 i = offsetof(T30_INFO, station_id) + 20 + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len;
6848 while (i < plci->NL.RBuffer->length) 6848 while (i < plci->NL.RBuffer->length)
6849 plci->ncpi_buffer[++len] = plci->NL.RBuffer->P[i++]; 6849 plci->ncpi_buffer[++len] = plci->NL.RBuffer->P[i++];
6850 } 6850 }
@@ -7236,7 +7236,7 @@ static void nl_ind(PLCI *plci)
7236 { 7236 {
7237 plci->RData[1].P = plci->RData[0].P; 7237 plci->RData[1].P = plci->RData[0].P;
7238 plci->RData[1].PLength = plci->RData[0].PLength; 7238 plci->RData[1].PLength = plci->RData[0].PLength;
7239 plci->RData[0].P = v120_header_buffer + (-((int) v120_header_buffer) & 3); 7239 plci->RData[0].P = v120_header_buffer + (-((unsigned long)v120_header_buffer) & 3);
7240 if ((plci->NL.RBuffer->P[0] & V120_HEADER_EXTEND_BIT) || (plci->NL.RLength == 1)) 7240 if ((plci->NL.RBuffer->P[0] & V120_HEADER_EXTEND_BIT) || (plci->NL.RLength == 1))
7241 plci->RData[0].PLength = 1; 7241 plci->RData[0].PLength = 1;
7242 else 7242 else
@@ -8473,7 +8473,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp)
8473 fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING; 8473 fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING;
8474 } 8474 }
8475 len = nlc[0]; 8475 len = nlc[0];
8476 pos = ((byte)(((T30_INFO *) 0)->station_id + 20)); 8476 pos = offsetof(T30_INFO, station_id) + 20;
8477 if (pos < plci->fax_connect_info_length) 8477 if (pos < plci->fax_connect_info_length)
8478 { 8478 {
8479 for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--) 8479 for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--)
@@ -8525,7 +8525,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp)
8525 } 8525 }
8526 8526
8527 PUT_WORD(&(((T30_INFO *)&nlc[1])->control_bits_low), fax_control_bits); 8527 PUT_WORD(&(((T30_INFO *)&nlc[1])->control_bits_low), fax_control_bits);
8528 len = ((byte)(((T30_INFO *) 0)->station_id + 20)); 8528 len = offsetof(T30_INFO, station_id) + 20;
8529 for (i = 0; i < len; i++) 8529 for (i = 0; i < len; i++)
8530 plci->fax_connect_info_buffer[i] = nlc[1+i]; 8530 plci->fax_connect_info_buffer[i] = nlc[1+i];
8531 ((T30_INFO *) plci->fax_connect_info_buffer)->head_line_len = 0; 8531 ((T30_INFO *) plci->fax_connect_info_buffer)->head_line_len = 0;
diff --git a/drivers/isdn/hisax/amd7930_fn.c b/drivers/isdn/hisax/amd7930_fn.c
index bf526a7a63af..d6fdf1f66754 100644
--- a/drivers/isdn/hisax/amd7930_fn.c
+++ b/drivers/isdn/hisax/amd7930_fn.c
@@ -594,6 +594,7 @@ Amd7930_l1hw(struct PStack *st, int pr, void *arg)
594 if (cs->debug & L1_DEB_WARN) 594 if (cs->debug & L1_DEB_WARN)
595 debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen"); 595 debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen");
596 skb_queue_tail(&cs->sq, skb); 596 skb_queue_tail(&cs->sq, skb);
597 spin_unlock_irqrestore(&cs->lock, flags);
597 break; 598 break;
598 } 599 }
599 if (cs->debug & DEB_DLOG_HEX) 600 if (cs->debug & DEB_DLOG_HEX)
diff --git a/drivers/isdn/hisax/diva.c b/drivers/isdn/hisax/diva.c
index 018bd293e580..0b0c2e5d806b 100644
--- a/drivers/isdn/hisax/diva.c
+++ b/drivers/isdn/hisax/diva.c
@@ -382,7 +382,7 @@ MemwaitforXFW(struct IsdnCardState *cs, int hscx)
382{ 382{
383 int to = 50; 383 int to = 50;
384 384
385 while ((!(MemReadHSCX(cs, hscx, HSCX_STAR) & 0x44) == 0x40) && to) { 385 while (((MemReadHSCX(cs, hscx, HSCX_STAR) & 0x44) != 0x40) && to) {
386 udelay(1); 386 udelay(1);
387 to--; 387 to--;
388 } 388 }
diff --git a/drivers/isdn/hisax/elsa_ser.c b/drivers/isdn/hisax/elsa_ser.c
index f181db464392..1657bba7879e 100644
--- a/drivers/isdn/hisax/elsa_ser.c
+++ b/drivers/isdn/hisax/elsa_ser.c
@@ -477,62 +477,62 @@ static void
477modem_set_init(struct IsdnCardState *cs) { 477modem_set_init(struct IsdnCardState *cs) {
478 int timeout; 478 int timeout;
479 479
480#define RCV_DELAY 20000 480#define RCV_DELAY 20
481 modem_write_cmd(cs, MInit_1, strlen(MInit_1)); 481 modem_write_cmd(cs, MInit_1, strlen(MInit_1));
482 timeout = 1000; 482 timeout = 1000;
483 while(timeout-- && cs->hw.elsa.transcnt) 483 while(timeout-- && cs->hw.elsa.transcnt)
484 udelay(1000); 484 udelay(1000);
485 debugl1(cs, "msi tout=%d", timeout); 485 debugl1(cs, "msi tout=%d", timeout);
486 udelay(RCV_DELAY); 486 mdelay(RCV_DELAY);
487 modem_write_cmd(cs, MInit_2, strlen(MInit_2)); 487 modem_write_cmd(cs, MInit_2, strlen(MInit_2));
488 timeout = 1000; 488 timeout = 1000;
489 while(timeout-- && cs->hw.elsa.transcnt) 489 while(timeout-- && cs->hw.elsa.transcnt)
490 udelay(1000); 490 udelay(1000);
491 debugl1(cs, "msi tout=%d", timeout); 491 debugl1(cs, "msi tout=%d", timeout);
492 udelay(RCV_DELAY); 492 mdelay(RCV_DELAY);
493 modem_write_cmd(cs, MInit_3, strlen(MInit_3)); 493 modem_write_cmd(cs, MInit_3, strlen(MInit_3));
494 timeout = 1000; 494 timeout = 1000;
495 while(timeout-- && cs->hw.elsa.transcnt) 495 while(timeout-- && cs->hw.elsa.transcnt)
496 udelay(1000); 496 udelay(1000);
497 debugl1(cs, "msi tout=%d", timeout); 497 debugl1(cs, "msi tout=%d", timeout);
498 udelay(RCV_DELAY); 498 mdelay(RCV_DELAY);
499 modem_write_cmd(cs, MInit_4, strlen(MInit_4)); 499 modem_write_cmd(cs, MInit_4, strlen(MInit_4));
500 timeout = 1000; 500 timeout = 1000;
501 while(timeout-- && cs->hw.elsa.transcnt) 501 while(timeout-- && cs->hw.elsa.transcnt)
502 udelay(1000); 502 udelay(1000);
503 debugl1(cs, "msi tout=%d", timeout); 503 debugl1(cs, "msi tout=%d", timeout);
504 udelay(RCV_DELAY ); 504 mdelay(RCV_DELAY);
505 modem_write_cmd(cs, MInit_5, strlen(MInit_5)); 505 modem_write_cmd(cs, MInit_5, strlen(MInit_5));
506 timeout = 1000; 506 timeout = 1000;
507 while(timeout-- && cs->hw.elsa.transcnt) 507 while(timeout-- && cs->hw.elsa.transcnt)
508 udelay(1000); 508 udelay(1000);
509 debugl1(cs, "msi tout=%d", timeout); 509 debugl1(cs, "msi tout=%d", timeout);
510 udelay(RCV_DELAY); 510 mdelay(RCV_DELAY);
511 modem_write_cmd(cs, MInit_6, strlen(MInit_6)); 511 modem_write_cmd(cs, MInit_6, strlen(MInit_6));
512 timeout = 1000; 512 timeout = 1000;
513 while(timeout-- && cs->hw.elsa.transcnt) 513 while(timeout-- && cs->hw.elsa.transcnt)
514 udelay(1000); 514 udelay(1000);
515 debugl1(cs, "msi tout=%d", timeout); 515 debugl1(cs, "msi tout=%d", timeout);
516 udelay(RCV_DELAY); 516 mdelay(RCV_DELAY);
517 modem_write_cmd(cs, MInit_7, strlen(MInit_7)); 517 modem_write_cmd(cs, MInit_7, strlen(MInit_7));
518 timeout = 1000; 518 timeout = 1000;
519 while(timeout-- && cs->hw.elsa.transcnt) 519 while(timeout-- && cs->hw.elsa.transcnt)
520 udelay(1000); 520 udelay(1000);
521 debugl1(cs, "msi tout=%d", timeout); 521 debugl1(cs, "msi tout=%d", timeout);
522 udelay(RCV_DELAY); 522 mdelay(RCV_DELAY);
523} 523}
524 524
525static void 525static void
526modem_set_dial(struct IsdnCardState *cs, int outgoing) { 526modem_set_dial(struct IsdnCardState *cs, int outgoing) {
527 int timeout; 527 int timeout;
528#define RCV_DELAY 20000 528#define RCV_DELAY 20
529 529
530 modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800)); 530 modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800));
531 timeout = 1000; 531 timeout = 1000;
532 while(timeout-- && cs->hw.elsa.transcnt) 532 while(timeout-- && cs->hw.elsa.transcnt)
533 udelay(1000); 533 udelay(1000);
534 debugl1(cs, "msi tout=%d", timeout); 534 debugl1(cs, "msi tout=%d", timeout);
535 udelay(RCV_DELAY); 535 mdelay(RCV_DELAY);
536 if (outgoing) 536 if (outgoing)
537 modem_write_cmd(cs, MInit_dialout, strlen(MInit_dialout)); 537 modem_write_cmd(cs, MInit_dialout, strlen(MInit_dialout));
538 else 538 else
@@ -541,7 +541,7 @@ modem_set_dial(struct IsdnCardState *cs, int outgoing) {
541 while(timeout-- && cs->hw.elsa.transcnt) 541 while(timeout-- && cs->hw.elsa.transcnt)
542 udelay(1000); 542 udelay(1000);
543 debugl1(cs, "msi tout=%d", timeout); 543 debugl1(cs, "msi tout=%d", timeout);
544 udelay(RCV_DELAY); 544 mdelay(RCV_DELAY);
545} 545}
546 546
547static void 547static void
diff --git a/drivers/isdn/hisax/hfc_usb.c b/drivers/isdn/hisax/hfc_usb.c
index 9de54202c90c..a420b64472e3 100644
--- a/drivers/isdn/hisax/hfc_usb.c
+++ b/drivers/isdn/hisax/hfc_usb.c
@@ -817,8 +817,8 @@ collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, int finish)
817 } 817 }
818 /* we have a complete hdlc packet */ 818 /* we have a complete hdlc packet */
819 if (finish) { 819 if (finish) {
820 if ((!fifo->skbuff->data[fifo->skbuff->len - 1]) 820 if (fifo->skbuff->len > 3 &&
821 && (fifo->skbuff->len > 3)) { 821 !fifo->skbuff->data[fifo->skbuff->len - 1]) {
822 822
823 if (fifon == HFCUSB_D_RX) { 823 if (fifon == HFCUSB_D_RX) {
824 DBG(HFCUSB_DBG_DCHANNEL, 824 DBG(HFCUSB_DBG_DCHANNEL,
diff --git a/drivers/isdn/hisax/hscx_irq.c b/drivers/isdn/hisax/hscx_irq.c
index 7b1ad5e4ecda..2387d76c721a 100644
--- a/drivers/isdn/hisax/hscx_irq.c
+++ b/drivers/isdn/hisax/hscx_irq.c
@@ -32,7 +32,7 @@ waitforXFW(struct IsdnCardState *cs, int hscx)
32{ 32{
33 int to = 50; 33 int to = 50;
34 34
35 while ((!(READHSCX(cs, hscx, HSCX_STAR) & 0x44) == 0x40) && to) { 35 while (((READHSCX(cs, hscx, HSCX_STAR) & 0x44) != 0x40) && to) {
36 udelay(1); 36 udelay(1);
37 to--; 37 to--;
38 } 38 }
diff --git a/drivers/isdn/hisax/icc.c b/drivers/isdn/hisax/icc.c
index 9aba646ba221..c80cbb8a2ef9 100644
--- a/drivers/isdn/hisax/icc.c
+++ b/drivers/isdn/hisax/icc.c
@@ -468,6 +468,7 @@ ICC_l1hw(struct PStack *st, int pr, void *arg)
468 if (cs->debug & L1_DEB_WARN) 468 if (cs->debug & L1_DEB_WARN)
469 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen"); 469 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
470 skb_queue_tail(&cs->sq, skb); 470 skb_queue_tail(&cs->sq, skb);
471 spin_unlock_irqrestore(&cs->lock, flags);
471 break; 472 break;
472 } 473 }
473 if (cs->debug & DEB_DLOG_HEX) 474 if (cs->debug & DEB_DLOG_HEX)
diff --git a/drivers/isdn/mISDN/stack.c b/drivers/isdn/mISDN/stack.c
index 3e1532a180ff..0d05ec43012c 100644
--- a/drivers/isdn/mISDN/stack.c
+++ b/drivers/isdn/mISDN/stack.c
@@ -364,7 +364,7 @@ add_layer2(struct mISDNchannel *ch, struct mISDNstack *st)
364static int 364static int
365st_own_ctrl(struct mISDNchannel *ch, u_int cmd, void *arg) 365st_own_ctrl(struct mISDNchannel *ch, u_int cmd, void *arg)
366{ 366{
367 if (!ch->st || ch->st->layer1) 367 if (!ch->st || !ch->st->layer1)
368 return -EINVAL; 368 return -EINVAL;
369 return ch->st->layer1->ctrl(ch->st->layer1, cmd, arg); 369 return ch->st->layer1->ctrl(ch->st->layer1, cmd, arg);
370} 370}
diff --git a/drivers/misc/sgi-gru/gruprocfs.c b/drivers/misc/sgi-gru/gruprocfs.c
index ccd4408a26c7..3f2375c5ba5b 100644
--- a/drivers/misc/sgi-gru/gruprocfs.c
+++ b/drivers/misc/sgi-gru/gruprocfs.c
@@ -161,14 +161,15 @@ static int options_show(struct seq_file *s, void *p)
161static ssize_t options_write(struct file *file, const char __user *userbuf, 161static ssize_t options_write(struct file *file, const char __user *userbuf,
162 size_t count, loff_t *data) 162 size_t count, loff_t *data)
163{ 163{
164 unsigned long val; 164 char buf[20];
165 char buf[80];
166 165
167 if (strncpy_from_user(buf, userbuf, sizeof(buf) - 1) < 0) 166 if (count >= sizeof(buf))
167 return -EINVAL;
168 if (copy_from_user(buf, userbuf, count))
168 return -EFAULT; 169 return -EFAULT;
169 buf[count - 1] = '\0'; 170 buf[count] = '\0';
170 if (!strict_strtoul(buf, 10, &val)) 171 if (strict_strtoul(buf, 0, &gru_options))
171 gru_options = val; 172 return -EINVAL;
172 173
173 return count; 174 return count;
174} 175}
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 841e085ab74a..14be0755d7cd 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -486,6 +486,7 @@ config MTD_BFIN_ASYNC
486 486
487config MTD_GPIO_ADDR 487config MTD_GPIO_ADDR
488 tristate "GPIO-assisted Flash Chip Support" 488 tristate "GPIO-assisted Flash Chip Support"
489 depends on GENERIC_GPIO || GPIOLIB
489 depends on MTD_COMPLEX_MAPPINGS 490 depends on MTD_COMPLEX_MAPPINGS
490 select MTD_PARTITIONS 491 select MTD_PARTITIONS
491 help 492 help
diff --git a/drivers/mtd/maps/gpio-addr-flash.c b/drivers/mtd/maps/gpio-addr-flash.c
index 44ef9a49a860..1ad5caf9fe69 100644
--- a/drivers/mtd/maps/gpio-addr-flash.c
+++ b/drivers/mtd/maps/gpio-addr-flash.c
@@ -13,7 +13,9 @@
13 * Licensed under the GPL-2 or later. 13 * Licensed under the GPL-2 or later.
14 */ 14 */
15 15
16#include <linux/gpio.h>
16#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/io.h>
17#include <linux/kernel.h> 19#include <linux/kernel.h>
18#include <linux/module.h> 20#include <linux/module.h>
19#include <linux/mtd/mtd.h> 21#include <linux/mtd/mtd.h>
@@ -23,9 +25,6 @@
23#include <linux/platform_device.h> 25#include <linux/platform_device.h>
24#include <linux/types.h> 26#include <linux/types.h>
25 27
26#include <asm/gpio.h>
27#include <asm/io.h>
28
29#define pr_devinit(fmt, args...) ({ static const __devinitconst char __fmt[] = fmt; printk(__fmt, ## args); }) 28#define pr_devinit(fmt, args...) ({ static const __devinitconst char __fmt[] = fmt; printk(__fmt, ## args); })
30 29
31#define DRIVER_NAME "gpio-addr-flash" 30#define DRIVER_NAME "gpio-addr-flash"
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 22113865438b..2957cc70da3d 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -761,6 +761,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
761 * @mtd: mtd info structure 761 * @mtd: mtd info structure
762 * @chip: nand chip info structure 762 * @chip: nand chip info structure
763 * @buf: buffer to store read data 763 * @buf: buffer to store read data
764 * @page: page number to read
764 * 765 *
765 * Not for syndrome calculating ecc controllers, which use a special oob layout 766 * Not for syndrome calculating ecc controllers, which use a special oob layout
766 */ 767 */
@@ -777,6 +778,7 @@ static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
777 * @mtd: mtd info structure 778 * @mtd: mtd info structure
778 * @chip: nand chip info structure 779 * @chip: nand chip info structure
779 * @buf: buffer to store read data 780 * @buf: buffer to store read data
781 * @page: page number to read
780 * 782 *
781 * We need a special oob layout and handling even when OOB isn't used. 783 * We need a special oob layout and handling even when OOB isn't used.
782 */ 784 */
@@ -818,6 +820,7 @@ static int nand_read_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *c
818 * @mtd: mtd info structure 820 * @mtd: mtd info structure
819 * @chip: nand chip info structure 821 * @chip: nand chip info structure
820 * @buf: buffer to store read data 822 * @buf: buffer to store read data
823 * @page: page number to read
821 */ 824 */
822static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, 825static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
823 uint8_t *buf, int page) 826 uint8_t *buf, int page)
@@ -939,6 +942,7 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, uint3
939 * @mtd: mtd info structure 942 * @mtd: mtd info structure
940 * @chip: nand chip info structure 943 * @chip: nand chip info structure
941 * @buf: buffer to store read data 944 * @buf: buffer to store read data
945 * @page: page number to read
942 * 946 *
943 * Not for syndrome calculating ecc controllers which need a special oob layout 947 * Not for syndrome calculating ecc controllers which need a special oob layout
944 */ 948 */
@@ -983,6 +987,7 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
983 * @mtd: mtd info structure 987 * @mtd: mtd info structure
984 * @chip: nand chip info structure 988 * @chip: nand chip info structure
985 * @buf: buffer to store read data 989 * @buf: buffer to store read data
990 * @page: page number to read
986 * 991 *
987 * Hardware ECC for large page chips, require OOB to be read first. 992 * Hardware ECC for large page chips, require OOB to be read first.
988 * For this ECC mode, the write_page method is re-used from ECC_HW. 993 * For this ECC mode, the write_page method is re-used from ECC_HW.
@@ -1031,6 +1036,7 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
1031 * @mtd: mtd info structure 1036 * @mtd: mtd info structure
1032 * @chip: nand chip info structure 1037 * @chip: nand chip info structure
1033 * @buf: buffer to store read data 1038 * @buf: buffer to store read data
1039 * @page: page number to read
1034 * 1040 *
1035 * The hw generator calculates the error syndrome automatically. Therefor 1041 * The hw generator calculates the error syndrome automatically. Therefor
1036 * we need a special oob layout and handling. 1042 * we need a special oob layout and handling.
diff --git a/drivers/net/benet/be.h b/drivers/net/benet/be.h
index a80da0e14a52..3b79a225628a 100644
--- a/drivers/net/benet/be.h
+++ b/drivers/net/benet/be.h
@@ -259,6 +259,8 @@ struct be_adapter {
259 u32 port_num; 259 u32 port_num;
260 bool promiscuous; 260 bool promiscuous;
261 u32 cap; 261 u32 cap;
262 u32 rx_fc; /* Rx flow control */
263 u32 tx_fc; /* Tx flow control */
262}; 264};
263 265
264extern const struct ethtool_ops be_ethtool_ops; 266extern const struct ethtool_ops be_ethtool_ops;
diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h
index 49953787e41c..e5f9676cf1bc 100644
--- a/drivers/net/benet/be_cmds.h
+++ b/drivers/net/benet/be_cmds.h
@@ -68,7 +68,7 @@ enum {
68#define CQE_STATUS_COMPL_MASK 0xFFFF 68#define CQE_STATUS_COMPL_MASK 0xFFFF
69#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ 69#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */
70#define CQE_STATUS_EXTD_MASK 0xFFFF 70#define CQE_STATUS_EXTD_MASK 0xFFFF
71#define CQE_STATUS_EXTD_SHIFT 0 /* bits 0 - 15 */ 71#define CQE_STATUS_EXTD_SHIFT 16 /* bits 16 - 31 */
72 72
73struct be_mcc_compl { 73struct be_mcc_compl {
74 u32 status; /* dword 0 */ 74 u32 status; /* dword 0 */
diff --git a/drivers/net/benet/be_ethtool.c b/drivers/net/benet/be_ethtool.c
index cda5bf2fc50a..f0fd95b43c07 100644
--- a/drivers/net/benet/be_ethtool.c
+++ b/drivers/net/benet/be_ethtool.c
@@ -323,10 +323,12 @@ be_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
323 323
324 if (ecmd->autoneg != 0) 324 if (ecmd->autoneg != 0)
325 return -EINVAL; 325 return -EINVAL;
326 adapter->tx_fc = ecmd->tx_pause;
327 adapter->rx_fc = ecmd->rx_pause;
326 328
327 status = be_cmd_set_flow_control(adapter, ecmd->tx_pause, 329 status = be_cmd_set_flow_control(adapter,
328 ecmd->rx_pause); 330 adapter->tx_fc, adapter->rx_fc);
329 if (!status) 331 if (status)
330 dev_warn(&adapter->pdev->dev, "Pause param set failed.\n"); 332 dev_warn(&adapter->pdev->dev, "Pause param set failed.\n");
331 333
332 return status; 334 return status;
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
index 1f941f027718..876b357101fa 100644
--- a/drivers/net/benet/be_main.c
+++ b/drivers/net/benet/be_main.c
@@ -1610,11 +1610,21 @@ static int be_open(struct net_device *netdev)
1610 1610
1611 status = be_cmd_link_status_query(adapter, &link_up); 1611 status = be_cmd_link_status_query(adapter, &link_up);
1612 if (status) 1612 if (status)
1613 return status; 1613 goto ret_sts;
1614 be_link_status_update(adapter, link_up); 1614 be_link_status_update(adapter, link_up);
1615 1615
1616 status = be_vid_config(adapter);
1617 if (status)
1618 goto ret_sts;
1619
1620 status = be_cmd_set_flow_control(adapter,
1621 adapter->tx_fc, adapter->rx_fc);
1622 if (status)
1623 goto ret_sts;
1624
1616 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); 1625 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
1617 return 0; 1626ret_sts:
1627 return status;
1618} 1628}
1619 1629
1620static int be_setup(struct be_adapter *adapter) 1630static int be_setup(struct be_adapter *adapter)
@@ -1648,17 +1658,8 @@ static int be_setup(struct be_adapter *adapter)
1648 if (status != 0) 1658 if (status != 0)
1649 goto rx_qs_destroy; 1659 goto rx_qs_destroy;
1650 1660
1651 status = be_vid_config(adapter);
1652 if (status != 0)
1653 goto mccqs_destroy;
1654
1655 status = be_cmd_set_flow_control(adapter, true, true);
1656 if (status != 0)
1657 goto mccqs_destroy;
1658 return 0; 1661 return 0;
1659 1662
1660mccqs_destroy:
1661 be_mcc_queues_destroy(adapter);
1662rx_qs_destroy: 1663rx_qs_destroy:
1663 be_rx_queues_destroy(adapter); 1664 be_rx_queues_destroy(adapter);
1664tx_qs_destroy: 1665tx_qs_destroy:
@@ -1909,6 +1910,10 @@ static void be_netdev_init(struct net_device *netdev)
1909 1910
1910 adapter->rx_csum = true; 1911 adapter->rx_csum = true;
1911 1912
1913 /* Default settings for Rx and Tx flow control */
1914 adapter->rx_fc = true;
1915 adapter->tx_fc = true;
1916
1912 netif_set_gso_max_size(netdev, 65535); 1917 netif_set_gso_max_size(netdev, 65535);
1913 1918
1914 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops); 1919 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
@@ -2171,6 +2176,7 @@ static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2171 be_close(netdev); 2176 be_close(netdev);
2172 rtnl_unlock(); 2177 rtnl_unlock();
2173 } 2178 }
2179 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
2174 be_clear(adapter); 2180 be_clear(adapter);
2175 2181
2176 pci_save_state(pdev); 2182 pci_save_state(pdev);
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c
index f0b9a1e1db46..564e31c9fee4 100644
--- a/drivers/net/can/dev.c
+++ b/drivers/net/can/dev.c
@@ -589,6 +589,22 @@ static int can_changelink(struct net_device *dev,
589 return 0; 589 return 0;
590} 590}
591 591
592static size_t can_get_size(const struct net_device *dev)
593{
594 struct can_priv *priv = netdev_priv(dev);
595 size_t size;
596
597 size = nla_total_size(sizeof(u32)); /* IFLA_CAN_STATE */
598 size += sizeof(struct can_ctrlmode); /* IFLA_CAN_CTRLMODE */
599 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_RESTART_MS */
600 size += sizeof(struct can_bittiming); /* IFLA_CAN_BITTIMING */
601 size += sizeof(struct can_clock); /* IFLA_CAN_CLOCK */
602 if (priv->bittiming_const) /* IFLA_CAN_BITTIMING_CONST */
603 size += sizeof(struct can_bittiming_const);
604
605 return size;
606}
607
592static int can_fill_info(struct sk_buff *skb, const struct net_device *dev) 608static int can_fill_info(struct sk_buff *skb, const struct net_device *dev)
593{ 609{
594 struct can_priv *priv = netdev_priv(dev); 610 struct can_priv *priv = netdev_priv(dev);
@@ -639,6 +655,7 @@ static struct rtnl_link_ops can_link_ops __read_mostly = {
639 .setup = can_setup, 655 .setup = can_setup,
640 .newlink = can_newlink, 656 .newlink = can_newlink,
641 .changelink = can_changelink, 657 .changelink = can_changelink,
658 .get_size = can_get_size,
642 .fill_info = can_fill_info, 659 .fill_info = can_fill_info,
643 .fill_xstats = can_fill_xstats, 660 .fill_xstats = can_fill_xstats,
644}; 661};
diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c
index 9012e0abc626..abdbd9c2b788 100644
--- a/drivers/net/can/usb/ems_usb.c
+++ b/drivers/net/can/usb/ems_usb.c
@@ -319,7 +319,7 @@ static void ems_usb_rx_can_msg(struct ems_usb *dev, struct ems_cpc_msg *msg)
319 319
320 cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame)); 320 cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame));
321 321
322 cf->can_id = msg->msg.can_msg.id; 322 cf->can_id = le32_to_cpu(msg->msg.can_msg.id);
323 cf->can_dlc = min_t(u8, msg->msg.can_msg.length, 8); 323 cf->can_dlc = min_t(u8, msg->msg.can_msg.length, 8);
324 324
325 if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME 325 if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME
@@ -813,6 +813,9 @@ static netdev_tx_t ems_usb_start_xmit(struct sk_buff *skb, struct net_device *ne
813 msg->length = CPC_CAN_MSG_MIN_SIZE + cf->can_dlc; 813 msg->length = CPC_CAN_MSG_MIN_SIZE + cf->can_dlc;
814 } 814 }
815 815
816 /* Respect byte order */
817 msg->msg.can_msg.id = cpu_to_le32(msg->msg.can_msg.id);
818
816 for (i = 0; i < MAX_TX_URBS; i++) { 819 for (i = 0; i < MAX_TX_URBS; i++) {
817 if (dev->tx_contexts[i].echo_index == MAX_TX_URBS) { 820 if (dev->tx_contexts[i].echo_index == MAX_TX_URBS) {
818 context = &dev->tx_contexts[i]; 821 context = &dev->tx_contexts[i];
diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c
index 05916aafa4f1..f857afe8e488 100644
--- a/drivers/net/cassini.c
+++ b/drivers/net/cassini.c
@@ -4342,11 +4342,11 @@ static int cas_open(struct net_device *dev)
4342 cas_unlock_all_restore(cp, flags); 4342 cas_unlock_all_restore(cp, flags);
4343 } 4343 }
4344 4344
4345 err = -ENOMEM;
4345 if (cas_tx_tiny_alloc(cp) < 0) 4346 if (cas_tx_tiny_alloc(cp) < 0)
4346 return -ENOMEM; 4347 goto err_unlock;
4347 4348
4348 /* alloc rx descriptors */ 4349 /* alloc rx descriptors */
4349 err = -ENOMEM;
4350 if (cas_alloc_rxds(cp) < 0) 4350 if (cas_alloc_rxds(cp) < 0)
4351 goto err_tx_tiny; 4351 goto err_tx_tiny;
4352 4352
@@ -4386,6 +4386,7 @@ err_spare:
4386 cas_free_rxds(cp); 4386 cas_free_rxds(cp);
4387err_tx_tiny: 4387err_tx_tiny:
4388 cas_tx_tiny_free(cp); 4388 cas_tx_tiny_free(cp);
4389err_unlock:
4389 mutex_unlock(&cp->pm_mutex); 4390 mutex_unlock(&cp->pm_mutex);
4390 return err; 4391 return err;
4391} 4392}
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index f72c56dec33c..3179521aee90 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -2221,7 +2221,7 @@ void emac_poll_controller(struct net_device *ndev)
2221 struct emac_priv *priv = netdev_priv(ndev); 2221 struct emac_priv *priv = netdev_priv(ndev);
2222 2222
2223 emac_int_disable(priv); 2223 emac_int_disable(priv);
2224 emac_irq(ndev->irq, priv); 2224 emac_irq(ndev->irq, ndev);
2225 emac_int_enable(priv); 2225 emac_int_enable(priv);
2226} 2226}
2227#endif 2227#endif
diff --git a/drivers/net/fsl_pq_mdio.c b/drivers/net/fsl_pq_mdio.c
index 6ac464866972..efbf67689eca 100644
--- a/drivers/net/fsl_pq_mdio.c
+++ b/drivers/net/fsl_pq_mdio.c
@@ -427,3 +427,4 @@ void fsl_pq_mdio_exit(void)
427 of_unregister_platform_driver(&fsl_pq_mdio_driver); 427 of_unregister_platform_driver(&fsl_pq_mdio_driver);
428} 428}
429module_exit(fsl_pq_mdio_exit); 429module_exit(fsl_pq_mdio_exit);
430MODULE_LICENSE("GPL");
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index cbb143ca1eb8..5bd9e6bf6f2f 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -44,6 +44,7 @@
44 44
45#include "ixgbe.h" 45#include "ixgbe.h"
46#include "ixgbe_common.h" 46#include "ixgbe_common.h"
47#include "ixgbe_dcb_82599.h"
47 48
48char ixgbe_driver_name[] = "ixgbe"; 49char ixgbe_driver_name[] = "ixgbe";
49static const char ixgbe_driver_string[] = 50static const char ixgbe_driver_string[] =
@@ -226,6 +227,56 @@ static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
226 /* tx_buffer_info must be completely set up in the transmit path */ 227 /* tx_buffer_info must be completely set up in the transmit path */
227} 228}
228 229
230/**
231 * ixgbe_tx_is_paused - check if the tx ring is paused
232 * @adapter: the ixgbe adapter
233 * @tx_ring: the corresponding tx_ring
234 *
235 * If not in DCB mode, checks TFCS.TXOFF, otherwise, find out the
236 * corresponding TC of this tx_ring when checking TFCS.
237 *
238 * Returns : true if paused
239 */
240static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter *adapter,
241 struct ixgbe_ring *tx_ring)
242{
243 int tc;
244 u32 txoff = IXGBE_TFCS_TXOFF;
245
246#ifdef CONFIG_IXGBE_DCB
247 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
248 int reg_idx = tx_ring->reg_idx;
249 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
250
251 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
252 tc = reg_idx >> 2;
253 txoff = IXGBE_TFCS_TXOFF0;
254 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
255 tc = 0;
256 txoff = IXGBE_TFCS_TXOFF;
257 if (dcb_i == 8) {
258 /* TC0, TC1 */
259 tc = reg_idx >> 5;
260 if (tc == 2) /* TC2, TC3 */
261 tc += (reg_idx - 64) >> 4;
262 else if (tc == 3) /* TC4, TC5, TC6, TC7 */
263 tc += 1 + ((reg_idx - 96) >> 3);
264 } else if (dcb_i == 4) {
265 /* TC0, TC1 */
266 tc = reg_idx >> 6;
267 if (tc == 1) {
268 tc += (reg_idx - 64) >> 5;
269 if (tc == 2) /* TC2, TC3 */
270 tc += (reg_idx - 96) >> 4;
271 }
272 }
273 }
274 txoff <<= tc;
275 }
276#endif
277 return IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & txoff;
278}
279
229static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter, 280static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
230 struct ixgbe_ring *tx_ring, 281 struct ixgbe_ring *tx_ring,
231 unsigned int eop) 282 unsigned int eop)
@@ -237,7 +288,7 @@ static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
237 adapter->detect_tx_hung = false; 288 adapter->detect_tx_hung = false;
238 if (tx_ring->tx_buffer_info[eop].time_stamp && 289 if (tx_ring->tx_buffer_info[eop].time_stamp &&
239 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) && 290 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
240 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) { 291 !ixgbe_tx_is_paused(adapter, tx_ring)) {
241 /* detected Tx unit hang */ 292 /* detected Tx unit hang */
242 union ixgbe_adv_tx_desc *tx_desc; 293 union ixgbe_adv_tx_desc *tx_desc;
243 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); 294 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
@@ -412,19 +463,23 @@ static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
412 u32 txctrl; 463 u32 txctrl;
413 int cpu = get_cpu(); 464 int cpu = get_cpu();
414 int q = tx_ring - adapter->tx_ring; 465 int q = tx_ring - adapter->tx_ring;
466 struct ixgbe_hw *hw = &adapter->hw;
415 467
416 if (tx_ring->cpu != cpu) { 468 if (tx_ring->cpu != cpu) {
417 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
418 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 469 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
470 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(q));
419 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK; 471 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
420 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); 472 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
473 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
474 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(q), txctrl);
421 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 475 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
476 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(q));
422 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599; 477 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599;
423 txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << 478 txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
424 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599); 479 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599);
480 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
481 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(q), txctrl);
425 } 482 }
426 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
427 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
428 tx_ring->cpu = cpu; 483 tx_ring->cpu = cpu;
429 } 484 }
430 put_cpu(); 485 put_cpu();
@@ -1913,11 +1968,25 @@ static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1913 break; 1968 break;
1914 } 1969 }
1915 } 1970 }
1971
1916 if (hw->mac.type == ixgbe_mac_82599EB) { 1972 if (hw->mac.type == ixgbe_mac_82599EB) {
1973 u32 rttdcs;
1974
1975 /* disable the arbiter while setting MTQC */
1976 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
1977 rttdcs |= IXGBE_RTTDCS_ARBDIS;
1978 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
1979
1917 /* We enable 8 traffic classes, DCB only */ 1980 /* We enable 8 traffic classes, DCB only */
1918 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) 1981 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
1919 IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA | 1982 IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA |
1920 IXGBE_MTQC_8TC_8TQ)); 1983 IXGBE_MTQC_8TC_8TQ));
1984 else
1985 IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB);
1986
1987 /* re-eable the arbiter */
1988 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
1989 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
1921 } 1990 }
1922} 1991}
1923 1992
@@ -2471,7 +2540,10 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter)
2471 ixgbe_restore_vlan(adapter); 2540 ixgbe_restore_vlan(adapter);
2472#ifdef CONFIG_IXGBE_DCB 2541#ifdef CONFIG_IXGBE_DCB
2473 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { 2542 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2474 netif_set_gso_max_size(netdev, 32768); 2543 if (hw->mac.type == ixgbe_mac_82598EB)
2544 netif_set_gso_max_size(netdev, 32768);
2545 else
2546 netif_set_gso_max_size(netdev, 65536);
2475 ixgbe_configure_dcb(adapter); 2547 ixgbe_configure_dcb(adapter);
2476 } else { 2548 } else {
2477 netif_set_gso_max_size(netdev, 65536); 2549 netif_set_gso_max_size(netdev, 65536);
diff --git a/drivers/net/macsonic.c b/drivers/net/macsonic.c
index 61eabcac734c..b3d7d8d77f46 100644
--- a/drivers/net/macsonic.c
+++ b/drivers/net/macsonic.c
@@ -223,69 +223,73 @@ static int __devinit macsonic_init(struct net_device *dev)
223 return 0; 223 return 0;
224} 224}
225 225
226static int __devinit mac_onboard_sonic_ethernet_addr(struct net_device *dev) 226#define INVALID_MAC(mac) (memcmp(mac, "\x08\x00\x07", 3) && \
227 memcmp(mac, "\x00\xA0\x40", 3) && \
228 memcmp(mac, "\x00\x80\x19", 3) && \
229 memcmp(mac, "\x00\x05\x02", 3))
230
231static void __devinit mac_onboard_sonic_ethernet_addr(struct net_device *dev)
227{ 232{
228 struct sonic_local *lp = netdev_priv(dev); 233 struct sonic_local *lp = netdev_priv(dev);
229 const int prom_addr = ONBOARD_SONIC_PROM_BASE; 234 const int prom_addr = ONBOARD_SONIC_PROM_BASE;
230 int i; 235 unsigned short val;
231 236
232 /* On NuBus boards we can sometimes look in the ROM resources. 237 /*
233 No such luck for comm-slot/onboard. */ 238 * On NuBus boards we can sometimes look in the ROM resources.
234 for(i = 0; i < 6; i++) 239 * No such luck for comm-slot/onboard.
235 dev->dev_addr[i] = SONIC_READ_PROM(i); 240 * On the PowerBook 520, the PROM base address is a mystery.
241 */
242 if (hwreg_present((void *)prom_addr)) {
243 int i;
244
245 for (i = 0; i < 6; i++)
246 dev->dev_addr[i] = SONIC_READ_PROM(i);
247 if (!INVALID_MAC(dev->dev_addr))
248 return;
236 249
237 /* Most of the time, the address is bit-reversed. The NetBSD 250 /*
238 source has a rather long and detailed historical account of 251 * Most of the time, the address is bit-reversed. The NetBSD
239 why this is so. */ 252 * source has a rather long and detailed historical account of
240 if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) && 253 * why this is so.
241 memcmp(dev->dev_addr, "\x00\xA0\x40", 3) && 254 */
242 memcmp(dev->dev_addr, "\x00\x80\x19", 3) &&
243 memcmp(dev->dev_addr, "\x00\x05\x02", 3))
244 bit_reverse_addr(dev->dev_addr); 255 bit_reverse_addr(dev->dev_addr);
245 else 256 if (!INVALID_MAC(dev->dev_addr))
246 return 0; 257 return;
247 258
248 /* If we still have what seems to be a bogus address, we'll
249 look in the CAM. The top entry should be ours. */
250 /* Danger! This only works if MacOS has already initialized
251 the card... */
252 if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) &&
253 memcmp(dev->dev_addr, "\x00\xA0\x40", 3) &&
254 memcmp(dev->dev_addr, "\x00\x80\x19", 3) &&
255 memcmp(dev->dev_addr, "\x00\x05\x02", 3))
256 {
257 unsigned short val;
258
259 printk(KERN_INFO "macsonic: PROM seems to be wrong, trying CAM entry 15\n");
260
261 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
262 SONIC_WRITE(SONIC_CEP, 15);
263
264 val = SONIC_READ(SONIC_CAP2);
265 dev->dev_addr[5] = val >> 8;
266 dev->dev_addr[4] = val & 0xff;
267 val = SONIC_READ(SONIC_CAP1);
268 dev->dev_addr[3] = val >> 8;
269 dev->dev_addr[2] = val & 0xff;
270 val = SONIC_READ(SONIC_CAP0);
271 dev->dev_addr[1] = val >> 8;
272 dev->dev_addr[0] = val & 0xff;
273
274 printk(KERN_INFO "HW Address from CAM 15: %pM\n",
275 dev->dev_addr);
276 } else return 0;
277
278 if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) &&
279 memcmp(dev->dev_addr, "\x00\xA0\x40", 3) &&
280 memcmp(dev->dev_addr, "\x00\x80\x19", 3) &&
281 memcmp(dev->dev_addr, "\x00\x05\x02", 3))
282 {
283 /* 259 /*
284 * Still nonsense ... messed up someplace! 260 * If we still have what seems to be a bogus address, we'll
261 * look in the CAM. The top entry should be ours.
285 */ 262 */
286 printk(KERN_ERR "macsonic: ERROR (INVALID MAC)\n"); 263 printk(KERN_WARNING "macsonic: MAC address in PROM seems "
287 return -EIO; 264 "to be invalid, trying CAM\n");
288 } else return 0; 265 } else {
266 printk(KERN_WARNING "macsonic: cannot read MAC address from "
267 "PROM, trying CAM\n");
268 }
269
270 /* This only works if MacOS has already initialized the card. */
271
272 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
273 SONIC_WRITE(SONIC_CEP, 15);
274
275 val = SONIC_READ(SONIC_CAP2);
276 dev->dev_addr[5] = val >> 8;
277 dev->dev_addr[4] = val & 0xff;
278 val = SONIC_READ(SONIC_CAP1);
279 dev->dev_addr[3] = val >> 8;
280 dev->dev_addr[2] = val & 0xff;
281 val = SONIC_READ(SONIC_CAP0);
282 dev->dev_addr[1] = val >> 8;
283 dev->dev_addr[0] = val & 0xff;
284
285 if (!INVALID_MAC(dev->dev_addr))
286 return;
287
288 /* Still nonsense ... messed up someplace! */
289
290 printk(KERN_WARNING "macsonic: MAC address in CAM entry 15 "
291 "seems invalid, will use a random MAC\n");
292 random_ether_addr(dev->dev_addr);
289} 293}
290 294
291static int __devinit mac_onboard_sonic_probe(struct net_device *dev) 295static int __devinit mac_onboard_sonic_probe(struct net_device *dev)
@@ -402,8 +406,7 @@ static int __devinit mac_onboard_sonic_probe(struct net_device *dev)
402 SONIC_WRITE(SONIC_ISR, 0x7fff); 406 SONIC_WRITE(SONIC_ISR, 0x7fff);
403 407
404 /* Now look for the MAC address. */ 408 /* Now look for the MAC address. */
405 if (mac_onboard_sonic_ethernet_addr(dev) != 0) 409 mac_onboard_sonic_ethernet_addr(dev);
406 return -ENODEV;
407 410
408 /* Shared init code */ 411 /* Shared init code */
409 return macsonic_init(dev); 412 return macsonic_init(dev);
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index cea7531f4f40..a2fc70a0d0cc 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -3916,6 +3916,8 @@ static int __devinit ql_init_device(struct pci_dev *pdev,
3916 goto err_out; 3916 goto err_out;
3917 } 3917 }
3918 3918
3919 /* Set PCIe reset type for EEH to fundamental. */
3920 pdev->needs_freset = 1;
3919 pci_save_state(pdev); 3921 pci_save_state(pdev);
3920 qdev->reg_base = 3922 qdev->reg_base =
3921 ioremap_nocache(pci_resource_start(pdev, 1), 3923 ioremap_nocache(pci_resource_start(pdev, 1),
diff --git a/drivers/net/qlge/qlge_mpi.c b/drivers/net/qlge/qlge_mpi.c
index bcf13c96f73f..aec05f266107 100644
--- a/drivers/net/qlge/qlge_mpi.c
+++ b/drivers/net/qlge/qlge_mpi.c
@@ -499,7 +499,7 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp)
499 /* Wait for the interrupt to come in. */ 499 /* Wait for the interrupt to come in. */
500 status = ql_wait_mbx_cmd_cmplt(qdev); 500 status = ql_wait_mbx_cmd_cmplt(qdev);
501 if (status) 501 if (status)
502 goto end; 502 continue;
503 503
504 /* Process the event. If it's an AEN, it 504 /* Process the event. If it's an AEN, it
505 * will be handled in-line or a worker 505 * will be handled in-line or a worker
diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig
index c47237c2d638..32d93564a74d 100644
--- a/drivers/net/usb/Kconfig
+++ b/drivers/net/usb/Kconfig
@@ -174,7 +174,7 @@ config USB_NET_CDCETHER
174 * Ericsson Mobile Broadband Module (all variants) 174 * Ericsson Mobile Broadband Module (all variants)
175 * Motorola (DM100 and SB4100) 175 * Motorola (DM100 and SB4100)
176 * Broadcom Cable Modem (reference design) 176 * Broadcom Cable Modem (reference design)
177 * Toshiba (PCX1100U and F3507g) 177 * Toshiba (PCX1100U and F3507g/F3607gw)
178 * ... 178 * ...
179 179
180 This driver creates an interface named "ethX", where X depends on 180 This driver creates an interface named "ethX", where X depends on
diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c
index 4a6aff579403..21e1ba160008 100644
--- a/drivers/net/usb/cdc_ether.c
+++ b/drivers/net/usb/cdc_ether.c
@@ -544,20 +544,60 @@ static const struct usb_device_id products [] = {
544 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 544 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
545 .driver_info = (unsigned long) &cdc_info, 545 .driver_info = (unsigned long) &cdc_info,
546}, { 546}, {
547 /* Ericsson F3307 */ 547 /* Ericsson F3607gw ver 2 */
548 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1905, USB_CLASS_COMM,
549 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
550 .driver_info = (unsigned long) &cdc_info,
551}, {
552 /* Ericsson F3607gw ver 3 */
548 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1906, USB_CLASS_COMM, 553 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1906, USB_CLASS_COMM,
549 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 554 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
550 .driver_info = (unsigned long) &cdc_info, 555 .driver_info = (unsigned long) &cdc_info,
551}, { 556}, {
557 /* Ericsson F3307 */
558 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x190a, USB_CLASS_COMM,
559 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
560 .driver_info = (unsigned long) &cdc_info,
561}, {
562 /* Ericsson F3307 ver 2 */
563 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1909, USB_CLASS_COMM,
564 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
565 .driver_info = (unsigned long) &cdc_info,
566}, {
567 /* Ericsson C3607w */
568 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1049, USB_CLASS_COMM,
569 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
570 .driver_info = (unsigned long) &cdc_info,
571}, {
552 /* Toshiba F3507g */ 572 /* Toshiba F3507g */
553 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM, 573 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM,
554 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 574 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
555 .driver_info = (unsigned long) &cdc_info, 575 .driver_info = (unsigned long) &cdc_info,
556}, { 576}, {
577 /* Toshiba F3607gw */
578 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130c, USB_CLASS_COMM,
579 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
580 .driver_info = (unsigned long) &cdc_info,
581}, {
582 /* Toshiba F3607gw ver 2 */
583 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x1311, USB_CLASS_COMM,
584 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
585 .driver_info = (unsigned long) &cdc_info,
586}, {
557 /* Dell F3507g */ 587 /* Dell F3507g */
558 USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8147, USB_CLASS_COMM, 588 USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8147, USB_CLASS_COMM,
559 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 589 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
560 .driver_info = (unsigned long) &cdc_info, 590 .driver_info = (unsigned long) &cdc_info,
591}, {
592 /* Dell F3607gw */
593 USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8183, USB_CLASS_COMM,
594 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
595 .driver_info = (unsigned long) &cdc_info,
596}, {
597 /* Dell F3607gw ver 2 */
598 USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8184, USB_CLASS_COMM,
599 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
600 .driver_info = (unsigned long) &cdc_info,
561}, 601},
562 { }, // END 602 { }, // END
563}; 603};
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index 05630f2f6930..b9e002fccbca 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -998,7 +998,7 @@ static unsigned int features[] = {
998 VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN, 998 VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN,
999}; 999};
1000 1000
1001static struct virtio_driver virtio_net = { 1001static struct virtio_driver virtio_net_driver = {
1002 .feature_table = features, 1002 .feature_table = features,
1003 .feature_table_size = ARRAY_SIZE(features), 1003 .feature_table_size = ARRAY_SIZE(features),
1004 .driver.name = KBUILD_MODNAME, 1004 .driver.name = KBUILD_MODNAME,
@@ -1011,12 +1011,12 @@ static struct virtio_driver virtio_net = {
1011 1011
1012static int __init init(void) 1012static int __init init(void)
1013{ 1013{
1014 return register_virtio_driver(&virtio_net); 1014 return register_virtio_driver(&virtio_net_driver);
1015} 1015}
1016 1016
1017static void __exit fini(void) 1017static void __exit fini(void)
1018{ 1018{
1019 unregister_virtio_driver(&virtio_net); 1019 unregister_virtio_driver(&virtio_net_driver);
1020} 1020}
1021module_init(init); 1021module_init(init);
1022module_exit(fini); 1022module_exit(fini);
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c
index a741d37fd96f..240cff1e6979 100644
--- a/drivers/net/wireless/ipw2x00/ipw2100.c
+++ b/drivers/net/wireless/ipw2x00/ipw2100.c
@@ -6325,10 +6325,8 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6325 6325
6326 fail: 6326 fail:
6327 if (dev) { 6327 if (dev) {
6328 if (registered) { 6328 if (registered)
6329 unregister_ieee80211(priv->ieee);
6330 unregister_netdev(dev); 6329 unregister_netdev(dev);
6331 }
6332 6330
6333 ipw2100_hw_stop_adapter(priv); 6331 ipw2100_hw_stop_adapter(priv);
6334 6332
@@ -6385,7 +6383,6 @@ static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev)
6385 /* Unregister the device first - this results in close() 6383 /* Unregister the device first - this results in close()
6386 * being called if the device is open. If we free storage 6384 * being called if the device is open. If we free storage
6387 * first, then close() will crash. */ 6385 * first, then close() will crash. */
6388 unregister_ieee80211(priv->ieee);
6389 unregister_netdev(dev); 6386 unregister_netdev(dev);
6390 6387
6391 /* ipw2100_down will ensure that there is no more pending work 6388 /* ipw2100_down will ensure that there is no more pending work
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c
index 9b0f2c0646e0..827824d45de9 100644
--- a/drivers/net/wireless/ipw2x00/ipw2200.c
+++ b/drivers/net/wireless/ipw2x00/ipw2200.c
@@ -11822,7 +11822,6 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,
11822 if (err) { 11822 if (err) {
11823 IPW_ERROR("Failed to register promiscuous network " 11823 IPW_ERROR("Failed to register promiscuous network "
11824 "device (error %d).\n", err); 11824 "device (error %d).\n", err);
11825 unregister_ieee80211(priv->ieee);
11826 unregister_netdev(priv->net_dev); 11825 unregister_netdev(priv->net_dev);
11827 goto out_remove_sysfs; 11826 goto out_remove_sysfs;
11828 } 11827 }
@@ -11873,7 +11872,6 @@ static void __devexit ipw_pci_remove(struct pci_dev *pdev)
11873 11872
11874 mutex_unlock(&priv->mutex); 11873 mutex_unlock(&priv->mutex);
11875 11874
11876 unregister_ieee80211(priv->ieee);
11877 unregister_netdev(priv->net_dev); 11875 unregister_netdev(priv->net_dev);
11878 11876
11879 if (priv->rxq) { 11877 if (priv->rxq) {
diff --git a/drivers/net/wireless/ipw2x00/libipw.h b/drivers/net/wireless/ipw2x00/libipw.h
index f42ade6c2d3e..bf45391172f3 100644
--- a/drivers/net/wireless/ipw2x00/libipw.h
+++ b/drivers/net/wireless/ipw2x00/libipw.h
@@ -1020,7 +1020,6 @@ static inline int libipw_is_cck_rate(u8 rate)
1020/* ieee80211.c */ 1020/* ieee80211.c */
1021extern void free_ieee80211(struct net_device *dev, int monitor); 1021extern void free_ieee80211(struct net_device *dev, int monitor);
1022extern struct net_device *alloc_ieee80211(int sizeof_priv, int monitor); 1022extern struct net_device *alloc_ieee80211(int sizeof_priv, int monitor);
1023extern void unregister_ieee80211(struct libipw_device *ieee);
1024extern int libipw_change_mtu(struct net_device *dev, int new_mtu); 1023extern int libipw_change_mtu(struct net_device *dev, int new_mtu);
1025 1024
1026extern void libipw_networks_age(struct libipw_device *ieee, 1025extern void libipw_networks_age(struct libipw_device *ieee,
diff --git a/drivers/net/wireless/ipw2x00/libipw_module.c b/drivers/net/wireless/ipw2x00/libipw_module.c
index be5b809ec97a..a0e9f6aed7da 100644
--- a/drivers/net/wireless/ipw2x00/libipw_module.c
+++ b/drivers/net/wireless/ipw2x00/libipw_module.c
@@ -235,19 +235,16 @@ void free_ieee80211(struct net_device *dev, int monitor)
235 libipw_networks_free(ieee); 235 libipw_networks_free(ieee);
236 236
237 /* free cfg80211 resources */ 237 /* free cfg80211 resources */
238 if (!monitor) 238 if (!monitor) {
239 wiphy_unregister(ieee->wdev.wiphy);
240 kfree(ieee->a_band.channels);
241 kfree(ieee->bg_band.channels);
239 wiphy_free(ieee->wdev.wiphy); 242 wiphy_free(ieee->wdev.wiphy);
243 }
240 244
241 free_netdev(dev); 245 free_netdev(dev);
242} 246}
243 247
244void unregister_ieee80211(struct libipw_device *ieee)
245{
246 wiphy_unregister(ieee->wdev.wiphy);
247 kfree(ieee->a_band.channels);
248 kfree(ieee->bg_band.channels);
249}
250
251#ifdef CONFIG_LIBIPW_DEBUG 248#ifdef CONFIG_LIBIPW_DEBUG
252 249
253static int debug = 0; 250static int debug = 0;
@@ -333,4 +330,3 @@ module_init(libipw_init);
333 330
334EXPORT_SYMBOL(alloc_ieee80211); 331EXPORT_SYMBOL(alloc_ieee80211);
335EXPORT_SYMBOL(free_ieee80211); 332EXPORT_SYMBOL(free_ieee80211);
336EXPORT_SYMBOL(unregister_ieee80211);
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index 71761b343839..73bbec58341e 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -815,6 +815,8 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev)
815 815
816 mutex_init(&rt2x00dev->csr_mutex); 816 mutex_init(&rt2x00dev->csr_mutex);
817 817
818 set_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags);
819
818 /* 820 /*
819 * Make room for rt2x00_intf inside the per-interface 821 * Make room for rt2x00_intf inside the per-interface
820 * structure ieee80211_vif. 822 * structure ieee80211_vif.
@@ -871,8 +873,6 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev)
871 rt2x00leds_register(rt2x00dev); 873 rt2x00leds_register(rt2x00dev);
872 rt2x00debug_register(rt2x00dev); 874 rt2x00debug_register(rt2x00dev);
873 875
874 set_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags);
875
876 return 0; 876 return 0;
877 877
878exit: 878exit:
diff --git a/drivers/net/wireless/rt2x00/rt2x00link.c b/drivers/net/wireless/rt2x00/rt2x00link.c
index c64db0ba7f40..c708d0be9155 100644
--- a/drivers/net/wireless/rt2x00/rt2x00link.c
+++ b/drivers/net/wireless/rt2x00/rt2x00link.c
@@ -362,8 +362,9 @@ void rt2x00link_start_tuner(struct rt2x00_dev *rt2x00dev)
362 362
363 rt2x00link_reset_tuner(rt2x00dev, false); 363 rt2x00link_reset_tuner(rt2x00dev, false);
364 364
365 ieee80211_queue_delayed_work(rt2x00dev->hw, 365 if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
366 &link->work, LINK_TUNE_INTERVAL); 366 ieee80211_queue_delayed_work(rt2x00dev->hw,
367 &link->work, LINK_TUNE_INTERVAL);
367} 368}
368 369
369void rt2x00link_stop_tuner(struct rt2x00_dev *rt2x00dev) 370void rt2x00link_stop_tuner(struct rt2x00_dev *rt2x00dev)
@@ -469,8 +470,10 @@ static void rt2x00link_tuner(struct work_struct *work)
469 * Increase tuner counter, and reschedule the next link tuner run. 470 * Increase tuner counter, and reschedule the next link tuner run.
470 */ 471 */
471 link->count++; 472 link->count++;
472 ieee80211_queue_delayed_work(rt2x00dev->hw, 473
473 &link->work, LINK_TUNE_INTERVAL); 474 if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
475 ieee80211_queue_delayed_work(rt2x00dev->hw,
476 &link->work, LINK_TUNE_INTERVAL);
474} 477}
475 478
476void rt2x00link_register(struct rt2x00_dev *rt2x00dev) 479void rt2x00link_register(struct rt2x00_dev *rt2x00dev)
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c
index 501544882c2c..f02b48a90593 100644
--- a/drivers/net/wireless/rt2x00/rt2x00usb.c
+++ b/drivers/net/wireless/rt2x00/rt2x00usb.c
@@ -47,6 +47,8 @@ int rt2x00usb_vendor_request(struct rt2x00_dev *rt2x00dev,
47 (requesttype == USB_VENDOR_REQUEST_IN) ? 47 (requesttype == USB_VENDOR_REQUEST_IN) ?
48 usb_rcvctrlpipe(usb_dev, 0) : usb_sndctrlpipe(usb_dev, 0); 48 usb_rcvctrlpipe(usb_dev, 0) : usb_sndctrlpipe(usb_dev, 0);
49 49
50 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
51 return -ENODEV;
50 52
51 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 53 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
52 status = usb_control_msg(usb_dev, pipe, request, requesttype, 54 status = usb_control_msg(usb_dev, pipe, request, requesttype,
@@ -60,8 +62,10 @@ int rt2x00usb_vendor_request(struct rt2x00_dev *rt2x00dev,
60 * -ENODEV: Device has disappeared, no point continuing. 62 * -ENODEV: Device has disappeared, no point continuing.
61 * All other errors: Try again. 63 * All other errors: Try again.
62 */ 64 */
63 else if (status == -ENODEV) 65 else if (status == -ENODEV) {
66 clear_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags);
64 break; 67 break;
68 }
65 } 69 }
66 70
67 ERROR(rt2x00dev, 71 ERROR(rt2x00dev,
@@ -161,6 +165,9 @@ int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
161{ 165{
162 unsigned int i; 166 unsigned int i;
163 167
168 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
169 return -ENODEV;
170
164 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 171 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
165 rt2x00usb_register_read_lock(rt2x00dev, offset, reg); 172 rt2x00usb_register_read_lock(rt2x00dev, offset, reg);
166 if (!rt2x00_get_field32(*reg, field)) 173 if (!rt2x00_get_field32(*reg, field))
diff --git a/drivers/net/wireless/rtl818x/rtl8187_leds.c b/drivers/net/wireless/rtl818x/rtl8187_leds.c
index a1c670fc1552..cf8a4a40fdf6 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_leds.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_leds.c
@@ -210,10 +210,10 @@ void rtl8187_leds_exit(struct ieee80211_hw *dev)
210 210
211 /* turn the LED off before exiting */ 211 /* turn the LED off before exiting */
212 ieee80211_queue_delayed_work(dev, &priv->led_off, 0); 212 ieee80211_queue_delayed_work(dev, &priv->led_off, 0);
213 cancel_delayed_work_sync(&priv->led_off);
214 cancel_delayed_work_sync(&priv->led_on);
215 rtl8187_unregister_led(&priv->led_rx); 213 rtl8187_unregister_led(&priv->led_rx);
216 rtl8187_unregister_led(&priv->led_tx); 214 rtl8187_unregister_led(&priv->led_tx);
215 cancel_delayed_work_sync(&priv->led_off);
216 cancel_delayed_work_sync(&priv->led_on);
217} 217}
218#endif /* def CONFIG_RTL8187_LED */ 218#endif /* def CONFIG_RTL8187_LED */
219 219
diff --git a/drivers/platform/x86/eeepc-laptop.c b/drivers/platform/x86/eeepc-laptop.c
index d379e74a05d0..4226e5352738 100644
--- a/drivers/platform/x86/eeepc-laptop.c
+++ b/drivers/platform/x86/eeepc-laptop.c
@@ -150,8 +150,6 @@ struct eeepc_hotk {
150/* The actual device the driver binds to */ 150/* The actual device the driver binds to */
151static struct eeepc_hotk *ehotk; 151static struct eeepc_hotk *ehotk;
152 152
153static void eeepc_rfkill_hotplug(bool real);
154
155/* Platform device/driver */ 153/* Platform device/driver */
156static int eeepc_hotk_thaw(struct device *device); 154static int eeepc_hotk_thaw(struct device *device);
157static int eeepc_hotk_restore(struct device *device); 155static int eeepc_hotk_restore(struct device *device);
@@ -345,16 +343,7 @@ static bool eeepc_wlan_rfkill_blocked(void)
345static int eeepc_rfkill_set(void *data, bool blocked) 343static int eeepc_rfkill_set(void *data, bool blocked)
346{ 344{
347 unsigned long asl = (unsigned long)data; 345 unsigned long asl = (unsigned long)data;
348 int ret; 346 return set_acpi(asl, !blocked);
349
350 if (asl != CM_ASL_WLAN)
351 return set_acpi(asl, !blocked);
352
353 /* hack to avoid panic with rt2860sta */
354 if (blocked)
355 eeepc_rfkill_hotplug(false);
356 ret = set_acpi(asl, !blocked);
357 return ret;
358} 347}
359 348
360static const struct rfkill_ops eeepc_rfkill_ops = { 349static const struct rfkill_ops eeepc_rfkill_ops = {
@@ -367,7 +356,8 @@ static void __devinit eeepc_enable_camera(void)
367 * If the following call to set_acpi() fails, it's because there's no 356 * If the following call to set_acpi() fails, it's because there's no
368 * camera so we can ignore the error. 357 * camera so we can ignore the error.
369 */ 358 */
370 set_acpi(CM_ASL_CAMERA, 1); 359 if (get_acpi(CM_ASL_CAMERA) == 0)
360 set_acpi(CM_ASL_CAMERA, 1);
371} 361}
372 362
373/* 363/*
@@ -654,13 +644,13 @@ static int eeepc_get_adapter_status(struct hotplug_slot *hotplug_slot,
654 return 0; 644 return 0;
655} 645}
656 646
657static void eeepc_rfkill_hotplug(bool real) 647static void eeepc_rfkill_hotplug(void)
658{ 648{
659 struct pci_dev *dev; 649 struct pci_dev *dev;
660 struct pci_bus *bus; 650 struct pci_bus *bus;
661 bool blocked = real ? eeepc_wlan_rfkill_blocked() : true; 651 bool blocked = eeepc_wlan_rfkill_blocked();
662 652
663 if (real && ehotk->wlan_rfkill) 653 if (ehotk->wlan_rfkill)
664 rfkill_set_sw_state(ehotk->wlan_rfkill, blocked); 654 rfkill_set_sw_state(ehotk->wlan_rfkill, blocked);
665 655
666 mutex_lock(&ehotk->hotplug_lock); 656 mutex_lock(&ehotk->hotplug_lock);
@@ -703,7 +693,7 @@ static void eeepc_rfkill_notify(acpi_handle handle, u32 event, void *data)
703 if (event != ACPI_NOTIFY_BUS_CHECK) 693 if (event != ACPI_NOTIFY_BUS_CHECK)
704 return; 694 return;
705 695
706 eeepc_rfkill_hotplug(true); 696 eeepc_rfkill_hotplug();
707} 697}
708 698
709static void eeepc_hotk_notify(struct acpi_device *device, u32 event) 699static void eeepc_hotk_notify(struct acpi_device *device, u32 event)
@@ -861,7 +851,7 @@ static int eeepc_hotk_restore(struct device *device)
861{ 851{
862 /* Refresh both wlan rfkill state and pci hotplug */ 852 /* Refresh both wlan rfkill state and pci hotplug */
863 if (ehotk->wlan_rfkill) 853 if (ehotk->wlan_rfkill)
864 eeepc_rfkill_hotplug(true); 854 eeepc_rfkill_hotplug();
865 855
866 if (ehotk->bluetooth_rfkill) 856 if (ehotk->bluetooth_rfkill)
867 rfkill_set_sw_state(ehotk->bluetooth_rfkill, 857 rfkill_set_sw_state(ehotk->bluetooth_rfkill,
@@ -1004,7 +994,7 @@ static void eeepc_rfkill_exit(void)
1004 * Refresh pci hotplug in case the rfkill state was changed after 994 * Refresh pci hotplug in case the rfkill state was changed after
1005 * eeepc_unregister_rfkill_notifier() 995 * eeepc_unregister_rfkill_notifier()
1006 */ 996 */
1007 eeepc_rfkill_hotplug(true); 997 eeepc_rfkill_hotplug();
1008 if (ehotk->hotplug_slot) 998 if (ehotk->hotplug_slot)
1009 pci_hp_deregister(ehotk->hotplug_slot); 999 pci_hp_deregister(ehotk->hotplug_slot);
1010 1000
@@ -1120,7 +1110,7 @@ static int eeepc_rfkill_init(struct device *dev)
1120 * Refresh pci hotplug in case the rfkill state was changed during 1110 * Refresh pci hotplug in case the rfkill state was changed during
1121 * setup. 1111 * setup.
1122 */ 1112 */
1123 eeepc_rfkill_hotplug(true); 1113 eeepc_rfkill_hotplug();
1124 1114
1125exit: 1115exit:
1126 if (result && result != -ENODEV) 1116 if (result && result != -ENODEV)
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 85119fb7cb50..6498bd1fb6dd 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -1143,7 +1143,7 @@ static void serial_console_write(struct console *co, const char *s,
1143 while ((sci_in(port, SCxSR) & bits) != bits) 1143 while ((sci_in(port, SCxSR) & bits) != bits)
1144 cpu_relax(); 1144 cpu_relax();
1145 1145
1146 if (sci_port->disable); 1146 if (sci_port->disable)
1147 sci_port->disable(port); 1147 sci_port->disable(port);
1148} 1148}
1149 1149
diff --git a/drivers/thermal/thermal_sys.c b/drivers/thermal/thermal_sys.c
index 4e83c297ec9e..6f8d8f971212 100644
--- a/drivers/thermal/thermal_sys.c
+++ b/drivers/thermal/thermal_sys.c
@@ -180,15 +180,15 @@ trip_point_type_show(struct device *dev, struct device_attribute *attr,
180 180
181 switch (type) { 181 switch (type) {
182 case THERMAL_TRIP_CRITICAL: 182 case THERMAL_TRIP_CRITICAL:
183 return sprintf(buf, "critical"); 183 return sprintf(buf, "critical\n");
184 case THERMAL_TRIP_HOT: 184 case THERMAL_TRIP_HOT:
185 return sprintf(buf, "hot"); 185 return sprintf(buf, "hot\n");
186 case THERMAL_TRIP_PASSIVE: 186 case THERMAL_TRIP_PASSIVE:
187 return sprintf(buf, "passive"); 187 return sprintf(buf, "passive\n");
188 case THERMAL_TRIP_ACTIVE: 188 case THERMAL_TRIP_ACTIVE:
189 return sprintf(buf, "active"); 189 return sprintf(buf, "active\n");
190 default: 190 default:
191 return sprintf(buf, "unknown"); 191 return sprintf(buf, "unknown\n");
192 } 192 }
193} 193}
194 194
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-11 17:43:40 -0400