diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/char/nwflash.c | 1 | ||||
-rw-r--r-- | drivers/edac/amd64_edac.c | 45 | ||||
-rw-r--r-- | drivers/edac/edac_pci_sysfs.c | 2 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-bfin-twi.c | 6 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-omap.c | 13 | ||||
-rw-r--r-- | drivers/serial/sh-sci.c | 20 | ||||
-rw-r--r-- | drivers/serial/sh-sci.h | 118 | ||||
-rw-r--r-- | drivers/video/cyber2000fb.c | 12 | ||||
-rw-r--r-- | drivers/watchdog/adx_wdt.c | 4 | ||||
-rw-r--r-- | drivers/watchdog/at32ap700x_wdt.c | 2 | ||||
-rw-r--r-- | drivers/watchdog/davinci_wdt.c | 2 | ||||
-rw-r--r-- | drivers/watchdog/iTCO_wdt.c | 4 | ||||
-rw-r--r-- | drivers/watchdog/mpcore_wdt.c | 2 | ||||
-rw-r--r-- | drivers/watchdog/mv64x60_wdt.c | 2 | ||||
-rw-r--r-- | drivers/watchdog/omap_wdt.c | 9 | ||||
-rw-r--r-- | drivers/watchdog/pnx4008_wdt.c | 2 | ||||
-rw-r--r-- | drivers/watchdog/s3c2410_wdt.c | 2 | ||||
-rw-r--r-- | drivers/watchdog/txx9wdt.c | 6 |
18 files changed, 142 insertions, 110 deletions
diff --git a/drivers/char/nwflash.c b/drivers/char/nwflash.c index 8c7df5ba088f..f80810901db6 100644 --- a/drivers/char/nwflash.c +++ b/drivers/char/nwflash.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/init.h> | 27 | #include <linux/init.h> |
28 | #include <linux/smp_lock.h> | 28 | #include <linux/smp_lock.h> |
29 | #include <linux/mutex.h> | 29 | #include <linux/mutex.h> |
30 | #include <linux/jiffies.h> | ||
30 | 31 | ||
31 | #include <asm/hardware/dec21285.h> | 32 | #include <asm/hardware/dec21285.h> |
32 | #include <asm/io.h> | 33 | #include <asm/io.h> |
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index df5b68433f34..c5facd951dda 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c | |||
@@ -1700,11 +1700,14 @@ static void f10_map_sysaddr_to_csrow(struct mem_ctl_info *mci, | |||
1700 | */ | 1700 | */ |
1701 | static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt) | 1701 | static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt) |
1702 | { | 1702 | { |
1703 | int dimm, size0, size1; | 1703 | int dimm, size0, size1, factor = 0; |
1704 | u32 dbam; | 1704 | u32 dbam; |
1705 | u32 *dcsb; | 1705 | u32 *dcsb; |
1706 | 1706 | ||
1707 | if (boot_cpu_data.x86 == 0xf) { | 1707 | if (boot_cpu_data.x86 == 0xf) { |
1708 | if (pvt->dclr0 & F10_WIDTH_128) | ||
1709 | factor = 1; | ||
1710 | |||
1708 | /* K8 families < revF not supported yet */ | 1711 | /* K8 families < revF not supported yet */ |
1709 | if (pvt->ext_model < K8_REV_F) | 1712 | if (pvt->ext_model < K8_REV_F) |
1710 | return; | 1713 | return; |
@@ -1732,7 +1735,8 @@ static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt) | |||
1732 | size1 = pvt->ops->dbam_to_cs(pvt, DBAM_DIMM(dimm, dbam)); | 1735 | size1 = pvt->ops->dbam_to_cs(pvt, DBAM_DIMM(dimm, dbam)); |
1733 | 1736 | ||
1734 | edac_printk(KERN_DEBUG, EDAC_MC, " %d: %5dMB %d: %5dMB\n", | 1737 | edac_printk(KERN_DEBUG, EDAC_MC, " %d: %5dMB %d: %5dMB\n", |
1735 | dimm * 2, size0, dimm * 2 + 1, size1); | 1738 | dimm * 2, size0 << factor, |
1739 | dimm * 2 + 1, size1 << factor); | ||
1736 | } | 1740 | } |
1737 | } | 1741 | } |
1738 | 1742 | ||
@@ -2345,7 +2349,7 @@ static void amd64_read_mc_registers(struct amd64_pvt *pvt) | |||
2345 | amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0); | 2349 | amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0); |
2346 | amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_0, &pvt->dchr0); | 2350 | amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_0, &pvt->dchr0); |
2347 | 2351 | ||
2348 | if (!dct_ganging_enabled(pvt)) { | 2352 | if (!dct_ganging_enabled(pvt) && boot_cpu_data.x86 >= 0x10) { |
2349 | amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_1, &pvt->dclr1); | 2353 | amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_1, &pvt->dclr1); |
2350 | amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_1, &pvt->dchr1); | 2354 | amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_1, &pvt->dchr1); |
2351 | } | 2355 | } |
@@ -2686,9 +2690,8 @@ static int amd64_check_ecc_enabled(struct amd64_pvt *pvt) | |||
2686 | amd64_printk(KERN_WARNING, "%s", ecc_warning); | 2690 | amd64_printk(KERN_WARNING, "%s", ecc_warning); |
2687 | return -ENODEV; | 2691 | return -ENODEV; |
2688 | } | 2692 | } |
2689 | } else | ||
2690 | /* CLEAR the override, since BIOS controlled it */ | ||
2691 | ecc_enable_override = 0; | 2693 | ecc_enable_override = 0; |
2694 | } | ||
2692 | 2695 | ||
2693 | return 0; | 2696 | return 0; |
2694 | } | 2697 | } |
@@ -2925,16 +2928,15 @@ static void __devexit amd64_remove_one_instance(struct pci_dev *pdev) | |||
2925 | 2928 | ||
2926 | amd64_free_mc_sibling_devices(pvt); | 2929 | amd64_free_mc_sibling_devices(pvt); |
2927 | 2930 | ||
2928 | kfree(pvt); | ||
2929 | mci->pvt_info = NULL; | ||
2930 | |||
2931 | mci_lookup[pvt->mc_node_id] = NULL; | ||
2932 | |||
2933 | /* unregister from EDAC MCE */ | 2931 | /* unregister from EDAC MCE */ |
2934 | amd_report_gart_errors(false); | 2932 | amd_report_gart_errors(false); |
2935 | amd_unregister_ecc_decoder(amd64_decode_bus_error); | 2933 | amd_unregister_ecc_decoder(amd64_decode_bus_error); |
2936 | 2934 | ||
2937 | /* Free the EDAC CORE resources */ | 2935 | /* Free the EDAC CORE resources */ |
2936 | mci->pvt_info = NULL; | ||
2937 | mci_lookup[pvt->mc_node_id] = NULL; | ||
2938 | |||
2939 | kfree(pvt); | ||
2938 | edac_mc_free(mci); | 2940 | edac_mc_free(mci); |
2939 | } | 2941 | } |
2940 | 2942 | ||
@@ -3011,25 +3013,29 @@ static void amd64_setup_pci_device(void) | |||
3011 | static int __init amd64_edac_init(void) | 3013 | static int __init amd64_edac_init(void) |
3012 | { | 3014 | { |
3013 | int nb, err = -ENODEV; | 3015 | int nb, err = -ENODEV; |
3016 | bool load_ok = false; | ||
3014 | 3017 | ||
3015 | edac_printk(KERN_INFO, EDAC_MOD_STR, EDAC_AMD64_VERSION "\n"); | 3018 | edac_printk(KERN_INFO, EDAC_MOD_STR, EDAC_AMD64_VERSION "\n"); |
3016 | 3019 | ||
3017 | opstate_init(); | 3020 | opstate_init(); |
3018 | 3021 | ||
3019 | if (cache_k8_northbridges() < 0) | 3022 | if (cache_k8_northbridges() < 0) |
3020 | return err; | 3023 | goto err_ret; |
3021 | 3024 | ||
3022 | msrs = msrs_alloc(); | 3025 | msrs = msrs_alloc(); |
3026 | if (!msrs) | ||
3027 | goto err_ret; | ||
3023 | 3028 | ||
3024 | err = pci_register_driver(&amd64_pci_driver); | 3029 | err = pci_register_driver(&amd64_pci_driver); |
3025 | if (err) | 3030 | if (err) |
3026 | return err; | 3031 | goto err_pci; |
3027 | 3032 | ||
3028 | /* | 3033 | /* |
3029 | * At this point, the array 'pvt_lookup[]' contains pointers to alloc'd | 3034 | * At this point, the array 'pvt_lookup[]' contains pointers to alloc'd |
3030 | * amd64_pvt structs. These will be used in the 2nd stage init function | 3035 | * amd64_pvt structs. These will be used in the 2nd stage init function |
3031 | * to finish initialization of the MC instances. | 3036 | * to finish initialization of the MC instances. |
3032 | */ | 3037 | */ |
3038 | err = -ENODEV; | ||
3033 | for (nb = 0; nb < num_k8_northbridges; nb++) { | 3039 | for (nb = 0; nb < num_k8_northbridges; nb++) { |
3034 | if (!pvt_lookup[nb]) | 3040 | if (!pvt_lookup[nb]) |
3035 | continue; | 3041 | continue; |
@@ -3037,16 +3043,21 @@ static int __init amd64_edac_init(void) | |||
3037 | err = amd64_init_2nd_stage(pvt_lookup[nb]); | 3043 | err = amd64_init_2nd_stage(pvt_lookup[nb]); |
3038 | if (err) | 3044 | if (err) |
3039 | goto err_2nd_stage; | 3045 | goto err_2nd_stage; |
3040 | } | ||
3041 | 3046 | ||
3042 | amd64_setup_pci_device(); | 3047 | load_ok = true; |
3048 | } | ||
3043 | 3049 | ||
3044 | return 0; | 3050 | if (load_ok) { |
3051 | amd64_setup_pci_device(); | ||
3052 | return 0; | ||
3053 | } | ||
3045 | 3054 | ||
3046 | err_2nd_stage: | 3055 | err_2nd_stage: |
3047 | debugf0("2nd stage failed\n"); | ||
3048 | pci_unregister_driver(&amd64_pci_driver); | 3056 | pci_unregister_driver(&amd64_pci_driver); |
3049 | 3057 | err_pci: | |
3058 | msrs_free(msrs); | ||
3059 | msrs = NULL; | ||
3060 | err_ret: | ||
3050 | return err; | 3061 | return err; |
3051 | } | 3062 | } |
3052 | 3063 | ||
diff --git a/drivers/edac/edac_pci_sysfs.c b/drivers/edac/edac_pci_sysfs.c index 422728cfe994..fb60a877d768 100644 --- a/drivers/edac/edac_pci_sysfs.c +++ b/drivers/edac/edac_pci_sysfs.c | |||
@@ -534,8 +534,6 @@ static void edac_pci_dev_parity_clear(struct pci_dev *dev) | |||
534 | { | 534 | { |
535 | u8 header_type; | 535 | u8 header_type; |
536 | 536 | ||
537 | debugf0("%s()\n", __func__); | ||
538 | |||
539 | get_pci_parity_status(dev, 0); | 537 | get_pci_parity_status(dev, 0); |
540 | 538 | ||
541 | /* read the device TYPE, looking for bridges */ | 539 | /* read the device TYPE, looking for bridges */ |
diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c index b309ac2c3d5c..fe3fb567317d 100644 --- a/drivers/i2c/busses/i2c-bfin-twi.c +++ b/drivers/i2c/busses/i2c-bfin-twi.c | |||
@@ -693,13 +693,13 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev) | |||
693 | } | 693 | } |
694 | 694 | ||
695 | /* Set TWI internal clock as 10MHz */ | 695 | /* Set TWI internal clock as 10MHz */ |
696 | write_CONTROL(iface, ((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F); | 696 | write_CONTROL(iface, ((get_sclk() / 1000 / 1000 + 5) / 10) & 0x7F); |
697 | 697 | ||
698 | /* | 698 | /* |
699 | * We will not end up with a CLKDIV=0 because no one will specify | 699 | * We will not end up with a CLKDIV=0 because no one will specify |
700 | * 20kHz SCL or less in Kconfig now. (5 * 1024 / 20 = 0x100) | 700 | * 20kHz SCL or less in Kconfig now. (5 * 1000 / 20 = 250) |
701 | */ | 701 | */ |
702 | clkhilow = 5 * 1024 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ; | 702 | clkhilow = ((10 * 1000 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ) + 1) / 2; |
703 | 703 | ||
704 | /* Set Twi interface clock as specified */ | 704 | /* Set Twi interface clock as specified */ |
705 | write_CLKDIV(iface, (clkhilow << 8) | clkhilow); | 705 | write_CLKDIV(iface, (clkhilow << 8) | clkhilow); |
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 75bf3ad18099..0037e31076ba 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c | |||
@@ -247,7 +247,13 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev) | |||
247 | omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN); | 247 | omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN); |
248 | } | 248 | } |
249 | dev->idle = 0; | 249 | dev->idle = 0; |
250 | omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate); | 250 | |
251 | /* | ||
252 | * Don't write to this register if the IE state is 0 as it can | ||
253 | * cause deadlock. | ||
254 | */ | ||
255 | if (dev->iestate) | ||
256 | omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate); | ||
251 | } | 257 | } |
252 | 258 | ||
253 | static void omap_i2c_idle(struct omap_i2c_dev *dev) | 259 | static void omap_i2c_idle(struct omap_i2c_dev *dev) |
@@ -280,6 +286,11 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) | |||
280 | unsigned long internal_clk = 0; | 286 | unsigned long internal_clk = 0; |
281 | 287 | ||
282 | if (dev->rev >= OMAP_I2C_REV_2) { | 288 | if (dev->rev >= OMAP_I2C_REV_2) { |
289 | /* Disable I2C controller before soft reset */ | ||
290 | omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, | ||
291 | omap_i2c_read_reg(dev, OMAP_I2C_CON_REG) & | ||
292 | ~(OMAP_I2C_CON_EN)); | ||
293 | |||
283 | omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, SYSC_SOFTRESET_MASK); | 294 | omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, SYSC_SOFTRESET_MASK); |
284 | /* For some reason we need to set the EN bit before the | 295 | /* For some reason we need to set the EN bit before the |
285 | * reset done bit gets set. */ | 296 | * reset done bit gets set. */ |
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 68c7f6cfd728..37f0de9dd9ce 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
@@ -222,9 +222,9 @@ static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) | |||
222 | Set SCP6MD1,0 = {01} (output) */ | 222 | Set SCP6MD1,0 = {01} (output) */ |
223 | __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); | 223 | __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); |
224 | 224 | ||
225 | data = ctrl_inb(SCPDR); | 225 | data = __raw_readb(SCPDR); |
226 | /* Set /RTS2 (bit6) = 0 */ | 226 | /* Set /RTS2 (bit6) = 0 */ |
227 | ctrl_outb(data & 0xbf, SCPDR); | 227 | __raw_writeb(data & 0xbf, SCPDR); |
228 | } | 228 | } |
229 | } | 229 | } |
230 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | 230 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
@@ -897,11 +897,21 @@ static void sci_shutdown(struct uart_port *port) | |||
897 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | 897 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, |
898 | struct ktermios *old) | 898 | struct ktermios *old) |
899 | { | 899 | { |
900 | unsigned int status, baud, smr_val; | 900 | unsigned int status, baud, smr_val, max_baud; |
901 | int t = -1; | 901 | int t = -1; |
902 | 902 | ||
903 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | 903 | /* |
904 | if (likely(baud)) | 904 | * earlyprintk comes here early on with port->uartclk set to zero. |
905 | * the clock framework is not up and running at this point so here | ||
906 | * we assume that 115200 is the maximum baud rate. please note that | ||
907 | * the baud rate is not programmed during earlyprintk - it is assumed | ||
908 | * that the previous boot loader has enabled required clocks and | ||
909 | * setup the baud rate generator hardware for us already. | ||
910 | */ | ||
911 | max_baud = port->uartclk ? port->uartclk / 16 : 115200; | ||
912 | |||
913 | baud = uart_get_baud_rate(port, termios, old, 0, max_baud); | ||
914 | if (likely(baud && port->uartclk)) | ||
905 | t = SCBRR_VALUE(baud, port->uartclk); | 915 | t = SCBRR_VALUE(baud, port->uartclk); |
906 | 916 | ||
907 | do { | 917 | do { |
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index a32094eeb42b..0efcded59ae6 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -517,20 +517,20 @@ static const struct __attribute__((packed)) { | |||
517 | static inline int sci_rxd_in(struct uart_port *port) | 517 | static inline int sci_rxd_in(struct uart_port *port) |
518 | { | 518 | { |
519 | if (port->mapbase == 0xfffffe80) | 519 | if (port->mapbase == 0xfffffe80) |
520 | return ctrl_inb(SCPDR)&0x01 ? 1 : 0; /* SCI */ | 520 | return __raw_readb(SCPDR)&0x01 ? 1 : 0; /* SCI */ |
521 | if (port->mapbase == 0xa4000150) | 521 | if (port->mapbase == 0xa4000150) |
522 | return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ | 522 | return __raw_readb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ |
523 | if (port->mapbase == 0xa4000140) | 523 | if (port->mapbase == 0xa4000140) |
524 | return ctrl_inb(SCPDR)&0x04 ? 1 : 0; /* IRDA */ | 524 | return __raw_readb(SCPDR)&0x04 ? 1 : 0; /* IRDA */ |
525 | return 1; | 525 | return 1; |
526 | } | 526 | } |
527 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) | 527 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) |
528 | static inline int sci_rxd_in(struct uart_port *port) | 528 | static inline int sci_rxd_in(struct uart_port *port) |
529 | { | 529 | { |
530 | if (port->mapbase == SCIF0) | 530 | if (port->mapbase == SCIF0) |
531 | return ctrl_inb(SCPDR)&0x04 ? 1 : 0; /* IRDA */ | 531 | return __raw_readb(SCPDR)&0x04 ? 1 : 0; /* IRDA */ |
532 | if (port->mapbase == SCIF2) | 532 | if (port->mapbase == SCIF2) |
533 | return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ | 533 | return __raw_readb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ |
534 | return 1; | 534 | return 1; |
535 | } | 535 | } |
536 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) | 536 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
@@ -557,68 +557,68 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
557 | static inline int sci_rxd_in(struct uart_port *port) | 557 | static inline int sci_rxd_in(struct uart_port *port) |
558 | { | 558 | { |
559 | if (port->mapbase == 0xffe00000) | 559 | if (port->mapbase == 0xffe00000) |
560 | return ctrl_inb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */ | 560 | return __raw_readb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */ |
561 | if (port->mapbase == 0xffe80000) | 561 | if (port->mapbase == 0xffe80000) |
562 | return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ | 562 | return __raw_readw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ |
563 | return 1; | 563 | return 1; |
564 | } | 564 | } |
565 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) | 565 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) |
566 | static inline int sci_rxd_in(struct uart_port *port) | 566 | static inline int sci_rxd_in(struct uart_port *port) |
567 | { | 567 | { |
568 | if (port->mapbase == 0xffe80000) | 568 | if (port->mapbase == 0xffe80000) |
569 | return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ | 569 | return __raw_readw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ |
570 | return 1; | 570 | return 1; |
571 | } | 571 | } |
572 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) | 572 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) |
573 | static inline int sci_rxd_in(struct uart_port *port) | 573 | static inline int sci_rxd_in(struct uart_port *port) |
574 | { | 574 | { |
575 | if (port->mapbase == 0xfe4b0000) | 575 | if (port->mapbase == 0xfe4b0000) |
576 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; | 576 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; |
577 | if (port->mapbase == 0xfe4c0000) | 577 | if (port->mapbase == 0xfe4c0000) |
578 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; | 578 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; |
579 | if (port->mapbase == 0xfe4d0000) | 579 | if (port->mapbase == 0xfe4d0000) |
580 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; | 580 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; |
581 | } | 581 | } |
582 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) | 582 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) |
583 | static inline int sci_rxd_in(struct uart_port *port) | 583 | static inline int sci_rxd_in(struct uart_port *port) |
584 | { | 584 | { |
585 | if (port->mapbase == 0xfe600000) | 585 | if (port->mapbase == 0xfe600000) |
586 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 586 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
587 | if (port->mapbase == 0xfe610000) | 587 | if (port->mapbase == 0xfe610000) |
588 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 588 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
589 | if (port->mapbase == 0xfe620000) | 589 | if (port->mapbase == 0xfe620000) |
590 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 590 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
591 | return 1; | 591 | return 1; |
592 | } | 592 | } |
593 | #elif defined(CONFIG_CPU_SUBTYPE_SH7343) | 593 | #elif defined(CONFIG_CPU_SUBTYPE_SH7343) |
594 | static inline int sci_rxd_in(struct uart_port *port) | 594 | static inline int sci_rxd_in(struct uart_port *port) |
595 | { | 595 | { |
596 | if (port->mapbase == 0xffe00000) | 596 | if (port->mapbase == 0xffe00000) |
597 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 597 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
598 | if (port->mapbase == 0xffe10000) | 598 | if (port->mapbase == 0xffe10000) |
599 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 599 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
600 | if (port->mapbase == 0xffe20000) | 600 | if (port->mapbase == 0xffe20000) |
601 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 601 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
602 | if (port->mapbase == 0xffe30000) | 602 | if (port->mapbase == 0xffe30000) |
603 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 603 | return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
604 | return 1; | 604 | return 1; |
605 | } | 605 | } |
606 | #elif defined(CONFIG_CPU_SUBTYPE_SH7366) | 606 | #elif defined(CONFIG_CPU_SUBTYPE_SH7366) |
607 | static inline int sci_rxd_in(struct uart_port *port) | 607 | static inline int sci_rxd_in(struct uart_port *port) |
608 | { | 608 | { |
609 | if (port->mapbase == 0xffe00000) | 609 | if (port->mapbase == 0xffe00000) |
610 | return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ | 610 | return __raw_readb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ |
611 | return 1; | 611 | return 1; |
612 | } | 612 | } |
613 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | 613 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
614 | static inline int sci_rxd_in(struct uart_port *port) | 614 | static inline int sci_rxd_in(struct uart_port *port) |
615 | { | 615 | { |
616 | if (port->mapbase == 0xffe00000) | 616 | if (port->mapbase == 0xffe00000) |
617 | return ctrl_inb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */ | 617 | return __raw_readb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */ |
618 | if (port->mapbase == 0xffe10000) | 618 | if (port->mapbase == 0xffe10000) |
619 | return ctrl_inb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */ | 619 | return __raw_readb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */ |
620 | if (port->mapbase == 0xffe20000) | 620 | if (port->mapbase == 0xffe20000) |
621 | return ctrl_inb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */ | 621 | return __raw_readb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */ |
622 | 622 | ||
623 | return 1; | 623 | return 1; |
624 | } | 624 | } |
@@ -626,17 +626,17 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
626 | static inline int sci_rxd_in(struct uart_port *port) | 626 | static inline int sci_rxd_in(struct uart_port *port) |
627 | { | 627 | { |
628 | if (port->mapbase == 0xffe00000) | 628 | if (port->mapbase == 0xffe00000) |
629 | return ctrl_inb(SCSPTR0) & 0x0008 ? 1 : 0; /* SCIF0 */ | 629 | return __raw_readb(SCSPTR0) & 0x0008 ? 1 : 0; /* SCIF0 */ |
630 | if (port->mapbase == 0xffe10000) | 630 | if (port->mapbase == 0xffe10000) |
631 | return ctrl_inb(SCSPTR1) & 0x0020 ? 1 : 0; /* SCIF1 */ | 631 | return __raw_readb(SCSPTR1) & 0x0020 ? 1 : 0; /* SCIF1 */ |
632 | if (port->mapbase == 0xffe20000) | 632 | if (port->mapbase == 0xffe20000) |
633 | return ctrl_inb(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF2 */ | 633 | return __raw_readb(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF2 */ |
634 | if (port->mapbase == 0xa4e30000) | 634 | if (port->mapbase == 0xa4e30000) |
635 | return ctrl_inb(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF3 */ | 635 | return __raw_readb(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF3 */ |
636 | if (port->mapbase == 0xa4e40000) | 636 | if (port->mapbase == 0xa4e40000) |
637 | return ctrl_inb(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF4 */ | 637 | return __raw_readb(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF4 */ |
638 | if (port->mapbase == 0xa4e50000) | 638 | if (port->mapbase == 0xa4e50000) |
639 | return ctrl_inb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */ | 639 | return __raw_readb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */ |
640 | return 1; | 640 | return 1; |
641 | } | 641 | } |
642 | #elif defined(CONFIG_CPU_SUBTYPE_SH7724) | 642 | #elif defined(CONFIG_CPU_SUBTYPE_SH7724) |
@@ -645,9 +645,9 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
645 | static inline int sci_rxd_in(struct uart_port *port) | 645 | static inline int sci_rxd_in(struct uart_port *port) |
646 | { | 646 | { |
647 | if (port->type == PORT_SCIF) | 647 | if (port->type == PORT_SCIF) |
648 | return ctrl_inw((port->mapbase + SCFSR)) & SCIF_BRK ? 1 : 0; | 648 | return __raw_readw((port->mapbase + SCFSR)) & SCIF_BRK ? 1 : 0; |
649 | if (port->type == PORT_SCIFA) | 649 | if (port->type == PORT_SCIFA) |
650 | return ctrl_inw((port->mapbase + SCASSR)) & SCIF_BRK ? 1 : 0; | 650 | return __raw_readw((port->mapbase + SCASSR)) & SCIF_BRK ? 1 : 0; |
651 | return 1; | 651 | return 1; |
652 | } | 652 | } |
653 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) | 653 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) |
@@ -665,11 +665,11 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
665 | static inline int sci_rxd_in(struct uart_port *port) | 665 | static inline int sci_rxd_in(struct uart_port *port) |
666 | { | 666 | { |
667 | if (port->mapbase == 0xffe00000) | 667 | if (port->mapbase == 0xffe00000) |
668 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 668 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
669 | if (port->mapbase == 0xffe08000) | 669 | if (port->mapbase == 0xffe08000) |
670 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 670 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
671 | if (port->mapbase == 0xffe10000) | 671 | if (port->mapbase == 0xffe10000) |
672 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF/IRDA */ | 672 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF/IRDA */ |
673 | 673 | ||
674 | return 1; | 674 | return 1; |
675 | } | 675 | } |
@@ -677,20 +677,20 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
677 | static inline int sci_rxd_in(struct uart_port *port) | 677 | static inline int sci_rxd_in(struct uart_port *port) |
678 | { | 678 | { |
679 | if (port->mapbase == 0xff923000) | 679 | if (port->mapbase == 0xff923000) |
680 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 680 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
681 | if (port->mapbase == 0xff924000) | 681 | if (port->mapbase == 0xff924000) |
682 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 682 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
683 | if (port->mapbase == 0xff925000) | 683 | if (port->mapbase == 0xff925000) |
684 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 684 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
685 | return 1; | 685 | return 1; |
686 | } | 686 | } |
687 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) | 687 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) |
688 | static inline int sci_rxd_in(struct uart_port *port) | 688 | static inline int sci_rxd_in(struct uart_port *port) |
689 | { | 689 | { |
690 | if (port->mapbase == 0xffe00000) | 690 | if (port->mapbase == 0xffe00000) |
691 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 691 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
692 | if (port->mapbase == 0xffe10000) | 692 | if (port->mapbase == 0xffe10000) |
693 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 693 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
694 | return 1; | 694 | return 1; |
695 | } | 695 | } |
696 | #elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \ | 696 | #elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
@@ -698,17 +698,17 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
698 | static inline int sci_rxd_in(struct uart_port *port) | 698 | static inline int sci_rxd_in(struct uart_port *port) |
699 | { | 699 | { |
700 | if (port->mapbase == 0xffea0000) | 700 | if (port->mapbase == 0xffea0000) |
701 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 701 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
702 | if (port->mapbase == 0xffeb0000) | 702 | if (port->mapbase == 0xffeb0000) |
703 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 703 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
704 | if (port->mapbase == 0xffec0000) | 704 | if (port->mapbase == 0xffec0000) |
705 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 705 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
706 | if (port->mapbase == 0xffed0000) | 706 | if (port->mapbase == 0xffed0000) |
707 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 707 | return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
708 | if (port->mapbase == 0xffee0000) | 708 | if (port->mapbase == 0xffee0000) |
709 | return ctrl_inw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */ | 709 | return __raw_readw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */ |
710 | if (port->mapbase == 0xffef0000) | 710 | if (port->mapbase == 0xffef0000) |
711 | return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */ | 711 | return __raw_readw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */ |
712 | return 1; | 712 | return 1; |
713 | } | 713 | } |
714 | #elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \ | 714 | #elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \ |
@@ -718,22 +718,22 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
718 | static inline int sci_rxd_in(struct uart_port *port) | 718 | static inline int sci_rxd_in(struct uart_port *port) |
719 | { | 719 | { |
720 | if (port->mapbase == 0xfffe8000) | 720 | if (port->mapbase == 0xfffe8000) |
721 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 721 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
722 | if (port->mapbase == 0xfffe8800) | 722 | if (port->mapbase == 0xfffe8800) |
723 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 723 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
724 | if (port->mapbase == 0xfffe9000) | 724 | if (port->mapbase == 0xfffe9000) |
725 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 725 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
726 | if (port->mapbase == 0xfffe9800) | 726 | if (port->mapbase == 0xfffe9800) |
727 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 727 | return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
728 | #if defined(CONFIG_CPU_SUBTYPE_SH7201) | 728 | #if defined(CONFIG_CPU_SUBTYPE_SH7201) |
729 | if (port->mapbase == 0xfffeA000) | 729 | if (port->mapbase == 0xfffeA000) |
730 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 730 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
731 | if (port->mapbase == 0xfffeA800) | 731 | if (port->mapbase == 0xfffeA800) |
732 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 732 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
733 | if (port->mapbase == 0xfffeB000) | 733 | if (port->mapbase == 0xfffeB000) |
734 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 734 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
735 | if (port->mapbase == 0xfffeB800) | 735 | if (port->mapbase == 0xfffeB800) |
736 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 736 | return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
737 | #endif | 737 | #endif |
738 | return 1; | 738 | return 1; |
739 | } | 739 | } |
@@ -741,24 +741,24 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
741 | static inline int sci_rxd_in(struct uart_port *port) | 741 | static inline int sci_rxd_in(struct uart_port *port) |
742 | { | 742 | { |
743 | if (port->mapbase == 0xf8400000) | 743 | if (port->mapbase == 0xf8400000) |
744 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 744 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
745 | if (port->mapbase == 0xf8410000) | 745 | if (port->mapbase == 0xf8410000) |
746 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 746 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
747 | if (port->mapbase == 0xf8420000) | 747 | if (port->mapbase == 0xf8420000) |
748 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 748 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
749 | return 1; | 749 | return 1; |
750 | } | 750 | } |
751 | #elif defined(CONFIG_CPU_SUBTYPE_SHX3) | 751 | #elif defined(CONFIG_CPU_SUBTYPE_SHX3) |
752 | static inline int sci_rxd_in(struct uart_port *port) | 752 | static inline int sci_rxd_in(struct uart_port *port) |
753 | { | 753 | { |
754 | if (port->mapbase == 0xffc30000) | 754 | if (port->mapbase == 0xffc30000) |
755 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 755 | return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
756 | if (port->mapbase == 0xffc40000) | 756 | if (port->mapbase == 0xffc40000) |
757 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 757 | return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
758 | if (port->mapbase == 0xffc50000) | 758 | if (port->mapbase == 0xffc50000) |
759 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 759 | return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
760 | if (port->mapbase == 0xffc60000) | 760 | if (port->mapbase == 0xffc60000) |
761 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 761 | return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
762 | return 1; | 762 | return 1; |
763 | } | 763 | } |
764 | #endif | 764 | #endif |
diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c index da7c01b39be2..3a561df2e8a2 100644 --- a/drivers/video/cyber2000fb.c +++ b/drivers/video/cyber2000fb.c | |||
@@ -1573,15 +1573,15 @@ cyberpro_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) | |||
1573 | if (err) | 1573 | if (err) |
1574 | return err; | 1574 | return err; |
1575 | 1575 | ||
1576 | err = pci_request_regions(dev, name); | ||
1577 | if (err) | ||
1578 | return err; | ||
1579 | |||
1580 | err = -ENOMEM; | 1576 | err = -ENOMEM; |
1581 | cfb = cyberpro_alloc_fb_info(id->driver_data, name); | 1577 | cfb = cyberpro_alloc_fb_info(id->driver_data, name); |
1582 | if (!cfb) | 1578 | if (!cfb) |
1583 | goto failed_release; | 1579 | goto failed_release; |
1584 | 1580 | ||
1581 | err = pci_request_regions(dev, cfb->fb.fix.id); | ||
1582 | if (err) | ||
1583 | goto failed_regions; | ||
1584 | |||
1585 | cfb->dev = dev; | 1585 | cfb->dev = dev; |
1586 | cfb->region = pci_ioremap_bar(dev, 0); | 1586 | cfb->region = pci_ioremap_bar(dev, 0); |
1587 | if (!cfb->region) | 1587 | if (!cfb->region) |
@@ -1633,10 +1633,10 @@ cyberpro_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) | |||
1633 | failed: | 1633 | failed: |
1634 | iounmap(cfb->region); | 1634 | iounmap(cfb->region); |
1635 | failed_ioremap: | 1635 | failed_ioremap: |
1636 | pci_release_regions(dev); | ||
1637 | failed_regions: | ||
1636 | cyberpro_free_fb_info(cfb); | 1638 | cyberpro_free_fb_info(cfb); |
1637 | failed_release: | 1639 | failed_release: |
1638 | pci_release_regions(dev); | ||
1639 | |||
1640 | return err; | 1640 | return err; |
1641 | } | 1641 | } |
1642 | 1642 | ||
diff --git a/drivers/watchdog/adx_wdt.c b/drivers/watchdog/adx_wdt.c index 9c6594473d3b..9d7d155364f8 100644 --- a/drivers/watchdog/adx_wdt.c +++ b/drivers/watchdog/adx_wdt.c | |||
@@ -242,14 +242,14 @@ static int __devinit adx_wdt_probe(struct platform_device *pdev) | |||
242 | } | 242 | } |
243 | 243 | ||
244 | res = devm_request_mem_region(&pdev->dev, res->start, | 244 | res = devm_request_mem_region(&pdev->dev, res->start, |
245 | res->end - res->start + 1, res->name); | 245 | resource_size(res), res->name); |
246 | if (!res) { | 246 | if (!res) { |
247 | dev_err(&pdev->dev, "cannot request I/O memory region\n"); | 247 | dev_err(&pdev->dev, "cannot request I/O memory region\n"); |
248 | return -ENXIO; | 248 | return -ENXIO; |
249 | } | 249 | } |
250 | 250 | ||
251 | wdt->base = devm_ioremap_nocache(&pdev->dev, res->start, | 251 | wdt->base = devm_ioremap_nocache(&pdev->dev, res->start, |
252 | res->end - res->start + 1); | 252 | resource_size(res)); |
253 | if (!wdt->base) { | 253 | if (!wdt->base) { |
254 | dev_err(&pdev->dev, "cannot remap I/O memory region\n"); | 254 | dev_err(&pdev->dev, "cannot remap I/O memory region\n"); |
255 | return -ENXIO; | 255 | return -ENXIO; |
diff --git a/drivers/watchdog/at32ap700x_wdt.c b/drivers/watchdog/at32ap700x_wdt.c index e8ae638e5804..037847923dcb 100644 --- a/drivers/watchdog/at32ap700x_wdt.c +++ b/drivers/watchdog/at32ap700x_wdt.c | |||
@@ -326,7 +326,7 @@ static int __init at32_wdt_probe(struct platform_device *pdev) | |||
326 | return -ENOMEM; | 326 | return -ENOMEM; |
327 | } | 327 | } |
328 | 328 | ||
329 | wdt->regs = ioremap(regs->start, regs->end - regs->start + 1); | 329 | wdt->regs = ioremap(regs->start, resource_size(regs)); |
330 | if (!wdt->regs) { | 330 | if (!wdt->regs) { |
331 | ret = -ENOMEM; | 331 | ret = -ENOMEM; |
332 | dev_dbg(&pdev->dev, "could not map I/O memory\n"); | 332 | dev_dbg(&pdev->dev, "could not map I/O memory\n"); |
diff --git a/drivers/watchdog/davinci_wdt.c b/drivers/watchdog/davinci_wdt.c index 9d7520fa9e9c..887136de1857 100644 --- a/drivers/watchdog/davinci_wdt.c +++ b/drivers/watchdog/davinci_wdt.c | |||
@@ -221,7 +221,7 @@ static int __devinit davinci_wdt_probe(struct platform_device *pdev) | |||
221 | return -ENOENT; | 221 | return -ENOENT; |
222 | } | 222 | } |
223 | 223 | ||
224 | size = res->end - res->start + 1; | 224 | size = resource_size(res); |
225 | wdt_mem = request_mem_region(res->start, size, pdev->name); | 225 | wdt_mem = request_mem_region(res->start, size, pdev->name); |
226 | 226 | ||
227 | if (wdt_mem == NULL) { | 227 | if (wdt_mem == NULL) { |
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c index e44fbb31bc6f..c8a3bec26830 100644 --- a/drivers/watchdog/iTCO_wdt.c +++ b/drivers/watchdog/iTCO_wdt.c | |||
@@ -30,6 +30,7 @@ | |||
30 | * document number 316972-004, 316973-012: 82801I (ICH9) | 30 | * document number 316972-004, 316973-012: 82801I (ICH9) |
31 | * document number 319973-002, 319974-002: 82801J (ICH10) | 31 | * document number 319973-002, 319974-002: 82801J (ICH10) |
32 | * document number 322169-001, 322170-001: 5 Series, 3400 Series (PCH) | 32 | * document number 322169-001, 322170-001: 5 Series, 3400 Series (PCH) |
33 | * document number 320066-003, 320257-008: EP80597 (IICH) | ||
33 | */ | 34 | */ |
34 | 35 | ||
35 | /* | 36 | /* |
@@ -100,6 +101,7 @@ enum iTCO_chipsets { | |||
100 | TCO_PCH, /* PCH Desktop Full Featured */ | 101 | TCO_PCH, /* PCH Desktop Full Featured */ |
101 | TCO_PCHM, /* PCH Mobile Full Featured */ | 102 | TCO_PCHM, /* PCH Mobile Full Featured */ |
102 | TCO_PCHMSFF, /* PCH Mobile SFF Full Featured */ | 103 | TCO_PCHMSFF, /* PCH Mobile SFF Full Featured */ |
104 | TCO_EP80579, /* EP80579 */ | ||
103 | }; | 105 | }; |
104 | 106 | ||
105 | static struct { | 107 | static struct { |
@@ -143,6 +145,7 @@ static struct { | |||
143 | {"PCH Desktop Full Featured", 2}, | 145 | {"PCH Desktop Full Featured", 2}, |
144 | {"PCH Mobile Full Featured", 2}, | 146 | {"PCH Mobile Full Featured", 2}, |
145 | {"PCH Mobile SFF Full Featured", 2}, | 147 | {"PCH Mobile SFF Full Featured", 2}, |
148 | {"EP80579", 2}, | ||
146 | {NULL, 0} | 149 | {NULL, 0} |
147 | }; | 150 | }; |
148 | 151 | ||
@@ -214,6 +217,7 @@ static struct pci_device_id iTCO_wdt_pci_tbl[] = { | |||
214 | { ITCO_PCI_DEVICE(0x3b00, TCO_PCH)}, | 217 | { ITCO_PCI_DEVICE(0x3b00, TCO_PCH)}, |
215 | { ITCO_PCI_DEVICE(0x3b01, TCO_PCHM)}, | 218 | { ITCO_PCI_DEVICE(0x3b01, TCO_PCHM)}, |
216 | { ITCO_PCI_DEVICE(0x3b0d, TCO_PCHMSFF)}, | 219 | { ITCO_PCI_DEVICE(0x3b0d, TCO_PCHMSFF)}, |
220 | { ITCO_PCI_DEVICE(0x5031, TCO_EP80579)}, | ||
217 | { 0, }, /* End of list */ | 221 | { 0, }, /* End of list */ |
218 | }; | 222 | }; |
219 | MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl); | 223 | MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl); |
diff --git a/drivers/watchdog/mpcore_wdt.c b/drivers/watchdog/mpcore_wdt.c index 83fa34b214b4..a2dc07c2ed49 100644 --- a/drivers/watchdog/mpcore_wdt.c +++ b/drivers/watchdog/mpcore_wdt.c | |||
@@ -350,7 +350,7 @@ static int __devinit mpcore_wdt_probe(struct platform_device *dev) | |||
350 | ret = -ENXIO; | 350 | ret = -ENXIO; |
351 | goto err_free; | 351 | goto err_free; |
352 | } | 352 | } |
353 | wdt->base = ioremap(res->start, res->end - res->start + 1); | 353 | wdt->base = ioremap(res->start, resource_size(res)); |
354 | if (!wdt->base) { | 354 | if (!wdt->base) { |
355 | ret = -ENOMEM; | 355 | ret = -ENOMEM; |
356 | goto err_free; | 356 | goto err_free; |
diff --git a/drivers/watchdog/mv64x60_wdt.c b/drivers/watchdog/mv64x60_wdt.c index acf589dc057c..a51dbe4c43da 100644 --- a/drivers/watchdog/mv64x60_wdt.c +++ b/drivers/watchdog/mv64x60_wdt.c | |||
@@ -275,7 +275,7 @@ static int __devinit mv64x60_wdt_probe(struct platform_device *dev) | |||
275 | if (!r) | 275 | if (!r) |
276 | return -ENODEV; | 276 | return -ENODEV; |
277 | 277 | ||
278 | mv64x60_wdt_regs = ioremap(r->start, r->end - r->start + 1); | 278 | mv64x60_wdt_regs = ioremap(r->start, resource_size(r)); |
279 | if (mv64x60_wdt_regs == NULL) | 279 | if (mv64x60_wdt_regs == NULL) |
280 | return -ENOMEM; | 280 | return -ENOMEM; |
281 | 281 | ||
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c index 429ea99eaee5..c6aaf2845741 100644 --- a/drivers/watchdog/omap_wdt.c +++ b/drivers/watchdog/omap_wdt.c | |||
@@ -277,8 +277,7 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev) | |||
277 | goto err_busy; | 277 | goto err_busy; |
278 | } | 278 | } |
279 | 279 | ||
280 | mem = request_mem_region(res->start, res->end - res->start + 1, | 280 | mem = request_mem_region(res->start, resource_size(res), pdev->name); |
281 | pdev->name); | ||
282 | if (!mem) { | 281 | if (!mem) { |
283 | ret = -EBUSY; | 282 | ret = -EBUSY; |
284 | goto err_busy; | 283 | goto err_busy; |
@@ -306,7 +305,7 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev) | |||
306 | goto err_clk; | 305 | goto err_clk; |
307 | } | 306 | } |
308 | 307 | ||
309 | wdev->base = ioremap(res->start, res->end - res->start + 1); | 308 | wdev->base = ioremap(res->start, resource_size(res)); |
310 | if (!wdev->base) { | 309 | if (!wdev->base) { |
311 | ret = -ENOMEM; | 310 | ret = -ENOMEM; |
312 | goto err_ioremap; | 311 | goto err_ioremap; |
@@ -358,7 +357,7 @@ err_clk: | |||
358 | kfree(wdev); | 357 | kfree(wdev); |
359 | 358 | ||
360 | err_kzalloc: | 359 | err_kzalloc: |
361 | release_mem_region(res->start, res->end - res->start + 1); | 360 | release_mem_region(res->start, resource_size(res)); |
362 | 361 | ||
363 | err_busy: | 362 | err_busy: |
364 | err_get_resource: | 363 | err_get_resource: |
@@ -383,7 +382,7 @@ static int __devexit omap_wdt_remove(struct platform_device *pdev) | |||
383 | return -ENOENT; | 382 | return -ENOENT; |
384 | 383 | ||
385 | misc_deregister(&(wdev->omap_wdt_miscdev)); | 384 | misc_deregister(&(wdev->omap_wdt_miscdev)); |
386 | release_mem_region(res->start, res->end - res->start + 1); | 385 | release_mem_region(res->start, resource_size(res)); |
387 | platform_set_drvdata(pdev, NULL); | 386 | platform_set_drvdata(pdev, NULL); |
388 | 387 | ||
389 | clk_put(wdev->ick); | 388 | clk_put(wdev->ick); |
diff --git a/drivers/watchdog/pnx4008_wdt.c b/drivers/watchdog/pnx4008_wdt.c index 4d227b152001..430a5848a9a5 100644 --- a/drivers/watchdog/pnx4008_wdt.c +++ b/drivers/watchdog/pnx4008_wdt.c | |||
@@ -264,7 +264,7 @@ static int __devinit pnx4008_wdt_probe(struct platform_device *pdev) | |||
264 | return -ENOENT; | 264 | return -ENOENT; |
265 | } | 265 | } |
266 | 266 | ||
267 | size = res->end - res->start + 1; | 267 | size = resource_size(res); |
268 | wdt_mem = request_mem_region(res->start, size, pdev->name); | 268 | wdt_mem = request_mem_region(res->start, size, pdev->name); |
269 | 269 | ||
270 | if (wdt_mem == NULL) { | 270 | if (wdt_mem == NULL) { |
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 85b93e15d011..8760a26ab2a3 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c | |||
@@ -421,7 +421,7 @@ static int __devinit s3c2410wdt_probe(struct platform_device *pdev) | |||
421 | return -ENOENT; | 421 | return -ENOENT; |
422 | } | 422 | } |
423 | 423 | ||
424 | size = (res->end - res->start) + 1; | 424 | size = resource_size(res); |
425 | wdt_mem = request_mem_region(res->start, size, pdev->name); | 425 | wdt_mem = request_mem_region(res->start, size, pdev->name); |
426 | if (wdt_mem == NULL) { | 426 | if (wdt_mem == NULL) { |
427 | dev_err(dev, "failed to get memory region\n"); | 427 | dev_err(dev, "failed to get memory region\n"); |
diff --git a/drivers/watchdog/txx9wdt.c b/drivers/watchdog/txx9wdt.c index 6adab77fbbb0..d635566e9307 100644 --- a/drivers/watchdog/txx9wdt.c +++ b/drivers/watchdog/txx9wdt.c | |||
@@ -214,12 +214,10 @@ static int __init txx9wdt_probe(struct platform_device *dev) | |||
214 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); | 214 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); |
215 | if (!res) | 215 | if (!res) |
216 | goto exit_busy; | 216 | goto exit_busy; |
217 | if (!devm_request_mem_region(&dev->dev, | 217 | if (!devm_request_mem_region(&dev->dev, res->start, resource_size(res), |
218 | res->start, res->end - res->start + 1, | ||
219 | "txx9wdt")) | 218 | "txx9wdt")) |
220 | goto exit_busy; | 219 | goto exit_busy; |
221 | txx9wdt_reg = devm_ioremap(&dev->dev, | 220 | txx9wdt_reg = devm_ioremap(&dev->dev, res->start, resource_size(res)); |
222 | res->start, res->end - res->start + 1); | ||
223 | if (!txx9wdt_reg) | 221 | if (!txx9wdt_reg) |
224 | goto exit_busy; | 222 | goto exit_busy; |
225 | 223 | ||