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-rw-r--r--drivers/i2c/chips/Kconfig26
-rw-r--r--drivers/i2c/chips/Makefile1
-rw-r--r--drivers/i2c/chips/at24.c583
3 files changed, 610 insertions, 0 deletions
diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig
index 6326468d5f0b..50e0a4653741 100644
--- a/drivers/i2c/chips/Kconfig
+++ b/drivers/i2c/chips/Kconfig
@@ -14,6 +14,32 @@ config DS1682
14 This driver can also be built as a module. If so, the module 14 This driver can also be built as a module. If so, the module
15 will be called ds1682. 15 will be called ds1682.
16 16
17config AT24
18 tristate "EEPROMs from most vendors"
19 depends on SYSFS && EXPERIMENTAL
20 help
21 Enable this driver to get read/write support to most I2C EEPROMs,
22 after you configure the driver to know about each EEPROM on
23 your target board. Use these generic chip names, instead of
24 vendor-specific ones like at24c64 or 24lc02:
25
26 24c00, 24c01, 24c02, spd (readonly 24c02), 24c04, 24c08,
27 24c16, 24c32, 24c64, 24c128, 24c256, 24c512, 24c1024
28
29 Unless you like data loss puzzles, always be sure that any chip
30 you configure as a 24c32 (32 kbit) or larger is NOT really a
31 24c16 (16 kbit) or smaller, and vice versa. Marking the chip
32 as read-only won't help recover from this. Also, if your chip
33 has any software write-protect mechanism you may want to review the
34 code to make sure this driver won't turn it on by accident.
35
36 If you use this with an SMBus adapter instead of an I2C adapter,
37 full functionality is not available. Only smaller devices are
38 supported (24c16 and below, max 4 kByte).
39
40 This driver can also be built as a module. If so, the module
41 will be called at24.
42
17config SENSORS_EEPROM 43config SENSORS_EEPROM
18 tristate "EEPROM reader" 44 tristate "EEPROM reader"
19 depends on EXPERIMENTAL 45 depends on EXPERIMENTAL
diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile
index e47aca0ca5ae..39e3e69ed125 100644
--- a/drivers/i2c/chips/Makefile
+++ b/drivers/i2c/chips/Makefile
@@ -10,6 +10,7 @@
10# 10#
11 11
12obj-$(CONFIG_DS1682) += ds1682.o 12obj-$(CONFIG_DS1682) += ds1682.o
13obj-$(CONFIG_AT24) += at24.o
13obj-$(CONFIG_SENSORS_EEPROM) += eeprom.o 14obj-$(CONFIG_SENSORS_EEPROM) += eeprom.o
14obj-$(CONFIG_SENSORS_MAX6875) += max6875.o 15obj-$(CONFIG_SENSORS_MAX6875) += max6875.o
15obj-$(CONFIG_SENSORS_PCA9539) += pca9539.o 16obj-$(CONFIG_SENSORS_PCA9539) += pca9539.o
diff --git a/drivers/i2c/chips/at24.c b/drivers/i2c/chips/at24.c
new file mode 100644
index 000000000000..e764c94f3e3d
--- /dev/null
+++ b/drivers/i2c/chips/at24.c
@@ -0,0 +1,583 @@
1/*
2 * at24.c - handle most I2C EEPROMs
3 *
4 * Copyright (C) 2005-2007 David Brownell
5 * Copyright (C) 2008 Wolfram Sang, Pengutronix
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/slab.h>
16#include <linux/delay.h>
17#include <linux/mutex.h>
18#include <linux/sysfs.h>
19#include <linux/mod_devicetable.h>
20#include <linux/log2.h>
21#include <linux/bitops.h>
22#include <linux/jiffies.h>
23#include <linux/i2c.h>
24#include <linux/i2c/at24.h>
25
26/*
27 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
28 * Differences between different vendor product lines (like Atmel AT24C or
29 * MicroChip 24LC, etc) won't much matter for typical read/write access.
30 * There are also I2C RAM chips, likewise interchangeable. One example
31 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
32 *
33 * However, misconfiguration can lose data. "Set 16-bit memory address"
34 * to a part with 8-bit addressing will overwrite data. Writing with too
35 * big a page size also loses data. And it's not safe to assume that the
36 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
37 * uses 0x51, for just one example.
38 *
39 * Accordingly, explicit board-specific configuration data should be used
40 * in almost all cases. (One partial exception is an SMBus used to access
41 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
42 *
43 * So this driver uses "new style" I2C driver binding, expecting to be
44 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
45 * similar kernel-resident tables; or, configuration data coming from
46 * a bootloader.
47 *
48 * Other than binding model, current differences from "eeprom" driver are
49 * that this one handles write access and isn't restricted to 24c02 devices.
50 * It also handles larger devices (32 kbit and up) with two-byte addresses,
51 * which won't work on pure SMBus systems.
52 */
53
54struct at24_data {
55 struct at24_platform_data chip;
56 bool use_smbus;
57
58 /*
59 * Lock protects against activities from other Linux tasks,
60 * but not from changes by other I2C masters.
61 */
62 struct mutex lock;
63 struct bin_attribute bin;
64
65 u8 *writebuf;
66 unsigned write_max;
67 unsigned num_addresses;
68
69 /*
70 * Some chips tie up multiple I2C addresses; dummy devices reserve
71 * them for us, and we'll use them with SMBus calls.
72 */
73 struct i2c_client *client[];
74};
75
76/*
77 * This parameter is to help this driver avoid blocking other drivers out
78 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
79 * clock, one 256 byte read takes about 1/43 second which is excessive;
80 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
81 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
82 *
83 * This value is forced to be a power of two so that writes align on pages.
84 */
85static unsigned io_limit = 128;
86module_param(io_limit, uint, 0);
87MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
88
89/*
90 * Specs often allow 5 msec for a page write, sometimes 20 msec;
91 * it's important to recover from write timeouts.
92 */
93static unsigned write_timeout = 25;
94module_param(write_timeout, uint, 0);
95MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
96
97#define AT24_SIZE_BYTELEN 5
98#define AT24_SIZE_FLAGS 8
99
100#define AT24_BITMASK(x) (BIT(x) - 1)
101
102/* create non-zero magic value for given eeprom parameters */
103#define AT24_DEVICE_MAGIC(_len, _flags) \
104 ((1 << AT24_SIZE_FLAGS | (_flags)) \
105 << AT24_SIZE_BYTELEN | ilog2(_len))
106
107static const struct i2c_device_id at24_ids[] = {
108 /* needs 8 addresses as A0-A2 are ignored */
109 { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
110 /* old variants can't be handled with this generic entry! */
111 { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
112 { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
113 /* spd is a 24c02 in memory DIMMs */
114 { "spd", AT24_DEVICE_MAGIC(2048 / 8,
115 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
116 { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
117 /* 24rf08 quirk is handled at i2c-core */
118 { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
119 { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
120 { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
121 { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
122 { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
123 { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
124 { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
125 { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
126 { "at24", 0 },
127 { /* END OF LIST */ }
128};
129MODULE_DEVICE_TABLE(i2c, at24_ids);
130
131/*-------------------------------------------------------------------------*/
132
133/*
134 * This routine supports chips which consume multiple I2C addresses. It
135 * computes the addressing information to be used for a given r/w request.
136 * Assumes that sanity checks for offset happened at sysfs-layer.
137 */
138static struct i2c_client *at24_translate_offset(struct at24_data *at24,
139 unsigned *offset)
140{
141 unsigned i;
142
143 if (at24->chip.flags & AT24_FLAG_ADDR16) {
144 i = *offset >> 16;
145 *offset &= 0xffff;
146 } else {
147 i = *offset >> 8;
148 *offset &= 0xff;
149 }
150
151 return at24->client[i];
152}
153
154static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
155 unsigned offset, size_t count)
156{
157 struct i2c_msg msg[2];
158 u8 msgbuf[2];
159 struct i2c_client *client;
160 int status, i;
161
162 memset(msg, 0, sizeof(msg));
163
164 /*
165 * REVISIT some multi-address chips don't rollover page reads to
166 * the next slave address, so we may need to truncate the count.
167 * Those chips might need another quirk flag.
168 *
169 * If the real hardware used four adjacent 24c02 chips and that
170 * were misconfigured as one 24c08, that would be a similar effect:
171 * one "eeprom" file not four, but larger reads would fail when
172 * they crossed certain pages.
173 */
174
175 /*
176 * Slave address and byte offset derive from the offset. Always
177 * set the byte address; on a multi-master board, another master
178 * may have changed the chip's "current" address pointer.
179 */
180 client = at24_translate_offset(at24, &offset);
181
182 if (count > io_limit)
183 count = io_limit;
184
185 /* Smaller eeproms can work given some SMBus extension calls */
186 if (at24->use_smbus) {
187 if (count > I2C_SMBUS_BLOCK_MAX)
188 count = I2C_SMBUS_BLOCK_MAX;
189 status = i2c_smbus_read_i2c_block_data(client, offset,
190 count, buf);
191 dev_dbg(&client->dev, "smbus read %zd@%d --> %d\n",
192 count, offset, status);
193 return (status < 0) ? -EIO : status;
194 }
195
196 /*
197 * When we have a better choice than SMBus calls, use a combined
198 * I2C message. Write address; then read up to io_limit data bytes.
199 * Note that read page rollover helps us here (unlike writes).
200 * msgbuf is u8 and will cast to our needs.
201 */
202 i = 0;
203 if (at24->chip.flags & AT24_FLAG_ADDR16)
204 msgbuf[i++] = offset >> 8;
205 msgbuf[i++] = offset;
206
207 msg[0].addr = client->addr;
208 msg[0].buf = msgbuf;
209 msg[0].len = i;
210
211 msg[1].addr = client->addr;
212 msg[1].flags = I2C_M_RD;
213 msg[1].buf = buf;
214 msg[1].len = count;
215
216 status = i2c_transfer(client->adapter, msg, 2);
217 dev_dbg(&client->dev, "i2c read %zd@%d --> %d\n",
218 count, offset, status);
219
220 if (status == 2)
221 return count;
222 else if (status >= 0)
223 return -EIO;
224 else
225 return status;
226}
227
228static ssize_t at24_bin_read(struct kobject *kobj, struct bin_attribute *attr,
229 char *buf, loff_t off, size_t count)
230{
231 struct at24_data *at24;
232 ssize_t retval = 0;
233
234 at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
235
236 if (unlikely(!count))
237 return count;
238
239 /*
240 * Read data from chip, protecting against concurrent updates
241 * from this host, but not from other I2C masters.
242 */
243 mutex_lock(&at24->lock);
244
245 while (count) {
246 ssize_t status;
247
248 status = at24_eeprom_read(at24, buf, off, count);
249 if (status <= 0) {
250 if (retval == 0)
251 retval = status;
252 break;
253 }
254 buf += status;
255 off += status;
256 count -= status;
257 retval += status;
258 }
259
260 mutex_unlock(&at24->lock);
261
262 return retval;
263}
264
265
266/*
267 * REVISIT: export at24_bin{read,write}() to let other kernel code use
268 * eeprom data. For example, it might hold a board's Ethernet address, or
269 * board-specific calibration data generated on the manufacturing floor.
270 */
271
272
273/*
274 * Note that if the hardware write-protect pin is pulled high, the whole
275 * chip is normally write protected. But there are plenty of product
276 * variants here, including OTP fuses and partial chip protect.
277 *
278 * We only use page mode writes; the alternative is sloooow. This routine
279 * writes at most one page.
280 */
281static ssize_t at24_eeprom_write(struct at24_data *at24, char *buf,
282 unsigned offset, size_t count)
283{
284 struct i2c_client *client;
285 struct i2c_msg msg;
286 ssize_t status;
287 unsigned long timeout, write_time;
288 unsigned next_page;
289
290 /* Get corresponding I2C address and adjust offset */
291 client = at24_translate_offset(at24, &offset);
292
293 /* write_max is at most a page */
294 if (count > at24->write_max)
295 count = at24->write_max;
296
297 /* Never roll over backwards, to the start of this page */
298 next_page = roundup(offset + 1, at24->chip.page_size);
299 if (offset + count > next_page)
300 count = next_page - offset;
301
302 /* If we'll use I2C calls for I/O, set up the message */
303 if (!at24->use_smbus) {
304 int i = 0;
305
306 msg.addr = client->addr;
307 msg.flags = 0;
308
309 /* msg.buf is u8 and casts will mask the values */
310 msg.buf = at24->writebuf;
311 if (at24->chip.flags & AT24_FLAG_ADDR16)
312 msg.buf[i++] = offset >> 8;
313
314 msg.buf[i++] = offset;
315 memcpy(&msg.buf[i], buf, count);
316 msg.len = i + count;
317 }
318
319 /*
320 * Writes fail if the previous one didn't complete yet. We may
321 * loop a few times until this one succeeds, waiting at least
322 * long enough for one entire page write to work.
323 */
324 timeout = jiffies + msecs_to_jiffies(write_timeout);
325 do {
326 write_time = jiffies;
327 if (at24->use_smbus) {
328 status = i2c_smbus_write_i2c_block_data(client,
329 offset, count, buf);
330 if (status == 0)
331 status = count;
332 } else {
333 status = i2c_transfer(client->adapter, &msg, 1);
334 if (status == 1)
335 status = count;
336 }
337 dev_dbg(&client->dev, "write %zd@%d --> %zd (%ld)\n",
338 count, offset, status, jiffies);
339
340 if (status == count)
341 return count;
342
343 /* REVISIT: at HZ=100, this is sloooow */
344 msleep(1);
345 } while (time_before(write_time, timeout));
346
347 return -ETIMEDOUT;
348}
349
350static ssize_t at24_bin_write(struct kobject *kobj, struct bin_attribute *attr,
351 char *buf, loff_t off, size_t count)
352{
353 struct at24_data *at24;
354 ssize_t retval = 0;
355
356 at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
357
358 if (unlikely(!count))
359 return count;
360
361 /*
362 * Write data to chip, protecting against concurrent updates
363 * from this host, but not from other I2C masters.
364 */
365 mutex_lock(&at24->lock);
366
367 while (count) {
368 ssize_t status;
369
370 status = at24_eeprom_write(at24, buf, off, count);
371 if (status <= 0) {
372 if (retval == 0)
373 retval = status;
374 break;
375 }
376 buf += status;
377 off += status;
378 count -= status;
379 retval += status;
380 }
381
382 mutex_unlock(&at24->lock);
383
384 return retval;
385}
386
387/*-------------------------------------------------------------------------*/
388
389static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
390{
391 struct at24_platform_data chip;
392 bool writable;
393 bool use_smbus = false;
394 struct at24_data *at24;
395 int err;
396 unsigned i, num_addresses;
397 kernel_ulong_t magic;
398
399 if (client->dev.platform_data) {
400 chip = *(struct at24_platform_data *)client->dev.platform_data;
401 } else {
402 if (!id->driver_data) {
403 err = -ENODEV;
404 goto err_out;
405 }
406 magic = id->driver_data;
407 chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
408 magic >>= AT24_SIZE_BYTELEN;
409 chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
410 /*
411 * This is slow, but we can't know all eeproms, so we better
412 * play safe. Specifying custom eeprom-types via platform_data
413 * is recommended anyhow.
414 */
415 chip.page_size = 1;
416 }
417
418 if (!is_power_of_2(chip.byte_len))
419 dev_warn(&client->dev,
420 "byte_len looks suspicious (no power of 2)!\n");
421 if (!is_power_of_2(chip.page_size))
422 dev_warn(&client->dev,
423 "page_size looks suspicious (no power of 2)!\n");
424
425 /* Use I2C operations unless we're stuck with SMBus extensions. */
426 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
427 if (chip.flags & AT24_FLAG_ADDR16) {
428 err = -EPFNOSUPPORT;
429 goto err_out;
430 }
431 if (!i2c_check_functionality(client->adapter,
432 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
433 err = -EPFNOSUPPORT;
434 goto err_out;
435 }
436 use_smbus = true;
437 }
438
439 if (chip.flags & AT24_FLAG_TAKE8ADDR)
440 num_addresses = 8;
441 else
442 num_addresses = DIV_ROUND_UP(chip.byte_len,
443 (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
444
445 at24 = kzalloc(sizeof(struct at24_data) +
446 num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
447 if (!at24) {
448 err = -ENOMEM;
449 goto err_out;
450 }
451
452 mutex_init(&at24->lock);
453 at24->use_smbus = use_smbus;
454 at24->chip = chip;
455 at24->num_addresses = num_addresses;
456
457 /*
458 * Export the EEPROM bytes through sysfs, since that's convenient.
459 * By default, only root should see the data (maybe passwords etc)
460 */
461 at24->bin.attr.name = "eeprom";
462 at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR;
463 at24->bin.attr.owner = THIS_MODULE;
464 at24->bin.read = at24_bin_read;
465 at24->bin.size = chip.byte_len;
466
467 writable = !(chip.flags & AT24_FLAG_READONLY);
468 if (writable) {
469 if (!use_smbus || i2c_check_functionality(client->adapter,
470 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
471
472 unsigned write_max = chip.page_size;
473
474 at24->bin.write = at24_bin_write;
475 at24->bin.attr.mode |= S_IWUSR;
476
477 if (write_max > io_limit)
478 write_max = io_limit;
479 if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
480 write_max = I2C_SMBUS_BLOCK_MAX;
481 at24->write_max = write_max;
482
483 /* buffer (data + address at the beginning) */
484 at24->writebuf = kmalloc(write_max + 2, GFP_KERNEL);
485 if (!at24->writebuf) {
486 err = -ENOMEM;
487 goto err_struct;
488 }
489 } else {
490 dev_warn(&client->dev,
491 "cannot write due to controller restrictions.");
492 }
493 }
494
495 at24->client[0] = client;
496
497 /* use dummy devices for multiple-address chips */
498 for (i = 1; i < num_addresses; i++) {
499 at24->client[i] = i2c_new_dummy(client->adapter,
500 client->addr + i);
501 if (!at24->client[i]) {
502 dev_err(&client->dev, "address 0x%02x unavailable\n",
503 client->addr + i);
504 err = -EADDRINUSE;
505 goto err_clients;
506 }
507 }
508
509 err = sysfs_create_bin_file(&client->dev.kobj, &at24->bin);
510 if (err)
511 goto err_clients;
512
513 i2c_set_clientdata(client, at24);
514
515 dev_info(&client->dev, "%Zd byte %s EEPROM %s\n",
516 at24->bin.size, client->name,
517 writable ? "(writable)" : "(read-only)");
518 dev_dbg(&client->dev,
519 "page_size %d, num_addresses %d, write_max %d%s\n",
520 chip.page_size, num_addresses,
521 at24->write_max,
522 use_smbus ? ", use_smbus" : "");
523
524 return 0;
525
526err_clients:
527 for (i = 1; i < num_addresses; i++)
528 if (at24->client[i])
529 i2c_unregister_device(at24->client[i]);
530
531 kfree(at24->writebuf);
532err_struct:
533 kfree(at24);
534err_out:
535 dev_dbg(&client->dev, "probe error %d\n", err);
536 return err;
537}
538
539static int __devexit at24_remove(struct i2c_client *client)
540{
541 struct at24_data *at24;
542 int i;
543
544 at24 = i2c_get_clientdata(client);
545 sysfs_remove_bin_file(&client->dev.kobj, &at24->bin);
546
547 for (i = 1; i < at24->num_addresses; i++)
548 i2c_unregister_device(at24->client[i]);
549
550 kfree(at24->writebuf);
551 kfree(at24);
552 i2c_set_clientdata(client, NULL);
553 return 0;
554}
555
556/*-------------------------------------------------------------------------*/
557
558static struct i2c_driver at24_driver = {
559 .driver = {
560 .name = "at24",
561 .owner = THIS_MODULE,
562 },
563 .probe = at24_probe,
564 .remove = __devexit_p(at24_remove),
565 .id_table = at24_ids,
566};
567
568static int __init at24_init(void)
569{
570 io_limit = rounddown_pow_of_two(io_limit);
571 return i2c_add_driver(&at24_driver);
572}
573module_init(at24_init);
574
575static void __exit at24_exit(void)
576{
577 i2c_del_driver(&at24_driver);
578}
579module_exit(at24_exit);
580
581MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
582MODULE_AUTHOR("David Brownell and Wolfram Sang");
583MODULE_LICENSE("GPL");