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-rw-r--r--drivers/acpi/acpica/accommon.h2
-rw-r--r--drivers/acpi/acpica/acconfig.h2
-rw-r--r--drivers/acpi/acpica/acdebug.h2
-rw-r--r--drivers/acpi/acpica/acdispat.h2
-rw-r--r--drivers/acpi/acpica/acevents.h2
-rw-r--r--drivers/acpi/acpica/acglobal.h2
-rw-r--r--drivers/acpi/acpica/achware.h2
-rw-r--r--drivers/acpi/acpica/acinterp.h2
-rw-r--r--drivers/acpi/acpica/aclocal.h2
-rw-r--r--drivers/acpi/acpica/acmacros.h2
-rw-r--r--drivers/acpi/acpica/acnamesp.h2
-rw-r--r--drivers/acpi/acpica/acobject.h16
-rw-r--r--drivers/acpi/acpica/acopcode.h2
-rw-r--r--drivers/acpi/acpica/acparser.h2
-rw-r--r--drivers/acpi/acpica/acpredef.h2
-rw-r--r--drivers/acpi/acpica/acresrc.h2
-rw-r--r--drivers/acpi/acpica/acstruct.h2
-rw-r--r--drivers/acpi/acpica/actables.h2
-rw-r--r--drivers/acpi/acpica/acutils.h2
-rw-r--r--drivers/acpi/acpica/amlcode.h10
-rw-r--r--drivers/acpi/acpica/amlresrc.h2
-rw-r--r--drivers/acpi/acpica/dsfield.c2
-rw-r--r--drivers/acpi/acpica/dsinit.c2
-rw-r--r--drivers/acpi/acpica/dsmethod.c64
-rw-r--r--drivers/acpi/acpica/dsmthdat.c2
-rw-r--r--drivers/acpi/acpica/dsobject.c2
-rw-r--r--drivers/acpi/acpica/dsopcode.c2
-rw-r--r--drivers/acpi/acpica/dsutils.c2
-rw-r--r--drivers/acpi/acpica/dswexec.c2
-rw-r--r--drivers/acpi/acpica/dswload.c2
-rw-r--r--drivers/acpi/acpica/dswscope.c2
-rw-r--r--drivers/acpi/acpica/dswstate.c2
-rw-r--r--drivers/acpi/acpica/evevent.c2
-rw-r--r--drivers/acpi/acpica/evgpe.c4
-rw-r--r--drivers/acpi/acpica/evgpeblk.c2
-rw-r--r--drivers/acpi/acpica/evgpeinit.c2
-rw-r--r--drivers/acpi/acpica/evgpeutil.c2
-rw-r--r--drivers/acpi/acpica/evmisc.c2
-rw-r--r--drivers/acpi/acpica/evregion.c2
-rw-r--r--drivers/acpi/acpica/evrgnini.c6
-rw-r--r--drivers/acpi/acpica/evsci.c2
-rw-r--r--drivers/acpi/acpica/evxface.c2
-rw-r--r--drivers/acpi/acpica/evxfevnt.c2
-rw-r--r--drivers/acpi/acpica/evxfgpe.c2
-rw-r--r--drivers/acpi/acpica/evxfregn.c2
-rw-r--r--drivers/acpi/acpica/exconfig.c2
-rw-r--r--drivers/acpi/acpica/exconvrt.c2
-rw-r--r--drivers/acpi/acpica/excreate.c10
-rw-r--r--drivers/acpi/acpica/exdebug.c2
-rw-r--r--drivers/acpi/acpica/exdump.c4
-rw-r--r--drivers/acpi/acpica/exfield.c2
-rw-r--r--drivers/acpi/acpica/exfldio.c2
-rw-r--r--drivers/acpi/acpica/exmisc.c2
-rw-r--r--drivers/acpi/acpica/exmutex.c2
-rw-r--r--drivers/acpi/acpica/exnames.c2
-rw-r--r--drivers/acpi/acpica/exoparg1.c2
-rw-r--r--drivers/acpi/acpica/exoparg2.c2
-rw-r--r--drivers/acpi/acpica/exoparg3.c2
-rw-r--r--drivers/acpi/acpica/exoparg6.c2
-rw-r--r--drivers/acpi/acpica/exprep.c2
-rw-r--r--drivers/acpi/acpica/exregion.c2
-rw-r--r--drivers/acpi/acpica/exresnte.c2
-rw-r--r--drivers/acpi/acpica/exresolv.c2
-rw-r--r--drivers/acpi/acpica/exresop.c2
-rw-r--r--drivers/acpi/acpica/exstore.c2
-rw-r--r--drivers/acpi/acpica/exstoren.c2
-rw-r--r--drivers/acpi/acpica/exstorob.c2
-rw-r--r--drivers/acpi/acpica/exsystem.c2
-rw-r--r--drivers/acpi/acpica/exutils.c2
-rw-r--r--drivers/acpi/acpica/hwacpi.c2
-rw-r--r--drivers/acpi/acpica/hwgpe.c2
-rw-r--r--drivers/acpi/acpica/hwpci.c2
-rw-r--r--drivers/acpi/acpica/hwregs.c2
-rw-r--r--drivers/acpi/acpica/hwsleep.c2
-rw-r--r--drivers/acpi/acpica/hwtimer.c2
-rw-r--r--drivers/acpi/acpica/hwvalid.c2
-rw-r--r--drivers/acpi/acpica/hwxface.c2
-rw-r--r--drivers/acpi/acpica/nsaccess.c8
-rw-r--r--drivers/acpi/acpica/nsalloc.c15
-rw-r--r--drivers/acpi/acpica/nsdump.c17
-rw-r--r--drivers/acpi/acpica/nsdumpdv.c2
-rw-r--r--drivers/acpi/acpica/nseval.c4
-rw-r--r--drivers/acpi/acpica/nsinit.c2
-rw-r--r--drivers/acpi/acpica/nsload.c2
-rw-r--r--drivers/acpi/acpica/nsnames.c2
-rw-r--r--drivers/acpi/acpica/nsobject.c2
-rw-r--r--drivers/acpi/acpica/nsparse.c2
-rw-r--r--drivers/acpi/acpica/nspredef.c2
-rw-r--r--drivers/acpi/acpica/nsrepair.c2
-rw-r--r--drivers/acpi/acpica/nsrepair2.c2
-rw-r--r--drivers/acpi/acpica/nssearch.c2
-rw-r--r--drivers/acpi/acpica/nsutils.c2
-rw-r--r--drivers/acpi/acpica/nswalk.c2
-rw-r--r--drivers/acpi/acpica/nsxfeval.c2
-rw-r--r--drivers/acpi/acpica/nsxfname.c7
-rw-r--r--drivers/acpi/acpica/nsxfobj.c2
-rw-r--r--drivers/acpi/acpica/psargs.c2
-rw-r--r--drivers/acpi/acpica/psloop.c4
-rw-r--r--drivers/acpi/acpica/psopcode.c2
-rw-r--r--drivers/acpi/acpica/psparse.c27
-rw-r--r--drivers/acpi/acpica/psscope.c2
-rw-r--r--drivers/acpi/acpica/pstree.c2
-rw-r--r--drivers/acpi/acpica/psutils.c2
-rw-r--r--drivers/acpi/acpica/pswalk.c2
-rw-r--r--drivers/acpi/acpica/psxface.c9
-rw-r--r--drivers/acpi/acpica/rsaddr.c2
-rw-r--r--drivers/acpi/acpica/rscalc.c2
-rw-r--r--drivers/acpi/acpica/rscreate.c2
-rw-r--r--drivers/acpi/acpica/rsdump.c2
-rw-r--r--drivers/acpi/acpica/rsinfo.c2
-rw-r--r--drivers/acpi/acpica/rsio.c2
-rw-r--r--drivers/acpi/acpica/rsirq.c2
-rw-r--r--drivers/acpi/acpica/rslist.c2
-rw-r--r--drivers/acpi/acpica/rsmemory.c2
-rw-r--r--drivers/acpi/acpica/rsmisc.c2
-rw-r--r--drivers/acpi/acpica/rsutils.c2
-rw-r--r--drivers/acpi/acpica/rsxface.c2
-rw-r--r--drivers/acpi/acpica/tbfadt.c2
-rw-r--r--drivers/acpi/acpica/tbfind.c2
-rw-r--r--drivers/acpi/acpica/tbinstal.c2
-rw-r--r--drivers/acpi/acpica/tbutils.c2
-rw-r--r--drivers/acpi/acpica/tbxface.c2
-rw-r--r--drivers/acpi/acpica/tbxfroot.c2
-rw-r--r--drivers/acpi/acpica/utalloc.c2
-rw-r--r--drivers/acpi/acpica/utcopy.c2
-rw-r--r--drivers/acpi/acpica/utdebug.c2
-rw-r--r--drivers/acpi/acpica/utdelete.c2
-rw-r--r--drivers/acpi/acpica/uteval.c2
-rw-r--r--drivers/acpi/acpica/utglobal.c2
-rw-r--r--drivers/acpi/acpica/utids.c2
-rw-r--r--drivers/acpi/acpica/utinit.c2
-rw-r--r--drivers/acpi/acpica/utlock.c2
-rw-r--r--drivers/acpi/acpica/utmath.c2
-rw-r--r--drivers/acpi/acpica/utmisc.c2
-rw-r--r--drivers/acpi/acpica/utmutex.c2
-rw-r--r--drivers/acpi/acpica/utobject.c2
-rw-r--r--drivers/acpi/acpica/utosi.c2
-rw-r--r--drivers/acpi/acpica/utresrc.c2
-rw-r--r--drivers/acpi/acpica/utstate.c2
-rw-r--r--drivers/acpi/acpica/utxface.c2
-rw-r--r--drivers/acpi/acpica/utxferror.c2
-rw-r--r--drivers/acpi/battery.c1
-rw-r--r--drivers/dma/Kconfig9
-rw-r--r--drivers/dma/amba-pl08x.c1168
-rw-r--r--drivers/dma/at_hdmac.c19
-rw-r--r--drivers/dma/fsldma.c4
-rw-r--r--drivers/dma/intel_mid_dma.c33
-rw-r--r--drivers/dma/iop-adma.c4
-rw-r--r--drivers/dma/pch_dma.c19
-rw-r--r--drivers/dma/ste_dma40.c191
-rw-r--r--drivers/dma/ste_dma40_ll.c246
-rw-r--r--drivers/dma/ste_dma40_ll.h36
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c5
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.h1
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h15
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fbcon.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_mem.c26
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_mm.c182
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_mm.h4
-rw-r--r--drivers/gpu/drm/nouveau/nv40_graph.c3
-rw-r--r--drivers/gpu/drm/nouveau/nv40_grctx.c21
-rw-r--r--drivers/gpu/drm/nouveau/nv40_mc.c14
-rw-r--r--drivers/gpu/drm/nouveau/nv50_instmem.c7
-rw-r--r--drivers/gpu/drm/nouveau/nvc0_graph.c3
-rw-r--r--drivers/gpu/drm/nouveau/nvc0_vm.c4
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c30
-rw-r--r--drivers/gpu/drm/radeon/r100.c11
-rw-r--r--drivers/gpu/drm/radeon/r300.c11
-rw-r--r--drivers/gpu/drm/radeon/r600.c23
-rw-r--r--drivers/gpu/drm/radeon/radeon.h1
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c4
-rw-r--r--drivers/gpu/drm/radeon/reg_srcs/evergreen2
-rw-r--r--drivers/gpu/drm/radeon/rs600.c16
-rw-r--r--drivers/gpu/drm/radeon/rv770.c5
-rw-r--r--drivers/hwmon/Kconfig4
-rw-r--r--drivers/hwmon/lm93.c21
-rw-r--r--drivers/infiniband/core/cache.c4
-rw-r--r--drivers/infiniband/core/device.c11
-rw-r--r--drivers/infiniband/core/sa_query.c2
-rw-r--r--drivers/infiniband/core/umem.c2
-rw-r--r--drivers/infiniband/hw/amso1100/c2_rnic.c5
-rw-r--r--drivers/infiniband/hw/ehca/ipz_pt_fn.c5
-rw-r--r--drivers/infiniband/hw/ipath/ipath_driver.c5
-rw-r--r--drivers/infiniband/hw/ipath/ipath_file_ops.c11
-rw-r--r--drivers/infiniband/hw/ipath/ipath_init_chip.c5
-rw-r--r--drivers/infiniband/hw/ipath/ipath_user_pages.c2
-rw-r--r--drivers/infiniband/hw/mlx4/main.c12
-rw-r--r--drivers/infiniband/hw/mthca/mthca_catas.c5
-rw-r--r--drivers/infiniband/hw/mthca/mthca_cmd.c2
-rw-r--r--drivers/infiniband/hw/mthca/mthca_eq.c2
-rw-r--r--drivers/infiniband/hw/mthca/mthca_main.c2
-rw-r--r--drivers/infiniband/hw/mthca/mthca_mr.c2
-rw-r--r--drivers/infiniband/hw/nes/nes.c35
-rw-r--r--drivers/infiniband/hw/nes/nes.h4
-rw-r--r--drivers/infiniband/hw/nes/nes_cm.c8
-rw-r--r--drivers/infiniband/hw/nes/nes_hw.c95
-rw-r--r--drivers/infiniband/hw/nes/nes_hw.h10
-rw-r--r--drivers/infiniband/hw/nes/nes_nic.c78
-rw-r--r--drivers/infiniband/hw/nes/nes_verbs.c37
-rw-r--r--drivers/infiniband/hw/qib/qib_iba7220.c7
-rw-r--r--drivers/infiniband/hw/qib/qib_iba7322.c14
-rw-r--r--drivers/infiniband/hw/qib/qib_init.c33
-rw-r--r--drivers/infiniband/hw/qib/qib_qsfp.c9
-rw-r--r--drivers/infiniband/hw/qib/qib_verbs.h3
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib_cm.c10
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib_main.c3
-rw-r--r--drivers/infiniband/ulp/srp/ib_srp.c19
-rw-r--r--drivers/mtd/Kconfig19
-rw-r--r--drivers/mtd/Makefile2
-rw-r--r--drivers/mtd/chips/cfi_cmdset_0001.c55
-rw-r--r--drivers/mtd/chips/cfi_cmdset_0002.c116
-rw-r--r--drivers/mtd/chips/cfi_cmdset_0020.c1
-rw-r--r--drivers/mtd/chips/cfi_util.c2
-rw-r--r--drivers/mtd/chips/fwh_lock.h2
-rw-r--r--drivers/mtd/devices/m25p80.c39
-rw-r--r--drivers/mtd/devices/sst25l.c4
-rw-r--r--drivers/mtd/maps/amd76xrom.c7
-rw-r--r--drivers/mtd/maps/bcm963xx-flash.c5
-rw-r--r--drivers/mtd/maps/ck804xrom.c7
-rw-r--r--drivers/mtd/maps/esb2rom.c9
-rw-r--r--drivers/mtd/maps/ichxrom.c9
-rw-r--r--drivers/mtd/maps/physmap_of.c4
-rw-r--r--drivers/mtd/maps/scx200_docflash.c5
-rw-r--r--drivers/mtd/maps/tqm8xxl.c2
-rw-r--r--drivers/mtd/mtdchar.c10
-rw-r--r--drivers/mtd/mtdconcat.c1
-rw-r--r--drivers/mtd/mtdoops.c3
-rw-r--r--drivers/mtd/mtdpart.c30
-rw-r--r--drivers/mtd/nand/Kconfig1
-rw-r--r--drivers/mtd/nand/ams-delta.c80
-rw-r--r--drivers/mtd/nand/fsl_elbc_nand.c2
-rw-r--r--drivers/mtd/nand/fsmc_nand.c89
-rw-r--r--drivers/mtd/nand/jz4740_nand.c57
-rw-r--r--drivers/mtd/nand/mxc_nand.c2
-rw-r--r--drivers/mtd/nand/nand_base.c25
-rw-r--r--drivers/mtd/nand/nand_bbt.c3
-rw-r--r--drivers/mtd/nand/nandsim.c39
-rw-r--r--drivers/mtd/nand/pasemi_nand.c2
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c2
-rw-r--r--drivers/mtd/nand/txx9ndfmc.c5
-rw-r--r--drivers/mtd/onenand/omap2.c80
-rw-r--r--drivers/mtd/onenand/onenand_base.c81
-rw-r--r--drivers/mtd/onenand/onenand_bbt.c10
-rw-r--r--drivers/mtd/onenand/samsung.c7
-rw-r--r--drivers/mtd/ubi/build.c28
-rw-r--r--drivers/mtd/ubi/vtbl.c6
-rw-r--r--drivers/net/bnx2x/bnx2x.h4
-rw-r--r--drivers/net/bnx2x/bnx2x_hsi.h4
-rw-r--r--drivers/net/bnx2x/bnx2x_link.c173
-rw-r--r--drivers/net/bnx2x/bnx2x_reg.h4
-rw-r--r--drivers/net/gianfar.c2
-rw-r--r--drivers/net/irda/sh_irda.c14
-rw-r--r--drivers/net/mlx4/catas.c6
-rw-r--r--drivers/net/mlx4/en_main.c3
-rw-r--r--drivers/net/mlx4/main.c2
-rw-r--r--drivers/net/mlx4/mcg.c23
-rw-r--r--drivers/net/ns83820.c5
-rw-r--r--drivers/net/usb/cdc_ncm.c19
-rw-r--r--drivers/net/vmxnet3/vmxnet3_drv.c93
-rw-r--r--drivers/net/vmxnet3/vmxnet3_ethtool.c274
-rw-r--r--drivers/net/vmxnet3/vmxnet3_int.h7
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c4
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_calib.c10
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h2
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_hw.c4
-rw-r--r--drivers/net/wireless/ath/ath9k/htc.h2
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_txrx.c8
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c2
-rw-r--r--drivers/net/wireless/iwmc3200wifi/netdev.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00firmware.c1
-rw-r--r--drivers/nfc/pn544.c2
-rw-r--r--drivers/of/fdt.c8
-rw-r--r--drivers/s390/net/qeth_l2_main.c18
-rw-r--r--drivers/s390/net/qeth_l3_main.c22
-rw-r--r--drivers/spi/Kconfig8
-rw-r--r--drivers/spi/Makefile1
-rw-r--r--drivers/spi/ath79_spi.c292
-rw-r--r--drivers/spi/spi_sh_msiof.c2
-rw-r--r--drivers/staging/bcm/Qos.c7
-rw-r--r--drivers/staging/bcm/Transmit.c6
-rw-r--r--drivers/staging/smbfs/dir.c4
281 files changed, 2980 insertions, 1955 deletions
diff --git a/drivers/acpi/acpica/accommon.h b/drivers/acpi/acpica/accommon.h
index 3e50c74ed4a1..e0ba17f0a7c8 100644
--- a/drivers/acpi/acpica/accommon.h
+++ b/drivers/acpi/acpica/accommon.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acconfig.h b/drivers/acpi/acpica/acconfig.h
index b17d8de9f6ff..ab87396c2c07 100644
--- a/drivers/acpi/acpica/acconfig.h
+++ b/drivers/acpi/acpica/acconfig.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acdebug.h b/drivers/acpi/acpica/acdebug.h
index 72e9d5eb083c..eb0b1f8dee6d 100644
--- a/drivers/acpi/acpica/acdebug.h
+++ b/drivers/acpi/acpica/acdebug.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acdispat.h b/drivers/acpi/acpica/acdispat.h
index 894a0ff2a946..666271b65418 100644
--- a/drivers/acpi/acpica/acdispat.h
+++ b/drivers/acpi/acpica/acdispat.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acevents.h b/drivers/acpi/acpica/acevents.h
index 70e0b28801aa..41d247daf461 100644
--- a/drivers/acpi/acpica/acevents.h
+++ b/drivers/acpi/acpica/acevents.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acglobal.h b/drivers/acpi/acpica/acglobal.h
index 0e4dba0d0325..82a1bd283db8 100644
--- a/drivers/acpi/acpica/acglobal.h
+++ b/drivers/acpi/acpica/acglobal.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/achware.h b/drivers/acpi/acpica/achware.h
index 258d628793ea..e7213beaafc7 100644
--- a/drivers/acpi/acpica/achware.h
+++ b/drivers/acpi/acpica/achware.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acinterp.h b/drivers/acpi/acpica/acinterp.h
index 049e203bd621..3731e1c34b83 100644
--- a/drivers/acpi/acpica/acinterp.h
+++ b/drivers/acpi/acpica/acinterp.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/aclocal.h b/drivers/acpi/acpica/aclocal.h
index 74000f5b7dab..54784bb42cec 100644
--- a/drivers/acpi/acpica/aclocal.h
+++ b/drivers/acpi/acpica/aclocal.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acmacros.h b/drivers/acpi/acpica/acmacros.h
index 8d5c9e0a495f..b7491ee1fba6 100644
--- a/drivers/acpi/acpica/acmacros.h
+++ b/drivers/acpi/acpica/acmacros.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acnamesp.h b/drivers/acpi/acpica/acnamesp.h
index d44d3bc5b847..79a598c67fe3 100644
--- a/drivers/acpi/acpica/acnamesp.h
+++ b/drivers/acpi/acpica/acnamesp.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acobject.h b/drivers/acpi/acpica/acobject.h
index 962a3ccff6fd..1055769f2f01 100644
--- a/drivers/acpi/acpica/acobject.h
+++ b/drivers/acpi/acpica/acobject.h
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
@@ -97,8 +97,6 @@
97#define AOPOBJ_OBJECT_INITIALIZED 0x08 /* Region is initialized, _REG was run */ 97#define AOPOBJ_OBJECT_INITIALIZED 0x08 /* Region is initialized, _REG was run */
98#define AOPOBJ_SETUP_COMPLETE 0x10 /* Region setup is complete */ 98#define AOPOBJ_SETUP_COMPLETE 0x10 /* Region setup is complete */
99#define AOPOBJ_INVALID 0x20 /* Host OS won't allow a Region address */ 99#define AOPOBJ_INVALID 0x20 /* Host OS won't allow a Region address */
100#define AOPOBJ_MODULE_LEVEL 0x40 /* Method is actually module-level code */
101#define AOPOBJ_MODIFIED_NAMESPACE 0x80 /* Method modified the namespace */
102 100
103/****************************************************************************** 101/******************************************************************************
104 * 102 *
@@ -175,7 +173,7 @@ struct acpi_object_region {
175}; 173};
176 174
177struct acpi_object_method { 175struct acpi_object_method {
178 ACPI_OBJECT_COMMON_HEADER u8 method_flags; 176 ACPI_OBJECT_COMMON_HEADER u8 info_flags;
179 u8 param_count; 177 u8 param_count;
180 u8 sync_level; 178 u8 sync_level;
181 union acpi_operand_object *mutex; 179 union acpi_operand_object *mutex;
@@ -183,13 +181,21 @@ struct acpi_object_method {
183 union { 181 union {
184 ACPI_INTERNAL_METHOD implementation; 182 ACPI_INTERNAL_METHOD implementation;
185 union acpi_operand_object *handler; 183 union acpi_operand_object *handler;
186 } extra; 184 } dispatch;
187 185
188 u32 aml_length; 186 u32 aml_length;
189 u8 thread_count; 187 u8 thread_count;
190 acpi_owner_id owner_id; 188 acpi_owner_id owner_id;
191}; 189};
192 190
191/* Flags for info_flags field above */
192
193#define ACPI_METHOD_MODULE_LEVEL 0x01 /* Method is actually module-level code */
194#define ACPI_METHOD_INTERNAL_ONLY 0x02 /* Method is implemented internally (_OSI) */
195#define ACPI_METHOD_SERIALIZED 0x04 /* Method is serialized */
196#define ACPI_METHOD_SERIALIZED_PENDING 0x08 /* Method is to be marked serialized */
197#define ACPI_METHOD_MODIFIED_NAMESPACE 0x10 /* Method modified the namespace */
198
193/****************************************************************************** 199/******************************************************************************
194 * 200 *
195 * Objects that can be notified. All share a common notify_info area. 201 * Objects that can be notified. All share a common notify_info area.
diff --git a/drivers/acpi/acpica/acopcode.h b/drivers/acpi/acpica/acopcode.h
index 8c15ff43f42b..bb2ccfad7376 100644
--- a/drivers/acpi/acpica/acopcode.h
+++ b/drivers/acpi/acpica/acopcode.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acparser.h b/drivers/acpi/acpica/acparser.h
index d0bb0fd3e57a..5ea1e06afa20 100644
--- a/drivers/acpi/acpica/acparser.h
+++ b/drivers/acpi/acpica/acparser.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acpredef.h b/drivers/acpi/acpica/acpredef.h
index 10998d369ad0..94e73c97cf85 100644
--- a/drivers/acpi/acpica/acpredef.h
+++ b/drivers/acpi/acpica/acpredef.h
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acresrc.h b/drivers/acpi/acpica/acresrc.h
index 528bcbaf4ce7..f08b55b7f3a0 100644
--- a/drivers/acpi/acpica/acresrc.h
+++ b/drivers/acpi/acpica/acresrc.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acstruct.h b/drivers/acpi/acpica/acstruct.h
index 6e5dd97949fe..1623b245dde2 100644
--- a/drivers/acpi/acpica/acstruct.h
+++ b/drivers/acpi/acpica/acstruct.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/actables.h b/drivers/acpi/acpica/actables.h
index 62a576e34361..967f08124eba 100644
--- a/drivers/acpi/acpica/actables.h
+++ b/drivers/acpi/acpica/actables.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acutils.h b/drivers/acpi/acpica/acutils.h
index 72e4183c1937..99c140d8e348 100644
--- a/drivers/acpi/acpica/acutils.h
+++ b/drivers/acpi/acpica/acutils.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/amlcode.h b/drivers/acpi/acpica/amlcode.h
index 1f484ba228fc..f4f0998d3967 100644
--- a/drivers/acpi/acpica/amlcode.h
+++ b/drivers/acpi/acpica/amlcode.h
@@ -7,7 +7,7 @@
7 *****************************************************************************/ 7 *****************************************************************************/
8 8
9/* 9/*
10 * Copyright (C) 2000 - 2010, Intel Corp. 10 * Copyright (C) 2000 - 2011, Intel Corp.
11 * All rights reserved. 11 * All rights reserved.
12 * 12 *
13 * Redistribution and use in source and binary forms, with or without 13 * Redistribution and use in source and binary forms, with or without
@@ -480,16 +480,10 @@ typedef enum {
480 AML_FIELD_ATTRIB_SMB_BLOCK_CALL = 0x0D 480 AML_FIELD_ATTRIB_SMB_BLOCK_CALL = 0x0D
481} AML_ACCESS_ATTRIBUTE; 481} AML_ACCESS_ATTRIBUTE;
482 482
483/* Bit fields in method_flags byte */ 483/* Bit fields in the AML method_flags byte */
484 484
485#define AML_METHOD_ARG_COUNT 0x07 485#define AML_METHOD_ARG_COUNT 0x07
486#define AML_METHOD_SERIALIZED 0x08 486#define AML_METHOD_SERIALIZED 0x08
487#define AML_METHOD_SYNC_LEVEL 0xF0 487#define AML_METHOD_SYNC_LEVEL 0xF0
488 488
489/* METHOD_FLAGS_ARG_COUNT is not used internally, define additional flags */
490
491#define AML_METHOD_INTERNAL_ONLY 0x01
492#define AML_METHOD_RESERVED1 0x02
493#define AML_METHOD_RESERVED2 0x04
494
495#endif /* __AMLCODE_H__ */ 489#endif /* __AMLCODE_H__ */
diff --git a/drivers/acpi/acpica/amlresrc.h b/drivers/acpi/acpica/amlresrc.h
index 0e5798fcbb19..59122cde247c 100644
--- a/drivers/acpi/acpica/amlresrc.h
+++ b/drivers/acpi/acpica/amlresrc.h
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsfield.c b/drivers/acpi/acpica/dsfield.c
index 347bee1726f1..34be60c0e448 100644
--- a/drivers/acpi/acpica/dsfield.c
+++ b/drivers/acpi/acpica/dsfield.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsinit.c b/drivers/acpi/acpica/dsinit.c
index cc4a38c57558..a7718bf2b9a1 100644
--- a/drivers/acpi/acpica/dsinit.c
+++ b/drivers/acpi/acpica/dsinit.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsmethod.c b/drivers/acpi/acpica/dsmethod.c
index d94dd8974b55..5d797751e205 100644
--- a/drivers/acpi/acpica/dsmethod.c
+++ b/drivers/acpi/acpica/dsmethod.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -43,7 +43,6 @@
43 43
44#include <acpi/acpi.h> 44#include <acpi/acpi.h>
45#include "accommon.h" 45#include "accommon.h"
46#include "amlcode.h"
47#include "acdispat.h" 46#include "acdispat.h"
48#include "acinterp.h" 47#include "acinterp.h"
49#include "acnamesp.h" 48#include "acnamesp.h"
@@ -201,7 +200,7 @@ acpi_ds_begin_method_execution(struct acpi_namespace_node *method_node,
201 /* 200 /*
202 * If this method is serialized, we need to acquire the method mutex. 201 * If this method is serialized, we need to acquire the method mutex.
203 */ 202 */
204 if (obj_desc->method.method_flags & AML_METHOD_SERIALIZED) { 203 if (obj_desc->method.info_flags & ACPI_METHOD_SERIALIZED) {
205 /* 204 /*
206 * Create a mutex for the method if it is defined to be Serialized 205 * Create a mutex for the method if it is defined to be Serialized
207 * and a mutex has not already been created. We defer the mutex creation 206 * and a mutex has not already been created. We defer the mutex creation
@@ -413,8 +412,9 @@ acpi_ds_call_control_method(struct acpi_thread_state *thread,
413 412
414 /* Invoke an internal method if necessary */ 413 /* Invoke an internal method if necessary */
415 414
416 if (obj_desc->method.method_flags & AML_METHOD_INTERNAL_ONLY) { 415 if (obj_desc->method.info_flags & ACPI_METHOD_INTERNAL_ONLY) {
417 status = obj_desc->method.extra.implementation(next_walk_state); 416 status =
417 obj_desc->method.dispatch.implementation(next_walk_state);
418 if (status == AE_OK) { 418 if (status == AE_OK) {
419 status = AE_CTRL_TERMINATE; 419 status = AE_CTRL_TERMINATE;
420 } 420 }
@@ -579,11 +579,14 @@ acpi_ds_terminate_control_method(union acpi_operand_object *method_desc,
579 579
580 /* 580 /*
581 * Delete any namespace objects created anywhere within the 581 * Delete any namespace objects created anywhere within the
582 * namespace by the execution of this method. Unless this method 582 * namespace by the execution of this method. Unless:
583 * is a module-level executable code method, in which case we 583 * 1) This method is a module-level executable code method, in which
584 * want make the objects permanent. 584 * case we want make the objects permanent.
585 * 2) There are other threads executing the method, in which case we
586 * will wait until the last thread has completed.
585 */ 587 */
586 if (!(method_desc->method.flags & AOPOBJ_MODULE_LEVEL)) { 588 if (!(method_desc->method.info_flags & ACPI_METHOD_MODULE_LEVEL)
589 && (method_desc->method.thread_count == 1)) {
587 590
588 /* Delete any direct children of (created by) this method */ 591 /* Delete any direct children of (created by) this method */
589 592
@@ -593,12 +596,17 @@ acpi_ds_terminate_control_method(union acpi_operand_object *method_desc,
593 /* 596 /*
594 * Delete any objects that were created by this method 597 * Delete any objects that were created by this method
595 * elsewhere in the namespace (if any were created). 598 * elsewhere in the namespace (if any were created).
599 * Use of the ACPI_METHOD_MODIFIED_NAMESPACE optimizes the
600 * deletion such that we don't have to perform an entire
601 * namespace walk for every control method execution.
596 */ 602 */
597 if (method_desc->method. 603 if (method_desc->method.
598 flags & AOPOBJ_MODIFIED_NAMESPACE) { 604 info_flags & ACPI_METHOD_MODIFIED_NAMESPACE) {
599 acpi_ns_delete_namespace_by_owner(method_desc-> 605 acpi_ns_delete_namespace_by_owner(method_desc->
600 method. 606 method.
601 owner_id); 607 owner_id);
608 method_desc->method.info_flags &=
609 ~ACPI_METHOD_MODIFIED_NAMESPACE;
602 } 610 }
603 } 611 }
604 } 612 }
@@ -629,19 +637,43 @@ acpi_ds_terminate_control_method(union acpi_operand_object *method_desc,
629 * Serialized if it appears that the method is incorrectly written and 637 * Serialized if it appears that the method is incorrectly written and
630 * does not support multiple thread execution. The best example of this 638 * does not support multiple thread execution. The best example of this
631 * is if such a method creates namespace objects and blocks. A second 639 * is if such a method creates namespace objects and blocks. A second
632 * thread will fail with an AE_ALREADY_EXISTS exception 640 * thread will fail with an AE_ALREADY_EXISTS exception.
633 * 641 *
634 * This code is here because we must wait until the last thread exits 642 * This code is here because we must wait until the last thread exits
635 * before creating the synchronization semaphore. 643 * before marking the method as serialized.
636 */ 644 */
637 if ((method_desc->method.method_flags & AML_METHOD_SERIALIZED) 645 if (method_desc->method.
638 && (!method_desc->method.mutex)) { 646 info_flags & ACPI_METHOD_SERIALIZED_PENDING) {
639 (void)acpi_ds_create_method_mutex(method_desc); 647 if (walk_state) {
648 ACPI_INFO((AE_INFO,
649 "Marking method %4.4s as Serialized because of AE_ALREADY_EXISTS error",
650 walk_state->method_node->name.
651 ascii));
652 }
653
654 /*
655 * Method tried to create an object twice and was marked as
656 * "pending serialized". The probable cause is that the method
657 * cannot handle reentrancy.
658 *
659 * The method was created as not_serialized, but it tried to create
660 * a named object and then blocked, causing the second thread
661 * entrance to begin and then fail. Workaround this problem by
662 * marking the method permanently as Serialized when the last
663 * thread exits here.
664 */
665 method_desc->method.info_flags &=
666 ~ACPI_METHOD_SERIALIZED_PENDING;
667 method_desc->method.info_flags |=
668 ACPI_METHOD_SERIALIZED;
669 method_desc->method.sync_level = 0;
640 } 670 }
641 671
642 /* No more threads, we can free the owner_id */ 672 /* No more threads, we can free the owner_id */
643 673
644 if (!(method_desc->method.flags & AOPOBJ_MODULE_LEVEL)) { 674 if (!
675 (method_desc->method.
676 info_flags & ACPI_METHOD_MODULE_LEVEL)) {
645 acpi_ut_release_owner_id(&method_desc->method.owner_id); 677 acpi_ut_release_owner_id(&method_desc->method.owner_id);
646 } 678 }
647 } 679 }
diff --git a/drivers/acpi/acpica/dsmthdat.c b/drivers/acpi/acpica/dsmthdat.c
index 8095306fcd8c..905ce29a92e1 100644
--- a/drivers/acpi/acpica/dsmthdat.c
+++ b/drivers/acpi/acpica/dsmthdat.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsobject.c b/drivers/acpi/acpica/dsobject.c
index 8e85f54a8e0e..f42e17e5c252 100644
--- a/drivers/acpi/acpica/dsobject.c
+++ b/drivers/acpi/acpica/dsobject.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsopcode.c b/drivers/acpi/acpica/dsopcode.c
index 7c0e74227171..bbecf293aeeb 100644
--- a/drivers/acpi/acpica/dsopcode.c
+++ b/drivers/acpi/acpica/dsopcode.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsutils.c b/drivers/acpi/acpica/dsutils.c
index 15135c25aa9b..2c477ce172fa 100644
--- a/drivers/acpi/acpica/dsutils.c
+++ b/drivers/acpi/acpica/dsutils.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dswexec.c b/drivers/acpi/acpica/dswexec.c
index 6b0b5d08d97a..fe40e4c6554f 100644
--- a/drivers/acpi/acpica/dswexec.c
+++ b/drivers/acpi/acpica/dswexec.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dswload.c b/drivers/acpi/acpica/dswload.c
index 140a9d002959..52566ff5e903 100644
--- a/drivers/acpi/acpica/dswload.c
+++ b/drivers/acpi/acpica/dswload.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dswscope.c b/drivers/acpi/acpica/dswscope.c
index d1e701709dac..76a661fc1e09 100644
--- a/drivers/acpi/acpica/dswscope.c
+++ b/drivers/acpi/acpica/dswscope.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dswstate.c b/drivers/acpi/acpica/dswstate.c
index 83155dd8671e..a6c374ef9914 100644
--- a/drivers/acpi/acpica/dswstate.c
+++ b/drivers/acpi/acpica/dswstate.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evevent.c b/drivers/acpi/acpica/evevent.c
index e5e313c663a5..d458b041e651 100644
--- a/drivers/acpi/acpica/evevent.c
+++ b/drivers/acpi/acpica/evevent.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evgpe.c b/drivers/acpi/acpica/evgpe.c
index 7c339d34ab42..14988a86066f 100644
--- a/drivers/acpi/acpica/evgpe.c
+++ b/drivers/acpi/acpica/evgpe.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -471,6 +471,7 @@ static void ACPI_SYSTEM_XFACE acpi_ev_asynch_execute_gpe_method(void *context)
471 471
472 status = acpi_ut_acquire_mutex(ACPI_MTX_EVENTS); 472 status = acpi_ut_acquire_mutex(ACPI_MTX_EVENTS);
473 if (ACPI_FAILURE(status)) { 473 if (ACPI_FAILURE(status)) {
474 ACPI_FREE(local_gpe_event_info);
474 return_VOID; 475 return_VOID;
475 } 476 }
476 477
@@ -478,6 +479,7 @@ static void ACPI_SYSTEM_XFACE acpi_ev_asynch_execute_gpe_method(void *context)
478 479
479 if (!acpi_ev_valid_gpe_event(gpe_event_info)) { 480 if (!acpi_ev_valid_gpe_event(gpe_event_info)) {
480 status = acpi_ut_release_mutex(ACPI_MTX_EVENTS); 481 status = acpi_ut_release_mutex(ACPI_MTX_EVENTS);
482 ACPI_FREE(local_gpe_event_info);
481 return_VOID; 483 return_VOID;
482 } 484 }
483 485
diff --git a/drivers/acpi/acpica/evgpeblk.c b/drivers/acpi/acpica/evgpeblk.c
index 9acb86958c09..ca2c41a53311 100644
--- a/drivers/acpi/acpica/evgpeblk.c
+++ b/drivers/acpi/acpica/evgpeblk.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evgpeinit.c b/drivers/acpi/acpica/evgpeinit.c
index c59dc2340593..ce9aa9f9a972 100644
--- a/drivers/acpi/acpica/evgpeinit.c
+++ b/drivers/acpi/acpica/evgpeinit.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evgpeutil.c b/drivers/acpi/acpica/evgpeutil.c
index 10e477494dcf..80a81d0c4a80 100644
--- a/drivers/acpi/acpica/evgpeutil.c
+++ b/drivers/acpi/acpica/evgpeutil.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evmisc.c b/drivers/acpi/acpica/evmisc.c
index 38bba66fcce5..7dc80946f7bd 100644
--- a/drivers/acpi/acpica/evmisc.c
+++ b/drivers/acpi/acpica/evmisc.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evregion.c b/drivers/acpi/acpica/evregion.c
index 98fd210e87b2..785a5ee64585 100644
--- a/drivers/acpi/acpica/evregion.c
+++ b/drivers/acpi/acpica/evregion.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evrgnini.c b/drivers/acpi/acpica/evrgnini.c
index 0b47a6dc9290..9659cee6093e 100644
--- a/drivers/acpi/acpica/evrgnini.c
+++ b/drivers/acpi/acpica/evrgnini.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -590,9 +590,9 @@ acpi_ev_initialize_region(union acpi_operand_object *region_obj,
590 * See acpi_ns_exec_module_code 590 * See acpi_ns_exec_module_code
591 */ 591 */
592 if (obj_desc->method. 592 if (obj_desc->method.
593 flags & AOPOBJ_MODULE_LEVEL) { 593 info_flags & ACPI_METHOD_MODULE_LEVEL) {
594 handler_obj = 594 handler_obj =
595 obj_desc->method.extra.handler; 595 obj_desc->method.dispatch.handler;
596 } 596 }
597 break; 597 break;
598 598
diff --git a/drivers/acpi/acpica/evsci.c b/drivers/acpi/acpica/evsci.c
index 8dfbaa96e422..2ebd40e1a3ef 100644
--- a/drivers/acpi/acpica/evsci.c
+++ b/drivers/acpi/acpica/evsci.c
@@ -6,7 +6,7 @@
6 ******************************************************************************/ 6 ******************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evxface.c b/drivers/acpi/acpica/evxface.c
index 1226689bdb1b..e1141402dbed 100644
--- a/drivers/acpi/acpica/evxface.c
+++ b/drivers/acpi/acpica/evxface.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evxfevnt.c b/drivers/acpi/acpica/evxfevnt.c
index 90488c1e0f3d..c57b5c707a77 100644
--- a/drivers/acpi/acpica/evxfevnt.c
+++ b/drivers/acpi/acpica/evxfevnt.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evxfgpe.c b/drivers/acpi/acpica/evxfgpe.c
index 416845bc9c1f..e9562a7cb2f9 100644
--- a/drivers/acpi/acpica/evxfgpe.c
+++ b/drivers/acpi/acpica/evxfgpe.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evxfregn.c b/drivers/acpi/acpica/evxfregn.c
index ce9314f79451..eb7386763712 100644
--- a/drivers/acpi/acpica/evxfregn.c
+++ b/drivers/acpi/acpica/evxfregn.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exconfig.c b/drivers/acpi/acpica/exconfig.c
index 18832205b631..745a42b401f5 100644
--- a/drivers/acpi/acpica/exconfig.c
+++ b/drivers/acpi/acpica/exconfig.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exconvrt.c b/drivers/acpi/acpica/exconvrt.c
index b73bc50c5b76..74162a11817d 100644
--- a/drivers/acpi/acpica/exconvrt.c
+++ b/drivers/acpi/acpica/exconvrt.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/excreate.c b/drivers/acpi/acpica/excreate.c
index 3c61b48c73f5..e7b372d17667 100644
--- a/drivers/acpi/acpica/excreate.c
+++ b/drivers/acpi/acpica/excreate.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -482,13 +482,11 @@ acpi_ex_create_method(u8 * aml_start,
482 obj_desc->method.aml_length = aml_length; 482 obj_desc->method.aml_length = aml_length;
483 483
484 /* 484 /*
485 * Disassemble the method flags. Split off the Arg Count 485 * Disassemble the method flags. Split off the arg_count, Serialized
486 * for efficiency 486 * flag, and sync_level for efficiency.
487 */ 487 */
488 method_flags = (u8) operand[1]->integer.value; 488 method_flags = (u8) operand[1]->integer.value;
489 489
490 obj_desc->method.method_flags =
491 (u8) (method_flags & ~AML_METHOD_ARG_COUNT);
492 obj_desc->method.param_count = 490 obj_desc->method.param_count =
493 (u8) (method_flags & AML_METHOD_ARG_COUNT); 491 (u8) (method_flags & AML_METHOD_ARG_COUNT);
494 492
@@ -497,6 +495,8 @@ acpi_ex_create_method(u8 * aml_start,
497 * created for this method when it is parsed. 495 * created for this method when it is parsed.
498 */ 496 */
499 if (method_flags & AML_METHOD_SERIALIZED) { 497 if (method_flags & AML_METHOD_SERIALIZED) {
498 obj_desc->method.info_flags = ACPI_METHOD_SERIALIZED;
499
500 /* 500 /*
501 * ACPI 1.0: sync_level = 0 501 * ACPI 1.0: sync_level = 0
502 * ACPI 2.0: sync_level = sync_level in method declaration 502 * ACPI 2.0: sync_level = sync_level in method declaration
diff --git a/drivers/acpi/acpica/exdebug.c b/drivers/acpi/acpica/exdebug.c
index be8c98b480d7..c7a2f1edd282 100644
--- a/drivers/acpi/acpica/exdebug.c
+++ b/drivers/acpi/acpica/exdebug.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exdump.c b/drivers/acpi/acpica/exdump.c
index f067bbb0d961..61b8c0e8b74d 100644
--- a/drivers/acpi/acpica/exdump.c
+++ b/drivers/acpi/acpica/exdump.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -122,7 +122,7 @@ static struct acpi_exdump_info acpi_ex_dump_event[2] = {
122 122
123static struct acpi_exdump_info acpi_ex_dump_method[9] = { 123static struct acpi_exdump_info acpi_ex_dump_method[9] = {
124 {ACPI_EXD_INIT, ACPI_EXD_TABLE_SIZE(acpi_ex_dump_method), NULL}, 124 {ACPI_EXD_INIT, ACPI_EXD_TABLE_SIZE(acpi_ex_dump_method), NULL},
125 {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.method_flags), "Method Flags"}, 125 {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.info_flags), "Info Flags"},
126 {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.param_count), 126 {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.param_count),
127 "Parameter Count"}, 127 "Parameter Count"},
128 {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.sync_level), "Sync Level"}, 128 {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.sync_level), "Sync Level"},
diff --git a/drivers/acpi/acpica/exfield.c b/drivers/acpi/acpica/exfield.c
index f17d2ff0031b..0bde2230c028 100644
--- a/drivers/acpi/acpica/exfield.c
+++ b/drivers/acpi/acpica/exfield.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exfldio.c b/drivers/acpi/acpica/exfldio.c
index 38293fd3e088..6c79c29f082d 100644
--- a/drivers/acpi/acpica/exfldio.c
+++ b/drivers/acpi/acpica/exfldio.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exmisc.c b/drivers/acpi/acpica/exmisc.c
index 95db4be0877b..703d88ed0b3d 100644
--- a/drivers/acpi/acpica/exmisc.c
+++ b/drivers/acpi/acpica/exmisc.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exmutex.c b/drivers/acpi/acpica/exmutex.c
index 6af14e43f839..be1c56ead653 100644
--- a/drivers/acpi/acpica/exmutex.c
+++ b/drivers/acpi/acpica/exmutex.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exnames.c b/drivers/acpi/acpica/exnames.c
index d11e539ef763..49ec049c157e 100644
--- a/drivers/acpi/acpica/exnames.c
+++ b/drivers/acpi/acpica/exnames.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exoparg1.c b/drivers/acpi/acpica/exoparg1.c
index 84e4d185aa25..236ead14b7f7 100644
--- a/drivers/acpi/acpica/exoparg1.c
+++ b/drivers/acpi/acpica/exoparg1.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exoparg2.c b/drivers/acpi/acpica/exoparg2.c
index 10e104cf0fb9..2571b4a310f4 100644
--- a/drivers/acpi/acpica/exoparg2.c
+++ b/drivers/acpi/acpica/exoparg2.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exoparg3.c b/drivers/acpi/acpica/exoparg3.c
index 7a08d23befcd..1b48d9d28c9a 100644
--- a/drivers/acpi/acpica/exoparg3.c
+++ b/drivers/acpi/acpica/exoparg3.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exoparg6.c b/drivers/acpi/acpica/exoparg6.c
index 4b50730cf9a0..f4a2787e8e92 100644
--- a/drivers/acpi/acpica/exoparg6.c
+++ b/drivers/acpi/acpica/exoparg6.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exprep.c b/drivers/acpi/acpica/exprep.c
index 7aae29f73d3f..cc95e2000406 100644
--- a/drivers/acpi/acpica/exprep.c
+++ b/drivers/acpi/acpica/exprep.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c
index de17e10da0ed..f0d5e14f1f2c 100644
--- a/drivers/acpi/acpica/exregion.c
+++ b/drivers/acpi/acpica/exregion.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exresnte.c b/drivers/acpi/acpica/exresnte.c
index 1fa4289a687e..55997e46948b 100644
--- a/drivers/acpi/acpica/exresnte.c
+++ b/drivers/acpi/acpica/exresnte.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exresolv.c b/drivers/acpi/acpica/exresolv.c
index 7ca35ea8acea..db502cd7d934 100644
--- a/drivers/acpi/acpica/exresolv.c
+++ b/drivers/acpi/acpica/exresolv.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exresop.c b/drivers/acpi/acpica/exresop.c
index 8c97cfd6a0fd..e3bb00ccdff5 100644
--- a/drivers/acpi/acpica/exresop.c
+++ b/drivers/acpi/acpica/exresop.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exstore.c b/drivers/acpi/acpica/exstore.c
index 1624436ba4c5..c0c8842dd344 100644
--- a/drivers/acpi/acpica/exstore.c
+++ b/drivers/acpi/acpica/exstore.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exstoren.c b/drivers/acpi/acpica/exstoren.c
index d4af684620ca..a979017d56b8 100644
--- a/drivers/acpi/acpica/exstoren.c
+++ b/drivers/acpi/acpica/exstoren.c
@@ -7,7 +7,7 @@
7 *****************************************************************************/ 7 *****************************************************************************/
8 8
9/* 9/*
10 * Copyright (C) 2000 - 2010, Intel Corp. 10 * Copyright (C) 2000 - 2011, Intel Corp.
11 * All rights reserved. 11 * All rights reserved.
12 * 12 *
13 * Redistribution and use in source and binary forms, with or without 13 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exstorob.c b/drivers/acpi/acpica/exstorob.c
index e972b667b09b..dc665cc554de 100644
--- a/drivers/acpi/acpica/exstorob.c
+++ b/drivers/acpi/acpica/exstorob.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exsystem.c b/drivers/acpi/acpica/exsystem.c
index 675aaa91a770..df66e7b686be 100644
--- a/drivers/acpi/acpica/exsystem.c
+++ b/drivers/acpi/acpica/exsystem.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exutils.c b/drivers/acpi/acpica/exutils.c
index 4093522eed45..8ad93146dd32 100644
--- a/drivers/acpi/acpica/exutils.c
+++ b/drivers/acpi/acpica/exutils.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwacpi.c b/drivers/acpi/acpica/hwacpi.c
index b44274a0b62c..fc380d3d45ab 100644
--- a/drivers/acpi/acpica/hwacpi.c
+++ b/drivers/acpi/acpica/hwacpi.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwgpe.c b/drivers/acpi/acpica/hwgpe.c
index 85c3cbd4304d..f610d88a66be 100644
--- a/drivers/acpi/acpica/hwgpe.c
+++ b/drivers/acpi/acpica/hwgpe.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwpci.c b/drivers/acpi/acpica/hwpci.c
index ad21c7d8bf4f..050fd227951b 100644
--- a/drivers/acpi/acpica/hwpci.c
+++ b/drivers/acpi/acpica/hwpci.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c
index 5d1273b660ae..55accb7018bb 100644
--- a/drivers/acpi/acpica/hwregs.c
+++ b/drivers/acpi/acpica/hwregs.c
@@ -7,7 +7,7 @@
7 ******************************************************************************/ 7 ******************************************************************************/
8 8
9/* 9/*
10 * Copyright (C) 2000 - 2010, Intel Corp. 10 * Copyright (C) 2000 - 2011, Intel Corp.
11 * All rights reserved. 11 * All rights reserved.
12 * 12 *
13 * Redistribution and use in source and binary forms, with or without 13 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwsleep.c b/drivers/acpi/acpica/hwsleep.c
index 3796811276ac..2ac28bbe8827 100644
--- a/drivers/acpi/acpica/hwsleep.c
+++ b/drivers/acpi/acpica/hwsleep.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwtimer.c b/drivers/acpi/acpica/hwtimer.c
index 1ef8e0bb250b..9c8eb71a12fb 100644
--- a/drivers/acpi/acpica/hwtimer.c
+++ b/drivers/acpi/acpica/hwtimer.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwvalid.c b/drivers/acpi/acpica/hwvalid.c
index e1d9c777b213..5f1605874655 100644
--- a/drivers/acpi/acpica/hwvalid.c
+++ b/drivers/acpi/acpica/hwvalid.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwxface.c b/drivers/acpi/acpica/hwxface.c
index 50cc3be77724..6f98d210e71c 100644
--- a/drivers/acpi/acpica/hwxface.c
+++ b/drivers/acpi/acpica/hwxface.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsaccess.c b/drivers/acpi/acpica/nsaccess.c
index 0cd925be5fc1..d93172fd15a8 100644
--- a/drivers/acpi/acpica/nsaccess.c
+++ b/drivers/acpi/acpica/nsaccess.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -163,9 +163,9 @@ acpi_status acpi_ns_root_initialize(void)
163#else 163#else
164 /* Mark this as a very SPECIAL method */ 164 /* Mark this as a very SPECIAL method */
165 165
166 obj_desc->method.method_flags = 166 obj_desc->method.info_flags =
167 AML_METHOD_INTERNAL_ONLY; 167 ACPI_METHOD_INTERNAL_ONLY;
168 obj_desc->method.extra.implementation = 168 obj_desc->method.dispatch.implementation =
169 acpi_ut_osi_implementation; 169 acpi_ut_osi_implementation;
170#endif 170#endif
171 break; 171 break;
diff --git a/drivers/acpi/acpica/nsalloc.c b/drivers/acpi/acpica/nsalloc.c
index 1e5ff803d9ad..1d0ef15d158f 100644
--- a/drivers/acpi/acpica/nsalloc.c
+++ b/drivers/acpi/acpica/nsalloc.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -234,8 +234,8 @@ void acpi_ns_install_node(struct acpi_walk_state *walk_state, struct acpi_namesp
234 * modified the namespace. This is used for cleanup when the 234 * modified the namespace. This is used for cleanup when the
235 * method exits. 235 * method exits.
236 */ 236 */
237 walk_state->method_desc->method.flags |= 237 walk_state->method_desc->method.info_flags |=
238 AOPOBJ_MODIFIED_NAMESPACE; 238 ACPI_METHOD_MODIFIED_NAMESPACE;
239 } 239 }
240 } 240 }
241 241
@@ -341,6 +341,7 @@ void acpi_ns_delete_namespace_subtree(struct acpi_namespace_node *parent_node)
341{ 341{
342 struct acpi_namespace_node *child_node = NULL; 342 struct acpi_namespace_node *child_node = NULL;
343 u32 level = 1; 343 u32 level = 1;
344 acpi_status status;
344 345
345 ACPI_FUNCTION_TRACE(ns_delete_namespace_subtree); 346 ACPI_FUNCTION_TRACE(ns_delete_namespace_subtree);
346 347
@@ -348,6 +349,13 @@ void acpi_ns_delete_namespace_subtree(struct acpi_namespace_node *parent_node)
348 return_VOID; 349 return_VOID;
349 } 350 }
350 351
352 /* Lock namespace for possible update */
353
354 status = acpi_ut_acquire_mutex(ACPI_MTX_NAMESPACE);
355 if (ACPI_FAILURE(status)) {
356 return_VOID;
357 }
358
351 /* 359 /*
352 * Traverse the tree of objects until we bubble back up 360 * Traverse the tree of objects until we bubble back up
353 * to where we started. 361 * to where we started.
@@ -397,6 +405,7 @@ void acpi_ns_delete_namespace_subtree(struct acpi_namespace_node *parent_node)
397 } 405 }
398 } 406 }
399 407
408 (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
400 return_VOID; 409 return_VOID;
401} 410}
402 411
diff --git a/drivers/acpi/acpica/nsdump.c b/drivers/acpi/acpica/nsdump.c
index a54dc39e304b..b683cc2ff9d3 100644
--- a/drivers/acpi/acpica/nsdump.c
+++ b/drivers/acpi/acpica/nsdump.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -624,9 +624,22 @@ acpi_ns_dump_objects(acpi_object_type type,
624 acpi_owner_id owner_id, acpi_handle start_handle) 624 acpi_owner_id owner_id, acpi_handle start_handle)
625{ 625{
626 struct acpi_walk_info info; 626 struct acpi_walk_info info;
627 acpi_status status;
627 628
628 ACPI_FUNCTION_ENTRY(); 629 ACPI_FUNCTION_ENTRY();
629 630
631 /*
632 * Just lock the entire namespace for the duration of the dump.
633 * We don't want any changes to the namespace during this time,
634 * especially the temporary nodes since we are going to display
635 * them also.
636 */
637 status = acpi_ut_acquire_mutex(ACPI_MTX_NAMESPACE);
638 if (ACPI_FAILURE(status)) {
639 acpi_os_printf("Could not acquire namespace mutex\n");
640 return;
641 }
642
630 info.debug_level = ACPI_LV_TABLES; 643 info.debug_level = ACPI_LV_TABLES;
631 info.owner_id = owner_id; 644 info.owner_id = owner_id;
632 info.display_type = display_type; 645 info.display_type = display_type;
@@ -636,6 +649,8 @@ acpi_ns_dump_objects(acpi_object_type type,
636 ACPI_NS_WALK_TEMP_NODES, 649 ACPI_NS_WALK_TEMP_NODES,
637 acpi_ns_dump_one_object, NULL, 650 acpi_ns_dump_one_object, NULL,
638 (void *)&info, NULL); 651 (void *)&info, NULL);
652
653 (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
639} 654}
640#endif /* ACPI_FUTURE_USAGE */ 655#endif /* ACPI_FUTURE_USAGE */
641 656
diff --git a/drivers/acpi/acpica/nsdumpdv.c b/drivers/acpi/acpica/nsdumpdv.c
index d2a97921e249..2ed294b7a4db 100644
--- a/drivers/acpi/acpica/nsdumpdv.c
+++ b/drivers/acpi/acpica/nsdumpdv.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nseval.c b/drivers/acpi/acpica/nseval.c
index f52829cc294b..c1bd02b1a058 100644
--- a/drivers/acpi/acpica/nseval.c
+++ b/drivers/acpi/acpica/nseval.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -389,7 +389,7 @@ acpi_ns_exec_module_code(union acpi_operand_object *method_obj,
389 * acpi_gbl_root_node->Object is NULL at PASS1. 389 * acpi_gbl_root_node->Object is NULL at PASS1.
390 */ 390 */
391 if ((type == ACPI_TYPE_DEVICE) && parent_node->object) { 391 if ((type == ACPI_TYPE_DEVICE) && parent_node->object) {
392 method_obj->method.extra.handler = 392 method_obj->method.dispatch.handler =
393 parent_node->object->device.handler; 393 parent_node->object->device.handler;
394 } 394 }
395 395
diff --git a/drivers/acpi/acpica/nsinit.c b/drivers/acpi/acpica/nsinit.c
index 0cac7ec0d2ec..fd7c6380e294 100644
--- a/drivers/acpi/acpica/nsinit.c
+++ b/drivers/acpi/acpica/nsinit.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsload.c b/drivers/acpi/acpica/nsload.c
index df18be94fefe..5f7dc691c183 100644
--- a/drivers/acpi/acpica/nsload.c
+++ b/drivers/acpi/acpica/nsload.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsnames.c b/drivers/acpi/acpica/nsnames.c
index d3104af57e13..d5fa520c3de5 100644
--- a/drivers/acpi/acpica/nsnames.c
+++ b/drivers/acpi/acpica/nsnames.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsobject.c b/drivers/acpi/acpica/nsobject.c
index 41a9213dd5af..3bb8bf105ea2 100644
--- a/drivers/acpi/acpica/nsobject.c
+++ b/drivers/acpi/acpica/nsobject.c
@@ -6,7 +6,7 @@
6 ******************************************************************************/ 6 ******************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsparse.c b/drivers/acpi/acpica/nsparse.c
index 5808c89e9fac..b3234fa795b8 100644
--- a/drivers/acpi/acpica/nsparse.c
+++ b/drivers/acpi/acpica/nsparse.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nspredef.c b/drivers/acpi/acpica/nspredef.c
index 7096bcda0c72..9fb03fa8ffde 100644
--- a/drivers/acpi/acpica/nspredef.c
+++ b/drivers/acpi/acpica/nspredef.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsrepair.c b/drivers/acpi/acpica/nsrepair.c
index d1c136692667..1d76ac85b5e7 100644
--- a/drivers/acpi/acpica/nsrepair.c
+++ b/drivers/acpi/acpica/nsrepair.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsrepair2.c b/drivers/acpi/acpica/nsrepair2.c
index 4ef9f43ea926..973883babee1 100644
--- a/drivers/acpi/acpica/nsrepair2.c
+++ b/drivers/acpi/acpica/nsrepair2.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nssearch.c b/drivers/acpi/acpica/nssearch.c
index 41102a84272f..28b0d7a62b99 100644
--- a/drivers/acpi/acpica/nssearch.c
+++ b/drivers/acpi/acpica/nssearch.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsutils.c b/drivers/acpi/acpica/nsutils.c
index a7d6ad9c111b..cb1b104a69a2 100644
--- a/drivers/acpi/acpica/nsutils.c
+++ b/drivers/acpi/acpica/nsutils.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nswalk.c b/drivers/acpi/acpica/nswalk.c
index 2cd5be8fe10f..345f0c3c6ad2 100644
--- a/drivers/acpi/acpica/nswalk.c
+++ b/drivers/acpi/acpica/nswalk.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsxfeval.c b/drivers/acpi/acpica/nsxfeval.c
index ebef8a7fd707..c53f0040e490 100644
--- a/drivers/acpi/acpica/nsxfeval.c
+++ b/drivers/acpi/acpica/nsxfeval.c
@@ -6,7 +6,7 @@
6 ******************************************************************************/ 6 ******************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsxfname.c b/drivers/acpi/acpica/nsxfname.c
index b01e45a415e3..3fd4526f3dba 100644
--- a/drivers/acpi/acpica/nsxfname.c
+++ b/drivers/acpi/acpica/nsxfname.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
@@ -603,10 +603,9 @@ acpi_status acpi_install_method(u8 *buffer)
603 method_obj->method.param_count = (u8) 603 method_obj->method.param_count = (u8)
604 (method_flags & AML_METHOD_ARG_COUNT); 604 (method_flags & AML_METHOD_ARG_COUNT);
605 605
606 method_obj->method.method_flags = (u8)
607 (method_flags & ~AML_METHOD_ARG_COUNT);
608
609 if (method_flags & AML_METHOD_SERIALIZED) { 606 if (method_flags & AML_METHOD_SERIALIZED) {
607 method_obj->method.info_flags = ACPI_METHOD_SERIALIZED;
608
610 method_obj->method.sync_level = (u8) 609 method_obj->method.sync_level = (u8)
611 ((method_flags & AML_METHOD_SYNC_LEVEL) >> 4); 610 ((method_flags & AML_METHOD_SYNC_LEVEL) >> 4);
612 } 611 }
diff --git a/drivers/acpi/acpica/nsxfobj.c b/drivers/acpi/acpica/nsxfobj.c
index a1f04e9b8030..db7660f8b869 100644
--- a/drivers/acpi/acpica/nsxfobj.c
+++ b/drivers/acpi/acpica/nsxfobj.c
@@ -6,7 +6,7 @@
6 ******************************************************************************/ 6 ******************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psargs.c b/drivers/acpi/acpica/psargs.c
index 7df1a4c95274..e1fad0ee0136 100644
--- a/drivers/acpi/acpica/psargs.c
+++ b/drivers/acpi/acpica/psargs.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psloop.c b/drivers/acpi/acpica/psloop.c
index 2f2e7760938c..01dd70d1de51 100644
--- a/drivers/acpi/acpica/psloop.c
+++ b/drivers/acpi/acpica/psloop.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -655,7 +655,7 @@ acpi_ps_link_module_code(union acpi_parse_object *parent_op,
655 method_obj->method.aml_start = aml_start; 655 method_obj->method.aml_start = aml_start;
656 method_obj->method.aml_length = aml_length; 656 method_obj->method.aml_length = aml_length;
657 method_obj->method.owner_id = owner_id; 657 method_obj->method.owner_id = owner_id;
658 method_obj->method.flags |= AOPOBJ_MODULE_LEVEL; 658 method_obj->method.info_flags |= ACPI_METHOD_MODULE_LEVEL;
659 659
660 /* 660 /*
661 * Save the parent node in next_object. This is cheating, but we 661 * Save the parent node in next_object. This is cheating, but we
diff --git a/drivers/acpi/acpica/psopcode.c b/drivers/acpi/acpica/psopcode.c
index 2b0c3be2b1b8..bed08de7528c 100644
--- a/drivers/acpi/acpica/psopcode.c
+++ b/drivers/acpi/acpica/psopcode.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psparse.c b/drivers/acpi/acpica/psparse.c
index 8d81542194d4..9bb0cbd37b5e 100644
--- a/drivers/acpi/acpica/psparse.c
+++ b/drivers/acpi/acpica/psparse.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -55,7 +55,6 @@
55#include "acparser.h" 55#include "acparser.h"
56#include "acdispat.h" 56#include "acdispat.h"
57#include "amlcode.h" 57#include "amlcode.h"
58#include "acnamesp.h"
59#include "acinterp.h" 58#include "acinterp.h"
60 59
61#define _COMPONENT ACPI_PARSER 60#define _COMPONENT ACPI_PARSER
@@ -539,24 +538,16 @@ acpi_status acpi_ps_parse_aml(struct acpi_walk_state *walk_state)
539 /* Check for possible multi-thread reentrancy problem */ 538 /* Check for possible multi-thread reentrancy problem */
540 539
541 if ((status == AE_ALREADY_EXISTS) && 540 if ((status == AE_ALREADY_EXISTS) &&
542 (!walk_state->method_desc->method.mutex)) { 541 (!(walk_state->method_desc->method.
543 ACPI_INFO((AE_INFO, 542 info_flags & ACPI_METHOD_SERIALIZED))) {
544 "Marking method %4.4s as Serialized because of AE_ALREADY_EXISTS error",
545 walk_state->method_node->name.
546 ascii));
547
548 /* 543 /*
549 * Method tried to create an object twice. The probable cause is 544 * Method is not serialized and tried to create an object
550 * that the method cannot handle reentrancy. 545 * twice. The probable cause is that the method cannot
551 * 546 * handle reentrancy. Mark as "pending serialized" now, and
552 * The method is marked not_serialized, but it tried to create 547 * then mark "serialized" when the last thread exits.
553 * a named object, causing the second thread entrance to fail.
554 * Workaround this problem by marking the method permanently
555 * as Serialized.
556 */ 548 */
557 walk_state->method_desc->method.method_flags |= 549 walk_state->method_desc->method.info_flags |=
558 AML_METHOD_SERIALIZED; 550 ACPI_METHOD_SERIALIZED_PENDING;
559 walk_state->method_desc->method.sync_level = 0;
560 } 551 }
561 } 552 }
562 553
diff --git a/drivers/acpi/acpica/psscope.c b/drivers/acpi/acpica/psscope.c
index 40e2b279ea12..a5faa1323a02 100644
--- a/drivers/acpi/acpica/psscope.c
+++ b/drivers/acpi/acpica/psscope.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/pstree.c b/drivers/acpi/acpica/pstree.c
index d4b970c3630b..f1464c03aa42 100644
--- a/drivers/acpi/acpica/pstree.c
+++ b/drivers/acpi/acpica/pstree.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psutils.c b/drivers/acpi/acpica/psutils.c
index fe29eee5adb1..7eda78503422 100644
--- a/drivers/acpi/acpica/psutils.c
+++ b/drivers/acpi/acpica/psutils.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/pswalk.c b/drivers/acpi/acpica/pswalk.c
index 8abb9629443d..3312d6368bf1 100644
--- a/drivers/acpi/acpica/pswalk.c
+++ b/drivers/acpi/acpica/pswalk.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psxface.c b/drivers/acpi/acpica/psxface.c
index c42f067cff9d..8086805d4494 100644
--- a/drivers/acpi/acpica/psxface.c
+++ b/drivers/acpi/acpica/psxface.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -47,7 +47,6 @@
47#include "acdispat.h" 47#include "acdispat.h"
48#include "acinterp.h" 48#include "acinterp.h"
49#include "actables.h" 49#include "actables.h"
50#include "amlcode.h"
51 50
52#define _COMPONENT ACPI_PARSER 51#define _COMPONENT ACPI_PARSER
53ACPI_MODULE_NAME("psxface") 52ACPI_MODULE_NAME("psxface")
@@ -285,15 +284,15 @@ acpi_status acpi_ps_execute_method(struct acpi_evaluate_info *info)
285 goto cleanup; 284 goto cleanup;
286 } 285 }
287 286
288 if (info->obj_desc->method.flags & AOPOBJ_MODULE_LEVEL) { 287 if (info->obj_desc->method.info_flags & ACPI_METHOD_MODULE_LEVEL) {
289 walk_state->parse_flags |= ACPI_PARSE_MODULE_LEVEL; 288 walk_state->parse_flags |= ACPI_PARSE_MODULE_LEVEL;
290 } 289 }
291 290
292 /* Invoke an internal method if necessary */ 291 /* Invoke an internal method if necessary */
293 292
294 if (info->obj_desc->method.method_flags & AML_METHOD_INTERNAL_ONLY) { 293 if (info->obj_desc->method.info_flags & ACPI_METHOD_INTERNAL_ONLY) {
295 status = 294 status =
296 info->obj_desc->method.extra.implementation(walk_state); 295 info->obj_desc->method.dispatch.implementation(walk_state);
297 info->return_object = walk_state->return_desc; 296 info->return_object = walk_state->return_desc;
298 297
299 /* Cleanup states */ 298 /* Cleanup states */
diff --git a/drivers/acpi/acpica/rsaddr.c b/drivers/acpi/acpica/rsaddr.c
index 226c806ae986..9e66f9078426 100644
--- a/drivers/acpi/acpica/rsaddr.c
+++ b/drivers/acpi/acpica/rsaddr.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rscalc.c b/drivers/acpi/acpica/rscalc.c
index d6ebf7ec622d..3a8a89ec2ca4 100644
--- a/drivers/acpi/acpica/rscalc.c
+++ b/drivers/acpi/acpica/rscalc.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rscreate.c b/drivers/acpi/acpica/rscreate.c
index c80a2eea3a01..4ce6e1147e80 100644
--- a/drivers/acpi/acpica/rscreate.c
+++ b/drivers/acpi/acpica/rscreate.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsdump.c b/drivers/acpi/acpica/rsdump.c
index f859b0386fe4..33db7520c74b 100644
--- a/drivers/acpi/acpica/rsdump.c
+++ b/drivers/acpi/acpica/rsdump.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsinfo.c b/drivers/acpi/acpica/rsinfo.c
index 1fd868b964fd..f9ea60872aa4 100644
--- a/drivers/acpi/acpica/rsinfo.c
+++ b/drivers/acpi/acpica/rsinfo.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsio.c b/drivers/acpi/acpica/rsio.c
index 33bff17c0bbc..0c7efef008be 100644
--- a/drivers/acpi/acpica/rsio.c
+++ b/drivers/acpi/acpica/rsio.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsirq.c b/drivers/acpi/acpica/rsirq.c
index 545da40d7fa7..50b8ad211167 100644
--- a/drivers/acpi/acpica/rsirq.c
+++ b/drivers/acpi/acpica/rsirq.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rslist.c b/drivers/acpi/acpica/rslist.c
index 7335f22aac20..1bfcef736c50 100644
--- a/drivers/acpi/acpica/rslist.c
+++ b/drivers/acpi/acpica/rslist.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsmemory.c b/drivers/acpi/acpica/rsmemory.c
index 887b8ba8c432..7cc6d8625f1e 100644
--- a/drivers/acpi/acpica/rsmemory.c
+++ b/drivers/acpi/acpica/rsmemory.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsmisc.c b/drivers/acpi/acpica/rsmisc.c
index f8cd9e87d987..410264b22a29 100644
--- a/drivers/acpi/acpica/rsmisc.c
+++ b/drivers/acpi/acpica/rsmisc.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsutils.c b/drivers/acpi/acpica/rsutils.c
index 491191e6cf69..231811e56939 100644
--- a/drivers/acpi/acpica/rsutils.c
+++ b/drivers/acpi/acpica/rsutils.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsxface.c b/drivers/acpi/acpica/rsxface.c
index 9f6a6e7e1c8e..2ff657a28f26 100644
--- a/drivers/acpi/acpica/rsxface.c
+++ b/drivers/acpi/acpica/rsxface.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbfadt.c b/drivers/acpi/acpica/tbfadt.c
index d2ff4325c427..428d44e2d162 100644
--- a/drivers/acpi/acpica/tbfadt.c
+++ b/drivers/acpi/acpica/tbfadt.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbfind.c b/drivers/acpi/acpica/tbfind.c
index 989d5c867864..a55cb2bb5abb 100644
--- a/drivers/acpi/acpica/tbfind.c
+++ b/drivers/acpi/acpica/tbfind.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbinstal.c b/drivers/acpi/acpica/tbinstal.c
index 83d7af8d0905..48db0944ce4a 100644
--- a/drivers/acpi/acpica/tbinstal.c
+++ b/drivers/acpi/acpica/tbinstal.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbutils.c b/drivers/acpi/acpica/tbutils.c
index 34f9c2bc5e1f..0f2d395feaba 100644
--- a/drivers/acpi/acpica/tbutils.c
+++ b/drivers/acpi/acpica/tbutils.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbxface.c b/drivers/acpi/acpica/tbxface.c
index 4a8b9e6ea57a..4b7085dfc683 100644
--- a/drivers/acpi/acpica/tbxface.c
+++ b/drivers/acpi/acpica/tbxface.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbxfroot.c b/drivers/acpi/acpica/tbxfroot.c
index fd2c07d1d3ac..7eb6c6cc1edf 100644
--- a/drivers/acpi/acpica/tbxfroot.c
+++ b/drivers/acpi/acpica/tbxfroot.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utalloc.c b/drivers/acpi/acpica/utalloc.c
index 8f0896281567..0a697351cf69 100644
--- a/drivers/acpi/acpica/utalloc.c
+++ b/drivers/acpi/acpica/utalloc.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utcopy.c b/drivers/acpi/acpica/utcopy.c
index 6fef83f04bcd..aded299a2fa8 100644
--- a/drivers/acpi/acpica/utcopy.c
+++ b/drivers/acpi/acpica/utcopy.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utdebug.c b/drivers/acpi/acpica/utdebug.c
index f21c486929a5..a9bcd816dc29 100644
--- a/drivers/acpi/acpica/utdebug.c
+++ b/drivers/acpi/acpica/utdebug.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utdelete.c b/drivers/acpi/acpica/utdelete.c
index ed794cd033ea..31f5a7832ef1 100644
--- a/drivers/acpi/acpica/utdelete.c
+++ b/drivers/acpi/acpica/utdelete.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/uteval.c b/drivers/acpi/acpica/uteval.c
index 22f59ef604e0..18f73c9d10bc 100644
--- a/drivers/acpi/acpica/uteval.c
+++ b/drivers/acpi/acpica/uteval.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utglobal.c b/drivers/acpi/acpica/utglobal.c
index 508537f884ac..97dd9bbf055a 100644
--- a/drivers/acpi/acpica/utglobal.c
+++ b/drivers/acpi/acpica/utglobal.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utids.c b/drivers/acpi/acpica/utids.c
index d2906328535d..b679ea693545 100644
--- a/drivers/acpi/acpica/utids.c
+++ b/drivers/acpi/acpica/utids.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utinit.c b/drivers/acpi/acpica/utinit.c
index c1b1c803ea9b..191b6828cce9 100644
--- a/drivers/acpi/acpica/utinit.c
+++ b/drivers/acpi/acpica/utinit.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utlock.c b/drivers/acpi/acpica/utlock.c
index b081cd46a15f..f6bb75c6faf5 100644
--- a/drivers/acpi/acpica/utlock.c
+++ b/drivers/acpi/acpica/utlock.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utmath.c b/drivers/acpi/acpica/utmath.c
index 49cf7b7fd816..ce481da9bb45 100644
--- a/drivers/acpi/acpica/utmath.c
+++ b/drivers/acpi/acpica/utmath.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utmisc.c b/drivers/acpi/acpica/utmisc.c
index c7d0e05ef5a4..c33a852d4f42 100644
--- a/drivers/acpi/acpica/utmisc.c
+++ b/drivers/acpi/acpica/utmisc.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utmutex.c b/drivers/acpi/acpica/utmutex.c
index 199528ff7f1d..a946c689f03b 100644
--- a/drivers/acpi/acpica/utmutex.c
+++ b/drivers/acpi/acpica/utmutex.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utobject.c b/drivers/acpi/acpica/utobject.c
index fd1fa2749ea5..188340a017b4 100644
--- a/drivers/acpi/acpica/utobject.c
+++ b/drivers/acpi/acpica/utobject.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utosi.c b/drivers/acpi/acpica/utosi.c
index 18c59a85fdca..1fb10cb8f11d 100644
--- a/drivers/acpi/acpica/utosi.c
+++ b/drivers/acpi/acpica/utosi.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utresrc.c b/drivers/acpi/acpica/utresrc.c
index 7965919000b1..84e051844247 100644
--- a/drivers/acpi/acpica/utresrc.c
+++ b/drivers/acpi/acpica/utresrc.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utstate.c b/drivers/acpi/acpica/utstate.c
index d35d109b8da2..30c21e1a9360 100644
--- a/drivers/acpi/acpica/utstate.c
+++ b/drivers/acpi/acpica/utstate.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utxface.c b/drivers/acpi/acpica/utxface.c
index 1f484c9a6888..98ad125e14ff 100644
--- a/drivers/acpi/acpica/utxface.c
+++ b/drivers/acpi/acpica/utxface.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utxferror.c b/drivers/acpi/acpica/utxferror.c
index 6f12e314fbae..916ae097c43c 100644
--- a/drivers/acpi/acpica/utxferror.c
+++ b/drivers/acpi/acpica/utxferror.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c
index 68bc227e7c4c..ac1a599f5147 100644
--- a/drivers/acpi/battery.c
+++ b/drivers/acpi/battery.c
@@ -998,7 +998,6 @@ static int acpi_battery_resume(struct acpi_device *device)
998 if (!device) 998 if (!device)
999 return -EINVAL; 999 return -EINVAL;
1000 battery = acpi_driver_data(device); 1000 battery = acpi_driver_data(device);
1001 acpi_battery_refresh(battery);
1002 battery->update_time = 0; 1001 battery->update_time = 0;
1003 acpi_battery_update(battery); 1002 acpi_battery_update(battery);
1004 return 0; 1003 return 0;
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index ef138731c0ea..1c28816152fa 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -200,11 +200,16 @@ config PL330_DMA
200 platform_data for a dma-pl330 device. 200 platform_data for a dma-pl330 device.
201 201
202config PCH_DMA 202config PCH_DMA
203 tristate "Topcliff (Intel EG20T) PCH DMA support" 203 tristate "Intel EG20T PCH / OKI SEMICONDUCTOR ML7213 IOH DMA support"
204 depends on PCI && X86 204 depends on PCI && X86
205 select DMA_ENGINE 205 select DMA_ENGINE
206 help 206 help
207 Enable support for the Topcliff (Intel EG20T) PCH DMA engine. 207 Enable support for Intel EG20T PCH DMA engine.
208
209 This driver also can be used for OKI SEMICONDUCTOR ML7213 IOH(Input/
210 Output Hub) which is for IVI(In-Vehicle Infotainment) use.
211 ML7213 is companion chip for Intel Atom E6xx series.
212 ML7213 is completely compatible for Intel EG20T PCH.
208 213
209config IMX_SDMA 214config IMX_SDMA
210 tristate "i.MX SDMA support" 215 tristate "i.MX SDMA support"
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index b605cc9ac3a2..297f48b0cba9 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -19,14 +19,14 @@
19 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * this program; if not, write to the Free Software Foundation, Inc., 59
20 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 * 21 *
22 * The full GNU General Public License is iin this distribution in the 22 * The full GNU General Public License is in this distribution in the file
23 * file called COPYING. 23 * called COPYING.
24 * 24 *
25 * Documentation: ARM DDI 0196G == PL080 25 * Documentation: ARM DDI 0196G == PL080
26 * Documentation: ARM DDI 0218E == PL081 26 * Documentation: ARM DDI 0218E == PL081
27 * 27 *
28 * PL080 & PL081 both have 16 sets of DMA signals that can be routed to 28 * PL080 & PL081 both have 16 sets of DMA signals that can be routed to any
29 * any channel. 29 * channel.
30 * 30 *
31 * The PL080 has 8 channels available for simultaneous use, and the PL081 31 * The PL080 has 8 channels available for simultaneous use, and the PL081
32 * has only two channels. So on these DMA controllers the number of channels 32 * has only two channels. So on these DMA controllers the number of channels
@@ -53,7 +53,23 @@
53 * 53 *
54 * ASSUMES default (little) endianness for DMA transfers 54 * ASSUMES default (little) endianness for DMA transfers
55 * 55 *
56 * Only DMAC flow control is implemented 56 * The PL08x has two flow control settings:
57 * - DMAC flow control: the transfer size defines the number of transfers
58 * which occur for the current LLI entry, and the DMAC raises TC at the
59 * end of every LLI entry. Observed behaviour shows the DMAC listening
60 * to both the BREQ and SREQ signals (contrary to documented),
61 * transferring data if either is active. The LBREQ and LSREQ signals
62 * are ignored.
63 *
64 * - Peripheral flow control: the transfer size is ignored (and should be
65 * zero). The data is transferred from the current LLI entry, until
66 * after the final transfer signalled by LBREQ or LSREQ. The DMAC
67 * will then move to the next LLI entry.
68 *
69 * Only the former works sanely with scatter lists, so we only implement
70 * the DMAC flow control method. However, peripherals which use the LBREQ
71 * and LSREQ signals (eg, MMCI) are unable to use this mode, which through
72 * these hardware restrictions prevents them from using scatter DMA.
57 * 73 *
58 * Global TODO: 74 * Global TODO:
59 * - Break out common code from arch/arm/mach-s3c64xx and share 75 * - Break out common code from arch/arm/mach-s3c64xx and share
@@ -61,50 +77,39 @@
61#include <linux/device.h> 77#include <linux/device.h>
62#include <linux/init.h> 78#include <linux/init.h>
63#include <linux/module.h> 79#include <linux/module.h>
64#include <linux/pci.h>
65#include <linux/interrupt.h> 80#include <linux/interrupt.h>
66#include <linux/slab.h> 81#include <linux/slab.h>
67#include <linux/dmapool.h> 82#include <linux/dmapool.h>
68#include <linux/amba/bus.h>
69#include <linux/dmaengine.h> 83#include <linux/dmaengine.h>
84#include <linux/amba/bus.h>
70#include <linux/amba/pl08x.h> 85#include <linux/amba/pl08x.h>
71#include <linux/debugfs.h> 86#include <linux/debugfs.h>
72#include <linux/seq_file.h> 87#include <linux/seq_file.h>
73 88
74#include <asm/hardware/pl080.h> 89#include <asm/hardware/pl080.h>
75#include <asm/dma.h>
76#include <asm/mach/dma.h>
77#include <asm/atomic.h>
78#include <asm/processor.h>
79#include <asm/cacheflush.h>
80 90
81#define DRIVER_NAME "pl08xdmac" 91#define DRIVER_NAME "pl08xdmac"
82 92
83/** 93/**
84 * struct vendor_data - vendor-specific config parameters 94 * struct vendor_data - vendor-specific config parameters for PL08x derivatives
85 * for PL08x derivates
86 * @name: the name of this specific variant
87 * @channels: the number of channels available in this variant 95 * @channels: the number of channels available in this variant
88 * @dualmaster: whether this version supports dual AHB masters 96 * @dualmaster: whether this version supports dual AHB masters or not.
89 * or not.
90 */ 97 */
91struct vendor_data { 98struct vendor_data {
92 char *name;
93 u8 channels; 99 u8 channels;
94 bool dualmaster; 100 bool dualmaster;
95}; 101};
96 102
97/* 103/*
98 * PL08X private data structures 104 * PL08X private data structures
99 * An LLI struct - see pl08x TRM 105 * An LLI struct - see PL08x TRM. Note that next uses bit[0] as a bus bit,
100 * Note that next uses bit[0] as a bus bit, 106 * start & end do not - their bus bit info is in cctl. Also note that these
101 * start & end do not - their bus bit info 107 * are fixed 32-bit quantities.
102 * is in cctl
103 */ 108 */
104struct lli { 109struct pl08x_lli {
105 dma_addr_t src; 110 u32 src;
106 dma_addr_t dst; 111 u32 dst;
107 dma_addr_t next; 112 u32 lli;
108 u32 cctl; 113 u32 cctl;
109}; 114};
110 115
@@ -119,6 +124,8 @@ struct lli {
119 * @phy_chans: array of data for the physical channels 124 * @phy_chans: array of data for the physical channels
120 * @pool: a pool for the LLI descriptors 125 * @pool: a pool for the LLI descriptors
121 * @pool_ctr: counter of LLIs in the pool 126 * @pool_ctr: counter of LLIs in the pool
127 * @lli_buses: bitmask to or in to LLI pointer selecting AHB port for LLI fetches
128 * @mem_buses: set to indicate memory transfers on AHB2.
122 * @lock: a spinlock for this struct 129 * @lock: a spinlock for this struct
123 */ 130 */
124struct pl08x_driver_data { 131struct pl08x_driver_data {
@@ -126,11 +133,13 @@ struct pl08x_driver_data {
126 struct dma_device memcpy; 133 struct dma_device memcpy;
127 void __iomem *base; 134 void __iomem *base;
128 struct amba_device *adev; 135 struct amba_device *adev;
129 struct vendor_data *vd; 136 const struct vendor_data *vd;
130 struct pl08x_platform_data *pd; 137 struct pl08x_platform_data *pd;
131 struct pl08x_phy_chan *phy_chans; 138 struct pl08x_phy_chan *phy_chans;
132 struct dma_pool *pool; 139 struct dma_pool *pool;
133 int pool_ctr; 140 int pool_ctr;
141 u8 lli_buses;
142 u8 mem_buses;
134 spinlock_t lock; 143 spinlock_t lock;
135}; 144};
136 145
@@ -152,9 +161,9 @@ struct pl08x_driver_data {
152/* Size (bytes) of each LLI buffer allocated for one transfer */ 161/* Size (bytes) of each LLI buffer allocated for one transfer */
153# define PL08X_LLI_TSFR_SIZE 0x2000 162# define PL08X_LLI_TSFR_SIZE 0x2000
154 163
155/* Maximimum times we call dma_pool_alloc on this pool without freeing */ 164/* Maximum times we call dma_pool_alloc on this pool without freeing */
156#define PL08X_MAX_ALLOCS 0x40 165#define PL08X_MAX_ALLOCS 0x40
157#define MAX_NUM_TSFR_LLIS (PL08X_LLI_TSFR_SIZE/sizeof(struct lli)) 166#define MAX_NUM_TSFR_LLIS (PL08X_LLI_TSFR_SIZE/sizeof(struct pl08x_lli))
158#define PL08X_ALIGN 8 167#define PL08X_ALIGN 8
159 168
160static inline struct pl08x_dma_chan *to_pl08x_chan(struct dma_chan *chan) 169static inline struct pl08x_dma_chan *to_pl08x_chan(struct dma_chan *chan)
@@ -162,6 +171,11 @@ static inline struct pl08x_dma_chan *to_pl08x_chan(struct dma_chan *chan)
162 return container_of(chan, struct pl08x_dma_chan, chan); 171 return container_of(chan, struct pl08x_dma_chan, chan);
163} 172}
164 173
174static inline struct pl08x_txd *to_pl08x_txd(struct dma_async_tx_descriptor *tx)
175{
176 return container_of(tx, struct pl08x_txd, tx);
177}
178
165/* 179/*
166 * Physical channel handling 180 * Physical channel handling
167 */ 181 */
@@ -177,88 +191,47 @@ static int pl08x_phy_channel_busy(struct pl08x_phy_chan *ch)
177 191
178/* 192/*
179 * Set the initial DMA register values i.e. those for the first LLI 193 * Set the initial DMA register values i.e. those for the first LLI
180 * The next lli pointer and the configuration interrupt bit have 194 * The next LLI pointer and the configuration interrupt bit have
181 * been set when the LLIs were constructed 195 * been set when the LLIs were constructed. Poke them into the hardware
196 * and start the transfer.
182 */ 197 */
183static void pl08x_set_cregs(struct pl08x_driver_data *pl08x, 198static void pl08x_start_txd(struct pl08x_dma_chan *plchan,
184 struct pl08x_phy_chan *ch) 199 struct pl08x_txd *txd)
185{
186 /* Wait for channel inactive */
187 while (pl08x_phy_channel_busy(ch))
188 ;
189
190 dev_vdbg(&pl08x->adev->dev,
191 "WRITE channel %d: csrc=%08x, cdst=%08x, "
192 "cctl=%08x, clli=%08x, ccfg=%08x\n",
193 ch->id,
194 ch->csrc,
195 ch->cdst,
196 ch->cctl,
197 ch->clli,
198 ch->ccfg);
199
200 writel(ch->csrc, ch->base + PL080_CH_SRC_ADDR);
201 writel(ch->cdst, ch->base + PL080_CH_DST_ADDR);
202 writel(ch->clli, ch->base + PL080_CH_LLI);
203 writel(ch->cctl, ch->base + PL080_CH_CONTROL);
204 writel(ch->ccfg, ch->base + PL080_CH_CONFIG);
205}
206
207static inline void pl08x_config_phychan_for_txd(struct pl08x_dma_chan *plchan)
208{ 200{
209 struct pl08x_channel_data *cd = plchan->cd; 201 struct pl08x_driver_data *pl08x = plchan->host;
210 struct pl08x_phy_chan *phychan = plchan->phychan; 202 struct pl08x_phy_chan *phychan = plchan->phychan;
211 struct pl08x_txd *txd = plchan->at; 203 struct pl08x_lli *lli = &txd->llis_va[0];
212
213 /* Copy the basic control register calculated at transfer config */
214 phychan->csrc = txd->csrc;
215 phychan->cdst = txd->cdst;
216 phychan->clli = txd->clli;
217 phychan->cctl = txd->cctl;
218
219 /* Assign the signal to the proper control registers */
220 phychan->ccfg = cd->ccfg;
221 phychan->ccfg &= ~PL080_CONFIG_SRC_SEL_MASK;
222 phychan->ccfg &= ~PL080_CONFIG_DST_SEL_MASK;
223 /* If it wasn't set from AMBA, ignore it */
224 if (txd->direction == DMA_TO_DEVICE)
225 /* Select signal as destination */
226 phychan->ccfg |=
227 (phychan->signal << PL080_CONFIG_DST_SEL_SHIFT);
228 else if (txd->direction == DMA_FROM_DEVICE)
229 /* Select signal as source */
230 phychan->ccfg |=
231 (phychan->signal << PL080_CONFIG_SRC_SEL_SHIFT);
232 /* Always enable error interrupts */
233 phychan->ccfg |= PL080_CONFIG_ERR_IRQ_MASK;
234 /* Always enable terminal interrupts */
235 phychan->ccfg |= PL080_CONFIG_TC_IRQ_MASK;
236}
237
238/*
239 * Enable the DMA channel
240 * Assumes all other configuration bits have been set
241 * as desired before this code is called
242 */
243static void pl08x_enable_phy_chan(struct pl08x_driver_data *pl08x,
244 struct pl08x_phy_chan *ch)
245{
246 u32 val; 204 u32 val;
247 205
248 /* 206 plchan->at = txd;
249 * Do not access config register until channel shows as disabled
250 */
251 while (readl(pl08x->base + PL080_EN_CHAN) & (1 << ch->id))
252 ;
253 207
254 /* 208 /* Wait for channel inactive */
255 * Do not access config register until channel shows as inactive 209 while (pl08x_phy_channel_busy(phychan))
256 */ 210 cpu_relax();
257 val = readl(ch->base + PL080_CH_CONFIG); 211
212 dev_vdbg(&pl08x->adev->dev,
213 "WRITE channel %d: csrc=0x%08x, cdst=0x%08x, "
214 "clli=0x%08x, cctl=0x%08x, ccfg=0x%08x\n",
215 phychan->id, lli->src, lli->dst, lli->lli, lli->cctl,
216 txd->ccfg);
217
218 writel(lli->src, phychan->base + PL080_CH_SRC_ADDR);
219 writel(lli->dst, phychan->base + PL080_CH_DST_ADDR);
220 writel(lli->lli, phychan->base + PL080_CH_LLI);
221 writel(lli->cctl, phychan->base + PL080_CH_CONTROL);
222 writel(txd->ccfg, phychan->base + PL080_CH_CONFIG);
223
224 /* Enable the DMA channel */
225 /* Do not access config register until channel shows as disabled */
226 while (readl(pl08x->base + PL080_EN_CHAN) & (1 << phychan->id))
227 cpu_relax();
228
229 /* Do not access config register until channel shows as inactive */
230 val = readl(phychan->base + PL080_CH_CONFIG);
258 while ((val & PL080_CONFIG_ACTIVE) || (val & PL080_CONFIG_ENABLE)) 231 while ((val & PL080_CONFIG_ACTIVE) || (val & PL080_CONFIG_ENABLE))
259 val = readl(ch->base + PL080_CH_CONFIG); 232 val = readl(phychan->base + PL080_CH_CONFIG);
260 233
261 writel(val | PL080_CONFIG_ENABLE, ch->base + PL080_CH_CONFIG); 234 writel(val | PL080_CONFIG_ENABLE, phychan->base + PL080_CH_CONFIG);
262} 235}
263 236
264/* 237/*
@@ -266,10 +239,8 @@ static void pl08x_enable_phy_chan(struct pl08x_driver_data *pl08x,
266 * 239 *
267 * Disabling individual channels could lose data. 240 * Disabling individual channels could lose data.
268 * 241 *
269 * Disable the peripheral DMA after disabling the DMAC 242 * Disable the peripheral DMA after disabling the DMAC in order to allow
270 * in order to allow the DMAC FIFO to drain, and 243 * the DMAC FIFO to drain, and hence allow the channel to show inactive
271 * hence allow the channel to show inactive
272 *
273 */ 244 */
274static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch) 245static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch)
275{ 246{
@@ -282,7 +253,7 @@ static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch)
282 253
283 /* Wait for channel inactive */ 254 /* Wait for channel inactive */
284 while (pl08x_phy_channel_busy(ch)) 255 while (pl08x_phy_channel_busy(ch))
285 ; 256 cpu_relax();
286} 257}
287 258
288static void pl08x_resume_phy_chan(struct pl08x_phy_chan *ch) 259static void pl08x_resume_phy_chan(struct pl08x_phy_chan *ch)
@@ -333,54 +304,56 @@ static inline u32 get_bytes_in_cctl(u32 cctl)
333static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan) 304static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan)
334{ 305{
335 struct pl08x_phy_chan *ch; 306 struct pl08x_phy_chan *ch;
336 struct pl08x_txd *txdi = NULL;
337 struct pl08x_txd *txd; 307 struct pl08x_txd *txd;
338 unsigned long flags; 308 unsigned long flags;
339 u32 bytes = 0; 309 size_t bytes = 0;
340 310
341 spin_lock_irqsave(&plchan->lock, flags); 311 spin_lock_irqsave(&plchan->lock, flags);
342
343 ch = plchan->phychan; 312 ch = plchan->phychan;
344 txd = plchan->at; 313 txd = plchan->at;
345 314
346 /* 315 /*
347 * Next follow the LLIs to get the number of pending bytes in the 316 * Follow the LLIs to get the number of remaining
348 * currently active transaction. 317 * bytes in the currently active transaction.
349 */ 318 */
350 if (ch && txd) { 319 if (ch && txd) {
351 struct lli *llis_va = txd->llis_va; 320 u32 clli = readl(ch->base + PL080_CH_LLI) & ~PL080_LLI_LM_AHB2;
352 struct lli *llis_bus = (struct lli *) txd->llis_bus;
353 u32 clli = readl(ch->base + PL080_CH_LLI);
354 321
355 /* First get the bytes in the current active LLI */ 322 /* First get the remaining bytes in the active transfer */
356 bytes = get_bytes_in_cctl(readl(ch->base + PL080_CH_CONTROL)); 323 bytes = get_bytes_in_cctl(readl(ch->base + PL080_CH_CONTROL));
357 324
358 if (clli) { 325 if (clli) {
359 int i = 0; 326 struct pl08x_lli *llis_va = txd->llis_va;
327 dma_addr_t llis_bus = txd->llis_bus;
328 int index;
329
330 BUG_ON(clli < llis_bus || clli >= llis_bus +
331 sizeof(struct pl08x_lli) * MAX_NUM_TSFR_LLIS);
332
333 /*
334 * Locate the next LLI - as this is an array,
335 * it's simple maths to find.
336 */
337 index = (clli - llis_bus) / sizeof(struct pl08x_lli);
360 338
361 /* Forward to the LLI pointed to by clli */ 339 for (; index < MAX_NUM_TSFR_LLIS; index++) {
362 while ((clli != (u32) &(llis_bus[i])) && 340 bytes += get_bytes_in_cctl(llis_va[index].cctl);
363 (i < MAX_NUM_TSFR_LLIS))
364 i++;
365 341
366 while (clli) {
367 bytes += get_bytes_in_cctl(llis_va[i].cctl);
368 /* 342 /*
369 * A clli of 0x00000000 will terminate the 343 * A LLI pointer of 0 terminates the LLI list
370 * LLI list
371 */ 344 */
372 clli = llis_va[i].next; 345 if (!llis_va[index].lli)
373 i++; 346 break;
374 } 347 }
375 } 348 }
376 } 349 }
377 350
378 /* Sum up all queued transactions */ 351 /* Sum up all queued transactions */
379 if (!list_empty(&plchan->desc_list)) { 352 if (!list_empty(&plchan->pend_list)) {
380 list_for_each_entry(txdi, &plchan->desc_list, node) { 353 struct pl08x_txd *txdi;
354 list_for_each_entry(txdi, &plchan->pend_list, node) {
381 bytes += txdi->len; 355 bytes += txdi->len;
382 } 356 }
383
384 } 357 }
385 358
386 spin_unlock_irqrestore(&plchan->lock, flags); 359 spin_unlock_irqrestore(&plchan->lock, flags);
@@ -390,6 +363,10 @@ static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan)
390 363
391/* 364/*
392 * Allocate a physical channel for a virtual channel 365 * Allocate a physical channel for a virtual channel
366 *
367 * Try to locate a physical channel to be used for this transfer. If all
368 * are taken return NULL and the requester will have to cope by using
369 * some fallback PIO mode or retrying later.
393 */ 370 */
394static struct pl08x_phy_chan * 371static struct pl08x_phy_chan *
395pl08x_get_phy_channel(struct pl08x_driver_data *pl08x, 372pl08x_get_phy_channel(struct pl08x_driver_data *pl08x,
@@ -399,12 +376,6 @@ pl08x_get_phy_channel(struct pl08x_driver_data *pl08x,
399 unsigned long flags; 376 unsigned long flags;
400 int i; 377 int i;
401 378
402 /*
403 * Try to locate a physical channel to be used for
404 * this transfer. If all are taken return NULL and
405 * the requester will have to cope by using some fallback
406 * PIO mode or retrying later.
407 */
408 for (i = 0; i < pl08x->vd->channels; i++) { 379 for (i = 0; i < pl08x->vd->channels; i++) {
409 ch = &pl08x->phy_chans[i]; 380 ch = &pl08x->phy_chans[i];
410 381
@@ -465,11 +436,11 @@ static inline unsigned int pl08x_get_bytes_for_cctl(unsigned int coded)
465} 436}
466 437
467static inline u32 pl08x_cctl_bits(u32 cctl, u8 srcwidth, u8 dstwidth, 438static inline u32 pl08x_cctl_bits(u32 cctl, u8 srcwidth, u8 dstwidth,
468 u32 tsize) 439 size_t tsize)
469{ 440{
470 u32 retbits = cctl; 441 u32 retbits = cctl;
471 442
472 /* Remove all src, dst and transfersize bits */ 443 /* Remove all src, dst and transfer size bits */
473 retbits &= ~PL080_CONTROL_DWIDTH_MASK; 444 retbits &= ~PL080_CONTROL_DWIDTH_MASK;
474 retbits &= ~PL080_CONTROL_SWIDTH_MASK; 445 retbits &= ~PL080_CONTROL_SWIDTH_MASK;
475 retbits &= ~PL080_CONTROL_TRANSFER_SIZE_MASK; 446 retbits &= ~PL080_CONTROL_TRANSFER_SIZE_MASK;
@@ -509,95 +480,87 @@ static inline u32 pl08x_cctl_bits(u32 cctl, u8 srcwidth, u8 dstwidth,
509 return retbits; 480 return retbits;
510} 481}
511 482
483struct pl08x_lli_build_data {
484 struct pl08x_txd *txd;
485 struct pl08x_driver_data *pl08x;
486 struct pl08x_bus_data srcbus;
487 struct pl08x_bus_data dstbus;
488 size_t remainder;
489};
490
512/* 491/*
513 * Autoselect a master bus to use for the transfer 492 * Autoselect a master bus to use for the transfer this prefers the
514 * this prefers the destination bus if both available 493 * destination bus if both available if fixed address on one bus the
515 * if fixed address on one bus the other will be chosen 494 * other will be chosen
516 */ 495 */
517void pl08x_choose_master_bus(struct pl08x_bus_data *src_bus, 496static void pl08x_choose_master_bus(struct pl08x_lli_build_data *bd,
518 struct pl08x_bus_data *dst_bus, struct pl08x_bus_data **mbus, 497 struct pl08x_bus_data **mbus, struct pl08x_bus_data **sbus, u32 cctl)
519 struct pl08x_bus_data **sbus, u32 cctl)
520{ 498{
521 if (!(cctl & PL080_CONTROL_DST_INCR)) { 499 if (!(cctl & PL080_CONTROL_DST_INCR)) {
522 *mbus = src_bus; 500 *mbus = &bd->srcbus;
523 *sbus = dst_bus; 501 *sbus = &bd->dstbus;
524 } else if (!(cctl & PL080_CONTROL_SRC_INCR)) { 502 } else if (!(cctl & PL080_CONTROL_SRC_INCR)) {
525 *mbus = dst_bus; 503 *mbus = &bd->dstbus;
526 *sbus = src_bus; 504 *sbus = &bd->srcbus;
527 } else { 505 } else {
528 if (dst_bus->buswidth == 4) { 506 if (bd->dstbus.buswidth == 4) {
529 *mbus = dst_bus; 507 *mbus = &bd->dstbus;
530 *sbus = src_bus; 508 *sbus = &bd->srcbus;
531 } else if (src_bus->buswidth == 4) { 509 } else if (bd->srcbus.buswidth == 4) {
532 *mbus = src_bus; 510 *mbus = &bd->srcbus;
533 *sbus = dst_bus; 511 *sbus = &bd->dstbus;
534 } else if (dst_bus->buswidth == 2) { 512 } else if (bd->dstbus.buswidth == 2) {
535 *mbus = dst_bus; 513 *mbus = &bd->dstbus;
536 *sbus = src_bus; 514 *sbus = &bd->srcbus;
537 } else if (src_bus->buswidth == 2) { 515 } else if (bd->srcbus.buswidth == 2) {
538 *mbus = src_bus; 516 *mbus = &bd->srcbus;
539 *sbus = dst_bus; 517 *sbus = &bd->dstbus;
540 } else { 518 } else {
541 /* src_bus->buswidth == 1 */ 519 /* bd->srcbus.buswidth == 1 */
542 *mbus = dst_bus; 520 *mbus = &bd->dstbus;
543 *sbus = src_bus; 521 *sbus = &bd->srcbus;
544 } 522 }
545 } 523 }
546} 524}
547 525
548/* 526/*
549 * Fills in one LLI for a certain transfer descriptor 527 * Fills in one LLI for a certain transfer descriptor and advance the counter
550 * and advance the counter
551 */ 528 */
552int pl08x_fill_lli_for_desc(struct pl08x_driver_data *pl08x, 529static void pl08x_fill_lli_for_desc(struct pl08x_lli_build_data *bd,
553 struct pl08x_txd *txd, int num_llis, int len, 530 int num_llis, int len, u32 cctl)
554 u32 cctl, u32 *remainder)
555{ 531{
556 struct lli *llis_va = txd->llis_va; 532 struct pl08x_lli *llis_va = bd->txd->llis_va;
557 struct lli *llis_bus = (struct lli *) txd->llis_bus; 533 dma_addr_t llis_bus = bd->txd->llis_bus;
558 534
559 BUG_ON(num_llis >= MAX_NUM_TSFR_LLIS); 535 BUG_ON(num_llis >= MAX_NUM_TSFR_LLIS);
560 536
561 llis_va[num_llis].cctl = cctl; 537 llis_va[num_llis].cctl = cctl;
562 llis_va[num_llis].src = txd->srcbus.addr; 538 llis_va[num_llis].src = bd->srcbus.addr;
563 llis_va[num_llis].dst = txd->dstbus.addr; 539 llis_va[num_llis].dst = bd->dstbus.addr;
564 540 llis_va[num_llis].lli = llis_bus + (num_llis + 1) * sizeof(struct pl08x_lli);
565 /* 541 if (bd->pl08x->lli_buses & PL08X_AHB2)
566 * On versions with dual masters, you can optionally AND on 542 llis_va[num_llis].lli |= PL080_LLI_LM_AHB2;
567 * PL080_LLI_LM_AHB2 to the LLI to tell the hardware to read
568 * in new LLIs with that controller, but we always try to
569 * choose AHB1 to point into memory. The idea is to have AHB2
570 * fixed on the peripheral and AHB1 messing around in the
571 * memory. So we don't manipulate this bit currently.
572 */
573
574 llis_va[num_llis].next =
575 (dma_addr_t)((u32) &(llis_bus[num_llis + 1]));
576 543
577 if (cctl & PL080_CONTROL_SRC_INCR) 544 if (cctl & PL080_CONTROL_SRC_INCR)
578 txd->srcbus.addr += len; 545 bd->srcbus.addr += len;
579 if (cctl & PL080_CONTROL_DST_INCR) 546 if (cctl & PL080_CONTROL_DST_INCR)
580 txd->dstbus.addr += len; 547 bd->dstbus.addr += len;
581 548
582 *remainder -= len; 549 BUG_ON(bd->remainder < len);
583 550
584 return num_llis + 1; 551 bd->remainder -= len;
585} 552}
586 553
587/* 554/*
588 * Return number of bytes to fill to boundary, or len 555 * Return number of bytes to fill to boundary, or len.
556 * This calculation works for any value of addr.
589 */ 557 */
590static inline u32 pl08x_pre_boundary(u32 addr, u32 len) 558static inline size_t pl08x_pre_boundary(u32 addr, size_t len)
591{ 559{
592 u32 boundary; 560 size_t boundary_len = PL08X_BOUNDARY_SIZE -
593 561 (addr & (PL08X_BOUNDARY_SIZE - 1));
594 boundary = ((addr >> PL08X_BOUNDARY_SHIFT) + 1)
595 << PL08X_BOUNDARY_SHIFT;
596 562
597 if (boundary < addr + len) 563 return min(boundary_len, len);
598 return boundary - addr;
599 else
600 return len;
601} 564}
602 565
603/* 566/*
@@ -608,20 +571,13 @@ static inline u32 pl08x_pre_boundary(u32 addr, u32 len)
608static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, 571static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
609 struct pl08x_txd *txd) 572 struct pl08x_txd *txd)
610{ 573{
611 struct pl08x_channel_data *cd = txd->cd;
612 struct pl08x_bus_data *mbus, *sbus; 574 struct pl08x_bus_data *mbus, *sbus;
613 u32 remainder; 575 struct pl08x_lli_build_data bd;
614 int num_llis = 0; 576 int num_llis = 0;
615 u32 cctl; 577 u32 cctl;
616 int max_bytes_per_lli; 578 size_t max_bytes_per_lli;
617 int total_bytes = 0; 579 size_t total_bytes = 0;
618 struct lli *llis_va; 580 struct pl08x_lli *llis_va;
619 struct lli *llis_bus;
620
621 if (!txd) {
622 dev_err(&pl08x->adev->dev, "%s no descriptor\n", __func__);
623 return 0;
624 }
625 581
626 txd->llis_va = dma_pool_alloc(pl08x->pool, GFP_NOWAIT, 582 txd->llis_va = dma_pool_alloc(pl08x->pool, GFP_NOWAIT,
627 &txd->llis_bus); 583 &txd->llis_bus);
@@ -632,121 +588,79 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
632 588
633 pl08x->pool_ctr++; 589 pl08x->pool_ctr++;
634 590
635 /* 591 /* Get the default CCTL */
636 * Initialize bus values for this transfer 592 cctl = txd->cctl;
637 * from the passed optimal values
638 */
639 if (!cd) {
640 dev_err(&pl08x->adev->dev, "%s no channel data\n", __func__);
641 return 0;
642 }
643 593
644 /* Get the default CCTL from the platform data */ 594 bd.txd = txd;
645 cctl = cd->cctl; 595 bd.pl08x = pl08x;
646 596 bd.srcbus.addr = txd->src_addr;
647 /* 597 bd.dstbus.addr = txd->dst_addr;
648 * On the PL080 we have two bus masters and we
649 * should select one for source and one for
650 * destination. We try to use AHB2 for the
651 * bus which does not increment (typically the
652 * peripheral) else we just choose something.
653 */
654 cctl &= ~(PL080_CONTROL_DST_AHB2 | PL080_CONTROL_SRC_AHB2);
655 if (pl08x->vd->dualmaster) {
656 if (cctl & PL080_CONTROL_SRC_INCR)
657 /* Source increments, use AHB2 for destination */
658 cctl |= PL080_CONTROL_DST_AHB2;
659 else if (cctl & PL080_CONTROL_DST_INCR)
660 /* Destination increments, use AHB2 for source */
661 cctl |= PL080_CONTROL_SRC_AHB2;
662 else
663 /* Just pick something, source AHB1 dest AHB2 */
664 cctl |= PL080_CONTROL_DST_AHB2;
665 }
666 598
667 /* Find maximum width of the source bus */ 599 /* Find maximum width of the source bus */
668 txd->srcbus.maxwidth = 600 bd.srcbus.maxwidth =
669 pl08x_get_bytes_for_cctl((cctl & PL080_CONTROL_SWIDTH_MASK) >> 601 pl08x_get_bytes_for_cctl((cctl & PL080_CONTROL_SWIDTH_MASK) >>
670 PL080_CONTROL_SWIDTH_SHIFT); 602 PL080_CONTROL_SWIDTH_SHIFT);
671 603
672 /* Find maximum width of the destination bus */ 604 /* Find maximum width of the destination bus */
673 txd->dstbus.maxwidth = 605 bd.dstbus.maxwidth =
674 pl08x_get_bytes_for_cctl((cctl & PL080_CONTROL_DWIDTH_MASK) >> 606 pl08x_get_bytes_for_cctl((cctl & PL080_CONTROL_DWIDTH_MASK) >>
675 PL080_CONTROL_DWIDTH_SHIFT); 607 PL080_CONTROL_DWIDTH_SHIFT);
676 608
677 /* Set up the bus widths to the maximum */ 609 /* Set up the bus widths to the maximum */
678 txd->srcbus.buswidth = txd->srcbus.maxwidth; 610 bd.srcbus.buswidth = bd.srcbus.maxwidth;
679 txd->dstbus.buswidth = txd->dstbus.maxwidth; 611 bd.dstbus.buswidth = bd.dstbus.maxwidth;
680 dev_vdbg(&pl08x->adev->dev, 612 dev_vdbg(&pl08x->adev->dev,
681 "%s source bus is %d bytes wide, dest bus is %d bytes wide\n", 613 "%s source bus is %d bytes wide, dest bus is %d bytes wide\n",
682 __func__, txd->srcbus.buswidth, txd->dstbus.buswidth); 614 __func__, bd.srcbus.buswidth, bd.dstbus.buswidth);
683 615
684 616
685 /* 617 /*
686 * Bytes transferred == tsize * MIN(buswidths), not max(buswidths) 618 * Bytes transferred == tsize * MIN(buswidths), not max(buswidths)
687 */ 619 */
688 max_bytes_per_lli = min(txd->srcbus.buswidth, txd->dstbus.buswidth) * 620 max_bytes_per_lli = min(bd.srcbus.buswidth, bd.dstbus.buswidth) *
689 PL080_CONTROL_TRANSFER_SIZE_MASK; 621 PL080_CONTROL_TRANSFER_SIZE_MASK;
690 dev_vdbg(&pl08x->adev->dev, 622 dev_vdbg(&pl08x->adev->dev,
691 "%s max bytes per lli = %d\n", 623 "%s max bytes per lli = %zu\n",
692 __func__, max_bytes_per_lli); 624 __func__, max_bytes_per_lli);
693 625
694 /* We need to count this down to zero */ 626 /* We need to count this down to zero */
695 remainder = txd->len; 627 bd.remainder = txd->len;
696 dev_vdbg(&pl08x->adev->dev, 628 dev_vdbg(&pl08x->adev->dev,
697 "%s remainder = %d\n", 629 "%s remainder = %zu\n",
698 __func__, remainder); 630 __func__, bd.remainder);
699 631
700 /* 632 /*
701 * Choose bus to align to 633 * Choose bus to align to
702 * - prefers destination bus if both available 634 * - prefers destination bus if both available
703 * - if fixed address on one bus chooses other 635 * - if fixed address on one bus chooses other
704 * - modifies cctl to choose an apropriate master
705 */
706 pl08x_choose_master_bus(&txd->srcbus, &txd->dstbus,
707 &mbus, &sbus, cctl);
708
709
710 /*
711 * The lowest bit of the LLI register
712 * is also used to indicate which master to
713 * use for reading the LLIs.
714 */ 636 */
637 pl08x_choose_master_bus(&bd, &mbus, &sbus, cctl);
715 638
716 if (txd->len < mbus->buswidth) { 639 if (txd->len < mbus->buswidth) {
717 /* 640 /* Less than a bus width available - send as single bytes */
718 * Less than a bus width available 641 while (bd.remainder) {
719 * - send as single bytes
720 */
721 while (remainder) {
722 dev_vdbg(&pl08x->adev->dev, 642 dev_vdbg(&pl08x->adev->dev,
723 "%s single byte LLIs for a transfer of " 643 "%s single byte LLIs for a transfer of "
724 "less than a bus width (remain %08x)\n", 644 "less than a bus width (remain 0x%08x)\n",
725 __func__, remainder); 645 __func__, bd.remainder);
726 cctl = pl08x_cctl_bits(cctl, 1, 1, 1); 646 cctl = pl08x_cctl_bits(cctl, 1, 1, 1);
727 num_llis = 647 pl08x_fill_lli_for_desc(&bd, num_llis++, 1, cctl);
728 pl08x_fill_lli_for_desc(pl08x, txd, num_llis, 1,
729 cctl, &remainder);
730 total_bytes++; 648 total_bytes++;
731 } 649 }
732 } else { 650 } else {
733 /* 651 /* Make one byte LLIs until master bus is aligned */
734 * Make one byte LLIs until master bus is aligned
735 * - slave will then be aligned also
736 */
737 while ((mbus->addr) % (mbus->buswidth)) { 652 while ((mbus->addr) % (mbus->buswidth)) {
738 dev_vdbg(&pl08x->adev->dev, 653 dev_vdbg(&pl08x->adev->dev,
739 "%s adjustment lli for less than bus width " 654 "%s adjustment lli for less than bus width "
740 "(remain %08x)\n", 655 "(remain 0x%08x)\n",
741 __func__, remainder); 656 __func__, bd.remainder);
742 cctl = pl08x_cctl_bits(cctl, 1, 1, 1); 657 cctl = pl08x_cctl_bits(cctl, 1, 1, 1);
743 num_llis = pl08x_fill_lli_for_desc 658 pl08x_fill_lli_for_desc(&bd, num_llis++, 1, cctl);
744 (pl08x, txd, num_llis, 1, cctl, &remainder);
745 total_bytes++; 659 total_bytes++;
746 } 660 }
747 661
748 /* 662 /*
749 * Master now aligned 663 * Master now aligned
750 * - if slave is not then we must set its width down 664 * - if slave is not then we must set its width down
751 */ 665 */
752 if (sbus->addr % sbus->buswidth) { 666 if (sbus->addr % sbus->buswidth) {
@@ -761,63 +675,51 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
761 * Make largest possible LLIs until less than one bus 675 * Make largest possible LLIs until less than one bus
762 * width left 676 * width left
763 */ 677 */
764 while (remainder > (mbus->buswidth - 1)) { 678 while (bd.remainder > (mbus->buswidth - 1)) {
765 int lli_len, target_len; 679 size_t lli_len, target_len, tsize, odd_bytes;
766 int tsize;
767 int odd_bytes;
768 680
769 /* 681 /*
770 * If enough left try to send max possible, 682 * If enough left try to send max possible,
771 * otherwise try to send the remainder 683 * otherwise try to send the remainder
772 */ 684 */
773 target_len = remainder; 685 target_len = min(bd.remainder, max_bytes_per_lli);
774 if (remainder > max_bytes_per_lli)
775 target_len = max_bytes_per_lli;
776 686
777 /* 687 /*
778 * Set bus lengths for incrementing busses 688 * Set bus lengths for incrementing buses to the
779 * to number of bytes which fill to next memory 689 * number of bytes which fill to next memory boundary,
780 * boundary 690 * limiting on the target length calculated above.
781 */ 691 */
782 if (cctl & PL080_CONTROL_SRC_INCR) 692 if (cctl & PL080_CONTROL_SRC_INCR)
783 txd->srcbus.fill_bytes = 693 bd.srcbus.fill_bytes =
784 pl08x_pre_boundary( 694 pl08x_pre_boundary(bd.srcbus.addr,
785 txd->srcbus.addr, 695 target_len);
786 remainder);
787 else 696 else
788 txd->srcbus.fill_bytes = 697 bd.srcbus.fill_bytes = target_len;
789 max_bytes_per_lli;
790 698
791 if (cctl & PL080_CONTROL_DST_INCR) 699 if (cctl & PL080_CONTROL_DST_INCR)
792 txd->dstbus.fill_bytes = 700 bd.dstbus.fill_bytes =
793 pl08x_pre_boundary( 701 pl08x_pre_boundary(bd.dstbus.addr,
794 txd->dstbus.addr, 702 target_len);
795 remainder);
796 else 703 else
797 txd->dstbus.fill_bytes = 704 bd.dstbus.fill_bytes = target_len;
798 max_bytes_per_lli;
799 705
800 /* 706 /* Find the nearest */
801 * Find the nearest 707 lli_len = min(bd.srcbus.fill_bytes,
802 */ 708 bd.dstbus.fill_bytes);
803 lli_len = min(txd->srcbus.fill_bytes,
804 txd->dstbus.fill_bytes);
805 709
806 BUG_ON(lli_len > remainder); 710 BUG_ON(lli_len > bd.remainder);
807 711
808 if (lli_len <= 0) { 712 if (lli_len <= 0) {
809 dev_err(&pl08x->adev->dev, 713 dev_err(&pl08x->adev->dev,
810 "%s lli_len is %d, <= 0\n", 714 "%s lli_len is %zu, <= 0\n",
811 __func__, lli_len); 715 __func__, lli_len);
812 return 0; 716 return 0;
813 } 717 }
814 718
815 if (lli_len == target_len) { 719 if (lli_len == target_len) {
816 /* 720 /*
817 * Can send what we wanted 721 * Can send what we wanted.
818 */ 722 * Maintain alignment
819 /*
820 * Maintain alignment
821 */ 723 */
822 lli_len = (lli_len/mbus->buswidth) * 724 lli_len = (lli_len/mbus->buswidth) *
823 mbus->buswidth; 725 mbus->buswidth;
@@ -825,17 +727,14 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
825 } else { 727 } else {
826 /* 728 /*
827 * So now we know how many bytes to transfer 729 * So now we know how many bytes to transfer
828 * to get to the nearest boundary 730 * to get to the nearest boundary. The next
829 * The next lli will past the boundary 731 * LLI will past the boundary. However, we
830 * - however we may be working to a boundary 732 * may be working to a boundary on the slave
831 * on the slave bus 733 * bus. We need to ensure the master stays
832 * We need to ensure the master stays aligned 734 * aligned, and that we are working in
735 * multiples of the bus widths.
833 */ 736 */
834 odd_bytes = lli_len % mbus->buswidth; 737 odd_bytes = lli_len % mbus->buswidth;
835 /*
836 * - and that we are working in multiples
837 * of the bus widths
838 */
839 lli_len -= odd_bytes; 738 lli_len -= odd_bytes;
840 739
841 } 740 }
@@ -855,41 +754,38 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
855 754
856 if (target_len != lli_len) { 755 if (target_len != lli_len) {
857 dev_vdbg(&pl08x->adev->dev, 756 dev_vdbg(&pl08x->adev->dev,
858 "%s can't send what we want. Desired %08x, lli of %08x bytes in txd of %08x\n", 757 "%s can't send what we want. Desired 0x%08zx, lli of 0x%08zx bytes in txd of 0x%08zx\n",
859 __func__, target_len, lli_len, txd->len); 758 __func__, target_len, lli_len, txd->len);
860 } 759 }
861 760
862 cctl = pl08x_cctl_bits(cctl, 761 cctl = pl08x_cctl_bits(cctl,
863 txd->srcbus.buswidth, 762 bd.srcbus.buswidth,
864 txd->dstbus.buswidth, 763 bd.dstbus.buswidth,
865 tsize); 764 tsize);
866 765
867 dev_vdbg(&pl08x->adev->dev, 766 dev_vdbg(&pl08x->adev->dev,
868 "%s fill lli with single lli chunk of size %08x (remainder %08x)\n", 767 "%s fill lli with single lli chunk of size 0x%08zx (remainder 0x%08zx)\n",
869 __func__, lli_len, remainder); 768 __func__, lli_len, bd.remainder);
870 num_llis = pl08x_fill_lli_for_desc(pl08x, txd, 769 pl08x_fill_lli_for_desc(&bd, num_llis++,
871 num_llis, lli_len, cctl, 770 lli_len, cctl);
872 &remainder);
873 total_bytes += lli_len; 771 total_bytes += lli_len;
874 } 772 }
875 773
876 774
877 if (odd_bytes) { 775 if (odd_bytes) {
878 /* 776 /*
879 * Creep past the boundary, 777 * Creep past the boundary, maintaining
880 * maintaining master alignment 778 * master alignment
881 */ 779 */
882 int j; 780 int j;
883 for (j = 0; (j < mbus->buswidth) 781 for (j = 0; (j < mbus->buswidth)
884 && (remainder); j++) { 782 && (bd.remainder); j++) {
885 cctl = pl08x_cctl_bits(cctl, 1, 1, 1); 783 cctl = pl08x_cctl_bits(cctl, 1, 1, 1);
886 dev_vdbg(&pl08x->adev->dev, 784 dev_vdbg(&pl08x->adev->dev,
887 "%s align with boundardy, single byte (remain %08x)\n", 785 "%s align with boundary, single byte (remain 0x%08zx)\n",
888 __func__, remainder); 786 __func__, bd.remainder);
889 num_llis = 787 pl08x_fill_lli_for_desc(&bd,
890 pl08x_fill_lli_for_desc(pl08x, 788 num_llis++, 1, cctl);
891 txd, num_llis, 1,
892 cctl, &remainder);
893 total_bytes++; 789 total_bytes++;
894 } 790 }
895 } 791 }
@@ -898,25 +794,18 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
898 /* 794 /*
899 * Send any odd bytes 795 * Send any odd bytes
900 */ 796 */
901 if (remainder < 0) { 797 while (bd.remainder) {
902 dev_err(&pl08x->adev->dev, "%s remainder not fitted 0x%08x bytes\n",
903 __func__, remainder);
904 return 0;
905 }
906
907 while (remainder) {
908 cctl = pl08x_cctl_bits(cctl, 1, 1, 1); 798 cctl = pl08x_cctl_bits(cctl, 1, 1, 1);
909 dev_vdbg(&pl08x->adev->dev, 799 dev_vdbg(&pl08x->adev->dev,
910 "%s align with boundardy, single odd byte (remain %d)\n", 800 "%s align with boundary, single odd byte (remain %zu)\n",
911 __func__, remainder); 801 __func__, bd.remainder);
912 num_llis = pl08x_fill_lli_for_desc(pl08x, txd, num_llis, 802 pl08x_fill_lli_for_desc(&bd, num_llis++, 1, cctl);
913 1, cctl, &remainder);
914 total_bytes++; 803 total_bytes++;
915 } 804 }
916 } 805 }
917 if (total_bytes != txd->len) { 806 if (total_bytes != txd->len) {
918 dev_err(&pl08x->adev->dev, 807 dev_err(&pl08x->adev->dev,
919 "%s size of encoded lli:s don't match total txd, transferred 0x%08x from size 0x%08x\n", 808 "%s size of encoded lli:s don't match total txd, transferred 0x%08zx from size 0x%08zx\n",
920 __func__, total_bytes, txd->len); 809 __func__, total_bytes, txd->len);
921 return 0; 810 return 0;
922 } 811 }
@@ -927,41 +816,12 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
927 __func__, (u32) MAX_NUM_TSFR_LLIS); 816 __func__, (u32) MAX_NUM_TSFR_LLIS);
928 return 0; 817 return 0;
929 } 818 }
930 /*
931 * Decide whether this is a loop or a terminated transfer
932 */
933 llis_va = txd->llis_va;
934 llis_bus = (struct lli *) txd->llis_bus;
935 819
936 if (cd->circular_buffer) { 820 llis_va = txd->llis_va;
937 /* 821 /* The final LLI terminates the LLI. */
938 * Loop the circular buffer so that the next element 822 llis_va[num_llis - 1].lli = 0;
939 * points back to the beginning of the LLI. 823 /* The final LLI element shall also fire an interrupt. */
940 */ 824 llis_va[num_llis - 1].cctl |= PL080_CONTROL_TC_IRQ_EN;
941 llis_va[num_llis - 1].next =
942 (dma_addr_t)((unsigned int)&(llis_bus[0]));
943 } else {
944 /*
945 * On non-circular buffers, the final LLI terminates
946 * the LLI.
947 */
948 llis_va[num_llis - 1].next = 0;
949 /*
950 * The final LLI element shall also fire an interrupt
951 */
952 llis_va[num_llis - 1].cctl |= PL080_CONTROL_TC_IRQ_EN;
953 }
954
955 /* Now store the channel register values */
956 txd->csrc = llis_va[0].src;
957 txd->cdst = llis_va[0].dst;
958 if (num_llis > 1)
959 txd->clli = llis_va[0].next;
960 else
961 txd->clli = 0;
962
963 txd->cctl = llis_va[0].cctl;
964 /* ccfg will be set at physical channel allocation time */
965 825
966#ifdef VERBOSE_DEBUG 826#ifdef VERBOSE_DEBUG
967 { 827 {
@@ -969,13 +829,13 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
969 829
970 for (i = 0; i < num_llis; i++) { 830 for (i = 0; i < num_llis; i++) {
971 dev_vdbg(&pl08x->adev->dev, 831 dev_vdbg(&pl08x->adev->dev,
972 "lli %d @%p: csrc=%08x, cdst=%08x, cctl=%08x, clli=%08x\n", 832 "lli %d @%p: csrc=0x%08x, cdst=0x%08x, cctl=0x%08x, clli=0x%08x\n",
973 i, 833 i,
974 &llis_va[i], 834 &llis_va[i],
975 llis_va[i].src, 835 llis_va[i].src,
976 llis_va[i].dst, 836 llis_va[i].dst,
977 llis_va[i].cctl, 837 llis_va[i].cctl,
978 llis_va[i].next 838 llis_va[i].lli
979 ); 839 );
980 } 840 }
981 } 841 }
@@ -988,14 +848,8 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
988static void pl08x_free_txd(struct pl08x_driver_data *pl08x, 848static void pl08x_free_txd(struct pl08x_driver_data *pl08x,
989 struct pl08x_txd *txd) 849 struct pl08x_txd *txd)
990{ 850{
991 if (!txd)
992 dev_err(&pl08x->adev->dev,
993 "%s no descriptor to free\n",
994 __func__);
995
996 /* Free the LLI */ 851 /* Free the LLI */
997 dma_pool_free(pl08x->pool, txd->llis_va, 852 dma_pool_free(pl08x->pool, txd->llis_va, txd->llis_bus);
998 txd->llis_bus);
999 853
1000 pl08x->pool_ctr--; 854 pl08x->pool_ctr--;
1001 855
@@ -1008,13 +862,12 @@ static void pl08x_free_txd_list(struct pl08x_driver_data *pl08x,
1008 struct pl08x_txd *txdi = NULL; 862 struct pl08x_txd *txdi = NULL;
1009 struct pl08x_txd *next; 863 struct pl08x_txd *next;
1010 864
1011 if (!list_empty(&plchan->desc_list)) { 865 if (!list_empty(&plchan->pend_list)) {
1012 list_for_each_entry_safe(txdi, 866 list_for_each_entry_safe(txdi,
1013 next, &plchan->desc_list, node) { 867 next, &plchan->pend_list, node) {
1014 list_del(&txdi->node); 868 list_del(&txdi->node);
1015 pl08x_free_txd(pl08x, txdi); 869 pl08x_free_txd(pl08x, txdi);
1016 } 870 }
1017
1018 } 871 }
1019} 872}
1020 873
@@ -1069,6 +922,12 @@ static int prep_phy_channel(struct pl08x_dma_chan *plchan,
1069 return -EBUSY; 922 return -EBUSY;
1070 } 923 }
1071 ch->signal = ret; 924 ch->signal = ret;
925
926 /* Assign the flow control signal to this channel */
927 if (txd->direction == DMA_TO_DEVICE)
928 txd->ccfg |= ch->signal << PL080_CONFIG_DST_SEL_SHIFT;
929 else if (txd->direction == DMA_FROM_DEVICE)
930 txd->ccfg |= ch->signal << PL080_CONFIG_SRC_SEL_SHIFT;
1072 } 931 }
1073 932
1074 dev_dbg(&pl08x->adev->dev, "allocated physical channel %d and signal %d for xfer on %s\n", 933 dev_dbg(&pl08x->adev->dev, "allocated physical channel %d and signal %d for xfer on %s\n",
@@ -1076,19 +935,54 @@ static int prep_phy_channel(struct pl08x_dma_chan *plchan,
1076 ch->signal, 935 ch->signal,
1077 plchan->name); 936 plchan->name);
1078 937
938 plchan->phychan_hold++;
1079 plchan->phychan = ch; 939 plchan->phychan = ch;
1080 940
1081 return 0; 941 return 0;
1082} 942}
1083 943
944static void release_phy_channel(struct pl08x_dma_chan *plchan)
945{
946 struct pl08x_driver_data *pl08x = plchan->host;
947
948 if ((plchan->phychan->signal >= 0) && pl08x->pd->put_signal) {
949 pl08x->pd->put_signal(plchan);
950 plchan->phychan->signal = -1;
951 }
952 pl08x_put_phy_channel(pl08x, plchan->phychan);
953 plchan->phychan = NULL;
954}
955
1084static dma_cookie_t pl08x_tx_submit(struct dma_async_tx_descriptor *tx) 956static dma_cookie_t pl08x_tx_submit(struct dma_async_tx_descriptor *tx)
1085{ 957{
1086 struct pl08x_dma_chan *plchan = to_pl08x_chan(tx->chan); 958 struct pl08x_dma_chan *plchan = to_pl08x_chan(tx->chan);
959 struct pl08x_txd *txd = to_pl08x_txd(tx);
960 unsigned long flags;
1087 961
1088 atomic_inc(&plchan->last_issued); 962 spin_lock_irqsave(&plchan->lock, flags);
1089 tx->cookie = atomic_read(&plchan->last_issued); 963
1090 /* This unlock follows the lock in the prep() function */ 964 plchan->chan.cookie += 1;
1091 spin_unlock_irqrestore(&plchan->lock, plchan->lockflags); 965 if (plchan->chan.cookie < 0)
966 plchan->chan.cookie = 1;
967 tx->cookie = plchan->chan.cookie;
968
969 /* Put this onto the pending list */
970 list_add_tail(&txd->node, &plchan->pend_list);
971
972 /*
973 * If there was no physical channel available for this memcpy,
974 * stack the request up and indicate that the channel is waiting
975 * for a free physical channel.
976 */
977 if (!plchan->slave && !plchan->phychan) {
978 /* Do this memcpy whenever there is a channel ready */
979 plchan->state = PL08X_CHAN_WAITING;
980 plchan->waiting = txd;
981 } else {
982 plchan->phychan_hold--;
983 }
984
985 spin_unlock_irqrestore(&plchan->lock, flags);
1092 986
1093 return tx->cookie; 987 return tx->cookie;
1094} 988}
@@ -1102,10 +996,9 @@ static struct dma_async_tx_descriptor *pl08x_prep_dma_interrupt(
1102} 996}
1103 997
1104/* 998/*
1105 * Code accessing dma_async_is_complete() in a tight loop 999 * Code accessing dma_async_is_complete() in a tight loop may give problems.
1106 * may give problems - could schedule where indicated. 1000 * If slaves are relying on interrupts to signal completion this function
1107 * If slaves are relying on interrupts to signal completion this 1001 * must not be called with interrupts disabled.
1108 * function must not be called with interrupts disabled
1109 */ 1002 */
1110static enum dma_status 1003static enum dma_status
1111pl08x_dma_tx_status(struct dma_chan *chan, 1004pl08x_dma_tx_status(struct dma_chan *chan,
@@ -1118,7 +1011,7 @@ pl08x_dma_tx_status(struct dma_chan *chan,
1118 enum dma_status ret; 1011 enum dma_status ret;
1119 u32 bytesleft = 0; 1012 u32 bytesleft = 0;
1120 1013
1121 last_used = atomic_read(&plchan->last_issued); 1014 last_used = plchan->chan.cookie;
1122 last_complete = plchan->lc; 1015 last_complete = plchan->lc;
1123 1016
1124 ret = dma_async_is_complete(cookie, last_complete, last_used); 1017 ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -1128,13 +1021,9 @@ pl08x_dma_tx_status(struct dma_chan *chan,
1128 } 1021 }
1129 1022
1130 /* 1023 /*
1131 * schedule(); could be inserted here
1132 */
1133
1134 /*
1135 * This cookie not complete yet 1024 * This cookie not complete yet
1136 */ 1025 */
1137 last_used = atomic_read(&plchan->last_issued); 1026 last_used = plchan->chan.cookie;
1138 last_complete = plchan->lc; 1027 last_complete = plchan->lc;
1139 1028
1140 /* Get number of bytes left in the active transactions and queue */ 1029 /* Get number of bytes left in the active transactions and queue */
@@ -1199,37 +1088,35 @@ static const struct burst_table burst_sizes[] = {
1199 }, 1088 },
1200}; 1089};
1201 1090
1202static void dma_set_runtime_config(struct dma_chan *chan, 1091static int dma_set_runtime_config(struct dma_chan *chan,
1203 struct dma_slave_config *config) 1092 struct dma_slave_config *config)
1204{ 1093{
1205 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); 1094 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1206 struct pl08x_driver_data *pl08x = plchan->host; 1095 struct pl08x_driver_data *pl08x = plchan->host;
1207 struct pl08x_channel_data *cd = plchan->cd; 1096 struct pl08x_channel_data *cd = plchan->cd;
1208 enum dma_slave_buswidth addr_width; 1097 enum dma_slave_buswidth addr_width;
1098 dma_addr_t addr;
1209 u32 maxburst; 1099 u32 maxburst;
1210 u32 cctl = 0; 1100 u32 cctl = 0;
1211 /* Mask out all except src and dst channel */ 1101 int i;
1212 u32 ccfg = cd->ccfg & 0x000003DEU; 1102
1213 int i = 0; 1103 if (!plchan->slave)
1104 return -EINVAL;
1214 1105
1215 /* Transfer direction */ 1106 /* Transfer direction */
1216 plchan->runtime_direction = config->direction; 1107 plchan->runtime_direction = config->direction;
1217 if (config->direction == DMA_TO_DEVICE) { 1108 if (config->direction == DMA_TO_DEVICE) {
1218 plchan->runtime_addr = config->dst_addr; 1109 addr = config->dst_addr;
1219 cctl |= PL080_CONTROL_SRC_INCR;
1220 ccfg |= PL080_FLOW_MEM2PER << PL080_CONFIG_FLOW_CONTROL_SHIFT;
1221 addr_width = config->dst_addr_width; 1110 addr_width = config->dst_addr_width;
1222 maxburst = config->dst_maxburst; 1111 maxburst = config->dst_maxburst;
1223 } else if (config->direction == DMA_FROM_DEVICE) { 1112 } else if (config->direction == DMA_FROM_DEVICE) {
1224 plchan->runtime_addr = config->src_addr; 1113 addr = config->src_addr;
1225 cctl |= PL080_CONTROL_DST_INCR;
1226 ccfg |= PL080_FLOW_PER2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT;
1227 addr_width = config->src_addr_width; 1114 addr_width = config->src_addr_width;
1228 maxburst = config->src_maxburst; 1115 maxburst = config->src_maxburst;
1229 } else { 1116 } else {
1230 dev_err(&pl08x->adev->dev, 1117 dev_err(&pl08x->adev->dev,
1231 "bad runtime_config: alien transfer direction\n"); 1118 "bad runtime_config: alien transfer direction\n");
1232 return; 1119 return -EINVAL;
1233 } 1120 }
1234 1121
1235 switch (addr_width) { 1122 switch (addr_width) {
@@ -1248,42 +1135,40 @@ static void dma_set_runtime_config(struct dma_chan *chan,
1248 default: 1135 default:
1249 dev_err(&pl08x->adev->dev, 1136 dev_err(&pl08x->adev->dev,
1250 "bad runtime_config: alien address width\n"); 1137 "bad runtime_config: alien address width\n");
1251 return; 1138 return -EINVAL;
1252 } 1139 }
1253 1140
1254 /* 1141 /*
1255 * Now decide on a maxburst: 1142 * Now decide on a maxburst:
1256 * If this channel will only request single transfers, set 1143 * If this channel will only request single transfers, set this
1257 * this down to ONE element. 1144 * down to ONE element. Also select one element if no maxburst
1145 * is specified.
1258 */ 1146 */
1259 if (plchan->cd->single) { 1147 if (plchan->cd->single || maxburst == 0) {
1260 cctl |= (PL080_BSIZE_1 << PL080_CONTROL_SB_SIZE_SHIFT) | 1148 cctl |= (PL080_BSIZE_1 << PL080_CONTROL_SB_SIZE_SHIFT) |
1261 (PL080_BSIZE_1 << PL080_CONTROL_DB_SIZE_SHIFT); 1149 (PL080_BSIZE_1 << PL080_CONTROL_DB_SIZE_SHIFT);
1262 } else { 1150 } else {
1263 while (i < ARRAY_SIZE(burst_sizes)) { 1151 for (i = 0; i < ARRAY_SIZE(burst_sizes); i++)
1264 if (burst_sizes[i].burstwords <= maxburst) 1152 if (burst_sizes[i].burstwords <= maxburst)
1265 break; 1153 break;
1266 i++;
1267 }
1268 cctl |= burst_sizes[i].reg; 1154 cctl |= burst_sizes[i].reg;
1269 } 1155 }
1270 1156
1271 /* Access the cell in privileged mode, non-bufferable, non-cacheable */ 1157 plchan->runtime_addr = addr;
1272 cctl &= ~PL080_CONTROL_PROT_MASK;
1273 cctl |= PL080_CONTROL_PROT_SYS;
1274 1158
1275 /* Modify the default channel data to fit PrimeCell request */ 1159 /* Modify the default channel data to fit PrimeCell request */
1276 cd->cctl = cctl; 1160 cd->cctl = cctl;
1277 cd->ccfg = ccfg;
1278 1161
1279 dev_dbg(&pl08x->adev->dev, 1162 dev_dbg(&pl08x->adev->dev,
1280 "configured channel %s (%s) for %s, data width %d, " 1163 "configured channel %s (%s) for %s, data width %d, "
1281 "maxburst %d words, LE, CCTL=%08x, CCFG=%08x\n", 1164 "maxburst %d words, LE, CCTL=0x%08x\n",
1282 dma_chan_name(chan), plchan->name, 1165 dma_chan_name(chan), plchan->name,
1283 (config->direction == DMA_FROM_DEVICE) ? "RX" : "TX", 1166 (config->direction == DMA_FROM_DEVICE) ? "RX" : "TX",
1284 addr_width, 1167 addr_width,
1285 maxburst, 1168 maxburst,
1286 cctl, ccfg); 1169 cctl);
1170
1171 return 0;
1287} 1172}
1288 1173
1289/* 1174/*
@@ -1293,35 +1178,26 @@ static void dma_set_runtime_config(struct dma_chan *chan,
1293static void pl08x_issue_pending(struct dma_chan *chan) 1178static void pl08x_issue_pending(struct dma_chan *chan)
1294{ 1179{
1295 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); 1180 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1296 struct pl08x_driver_data *pl08x = plchan->host;
1297 unsigned long flags; 1181 unsigned long flags;
1298 1182
1299 spin_lock_irqsave(&plchan->lock, flags); 1183 spin_lock_irqsave(&plchan->lock, flags);
1300 /* Something is already active */ 1184 /* Something is already active, or we're waiting for a channel... */
1301 if (plchan->at) { 1185 if (plchan->at || plchan->state == PL08X_CHAN_WAITING) {
1302 spin_unlock_irqrestore(&plchan->lock, flags); 1186 spin_unlock_irqrestore(&plchan->lock, flags);
1303 return;
1304 }
1305
1306 /* Didn't get a physical channel so waiting for it ... */
1307 if (plchan->state == PL08X_CHAN_WAITING)
1308 return; 1187 return;
1188 }
1309 1189
1310 /* Take the first element in the queue and execute it */ 1190 /* Take the first element in the queue and execute it */
1311 if (!list_empty(&plchan->desc_list)) { 1191 if (!list_empty(&plchan->pend_list)) {
1312 struct pl08x_txd *next; 1192 struct pl08x_txd *next;
1313 1193
1314 next = list_first_entry(&plchan->desc_list, 1194 next = list_first_entry(&plchan->pend_list,
1315 struct pl08x_txd, 1195 struct pl08x_txd,
1316 node); 1196 node);
1317 list_del(&next->node); 1197 list_del(&next->node);
1318 plchan->at = next;
1319 plchan->state = PL08X_CHAN_RUNNING; 1198 plchan->state = PL08X_CHAN_RUNNING;
1320 1199
1321 /* Configure the physical channel for the active txd */ 1200 pl08x_start_txd(plchan, next);
1322 pl08x_config_phychan_for_txd(plchan);
1323 pl08x_set_cregs(pl08x, plchan->phychan);
1324 pl08x_enable_phy_chan(pl08x, plchan->phychan);
1325 } 1201 }
1326 1202
1327 spin_unlock_irqrestore(&plchan->lock, flags); 1203 spin_unlock_irqrestore(&plchan->lock, flags);
@@ -1330,30 +1206,17 @@ static void pl08x_issue_pending(struct dma_chan *chan)
1330static int pl08x_prep_channel_resources(struct pl08x_dma_chan *plchan, 1206static int pl08x_prep_channel_resources(struct pl08x_dma_chan *plchan,
1331 struct pl08x_txd *txd) 1207 struct pl08x_txd *txd)
1332{ 1208{
1333 int num_llis;
1334 struct pl08x_driver_data *pl08x = plchan->host; 1209 struct pl08x_driver_data *pl08x = plchan->host;
1335 int ret; 1210 unsigned long flags;
1211 int num_llis, ret;
1336 1212
1337 num_llis = pl08x_fill_llis_for_desc(pl08x, txd); 1213 num_llis = pl08x_fill_llis_for_desc(pl08x, txd);
1338 1214 if (!num_llis) {
1339 if (!num_llis) 1215 kfree(txd);
1340 return -EINVAL; 1216 return -EINVAL;
1217 }
1341 1218
1342 spin_lock_irqsave(&plchan->lock, plchan->lockflags); 1219 spin_lock_irqsave(&plchan->lock, flags);
1343
1344 /*
1345 * If this device is not using a circular buffer then
1346 * queue this new descriptor for transfer.
1347 * The descriptor for a circular buffer continues
1348 * to be used until the channel is freed.
1349 */
1350 if (txd->cd->circular_buffer)
1351 dev_err(&pl08x->adev->dev,
1352 "%s attempting to queue a circular buffer\n",
1353 __func__);
1354 else
1355 list_add_tail(&txd->node,
1356 &plchan->desc_list);
1357 1220
1358 /* 1221 /*
1359 * See if we already have a physical channel allocated, 1222 * See if we already have a physical channel allocated,
@@ -1362,45 +1225,74 @@ static int pl08x_prep_channel_resources(struct pl08x_dma_chan *plchan,
1362 ret = prep_phy_channel(plchan, txd); 1225 ret = prep_phy_channel(plchan, txd);
1363 if (ret) { 1226 if (ret) {
1364 /* 1227 /*
1365 * No physical channel available, we will 1228 * No physical channel was available.
1366 * stack up the memcpy channels until there is a channel 1229 *
1367 * available to handle it whereas slave transfers may 1230 * memcpy transfers can be sorted out at submission time.
1368 * have been denied due to platform channel muxing restrictions 1231 *
1369 * and since there is no guarantee that this will ever be 1232 * Slave transfers may have been denied due to platform
1370 * resolved, and since the signal must be aquired AFTER 1233 * channel muxing restrictions. Since there is no guarantee
1371 * aquiring the physical channel, we will let them be NACK:ed 1234 * that this will ever be resolved, and the signal must be
1372 * with -EBUSY here. The drivers can alway retry the prep() 1235 * acquired AFTER acquiring the physical channel, we will let
1373 * call if they are eager on doing this using DMA. 1236 * them be NACK:ed with -EBUSY here. The drivers can retry
1237 * the prep() call if they are eager on doing this using DMA.
1374 */ 1238 */
1375 if (plchan->slave) { 1239 if (plchan->slave) {
1376 pl08x_free_txd_list(pl08x, plchan); 1240 pl08x_free_txd_list(pl08x, plchan);
1377 spin_unlock_irqrestore(&plchan->lock, plchan->lockflags); 1241 pl08x_free_txd(pl08x, txd);
1242 spin_unlock_irqrestore(&plchan->lock, flags);
1378 return -EBUSY; 1243 return -EBUSY;
1379 } 1244 }
1380 /* Do this memcpy whenever there is a channel ready */
1381 plchan->state = PL08X_CHAN_WAITING;
1382 plchan->waiting = txd;
1383 } else 1245 } else
1384 /* 1246 /*
1385 * Else we're all set, paused and ready to roll, 1247 * Else we're all set, paused and ready to roll, status
1386 * status will switch to PL08X_CHAN_RUNNING when 1248 * will switch to PL08X_CHAN_RUNNING when we call
1387 * we call issue_pending(). If there is something 1249 * issue_pending(). If there is something running on the
1388 * running on the channel already we don't change 1250 * channel already we don't change its state.
1389 * its state.
1390 */ 1251 */
1391 if (plchan->state == PL08X_CHAN_IDLE) 1252 if (plchan->state == PL08X_CHAN_IDLE)
1392 plchan->state = PL08X_CHAN_PAUSED; 1253 plchan->state = PL08X_CHAN_PAUSED;
1393 1254
1394 /* 1255 spin_unlock_irqrestore(&plchan->lock, flags);
1395 * Notice that we leave plchan->lock locked on purpose:
1396 * it will be unlocked in the subsequent tx_submit()
1397 * call. This is a consequence of the current API.
1398 */
1399 1256
1400 return 0; 1257 return 0;
1401} 1258}
1402 1259
1403/* 1260/*
1261 * Given the source and destination available bus masks, select which
1262 * will be routed to each port. We try to have source and destination
1263 * on separate ports, but always respect the allowable settings.
1264 */
1265static u32 pl08x_select_bus(struct pl08x_driver_data *pl08x, u8 src, u8 dst)
1266{
1267 u32 cctl = 0;
1268
1269 if (!(dst & PL08X_AHB1) || ((dst & PL08X_AHB2) && (src & PL08X_AHB1)))
1270 cctl |= PL080_CONTROL_DST_AHB2;
1271 if (!(src & PL08X_AHB1) || ((src & PL08X_AHB2) && !(dst & PL08X_AHB2)))
1272 cctl |= PL080_CONTROL_SRC_AHB2;
1273
1274 return cctl;
1275}
1276
1277static struct pl08x_txd *pl08x_get_txd(struct pl08x_dma_chan *plchan,
1278 unsigned long flags)
1279{
1280 struct pl08x_txd *txd = kzalloc(sizeof(struct pl08x_txd), GFP_NOWAIT);
1281
1282 if (txd) {
1283 dma_async_tx_descriptor_init(&txd->tx, &plchan->chan);
1284 txd->tx.flags = flags;
1285 txd->tx.tx_submit = pl08x_tx_submit;
1286 INIT_LIST_HEAD(&txd->node);
1287
1288 /* Always enable error and terminal interrupts */
1289 txd->ccfg = PL080_CONFIG_ERR_IRQ_MASK |
1290 PL080_CONFIG_TC_IRQ_MASK;
1291 }
1292 return txd;
1293}
1294
1295/*
1404 * Initialize a descriptor to be used by memcpy submit 1296 * Initialize a descriptor to be used by memcpy submit
1405 */ 1297 */
1406static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy( 1298static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy(
@@ -1412,40 +1304,38 @@ static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy(
1412 struct pl08x_txd *txd; 1304 struct pl08x_txd *txd;
1413 int ret; 1305 int ret;
1414 1306
1415 txd = kzalloc(sizeof(struct pl08x_txd), GFP_NOWAIT); 1307 txd = pl08x_get_txd(plchan, flags);
1416 if (!txd) { 1308 if (!txd) {
1417 dev_err(&pl08x->adev->dev, 1309 dev_err(&pl08x->adev->dev,
1418 "%s no memory for descriptor\n", __func__); 1310 "%s no memory for descriptor\n", __func__);
1419 return NULL; 1311 return NULL;
1420 } 1312 }
1421 1313
1422 dma_async_tx_descriptor_init(&txd->tx, chan);
1423 txd->direction = DMA_NONE; 1314 txd->direction = DMA_NONE;
1424 txd->srcbus.addr = src; 1315 txd->src_addr = src;
1425 txd->dstbus.addr = dest; 1316 txd->dst_addr = dest;
1317 txd->len = len;
1426 1318
1427 /* Set platform data for m2m */ 1319 /* Set platform data for m2m */
1428 txd->cd = &pl08x->pd->memcpy_channel; 1320 txd->ccfg |= PL080_FLOW_MEM2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT;
1321 txd->cctl = pl08x->pd->memcpy_channel.cctl &
1322 ~(PL080_CONTROL_DST_AHB2 | PL080_CONTROL_SRC_AHB2);
1323
1429 /* Both to be incremented or the code will break */ 1324 /* Both to be incremented or the code will break */
1430 txd->cd->cctl |= PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR; 1325 txd->cctl |= PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR;
1431 txd->tx.tx_submit = pl08x_tx_submit; 1326
1432 txd->tx.callback = NULL; 1327 if (pl08x->vd->dualmaster)
1433 txd->tx.callback_param = NULL; 1328 txd->cctl |= pl08x_select_bus(pl08x,
1434 txd->len = len; 1329 pl08x->mem_buses, pl08x->mem_buses);
1435 1330
1436 INIT_LIST_HEAD(&txd->node);
1437 ret = pl08x_prep_channel_resources(plchan, txd); 1331 ret = pl08x_prep_channel_resources(plchan, txd);
1438 if (ret) 1332 if (ret)
1439 return NULL; 1333 return NULL;
1440 /*
1441 * NB: the channel lock is held at this point so tx_submit()
1442 * must be called in direct succession.
1443 */
1444 1334
1445 return &txd->tx; 1335 return &txd->tx;
1446} 1336}
1447 1337
1448struct dma_async_tx_descriptor *pl08x_prep_slave_sg( 1338static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
1449 struct dma_chan *chan, struct scatterlist *sgl, 1339 struct dma_chan *chan, struct scatterlist *sgl,
1450 unsigned int sg_len, enum dma_data_direction direction, 1340 unsigned int sg_len, enum dma_data_direction direction,
1451 unsigned long flags) 1341 unsigned long flags)
@@ -1453,6 +1343,7 @@ struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
1453 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); 1343 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1454 struct pl08x_driver_data *pl08x = plchan->host; 1344 struct pl08x_driver_data *pl08x = plchan->host;
1455 struct pl08x_txd *txd; 1345 struct pl08x_txd *txd;
1346 u8 src_buses, dst_buses;
1456 int ret; 1347 int ret;
1457 1348
1458 /* 1349 /*
@@ -1467,14 +1358,12 @@ struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
1467 dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n", 1358 dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n",
1468 __func__, sgl->length, plchan->name); 1359 __func__, sgl->length, plchan->name);
1469 1360
1470 txd = kzalloc(sizeof(struct pl08x_txd), GFP_NOWAIT); 1361 txd = pl08x_get_txd(plchan, flags);
1471 if (!txd) { 1362 if (!txd) {
1472 dev_err(&pl08x->adev->dev, "%s no txd\n", __func__); 1363 dev_err(&pl08x->adev->dev, "%s no txd\n", __func__);
1473 return NULL; 1364 return NULL;
1474 } 1365 }
1475 1366
1476 dma_async_tx_descriptor_init(&txd->tx, chan);
1477
1478 if (direction != plchan->runtime_direction) 1367 if (direction != plchan->runtime_direction)
1479 dev_err(&pl08x->adev->dev, "%s DMA setup does not match " 1368 dev_err(&pl08x->adev->dev, "%s DMA setup does not match "
1480 "the direction configured for the PrimeCell\n", 1369 "the direction configured for the PrimeCell\n",
@@ -1486,37 +1375,47 @@ struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
1486 * channel target address dynamically at runtime. 1375 * channel target address dynamically at runtime.
1487 */ 1376 */
1488 txd->direction = direction; 1377 txd->direction = direction;
1378 txd->len = sgl->length;
1379
1380 txd->cctl = plchan->cd->cctl &
1381 ~(PL080_CONTROL_SRC_AHB2 | PL080_CONTROL_DST_AHB2 |
1382 PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR |
1383 PL080_CONTROL_PROT_MASK);
1384
1385 /* Access the cell in privileged mode, non-bufferable, non-cacheable */
1386 txd->cctl |= PL080_CONTROL_PROT_SYS;
1387
1489 if (direction == DMA_TO_DEVICE) { 1388 if (direction == DMA_TO_DEVICE) {
1490 txd->srcbus.addr = sgl->dma_address; 1389 txd->ccfg |= PL080_FLOW_MEM2PER << PL080_CONFIG_FLOW_CONTROL_SHIFT;
1390 txd->cctl |= PL080_CONTROL_SRC_INCR;
1391 txd->src_addr = sgl->dma_address;
1491 if (plchan->runtime_addr) 1392 if (plchan->runtime_addr)
1492 txd->dstbus.addr = plchan->runtime_addr; 1393 txd->dst_addr = plchan->runtime_addr;
1493 else 1394 else
1494 txd->dstbus.addr = plchan->cd->addr; 1395 txd->dst_addr = plchan->cd->addr;
1396 src_buses = pl08x->mem_buses;
1397 dst_buses = plchan->cd->periph_buses;
1495 } else if (direction == DMA_FROM_DEVICE) { 1398 } else if (direction == DMA_FROM_DEVICE) {
1399 txd->ccfg |= PL080_FLOW_PER2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT;
1400 txd->cctl |= PL080_CONTROL_DST_INCR;
1496 if (plchan->runtime_addr) 1401 if (plchan->runtime_addr)
1497 txd->srcbus.addr = plchan->runtime_addr; 1402 txd->src_addr = plchan->runtime_addr;
1498 else 1403 else
1499 txd->srcbus.addr = plchan->cd->addr; 1404 txd->src_addr = plchan->cd->addr;
1500 txd->dstbus.addr = sgl->dma_address; 1405 txd->dst_addr = sgl->dma_address;
1406 src_buses = plchan->cd->periph_buses;
1407 dst_buses = pl08x->mem_buses;
1501 } else { 1408 } else {
1502 dev_err(&pl08x->adev->dev, 1409 dev_err(&pl08x->adev->dev,
1503 "%s direction unsupported\n", __func__); 1410 "%s direction unsupported\n", __func__);
1504 return NULL; 1411 return NULL;
1505 } 1412 }
1506 txd->cd = plchan->cd; 1413
1507 txd->tx.tx_submit = pl08x_tx_submit; 1414 txd->cctl |= pl08x_select_bus(pl08x, src_buses, dst_buses);
1508 txd->tx.callback = NULL;
1509 txd->tx.callback_param = NULL;
1510 txd->len = sgl->length;
1511 INIT_LIST_HEAD(&txd->node);
1512 1415
1513 ret = pl08x_prep_channel_resources(plchan, txd); 1416 ret = pl08x_prep_channel_resources(plchan, txd);
1514 if (ret) 1417 if (ret)
1515 return NULL; 1418 return NULL;
1516 /*
1517 * NB: the channel lock is held at this point so tx_submit()
1518 * must be called in direct succession.
1519 */
1520 1419
1521 return &txd->tx; 1420 return &txd->tx;
1522} 1421}
@@ -1531,10 +1430,8 @@ static int pl08x_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
1531 1430
1532 /* Controls applicable to inactive channels */ 1431 /* Controls applicable to inactive channels */
1533 if (cmd == DMA_SLAVE_CONFIG) { 1432 if (cmd == DMA_SLAVE_CONFIG) {
1534 dma_set_runtime_config(chan, 1433 return dma_set_runtime_config(chan,
1535 (struct dma_slave_config *) 1434 (struct dma_slave_config *)arg);
1536 arg);
1537 return 0;
1538 } 1435 }
1539 1436
1540 /* 1437 /*
@@ -1558,16 +1455,8 @@ static int pl08x_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
1558 * Mark physical channel as free and free any slave 1455 * Mark physical channel as free and free any slave
1559 * signal 1456 * signal
1560 */ 1457 */
1561 if ((plchan->phychan->signal >= 0) && 1458 release_phy_channel(plchan);
1562 pl08x->pd->put_signal) {
1563 pl08x->pd->put_signal(plchan);
1564 plchan->phychan->signal = -1;
1565 }
1566 pl08x_put_phy_channel(pl08x, plchan->phychan);
1567 plchan->phychan = NULL;
1568 } 1459 }
1569 /* Stop any pending tasklet */
1570 tasklet_disable(&plchan->tasklet);
1571 /* Dequeue jobs and free LLIs */ 1460 /* Dequeue jobs and free LLIs */
1572 if (plchan->at) { 1461 if (plchan->at) {
1573 pl08x_free_txd(pl08x, plchan->at); 1462 pl08x_free_txd(pl08x, plchan->at);
@@ -1609,10 +1498,9 @@ bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
1609 1498
1610/* 1499/*
1611 * Just check that the device is there and active 1500 * Just check that the device is there and active
1612 * TODO: turn this bit on/off depending on the number of 1501 * TODO: turn this bit on/off depending on the number of physical channels
1613 * physical channels actually used, if it is zero... well 1502 * actually used, if it is zero... well shut it off. That will save some
1614 * shut it off. That will save some power. Cut the clock 1503 * power. Cut the clock at the same time.
1615 * at the same time.
1616 */ 1504 */
1617static void pl08x_ensure_on(struct pl08x_driver_data *pl08x) 1505static void pl08x_ensure_on(struct pl08x_driver_data *pl08x)
1618{ 1506{
@@ -1620,78 +1508,66 @@ static void pl08x_ensure_on(struct pl08x_driver_data *pl08x)
1620 1508
1621 val = readl(pl08x->base + PL080_CONFIG); 1509 val = readl(pl08x->base + PL080_CONFIG);
1622 val &= ~(PL080_CONFIG_M2_BE | PL080_CONFIG_M1_BE | PL080_CONFIG_ENABLE); 1510 val &= ~(PL080_CONFIG_M2_BE | PL080_CONFIG_M1_BE | PL080_CONFIG_ENABLE);
1623 /* We implictly clear bit 1 and that means little-endian mode */ 1511 /* We implicitly clear bit 1 and that means little-endian mode */
1624 val |= PL080_CONFIG_ENABLE; 1512 val |= PL080_CONFIG_ENABLE;
1625 writel(val, pl08x->base + PL080_CONFIG); 1513 writel(val, pl08x->base + PL080_CONFIG);
1626} 1514}
1627 1515
1516static void pl08x_unmap_buffers(struct pl08x_txd *txd)
1517{
1518 struct device *dev = txd->tx.chan->device->dev;
1519
1520 if (!(txd->tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
1521 if (txd->tx.flags & DMA_COMPL_SRC_UNMAP_SINGLE)
1522 dma_unmap_single(dev, txd->src_addr, txd->len,
1523 DMA_TO_DEVICE);
1524 else
1525 dma_unmap_page(dev, txd->src_addr, txd->len,
1526 DMA_TO_DEVICE);
1527 }
1528 if (!(txd->tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
1529 if (txd->tx.flags & DMA_COMPL_DEST_UNMAP_SINGLE)
1530 dma_unmap_single(dev, txd->dst_addr, txd->len,
1531 DMA_FROM_DEVICE);
1532 else
1533 dma_unmap_page(dev, txd->dst_addr, txd->len,
1534 DMA_FROM_DEVICE);
1535 }
1536}
1537
1628static void pl08x_tasklet(unsigned long data) 1538static void pl08x_tasklet(unsigned long data)
1629{ 1539{
1630 struct pl08x_dma_chan *plchan = (struct pl08x_dma_chan *) data; 1540 struct pl08x_dma_chan *plchan = (struct pl08x_dma_chan *) data;
1631 struct pl08x_phy_chan *phychan = plchan->phychan;
1632 struct pl08x_driver_data *pl08x = plchan->host; 1541 struct pl08x_driver_data *pl08x = plchan->host;
1542 struct pl08x_txd *txd;
1543 unsigned long flags;
1633 1544
1634 if (!plchan) 1545 spin_lock_irqsave(&plchan->lock, flags);
1635 BUG();
1636
1637 spin_lock(&plchan->lock);
1638
1639 if (plchan->at) {
1640 dma_async_tx_callback callback =
1641 plchan->at->tx.callback;
1642 void *callback_param =
1643 plchan->at->tx.callback_param;
1644
1645 /*
1646 * Update last completed
1647 */
1648 plchan->lc =
1649 (plchan->at->tx.cookie);
1650
1651 /*
1652 * Callback to signal completion
1653 */
1654 if (callback)
1655 callback(callback_param);
1656 1546
1657 /* 1547 txd = plchan->at;
1658 * Device callbacks should NOT clear 1548 plchan->at = NULL;
1659 * the current transaction on the channel
1660 * Linus: sometimes they should?
1661 */
1662 if (!plchan->at)
1663 BUG();
1664 1549
1665 /* 1550 if (txd) {
1666 * Free the descriptor if it's not for a device 1551 /* Update last completed */
1667 * using a circular buffer 1552 plchan->lc = txd->tx.cookie;
1668 */
1669 if (!plchan->at->cd->circular_buffer) {
1670 pl08x_free_txd(pl08x, plchan->at);
1671 plchan->at = NULL;
1672 }
1673 /*
1674 * else descriptor for circular
1675 * buffers only freed when
1676 * client has disabled dma
1677 */
1678 } 1553 }
1679 /* 1554
1680 * If a new descriptor is queued, set it up 1555 /* If a new descriptor is queued, set it up plchan->at is NULL here */
1681 * plchan->at is NULL here 1556 if (!list_empty(&plchan->pend_list)) {
1682 */
1683 if (!list_empty(&plchan->desc_list)) {
1684 struct pl08x_txd *next; 1557 struct pl08x_txd *next;
1685 1558
1686 next = list_first_entry(&plchan->desc_list, 1559 next = list_first_entry(&plchan->pend_list,
1687 struct pl08x_txd, 1560 struct pl08x_txd,
1688 node); 1561 node);
1689 list_del(&next->node); 1562 list_del(&next->node);
1690 plchan->at = next; 1563
1691 /* Configure the physical channel for the next txd */ 1564 pl08x_start_txd(plchan, next);
1692 pl08x_config_phychan_for_txd(plchan); 1565 } else if (plchan->phychan_hold) {
1693 pl08x_set_cregs(pl08x, plchan->phychan); 1566 /*
1694 pl08x_enable_phy_chan(pl08x, plchan->phychan); 1567 * This channel is still in use - we have a new txd being
1568 * prepared and will soon be queued. Don't give up the
1569 * physical channel.
1570 */
1695 } else { 1571 } else {
1696 struct pl08x_dma_chan *waiting = NULL; 1572 struct pl08x_dma_chan *waiting = NULL;
1697 1573
@@ -1699,20 +1575,14 @@ static void pl08x_tasklet(unsigned long data)
1699 * No more jobs, so free up the physical channel 1575 * No more jobs, so free up the physical channel
1700 * Free any allocated signal on slave transfers too 1576 * Free any allocated signal on slave transfers too
1701 */ 1577 */
1702 if ((phychan->signal >= 0) && pl08x->pd->put_signal) { 1578 release_phy_channel(plchan);
1703 pl08x->pd->put_signal(plchan);
1704 phychan->signal = -1;
1705 }
1706 pl08x_put_phy_channel(pl08x, phychan);
1707 plchan->phychan = NULL;
1708 plchan->state = PL08X_CHAN_IDLE; 1579 plchan->state = PL08X_CHAN_IDLE;
1709 1580
1710 /* 1581 /*
1711 * And NOW before anyone else can grab that free:d 1582 * And NOW before anyone else can grab that free:d up
1712 * up physical channel, see if there is some memcpy 1583 * physical channel, see if there is some memcpy pending
1713 * pending that seriously needs to start because of 1584 * that seriously needs to start because of being stacked
1714 * being stacked up while we were choking the 1585 * up while we were choking the physical channels with data.
1715 * physical channels with data.
1716 */ 1586 */
1717 list_for_each_entry(waiting, &pl08x->memcpy.channels, 1587 list_for_each_entry(waiting, &pl08x->memcpy.channels,
1718 chan.device_node) { 1588 chan.device_node) {
@@ -1724,6 +1594,7 @@ static void pl08x_tasklet(unsigned long data)
1724 ret = prep_phy_channel(waiting, 1594 ret = prep_phy_channel(waiting,
1725 waiting->waiting); 1595 waiting->waiting);
1726 BUG_ON(ret); 1596 BUG_ON(ret);
1597 waiting->phychan_hold--;
1727 waiting->state = PL08X_CHAN_RUNNING; 1598 waiting->state = PL08X_CHAN_RUNNING;
1728 waiting->waiting = NULL; 1599 waiting->waiting = NULL;
1729 pl08x_issue_pending(&waiting->chan); 1600 pl08x_issue_pending(&waiting->chan);
@@ -1732,7 +1603,25 @@ static void pl08x_tasklet(unsigned long data)
1732 } 1603 }
1733 } 1604 }
1734 1605
1735 spin_unlock(&plchan->lock); 1606 spin_unlock_irqrestore(&plchan->lock, flags);
1607
1608 if (txd) {
1609 dma_async_tx_callback callback = txd->tx.callback;
1610 void *callback_param = txd->tx.callback_param;
1611
1612 /* Don't try to unmap buffers on slave channels */
1613 if (!plchan->slave)
1614 pl08x_unmap_buffers(txd);
1615
1616 /* Free the descriptor */
1617 spin_lock_irqsave(&plchan->lock, flags);
1618 pl08x_free_txd(pl08x, txd);
1619 spin_unlock_irqrestore(&plchan->lock, flags);
1620
1621 /* Callback to signal completion */
1622 if (callback)
1623 callback(callback_param);
1624 }
1736} 1625}
1737 1626
1738static irqreturn_t pl08x_irq(int irq, void *dev) 1627static irqreturn_t pl08x_irq(int irq, void *dev)
@@ -1744,9 +1633,7 @@ static irqreturn_t pl08x_irq(int irq, void *dev)
1744 1633
1745 val = readl(pl08x->base + PL080_ERR_STATUS); 1634 val = readl(pl08x->base + PL080_ERR_STATUS);
1746 if (val) { 1635 if (val) {
1747 /* 1636 /* An error interrupt (on one or more channels) */
1748 * An error interrupt (on one or more channels)
1749 */
1750 dev_err(&pl08x->adev->dev, 1637 dev_err(&pl08x->adev->dev,
1751 "%s error interrupt, register value 0x%08x\n", 1638 "%s error interrupt, register value 0x%08x\n",
1752 __func__, val); 1639 __func__, val);
@@ -1770,9 +1657,7 @@ static irqreturn_t pl08x_irq(int irq, void *dev)
1770 mask |= (1 << i); 1657 mask |= (1 << i);
1771 } 1658 }
1772 } 1659 }
1773 /* 1660 /* Clear only the terminal interrupts on channels we processed */
1774 * Clear only the terminal interrupts on channels we processed
1775 */
1776 writel(mask, pl08x->base + PL080_TC_CLEAR); 1661 writel(mask, pl08x->base + PL080_TC_CLEAR);
1777 1662
1778 return mask ? IRQ_HANDLED : IRQ_NONE; 1663 return mask ? IRQ_HANDLED : IRQ_NONE;
@@ -1791,6 +1676,7 @@ static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x,
1791 int i; 1676 int i;
1792 1677
1793 INIT_LIST_HEAD(&dmadev->channels); 1678 INIT_LIST_HEAD(&dmadev->channels);
1679
1794 /* 1680 /*
1795 * Register as many many memcpy as we have physical channels, 1681 * Register as many many memcpy as we have physical channels,
1796 * we won't always be able to use all but the code will have 1682 * we won't always be able to use all but the code will have
@@ -1819,16 +1705,23 @@ static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x,
1819 return -ENOMEM; 1705 return -ENOMEM;
1820 } 1706 }
1821 } 1707 }
1708 if (chan->cd->circular_buffer) {
1709 dev_err(&pl08x->adev->dev,
1710 "channel %s: circular buffers not supported\n",
1711 chan->name);
1712 kfree(chan);
1713 continue;
1714 }
1822 dev_info(&pl08x->adev->dev, 1715 dev_info(&pl08x->adev->dev,
1823 "initialize virtual channel \"%s\"\n", 1716 "initialize virtual channel \"%s\"\n",
1824 chan->name); 1717 chan->name);
1825 1718
1826 chan->chan.device = dmadev; 1719 chan->chan.device = dmadev;
1827 atomic_set(&chan->last_issued, 0); 1720 chan->chan.cookie = 0;
1828 chan->lc = atomic_read(&chan->last_issued); 1721 chan->lc = 0;
1829 1722
1830 spin_lock_init(&chan->lock); 1723 spin_lock_init(&chan->lock);
1831 INIT_LIST_HEAD(&chan->desc_list); 1724 INIT_LIST_HEAD(&chan->pend_list);
1832 tasklet_init(&chan->tasklet, pl08x_tasklet, 1725 tasklet_init(&chan->tasklet, pl08x_tasklet,
1833 (unsigned long) chan); 1726 (unsigned long) chan);
1834 1727
@@ -1898,7 +1791,7 @@ static int pl08x_debugfs_show(struct seq_file *s, void *data)
1898 seq_printf(s, "CHANNEL:\tSTATE:\n"); 1791 seq_printf(s, "CHANNEL:\tSTATE:\n");
1899 seq_printf(s, "--------\t------\n"); 1792 seq_printf(s, "--------\t------\n");
1900 list_for_each_entry(chan, &pl08x->memcpy.channels, chan.device_node) { 1793 list_for_each_entry(chan, &pl08x->memcpy.channels, chan.device_node) {
1901 seq_printf(s, "%s\t\t\%s\n", chan->name, 1794 seq_printf(s, "%s\t\t%s\n", chan->name,
1902 pl08x_state_str(chan->state)); 1795 pl08x_state_str(chan->state));
1903 } 1796 }
1904 1797
@@ -1906,7 +1799,7 @@ static int pl08x_debugfs_show(struct seq_file *s, void *data)
1906 seq_printf(s, "CHANNEL:\tSTATE:\n"); 1799 seq_printf(s, "CHANNEL:\tSTATE:\n");
1907 seq_printf(s, "--------\t------\n"); 1800 seq_printf(s, "--------\t------\n");
1908 list_for_each_entry(chan, &pl08x->slave.channels, chan.device_node) { 1801 list_for_each_entry(chan, &pl08x->slave.channels, chan.device_node) {
1909 seq_printf(s, "%s\t\t\%s\n", chan->name, 1802 seq_printf(s, "%s\t\t%s\n", chan->name,
1910 pl08x_state_str(chan->state)); 1803 pl08x_state_str(chan->state));
1911 } 1804 }
1912 1805
@@ -1942,7 +1835,7 @@ static inline void init_pl08x_debugfs(struct pl08x_driver_data *pl08x)
1942static int pl08x_probe(struct amba_device *adev, struct amba_id *id) 1835static int pl08x_probe(struct amba_device *adev, struct amba_id *id)
1943{ 1836{
1944 struct pl08x_driver_data *pl08x; 1837 struct pl08x_driver_data *pl08x;
1945 struct vendor_data *vd = id->data; 1838 const struct vendor_data *vd = id->data;
1946 int ret = 0; 1839 int ret = 0;
1947 int i; 1840 int i;
1948 1841
@@ -1990,6 +1883,14 @@ static int pl08x_probe(struct amba_device *adev, struct amba_id *id)
1990 pl08x->adev = adev; 1883 pl08x->adev = adev;
1991 pl08x->vd = vd; 1884 pl08x->vd = vd;
1992 1885
1886 /* By default, AHB1 only. If dualmaster, from platform */
1887 pl08x->lli_buses = PL08X_AHB1;
1888 pl08x->mem_buses = PL08X_AHB1;
1889 if (pl08x->vd->dualmaster) {
1890 pl08x->lli_buses = pl08x->pd->lli_buses;
1891 pl08x->mem_buses = pl08x->pd->mem_buses;
1892 }
1893
1993 /* A DMA memory pool for LLIs, align on 1-byte boundary */ 1894 /* A DMA memory pool for LLIs, align on 1-byte boundary */
1994 pl08x->pool = dma_pool_create(DRIVER_NAME, &pl08x->adev->dev, 1895 pl08x->pool = dma_pool_create(DRIVER_NAME, &pl08x->adev->dev,
1995 PL08X_LLI_TSFR_SIZE, PL08X_ALIGN, 0); 1896 PL08X_LLI_TSFR_SIZE, PL08X_ALIGN, 0);
@@ -2009,14 +1910,12 @@ static int pl08x_probe(struct amba_device *adev, struct amba_id *id)
2009 /* Turn on the PL08x */ 1910 /* Turn on the PL08x */
2010 pl08x_ensure_on(pl08x); 1911 pl08x_ensure_on(pl08x);
2011 1912
2012 /* 1913 /* Attach the interrupt handler */
2013 * Attach the interrupt handler
2014 */
2015 writel(0x000000FF, pl08x->base + PL080_ERR_CLEAR); 1914 writel(0x000000FF, pl08x->base + PL080_ERR_CLEAR);
2016 writel(0x000000FF, pl08x->base + PL080_TC_CLEAR); 1915 writel(0x000000FF, pl08x->base + PL080_TC_CLEAR);
2017 1916
2018 ret = request_irq(adev->irq[0], pl08x_irq, IRQF_DISABLED, 1917 ret = request_irq(adev->irq[0], pl08x_irq, IRQF_DISABLED,
2019 vd->name, pl08x); 1918 DRIVER_NAME, pl08x);
2020 if (ret) { 1919 if (ret) {
2021 dev_err(&adev->dev, "%s failed to request interrupt %d\n", 1920 dev_err(&adev->dev, "%s failed to request interrupt %d\n",
2022 __func__, adev->irq[0]); 1921 __func__, adev->irq[0]);
@@ -2087,8 +1986,9 @@ static int pl08x_probe(struct amba_device *adev, struct amba_id *id)
2087 1986
2088 amba_set_drvdata(adev, pl08x); 1987 amba_set_drvdata(adev, pl08x);
2089 init_pl08x_debugfs(pl08x); 1988 init_pl08x_debugfs(pl08x);
2090 dev_info(&pl08x->adev->dev, "ARM(R) %s DMA block initialized @%08x\n", 1989 dev_info(&pl08x->adev->dev, "DMA: PL%03x rev%u at 0x%08llx irq %d\n",
2091 vd->name, adev->res.start); 1990 amba_part(adev), amba_rev(adev),
1991 (unsigned long long)adev->res.start, adev->irq[0]);
2092 return 0; 1992 return 0;
2093 1993
2094out_no_slave_reg: 1994out_no_slave_reg:
@@ -2115,13 +2015,11 @@ out_no_pl08x:
2115 2015
2116/* PL080 has 8 channels and the PL080 have just 2 */ 2016/* PL080 has 8 channels and the PL080 have just 2 */
2117static struct vendor_data vendor_pl080 = { 2017static struct vendor_data vendor_pl080 = {
2118 .name = "PL080",
2119 .channels = 8, 2018 .channels = 8,
2120 .dualmaster = true, 2019 .dualmaster = true,
2121}; 2020};
2122 2021
2123static struct vendor_data vendor_pl081 = { 2022static struct vendor_data vendor_pl081 = {
2124 .name = "PL081",
2125 .channels = 2, 2023 .channels = 2,
2126 .dualmaster = false, 2024 .dualmaster = false,
2127}; 2025};
@@ -2160,7 +2058,7 @@ static int __init pl08x_init(void)
2160 retval = amba_driver_register(&pl08x_amba_driver); 2058 retval = amba_driver_register(&pl08x_amba_driver);
2161 if (retval) 2059 if (retval)
2162 printk(KERN_WARNING DRIVER_NAME 2060 printk(KERN_WARNING DRIVER_NAME
2163 "failed to register as an amba device (%d)\n", 2061 "failed to register as an AMBA device (%d)\n",
2164 retval); 2062 retval);
2165 return retval; 2063 return retval;
2166} 2064}
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index ea0ee81cff53..3d7d705f026f 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -253,7 +253,7 @@ atc_chain_complete(struct at_dma_chan *atchan, struct at_desc *desc)
253 /* move myself to free_list */ 253 /* move myself to free_list */
254 list_move(&desc->desc_node, &atchan->free_list); 254 list_move(&desc->desc_node, &atchan->free_list);
255 255
256 /* unmap dma addresses */ 256 /* unmap dma addresses (not on slave channels) */
257 if (!atchan->chan_common.private) { 257 if (!atchan->chan_common.private) {
258 struct device *parent = chan2parent(&atchan->chan_common); 258 struct device *parent = chan2parent(&atchan->chan_common);
259 if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) { 259 if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
@@ -583,7 +583,6 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
583 desc->lli.ctrlb = ctrlb; 583 desc->lli.ctrlb = ctrlb;
584 584
585 desc->txd.cookie = 0; 585 desc->txd.cookie = 0;
586 async_tx_ack(&desc->txd);
587 586
588 if (!first) { 587 if (!first) {
589 first = desc; 588 first = desc;
@@ -604,7 +603,7 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
604 /* set end-of-link to the last link descriptor of list*/ 603 /* set end-of-link to the last link descriptor of list*/
605 set_desc_eol(desc); 604 set_desc_eol(desc);
606 605
607 desc->txd.flags = flags; /* client is in control of this ack */ 606 first->txd.flags = flags; /* client is in control of this ack */
608 607
609 return &first->txd; 608 return &first->txd;
610 609
@@ -670,7 +669,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
670 if (!desc) 669 if (!desc)
671 goto err_desc_get; 670 goto err_desc_get;
672 671
673 mem = sg_phys(sg); 672 mem = sg_dma_address(sg);
674 len = sg_dma_len(sg); 673 len = sg_dma_len(sg);
675 mem_width = 2; 674 mem_width = 2;
676 if (unlikely(mem & 3 || len & 3)) 675 if (unlikely(mem & 3 || len & 3))
@@ -712,7 +711,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
712 if (!desc) 711 if (!desc)
713 goto err_desc_get; 712 goto err_desc_get;
714 713
715 mem = sg_phys(sg); 714 mem = sg_dma_address(sg);
716 len = sg_dma_len(sg); 715 len = sg_dma_len(sg);
717 mem_width = 2; 716 mem_width = 2;
718 if (unlikely(mem & 3 || len & 3)) 717 if (unlikely(mem & 3 || len & 3))
@@ -749,8 +748,8 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
749 first->txd.cookie = -EBUSY; 748 first->txd.cookie = -EBUSY;
750 first->len = total_len; 749 first->len = total_len;
751 750
752 /* last link descriptor of list is responsible of flags */ 751 /* first link descriptor of list is responsible of flags */
753 prev->txd.flags = flags; /* client is in control of this ack */ 752 first->txd.flags = flags; /* client is in control of this ack */
754 753
755 return &first->txd; 754 return &first->txd;
756 755
@@ -854,11 +853,11 @@ static void atc_issue_pending(struct dma_chan *chan)
854 853
855 dev_vdbg(chan2dev(chan), "issue_pending\n"); 854 dev_vdbg(chan2dev(chan), "issue_pending\n");
856 855
856 spin_lock_bh(&atchan->lock);
857 if (!atc_chan_is_enabled(atchan)) { 857 if (!atc_chan_is_enabled(atchan)) {
858 spin_lock_bh(&atchan->lock);
859 atc_advance_work(atchan); 858 atc_advance_work(atchan);
860 spin_unlock_bh(&atchan->lock);
861 } 859 }
860 spin_unlock_bh(&atchan->lock);
862} 861}
863 862
864/** 863/**
@@ -1210,7 +1209,7 @@ static int __init at_dma_init(void)
1210{ 1209{
1211 return platform_driver_probe(&at_dma_driver, at_dma_probe); 1210 return platform_driver_probe(&at_dma_driver, at_dma_probe);
1212} 1211}
1213module_init(at_dma_init); 1212subsys_initcall(at_dma_init);
1214 1213
1215static void __exit at_dma_exit(void) 1214static void __exit at_dma_exit(void)
1216{ 1215{
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index e5e172d21692..4de947a450fc 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Freescale MPC85xx, MPC83xx DMA Engine support 2 * Freescale MPC85xx, MPC83xx DMA Engine support
3 * 3 *
4 * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. 4 * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved.
5 * 5 *
6 * Author: 6 * Author:
7 * Zhang Wei <wei.zhang@freescale.com>, Jul 2007 7 * Zhang Wei <wei.zhang@freescale.com>, Jul 2007
@@ -1324,6 +1324,8 @@ static int __devinit fsldma_of_probe(struct platform_device *op,
1324 fdev->common.device_control = fsl_dma_device_control; 1324 fdev->common.device_control = fsl_dma_device_control;
1325 fdev->common.dev = &op->dev; 1325 fdev->common.dev = &op->dev;
1326 1326
1327 dma_set_mask(&(op->dev), DMA_BIT_MASK(36));
1328
1327 dev_set_drvdata(&op->dev, fdev); 1329 dev_set_drvdata(&op->dev, fdev);
1328 1330
1329 /* 1331 /*
diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c
index 78266382797e..798f46a4590d 100644
--- a/drivers/dma/intel_mid_dma.c
+++ b/drivers/dma/intel_mid_dma.c
@@ -664,11 +664,20 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_memcpy(
664 /*calculate CTL_LO*/ 664 /*calculate CTL_LO*/
665 ctl_lo.ctl_lo = 0; 665 ctl_lo.ctl_lo = 0;
666 ctl_lo.ctlx.int_en = 1; 666 ctl_lo.ctlx.int_en = 1;
667 ctl_lo.ctlx.dst_tr_width = mids->dma_slave.dst_addr_width;
668 ctl_lo.ctlx.src_tr_width = mids->dma_slave.src_addr_width;
669 ctl_lo.ctlx.dst_msize = mids->dma_slave.src_maxburst; 667 ctl_lo.ctlx.dst_msize = mids->dma_slave.src_maxburst;
670 ctl_lo.ctlx.src_msize = mids->dma_slave.dst_maxburst; 668 ctl_lo.ctlx.src_msize = mids->dma_slave.dst_maxburst;
671 669
670 /*
671 * Here we need some translation from "enum dma_slave_buswidth"
672 * to the format for our dma controller
673 * standard intel_mid_dmac's format
674 * 1 Byte 0b000
675 * 2 Bytes 0b001
676 * 4 Bytes 0b010
677 */
678 ctl_lo.ctlx.dst_tr_width = mids->dma_slave.dst_addr_width / 2;
679 ctl_lo.ctlx.src_tr_width = mids->dma_slave.src_addr_width / 2;
680
672 if (mids->cfg_mode == LNW_DMA_MEM_TO_MEM) { 681 if (mids->cfg_mode == LNW_DMA_MEM_TO_MEM) {
673 ctl_lo.ctlx.tt_fc = 0; 682 ctl_lo.ctlx.tt_fc = 0;
674 ctl_lo.ctlx.sinc = 0; 683 ctl_lo.ctlx.sinc = 0;
@@ -746,8 +755,18 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_slave_sg(
746 BUG_ON(!mids); 755 BUG_ON(!mids);
747 756
748 if (!midc->dma->pimr_mask) { 757 if (!midc->dma->pimr_mask) {
749 pr_debug("MDMA: SG list is not supported by this controller\n"); 758 /* We can still handle sg list with only one item */
750 return NULL; 759 if (sg_len == 1) {
760 txd = intel_mid_dma_prep_memcpy(chan,
761 mids->dma_slave.dst_addr,
762 mids->dma_slave.src_addr,
763 sgl->length,
764 flags);
765 return txd;
766 } else {
767 pr_warn("MDMA: SG list is not supported by this controller\n");
768 return NULL;
769 }
751 } 770 }
752 771
753 pr_debug("MDMA: SG Length = %d, direction = %d, Flags = %#lx\n", 772 pr_debug("MDMA: SG Length = %d, direction = %d, Flags = %#lx\n",
@@ -758,6 +777,7 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_slave_sg(
758 pr_err("MDMA: Prep memcpy failed\n"); 777 pr_err("MDMA: Prep memcpy failed\n");
759 return NULL; 778 return NULL;
760 } 779 }
780
761 desc = to_intel_mid_dma_desc(txd); 781 desc = to_intel_mid_dma_desc(txd);
762 desc->dirn = direction; 782 desc->dirn = direction;
763 ctl_lo.ctl_lo = desc->ctl_lo; 783 ctl_lo.ctl_lo = desc->ctl_lo;
@@ -1021,11 +1041,6 @@ static irqreturn_t intel_mid_dma_interrupt(int irq, void *data)
1021 1041
1022 /*DMA Interrupt*/ 1042 /*DMA Interrupt*/
1023 pr_debug("MDMA:Got an interrupt on irq %d\n", irq); 1043 pr_debug("MDMA:Got an interrupt on irq %d\n", irq);
1024 if (!mid) {
1025 pr_err("ERR_MDMA:null pointer mid\n");
1026 return -EINVAL;
1027 }
1028
1029 pr_debug("MDMA: Status %x, Mask %x\n", tfr_status, mid->intr_mask); 1044 pr_debug("MDMA: Status %x, Mask %x\n", tfr_status, mid->intr_mask);
1030 tfr_status &= mid->intr_mask; 1045 tfr_status &= mid->intr_mask;
1031 if (tfr_status) { 1046 if (tfr_status) {
diff --git a/drivers/dma/iop-adma.c b/drivers/dma/iop-adma.c
index 161c452923b8..c6b01f535b29 100644
--- a/drivers/dma/iop-adma.c
+++ b/drivers/dma/iop-adma.c
@@ -1261,7 +1261,7 @@ out:
1261 return err; 1261 return err;
1262} 1262}
1263 1263
1264#ifdef CONFIG_MD_RAID6_PQ 1264#ifdef CONFIG_RAID6_PQ
1265static int __devinit 1265static int __devinit
1266iop_adma_pq_zero_sum_self_test(struct iop_adma_device *device) 1266iop_adma_pq_zero_sum_self_test(struct iop_adma_device *device)
1267{ 1267{
@@ -1584,7 +1584,7 @@ static int __devinit iop_adma_probe(struct platform_device *pdev)
1584 1584
1585 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask) && 1585 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask) &&
1586 dma_has_cap(DMA_PQ_VAL, dma_dev->cap_mask)) { 1586 dma_has_cap(DMA_PQ_VAL, dma_dev->cap_mask)) {
1587 #ifdef CONFIG_MD_RAID6_PQ 1587 #ifdef CONFIG_RAID6_PQ
1588 ret = iop_adma_pq_zero_sum_self_test(adev); 1588 ret = iop_adma_pq_zero_sum_self_test(adev);
1589 dev_dbg(&pdev->dev, "pq self test returned %d\n", ret); 1589 dev_dbg(&pdev->dev, "pq self test returned %d\n", ret);
1590 #else 1590 #else
diff --git a/drivers/dma/pch_dma.c b/drivers/dma/pch_dma.c
index c064c89420d0..1c38418ae61f 100644
--- a/drivers/dma/pch_dma.c
+++ b/drivers/dma/pch_dma.c
@@ -1,6 +1,7 @@
1/* 1/*
2 * Topcliff PCH DMA controller driver 2 * Topcliff PCH DMA controller driver
3 * Copyright (c) 2010 Intel Corporation 3 * Copyright (c) 2010 Intel Corporation
4 * Copyright (C) 2011 OKI SEMICONDUCTOR CO., LTD.
4 * 5 *
5 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
@@ -921,12 +922,19 @@ static void __devexit pch_dma_remove(struct pci_dev *pdev)
921} 922}
922 923
923/* PCI Device ID of DMA device */ 924/* PCI Device ID of DMA device */
924#define PCI_DEVICE_ID_PCH_DMA_8CH 0x8810 925#define PCI_VENDOR_ID_ROHM 0x10DB
925#define PCI_DEVICE_ID_PCH_DMA_4CH 0x8815 926#define PCI_DEVICE_ID_EG20T_PCH_DMA_8CH 0x8810
927#define PCI_DEVICE_ID_EG20T_PCH_DMA_4CH 0x8815
928#define PCI_DEVICE_ID_ML7213_DMA1_8CH 0x8026
929#define PCI_DEVICE_ID_ML7213_DMA2_8CH 0x802B
930#define PCI_DEVICE_ID_ML7213_DMA3_4CH 0x8034
926 931
927static const struct pci_device_id pch_dma_id_table[] = { 932static const struct pci_device_id pch_dma_id_table[] = {
928 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PCH_DMA_8CH), 8 }, 933 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_EG20T_PCH_DMA_8CH), 8 },
929 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PCH_DMA_4CH), 4 }, 934 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_EG20T_PCH_DMA_4CH), 4 },
935 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA1_8CH), 8}, /* UART Video */
936 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA2_8CH), 8}, /* PCMIF SPI */
937 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA3_4CH), 4}, /* FPGA */
930 { 0, }, 938 { 0, },
931}; 939};
932 940
@@ -954,6 +962,7 @@ static void __exit pch_dma_exit(void)
954module_init(pch_dma_init); 962module_init(pch_dma_init);
955module_exit(pch_dma_exit); 963module_exit(pch_dma_exit);
956 964
957MODULE_DESCRIPTION("Topcliff PCH DMA controller driver"); 965MODULE_DESCRIPTION("Intel EG20T PCH / OKI SEMICONDUCTOR ML7213 IOH "
966 "DMA controller driver");
958MODULE_AUTHOR("Yong Wang <yong.y.wang@intel.com>"); 967MODULE_AUTHOR("Yong Wang <yong.y.wang@intel.com>");
959MODULE_LICENSE("GPL v2"); 968MODULE_LICENSE("GPL v2");
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index fab68a553205..6e1d46a65d0e 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -1,5 +1,6 @@
1/* 1/*
2 * Copyright (C) ST-Ericsson SA 2007-2010 2 * Copyright (C) Ericsson AB 2007-2008
3 * Copyright (C) ST-Ericsson SA 2008-2010
3 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson 4 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
4 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson 5 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2 6 * License terms: GNU General Public License (GPL) version 2
@@ -554,8 +555,66 @@ static struct d40_desc *d40_last_queued(struct d40_chan *d40c)
554 return d; 555 return d;
555} 556}
556 557
557/* Support functions for logical channels */ 558static int d40_psize_2_burst_size(bool is_log, int psize)
559{
560 if (is_log) {
561 if (psize == STEDMA40_PSIZE_LOG_1)
562 return 1;
563 } else {
564 if (psize == STEDMA40_PSIZE_PHY_1)
565 return 1;
566 }
567
568 return 2 << psize;
569}
570
571/*
572 * The dma only supports transmitting packages up to
573 * STEDMA40_MAX_SEG_SIZE << data_width. Calculate the total number of
574 * dma elements required to send the entire sg list
575 */
576static int d40_size_2_dmalen(int size, u32 data_width1, u32 data_width2)
577{
578 int dmalen;
579 u32 max_w = max(data_width1, data_width2);
580 u32 min_w = min(data_width1, data_width2);
581 u32 seg_max = ALIGN(STEDMA40_MAX_SEG_SIZE << min_w, 1 << max_w);
582
583 if (seg_max > STEDMA40_MAX_SEG_SIZE)
584 seg_max -= (1 << max_w);
585
586 if (!IS_ALIGNED(size, 1 << max_w))
587 return -EINVAL;
588
589 if (size <= seg_max)
590 dmalen = 1;
591 else {
592 dmalen = size / seg_max;
593 if (dmalen * seg_max < size)
594 dmalen++;
595 }
596 return dmalen;
597}
598
599static int d40_sg_2_dmalen(struct scatterlist *sgl, int sg_len,
600 u32 data_width1, u32 data_width2)
601{
602 struct scatterlist *sg;
603 int i;
604 int len = 0;
605 int ret;
606
607 for_each_sg(sgl, sg, sg_len, i) {
608 ret = d40_size_2_dmalen(sg_dma_len(sg),
609 data_width1, data_width2);
610 if (ret < 0)
611 return ret;
612 len += ret;
613 }
614 return len;
615}
558 616
617/* Support functions for logical channels */
559 618
560static int d40_channel_execute_command(struct d40_chan *d40c, 619static int d40_channel_execute_command(struct d40_chan *d40c,
561 enum d40_command command) 620 enum d40_command command)
@@ -1241,6 +1300,21 @@ static int d40_validate_conf(struct d40_chan *d40c,
1241 res = -EINVAL; 1300 res = -EINVAL;
1242 } 1301 }
1243 1302
1303 if (d40_psize_2_burst_size(is_log, conf->src_info.psize) *
1304 (1 << conf->src_info.data_width) !=
1305 d40_psize_2_burst_size(is_log, conf->dst_info.psize) *
1306 (1 << conf->dst_info.data_width)) {
1307 /*
1308 * The DMAC hardware only supports
1309 * src (burst x width) == dst (burst x width)
1310 */
1311
1312 dev_err(&d40c->chan.dev->device,
1313 "[%s] src (burst x width) != dst (burst x width)\n",
1314 __func__);
1315 res = -EINVAL;
1316 }
1317
1244 return res; 1318 return res;
1245} 1319}
1246 1320
@@ -1638,13 +1712,21 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
1638 if (d40d == NULL) 1712 if (d40d == NULL)
1639 goto err; 1713 goto err;
1640 1714
1641 d40d->lli_len = sgl_len; 1715 d40d->lli_len = d40_sg_2_dmalen(sgl_dst, sgl_len,
1716 d40c->dma_cfg.src_info.data_width,
1717 d40c->dma_cfg.dst_info.data_width);
1718 if (d40d->lli_len < 0) {
1719 dev_err(&d40c->chan.dev->device,
1720 "[%s] Unaligned size\n", __func__);
1721 goto err;
1722 }
1723
1642 d40d->lli_current = 0; 1724 d40d->lli_current = 0;
1643 d40d->txd.flags = dma_flags; 1725 d40d->txd.flags = dma_flags;
1644 1726
1645 if (d40c->log_num != D40_PHY_CHAN) { 1727 if (d40c->log_num != D40_PHY_CHAN) {
1646 1728
1647 if (d40_pool_lli_alloc(d40d, sgl_len, true) < 0) { 1729 if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) {
1648 dev_err(&d40c->chan.dev->device, 1730 dev_err(&d40c->chan.dev->device,
1649 "[%s] Out of memory\n", __func__); 1731 "[%s] Out of memory\n", __func__);
1650 goto err; 1732 goto err;
@@ -1654,15 +1736,17 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
1654 sgl_len, 1736 sgl_len,
1655 d40d->lli_log.src, 1737 d40d->lli_log.src,
1656 d40c->log_def.lcsp1, 1738 d40c->log_def.lcsp1,
1657 d40c->dma_cfg.src_info.data_width); 1739 d40c->dma_cfg.src_info.data_width,
1740 d40c->dma_cfg.dst_info.data_width);
1658 1741
1659 (void) d40_log_sg_to_lli(sgl_dst, 1742 (void) d40_log_sg_to_lli(sgl_dst,
1660 sgl_len, 1743 sgl_len,
1661 d40d->lli_log.dst, 1744 d40d->lli_log.dst,
1662 d40c->log_def.lcsp3, 1745 d40c->log_def.lcsp3,
1663 d40c->dma_cfg.dst_info.data_width); 1746 d40c->dma_cfg.dst_info.data_width,
1747 d40c->dma_cfg.src_info.data_width);
1664 } else { 1748 } else {
1665 if (d40_pool_lli_alloc(d40d, sgl_len, false) < 0) { 1749 if (d40_pool_lli_alloc(d40d, d40d->lli_len, false) < 0) {
1666 dev_err(&d40c->chan.dev->device, 1750 dev_err(&d40c->chan.dev->device,
1667 "[%s] Out of memory\n", __func__); 1751 "[%s] Out of memory\n", __func__);
1668 goto err; 1752 goto err;
@@ -1675,6 +1759,7 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
1675 virt_to_phys(d40d->lli_phy.src), 1759 virt_to_phys(d40d->lli_phy.src),
1676 d40c->src_def_cfg, 1760 d40c->src_def_cfg,
1677 d40c->dma_cfg.src_info.data_width, 1761 d40c->dma_cfg.src_info.data_width,
1762 d40c->dma_cfg.dst_info.data_width,
1678 d40c->dma_cfg.src_info.psize); 1763 d40c->dma_cfg.src_info.psize);
1679 1764
1680 if (res < 0) 1765 if (res < 0)
@@ -1687,6 +1772,7 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
1687 virt_to_phys(d40d->lli_phy.dst), 1772 virt_to_phys(d40d->lli_phy.dst),
1688 d40c->dst_def_cfg, 1773 d40c->dst_def_cfg,
1689 d40c->dma_cfg.dst_info.data_width, 1774 d40c->dma_cfg.dst_info.data_width,
1775 d40c->dma_cfg.src_info.data_width,
1690 d40c->dma_cfg.dst_info.psize); 1776 d40c->dma_cfg.dst_info.psize);
1691 1777
1692 if (res < 0) 1778 if (res < 0)
@@ -1826,7 +1912,6 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
1826 struct d40_chan *d40c = container_of(chan, struct d40_chan, 1912 struct d40_chan *d40c = container_of(chan, struct d40_chan,
1827 chan); 1913 chan);
1828 unsigned long flags; 1914 unsigned long flags;
1829 int err = 0;
1830 1915
1831 if (d40c->phy_chan == NULL) { 1916 if (d40c->phy_chan == NULL) {
1832 dev_err(&d40c->chan.dev->device, 1917 dev_err(&d40c->chan.dev->device,
@@ -1844,6 +1929,15 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
1844 } 1929 }
1845 1930
1846 d40d->txd.flags = dma_flags; 1931 d40d->txd.flags = dma_flags;
1932 d40d->lli_len = d40_size_2_dmalen(size,
1933 d40c->dma_cfg.src_info.data_width,
1934 d40c->dma_cfg.dst_info.data_width);
1935 if (d40d->lli_len < 0) {
1936 dev_err(&d40c->chan.dev->device,
1937 "[%s] Unaligned size\n", __func__);
1938 goto err;
1939 }
1940
1847 1941
1848 dma_async_tx_descriptor_init(&d40d->txd, chan); 1942 dma_async_tx_descriptor_init(&d40d->txd, chan);
1849 1943
@@ -1851,37 +1945,40 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
1851 1945
1852 if (d40c->log_num != D40_PHY_CHAN) { 1946 if (d40c->log_num != D40_PHY_CHAN) {
1853 1947
1854 if (d40_pool_lli_alloc(d40d, 1, true) < 0) { 1948 if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) {
1855 dev_err(&d40c->chan.dev->device, 1949 dev_err(&d40c->chan.dev->device,
1856 "[%s] Out of memory\n", __func__); 1950 "[%s] Out of memory\n", __func__);
1857 goto err; 1951 goto err;
1858 } 1952 }
1859 d40d->lli_len = 1;
1860 d40d->lli_current = 0; 1953 d40d->lli_current = 0;
1861 1954
1862 d40_log_fill_lli(d40d->lli_log.src, 1955 if (d40_log_buf_to_lli(d40d->lli_log.src,
1863 src, 1956 src,
1864 size, 1957 size,
1865 d40c->log_def.lcsp1, 1958 d40c->log_def.lcsp1,
1866 d40c->dma_cfg.src_info.data_width, 1959 d40c->dma_cfg.src_info.data_width,
1867 true); 1960 d40c->dma_cfg.dst_info.data_width,
1961 true) == NULL)
1962 goto err;
1868 1963
1869 d40_log_fill_lli(d40d->lli_log.dst, 1964 if (d40_log_buf_to_lli(d40d->lli_log.dst,
1870 dst, 1965 dst,
1871 size, 1966 size,
1872 d40c->log_def.lcsp3, 1967 d40c->log_def.lcsp3,
1873 d40c->dma_cfg.dst_info.data_width, 1968 d40c->dma_cfg.dst_info.data_width,
1874 true); 1969 d40c->dma_cfg.src_info.data_width,
1970 true) == NULL)
1971 goto err;
1875 1972
1876 } else { 1973 } else {
1877 1974
1878 if (d40_pool_lli_alloc(d40d, 1, false) < 0) { 1975 if (d40_pool_lli_alloc(d40d, d40d->lli_len, false) < 0) {
1879 dev_err(&d40c->chan.dev->device, 1976 dev_err(&d40c->chan.dev->device,
1880 "[%s] Out of memory\n", __func__); 1977 "[%s] Out of memory\n", __func__);
1881 goto err; 1978 goto err;
1882 } 1979 }
1883 1980
1884 err = d40_phy_fill_lli(d40d->lli_phy.src, 1981 if (d40_phy_buf_to_lli(d40d->lli_phy.src,
1885 src, 1982 src,
1886 size, 1983 size,
1887 d40c->dma_cfg.src_info.psize, 1984 d40c->dma_cfg.src_info.psize,
@@ -1889,11 +1986,11 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
1889 d40c->src_def_cfg, 1986 d40c->src_def_cfg,
1890 true, 1987 true,
1891 d40c->dma_cfg.src_info.data_width, 1988 d40c->dma_cfg.src_info.data_width,
1892 false); 1989 d40c->dma_cfg.dst_info.data_width,
1893 if (err) 1990 false) == NULL)
1894 goto err_fill_lli; 1991 goto err;
1895 1992
1896 err = d40_phy_fill_lli(d40d->lli_phy.dst, 1993 if (d40_phy_buf_to_lli(d40d->lli_phy.dst,
1897 dst, 1994 dst,
1898 size, 1995 size,
1899 d40c->dma_cfg.dst_info.psize, 1996 d40c->dma_cfg.dst_info.psize,
@@ -1901,10 +1998,9 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
1901 d40c->dst_def_cfg, 1998 d40c->dst_def_cfg,
1902 true, 1999 true,
1903 d40c->dma_cfg.dst_info.data_width, 2000 d40c->dma_cfg.dst_info.data_width,
1904 false); 2001 d40c->dma_cfg.src_info.data_width,
1905 2002 false) == NULL)
1906 if (err) 2003 goto err;
1907 goto err_fill_lli;
1908 2004
1909 (void) dma_map_single(d40c->base->dev, d40d->lli_phy.src, 2005 (void) dma_map_single(d40c->base->dev, d40d->lli_phy.src,
1910 d40d->lli_pool.size, DMA_TO_DEVICE); 2006 d40d->lli_pool.size, DMA_TO_DEVICE);
@@ -1913,9 +2009,6 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
1913 spin_unlock_irqrestore(&d40c->lock, flags); 2009 spin_unlock_irqrestore(&d40c->lock, flags);
1914 return &d40d->txd; 2010 return &d40d->txd;
1915 2011
1916err_fill_lli:
1917 dev_err(&d40c->chan.dev->device,
1918 "[%s] Failed filling in PHY LLI\n", __func__);
1919err: 2012err:
1920 if (d40d) 2013 if (d40d)
1921 d40_desc_free(d40c, d40d); 2014 d40_desc_free(d40c, d40d);
@@ -1945,13 +2038,21 @@ static int d40_prep_slave_sg_log(struct d40_desc *d40d,
1945 dma_addr_t dev_addr = 0; 2038 dma_addr_t dev_addr = 0;
1946 int total_size; 2039 int total_size;
1947 2040
1948 if (d40_pool_lli_alloc(d40d, sg_len, true) < 0) { 2041 d40d->lli_len = d40_sg_2_dmalen(sgl, sg_len,
2042 d40c->dma_cfg.src_info.data_width,
2043 d40c->dma_cfg.dst_info.data_width);
2044 if (d40d->lli_len < 0) {
2045 dev_err(&d40c->chan.dev->device,
2046 "[%s] Unaligned size\n", __func__);
2047 return -EINVAL;
2048 }
2049
2050 if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) {
1949 dev_err(&d40c->chan.dev->device, 2051 dev_err(&d40c->chan.dev->device,
1950 "[%s] Out of memory\n", __func__); 2052 "[%s] Out of memory\n", __func__);
1951 return -ENOMEM; 2053 return -ENOMEM;
1952 } 2054 }
1953 2055
1954 d40d->lli_len = sg_len;
1955 d40d->lli_current = 0; 2056 d40d->lli_current = 0;
1956 2057
1957 if (direction == DMA_FROM_DEVICE) 2058 if (direction == DMA_FROM_DEVICE)
@@ -1993,13 +2094,21 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d,
1993 dma_addr_t dst_dev_addr; 2094 dma_addr_t dst_dev_addr;
1994 int res; 2095 int res;
1995 2096
1996 if (d40_pool_lli_alloc(d40d, sgl_len, false) < 0) { 2097 d40d->lli_len = d40_sg_2_dmalen(sgl, sgl_len,
2098 d40c->dma_cfg.src_info.data_width,
2099 d40c->dma_cfg.dst_info.data_width);
2100 if (d40d->lli_len < 0) {
2101 dev_err(&d40c->chan.dev->device,
2102 "[%s] Unaligned size\n", __func__);
2103 return -EINVAL;
2104 }
2105
2106 if (d40_pool_lli_alloc(d40d, d40d->lli_len, false) < 0) {
1997 dev_err(&d40c->chan.dev->device, 2107 dev_err(&d40c->chan.dev->device,
1998 "[%s] Out of memory\n", __func__); 2108 "[%s] Out of memory\n", __func__);
1999 return -ENOMEM; 2109 return -ENOMEM;
2000 } 2110 }
2001 2111
2002 d40d->lli_len = sgl_len;
2003 d40d->lli_current = 0; 2112 d40d->lli_current = 0;
2004 2113
2005 if (direction == DMA_FROM_DEVICE) { 2114 if (direction == DMA_FROM_DEVICE) {
@@ -2024,6 +2133,7 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d,
2024 virt_to_phys(d40d->lli_phy.src), 2133 virt_to_phys(d40d->lli_phy.src),
2025 d40c->src_def_cfg, 2134 d40c->src_def_cfg,
2026 d40c->dma_cfg.src_info.data_width, 2135 d40c->dma_cfg.src_info.data_width,
2136 d40c->dma_cfg.dst_info.data_width,
2027 d40c->dma_cfg.src_info.psize); 2137 d40c->dma_cfg.src_info.psize);
2028 if (res < 0) 2138 if (res < 0)
2029 return res; 2139 return res;
@@ -2035,6 +2145,7 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d,
2035 virt_to_phys(d40d->lli_phy.dst), 2145 virt_to_phys(d40d->lli_phy.dst),
2036 d40c->dst_def_cfg, 2146 d40c->dst_def_cfg,
2037 d40c->dma_cfg.dst_info.data_width, 2147 d40c->dma_cfg.dst_info.data_width,
2148 d40c->dma_cfg.src_info.data_width,
2038 d40c->dma_cfg.dst_info.psize); 2149 d40c->dma_cfg.dst_info.psize);
2039 if (res < 0) 2150 if (res < 0)
2040 return res; 2151 return res;
@@ -2244,6 +2355,8 @@ static void d40_set_runtime_config(struct dma_chan *chan,
2244 psize = STEDMA40_PSIZE_PHY_8; 2355 psize = STEDMA40_PSIZE_PHY_8;
2245 else if (config_maxburst >= 4) 2356 else if (config_maxburst >= 4)
2246 psize = STEDMA40_PSIZE_PHY_4; 2357 psize = STEDMA40_PSIZE_PHY_4;
2358 else if (config_maxburst >= 2)
2359 psize = STEDMA40_PSIZE_PHY_2;
2247 else 2360 else
2248 psize = STEDMA40_PSIZE_PHY_1; 2361 psize = STEDMA40_PSIZE_PHY_1;
2249 } 2362 }
diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c
index 8557cb88b255..0b096a38322d 100644
--- a/drivers/dma/ste_dma40_ll.c
+++ b/drivers/dma/ste_dma40_ll.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * Copyright (C) ST-Ericsson SA 2007-2010 2 * Copyright (C) ST-Ericsson SA 2007-2010
3 * Author: Per Friden <per.friden@stericsson.com> for ST-Ericsson 3 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
4 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson 4 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2 5 * License terms: GNU General Public License (GPL) version 2
6 */ 6 */
@@ -122,15 +122,15 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg,
122 *dst_cfg = dst; 122 *dst_cfg = dst;
123} 123}
124 124
125int d40_phy_fill_lli(struct d40_phy_lli *lli, 125static int d40_phy_fill_lli(struct d40_phy_lli *lli,
126 dma_addr_t data, 126 dma_addr_t data,
127 u32 data_size, 127 u32 data_size,
128 int psize, 128 int psize,
129 dma_addr_t next_lli, 129 dma_addr_t next_lli,
130 u32 reg_cfg, 130 u32 reg_cfg,
131 bool term_int, 131 bool term_int,
132 u32 data_width, 132 u32 data_width,
133 bool is_device) 133 bool is_device)
134{ 134{
135 int num_elems; 135 int num_elems;
136 136
@@ -139,13 +139,6 @@ int d40_phy_fill_lli(struct d40_phy_lli *lli,
139 else 139 else
140 num_elems = 2 << psize; 140 num_elems = 2 << psize;
141 141
142 /*
143 * Size is 16bit. data_width is 8, 16, 32 or 64 bit
144 * Block large than 64 KiB must be split.
145 */
146 if (data_size > (0xffff << data_width))
147 return -EINVAL;
148
149 /* Must be aligned */ 142 /* Must be aligned */
150 if (!IS_ALIGNED(data, 0x1 << data_width)) 143 if (!IS_ALIGNED(data, 0x1 << data_width))
151 return -EINVAL; 144 return -EINVAL;
@@ -187,55 +180,118 @@ int d40_phy_fill_lli(struct d40_phy_lli *lli,
187 return 0; 180 return 0;
188} 181}
189 182
183static int d40_seg_size(int size, int data_width1, int data_width2)
184{
185 u32 max_w = max(data_width1, data_width2);
186 u32 min_w = min(data_width1, data_width2);
187 u32 seg_max = ALIGN(STEDMA40_MAX_SEG_SIZE << min_w, 1 << max_w);
188
189 if (seg_max > STEDMA40_MAX_SEG_SIZE)
190 seg_max -= (1 << max_w);
191
192 if (size <= seg_max)
193 return size;
194
195 if (size <= 2 * seg_max)
196 return ALIGN(size / 2, 1 << max_w);
197
198 return seg_max;
199}
200
201struct d40_phy_lli *d40_phy_buf_to_lli(struct d40_phy_lli *lli,
202 dma_addr_t addr,
203 u32 size,
204 int psize,
205 dma_addr_t lli_phys,
206 u32 reg_cfg,
207 bool term_int,
208 u32 data_width1,
209 u32 data_width2,
210 bool is_device)
211{
212 int err;
213 dma_addr_t next = lli_phys;
214 int size_rest = size;
215 int size_seg = 0;
216
217 do {
218 size_seg = d40_seg_size(size_rest, data_width1, data_width2);
219 size_rest -= size_seg;
220
221 if (term_int && size_rest == 0)
222 next = 0;
223 else
224 next = ALIGN(next + sizeof(struct d40_phy_lli),
225 D40_LLI_ALIGN);
226
227 err = d40_phy_fill_lli(lli,
228 addr,
229 size_seg,
230 psize,
231 next,
232 reg_cfg,
233 !next,
234 data_width1,
235 is_device);
236
237 if (err)
238 goto err;
239
240 lli++;
241 if (!is_device)
242 addr += size_seg;
243 } while (size_rest);
244
245 return lli;
246
247 err:
248 return NULL;
249}
250
190int d40_phy_sg_to_lli(struct scatterlist *sg, 251int d40_phy_sg_to_lli(struct scatterlist *sg,
191 int sg_len, 252 int sg_len,
192 dma_addr_t target, 253 dma_addr_t target,
193 struct d40_phy_lli *lli, 254 struct d40_phy_lli *lli_sg,
194 dma_addr_t lli_phys, 255 dma_addr_t lli_phys,
195 u32 reg_cfg, 256 u32 reg_cfg,
196 u32 data_width, 257 u32 data_width1,
258 u32 data_width2,
197 int psize) 259 int psize)
198{ 260{
199 int total_size = 0; 261 int total_size = 0;
200 int i; 262 int i;
201 struct scatterlist *current_sg = sg; 263 struct scatterlist *current_sg = sg;
202 dma_addr_t next_lli_phys;
203 dma_addr_t dst; 264 dma_addr_t dst;
204 int err = 0; 265 struct d40_phy_lli *lli = lli_sg;
266 dma_addr_t l_phys = lli_phys;
205 267
206 for_each_sg(sg, current_sg, sg_len, i) { 268 for_each_sg(sg, current_sg, sg_len, i) {
207 269
208 total_size += sg_dma_len(current_sg); 270 total_size += sg_dma_len(current_sg);
209 271
210 /* If this scatter list entry is the last one, no next link */
211 if (sg_len - 1 == i)
212 next_lli_phys = 0;
213 else
214 next_lli_phys = ALIGN(lli_phys + (i + 1) *
215 sizeof(struct d40_phy_lli),
216 D40_LLI_ALIGN);
217
218 if (target) 272 if (target)
219 dst = target; 273 dst = target;
220 else 274 else
221 dst = sg_phys(current_sg); 275 dst = sg_phys(current_sg);
222 276
223 err = d40_phy_fill_lli(&lli[i], 277 l_phys = ALIGN(lli_phys + (lli - lli_sg) *
224 dst, 278 sizeof(struct d40_phy_lli), D40_LLI_ALIGN);
225 sg_dma_len(current_sg), 279
226 psize, 280 lli = d40_phy_buf_to_lli(lli,
227 next_lli_phys, 281 dst,
228 reg_cfg, 282 sg_dma_len(current_sg),
229 !next_lli_phys, 283 psize,
230 data_width, 284 l_phys,
231 target == dst); 285 reg_cfg,
232 if (err) 286 sg_len - 1 == i,
233 goto err; 287 data_width1,
288 data_width2,
289 target == dst);
290 if (lli == NULL)
291 return -EINVAL;
234 } 292 }
235 293
236 return total_size; 294 return total_size;
237err:
238 return err;
239} 295}
240 296
241 297
@@ -315,17 +371,20 @@ void d40_log_lli_lcla_write(struct d40_log_lli *lcla,
315 writel(lli_dst->lcsp13, &lcla[1].lcsp13); 371 writel(lli_dst->lcsp13, &lcla[1].lcsp13);
316} 372}
317 373
318void d40_log_fill_lli(struct d40_log_lli *lli, 374static void d40_log_fill_lli(struct d40_log_lli *lli,
319 dma_addr_t data, u32 data_size, 375 dma_addr_t data, u32 data_size,
320 u32 reg_cfg, 376 u32 reg_cfg,
321 u32 data_width, 377 u32 data_width,
322 bool addr_inc) 378 bool addr_inc)
323{ 379{
324 lli->lcsp13 = reg_cfg; 380 lli->lcsp13 = reg_cfg;
325 381
326 /* The number of elements to transfer */ 382 /* The number of elements to transfer */
327 lli->lcsp02 = ((data_size >> data_width) << 383 lli->lcsp02 = ((data_size >> data_width) <<
328 D40_MEM_LCSP0_ECNT_POS) & D40_MEM_LCSP0_ECNT_MASK; 384 D40_MEM_LCSP0_ECNT_POS) & D40_MEM_LCSP0_ECNT_MASK;
385
386 BUG_ON((data_size >> data_width) > STEDMA40_MAX_SEG_SIZE);
387
329 /* 16 LSBs address of the current element */ 388 /* 16 LSBs address of the current element */
330 lli->lcsp02 |= data & D40_MEM_LCSP0_SPTR_MASK; 389 lli->lcsp02 |= data & D40_MEM_LCSP0_SPTR_MASK;
331 /* 16 MSBs address of the current element */ 390 /* 16 MSBs address of the current element */
@@ -348,55 +407,94 @@ int d40_log_sg_to_dev(struct scatterlist *sg,
348 int total_size = 0; 407 int total_size = 0;
349 struct scatterlist *current_sg = sg; 408 struct scatterlist *current_sg = sg;
350 int i; 409 int i;
410 struct d40_log_lli *lli_src = lli->src;
411 struct d40_log_lli *lli_dst = lli->dst;
351 412
352 for_each_sg(sg, current_sg, sg_len, i) { 413 for_each_sg(sg, current_sg, sg_len, i) {
353 total_size += sg_dma_len(current_sg); 414 total_size += sg_dma_len(current_sg);
354 415
355 if (direction == DMA_TO_DEVICE) { 416 if (direction == DMA_TO_DEVICE) {
356 d40_log_fill_lli(&lli->src[i], 417 lli_src =
357 sg_phys(current_sg), 418 d40_log_buf_to_lli(lli_src,
358 sg_dma_len(current_sg), 419 sg_phys(current_sg),
359 lcsp->lcsp1, src_data_width, 420 sg_dma_len(current_sg),
360 true); 421 lcsp->lcsp1, src_data_width,
361 d40_log_fill_lli(&lli->dst[i], 422 dst_data_width,
362 dev_addr, 423 true);
363 sg_dma_len(current_sg), 424 lli_dst =
364 lcsp->lcsp3, dst_data_width, 425 d40_log_buf_to_lli(lli_dst,
365 false); 426 dev_addr,
427 sg_dma_len(current_sg),
428 lcsp->lcsp3, dst_data_width,
429 src_data_width,
430 false);
366 } else { 431 } else {
367 d40_log_fill_lli(&lli->dst[i], 432 lli_dst =
368 sg_phys(current_sg), 433 d40_log_buf_to_lli(lli_dst,
369 sg_dma_len(current_sg), 434 sg_phys(current_sg),
370 lcsp->lcsp3, dst_data_width, 435 sg_dma_len(current_sg),
371 true); 436 lcsp->lcsp3, dst_data_width,
372 d40_log_fill_lli(&lli->src[i], 437 src_data_width,
373 dev_addr, 438 true);
374 sg_dma_len(current_sg), 439 lli_src =
375 lcsp->lcsp1, src_data_width, 440 d40_log_buf_to_lli(lli_src,
376 false); 441 dev_addr,
442 sg_dma_len(current_sg),
443 lcsp->lcsp1, src_data_width,
444 dst_data_width,
445 false);
377 } 446 }
378 } 447 }
379 return total_size; 448 return total_size;
380} 449}
381 450
451struct d40_log_lli *d40_log_buf_to_lli(struct d40_log_lli *lli_sg,
452 dma_addr_t addr,
453 int size,
454 u32 lcsp13, /* src or dst*/
455 u32 data_width1,
456 u32 data_width2,
457 bool addr_inc)
458{
459 struct d40_log_lli *lli = lli_sg;
460 int size_rest = size;
461 int size_seg = 0;
462
463 do {
464 size_seg = d40_seg_size(size_rest, data_width1, data_width2);
465 size_rest -= size_seg;
466
467 d40_log_fill_lli(lli,
468 addr,
469 size_seg,
470 lcsp13, data_width1,
471 addr_inc);
472 if (addr_inc)
473 addr += size_seg;
474 lli++;
475 } while (size_rest);
476
477 return lli;
478}
479
382int d40_log_sg_to_lli(struct scatterlist *sg, 480int d40_log_sg_to_lli(struct scatterlist *sg,
383 int sg_len, 481 int sg_len,
384 struct d40_log_lli *lli_sg, 482 struct d40_log_lli *lli_sg,
385 u32 lcsp13, /* src or dst*/ 483 u32 lcsp13, /* src or dst*/
386 u32 data_width) 484 u32 data_width1, u32 data_width2)
387{ 485{
388 int total_size = 0; 486 int total_size = 0;
389 struct scatterlist *current_sg = sg; 487 struct scatterlist *current_sg = sg;
390 int i; 488 int i;
489 struct d40_log_lli *lli = lli_sg;
391 490
392 for_each_sg(sg, current_sg, sg_len, i) { 491 for_each_sg(sg, current_sg, sg_len, i) {
393 total_size += sg_dma_len(current_sg); 492 total_size += sg_dma_len(current_sg);
394 493 lli = d40_log_buf_to_lli(lli,
395 d40_log_fill_lli(&lli_sg[i], 494 sg_phys(current_sg),
396 sg_phys(current_sg), 495 sg_dma_len(current_sg),
397 sg_dma_len(current_sg), 496 lcsp13,
398 lcsp13, data_width, 497 data_width1, data_width2, true);
399 true);
400 } 498 }
401 return total_size; 499 return total_size;
402} 500}
diff --git a/drivers/dma/ste_dma40_ll.h b/drivers/dma/ste_dma40_ll.h
index 9e419b907544..9cc43495bea2 100644
--- a/drivers/dma/ste_dma40_ll.h
+++ b/drivers/dma/ste_dma40_ll.h
@@ -292,18 +292,20 @@ int d40_phy_sg_to_lli(struct scatterlist *sg,
292 struct d40_phy_lli *lli, 292 struct d40_phy_lli *lli,
293 dma_addr_t lli_phys, 293 dma_addr_t lli_phys,
294 u32 reg_cfg, 294 u32 reg_cfg,
295 u32 data_width, 295 u32 data_width1,
296 u32 data_width2,
296 int psize); 297 int psize);
297 298
298int d40_phy_fill_lli(struct d40_phy_lli *lli, 299struct d40_phy_lli *d40_phy_buf_to_lli(struct d40_phy_lli *lli,
299 dma_addr_t data, 300 dma_addr_t data,
300 u32 data_size, 301 u32 data_size,
301 int psize, 302 int psize,
302 dma_addr_t next_lli, 303 dma_addr_t next_lli,
303 u32 reg_cfg, 304 u32 reg_cfg,
304 bool term_int, 305 bool term_int,
305 u32 data_width, 306 u32 data_width1,
306 bool is_device); 307 u32 data_width2,
308 bool is_device);
307 309
308void d40_phy_lli_write(void __iomem *virtbase, 310void d40_phy_lli_write(void __iomem *virtbase,
309 u32 phy_chan_num, 311 u32 phy_chan_num,
@@ -312,12 +314,12 @@ void d40_phy_lli_write(void __iomem *virtbase,
312 314
313/* Logical channels */ 315/* Logical channels */
314 316
315void d40_log_fill_lli(struct d40_log_lli *lli, 317struct d40_log_lli *d40_log_buf_to_lli(struct d40_log_lli *lli_sg,
316 dma_addr_t data, 318 dma_addr_t addr,
317 u32 data_size, 319 int size,
318 u32 reg_cfg, 320 u32 lcsp13, /* src or dst*/
319 u32 data_width, 321 u32 data_width1, u32 data_width2,
320 bool addr_inc); 322 bool addr_inc);
321 323
322int d40_log_sg_to_dev(struct scatterlist *sg, 324int d40_log_sg_to_dev(struct scatterlist *sg,
323 int sg_len, 325 int sg_len,
@@ -332,7 +334,7 @@ int d40_log_sg_to_lli(struct scatterlist *sg,
332 int sg_len, 334 int sg_len,
333 struct d40_log_lli *lli_sg, 335 struct d40_log_lli *lli_sg,
334 u32 lcsp13, /* src or dst*/ 336 u32 lcsp13, /* src or dst*/
335 u32 data_width); 337 u32 data_width1, u32 data_width2);
336 338
337void d40_log_lli_lcpa_write(struct d40_log_lli_full *lcpa, 339void d40_log_lli_lcpa_write(struct d40_log_lli_full *lcpa,
338 struct d40_log_lli *lli_dst, 340 struct d40_log_lli *lli_dst,
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 03e337072517..f6b9baa6a63d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -928,6 +928,7 @@ static int intel_wrap_ring_buffer(struct intel_ring_buffer *ring)
928 928
929int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n) 929int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
930{ 930{
931 int reread = 0;
931 struct drm_device *dev = ring->dev; 932 struct drm_device *dev = ring->dev;
932 struct drm_i915_private *dev_priv = dev->dev_private; 933 struct drm_i915_private *dev_priv = dev->dev_private;
933 unsigned long end; 934 unsigned long end;
@@ -940,9 +941,8 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
940 * fallback to the slow and accurate path. 941 * fallback to the slow and accurate path.
941 */ 942 */
942 head = intel_read_status_page(ring, 4); 943 head = intel_read_status_page(ring, 4);
943 if (head < ring->actual_head) 944 if (reread)
944 head = I915_READ_HEAD(ring); 945 head = I915_READ_HEAD(ring);
945 ring->actual_head = head;
946 ring->head = head & HEAD_ADDR; 946 ring->head = head & HEAD_ADDR;
947 ring->space = ring->head - (ring->tail + 8); 947 ring->space = ring->head - (ring->tail + 8);
948 if (ring->space < 0) 948 if (ring->space < 0)
@@ -961,6 +961,7 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
961 msleep(1); 961 msleep(1);
962 if (atomic_read(&dev_priv->mm.wedged)) 962 if (atomic_read(&dev_priv->mm.wedged))
963 return -EAGAIN; 963 return -EAGAIN;
964 reread = 1;
964 } while (!time_after(jiffies, end)); 965 } while (!time_after(jiffies, end));
965 trace_i915_ring_wait_end (dev); 966 trace_i915_ring_wait_end (dev);
966 return -EBUSY; 967 return -EBUSY;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index be9087e4c9be..5b0abfa881fc 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -47,7 +47,6 @@ struct intel_ring_buffer {
47 struct drm_device *dev; 47 struct drm_device *dev;
48 struct drm_i915_gem_object *obj; 48 struct drm_i915_gem_object *obj;
49 49
50 u32 actual_head;
51 u32 head; 50 u32 head;
52 u32 tail; 51 u32 tail;
53 int space; 52 int space;
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 46e32573b3a3..01bffc4412d2 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -160,6 +160,7 @@ enum nouveau_flags {
160#define NVOBJ_FLAG_ZERO_ALLOC (1 << 1) 160#define NVOBJ_FLAG_ZERO_ALLOC (1 << 1)
161#define NVOBJ_FLAG_ZERO_FREE (1 << 2) 161#define NVOBJ_FLAG_ZERO_FREE (1 << 2)
162#define NVOBJ_FLAG_VM (1 << 3) 162#define NVOBJ_FLAG_VM (1 << 3)
163#define NVOBJ_FLAG_VM_USER (1 << 4)
163 164
164#define NVOBJ_CINST_GLOBAL 0xdeadbeef 165#define NVOBJ_CINST_GLOBAL 0xdeadbeef
165 166
@@ -1576,6 +1577,20 @@ nv_match_device(struct drm_device *dev, unsigned device,
1576 dev->pdev->subsystem_device == sub_device; 1577 dev->pdev->subsystem_device == sub_device;
1577} 1578}
1578 1579
1580/* returns 1 if device is one of the nv4x using the 0x4497 object class,
1581 * helpful to determine a number of other hardware features
1582 */
1583static inline int
1584nv44_graph_class(struct drm_device *dev)
1585{
1586 struct drm_nouveau_private *dev_priv = dev->dev_private;
1587
1588 if ((dev_priv->chipset & 0xf0) == 0x60)
1589 return 1;
1590
1591 return !(0x0baf & (1 << (dev_priv->chipset & 0x0f)));
1592}
1593
1579/* memory type/access flags, do not match hardware values */ 1594/* memory type/access flags, do not match hardware values */
1580#define NV_MEM_ACCESS_RO 1 1595#define NV_MEM_ACCESS_RO 1
1581#define NV_MEM_ACCESS_WO 2 1596#define NV_MEM_ACCESS_WO 2
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index 6d56a54b6e2e..60769d2f9a66 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -352,8 +352,8 @@ nouveau_fbcon_create(struct nouveau_fbdev *nfbdev,
352 FBINFO_HWACCEL_IMAGEBLIT; 352 FBINFO_HWACCEL_IMAGEBLIT;
353 info->flags |= FBINFO_CAN_FORCE_OUTPUT; 353 info->flags |= FBINFO_CAN_FORCE_OUTPUT;
354 info->fbops = &nouveau_fbcon_sw_ops; 354 info->fbops = &nouveau_fbcon_sw_ops;
355 info->fix.smem_start = dev->mode_config.fb_base + 355 info->fix.smem_start = nvbo->bo.mem.bus.base +
356 (nvbo->bo.mem.start << PAGE_SHIFT); 356 nvbo->bo.mem.bus.offset;
357 info->fix.smem_len = size; 357 info->fix.smem_len = size;
358 358
359 info->screen_base = nvbo_kmap_obj_iovirtual(nouveau_fb->nvbo); 359 info->screen_base = nvbo_kmap_obj_iovirtual(nouveau_fb->nvbo);
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 69044eb104bb..26347b7cd872 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -742,30 +742,24 @@ nouveau_vram_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
742{ 742{
743 struct nouveau_mm *mm = man->priv; 743 struct nouveau_mm *mm = man->priv;
744 struct nouveau_mm_node *r; 744 struct nouveau_mm_node *r;
745 u64 total = 0, ttotal[3] = {}, tused[3] = {}, tfree[3] = {}; 745 u32 total = 0, free = 0;
746 int i;
747 746
748 mutex_lock(&mm->mutex); 747 mutex_lock(&mm->mutex);
749 list_for_each_entry(r, &mm->nodes, nl_entry) { 748 list_for_each_entry(r, &mm->nodes, nl_entry) {
750 printk(KERN_DEBUG "%s %s-%d: 0x%010llx 0x%010llx\n", 749 printk(KERN_DEBUG "%s %d: 0x%010llx 0x%010llx\n",
751 prefix, r->free ? "free" : "used", r->type, 750 prefix, r->type, ((u64)r->offset << 12),
752 ((u64)r->offset << 12),
753 (((u64)r->offset + r->length) << 12)); 751 (((u64)r->offset + r->length) << 12));
752
754 total += r->length; 753 total += r->length;
755 ttotal[r->type] += r->length; 754 if (!r->type)
756 if (r->free) 755 free += r->length;
757 tfree[r->type] += r->length;
758 else
759 tused[r->type] += r->length;
760 } 756 }
761 mutex_unlock(&mm->mutex); 757 mutex_unlock(&mm->mutex);
762 758
763 printk(KERN_DEBUG "%s total: 0x%010llx\n", prefix, total << 12); 759 printk(KERN_DEBUG "%s total: 0x%010llx free: 0x%010llx\n",
764 for (i = 0; i < 3; i++) { 760 prefix, (u64)total << 12, (u64)free << 12);
765 printk(KERN_DEBUG "%s type %d: 0x%010llx, " 761 printk(KERN_DEBUG "%s block: 0x%08x\n",
766 "used 0x%010llx, free 0x%010llx\n", prefix, 762 prefix, mm->block_size << 12);
767 i, ttotal[i] << 12, tused[i] << 12, tfree[i] << 12);
768 }
769} 763}
770 764
771const struct ttm_mem_type_manager_func nouveau_vram_manager = { 765const struct ttm_mem_type_manager_func nouveau_vram_manager = {
diff --git a/drivers/gpu/drm/nouveau/nouveau_mm.c b/drivers/gpu/drm/nouveau/nouveau_mm.c
index cdbb11eb701b..8844b50c3e54 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mm.c
@@ -48,175 +48,76 @@ region_split(struct nouveau_mm *rmm, struct nouveau_mm_node *a, u32 size)
48 48
49 b->offset = a->offset; 49 b->offset = a->offset;
50 b->length = size; 50 b->length = size;
51 b->free = a->free;
52 b->type = a->type; 51 b->type = a->type;
53 a->offset += size; 52 a->offset += size;
54 a->length -= size; 53 a->length -= size;
55 list_add_tail(&b->nl_entry, &a->nl_entry); 54 list_add_tail(&b->nl_entry, &a->nl_entry);
56 if (b->free) 55 if (b->type == 0)
57 list_add_tail(&b->fl_entry, &a->fl_entry); 56 list_add_tail(&b->fl_entry, &a->fl_entry);
58 return b; 57 return b;
59} 58}
60 59
61static struct nouveau_mm_node * 60#define node(root, dir) ((root)->nl_entry.dir == &rmm->nodes) ? NULL : \
62nouveau_mm_merge(struct nouveau_mm *rmm, struct nouveau_mm_node *this) 61 list_entry((root)->nl_entry.dir, struct nouveau_mm_node, nl_entry)
63{
64 struct nouveau_mm_node *prev, *next;
65
66 /* try to merge with free adjacent entries of same type */
67 prev = list_entry(this->nl_entry.prev, struct nouveau_mm_node, nl_entry);
68 if (this->nl_entry.prev != &rmm->nodes) {
69 if (prev->free && prev->type == this->type) {
70 prev->length += this->length;
71 region_put(rmm, this);
72 this = prev;
73 }
74 }
75
76 next = list_entry(this->nl_entry.next, struct nouveau_mm_node, nl_entry);
77 if (this->nl_entry.next != &rmm->nodes) {
78 if (next->free && next->type == this->type) {
79 next->offset = this->offset;
80 next->length += this->length;
81 region_put(rmm, this);
82 this = next;
83 }
84 }
85
86 return this;
87}
88 62
89void 63void
90nouveau_mm_put(struct nouveau_mm *rmm, struct nouveau_mm_node *this) 64nouveau_mm_put(struct nouveau_mm *rmm, struct nouveau_mm_node *this)
91{ 65{
92 u32 block_s, block_l; 66 struct nouveau_mm_node *prev = node(this, prev);
67 struct nouveau_mm_node *next = node(this, next);
93 68
94 this->free = true;
95 list_add(&this->fl_entry, &rmm->free); 69 list_add(&this->fl_entry, &rmm->free);
96 this = nouveau_mm_merge(rmm, this); 70 this->type = 0;
97
98 /* any entirely free blocks now? we'll want to remove typing
99 * on them now so they can be use for any memory allocation
100 */
101 block_s = roundup(this->offset, rmm->block_size);
102 if (block_s + rmm->block_size > this->offset + this->length)
103 return;
104 71
105 /* split off any still-typed region at the start */ 72 if (prev && prev->type == 0) {
106 if (block_s != this->offset) { 73 prev->length += this->length;
107 if (!region_split(rmm, this, block_s - this->offset)) 74 region_put(rmm, this);
108 return; 75 this = prev;
109 } 76 }
110 77
111 /* split off the soon-to-be-untyped block(s) */ 78 if (next && next->type == 0) {
112 block_l = rounddown(this->length, rmm->block_size); 79 next->offset = this->offset;
113 if (block_l != this->length) { 80 next->length += this->length;
114 this = region_split(rmm, this, block_l); 81 region_put(rmm, this);
115 if (!this)
116 return;
117 } 82 }
118
119 /* mark as having no type, and retry merge with any adjacent
120 * untyped blocks
121 */
122 this->type = 0;
123 nouveau_mm_merge(rmm, this);
124} 83}
125 84
126int 85int
127nouveau_mm_get(struct nouveau_mm *rmm, int type, u32 size, u32 size_nc, 86nouveau_mm_get(struct nouveau_mm *rmm, int type, u32 size, u32 size_nc,
128 u32 align, struct nouveau_mm_node **pnode) 87 u32 align, struct nouveau_mm_node **pnode)
129{ 88{
130 struct nouveau_mm_node *this, *tmp, *next; 89 struct nouveau_mm_node *prev, *this, *next;
131 u32 splitoff, avail, alloc; 90 u32 min = size_nc ? size_nc : size;
132 91 u32 align_mask = align - 1;
133 list_for_each_entry_safe(this, tmp, &rmm->free, fl_entry) { 92 u32 splitoff;
134 next = list_entry(this->nl_entry.next, struct nouveau_mm_node, nl_entry); 93 u32 s, e;
135 if (this->nl_entry.next == &rmm->nodes) 94
136 next = NULL; 95 list_for_each_entry(this, &rmm->free, fl_entry) {
137 96 e = this->offset + this->length;
138 /* skip wrongly typed blocks */ 97 s = this->offset;
139 if (this->type && this->type != type) 98
99 prev = node(this, prev);
100 if (prev && prev->type != type)
101 s = roundup(s, rmm->block_size);
102
103 next = node(this, next);
104 if (next && next->type != type)
105 e = rounddown(e, rmm->block_size);
106
107 s = (s + align_mask) & ~align_mask;
108 e &= ~align_mask;
109 if (s > e || e - s < min)
140 continue; 110 continue;
141 111
142 /* account for alignment */ 112 splitoff = s - this->offset;
143 splitoff = this->offset & (align - 1); 113 if (splitoff && !region_split(rmm, this, splitoff))
144 if (splitoff) 114 return -ENOMEM;
145 splitoff = align - splitoff;
146
147 if (this->length <= splitoff)
148 continue;
149
150 /* determine total memory available from this, and
151 * the next block (if appropriate)
152 */
153 avail = this->length;
154 if (next && next->free && (!next->type || next->type == type))
155 avail += next->length;
156
157 avail -= splitoff;
158
159 /* determine allocation size */
160 if (size_nc) {
161 alloc = min(avail, size);
162 alloc = rounddown(alloc, size_nc);
163 if (alloc == 0)
164 continue;
165 } else {
166 alloc = size;
167 if (avail < alloc)
168 continue;
169 }
170
171 /* untyped block, split off a chunk that's a multiple
172 * of block_size and type it
173 */
174 if (!this->type) {
175 u32 block = roundup(alloc + splitoff, rmm->block_size);
176 if (this->length < block)
177 continue;
178
179 this = region_split(rmm, this, block);
180 if (!this)
181 return -ENOMEM;
182
183 this->type = type;
184 }
185
186 /* stealing memory from adjacent block */
187 if (alloc > this->length) {
188 u32 amount = alloc - (this->length - splitoff);
189
190 if (!next->type) {
191 amount = roundup(amount, rmm->block_size);
192
193 next = region_split(rmm, next, amount);
194 if (!next)
195 return -ENOMEM;
196
197 next->type = type;
198 }
199
200 this->length += amount;
201 next->offset += amount;
202 next->length -= amount;
203 if (!next->length) {
204 list_del(&next->nl_entry);
205 list_del(&next->fl_entry);
206 kfree(next);
207 }
208 }
209
210 if (splitoff) {
211 if (!region_split(rmm, this, splitoff))
212 return -ENOMEM;
213 }
214 115
215 this = region_split(rmm, this, alloc); 116 this = region_split(rmm, this, min(size, e - s));
216 if (this == NULL) 117 if (!this)
217 return -ENOMEM; 118 return -ENOMEM;
218 119
219 this->free = false; 120 this->type = type;
220 list_del(&this->fl_entry); 121 list_del(&this->fl_entry);
221 *pnode = this; 122 *pnode = this;
222 return 0; 123 return 0;
@@ -234,7 +135,6 @@ nouveau_mm_init(struct nouveau_mm **prmm, u32 offset, u32 length, u32 block)
234 heap = kzalloc(sizeof(*heap), GFP_KERNEL); 135 heap = kzalloc(sizeof(*heap), GFP_KERNEL);
235 if (!heap) 136 if (!heap)
236 return -ENOMEM; 137 return -ENOMEM;
237 heap->free = true;
238 heap->offset = roundup(offset, block); 138 heap->offset = roundup(offset, block);
239 heap->length = rounddown(offset + length, block) - heap->offset; 139 heap->length = rounddown(offset + length, block) - heap->offset;
240 140
diff --git a/drivers/gpu/drm/nouveau/nouveau_mm.h b/drivers/gpu/drm/nouveau/nouveau_mm.h
index af3844933036..798eaf39691c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mm.h
+++ b/drivers/gpu/drm/nouveau/nouveau_mm.h
@@ -30,9 +30,7 @@ struct nouveau_mm_node {
30 struct list_head fl_entry; 30 struct list_head fl_entry;
31 struct list_head rl_entry; 31 struct list_head rl_entry;
32 32
33 bool free; 33 u8 type;
34 int type;
35
36 u32 offset; 34 u32 offset;
37 u32 length; 35 u32 length;
38}; 36};
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c
index 19ef92a0375a..8870d72388c8 100644
--- a/drivers/gpu/drm/nouveau/nv40_graph.c
+++ b/drivers/gpu/drm/nouveau/nv40_graph.c
@@ -451,8 +451,7 @@ nv40_graph_register(struct drm_device *dev)
451 NVOBJ_CLASS(dev, 0x309e, GR); /* swzsurf */ 451 NVOBJ_CLASS(dev, 0x309e, GR); /* swzsurf */
452 452
453 /* curie */ 453 /* curie */
454 if (dev_priv->chipset >= 0x60 || 454 if (nv44_graph_class(dev))
455 0x00005450 & (1 << (dev_priv->chipset & 0x0f)))
456 NVOBJ_CLASS(dev, 0x4497, GR); 455 NVOBJ_CLASS(dev, 0x4497, GR);
457 else 456 else
458 NVOBJ_CLASS(dev, 0x4097, GR); 457 NVOBJ_CLASS(dev, 0x4097, GR);
diff --git a/drivers/gpu/drm/nouveau/nv40_grctx.c b/drivers/gpu/drm/nouveau/nv40_grctx.c
index ce585093264e..f70447d131d7 100644
--- a/drivers/gpu/drm/nouveau/nv40_grctx.c
+++ b/drivers/gpu/drm/nouveau/nv40_grctx.c
@@ -118,17 +118,6 @@
118 */ 118 */
119 119
120static int 120static int
121nv40_graph_4097(struct drm_device *dev)
122{
123 struct drm_nouveau_private *dev_priv = dev->dev_private;
124
125 if ((dev_priv->chipset & 0xf0) == 0x60)
126 return 0;
127
128 return !!(0x0baf & (1 << dev_priv->chipset));
129}
130
131static int
132nv40_graph_vs_count(struct drm_device *dev) 121nv40_graph_vs_count(struct drm_device *dev)
133{ 122{
134 struct drm_nouveau_private *dev_priv = dev->dev_private; 123 struct drm_nouveau_private *dev_priv = dev->dev_private;
@@ -219,7 +208,7 @@ nv40_graph_construct_general(struct nouveau_grctx *ctx)
219 gr_def(ctx, 0x4009dc, 0x80000000); 208 gr_def(ctx, 0x4009dc, 0x80000000);
220 } else { 209 } else {
221 cp_ctx(ctx, 0x400840, 20); 210 cp_ctx(ctx, 0x400840, 20);
222 if (!nv40_graph_4097(ctx->dev)) { 211 if (nv44_graph_class(ctx->dev)) {
223 for (i = 0; i < 8; i++) 212 for (i = 0; i < 8; i++)
224 gr_def(ctx, 0x400860 + (i * 4), 0x00000001); 213 gr_def(ctx, 0x400860 + (i * 4), 0x00000001);
225 } 214 }
@@ -228,7 +217,7 @@ nv40_graph_construct_general(struct nouveau_grctx *ctx)
228 gr_def(ctx, 0x400888, 0x00000040); 217 gr_def(ctx, 0x400888, 0x00000040);
229 cp_ctx(ctx, 0x400894, 11); 218 cp_ctx(ctx, 0x400894, 11);
230 gr_def(ctx, 0x400894, 0x00000040); 219 gr_def(ctx, 0x400894, 0x00000040);
231 if (nv40_graph_4097(ctx->dev)) { 220 if (!nv44_graph_class(ctx->dev)) {
232 for (i = 0; i < 8; i++) 221 for (i = 0; i < 8; i++)
233 gr_def(ctx, 0x4008a0 + (i * 4), 0x80000000); 222 gr_def(ctx, 0x4008a0 + (i * 4), 0x80000000);
234 } 223 }
@@ -546,7 +535,7 @@ nv40_graph_construct_state3d_2(struct nouveau_grctx *ctx)
546static void 535static void
547nv40_graph_construct_state3d_3(struct nouveau_grctx *ctx) 536nv40_graph_construct_state3d_3(struct nouveau_grctx *ctx)
548{ 537{
549 int len = nv40_graph_4097(ctx->dev) ? 0x0684 : 0x0084; 538 int len = nv44_graph_class(ctx->dev) ? 0x0084 : 0x0684;
550 539
551 cp_out (ctx, 0x300000); 540 cp_out (ctx, 0x300000);
552 cp_lsr (ctx, len - 4); 541 cp_lsr (ctx, len - 4);
@@ -582,11 +571,11 @@ nv40_graph_construct_shader(struct nouveau_grctx *ctx)
582 } else { 571 } else {
583 b0_offset = 0x1d40/4; /* 2200 */ 572 b0_offset = 0x1d40/4; /* 2200 */
584 b1_offset = 0x3f40/4; /* 0b00 : 0a40 */ 573 b1_offset = 0x3f40/4; /* 0b00 : 0a40 */
585 vs_len = nv40_graph_4097(dev) ? 0x4a40/4 : 0x4980/4; 574 vs_len = nv44_graph_class(dev) ? 0x4980/4 : 0x4a40/4;
586 } 575 }
587 576
588 cp_lsr(ctx, vs_len * vs_nr + 0x300/4); 577 cp_lsr(ctx, vs_len * vs_nr + 0x300/4);
589 cp_out(ctx, nv40_graph_4097(dev) ? 0x800041 : 0x800029); 578 cp_out(ctx, nv44_graph_class(dev) ? 0x800029 : 0x800041);
590 579
591 offset = ctx->ctxvals_pos; 580 offset = ctx->ctxvals_pos;
592 ctx->ctxvals_pos += (0x0300/4 + (vs_nr * vs_len)); 581 ctx->ctxvals_pos += (0x0300/4 + (vs_nr * vs_len));
diff --git a/drivers/gpu/drm/nouveau/nv40_mc.c b/drivers/gpu/drm/nouveau/nv40_mc.c
index e4e72c12ab6a..03c0d4c3f355 100644
--- a/drivers/gpu/drm/nouveau/nv40_mc.c
+++ b/drivers/gpu/drm/nouveau/nv40_mc.c
@@ -6,27 +6,17 @@
6int 6int
7nv40_mc_init(struct drm_device *dev) 7nv40_mc_init(struct drm_device *dev)
8{ 8{
9 struct drm_nouveau_private *dev_priv = dev->dev_private;
10 uint32_t tmp;
11
12 /* Power up everything, resetting each individual unit will 9 /* Power up everything, resetting each individual unit will
13 * be done later if needed. 10 * be done later if needed.
14 */ 11 */
15 nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF); 12 nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF);
16 13
17 switch (dev_priv->chipset) { 14 if (nv44_graph_class(dev)) {
18 case 0x44: 15 u32 tmp = nv_rd32(dev, NV04_PFB_FIFO_DATA);
19 case 0x46: /* G72 */
20 case 0x4e:
21 case 0x4c: /* C51_G7X */
22 tmp = nv_rd32(dev, NV04_PFB_FIFO_DATA);
23 nv_wr32(dev, NV40_PMC_1700, tmp); 16 nv_wr32(dev, NV40_PMC_1700, tmp);
24 nv_wr32(dev, NV40_PMC_1704, 0); 17 nv_wr32(dev, NV40_PMC_1704, 0);
25 nv_wr32(dev, NV40_PMC_1708, 0); 18 nv_wr32(dev, NV40_PMC_1708, 0);
26 nv_wr32(dev, NV40_PMC_170C, tmp); 19 nv_wr32(dev, NV40_PMC_170C, tmp);
27 break;
28 default:
29 break;
30 } 20 }
31 21
32 return 0; 22 return 0;
diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c
index 2e1b1cd19a4b..ea0041810ae3 100644
--- a/drivers/gpu/drm/nouveau/nv50_instmem.c
+++ b/drivers/gpu/drm/nouveau/nv50_instmem.c
@@ -332,8 +332,11 @@ nv50_instmem_get(struct nouveau_gpuobj *gpuobj, u32 size, u32 align)
332 gpuobj->vinst = node->vram->offset; 332 gpuobj->vinst = node->vram->offset;
333 333
334 if (gpuobj->flags & NVOBJ_FLAG_VM) { 334 if (gpuobj->flags & NVOBJ_FLAG_VM) {
335 ret = nouveau_vm_get(dev_priv->chan_vm, size, 12, 335 u32 flags = NV_MEM_ACCESS_RW;
336 NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS, 336 if (!(gpuobj->flags & NVOBJ_FLAG_VM_USER))
337 flags |= NV_MEM_ACCESS_SYS;
338
339 ret = nouveau_vm_get(dev_priv->chan_vm, size, 12, flags,
337 &node->chan_vma); 340 &node->chan_vma);
338 if (ret) { 341 if (ret) {
339 vram->put(dev, &node->vram); 342 vram->put(dev, &node->vram);
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c
index 5feacd5d5fa4..e6ea7d83187f 100644
--- a/drivers/gpu/drm/nouveau/nvc0_graph.c
+++ b/drivers/gpu/drm/nouveau/nvc0_graph.c
@@ -105,7 +105,8 @@ nvc0_graph_create_context_mmio_list(struct nouveau_channel *chan)
105 if (ret) 105 if (ret)
106 return ret; 106 return ret;
107 107
108 ret = nouveau_gpuobj_new(dev, NULL, 384 * 1024, 4096, NVOBJ_FLAG_VM, 108 ret = nouveau_gpuobj_new(dev, NULL, 384 * 1024, 4096,
109 NVOBJ_FLAG_VM | NVOBJ_FLAG_VM_USER,
109 &grch->unk418810); 110 &grch->unk418810);
110 if (ret) 111 if (ret)
111 return ret; 112 return ret;
diff --git a/drivers/gpu/drm/nouveau/nvc0_vm.c b/drivers/gpu/drm/nouveau/nvc0_vm.c
index 4b9251bb0ff4..e4e83c2caf5b 100644
--- a/drivers/gpu/drm/nouveau/nvc0_vm.c
+++ b/drivers/gpu/drm/nouveau/nvc0_vm.c
@@ -48,8 +48,8 @@ nvc0_vm_addr(struct nouveau_vma *vma, u64 phys, u32 memtype, u32 target)
48 phys >>= 8; 48 phys >>= 8;
49 49
50 phys |= 0x00000001; /* present */ 50 phys |= 0x00000001; /* present */
51// if (vma->access & NV_MEM_ACCESS_SYS) 51 if (vma->access & NV_MEM_ACCESS_SYS)
52// phys |= 0x00000002; 52 phys |= 0x00000002;
53 53
54 phys |= ((u64)target << 32); 54 phys |= ((u64)target << 32);
55 phys |= ((u64)memtype << 36); 55 phys |= ((u64)memtype << 36);
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 7fe8ebdcdc0e..a8973acb3987 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3002,31 +3002,6 @@ int evergreen_copy_blit(struct radeon_device *rdev,
3002 return 0; 3002 return 0;
3003} 3003}
3004 3004
3005static bool evergreen_card_posted(struct radeon_device *rdev)
3006{
3007 u32 reg;
3008
3009 /* first check CRTCs */
3010 if (rdev->flags & RADEON_IS_IGP)
3011 reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) |
3012 RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET);
3013 else
3014 reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) |
3015 RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET) |
3016 RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET) |
3017 RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET) |
3018 RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) |
3019 RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET);
3020 if (reg & EVERGREEN_CRTC_MASTER_EN)
3021 return true;
3022
3023 /* then check MEM_SIZE, in case the crtcs are off */
3024 if (RREG32(CONFIG_MEMSIZE))
3025 return true;
3026
3027 return false;
3028}
3029
3030/* Plan is to move initialization in that function and use 3005/* Plan is to move initialization in that function and use
3031 * helper function so that radeon_device_init pretty much 3006 * helper function so that radeon_device_init pretty much
3032 * do nothing more than calling asic specific function. This 3007 * do nothing more than calling asic specific function. This
@@ -3063,7 +3038,7 @@ int evergreen_init(struct radeon_device *rdev)
3063 if (radeon_asic_reset(rdev)) 3038 if (radeon_asic_reset(rdev))
3064 dev_warn(rdev->dev, "GPU reset failed !\n"); 3039 dev_warn(rdev->dev, "GPU reset failed !\n");
3065 /* Post card if necessary */ 3040 /* Post card if necessary */
3066 if (!evergreen_card_posted(rdev)) { 3041 if (!radeon_card_posted(rdev)) {
3067 if (!rdev->bios) { 3042 if (!rdev->bios) {
3068 dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); 3043 dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n");
3069 return -EINVAL; 3044 return -EINVAL;
@@ -3158,6 +3133,9 @@ static void evergreen_pcie_gen2_enable(struct radeon_device *rdev)
3158{ 3133{
3159 u32 link_width_cntl, speed_cntl; 3134 u32 link_width_cntl, speed_cntl;
3160 3135
3136 if (radeon_pcie_gen2 == 0)
3137 return;
3138
3161 if (rdev->flags & RADEON_IS_IGP) 3139 if (rdev->flags & RADEON_IS_IGP)
3162 return; 3140 return;
3163 3141
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index f637595b14e1..46da5142b131 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -2086,12 +2086,13 @@ int r100_asic_reset(struct radeon_device *rdev)
2086{ 2086{
2087 struct r100_mc_save save; 2087 struct r100_mc_save save;
2088 u32 status, tmp; 2088 u32 status, tmp;
2089 int ret = 0;
2089 2090
2090 r100_mc_stop(rdev, &save);
2091 status = RREG32(R_000E40_RBBM_STATUS); 2091 status = RREG32(R_000E40_RBBM_STATUS);
2092 if (!G_000E40_GUI_ACTIVE(status)) { 2092 if (!G_000E40_GUI_ACTIVE(status)) {
2093 return 0; 2093 return 0;
2094 } 2094 }
2095 r100_mc_stop(rdev, &save);
2095 status = RREG32(R_000E40_RBBM_STATUS); 2096 status = RREG32(R_000E40_RBBM_STATUS);
2096 dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); 2097 dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);
2097 /* stop CP */ 2098 /* stop CP */
@@ -2131,11 +2132,11 @@ int r100_asic_reset(struct radeon_device *rdev)
2131 G_000E40_TAM_BUSY(status) || G_000E40_PB_BUSY(status)) { 2132 G_000E40_TAM_BUSY(status) || G_000E40_PB_BUSY(status)) {
2132 dev_err(rdev->dev, "failed to reset GPU\n"); 2133 dev_err(rdev->dev, "failed to reset GPU\n");
2133 rdev->gpu_lockup = true; 2134 rdev->gpu_lockup = true;
2134 return -1; 2135 ret = -1;
2135 } 2136 } else
2137 dev_info(rdev->dev, "GPU reset succeed\n");
2136 r100_mc_resume(rdev, &save); 2138 r100_mc_resume(rdev, &save);
2137 dev_info(rdev->dev, "GPU reset succeed\n"); 2139 return ret;
2138 return 0;
2139} 2140}
2140 2141
2141void r100_set_common_regs(struct radeon_device *rdev) 2142void r100_set_common_regs(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index fae5e709f270..cf862ca580bf 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -405,12 +405,13 @@ int r300_asic_reset(struct radeon_device *rdev)
405{ 405{
406 struct r100_mc_save save; 406 struct r100_mc_save save;
407 u32 status, tmp; 407 u32 status, tmp;
408 int ret = 0;
408 409
409 r100_mc_stop(rdev, &save);
410 status = RREG32(R_000E40_RBBM_STATUS); 410 status = RREG32(R_000E40_RBBM_STATUS);
411 if (!G_000E40_GUI_ACTIVE(status)) { 411 if (!G_000E40_GUI_ACTIVE(status)) {
412 return 0; 412 return 0;
413 } 413 }
414 r100_mc_stop(rdev, &save);
414 status = RREG32(R_000E40_RBBM_STATUS); 415 status = RREG32(R_000E40_RBBM_STATUS);
415 dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); 416 dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);
416 /* stop CP */ 417 /* stop CP */
@@ -451,11 +452,11 @@ int r300_asic_reset(struct radeon_device *rdev)
451 if (G_000E40_GA_BUSY(status) || G_000E40_VAP_BUSY(status)) { 452 if (G_000E40_GA_BUSY(status) || G_000E40_VAP_BUSY(status)) {
452 dev_err(rdev->dev, "failed to reset GPU\n"); 453 dev_err(rdev->dev, "failed to reset GPU\n");
453 rdev->gpu_lockup = true; 454 rdev->gpu_lockup = true;
454 return -1; 455 ret = -1;
455 } 456 } else
457 dev_info(rdev->dev, "GPU reset succeed\n");
456 r100_mc_resume(rdev, &save); 458 r100_mc_resume(rdev, &save);
457 dev_info(rdev->dev, "GPU reset succeed\n"); 459 return ret;
458 return 0;
459} 460}
460 461
461/* 462/*
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 6b50716267c0..aca2236268fa 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2358,24 +2358,6 @@ void r600_clear_surface_reg(struct radeon_device *rdev, int reg)
2358 /* FIXME: implement */ 2358 /* FIXME: implement */
2359} 2359}
2360 2360
2361
2362bool r600_card_posted(struct radeon_device *rdev)
2363{
2364 uint32_t reg;
2365
2366 /* first check CRTCs */
2367 reg = RREG32(D1CRTC_CONTROL) |
2368 RREG32(D2CRTC_CONTROL);
2369 if (reg & CRTC_EN)
2370 return true;
2371
2372 /* then check MEM_SIZE, in case the crtcs are off */
2373 if (RREG32(CONFIG_MEMSIZE))
2374 return true;
2375
2376 return false;
2377}
2378
2379int r600_startup(struct radeon_device *rdev) 2361int r600_startup(struct radeon_device *rdev)
2380{ 2362{
2381 int r; 2363 int r;
@@ -2536,7 +2518,7 @@ int r600_init(struct radeon_device *rdev)
2536 if (r) 2518 if (r)
2537 return r; 2519 return r;
2538 /* Post card if necessary */ 2520 /* Post card if necessary */
2539 if (!r600_card_posted(rdev)) { 2521 if (!radeon_card_posted(rdev)) {
2540 if (!rdev->bios) { 2522 if (!rdev->bios) {
2541 dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); 2523 dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n");
2542 return -EINVAL; 2524 return -EINVAL;
@@ -3658,6 +3640,9 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev)
3658 u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp; 3640 u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp;
3659 u16 link_cntl2; 3641 u16 link_cntl2;
3660 3642
3643 if (radeon_pcie_gen2 == 0)
3644 return;
3645
3661 if (rdev->flags & RADEON_IS_IGP) 3646 if (rdev->flags & RADEON_IS_IGP)
3662 return; 3647 return;
3663 3648
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index e9486630a467..71d2a554bbe6 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -92,6 +92,7 @@ extern int radeon_tv;
92extern int radeon_audio; 92extern int radeon_audio;
93extern int radeon_disp_priority; 93extern int radeon_disp_priority;
94extern int radeon_hw_i2c; 94extern int radeon_hw_i2c;
95extern int radeon_pcie_gen2;
95 96
96/* 97/*
97 * Copy from radeon_drv.h so we don't have to include both and have conflicting 98 * Copy from radeon_drv.h so we don't have to include both and have conflicting
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index be5cb4f28c29..d5680a0c87af 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -104,6 +104,7 @@ int radeon_tv = 1;
104int radeon_audio = 1; 104int radeon_audio = 1;
105int radeon_disp_priority = 0; 105int radeon_disp_priority = 0;
106int radeon_hw_i2c = 0; 106int radeon_hw_i2c = 0;
107int radeon_pcie_gen2 = 0;
107 108
108MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 109MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
109module_param_named(no_wb, radeon_no_wb, int, 0444); 110module_param_named(no_wb, radeon_no_wb, int, 0444);
@@ -147,6 +148,9 @@ module_param_named(disp_priority, radeon_disp_priority, int, 0444);
147MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 148MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
148module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 149module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
149 150
151MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (1 = enable)");
152module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
153
150static int radeon_suspend(struct drm_device *dev, pm_message_t state) 154static int radeon_suspend(struct drm_device *dev, pm_message_t state)
151{ 155{
152 drm_radeon_private_t *dev_priv = dev->dev_private; 156 drm_radeon_private_t *dev_priv = dev->dev_private;
diff --git a/drivers/gpu/drm/radeon/reg_srcs/evergreen b/drivers/gpu/drm/radeon/reg_srcs/evergreen
index ac40fd39d787..9177f9191837 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/evergreen
+++ b/drivers/gpu/drm/radeon/reg_srcs/evergreen
@@ -439,7 +439,7 @@ evergreen 0x9400
4390x000286EC SPI_COMPUTE_NUM_THREAD_X 4390x000286EC SPI_COMPUTE_NUM_THREAD_X
4400x000286F0 SPI_COMPUTE_NUM_THREAD_Y 4400x000286F0 SPI_COMPUTE_NUM_THREAD_Y
4410x000286F4 SPI_COMPUTE_NUM_THREAD_Z 4410x000286F4 SPI_COMPUTE_NUM_THREAD_Z
4420x000286F8 GDS_ADDR_SIZE 4420x00028724 GDS_ADDR_SIZE
4430x00028780 CB_BLEND0_CONTROL 4430x00028780 CB_BLEND0_CONTROL
4440x00028784 CB_BLEND1_CONTROL 4440x00028784 CB_BLEND1_CONTROL
4450x00028788 CB_BLEND2_CONTROL 4450x00028788 CB_BLEND2_CONTROL
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index b4192acaab5f..5afe294ed51f 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -339,16 +339,16 @@ void rs600_bm_disable(struct radeon_device *rdev)
339 339
340int rs600_asic_reset(struct radeon_device *rdev) 340int rs600_asic_reset(struct radeon_device *rdev)
341{ 341{
342 u32 status, tmp;
343
344 struct rv515_mc_save save; 342 struct rv515_mc_save save;
343 u32 status, tmp;
344 int ret = 0;
345 345
346 /* Stops all mc clients */
347 rv515_mc_stop(rdev, &save);
348 status = RREG32(R_000E40_RBBM_STATUS); 346 status = RREG32(R_000E40_RBBM_STATUS);
349 if (!G_000E40_GUI_ACTIVE(status)) { 347 if (!G_000E40_GUI_ACTIVE(status)) {
350 return 0; 348 return 0;
351 } 349 }
350 /* Stops all mc clients */
351 rv515_mc_stop(rdev, &save);
352 status = RREG32(R_000E40_RBBM_STATUS); 352 status = RREG32(R_000E40_RBBM_STATUS);
353 dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); 353 dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);
354 /* stop CP */ 354 /* stop CP */
@@ -392,11 +392,11 @@ int rs600_asic_reset(struct radeon_device *rdev)
392 if (G_000E40_GA_BUSY(status) || G_000E40_VAP_BUSY(status)) { 392 if (G_000E40_GA_BUSY(status) || G_000E40_VAP_BUSY(status)) {
393 dev_err(rdev->dev, "failed to reset GPU\n"); 393 dev_err(rdev->dev, "failed to reset GPU\n");
394 rdev->gpu_lockup = true; 394 rdev->gpu_lockup = true;
395 return -1; 395 ret = -1;
396 } 396 } else
397 dev_info(rdev->dev, "GPU reset succeed\n");
397 rv515_mc_resume(rdev, &save); 398 rv515_mc_resume(rdev, &save);
398 dev_info(rdev->dev, "GPU reset succeed\n"); 399 return ret;
399 return 0;
400} 400}
401 401
402/* 402/*
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 3a264aa3a79a..491dc9000655 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1268,7 +1268,7 @@ int rv770_init(struct radeon_device *rdev)
1268 if (r) 1268 if (r)
1269 return r; 1269 return r;
1270 /* Post card if necessary */ 1270 /* Post card if necessary */
1271 if (!r600_card_posted(rdev)) { 1271 if (!radeon_card_posted(rdev)) {
1272 if (!rdev->bios) { 1272 if (!rdev->bios) {
1273 dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); 1273 dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n");
1274 return -EINVAL; 1274 return -EINVAL;
@@ -1372,6 +1372,9 @@ static void rv770_pcie_gen2_enable(struct radeon_device *rdev)
1372 u32 link_width_cntl, lanes, speed_cntl, tmp; 1372 u32 link_width_cntl, lanes, speed_cntl, tmp;
1373 u16 link_cntl2; 1373 u16 link_cntl2;
1374 1374
1375 if (radeon_pcie_gen2 == 0)
1376 return;
1377
1375 if (rdev->flags & RADEON_IS_IGP) 1378 if (rdev->flags & RADEON_IS_IGP)
1376 return; 1379 return;
1377 1380
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 35f00dae3676..773e484f1646 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -618,8 +618,8 @@ config SENSORS_LM93
618 depends on I2C 618 depends on I2C
619 select HWMON_VID 619 select HWMON_VID
620 help 620 help
621 If you say yes here you get support for National Semiconductor LM93 621 If you say yes here you get support for National Semiconductor LM93,
622 sensor chips. 622 LM94, and compatible sensor chips.
623 623
624 This driver can also be built as a module. If so, the module 624 This driver can also be built as a module. If so, the module
625 will be called lm93. 625 will be called lm93.
diff --git a/drivers/hwmon/lm93.c b/drivers/hwmon/lm93.c
index c9ed14eba5a6..3b43df418613 100644
--- a/drivers/hwmon/lm93.c
+++ b/drivers/hwmon/lm93.c
@@ -135,6 +135,11 @@
135#define LM93_MFR_ID 0x73 135#define LM93_MFR_ID 0x73
136#define LM93_MFR_ID_PROTOTYPE 0x72 136#define LM93_MFR_ID_PROTOTYPE 0x72
137 137
138/* LM94 REGISTER VALUES */
139#define LM94_MFR_ID_2 0x7a
140#define LM94_MFR_ID 0x79
141#define LM94_MFR_ID_PROTOTYPE 0x78
142
138/* SMBus capabilities */ 143/* SMBus capabilities */
139#define LM93_SMBUS_FUNC_FULL (I2C_FUNC_SMBUS_BYTE_DATA | \ 144#define LM93_SMBUS_FUNC_FULL (I2C_FUNC_SMBUS_BYTE_DATA | \
140 I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_DATA) 145 I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_DATA)
@@ -2504,6 +2509,7 @@ static int lm93_detect(struct i2c_client *client, struct i2c_board_info *info)
2504{ 2509{
2505 struct i2c_adapter *adapter = client->adapter; 2510 struct i2c_adapter *adapter = client->adapter;
2506 int mfr, ver; 2511 int mfr, ver;
2512 const char *name;
2507 2513
2508 if (!i2c_check_functionality(adapter, LM93_SMBUS_FUNC_MIN)) 2514 if (!i2c_check_functionality(adapter, LM93_SMBUS_FUNC_MIN))
2509 return -ENODEV; 2515 return -ENODEV;
@@ -2517,13 +2523,23 @@ static int lm93_detect(struct i2c_client *client, struct i2c_board_info *info)
2517 } 2523 }
2518 2524
2519 ver = lm93_read_byte(client, LM93_REG_VER); 2525 ver = lm93_read_byte(client, LM93_REG_VER);
2520 if (ver != LM93_MFR_ID && ver != LM93_MFR_ID_PROTOTYPE) { 2526 switch (ver) {
2527 case LM93_MFR_ID:
2528 case LM93_MFR_ID_PROTOTYPE:
2529 name = "lm93";
2530 break;
2531 case LM94_MFR_ID_2:
2532 case LM94_MFR_ID:
2533 case LM94_MFR_ID_PROTOTYPE:
2534 name = "lm94";
2535 break;
2536 default:
2521 dev_dbg(&adapter->dev, 2537 dev_dbg(&adapter->dev,
2522 "detect failed, bad version id 0x%02x!\n", ver); 2538 "detect failed, bad version id 0x%02x!\n", ver);
2523 return -ENODEV; 2539 return -ENODEV;
2524 } 2540 }
2525 2541
2526 strlcpy(info->type, "lm93", I2C_NAME_SIZE); 2542 strlcpy(info->type, name, I2C_NAME_SIZE);
2527 dev_dbg(&adapter->dev,"loading %s at %d,0x%02x\n", 2543 dev_dbg(&adapter->dev,"loading %s at %d,0x%02x\n",
2528 client->name, i2c_adapter_id(client->adapter), 2544 client->name, i2c_adapter_id(client->adapter),
2529 client->addr); 2545 client->addr);
@@ -2602,6 +2618,7 @@ static int lm93_remove(struct i2c_client *client)
2602 2618
2603static const struct i2c_device_id lm93_id[] = { 2619static const struct i2c_device_id lm93_id[] = {
2604 { "lm93", 0 }, 2620 { "lm93", 0 },
2621 { "lm94", 0 },
2605 { } 2622 { }
2606}; 2623};
2607MODULE_DEVICE_TABLE(i2c, lm93_id); 2624MODULE_DEVICE_TABLE(i2c, lm93_id);
diff --git a/drivers/infiniband/core/cache.c b/drivers/infiniband/core/cache.c
index 68883565b725..f9ba7d74dfc0 100644
--- a/drivers/infiniband/core/cache.c
+++ b/drivers/infiniband/core/cache.c
@@ -308,7 +308,7 @@ static void ib_cache_event(struct ib_event_handler *handler,
308 INIT_WORK(&work->work, ib_cache_task); 308 INIT_WORK(&work->work, ib_cache_task);
309 work->device = event->device; 309 work->device = event->device;
310 work->port_num = event->element.port_num; 310 work->port_num = event->element.port_num;
311 schedule_work(&work->work); 311 queue_work(ib_wq, &work->work);
312 } 312 }
313 } 313 }
314} 314}
@@ -368,7 +368,7 @@ static void ib_cache_cleanup_one(struct ib_device *device)
368 int p; 368 int p;
369 369
370 ib_unregister_event_handler(&device->cache.event_handler); 370 ib_unregister_event_handler(&device->cache.event_handler);
371 flush_scheduled_work(); 371 flush_workqueue(ib_wq);
372 372
373 for (p = 0; p <= end_port(device) - start_port(device); ++p) { 373 for (p = 0; p <= end_port(device) - start_port(device); ++p) {
374 kfree(device->cache.pkey_cache[p]); 374 kfree(device->cache.pkey_cache[p]);
diff --git a/drivers/infiniband/core/device.c b/drivers/infiniband/core/device.c
index a19effad0811..f793bf2f5da7 100644
--- a/drivers/infiniband/core/device.c
+++ b/drivers/infiniband/core/device.c
@@ -38,7 +38,6 @@
38#include <linux/slab.h> 38#include <linux/slab.h>
39#include <linux/init.h> 39#include <linux/init.h>
40#include <linux/mutex.h> 40#include <linux/mutex.h>
41#include <linux/workqueue.h>
42 41
43#include "core_priv.h" 42#include "core_priv.h"
44 43
@@ -52,6 +51,9 @@ struct ib_client_data {
52 void * data; 51 void * data;
53}; 52};
54 53
54struct workqueue_struct *ib_wq;
55EXPORT_SYMBOL_GPL(ib_wq);
56
55static LIST_HEAD(device_list); 57static LIST_HEAD(device_list);
56static LIST_HEAD(client_list); 58static LIST_HEAD(client_list);
57 59
@@ -718,6 +720,10 @@ static int __init ib_core_init(void)
718{ 720{
719 int ret; 721 int ret;
720 722
723 ib_wq = alloc_workqueue("infiniband", 0, 0);
724 if (!ib_wq)
725 return -ENOMEM;
726
721 ret = ib_sysfs_setup(); 727 ret = ib_sysfs_setup();
722 if (ret) 728 if (ret)
723 printk(KERN_WARNING "Couldn't create InfiniBand device class\n"); 729 printk(KERN_WARNING "Couldn't create InfiniBand device class\n");
@@ -726,6 +732,7 @@ static int __init ib_core_init(void)
726 if (ret) { 732 if (ret) {
727 printk(KERN_WARNING "Couldn't set up InfiniBand P_Key/GID cache\n"); 733 printk(KERN_WARNING "Couldn't set up InfiniBand P_Key/GID cache\n");
728 ib_sysfs_cleanup(); 734 ib_sysfs_cleanup();
735 destroy_workqueue(ib_wq);
729 } 736 }
730 737
731 return ret; 738 return ret;
@@ -736,7 +743,7 @@ static void __exit ib_core_cleanup(void)
736 ib_cache_cleanup(); 743 ib_cache_cleanup();
737 ib_sysfs_cleanup(); 744 ib_sysfs_cleanup();
738 /* Make sure that any pending umem accounting work is done. */ 745 /* Make sure that any pending umem accounting work is done. */
739 flush_scheduled_work(); 746 destroy_workqueue(ib_wq);
740} 747}
741 748
742module_init(ib_core_init); 749module_init(ib_core_init);
diff --git a/drivers/infiniband/core/sa_query.c b/drivers/infiniband/core/sa_query.c
index 91a660310b7c..e38be1bcc01c 100644
--- a/drivers/infiniband/core/sa_query.c
+++ b/drivers/infiniband/core/sa_query.c
@@ -425,7 +425,7 @@ static void ib_sa_event(struct ib_event_handler *handler, struct ib_event *event
425 port->sm_ah = NULL; 425 port->sm_ah = NULL;
426 spin_unlock_irqrestore(&port->ah_lock, flags); 426 spin_unlock_irqrestore(&port->ah_lock, flags);
427 427
428 schedule_work(&sa_dev->port[event->element.port_num - 428 queue_work(ib_wq, &sa_dev->port[event->element.port_num -
429 sa_dev->start_port].update_task); 429 sa_dev->start_port].update_task);
430 } 430 }
431} 431}
diff --git a/drivers/infiniband/core/umem.c b/drivers/infiniband/core/umem.c
index 415e186eee32..b645e558876f 100644
--- a/drivers/infiniband/core/umem.c
+++ b/drivers/infiniband/core/umem.c
@@ -262,7 +262,7 @@ void ib_umem_release(struct ib_umem *umem)
262 umem->mm = mm; 262 umem->mm = mm;
263 umem->diff = diff; 263 umem->diff = diff;
264 264
265 schedule_work(&umem->work); 265 queue_work(ib_wq, &umem->work);
266 return; 266 return;
267 } 267 }
268 } else 268 } else
diff --git a/drivers/infiniband/hw/amso1100/c2_rnic.c b/drivers/infiniband/hw/amso1100/c2_rnic.c
index 85cfae4cad71..8c81992fa6db 100644
--- a/drivers/infiniband/hw/amso1100/c2_rnic.c
+++ b/drivers/infiniband/hw/amso1100/c2_rnic.c
@@ -459,13 +459,12 @@ int __devinit c2_rnic_init(struct c2_dev *c2dev)
459 IB_DEVICE_MEM_WINDOW); 459 IB_DEVICE_MEM_WINDOW);
460 460
461 /* Allocate the qptr_array */ 461 /* Allocate the qptr_array */
462 c2dev->qptr_array = vmalloc(C2_MAX_CQS * sizeof(void *)); 462 c2dev->qptr_array = vzalloc(C2_MAX_CQS * sizeof(void *));
463 if (!c2dev->qptr_array) { 463 if (!c2dev->qptr_array) {
464 return -ENOMEM; 464 return -ENOMEM;
465 } 465 }
466 466
467 /* Inialize the qptr_array */ 467 /* Initialize the qptr_array */
468 memset(c2dev->qptr_array, 0, C2_MAX_CQS * sizeof(void *));
469 c2dev->qptr_array[0] = (void *) &c2dev->req_vq; 468 c2dev->qptr_array[0] = (void *) &c2dev->req_vq;
470 c2dev->qptr_array[1] = (void *) &c2dev->rep_vq; 469 c2dev->qptr_array[1] = (void *) &c2dev->rep_vq;
471 c2dev->qptr_array[2] = (void *) &c2dev->aeq; 470 c2dev->qptr_array[2] = (void *) &c2dev->aeq;
diff --git a/drivers/infiniband/hw/ehca/ipz_pt_fn.c b/drivers/infiniband/hw/ehca/ipz_pt_fn.c
index 1596e3085344..1898d6e7cce5 100644
--- a/drivers/infiniband/hw/ehca/ipz_pt_fn.c
+++ b/drivers/infiniband/hw/ehca/ipz_pt_fn.c
@@ -222,15 +222,14 @@ int ipz_queue_ctor(struct ehca_pd *pd, struct ipz_queue *queue,
222 queue->small_page = NULL; 222 queue->small_page = NULL;
223 223
224 /* allocate queue page pointers */ 224 /* allocate queue page pointers */
225 queue->queue_pages = kmalloc(nr_of_pages * sizeof(void *), GFP_KERNEL); 225 queue->queue_pages = kzalloc(nr_of_pages * sizeof(void *), GFP_KERNEL);
226 if (!queue->queue_pages) { 226 if (!queue->queue_pages) {
227 queue->queue_pages = vmalloc(nr_of_pages * sizeof(void *)); 227 queue->queue_pages = vzalloc(nr_of_pages * sizeof(void *));
228 if (!queue->queue_pages) { 228 if (!queue->queue_pages) {
229 ehca_gen_err("Couldn't allocate queue page list"); 229 ehca_gen_err("Couldn't allocate queue page list");
230 return 0; 230 return 0;
231 } 231 }
232 } 232 }
233 memset(queue->queue_pages, 0, nr_of_pages * sizeof(void *));
234 233
235 /* allocate actual queue pages */ 234 /* allocate actual queue pages */
236 if (is_small) { 235 if (is_small) {
diff --git a/drivers/infiniband/hw/ipath/ipath_driver.c b/drivers/infiniband/hw/ipath/ipath_driver.c
index b33f0457a1ff..47db4bf34628 100644
--- a/drivers/infiniband/hw/ipath/ipath_driver.c
+++ b/drivers/infiniband/hw/ipath/ipath_driver.c
@@ -199,12 +199,11 @@ static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev)
199 goto bail; 199 goto bail;
200 } 200 }
201 201
202 dd = vmalloc(sizeof(*dd)); 202 dd = vzalloc(sizeof(*dd));
203 if (!dd) { 203 if (!dd) {
204 dd = ERR_PTR(-ENOMEM); 204 dd = ERR_PTR(-ENOMEM);
205 goto bail; 205 goto bail;
206 } 206 }
207 memset(dd, 0, sizeof(*dd));
208 dd->ipath_unit = -1; 207 dd->ipath_unit = -1;
209 208
210 spin_lock_irqsave(&ipath_devs_lock, flags); 209 spin_lock_irqsave(&ipath_devs_lock, flags);
@@ -756,7 +755,7 @@ static void __devexit ipath_remove_one(struct pci_dev *pdev)
756 */ 755 */
757 ipath_shutdown_device(dd); 756 ipath_shutdown_device(dd);
758 757
759 flush_scheduled_work(); 758 flush_workqueue(ib_wq);
760 759
761 if (dd->verbs_dev) 760 if (dd->verbs_dev)
762 ipath_unregister_ib_device(dd->verbs_dev); 761 ipath_unregister_ib_device(dd->verbs_dev);
diff --git a/drivers/infiniband/hw/ipath/ipath_file_ops.c b/drivers/infiniband/hw/ipath/ipath_file_ops.c
index 9292a15ad7c4..6d4b29c4cd89 100644
--- a/drivers/infiniband/hw/ipath/ipath_file_ops.c
+++ b/drivers/infiniband/hw/ipath/ipath_file_ops.c
@@ -1530,7 +1530,7 @@ static int init_subports(struct ipath_devdata *dd,
1530 } 1530 }
1531 1531
1532 num_subports = uinfo->spu_subport_cnt; 1532 num_subports = uinfo->spu_subport_cnt;
1533 pd->subport_uregbase = vmalloc(PAGE_SIZE * num_subports); 1533 pd->subport_uregbase = vzalloc(PAGE_SIZE * num_subports);
1534 if (!pd->subport_uregbase) { 1534 if (!pd->subport_uregbase) {
1535 ret = -ENOMEM; 1535 ret = -ENOMEM;
1536 goto bail; 1536 goto bail;
@@ -1538,13 +1538,13 @@ static int init_subports(struct ipath_devdata *dd,
1538 /* Note: pd->port_rcvhdrq_size isn't initialized yet. */ 1538 /* Note: pd->port_rcvhdrq_size isn't initialized yet. */
1539 size = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize * 1539 size = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize *
1540 sizeof(u32), PAGE_SIZE) * num_subports; 1540 sizeof(u32), PAGE_SIZE) * num_subports;
1541 pd->subport_rcvhdr_base = vmalloc(size); 1541 pd->subport_rcvhdr_base = vzalloc(size);
1542 if (!pd->subport_rcvhdr_base) { 1542 if (!pd->subport_rcvhdr_base) {
1543 ret = -ENOMEM; 1543 ret = -ENOMEM;
1544 goto bail_ureg; 1544 goto bail_ureg;
1545 } 1545 }
1546 1546
1547 pd->subport_rcvegrbuf = vmalloc(pd->port_rcvegrbuf_chunks * 1547 pd->subport_rcvegrbuf = vzalloc(pd->port_rcvegrbuf_chunks *
1548 pd->port_rcvegrbuf_size * 1548 pd->port_rcvegrbuf_size *
1549 num_subports); 1549 num_subports);
1550 if (!pd->subport_rcvegrbuf) { 1550 if (!pd->subport_rcvegrbuf) {
@@ -1556,11 +1556,6 @@ static int init_subports(struct ipath_devdata *dd,
1556 pd->port_subport_id = uinfo->spu_subport_id; 1556 pd->port_subport_id = uinfo->spu_subport_id;
1557 pd->active_slaves = 1; 1557 pd->active_slaves = 1;
1558 set_bit(IPATH_PORT_MASTER_UNINIT, &pd->port_flag); 1558 set_bit(IPATH_PORT_MASTER_UNINIT, &pd->port_flag);
1559 memset(pd->subport_uregbase, 0, PAGE_SIZE * num_subports);
1560 memset(pd->subport_rcvhdr_base, 0, size);
1561 memset(pd->subport_rcvegrbuf, 0, pd->port_rcvegrbuf_chunks *
1562 pd->port_rcvegrbuf_size *
1563 num_subports);
1564 goto bail; 1559 goto bail;
1565 1560
1566bail_rhdr: 1561bail_rhdr:
diff --git a/drivers/infiniband/hw/ipath/ipath_init_chip.c b/drivers/infiniband/hw/ipath/ipath_init_chip.c
index 776938299e4c..fef0f4201257 100644
--- a/drivers/infiniband/hw/ipath/ipath_init_chip.c
+++ b/drivers/infiniband/hw/ipath/ipath_init_chip.c
@@ -442,7 +442,7 @@ static void init_shadow_tids(struct ipath_devdata *dd)
442 struct page **pages; 442 struct page **pages;
443 dma_addr_t *addrs; 443 dma_addr_t *addrs;
444 444
445 pages = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt * 445 pages = vzalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt *
446 sizeof(struct page *)); 446 sizeof(struct page *));
447 if (!pages) { 447 if (!pages) {
448 ipath_dev_err(dd, "failed to allocate shadow page * " 448 ipath_dev_err(dd, "failed to allocate shadow page * "
@@ -461,9 +461,6 @@ static void init_shadow_tids(struct ipath_devdata *dd)
461 return; 461 return;
462 } 462 }
463 463
464 memset(pages, 0, dd->ipath_cfgports * dd->ipath_rcvtidcnt *
465 sizeof(struct page *));
466
467 dd->ipath_pageshadow = pages; 464 dd->ipath_pageshadow = pages;
468 dd->ipath_physshadow = addrs; 465 dd->ipath_physshadow = addrs;
469} 466}
diff --git a/drivers/infiniband/hw/ipath/ipath_user_pages.c b/drivers/infiniband/hw/ipath/ipath_user_pages.c
index 5e86d73eba2a..bab9f74c0665 100644
--- a/drivers/infiniband/hw/ipath/ipath_user_pages.c
+++ b/drivers/infiniband/hw/ipath/ipath_user_pages.c
@@ -220,7 +220,7 @@ void ipath_release_user_pages_on_close(struct page **p, size_t num_pages)
220 work->mm = mm; 220 work->mm = mm;
221 work->num_pages = num_pages; 221 work->num_pages = num_pages;
222 222
223 schedule_work(&work->work); 223 queue_work(ib_wq, &work->work);
224 return; 224 return;
225 225
226bail_mm: 226bail_mm:
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c
index 4c85224aeaa7..c7a6213c6996 100644
--- a/drivers/infiniband/hw/mlx4/main.c
+++ b/drivers/infiniband/hw/mlx4/main.c
@@ -623,8 +623,9 @@ static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
623 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 623 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
624 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 624 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
625 625
626 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, !!(mqp->flags & 626 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
627 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK)); 627 !!(mqp->flags & MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
628 MLX4_PROTOCOL_IB);
628 if (err) 629 if (err)
629 return err; 630 return err;
630 631
@@ -635,7 +636,7 @@ static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
635 return 0; 636 return 0;
636 637
637err_add: 638err_add:
638 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw); 639 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, MLX4_PROTOCOL_IB);
639 return err; 640 return err;
640} 641}
641 642
@@ -665,7 +666,7 @@ static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
665 struct mlx4_ib_gid_entry *ge; 666 struct mlx4_ib_gid_entry *ge;
666 667
667 err = mlx4_multicast_detach(mdev->dev, 668 err = mlx4_multicast_detach(mdev->dev,
668 &mqp->mqp, gid->raw); 669 &mqp->mqp, gid->raw, MLX4_PROTOCOL_IB);
669 if (err) 670 if (err)
670 return err; 671 return err;
671 672
@@ -1005,7 +1006,8 @@ static void *mlx4_ib_add(struct mlx4_dev *dev)
1005 if (mlx4_uar_alloc(dev, &ibdev->priv_uar)) 1006 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
1006 goto err_pd; 1007 goto err_pd;
1007 1008
1008 ibdev->uar_map = ioremap(ibdev->priv_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 1009 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
1010 PAGE_SIZE);
1009 if (!ibdev->uar_map) 1011 if (!ibdev->uar_map)
1010 goto err_uar; 1012 goto err_uar;
1011 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); 1013 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
diff --git a/drivers/infiniband/hw/mthca/mthca_catas.c b/drivers/infiniband/hw/mthca/mthca_catas.c
index 0aa0110e4b6c..e4a08c2819e4 100644
--- a/drivers/infiniband/hw/mthca/mthca_catas.c
+++ b/drivers/infiniband/hw/mthca/mthca_catas.c
@@ -146,7 +146,7 @@ static void poll_catas(unsigned long dev_ptr)
146 146
147void mthca_start_catas_poll(struct mthca_dev *dev) 147void mthca_start_catas_poll(struct mthca_dev *dev)
148{ 148{
149 unsigned long addr; 149 phys_addr_t addr;
150 150
151 init_timer(&dev->catas_err.timer); 151 init_timer(&dev->catas_err.timer);
152 dev->catas_err.map = NULL; 152 dev->catas_err.map = NULL;
@@ -158,7 +158,8 @@ void mthca_start_catas_poll(struct mthca_dev *dev)
158 dev->catas_err.map = ioremap(addr, dev->catas_err.size * 4); 158 dev->catas_err.map = ioremap(addr, dev->catas_err.size * 4);
159 if (!dev->catas_err.map) { 159 if (!dev->catas_err.map) {
160 mthca_warn(dev, "couldn't map catastrophic error region " 160 mthca_warn(dev, "couldn't map catastrophic error region "
161 "at 0x%lx/0x%x\n", addr, dev->catas_err.size * 4); 161 "at 0x%llx/0x%x\n", (unsigned long long) addr,
162 dev->catas_err.size * 4);
162 return; 163 return;
163 } 164 }
164 165
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c
index f4ceecd9684b..7bfa2a164955 100644
--- a/drivers/infiniband/hw/mthca/mthca_cmd.c
+++ b/drivers/infiniband/hw/mthca/mthca_cmd.c
@@ -713,7 +713,7 @@ int mthca_RUN_FW(struct mthca_dev *dev, u8 *status)
713 713
714static void mthca_setup_cmd_doorbells(struct mthca_dev *dev, u64 base) 714static void mthca_setup_cmd_doorbells(struct mthca_dev *dev, u64 base)
715{ 715{
716 unsigned long addr; 716 phys_addr_t addr;
717 u16 max_off = 0; 717 u16 max_off = 0;
718 int i; 718 int i;
719 719
diff --git a/drivers/infiniband/hw/mthca/mthca_eq.c b/drivers/infiniband/hw/mthca/mthca_eq.c
index 8e8c728aff88..76785c653c13 100644
--- a/drivers/infiniband/hw/mthca/mthca_eq.c
+++ b/drivers/infiniband/hw/mthca/mthca_eq.c
@@ -653,7 +653,7 @@ static int mthca_map_reg(struct mthca_dev *dev,
653 unsigned long offset, unsigned long size, 653 unsigned long offset, unsigned long size,
654 void __iomem **map) 654 void __iomem **map)
655{ 655{
656 unsigned long base = pci_resource_start(dev->pdev, 0); 656 phys_addr_t base = pci_resource_start(dev->pdev, 0);
657 657
658 *map = ioremap(base + offset, size); 658 *map = ioremap(base + offset, size);
659 if (!*map) 659 if (!*map)
diff --git a/drivers/infiniband/hw/mthca/mthca_main.c b/drivers/infiniband/hw/mthca/mthca_main.c
index 5eee6665919a..8a40cd539ab1 100644
--- a/drivers/infiniband/hw/mthca/mthca_main.c
+++ b/drivers/infiniband/hw/mthca/mthca_main.c
@@ -790,7 +790,7 @@ static int mthca_setup_hca(struct mthca_dev *dev)
790 goto err_uar_table_free; 790 goto err_uar_table_free;
791 } 791 }
792 792
793 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 793 dev->kar = ioremap((phys_addr_t) dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
794 if (!dev->kar) { 794 if (!dev->kar) {
795 mthca_err(dev, "Couldn't map kernel access region, " 795 mthca_err(dev, "Couldn't map kernel access region, "
796 "aborting.\n"); 796 "aborting.\n");
diff --git a/drivers/infiniband/hw/mthca/mthca_mr.c b/drivers/infiniband/hw/mthca/mthca_mr.c
index 065b20899876..44045c8846db 100644
--- a/drivers/infiniband/hw/mthca/mthca_mr.c
+++ b/drivers/infiniband/hw/mthca/mthca_mr.c
@@ -853,7 +853,7 @@ void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
853 853
854int mthca_init_mr_table(struct mthca_dev *dev) 854int mthca_init_mr_table(struct mthca_dev *dev)
855{ 855{
856 unsigned long addr; 856 phys_addr_t addr;
857 int mpts, mtts, err, i; 857 int mpts, mtts, err, i;
858 858
859 err = mthca_alloc_init(&dev->mr_table.mpt_alloc, 859 err = mthca_alloc_init(&dev->mr_table.mpt_alloc,
diff --git a/drivers/infiniband/hw/nes/nes.c b/drivers/infiniband/hw/nes/nes.c
index 0c9f0aa5d4ea..3b4ec3238ceb 100644
--- a/drivers/infiniband/hw/nes/nes.c
+++ b/drivers/infiniband/hw/nes/nes.c
@@ -144,6 +144,7 @@ static int nes_inetaddr_event(struct notifier_block *notifier,
144 struct nes_device *nesdev; 144 struct nes_device *nesdev;
145 struct net_device *netdev; 145 struct net_device *netdev;
146 struct nes_vnic *nesvnic; 146 struct nes_vnic *nesvnic;
147 unsigned int is_bonded;
147 148
148 nes_debug(NES_DBG_NETDEV, "nes_inetaddr_event: ip address %pI4, netmask %pI4.\n", 149 nes_debug(NES_DBG_NETDEV, "nes_inetaddr_event: ip address %pI4, netmask %pI4.\n",
149 &ifa->ifa_address, &ifa->ifa_mask); 150 &ifa->ifa_address, &ifa->ifa_mask);
@@ -152,7 +153,8 @@ static int nes_inetaddr_event(struct notifier_block *notifier,
152 nesdev, nesdev->netdev[0]->name); 153 nesdev, nesdev->netdev[0]->name);
153 netdev = nesdev->netdev[0]; 154 netdev = nesdev->netdev[0];
154 nesvnic = netdev_priv(netdev); 155 nesvnic = netdev_priv(netdev);
155 if (netdev == event_netdev) { 156 is_bonded = (netdev->master == event_netdev);
157 if ((netdev == event_netdev) || is_bonded) {
156 if (nesvnic->rdma_enabled == 0) { 158 if (nesvnic->rdma_enabled == 0) {
157 nes_debug(NES_DBG_NETDEV, "Returning without processing event for %s since" 159 nes_debug(NES_DBG_NETDEV, "Returning without processing event for %s since"
158 " RDMA is not enabled.\n", 160 " RDMA is not enabled.\n",
@@ -169,7 +171,10 @@ static int nes_inetaddr_event(struct notifier_block *notifier,
169 nes_manage_arp_cache(netdev, netdev->dev_addr, 171 nes_manage_arp_cache(netdev, netdev->dev_addr,
170 ntohl(nesvnic->local_ipaddr), NES_ARP_DELETE); 172 ntohl(nesvnic->local_ipaddr), NES_ARP_DELETE);
171 nesvnic->local_ipaddr = 0; 173 nesvnic->local_ipaddr = 0;
172 return NOTIFY_OK; 174 if (is_bonded)
175 continue;
176 else
177 return NOTIFY_OK;
173 break; 178 break;
174 case NETDEV_UP: 179 case NETDEV_UP:
175 nes_debug(NES_DBG_NETDEV, "event:UP\n"); 180 nes_debug(NES_DBG_NETDEV, "event:UP\n");
@@ -178,15 +183,24 @@ static int nes_inetaddr_event(struct notifier_block *notifier,
178 nes_debug(NES_DBG_NETDEV, "Interface already has local_ipaddr\n"); 183 nes_debug(NES_DBG_NETDEV, "Interface already has local_ipaddr\n");
179 return NOTIFY_OK; 184 return NOTIFY_OK;
180 } 185 }
186 /* fall through */
187 case NETDEV_CHANGEADDR:
181 /* Add the address to the IP table */ 188 /* Add the address to the IP table */
182 nesvnic->local_ipaddr = ifa->ifa_address; 189 if (netdev->master)
190 nesvnic->local_ipaddr =
191 ((struct in_device *)netdev->master->ip_ptr)->ifa_list->ifa_address;
192 else
193 nesvnic->local_ipaddr = ifa->ifa_address;
183 194
184 nes_write_indexed(nesdev, 195 nes_write_indexed(nesdev,
185 NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)), 196 NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)),
186 ntohl(ifa->ifa_address)); 197 ntohl(nesvnic->local_ipaddr));
187 nes_manage_arp_cache(netdev, netdev->dev_addr, 198 nes_manage_arp_cache(netdev, netdev->dev_addr,
188 ntohl(nesvnic->local_ipaddr), NES_ARP_ADD); 199 ntohl(nesvnic->local_ipaddr), NES_ARP_ADD);
189 return NOTIFY_OK; 200 if (is_bonded)
201 continue;
202 else
203 return NOTIFY_OK;
190 break; 204 break;
191 default: 205 default:
192 break; 206 break;
@@ -660,6 +674,8 @@ static int __devinit nes_probe(struct pci_dev *pcidev, const struct pci_device_i
660 } 674 }
661 nes_notifiers_registered++; 675 nes_notifiers_registered++;
662 676
677 INIT_DELAYED_WORK(&nesdev->work, nes_recheck_link_status);
678
663 /* Initialize network devices */ 679 /* Initialize network devices */
664 if ((netdev = nes_netdev_init(nesdev, mmio_regs)) == NULL) 680 if ((netdev = nes_netdev_init(nesdev, mmio_regs)) == NULL)
665 goto bail7; 681 goto bail7;
@@ -742,6 +758,7 @@ static void __devexit nes_remove(struct pci_dev *pcidev)
742 struct nes_device *nesdev = pci_get_drvdata(pcidev); 758 struct nes_device *nesdev = pci_get_drvdata(pcidev);
743 struct net_device *netdev; 759 struct net_device *netdev;
744 int netdev_index = 0; 760 int netdev_index = 0;
761 unsigned long flags;
745 762
746 if (nesdev->netdev_count) { 763 if (nesdev->netdev_count) {
747 netdev = nesdev->netdev[netdev_index]; 764 netdev = nesdev->netdev[netdev_index];
@@ -768,6 +785,14 @@ static void __devexit nes_remove(struct pci_dev *pcidev)
768 free_irq(pcidev->irq, nesdev); 785 free_irq(pcidev->irq, nesdev);
769 tasklet_kill(&nesdev->dpc_tasklet); 786 tasklet_kill(&nesdev->dpc_tasklet);
770 787
788 spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags);
789 if (nesdev->link_recheck) {
790 spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags);
791 cancel_delayed_work_sync(&nesdev->work);
792 } else {
793 spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags);
794 }
795
771 /* Deallocate the Adapter Structure */ 796 /* Deallocate the Adapter Structure */
772 nes_destroy_adapter(nesdev->nesadapter); 797 nes_destroy_adapter(nesdev->nesadapter);
773 798
diff --git a/drivers/infiniband/hw/nes/nes.h b/drivers/infiniband/hw/nes/nes.h
index b3d145e82b4c..6fe79876009e 100644
--- a/drivers/infiniband/hw/nes/nes.h
+++ b/drivers/infiniband/hw/nes/nes.h
@@ -268,6 +268,9 @@ struct nes_device {
268 u8 napi_isr_ran; 268 u8 napi_isr_ran;
269 u8 disable_rx_flow_control; 269 u8 disable_rx_flow_control;
270 u8 disable_tx_flow_control; 270 u8 disable_tx_flow_control;
271
272 struct delayed_work work;
273 u8 link_recheck;
271}; 274};
272 275
273 276
@@ -507,6 +510,7 @@ void nes_nic_ce_handler(struct nes_device *, struct nes_hw_nic_cq *);
507void nes_iwarp_ce_handler(struct nes_device *, struct nes_hw_cq *); 510void nes_iwarp_ce_handler(struct nes_device *, struct nes_hw_cq *);
508int nes_destroy_cqp(struct nes_device *); 511int nes_destroy_cqp(struct nes_device *);
509int nes_nic_cm_xmit(struct sk_buff *, struct net_device *); 512int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
513void nes_recheck_link_status(struct work_struct *work);
510 514
511/* nes_nic.c */ 515/* nes_nic.c */
512struct net_device *nes_netdev_init(struct nes_device *, void __iomem *); 516struct net_device *nes_netdev_init(struct nes_device *, void __iomem *);
diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c
index 25ad0f9944c0..009ec814d517 100644
--- a/drivers/infiniband/hw/nes/nes_cm.c
+++ b/drivers/infiniband/hw/nes/nes_cm.c
@@ -1107,6 +1107,7 @@ static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip, int arpi
1107 struct flowi fl; 1107 struct flowi fl;
1108 struct neighbour *neigh; 1108 struct neighbour *neigh;
1109 int rc = arpindex; 1109 int rc = arpindex;
1110 struct net_device *netdev;
1110 struct nes_adapter *nesadapter = nesvnic->nesdev->nesadapter; 1111 struct nes_adapter *nesadapter = nesvnic->nesdev->nesadapter;
1111 1112
1112 memset(&fl, 0, sizeof fl); 1113 memset(&fl, 0, sizeof fl);
@@ -1117,7 +1118,12 @@ static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip, int arpi
1117 return rc; 1118 return rc;
1118 } 1119 }
1119 1120
1120 neigh = neigh_lookup(&arp_tbl, &rt->rt_gateway, nesvnic->netdev); 1121 if (nesvnic->netdev->master)
1122 netdev = nesvnic->netdev->master;
1123 else
1124 netdev = nesvnic->netdev;
1125
1126 neigh = neigh_lookup(&arp_tbl, &rt->rt_gateway, netdev);
1121 if (neigh) { 1127 if (neigh) {
1122 if (neigh->nud_state & NUD_VALID) { 1128 if (neigh->nud_state & NUD_VALID) {
1123 nes_debug(NES_DBG_CM, "Neighbor MAC address for 0x%08X" 1129 nes_debug(NES_DBG_CM, "Neighbor MAC address for 0x%08X"
diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c
index 1980a461c499..8b606fd64022 100644
--- a/drivers/infiniband/hw/nes/nes_hw.c
+++ b/drivers/infiniband/hw/nes/nes_hw.c
@@ -2608,6 +2608,13 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number)
2608 netif_start_queue(nesvnic->netdev); 2608 netif_start_queue(nesvnic->netdev);
2609 nesvnic->linkup = 1; 2609 nesvnic->linkup = 1;
2610 netif_carrier_on(nesvnic->netdev); 2610 netif_carrier_on(nesvnic->netdev);
2611
2612 spin_lock(&nesvnic->port_ibevent_lock);
2613 if (nesdev->iw_status == 0) {
2614 nesdev->iw_status = 1;
2615 nes_port_ibevent(nesvnic);
2616 }
2617 spin_unlock(&nesvnic->port_ibevent_lock);
2611 } 2618 }
2612 } 2619 }
2613 } else { 2620 } else {
@@ -2633,9 +2640,23 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number)
2633 netif_stop_queue(nesvnic->netdev); 2640 netif_stop_queue(nesvnic->netdev);
2634 nesvnic->linkup = 0; 2641 nesvnic->linkup = 0;
2635 netif_carrier_off(nesvnic->netdev); 2642 netif_carrier_off(nesvnic->netdev);
2643
2644 spin_lock(&nesvnic->port_ibevent_lock);
2645 if (nesdev->iw_status == 1) {
2646 nesdev->iw_status = 0;
2647 nes_port_ibevent(nesvnic);
2648 }
2649 spin_unlock(&nesvnic->port_ibevent_lock);
2636 } 2650 }
2637 } 2651 }
2638 } 2652 }
2653 if (nesadapter->phy_type[mac_index] == NES_PHY_TYPE_SFP_D) {
2654 if (nesdev->link_recheck)
2655 cancel_delayed_work(&nesdev->work);
2656 nesdev->link_recheck = 1;
2657 schedule_delayed_work(&nesdev->work,
2658 NES_LINK_RECHECK_DELAY);
2659 }
2639 } 2660 }
2640 2661
2641 spin_unlock_irqrestore(&nesadapter->phy_lock, flags); 2662 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
@@ -2643,6 +2664,80 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number)
2643 nesadapter->mac_sw_state[mac_number] = NES_MAC_SW_IDLE; 2664 nesadapter->mac_sw_state[mac_number] = NES_MAC_SW_IDLE;
2644} 2665}
2645 2666
2667void nes_recheck_link_status(struct work_struct *work)
2668{
2669 unsigned long flags;
2670 struct nes_device *nesdev = container_of(work, struct nes_device, work.work);
2671 struct nes_adapter *nesadapter = nesdev->nesadapter;
2672 struct nes_vnic *nesvnic;
2673 u32 mac_index = nesdev->mac_index;
2674 u16 phy_data;
2675 u16 temp_phy_data;
2676
2677 spin_lock_irqsave(&nesadapter->phy_lock, flags);
2678
2679 /* check link status */
2680 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 1, 0x9003);
2681 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
2682
2683 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 3, 0x0021);
2684 nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
2685 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 3, 0x0021);
2686 phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
2687
2688 phy_data = (!temp_phy_data && (phy_data == 0x8000)) ? 0x4 : 0x0;
2689
2690 nes_debug(NES_DBG_PHY, "%s: Phy data = 0x%04X, link was %s.\n",
2691 __func__, phy_data,
2692 nesadapter->mac_link_down[mac_index] ? "DOWN" : "UP");
2693
2694 if (phy_data & 0x0004) {
2695 nesadapter->mac_link_down[mac_index] = 0;
2696 list_for_each_entry(nesvnic, &nesadapter->nesvnic_list[mac_index], list) {
2697 if (nesvnic->linkup == 0) {
2698 printk(PFX "The Link is now up for port %s, netdev %p.\n",
2699 nesvnic->netdev->name, nesvnic->netdev);
2700 if (netif_queue_stopped(nesvnic->netdev))
2701 netif_start_queue(nesvnic->netdev);
2702 nesvnic->linkup = 1;
2703 netif_carrier_on(nesvnic->netdev);
2704
2705 spin_lock(&nesvnic->port_ibevent_lock);
2706 if (nesdev->iw_status == 0) {
2707 nesdev->iw_status = 1;
2708 nes_port_ibevent(nesvnic);
2709 }
2710 spin_unlock(&nesvnic->port_ibevent_lock);
2711 }
2712 }
2713
2714 } else {
2715 nesadapter->mac_link_down[mac_index] = 1;
2716 list_for_each_entry(nesvnic, &nesadapter->nesvnic_list[mac_index], list) {
2717 if (nesvnic->linkup == 1) {
2718 printk(PFX "The Link is now down for port %s, netdev %p.\n",
2719 nesvnic->netdev->name, nesvnic->netdev);
2720 if (!(netif_queue_stopped(nesvnic->netdev)))
2721 netif_stop_queue(nesvnic->netdev);
2722 nesvnic->linkup = 0;
2723 netif_carrier_off(nesvnic->netdev);
2724
2725 spin_lock(&nesvnic->port_ibevent_lock);
2726 if (nesdev->iw_status == 1) {
2727 nesdev->iw_status = 0;
2728 nes_port_ibevent(nesvnic);
2729 }
2730 spin_unlock(&nesvnic->port_ibevent_lock);
2731 }
2732 }
2733 }
2734 if (nesdev->link_recheck++ < NES_LINK_RECHECK_MAX)
2735 schedule_delayed_work(&nesdev->work, NES_LINK_RECHECK_DELAY);
2736 else
2737 nesdev->link_recheck = 0;
2738
2739 spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
2740}
2646 2741
2647 2742
2648static void nes_nic_napi_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq) 2743static void nes_nic_napi_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
diff --git a/drivers/infiniband/hw/nes/nes_hw.h b/drivers/infiniband/hw/nes/nes_hw.h
index 1204c3432b63..d2abe07133a5 100644
--- a/drivers/infiniband/hw/nes/nes_hw.h
+++ b/drivers/infiniband/hw/nes/nes_hw.h
@@ -1193,6 +1193,8 @@ struct nes_listener {
1193 1193
1194struct nes_ib_device; 1194struct nes_ib_device;
1195 1195
1196#define NES_EVENT_DELAY msecs_to_jiffies(100)
1197
1196struct nes_vnic { 1198struct nes_vnic {
1197 struct nes_ib_device *nesibdev; 1199 struct nes_ib_device *nesibdev;
1198 u64 sq_full; 1200 u64 sq_full;
@@ -1247,6 +1249,10 @@ struct nes_vnic {
1247 u32 lro_max_aggr; 1249 u32 lro_max_aggr;
1248 struct net_lro_mgr lro_mgr; 1250 struct net_lro_mgr lro_mgr;
1249 struct net_lro_desc lro_desc[NES_MAX_LRO_DESCRIPTORS]; 1251 struct net_lro_desc lro_desc[NES_MAX_LRO_DESCRIPTORS];
1252 struct timer_list event_timer;
1253 enum ib_event_type delayed_event;
1254 enum ib_event_type last_dispatched_event;
1255 spinlock_t port_ibevent_lock;
1250}; 1256};
1251 1257
1252struct nes_ib_device { 1258struct nes_ib_device {
@@ -1348,6 +1354,10 @@ struct nes_terminate_hdr {
1348#define BAD_FRAME_OFFSET 64 1354#define BAD_FRAME_OFFSET 64
1349#define CQE_MAJOR_DRV 0x8000 1355#define CQE_MAJOR_DRV 0x8000
1350 1356
1357/* Used for link status recheck after interrupt processing */
1358#define NES_LINK_RECHECK_DELAY msecs_to_jiffies(50)
1359#define NES_LINK_RECHECK_MAX 60
1360
1351#define nes_vlan_rx vlan_hwaccel_receive_skb 1361#define nes_vlan_rx vlan_hwaccel_receive_skb
1352#define nes_netif_rx netif_receive_skb 1362#define nes_netif_rx netif_receive_skb
1353 1363
diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c
index 5a4c36484722..2c9c1933bbe3 100644
--- a/drivers/infiniband/hw/nes/nes_nic.c
+++ b/drivers/infiniband/hw/nes/nes_nic.c
@@ -144,6 +144,7 @@ static int nes_netdev_open(struct net_device *netdev)
144 u32 nic_active_bit; 144 u32 nic_active_bit;
145 u32 nic_active; 145 u32 nic_active;
146 struct list_head *list_pos, *list_temp; 146 struct list_head *list_pos, *list_temp;
147 unsigned long flags;
147 148
148 assert(nesdev != NULL); 149 assert(nesdev != NULL);
149 150
@@ -233,18 +234,36 @@ static int nes_netdev_open(struct net_device *netdev)
233 first_nesvnic = nesvnic; 234 first_nesvnic = nesvnic;
234 } 235 }
235 236
236 if (nesvnic->of_device_registered) {
237 nesdev->iw_status = 1;
238 nesdev->nesadapter->send_term_ok = 1;
239 nes_port_ibevent(nesvnic);
240 }
241
242 if (first_nesvnic->linkup) { 237 if (first_nesvnic->linkup) {
243 /* Enable network packets */ 238 /* Enable network packets */
244 nesvnic->linkup = 1; 239 nesvnic->linkup = 1;
245 netif_start_queue(netdev); 240 netif_start_queue(netdev);
246 netif_carrier_on(netdev); 241 netif_carrier_on(netdev);
247 } 242 }
243
244 spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags);
245 if (nesdev->nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_SFP_D) {
246 if (nesdev->link_recheck)
247 cancel_delayed_work(&nesdev->work);
248 nesdev->link_recheck = 1;
249 schedule_delayed_work(&nesdev->work, NES_LINK_RECHECK_DELAY);
250 }
251 spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags);
252
253 spin_lock_irqsave(&nesvnic->port_ibevent_lock, flags);
254 if (nesvnic->of_device_registered) {
255 nesdev->nesadapter->send_term_ok = 1;
256 if (nesvnic->linkup == 1) {
257 if (nesdev->iw_status == 0) {
258 nesdev->iw_status = 1;
259 nes_port_ibevent(nesvnic);
260 }
261 } else {
262 nesdev->iw_status = 0;
263 }
264 }
265 spin_unlock_irqrestore(&nesvnic->port_ibevent_lock, flags);
266
248 napi_enable(&nesvnic->napi); 267 napi_enable(&nesvnic->napi);
249 nesvnic->netdev_open = 1; 268 nesvnic->netdev_open = 1;
250 269
@@ -263,6 +282,7 @@ static int nes_netdev_stop(struct net_device *netdev)
263 u32 nic_active; 282 u32 nic_active;
264 struct nes_vnic *first_nesvnic = NULL; 283 struct nes_vnic *first_nesvnic = NULL;
265 struct list_head *list_pos, *list_temp; 284 struct list_head *list_pos, *list_temp;
285 unsigned long flags;
266 286
267 nes_debug(NES_DBG_SHUTDOWN, "nesvnic=%p, nesdev=%p, netdev=%p %s\n", 287 nes_debug(NES_DBG_SHUTDOWN, "nesvnic=%p, nesdev=%p, netdev=%p %s\n",
268 nesvnic, nesdev, netdev, netdev->name); 288 nesvnic, nesdev, netdev, netdev->name);
@@ -315,12 +335,17 @@ static int nes_netdev_stop(struct net_device *netdev)
315 nic_active &= nic_active_mask; 335 nic_active &= nic_active_mask;
316 nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active); 336 nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active);
317 337
318 338 spin_lock_irqsave(&nesvnic->port_ibevent_lock, flags);
319 if (nesvnic->of_device_registered) { 339 if (nesvnic->of_device_registered) {
320 nesdev->nesadapter->send_term_ok = 0; 340 nesdev->nesadapter->send_term_ok = 0;
321 nesdev->iw_status = 0; 341 nesdev->iw_status = 0;
322 nes_port_ibevent(nesvnic); 342 if (nesvnic->linkup == 1)
343 nes_port_ibevent(nesvnic);
323 } 344 }
345 del_timer_sync(&nesvnic->event_timer);
346 nesvnic->event_timer.function = NULL;
347 spin_unlock_irqrestore(&nesvnic->port_ibevent_lock, flags);
348
324 nes_destroy_nic_qp(nesvnic); 349 nes_destroy_nic_qp(nesvnic);
325 350
326 nesvnic->netdev_open = 0; 351 nesvnic->netdev_open = 0;
@@ -1750,7 +1775,10 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev,
1750 nesvnic->rdma_enabled = 0; 1775 nesvnic->rdma_enabled = 0;
1751 } 1776 }
1752 nesvnic->nic_cq.cq_number = nesvnic->nic.qp_id; 1777 nesvnic->nic_cq.cq_number = nesvnic->nic.qp_id;
1778 init_timer(&nesvnic->event_timer);
1779 nesvnic->event_timer.function = NULL;
1753 spin_lock_init(&nesvnic->tx_lock); 1780 spin_lock_init(&nesvnic->tx_lock);
1781 spin_lock_init(&nesvnic->port_ibevent_lock);
1754 nesdev->netdev[nesdev->netdev_count] = netdev; 1782 nesdev->netdev[nesdev->netdev_count] = netdev;
1755 1783
1756 nes_debug(NES_DBG_INIT, "Adding nesvnic (%p) to the adapters nesvnic_list for MAC%d.\n", 1784 nes_debug(NES_DBG_INIT, "Adding nesvnic (%p) to the adapters nesvnic_list for MAC%d.\n",
@@ -1763,8 +1791,11 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev,
1763 (((PCI_FUNC(nesdev->pcidev->devfn) == 1) && (nesdev->mac_index == 2)) || 1791 (((PCI_FUNC(nesdev->pcidev->devfn) == 1) && (nesdev->mac_index == 2)) ||
1764 ((PCI_FUNC(nesdev->pcidev->devfn) == 2) && (nesdev->mac_index == 1)))))) { 1792 ((PCI_FUNC(nesdev->pcidev->devfn) == 2) && (nesdev->mac_index == 1)))))) {
1765 u32 u32temp; 1793 u32 u32temp;
1766 u32 link_mask; 1794 u32 link_mask = 0;
1767 u32 link_val; 1795 u32 link_val = 0;
1796 u16 temp_phy_data;
1797 u16 phy_data = 0;
1798 unsigned long flags;
1768 1799
1769 u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + 1800 u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 +
1770 (0x200 * (nesdev->mac_index & 1))); 1801 (0x200 * (nesdev->mac_index & 1)));
@@ -1786,6 +1817,23 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev,
1786 link_val = 0x02020000; 1817 link_val = 0x02020000;
1787 } 1818 }
1788 break; 1819 break;
1820 case NES_PHY_TYPE_SFP_D:
1821 spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags);
1822 nes_read_10G_phy_reg(nesdev,
1823 nesdev->nesadapter->phy_index[nesdev->mac_index],
1824 1, 0x9003);
1825 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1826 nes_read_10G_phy_reg(nesdev,
1827 nesdev->nesadapter->phy_index[nesdev->mac_index],
1828 3, 0x0021);
1829 nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1830 nes_read_10G_phy_reg(nesdev,
1831 nesdev->nesadapter->phy_index[nesdev->mac_index],
1832 3, 0x0021);
1833 phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1834 spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags);
1835 phy_data = (!temp_phy_data && (phy_data == 0x8000)) ? 0x4 : 0x0;
1836 break;
1789 default: 1837 default:
1790 link_mask = 0x0f1f0000; 1838 link_mask = 0x0f1f0000;
1791 link_val = 0x0f0f0000; 1839 link_val = 0x0f0f0000;
@@ -1795,8 +1843,14 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev,
1795 u32temp = nes_read_indexed(nesdev, 1843 u32temp = nes_read_indexed(nesdev,
1796 NES_IDX_PHY_PCS_CONTROL_STATUS0 + 1844 NES_IDX_PHY_PCS_CONTROL_STATUS0 +
1797 (0x200 * (nesdev->mac_index & 1))); 1845 (0x200 * (nesdev->mac_index & 1)));
1798 if ((u32temp & link_mask) == link_val) 1846
1799 nesvnic->linkup = 1; 1847 if (phy_type == NES_PHY_TYPE_SFP_D) {
1848 if (phy_data & 0x0004)
1849 nesvnic->linkup = 1;
1850 } else {
1851 if ((u32temp & link_mask) == link_val)
1852 nesvnic->linkup = 1;
1853 }
1800 1854
1801 /* clear the MAC interrupt status, assumes direct logical to physical mapping */ 1855 /* clear the MAC interrupt status, assumes direct logical to physical mapping */
1802 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index)); 1856 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index));
diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c
index 99933e4e48ff..26d8018c0a7c 100644
--- a/drivers/infiniband/hw/nes/nes_verbs.c
+++ b/drivers/infiniband/hw/nes/nes_verbs.c
@@ -3936,6 +3936,30 @@ struct nes_ib_device *nes_init_ofa_device(struct net_device *netdev)
3936 return nesibdev; 3936 return nesibdev;
3937} 3937}
3938 3938
3939
3940/**
3941 * nes_handle_delayed_event
3942 */
3943static void nes_handle_delayed_event(unsigned long data)
3944{
3945 struct nes_vnic *nesvnic = (void *) data;
3946
3947 if (nesvnic->delayed_event != nesvnic->last_dispatched_event) {
3948 struct ib_event event;
3949
3950 event.device = &nesvnic->nesibdev->ibdev;
3951 if (!event.device)
3952 goto stop_timer;
3953 event.event = nesvnic->delayed_event;
3954 event.element.port_num = nesvnic->logical_port + 1;
3955 ib_dispatch_event(&event);
3956 }
3957
3958stop_timer:
3959 nesvnic->event_timer.function = NULL;
3960}
3961
3962
3939void nes_port_ibevent(struct nes_vnic *nesvnic) 3963void nes_port_ibevent(struct nes_vnic *nesvnic)
3940{ 3964{
3941 struct nes_ib_device *nesibdev = nesvnic->nesibdev; 3965 struct nes_ib_device *nesibdev = nesvnic->nesibdev;
@@ -3944,7 +3968,18 @@ void nes_port_ibevent(struct nes_vnic *nesvnic)
3944 event.device = &nesibdev->ibdev; 3968 event.device = &nesibdev->ibdev;
3945 event.element.port_num = nesvnic->logical_port + 1; 3969 event.element.port_num = nesvnic->logical_port + 1;
3946 event.event = nesdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 3970 event.event = nesdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
3947 ib_dispatch_event(&event); 3971
3972 if (!nesvnic->event_timer.function) {
3973 ib_dispatch_event(&event);
3974 nesvnic->last_dispatched_event = event.event;
3975 nesvnic->event_timer.function = nes_handle_delayed_event;
3976 nesvnic->event_timer.data = (unsigned long) nesvnic;
3977 nesvnic->event_timer.expires = jiffies + NES_EVENT_DELAY;
3978 add_timer(&nesvnic->event_timer);
3979 } else {
3980 mod_timer(&nesvnic->event_timer, jiffies + NES_EVENT_DELAY);
3981 }
3982 nesvnic->delayed_event = event.event;
3948} 3983}
3949 3984
3950 3985
diff --git a/drivers/infiniband/hw/qib/qib_iba7220.c b/drivers/infiniband/hw/qib/qib_iba7220.c
index 127a0d5069f0..de799f17cb9e 100644
--- a/drivers/infiniband/hw/qib/qib_iba7220.c
+++ b/drivers/infiniband/hw/qib/qib_iba7220.c
@@ -1692,8 +1692,7 @@ static void qib_7220_quiet_serdes(struct qib_pportdata *ppd)
1692 ppd->lflags &= ~QIBL_IB_AUTONEG_INPROG; 1692 ppd->lflags &= ~QIBL_IB_AUTONEG_INPROG;
1693 spin_unlock_irqrestore(&ppd->lflags_lock, flags); 1693 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
1694 wake_up(&ppd->cpspec->autoneg_wait); 1694 wake_up(&ppd->cpspec->autoneg_wait);
1695 cancel_delayed_work(&ppd->cpspec->autoneg_work); 1695 cancel_delayed_work_sync(&ppd->cpspec->autoneg_work);
1696 flush_scheduled_work();
1697 1696
1698 shutdown_7220_relock_poll(ppd->dd); 1697 shutdown_7220_relock_poll(ppd->dd);
1699 val = qib_read_kreg64(ppd->dd, kr_xgxs_cfg); 1698 val = qib_read_kreg64(ppd->dd, kr_xgxs_cfg);
@@ -3515,8 +3514,8 @@ static void try_7220_autoneg(struct qib_pportdata *ppd)
3515 3514
3516 toggle_7220_rclkrls(ppd->dd); 3515 toggle_7220_rclkrls(ppd->dd);
3517 /* 2 msec is minimum length of a poll cycle */ 3516 /* 2 msec is minimum length of a poll cycle */
3518 schedule_delayed_work(&ppd->cpspec->autoneg_work, 3517 queue_delayed_work(ib_wq, &ppd->cpspec->autoneg_work,
3519 msecs_to_jiffies(2)); 3518 msecs_to_jiffies(2));
3520} 3519}
3521 3520
3522/* 3521/*
diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c
index abd409d592ef..50cceb3ab885 100644
--- a/drivers/infiniband/hw/qib/qib_iba7322.c
+++ b/drivers/infiniband/hw/qib/qib_iba7322.c
@@ -2406,10 +2406,9 @@ static void qib_7322_mini_quiet_serdes(struct qib_pportdata *ppd)
2406 ppd->lflags &= ~QIBL_IB_AUTONEG_INPROG; 2406 ppd->lflags &= ~QIBL_IB_AUTONEG_INPROG;
2407 spin_unlock_irqrestore(&ppd->lflags_lock, flags); 2407 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
2408 wake_up(&ppd->cpspec->autoneg_wait); 2408 wake_up(&ppd->cpspec->autoneg_wait);
2409 cancel_delayed_work(&ppd->cpspec->autoneg_work); 2409 cancel_delayed_work_sync(&ppd->cpspec->autoneg_work);
2410 if (ppd->dd->cspec->r1) 2410 if (ppd->dd->cspec->r1)
2411 cancel_delayed_work(&ppd->cpspec->ipg_work); 2411 cancel_delayed_work_sync(&ppd->cpspec->ipg_work);
2412 flush_scheduled_work();
2413 2412
2414 ppd->cpspec->chase_end = 0; 2413 ppd->cpspec->chase_end = 0;
2415 if (ppd->cpspec->chase_timer.data) /* if initted */ 2414 if (ppd->cpspec->chase_timer.data) /* if initted */
@@ -2706,7 +2705,7 @@ static noinline void unknown_7322_gpio_intr(struct qib_devdata *dd)
2706 if (!(pins & mask)) { 2705 if (!(pins & mask)) {
2707 ++handled; 2706 ++handled;
2708 qd->t_insert = get_jiffies_64(); 2707 qd->t_insert = get_jiffies_64();
2709 schedule_work(&qd->work); 2708 queue_work(ib_wq, &qd->work);
2710 } 2709 }
2711 } 2710 }
2712 } 2711 }
@@ -4990,8 +4989,8 @@ static void try_7322_autoneg(struct qib_pportdata *ppd)
4990 set_7322_ibspeed_fast(ppd, QIB_IB_DDR); 4989 set_7322_ibspeed_fast(ppd, QIB_IB_DDR);
4991 qib_7322_mini_pcs_reset(ppd); 4990 qib_7322_mini_pcs_reset(ppd);
4992 /* 2 msec is minimum length of a poll cycle */ 4991 /* 2 msec is minimum length of a poll cycle */
4993 schedule_delayed_work(&ppd->cpspec->autoneg_work, 4992 queue_delayed_work(ib_wq, &ppd->cpspec->autoneg_work,
4994 msecs_to_jiffies(2)); 4993 msecs_to_jiffies(2));
4995} 4994}
4996 4995
4997/* 4996/*
@@ -5121,7 +5120,8 @@ static void try_7322_ipg(struct qib_pportdata *ppd)
5121 ib_free_send_mad(send_buf); 5120 ib_free_send_mad(send_buf);
5122retry: 5121retry:
5123 delay = 2 << ppd->cpspec->ipg_tries; 5122 delay = 2 << ppd->cpspec->ipg_tries;
5124 schedule_delayed_work(&ppd->cpspec->ipg_work, msecs_to_jiffies(delay)); 5123 queue_delayed_work(ib_wq, &ppd->cpspec->ipg_work,
5124 msecs_to_jiffies(delay));
5125} 5125}
5126 5126
5127/* 5127/*
diff --git a/drivers/infiniband/hw/qib/qib_init.c b/drivers/infiniband/hw/qib/qib_init.c
index 7896afbb9ce8..ffefb78b8949 100644
--- a/drivers/infiniband/hw/qib/qib_init.c
+++ b/drivers/infiniband/hw/qib/qib_init.c
@@ -80,7 +80,6 @@ unsigned qib_wc_pat = 1; /* default (1) is to use PAT, not MTRR */
80module_param_named(wc_pat, qib_wc_pat, uint, S_IRUGO); 80module_param_named(wc_pat, qib_wc_pat, uint, S_IRUGO);
81MODULE_PARM_DESC(wc_pat, "enable write-combining via PAT mechanism"); 81MODULE_PARM_DESC(wc_pat, "enable write-combining via PAT mechanism");
82 82
83struct workqueue_struct *qib_wq;
84struct workqueue_struct *qib_cq_wq; 83struct workqueue_struct *qib_cq_wq;
85 84
86static void verify_interrupt(unsigned long); 85static void verify_interrupt(unsigned long);
@@ -270,23 +269,20 @@ static void init_shadow_tids(struct qib_devdata *dd)
270 struct page **pages; 269 struct page **pages;
271 dma_addr_t *addrs; 270 dma_addr_t *addrs;
272 271
273 pages = vmalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *)); 272 pages = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *));
274 if (!pages) { 273 if (!pages) {
275 qib_dev_err(dd, "failed to allocate shadow page * " 274 qib_dev_err(dd, "failed to allocate shadow page * "
276 "array, no expected sends!\n"); 275 "array, no expected sends!\n");
277 goto bail; 276 goto bail;
278 } 277 }
279 278
280 addrs = vmalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t)); 279 addrs = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t));
281 if (!addrs) { 280 if (!addrs) {
282 qib_dev_err(dd, "failed to allocate shadow dma handle " 281 qib_dev_err(dd, "failed to allocate shadow dma handle "
283 "array, no expected sends!\n"); 282 "array, no expected sends!\n");
284 goto bail_free; 283 goto bail_free;
285 } 284 }
286 285
287 memset(pages, 0, dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *));
288 memset(addrs, 0, dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t));
289
290 dd->pageshadow = pages; 286 dd->pageshadow = pages;
291 dd->physshadow = addrs; 287 dd->physshadow = addrs;
292 return; 288 return;
@@ -1047,24 +1043,10 @@ static int __init qlogic_ib_init(void)
1047 if (ret) 1043 if (ret)
1048 goto bail; 1044 goto bail;
1049 1045
1050 /*
1051 * We create our own workqueue mainly because we want to be
1052 * able to flush it when devices are being removed. We can't
1053 * use schedule_work()/flush_scheduled_work() because both
1054 * unregister_netdev() and linkwatch_event take the rtnl lock,
1055 * so flush_scheduled_work() can deadlock during device
1056 * removal.
1057 */
1058 qib_wq = create_workqueue("qib");
1059 if (!qib_wq) {
1060 ret = -ENOMEM;
1061 goto bail_dev;
1062 }
1063
1064 qib_cq_wq = create_singlethread_workqueue("qib_cq"); 1046 qib_cq_wq = create_singlethread_workqueue("qib_cq");
1065 if (!qib_cq_wq) { 1047 if (!qib_cq_wq) {
1066 ret = -ENOMEM; 1048 ret = -ENOMEM;
1067 goto bail_wq; 1049 goto bail_dev;
1068 } 1050 }
1069 1051
1070 /* 1052 /*
@@ -1094,8 +1076,6 @@ bail_unit:
1094 idr_destroy(&qib_unit_table); 1076 idr_destroy(&qib_unit_table);
1095bail_cq_wq: 1077bail_cq_wq:
1096 destroy_workqueue(qib_cq_wq); 1078 destroy_workqueue(qib_cq_wq);
1097bail_wq:
1098 destroy_workqueue(qib_wq);
1099bail_dev: 1079bail_dev:
1100 qib_dev_cleanup(); 1080 qib_dev_cleanup();
1101bail: 1081bail:
@@ -1119,7 +1099,6 @@ static void __exit qlogic_ib_cleanup(void)
1119 1099
1120 pci_unregister_driver(&qib_driver); 1100 pci_unregister_driver(&qib_driver);
1121 1101
1122 destroy_workqueue(qib_wq);
1123 destroy_workqueue(qib_cq_wq); 1102 destroy_workqueue(qib_cq_wq);
1124 1103
1125 qib_cpulist_count = 0; 1104 qib_cpulist_count = 0;
@@ -1292,7 +1271,7 @@ static int __devinit qib_init_one(struct pci_dev *pdev,
1292 1271
1293 if (qib_mini_init || initfail || ret) { 1272 if (qib_mini_init || initfail || ret) {
1294 qib_stop_timers(dd); 1273 qib_stop_timers(dd);
1295 flush_scheduled_work(); 1274 flush_workqueue(ib_wq);
1296 for (pidx = 0; pidx < dd->num_pports; ++pidx) 1275 for (pidx = 0; pidx < dd->num_pports; ++pidx)
1297 dd->f_quiet_serdes(dd->pport + pidx); 1276 dd->f_quiet_serdes(dd->pport + pidx);
1298 if (qib_mini_init) 1277 if (qib_mini_init)
@@ -1341,8 +1320,8 @@ static void __devexit qib_remove_one(struct pci_dev *pdev)
1341 1320
1342 qib_stop_timers(dd); 1321 qib_stop_timers(dd);
1343 1322
1344 /* wait until all of our (qsfp) schedule_work() calls complete */ 1323 /* wait until all of our (qsfp) queue_work() calls complete */
1345 flush_scheduled_work(); 1324 flush_workqueue(ib_wq);
1346 1325
1347 ret = qibfs_remove(dd); 1326 ret = qibfs_remove(dd);
1348 if (ret) 1327 if (ret)
diff --git a/drivers/infiniband/hw/qib/qib_qsfp.c b/drivers/infiniband/hw/qib/qib_qsfp.c
index 35b3604b691d..3374a52232c1 100644
--- a/drivers/infiniband/hw/qib/qib_qsfp.c
+++ b/drivers/infiniband/hw/qib/qib_qsfp.c
@@ -485,7 +485,7 @@ void qib_qsfp_init(struct qib_qsfp_data *qd,
485 goto bail; 485 goto bail;
486 /* We see a module, but it may be unwise to look yet. Just schedule */ 486 /* We see a module, but it may be unwise to look yet. Just schedule */
487 qd->t_insert = get_jiffies_64(); 487 qd->t_insert = get_jiffies_64();
488 schedule_work(&qd->work); 488 queue_work(ib_wq, &qd->work);
489bail: 489bail:
490 return; 490 return;
491} 491}
@@ -493,10 +493,9 @@ bail:
493void qib_qsfp_deinit(struct qib_qsfp_data *qd) 493void qib_qsfp_deinit(struct qib_qsfp_data *qd)
494{ 494{
495 /* 495 /*
496 * There is nothing to do here for now. our 496 * There is nothing to do here for now. our work is scheduled
497 * work is scheduled with schedule_work(), and 497 * with queue_work(), and flush_workqueue() from remove_one
498 * flush_scheduled_work() from remove_one will 498 * will block until all work setup with queue_work()
499 * block until all work ssetup with schedule_work()
500 * completes. 499 * completes.
501 */ 500 */
502} 501}
diff --git a/drivers/infiniband/hw/qib/qib_verbs.h b/drivers/infiniband/hw/qib/qib_verbs.h
index 63b22a9a7feb..95e5b47223b3 100644
--- a/drivers/infiniband/hw/qib/qib_verbs.h
+++ b/drivers/infiniband/hw/qib/qib_verbs.h
@@ -805,7 +805,6 @@ static inline int qib_send_ok(struct qib_qp *qp)
805 !(qp->s_flags & QIB_S_ANY_WAIT_SEND)); 805 !(qp->s_flags & QIB_S_ANY_WAIT_SEND));
806} 806}
807 807
808extern struct workqueue_struct *qib_wq;
809extern struct workqueue_struct *qib_cq_wq; 808extern struct workqueue_struct *qib_cq_wq;
810 809
811/* 810/*
@@ -814,7 +813,7 @@ extern struct workqueue_struct *qib_cq_wq;
814static inline void qib_schedule_send(struct qib_qp *qp) 813static inline void qib_schedule_send(struct qib_qp *qp)
815{ 814{
816 if (qib_send_ok(qp)) 815 if (qib_send_ok(qp))
817 queue_work(qib_wq, &qp->s_work); 816 queue_work(ib_wq, &qp->s_work);
818} 817}
819 818
820static inline int qib_pkey_ok(u16 pkey1, u16 pkey2) 819static inline int qib_pkey_ok(u16 pkey1, u16 pkey2)
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_cm.c b/drivers/infiniband/ulp/ipoib/ipoib_cm.c
index c1c49f2d35b5..93d55806b967 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_cm.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_cm.c
@@ -352,15 +352,13 @@ static int ipoib_cm_nonsrq_init_rx(struct net_device *dev, struct ib_cm_id *cm_i
352 int ret; 352 int ret;
353 int i; 353 int i;
354 354
355 rx->rx_ring = vmalloc(ipoib_recvq_size * sizeof *rx->rx_ring); 355 rx->rx_ring = vzalloc(ipoib_recvq_size * sizeof *rx->rx_ring);
356 if (!rx->rx_ring) { 356 if (!rx->rx_ring) {
357 printk(KERN_WARNING "%s: failed to allocate CM non-SRQ ring (%d entries)\n", 357 printk(KERN_WARNING "%s: failed to allocate CM non-SRQ ring (%d entries)\n",
358 priv->ca->name, ipoib_recvq_size); 358 priv->ca->name, ipoib_recvq_size);
359 return -ENOMEM; 359 return -ENOMEM;
360 } 360 }
361 361
362 memset(rx->rx_ring, 0, ipoib_recvq_size * sizeof *rx->rx_ring);
363
364 t = kmalloc(sizeof *t, GFP_KERNEL); 362 t = kmalloc(sizeof *t, GFP_KERNEL);
365 if (!t) { 363 if (!t) {
366 ret = -ENOMEM; 364 ret = -ENOMEM;
@@ -1097,13 +1095,12 @@ static int ipoib_cm_tx_init(struct ipoib_cm_tx *p, u32 qpn,
1097 struct ipoib_dev_priv *priv = netdev_priv(p->dev); 1095 struct ipoib_dev_priv *priv = netdev_priv(p->dev);
1098 int ret; 1096 int ret;
1099 1097
1100 p->tx_ring = vmalloc(ipoib_sendq_size * sizeof *p->tx_ring); 1098 p->tx_ring = vzalloc(ipoib_sendq_size * sizeof *p->tx_ring);
1101 if (!p->tx_ring) { 1099 if (!p->tx_ring) {
1102 ipoib_warn(priv, "failed to allocate tx ring\n"); 1100 ipoib_warn(priv, "failed to allocate tx ring\n");
1103 ret = -ENOMEM; 1101 ret = -ENOMEM;
1104 goto err_tx; 1102 goto err_tx;
1105 } 1103 }
1106 memset(p->tx_ring, 0, ipoib_sendq_size * sizeof *p->tx_ring);
1107 1104
1108 p->qp = ipoib_cm_create_tx_qp(p->dev, p); 1105 p->qp = ipoib_cm_create_tx_qp(p->dev, p);
1109 if (IS_ERR(p->qp)) { 1106 if (IS_ERR(p->qp)) {
@@ -1521,7 +1518,7 @@ static void ipoib_cm_create_srq(struct net_device *dev, int max_sge)
1521 return; 1518 return;
1522 } 1519 }
1523 1520
1524 priv->cm.srq_ring = vmalloc(ipoib_recvq_size * sizeof *priv->cm.srq_ring); 1521 priv->cm.srq_ring = vzalloc(ipoib_recvq_size * sizeof *priv->cm.srq_ring);
1525 if (!priv->cm.srq_ring) { 1522 if (!priv->cm.srq_ring) {
1526 printk(KERN_WARNING "%s: failed to allocate CM SRQ ring (%d entries)\n", 1523 printk(KERN_WARNING "%s: failed to allocate CM SRQ ring (%d entries)\n",
1527 priv->ca->name, ipoib_recvq_size); 1524 priv->ca->name, ipoib_recvq_size);
@@ -1530,7 +1527,6 @@ static void ipoib_cm_create_srq(struct net_device *dev, int max_sge)
1530 return; 1527 return;
1531 } 1528 }
1532 1529
1533 memset(priv->cm.srq_ring, 0, ipoib_recvq_size * sizeof *priv->cm.srq_ring);
1534} 1530}
1535 1531
1536int ipoib_cm_dev_init(struct net_device *dev) 1532int ipoib_cm_dev_init(struct net_device *dev)
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c
index 7a07a728fe0d..aca3b44f7aed 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -916,13 +916,12 @@ int ipoib_dev_init(struct net_device *dev, struct ib_device *ca, int port)
916 goto out; 916 goto out;
917 } 917 }
918 918
919 priv->tx_ring = vmalloc(ipoib_sendq_size * sizeof *priv->tx_ring); 919 priv->tx_ring = vzalloc(ipoib_sendq_size * sizeof *priv->tx_ring);
920 if (!priv->tx_ring) { 920 if (!priv->tx_ring) {
921 printk(KERN_WARNING "%s: failed to allocate TX ring (%d entries)\n", 921 printk(KERN_WARNING "%s: failed to allocate TX ring (%d entries)\n",
922 ca->name, ipoib_sendq_size); 922 ca->name, ipoib_sendq_size);
923 goto out_rx_ring_cleanup; 923 goto out_rx_ring_cleanup;
924 } 924 }
925 memset(priv->tx_ring, 0, ipoib_sendq_size * sizeof *priv->tx_ring);
926 925
927 /* priv->tx_head, tx_tail & tx_outstanding are already 0 */ 926 /* priv->tx_head, tx_tail & tx_outstanding are already 0 */
928 927
diff --git a/drivers/infiniband/ulp/srp/ib_srp.c b/drivers/infiniband/ulp/srp/ib_srp.c
index 4b62105ed1e8..83664ed2804f 100644
--- a/drivers/infiniband/ulp/srp/ib_srp.c
+++ b/drivers/infiniband/ulp/srp/ib_srp.c
@@ -638,7 +638,7 @@ err:
638 if (target->state == SRP_TARGET_CONNECTING) { 638 if (target->state == SRP_TARGET_CONNECTING) {
639 target->state = SRP_TARGET_DEAD; 639 target->state = SRP_TARGET_DEAD;
640 INIT_WORK(&target->work, srp_remove_work); 640 INIT_WORK(&target->work, srp_remove_work);
641 schedule_work(&target->work); 641 queue_work(ib_wq, &target->work);
642 } 642 }
643 spin_unlock_irq(&target->lock); 643 spin_unlock_irq(&target->lock);
644 644
@@ -1132,15 +1132,12 @@ static int srp_queuecommand(struct Scsi_Host *shost, struct scsi_cmnd *scmnd)
1132 1132
1133 spin_lock_irqsave(&target->lock, flags); 1133 spin_lock_irqsave(&target->lock, flags);
1134 iu = __srp_get_tx_iu(target, SRP_IU_CMD); 1134 iu = __srp_get_tx_iu(target, SRP_IU_CMD);
1135 if (iu) {
1136 req = list_first_entry(&target->free_reqs, struct srp_request,
1137 list);
1138 list_del(&req->list);
1139 }
1140 spin_unlock_irqrestore(&target->lock, flags);
1141
1142 if (!iu) 1135 if (!iu)
1143 goto err; 1136 goto err_unlock;
1137
1138 req = list_first_entry(&target->free_reqs, struct srp_request, list);
1139 list_del(&req->list);
1140 spin_unlock_irqrestore(&target->lock, flags);
1144 1141
1145 dev = target->srp_host->srp_dev->dev; 1142 dev = target->srp_host->srp_dev->dev;
1146 ib_dma_sync_single_for_cpu(dev, iu->dma, srp_max_iu_len, 1143 ib_dma_sync_single_for_cpu(dev, iu->dma, srp_max_iu_len,
@@ -1185,6 +1182,8 @@ err_iu:
1185 1182
1186 spin_lock_irqsave(&target->lock, flags); 1183 spin_lock_irqsave(&target->lock, flags);
1187 list_add(&req->list, &target->free_reqs); 1184 list_add(&req->list, &target->free_reqs);
1185
1186err_unlock:
1188 spin_unlock_irqrestore(&target->lock, flags); 1187 spin_unlock_irqrestore(&target->lock, flags);
1189 1188
1190err: 1189err:
@@ -2199,7 +2198,7 @@ static void srp_remove_one(struct ib_device *device)
2199 * started before we marked our target ports as 2198 * started before we marked our target ports as
2200 * removed, and any target port removal tasks. 2199 * removed, and any target port removal tasks.
2201 */ 2200 */
2202 flush_scheduled_work(); 2201 flush_workqueue(ib_wq);
2203 2202
2204 list_for_each_entry_safe(target, tmp_target, 2203 list_for_each_entry_safe(target, tmp_target,
2205 &host->target_list, list) { 2204 &host->target_list, list) {
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index b1f768917395..77414702cb00 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -53,9 +53,10 @@ config MTD_PARTITIONS
53 devices. Partitioning on NFTL 'devices' is a different - that's the 53 devices. Partitioning on NFTL 'devices' is a different - that's the
54 'normal' form of partitioning used on a block device. 54 'normal' form of partitioning used on a block device.
55 55
56if MTD_PARTITIONS
57
56config MTD_REDBOOT_PARTS 58config MTD_REDBOOT_PARTS
57 tristate "RedBoot partition table parsing" 59 tristate "RedBoot partition table parsing"
58 depends on MTD_PARTITIONS
59 ---help--- 60 ---help---
60 RedBoot is a ROM monitor and bootloader which deals with multiple 61 RedBoot is a ROM monitor and bootloader which deals with multiple
61 'images' in flash devices by putting a table one of the erase 62 'images' in flash devices by putting a table one of the erase
@@ -72,9 +73,10 @@ config MTD_REDBOOT_PARTS
72 SA1100 map driver (CONFIG_MTD_SA1100) has an option for this, for 73 SA1100 map driver (CONFIG_MTD_SA1100) has an option for this, for
73 example. 74 example.
74 75
76if MTD_REDBOOT_PARTS
77
75config MTD_REDBOOT_DIRECTORY_BLOCK 78config MTD_REDBOOT_DIRECTORY_BLOCK
76 int "Location of RedBoot partition table" 79 int "Location of RedBoot partition table"
77 depends on MTD_REDBOOT_PARTS
78 default "-1" 80 default "-1"
79 ---help--- 81 ---help---
80 This option is the Linux counterpart to the 82 This option is the Linux counterpart to the
@@ -91,18 +93,18 @@ config MTD_REDBOOT_DIRECTORY_BLOCK
91 93
92config MTD_REDBOOT_PARTS_UNALLOCATED 94config MTD_REDBOOT_PARTS_UNALLOCATED
93 bool "Include unallocated flash regions" 95 bool "Include unallocated flash regions"
94 depends on MTD_REDBOOT_PARTS
95 help 96 help
96 If you need to register each unallocated flash region as a MTD 97 If you need to register each unallocated flash region as a MTD
97 'partition', enable this option. 98 'partition', enable this option.
98 99
99config MTD_REDBOOT_PARTS_READONLY 100config MTD_REDBOOT_PARTS_READONLY
100 bool "Force read-only for RedBoot system images" 101 bool "Force read-only for RedBoot system images"
101 depends on MTD_REDBOOT_PARTS
102 help 102 help
103 If you need to force read-only for 'RedBoot', 'RedBoot Config' and 103 If you need to force read-only for 'RedBoot', 'RedBoot Config' and
104 'FIS directory' images, enable this option. 104 'FIS directory' images, enable this option.
105 105
106endif # MTD_REDBOOT_PARTS
107
106config MTD_CMDLINE_PARTS 108config MTD_CMDLINE_PARTS
107 bool "Command line partition table parsing" 109 bool "Command line partition table parsing"
108 depends on MTD_PARTITIONS = "y" && MTD = "y" 110 depends on MTD_PARTITIONS = "y" && MTD = "y"
@@ -142,7 +144,7 @@ config MTD_CMDLINE_PARTS
142 144
143config MTD_AFS_PARTS 145config MTD_AFS_PARTS
144 tristate "ARM Firmware Suite partition parsing" 146 tristate "ARM Firmware Suite partition parsing"
145 depends on ARM && MTD_PARTITIONS 147 depends on ARM
146 ---help--- 148 ---help---
147 The ARM Firmware Suite allows the user to divide flash devices into 149 The ARM Firmware Suite allows the user to divide flash devices into
148 multiple 'images'. Each such image has a header containing its name 150 multiple 'images'. Each such image has a header containing its name
@@ -158,8 +160,8 @@ config MTD_AFS_PARTS
158 example. 160 example.
159 161
160config MTD_OF_PARTS 162config MTD_OF_PARTS
161 tristate "Flash partition map based on OF description" 163 def_bool y
162 depends on OF && MTD_PARTITIONS 164 depends on OF
163 help 165 help
164 This provides a partition parsing function which derives 166 This provides a partition parsing function which derives
165 the partition map from the children of the flash node, 167 the partition map from the children of the flash node,
@@ -167,10 +169,11 @@ config MTD_OF_PARTS
167 169
168config MTD_AR7_PARTS 170config MTD_AR7_PARTS
169 tristate "TI AR7 partitioning support" 171 tristate "TI AR7 partitioning support"
170 depends on MTD_PARTITIONS
171 ---help--- 172 ---help---
172 TI AR7 partitioning support 173 TI AR7 partitioning support
173 174
175endif # MTD_PARTITIONS
176
174comment "User Modules And Translation Layers" 177comment "User Modules And Translation Layers"
175 178
176config MTD_CHAR 179config MTD_CHAR
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index 760abc533395..d4e7f25b1ebb 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -6,13 +6,13 @@
6obj-$(CONFIG_MTD) += mtd.o 6obj-$(CONFIG_MTD) += mtd.o
7mtd-y := mtdcore.o mtdsuper.o 7mtd-y := mtdcore.o mtdsuper.o
8mtd-$(CONFIG_MTD_PARTITIONS) += mtdpart.o 8mtd-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
9mtd-$(CONFIG_MTD_OF_PARTS) += ofpart.o
9 10
10obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o 11obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
11obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o 12obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
12obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o 13obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
13obj-$(CONFIG_MTD_AFS_PARTS) += afs.o 14obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
14obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o 15obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
15obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
16 16
17# 'Users' - code which presents functionality to userspace. 17# 'Users' - code which presents functionality to userspace.
18obj-$(CONFIG_MTD_CHAR) += mtdchar.o 18obj-$(CONFIG_MTD_CHAR) += mtdchar.o
diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
index ad9268b44416..a8c3e1c9b02a 100644
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -162,7 +162,7 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp)
162#endif 162#endif
163 163
164/* Atmel chips don't use the same PRI format as Intel chips */ 164/* Atmel chips don't use the same PRI format as Intel chips */
165static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) 165static void fixup_convert_atmel_pri(struct mtd_info *mtd)
166{ 166{
167 struct map_info *map = mtd->priv; 167 struct map_info *map = mtd->priv;
168 struct cfi_private *cfi = map->fldrv_priv; 168 struct cfi_private *cfi = map->fldrv_priv;
@@ -202,7 +202,7 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
202 cfi->cfiq->BufWriteTimeoutMax = 0; 202 cfi->cfiq->BufWriteTimeoutMax = 0;
203} 203}
204 204
205static void fixup_at49bv640dx_lock(struct mtd_info *mtd, void *param) 205static void fixup_at49bv640dx_lock(struct mtd_info *mtd)
206{ 206{
207 struct map_info *map = mtd->priv; 207 struct map_info *map = mtd->priv;
208 struct cfi_private *cfi = map->fldrv_priv; 208 struct cfi_private *cfi = map->fldrv_priv;
@@ -214,7 +214,7 @@ static void fixup_at49bv640dx_lock(struct mtd_info *mtd, void *param)
214 214
215#ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE 215#ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
216/* Some Intel Strata Flash prior to FPO revision C has bugs in this area */ 216/* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
217static void fixup_intel_strataflash(struct mtd_info *mtd, void* param) 217static void fixup_intel_strataflash(struct mtd_info *mtd)
218{ 218{
219 struct map_info *map = mtd->priv; 219 struct map_info *map = mtd->priv;
220 struct cfi_private *cfi = map->fldrv_priv; 220 struct cfi_private *cfi = map->fldrv_priv;
@@ -227,7 +227,7 @@ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
227#endif 227#endif
228 228
229#ifdef CMDSET0001_DISABLE_WRITE_SUSPEND 229#ifdef CMDSET0001_DISABLE_WRITE_SUSPEND
230static void fixup_no_write_suspend(struct mtd_info *mtd, void* param) 230static void fixup_no_write_suspend(struct mtd_info *mtd)
231{ 231{
232 struct map_info *map = mtd->priv; 232 struct map_info *map = mtd->priv;
233 struct cfi_private *cfi = map->fldrv_priv; 233 struct cfi_private *cfi = map->fldrv_priv;
@@ -240,7 +240,7 @@ static void fixup_no_write_suspend(struct mtd_info *mtd, void* param)
240} 240}
241#endif 241#endif
242 242
243static void fixup_st_m28w320ct(struct mtd_info *mtd, void* param) 243static void fixup_st_m28w320ct(struct mtd_info *mtd)
244{ 244{
245 struct map_info *map = mtd->priv; 245 struct map_info *map = mtd->priv;
246 struct cfi_private *cfi = map->fldrv_priv; 246 struct cfi_private *cfi = map->fldrv_priv;
@@ -249,7 +249,7 @@ static void fixup_st_m28w320ct(struct mtd_info *mtd, void* param)
249 cfi->cfiq->BufWriteTimeoutMax = 0; /* Not supported */ 249 cfi->cfiq->BufWriteTimeoutMax = 0; /* Not supported */
250} 250}
251 251
252static void fixup_st_m28w320cb(struct mtd_info *mtd, void* param) 252static void fixup_st_m28w320cb(struct mtd_info *mtd)
253{ 253{
254 struct map_info *map = mtd->priv; 254 struct map_info *map = mtd->priv;
255 struct cfi_private *cfi = map->fldrv_priv; 255 struct cfi_private *cfi = map->fldrv_priv;
@@ -259,7 +259,7 @@ static void fixup_st_m28w320cb(struct mtd_info *mtd, void* param)
259 (cfi->cfiq->EraseRegionInfo[1] & 0xffff0000) | 0x3e; 259 (cfi->cfiq->EraseRegionInfo[1] & 0xffff0000) | 0x3e;
260}; 260};
261 261
262static void fixup_use_point(struct mtd_info *mtd, void *param) 262static void fixup_use_point(struct mtd_info *mtd)
263{ 263{
264 struct map_info *map = mtd->priv; 264 struct map_info *map = mtd->priv;
265 if (!mtd->point && map_is_linear(map)) { 265 if (!mtd->point && map_is_linear(map)) {
@@ -268,7 +268,7 @@ static void fixup_use_point(struct mtd_info *mtd, void *param)
268 } 268 }
269} 269}
270 270
271static void fixup_use_write_buffers(struct mtd_info *mtd, void *param) 271static void fixup_use_write_buffers(struct mtd_info *mtd)
272{ 272{
273 struct map_info *map = mtd->priv; 273 struct map_info *map = mtd->priv;
274 struct cfi_private *cfi = map->fldrv_priv; 274 struct cfi_private *cfi = map->fldrv_priv;
@@ -282,7 +282,7 @@ static void fixup_use_write_buffers(struct mtd_info *mtd, void *param)
282/* 282/*
283 * Some chips power-up with all sectors locked by default. 283 * Some chips power-up with all sectors locked by default.
284 */ 284 */
285static void fixup_unlock_powerup_lock(struct mtd_info *mtd, void *param) 285static void fixup_unlock_powerup_lock(struct mtd_info *mtd)
286{ 286{
287 struct map_info *map = mtd->priv; 287 struct map_info *map = mtd->priv;
288 struct cfi_private *cfi = map->fldrv_priv; 288 struct cfi_private *cfi = map->fldrv_priv;
@@ -295,31 +295,31 @@ static void fixup_unlock_powerup_lock(struct mtd_info *mtd, void *param)
295} 295}
296 296
297static struct cfi_fixup cfi_fixup_table[] = { 297static struct cfi_fixup cfi_fixup_table[] = {
298 { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, 298 { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri },
299 { CFI_MFR_ATMEL, AT49BV640D, fixup_at49bv640dx_lock, NULL }, 299 { CFI_MFR_ATMEL, AT49BV640D, fixup_at49bv640dx_lock },
300 { CFI_MFR_ATMEL, AT49BV640DT, fixup_at49bv640dx_lock, NULL }, 300 { CFI_MFR_ATMEL, AT49BV640DT, fixup_at49bv640dx_lock },
301#ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE 301#ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
302 { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL }, 302 { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash },
303#endif 303#endif
304#ifdef CMDSET0001_DISABLE_WRITE_SUSPEND 304#ifdef CMDSET0001_DISABLE_WRITE_SUSPEND
305 { CFI_MFR_ANY, CFI_ID_ANY, fixup_no_write_suspend, NULL }, 305 { CFI_MFR_ANY, CFI_ID_ANY, fixup_no_write_suspend },
306#endif 306#endif
307#if !FORCE_WORD_WRITE 307#if !FORCE_WORD_WRITE
308 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL }, 308 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers },
309#endif 309#endif
310 { CFI_MFR_ST, 0x00ba, /* M28W320CT */ fixup_st_m28w320ct, NULL }, 310 { CFI_MFR_ST, 0x00ba, /* M28W320CT */ fixup_st_m28w320ct },
311 { CFI_MFR_ST, 0x00bb, /* M28W320CB */ fixup_st_m28w320cb, NULL }, 311 { CFI_MFR_ST, 0x00bb, /* M28W320CB */ fixup_st_m28w320cb },
312 { CFI_MFR_INTEL, CFI_ID_ANY, fixup_unlock_powerup_lock, NULL, }, 312 { CFI_MFR_INTEL, CFI_ID_ANY, fixup_unlock_powerup_lock },
313 { 0, 0, NULL, NULL } 313 { 0, 0, NULL }
314}; 314};
315 315
316static struct cfi_fixup jedec_fixup_table[] = { 316static struct cfi_fixup jedec_fixup_table[] = {
317 { CFI_MFR_INTEL, I82802AB, fixup_use_fwh_lock, NULL, }, 317 { CFI_MFR_INTEL, I82802AB, fixup_use_fwh_lock },
318 { CFI_MFR_INTEL, I82802AC, fixup_use_fwh_lock, NULL, }, 318 { CFI_MFR_INTEL, I82802AC, fixup_use_fwh_lock },
319 { CFI_MFR_ST, M50LPW080, fixup_use_fwh_lock, NULL, }, 319 { CFI_MFR_ST, M50LPW080, fixup_use_fwh_lock },
320 { CFI_MFR_ST, M50FLW080A, fixup_use_fwh_lock, NULL, }, 320 { CFI_MFR_ST, M50FLW080A, fixup_use_fwh_lock },
321 { CFI_MFR_ST, M50FLW080B, fixup_use_fwh_lock, NULL, }, 321 { CFI_MFR_ST, M50FLW080B, fixup_use_fwh_lock },
322 { 0, 0, NULL, NULL } 322 { 0, 0, NULL }
323}; 323};
324static struct cfi_fixup fixup_table[] = { 324static struct cfi_fixup fixup_table[] = {
325 /* The CFI vendor ids and the JEDEC vendor IDs appear 325 /* The CFI vendor ids and the JEDEC vendor IDs appear
@@ -327,8 +327,8 @@ static struct cfi_fixup fixup_table[] = {
327 * well. This table is to pick all cases where 327 * well. This table is to pick all cases where
328 * we know that is the case. 328 * we know that is the case.
329 */ 329 */
330 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_point, NULL }, 330 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_point },
331 { 0, 0, NULL, NULL } 331 { 0, 0, NULL }
332}; 332};
333 333
334static void cfi_fixup_major_minor(struct cfi_private *cfi, 334static void cfi_fixup_major_minor(struct cfi_private *cfi,
@@ -455,6 +455,7 @@ struct mtd_info *cfi_cmdset_0001(struct map_info *map, int primary)
455 mtd->flags = MTD_CAP_NORFLASH; 455 mtd->flags = MTD_CAP_NORFLASH;
456 mtd->name = map->name; 456 mtd->name = map->name;
457 mtd->writesize = 1; 457 mtd->writesize = 1;
458 mtd->writebufsize = 1 << cfi->cfiq->MaxBufWriteSize;
458 459
459 mtd->reboot_notifier.notifier_call = cfi_intelext_reboot; 460 mtd->reboot_notifier.notifier_call = cfi_intelext_reboot;
460 461
diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index 3b8e32d87977..f072fcfde04e 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -134,7 +134,7 @@ static void cfi_tell_features(struct cfi_pri_amdstd *extp)
134 134
135#ifdef AMD_BOOTLOC_BUG 135#ifdef AMD_BOOTLOC_BUG
136/* Wheee. Bring me the head of someone at AMD. */ 136/* Wheee. Bring me the head of someone at AMD. */
137static void fixup_amd_bootblock(struct mtd_info *mtd, void* param) 137static void fixup_amd_bootblock(struct mtd_info *mtd)
138{ 138{
139 struct map_info *map = mtd->priv; 139 struct map_info *map = mtd->priv;
140 struct cfi_private *cfi = map->fldrv_priv; 140 struct cfi_private *cfi = map->fldrv_priv;
@@ -186,7 +186,7 @@ static void fixup_amd_bootblock(struct mtd_info *mtd, void* param)
186} 186}
187#endif 187#endif
188 188
189static void fixup_use_write_buffers(struct mtd_info *mtd, void *param) 189static void fixup_use_write_buffers(struct mtd_info *mtd)
190{ 190{
191 struct map_info *map = mtd->priv; 191 struct map_info *map = mtd->priv;
192 struct cfi_private *cfi = map->fldrv_priv; 192 struct cfi_private *cfi = map->fldrv_priv;
@@ -197,7 +197,7 @@ static void fixup_use_write_buffers(struct mtd_info *mtd, void *param)
197} 197}
198 198
199/* Atmel chips don't use the same PRI format as AMD chips */ 199/* Atmel chips don't use the same PRI format as AMD chips */
200static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) 200static void fixup_convert_atmel_pri(struct mtd_info *mtd)
201{ 201{
202 struct map_info *map = mtd->priv; 202 struct map_info *map = mtd->priv;
203 struct cfi_private *cfi = map->fldrv_priv; 203 struct cfi_private *cfi = map->fldrv_priv;
@@ -228,14 +228,14 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
228 cfi->cfiq->BufWriteTimeoutMax = 0; 228 cfi->cfiq->BufWriteTimeoutMax = 0;
229} 229}
230 230
231static void fixup_use_secsi(struct mtd_info *mtd, void *param) 231static void fixup_use_secsi(struct mtd_info *mtd)
232{ 232{
233 /* Setup for chips with a secsi area */ 233 /* Setup for chips with a secsi area */
234 mtd->read_user_prot_reg = cfi_amdstd_secsi_read; 234 mtd->read_user_prot_reg = cfi_amdstd_secsi_read;
235 mtd->read_fact_prot_reg = cfi_amdstd_secsi_read; 235 mtd->read_fact_prot_reg = cfi_amdstd_secsi_read;
236} 236}
237 237
238static void fixup_use_erase_chip(struct mtd_info *mtd, void *param) 238static void fixup_use_erase_chip(struct mtd_info *mtd)
239{ 239{
240 struct map_info *map = mtd->priv; 240 struct map_info *map = mtd->priv;
241 struct cfi_private *cfi = map->fldrv_priv; 241 struct cfi_private *cfi = map->fldrv_priv;
@@ -250,7 +250,7 @@ static void fixup_use_erase_chip(struct mtd_info *mtd, void *param)
250 * Some Atmel chips (e.g. the AT49BV6416) power-up with all sectors 250 * Some Atmel chips (e.g. the AT49BV6416) power-up with all sectors
251 * locked by default. 251 * locked by default.
252 */ 252 */
253static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param) 253static void fixup_use_atmel_lock(struct mtd_info *mtd)
254{ 254{
255 mtd->lock = cfi_atmel_lock; 255 mtd->lock = cfi_atmel_lock;
256 mtd->unlock = cfi_atmel_unlock; 256 mtd->unlock = cfi_atmel_unlock;
@@ -271,7 +271,7 @@ static void fixup_old_sst_eraseregion(struct mtd_info *mtd)
271 cfi->cfiq->NumEraseRegions = 1; 271 cfi->cfiq->NumEraseRegions = 1;
272} 272}
273 273
274static void fixup_sst39vf(struct mtd_info *mtd, void *param) 274static void fixup_sst39vf(struct mtd_info *mtd)
275{ 275{
276 struct map_info *map = mtd->priv; 276 struct map_info *map = mtd->priv;
277 struct cfi_private *cfi = map->fldrv_priv; 277 struct cfi_private *cfi = map->fldrv_priv;
@@ -282,7 +282,7 @@ static void fixup_sst39vf(struct mtd_info *mtd, void *param)
282 cfi->addr_unlock2 = 0x2AAA; 282 cfi->addr_unlock2 = 0x2AAA;
283} 283}
284 284
285static void fixup_sst39vf_rev_b(struct mtd_info *mtd, void *param) 285static void fixup_sst39vf_rev_b(struct mtd_info *mtd)
286{ 286{
287 struct map_info *map = mtd->priv; 287 struct map_info *map = mtd->priv;
288 struct cfi_private *cfi = map->fldrv_priv; 288 struct cfi_private *cfi = map->fldrv_priv;
@@ -295,12 +295,12 @@ static void fixup_sst39vf_rev_b(struct mtd_info *mtd, void *param)
295 cfi->sector_erase_cmd = CMD(0x50); 295 cfi->sector_erase_cmd = CMD(0x50);
296} 296}
297 297
298static void fixup_sst38vf640x_sectorsize(struct mtd_info *mtd, void *param) 298static void fixup_sst38vf640x_sectorsize(struct mtd_info *mtd)
299{ 299{
300 struct map_info *map = mtd->priv; 300 struct map_info *map = mtd->priv;
301 struct cfi_private *cfi = map->fldrv_priv; 301 struct cfi_private *cfi = map->fldrv_priv;
302 302
303 fixup_sst39vf_rev_b(mtd, param); 303 fixup_sst39vf_rev_b(mtd);
304 304
305 /* 305 /*
306 * CFI reports 1024 sectors (0x03ff+1) of 64KBytes (0x0100*256) where 306 * CFI reports 1024 sectors (0x03ff+1) of 64KBytes (0x0100*256) where
@@ -310,7 +310,7 @@ static void fixup_sst38vf640x_sectorsize(struct mtd_info *mtd, void *param)
310 pr_warning("%s: Bad 38VF640x CFI data; adjusting sector size from 64 to 8KiB\n", mtd->name); 310 pr_warning("%s: Bad 38VF640x CFI data; adjusting sector size from 64 to 8KiB\n", mtd->name);
311} 311}
312 312
313static void fixup_s29gl064n_sectors(struct mtd_info *mtd, void *param) 313static void fixup_s29gl064n_sectors(struct mtd_info *mtd)
314{ 314{
315 struct map_info *map = mtd->priv; 315 struct map_info *map = mtd->priv;
316 struct cfi_private *cfi = map->fldrv_priv; 316 struct cfi_private *cfi = map->fldrv_priv;
@@ -321,7 +321,7 @@ static void fixup_s29gl064n_sectors(struct mtd_info *mtd, void *param)
321 } 321 }
322} 322}
323 323
324static void fixup_s29gl032n_sectors(struct mtd_info *mtd, void *param) 324static void fixup_s29gl032n_sectors(struct mtd_info *mtd)
325{ 325{
326 struct map_info *map = mtd->priv; 326 struct map_info *map = mtd->priv;
327 struct cfi_private *cfi = map->fldrv_priv; 327 struct cfi_private *cfi = map->fldrv_priv;
@@ -334,47 +334,47 @@ static void fixup_s29gl032n_sectors(struct mtd_info *mtd, void *param)
334 334
335/* Used to fix CFI-Tables of chips without Extended Query Tables */ 335/* Used to fix CFI-Tables of chips without Extended Query Tables */
336static struct cfi_fixup cfi_nopri_fixup_table[] = { 336static struct cfi_fixup cfi_nopri_fixup_table[] = {
337 { CFI_MFR_SST, 0x234A, fixup_sst39vf, NULL, }, /* SST39VF1602 */ 337 { CFI_MFR_SST, 0x234a, fixup_sst39vf }, /* SST39VF1602 */
338 { CFI_MFR_SST, 0x234B, fixup_sst39vf, NULL, }, /* SST39VF1601 */ 338 { CFI_MFR_SST, 0x234b, fixup_sst39vf }, /* SST39VF1601 */
339 { CFI_MFR_SST, 0x235A, fixup_sst39vf, NULL, }, /* SST39VF3202 */ 339 { CFI_MFR_SST, 0x235a, fixup_sst39vf }, /* SST39VF3202 */
340 { CFI_MFR_SST, 0x235B, fixup_sst39vf, NULL, }, /* SST39VF3201 */ 340 { CFI_MFR_SST, 0x235b, fixup_sst39vf }, /* SST39VF3201 */
341 { CFI_MFR_SST, 0x235C, fixup_sst39vf_rev_b, NULL, }, /* SST39VF3202B */ 341 { CFI_MFR_SST, 0x235c, fixup_sst39vf_rev_b }, /* SST39VF3202B */
342 { CFI_MFR_SST, 0x235D, fixup_sst39vf_rev_b, NULL, }, /* SST39VF3201B */ 342 { CFI_MFR_SST, 0x235d, fixup_sst39vf_rev_b }, /* SST39VF3201B */
343 { CFI_MFR_SST, 0x236C, fixup_sst39vf_rev_b, NULL, }, /* SST39VF6402B */ 343 { CFI_MFR_SST, 0x236c, fixup_sst39vf_rev_b }, /* SST39VF6402B */
344 { CFI_MFR_SST, 0x236D, fixup_sst39vf_rev_b, NULL, }, /* SST39VF6401B */ 344 { CFI_MFR_SST, 0x236d, fixup_sst39vf_rev_b }, /* SST39VF6401B */
345 { 0, 0, NULL, NULL } 345 { 0, 0, NULL }
346}; 346};
347 347
348static struct cfi_fixup cfi_fixup_table[] = { 348static struct cfi_fixup cfi_fixup_table[] = {
349 { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, 349 { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri },
350#ifdef AMD_BOOTLOC_BUG 350#ifdef AMD_BOOTLOC_BUG
351 { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL }, 351 { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock },
352 { CFI_MFR_MACRONIX, CFI_ID_ANY, fixup_amd_bootblock, NULL }, 352 { CFI_MFR_MACRONIX, CFI_ID_ANY, fixup_amd_bootblock },
353#endif 353#endif
354 { CFI_MFR_AMD, 0x0050, fixup_use_secsi, NULL, }, 354 { CFI_MFR_AMD, 0x0050, fixup_use_secsi },
355 { CFI_MFR_AMD, 0x0053, fixup_use_secsi, NULL, }, 355 { CFI_MFR_AMD, 0x0053, fixup_use_secsi },
356 { CFI_MFR_AMD, 0x0055, fixup_use_secsi, NULL, }, 356 { CFI_MFR_AMD, 0x0055, fixup_use_secsi },
357 { CFI_MFR_AMD, 0x0056, fixup_use_secsi, NULL, }, 357 { CFI_MFR_AMD, 0x0056, fixup_use_secsi },
358 { CFI_MFR_AMD, 0x005C, fixup_use_secsi, NULL, }, 358 { CFI_MFR_AMD, 0x005C, fixup_use_secsi },
359 { CFI_MFR_AMD, 0x005F, fixup_use_secsi, NULL, }, 359 { CFI_MFR_AMD, 0x005F, fixup_use_secsi },
360 { CFI_MFR_AMD, 0x0c01, fixup_s29gl064n_sectors, NULL, }, 360 { CFI_MFR_AMD, 0x0c01, fixup_s29gl064n_sectors },
361 { CFI_MFR_AMD, 0x1301, fixup_s29gl064n_sectors, NULL, }, 361 { CFI_MFR_AMD, 0x1301, fixup_s29gl064n_sectors },
362 { CFI_MFR_AMD, 0x1a00, fixup_s29gl032n_sectors, NULL, }, 362 { CFI_MFR_AMD, 0x1a00, fixup_s29gl032n_sectors },
363 { CFI_MFR_AMD, 0x1a01, fixup_s29gl032n_sectors, NULL, }, 363 { CFI_MFR_AMD, 0x1a01, fixup_s29gl032n_sectors },
364 { CFI_MFR_SST, 0x536A, fixup_sst38vf640x_sectorsize, NULL, }, /* SST38VF6402 */ 364 { CFI_MFR_SST, 0x536a, fixup_sst38vf640x_sectorsize }, /* SST38VF6402 */
365 { CFI_MFR_SST, 0x536B, fixup_sst38vf640x_sectorsize, NULL, }, /* SST38VF6401 */ 365 { CFI_MFR_SST, 0x536b, fixup_sst38vf640x_sectorsize }, /* SST38VF6401 */
366 { CFI_MFR_SST, 0x536C, fixup_sst38vf640x_sectorsize, NULL, }, /* SST38VF6404 */ 366 { CFI_MFR_SST, 0x536c, fixup_sst38vf640x_sectorsize }, /* SST38VF6404 */
367 { CFI_MFR_SST, 0x536D, fixup_sst38vf640x_sectorsize, NULL, }, /* SST38VF6403 */ 367 { CFI_MFR_SST, 0x536d, fixup_sst38vf640x_sectorsize }, /* SST38VF6403 */
368#if !FORCE_WORD_WRITE 368#if !FORCE_WORD_WRITE
369 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, }, 369 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers },
370#endif 370#endif
371 { 0, 0, NULL, NULL } 371 { 0, 0, NULL }
372}; 372};
373static struct cfi_fixup jedec_fixup_table[] = { 373static struct cfi_fixup jedec_fixup_table[] = {
374 { CFI_MFR_SST, SST49LF004B, fixup_use_fwh_lock, NULL, }, 374 { CFI_MFR_SST, SST49LF004B, fixup_use_fwh_lock },
375 { CFI_MFR_SST, SST49LF040B, fixup_use_fwh_lock, NULL, }, 375 { CFI_MFR_SST, SST49LF040B, fixup_use_fwh_lock },
376 { CFI_MFR_SST, SST49LF008A, fixup_use_fwh_lock, NULL, }, 376 { CFI_MFR_SST, SST49LF008A, fixup_use_fwh_lock },
377 { 0, 0, NULL, NULL } 377 { 0, 0, NULL }
378}; 378};
379 379
380static struct cfi_fixup fixup_table[] = { 380static struct cfi_fixup fixup_table[] = {
@@ -383,18 +383,30 @@ static struct cfi_fixup fixup_table[] = {
383 * well. This table is to pick all cases where 383 * well. This table is to pick all cases where
384 * we know that is the case. 384 * we know that is the case.
385 */ 385 */
386 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip, NULL }, 386 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip },
387 { CFI_MFR_ATMEL, AT49BV6416, fixup_use_atmel_lock, NULL }, 387 { CFI_MFR_ATMEL, AT49BV6416, fixup_use_atmel_lock },
388 { 0, 0, NULL, NULL } 388 { 0, 0, NULL }
389}; 389};
390 390
391 391
392static void cfi_fixup_major_minor(struct cfi_private *cfi, 392static void cfi_fixup_major_minor(struct cfi_private *cfi,
393 struct cfi_pri_amdstd *extp) 393 struct cfi_pri_amdstd *extp)
394{ 394{
395 if (cfi->mfr == CFI_MFR_SAMSUNG && cfi->id == 0x257e && 395 if (cfi->mfr == CFI_MFR_SAMSUNG) {
396 extp->MajorVersion == '0') 396 if ((extp->MajorVersion == '0' && extp->MinorVersion == '0') ||
397 extp->MajorVersion = '1'; 397 (extp->MajorVersion == '3' && extp->MinorVersion == '3')) {
398 /*
399 * Samsung K8P2815UQB and K8D6x16UxM chips
400 * report major=0 / minor=0.
401 * K8D3x16UxC chips report major=3 / minor=3.
402 */
403 printk(KERN_NOTICE " Fixing Samsung's Amd/Fujitsu"
404 " Extended Query version to 1.%c\n",
405 extp->MinorVersion);
406 extp->MajorVersion = '1';
407 }
408 }
409
398 /* 410 /*
399 * SST 38VF640x chips report major=0xFF / minor=0xFF. 411 * SST 38VF640x chips report major=0xFF / minor=0xFF.
400 */ 412 */
@@ -428,6 +440,10 @@ struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary)
428 mtd->flags = MTD_CAP_NORFLASH; 440 mtd->flags = MTD_CAP_NORFLASH;
429 mtd->name = map->name; 441 mtd->name = map->name;
430 mtd->writesize = 1; 442 mtd->writesize = 1;
443 mtd->writebufsize = 1 << cfi->cfiq->MaxBufWriteSize;
444
445 DEBUG(MTD_DEBUG_LEVEL3, "MTD %s(): write buffer size %d\n",
446 __func__, mtd->writebufsize);
431 447
432 mtd->reboot_notifier.notifier_call = cfi_amdstd_reboot; 448 mtd->reboot_notifier.notifier_call = cfi_amdstd_reboot;
433 449
diff --git a/drivers/mtd/chips/cfi_cmdset_0020.c b/drivers/mtd/chips/cfi_cmdset_0020.c
index 314af1f5a370..c04b7658abe9 100644
--- a/drivers/mtd/chips/cfi_cmdset_0020.c
+++ b/drivers/mtd/chips/cfi_cmdset_0020.c
@@ -238,6 +238,7 @@ static struct mtd_info *cfi_staa_setup(struct map_info *map)
238 mtd->resume = cfi_staa_resume; 238 mtd->resume = cfi_staa_resume;
239 mtd->flags = MTD_CAP_NORFLASH & ~MTD_BIT_WRITEABLE; 239 mtd->flags = MTD_CAP_NORFLASH & ~MTD_BIT_WRITEABLE;
240 mtd->writesize = 8; /* FIXME: Should be 0 for STMicro flashes w/out ECC */ 240 mtd->writesize = 8; /* FIXME: Should be 0 for STMicro flashes w/out ECC */
241 mtd->writebufsize = 1 << cfi->cfiq->MaxBufWriteSize;
241 map->fldrv = &cfi_staa_chipdrv; 242 map->fldrv = &cfi_staa_chipdrv;
242 __module_get(THIS_MODULE); 243 __module_get(THIS_MODULE);
243 mtd->name = map->name; 244 mtd->name = map->name;
diff --git a/drivers/mtd/chips/cfi_util.c b/drivers/mtd/chips/cfi_util.c
index 360525c637d2..6ae3d111e1e7 100644
--- a/drivers/mtd/chips/cfi_util.c
+++ b/drivers/mtd/chips/cfi_util.c
@@ -156,7 +156,7 @@ void cfi_fixup(struct mtd_info *mtd, struct cfi_fixup *fixups)
156 for (f=fixups; f->fixup; f++) { 156 for (f=fixups; f->fixup; f++) {
157 if (((f->mfr == CFI_MFR_ANY) || (f->mfr == cfi->mfr)) && 157 if (((f->mfr == CFI_MFR_ANY) || (f->mfr == cfi->mfr)) &&
158 ((f->id == CFI_ID_ANY) || (f->id == cfi->id))) { 158 ((f->id == CFI_ID_ANY) || (f->id == cfi->id))) {
159 f->fixup(mtd, f->param); 159 f->fixup(mtd);
160 } 160 }
161 } 161 }
162} 162}
diff --git a/drivers/mtd/chips/fwh_lock.h b/drivers/mtd/chips/fwh_lock.h
index d18064977192..5e3cc80128aa 100644
--- a/drivers/mtd/chips/fwh_lock.h
+++ b/drivers/mtd/chips/fwh_lock.h
@@ -98,7 +98,7 @@ static int fwh_unlock_varsize(struct mtd_info *mtd, loff_t ofs, uint64_t len)
98 return ret; 98 return ret;
99} 99}
100 100
101static void fixup_use_fwh_lock(struct mtd_info *mtd, void *param) 101static void fixup_use_fwh_lock(struct mtd_info *mtd)
102{ 102{
103 printk(KERN_NOTICE "using fwh lock/unlock method\n"); 103 printk(KERN_NOTICE "using fwh lock/unlock method\n");
104 /* Setup for the chips with the fwh lock method */ 104 /* Setup for the chips with the fwh lock method */
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index bf5a002209bd..e4eba6cc1b2e 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -51,6 +51,10 @@
51#define OPCODE_WRDI 0x04 /* Write disable */ 51#define OPCODE_WRDI 0x04 /* Write disable */
52#define OPCODE_AAI_WP 0xad /* Auto address increment word program */ 52#define OPCODE_AAI_WP 0xad /* Auto address increment word program */
53 53
54/* Used for Macronix flashes only. */
55#define OPCODE_EN4B 0xb7 /* Enter 4-byte mode */
56#define OPCODE_EX4B 0xe9 /* Exit 4-byte mode */
57
54/* Status Register bits. */ 58/* Status Register bits. */
55#define SR_WIP 1 /* Write in progress */ 59#define SR_WIP 1 /* Write in progress */
56#define SR_WEL 2 /* Write enable latch */ 60#define SR_WEL 2 /* Write enable latch */
@@ -62,7 +66,7 @@
62 66
63/* Define max times to check status register before we give up. */ 67/* Define max times to check status register before we give up. */
64#define MAX_READY_WAIT_JIFFIES (40 * HZ) /* M25P16 specs 40s max chip erase */ 68#define MAX_READY_WAIT_JIFFIES (40 * HZ) /* M25P16 specs 40s max chip erase */
65#define MAX_CMD_SIZE 4 69#define MAX_CMD_SIZE 5
66 70
67#ifdef CONFIG_M25PXX_USE_FAST_READ 71#ifdef CONFIG_M25PXX_USE_FAST_READ
68#define OPCODE_READ OPCODE_FAST_READ 72#define OPCODE_READ OPCODE_FAST_READ
@@ -152,6 +156,16 @@ static inline int write_disable(struct m25p *flash)
152} 156}
153 157
154/* 158/*
159 * Enable/disable 4-byte addressing mode.
160 */
161static inline int set_4byte(struct m25p *flash, int enable)
162{
163 u8 code = enable ? OPCODE_EN4B : OPCODE_EX4B;
164
165 return spi_write_then_read(flash->spi, &code, 1, NULL, 0);
166}
167
168/*
155 * Service routine to read status register until ready, or timeout occurs. 169 * Service routine to read status register until ready, or timeout occurs.
156 * Returns non-zero if error. 170 * Returns non-zero if error.
157 */ 171 */
@@ -207,6 +221,7 @@ static void m25p_addr2cmd(struct m25p *flash, unsigned int addr, u8 *cmd)
207 cmd[1] = addr >> (flash->addr_width * 8 - 8); 221 cmd[1] = addr >> (flash->addr_width * 8 - 8);
208 cmd[2] = addr >> (flash->addr_width * 8 - 16); 222 cmd[2] = addr >> (flash->addr_width * 8 - 16);
209 cmd[3] = addr >> (flash->addr_width * 8 - 24); 223 cmd[3] = addr >> (flash->addr_width * 8 - 24);
224 cmd[4] = addr >> (flash->addr_width * 8 - 32);
210} 225}
211 226
212static int m25p_cmdsz(struct m25p *flash) 227static int m25p_cmdsz(struct m25p *flash)
@@ -482,6 +497,10 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
482 size_t actual; 497 size_t actual;
483 int cmd_sz, ret; 498 int cmd_sz, ret;
484 499
500 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
501 dev_name(&flash->spi->dev), __func__, "to",
502 (u32)to, len);
503
485 *retlen = 0; 504 *retlen = 0;
486 505
487 /* sanity checks */ 506 /* sanity checks */
@@ -607,7 +626,6 @@ struct flash_info {
607 .sector_size = (_sector_size), \ 626 .sector_size = (_sector_size), \
608 .n_sectors = (_n_sectors), \ 627 .n_sectors = (_n_sectors), \
609 .page_size = 256, \ 628 .page_size = 256, \
610 .addr_width = 3, \
611 .flags = (_flags), \ 629 .flags = (_flags), \
612 }) 630 })
613 631
@@ -635,7 +653,7 @@ static const struct spi_device_id m25p_ids[] = {
635 { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) }, 653 { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) },
636 { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K) }, 654 { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K) },
637 { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) }, 655 { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) },
638 { "at26df321", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) }, 656 { "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K) },
639 657
640 /* EON -- en25pxx */ 658 /* EON -- en25pxx */
641 { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64, 0) }, 659 { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64, 0) },
@@ -653,6 +671,8 @@ static const struct spi_device_id m25p_ids[] = {
653 { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, 0) }, 671 { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, 0) },
654 { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, 672 { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
655 { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, 673 { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
674 { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) },
675 { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
656 676
657 /* Spansion -- single (large) sector size only, at least 677 /* Spansion -- single (large) sector size only, at least
658 * for the chips listed here (without boot sectors). 678 * for the chips listed here (without boot sectors).
@@ -764,6 +784,7 @@ static const struct spi_device_id *__devinit jedec_probe(struct spi_device *spi)
764 return &m25p_ids[tmp]; 784 return &m25p_ids[tmp];
765 } 785 }
766 } 786 }
787 dev_err(&spi->dev, "unrecognized JEDEC id %06x\n", jedec);
767 return ERR_PTR(-ENODEV); 788 return ERR_PTR(-ENODEV);
768} 789}
769 790
@@ -883,7 +904,17 @@ static int __devinit m25p_probe(struct spi_device *spi)
883 904
884 flash->mtd.dev.parent = &spi->dev; 905 flash->mtd.dev.parent = &spi->dev;
885 flash->page_size = info->page_size; 906 flash->page_size = info->page_size;
886 flash->addr_width = info->addr_width; 907
908 if (info->addr_width)
909 flash->addr_width = info->addr_width;
910 else {
911 /* enable 4-byte addressing if the device exceeds 16MiB */
912 if (flash->mtd.size > 0x1000000) {
913 flash->addr_width = 4;
914 set_4byte(flash, 1);
915 } else
916 flash->addr_width = 3;
917 }
887 918
888 dev_info(&spi->dev, "%s (%lld Kbytes)\n", id->name, 919 dev_info(&spi->dev, "%s (%lld Kbytes)\n", id->name,
889 (long long)flash->mtd.size >> 10); 920 (long long)flash->mtd.size >> 10);
diff --git a/drivers/mtd/devices/sst25l.c b/drivers/mtd/devices/sst25l.c
index 684247a8a5ed..c163e619abc9 100644
--- a/drivers/mtd/devices/sst25l.c
+++ b/drivers/mtd/devices/sst25l.c
@@ -335,7 +335,7 @@ out:
335 return ret; 335 return ret;
336} 336}
337 337
338static struct flash_info *__init sst25l_match_device(struct spi_device *spi) 338static struct flash_info *__devinit sst25l_match_device(struct spi_device *spi)
339{ 339{
340 struct flash_info *flash_info = NULL; 340 struct flash_info *flash_info = NULL;
341 struct spi_message m; 341 struct spi_message m;
@@ -375,7 +375,7 @@ static struct flash_info *__init sst25l_match_device(struct spi_device *spi)
375 return flash_info; 375 return flash_info;
376} 376}
377 377
378static int __init sst25l_probe(struct spi_device *spi) 378static int __devinit sst25l_probe(struct spi_device *spi)
379{ 379{
380 struct flash_info *flash_info; 380 struct flash_info *flash_info;
381 struct sst25l_flash *flash; 381 struct sst25l_flash *flash;
diff --git a/drivers/mtd/maps/amd76xrom.c b/drivers/mtd/maps/amd76xrom.c
index 19fe92db0c46..77d64ce19e9f 100644
--- a/drivers/mtd/maps/amd76xrom.c
+++ b/drivers/mtd/maps/amd76xrom.c
@@ -149,11 +149,8 @@ static int __devinit amd76xrom_init_one (struct pci_dev *pdev,
149 if (request_resource(&iomem_resource, &window->rsrc)) { 149 if (request_resource(&iomem_resource, &window->rsrc)) {
150 window->rsrc.parent = NULL; 150 window->rsrc.parent = NULL;
151 printk(KERN_ERR MOD_NAME 151 printk(KERN_ERR MOD_NAME
152 " %s(): Unable to register resource" 152 " %s(): Unable to register resource %pR - kernel bug?\n",
153 " 0x%.16llx-0x%.16llx - kernel bug?\n", 153 __func__, &window->rsrc);
154 __func__,
155 (unsigned long long)window->rsrc.start,
156 (unsigned long long)window->rsrc.end);
157 } 154 }
158 155
159 156
diff --git a/drivers/mtd/maps/bcm963xx-flash.c b/drivers/mtd/maps/bcm963xx-flash.c
index d175c120ee84..1f3049590d9e 100644
--- a/drivers/mtd/maps/bcm963xx-flash.c
+++ b/drivers/mtd/maps/bcm963xx-flash.c
@@ -196,10 +196,15 @@ static int bcm963xx_probe(struct platform_device *pdev)
196 bcm963xx_mtd_info = do_map_probe("cfi_probe", &bcm963xx_map); 196 bcm963xx_mtd_info = do_map_probe("cfi_probe", &bcm963xx_map);
197 if (!bcm963xx_mtd_info) { 197 if (!bcm963xx_mtd_info) {
198 dev_err(&pdev->dev, "failed to probe using CFI\n"); 198 dev_err(&pdev->dev, "failed to probe using CFI\n");
199 bcm963xx_mtd_info = do_map_probe("jedec_probe", &bcm963xx_map);
200 if (bcm963xx_mtd_info)
201 goto probe_ok;
202 dev_err(&pdev->dev, "failed to probe using JEDEC\n");
199 err = -EIO; 203 err = -EIO;
200 goto err_probe; 204 goto err_probe;
201 } 205 }
202 206
207probe_ok:
203 bcm963xx_mtd_info->owner = THIS_MODULE; 208 bcm963xx_mtd_info->owner = THIS_MODULE;
204 209
205 /* This is mutually exclusive */ 210 /* This is mutually exclusive */
diff --git a/drivers/mtd/maps/ck804xrom.c b/drivers/mtd/maps/ck804xrom.c
index ddb462bea9b5..5fdb7b26cea3 100644
--- a/drivers/mtd/maps/ck804xrom.c
+++ b/drivers/mtd/maps/ck804xrom.c
@@ -178,11 +178,8 @@ static int __devinit ck804xrom_init_one (struct pci_dev *pdev,
178 if (request_resource(&iomem_resource, &window->rsrc)) { 178 if (request_resource(&iomem_resource, &window->rsrc)) {
179 window->rsrc.parent = NULL; 179 window->rsrc.parent = NULL;
180 printk(KERN_ERR MOD_NAME 180 printk(KERN_ERR MOD_NAME
181 " %s(): Unable to register resource" 181 " %s(): Unable to register resource %pR - kernel bug?\n",
182 " 0x%.016llx-0x%.016llx - kernel bug?\n", 182 __func__, &window->rsrc);
183 __func__,
184 (unsigned long long)window->rsrc.start,
185 (unsigned long long)window->rsrc.end);
186 } 183 }
187 184
188 185
diff --git a/drivers/mtd/maps/esb2rom.c b/drivers/mtd/maps/esb2rom.c
index d12c93dc1aad..4feb7507ab7c 100644
--- a/drivers/mtd/maps/esb2rom.c
+++ b/drivers/mtd/maps/esb2rom.c
@@ -242,12 +242,9 @@ static int __devinit esb2rom_init_one(struct pci_dev *pdev,
242 window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; 242 window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
243 if (request_resource(&iomem_resource, &window->rsrc)) { 243 if (request_resource(&iomem_resource, &window->rsrc)) {
244 window->rsrc.parent = NULL; 244 window->rsrc.parent = NULL;
245 printk(KERN_DEBUG MOD_NAME 245 printk(KERN_DEBUG MOD_NAME ": "
246 ": %s(): Unable to register resource" 246 "%s(): Unable to register resource %pR - kernel bug?\n",
247 " 0x%.08llx-0x%.08llx - kernel bug?\n", 247 __func__, &window->rsrc);
248 __func__,
249 (unsigned long long)window->rsrc.start,
250 (unsigned long long)window->rsrc.end);
251 } 248 }
252 249
253 /* Map the firmware hub into my address space. */ 250 /* Map the firmware hub into my address space. */
diff --git a/drivers/mtd/maps/ichxrom.c b/drivers/mtd/maps/ichxrom.c
index f102bf243a74..1337a4191a0c 100644
--- a/drivers/mtd/maps/ichxrom.c
+++ b/drivers/mtd/maps/ichxrom.c
@@ -175,12 +175,9 @@ static int __devinit ichxrom_init_one (struct pci_dev *pdev,
175 window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; 175 window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
176 if (request_resource(&iomem_resource, &window->rsrc)) { 176 if (request_resource(&iomem_resource, &window->rsrc)) {
177 window->rsrc.parent = NULL; 177 window->rsrc.parent = NULL;
178 printk(KERN_DEBUG MOD_NAME 178 printk(KERN_DEBUG MOD_NAME ": "
179 ": %s(): Unable to register resource" 179 "%s(): Unable to register resource %pR - kernel bug?\n",
180 " 0x%.16llx-0x%.16llx - kernel bug?\n", 180 __func__, &window->rsrc);
181 __func__,
182 (unsigned long long)window->rsrc.start,
183 (unsigned long long)window->rsrc.end);
184 } 181 }
185 182
186 /* Map the firmware hub into my address space. */ 183 /* Map the firmware hub into my address space. */
diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.c
index 9861814aa027..8506578e6a35 100644
--- a/drivers/mtd/maps/physmap_of.c
+++ b/drivers/mtd/maps/physmap_of.c
@@ -274,9 +274,7 @@ static int __devinit of_flash_probe(struct platform_device *dev,
274 continue; 274 continue;
275 } 275 }
276 276
277 dev_dbg(&dev->dev, "of_flash device: %.8llx-%.8llx\n", 277 dev_dbg(&dev->dev, "of_flash device: %pR\n", &res);
278 (unsigned long long)res.start,
279 (unsigned long long)res.end);
280 278
281 err = -EBUSY; 279 err = -EBUSY;
282 res_size = resource_size(&res); 280 res_size = resource_size(&res);
diff --git a/drivers/mtd/maps/scx200_docflash.c b/drivers/mtd/maps/scx200_docflash.c
index b5391ebb736e..027e628a4f1d 100644
--- a/drivers/mtd/maps/scx200_docflash.c
+++ b/drivers/mtd/maps/scx200_docflash.c
@@ -166,9 +166,8 @@ static int __init init_scx200_docflash(void)
166 outl(pmr, scx200_cb_base + SCx200_PMR); 166 outl(pmr, scx200_cb_base + SCx200_PMR);
167 } 167 }
168 168
169 printk(KERN_INFO NAME ": DOCCS mapped at 0x%llx-0x%llx, width %d\n", 169 printk(KERN_INFO NAME ": DOCCS mapped at %pR, width %d\n",
170 (unsigned long long)docmem.start, 170 &docmem, width);
171 (unsigned long long)docmem.end, width);
172 171
173 scx200_docflash_map.size = size; 172 scx200_docflash_map.size = size;
174 if (width == 8) 173 if (width == 8)
diff --git a/drivers/mtd/maps/tqm8xxl.c b/drivers/mtd/maps/tqm8xxl.c
index 60146984f4be..c08e140d40ed 100644
--- a/drivers/mtd/maps/tqm8xxl.c
+++ b/drivers/mtd/maps/tqm8xxl.c
@@ -139,7 +139,7 @@ static int __init init_tqm_mtd(void)
139 goto error_mem; 139 goto error_mem;
140 } 140 }
141 141
142 map_banks[idx]->name = (char *)kmalloc(16, GFP_KERNEL); 142 map_banks[idx]->name = kmalloc(16, GFP_KERNEL);
143 143
144 if (!map_banks[idx]->name) { 144 if (!map_banks[idx]->name) {
145 ret = -ENOMEM; 145 ret = -ENOMEM;
diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c
index 98240575a18d..145b3d0dc0db 100644
--- a/drivers/mtd/mtdchar.c
+++ b/drivers/mtd/mtdchar.c
@@ -522,10 +522,6 @@ static int mtd_blkpg_ioctl(struct mtd_info *mtd,
522 if (!capable(CAP_SYS_ADMIN)) 522 if (!capable(CAP_SYS_ADMIN))
523 return -EPERM; 523 return -EPERM;
524 524
525 /* Only master mtd device must be used to control partitions */
526 if (!mtd_is_master(mtd))
527 return -EINVAL;
528
529 if (copy_from_user(&a, arg, sizeof(struct blkpg_ioctl_arg))) 525 if (copy_from_user(&a, arg, sizeof(struct blkpg_ioctl_arg)))
530 return -EFAULT; 526 return -EFAULT;
531 527
@@ -535,6 +531,10 @@ static int mtd_blkpg_ioctl(struct mtd_info *mtd,
535 switch (a.op) { 531 switch (a.op) {
536 case BLKPG_ADD_PARTITION: 532 case BLKPG_ADD_PARTITION:
537 533
534 /* Only master mtd device must be used to add partitions */
535 if (mtd_is_partition(mtd))
536 return -EINVAL;
537
538 return mtd_add_partition(mtd, p.devname, p.start, p.length); 538 return mtd_add_partition(mtd, p.devname, p.start, p.length);
539 539
540 case BLKPG_DEL_PARTITION: 540 case BLKPG_DEL_PARTITION:
@@ -601,6 +601,7 @@ static int mtd_ioctl(struct file *file, u_int cmd, u_long arg)
601 } 601 }
602 602
603 case MEMGETINFO: 603 case MEMGETINFO:
604 memset(&info, 0, sizeof(info));
604 info.type = mtd->type; 605 info.type = mtd->type;
605 info.flags = mtd->flags; 606 info.flags = mtd->flags;
606 info.size = mtd->size; 607 info.size = mtd->size;
@@ -609,7 +610,6 @@ static int mtd_ioctl(struct file *file, u_int cmd, u_long arg)
609 info.oobsize = mtd->oobsize; 610 info.oobsize = mtd->oobsize;
610 /* The below fields are obsolete */ 611 /* The below fields are obsolete */
611 info.ecctype = -1; 612 info.ecctype = -1;
612 info.eccsize = 0;
613 if (copy_to_user(argp, &info, sizeof(struct mtd_info_user))) 613 if (copy_to_user(argp, &info, sizeof(struct mtd_info_user)))
614 return -EFAULT; 614 return -EFAULT;
615 break; 615 break;
diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c
index bf8de0943103..5f5777bd3f75 100644
--- a/drivers/mtd/mtdconcat.c
+++ b/drivers/mtd/mtdconcat.c
@@ -776,6 +776,7 @@ struct mtd_info *mtd_concat_create(struct mtd_info *subdev[], /* subdevices to c
776 concat->mtd.size = subdev[0]->size; 776 concat->mtd.size = subdev[0]->size;
777 concat->mtd.erasesize = subdev[0]->erasesize; 777 concat->mtd.erasesize = subdev[0]->erasesize;
778 concat->mtd.writesize = subdev[0]->writesize; 778 concat->mtd.writesize = subdev[0]->writesize;
779 concat->mtd.writebufsize = subdev[0]->writebufsize;
779 concat->mtd.subpage_sft = subdev[0]->subpage_sft; 780 concat->mtd.subpage_sft = subdev[0]->subpage_sft;
780 concat->mtd.oobsize = subdev[0]->oobsize; 781 concat->mtd.oobsize = subdev[0]->oobsize;
781 concat->mtd.oobavail = subdev[0]->oobavail; 782 concat->mtd.oobavail = subdev[0]->oobavail;
diff --git a/drivers/mtd/mtdoops.c b/drivers/mtd/mtdoops.c
index c948150079be..e3e40f440323 100644
--- a/drivers/mtd/mtdoops.c
+++ b/drivers/mtd/mtdoops.c
@@ -401,7 +401,8 @@ static void mtdoops_notify_remove(struct mtd_info *mtd)
401 printk(KERN_WARNING "mtdoops: could not unregister kmsg_dumper\n"); 401 printk(KERN_WARNING "mtdoops: could not unregister kmsg_dumper\n");
402 402
403 cxt->mtd = NULL; 403 cxt->mtd = NULL;
404 flush_scheduled_work(); 404 flush_work_sync(&cxt->work_erase);
405 flush_work_sync(&cxt->work_write);
405} 406}
406 407
407 408
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index 79e3689f1e16..0a4760174782 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -120,8 +120,25 @@ static int part_read_oob(struct mtd_info *mtd, loff_t from,
120 return -EINVAL; 120 return -EINVAL;
121 if (ops->datbuf && from + ops->len > mtd->size) 121 if (ops->datbuf && from + ops->len > mtd->size)
122 return -EINVAL; 122 return -EINVAL;
123 res = part->master->read_oob(part->master, from + part->offset, ops);
124 123
124 /*
125 * If OOB is also requested, make sure that we do not read past the end
126 * of this partition.
127 */
128 if (ops->oobbuf) {
129 size_t len, pages;
130
131 if (ops->mode == MTD_OOB_AUTO)
132 len = mtd->oobavail;
133 else
134 len = mtd->oobsize;
135 pages = mtd_div_by_ws(mtd->size, mtd);
136 pages -= mtd_div_by_ws(from, mtd);
137 if (ops->ooboffs + ops->ooblen > pages * len)
138 return -EINVAL;
139 }
140
141 res = part->master->read_oob(part->master, from + part->offset, ops);
125 if (unlikely(res)) { 142 if (unlikely(res)) {
126 if (res == -EUCLEAN) 143 if (res == -EUCLEAN)
127 mtd->ecc_stats.corrected++; 144 mtd->ecc_stats.corrected++;
@@ -384,6 +401,7 @@ static struct mtd_part *allocate_partition(struct mtd_info *master,
384 slave->mtd.flags = master->flags & ~part->mask_flags; 401 slave->mtd.flags = master->flags & ~part->mask_flags;
385 slave->mtd.size = part->size; 402 slave->mtd.size = part->size;
386 slave->mtd.writesize = master->writesize; 403 slave->mtd.writesize = master->writesize;
404 slave->mtd.writebufsize = master->writebufsize;
387 slave->mtd.oobsize = master->oobsize; 405 slave->mtd.oobsize = master->oobsize;
388 slave->mtd.oobavail = master->oobavail; 406 slave->mtd.oobavail = master->oobavail;
389 slave->mtd.subpage_sft = master->subpage_sft; 407 slave->mtd.subpage_sft = master->subpage_sft;
@@ -720,19 +738,19 @@ int parse_mtd_partitions(struct mtd_info *master, const char **types,
720} 738}
721EXPORT_SYMBOL_GPL(parse_mtd_partitions); 739EXPORT_SYMBOL_GPL(parse_mtd_partitions);
722 740
723int mtd_is_master(struct mtd_info *mtd) 741int mtd_is_partition(struct mtd_info *mtd)
724{ 742{
725 struct mtd_part *part; 743 struct mtd_part *part;
726 int nopart = 0; 744 int ispart = 0;
727 745
728 mutex_lock(&mtd_partitions_mutex); 746 mutex_lock(&mtd_partitions_mutex);
729 list_for_each_entry(part, &mtd_partitions, list) 747 list_for_each_entry(part, &mtd_partitions, list)
730 if (&part->mtd == mtd) { 748 if (&part->mtd == mtd) {
731 nopart = 1; 749 ispart = 1;
732 break; 750 break;
733 } 751 }
734 mutex_unlock(&mtd_partitions_mutex); 752 mutex_unlock(&mtd_partitions_mutex);
735 753
736 return nopart; 754 return ispart;
737} 755}
738EXPORT_SYMBOL_GPL(mtd_is_master); 756EXPORT_SYMBOL_GPL(mtd_is_partition);
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 8229802b4346..c89592239bc7 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -96,6 +96,7 @@ config MTD_NAND_SPIA
96config MTD_NAND_AMS_DELTA 96config MTD_NAND_AMS_DELTA
97 tristate "NAND Flash device on Amstrad E3" 97 tristate "NAND Flash device on Amstrad E3"
98 depends on MACH_AMS_DELTA 98 depends on MACH_AMS_DELTA
99 default y
99 help 100 help
100 Support for NAND flash on Amstrad E3 (Delta). 101 Support for NAND flash on Amstrad E3 (Delta).
101 102
diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c
index 2548e1065bf8..a067d090cb31 100644
--- a/drivers/mtd/nand/ams-delta.c
+++ b/drivers/mtd/nand/ams-delta.c
@@ -4,6 +4,8 @@
4 * Copyright (C) 2006 Jonathan McDowell <noodles@earth.li> 4 * Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
5 * 5 *
6 * Derived from drivers/mtd/toto.c 6 * Derived from drivers/mtd/toto.c
7 * Converted to platform driver by Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
8 * Partially stolen from drivers/mtd/nand/plat_nand.c
7 * 9 *
8 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
@@ -62,9 +64,10 @@ static struct mtd_partition partition_info[] = {
62static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte) 64static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
63{ 65{
64 struct nand_chip *this = mtd->priv; 66 struct nand_chip *this = mtd->priv;
67 void __iomem *io_base = this->priv;
65 68
66 omap_writew(0, (OMAP1_MPUIO_BASE + OMAP_MPUIO_IO_CNTL)); 69 writew(0, io_base + OMAP_MPUIO_IO_CNTL);
67 omap_writew(byte, this->IO_ADDR_W); 70 writew(byte, this->IO_ADDR_W);
68 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0); 71 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0);
69 ndelay(40); 72 ndelay(40);
70 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 73 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE,
@@ -75,11 +78,12 @@ static u_char ams_delta_read_byte(struct mtd_info *mtd)
75{ 78{
76 u_char res; 79 u_char res;
77 struct nand_chip *this = mtd->priv; 80 struct nand_chip *this = mtd->priv;
81 void __iomem *io_base = this->priv;
78 82
79 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0); 83 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0);
80 ndelay(40); 84 ndelay(40);
81 omap_writew(~0, (OMAP1_MPUIO_BASE + OMAP_MPUIO_IO_CNTL)); 85 writew(~0, io_base + OMAP_MPUIO_IO_CNTL);
82 res = omap_readw(this->IO_ADDR_R); 86 res = readw(this->IO_ADDR_R);
83 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 87 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE,
84 AMS_DELTA_LATCH2_NAND_NRE); 88 AMS_DELTA_LATCH2_NAND_NRE);
85 89
@@ -151,11 +155,16 @@ static int ams_delta_nand_ready(struct mtd_info *mtd)
151/* 155/*
152 * Main initialization routine 156 * Main initialization routine
153 */ 157 */
154static int __init ams_delta_init(void) 158static int __devinit ams_delta_init(struct platform_device *pdev)
155{ 159{
156 struct nand_chip *this; 160 struct nand_chip *this;
161 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
162 void __iomem *io_base;
157 int err = 0; 163 int err = 0;
158 164
165 if (!res)
166 return -ENXIO;
167
159 /* Allocate memory for MTD device structure and private data */ 168 /* Allocate memory for MTD device structure and private data */
160 ams_delta_mtd = kmalloc(sizeof(struct mtd_info) + 169 ams_delta_mtd = kmalloc(sizeof(struct mtd_info) +
161 sizeof(struct nand_chip), GFP_KERNEL); 170 sizeof(struct nand_chip), GFP_KERNEL);
@@ -177,9 +186,25 @@ static int __init ams_delta_init(void)
177 /* Link the private data with the MTD structure */ 186 /* Link the private data with the MTD structure */
178 ams_delta_mtd->priv = this; 187 ams_delta_mtd->priv = this;
179 188
189 if (!request_mem_region(res->start, resource_size(res),
190 dev_name(&pdev->dev))) {
191 dev_err(&pdev->dev, "request_mem_region failed\n");
192 err = -EBUSY;
193 goto out_free;
194 }
195
196 io_base = ioremap(res->start, resource_size(res));
197 if (io_base == NULL) {
198 dev_err(&pdev->dev, "ioremap failed\n");
199 err = -EIO;
200 goto out_release_io;
201 }
202
203 this->priv = io_base;
204
180 /* Set address of NAND IO lines */ 205 /* Set address of NAND IO lines */
181 this->IO_ADDR_R = (OMAP1_MPUIO_BASE + OMAP_MPUIO_INPUT_LATCH); 206 this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH;
182 this->IO_ADDR_W = (OMAP1_MPUIO_BASE + OMAP_MPUIO_OUTPUT); 207 this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT;
183 this->read_byte = ams_delta_read_byte; 208 this->read_byte = ams_delta_read_byte;
184 this->write_buf = ams_delta_write_buf; 209 this->write_buf = ams_delta_write_buf;
185 this->read_buf = ams_delta_read_buf; 210 this->read_buf = ams_delta_read_buf;
@@ -195,6 +220,8 @@ static int __init ams_delta_init(void)
195 this->chip_delay = 30; 220 this->chip_delay = 30;
196 this->ecc.mode = NAND_ECC_SOFT; 221 this->ecc.mode = NAND_ECC_SOFT;
197 222
223 platform_set_drvdata(pdev, io_base);
224
198 /* Set chip enabled, but */ 225 /* Set chip enabled, but */
199 ams_delta_latch2_write(NAND_MASK, AMS_DELTA_LATCH2_NAND_NRE | 226 ams_delta_latch2_write(NAND_MASK, AMS_DELTA_LATCH2_NAND_NRE |
200 AMS_DELTA_LATCH2_NAND_NWE | 227 AMS_DELTA_LATCH2_NAND_NWE |
@@ -214,25 +241,56 @@ static int __init ams_delta_init(void)
214 goto out; 241 goto out;
215 242
216 out_mtd: 243 out_mtd:
244 platform_set_drvdata(pdev, NULL);
245 iounmap(io_base);
246out_release_io:
247 release_mem_region(res->start, resource_size(res));
248out_free:
217 kfree(ams_delta_mtd); 249 kfree(ams_delta_mtd);
218 out: 250 out:
219 return err; 251 return err;
220} 252}
221 253
222module_init(ams_delta_init);
223
224/* 254/*
225 * Clean up routine 255 * Clean up routine
226 */ 256 */
227static void __exit ams_delta_cleanup(void) 257static int __devexit ams_delta_cleanup(struct platform_device *pdev)
228{ 258{
259 void __iomem *io_base = platform_get_drvdata(pdev);
260 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
261
229 /* Release resources, unregister device */ 262 /* Release resources, unregister device */
230 nand_release(ams_delta_mtd); 263 nand_release(ams_delta_mtd);
231 264
265 iounmap(io_base);
266 release_mem_region(res->start, resource_size(res));
267
232 /* Free the MTD device structure */ 268 /* Free the MTD device structure */
233 kfree(ams_delta_mtd); 269 kfree(ams_delta_mtd);
270
271 return 0;
272}
273
274static struct platform_driver ams_delta_nand_driver = {
275 .probe = ams_delta_init,
276 .remove = __devexit_p(ams_delta_cleanup),
277 .driver = {
278 .name = "ams-delta-nand",
279 .owner = THIS_MODULE,
280 },
281};
282
283static int __init ams_delta_nand_init(void)
284{
285 return platform_driver_register(&ams_delta_nand_driver);
286}
287module_init(ams_delta_nand_init);
288
289static void __exit ams_delta_nand_exit(void)
290{
291 platform_driver_unregister(&ams_delta_nand_driver);
234} 292}
235module_exit(ams_delta_cleanup); 293module_exit(ams_delta_nand_exit);
236 294
237MODULE_LICENSE("GPL"); 295MODULE_LICENSE("GPL");
238MODULE_AUTHOR("Jonathan McDowell <noodles@earth.li>"); 296MODULE_AUTHOR("Jonathan McDowell <noodles@earth.li>");
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index c141b07b25d1..7a13d42cbabd 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -388,6 +388,8 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,
388 "page_addr: 0x%x, column: 0x%x.\n", 388 "page_addr: 0x%x, column: 0x%x.\n",
389 page_addr, column); 389 page_addr, column);
390 390
391 elbc_fcm_ctrl->column = column;
392 elbc_fcm_ctrl->oob = 0;
391 elbc_fcm_ctrl->use_mdr = 1; 393 elbc_fcm_ctrl->use_mdr = 1;
392 394
393 fcr = (NAND_CMD_STATUS << FCR_CMD1_SHIFT) | 395 fcr = (NAND_CMD_STATUS << FCR_CMD1_SHIFT) |
diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
index 02edfba25b0c..205b10b9f9b9 100644
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -31,6 +31,7 @@
31#include <linux/io.h> 31#include <linux/io.h>
32#include <linux/slab.h> 32#include <linux/slab.h>
33#include <linux/mtd/fsmc.h> 33#include <linux/mtd/fsmc.h>
34#include <linux/amba/bus.h>
34#include <mtd/mtd-abi.h> 35#include <mtd/mtd-abi.h>
35 36
36static struct nand_ecclayout fsmc_ecc1_layout = { 37static struct nand_ecclayout fsmc_ecc1_layout = {
@@ -119,21 +120,36 @@ static struct fsmc_eccplace fsmc_ecc4_sp_place = {
119 } 120 }
120}; 121};
121 122
122/*
123 * Default partition tables to be used if the partition information not
124 * provided through platform data
125 */
126#define PARTITION(n, off, sz) {.name = n, .offset = off, .size = sz}
127 123
124#ifdef CONFIG_MTD_PARTITIONS
128/* 125/*
126 * Default partition tables to be used if the partition information not
127 * provided through platform data.
128 *
129 * Default partition layout for small page(= 512 bytes) devices 129 * Default partition layout for small page(= 512 bytes) devices
130 * Size for "Root file system" is updated in driver based on actual device size 130 * Size for "Root file system" is updated in driver based on actual device size
131 */ 131 */
132static struct mtd_partition partition_info_16KB_blk[] = { 132static struct mtd_partition partition_info_16KB_blk[] = {
133 PARTITION("X-loader", 0, 4 * 0x4000), 133 {
134 PARTITION("U-Boot", 0x10000, 20 * 0x4000), 134 .name = "X-loader",
135 PARTITION("Kernel", 0x60000, 256 * 0x4000), 135 .offset = 0,
136 PARTITION("Root File System", 0x460000, 0), 136 .size = 4*0x4000,
137 },
138 {
139 .name = "U-Boot",
140 .offset = 0x10000,
141 .size = 20*0x4000,
142 },
143 {
144 .name = "Kernel",
145 .offset = 0x60000,
146 .size = 256*0x4000,
147 },
148 {
149 .name = "Root File System",
150 .offset = 0x460000,
151 .size = 0,
152 },
137}; 153};
138 154
139/* 155/*
@@ -141,19 +157,37 @@ static struct mtd_partition partition_info_16KB_blk[] = {
141 * Size for "Root file system" is updated in driver based on actual device size 157 * Size for "Root file system" is updated in driver based on actual device size
142 */ 158 */
143static struct mtd_partition partition_info_128KB_blk[] = { 159static struct mtd_partition partition_info_128KB_blk[] = {
144 PARTITION("X-loader", 0, 4 * 0x20000), 160 {
145 PARTITION("U-Boot", 0x80000, 12 * 0x20000), 161 .name = "X-loader",
146 PARTITION("Kernel", 0x200000, 48 * 0x20000), 162 .offset = 0,
147 PARTITION("Root File System", 0x800000, 0), 163 .size = 4*0x20000,
164 },
165 {
166 .name = "U-Boot",
167 .offset = 0x80000,
168 .size = 12*0x20000,
169 },
170 {
171 .name = "Kernel",
172 .offset = 0x200000,
173 .size = 48*0x20000,
174 },
175 {
176 .name = "Root File System",
177 .offset = 0x800000,
178 .size = 0,
179 },
148}; 180};
149 181
150#ifdef CONFIG_MTD_CMDLINE_PARTS 182#ifdef CONFIG_MTD_CMDLINE_PARTS
151const char *part_probes[] = { "cmdlinepart", NULL }; 183const char *part_probes[] = { "cmdlinepart", NULL };
152#endif 184#endif
185#endif
153 186
154/** 187/**
155 * struct fsmc_nand_data - atructure for FSMC NAND device state 188 * struct fsmc_nand_data - structure for FSMC NAND device state
156 * 189 *
190 * @pid: Part ID on the AMBA PrimeCell format
157 * @mtd: MTD info for a NAND flash. 191 * @mtd: MTD info for a NAND flash.
158 * @nand: Chip related info for a NAND flash. 192 * @nand: Chip related info for a NAND flash.
159 * @partitions: Partition info for a NAND Flash. 193 * @partitions: Partition info for a NAND Flash.
@@ -169,6 +203,7 @@ const char *part_probes[] = { "cmdlinepart", NULL };
169 * @regs_va: FSMC regs base address. 203 * @regs_va: FSMC regs base address.
170 */ 204 */
171struct fsmc_nand_data { 205struct fsmc_nand_data {
206 u32 pid;
172 struct mtd_info mtd; 207 struct mtd_info mtd;
173 struct nand_chip nand; 208 struct nand_chip nand;
174 struct mtd_partition *partitions; 209 struct mtd_partition *partitions;
@@ -508,7 +543,9 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
508 struct nand_chip *nand; 543 struct nand_chip *nand;
509 struct fsmc_regs *regs; 544 struct fsmc_regs *regs;
510 struct resource *res; 545 struct resource *res;
511 int nr_parts, ret = 0; 546 int ret = 0;
547 u32 pid;
548 int i;
512 549
513 if (!pdata) { 550 if (!pdata) {
514 dev_err(&pdev->dev, "platform data is NULL\n"); 551 dev_err(&pdev->dev, "platform data is NULL\n");
@@ -598,6 +635,18 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
598 if (ret) 635 if (ret)
599 goto err_probe1; 636 goto err_probe1;
600 637
638 /*
639 * This device ID is actually a common AMBA ID as used on the
640 * AMBA PrimeCell bus. However it is not a PrimeCell.
641 */
642 for (pid = 0, i = 0; i < 4; i++)
643 pid |= (readl(host->regs_va + resource_size(res) - 0x20 + 4 * i) & 255) << (i * 8);
644 host->pid = pid;
645 dev_info(&pdev->dev, "FSMC device partno %03x, manufacturer %02x, "
646 "revision %02x, config %02x\n",
647 AMBA_PART_BITS(pid), AMBA_MANF_BITS(pid),
648 AMBA_REV_BITS(pid), AMBA_CONFIG_BITS(pid));
649
601 host->bank = pdata->bank; 650 host->bank = pdata->bank;
602 host->select_chip = pdata->select_bank; 651 host->select_chip = pdata->select_bank;
603 regs = host->regs_va; 652 regs = host->regs_va;
@@ -625,7 +674,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
625 674
626 fsmc_nand_setup(regs, host->bank, nand->options & NAND_BUSWIDTH_16); 675 fsmc_nand_setup(regs, host->bank, nand->options & NAND_BUSWIDTH_16);
627 676
628 if (get_fsmc_version(host->regs_va) == FSMC_VER8) { 677 if (AMBA_REV_BITS(host->pid) >= 8) {
629 nand->ecc.read_page = fsmc_read_page_hwecc; 678 nand->ecc.read_page = fsmc_read_page_hwecc;
630 nand->ecc.calculate = fsmc_read_hwecc_ecc4; 679 nand->ecc.calculate = fsmc_read_hwecc_ecc4;
631 nand->ecc.correct = fsmc_correct_data; 680 nand->ecc.correct = fsmc_correct_data;
@@ -645,7 +694,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
645 goto err_probe; 694 goto err_probe;
646 } 695 }
647 696
648 if (get_fsmc_version(host->regs_va) == FSMC_VER8) { 697 if (AMBA_REV_BITS(host->pid) >= 8) {
649 if (host->mtd.writesize == 512) { 698 if (host->mtd.writesize == 512) {
650 nand->ecc.layout = &fsmc_ecc4_sp_layout; 699 nand->ecc.layout = &fsmc_ecc4_sp_layout;
651 host->ecc_place = &fsmc_ecc4_sp_place; 700 host->ecc_place = &fsmc_ecc4_sp_place;
@@ -676,11 +725,9 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
676 * Check if partition info passed via command line 725 * Check if partition info passed via command line
677 */ 726 */
678 host->mtd.name = "nand"; 727 host->mtd.name = "nand";
679 nr_parts = parse_mtd_partitions(&host->mtd, part_probes, 728 host->nr_partitions = parse_mtd_partitions(&host->mtd, part_probes,
680 &host->partitions, 0); 729 &host->partitions, 0);
681 if (nr_parts > 0) { 730 if (host->nr_partitions <= 0) {
682 host->nr_partitions = nr_parts;
683 } else {
684#endif 731#endif
685 /* 732 /*
686 * Check if partition info passed via command line 733 * Check if partition info passed via command line
diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
index 67343fc31bd5..cea38a5d4ac5 100644
--- a/drivers/mtd/nand/jz4740_nand.c
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -251,58 +251,6 @@ static int jz_nand_correct_ecc_rs(struct mtd_info *mtd, uint8_t *dat,
251 return 0; 251 return 0;
252} 252}
253 253
254
255/* Copy paste of nand_read_page_hwecc_oob_first except for different eccpos
256 * handling. The ecc area is for 4k chips 72 bytes long and thus does not fit
257 * into the eccpos array. */
258static int jz_nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
259 struct nand_chip *chip, uint8_t *buf, int page)
260{
261 int i, eccsize = chip->ecc.size;
262 int eccbytes = chip->ecc.bytes;
263 int eccsteps = chip->ecc.steps;
264 uint8_t *p = buf;
265 unsigned int ecc_offset = chip->page_shift;
266
267 /* Read the OOB area first */
268 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
269 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
270 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
271
272 for (i = ecc_offset; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
273 int stat;
274
275 chip->ecc.hwctl(mtd, NAND_ECC_READ);
276 chip->read_buf(mtd, p, eccsize);
277
278 stat = chip->ecc.correct(mtd, p, &chip->oob_poi[i], NULL);
279 if (stat < 0)
280 mtd->ecc_stats.failed++;
281 else
282 mtd->ecc_stats.corrected += stat;
283 }
284 return 0;
285}
286
287/* Copy-and-paste of nand_write_page_hwecc with different eccpos handling. */
288static void jz_nand_write_page_hwecc(struct mtd_info *mtd,
289 struct nand_chip *chip, const uint8_t *buf)
290{
291 int i, eccsize = chip->ecc.size;
292 int eccbytes = chip->ecc.bytes;
293 int eccsteps = chip->ecc.steps;
294 const uint8_t *p = buf;
295 unsigned int ecc_offset = chip->page_shift;
296
297 for (i = ecc_offset; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
298 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
299 chip->write_buf(mtd, p, eccsize);
300 chip->ecc.calculate(mtd, p, &chip->oob_poi[i]);
301 }
302
303 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
304}
305
306#ifdef CONFIG_MTD_CMDLINE_PARTS 254#ifdef CONFIG_MTD_CMDLINE_PARTS
307static const char *part_probes[] = {"cmdline", NULL}; 255static const char *part_probes[] = {"cmdline", NULL};
308#endif 256#endif
@@ -393,9 +341,6 @@ static int __devinit jz_nand_probe(struct platform_device *pdev)
393 chip->ecc.size = 512; 341 chip->ecc.size = 512;
394 chip->ecc.bytes = 9; 342 chip->ecc.bytes = 9;
395 343
396 chip->ecc.read_page = jz_nand_read_page_hwecc_oob_first;
397 chip->ecc.write_page = jz_nand_write_page_hwecc;
398
399 if (pdata) 344 if (pdata)
400 chip->ecc.layout = pdata->ecc_layout; 345 chip->ecc.layout = pdata->ecc_layout;
401 346
@@ -489,7 +434,7 @@ static int __devexit jz_nand_remove(struct platform_device *pdev)
489 return 0; 434 return 0;
490} 435}
491 436
492struct platform_driver jz_nand_driver = { 437static struct platform_driver jz_nand_driver = {
493 .probe = jz_nand_probe, 438 .probe = jz_nand_probe,
494 .remove = __devexit_p(jz_nand_remove), 439 .remove = __devexit_p(jz_nand_remove),
495 .driver = { 440 .driver = {
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 214b03afdd48..ef932ba55a0b 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -1009,7 +1009,7 @@ static int __init mxcnd_probe(struct platform_device *pdev)
1009 struct mxc_nand_platform_data *pdata = pdev->dev.platform_data; 1009 struct mxc_nand_platform_data *pdata = pdev->dev.platform_data;
1010 struct mxc_nand_host *host; 1010 struct mxc_nand_host *host;
1011 struct resource *res; 1011 struct resource *res;
1012 int err = 0, nr_parts = 0; 1012 int err = 0, __maybe_unused nr_parts = 0;
1013 struct nand_ecclayout *oob_smallpage, *oob_largepage; 1013 struct nand_ecclayout *oob_smallpage, *oob_largepage;
1014 1014
1015 /* Allocate memory for MTD device structure and private data */ 1015 /* Allocate memory for MTD device structure and private data */
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 31bf376b82a0..a9c6ce745767 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2865,20 +2865,24 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
2865 2865
2866 /* check version */ 2866 /* check version */
2867 val = le16_to_cpu(p->revision); 2867 val = le16_to_cpu(p->revision);
2868 if (val == 1 || val > (1 << 4)) { 2868 if (val & (1 << 5))
2869 printk(KERN_INFO "%s: unsupported ONFI version: %d\n", 2869 chip->onfi_version = 23;
2870 __func__, val); 2870 else if (val & (1 << 4))
2871 return 0;
2872 }
2873
2874 if (val & (1 << 4))
2875 chip->onfi_version = 22; 2871 chip->onfi_version = 22;
2876 else if (val & (1 << 3)) 2872 else if (val & (1 << 3))
2877 chip->onfi_version = 21; 2873 chip->onfi_version = 21;
2878 else if (val & (1 << 2)) 2874 else if (val & (1 << 2))
2879 chip->onfi_version = 20; 2875 chip->onfi_version = 20;
2880 else 2876 else if (val & (1 << 1))
2881 chip->onfi_version = 10; 2877 chip->onfi_version = 10;
2878 else
2879 chip->onfi_version = 0;
2880
2881 if (!chip->onfi_version) {
2882 printk(KERN_INFO "%s: unsupported ONFI version: %d\n",
2883 __func__, val);
2884 return 0;
2885 }
2882 2886
2883 sanitize_string(p->manufacturer, sizeof(p->manufacturer)); 2887 sanitize_string(p->manufacturer, sizeof(p->manufacturer));
2884 sanitize_string(p->model, sizeof(p->model)); 2888 sanitize_string(p->model, sizeof(p->model));
@@ -2887,7 +2891,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
2887 mtd->writesize = le32_to_cpu(p->byte_per_page); 2891 mtd->writesize = le32_to_cpu(p->byte_per_page);
2888 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize; 2892 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
2889 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); 2893 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
2890 chip->chipsize = le32_to_cpu(p->blocks_per_lun) * mtd->erasesize; 2894 chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
2891 busw = 0; 2895 busw = 0;
2892 if (le16_to_cpu(p->features) & 1) 2896 if (le16_to_cpu(p->features) & 1)
2893 busw = NAND_BUSWIDTH_16; 2897 busw = NAND_BUSWIDTH_16;
@@ -3157,7 +3161,7 @@ ident_done:
3157 printk(KERN_INFO "NAND device: Manufacturer ID:" 3161 printk(KERN_INFO "NAND device: Manufacturer ID:"
3158 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, *dev_id, 3162 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, *dev_id,
3159 nand_manuf_ids[maf_idx].name, 3163 nand_manuf_ids[maf_idx].name,
3160 chip->onfi_version ? type->name : chip->onfi_params.model); 3164 chip->onfi_version ? chip->onfi_params.model : type->name);
3161 3165
3162 return type; 3166 return type;
3163} 3167}
@@ -3435,6 +3439,7 @@ int nand_scan_tail(struct mtd_info *mtd)
3435 mtd->resume = nand_resume; 3439 mtd->resume = nand_resume;
3436 mtd->block_isbad = nand_block_isbad; 3440 mtd->block_isbad = nand_block_isbad;
3437 mtd->block_markbad = nand_block_markbad; 3441 mtd->block_markbad = nand_block_markbad;
3442 mtd->writebufsize = mtd->writesize;
3438 3443
3439 /* propagate ecc.layout to mtd_info */ 3444 /* propagate ecc.layout to mtd_info */
3440 mtd->ecclayout = chip->ecc.layout; 3445 mtd->ecclayout = chip->ecc.layout;
diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c
index 586b981f0e61..6ebd869993aa 100644
--- a/drivers/mtd/nand/nand_bbt.c
+++ b/drivers/mtd/nand/nand_bbt.c
@@ -1092,7 +1092,8 @@ static void mark_bbt_region(struct mtd_info *mtd, struct nand_bbt_descr *td)
1092 1092
1093/** 1093/**
1094 * verify_bbt_descr - verify the bad block description 1094 * verify_bbt_descr - verify the bad block description
1095 * @bd: the table to verify 1095 * @mtd: MTD device structure
1096 * @bd: the table to verify
1096 * 1097 *
1097 * This functions performs a few sanity checks on the bad block description 1098 * This functions performs a few sanity checks on the bad block description
1098 * table. 1099 * table.
diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c
index a6a73aab1253..a5aa99f014ba 100644
--- a/drivers/mtd/nand/nandsim.c
+++ b/drivers/mtd/nand/nandsim.c
@@ -210,12 +210,12 @@ MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in d
210#define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */ 210#define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */
211#define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */ 211#define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */
212#define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */ 212#define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */
213#define STATE_CMD_PAGEPROG 0x00000004 /* start page programm */ 213#define STATE_CMD_PAGEPROG 0x00000004 /* start page program */
214#define STATE_CMD_READOOB 0x00000005 /* read OOB area */ 214#define STATE_CMD_READOOB 0x00000005 /* read OOB area */
215#define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */ 215#define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */
216#define STATE_CMD_STATUS 0x00000007 /* read status */ 216#define STATE_CMD_STATUS 0x00000007 /* read status */
217#define STATE_CMD_STATUS_M 0x00000008 /* read multi-plane status (isn't implemented) */ 217#define STATE_CMD_STATUS_M 0x00000008 /* read multi-plane status (isn't implemented) */
218#define STATE_CMD_SEQIN 0x00000009 /* sequential data imput */ 218#define STATE_CMD_SEQIN 0x00000009 /* sequential data input */
219#define STATE_CMD_READID 0x0000000A /* read ID */ 219#define STATE_CMD_READID 0x0000000A /* read ID */
220#define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */ 220#define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
221#define STATE_CMD_RESET 0x0000000C /* reset */ 221#define STATE_CMD_RESET 0x0000000C /* reset */
@@ -230,7 +230,7 @@ MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in d
230#define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */ 230#define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
231#define STATE_ADDR_MASK 0x00000070 /* address states mask */ 231#define STATE_ADDR_MASK 0x00000070 /* address states mask */
232 232
233/* Durind data input/output the simulator is in these states */ 233/* During data input/output the simulator is in these states */
234#define STATE_DATAIN 0x00000100 /* waiting for data input */ 234#define STATE_DATAIN 0x00000100 /* waiting for data input */
235#define STATE_DATAIN_MASK 0x00000100 /* data input states mask */ 235#define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
236 236
@@ -248,7 +248,7 @@ MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in d
248 248
249/* Simulator's actions bit masks */ 249/* Simulator's actions bit masks */
250#define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */ 250#define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */
251#define ACTION_PRGPAGE 0x00200000 /* programm the internal buffer to flash */ 251#define ACTION_PRGPAGE 0x00200000 /* program the internal buffer to flash */
252#define ACTION_SECERASE 0x00300000 /* erase sector */ 252#define ACTION_SECERASE 0x00300000 /* erase sector */
253#define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */ 253#define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */
254#define ACTION_HALFOFF 0x00500000 /* add to address half of page */ 254#define ACTION_HALFOFF 0x00500000 /* add to address half of page */
@@ -263,18 +263,18 @@ MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in d
263#define OPT_PAGE512 0x00000002 /* 512-byte page chips */ 263#define OPT_PAGE512 0x00000002 /* 512-byte page chips */
264#define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */ 264#define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */
265#define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */ 265#define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */
266#define OPT_AUTOINCR 0x00000020 /* page number auto inctimentation is possible */ 266#define OPT_AUTOINCR 0x00000020 /* page number auto incrementation is possible */
267#define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */ 267#define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
268#define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */ 268#define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */
269#define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */ 269#define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
270#define OPT_SMALLPAGE (OPT_PAGE256 | OPT_PAGE512) /* 256 and 512-byte page chips */ 270#define OPT_SMALLPAGE (OPT_PAGE256 | OPT_PAGE512) /* 256 and 512-byte page chips */
271 271
272/* Remove action bits ftom state */ 272/* Remove action bits from state */
273#define NS_STATE(x) ((x) & ~ACTION_MASK) 273#define NS_STATE(x) ((x) & ~ACTION_MASK)
274 274
275/* 275/*
276 * Maximum previous states which need to be saved. Currently saving is 276 * Maximum previous states which need to be saved. Currently saving is
277 * only needed for page programm operation with preceeded read command 277 * only needed for page program operation with preceded read command
278 * (which is only valid for 512-byte pages). 278 * (which is only valid for 512-byte pages).
279 */ 279 */
280#define NS_MAX_PREVSTATES 1 280#define NS_MAX_PREVSTATES 1
@@ -380,16 +380,16 @@ static struct nandsim_operations {
380 /* Read OOB */ 380 /* Read OOB */
381 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY, 381 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
382 STATE_DATAOUT, STATE_READY}}, 382 STATE_DATAOUT, STATE_READY}},
383 /* Programm page starting from the beginning */ 383 /* Program page starting from the beginning */
384 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN, 384 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
385 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, 385 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
386 /* Programm page starting from the beginning */ 386 /* Program page starting from the beginning */
387 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE, 387 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
388 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, 388 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
389 /* Programm page starting from the second half */ 389 /* Program page starting from the second half */
390 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE, 390 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
391 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, 391 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
392 /* Programm OOB */ 392 /* Program OOB */
393 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE, 393 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
394 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, 394 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
395 /* Erase sector */ 395 /* Erase sector */
@@ -470,7 +470,7 @@ static int alloc_device(struct nandsim *ns)
470 err = -EINVAL; 470 err = -EINVAL;
471 goto err_close; 471 goto err_close;
472 } 472 }
473 ns->pages_written = vmalloc(ns->geom.pgnum); 473 ns->pages_written = vzalloc(ns->geom.pgnum);
474 if (!ns->pages_written) { 474 if (!ns->pages_written) {
475 NS_ERR("alloc_device: unable to allocate pages written array\n"); 475 NS_ERR("alloc_device: unable to allocate pages written array\n");
476 err = -ENOMEM; 476 err = -ENOMEM;
@@ -483,7 +483,6 @@ static int alloc_device(struct nandsim *ns)
483 goto err_free; 483 goto err_free;
484 } 484 }
485 ns->cfile = cfile; 485 ns->cfile = cfile;
486 memset(ns->pages_written, 0, ns->geom.pgnum);
487 return 0; 486 return 0;
488 } 487 }
489 488
@@ -1171,9 +1170,9 @@ static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1171 * of supported operations. 1170 * of supported operations.
1172 * 1171 *
1173 * Operation can be unknown because of the following. 1172 * Operation can be unknown because of the following.
1174 * 1. New command was accepted and this is the firs call to find the 1173 * 1. New command was accepted and this is the first call to find the
1175 * correspondent states chain. In this case ns->npstates = 0; 1174 * correspondent states chain. In this case ns->npstates = 0;
1176 * 2. There is several operations which begin with the same command(s) 1175 * 2. There are several operations which begin with the same command(s)
1177 * (for example program from the second half and read from the 1176 * (for example program from the second half and read from the
1178 * second half operations both begin with the READ1 command). In this 1177 * second half operations both begin with the READ1 command). In this
1179 * case the ns->pstates[] array contains previous states. 1178 * case the ns->pstates[] array contains previous states.
@@ -1186,7 +1185,7 @@ static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1186 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is 1185 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1187 * zeroed). 1186 * zeroed).
1188 * 1187 *
1189 * If there are several maches, the current state is pushed to the 1188 * If there are several matches, the current state is pushed to the
1190 * ns->pstates. 1189 * ns->pstates.
1191 * 1190 *
1192 * The operation can be unknown only while commands are input to the chip. 1191 * The operation can be unknown only while commands are input to the chip.
@@ -1195,10 +1194,10 @@ static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1195 * operation is searched using the following pattern: 1194 * operation is searched using the following pattern:
1196 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input> 1195 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1197 * 1196 *
1198 * It is supposed that this pattern must either match one operation on 1197 * It is supposed that this pattern must either match one operation or
1199 * none. There can't be ambiguity in that case. 1198 * none. There can't be ambiguity in that case.
1200 * 1199 *
1201 * If no matches found, the functions does the following: 1200 * If no matches found, the function does the following:
1202 * 1. if there are saved states present, try to ignore them and search 1201 * 1. if there are saved states present, try to ignore them and search
1203 * again only using the last command. If nothing was found, switch 1202 * again only using the last command. If nothing was found, switch
1204 * to the STATE_READY state. 1203 * to the STATE_READY state.
@@ -1668,7 +1667,7 @@ static int do_state_action(struct nandsim *ns, uint32_t action)
1668 1667
1669 case ACTION_PRGPAGE: 1668 case ACTION_PRGPAGE:
1670 /* 1669 /*
1671 * Programm page - move internal buffer data to the page. 1670 * Program page - move internal buffer data to the page.
1672 */ 1671 */
1673 1672
1674 if (ns->lines.wp) { 1673 if (ns->lines.wp) {
@@ -1933,7 +1932,7 @@ static u_char ns_nand_read_byte(struct mtd_info *mtd)
1933 NS_DBG("read_byte: all bytes were read\n"); 1932 NS_DBG("read_byte: all bytes were read\n");
1934 1933
1935 /* 1934 /*
1936 * The OPT_AUTOINCR allows to read next conseqitive pages without 1935 * The OPT_AUTOINCR allows to read next consecutive pages without
1937 * new read operation cycle. 1936 * new read operation cycle.
1938 */ 1937 */
1939 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) { 1938 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
diff --git a/drivers/mtd/nand/pasemi_nand.c b/drivers/mtd/nand/pasemi_nand.c
index 6ddb2461d740..bb277a54986f 100644
--- a/drivers/mtd/nand/pasemi_nand.c
+++ b/drivers/mtd/nand/pasemi_nand.c
@@ -107,7 +107,7 @@ static int __devinit pasemi_nand_probe(struct platform_device *ofdev,
107 if (pasemi_nand_mtd) 107 if (pasemi_nand_mtd)
108 return -ENODEV; 108 return -ENODEV;
109 109
110 pr_debug("pasemi_nand at %llx-%llx\n", res.start, res.end); 110 pr_debug("pasemi_nand at %pR\n", &res);
111 111
112 /* Allocate memory for MTD device structure and private data */ 112 /* Allocate memory for MTD device structure and private data */
113 pasemi_nand_mtd = kzalloc(sizeof(struct mtd_info) + 113 pasemi_nand_mtd = kzalloc(sizeof(struct mtd_info) +
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 17f8518cc5eb..ea2c288df3f6 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -885,6 +885,7 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
885 /* set info fields needed to __readid */ 885 /* set info fields needed to __readid */
886 info->read_id_bytes = (info->page_size == 2048) ? 4 : 2; 886 info->read_id_bytes = (info->page_size == 2048) ? 4 : 2;
887 info->reg_ndcr = ndcr; 887 info->reg_ndcr = ndcr;
888 info->cmdset = &default_cmdset;
888 889
889 if (__readid(info, &id)) 890 if (__readid(info, &id))
890 return -ENODEV; 891 return -ENODEV;
@@ -915,7 +916,6 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
915 916
916 info->ndtr0cs0 = nand_readl(info, NDTR0CS0); 917 info->ndtr0cs0 = nand_readl(info, NDTR0CS0);
917 info->ndtr1cs0 = nand_readl(info, NDTR1CS0); 918 info->ndtr1cs0 = nand_readl(info, NDTR1CS0);
918 info->cmdset = &default_cmdset;
919 919
920 return 0; 920 return 0;
921} 921}
diff --git a/drivers/mtd/nand/txx9ndfmc.c b/drivers/mtd/nand/txx9ndfmc.c
index 054a41c0ef4a..ca270a4881a4 100644
--- a/drivers/mtd/nand/txx9ndfmc.c
+++ b/drivers/mtd/nand/txx9ndfmc.c
@@ -277,8 +277,9 @@ static int txx9ndfmc_nand_scan(struct mtd_info *mtd)
277 ret = nand_scan_ident(mtd, 1, NULL); 277 ret = nand_scan_ident(mtd, 1, NULL);
278 if (!ret) { 278 if (!ret) {
279 if (mtd->writesize >= 512) { 279 if (mtd->writesize >= 512) {
280 chip->ecc.size = mtd->writesize; 280 /* Hardware ECC 6 byte ECC per 512 Byte data */
281 chip->ecc.bytes = 3 * (mtd->writesize / 256); 281 chip->ecc.size = 512;
282 chip->ecc.bytes = 6;
282 } 283 }
283 ret = nand_scan_tail(mtd); 284 ret = nand_scan_tail(mtd);
284 } 285 }
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index d0894ca7798b..ac31f461cc1c 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -35,6 +35,7 @@
35#include <linux/dma-mapping.h> 35#include <linux/dma-mapping.h>
36#include <linux/io.h> 36#include <linux/io.h>
37#include <linux/slab.h> 37#include <linux/slab.h>
38#include <linux/regulator/consumer.h>
38 39
39#include <asm/mach/flash.h> 40#include <asm/mach/flash.h>
40#include <plat/gpmc.h> 41#include <plat/gpmc.h>
@@ -63,8 +64,13 @@ struct omap2_onenand {
63 int dma_channel; 64 int dma_channel;
64 int freq; 65 int freq;
65 int (*setup)(void __iomem *base, int freq); 66 int (*setup)(void __iomem *base, int freq);
67 struct regulator *regulator;
66}; 68};
67 69
70#ifdef CONFIG_MTD_PARTITIONS
71static const char *part_probes[] = { "cmdlinepart", NULL, };
72#endif
73
68static void omap2_onenand_dma_cb(int lch, u16 ch_status, void *data) 74static void omap2_onenand_dma_cb(int lch, u16 ch_status, void *data)
69{ 75{
70 struct omap2_onenand *c = data; 76 struct omap2_onenand *c = data;
@@ -108,8 +114,9 @@ static void wait_warn(char *msg, int state, unsigned int ctrl,
108static int omap2_onenand_wait(struct mtd_info *mtd, int state) 114static int omap2_onenand_wait(struct mtd_info *mtd, int state)
109{ 115{
110 struct omap2_onenand *c = container_of(mtd, struct omap2_onenand, mtd); 116 struct omap2_onenand *c = container_of(mtd, struct omap2_onenand, mtd);
117 struct onenand_chip *this = mtd->priv;
111 unsigned int intr = 0; 118 unsigned int intr = 0;
112 unsigned int ctrl; 119 unsigned int ctrl, ctrl_mask;
113 unsigned long timeout; 120 unsigned long timeout;
114 u32 syscfg; 121 u32 syscfg;
115 122
@@ -180,7 +187,8 @@ retry:
180 if (result == 0) { 187 if (result == 0) {
181 /* Timeout after 20ms */ 188 /* Timeout after 20ms */
182 ctrl = read_reg(c, ONENAND_REG_CTRL_STATUS); 189 ctrl = read_reg(c, ONENAND_REG_CTRL_STATUS);
183 if (ctrl & ONENAND_CTRL_ONGO) { 190 if (ctrl & ONENAND_CTRL_ONGO &&
191 !this->ongoing) {
184 /* 192 /*
185 * The operation seems to be still going 193 * The operation seems to be still going
186 * so give it some more time. 194 * so give it some more time.
@@ -269,7 +277,11 @@ retry:
269 return -EIO; 277 return -EIO;
270 } 278 }
271 279
272 if (ctrl & 0xFE9F) 280 ctrl_mask = 0xFE9F;
281 if (this->ongoing)
282 ctrl_mask &= ~0x8000;
283
284 if (ctrl & ctrl_mask)
273 wait_warn("unexpected controller status", state, ctrl, intr); 285 wait_warn("unexpected controller status", state, ctrl, intr);
274 286
275 return 0; 287 return 0;
@@ -591,6 +603,30 @@ static void omap2_onenand_shutdown(struct platform_device *pdev)
591 memset((__force void *)c->onenand.base, 0, ONENAND_BUFRAM_SIZE); 603 memset((__force void *)c->onenand.base, 0, ONENAND_BUFRAM_SIZE);
592} 604}
593 605
606static int omap2_onenand_enable(struct mtd_info *mtd)
607{
608 int ret;
609 struct omap2_onenand *c = container_of(mtd, struct omap2_onenand, mtd);
610
611 ret = regulator_enable(c->regulator);
612 if (ret != 0)
613 dev_err(&c->pdev->dev, "cant enable regulator\n");
614
615 return ret;
616}
617
618static int omap2_onenand_disable(struct mtd_info *mtd)
619{
620 int ret;
621 struct omap2_onenand *c = container_of(mtd, struct omap2_onenand, mtd);
622
623 ret = regulator_disable(c->regulator);
624 if (ret != 0)
625 dev_err(&c->pdev->dev, "cant disable regulator\n");
626
627 return ret;
628}
629
594static int __devinit omap2_onenand_probe(struct platform_device *pdev) 630static int __devinit omap2_onenand_probe(struct platform_device *pdev)
595{ 631{
596 struct omap_onenand_platform_data *pdata; 632 struct omap_onenand_platform_data *pdata;
@@ -705,8 +741,18 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
705 } 741 }
706 } 742 }
707 743
744 if (pdata->regulator_can_sleep) {
745 c->regulator = regulator_get(&pdev->dev, "vonenand");
746 if (IS_ERR(c->regulator)) {
747 dev_err(&pdev->dev, "Failed to get regulator\n");
748 goto err_release_dma;
749 }
750 c->onenand.enable = omap2_onenand_enable;
751 c->onenand.disable = omap2_onenand_disable;
752 }
753
708 if ((r = onenand_scan(&c->mtd, 1)) < 0) 754 if ((r = onenand_scan(&c->mtd, 1)) < 0)
709 goto err_release_dma; 755 goto err_release_regulator;
710 756
711 switch ((c->onenand.version_id >> 4) & 0xf) { 757 switch ((c->onenand.version_id >> 4) & 0xf) {
712 case 0: 758 case 0:
@@ -727,13 +773,15 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
727 } 773 }
728 774
729#ifdef CONFIG_MTD_PARTITIONS 775#ifdef CONFIG_MTD_PARTITIONS
730 if (pdata->parts != NULL) 776 r = parse_mtd_partitions(&c->mtd, part_probes, &c->parts, 0);
731 r = add_mtd_partitions(&c->mtd, pdata->parts, 777 if (r > 0)
732 pdata->nr_parts); 778 r = add_mtd_partitions(&c->mtd, c->parts, r);
779 else if (pdata->parts != NULL)
780 r = add_mtd_partitions(&c->mtd, pdata->parts, pdata->nr_parts);
733 else 781 else
734#endif 782#endif
735 r = add_mtd_device(&c->mtd); 783 r = add_mtd_device(&c->mtd);
736 if (r < 0) 784 if (r)
737 goto err_release_onenand; 785 goto err_release_onenand;
738 786
739 platform_set_drvdata(pdev, c); 787 platform_set_drvdata(pdev, c);
@@ -742,6 +790,8 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
742 790
743err_release_onenand: 791err_release_onenand:
744 onenand_release(&c->mtd); 792 onenand_release(&c->mtd);
793err_release_regulator:
794 regulator_put(c->regulator);
745err_release_dma: 795err_release_dma:
746 if (c->dma_channel != -1) 796 if (c->dma_channel != -1)
747 omap_free_dma(c->dma_channel); 797 omap_free_dma(c->dma_channel);
@@ -757,6 +807,7 @@ err_release_mem_region:
757err_free_cs: 807err_free_cs:
758 gpmc_cs_free(c->gpmc_cs); 808 gpmc_cs_free(c->gpmc_cs);
759err_kfree: 809err_kfree:
810 kfree(c->parts);
760 kfree(c); 811 kfree(c);
761 812
762 return r; 813 return r;
@@ -766,18 +817,8 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev)
766{ 817{
767 struct omap2_onenand *c = dev_get_drvdata(&pdev->dev); 818 struct omap2_onenand *c = dev_get_drvdata(&pdev->dev);
768 819
769 BUG_ON(c == NULL);
770
771#ifdef CONFIG_MTD_PARTITIONS
772 if (c->parts)
773 del_mtd_partitions(&c->mtd);
774 else
775 del_mtd_device(&c->mtd);
776#else
777 del_mtd_device(&c->mtd);
778#endif
779
780 onenand_release(&c->mtd); 820 onenand_release(&c->mtd);
821 regulator_put(c->regulator);
781 if (c->dma_channel != -1) 822 if (c->dma_channel != -1)
782 omap_free_dma(c->dma_channel); 823 omap_free_dma(c->dma_channel);
783 omap2_onenand_shutdown(pdev); 824 omap2_onenand_shutdown(pdev);
@@ -789,6 +830,7 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev)
789 iounmap(c->onenand.base); 830 iounmap(c->onenand.base);
790 release_mem_region(c->phys_base, ONENAND_IO_SIZE); 831 release_mem_region(c->phys_base, ONENAND_IO_SIZE);
791 gpmc_cs_free(c->gpmc_cs); 832 gpmc_cs_free(c->gpmc_cs);
833 kfree(c->parts);
792 kfree(c); 834 kfree(c);
793 835
794 return 0; 836 return 0;
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c
index 6b3a875647c9..bac41caa8df7 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -400,8 +400,7 @@ static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t le
400 value = onenand_bufferram_address(this, block); 400 value = onenand_bufferram_address(this, block);
401 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 401 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
402 402
403 if (ONENAND_IS_MLC(this) || ONENAND_IS_2PLANE(this) || 403 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this))
404 ONENAND_IS_4KB_PAGE(this))
405 /* It is always BufferRAM0 */ 404 /* It is always BufferRAM0 */
406 ONENAND_SET_BUFFERRAM0(this); 405 ONENAND_SET_BUFFERRAM0(this);
407 else 406 else
@@ -430,7 +429,7 @@ static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t le
430 case FLEXONENAND_CMD_RECOVER_LSB: 429 case FLEXONENAND_CMD_RECOVER_LSB:
431 case ONENAND_CMD_READ: 430 case ONENAND_CMD_READ:
432 case ONENAND_CMD_READOOB: 431 case ONENAND_CMD_READOOB:
433 if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) 432 if (ONENAND_IS_4KB_PAGE(this))
434 /* It is always BufferRAM0 */ 433 /* It is always BufferRAM0 */
435 dataram = ONENAND_SET_BUFFERRAM0(this); 434 dataram = ONENAND_SET_BUFFERRAM0(this);
436 else 435 else
@@ -949,6 +948,8 @@ static int onenand_get_device(struct mtd_info *mtd, int new_state)
949 if (this->state == FL_READY) { 948 if (this->state == FL_READY) {
950 this->state = new_state; 949 this->state = new_state;
951 spin_unlock(&this->chip_lock); 950 spin_unlock(&this->chip_lock);
951 if (new_state != FL_PM_SUSPENDED && this->enable)
952 this->enable(mtd);
952 break; 953 break;
953 } 954 }
954 if (new_state == FL_PM_SUSPENDED) { 955 if (new_state == FL_PM_SUSPENDED) {
@@ -975,6 +976,8 @@ static void onenand_release_device(struct mtd_info *mtd)
975{ 976{
976 struct onenand_chip *this = mtd->priv; 977 struct onenand_chip *this = mtd->priv;
977 978
979 if (this->state != FL_PM_SUSPENDED && this->disable)
980 this->disable(mtd);
978 /* Release the chip */ 981 /* Release the chip */
979 spin_lock(&this->chip_lock); 982 spin_lock(&this->chip_lock);
980 this->state = FL_READY; 983 this->state = FL_READY;
@@ -1353,7 +1356,7 @@ static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
1353 1356
1354 stats = mtd->ecc_stats; 1357 stats = mtd->ecc_stats;
1355 1358
1356 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1359 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1357 1360
1358 while (read < len) { 1361 while (read < len) {
1359 cond_resched(); 1362 cond_resched();
@@ -1429,7 +1432,7 @@ static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1429 int ret; 1432 int ret;
1430 1433
1431 onenand_get_device(mtd, FL_READING); 1434 onenand_get_device(mtd, FL_READING);
1432 ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ? 1435 ret = ONENAND_IS_4KB_PAGE(this) ?
1433 onenand_mlc_read_ops_nolock(mtd, from, &ops) : 1436 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
1434 onenand_read_ops_nolock(mtd, from, &ops); 1437 onenand_read_ops_nolock(mtd, from, &ops);
1435 onenand_release_device(mtd); 1438 onenand_release_device(mtd);
@@ -1464,7 +1467,7 @@ static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1464 1467
1465 onenand_get_device(mtd, FL_READING); 1468 onenand_get_device(mtd, FL_READING);
1466 if (ops->datbuf) 1469 if (ops->datbuf)
1467 ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ? 1470 ret = ONENAND_IS_4KB_PAGE(this) ?
1468 onenand_mlc_read_ops_nolock(mtd, from, ops) : 1471 onenand_mlc_read_ops_nolock(mtd, from, ops) :
1469 onenand_read_ops_nolock(mtd, from, ops); 1472 onenand_read_ops_nolock(mtd, from, ops);
1470 else 1473 else
@@ -1485,8 +1488,7 @@ static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1485{ 1488{
1486 struct onenand_chip *this = mtd->priv; 1489 struct onenand_chip *this = mtd->priv;
1487 unsigned long timeout; 1490 unsigned long timeout;
1488 unsigned int interrupt; 1491 unsigned int interrupt, ctrl, ecc, addr1, addr8;
1489 unsigned int ctrl;
1490 1492
1491 /* The 20 msec is enough */ 1493 /* The 20 msec is enough */
1492 timeout = jiffies + msecs_to_jiffies(20); 1494 timeout = jiffies + msecs_to_jiffies(20);
@@ -1498,25 +1500,28 @@ static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1498 /* To get correct interrupt status in timeout case */ 1500 /* To get correct interrupt status in timeout case */
1499 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1501 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1500 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 1502 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1503 addr1 = this->read_word(this->base + ONENAND_REG_START_ADDRESS1);
1504 addr8 = this->read_word(this->base + ONENAND_REG_START_ADDRESS8);
1501 1505
1502 if (interrupt & ONENAND_INT_READ) { 1506 if (interrupt & ONENAND_INT_READ) {
1503 int ecc = onenand_read_ecc(this); 1507 ecc = onenand_read_ecc(this);
1504 if (ecc & ONENAND_ECC_2BIT_ALL) { 1508 if (ecc & ONENAND_ECC_2BIT_ALL) {
1505 printk(KERN_WARNING "%s: ecc error = 0x%04x, " 1509 printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x "
1506 "controller error 0x%04x\n", 1510 "intr 0x%04x addr1 %#x addr8 %#x\n",
1507 __func__, ecc, ctrl); 1511 __func__, ecc, ctrl, interrupt, addr1, addr8);
1508 return ONENAND_BBT_READ_ECC_ERROR; 1512 return ONENAND_BBT_READ_ECC_ERROR;
1509 } 1513 }
1510 } else { 1514 } else {
1511 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n", 1515 printk(KERN_ERR "%s: read timeout! ctrl 0x%04x "
1512 __func__, ctrl, interrupt); 1516 "intr 0x%04x addr1 %#x addr8 %#x\n",
1517 __func__, ctrl, interrupt, addr1, addr8);
1513 return ONENAND_BBT_READ_FATAL_ERROR; 1518 return ONENAND_BBT_READ_FATAL_ERROR;
1514 } 1519 }
1515 1520
1516 /* Initial bad block case: 0x2400 or 0x0400 */ 1521 /* Initial bad block case: 0x2400 or 0x0400 */
1517 if (ctrl & ONENAND_CTRL_ERROR) { 1522 if (ctrl & ONENAND_CTRL_ERROR) {
1518 printk(KERN_DEBUG "%s: controller error = 0x%04x\n", 1523 printk(KERN_DEBUG "%s: ctrl 0x%04x intr 0x%04x addr1 %#x "
1519 __func__, ctrl); 1524 "addr8 %#x\n", __func__, ctrl, interrupt, addr1, addr8);
1520 return ONENAND_BBT_READ_ERROR; 1525 return ONENAND_BBT_READ_ERROR;
1521 } 1526 }
1522 1527
@@ -1558,7 +1563,7 @@ int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1558 1563
1559 column = from & (mtd->oobsize - 1); 1564 column = from & (mtd->oobsize - 1);
1560 1565
1561 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1566 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1562 1567
1563 while (read < len) { 1568 while (read < len) {
1564 cond_resched(); 1569 cond_resched();
@@ -1612,7 +1617,7 @@ static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to
1612 u_char *oob_buf = this->oob_buf; 1617 u_char *oob_buf = this->oob_buf;
1613 int status, i, readcmd; 1618 int status, i, readcmd;
1614 1619
1615 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1620 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1616 1621
1617 this->command(mtd, readcmd, to, mtd->oobsize); 1622 this->command(mtd, readcmd, to, mtd->oobsize);
1618 onenand_update_bufferram(mtd, to, 0); 1623 onenand_update_bufferram(mtd, to, 0);
@@ -1845,7 +1850,7 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1845 const u_char *buf = ops->datbuf; 1850 const u_char *buf = ops->datbuf;
1846 const u_char *oob = ops->oobbuf; 1851 const u_char *oob = ops->oobbuf;
1847 u_char *oobbuf; 1852 u_char *oobbuf;
1848 int ret = 0; 1853 int ret = 0, cmd;
1849 1854
1850 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", 1855 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
1851 __func__, (unsigned int) to, (int) len); 1856 __func__, (unsigned int) to, (int) len);
@@ -1954,7 +1959,19 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1954 ONENAND_SET_NEXT_BUFFERRAM(this); 1959 ONENAND_SET_NEXT_BUFFERRAM(this);
1955 } 1960 }
1956 1961
1957 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); 1962 this->ongoing = 0;
1963 cmd = ONENAND_CMD_PROG;
1964
1965 /* Exclude 1st OTP and OTP blocks for cache program feature */
1966 if (ONENAND_IS_CACHE_PROGRAM(this) &&
1967 likely(onenand_block(this, to) != 0) &&
1968 ONENAND_IS_4KB_PAGE(this) &&
1969 ((written + thislen) < len)) {
1970 cmd = ONENAND_CMD_2X_CACHE_PROG;
1971 this->ongoing = 1;
1972 }
1973
1974 this->command(mtd, cmd, to, mtd->writesize);
1958 1975
1959 /* 1976 /*
1960 * 2 PLANE, MLC, and Flex-OneNAND wait here 1977 * 2 PLANE, MLC, and Flex-OneNAND wait here
@@ -2067,7 +2084,7 @@ static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2067 2084
2068 oobbuf = this->oob_buf; 2085 oobbuf = this->oob_buf;
2069 2086
2070 oobcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB; 2087 oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
2071 2088
2072 /* Loop until all data write */ 2089 /* Loop until all data write */
2073 while (written < len) { 2090 while (written < len) {
@@ -2086,7 +2103,7 @@ static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2086 memcpy(oobbuf + column, buf, thislen); 2103 memcpy(oobbuf + column, buf, thislen);
2087 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 2104 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
2088 2105
2089 if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) { 2106 if (ONENAND_IS_4KB_PAGE(this)) {
2090 /* Set main area of DataRAM to 0xff*/ 2107 /* Set main area of DataRAM to 0xff*/
2091 memset(this->page_buf, 0xff, mtd->writesize); 2108 memset(this->page_buf, 0xff, mtd->writesize);
2092 this->write_bufferram(mtd, ONENAND_DATARAM, 2109 this->write_bufferram(mtd, ONENAND_DATARAM,
@@ -2481,7 +2498,8 @@ static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2481 /* Grab the lock and see if the device is available */ 2498 /* Grab the lock and see if the device is available */
2482 onenand_get_device(mtd, FL_ERASING); 2499 onenand_get_device(mtd, FL_ERASING);
2483 2500
2484 if (region || instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) { 2501 if (ONENAND_IS_4KB_PAGE(this) || region ||
2502 instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
2485 /* region is set for Flex-OneNAND (no mb erase) */ 2503 /* region is set for Flex-OneNAND (no mb erase) */
2486 ret = onenand_block_by_block_erase(mtd, instr, 2504 ret = onenand_block_by_block_erase(mtd, instr,
2487 region, block_size); 2505 region, block_size);
@@ -3029,7 +3047,7 @@ static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
3029 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 3047 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3030 this->wait(mtd, FL_OTPING); 3048 this->wait(mtd, FL_OTPING);
3031 3049
3032 ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ? 3050 ret = ONENAND_IS_4KB_PAGE(this) ?
3033 onenand_mlc_read_ops_nolock(mtd, from, &ops) : 3051 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
3034 onenand_read_ops_nolock(mtd, from, &ops); 3052 onenand_read_ops_nolock(mtd, from, &ops);
3035 3053
@@ -3377,8 +3395,10 @@ static void onenand_check_features(struct mtd_info *mtd)
3377 case ONENAND_DEVICE_DENSITY_4Gb: 3395 case ONENAND_DEVICE_DENSITY_4Gb:
3378 if (ONENAND_IS_DDP(this)) 3396 if (ONENAND_IS_DDP(this))
3379 this->options |= ONENAND_HAS_2PLANE; 3397 this->options |= ONENAND_HAS_2PLANE;
3380 else if (numbufs == 1) 3398 else if (numbufs == 1) {
3381 this->options |= ONENAND_HAS_4KB_PAGE; 3399 this->options |= ONENAND_HAS_4KB_PAGE;
3400 this->options |= ONENAND_HAS_CACHE_PROGRAM;
3401 }
3382 3402
3383 case ONENAND_DEVICE_DENSITY_2Gb: 3403 case ONENAND_DEVICE_DENSITY_2Gb:
3384 /* 2Gb DDP does not have 2 plane */ 3404 /* 2Gb DDP does not have 2 plane */
@@ -3399,7 +3419,11 @@ static void onenand_check_features(struct mtd_info *mtd)
3399 break; 3419 break;
3400 } 3420 }
3401 3421
3402 if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) 3422 /* The MLC has 4KiB pagesize. */
3423 if (ONENAND_IS_MLC(this))
3424 this->options |= ONENAND_HAS_4KB_PAGE;
3425
3426 if (ONENAND_IS_4KB_PAGE(this))
3403 this->options &= ~ONENAND_HAS_2PLANE; 3427 this->options &= ~ONENAND_HAS_2PLANE;
3404 3428
3405 if (FLEXONENAND(this)) { 3429 if (FLEXONENAND(this)) {
@@ -3415,6 +3439,8 @@ static void onenand_check_features(struct mtd_info *mtd)
3415 printk(KERN_DEBUG "Chip has 2 plane\n"); 3439 printk(KERN_DEBUG "Chip has 2 plane\n");
3416 if (this->options & ONENAND_HAS_4KB_PAGE) 3440 if (this->options & ONENAND_HAS_4KB_PAGE)
3417 printk(KERN_DEBUG "Chip has 4KiB pagesize\n"); 3441 printk(KERN_DEBUG "Chip has 4KiB pagesize\n");
3442 if (this->options & ONENAND_HAS_CACHE_PROGRAM)
3443 printk(KERN_DEBUG "Chip has cache program feature\n");
3418} 3444}
3419 3445
3420/** 3446/**
@@ -3831,7 +3857,7 @@ static int onenand_probe(struct mtd_info *mtd)
3831 /* The data buffer size is equal to page size */ 3857 /* The data buffer size is equal to page size */
3832 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); 3858 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
3833 /* We use the full BufferRAM */ 3859 /* We use the full BufferRAM */
3834 if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) 3860 if (ONENAND_IS_4KB_PAGE(this))
3835 mtd->writesize <<= 1; 3861 mtd->writesize <<= 1;
3836 3862
3837 mtd->oobsize = mtd->writesize >> 5; 3863 mtd->oobsize = mtd->writesize >> 5;
@@ -4054,6 +4080,7 @@ int onenand_scan(struct mtd_info *mtd, int maxchips)
4054 mtd->block_isbad = onenand_block_isbad; 4080 mtd->block_isbad = onenand_block_isbad;
4055 mtd->block_markbad = onenand_block_markbad; 4081 mtd->block_markbad = onenand_block_markbad;
4056 mtd->owner = THIS_MODULE; 4082 mtd->owner = THIS_MODULE;
4083 mtd->writebufsize = mtd->writesize;
4057 4084
4058 /* Unlock whole block */ 4085 /* Unlock whole block */
4059 this->unlock_all(mtd); 4086 this->unlock_all(mtd);
diff --git a/drivers/mtd/onenand/onenand_bbt.c b/drivers/mtd/onenand/onenand_bbt.c
index 01ab5b3c453b..fc2c16a0fd1c 100644
--- a/drivers/mtd/onenand/onenand_bbt.c
+++ b/drivers/mtd/onenand/onenand_bbt.c
@@ -91,16 +91,18 @@ static int create_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr
91 for (j = 0; j < len; j++) { 91 for (j = 0; j < len; j++) {
92 /* No need to read pages fully, 92 /* No need to read pages fully,
93 * just read required OOB bytes */ 93 * just read required OOB bytes */
94 ret = onenand_bbt_read_oob(mtd, from + j * mtd->writesize + bd->offs, &ops); 94 ret = onenand_bbt_read_oob(mtd,
95 from + j * this->writesize + bd->offs, &ops);
95 96
96 /* If it is a initial bad block, just ignore it */ 97 /* If it is a initial bad block, just ignore it */
97 if (ret == ONENAND_BBT_READ_FATAL_ERROR) 98 if (ret == ONENAND_BBT_READ_FATAL_ERROR)
98 return -EIO; 99 return -EIO;
99 100
100 if (ret || check_short_pattern(&buf[j * scanlen], scanlen, mtd->writesize, bd)) { 101 if (ret || check_short_pattern(&buf[j * scanlen],
102 scanlen, this->writesize, bd)) {
101 bbm->bbt[i >> 3] |= 0x03 << (i & 0x6); 103 bbm->bbt[i >> 3] |= 0x03 << (i & 0x6);
102 printk(KERN_WARNING "Bad eraseblock %d at 0x%08x\n", 104 printk(KERN_INFO "OneNAND eraseblock %d is an "
103 i >> 1, (unsigned int) from); 105 "initial bad block\n", i >> 1);
104 mtd->ecc_stats.badblocks++; 106 mtd->ecc_stats.badblocks++;
105 break; 107 break;
106 } 108 }
diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c
index 0de7a05e6de0..a4c74a9ba430 100644
--- a/drivers/mtd/onenand/samsung.c
+++ b/drivers/mtd/onenand/samsung.c
@@ -651,7 +651,7 @@ static int s5pc110_read_bufferram(struct mtd_info *mtd, int area,
651 void __iomem *p; 651 void __iomem *p;
652 void *buf = (void *) buffer; 652 void *buf = (void *) buffer;
653 dma_addr_t dma_src, dma_dst; 653 dma_addr_t dma_src, dma_dst;
654 int err, page_dma = 0; 654 int err, ofs, page_dma = 0;
655 struct device *dev = &onenand->pdev->dev; 655 struct device *dev = &onenand->pdev->dev;
656 656
657 p = this->base + area; 657 p = this->base + area;
@@ -677,10 +677,13 @@ static int s5pc110_read_bufferram(struct mtd_info *mtd, int area,
677 if (!page) 677 if (!page)
678 goto normal; 678 goto normal;
679 679
680 /* Page offset */
681 ofs = ((size_t) buf & ~PAGE_MASK);
680 page_dma = 1; 682 page_dma = 1;
683
681 /* DMA routine */ 684 /* DMA routine */
682 dma_src = onenand->phys_base + (p - this->base); 685 dma_src = onenand->phys_base + (p - this->base);
683 dma_dst = dma_map_page(dev, page, 0, count, DMA_FROM_DEVICE); 686 dma_dst = dma_map_page(dev, page, ofs, count, DMA_FROM_DEVICE);
684 } else { 687 } else {
685 /* DMA routine */ 688 /* DMA routine */
686 dma_src = onenand->phys_base + (p - this->base); 689 dma_src = onenand->phys_base + (p - this->base);
diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index 5ebe280225d6..f49e49dc5928 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -672,7 +672,33 @@ static int io_init(struct ubi_device *ubi)
672 ubi->nor_flash = 1; 672 ubi->nor_flash = 1;
673 } 673 }
674 674
675 ubi->min_io_size = ubi->mtd->writesize; 675 /*
676 * Set UBI min. I/O size (@ubi->min_io_size). We use @mtd->writebufsize
677 * for these purposes, not @mtd->writesize. At the moment this does not
678 * matter for NAND, because currently @mtd->writebufsize is equivalent to
679 * @mtd->writesize for all NANDs. However, some CFI NOR flashes may
680 * have @mtd->writebufsize which is multiple of @mtd->writesize.
681 *
682 * The reason we use @mtd->writebufsize for @ubi->min_io_size is that
683 * UBI and UBIFS recovery algorithms rely on the fact that if there was
684 * an unclean power cut, then we can find offset of the last corrupted
685 * node, align the offset to @ubi->min_io_size, read the rest of the
686 * eraseblock starting from this offset, and check whether there are
687 * only 0xFF bytes. If yes, then we are probably dealing with a
688 * corruption caused by a power cut, if not, then this is probably some
689 * severe corruption.
690 *
691 * Thus, we have to use the maximum write unit size of the flash, which
692 * is @mtd->writebufsize, because @mtd->writesize is the minimum write
693 * size, not the maximum.
694 */
695 if (ubi->mtd->type == MTD_NANDFLASH)
696 ubi_assert(ubi->mtd->writebufsize == ubi->mtd->writesize);
697 else if (ubi->mtd->type == MTD_NORFLASH)
698 ubi_assert(ubi->mtd->writebufsize % ubi->mtd->writesize == 0);
699
700 ubi->min_io_size = ubi->mtd->writebufsize;
701
676 ubi->hdrs_min_io_size = ubi->mtd->writesize >> ubi->mtd->subpage_sft; 702 ubi->hdrs_min_io_size = ubi->mtd->writesize >> ubi->mtd->subpage_sft;
677 703
678 /* 704 /*
diff --git a/drivers/mtd/ubi/vtbl.c b/drivers/mtd/ubi/vtbl.c
index fcdb7f65fe0b..0b8141fc5c26 100644
--- a/drivers/mtd/ubi/vtbl.c
+++ b/drivers/mtd/ubi/vtbl.c
@@ -425,12 +425,11 @@ static struct ubi_vtbl_record *process_lvol(struct ubi_device *ubi,
425 425
426 /* Read both LEB 0 and LEB 1 into memory */ 426 /* Read both LEB 0 and LEB 1 into memory */
427 ubi_rb_for_each_entry(rb, seb, &sv->root, u.rb) { 427 ubi_rb_for_each_entry(rb, seb, &sv->root, u.rb) {
428 leb[seb->lnum] = vmalloc(ubi->vtbl_size); 428 leb[seb->lnum] = vzalloc(ubi->vtbl_size);
429 if (!leb[seb->lnum]) { 429 if (!leb[seb->lnum]) {
430 err = -ENOMEM; 430 err = -ENOMEM;
431 goto out_free; 431 goto out_free;
432 } 432 }
433 memset(leb[seb->lnum], 0, ubi->vtbl_size);
434 433
435 err = ubi_io_read_data(ubi, leb[seb->lnum], seb->pnum, 0, 434 err = ubi_io_read_data(ubi, leb[seb->lnum], seb->pnum, 0,
436 ubi->vtbl_size); 435 ubi->vtbl_size);
@@ -516,10 +515,9 @@ static struct ubi_vtbl_record *create_empty_lvol(struct ubi_device *ubi,
516 int i; 515 int i;
517 struct ubi_vtbl_record *vtbl; 516 struct ubi_vtbl_record *vtbl;
518 517
519 vtbl = vmalloc(ubi->vtbl_size); 518 vtbl = vzalloc(ubi->vtbl_size);
520 if (!vtbl) 519 if (!vtbl)
521 return ERR_PTR(-ENOMEM); 520 return ERR_PTR(-ENOMEM);
522 memset(vtbl, 0, ubi->vtbl_size);
523 521
524 for (i = 0; i < ubi->vtbl_slots; i++) 522 for (i = 0; i < ubi->vtbl_slots; i++)
525 memcpy(&vtbl[i], &empty_vtbl_record, UBI_VTBL_RECORD_SIZE); 523 memcpy(&vtbl[i], &empty_vtbl_record, UBI_VTBL_RECORD_SIZE);
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h
index a6cd335c9436..8e4183717d91 100644
--- a/drivers/net/bnx2x/bnx2x.h
+++ b/drivers/net/bnx2x/bnx2x.h
@@ -22,8 +22,8 @@
22 * (you will need to reboot afterwards) */ 22 * (you will need to reboot afterwards) */
23/* #define BNX2X_STOP_ON_ERROR */ 23/* #define BNX2X_STOP_ON_ERROR */
24 24
25#define DRV_MODULE_VERSION "1.62.00-3" 25#define DRV_MODULE_VERSION "1.62.00-4"
26#define DRV_MODULE_RELDATE "2010/12/21" 26#define DRV_MODULE_RELDATE "2011/01/18"
27#define BNX2X_BC_VER 0x040200 27#define BNX2X_BC_VER 0x040200
28 28
29#define BNX2X_MULTI_QUEUE 29#define BNX2X_MULTI_QUEUE
diff --git a/drivers/net/bnx2x/bnx2x_hsi.h b/drivers/net/bnx2x/bnx2x_hsi.h
index 6238d4f63989..548f5631c0dc 100644
--- a/drivers/net/bnx2x/bnx2x_hsi.h
+++ b/drivers/net/bnx2x/bnx2x_hsi.h
@@ -352,6 +352,10 @@ struct port_hw_cfg { /* port 0: 0x12c port 1: 0x2bc */
352#define PORT_HW_CFG_LANE_SWAP_CFG_31203120 0x0000d8d8 352#define PORT_HW_CFG_LANE_SWAP_CFG_31203120 0x0000d8d8
353 /* forced only */ 353 /* forced only */
354#define PORT_HW_CFG_LANE_SWAP_CFG_32103210 0x0000e4e4 354#define PORT_HW_CFG_LANE_SWAP_CFG_32103210 0x0000e4e4
355 /* Indicate whether to swap the external phy polarity */
356#define PORT_HW_CFG_SWAP_PHY_POLARITY_MASK 0x00010000
357#define PORT_HW_CFG_SWAP_PHY_POLARITY_DISABLED 0x00000000
358#define PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED 0x00010000
355 359
356 u32 external_phy_config; 360 u32 external_phy_config;
357#define PORT_HW_CFG_SERDES_EXT_PHY_TYPE_MASK 0xff000000 361#define PORT_HW_CFG_SERDES_EXT_PHY_TYPE_MASK 0xff000000
diff --git a/drivers/net/bnx2x/bnx2x_link.c b/drivers/net/bnx2x/bnx2x_link.c
index 43b0de24f391..7160ec51093e 100644
--- a/drivers/net/bnx2x/bnx2x_link.c
+++ b/drivers/net/bnx2x/bnx2x_link.c
@@ -1573,7 +1573,7 @@ static void bnx2x_set_aer_mmd_xgxs(struct link_params *params,
1573 1573
1574 offset = phy->addr + ser_lane; 1574 offset = phy->addr + ser_lane;
1575 if (CHIP_IS_E2(bp)) 1575 if (CHIP_IS_E2(bp))
1576 aer_val = 0x2800 + offset - 1; 1576 aer_val = 0x3800 + offset - 1;
1577 else 1577 else
1578 aer_val = 0x3800 + offset; 1578 aer_val = 0x3800 + offset;
1579 CL45_WR_OVER_CL22(bp, phy, 1579 CL45_WR_OVER_CL22(bp, phy,
@@ -3166,7 +3166,23 @@ u8 bnx2x_set_led(struct link_params *params,
3166 if (!vars->link_up) 3166 if (!vars->link_up)
3167 break; 3167 break;
3168 case LED_MODE_ON: 3168 case LED_MODE_ON:
3169 if (SINGLE_MEDIA_DIRECT(params)) { 3169 if (params->phy[EXT_PHY1].type ==
3170 PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727 &&
3171 CHIP_IS_E2(bp) && params->num_phys == 2) {
3172 /**
3173 * This is a work-around for E2+8727 Configurations
3174 */
3175 if (mode == LED_MODE_ON ||
3176 speed == SPEED_10000){
3177 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0);
3178 REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 1);
3179
3180 tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);
3181 EMAC_WR(bp, EMAC_REG_EMAC_LED,
3182 (tmp | EMAC_LED_OVERRIDE));
3183 return rc;
3184 }
3185 } else if (SINGLE_MEDIA_DIRECT(params)) {
3170 /** 3186 /**
3171 * This is a work-around for HW issue found when link 3187 * This is a work-around for HW issue found when link
3172 * is up in CL73 3188 * is up in CL73
@@ -3854,11 +3870,14 @@ static void bnx2x_8073_resolve_fc(struct bnx2x_phy *phy,
3854 pause_result); 3870 pause_result);
3855 } 3871 }
3856} 3872}
3857 3873static u8 bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp,
3858static void bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp,
3859 struct bnx2x_phy *phy, 3874 struct bnx2x_phy *phy,
3860 u8 port) 3875 u8 port)
3861{ 3876{
3877 u32 count = 0;
3878 u16 fw_ver1, fw_msgout;
3879 u8 rc = 0;
3880
3862 /* Boot port from external ROM */ 3881 /* Boot port from external ROM */
3863 /* EDC grst */ 3882 /* EDC grst */
3864 bnx2x_cl45_write(bp, phy, 3883 bnx2x_cl45_write(bp, phy,
@@ -3888,14 +3907,45 @@ static void bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp,
3888 MDIO_PMA_REG_GEN_CTRL, 3907 MDIO_PMA_REG_GEN_CTRL,
3889 MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP); 3908 MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP);
3890 3909
3891 /* wait for 120ms for code download via SPI port */ 3910 /* Delay 100ms per the PHY specifications */
3892 msleep(120); 3911 msleep(100);
3912
3913 /* 8073 sometimes taking longer to download */
3914 do {
3915 count++;
3916 if (count > 300) {
3917 DP(NETIF_MSG_LINK,
3918 "bnx2x_8073_8727_external_rom_boot port %x:"
3919 "Download failed. fw version = 0x%x\n",
3920 port, fw_ver1);
3921 rc = -EINVAL;
3922 break;
3923 }
3924
3925 bnx2x_cl45_read(bp, phy,
3926 MDIO_PMA_DEVAD,
3927 MDIO_PMA_REG_ROM_VER1, &fw_ver1);
3928 bnx2x_cl45_read(bp, phy,
3929 MDIO_PMA_DEVAD,
3930 MDIO_PMA_REG_M8051_MSGOUT_REG, &fw_msgout);
3931
3932 msleep(1);
3933 } while (fw_ver1 == 0 || fw_ver1 == 0x4321 ||
3934 ((fw_msgout & 0xff) != 0x03 && (phy->type ==
3935 PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073)));
3893 3936
3894 /* Clear ser_boot_ctl bit */ 3937 /* Clear ser_boot_ctl bit */
3895 bnx2x_cl45_write(bp, phy, 3938 bnx2x_cl45_write(bp, phy,
3896 MDIO_PMA_DEVAD, 3939 MDIO_PMA_DEVAD,
3897 MDIO_PMA_REG_MISC_CTRL1, 0x0000); 3940 MDIO_PMA_REG_MISC_CTRL1, 0x0000);
3898 bnx2x_save_bcm_spirom_ver(bp, phy, port); 3941 bnx2x_save_bcm_spirom_ver(bp, phy, port);
3942
3943 DP(NETIF_MSG_LINK,
3944 "bnx2x_8073_8727_external_rom_boot port %x:"
3945 "Download complete. fw version = 0x%x\n",
3946 port, fw_ver1);
3947
3948 return rc;
3899} 3949}
3900 3950
3901static void bnx2x_8073_set_xaui_low_power_mode(struct bnx2x *bp, 3951static void bnx2x_8073_set_xaui_low_power_mode(struct bnx2x *bp,
@@ -4108,6 +4158,25 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy,
4108 4158
4109 DP(NETIF_MSG_LINK, "Before rom RX_ALARM(port1): 0x%x\n", tmp1); 4159 DP(NETIF_MSG_LINK, "Before rom RX_ALARM(port1): 0x%x\n", tmp1);
4110 4160
4161 /**
4162 * If this is forced speed, set to KR or KX (all other are not
4163 * supported)
4164 */
4165 /* Swap polarity if required - Must be done only in non-1G mode */
4166 if (params->lane_config & PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED) {
4167 /* Configure the 8073 to swap _P and _N of the KR lines */
4168 DP(NETIF_MSG_LINK, "Swapping polarity for the 8073\n");
4169 /* 10G Rx/Tx and 1G Tx signal polarity swap */
4170 bnx2x_cl45_read(bp, phy,
4171 MDIO_PMA_DEVAD,
4172 MDIO_PMA_REG_8073_OPT_DIGITAL_CTRL, &val);
4173 bnx2x_cl45_write(bp, phy,
4174 MDIO_PMA_DEVAD,
4175 MDIO_PMA_REG_8073_OPT_DIGITAL_CTRL,
4176 (val | (3<<9)));
4177 }
4178
4179
4111 /* Enable CL37 BAM */ 4180 /* Enable CL37 BAM */
4112 if (REG_RD(bp, params->shmem_base + 4181 if (REG_RD(bp, params->shmem_base +
4113 offsetof(struct shmem_region, dev_info. 4182 offsetof(struct shmem_region, dev_info.
@@ -4314,8 +4383,32 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy,
4314 } 4383 }
4315 4384
4316 if (link_up) { 4385 if (link_up) {
4386 /* Swap polarity if required */
4387 if (params->lane_config &
4388 PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED) {
4389 /* Configure the 8073 to swap P and N of the KR lines */
4390 bnx2x_cl45_read(bp, phy,
4391 MDIO_XS_DEVAD,
4392 MDIO_XS_REG_8073_RX_CTRL_PCIE, &val1);
4393 /**
4394 * Set bit 3 to invert Rx in 1G mode and clear this bit
4395 * when it`s in 10G mode.
4396 */
4397 if (vars->line_speed == SPEED_1000) {
4398 DP(NETIF_MSG_LINK, "Swapping 1G polarity for"
4399 "the 8073\n");
4400 val1 |= (1<<3);
4401 } else
4402 val1 &= ~(1<<3);
4403
4404 bnx2x_cl45_write(bp, phy,
4405 MDIO_XS_DEVAD,
4406 MDIO_XS_REG_8073_RX_CTRL_PCIE,
4407 val1);
4408 }
4317 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars); 4409 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars);
4318 bnx2x_8073_resolve_fc(phy, params, vars); 4410 bnx2x_8073_resolve_fc(phy, params, vars);
4411 vars->duplex = DUPLEX_FULL;
4319 } 4412 }
4320 return link_up; 4413 return link_up;
4321} 4414}
@@ -5062,6 +5155,7 @@ static u8 bnx2x_8706_8726_read_status(struct bnx2x_phy *phy,
5062 else 5155 else
5063 vars->line_speed = SPEED_10000; 5156 vars->line_speed = SPEED_10000;
5064 bnx2x_ext_phy_resolve_fc(phy, params, vars); 5157 bnx2x_ext_phy_resolve_fc(phy, params, vars);
5158 vars->duplex = DUPLEX_FULL;
5065 } 5159 }
5066 return link_up; 5160 return link_up;
5067} 5161}
@@ -5758,8 +5852,11 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
5758 DP(NETIF_MSG_LINK, "port %x: External link is down\n", 5852 DP(NETIF_MSG_LINK, "port %x: External link is down\n",
5759 params->port); 5853 params->port);
5760 } 5854 }
5761 if (link_up) 5855 if (link_up) {
5762 bnx2x_ext_phy_resolve_fc(phy, params, vars); 5856 bnx2x_ext_phy_resolve_fc(phy, params, vars);
5857 vars->duplex = DUPLEX_FULL;
5858 DP(NETIF_MSG_LINK, "duplex = 0x%x\n", vars->duplex);
5859 }
5763 5860
5764 if ((DUAL_MEDIA(params)) && 5861 if ((DUAL_MEDIA(params)) &&
5765 (phy->req_line_speed == SPEED_1000)) { 5862 (phy->req_line_speed == SPEED_1000)) {
@@ -5875,10 +5972,26 @@ static void bnx2x_848xx_set_led(struct bnx2x *bp,
5875 MDIO_PMA_REG_8481_LED2_MASK, 5972 MDIO_PMA_REG_8481_LED2_MASK,
5876 0x18); 5973 0x18);
5877 5974
5975 /* Select activity source by Tx and Rx, as suggested by PHY AE */
5878 bnx2x_cl45_write(bp, phy, 5976 bnx2x_cl45_write(bp, phy,
5879 MDIO_PMA_DEVAD, 5977 MDIO_PMA_DEVAD,
5880 MDIO_PMA_REG_8481_LED3_MASK, 5978 MDIO_PMA_REG_8481_LED3_MASK,
5881 0x0040); 5979 0x0006);
5980
5981 /* Select the closest activity blink rate to that in 10/100/1000 */
5982 bnx2x_cl45_write(bp, phy,
5983 MDIO_PMA_DEVAD,
5984 MDIO_PMA_REG_8481_LED3_BLINK,
5985 0);
5986
5987 bnx2x_cl45_read(bp, phy,
5988 MDIO_PMA_DEVAD,
5989 MDIO_PMA_REG_84823_CTL_LED_CTL_1, &val);
5990 val |= MDIO_PMA_REG_84823_LED3_STRETCH_EN; /* stretch_en for LED3*/
5991
5992 bnx2x_cl45_write(bp, phy,
5993 MDIO_PMA_DEVAD,
5994 MDIO_PMA_REG_84823_CTL_LED_CTL_1, val);
5882 5995
5883 /* 'Interrupt Mask' */ 5996 /* 'Interrupt Mask' */
5884 bnx2x_cl45_write(bp, phy, 5997 bnx2x_cl45_write(bp, phy,
@@ -6126,6 +6239,7 @@ static u8 bnx2x_848xx_read_status(struct bnx2x_phy *phy,
6126 /* Check link 10G */ 6239 /* Check link 10G */
6127 if (val2 & (1<<11)) { 6240 if (val2 & (1<<11)) {
6128 vars->line_speed = SPEED_10000; 6241 vars->line_speed = SPEED_10000;
6242 vars->duplex = DUPLEX_FULL;
6129 link_up = 1; 6243 link_up = 1;
6130 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars); 6244 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars);
6131 } else { /* Check Legacy speed link */ 6245 } else { /* Check Legacy speed link */
@@ -6489,6 +6603,7 @@ static u8 bnx2x_7101_read_status(struct bnx2x_phy *phy,
6489 MDIO_AN_DEVAD, MDIO_AN_REG_MASTER_STATUS, 6603 MDIO_AN_DEVAD, MDIO_AN_REG_MASTER_STATUS,
6490 &val2); 6604 &val2);
6491 vars->line_speed = SPEED_10000; 6605 vars->line_speed = SPEED_10000;
6606 vars->duplex = DUPLEX_FULL;
6492 DP(NETIF_MSG_LINK, "SFX7101 AN status 0x%x->Master=%x\n", 6607 DP(NETIF_MSG_LINK, "SFX7101 AN status 0x%x->Master=%x\n",
6493 val2, (val2 & (1<<14))); 6608 val2, (val2 & (1<<14)));
6494 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars); 6609 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars);
@@ -7663,7 +7778,6 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp,
7663 7778
7664 /* PART2 - Download firmware to both phys */ 7779 /* PART2 - Download firmware to both phys */
7665 for (port = PORT_MAX - 1; port >= PORT_0; port--) { 7780 for (port = PORT_MAX - 1; port >= PORT_0; port--) {
7666 u16 fw_ver1;
7667 if (CHIP_IS_E2(bp)) 7781 if (CHIP_IS_E2(bp))
7668 port_of_path = 0; 7782 port_of_path = 0;
7669 else 7783 else
@@ -7671,19 +7785,9 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp,
7671 7785
7672 DP(NETIF_MSG_LINK, "Loading spirom for phy address 0x%x\n", 7786 DP(NETIF_MSG_LINK, "Loading spirom for phy address 0x%x\n",
7673 phy_blk[port]->addr); 7787 phy_blk[port]->addr);
7674 bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port], 7788 if (bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port],
7675 port_of_path); 7789 port_of_path))
7676
7677 bnx2x_cl45_read(bp, phy_blk[port],
7678 MDIO_PMA_DEVAD,
7679 MDIO_PMA_REG_ROM_VER1, &fw_ver1);
7680 if (fw_ver1 == 0 || fw_ver1 == 0x4321) {
7681 DP(NETIF_MSG_LINK,
7682 "bnx2x_8073_common_init_phy port %x:"
7683 "Download failed. fw version = 0x%x\n",
7684 port, fw_ver1);
7685 return -EINVAL; 7790 return -EINVAL;
7686 }
7687 7791
7688 /* Only set bit 10 = 1 (Tx power down) */ 7792 /* Only set bit 10 = 1 (Tx power down) */
7689 bnx2x_cl45_read(bp, phy_blk[port], 7793 bnx2x_cl45_read(bp, phy_blk[port],
@@ -7848,27 +7952,17 @@ static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp,
7848 } 7952 }
7849 /* PART2 - Download firmware to both phys */ 7953 /* PART2 - Download firmware to both phys */
7850 for (port = PORT_MAX - 1; port >= PORT_0; port--) { 7954 for (port = PORT_MAX - 1; port >= PORT_0; port--) {
7851 u16 fw_ver1;
7852 if (CHIP_IS_E2(bp)) 7955 if (CHIP_IS_E2(bp))
7853 port_of_path = 0; 7956 port_of_path = 0;
7854 else 7957 else
7855 port_of_path = port; 7958 port_of_path = port;
7856 DP(NETIF_MSG_LINK, "Loading spirom for phy address 0x%x\n", 7959 DP(NETIF_MSG_LINK, "Loading spirom for phy address 0x%x\n",
7857 phy_blk[port]->addr); 7960 phy_blk[port]->addr);
7858 bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port], 7961 if (bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port],
7859 port_of_path); 7962 port_of_path))
7860 bnx2x_cl45_read(bp, phy_blk[port],
7861 MDIO_PMA_DEVAD,
7862 MDIO_PMA_REG_ROM_VER1, &fw_ver1);
7863 if (fw_ver1 == 0 || fw_ver1 == 0x4321) {
7864 DP(NETIF_MSG_LINK,
7865 "bnx2x_8727_common_init_phy port %x:"
7866 "Download failed. fw version = 0x%x\n",
7867 port, fw_ver1);
7868 return -EINVAL; 7963 return -EINVAL;
7869 }
7870 }
7871 7964
7965 }
7872 return 0; 7966 return 0;
7873} 7967}
7874 7968
@@ -7916,6 +8010,7 @@ u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],
7916 u32 shmem2_base_path[], u32 chip_id) 8010 u32 shmem2_base_path[], u32 chip_id)
7917{ 8011{
7918 u8 rc = 0; 8012 u8 rc = 0;
8013 u32 phy_ver;
7919 u8 phy_index; 8014 u8 phy_index;
7920 u32 ext_phy_type, ext_phy_config; 8015 u32 ext_phy_type, ext_phy_config;
7921 DP(NETIF_MSG_LINK, "Begin common phy init\n"); 8016 DP(NETIF_MSG_LINK, "Begin common phy init\n");
@@ -7923,6 +8018,16 @@ u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],
7923 if (CHIP_REV_IS_EMUL(bp)) 8018 if (CHIP_REV_IS_EMUL(bp))
7924 return 0; 8019 return 0;
7925 8020
8021 /* Check if common init was already done */
8022 phy_ver = REG_RD(bp, shmem_base_path[0] +
8023 offsetof(struct shmem_region,
8024 port_mb[PORT_0].ext_phy_fw_version));
8025 if (phy_ver) {
8026 DP(NETIF_MSG_LINK, "Not doing common init; phy ver is 0x%x\n",
8027 phy_ver);
8028 return 0;
8029 }
8030
7926 /* Read the ext_phy_type for arbitrary port(0) */ 8031 /* Read the ext_phy_type for arbitrary port(0) */
7927 for (phy_index = EXT_PHY1; phy_index < MAX_PHYS; 8032 for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;
7928 phy_index++) { 8033 phy_index++) {
diff --git a/drivers/net/bnx2x/bnx2x_reg.h b/drivers/net/bnx2x/bnx2x_reg.h
index c939683e3d61..e01330bb36c7 100644
--- a/drivers/net/bnx2x/bnx2x_reg.h
+++ b/drivers/net/bnx2x/bnx2x_reg.h
@@ -6194,7 +6194,11 @@ Theotherbitsarereservedandshouldbezero*/
6194#define MDIO_CTL_REG_84823_MEDIA_PRIORITY_COPPER 0x0000 6194#define MDIO_CTL_REG_84823_MEDIA_PRIORITY_COPPER 0x0000
6195#define MDIO_CTL_REG_84823_MEDIA_PRIORITY_FIBER 0x0100 6195#define MDIO_CTL_REG_84823_MEDIA_PRIORITY_FIBER 0x0100
6196#define MDIO_CTL_REG_84823_MEDIA_FIBER_1G 0x1000 6196#define MDIO_CTL_REG_84823_MEDIA_FIBER_1G 0x1000
6197#define MDIO_CTL_REG_84823_USER_CTRL_REG 0x4005
6198#define MDIO_CTL_REG_84823_USER_CTRL_CMS 0x0080
6197 6199
6200#define MDIO_PMA_REG_84823_CTL_LED_CTL_1 0xa8e3
6201#define MDIO_PMA_REG_84823_LED3_STRETCH_EN 0x0080
6198 6202
6199#define IGU_FUNC_BASE 0x0400 6203#define IGU_FUNC_BASE 0x0400
6200 6204
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 119aa2000c24..5ed8f9f9419f 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -1920,7 +1920,7 @@ int startup_gfar(struct net_device *ndev)
1920 if (err) { 1920 if (err) {
1921 for (j = 0; j < i; j++) 1921 for (j = 0; j < i; j++)
1922 free_grp_irqs(&priv->gfargrp[j]); 1922 free_grp_irqs(&priv->gfargrp[j]);
1923 goto irq_fail; 1923 goto irq_fail;
1924 } 1924 }
1925 } 1925 }
1926 1926
diff --git a/drivers/net/irda/sh_irda.c b/drivers/net/irda/sh_irda.c
index 9e3f4f54281d..4488bd581eca 100644
--- a/drivers/net/irda/sh_irda.c
+++ b/drivers/net/irda/sh_irda.c
@@ -635,7 +635,7 @@ static int sh_irda_hard_xmit(struct sk_buff *skb, struct net_device *ndev)
635 635
636 ret = sh_irda_set_baudrate(self, speed); 636 ret = sh_irda_set_baudrate(self, speed);
637 if (ret < 0) 637 if (ret < 0)
638 return ret; 638 goto sh_irda_hard_xmit_end;
639 639
640 self->tx_buff.len = 0; 640 self->tx_buff.len = 0;
641 if (skb->len) { 641 if (skb->len) {
@@ -652,11 +652,21 @@ static int sh_irda_hard_xmit(struct sk_buff *skb, struct net_device *ndev)
652 652
653 sh_irda_write(self, IRTFLR, self->tx_buff.len); 653 sh_irda_write(self, IRTFLR, self->tx_buff.len);
654 sh_irda_write(self, IRTCTR, ARMOD | TE); 654 sh_irda_write(self, IRTCTR, ARMOD | TE);
655 } 655 } else
656 goto sh_irda_hard_xmit_end;
656 657
657 dev_kfree_skb(skb); 658 dev_kfree_skb(skb);
658 659
659 return 0; 660 return 0;
661
662sh_irda_hard_xmit_end:
663 sh_irda_set_baudrate(self, 9600);
664 netif_wake_queue(self->ndev);
665 sh_irda_rcv_ctrl(self, 1);
666 dev_kfree_skb(skb);
667
668 return ret;
669
660} 670}
661 671
662static int sh_irda_ioctl(struct net_device *ndev, struct ifreq *ifreq, int cmd) 672static int sh_irda_ioctl(struct net_device *ndev, struct ifreq *ifreq, int cmd)
diff --git a/drivers/net/mlx4/catas.c b/drivers/net/mlx4/catas.c
index 68aaa42d0ced..32f947154c33 100644
--- a/drivers/net/mlx4/catas.c
+++ b/drivers/net/mlx4/catas.c
@@ -113,7 +113,7 @@ static void catas_reset(struct work_struct *work)
113void mlx4_start_catas_poll(struct mlx4_dev *dev) 113void mlx4_start_catas_poll(struct mlx4_dev *dev)
114{ 114{
115 struct mlx4_priv *priv = mlx4_priv(dev); 115 struct mlx4_priv *priv = mlx4_priv(dev);
116 unsigned long addr; 116 phys_addr_t addr;
117 117
118 INIT_LIST_HEAD(&priv->catas_err.list); 118 INIT_LIST_HEAD(&priv->catas_err.list);
119 init_timer(&priv->catas_err.timer); 119 init_timer(&priv->catas_err.timer);
@@ -124,8 +124,8 @@ void mlx4_start_catas_poll(struct mlx4_dev *dev)
124 124
125 priv->catas_err.map = ioremap(addr, priv->fw.catas_size * 4); 125 priv->catas_err.map = ioremap(addr, priv->fw.catas_size * 4);
126 if (!priv->catas_err.map) { 126 if (!priv->catas_err.map) {
127 mlx4_warn(dev, "Failed to map internal error buffer at 0x%lx\n", 127 mlx4_warn(dev, "Failed to map internal error buffer at 0x%llx\n",
128 addr); 128 (unsigned long long) addr);
129 return; 129 return;
130 } 130 }
131 131
diff --git a/drivers/net/mlx4/en_main.c b/drivers/net/mlx4/en_main.c
index f6e0d40cd876..1ff6ca6466ed 100644
--- a/drivers/net/mlx4/en_main.c
+++ b/drivers/net/mlx4/en_main.c
@@ -202,7 +202,8 @@ static void *mlx4_en_add(struct mlx4_dev *dev)
202 if (mlx4_uar_alloc(dev, &mdev->priv_uar)) 202 if (mlx4_uar_alloc(dev, &mdev->priv_uar))
203 goto err_pd; 203 goto err_pd;
204 204
205 mdev->uar_map = ioremap(mdev->priv_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 205 mdev->uar_map = ioremap((phys_addr_t) mdev->priv_uar.pfn << PAGE_SHIFT,
206 PAGE_SIZE);
206 if (!mdev->uar_map) 207 if (!mdev->uar_map)
207 goto err_uar; 208 goto err_uar;
208 spin_lock_init(&mdev->uar_lock); 209 spin_lock_init(&mdev->uar_lock);
diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c
index 782f11d8fa71..4ffdc18fcb8a 100644
--- a/drivers/net/mlx4/main.c
+++ b/drivers/net/mlx4/main.c
@@ -829,7 +829,7 @@ static int mlx4_setup_hca(struct mlx4_dev *dev)
829 goto err_uar_table_free; 829 goto err_uar_table_free;
830 } 830 }
831 831
832 priv->kar = ioremap(priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 832 priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
833 if (!priv->kar) { 833 if (!priv->kar) {
834 mlx4_err(dev, "Couldn't map kernel access region, " 834 mlx4_err(dev, "Couldn't map kernel access region, "
835 "aborting.\n"); 835 "aborting.\n");
diff --git a/drivers/net/mlx4/mcg.c b/drivers/net/mlx4/mcg.c
index c4f88b7ef7b6..79cf42db2ea9 100644
--- a/drivers/net/mlx4/mcg.c
+++ b/drivers/net/mlx4/mcg.c
@@ -95,7 +95,8 @@ static int mlx4_MGID_HASH(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox
95 * entry in hash chain and *mgm holds end of hash chain. 95 * entry in hash chain and *mgm holds end of hash chain.
96 */ 96 */
97static int find_mgm(struct mlx4_dev *dev, 97static int find_mgm(struct mlx4_dev *dev,
98 u8 *gid, struct mlx4_cmd_mailbox *mgm_mailbox, 98 u8 *gid, enum mlx4_protocol protocol,
99 struct mlx4_cmd_mailbox *mgm_mailbox,
99 u16 *hash, int *prev, int *index) 100 u16 *hash, int *prev, int *index)
100{ 101{
101 struct mlx4_cmd_mailbox *mailbox; 102 struct mlx4_cmd_mailbox *mailbox;
@@ -134,7 +135,8 @@ static int find_mgm(struct mlx4_dev *dev,
134 return err; 135 return err;
135 } 136 }
136 137
137 if (!memcmp(mgm->gid, gid, 16)) 138 if (!memcmp(mgm->gid, gid, 16) &&
139 be32_to_cpu(mgm->members_count) >> 30 == protocol)
138 return err; 140 return err;
139 141
140 *prev = *index; 142 *prev = *index;
@@ -146,7 +148,7 @@ static int find_mgm(struct mlx4_dev *dev,
146} 148}
147 149
148int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], 150int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
149 int block_mcast_loopback) 151 int block_mcast_loopback, enum mlx4_protocol protocol)
150{ 152{
151 struct mlx4_priv *priv = mlx4_priv(dev); 153 struct mlx4_priv *priv = mlx4_priv(dev);
152 struct mlx4_cmd_mailbox *mailbox; 154 struct mlx4_cmd_mailbox *mailbox;
@@ -165,7 +167,7 @@ int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
165 167
166 mutex_lock(&priv->mcg_table.mutex); 168 mutex_lock(&priv->mcg_table.mutex);
167 169
168 err = find_mgm(dev, gid, mailbox, &hash, &prev, &index); 170 err = find_mgm(dev, gid, protocol, mailbox, &hash, &prev, &index);
169 if (err) 171 if (err)
170 goto out; 172 goto out;
171 173
@@ -187,7 +189,7 @@ int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
187 memcpy(mgm->gid, gid, 16); 189 memcpy(mgm->gid, gid, 16);
188 } 190 }
189 191
190 members_count = be32_to_cpu(mgm->members_count); 192 members_count = be32_to_cpu(mgm->members_count) & 0xffffff;
191 if (members_count == MLX4_QP_PER_MGM) { 193 if (members_count == MLX4_QP_PER_MGM) {
192 mlx4_err(dev, "MGM at index %x is full.\n", index); 194 mlx4_err(dev, "MGM at index %x is full.\n", index);
193 err = -ENOMEM; 195 err = -ENOMEM;
@@ -207,7 +209,7 @@ int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
207 else 209 else
208 mgm->qp[members_count++] = cpu_to_be32(qp->qpn & MGM_QPN_MASK); 210 mgm->qp[members_count++] = cpu_to_be32(qp->qpn & MGM_QPN_MASK);
209 211
210 mgm->members_count = cpu_to_be32(members_count); 212 mgm->members_count = cpu_to_be32(members_count | (u32) protocol << 30);
211 213
212 err = mlx4_WRITE_MCG(dev, index, mailbox); 214 err = mlx4_WRITE_MCG(dev, index, mailbox);
213 if (err) 215 if (err)
@@ -242,7 +244,8 @@ out:
242} 244}
243EXPORT_SYMBOL_GPL(mlx4_multicast_attach); 245EXPORT_SYMBOL_GPL(mlx4_multicast_attach);
244 246
245int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]) 247int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
248 enum mlx4_protocol protocol)
246{ 249{
247 struct mlx4_priv *priv = mlx4_priv(dev); 250 struct mlx4_priv *priv = mlx4_priv(dev);
248 struct mlx4_cmd_mailbox *mailbox; 251 struct mlx4_cmd_mailbox *mailbox;
@@ -260,7 +263,7 @@ int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16])
260 263
261 mutex_lock(&priv->mcg_table.mutex); 264 mutex_lock(&priv->mcg_table.mutex);
262 265
263 err = find_mgm(dev, gid, mailbox, &hash, &prev, &index); 266 err = find_mgm(dev, gid, protocol, mailbox, &hash, &prev, &index);
264 if (err) 267 if (err)
265 goto out; 268 goto out;
266 269
@@ -270,7 +273,7 @@ int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16])
270 goto out; 273 goto out;
271 } 274 }
272 275
273 members_count = be32_to_cpu(mgm->members_count); 276 members_count = be32_to_cpu(mgm->members_count) & 0xffffff;
274 for (loc = -1, i = 0; i < members_count; ++i) 277 for (loc = -1, i = 0; i < members_count; ++i)
275 if ((be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK) == qp->qpn) 278 if ((be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK) == qp->qpn)
276 loc = i; 279 loc = i;
@@ -282,7 +285,7 @@ int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16])
282 } 285 }
283 286
284 287
285 mgm->members_count = cpu_to_be32(--members_count); 288 mgm->members_count = cpu_to_be32(--members_count | (u32) protocol << 30);
286 mgm->qp[loc] = mgm->qp[i - 1]; 289 mgm->qp[loc] = mgm->qp[i - 1];
287 mgm->qp[i - 1] = 0; 290 mgm->qp[i - 1] = 0;
288 291
diff --git a/drivers/net/ns83820.c b/drivers/net/ns83820.c
index 84134c766f3a..a41b2cf4d917 100644
--- a/drivers/net/ns83820.c
+++ b/drivers/net/ns83820.c
@@ -1988,12 +1988,11 @@ static int __devinit ns83820_init_one(struct pci_dev *pci_dev,
1988 } 1988 }
1989 1989
1990 ndev = alloc_etherdev(sizeof(struct ns83820)); 1990 ndev = alloc_etherdev(sizeof(struct ns83820));
1991 dev = PRIV(ndev);
1992
1993 err = -ENOMEM; 1991 err = -ENOMEM;
1994 if (!dev) 1992 if (!ndev)
1995 goto out; 1993 goto out;
1996 1994
1995 dev = PRIV(ndev);
1997 dev->ndev = ndev; 1996 dev->ndev = ndev;
1998 1997
1999 spin_lock_init(&dev->rx_info.lock); 1998 spin_lock_init(&dev->rx_info.lock);
diff --git a/drivers/net/usb/cdc_ncm.c b/drivers/net/usb/cdc_ncm.c
index d776c4a8d3c1..04e8ce14a1d0 100644
--- a/drivers/net/usb/cdc_ncm.c
+++ b/drivers/net/usb/cdc_ncm.c
@@ -54,7 +54,7 @@
54#include <linux/usb/usbnet.h> 54#include <linux/usb/usbnet.h>
55#include <linux/usb/cdc.h> 55#include <linux/usb/cdc.h>
56 56
57#define DRIVER_VERSION "30-Nov-2010" 57#define DRIVER_VERSION "17-Jan-2011"
58 58
59/* CDC NCM subclass 3.2.1 */ 59/* CDC NCM subclass 3.2.1 */
60#define USB_CDC_NCM_NDP16_LENGTH_MIN 0x10 60#define USB_CDC_NCM_NDP16_LENGTH_MIN 0x10
@@ -868,15 +868,19 @@ static void cdc_ncm_tx_timeout(unsigned long arg)
868 if (ctx->tx_timer_pending != 0) { 868 if (ctx->tx_timer_pending != 0) {
869 ctx->tx_timer_pending--; 869 ctx->tx_timer_pending--;
870 restart = 1; 870 restart = 1;
871 } else 871 } else {
872 restart = 0; 872 restart = 0;
873 }
873 874
874 spin_unlock(&ctx->mtx); 875 spin_unlock(&ctx->mtx);
875 876
876 if (restart) 877 if (restart) {
878 spin_lock(&ctx->mtx);
877 cdc_ncm_tx_timeout_start(ctx); 879 cdc_ncm_tx_timeout_start(ctx);
878 else if (ctx->netdev != NULL) 880 spin_unlock(&ctx->mtx);
881 } else if (ctx->netdev != NULL) {
879 usbnet_start_xmit(NULL, ctx->netdev); 882 usbnet_start_xmit(NULL, ctx->netdev);
883 }
880} 884}
881 885
882static struct sk_buff * 886static struct sk_buff *
@@ -900,7 +904,6 @@ cdc_ncm_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
900 skb_out = cdc_ncm_fill_tx_frame(ctx, skb); 904 skb_out = cdc_ncm_fill_tx_frame(ctx, skb);
901 if (ctx->tx_curr_skb != NULL) 905 if (ctx->tx_curr_skb != NULL)
902 need_timer = 1; 906 need_timer = 1;
903 spin_unlock(&ctx->mtx);
904 907
905 /* Start timer, if there is a remaining skb */ 908 /* Start timer, if there is a remaining skb */
906 if (need_timer) 909 if (need_timer)
@@ -908,6 +911,8 @@ cdc_ncm_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
908 911
909 if (skb_out) 912 if (skb_out)
910 dev->net->stats.tx_packets += ctx->tx_curr_frame_num; 913 dev->net->stats.tx_packets += ctx->tx_curr_frame_num;
914
915 spin_unlock(&ctx->mtx);
911 return skb_out; 916 return skb_out;
912 917
913error: 918error:
@@ -1020,8 +1025,8 @@ static int cdc_ncm_rx_fixup(struct usbnet *dev, struct sk_buff *skb_in)
1020 if (((offset + temp) > actlen) || 1025 if (((offset + temp) > actlen) ||
1021 (temp > CDC_NCM_MAX_DATAGRAM_SIZE) || (temp < ETH_HLEN)) { 1026 (temp > CDC_NCM_MAX_DATAGRAM_SIZE) || (temp < ETH_HLEN)) {
1022 pr_debug("invalid frame detected (ignored)" 1027 pr_debug("invalid frame detected (ignored)"
1023 "offset[%u]=%u, length=%u, skb=%p\n", 1028 "offset[%u]=%u, length=%u, skb=%p\n",
1024 x, offset, temp, skb_in); 1029 x, offset, temp, skb_in);
1025 if (!x) 1030 if (!x)
1026 goto error; 1031 goto error;
1027 break; 1032 break;
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c
index d143e8b72b5b..cc14b4a75048 100644
--- a/drivers/net/vmxnet3/vmxnet3_drv.c
+++ b/drivers/net/vmxnet3/vmxnet3_drv.c
@@ -48,6 +48,9 @@ static atomic_t devices_found;
48static int enable_mq = 1; 48static int enable_mq = 1;
49static int irq_share_mode; 49static int irq_share_mode;
50 50
51static void
52vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac);
53
51/* 54/*
52 * Enable/Disable the given intr 55 * Enable/Disable the given intr
53 */ 56 */
@@ -139,9 +142,13 @@ vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
139{ 142{
140 u32 ret; 143 u32 ret;
141 int i; 144 int i;
145 unsigned long flags;
142 146
147 spin_lock_irqsave(&adapter->cmd_lock, flags);
143 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK); 148 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
144 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 149 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
150 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
151
145 adapter->link_speed = ret >> 16; 152 adapter->link_speed = ret >> 16;
146 if (ret & 1) { /* Link is up. */ 153 if (ret & 1) { /* Link is up. */
147 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n", 154 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n",
@@ -183,8 +190,10 @@ vmxnet3_process_events(struct vmxnet3_adapter *adapter)
183 190
184 /* Check if there is an error on xmit/recv queues */ 191 /* Check if there is an error on xmit/recv queues */
185 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) { 192 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
193 spin_lock(&adapter->cmd_lock);
186 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 194 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
187 VMXNET3_CMD_GET_QUEUE_STATUS); 195 VMXNET3_CMD_GET_QUEUE_STATUS);
196 spin_unlock(&adapter->cmd_lock);
188 197
189 for (i = 0; i < adapter->num_tx_queues; i++) 198 for (i = 0; i < adapter->num_tx_queues; i++)
190 if (adapter->tqd_start[i].status.stopped) 199 if (adapter->tqd_start[i].status.stopped)
@@ -804,30 +813,25 @@ vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
804 skb_transport_header(skb))->doff * 4; 813 skb_transport_header(skb))->doff * 4;
805 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size; 814 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
806 } else { 815 } else {
807 unsigned int pull_size;
808
809 if (skb->ip_summed == CHECKSUM_PARTIAL) { 816 if (skb->ip_summed == CHECKSUM_PARTIAL) {
810 ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb); 817 ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb);
811 818
812 if (ctx->ipv4) { 819 if (ctx->ipv4) {
813 struct iphdr *iph = (struct iphdr *) 820 struct iphdr *iph = (struct iphdr *)
814 skb_network_header(skb); 821 skb_network_header(skb);
815 if (iph->protocol == IPPROTO_TCP) { 822 if (iph->protocol == IPPROTO_TCP)
816 pull_size = ctx->eth_ip_hdr_size +
817 sizeof(struct tcphdr);
818
819 if (unlikely(!pskb_may_pull(skb,
820 pull_size))) {
821 goto err;
822 }
823 ctx->l4_hdr_size = ((struct tcphdr *) 823 ctx->l4_hdr_size = ((struct tcphdr *)
824 skb_transport_header(skb))->doff * 4; 824 skb_transport_header(skb))->doff * 4;
825 } else if (iph->protocol == IPPROTO_UDP) { 825 else if (iph->protocol == IPPROTO_UDP)
826 /*
827 * Use tcp header size so that bytes to
828 * be copied are more than required by
829 * the device.
830 */
826 ctx->l4_hdr_size = 831 ctx->l4_hdr_size =
827 sizeof(struct udphdr); 832 sizeof(struct tcphdr);
828 } else { 833 else
829 ctx->l4_hdr_size = 0; 834 ctx->l4_hdr_size = 0;
830 }
831 } else { 835 } else {
832 /* for simplicity, don't copy L4 headers */ 836 /* for simplicity, don't copy L4 headers */
833 ctx->l4_hdr_size = 0; 837 ctx->l4_hdr_size = 0;
@@ -1859,18 +1863,14 @@ vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
1859 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1863 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1860 struct Vmxnet3_DriverShared *shared = adapter->shared; 1864 struct Vmxnet3_DriverShared *shared = adapter->shared;
1861 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1865 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1866 unsigned long flags;
1862 1867
1863 if (grp) { 1868 if (grp) {
1864 /* add vlan rx stripping. */ 1869 /* add vlan rx stripping. */
1865 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) { 1870 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) {
1866 int i; 1871 int i;
1867 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1868 adapter->vlan_grp = grp; 1872 adapter->vlan_grp = grp;
1869 1873
1870 /* update FEATURES to device */
1871 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1872 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1873 VMXNET3_CMD_UPDATE_FEATURE);
1874 /* 1874 /*
1875 * Clear entire vfTable; then enable untagged pkts. 1875 * Clear entire vfTable; then enable untagged pkts.
1876 * Note: setting one entry in vfTable to non-zero turns 1876 * Note: setting one entry in vfTable to non-zero turns
@@ -1880,8 +1880,10 @@ vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
1880 vfTable[i] = 0; 1880 vfTable[i] = 0;
1881 1881
1882 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1882 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1883 spin_lock_irqsave(&adapter->cmd_lock, flags);
1883 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1884 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1884 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1885 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1886 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1885 } else { 1887 } else {
1886 printk(KERN_ERR "%s: vlan_rx_register when device has " 1888 printk(KERN_ERR "%s: vlan_rx_register when device has "
1887 "no NETIF_F_HW_VLAN_RX\n", netdev->name); 1889 "no NETIF_F_HW_VLAN_RX\n", netdev->name);
@@ -1900,13 +1902,10 @@ vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
1900 */ 1902 */
1901 vfTable[i] = 0; 1903 vfTable[i] = 0;
1902 } 1904 }
1905 spin_lock_irqsave(&adapter->cmd_lock, flags);
1903 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1906 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1904 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1907 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1905 1908 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1906 /* update FEATURES to device */
1907 devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1908 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1909 VMXNET3_CMD_UPDATE_FEATURE);
1910 } 1909 }
1911 } 1910 }
1912} 1911}
@@ -1939,10 +1938,13 @@ vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1939{ 1938{
1940 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1939 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1941 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1940 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1941 unsigned long flags;
1942 1942
1943 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1943 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1944 spin_lock_irqsave(&adapter->cmd_lock, flags);
1944 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1945 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1945 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1946 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1947 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1946} 1948}
1947 1949
1948 1950
@@ -1951,10 +1953,13 @@ vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1951{ 1953{
1952 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1954 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1953 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1955 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1956 unsigned long flags;
1954 1957
1955 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid); 1958 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
1959 spin_lock_irqsave(&adapter->cmd_lock, flags);
1956 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1960 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1957 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1961 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1962 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1958} 1963}
1959 1964
1960 1965
@@ -1985,6 +1990,7 @@ static void
1985vmxnet3_set_mc(struct net_device *netdev) 1990vmxnet3_set_mc(struct net_device *netdev)
1986{ 1991{
1987 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1992 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1993 unsigned long flags;
1988 struct Vmxnet3_RxFilterConf *rxConf = 1994 struct Vmxnet3_RxFilterConf *rxConf =
1989 &adapter->shared->devRead.rxFilterConf; 1995 &adapter->shared->devRead.rxFilterConf;
1990 u8 *new_table = NULL; 1996 u8 *new_table = NULL;
@@ -2020,6 +2026,7 @@ vmxnet3_set_mc(struct net_device *netdev)
2020 rxConf->mfTablePA = 0; 2026 rxConf->mfTablePA = 0;
2021 } 2027 }
2022 2028
2029 spin_lock_irqsave(&adapter->cmd_lock, flags);
2023 if (new_mode != rxConf->rxMode) { 2030 if (new_mode != rxConf->rxMode) {
2024 rxConf->rxMode = cpu_to_le32(new_mode); 2031 rxConf->rxMode = cpu_to_le32(new_mode);
2025 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2032 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
@@ -2028,6 +2035,7 @@ vmxnet3_set_mc(struct net_device *netdev)
2028 2035
2029 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2036 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2030 VMXNET3_CMD_UPDATE_MAC_FILTERS); 2037 VMXNET3_CMD_UPDATE_MAC_FILTERS);
2038 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2031 2039
2032 kfree(new_table); 2040 kfree(new_table);
2033} 2041}
@@ -2080,10 +2088,8 @@ vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
2080 devRead->misc.uptFeatures |= UPT1_F_LRO; 2088 devRead->misc.uptFeatures |= UPT1_F_LRO;
2081 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS); 2089 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
2082 } 2090 }
2083 if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) && 2091 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX)
2084 adapter->vlan_grp) {
2085 devRead->misc.uptFeatures |= UPT1_F_RXVLAN; 2092 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
2086 }
2087 2093
2088 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu); 2094 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
2089 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa); 2095 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
@@ -2168,6 +2174,8 @@ vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
2168 /* rx filter settings */ 2174 /* rx filter settings */
2169 devRead->rxFilterConf.rxMode = 0; 2175 devRead->rxFilterConf.rxMode = 0;
2170 vmxnet3_restore_vlan(adapter); 2176 vmxnet3_restore_vlan(adapter);
2177 vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr);
2178
2171 /* the rest are already zeroed */ 2179 /* the rest are already zeroed */
2172} 2180}
2173 2181
@@ -2177,6 +2185,7 @@ vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
2177{ 2185{
2178 int err, i; 2186 int err, i;
2179 u32 ret; 2187 u32 ret;
2188 unsigned long flags;
2180 2189
2181 dev_dbg(&adapter->netdev->dev, "%s: skb_buf_size %d, rx_buf_per_pkt %d," 2190 dev_dbg(&adapter->netdev->dev, "%s: skb_buf_size %d, rx_buf_per_pkt %d,"
2182 " ring sizes %u %u %u\n", adapter->netdev->name, 2191 " ring sizes %u %u %u\n", adapter->netdev->name,
@@ -2206,9 +2215,11 @@ vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
2206 adapter->shared_pa)); 2215 adapter->shared_pa));
2207 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI( 2216 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
2208 adapter->shared_pa)); 2217 adapter->shared_pa));
2218 spin_lock_irqsave(&adapter->cmd_lock, flags);
2209 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2219 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2210 VMXNET3_CMD_ACTIVATE_DEV); 2220 VMXNET3_CMD_ACTIVATE_DEV);
2211 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2221 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2222 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2212 2223
2213 if (ret != 0) { 2224 if (ret != 0) {
2214 printk(KERN_ERR "Failed to activate dev %s: error %u\n", 2225 printk(KERN_ERR "Failed to activate dev %s: error %u\n",
@@ -2255,7 +2266,10 @@ rq_err:
2255void 2266void
2256vmxnet3_reset_dev(struct vmxnet3_adapter *adapter) 2267vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
2257{ 2268{
2269 unsigned long flags;
2270 spin_lock_irqsave(&adapter->cmd_lock, flags);
2258 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV); 2271 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
2272 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2259} 2273}
2260 2274
2261 2275
@@ -2263,12 +2277,15 @@ int
2263vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter) 2277vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
2264{ 2278{
2265 int i; 2279 int i;
2280 unsigned long flags;
2266 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state)) 2281 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
2267 return 0; 2282 return 0;
2268 2283
2269 2284
2285 spin_lock_irqsave(&adapter->cmd_lock, flags);
2270 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2286 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2271 VMXNET3_CMD_QUIESCE_DEV); 2287 VMXNET3_CMD_QUIESCE_DEV);
2288 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2272 vmxnet3_disable_all_intrs(adapter); 2289 vmxnet3_disable_all_intrs(adapter);
2273 2290
2274 for (i = 0; i < adapter->num_rx_queues; i++) 2291 for (i = 0; i < adapter->num_rx_queues; i++)
@@ -2426,7 +2443,7 @@ vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2426 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN; 2443 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2427 ring0_size = adapter->rx_queue[0].rx_ring[0].size; 2444 ring0_size = adapter->rx_queue[0].rx_ring[0].size;
2428 ring0_size = (ring0_size + sz - 1) / sz * sz; 2445 ring0_size = (ring0_size + sz - 1) / sz * sz;
2429 ring0_size = min_t(u32, rq->rx_ring[0].size, VMXNET3_RX_RING_MAX_SIZE / 2446 ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE /
2430 sz * sz); 2447 sz * sz);
2431 ring1_size = adapter->rx_queue[0].rx_ring[1].size; 2448 ring1_size = adapter->rx_queue[0].rx_ring[1].size;
2432 comp_size = ring0_size + ring1_size; 2449 comp_size = ring0_size + ring1_size;
@@ -2695,7 +2712,7 @@ vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter,
2695 break; 2712 break;
2696 } else { 2713 } else {
2697 /* If fails to enable required number of MSI-x vectors 2714 /* If fails to enable required number of MSI-x vectors
2698 * try enabling 3 of them. One each for rx, tx and event 2715 * try enabling minimum number of vectors required.
2699 */ 2716 */
2700 vectors = vector_threshold; 2717 vectors = vector_threshold;
2701 printk(KERN_ERR "Failed to enable %d MSI-X for %s, try" 2718 printk(KERN_ERR "Failed to enable %d MSI-X for %s, try"
@@ -2718,9 +2735,11 @@ vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2718 u32 cfg; 2735 u32 cfg;
2719 2736
2720 /* intr settings */ 2737 /* intr settings */
2738 spin_lock(&adapter->cmd_lock);
2721 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2739 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2722 VMXNET3_CMD_GET_CONF_INTR); 2740 VMXNET3_CMD_GET_CONF_INTR);
2723 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2741 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2742 spin_unlock(&adapter->cmd_lock);
2724 adapter->intr.type = cfg & 0x3; 2743 adapter->intr.type = cfg & 0x3;
2725 adapter->intr.mask_mode = (cfg >> 2) & 0x3; 2744 adapter->intr.mask_mode = (cfg >> 2) & 0x3;
2726 2745
@@ -2755,7 +2774,7 @@ vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2755 */ 2774 */
2756 if (err == VMXNET3_LINUX_MIN_MSIX_VECT) { 2775 if (err == VMXNET3_LINUX_MIN_MSIX_VECT) {
2757 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE 2776 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE
2758 || adapter->num_rx_queues != 2) { 2777 || adapter->num_rx_queues != 1) {
2759 adapter->share_intr = VMXNET3_INTR_TXSHARE; 2778 adapter->share_intr = VMXNET3_INTR_TXSHARE;
2760 printk(KERN_ERR "Number of rx queues : 1\n"); 2779 printk(KERN_ERR "Number of rx queues : 1\n");
2761 adapter->num_rx_queues = 1; 2780 adapter->num_rx_queues = 1;
@@ -2905,6 +2924,7 @@ vmxnet3_probe_device(struct pci_dev *pdev,
2905 adapter->netdev = netdev; 2924 adapter->netdev = netdev;
2906 adapter->pdev = pdev; 2925 adapter->pdev = pdev;
2907 2926
2927 spin_lock_init(&adapter->cmd_lock);
2908 adapter->shared = pci_alloc_consistent(adapter->pdev, 2928 adapter->shared = pci_alloc_consistent(adapter->pdev,
2909 sizeof(struct Vmxnet3_DriverShared), 2929 sizeof(struct Vmxnet3_DriverShared),
2910 &adapter->shared_pa); 2930 &adapter->shared_pa);
@@ -3108,11 +3128,15 @@ vmxnet3_suspend(struct device *device)
3108 u8 *arpreq; 3128 u8 *arpreq;
3109 struct in_device *in_dev; 3129 struct in_device *in_dev;
3110 struct in_ifaddr *ifa; 3130 struct in_ifaddr *ifa;
3131 unsigned long flags;
3111 int i = 0; 3132 int i = 0;
3112 3133
3113 if (!netif_running(netdev)) 3134 if (!netif_running(netdev))
3114 return 0; 3135 return 0;
3115 3136
3137 for (i = 0; i < adapter->num_rx_queues; i++)
3138 napi_disable(&adapter->rx_queue[i].napi);
3139
3116 vmxnet3_disable_all_intrs(adapter); 3140 vmxnet3_disable_all_intrs(adapter);
3117 vmxnet3_free_irqs(adapter); 3141 vmxnet3_free_irqs(adapter);
3118 vmxnet3_free_intr_resources(adapter); 3142 vmxnet3_free_intr_resources(adapter);
@@ -3188,8 +3212,10 @@ skip_arp:
3188 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 3212 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
3189 pmConf)); 3213 pmConf));
3190 3214
3215 spin_lock_irqsave(&adapter->cmd_lock, flags);
3191 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3216 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3192 VMXNET3_CMD_UPDATE_PMCFG); 3217 VMXNET3_CMD_UPDATE_PMCFG);
3218 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3193 3219
3194 pci_save_state(pdev); 3220 pci_save_state(pdev);
3195 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND), 3221 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
@@ -3204,7 +3230,8 @@ skip_arp:
3204static int 3230static int
3205vmxnet3_resume(struct device *device) 3231vmxnet3_resume(struct device *device)
3206{ 3232{
3207 int err; 3233 int err, i = 0;
3234 unsigned long flags;
3208 struct pci_dev *pdev = to_pci_dev(device); 3235 struct pci_dev *pdev = to_pci_dev(device);
3209 struct net_device *netdev = pci_get_drvdata(pdev); 3236 struct net_device *netdev = pci_get_drvdata(pdev);
3210 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3237 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
@@ -3232,10 +3259,14 @@ vmxnet3_resume(struct device *device)
3232 3259
3233 pci_enable_wake(pdev, PCI_D0, 0); 3260 pci_enable_wake(pdev, PCI_D0, 0);
3234 3261
3262 spin_lock_irqsave(&adapter->cmd_lock, flags);
3235 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3263 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3236 VMXNET3_CMD_UPDATE_PMCFG); 3264 VMXNET3_CMD_UPDATE_PMCFG);
3265 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3237 vmxnet3_alloc_intr_resources(adapter); 3266 vmxnet3_alloc_intr_resources(adapter);
3238 vmxnet3_request_irqs(adapter); 3267 vmxnet3_request_irqs(adapter);
3268 for (i = 0; i < adapter->num_rx_queues; i++)
3269 napi_enable(&adapter->rx_queue[i].napi);
3239 vmxnet3_enable_all_intrs(adapter); 3270 vmxnet3_enable_all_intrs(adapter);
3240 3271
3241 return 0; 3272 return 0;
diff --git a/drivers/net/vmxnet3/vmxnet3_ethtool.c b/drivers/net/vmxnet3/vmxnet3_ethtool.c
index 8e17fc8a7fe7..81254be85b92 100644
--- a/drivers/net/vmxnet3/vmxnet3_ethtool.c
+++ b/drivers/net/vmxnet3/vmxnet3_ethtool.c
@@ -45,6 +45,7 @@ static int
45vmxnet3_set_rx_csum(struct net_device *netdev, u32 val) 45vmxnet3_set_rx_csum(struct net_device *netdev, u32 val)
46{ 46{
47 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 47 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
48 unsigned long flags;
48 49
49 if (adapter->rxcsum != val) { 50 if (adapter->rxcsum != val) {
50 adapter->rxcsum = val; 51 adapter->rxcsum = val;
@@ -56,8 +57,10 @@ vmxnet3_set_rx_csum(struct net_device *netdev, u32 val)
56 adapter->shared->devRead.misc.uptFeatures &= 57 adapter->shared->devRead.misc.uptFeatures &=
57 ~UPT1_F_RXCSUM; 58 ~UPT1_F_RXCSUM;
58 59
60 spin_lock_irqsave(&adapter->cmd_lock, flags);
59 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 61 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
60 VMXNET3_CMD_UPDATE_FEATURE); 62 VMXNET3_CMD_UPDATE_FEATURE);
63 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
61 } 64 }
62 } 65 }
63 return 0; 66 return 0;
@@ -68,76 +71,78 @@ vmxnet3_set_rx_csum(struct net_device *netdev, u32 val)
68static const struct vmxnet3_stat_desc 71static const struct vmxnet3_stat_desc
69vmxnet3_tq_dev_stats[] = { 72vmxnet3_tq_dev_stats[] = {
70 /* description, offset */ 73 /* description, offset */
71 { "TSO pkts tx", offsetof(struct UPT1_TxStats, TSOPktsTxOK) }, 74 { "Tx Queue#", 0 },
72 { "TSO bytes tx", offsetof(struct UPT1_TxStats, TSOBytesTxOK) }, 75 { " TSO pkts tx", offsetof(struct UPT1_TxStats, TSOPktsTxOK) },
73 { "ucast pkts tx", offsetof(struct UPT1_TxStats, ucastPktsTxOK) }, 76 { " TSO bytes tx", offsetof(struct UPT1_TxStats, TSOBytesTxOK) },
74 { "ucast bytes tx", offsetof(struct UPT1_TxStats, ucastBytesTxOK) }, 77 { " ucast pkts tx", offsetof(struct UPT1_TxStats, ucastPktsTxOK) },
75 { "mcast pkts tx", offsetof(struct UPT1_TxStats, mcastPktsTxOK) }, 78 { " ucast bytes tx", offsetof(struct UPT1_TxStats, ucastBytesTxOK) },
76 { "mcast bytes tx", offsetof(struct UPT1_TxStats, mcastBytesTxOK) }, 79 { " mcast pkts tx", offsetof(struct UPT1_TxStats, mcastPktsTxOK) },
77 { "bcast pkts tx", offsetof(struct UPT1_TxStats, bcastPktsTxOK) }, 80 { " mcast bytes tx", offsetof(struct UPT1_TxStats, mcastBytesTxOK) },
78 { "bcast bytes tx", offsetof(struct UPT1_TxStats, bcastBytesTxOK) }, 81 { " bcast pkts tx", offsetof(struct UPT1_TxStats, bcastPktsTxOK) },
79 { "pkts tx err", offsetof(struct UPT1_TxStats, pktsTxError) }, 82 { " bcast bytes tx", offsetof(struct UPT1_TxStats, bcastBytesTxOK) },
80 { "pkts tx discard", offsetof(struct UPT1_TxStats, pktsTxDiscard) }, 83 { " pkts tx err", offsetof(struct UPT1_TxStats, pktsTxError) },
84 { " pkts tx discard", offsetof(struct UPT1_TxStats, pktsTxDiscard) },
81}; 85};
82 86
83/* per tq stats maintained by the driver */ 87/* per tq stats maintained by the driver */
84static const struct vmxnet3_stat_desc 88static const struct vmxnet3_stat_desc
85vmxnet3_tq_driver_stats[] = { 89vmxnet3_tq_driver_stats[] = {
86 /* description, offset */ 90 /* description, offset */
87 {"drv dropped tx total", offsetof(struct vmxnet3_tq_driver_stats, 91 {" drv dropped tx total", offsetof(struct vmxnet3_tq_driver_stats,
88 drop_total) }, 92 drop_total) },
89 { " too many frags", offsetof(struct vmxnet3_tq_driver_stats, 93 { " too many frags", offsetof(struct vmxnet3_tq_driver_stats,
90 drop_too_many_frags) }, 94 drop_too_many_frags) },
91 { " giant hdr", offsetof(struct vmxnet3_tq_driver_stats, 95 { " giant hdr", offsetof(struct vmxnet3_tq_driver_stats,
92 drop_oversized_hdr) }, 96 drop_oversized_hdr) },
93 { " hdr err", offsetof(struct vmxnet3_tq_driver_stats, 97 { " hdr err", offsetof(struct vmxnet3_tq_driver_stats,
94 drop_hdr_inspect_err) }, 98 drop_hdr_inspect_err) },
95 { " tso", offsetof(struct vmxnet3_tq_driver_stats, 99 { " tso", offsetof(struct vmxnet3_tq_driver_stats,
96 drop_tso) }, 100 drop_tso) },
97 { "ring full", offsetof(struct vmxnet3_tq_driver_stats, 101 { " ring full", offsetof(struct vmxnet3_tq_driver_stats,
98 tx_ring_full) }, 102 tx_ring_full) },
99 { "pkts linearized", offsetof(struct vmxnet3_tq_driver_stats, 103 { " pkts linearized", offsetof(struct vmxnet3_tq_driver_stats,
100 linearized) }, 104 linearized) },
101 { "hdr cloned", offsetof(struct vmxnet3_tq_driver_stats, 105 { " hdr cloned", offsetof(struct vmxnet3_tq_driver_stats,
102 copy_skb_header) }, 106 copy_skb_header) },
103 { "giant hdr", offsetof(struct vmxnet3_tq_driver_stats, 107 { " giant hdr", offsetof(struct vmxnet3_tq_driver_stats,
104 oversized_hdr) }, 108 oversized_hdr) },
105}; 109};
106 110
107/* per rq stats maintained by the device */ 111/* per rq stats maintained by the device */
108static const struct vmxnet3_stat_desc 112static const struct vmxnet3_stat_desc
109vmxnet3_rq_dev_stats[] = { 113vmxnet3_rq_dev_stats[] = {
110 { "LRO pkts rx", offsetof(struct UPT1_RxStats, LROPktsRxOK) }, 114 { "Rx Queue#", 0 },
111 { "LRO byte rx", offsetof(struct UPT1_RxStats, LROBytesRxOK) }, 115 { " LRO pkts rx", offsetof(struct UPT1_RxStats, LROPktsRxOK) },
112 { "ucast pkts rx", offsetof(struct UPT1_RxStats, ucastPktsRxOK) }, 116 { " LRO byte rx", offsetof(struct UPT1_RxStats, LROBytesRxOK) },
113 { "ucast bytes rx", offsetof(struct UPT1_RxStats, ucastBytesRxOK) }, 117 { " ucast pkts rx", offsetof(struct UPT1_RxStats, ucastPktsRxOK) },
114 { "mcast pkts rx", offsetof(struct UPT1_RxStats, mcastPktsRxOK) }, 118 { " ucast bytes rx", offsetof(struct UPT1_RxStats, ucastBytesRxOK) },
115 { "mcast bytes rx", offsetof(struct UPT1_RxStats, mcastBytesRxOK) }, 119 { " mcast pkts rx", offsetof(struct UPT1_RxStats, mcastPktsRxOK) },
116 { "bcast pkts rx", offsetof(struct UPT1_RxStats, bcastPktsRxOK) }, 120 { " mcast bytes rx", offsetof(struct UPT1_RxStats, mcastBytesRxOK) },
117 { "bcast bytes rx", offsetof(struct UPT1_RxStats, bcastBytesRxOK) }, 121 { " bcast pkts rx", offsetof(struct UPT1_RxStats, bcastPktsRxOK) },
118 { "pkts rx out of buf", offsetof(struct UPT1_RxStats, pktsRxOutOfBuf) }, 122 { " bcast bytes rx", offsetof(struct UPT1_RxStats, bcastBytesRxOK) },
119 { "pkts rx err", offsetof(struct UPT1_RxStats, pktsRxError) }, 123 { " pkts rx OOB", offsetof(struct UPT1_RxStats, pktsRxOutOfBuf) },
124 { " pkts rx err", offsetof(struct UPT1_RxStats, pktsRxError) },
120}; 125};
121 126
122/* per rq stats maintained by the driver */ 127/* per rq stats maintained by the driver */
123static const struct vmxnet3_stat_desc 128static const struct vmxnet3_stat_desc
124vmxnet3_rq_driver_stats[] = { 129vmxnet3_rq_driver_stats[] = {
125 /* description, offset */ 130 /* description, offset */
126 { "drv dropped rx total", offsetof(struct vmxnet3_rq_driver_stats, 131 { " drv dropped rx total", offsetof(struct vmxnet3_rq_driver_stats,
127 drop_total) }, 132 drop_total) },
128 { " err", offsetof(struct vmxnet3_rq_driver_stats, 133 { " err", offsetof(struct vmxnet3_rq_driver_stats,
129 drop_err) }, 134 drop_err) },
130 { " fcs", offsetof(struct vmxnet3_rq_driver_stats, 135 { " fcs", offsetof(struct vmxnet3_rq_driver_stats,
131 drop_fcs) }, 136 drop_fcs) },
132 { "rx buf alloc fail", offsetof(struct vmxnet3_rq_driver_stats, 137 { " rx buf alloc fail", offsetof(struct vmxnet3_rq_driver_stats,
133 rx_buf_alloc_failure) }, 138 rx_buf_alloc_failure) },
134}; 139};
135 140
136/* gloabl stats maintained by the driver */ 141/* gloabl stats maintained by the driver */
137static const struct vmxnet3_stat_desc 142static const struct vmxnet3_stat_desc
138vmxnet3_global_stats[] = { 143vmxnet3_global_stats[] = {
139 /* description, offset */ 144 /* description, offset */
140 { "tx timeout count", offsetof(struct vmxnet3_adapter, 145 { "tx timeout count", offsetof(struct vmxnet3_adapter,
141 tx_timeout_count) } 146 tx_timeout_count) }
142}; 147};
143 148
@@ -151,12 +156,15 @@ vmxnet3_get_stats(struct net_device *netdev)
151 struct UPT1_TxStats *devTxStats; 156 struct UPT1_TxStats *devTxStats;
152 struct UPT1_RxStats *devRxStats; 157 struct UPT1_RxStats *devRxStats;
153 struct net_device_stats *net_stats = &netdev->stats; 158 struct net_device_stats *net_stats = &netdev->stats;
159 unsigned long flags;
154 int i; 160 int i;
155 161
156 adapter = netdev_priv(netdev); 162 adapter = netdev_priv(netdev);
157 163
158 /* Collect the dev stats into the shared area */ 164 /* Collect the dev stats into the shared area */
165 spin_lock_irqsave(&adapter->cmd_lock, flags);
159 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS); 166 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
167 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
160 168
161 memset(net_stats, 0, sizeof(*net_stats)); 169 memset(net_stats, 0, sizeof(*net_stats));
162 for (i = 0; i < adapter->num_tx_queues; i++) { 170 for (i = 0; i < adapter->num_tx_queues; i++) {
@@ -193,12 +201,15 @@ vmxnet3_get_stats(struct net_device *netdev)
193static int 201static int
194vmxnet3_get_sset_count(struct net_device *netdev, int sset) 202vmxnet3_get_sset_count(struct net_device *netdev, int sset)
195{ 203{
204 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
196 switch (sset) { 205 switch (sset) {
197 case ETH_SS_STATS: 206 case ETH_SS_STATS:
198 return ARRAY_SIZE(vmxnet3_tq_dev_stats) + 207 return (ARRAY_SIZE(vmxnet3_tq_dev_stats) +
199 ARRAY_SIZE(vmxnet3_tq_driver_stats) + 208 ARRAY_SIZE(vmxnet3_tq_driver_stats)) *
200 ARRAY_SIZE(vmxnet3_rq_dev_stats) + 209 adapter->num_tx_queues +
201 ARRAY_SIZE(vmxnet3_rq_driver_stats) + 210 (ARRAY_SIZE(vmxnet3_rq_dev_stats) +
211 ARRAY_SIZE(vmxnet3_rq_driver_stats)) *
212 adapter->num_rx_queues +
202 ARRAY_SIZE(vmxnet3_global_stats); 213 ARRAY_SIZE(vmxnet3_global_stats);
203 default: 214 default:
204 return -EOPNOTSUPP; 215 return -EOPNOTSUPP;
@@ -206,10 +217,16 @@ vmxnet3_get_sset_count(struct net_device *netdev, int sset)
206} 217}
207 218
208 219
220/* Should be multiple of 4 */
221#define NUM_TX_REGS 8
222#define NUM_RX_REGS 12
223
209static int 224static int
210vmxnet3_get_regs_len(struct net_device *netdev) 225vmxnet3_get_regs_len(struct net_device *netdev)
211{ 226{
212 return 20 * sizeof(u32); 227 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
228 return (adapter->num_tx_queues * NUM_TX_REGS * sizeof(u32) +
229 adapter->num_rx_queues * NUM_RX_REGS * sizeof(u32));
213} 230}
214 231
215 232
@@ -240,29 +257,37 @@ vmxnet3_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
240static void 257static void
241vmxnet3_get_strings(struct net_device *netdev, u32 stringset, u8 *buf) 258vmxnet3_get_strings(struct net_device *netdev, u32 stringset, u8 *buf)
242{ 259{
260 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
243 if (stringset == ETH_SS_STATS) { 261 if (stringset == ETH_SS_STATS) {
244 int i; 262 int i, j;
245 263 for (j = 0; j < adapter->num_tx_queues; j++) {
246 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++) { 264 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++) {
247 memcpy(buf, vmxnet3_tq_dev_stats[i].desc, 265 memcpy(buf, vmxnet3_tq_dev_stats[i].desc,
248 ETH_GSTRING_LEN); 266 ETH_GSTRING_LEN);
249 buf += ETH_GSTRING_LEN; 267 buf += ETH_GSTRING_LEN;
250 } 268 }
251 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++) { 269 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats);
252 memcpy(buf, vmxnet3_tq_driver_stats[i].desc, 270 i++) {
253 ETH_GSTRING_LEN); 271 memcpy(buf, vmxnet3_tq_driver_stats[i].desc,
254 buf += ETH_GSTRING_LEN; 272 ETH_GSTRING_LEN);
255 } 273 buf += ETH_GSTRING_LEN;
256 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++) { 274 }
257 memcpy(buf, vmxnet3_rq_dev_stats[i].desc,
258 ETH_GSTRING_LEN);
259 buf += ETH_GSTRING_LEN;
260 } 275 }
261 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++) { 276
262 memcpy(buf, vmxnet3_rq_driver_stats[i].desc, 277 for (j = 0; j < adapter->num_rx_queues; j++) {
263 ETH_GSTRING_LEN); 278 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++) {
264 buf += ETH_GSTRING_LEN; 279 memcpy(buf, vmxnet3_rq_dev_stats[i].desc,
280 ETH_GSTRING_LEN);
281 buf += ETH_GSTRING_LEN;
282 }
283 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats);
284 i++) {
285 memcpy(buf, vmxnet3_rq_driver_stats[i].desc,
286 ETH_GSTRING_LEN);
287 buf += ETH_GSTRING_LEN;
288 }
265 } 289 }
290
266 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++) { 291 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++) {
267 memcpy(buf, vmxnet3_global_stats[i].desc, 292 memcpy(buf, vmxnet3_global_stats[i].desc,
268 ETH_GSTRING_LEN); 293 ETH_GSTRING_LEN);
@@ -277,6 +302,7 @@ vmxnet3_set_flags(struct net_device *netdev, u32 data)
277 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 302 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
278 u8 lro_requested = (data & ETH_FLAG_LRO) == 0 ? 0 : 1; 303 u8 lro_requested = (data & ETH_FLAG_LRO) == 0 ? 0 : 1;
279 u8 lro_present = (netdev->features & NETIF_F_LRO) == 0 ? 0 : 1; 304 u8 lro_present = (netdev->features & NETIF_F_LRO) == 0 ? 0 : 1;
305 unsigned long flags;
280 306
281 if (data & ~ETH_FLAG_LRO) 307 if (data & ~ETH_FLAG_LRO)
282 return -EOPNOTSUPP; 308 return -EOPNOTSUPP;
@@ -292,8 +318,10 @@ vmxnet3_set_flags(struct net_device *netdev, u32 data)
292 else 318 else
293 adapter->shared->devRead.misc.uptFeatures &= 319 adapter->shared->devRead.misc.uptFeatures &=
294 ~UPT1_F_LRO; 320 ~UPT1_F_LRO;
321 spin_lock_irqsave(&adapter->cmd_lock, flags);
295 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 322 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
296 VMXNET3_CMD_UPDATE_FEATURE); 323 VMXNET3_CMD_UPDATE_FEATURE);
324 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
297 } 325 }
298 return 0; 326 return 0;
299} 327}
@@ -303,30 +331,41 @@ vmxnet3_get_ethtool_stats(struct net_device *netdev,
303 struct ethtool_stats *stats, u64 *buf) 331 struct ethtool_stats *stats, u64 *buf)
304{ 332{
305 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 333 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
334 unsigned long flags;
306 u8 *base; 335 u8 *base;
307 int i; 336 int i;
308 int j = 0; 337 int j = 0;
309 338
339 spin_lock_irqsave(&adapter->cmd_lock, flags);
310 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS); 340 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
341 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
311 342
312 /* this does assume each counter is 64-bit wide */ 343 /* this does assume each counter is 64-bit wide */
313/* TODO change this for multiple queues */ 344 for (j = 0; j < adapter->num_tx_queues; j++) {
314 345 base = (u8 *)&adapter->tqd_start[j].stats;
315 base = (u8 *)&adapter->tqd_start[j].stats; 346 *buf++ = (u64)j;
316 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++) 347 for (i = 1; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++)
317 *buf++ = *(u64 *)(base + vmxnet3_tq_dev_stats[i].offset); 348 *buf++ = *(u64 *)(base +
318 349 vmxnet3_tq_dev_stats[i].offset);
319 base = (u8 *)&adapter->tx_queue[j].stats; 350
320 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++) 351 base = (u8 *)&adapter->tx_queue[j].stats;
321 *buf++ = *(u64 *)(base + vmxnet3_tq_driver_stats[i].offset); 352 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++)
322 353 *buf++ = *(u64 *)(base +
323 base = (u8 *)&adapter->rqd_start[j].stats; 354 vmxnet3_tq_driver_stats[i].offset);
324 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++) 355 }
325 *buf++ = *(u64 *)(base + vmxnet3_rq_dev_stats[i].offset);
326 356
327 base = (u8 *)&adapter->rx_queue[j].stats; 357 for (j = 0; j < adapter->num_tx_queues; j++) {
328 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++) 358 base = (u8 *)&adapter->rqd_start[j].stats;
329 *buf++ = *(u64 *)(base + vmxnet3_rq_driver_stats[i].offset); 359 *buf++ = (u64) j;
360 for (i = 1; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++)
361 *buf++ = *(u64 *)(base +
362 vmxnet3_rq_dev_stats[i].offset);
363
364 base = (u8 *)&adapter->rx_queue[j].stats;
365 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++)
366 *buf++ = *(u64 *)(base +
367 vmxnet3_rq_driver_stats[i].offset);
368 }
330 369
331 base = (u8 *)adapter; 370 base = (u8 *)adapter;
332 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++) 371 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++)
@@ -339,7 +378,7 @@ vmxnet3_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
339{ 378{
340 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 379 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
341 u32 *buf = p; 380 u32 *buf = p;
342 int i = 0; 381 int i = 0, j = 0;
343 382
344 memset(p, 0, vmxnet3_get_regs_len(netdev)); 383 memset(p, 0, vmxnet3_get_regs_len(netdev));
345 384
@@ -348,31 +387,35 @@ vmxnet3_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
348 /* Update vmxnet3_get_regs_len if we want to dump more registers */ 387 /* Update vmxnet3_get_regs_len if we want to dump more registers */
349 388
350 /* make each ring use multiple of 16 bytes */ 389 /* make each ring use multiple of 16 bytes */
351/* TODO change this for multiple queues */ 390 for (i = 0; i < adapter->num_tx_queues; i++) {
352 buf[0] = adapter->tx_queue[i].tx_ring.next2fill; 391 buf[j++] = adapter->tx_queue[i].tx_ring.next2fill;
353 buf[1] = adapter->tx_queue[i].tx_ring.next2comp; 392 buf[j++] = adapter->tx_queue[i].tx_ring.next2comp;
354 buf[2] = adapter->tx_queue[i].tx_ring.gen; 393 buf[j++] = adapter->tx_queue[i].tx_ring.gen;
355 buf[3] = 0; 394 buf[j++] = 0;
356 395
357 buf[4] = adapter->tx_queue[i].comp_ring.next2proc; 396 buf[j++] = adapter->tx_queue[i].comp_ring.next2proc;
358 buf[5] = adapter->tx_queue[i].comp_ring.gen; 397 buf[j++] = adapter->tx_queue[i].comp_ring.gen;
359 buf[6] = adapter->tx_queue[i].stopped; 398 buf[j++] = adapter->tx_queue[i].stopped;
360 buf[7] = 0; 399 buf[j++] = 0;
361 400 }
362 buf[8] = adapter->rx_queue[i].rx_ring[0].next2fill; 401
363 buf[9] = adapter->rx_queue[i].rx_ring[0].next2comp; 402 for (i = 0; i < adapter->num_rx_queues; i++) {
364 buf[10] = adapter->rx_queue[i].rx_ring[0].gen; 403 buf[j++] = adapter->rx_queue[i].rx_ring[0].next2fill;
365 buf[11] = 0; 404 buf[j++] = adapter->rx_queue[i].rx_ring[0].next2comp;
366 405 buf[j++] = adapter->rx_queue[i].rx_ring[0].gen;
367 buf[12] = adapter->rx_queue[i].rx_ring[1].next2fill; 406 buf[j++] = 0;
368 buf[13] = adapter->rx_queue[i].rx_ring[1].next2comp; 407
369 buf[14] = adapter->rx_queue[i].rx_ring[1].gen; 408 buf[j++] = adapter->rx_queue[i].rx_ring[1].next2fill;
370 buf[15] = 0; 409 buf[j++] = adapter->rx_queue[i].rx_ring[1].next2comp;
371 410 buf[j++] = adapter->rx_queue[i].rx_ring[1].gen;
372 buf[16] = adapter->rx_queue[i].comp_ring.next2proc; 411 buf[j++] = 0;
373 buf[17] = adapter->rx_queue[i].comp_ring.gen; 412
374 buf[18] = 0; 413 buf[j++] = adapter->rx_queue[i].comp_ring.next2proc;
375 buf[19] = 0; 414 buf[j++] = adapter->rx_queue[i].comp_ring.gen;
415 buf[j++] = 0;
416 buf[j++] = 0;
417 }
418
376} 419}
377 420
378 421
@@ -574,6 +617,7 @@ vmxnet3_set_rss_indir(struct net_device *netdev,
574 const struct ethtool_rxfh_indir *p) 617 const struct ethtool_rxfh_indir *p)
575{ 618{
576 unsigned int i; 619 unsigned int i;
620 unsigned long flags;
577 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 621 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
578 struct UPT1_RSSConf *rssConf = adapter->rss_conf; 622 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
579 623
@@ -592,8 +636,10 @@ vmxnet3_set_rss_indir(struct net_device *netdev,
592 for (i = 0; i < rssConf->indTableSize; i++) 636 for (i = 0; i < rssConf->indTableSize; i++)
593 rssConf->indTable[i] = p->ring_index[i]; 637 rssConf->indTable[i] = p->ring_index[i];
594 638
639 spin_lock_irqsave(&adapter->cmd_lock, flags);
595 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 640 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
596 VMXNET3_CMD_UPDATE_RSSIDT); 641 VMXNET3_CMD_UPDATE_RSSIDT);
642 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
597 643
598 return 0; 644 return 0;
599 645
diff --git a/drivers/net/vmxnet3/vmxnet3_int.h b/drivers/net/vmxnet3/vmxnet3_int.h
index 7fadeed37f03..fb5d245ac878 100644
--- a/drivers/net/vmxnet3/vmxnet3_int.h
+++ b/drivers/net/vmxnet3/vmxnet3_int.h
@@ -68,10 +68,10 @@
68/* 68/*
69 * Version numbers 69 * Version numbers
70 */ 70 */
71#define VMXNET3_DRIVER_VERSION_STRING "1.0.16.0-k" 71#define VMXNET3_DRIVER_VERSION_STRING "1.0.25.0-k"
72 72
73/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */ 73/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */
74#define VMXNET3_DRIVER_VERSION_NUM 0x01001000 74#define VMXNET3_DRIVER_VERSION_NUM 0x01001900
75 75
76#if defined(CONFIG_PCI_MSI) 76#if defined(CONFIG_PCI_MSI)
77 /* RSS only makes sense if MSI-X is supported. */ 77 /* RSS only makes sense if MSI-X is supported. */
@@ -289,7 +289,7 @@ struct vmxnet3_rx_queue {
289 289
290#define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \ 290#define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \
291 VMXNET3_DEVICE_MAX_RX_QUEUES + 1) 291 VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
292#define VMXNET3_LINUX_MIN_MSIX_VECT 3 /* 1 for each : tx, rx and event */ 292#define VMXNET3_LINUX_MIN_MSIX_VECT 2 /* 1 for tx-rx pair and 1 for event */
293 293
294 294
295struct vmxnet3_intr { 295struct vmxnet3_intr {
@@ -317,6 +317,7 @@ struct vmxnet3_adapter {
317 struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES]; 317 struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
318 struct vlan_group *vlan_grp; 318 struct vlan_group *vlan_grp;
319 struct vmxnet3_intr intr; 319 struct vmxnet3_intr intr;
320 spinlock_t cmd_lock;
320 struct Vmxnet3_DriverShared *shared; 321 struct Vmxnet3_DriverShared *shared;
321 struct Vmxnet3_PMConf *pm_conf; 322 struct Vmxnet3_PMConf *pm_conf;
322 struct Vmxnet3_TxQueueDesc *tqd_start; /* all tx queue desc */ 323 struct Vmxnet3_TxQueueDesc *tqd_start; /* all tx queue desc */
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index 019a74d533a6..09ae4ef0fd51 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -2294,6 +2294,8 @@ ath5k_tx_complete_poll_work(struct work_struct *work)
2294 int i; 2294 int i;
2295 bool needreset = false; 2295 bool needreset = false;
2296 2296
2297 mutex_lock(&sc->lock);
2298
2297 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) { 2299 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) {
2298 if (sc->txqs[i].setup) { 2300 if (sc->txqs[i].setup) {
2299 txq = &sc->txqs[i]; 2301 txq = &sc->txqs[i];
@@ -2321,6 +2323,8 @@ ath5k_tx_complete_poll_work(struct work_struct *work)
2321 ath5k_reset(sc, NULL, true); 2323 ath5k_reset(sc, NULL, true);
2322 } 2324 }
2323 2325
2326 mutex_unlock(&sc->lock);
2327
2324 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 2328 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
2325 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT)); 2329 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT));
2326} 2330}
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
index ea2e7d714bda..5e300bd3d264 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
@@ -679,10 +679,6 @@ static bool ar9002_hw_calibrate(struct ath_hw *ah,
679 679
680 /* Do NF cal only at longer intervals */ 680 /* Do NF cal only at longer intervals */
681 if (longcal || nfcal_pending) { 681 if (longcal || nfcal_pending) {
682 /* Do periodic PAOffset Cal */
683 ar9002_hw_pa_cal(ah, false);
684 ar9002_hw_olc_temp_compensation(ah);
685
686 /* 682 /*
687 * Get the value from the previous NF cal and update 683 * Get the value from the previous NF cal and update
688 * history buffer. 684 * history buffer.
@@ -697,8 +693,12 @@ static bool ar9002_hw_calibrate(struct ath_hw *ah,
697 ath9k_hw_loadnf(ah, ah->curchan); 693 ath9k_hw_loadnf(ah, ah->curchan);
698 } 694 }
699 695
700 if (longcal) 696 if (longcal) {
701 ath9k_hw_start_nfcal(ah, false); 697 ath9k_hw_start_nfcal(ah, false);
698 /* Do periodic PAOffset Cal */
699 ar9002_hw_pa_cal(ah, false);
700 ar9002_hw_olc_temp_compensation(ah);
701 }
702 } 702 }
703 703
704 return iscaldone; 704 return iscaldone;
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
index 81f9cf294dec..9ecca93392e8 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
@@ -1842,7 +1842,7 @@ static const u32 ar9300_2p2_soc_preamble[][2] = {
1842 1842
1843static const u32 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2[][2] = { 1843static const u32 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2[][2] = {
1844 /* Addr allmodes */ 1844 /* Addr allmodes */
1845 {0x00004040, 0x08212e5e}, 1845 {0x00004040, 0x0821265e},
1846 {0x00004040, 0x0008003b}, 1846 {0x00004040, 0x0008003b},
1847 {0x00004044, 0x00000000}, 1847 {0x00004044, 0x00000000},
1848}; 1848};
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index 6137634e46ca..06fb2c850535 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -146,8 +146,8 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
146 /* Sleep Setting */ 146 /* Sleep Setting */
147 147
148 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, 148 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
149 ar9300PciePhy_clkreq_enable_L1_2p2, 149 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2,
150 ARRAY_SIZE(ar9300PciePhy_clkreq_enable_L1_2p2), 150 ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2),
151 2); 151 2);
152 152
153 /* Fast clock modal settings */ 153 /* Fast clock modal settings */
diff --git a/drivers/net/wireless/ath/ath9k/htc.h b/drivers/net/wireless/ath/ath9k/htc.h
index 1ce506f23110..780ac5eac501 100644
--- a/drivers/net/wireless/ath/ath9k/htc.h
+++ b/drivers/net/wireless/ath/ath9k/htc.h
@@ -78,7 +78,7 @@ struct tx_frame_hdr {
78 u8 node_idx; 78 u8 node_idx;
79 u8 vif_idx; 79 u8 vif_idx;
80 u8 tidno; 80 u8 tidno;
81 u32 flags; /* ATH9K_HTC_TX_* */ 81 __be32 flags; /* ATH9K_HTC_TX_* */
82 u8 key_type; 82 u8 key_type;
83 u8 keyix; 83 u8 keyix;
84 u8 reserved[26]; 84 u8 reserved[26];
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
index 33f36029fa4f..7a5ffca21958 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
@@ -113,6 +113,7 @@ int ath9k_htc_tx_start(struct ath9k_htc_priv *priv, struct sk_buff *skb)
113 113
114 if (ieee80211_is_data(fc)) { 114 if (ieee80211_is_data(fc)) {
115 struct tx_frame_hdr tx_hdr; 115 struct tx_frame_hdr tx_hdr;
116 u32 flags = 0;
116 u8 *qc; 117 u8 *qc;
117 118
118 memset(&tx_hdr, 0, sizeof(struct tx_frame_hdr)); 119 memset(&tx_hdr, 0, sizeof(struct tx_frame_hdr));
@@ -136,13 +137,14 @@ int ath9k_htc_tx_start(struct ath9k_htc_priv *priv, struct sk_buff *skb)
136 /* Check for RTS protection */ 137 /* Check for RTS protection */
137 if (priv->hw->wiphy->rts_threshold != (u32) -1) 138 if (priv->hw->wiphy->rts_threshold != (u32) -1)
138 if (skb->len > priv->hw->wiphy->rts_threshold) 139 if (skb->len > priv->hw->wiphy->rts_threshold)
139 tx_hdr.flags |= ATH9K_HTC_TX_RTSCTS; 140 flags |= ATH9K_HTC_TX_RTSCTS;
140 141
141 /* CTS-to-self */ 142 /* CTS-to-self */
142 if (!(tx_hdr.flags & ATH9K_HTC_TX_RTSCTS) && 143 if (!(flags & ATH9K_HTC_TX_RTSCTS) &&
143 (priv->op_flags & OP_PROTECT_ENABLE)) 144 (priv->op_flags & OP_PROTECT_ENABLE))
144 tx_hdr.flags |= ATH9K_HTC_TX_CTSONLY; 145 flags |= ATH9K_HTC_TX_CTSONLY;
145 146
147 tx_hdr.flags = cpu_to_be32(flags);
146 tx_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb); 148 tx_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb);
147 if (tx_hdr.key_type == ATH9K_KEY_TYPE_CLEAR) 149 if (tx_hdr.key_type == ATH9K_KEY_TYPE_CLEAR)
148 tx_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID; 150 tx_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID;
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c
index 97906dd442e6..14ceb4df72f6 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c
@@ -168,7 +168,7 @@ int iwl_eeprom_check_sku(struct iwl_priv *priv)
168 /* not using .cfg overwrite */ 168 /* not using .cfg overwrite */
169 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG); 169 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
170 priv->cfg->valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg); 170 priv->cfg->valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);
171 priv->cfg->valid_rx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg); 171 priv->cfg->valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);
172 if (!priv->cfg->valid_tx_ant || !priv->cfg->valid_rx_ant) { 172 if (!priv->cfg->valid_tx_ant || !priv->cfg->valid_rx_ant) {
173 IWL_ERR(priv, "Invalid chain (0X%x, 0X%x)\n", 173 IWL_ERR(priv, "Invalid chain (0X%x, 0X%x)\n",
174 priv->cfg->valid_tx_ant, 174 priv->cfg->valid_tx_ant,
diff --git a/drivers/net/wireless/iwmc3200wifi/netdev.c b/drivers/net/wireless/iwmc3200wifi/netdev.c
index 13a69ebf2a94..5091d77e02ce 100644
--- a/drivers/net/wireless/iwmc3200wifi/netdev.c
+++ b/drivers/net/wireless/iwmc3200wifi/netdev.c
@@ -126,6 +126,7 @@ void *iwm_if_alloc(int sizeof_bus, struct device *dev,
126 ndev = alloc_netdev_mq(0, "wlan%d", ether_setup, IWM_TX_QUEUES); 126 ndev = alloc_netdev_mq(0, "wlan%d", ether_setup, IWM_TX_QUEUES);
127 if (!ndev) { 127 if (!ndev) {
128 dev_err(dev, "no memory for network device instance\n"); 128 dev_err(dev, "no memory for network device instance\n");
129 ret = -ENOMEM;
129 goto out_priv; 130 goto out_priv;
130 } 131 }
131 132
@@ -138,6 +139,7 @@ void *iwm_if_alloc(int sizeof_bus, struct device *dev,
138 GFP_KERNEL); 139 GFP_KERNEL);
139 if (!iwm->umac_profile) { 140 if (!iwm->umac_profile) {
140 dev_err(dev, "Couldn't alloc memory for profile\n"); 141 dev_err(dev, "Couldn't alloc memory for profile\n");
142 ret = -ENOMEM;
141 goto out_profile; 143 goto out_profile;
142 } 144 }
143 145
diff --git a/drivers/net/wireless/rt2x00/rt2x00firmware.c b/drivers/net/wireless/rt2x00/rt2x00firmware.c
index f0e1eb72befc..be0ff78c1b16 100644
--- a/drivers/net/wireless/rt2x00/rt2x00firmware.c
+++ b/drivers/net/wireless/rt2x00/rt2x00firmware.c
@@ -58,6 +58,7 @@ static int rt2x00lib_request_firmware(struct rt2x00_dev *rt2x00dev)
58 58
59 if (!fw || !fw->size || !fw->data) { 59 if (!fw || !fw->size || !fw->data) {
60 ERROR(rt2x00dev, "Failed to read Firmware.\n"); 60 ERROR(rt2x00dev, "Failed to read Firmware.\n");
61 release_firmware(fw);
61 return -ENOENT; 62 return -ENOENT;
62 } 63 }
63 64
diff --git a/drivers/nfc/pn544.c b/drivers/nfc/pn544.c
index 401c44b6eadb..bae647264dd6 100644
--- a/drivers/nfc/pn544.c
+++ b/drivers/nfc/pn544.c
@@ -69,7 +69,7 @@ struct pn544_info {
69 struct mutex read_mutex; /* Serialize read_irq access */ 69 struct mutex read_mutex; /* Serialize read_irq access */
70 struct mutex mutex; /* Serialize info struct access */ 70 struct mutex mutex; /* Serialize info struct access */
71 u8 *buf; 71 u8 *buf;
72 unsigned int buflen; 72 size_t buflen;
73}; 73};
74 74
75static const char reg_vdd_io[] = "Vdd_IO"; 75static const char reg_vdd_io[] = "Vdd_IO";
diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
index c787c3d95c60..af824e7e0367 100644
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
@@ -692,12 +692,6 @@ int __init early_init_dt_scan_chosen(unsigned long node, const char *uname,
692 return 1; 692 return 1;
693} 693}
694 694
695static void *__init early_device_tree_alloc(u64 size, u64 align)
696{
697 unsigned long mem = early_init_dt_alloc_memory_arch(size, align);
698 return __va(mem);
699}
700
701/** 695/**
702 * unflatten_device_tree - create tree of device_nodes from flat blob 696 * unflatten_device_tree - create tree of device_nodes from flat blob
703 * 697 *
@@ -709,7 +703,7 @@ static void *__init early_device_tree_alloc(u64 size, u64 align)
709void __init unflatten_device_tree(void) 703void __init unflatten_device_tree(void)
710{ 704{
711 __unflatten_device_tree(initial_boot_params, &allnodes, 705 __unflatten_device_tree(initial_boot_params, &allnodes,
712 early_device_tree_alloc); 706 early_init_dt_alloc_memory_arch);
713 707
714 /* Get pointer to OF "/chosen" node for use everywhere */ 708 /* Get pointer to OF "/chosen" node for use everywhere */
715 of_chosen = of_find_node_by_path("/chosen"); 709 of_chosen = of_find_node_by_path("/chosen");
diff --git a/drivers/s390/net/qeth_l2_main.c b/drivers/s390/net/qeth_l2_main.c
index 7a7a1b664781..2ac8f6aff5a4 100644
--- a/drivers/s390/net/qeth_l2_main.c
+++ b/drivers/s390/net/qeth_l2_main.c
@@ -831,12 +831,14 @@ tx_drop:
831 return NETDEV_TX_OK; 831 return NETDEV_TX_OK;
832} 832}
833 833
834static int qeth_l2_open(struct net_device *dev) 834static int __qeth_l2_open(struct net_device *dev)
835{ 835{
836 struct qeth_card *card = dev->ml_priv; 836 struct qeth_card *card = dev->ml_priv;
837 int rc = 0; 837 int rc = 0;
838 838
839 QETH_CARD_TEXT(card, 4, "qethopen"); 839 QETH_CARD_TEXT(card, 4, "qethopen");
840 if (card->state == CARD_STATE_UP)
841 return rc;
840 if (card->state != CARD_STATE_SOFTSETUP) 842 if (card->state != CARD_STATE_SOFTSETUP)
841 return -ENODEV; 843 return -ENODEV;
842 844
@@ -857,6 +859,18 @@ static int qeth_l2_open(struct net_device *dev)
857 return rc; 859 return rc;
858} 860}
859 861
862static int qeth_l2_open(struct net_device *dev)
863{
864 struct qeth_card *card = dev->ml_priv;
865
866 QETH_CARD_TEXT(card, 5, "qethope_");
867 if (qeth_wait_for_threads(card, QETH_RECOVER_THREAD)) {
868 QETH_CARD_TEXT(card, 3, "openREC");
869 return -ERESTARTSYS;
870 }
871 return __qeth_l2_open(dev);
872}
873
860static int qeth_l2_stop(struct net_device *dev) 874static int qeth_l2_stop(struct net_device *dev)
861{ 875{
862 struct qeth_card *card = dev->ml_priv; 876 struct qeth_card *card = dev->ml_priv;
@@ -1046,7 +1060,7 @@ contin:
1046 if (recover_flag == CARD_STATE_RECOVER) { 1060 if (recover_flag == CARD_STATE_RECOVER) {
1047 if (recovery_mode && 1061 if (recovery_mode &&
1048 card->info.type != QETH_CARD_TYPE_OSN) { 1062 card->info.type != QETH_CARD_TYPE_OSN) {
1049 qeth_l2_open(card->dev); 1063 __qeth_l2_open(card->dev);
1050 } else { 1064 } else {
1051 rtnl_lock(); 1065 rtnl_lock();
1052 dev_open(card->dev); 1066 dev_open(card->dev);
diff --git a/drivers/s390/net/qeth_l3_main.c b/drivers/s390/net/qeth_l3_main.c
index e227e465bfc4..d09b0c44fc3d 100644
--- a/drivers/s390/net/qeth_l3_main.c
+++ b/drivers/s390/net/qeth_l3_main.c
@@ -2998,7 +2998,9 @@ static inline void qeth_l3_hdr_csum(struct qeth_card *card,
2998 */ 2998 */
2999 if (iph->protocol == IPPROTO_UDP) 2999 if (iph->protocol == IPPROTO_UDP)
3000 hdr->hdr.l3.ext_flags |= QETH_HDR_EXT_UDP; 3000 hdr->hdr.l3.ext_flags |= QETH_HDR_EXT_UDP;
3001 hdr->hdr.l3.ext_flags |= QETH_HDR_EXT_CSUM_TRANSP_REQ; 3001 hdr->hdr.l3.ext_flags |= QETH_HDR_EXT_CSUM_TRANSP_REQ |
3002 QETH_HDR_EXT_CSUM_HDR_REQ;
3003 iph->check = 0;
3002 if (card->options.performance_stats) 3004 if (card->options.performance_stats)
3003 card->perf_stats.tx_csum++; 3005 card->perf_stats.tx_csum++;
3004} 3006}
@@ -3240,12 +3242,14 @@ tx_drop:
3240 return NETDEV_TX_OK; 3242 return NETDEV_TX_OK;
3241} 3243}
3242 3244
3243static int qeth_l3_open(struct net_device *dev) 3245static int __qeth_l3_open(struct net_device *dev)
3244{ 3246{
3245 struct qeth_card *card = dev->ml_priv; 3247 struct qeth_card *card = dev->ml_priv;
3246 int rc = 0; 3248 int rc = 0;
3247 3249
3248 QETH_CARD_TEXT(card, 4, "qethopen"); 3250 QETH_CARD_TEXT(card, 4, "qethopen");
3251 if (card->state == CARD_STATE_UP)
3252 return rc;
3249 if (card->state != CARD_STATE_SOFTSETUP) 3253 if (card->state != CARD_STATE_SOFTSETUP)
3250 return -ENODEV; 3254 return -ENODEV;
3251 card->data.state = CH_STATE_UP; 3255 card->data.state = CH_STATE_UP;
@@ -3260,6 +3264,18 @@ static int qeth_l3_open(struct net_device *dev)
3260 return rc; 3264 return rc;
3261} 3265}
3262 3266
3267static int qeth_l3_open(struct net_device *dev)
3268{
3269 struct qeth_card *card = dev->ml_priv;
3270
3271 QETH_CARD_TEXT(card, 5, "qethope_");
3272 if (qeth_wait_for_threads(card, QETH_RECOVER_THREAD)) {
3273 QETH_CARD_TEXT(card, 3, "openREC");
3274 return -ERESTARTSYS;
3275 }
3276 return __qeth_l3_open(dev);
3277}
3278
3263static int qeth_l3_stop(struct net_device *dev) 3279static int qeth_l3_stop(struct net_device *dev)
3264{ 3280{
3265 struct qeth_card *card = dev->ml_priv; 3281 struct qeth_card *card = dev->ml_priv;
@@ -3564,7 +3580,7 @@ contin:
3564 netif_carrier_off(card->dev); 3580 netif_carrier_off(card->dev);
3565 if (recover_flag == CARD_STATE_RECOVER) { 3581 if (recover_flag == CARD_STATE_RECOVER) {
3566 if (recovery_mode) 3582 if (recovery_mode)
3567 qeth_l3_open(card->dev); 3583 __qeth_l3_open(card->dev);
3568 else { 3584 else {
3569 rtnl_lock(); 3585 rtnl_lock();
3570 dev_open(card->dev); 3586 dev_open(card->dev);
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 13bfa9d48082..bb233a9cbad2 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -53,6 +53,14 @@ if SPI_MASTER
53 53
54comment "SPI Master Controller Drivers" 54comment "SPI Master Controller Drivers"
55 55
56config SPI_ATH79
57 tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver"
58 depends on ATH79 && GENERIC_GPIO
59 select SPI_BITBANG
60 help
61 This enables support for the SPI controller present on the
62 Atheros AR71XX/AR724X/AR913X SoCs.
63
56config SPI_ATMEL 64config SPI_ATMEL
57 tristate "Atmel SPI Controller" 65 tristate "Atmel SPI Controller"
58 depends on (ARCH_AT91 || AVR32) 66 depends on (ARCH_AT91 || AVR32)
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 3a42463c92a4..86d1b5f9bbd9 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_SPI_MASTER) += spi.o
10 10
11# SPI master controller drivers (bus) 11# SPI master controller drivers (bus)
12obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o 12obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o
13obj-$(CONFIG_SPI_ATH79) += ath79_spi.o
13obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o 14obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o
14obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o 15obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o
15obj-$(CONFIG_SPI_AU1550) += au1550_spi.o 16obj-$(CONFIG_SPI_AU1550) += au1550_spi.o
diff --git a/drivers/spi/ath79_spi.c b/drivers/spi/ath79_spi.c
new file mode 100644
index 000000000000..fcff810ea3b0
--- /dev/null
+++ b/drivers/spi/ath79_spi.c
@@ -0,0 +1,292 @@
1/*
2 * SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs
3 *
4 * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This driver has been based on the spi-gpio.c:
7 * Copyright (C) 2006,2008 David Brownell
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/spinlock.h>
19#include <linux/workqueue.h>
20#include <linux/platform_device.h>
21#include <linux/io.h>
22#include <linux/spi/spi.h>
23#include <linux/spi/spi_bitbang.h>
24#include <linux/bitops.h>
25#include <linux/gpio.h>
26
27#include <asm/mach-ath79/ar71xx_regs.h>
28#include <asm/mach-ath79/ath79_spi_platform.h>
29
30#define DRV_NAME "ath79-spi"
31
32struct ath79_spi {
33 struct spi_bitbang bitbang;
34 u32 ioc_base;
35 u32 reg_ctrl;
36 void __iomem *base;
37};
38
39static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned reg)
40{
41 return ioread32(sp->base + reg);
42}
43
44static inline void ath79_spi_wr(struct ath79_spi *sp, unsigned reg, u32 val)
45{
46 iowrite32(val, sp->base + reg);
47}
48
49static inline struct ath79_spi *ath79_spidev_to_sp(struct spi_device *spi)
50{
51 return spi_master_get_devdata(spi->master);
52}
53
54static void ath79_spi_chipselect(struct spi_device *spi, int is_active)
55{
56 struct ath79_spi *sp = ath79_spidev_to_sp(spi);
57 int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active;
58
59 if (is_active) {
60 /* set initial clock polarity */
61 if (spi->mode & SPI_CPOL)
62 sp->ioc_base |= AR71XX_SPI_IOC_CLK;
63 else
64 sp->ioc_base &= ~AR71XX_SPI_IOC_CLK;
65
66 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
67 }
68
69 if (spi->chip_select) {
70 struct ath79_spi_controller_data *cdata = spi->controller_data;
71
72 /* SPI is normally active-low */
73 gpio_set_value(cdata->gpio, cs_high);
74 } else {
75 if (cs_high)
76 sp->ioc_base |= AR71XX_SPI_IOC_CS0;
77 else
78 sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
79
80 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
81 }
82
83}
84
85static int ath79_spi_setup_cs(struct spi_device *spi)
86{
87 struct ath79_spi *sp = ath79_spidev_to_sp(spi);
88 struct ath79_spi_controller_data *cdata;
89
90 cdata = spi->controller_data;
91 if (spi->chip_select && !cdata)
92 return -EINVAL;
93
94 /* enable GPIO mode */
95 ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
96
97 /* save CTRL register */
98 sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL);
99 sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC);
100
101 /* TODO: setup speed? */
102 ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43);
103
104 if (spi->chip_select) {
105 int status = 0;
106
107 status = gpio_request(cdata->gpio, dev_name(&spi->dev));
108 if (status)
109 return status;
110
111 status = gpio_direction_output(cdata->gpio,
112 spi->mode & SPI_CS_HIGH);
113 if (status) {
114 gpio_free(cdata->gpio);
115 return status;
116 }
117 } else {
118 if (spi->mode & SPI_CS_HIGH)
119 sp->ioc_base |= AR71XX_SPI_IOC_CS0;
120 else
121 sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
122 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
123 }
124
125 return 0;
126}
127
128static void ath79_spi_cleanup_cs(struct spi_device *spi)
129{
130 struct ath79_spi *sp = ath79_spidev_to_sp(spi);
131
132 if (spi->chip_select) {
133 struct ath79_spi_controller_data *cdata = spi->controller_data;
134 gpio_free(cdata->gpio);
135 }
136
137 /* restore CTRL register */
138 ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl);
139 /* disable GPIO mode */
140 ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
141}
142
143static int ath79_spi_setup(struct spi_device *spi)
144{
145 int status = 0;
146
147 if (spi->bits_per_word > 32)
148 return -EINVAL;
149
150 if (!spi->controller_state) {
151 status = ath79_spi_setup_cs(spi);
152 if (status)
153 return status;
154 }
155
156 status = spi_bitbang_setup(spi);
157 if (status && !spi->controller_state)
158 ath79_spi_cleanup_cs(spi);
159
160 return status;
161}
162
163static void ath79_spi_cleanup(struct spi_device *spi)
164{
165 ath79_spi_cleanup_cs(spi);
166 spi_bitbang_cleanup(spi);
167}
168
169static u32 ath79_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
170 u32 word, u8 bits)
171{
172 struct ath79_spi *sp = ath79_spidev_to_sp(spi);
173 u32 ioc = sp->ioc_base;
174
175 /* clock starts at inactive polarity */
176 for (word <<= (32 - bits); likely(bits); bits--) {
177 u32 out;
178
179 if (word & (1 << 31))
180 out = ioc | AR71XX_SPI_IOC_DO;
181 else
182 out = ioc & ~AR71XX_SPI_IOC_DO;
183
184 /* setup MSB (to slave) on trailing edge */
185 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
186 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK);
187
188 word <<= 1;
189 }
190
191 return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
192}
193
194static __devinit int ath79_spi_probe(struct platform_device *pdev)
195{
196 struct spi_master *master;
197 struct ath79_spi *sp;
198 struct ath79_spi_platform_data *pdata;
199 struct resource *r;
200 int ret;
201
202 master = spi_alloc_master(&pdev->dev, sizeof(*sp));
203 if (master == NULL) {
204 dev_err(&pdev->dev, "failed to allocate spi master\n");
205 return -ENOMEM;
206 }
207
208 sp = spi_master_get_devdata(master);
209 platform_set_drvdata(pdev, sp);
210
211 pdata = pdev->dev.platform_data;
212
213 master->setup = ath79_spi_setup;
214 master->cleanup = ath79_spi_cleanup;
215 if (pdata) {
216 master->bus_num = pdata->bus_num;
217 master->num_chipselect = pdata->num_chipselect;
218 } else {
219 master->bus_num = -1;
220 master->num_chipselect = 1;
221 }
222
223 sp->bitbang.master = spi_master_get(master);
224 sp->bitbang.chipselect = ath79_spi_chipselect;
225 sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0;
226 sp->bitbang.setup_transfer = spi_bitbang_setup_transfer;
227 sp->bitbang.flags = SPI_CS_HIGH;
228
229 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
230 if (r == NULL) {
231 ret = -ENOENT;
232 goto err_put_master;
233 }
234
235 sp->base = ioremap(r->start, r->end - r->start + 1);
236 if (!sp->base) {
237 ret = -ENXIO;
238 goto err_put_master;
239 }
240
241 ret = spi_bitbang_start(&sp->bitbang);
242 if (ret)
243 goto err_unmap;
244
245 return 0;
246
247err_unmap:
248 iounmap(sp->base);
249err_put_master:
250 platform_set_drvdata(pdev, NULL);
251 spi_master_put(sp->bitbang.master);
252
253 return ret;
254}
255
256static __devexit int ath79_spi_remove(struct platform_device *pdev)
257{
258 struct ath79_spi *sp = platform_get_drvdata(pdev);
259
260 spi_bitbang_stop(&sp->bitbang);
261 iounmap(sp->base);
262 platform_set_drvdata(pdev, NULL);
263 spi_master_put(sp->bitbang.master);
264
265 return 0;
266}
267
268static struct platform_driver ath79_spi_driver = {
269 .probe = ath79_spi_probe,
270 .remove = __devexit_p(ath79_spi_remove),
271 .driver = {
272 .name = DRV_NAME,
273 .owner = THIS_MODULE,
274 },
275};
276
277static __init int ath79_spi_init(void)
278{
279 return platform_driver_register(&ath79_spi_driver);
280}
281module_init(ath79_spi_init);
282
283static __exit void ath79_spi_exit(void)
284{
285 platform_driver_unregister(&ath79_spi_driver);
286}
287module_exit(ath79_spi_exit);
288
289MODULE_DESCRIPTION("SPI controller driver for Atheros AR71XX/AR724X/AR913X");
290MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
291MODULE_LICENSE("GPL v2");
292MODULE_ALIAS("platform:" DRV_NAME);
diff --git a/drivers/spi/spi_sh_msiof.c b/drivers/spi/spi_sh_msiof.c
index d93b66743ba7..56f60c8ea0ab 100644
--- a/drivers/spi/spi_sh_msiof.c
+++ b/drivers/spi/spi_sh_msiof.c
@@ -635,7 +635,7 @@ static int sh_msiof_spi_remove(struct platform_device *pdev)
635 ret = spi_bitbang_stop(&p->bitbang); 635 ret = spi_bitbang_stop(&p->bitbang);
636 if (!ret) { 636 if (!ret) {
637 pm_runtime_disable(&pdev->dev); 637 pm_runtime_disable(&pdev->dev);
638 free_irq(platform_get_irq(pdev, 0), sh_msiof_spi_irq); 638 free_irq(platform_get_irq(pdev, 0), p);
639 iounmap(p->mapbase); 639 iounmap(p->mapbase);
640 clk_put(p->clk); 640 clk_put(p->clk);
641 spi_master_put(p->bitbang.master); 641 spi_master_put(p->bitbang.master);
diff --git a/drivers/staging/bcm/Qos.c b/drivers/staging/bcm/Qos.c
index 8ce4536e6e28..feade9451b2e 100644
--- a/drivers/staging/bcm/Qos.c
+++ b/drivers/staging/bcm/Qos.c
@@ -359,12 +359,11 @@ static VOID PruneQueue(PMINI_ADAPTER Adapter, INT iIndex)
359 359
360 if(PacketToDrop) 360 if(PacketToDrop)
361 { 361 {
362 struct netdev_queue *txq = netdev_get_tx_queue(Adapter->dev, iIndex);
363 if (netif_msg_tx_err(Adapter)) 362 if (netif_msg_tx_err(Adapter))
364 pr_info(PFX "%s: tx queue %d overlimit\n", 363 pr_info(PFX "%s: tx queue %d overlimit\n",
365 Adapter->dev->name, iIndex); 364 Adapter->dev->name, iIndex);
366 365
367 txq->tx_dropped++; 366 netstats->tx_dropped++;
368 367
369 DEQUEUEPACKET(Adapter->PackInfo[iIndex].FirstTxQueue, 368 DEQUEUEPACKET(Adapter->PackInfo[iIndex].FirstTxQueue,
370 Adapter->PackInfo[iIndex].LastTxQueue); 369 Adapter->PackInfo[iIndex].LastTxQueue);
@@ -404,7 +403,7 @@ VOID flush_all_queues(PMINI_ADAPTER Adapter)
404// down(&Adapter->data_packet_queue_lock); 403// down(&Adapter->data_packet_queue_lock);
405 for(iQIndex=LowPriority; iQIndex<HiPriority; iQIndex++) 404 for(iQIndex=LowPriority; iQIndex<HiPriority; iQIndex++)
406 { 405 {
407 struct netdev_queue *txq = netdev_get_tx_queue(Adapter->dev, iQIndex); 406 struct net_device_stats *netstats = &Adapter->dev->stats;
408 407
409 spin_lock_bh(&Adapter->PackInfo[iQIndex].SFQueueLock); 408 spin_lock_bh(&Adapter->PackInfo[iQIndex].SFQueueLock);
410 while(Adapter->PackInfo[iQIndex].FirstTxQueue) 409 while(Adapter->PackInfo[iQIndex].FirstTxQueue)
@@ -413,7 +412,7 @@ VOID flush_all_queues(PMINI_ADAPTER Adapter)
413 if(PacketToDrop) 412 if(PacketToDrop)
414 { 413 {
415 uiTotalPacketLength = PacketToDrop->len; 414 uiTotalPacketLength = PacketToDrop->len;
416 txq->tx_dropped++; 415 netstats->tx_dropped++;
417 } 416 }
418 else 417 else
419 uiTotalPacketLength = 0; 418 uiTotalPacketLength = 0;
diff --git a/drivers/staging/bcm/Transmit.c b/drivers/staging/bcm/Transmit.c
index 0f7000960d50..d5e4a7404f71 100644
--- a/drivers/staging/bcm/Transmit.c
+++ b/drivers/staging/bcm/Transmit.c
@@ -157,11 +157,11 @@ INT SetupNextSend(PMINI_ADAPTER Adapter, struct sk_buff *Packet, USHORT Vcid)
157 } 157 }
158 else 158 else
159 { 159 {
160 struct netdev_queue *txq = netdev_get_tx_queue(Adapter->dev, QueueIndex); 160 struct net_device_stats *netstats = &Adapter->dev->stats;
161 Adapter->PackInfo[QueueIndex].uiTotalTxBytes += Leader.PLength; 161 Adapter->PackInfo[QueueIndex].uiTotalTxBytes += Leader.PLength;
162 162
163 txq->tx_bytes += Leader.PLength; 163 netstats->tx_bytes += Leader.PLength;
164 ++txq->tx_packets; 164 ++netstats->tx_packets;
165 165
166 Adapter->PackInfo[QueueIndex].uiCurrentTokenCount -= Leader.PLength << 3; 166 Adapter->PackInfo[QueueIndex].uiCurrentTokenCount -= Leader.PLength << 3;
167 Adapter->PackInfo[QueueIndex].uiSentBytes += (Packet->len); 167 Adapter->PackInfo[QueueIndex].uiSentBytes += (Packet->len);
diff --git a/drivers/staging/smbfs/dir.c b/drivers/staging/smbfs/dir.c
index 87a3a9bd5842..f204d33910ec 100644
--- a/drivers/staging/smbfs/dir.c
+++ b/drivers/staging/smbfs/dir.c
@@ -283,7 +283,7 @@ static int smb_compare_dentry(const struct dentry *,
283 unsigned int, const char *, const struct qstr *); 283 unsigned int, const char *, const struct qstr *);
284static int smb_delete_dentry(const struct dentry *); 284static int smb_delete_dentry(const struct dentry *);
285 285
286static const struct dentry_operations smbfs_dentry_operations = 286const struct dentry_operations smbfs_dentry_operations =
287{ 287{
288 .d_revalidate = smb_lookup_validate, 288 .d_revalidate = smb_lookup_validate,
289 .d_hash = smb_hash_dentry, 289 .d_hash = smb_hash_dentry,
@@ -291,7 +291,7 @@ static const struct dentry_operations smbfs_dentry_operations =
291 .d_delete = smb_delete_dentry, 291 .d_delete = smb_delete_dentry,
292}; 292};
293 293
294static const struct dentry_operations smbfs_dentry_operations_case = 294const struct dentry_operations smbfs_dentry_operations_case =
295{ 295{
296 .d_revalidate = smb_lookup_validate, 296 .d_revalidate = smb_lookup_validate,
297 .d_delete = smb_delete_dentry, 297 .d_delete = smb_delete_dentry,