aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ide/pci/aec62xx.c29
-rw-r--r--drivers/ide/pci/alim15x3.c4
-rw-r--r--drivers/ide/pci/amd74xx.c86
-rw-r--r--drivers/ide/pci/atiixp.c11
-rw-r--r--drivers/ide/pci/cmd64x.c21
-rw-r--r--drivers/ide/pci/cs5520.c24
-rw-r--r--drivers/ide/pci/cs5530.c4
-rw-r--r--drivers/ide/pci/cs5535.c4
-rw-r--r--drivers/ide/pci/cy82c693.c4
-rw-r--r--drivers/ide/pci/generic.c65
-rw-r--r--drivers/ide/pci/hpt34x.c10
-rw-r--r--drivers/ide/pci/hpt366.c65
-rw-r--r--drivers/ide/pci/it8213.c4
-rw-r--r--drivers/ide/pci/it821x.c12
-rw-r--r--drivers/ide/pci/jmicron.c4
-rw-r--r--drivers/ide/pci/ns87415.c4
-rw-r--r--drivers/ide/pci/opti621.c4
-rw-r--r--drivers/ide/pci/pdc202xx_new.c38
-rw-r--r--drivers/ide/pci/pdc202xx_old.c30
-rw-r--r--drivers/ide/pci/piix.c106
-rw-r--r--drivers/ide/pci/rz1000.c4
-rw-r--r--drivers/ide/pci/sc1200.c4
-rw-r--r--drivers/ide/pci/serverworks.c26
-rw-r--r--drivers/ide/pci/siimage.c17
-rw-r--r--drivers/ide/pci/sis5513.c14
-rw-r--r--drivers/ide/pci/sl82c105.c6
-rw-r--r--drivers/ide/pci/slc90e66.c4
-rw-r--r--drivers/ide/pci/tc86c001.c4
-rw-r--r--drivers/ide/pci/triflex.c4
-rw-r--r--drivers/ide/pci/trm290.c8
-rw-r--r--drivers/ide/pci/via82cxxx.c15
31 files changed, 308 insertions, 327 deletions
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index 253299961a14..f6dc6c20f3af 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -13,6 +13,8 @@
13 13
14#include <asm/io.h> 14#include <asm/io.h>
15 15
16#define DRV_NAME "aec62xx"
17
16struct chipset_bus_clock_list_entry { 18struct chipset_bus_clock_list_entry {
17 u8 xfer_speed; 19 u8 xfer_speed;
18 u8 chipset_settings; 20 u8 chipset_settings;
@@ -180,8 +182,8 @@ static const struct ide_port_ops atp86x_port_ops = {
180}; 182};
181 183
182static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { 184static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
183 { /* 0 */ 185 { /* 0: AEC6210 */
184 .name = "AEC6210", 186 .name = DRV_NAME,
185 .init_chipset = init_chipset_aec62xx, 187 .init_chipset = init_chipset_aec62xx,
186 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 188 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
187 .port_ops = &atp850_port_ops, 189 .port_ops = &atp850_port_ops,
@@ -192,8 +194,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
192 .pio_mask = ATA_PIO4, 194 .pio_mask = ATA_PIO4,
193 .mwdma_mask = ATA_MWDMA2, 195 .mwdma_mask = ATA_MWDMA2,
194 .udma_mask = ATA_UDMA2, 196 .udma_mask = ATA_UDMA2,
195 },{ /* 1 */ 197 },
196 .name = "AEC6260", 198 { /* 1: AEC6260 */
199 .name = DRV_NAME,
197 .init_chipset = init_chipset_aec62xx, 200 .init_chipset = init_chipset_aec62xx,
198 .port_ops = &atp86x_port_ops, 201 .port_ops = &atp86x_port_ops,
199 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_NO_AUTODMA | 202 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_NO_AUTODMA |
@@ -201,8 +204,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
201 .pio_mask = ATA_PIO4, 204 .pio_mask = ATA_PIO4,
202 .mwdma_mask = ATA_MWDMA2, 205 .mwdma_mask = ATA_MWDMA2,
203 .udma_mask = ATA_UDMA4, 206 .udma_mask = ATA_UDMA4,
204 },{ /* 2 */ 207 },
205 .name = "AEC6260R", 208 { /* 2: AEC6260R */
209 .name = DRV_NAME,
206 .init_chipset = init_chipset_aec62xx, 210 .init_chipset = init_chipset_aec62xx,
207 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 211 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
208 .port_ops = &atp86x_port_ops, 212 .port_ops = &atp86x_port_ops,
@@ -211,8 +215,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
211 .pio_mask = ATA_PIO4, 215 .pio_mask = ATA_PIO4,
212 .mwdma_mask = ATA_MWDMA2, 216 .mwdma_mask = ATA_MWDMA2,
213 .udma_mask = ATA_UDMA4, 217 .udma_mask = ATA_UDMA4,
214 },{ /* 3 */ 218 },
215 .name = "AEC6280", 219 { /* 3: AEC6280 */
220 .name = DRV_NAME,
216 .init_chipset = init_chipset_aec62xx, 221 .init_chipset = init_chipset_aec62xx,
217 .port_ops = &atp86x_port_ops, 222 .port_ops = &atp86x_port_ops,
218 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | 223 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
@@ -220,8 +225,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
220 .pio_mask = ATA_PIO4, 225 .pio_mask = ATA_PIO4,
221 .mwdma_mask = ATA_MWDMA2, 226 .mwdma_mask = ATA_MWDMA2,
222 .udma_mask = ATA_UDMA5, 227 .udma_mask = ATA_UDMA5,
223 },{ /* 4 */ 228 },
224 .name = "AEC6280R", 229 { /* 4: AEC6280R */
230 .name = DRV_NAME,
225 .init_chipset = init_chipset_aec62xx, 231 .init_chipset = init_chipset_aec62xx,
226 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 232 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
227 .port_ops = &atp86x_port_ops, 233 .port_ops = &atp86x_port_ops,
@@ -268,7 +274,8 @@ static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_devi
268 unsigned long dma_base = pci_resource_start(dev, 4); 274 unsigned long dma_base = pci_resource_start(dev, 4);
269 275
270 if (inb(dma_base + 2) & 0x10) { 276 if (inb(dma_base + 2) & 0x10) {
271 d.name = (idx == 4) ? "AEC6880R" : "AEC6880"; 277 printk(KERN_INFO DRV_NAME " %s: AEC6880%s card detected"
278 "\n", pci_name(dev), (idx == 4) ? "R" : "");
272 d.udma_mask = ATA_UDMA6; 279 d.udma_mask = ATA_UDMA6;
273 } 280 }
274 } 281 }
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index ac171502b997..a099c4dd599d 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -38,6 +38,8 @@
38 38
39#include <asm/io.h> 39#include <asm/io.h>
40 40
41#define DRV_NAME "alim15x3"
42
41/* 43/*
42 * Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking 44 * Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking
43 * (this is DANGEROUS and could result in data corruption). 45 * (this is DANGEROUS and could result in data corruption).
@@ -515,7 +517,7 @@ static const struct ide_dma_ops ali_dma_ops = {
515}; 517};
516 518
517static const struct ide_port_info ali15x3_chipset __devinitdata = { 519static const struct ide_port_info ali15x3_chipset __devinitdata = {
518 .name = "ALI15X3", 520 .name = DRV_NAME,
519 .init_chipset = init_chipset_ali15x3, 521 .init_chipset = init_chipset_ali15x3,
520 .init_hwif = init_hwif_ali15x3, 522 .init_hwif = init_hwif_ali15x3,
521 .init_dma = init_dma_ali15x3, 523 .init_dma = init_dma_ali15x3,
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index 2b118f80fab6..cbf78edfe00b 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -21,6 +21,8 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/ide.h> 22#include <linux/ide.h>
23 23
24#define DRV_NAME "amd74xx"
25
24enum { 26enum {
25 AMD_IDE_CONFIG = 0x41, 27 AMD_IDE_CONFIG = 0x41,
26 AMD_CABLE_DETECT = 0x42, 28 AMD_CABLE_DETECT = 0x42,
@@ -204,9 +206,9 @@ static const struct ide_port_ops amd_port_ops = {
204 IDE_HFLAG_IO_32BIT | \ 206 IDE_HFLAG_IO_32BIT | \
205 IDE_HFLAG_UNMASK_IRQS) 207 IDE_HFLAG_UNMASK_IRQS)
206 208
207#define DECLARE_AMD_DEV(name_str, swdma, udma) \ 209#define DECLARE_AMD_DEV(swdma, udma) \
208 { \ 210 { \
209 .name = name_str, \ 211 .name = DRV_NAME, \
210 .init_chipset = init_chipset_amd74xx, \ 212 .init_chipset = init_chipset_amd74xx, \
211 .init_hwif = init_hwif_amd74xx, \ 213 .init_hwif = init_hwif_amd74xx, \
212 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \ 214 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \
@@ -218,9 +220,9 @@ static const struct ide_port_ops amd_port_ops = {
218 .udma_mask = udma, \ 220 .udma_mask = udma, \
219 } 221 }
220 222
221#define DECLARE_NV_DEV(name_str, udma) \ 223#define DECLARE_NV_DEV(udma) \
222 { \ 224 { \
223 .name = name_str, \ 225 .name = DRV_NAME, \
224 .init_chipset = init_chipset_amd74xx, \ 226 .init_chipset = init_chipset_amd74xx, \
225 .init_hwif = init_hwif_amd74xx, \ 227 .init_hwif = init_hwif_amd74xx, \
226 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \ 228 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \
@@ -233,31 +235,15 @@ static const struct ide_port_ops amd_port_ops = {
233 } 235 }
234 236
235static const struct ide_port_info amd74xx_chipsets[] __devinitdata = { 237static const struct ide_port_info amd74xx_chipsets[] __devinitdata = {
236 /* 0 */ DECLARE_AMD_DEV("AMD7401", 0x00, ATA_UDMA2), 238 /* 0: AMD7401 */ DECLARE_AMD_DEV(0x00, ATA_UDMA2),
237 /* 1 */ DECLARE_AMD_DEV("AMD7409", ATA_SWDMA2, ATA_UDMA4), 239 /* 1: AMD7409 */ DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA4),
238 /* 2 */ DECLARE_AMD_DEV("AMD7411", ATA_SWDMA2, ATA_UDMA5), 240 /* 2: AMD7411/7441 */ DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA5),
239 /* 3 */ DECLARE_AMD_DEV("AMD7441", ATA_SWDMA2, ATA_UDMA5), 241 /* 3: AMD8111 */ DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA6),
240 /* 4 */ DECLARE_AMD_DEV("AMD8111", ATA_SWDMA2, ATA_UDMA6), 242
241 243 /* 4: NFORCE */ DECLARE_NV_DEV(ATA_UDMA5),
242 /* 5 */ DECLARE_NV_DEV("NFORCE", ATA_UDMA5), 244 /* 5: >= NFORCE2 */ DECLARE_NV_DEV(ATA_UDMA6),
243 /* 6 */ DECLARE_NV_DEV("NFORCE2", ATA_UDMA6), 245
244 /* 7 */ DECLARE_NV_DEV("NFORCE2-U400R", ATA_UDMA6), 246 /* 6: AMD5536 */ DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA5),
245 /* 8 */ DECLARE_NV_DEV("NFORCE2-U400R-SATA", ATA_UDMA6),
246 /* 9 */ DECLARE_NV_DEV("NFORCE3-150", ATA_UDMA6),
247 /* 10 */ DECLARE_NV_DEV("NFORCE3-250", ATA_UDMA6),
248 /* 11 */ DECLARE_NV_DEV("NFORCE3-250-SATA", ATA_UDMA6),
249 /* 12 */ DECLARE_NV_DEV("NFORCE3-250-SATA2", ATA_UDMA6),
250 /* 13 */ DECLARE_NV_DEV("NFORCE-CK804", ATA_UDMA6),
251 /* 14 */ DECLARE_NV_DEV("NFORCE-MCP04", ATA_UDMA6),
252 /* 15 */ DECLARE_NV_DEV("NFORCE-MCP51", ATA_UDMA6),
253 /* 16 */ DECLARE_NV_DEV("NFORCE-MCP55", ATA_UDMA6),
254 /* 17 */ DECLARE_NV_DEV("NFORCE-MCP61", ATA_UDMA6),
255 /* 18 */ DECLARE_NV_DEV("NFORCE-MCP65", ATA_UDMA6),
256 /* 19 */ DECLARE_NV_DEV("NFORCE-MCP67", ATA_UDMA6),
257 /* 20 */ DECLARE_NV_DEV("NFORCE-MCP73", ATA_UDMA6),
258 /* 21 */ DECLARE_NV_DEV("NFORCE-MCP77", ATA_UDMA6),
259
260 /* 22 */ DECLARE_AMD_DEV("AMD5536", ATA_SWDMA2, ATA_UDMA5),
261}; 247};
262 248
263static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id) 249static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id)
@@ -274,7 +260,7 @@ static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_
274 if (dev->revision <= 7) 260 if (dev->revision <= 7)
275 d.swdma_mask = 0; 261 d.swdma_mask = 0;
276 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; 262 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;
277 } else if (idx == 4) { 263 } else if (idx == 3) {
278 if (dev->subsystem_vendor == PCI_VENDOR_ID_AMD && 264 if (dev->subsystem_vendor == PCI_VENDOR_ID_AMD &&
279 dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE) 265 dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE)
280 d.udma_mask = ATA_UDMA5; 266 d.udma_mask = ATA_UDMA5;
@@ -308,30 +294,30 @@ static const struct pci_device_id amd74xx_pci_tbl[] = {
308 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_COBRA_7401), 0 }, 294 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_COBRA_7401), 0 },
309 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7409), 1 }, 295 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7409), 1 },
310 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7411), 2 }, 296 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7411), 2 },
311 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_OPUS_7441), 3 }, 297 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_OPUS_7441), 2 },
312 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_8111_IDE), 4 }, 298 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_8111_IDE), 3 },
313 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE), 5 }, 299 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE), 4 },
314 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE), 6 }, 300 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE), 5 },
315 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE), 7 }, 301 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE), 5 },
316#ifdef CONFIG_BLK_DEV_IDE_SATA 302#ifdef CONFIG_BLK_DEV_IDE_SATA
317 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA), 8 }, 303 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA), 5 },
318#endif 304#endif
319 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE), 9 }, 305 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE), 5 },
320 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE), 10 }, 306 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE), 5 },
321#ifdef CONFIG_BLK_DEV_IDE_SATA 307#ifdef CONFIG_BLK_DEV_IDE_SATA
322 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA), 11 }, 308 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA), 5 },
323 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2), 12 }, 309 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2), 5 },
324#endif 310#endif
325 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE), 13 }, 311 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE), 5 },
326 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE), 14 }, 312 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE), 5 },
327 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE), 15 }, 313 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE), 5 },
328 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE), 16 }, 314 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE), 5 },
329 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE), 17 }, 315 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE), 5 },
330 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE), 18 }, 316 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE), 5 },
331 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE), 19 }, 317 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE), 5 },
332 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE), 20 }, 318 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE), 5 },
333 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE), 21 }, 319 { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE), 5 },
334 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), 22 }, 320 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), 6 },
335 { 0, }, 321 { 0, },
336}; 322};
337MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl); 323MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl);
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c
index 4c49c1ba6182..332f08f43b56 100644
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -11,6 +11,8 @@
11#include <linux/ide.h> 11#include <linux/ide.h>
12#include <linux/init.h> 12#include <linux/init.h>
13 13
14#define DRV_NAME "atiixp"
15
14#define ATIIXP_IDE_PIO_TIMING 0x40 16#define ATIIXP_IDE_PIO_TIMING 0x40
15#define ATIIXP_IDE_MDMA_TIMING 0x44 17#define ATIIXP_IDE_MDMA_TIMING 0x44
16#define ATIIXP_IDE_PIO_CONTROL 0x48 18#define ATIIXP_IDE_PIO_CONTROL 0x48
@@ -137,16 +139,17 @@ static const struct ide_port_ops atiixp_port_ops = {
137}; 139};
138 140
139static const struct ide_port_info atiixp_pci_info[] __devinitdata = { 141static const struct ide_port_info atiixp_pci_info[] __devinitdata = {
140 { /* 0 */ 142 { /* 0: IXP200/300/400/700 */
141 .name = "ATIIXP", 143 .name = DRV_NAME,
142 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}}, 144 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
143 .port_ops = &atiixp_port_ops, 145 .port_ops = &atiixp_port_ops,
144 .host_flags = IDE_HFLAG_LEGACY_IRQS, 146 .host_flags = IDE_HFLAG_LEGACY_IRQS,
145 .pio_mask = ATA_PIO4, 147 .pio_mask = ATA_PIO4,
146 .mwdma_mask = ATA_MWDMA2, 148 .mwdma_mask = ATA_MWDMA2,
147 .udma_mask = ATA_UDMA5, 149 .udma_mask = ATA_UDMA5,
148 },{ /* 1 */ 150 },
149 .name = "SB600_PATA", 151 { /* 1: IXP600 */
152 .name = DRV_NAME,
150 .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}}, 153 .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
151 .port_ops = &atiixp_port_ops, 154 .port_ops = &atiixp_port_ops,
152 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS, 155 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS,
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 0a4d194bc35f..3d84debaf81f 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -19,6 +19,8 @@
19 19
20#include <asm/io.h> 20#include <asm/io.h>
21 21
22#define DRV_NAME "cmd64x"
23
22#define CMD_DEBUG 0 24#define CMD_DEBUG 0
23 25
24#if CMD_DEBUG 26#if CMD_DEBUG
@@ -407,8 +409,8 @@ static const struct ide_dma_ops cmd648_dma_ops = {
407}; 409};
408 410
409static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { 411static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
410 { /* 0 */ 412 { /* 0: CMD643 */
411 .name = "CMD643", 413 .name = DRV_NAME,
412 .init_chipset = init_chipset_cmd64x, 414 .init_chipset = init_chipset_cmd64x,
413 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, 415 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
414 .port_ops = &cmd64x_port_ops, 416 .port_ops = &cmd64x_port_ops,
@@ -418,8 +420,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
418 .pio_mask = ATA_PIO5, 420 .pio_mask = ATA_PIO5,
419 .mwdma_mask = ATA_MWDMA2, 421 .mwdma_mask = ATA_MWDMA2,
420 .udma_mask = 0x00, /* no udma */ 422 .udma_mask = 0x00, /* no udma */
421 },{ /* 1 */ 423 },
422 .name = "CMD646", 424 { /* 1: CMD646 */
425 .name = DRV_NAME,
423 .init_chipset = init_chipset_cmd64x, 426 .init_chipset = init_chipset_cmd64x,
424 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 427 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
425 .chipset = ide_cmd646, 428 .chipset = ide_cmd646,
@@ -429,8 +432,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
429 .pio_mask = ATA_PIO5, 432 .pio_mask = ATA_PIO5,
430 .mwdma_mask = ATA_MWDMA2, 433 .mwdma_mask = ATA_MWDMA2,
431 .udma_mask = ATA_UDMA2, 434 .udma_mask = ATA_UDMA2,
432 },{ /* 2 */ 435 },
433 .name = "CMD648", 436 { /* 2: CMD648 */
437 .name = DRV_NAME,
434 .init_chipset = init_chipset_cmd64x, 438 .init_chipset = init_chipset_cmd64x,
435 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 439 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
436 .port_ops = &cmd64x_port_ops, 440 .port_ops = &cmd64x_port_ops,
@@ -439,8 +443,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
439 .pio_mask = ATA_PIO5, 443 .pio_mask = ATA_PIO5,
440 .mwdma_mask = ATA_MWDMA2, 444 .mwdma_mask = ATA_MWDMA2,
441 .udma_mask = ATA_UDMA4, 445 .udma_mask = ATA_UDMA4,
442 },{ /* 3 */ 446 },
443 .name = "CMD649", 447 { /* 3: CMD649 */
448 .name = DRV_NAME,
444 .init_chipset = init_chipset_cmd64x, 449 .init_chipset = init_chipset_cmd64x,
445 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 450 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
446 .port_ops = &cmd64x_port_ops, 451 .port_ops = &cmd64x_port_ops,
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index b03d8ae947e6..c0364b287f17 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -41,6 +41,8 @@
41#include <linux/ide.h> 41#include <linux/ide.h>
42#include <linux/dma-mapping.h> 42#include <linux/dma-mapping.h>
43 43
44#define DRV_NAME "cs5520"
45
44struct pio_clocks 46struct pio_clocks
45{ 47{
46 int address; 48 int address;
@@ -92,18 +94,11 @@ static const struct ide_port_ops cs5520_port_ops = {
92 .set_dma_mode = cs5520_set_dma_mode, 94 .set_dma_mode = cs5520_set_dma_mode,
93}; 95};
94 96
95#define DECLARE_CS_DEV(name_str) \ 97static const struct ide_port_info cyrix_chipset __devinitdata = {
96 { \ 98 .name = DRV_NAME,
97 .name = name_str, \ 99 .port_ops = &cs5520_port_ops,
98 .port_ops = &cs5520_port_ops, \ 100 .host_flags = IDE_HFLAG_ISA_PORTS | IDE_HFLAG_CS5520,
99 .host_flags = IDE_HFLAG_ISA_PORTS | \ 101 .pio_mask = ATA_PIO4,
100 IDE_HFLAG_CS5520, \
101 .pio_mask = ATA_PIO4, \
102 }
103
104static const struct ide_port_info cyrix_chipsets[] __devinitdata = {
105 /* 0 */ DECLARE_CS_DEV("Cyrix 5510"),
106 /* 1 */ DECLARE_CS_DEV("Cyrix 5520")
107}; 102};
108 103
109/* 104/*
@@ -114,7 +109,7 @@ static const struct ide_port_info cyrix_chipsets[] __devinitdata = {
114 109
115static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id) 110static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id)
116{ 111{
117 const struct ide_port_info *d = &cyrix_chipsets[id->driver_data]; 112 const struct ide_port_info *d = &cyrix_chipset;
118 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL }; 113 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
119 114
120 ide_setup_pci_noise(dev, d); 115 ide_setup_pci_noise(dev, d);
@@ -128,7 +123,8 @@ static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_devic
128 } 123 }
129 pci_set_master(dev); 124 pci_set_master(dev);
130 if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) { 125 if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) {
131 printk(KERN_WARNING "cs5520: No suitable DMA available.\n"); 126 printk(KERN_WARNING "%s: No suitable DMA available.\n",
127 d->name);
132 return -ENODEV; 128 return -ENODEV;
133 } 129 }
134 130
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
index dff345c763e5..5543c8677a5a 100644
--- a/drivers/ide/pci/cs5530.c
+++ b/drivers/ide/pci/cs5530.c
@@ -22,6 +22,8 @@
22 22
23#include <asm/io.h> 23#include <asm/io.h>
24 24
25#define DRV_NAME "cs5530"
26
25/* 27/*
26 * Here are the standard PIO mode 0-4 timings for each "format". 28 * Here are the standard PIO mode 0-4 timings for each "format".
27 * Format-0 uses fast data reg timings, with slower command reg timings. 29 * Format-0 uses fast data reg timings, with slower command reg timings.
@@ -243,7 +245,7 @@ static const struct ide_port_ops cs5530_port_ops = {
243}; 245};
244 246
245static const struct ide_port_info cs5530_chipset __devinitdata = { 247static const struct ide_port_info cs5530_chipset __devinitdata = {
246 .name = "CS5530", 248 .name = DRV_NAME,
247 .init_chipset = init_chipset_cs5530, 249 .init_chipset = init_chipset_cs5530,
248 .init_hwif = init_hwif_cs5530, 250 .init_hwif = init_hwif_cs5530,
249 .port_ops = &cs5530_port_ops, 251 .port_ops = &cs5530_port_ops,
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c
index a73001391536..f7b50cdeefa6 100644
--- a/drivers/ide/pci/cs5535.c
+++ b/drivers/ide/pci/cs5535.c
@@ -26,6 +26,8 @@
26#include <linux/pci.h> 26#include <linux/pci.h>
27#include <linux/ide.h> 27#include <linux/ide.h>
28 28
29#define DRV_NAME "cs5535"
30
29#define MSR_ATAC_BASE 0x51300000 31#define MSR_ATAC_BASE 0x51300000
30#define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0) 32#define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0)
31#define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01) 33#define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01)
@@ -169,7 +171,7 @@ static const struct ide_port_ops cs5535_port_ops = {
169}; 171};
170 172
171static const struct ide_port_info cs5535_chipset __devinitdata = { 173static const struct ide_port_info cs5535_chipset __devinitdata = {
172 .name = "CS5535", 174 .name = DRV_NAME,
173 .port_ops = &cs5535_port_ops, 175 .port_ops = &cs5535_port_ops,
174 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE, 176 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE,
175 .pio_mask = ATA_PIO4, 177 .pio_mask = ATA_PIO4,
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
index 04f268866b6d..41c7f3351eb6 100644
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -48,6 +48,8 @@
48 48
49#include <asm/io.h> 49#include <asm/io.h>
50 50
51#define DRV_NAME "cy82c693"
52
51/* the current version */ 53/* the current version */
52#define CY82_VERSION "CY82C693U driver v0.34 99-13-12 Andreas S. Krebs (akrebs@altavista.net)" 54#define CY82_VERSION "CY82C693U driver v0.34 99-13-12 Andreas S. Krebs (akrebs@altavista.net)"
53 55
@@ -398,7 +400,7 @@ static const struct ide_port_ops cy82c693_port_ops = {
398}; 400};
399 401
400static const struct ide_port_info cy82c693_chipset __devinitdata = { 402static const struct ide_port_info cy82c693_chipset __devinitdata = {
401 .name = "CY82C693", 403 .name = DRV_NAME,
402 .init_chipset = init_chipset_cy82c693, 404 .init_chipset = init_chipset_cy82c693,
403 .init_iops = init_iops_cy82c693, 405 .init_iops = init_iops_cy82c693,
404 .port_ops = &cy82c693_port_ops, 406 .port_ops = &cy82c693_port_ops,
diff --git a/drivers/ide/pci/generic.c b/drivers/ide/pci/generic.c
index e034e21af7fe..b07d4f4273b3 100644
--- a/drivers/ide/pci/generic.c
+++ b/drivers/ide/pci/generic.c
@@ -27,6 +27,8 @@
27#include <linux/ide.h> 27#include <linux/ide.h>
28#include <linux/init.h> 28#include <linux/init.h>
29 29
30#define DRV_NAME "ide_pci_generic"
31
30static int ide_generic_all; /* Set to claim all devices */ 32static int ide_generic_all; /* Set to claim all devices */
31 33
32module_param_named(all_generic_ide, ide_generic_all, bool, 0444); 34module_param_named(all_generic_ide, ide_generic_all, bool, 0444);
@@ -34,9 +36,9 @@ MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE st
34 36
35#define IDE_HFLAGS_UMC (IDE_HFLAG_NO_DMA | IDE_HFLAG_FORCE_LEGACY_IRQS) 37#define IDE_HFLAGS_UMC (IDE_HFLAG_NO_DMA | IDE_HFLAG_FORCE_LEGACY_IRQS)
36 38
37#define DECLARE_GENERIC_PCI_DEV(name_str, extra_flags) \ 39#define DECLARE_GENERIC_PCI_DEV(extra_flags) \
38 { \ 40 { \
39 .name = name_str, \ 41 .name = DRV_NAME, \
40 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \ 42 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \
41 extra_flags, \ 43 extra_flags, \
42 .swdma_mask = ATA_SWDMA2, \ 44 .swdma_mask = ATA_SWDMA2, \
@@ -45,10 +47,11 @@ MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE st
45 } 47 }
46 48
47static const struct ide_port_info generic_chipsets[] __devinitdata = { 49static const struct ide_port_info generic_chipsets[] __devinitdata = {
48 /* 0 */ DECLARE_GENERIC_PCI_DEV("Unknown", 0), 50 /* 0: Unknown */
51 DECLARE_GENERIC_PCI_DEV(0),
49 52
50 { /* 1 */ 53 { /* 1: NS87410 */
51 .name = "NS87410", 54 .name = DRV_NAME,
52 .enablebits = { {0x43, 0x08, 0x08}, {0x47, 0x08, 0x08} }, 55 .enablebits = { {0x43, 0x08, 0x08}, {0x47, 0x08, 0x08} },
53 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 56 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
54 .swdma_mask = ATA_SWDMA2, 57 .swdma_mask = ATA_SWDMA2,
@@ -56,17 +59,15 @@ static const struct ide_port_info generic_chipsets[] __devinitdata = {
56 .udma_mask = ATA_UDMA6, 59 .udma_mask = ATA_UDMA6,
57 }, 60 },
58 61
59 /* 2 */ DECLARE_GENERIC_PCI_DEV("SAMURAI", 0), 62 /* 2: SAMURAI / HT6565 / HINT_IDE */
60 /* 3 */ DECLARE_GENERIC_PCI_DEV("HT6565", 0), 63 DECLARE_GENERIC_PCI_DEV(0),
61 /* 4 */ DECLARE_GENERIC_PCI_DEV("UM8673F", IDE_HFLAGS_UMC), 64 /* 3: UM8673F / UM8886A / UM8886BF */
62 /* 5 */ DECLARE_GENERIC_PCI_DEV("UM8886A", IDE_HFLAGS_UMC), 65 DECLARE_GENERIC_PCI_DEV(IDE_HFLAGS_UMC),
63 /* 6 */ DECLARE_GENERIC_PCI_DEV("UM8886BF", IDE_HFLAGS_UMC), 66 /* 4: VIA_IDE / OPTI621V / Piccolo010{2,3,5} */
64 /* 7 */ DECLARE_GENERIC_PCI_DEV("HINT_IDE", 0), 67 DECLARE_GENERIC_PCI_DEV(IDE_HFLAG_NO_AUTODMA),
65 /* 8 */ DECLARE_GENERIC_PCI_DEV("VIA_IDE", IDE_HFLAG_NO_AUTODMA), 68
66 /* 9 */ DECLARE_GENERIC_PCI_DEV("OPTI621V", IDE_HFLAG_NO_AUTODMA), 69 { /* 5: VIA8237SATA */
67 70 .name = DRV_NAME,
68 { /* 10 */
69 .name = "VIA8237SATA",
70 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | 71 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
71 IDE_HFLAG_OFF_BOARD, 72 IDE_HFLAG_OFF_BOARD,
72 .swdma_mask = ATA_SWDMA2, 73 .swdma_mask = ATA_SWDMA2,
@@ -74,12 +75,8 @@ static const struct ide_port_info generic_chipsets[] __devinitdata = {
74 .udma_mask = ATA_UDMA6, 75 .udma_mask = ATA_UDMA6,
75 }, 76 },
76 77
77 /* 11 */ DECLARE_GENERIC_PCI_DEV("Piccolo0102", IDE_HFLAG_NO_AUTODMA), 78 { /* 6: Revolution */
78 /* 12 */ DECLARE_GENERIC_PCI_DEV("Piccolo0103", IDE_HFLAG_NO_AUTODMA), 79 .name = DRV_NAME,
79 /* 13 */ DECLARE_GENERIC_PCI_DEV("Piccolo0105", IDE_HFLAG_NO_AUTODMA),
80
81 { /* 14 */
82 .name = "Revolution",
83 .host_flags = IDE_HFLAG_CLEAR_SIMPLEX | 80 .host_flags = IDE_HFLAG_CLEAR_SIMPLEX |
84 IDE_HFLAG_TRUST_BIOS_FOR_DMA | 81 IDE_HFLAG_TRUST_BIOS_FOR_DMA |
85 IDE_HFLAG_OFF_BOARD, 82 IDE_HFLAG_OFF_BOARD,
@@ -147,20 +144,20 @@ out:
147static const struct pci_device_id generic_pci_tbl[] = { 144static const struct pci_device_id generic_pci_tbl[] = {
148 { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87410), 1 }, 145 { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87410), 1 },
149 { PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), 2 }, 146 { PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), 2 },
150 { PCI_VDEVICE(HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), 3 }, 147 { PCI_VDEVICE(HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), 2 },
151 { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8673F), 4 }, 148 { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8673F), 3 },
152 { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886A), 5 }, 149 { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886A), 3 },
153 { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886BF), 6 }, 150 { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886BF), 3 },
154 { PCI_VDEVICE(HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), 7 }, 151 { PCI_VDEVICE(HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), 2 },
155 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C561), 8 }, 152 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C561), 4 },
156 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C558), 9 }, 153 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C558), 4 },
157#ifdef CONFIG_BLK_DEV_IDE_SATA 154#ifdef CONFIG_BLK_DEV_IDE_SATA
158 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8237_SATA), 10 }, 155 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8237_SATA), 5 },
159#endif 156#endif
160 { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO), 11 }, 157 { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO), 4 },
161 { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), 12 }, 158 { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), 4 },
162 { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), 13 }, 159 { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), 4 },
163 { PCI_VDEVICE(NETCELL, PCI_DEVICE_ID_REVOLUTION), 14 }, 160 { PCI_VDEVICE(NETCELL, PCI_DEVICE_ID_REVOLUTION), 6 },
164 /* 161 /*
165 * Must come last. If you add entries adjust 162 * Must come last. If you add entries adjust
166 * this table and generic_chipsets[] appropriately. 163 * this table and generic_chipsets[] appropriately.
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
index b52f8339102e..baabb4ce0d78 100644
--- a/drivers/ide/pci/hpt34x.c
+++ b/drivers/ide/pci/hpt34x.c
@@ -33,6 +33,8 @@
33#include <linux/init.h> 33#include <linux/init.h>
34#include <linux/ide.h> 34#include <linux/ide.h>
35 35
36#define DRV_NAME "hpt34x"
37
36#define HPT343_DEBUG_DRIVE_INFO 0 38#define HPT343_DEBUG_DRIVE_INFO 0
37 39
38static void hpt34x_set_mode(ide_drive_t *drive, const u8 speed) 40static void hpt34x_set_mode(ide_drive_t *drive, const u8 speed)
@@ -126,15 +128,15 @@ static const struct ide_port_ops hpt34x_port_ops = {
126 IDE_HFLAG_NO_AUTODMA) 128 IDE_HFLAG_NO_AUTODMA)
127 129
128static const struct ide_port_info hpt34x_chipsets[] __devinitdata = { 130static const struct ide_port_info hpt34x_chipsets[] __devinitdata = {
129 { /* 0 */ 131 { /* 0: HPT343 */
130 .name = "HPT343", 132 .name = DRV_NAME,
131 .init_chipset = init_chipset_hpt34x, 133 .init_chipset = init_chipset_hpt34x,
132 .port_ops = &hpt34x_port_ops, 134 .port_ops = &hpt34x_port_ops,
133 .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_NON_BOOTABLE, 135 .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_NON_BOOTABLE,
134 .pio_mask = ATA_PIO5, 136 .pio_mask = ATA_PIO5,
135 }, 137 },
136 { /* 1 */ 138 { /* 1: HPT345 */
137 .name = "HPT345", 139 .name = DRV_NAME,
138 .init_chipset = init_chipset_hpt34x, 140 .init_chipset = init_chipset_hpt34x,
139 .port_ops = &hpt34x_port_ops, 141 .port_ops = &hpt34x_port_ops,
140 .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_OFF_BOARD, 142 .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_OFF_BOARD,
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index b8004c331edb..6a1c65c3be3e 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -131,6 +131,8 @@
131#include <asm/uaccess.h> 131#include <asm/uaccess.h>
132#include <asm/io.h> 132#include <asm/io.h>
133 133
134#define DRV_NAME "hpt366"
135
134/* various tuning parameters */ 136/* various tuning parameters */
135#define HPT_RESET_STATE_ENGINE 137#define HPT_RESET_STATE_ENGINE
136#undef HPT_DELAY_INTERRUPT 138#undef HPT_DELAY_INTERRUPT
@@ -1362,7 +1364,7 @@ static void __devinit hpt374_init(struct pci_dev *dev, struct pci_dev *dev2)
1362 if (dev2->irq != dev->irq) { 1364 if (dev2->irq != dev->irq) {
1363 /* FIXME: we need a core pci_set_interrupt() */ 1365 /* FIXME: we need a core pci_set_interrupt() */
1364 dev2->irq = dev->irq; 1366 dev2->irq = dev->irq;
1365 printk(KERN_INFO "HPT374 %s: PCI config space interrupt " 1367 printk(KERN_INFO DRV_NAME " %s: PCI config space interrupt "
1366 "fixed\n", pci_name(dev2)); 1368 "fixed\n", pci_name(dev2));
1367 } 1369 }
1368} 1370}
@@ -1398,7 +1400,7 @@ static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2)
1398 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2); 1400 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2);
1399 1401
1400 if (pin1 != pin2 && dev->irq == dev2->irq) { 1402 if (pin1 != pin2 && dev->irq == dev2->irq) {
1401 printk(KERN_INFO "HPT36x %s: onboard version of chipset, " 1403 printk(KERN_INFO DRV_NAME " %s: onboard version of chipset, "
1402 "pin1=%d pin2=%d\n", pci_name(dev), pin1, pin2); 1404 "pin1=%d pin2=%d\n", pci_name(dev), pin1, pin2);
1403 return 1; 1405 return 1;
1404 } 1406 }
@@ -1454,8 +1456,8 @@ static const struct ide_dma_ops hpt36x_dma_ops = {
1454}; 1456};
1455 1457
1456static const struct ide_port_info hpt366_chipsets[] __devinitdata = { 1458static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1457 { /* 0 */ 1459 { /* 0: HPT36x */
1458 .name = "HPT36x", 1460 .name = DRV_NAME,
1459 .init_chipset = init_chipset_hpt366, 1461 .init_chipset = init_chipset_hpt366,
1460 .init_hwif = init_hwif_hpt366, 1462 .init_hwif = init_hwif_hpt366,
1461 .init_dma = init_dma_hpt366, 1463 .init_dma = init_dma_hpt366,
@@ -1471,53 +1473,9 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1471 .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE, 1473 .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE,
1472 .pio_mask = ATA_PIO4, 1474 .pio_mask = ATA_PIO4,
1473 .mwdma_mask = ATA_MWDMA2, 1475 .mwdma_mask = ATA_MWDMA2,
1474 },{ /* 1 */ 1476 },
1475 .name = "HPT372A", 1477 { /* 1: HPT3xx */
1476 .init_chipset = init_chipset_hpt366, 1478 .name = DRV_NAME,
1477 .init_hwif = init_hwif_hpt366,
1478 .init_dma = init_dma_hpt366,
1479 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1480 .port_ops = &hpt3xx_port_ops,
1481 .dma_ops = &hpt37x_dma_ops,
1482 .host_flags = IDE_HFLAGS_HPT3XX,
1483 .pio_mask = ATA_PIO4,
1484 .mwdma_mask = ATA_MWDMA2,
1485 },{ /* 2 */
1486 .name = "HPT302",
1487 .init_chipset = init_chipset_hpt366,
1488 .init_hwif = init_hwif_hpt366,
1489 .init_dma = init_dma_hpt366,
1490 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1491 .port_ops = &hpt3xx_port_ops,
1492 .dma_ops = &hpt37x_dma_ops,
1493 .host_flags = IDE_HFLAGS_HPT3XX,
1494 .pio_mask = ATA_PIO4,
1495 .mwdma_mask = ATA_MWDMA2,
1496 },{ /* 3 */
1497 .name = "HPT371",
1498 .init_chipset = init_chipset_hpt366,
1499 .init_hwif = init_hwif_hpt366,
1500 .init_dma = init_dma_hpt366,
1501 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1502 .port_ops = &hpt3xx_port_ops,
1503 .dma_ops = &hpt37x_dma_ops,
1504 .host_flags = IDE_HFLAGS_HPT3XX,
1505 .pio_mask = ATA_PIO4,
1506 .mwdma_mask = ATA_MWDMA2,
1507 },{ /* 4 */
1508 .name = "HPT374",
1509 .init_chipset = init_chipset_hpt366,
1510 .init_hwif = init_hwif_hpt366,
1511 .init_dma = init_dma_hpt366,
1512 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1513 .udma_mask = ATA_UDMA5,
1514 .port_ops = &hpt3xx_port_ops,
1515 .dma_ops = &hpt37x_dma_ops,
1516 .host_flags = IDE_HFLAGS_HPT3XX,
1517 .pio_mask = ATA_PIO4,
1518 .mwdma_mask = ATA_MWDMA2,
1519 },{ /* 5 */
1520 .name = "HPT372N",
1521 .init_chipset = init_chipset_hpt366, 1479 .init_chipset = init_chipset_hpt366,
1522 .init_hwif = init_hwif_hpt366, 1480 .init_hwif = init_hwif_hpt366,
1523 .init_dma = init_dma_hpt366, 1481 .init_dma = init_dma_hpt366,
@@ -1583,9 +1541,10 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic
1583 break; 1541 break;
1584 } 1542 }
1585 1543
1586 d = hpt366_chipsets[idx]; 1544 printk(KERN_INFO DRV_NAME ": %s chipset detected\n", info->chip_name);
1545
1546 d = hpt366_chipsets[min_t(u8, idx, 1)];
1587 1547
1588 d.name = info->chip_name;
1589 d.udma_mask = info->udma_mask; 1548 d.udma_mask = info->udma_mask;
1590 1549
1591 /* fixup ->dma_ops for HPT370/HPT370A */ 1550 /* fixup ->dma_ops for HPT370/HPT370A */
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index 451b87fd8217..6eba8f188264 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -14,6 +14,8 @@
14#include <linux/ide.h> 14#include <linux/ide.h>
15#include <linux/init.h> 15#include <linux/init.h>
16 16
17#define DRV_NAME "it8213"
18
17/** 19/**
18 * it8213_set_pio_mode - set host controller for PIO mode 20 * it8213_set_pio_mode - set host controller for PIO mode
19 * @drive: drive 21 * @drive: drive
@@ -156,7 +158,7 @@ static const struct ide_port_ops it8213_port_ops = {
156}; 158};
157 159
158static const struct ide_port_info it8213_chipset __devinitdata = { 160static const struct ide_port_info it8213_chipset __devinitdata = {
159 .name = "IT8213", 161 .name = DRV_NAME,
160 .enablebits = { {0x41, 0x80, 0x80} }, 162 .enablebits = { {0x41, 0x80, 0x80} },
161 .port_ops = &it8213_port_ops, 163 .port_ops = &it8213_port_ops,
162 .host_flags = IDE_HFLAG_SINGLE, 164 .host_flags = IDE_HFLAG_SINGLE,
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index a3d8959436c5..74173352741f 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -67,6 +67,8 @@
67#include <linux/ide.h> 67#include <linux/ide.h>
68#include <linux/init.h> 68#include <linux/init.h>
69 69
70#define DRV_NAME "it821x"
71
70struct it821x_dev 72struct it821x_dev
71{ 73{
72 unsigned int smart:1, /* Are we in smart raid mode */ 74 unsigned int smart:1, /* Are we in smart raid mode */
@@ -569,7 +571,7 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
569 idev->timing10 = 1; 571 idev->timing10 = 1;
570 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; 572 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
571 if (idev->smart == 0) 573 if (idev->smart == 0)
572 printk(KERN_WARNING "it821x %s: revision 0x10, " 574 printk(KERN_WARNING DRV_NAME " %s: revision 0x10, "
573 "workarounds activated\n", pci_name(dev)); 575 "workarounds activated\n", pci_name(dev));
574 } 576 }
575 577
@@ -610,12 +612,12 @@ static unsigned int __devinit init_chipset_it821x(struct pci_dev *dev, const cha
610 612
611 /* Force the card into bypass mode if so requested */ 613 /* Force the card into bypass mode if so requested */
612 if (it8212_noraid) { 614 if (it8212_noraid) {
613 printk(KERN_INFO "it821x %s: forcing bypass mode\n", 615 printk(KERN_INFO DRV_NAME " %s: forcing bypass mode\n",
614 pci_name(dev)); 616 pci_name(dev));
615 it8212_disable_raid(dev); 617 it8212_disable_raid(dev);
616 } 618 }
617 pci_read_config_byte(dev, 0x50, &conf); 619 pci_read_config_byte(dev, 0x50, &conf);
618 printk(KERN_INFO "it821x %s: controller in %s mode\n", 620 printk(KERN_INFO DRV_NAME " %s: controller in %s mode\n",
619 pci_name(dev), mode[conf & 1]); 621 pci_name(dev), mode[conf & 1]);
620 return 0; 622 return 0;
621} 623}
@@ -629,7 +631,7 @@ static const struct ide_port_ops it821x_port_ops = {
629}; 631};
630 632
631static const struct ide_port_info it821x_chipset __devinitdata = { 633static const struct ide_port_info it821x_chipset __devinitdata = {
632 .name = "IT821X", 634 .name = DRV_NAME,
633 .init_chipset = init_chipset_it821x, 635 .init_chipset = init_chipset_it821x,
634 .init_hwif = init_hwif_it821x, 636 .init_hwif = init_hwif_it821x,
635 .port_ops = &it821x_port_ops, 637 .port_ops = &it821x_port_ops,
@@ -652,7 +654,7 @@ static int __devinit it821x_init_one(struct pci_dev *dev, const struct pci_devic
652 654
653 itdevs = kzalloc(2 * sizeof(*itdevs), GFP_KERNEL); 655 itdevs = kzalloc(2 * sizeof(*itdevs), GFP_KERNEL);
654 if (itdevs == NULL) { 656 if (itdevs == NULL) {
655 printk(KERN_ERR "it821x %s: out of memory\n", pci_name(dev)); 657 printk(KERN_ERR DRV_NAME " %s: out of memory\n", pci_name(dev));
656 return -ENOMEM; 658 return -ENOMEM;
657 } 659 }
658 660
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
index 39e221b076e2..545b6e172d9b 100644
--- a/drivers/ide/pci/jmicron.c
+++ b/drivers/ide/pci/jmicron.c
@@ -12,6 +12,8 @@
12#include <linux/ide.h> 12#include <linux/ide.h>
13#include <linux/init.h> 13#include <linux/init.h>
14 14
15#define DRV_NAME "jmicron"
16
15typedef enum { 17typedef enum {
16 PORT_PATA0 = 0, 18 PORT_PATA0 = 0,
17 PORT_PATA1 = 1, 19 PORT_PATA1 = 1,
@@ -102,7 +104,7 @@ static const struct ide_port_ops jmicron_port_ops = {
102}; 104};
103 105
104static const struct ide_port_info jmicron_chipset __devinitdata = { 106static const struct ide_port_info jmicron_chipset __devinitdata = {
105 .name = "JMB", 107 .name = DRV_NAME,
106 .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } }, 108 .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } },
107 .port_ops = &jmicron_port_ops, 109 .port_ops = &jmicron_port_ops,
108 .pio_mask = ATA_PIO5, 110 .pio_mask = ATA_PIO5,
diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c
index afcc742a63ac..ffefcd15196c 100644
--- a/drivers/ide/pci/ns87415.c
+++ b/drivers/ide/pci/ns87415.c
@@ -19,6 +19,8 @@
19 19
20#include <asm/io.h> 20#include <asm/io.h>
21 21
22#define DRV_NAME "ns87415"
23
22#ifdef CONFIG_SUPERIO 24#ifdef CONFIG_SUPERIO
23/* SUPERIO 87560 is a PoS chip that NatSem denies exists. 25/* SUPERIO 87560 is a PoS chip that NatSem denies exists.
24 * Unfortunately, it's built-in on all Astro-based PA-RISC workstations 26 * Unfortunately, it's built-in on all Astro-based PA-RISC workstations
@@ -305,7 +307,7 @@ static const struct ide_dma_ops ns87415_dma_ops = {
305}; 307};
306 308
307static const struct ide_port_info ns87415_chipset __devinitdata = { 309static const struct ide_port_info ns87415_chipset __devinitdata = {
308 .name = "NS87415", 310 .name = DRV_NAME,
309 .init_hwif = init_hwif_ns87415, 311 .init_hwif = init_hwif_ns87415,
310 .port_ops = &ns87415_port_ops, 312 .port_ops = &ns87415_port_ops,
311 .dma_ops = &ns87415_dma_ops, 313 .dma_ops = &ns87415_dma_ops,
diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c
index 4895f2ff3f05..e28e672ddafc 100644
--- a/drivers/ide/pci/opti621.c
+++ b/drivers/ide/pci/opti621.c
@@ -90,6 +90,8 @@
90 90
91#include <asm/io.h> 91#include <asm/io.h>
92 92
93#define DRV_NAME "opti621"
94
93#define READ_REG 0 /* index of Read cycle timing register */ 95#define READ_REG 0 /* index of Read cycle timing register */
94#define WRITE_REG 1 /* index of Write cycle timing register */ 96#define WRITE_REG 1 /* index of Write cycle timing register */
95#define CNTRL_REG 3 /* index of Control register */ 97#define CNTRL_REG 3 /* index of Control register */
@@ -200,7 +202,7 @@ static const struct ide_port_ops opti621_port_ops = {
200}; 202};
201 203
202static const struct ide_port_info opti621_chipset __devinitdata = { 204static const struct ide_port_info opti621_chipset __devinitdata = {
203 .name = "OPTI621/X", 205 .name = DRV_NAME,
204 .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} }, 206 .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
205 .port_ops = &opti621_port_ops, 207 .port_ops = &opti621_port_ops,
206 .host_flags = IDE_HFLAG_NO_DMA, 208 .host_flags = IDE_HFLAG_NO_DMA,
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index 4c2b669d7de6..1f6791957227 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -31,6 +31,8 @@
31#include <asm/pci-bridge.h> 31#include <asm/pci-bridge.h>
32#endif 32#endif
33 33
34#define DRV_NAME "pdc202xx_new"
35
34#undef DEBUG 36#undef DEBUG
35 37
36#ifdef DEBUG 38#ifdef DEBUG
@@ -458,7 +460,7 @@ static struct pci_dev * __devinit pdc20270_get_dev2(struct pci_dev *dev)
458 460
459 if (dev2->irq != dev->irq) { 461 if (dev2->irq != dev->irq) {
460 dev2->irq = dev->irq; 462 dev2->irq = dev->irq;
461 printk(KERN_INFO "PDC20270 %s: PCI config space " 463 printk(KERN_INFO DRV_NAME " %s: PCI config space "
462 "interrupt fixed\n", pci_name(dev)); 464 "interrupt fixed\n", pci_name(dev));
463 } 465 }
464 466
@@ -476,9 +478,9 @@ static const struct ide_port_ops pdcnew_port_ops = {
476 .cable_detect = pdcnew_cable_detect, 478 .cable_detect = pdcnew_cable_detect,
477}; 479};
478 480
479#define DECLARE_PDCNEW_DEV(name_str, udma) \ 481#define DECLARE_PDCNEW_DEV(udma) \
480 { \ 482 { \
481 .name = name_str, \ 483 .name = DRV_NAME, \
482 .init_chipset = init_chipset_pdcnew, \ 484 .init_chipset = init_chipset_pdcnew, \
483 .port_ops = &pdcnew_port_ops, \ 485 .port_ops = &pdcnew_port_ops, \
484 .host_flags = IDE_HFLAG_POST_SET_MODE | \ 486 .host_flags = IDE_HFLAG_POST_SET_MODE | \
@@ -490,13 +492,8 @@ static const struct ide_port_ops pdcnew_port_ops = {
490 } 492 }
491 493
492static const struct ide_port_info pdcnew_chipsets[] __devinitdata = { 494static const struct ide_port_info pdcnew_chipsets[] __devinitdata = {
493 /* 0 */ DECLARE_PDCNEW_DEV("PDC20268", ATA_UDMA5), 495 /* 0: PDC202{68,70} */ DECLARE_PDCNEW_DEV(ATA_UDMA5),
494 /* 1 */ DECLARE_PDCNEW_DEV("PDC20269", ATA_UDMA6), 496 /* 1: PDC202{69,71,75,76,77} */ DECLARE_PDCNEW_DEV(ATA_UDMA6),
495 /* 2 */ DECLARE_PDCNEW_DEV("PDC20270", ATA_UDMA5),
496 /* 3 */ DECLARE_PDCNEW_DEV("PDC20271", ATA_UDMA6),
497 /* 4 */ DECLARE_PDCNEW_DEV("PDC20275", ATA_UDMA6),
498 /* 5 */ DECLARE_PDCNEW_DEV("PDC20276", ATA_UDMA6),
499 /* 6 */ DECLARE_PDCNEW_DEV("PDC20277", ATA_UDMA6),
500}; 497};
501 498
502/** 499/**
@@ -510,13 +507,10 @@ static const struct ide_port_info pdcnew_chipsets[] __devinitdata = {
510 507
511static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id) 508static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id)
512{ 509{
513 const struct ide_port_info *d; 510 const struct ide_port_info *d = &pdcnew_chipsets[id->driver_data];
514 struct pci_dev *bridge = dev->bus->self; 511 struct pci_dev *bridge = dev->bus->self;
515 u8 idx = id->driver_data;
516
517 d = &pdcnew_chipsets[idx];
518 512
519 if (idx == 2 && bridge && 513 if (dev->device == PCI_DEVICE_ID_PROMISE_20270 && bridge &&
520 bridge->vendor == PCI_VENDOR_ID_DEC && 514 bridge->vendor == PCI_VENDOR_ID_DEC &&
521 bridge->device == PCI_DEVICE_ID_DEC_21150) { 515 bridge->device == PCI_DEVICE_ID_DEC_21150) {
522 struct pci_dev *dev2; 516 struct pci_dev *dev2;
@@ -534,11 +528,11 @@ static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_de
534 } 528 }
535 } 529 }
536 530
537 if (idx == 5 && bridge && 531 if (dev->device == PCI_DEVICE_ID_PROMISE_20276 && bridge &&
538 bridge->vendor == PCI_VENDOR_ID_INTEL && 532 bridge->vendor == PCI_VENDOR_ID_INTEL &&
539 (bridge->device == PCI_DEVICE_ID_INTEL_I960 || 533 (bridge->device == PCI_DEVICE_ID_INTEL_I960 ||
540 bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) { 534 bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) {
541 printk(KERN_INFO "PDC20276 %s: attached to I2O RAID controller," 535 printk(KERN_INFO DRV_NAME " %s: attached to I2O RAID controller,"
542 " skipping\n", pci_name(dev)); 536 " skipping\n", pci_name(dev));
543 return -ENODEV; 537 return -ENODEV;
544 } 538 }
@@ -558,11 +552,11 @@ static void __devexit pdc202new_remove(struct pci_dev *dev)
558static const struct pci_device_id pdc202new_pci_tbl[] = { 552static const struct pci_device_id pdc202new_pci_tbl[] = {
559 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20268), 0 }, 553 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20268), 0 },
560 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20269), 1 }, 554 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20269), 1 },
561 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20270), 2 }, 555 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20270), 0 },
562 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20271), 3 }, 556 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20271), 1 },
563 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20275), 4 }, 557 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20275), 1 },
564 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20276), 5 }, 558 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20276), 1 },
565 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20277), 6 }, 559 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20277), 1 },
566 { 0, }, 560 { 0, },
567}; 561};
568MODULE_DEVICE_TABLE(pci, pdc202new_pci_tbl); 562MODULE_DEVICE_TABLE(pci, pdc202new_pci_tbl);
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index 5cb2731047e9..da92d127868f 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -20,6 +20,8 @@
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22 22
23#define DRV_NAME "pdc202xx_old"
24
23#define PDC202XX_DEBUG_DRIVE_INFO 0 25#define PDC202XX_DEBUG_DRIVE_INFO 0
24 26
25static const char *pdc_quirk_drives[] = { 27static const char *pdc_quirk_drives[] = {
@@ -350,9 +352,9 @@ static const struct ide_dma_ops pdc2026x_dma_ops = {
350 .dma_timeout = pdc202xx_dma_timeout, 352 .dma_timeout = pdc202xx_dma_timeout,
351}; 353};
352 354
353#define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \ 355#define DECLARE_PDC2026X_DEV(udma, extra_flags) \
354 { \ 356 { \
355 .name = name_str, \ 357 .name = DRV_NAME, \
356 .init_chipset = init_chipset_pdc202xx, \ 358 .init_chipset = init_chipset_pdc202xx, \
357 .port_ops = &pdc2026x_port_ops, \ 359 .port_ops = &pdc2026x_port_ops, \
358 .dma_ops = &pdc2026x_dma_ops, \ 360 .dma_ops = &pdc2026x_dma_ops, \
@@ -363,8 +365,8 @@ static const struct ide_dma_ops pdc2026x_dma_ops = {
363 } 365 }
364 366
365static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = { 367static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = {
366 { /* 0 */ 368 { /* 0: PDC20246 */
367 .name = "PDC20246", 369 .name = DRV_NAME,
368 .init_chipset = init_chipset_pdc202xx, 370 .init_chipset = init_chipset_pdc202xx,
369 .port_ops = &pdc20246_port_ops, 371 .port_ops = &pdc20246_port_ops,
370 .dma_ops = &pdc20246_dma_ops, 372 .dma_ops = &pdc20246_dma_ops,
@@ -374,10 +376,10 @@ static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = {
374 .udma_mask = ATA_UDMA2, 376 .udma_mask = ATA_UDMA2,
375 }, 377 },
376 378
377 /* 1 */ DECLARE_PDC2026X_DEV("PDC20262", ATA_UDMA4, 0), 379 /* 1: PDC2026{2,3} */
378 /* 2 */ DECLARE_PDC2026X_DEV("PDC20263", ATA_UDMA4, 0), 380 DECLARE_PDC2026X_DEV(ATA_UDMA4, 0),
379 /* 3 */ DECLARE_PDC2026X_DEV("PDC20265", ATA_UDMA5, IDE_HFLAG_RQSIZE_256), 381 /* 2: PDC2026{5,7} */
380 /* 4 */ DECLARE_PDC2026X_DEV("PDC20267", ATA_UDMA5, IDE_HFLAG_RQSIZE_256), 382 DECLARE_PDC2026X_DEV(ATA_UDMA5, IDE_HFLAG_RQSIZE_256),
381}; 383};
382 384
383/** 385/**
@@ -396,17 +398,17 @@ static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_dev
396 398
397 d = &pdc202xx_chipsets[idx]; 399 d = &pdc202xx_chipsets[idx];
398 400
399 if (idx < 3) 401 if (idx < 2)
400 pdc202ata4_fixup_irq(dev, d->name); 402 pdc202ata4_fixup_irq(dev, d->name);
401 403
402 if (idx == 3) { 404 if (dev->vendor == PCI_DEVICE_ID_PROMISE_20265) {
403 struct pci_dev *bridge = dev->bus->self; 405 struct pci_dev *bridge = dev->bus->self;
404 406
405 if (bridge && 407 if (bridge &&
406 bridge->vendor == PCI_VENDOR_ID_INTEL && 408 bridge->vendor == PCI_VENDOR_ID_INTEL &&
407 (bridge->device == PCI_DEVICE_ID_INTEL_I960 || 409 (bridge->device == PCI_DEVICE_ID_INTEL_I960 ||
408 bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) { 410 bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) {
409 printk(KERN_INFO "pdc202xx_old %s: skipping Promise " 411 printk(KERN_INFO DRV_NAME " %s: skipping Promise "
410 "PDC20265 attached to I2O RAID controller\n", 412 "PDC20265 attached to I2O RAID controller\n",
411 pci_name(dev)); 413 pci_name(dev));
412 return -ENODEV; 414 return -ENODEV;
@@ -419,9 +421,9 @@ static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_dev
419static const struct pci_device_id pdc202xx_pci_tbl[] = { 421static const struct pci_device_id pdc202xx_pci_tbl[] = {
420 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20246), 0 }, 422 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20246), 0 },
421 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20262), 1 }, 423 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20262), 1 },
422 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20263), 2 }, 424 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20263), 1 },
423 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20265), 3 }, 425 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20265), 2 },
424 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20267), 4 }, 426 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20267), 2 },
425 { 0, }, 427 { 0, },
426}; 428};
427MODULE_DEVICE_TABLE(pci, pdc202xx_pci_tbl); 429MODULE_DEVICE_TABLE(pci, pdc202xx_pci_tbl);
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index c16b1ab4d4ff..9eb411f5c358 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -54,6 +54,8 @@
54 54
55#include <asm/io.h> 55#include <asm/io.h>
56 56
57#define DRV_NAME "piix"
58
57static int no_piix_dma; 59static int no_piix_dma;
58 60
59/** 61/**
@@ -314,9 +316,9 @@ static const struct ide_port_ops piix_port_ops = {
314 #define IDE_HFLAGS_PIIX 0 316 #define IDE_HFLAGS_PIIX 0
315#endif 317#endif
316 318
317#define DECLARE_PIIX_DEV(name_str, udma) \ 319#define DECLARE_PIIX_DEV(udma) \
318 { \ 320 { \
319 .name = name_str, \ 321 .name = DRV_NAME, \
320 .init_hwif = init_hwif_piix, \ 322 .init_hwif = init_hwif_piix, \
321 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ 323 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
322 .port_ops = &piix_port_ops, \ 324 .port_ops = &piix_port_ops, \
@@ -327,9 +329,9 @@ static const struct ide_port_ops piix_port_ops = {
327 .udma_mask = udma, \ 329 .udma_mask = udma, \
328 } 330 }
329 331
330#define DECLARE_ICH_DEV(name_str, udma) \ 332#define DECLARE_ICH_DEV(udma) \
331 { \ 333 { \
332 .name = name_str, \ 334 .name = DRV_NAME, \
333 .init_chipset = init_chipset_ich, \ 335 .init_chipset = init_chipset_ich, \
334 .init_hwif = init_hwif_ich, \ 336 .init_hwif = init_hwif_ich, \
335 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ 337 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
@@ -342,45 +344,31 @@ static const struct ide_port_ops piix_port_ops = {
342 } 344 }
343 345
344static const struct ide_port_info piix_pci_info[] __devinitdata = { 346static const struct ide_port_info piix_pci_info[] __devinitdata = {
345 /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */ 347 /* 0: MPIIX */
346 /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */
347
348 /* 2 */
349 { /* 348 { /*
350 * MPIIX actually has only a single IDE channel mapped to 349 * MPIIX actually has only a single IDE channel mapped to
351 * the primary or secondary ports depending on the value 350 * the primary or secondary ports depending on the value
352 * of the bit 14 of the IDETIM register at offset 0x6c 351 * of the bit 14 of the IDETIM register at offset 0x6c
353 */ 352 */
354 .name = "MPIIX", 353 .name = DRV_NAME,
355 .enablebits = {{0x6d,0xc0,0x80}, {0x6d,0xc0,0xc0}}, 354 .enablebits = {{0x6d,0xc0,0x80}, {0x6d,0xc0,0xc0}},
356 .host_flags = IDE_HFLAG_ISA_PORTS | IDE_HFLAG_NO_DMA | 355 .host_flags = IDE_HFLAG_ISA_PORTS | IDE_HFLAG_NO_DMA |
357 IDE_HFLAGS_PIIX, 356 IDE_HFLAGS_PIIX,
358 .pio_mask = ATA_PIO4, 357 .pio_mask = ATA_PIO4,
359 /* This is a painful system best to let it self tune for now */ 358 /* This is a painful system best to let it self tune for now */
360 }, 359 },
361 360 /* 1: PIIXa/PIIXb/PIIX3 */
362 /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */ 361 DECLARE_PIIX_DEV(0x00), /* no udma */
363 /* 4 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), 362 /* 2: PIIX4 */
364 /* 5 */ DECLARE_ICH_DEV("ICH0", ATA_UDMA2), 363 DECLARE_PIIX_DEV(ATA_UDMA2),
365 /* 6 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), 364 /* 3: ICH0 */
366 /* 7 */ DECLARE_ICH_DEV("ICH", ATA_UDMA4), 365 DECLARE_ICH_DEV(ATA_UDMA2),
367 /* 8 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA4), 366 /* 4: ICH */
368 /* 9 */ DECLARE_PIIX_DEV("PIIX4", ATA_UDMA2), 367 DECLARE_ICH_DEV(ATA_UDMA4),
369 /* 10 */ DECLARE_ICH_DEV("ICH2", ATA_UDMA5), 368 /* 5: PIIX4 */
370 /* 11 */ DECLARE_ICH_DEV("ICH2M", ATA_UDMA5), 369 DECLARE_PIIX_DEV(ATA_UDMA4),
371 /* 12 */ DECLARE_ICH_DEV("ICH3M", ATA_UDMA5), 370 /* 6: ICH[2-7]/ICH[2-3]M/C-ICH/ICH5-SATA/ESB2/ICH8M */
372 /* 13 */ DECLARE_ICH_DEV("ICH3", ATA_UDMA5), 371 DECLARE_ICH_DEV(ATA_UDMA5),
373 /* 14 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5),
374 /* 15 */ DECLARE_ICH_DEV("ICH5", ATA_UDMA5),
375 /* 16 */ DECLARE_ICH_DEV("C-ICH", ATA_UDMA5),
376 /* 17 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5),
377 /* 18 */ DECLARE_ICH_DEV("ICH5-SATA", ATA_UDMA5),
378 /* 19 */ DECLARE_ICH_DEV("ICH5", ATA_UDMA5),
379 /* 20 */ DECLARE_ICH_DEV("ICH6", ATA_UDMA5),
380 /* 21 */ DECLARE_ICH_DEV("ICH7", ATA_UDMA5),
381 /* 22 */ DECLARE_ICH_DEV("ICH4", ATA_UDMA5),
382 /* 23 */ DECLARE_ICH_DEV("ESB2", ATA_UDMA5),
383 /* 24 */ DECLARE_ICH_DEV("ICH8M", ATA_UDMA5),
384}; 372};
385 373
386/** 374/**
@@ -421,39 +409,39 @@ static void __devinit piix_check_450nx(void)
421 no_piix_dma = 2; 409 no_piix_dma = 2;
422 } 410 }
423 if(no_piix_dma) 411 if(no_piix_dma)
424 printk(KERN_WARNING "piix: 450NX errata present, disabling IDE DMA.\n"); 412 printk(KERN_WARNING DRV_NAME ": 450NX errata present, disabling IDE DMA.\n");
425 if(no_piix_dma == 2) 413 if(no_piix_dma == 2)
426 printk(KERN_WARNING "piix: A BIOS update may resolve this.\n"); 414 printk(KERN_WARNING DRV_NAME ": A BIOS update may resolve this.\n");
427} 415}
428 416
429static const struct pci_device_id piix_pci_tbl[] = { 417static const struct pci_device_id piix_pci_tbl[] = {
430 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_0), 0 }, 418 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_0), 1 },
431 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_1), 1 }, 419 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_1), 1 },
432 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371MX), 2 }, 420 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371MX), 0 },
433 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371SB_1), 3 }, 421 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371SB_1), 1 },
434 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371AB), 4 }, 422 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371AB), 2 },
435 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AB_1), 5 }, 423 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AB_1), 3 },
436 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82443MX_1), 6 }, 424 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82443MX_1), 2 },
437 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AA_1), 7 }, 425 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801AA_1), 4 },
438 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82372FB_1), 8 }, 426 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82372FB_1), 5 },
439 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82451NX), 9 }, 427 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82451NX), 2 },
440 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_9), 10 }, 428 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_9), 6 },
441 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_8), 11 }, 429 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801BA_8), 6 },
442 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_10), 12 }, 430 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_10), 6 },
443 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_11), 13 }, 431 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801CA_11), 6 },
444 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_11), 14 }, 432 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_11), 6 },
445 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_11), 15 }, 433 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_11), 6 },
446 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801E_11), 16 }, 434 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801E_11), 6 },
447 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_10), 17 }, 435 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_10), 6 },
448#ifdef CONFIG_BLK_DEV_IDE_SATA 436#ifdef CONFIG_BLK_DEV_IDE_SATA
449 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_1), 18 }, 437 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801EB_1), 6 },
450#endif 438#endif
451 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB_2), 19 }, 439 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB_2), 6 },
452 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH6_19), 20 }, 440 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH6_19), 6 },
453 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH7_21), 21 }, 441 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH7_21), 6 },
454 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_1), 22 }, 442 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82801DB_1), 6 },
455 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB2_18), 23 }, 443 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ESB2_18), 6 },
456 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH8_6), 24 }, 444 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICH8_6), 6 },
457 { 0, }, 445 { 0, },
458}; 446};
459MODULE_DEVICE_TABLE(pci, piix_pci_tbl); 447MODULE_DEVICE_TABLE(pci, piix_pci_tbl);
diff --git a/drivers/ide/pci/rz1000.c b/drivers/ide/pci/rz1000.c
index f7a3b9aff29d..8d11ee838a2a 100644
--- a/drivers/ide/pci/rz1000.c
+++ b/drivers/ide/pci/rz1000.c
@@ -21,6 +21,8 @@
21#include <linux/ide.h> 21#include <linux/ide.h>
22#include <linux/init.h> 22#include <linux/init.h>
23 23
24#define DRV_NAME "rz1000"
25
24static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif) 26static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif)
25{ 27{
26 struct pci_dev *dev = to_pci_dev(hwif->dev); 28 struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -40,7 +42,7 @@ static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif)
40} 42}
41 43
42static const struct ide_port_info rz1000_chipset __devinitdata = { 44static const struct ide_port_info rz1000_chipset __devinitdata = {
43 .name = "RZ100x", 45 .name = DRV_NAME,
44 .init_hwif = init_hwif_rz1000, 46 .init_hwif = init_hwif_rz1000,
45 .chipset = ide_rz1000, 47 .chipset = ide_rz1000,
46 .host_flags = IDE_HFLAG_NO_DMA, 48 .host_flags = IDE_HFLAG_NO_DMA,
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index 6509560ba665..8efaed16fea3 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -22,6 +22,8 @@
22 22
23#include <asm/io.h> 23#include <asm/io.h>
24 24
25#define DRV_NAME "sc1200"
26
25#define SC1200_REV_A 0x00 27#define SC1200_REV_A 0x00
26#define SC1200_REV_B1 0x01 28#define SC1200_REV_B1 0x01
27#define SC1200_REV_B3 0x02 29#define SC1200_REV_B3 0x02
@@ -291,7 +293,7 @@ static const struct ide_dma_ops sc1200_dma_ops = {
291}; 293};
292 294
293static const struct ide_port_info sc1200_chipset __devinitdata = { 295static const struct ide_port_info sc1200_chipset __devinitdata = {
294 .name = "SC1200", 296 .name = DRV_NAME,
295 .port_ops = &sc1200_port_ops, 297 .port_ops = &sc1200_port_ops,
296 .dma_ops = &sc1200_dma_ops, 298 .dma_ops = &sc1200_dma_ops,
297 .host_flags = IDE_HFLAG_SERIALIZE | 299 .host_flags = IDE_HFLAG_SERIALIZE |
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index 1106ff44cdee..e26bc8326dbb 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -38,6 +38,8 @@
38 38
39#include <asm/io.h> 39#include <asm/io.h>
40 40
41#define DRV_NAME "serverworks"
42
41#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */ 43#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
42#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */ 44#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
43 45
@@ -353,40 +355,44 @@ static const struct ide_port_ops svwks_port_ops = {
353#define IDE_HFLAGS_SVWKS IDE_HFLAG_LEGACY_IRQS 355#define IDE_HFLAGS_SVWKS IDE_HFLAG_LEGACY_IRQS
354 356
355static const struct ide_port_info serverworks_chipsets[] __devinitdata = { 357static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
356 { /* 0 */ 358 { /* 0: OSB4 */
357 .name = "SvrWks OSB4", 359 .name = DRV_NAME,
358 .init_chipset = init_chipset_svwks, 360 .init_chipset = init_chipset_svwks,
359 .port_ops = &osb4_port_ops, 361 .port_ops = &osb4_port_ops,
360 .host_flags = IDE_HFLAGS_SVWKS, 362 .host_flags = IDE_HFLAGS_SVWKS,
361 .pio_mask = ATA_PIO4, 363 .pio_mask = ATA_PIO4,
362 .mwdma_mask = ATA_MWDMA2, 364 .mwdma_mask = ATA_MWDMA2,
363 .udma_mask = 0x00, /* UDMA is problematic on OSB4 */ 365 .udma_mask = 0x00, /* UDMA is problematic on OSB4 */
364 },{ /* 1 */ 366 },
365 .name = "SvrWks CSB5", 367 { /* 1: CSB5 */
368 .name = DRV_NAME,
366 .init_chipset = init_chipset_svwks, 369 .init_chipset = init_chipset_svwks,
367 .port_ops = &svwks_port_ops, 370 .port_ops = &svwks_port_ops,
368 .host_flags = IDE_HFLAGS_SVWKS, 371 .host_flags = IDE_HFLAGS_SVWKS,
369 .pio_mask = ATA_PIO4, 372 .pio_mask = ATA_PIO4,
370 .mwdma_mask = ATA_MWDMA2, 373 .mwdma_mask = ATA_MWDMA2,
371 .udma_mask = ATA_UDMA5, 374 .udma_mask = ATA_UDMA5,
372 },{ /* 2 */ 375 },
373 .name = "SvrWks CSB6", 376 { /* 2: CSB6 */
377 .name = DRV_NAME,
374 .init_chipset = init_chipset_svwks, 378 .init_chipset = init_chipset_svwks,
375 .port_ops = &svwks_port_ops, 379 .port_ops = &svwks_port_ops,
376 .host_flags = IDE_HFLAGS_SVWKS, 380 .host_flags = IDE_HFLAGS_SVWKS,
377 .pio_mask = ATA_PIO4, 381 .pio_mask = ATA_PIO4,
378 .mwdma_mask = ATA_MWDMA2, 382 .mwdma_mask = ATA_MWDMA2,
379 .udma_mask = ATA_UDMA5, 383 .udma_mask = ATA_UDMA5,
380 },{ /* 3 */ 384 },
381 .name = "SvrWks CSB6", 385 { /* 3: CSB6-2 */
386 .name = DRV_NAME,
382 .init_chipset = init_chipset_svwks, 387 .init_chipset = init_chipset_svwks,
383 .port_ops = &svwks_port_ops, 388 .port_ops = &svwks_port_ops,
384 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE, 389 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE,
385 .pio_mask = ATA_PIO4, 390 .pio_mask = ATA_PIO4,
386 .mwdma_mask = ATA_MWDMA2, 391 .mwdma_mask = ATA_MWDMA2,
387 .udma_mask = ATA_UDMA5, 392 .udma_mask = ATA_UDMA5,
388 },{ /* 4 */ 393 },
389 .name = "SvrWks HT1000", 394 { /* 4: HT1000 */
395 .name = DRV_NAME,
390 .init_chipset = init_chipset_svwks, 396 .init_chipset = init_chipset_svwks,
391 .port_ops = &svwks_port_ops, 397 .port_ops = &svwks_port_ops,
392 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE, 398 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE,
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index fc29f1ca503a..572b479a3922 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -44,6 +44,8 @@
44#include <linux/init.h> 44#include <linux/init.h>
45#include <linux/io.h> 45#include <linux/io.h>
46 46
47#define DRV_NAME "siimage"
48
47/** 49/**
48 * pdev_is_sata - check if device is SATA 50 * pdev_is_sata - check if device is SATA
49 * @pdev: PCI device to check 51 * @pdev: PCI device to check
@@ -717,9 +719,9 @@ static const struct ide_dma_ops sil_dma_ops = {
717 .dma_lost_irq = ide_dma_lost_irq, 719 .dma_lost_irq = ide_dma_lost_irq,
718}; 720};
719 721
720#define DECLARE_SII_DEV(name_str, p_ops) \ 722#define DECLARE_SII_DEV(p_ops) \
721 { \ 723 { \
722 .name = name_str, \ 724 .name = DRV_NAME, \
723 .init_chipset = init_chipset_siimage, \ 725 .init_chipset = init_chipset_siimage, \
724 .init_iops = init_iops_siimage, \ 726 .init_iops = init_iops_siimage, \
725 .port_ops = p_ops, \ 727 .port_ops = p_ops, \
@@ -730,9 +732,8 @@ static const struct ide_dma_ops sil_dma_ops = {
730 } 732 }
731 733
732static const struct ide_port_info siimage_chipsets[] __devinitdata = { 734static const struct ide_port_info siimage_chipsets[] __devinitdata = {
733 /* 0 */ DECLARE_SII_DEV("SiI680", &sil_pata_port_ops), 735 /* 0: SiI680 */ DECLARE_SII_DEV(&sil_pata_port_ops),
734 /* 1 */ DECLARE_SII_DEV("SiI3112 Serial ATA", &sil_sata_port_ops), 736 /* 1: SiI3112 */ DECLARE_SII_DEV(&sil_sata_port_ops)
735 /* 2 */ DECLARE_SII_DEV("Adaptec AAR-1210SA", &sil_sata_port_ops)
736}; 737};
737 738
738/** 739/**
@@ -761,7 +762,7 @@ static int __devinit siimage_init_one(struct pci_dev *dev,
761 static int first = 1; 762 static int first = 1;
762 763
763 if (first) { 764 if (first) {
764 printk(KERN_INFO "siimage: For full SATA support you " 765 printk(KERN_INFO DRV_NAME ": For full SATA support you "
765 "should use the libata sata_sil module.\n"); 766 "should use the libata sata_sil module.\n");
766 first = 0; 767 first = 0;
767 } 768 }
@@ -780,7 +781,7 @@ static int __devinit siimage_init_one(struct pci_dev *dev,
780 * seem to get terminally confused in the PCI spaces. 781 * seem to get terminally confused in the PCI spaces.
781 */ 782 */
782 if (!request_mem_region(bar5, barsize, d.name)) { 783 if (!request_mem_region(bar5, barsize, d.name)) {
783 printk(KERN_WARNING "siimage %s: MMIO ports not " 784 printk(KERN_WARNING DRV_NAME " %s: MMIO ports not "
784 "available\n", pci_name(dev)); 785 "available\n", pci_name(dev));
785 } else { 786 } else {
786 ioaddr = ioremap(bar5, barsize); 787 ioaddr = ioremap(bar5, barsize);
@@ -823,7 +824,7 @@ static const struct pci_device_id siimage_pci_tbl[] = {
823 { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_680), 0 }, 824 { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_680), 0 },
824#ifdef CONFIG_BLK_DEV_IDE_SATA 825#ifdef CONFIG_BLK_DEV_IDE_SATA
825 { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_3112), 1 }, 826 { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_3112), 1 },
826 { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_1210SA), 2 }, 827 { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_1210SA), 1 },
827#endif 828#endif
828 { 0, }, 829 { 0, },
829}; 830};
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index 518d8ab413f3..6fcb46c87871 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -52,6 +52,8 @@
52#include <linux/init.h> 52#include <linux/init.h>
53#include <linux/ide.h> 53#include <linux/ide.h>
54 54
55#define DRV_NAME "sis5513"
56
55/* registers layout and init values are chipset family dependant */ 57/* registers layout and init values are chipset family dependant */
56 58
57#define ATA_16 0x01 59#define ATA_16 0x01
@@ -380,7 +382,7 @@ static int __devinit sis_find_family(struct pci_dev *dev)
380 } 382 }
381 pci_dev_put(host); 383 pci_dev_put(host);
382 384
383 printk(KERN_INFO "SIS5513 %s: %s %s controller\n", 385 printk(KERN_INFO DRV_NAME " %s: %s %s controller\n",
384 pci_name(dev), SiSHostChipInfo[i].name, 386 pci_name(dev), SiSHostChipInfo[i].name,
385 chipset_capability[chipset_family]); 387 chipset_capability[chipset_family]);
386 } 388 }
@@ -397,7 +399,7 @@ static int __devinit sis_find_family(struct pci_dev *dev)
397 pci_write_config_dword(dev, 0x54, idemisc); 399 pci_write_config_dword(dev, 0x54, idemisc);
398 400
399 if (trueid == 0x5518) { 401 if (trueid == 0x5518) {
400 printk(KERN_INFO "SIS5513 %s: SiS 962/963 MuTIOL IDE UDMA133 controller\n", 402 printk(KERN_INFO DRV_NAME " %s: SiS 962/963 MuTIOL IDE UDMA133 controller\n",
401 pci_name(dev)); 403 pci_name(dev));
402 chipset_family = ATA_133; 404 chipset_family = ATA_133;
403 405
@@ -407,7 +409,7 @@ static int __devinit sis_find_family(struct pci_dev *dev)
407 */ 409 */
408 if ((idemisc & 0x40000000) == 0) { 410 if ((idemisc & 0x40000000) == 0) {
409 pci_write_config_dword(dev, 0x54, idemisc | 0x40000000); 411 pci_write_config_dword(dev, 0x54, idemisc | 0x40000000);
410 printk(KERN_INFO "SIS5513 %s: Switching to 5513 register mapping\n", 412 printk(KERN_INFO DRV_NAME " %s: Switching to 5513 register mapping\n",
411 pci_name(dev)); 413 pci_name(dev));
412 } 414 }
413 } 415 }
@@ -432,11 +434,11 @@ static int __devinit sis_find_family(struct pci_dev *dev)
432 pci_dev_put(lpc_bridge); 434 pci_dev_put(lpc_bridge);
433 435
434 if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) { 436 if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) {
435 printk(KERN_INFO "SIS5513 %s: SiS 961B MuTIOL IDE UDMA133 controller\n", 437 printk(KERN_INFO DRV_NAME " %s: SiS 961B MuTIOL IDE UDMA133 controller\n",
436 pci_name(dev)); 438 pci_name(dev));
437 chipset_family = ATA_133a; 439 chipset_family = ATA_133a;
438 } else { 440 } else {
439 printk(KERN_INFO "SIS5513 %s: SiS 961 MuTIOL IDE UDMA100 controller\n", 441 printk(KERN_INFO DRV_NAME " %s: SiS 961 MuTIOL IDE UDMA100 controller\n",
440 pci_name(dev)); 442 pci_name(dev));
441 chipset_family = ATA_100; 443 chipset_family = ATA_100;
442 } 444 }
@@ -560,7 +562,7 @@ static const struct ide_port_ops sis_ata133_port_ops = {
560}; 562};
561 563
562static const struct ide_port_info sis5513_chipset __devinitdata = { 564static const struct ide_port_info sis5513_chipset __devinitdata = {
563 .name = "SIS5513", 565 .name = DRV_NAME,
564 .init_chipset = init_chipset_sis5513, 566 .init_chipset = init_chipset_sis5513,
565 .enablebits = { {0x4a, 0x02, 0x02}, {0x4a, 0x04, 0x04} }, 567 .enablebits = { {0x4a, 0x02, 0x02}, {0x4a, 0x04, 0x04} },
566 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_NO_AUTODMA, 568 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_NO_AUTODMA,
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 72899f85c5ba..fa720db3de10 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -23,6 +23,8 @@
23 23
24#include <asm/io.h> 24#include <asm/io.h>
25 25
26#define DRV_NAME "sl82c105"
27
26#undef DEBUG 28#undef DEBUG
27 29
28#ifdef DEBUG 30#ifdef DEBUG
@@ -301,7 +303,7 @@ static const struct ide_dma_ops sl82c105_dma_ops = {
301}; 303};
302 304
303static const struct ide_port_info sl82c105_chipset __devinitdata = { 305static const struct ide_port_info sl82c105_chipset __devinitdata = {
304 .name = "W82C105", 306 .name = DRV_NAME,
305 .init_chipset = init_chipset_sl82c105, 307 .init_chipset = init_chipset_sl82c105,
306 .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}}, 308 .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
307 .port_ops = &sl82c105_port_ops, 309 .port_ops = &sl82c105_port_ops,
@@ -328,7 +330,7 @@ static int __devinit sl82c105_init_one(struct pci_dev *dev, const struct pci_dev
328 * Never ever EVER under any circumstances enable 330 * Never ever EVER under any circumstances enable
329 * DMA when the bridge is this old. 331 * DMA when the bridge is this old.
330 */ 332 */
331 printk(KERN_INFO "W82C105_IDE: Winbond W83C553 bridge " 333 printk(KERN_INFO DRV_NAME ": Winbond W83C553 bridge "
332 "revision %d, BM-DMA disabled\n", rev); 334 "revision %d, BM-DMA disabled\n", rev);
333 d.dma_ops = NULL; 335 d.dma_ops = NULL;
334 d.mwdma_mask = 0; 336 d.mwdma_mask = 0;
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index fee5ebe4bb99..13d1fa491f26 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -15,6 +15,8 @@
15#include <linux/ide.h> 15#include <linux/ide.h>
16#include <linux/init.h> 16#include <linux/init.h>
17 17
18#define DRV_NAME "slc90e66"
19
18static DEFINE_SPINLOCK(slc90e66_lock); 20static DEFINE_SPINLOCK(slc90e66_lock);
19 21
20static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) 22static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
@@ -132,7 +134,7 @@ static const struct ide_port_ops slc90e66_port_ops = {
132}; 134};
133 135
134static const struct ide_port_info slc90e66_chipset __devinitdata = { 136static const struct ide_port_info slc90e66_chipset __devinitdata = {
135 .name = "SLC90E66", 137 .name = DRV_NAME,
136 .enablebits = { {0x41, 0x80, 0x80}, {0x43, 0x80, 0x80} }, 138 .enablebits = { {0x41, 0x80, 0x80}, {0x43, 0x80, 0x80} },
137 .port_ops = &slc90e66_port_ops, 139 .port_ops = &slc90e66_port_ops,
138 .host_flags = IDE_HFLAG_LEGACY_IRQS, 140 .host_flags = IDE_HFLAG_LEGACY_IRQS,
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index 102cd7c40cdd..b1cb8a9ce5a9 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -11,7 +11,7 @@
11#include <linux/pci.h> 11#include <linux/pci.h>
12#include <linux/ide.h> 12#include <linux/ide.h>
13 13
14#define DRV_NAME "TC86C001" 14#define DRV_NAME "tc86c001"
15 15
16static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed) 16static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed)
17{ 17{
@@ -193,7 +193,7 @@ static const struct ide_dma_ops tc86c001_dma_ops = {
193}; 193};
194 194
195static const struct ide_port_info tc86c001_chipset __devinitdata = { 195static const struct ide_port_info tc86c001_chipset __devinitdata = {
196 .name = "TC86C001", 196 .name = DRV_NAME,
197 .init_hwif = init_hwif_tc86c001, 197 .init_hwif = init_hwif_tc86c001,
198 .port_ops = &tc86c001_port_ops, 198 .port_ops = &tc86c001_port_ops,
199 .dma_ops = &tc86c001_dma_ops, 199 .dma_ops = &tc86c001_dma_ops,
diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c
index 78e24ac80972..b77ec35151b3 100644
--- a/drivers/ide/pci/triflex.c
+++ b/drivers/ide/pci/triflex.c
@@ -33,6 +33,8 @@
33#include <linux/ide.h> 33#include <linux/ide.h>
34#include <linux/init.h> 34#include <linux/init.h>
35 35
36#define DRV_NAME "triflex"
37
36static void triflex_set_mode(ide_drive_t *drive, const u8 speed) 38static void triflex_set_mode(ide_drive_t *drive, const u8 speed)
37{ 39{
38 ide_hwif_t *hwif = HWIF(drive); 40 ide_hwif_t *hwif = HWIF(drive);
@@ -93,7 +95,7 @@ static const struct ide_port_ops triflex_port_ops = {
93}; 95};
94 96
95static const struct ide_port_info triflex_device __devinitdata = { 97static const struct ide_port_info triflex_device __devinitdata = {
96 .name = "TRIFLEX", 98 .name = DRV_NAME,
97 .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}}, 99 .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}},
98 .port_ops = &triflex_port_ops, 100 .port_ops = &triflex_port_ops,
99 .pio_mask = ATA_PIO4, 101 .pio_mask = ATA_PIO4,
diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c
index 7bda5ed92e1e..fd28b49977fd 100644
--- a/drivers/ide/pci/trm290.c
+++ b/drivers/ide/pci/trm290.c
@@ -141,6 +141,8 @@
141 141
142#include <asm/io.h> 142#include <asm/io.h>
143 143
144#define DRV_NAME "trm290"
145
144static void trm290_prepare_drive (ide_drive_t *drive, unsigned int use_dma) 146static void trm290_prepare_drive (ide_drive_t *drive, unsigned int use_dma)
145{ 147{
146 ide_hwif_t *hwif = HWIF(drive); 148 ide_hwif_t *hwif = HWIF(drive);
@@ -245,10 +247,10 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
245 u8 reg = 0; 247 u8 reg = 0;
246 248
247 if ((dev->class & 5) && cfg_base) 249 if ((dev->class & 5) && cfg_base)
248 printk(KERN_INFO "TRM290 %s: chip", pci_name(dev)); 250 printk(KERN_INFO DRV_NAME " %s: chip", pci_name(dev));
249 else { 251 else {
250 cfg_base = 0x3df0; 252 cfg_base = 0x3df0;
251 printk(KERN_INFO "TRM290 %s: using default", pci_name(dev)); 253 printk(KERN_INFO DRV_NAME " %s: using default", pci_name(dev));
252 } 254 }
253 printk(KERN_CONT " config base at 0x%04x\n", cfg_base); 255 printk(KERN_CONT " config base at 0x%04x\n", cfg_base);
254 hwif->config_data = cfg_base; 256 hwif->config_data = cfg_base;
@@ -325,7 +327,7 @@ static struct ide_dma_ops trm290_dma_ops = {
325}; 327};
326 328
327static const struct ide_port_info trm290_chipset __devinitdata = { 329static const struct ide_port_info trm290_chipset __devinitdata = {
328 .name = "TRM290", 330 .name = DRV_NAME,
329 .init_hwif = init_hwif_trm290, 331 .init_hwif = init_hwif_trm290,
330 .chipset = ide_trm290, 332 .chipset = ide_trm290,
331 .port_ops = &trm290_port_ops, 333 .port_ops = &trm290_port_ops,
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index 23332556e616..170e058f1fbd 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -35,6 +35,8 @@
35#include <asm/processor.h> 35#include <asm/processor.h>
36#endif 36#endif
37 37
38#define DRV_NAME "via82cxxx"
39
38#define VIA_IDE_ENABLE 0x40 40#define VIA_IDE_ENABLE 0x40
39#define VIA_IDE_CONFIG 0x41 41#define VIA_IDE_CONFIG 0x41
40#define VIA_FIFO_CONFIG 0x43 42#define VIA_FIFO_CONFIG 0x43
@@ -373,7 +375,7 @@ static const struct ide_port_ops via_port_ops = {
373}; 375};
374 376
375static const struct ide_port_info via82cxxx_chipset __devinitdata = { 377static const struct ide_port_info via82cxxx_chipset __devinitdata = {
376 .name = "VP_IDE", 378 .name = DRV_NAME,
377 .init_chipset = init_chipset_via82cxxx, 379 .init_chipset = init_chipset_via82cxxx,
378 .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } }, 380 .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
379 .port_ops = &via_port_ops, 381 .port_ops = &via_port_ops,
@@ -401,7 +403,7 @@ static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_i
401 */ 403 */
402 via_config = via_config_find(&isa); 404 via_config = via_config_find(&isa);
403 if (!via_config->id) { 405 if (!via_config->id) {
404 printk(KERN_WARNING "VP_IDE %s: unknown chipset, skipping\n", 406 printk(KERN_WARNING DRV_NAME " %s: unknown chipset, skipping\n",
405 pci_name(dev)); 407 pci_name(dev));
406 return -ENODEV; 408 return -ENODEV;
407 } 409 }
@@ -409,7 +411,7 @@ static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_i
409 /* 411 /*
410 * Print the boot message. 412 * Print the boot message.
411 */ 413 */
412 printk(KERN_INFO "VP_IDE %s: VIA %s (rev %02x) IDE %sDMA%s\n", 414 printk(KERN_INFO DRV_NAME " %s: VIA %s (rev %02x) IDE %sDMA%s\n",
413 pci_name(dev), via_config->name, isa->revision, 415 pci_name(dev), via_config->name, isa->revision,
414 via_config->udma_mask ? "U" : "MW", 416 via_config->udma_mask ? "U" : "MW",
415 via_dma[via_config->udma_mask ? 417 via_dma[via_config->udma_mask ?
@@ -429,9 +431,9 @@ static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_i
429 } 431 }
430 432
431 if (via_clock < 20000 || via_clock > 50000) { 433 if (via_clock < 20000 || via_clock > 50000) {
432 printk(KERN_WARNING "VP_IDE: User given PCI clock speed " 434 printk(KERN_WARNING DRV_NAME ": User given PCI clock speed "
433 "impossible (%d), using 33 MHz instead.\n", via_clock); 435 "impossible (%d), using 33 MHz instead.\n", via_clock);
434 printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want " 436 printk(KERN_WARNING DRV_NAME ": Use ide0=ata66 if you want "
435 "to assume 80-wire cable.\n"); 437 "to assume 80-wire cable.\n");
436 via_clock = 33333; 438 via_clock = 33333;
437 } 439 }
@@ -453,7 +455,8 @@ static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_i
453 455
454 vdev = kzalloc(sizeof(*vdev), GFP_KERNEL); 456 vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
455 if (!vdev) { 457 if (!vdev) {
456 printk(KERN_ERR "VP_IDE %s: out of memory :(\n", pci_name(dev)); 458 printk(KERN_ERR DRV_NAME " %s: out of memory :(\n",
459 pci_name(dev));
457 return -ENOMEM; 460 return -ENOMEM;
458 } 461 }
459 462
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-24 00:54:17 -0500