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-rw-r--r--drivers/net/au1000_eth.c18
-rw-r--r--drivers/net/ne.c31
-rw-r--r--drivers/net/sky2.c217
-rw-r--r--drivers/net/sky2.h3
-rw-r--r--drivers/net/spider_net.c12
-rw-r--r--drivers/net/spider_net.h2
-rw-r--r--drivers/net/sungem_phy.c45
-rw-r--r--drivers/net/sungem_phy.h1
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_main.c45
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_main.h6
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_phy.c2
-rw-r--r--drivers/net/wireless/bcm43xx/bcm43xx_wx.c7
12 files changed, 228 insertions, 161 deletions
diff --git a/drivers/net/au1000_eth.c b/drivers/net/au1000_eth.c
index 1363083b4d83..14dbad14afb6 100644
--- a/drivers/net/au1000_eth.c
+++ b/drivers/net/au1000_eth.c
@@ -52,6 +52,7 @@
52#include <linux/mii.h> 52#include <linux/mii.h>
53#include <linux/skbuff.h> 53#include <linux/skbuff.h>
54#include <linux/delay.h> 54#include <linux/delay.h>
55#include <linux/crc32.h>
55#include <asm/mipsregs.h> 56#include <asm/mipsregs.h>
56#include <asm/irq.h> 57#include <asm/irq.h>
57#include <asm/io.h> 58#include <asm/io.h>
@@ -2070,23 +2071,6 @@ static void au1000_tx_timeout(struct net_device *dev)
2070 netif_wake_queue(dev); 2071 netif_wake_queue(dev);
2071} 2072}
2072 2073
2073
2074static unsigned const ethernet_polynomial = 0x04c11db7U;
2075static inline u32 ether_crc(int length, unsigned char *data)
2076{
2077 int crc = -1;
2078
2079 while(--length >= 0) {
2080 unsigned char current_octet = *data++;
2081 int bit;
2082 for (bit = 0; bit < 8; bit++, current_octet >>= 1)
2083 crc = (crc << 1) ^
2084 ((crc < 0) ^ (current_octet & 1) ?
2085 ethernet_polynomial : 0);
2086 }
2087 return crc;
2088}
2089
2090static void set_rx_mode(struct net_device *dev) 2074static void set_rx_mode(struct net_device *dev)
2091{ 2075{
2092 struct au1000_private *aup = (struct au1000_private *) dev->priv; 2076 struct au1000_private *aup = (struct au1000_private *) dev->priv;
diff --git a/drivers/net/ne.c b/drivers/net/ne.c
index 93c494bcd18d..b32765215f75 100644
--- a/drivers/net/ne.c
+++ b/drivers/net/ne.c
@@ -139,8 +139,9 @@ bad_clone_list[] __initdata = {
139 139
140#if defined(CONFIG_PLAT_MAPPI) 140#if defined(CONFIG_PLAT_MAPPI)
141# define DCR_VAL 0x4b 141# define DCR_VAL 0x4b
142#elif defined(CONFIG_PLAT_OAKS32R) 142#elif defined(CONFIG_PLAT_OAKS32R) || \
143# define DCR_VAL 0x48 143 defined(CONFIG_TOSHIBA_RBTX4927) || defined(CONFIG_TOSHIBA_RBTX4938)
144# define DCR_VAL 0x48 /* 8-bit mode */
144#else 145#else
145# define DCR_VAL 0x49 146# define DCR_VAL 0x49
146#endif 147#endif
@@ -396,10 +397,22 @@ static int __init ne_probe1(struct net_device *dev, int ioaddr)
396 /* We must set the 8390 for word mode. */ 397 /* We must set the 8390 for word mode. */
397 outb_p(DCR_VAL, ioaddr + EN0_DCFG); 398 outb_p(DCR_VAL, ioaddr + EN0_DCFG);
398 start_page = NESM_START_PG; 399 start_page = NESM_START_PG;
399 stop_page = NESM_STOP_PG; 400
401 /*
402 * Realtek RTL8019AS datasheet says that the PSTOP register
403 * shouldn't exceed 0x60 in 8-bit mode.
404 * This chip can be identified by reading the signature from
405 * the remote byte count registers (otherwise write-only)...
406 */
407 if ((DCR_VAL & 0x01) == 0 && /* 8-bit mode */
408 inb(ioaddr + EN0_RCNTLO) == 0x50 &&
409 inb(ioaddr + EN0_RCNTHI) == 0x70)
410 stop_page = 0x60;
411 else
412 stop_page = NESM_STOP_PG;
400 } else { 413 } else {
401 start_page = NE1SM_START_PG; 414 start_page = NE1SM_START_PG;
402 stop_page = NE1SM_STOP_PG; 415 stop_page = NE1SM_STOP_PG;
403 } 416 }
404 417
405#if defined(CONFIG_PLAT_MAPPI) || defined(CONFIG_PLAT_OAKS32R) 418#if defined(CONFIG_PLAT_MAPPI) || defined(CONFIG_PLAT_OAKS32R)
@@ -509,15 +522,9 @@ static int __init ne_probe1(struct net_device *dev, int ioaddr)
509 ei_status.name = name; 522 ei_status.name = name;
510 ei_status.tx_start_page = start_page; 523 ei_status.tx_start_page = start_page;
511 ei_status.stop_page = stop_page; 524 ei_status.stop_page = stop_page;
512#if defined(CONFIG_TOSHIBA_RBTX4927) || defined(CONFIG_TOSHIBA_RBTX4938)
513 wordlength = 1;
514#endif
515 525
516#ifdef CONFIG_PLAT_OAKS32R 526 /* Use 16-bit mode only if this wasn't overridden by DCR_VAL */
517 ei_status.word16 = 0; 527 ei_status.word16 = (wordlength == 2 && (DCR_VAL & 0x01));
518#else
519 ei_status.word16 = (wordlength == 2);
520#endif
521 528
522 ei_status.rx_start_page = start_page + TX_PAGES; 529 ei_status.rx_start_page = start_page + TX_PAGES;
523#ifdef PACKETBUF_MEMSIZE 530#ifdef PACKETBUF_MEMSIZE
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 227df9876a2c..60cdfcabe1fd 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -51,7 +51,7 @@
51#include "sky2.h" 51#include "sky2.h"
52 52
53#define DRV_NAME "sky2" 53#define DRV_NAME "sky2"
54#define DRV_VERSION "1.2" 54#define DRV_VERSION "1.3"
55#define PFX DRV_NAME " " 55#define PFX DRV_NAME " "
56 56
57/* 57/*
@@ -79,6 +79,8 @@
79#define NAPI_WEIGHT 64 79#define NAPI_WEIGHT 64
80#define PHY_RETRIES 1000 80#define PHY_RETRIES 1000
81 81
82#define RING_NEXT(x,s) (((x)+1) & ((s)-1))
83
82static const u32 default_msg = 84static const u32 default_msg =
83 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK 85 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
84 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR 86 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
@@ -96,6 +98,10 @@ static int disable_msi = 0;
96module_param(disable_msi, int, 0); 98module_param(disable_msi, int, 0);
97MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)"); 99MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
98 100
101static int idle_timeout = 100;
102module_param(idle_timeout, int, 0);
103MODULE_PARM_DESC(idle_timeout, "Idle timeout workaround for lost interrupts (ms)");
104
99static const struct pci_device_id sky2_id_table[] = { 105static const struct pci_device_id sky2_id_table[] = {
100 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, 106 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) },
101 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, 107 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) },
@@ -298,7 +304,8 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
298 struct sky2_port *sky2 = netdev_priv(hw->dev[port]); 304 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
299 u16 ctrl, ct1000, adv, pg, ledctrl, ledover; 305 u16 ctrl, ct1000, adv, pg, ledctrl, ledover;
300 306
301 if (sky2->autoneg == AUTONEG_ENABLE && hw->chip_id != CHIP_ID_YUKON_XL) { 307 if (sky2->autoneg == AUTONEG_ENABLE &&
308 (hw->chip_id != CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U)) {
302 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL); 309 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
303 310
304 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK | 311 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
@@ -326,7 +333,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
326 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO); 333 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
327 334
328 if (sky2->autoneg == AUTONEG_ENABLE && 335 if (sky2->autoneg == AUTONEG_ENABLE &&
329 hw->chip_id == CHIP_ID_YUKON_XL) { 336 (hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U)) {
330 ctrl &= ~PHY_M_PC_DSC_MSK; 337 ctrl &= ~PHY_M_PC_DSC_MSK;
331 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA; 338 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
332 } 339 }
@@ -442,10 +449,11 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
442 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); 449 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
443 450
444 /* set LED Function Control register */ 451 /* set LED Function Control register */
445 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */ 452 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
446 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */ 453 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
447 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */ 454 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
448 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */ 455 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
456 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
449 457
450 /* set Polarity Control register */ 458 /* set Polarity Control register */
451 gm_phy_write(hw, port, PHY_MARV_PHY_STAT, 459 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
@@ -459,6 +467,25 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
459 /* restore page register */ 467 /* restore page register */
460 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); 468 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
461 break; 469 break;
470 case CHIP_ID_YUKON_EC_U:
471 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
472
473 /* select page 3 to access LED control register */
474 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
475
476 /* set LED Function Control register */
477 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
478 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
479 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
480 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
481 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
482
483 /* set Blink Rate in LED Timer Control Register */
484 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
485 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
486 /* restore page register */
487 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
488 break;
462 489
463 default: 490 default:
464 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */ 491 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
@@ -467,19 +494,21 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
467 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF); 494 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
468 } 495 }
469 496
470 if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev >= 2) { 497 if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev == CHIP_REV_YU_EC_A1) {
471 /* apply fixes in PHY AFE */ 498 /* apply fixes in PHY AFE */
472 gm_phy_write(hw, port, 22, 255); 499 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
500 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
501
473 /* increase differential signal amplitude in 10BASE-T */ 502 /* increase differential signal amplitude in 10BASE-T */
474 gm_phy_write(hw, port, 24, 0xaa99); 503 gm_phy_write(hw, port, 0x18, 0xaa99);
475 gm_phy_write(hw, port, 23, 0x2011); 504 gm_phy_write(hw, port, 0x17, 0x2011);
476 505
477 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */ 506 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
478 gm_phy_write(hw, port, 24, 0xa204); 507 gm_phy_write(hw, port, 0x18, 0xa204);
479 gm_phy_write(hw, port, 23, 0x2002); 508 gm_phy_write(hw, port, 0x17, 0x2002);
480 509
481 /* set page register to 0 */ 510 /* set page register to 0 */
482 gm_phy_write(hw, port, 22, 0); 511 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
483 } else { 512 } else {
484 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); 513 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
485 514
@@ -553,6 +582,11 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
553 582
554 if (sky2->duplex == DUPLEX_FULL) 583 if (sky2->duplex == DUPLEX_FULL)
555 reg |= GM_GPCR_DUP_FULL; 584 reg |= GM_GPCR_DUP_FULL;
585
586 /* turn off pause in 10/100mbps half duplex */
587 else if (sky2->speed != SPEED_1000 &&
588 hw->chip_id != CHIP_ID_YUKON_EC_U)
589 sky2->tx_pause = sky2->rx_pause = 0;
556 } else 590 } else
557 reg = GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100 | GM_GPCR_DUP_FULL; 591 reg = GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100 | GM_GPCR_DUP_FULL;
558 592
@@ -719,7 +753,7 @@ static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2)
719{ 753{
720 struct sky2_tx_le *le = sky2->tx_le + sky2->tx_prod; 754 struct sky2_tx_le *le = sky2->tx_le + sky2->tx_prod;
721 755
722 sky2->tx_prod = (sky2->tx_prod + 1) % TX_RING_SIZE; 756 sky2->tx_prod = RING_NEXT(sky2->tx_prod, TX_RING_SIZE);
723 return le; 757 return le;
724} 758}
725 759
@@ -735,7 +769,7 @@ static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
735static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2) 769static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
736{ 770{
737 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put; 771 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
738 sky2->rx_put = (sky2->rx_put + 1) % RX_LE_SIZE; 772 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
739 return le; 773 return le;
740} 774}
741 775
@@ -1078,7 +1112,7 @@ err_out:
1078/* Modular subtraction in ring */ 1112/* Modular subtraction in ring */
1079static inline int tx_dist(unsigned tail, unsigned head) 1113static inline int tx_dist(unsigned tail, unsigned head)
1080{ 1114{
1081 return (head - tail) % TX_RING_SIZE; 1115 return (head - tail) & (TX_RING_SIZE - 1);
1082} 1116}
1083 1117
1084/* Number of list elements available for next tx */ 1118/* Number of list elements available for next tx */
@@ -1255,7 +1289,7 @@ static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev)
1255 le->opcode = OP_BUFFER | HW_OWNER; 1289 le->opcode = OP_BUFFER | HW_OWNER;
1256 1290
1257 fre = sky2->tx_ring 1291 fre = sky2->tx_ring
1258 + ((re - sky2->tx_ring) + i + 1) % TX_RING_SIZE; 1292 + RING_NEXT((re - sky2->tx_ring) + i, TX_RING_SIZE);
1259 pci_unmap_addr_set(fre, mapaddr, mapping); 1293 pci_unmap_addr_set(fre, mapaddr, mapping);
1260 } 1294 }
1261 1295
@@ -1315,7 +1349,7 @@ static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
1315 1349
1316 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 1350 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1317 struct tx_ring_info *fre; 1351 struct tx_ring_info *fre;
1318 fre = sky2->tx_ring + (put + i + 1) % TX_RING_SIZE; 1352 fre = sky2->tx_ring + RING_NEXT(put + i, TX_RING_SIZE);
1319 pci_unmap_page(pdev, pci_unmap_addr(fre, mapaddr), 1353 pci_unmap_page(pdev, pci_unmap_addr(fre, mapaddr),
1320 skb_shinfo(skb)->frags[i].size, 1354 skb_shinfo(skb)->frags[i].size,
1321 PCI_DMA_TODEVICE); 1355 PCI_DMA_TODEVICE);
@@ -1498,17 +1532,26 @@ static void sky2_link_up(struct sky2_port *sky2)
1498 sky2_write8(hw, SK_REG(port, LNK_LED_REG), 1532 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
1499 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF); 1533 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
1500 1534
1501 if (hw->chip_id == CHIP_ID_YUKON_XL) { 1535 if (hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U) {
1502 u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); 1536 u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
1537 u16 led = PHY_M_LEDC_LOS_CTRL(1); /* link active */
1538
1539 switch(sky2->speed) {
1540 case SPEED_10:
1541 led |= PHY_M_LEDC_INIT_CTRL(7);
1542 break;
1543
1544 case SPEED_100:
1545 led |= PHY_M_LEDC_STA1_CTRL(7);
1546 break;
1547
1548 case SPEED_1000:
1549 led |= PHY_M_LEDC_STA0_CTRL(7);
1550 break;
1551 }
1503 1552
1504 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); 1553 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
1505 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */ 1554 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, led);
1506 PHY_M_LEDC_INIT_CTRL(sky2->speed ==
1507 SPEED_10 ? 7 : 0) |
1508 PHY_M_LEDC_STA1_CTRL(sky2->speed ==
1509 SPEED_100 ? 7 : 0) |
1510 PHY_M_LEDC_STA0_CTRL(sky2->speed ==
1511 SPEED_1000 ? 7 : 0));
1512 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); 1555 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
1513 } 1556 }
1514 1557
@@ -1583,7 +1626,7 @@ static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
1583 sky2->speed = sky2_phy_speed(hw, aux); 1626 sky2->speed = sky2_phy_speed(hw, aux);
1584 1627
1585 /* Pause bits are offset (9..8) */ 1628 /* Pause bits are offset (9..8) */
1586 if (hw->chip_id == CHIP_ID_YUKON_XL) 1629 if (hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U)
1587 aux >>= 6; 1630 aux >>= 6;
1588 1631
1589 sky2->rx_pause = (aux & PHY_M_PS_RX_P_EN) != 0; 1632 sky2->rx_pause = (aux & PHY_M_PS_RX_P_EN) != 0;
@@ -1859,35 +1902,28 @@ static inline void sky2_tx_done(struct net_device *dev, u16 last)
1859static int sky2_status_intr(struct sky2_hw *hw, int to_do) 1902static int sky2_status_intr(struct sky2_hw *hw, int to_do)
1860{ 1903{
1861 int work_done = 0; 1904 int work_done = 0;
1905 u16 hwidx = sky2_read16(hw, STAT_PUT_IDX);
1862 1906
1863 rmb(); 1907 rmb();
1864 1908
1865 for(;;) { 1909 while (hw->st_idx != hwidx) {
1866 struct sky2_status_le *le = hw->st_le + hw->st_idx; 1910 struct sky2_status_le *le = hw->st_le + hw->st_idx;
1867 struct net_device *dev; 1911 struct net_device *dev;
1868 struct sky2_port *sky2; 1912 struct sky2_port *sky2;
1869 struct sk_buff *skb; 1913 struct sk_buff *skb;
1870 u32 status; 1914 u32 status;
1871 u16 length; 1915 u16 length;
1872 u8 link, opcode;
1873 1916
1874 opcode = le->opcode; 1917 hw->st_idx = RING_NEXT(hw->st_idx, STATUS_RING_SIZE);
1875 if (!opcode)
1876 break;
1877 opcode &= ~HW_OWNER;
1878
1879 hw->st_idx = (hw->st_idx + 1) % STATUS_RING_SIZE;
1880 le->opcode = 0;
1881 1918
1882 link = le->link; 1919 BUG_ON(le->link >= 2);
1883 BUG_ON(link >= 2); 1920 dev = hw->dev[le->link];
1884 dev = hw->dev[link];
1885 1921
1886 sky2 = netdev_priv(dev); 1922 sky2 = netdev_priv(dev);
1887 length = le->length; 1923 length = le->length;
1888 status = le->status; 1924 status = le->status;
1889 1925
1890 switch (opcode) { 1926 switch (le->opcode & ~HW_OWNER) {
1891 case OP_RXSTAT: 1927 case OP_RXSTAT:
1892 skb = sky2_receive(sky2, length, status); 1928 skb = sky2_receive(sky2, length, status);
1893 if (!skb) 1929 if (!skb)
@@ -1927,7 +1963,8 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do)
1927 1963
1928 case OP_TXINDEXLE: 1964 case OP_TXINDEXLE:
1929 /* TX index reports status for both ports */ 1965 /* TX index reports status for both ports */
1930 sky2_tx_done(hw->dev[0], status & 0xffff); 1966 BUILD_BUG_ON(TX_RING_SIZE > 0x1000);
1967 sky2_tx_done(hw->dev[0], status & 0xfff);
1931 if (hw->dev[1]) 1968 if (hw->dev[1])
1932 sky2_tx_done(hw->dev[1], 1969 sky2_tx_done(hw->dev[1],
1933 ((status >> 24) & 0xff) 1970 ((status >> 24) & 0xff)
@@ -1937,8 +1974,8 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do)
1937 default: 1974 default:
1938 if (net_ratelimit()) 1975 if (net_ratelimit())
1939 printk(KERN_WARNING PFX 1976 printk(KERN_WARNING PFX
1940 "unknown status opcode 0x%x\n", opcode); 1977 "unknown status opcode 0x%x\n", le->opcode);
1941 break; 1978 goto exit_loop;
1942 } 1979 }
1943 } 1980 }
1944 1981
@@ -2089,12 +2126,13 @@ static void sky2_descriptor_error(struct sky2_hw *hw, unsigned port,
2089 */ 2126 */
2090static void sky2_idle(unsigned long arg) 2127static void sky2_idle(unsigned long arg)
2091{ 2128{
2092 struct net_device *dev = (struct net_device *) arg; 2129 struct sky2_hw *hw = (struct sky2_hw *) arg;
2130 struct net_device *dev = hw->dev[0];
2093 2131
2094 local_irq_disable();
2095 if (__netif_rx_schedule_prep(dev)) 2132 if (__netif_rx_schedule_prep(dev))
2096 __netif_rx_schedule(dev); 2133 __netif_rx_schedule(dev);
2097 local_irq_enable(); 2134
2135 mod_timer(&hw->idle_timer, jiffies + msecs_to_jiffies(idle_timeout));
2098} 2136}
2099 2137
2100 2138
@@ -2105,65 +2143,46 @@ static int sky2_poll(struct net_device *dev0, int *budget)
2105 int work_done = 0; 2143 int work_done = 0;
2106 u32 status = sky2_read32(hw, B0_Y2_SP_EISR); 2144 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
2107 2145
2108 restart_poll: 2146 if (status & Y2_IS_HW_ERR)
2109 if (unlikely(status & ~Y2_IS_STAT_BMU)) { 2147 sky2_hw_intr(hw);
2110 if (status & Y2_IS_HW_ERR)
2111 sky2_hw_intr(hw);
2112
2113 if (status & Y2_IS_IRQ_PHY1)
2114 sky2_phy_intr(hw, 0);
2115
2116 if (status & Y2_IS_IRQ_PHY2)
2117 sky2_phy_intr(hw, 1);
2118 2148
2119 if (status & Y2_IS_IRQ_MAC1) 2149 if (status & Y2_IS_IRQ_PHY1)
2120 sky2_mac_intr(hw, 0); 2150 sky2_phy_intr(hw, 0);
2121 2151
2122 if (status & Y2_IS_IRQ_MAC2) 2152 if (status & Y2_IS_IRQ_PHY2)
2123 sky2_mac_intr(hw, 1); 2153 sky2_phy_intr(hw, 1);
2124 2154
2125 if (status & Y2_IS_CHK_RX1) 2155 if (status & Y2_IS_IRQ_MAC1)
2126 sky2_descriptor_error(hw, 0, "receive", Y2_IS_CHK_RX1); 2156 sky2_mac_intr(hw, 0);
2127 2157
2128 if (status & Y2_IS_CHK_RX2) 2158 if (status & Y2_IS_IRQ_MAC2)
2129 sky2_descriptor_error(hw, 1, "receive", Y2_IS_CHK_RX2); 2159 sky2_mac_intr(hw, 1);
2130 2160
2131 if (status & Y2_IS_CHK_TXA1) 2161 if (status & Y2_IS_CHK_RX1)
2132 sky2_descriptor_error(hw, 0, "transmit", Y2_IS_CHK_TXA1); 2162 sky2_descriptor_error(hw, 0, "receive", Y2_IS_CHK_RX1);
2133 2163
2134 if (status & Y2_IS_CHK_TXA2) 2164 if (status & Y2_IS_CHK_RX2)
2135 sky2_descriptor_error(hw, 1, "transmit", Y2_IS_CHK_TXA2); 2165 sky2_descriptor_error(hw, 1, "receive", Y2_IS_CHK_RX2);
2136 }
2137 2166
2138 if (status & Y2_IS_STAT_BMU) { 2167 if (status & Y2_IS_CHK_TXA1)
2139 work_done += sky2_status_intr(hw, work_limit - work_done); 2168 sky2_descriptor_error(hw, 0, "transmit", Y2_IS_CHK_TXA1);
2140 *budget -= work_done;
2141 dev0->quota -= work_done;
2142 2169
2143 if (work_done >= work_limit) 2170 if (status & Y2_IS_CHK_TXA2)
2144 return 1; 2171 sky2_descriptor_error(hw, 1, "transmit", Y2_IS_CHK_TXA2);
2145 2172
2173 if (status & Y2_IS_STAT_BMU)
2146 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ); 2174 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2147 }
2148
2149 mod_timer(&hw->idle_timer, jiffies + HZ);
2150 2175
2151 local_irq_disable(); 2176 work_done = sky2_status_intr(hw, work_limit);
2152 __netif_rx_complete(dev0); 2177 *budget -= work_done;
2178 dev0->quota -= work_done;
2153 2179
2154 status = sky2_read32(hw, B0_Y2_SP_LISR); 2180 if (work_done >= work_limit)
2181 return 1;
2155 2182
2156 if (unlikely(status)) { 2183 netif_rx_complete(dev0);
2157 /* More work pending, try and keep going */
2158 if (__netif_rx_schedule_prep(dev0)) {
2159 __netif_rx_reschedule(dev0, work_done);
2160 status = sky2_read32(hw, B0_Y2_SP_EISR);
2161 local_irq_enable();
2162 goto restart_poll;
2163 }
2164 }
2165 2184
2166 local_irq_enable(); 2185 status = sky2_read32(hw, B0_Y2_SP_LISR);
2167 return 0; 2186 return 0;
2168} 2187}
2169 2188
@@ -2244,13 +2263,6 @@ static int __devinit sky2_reset(struct sky2_hw *hw)
2244 return -EOPNOTSUPP; 2263 return -EOPNOTSUPP;
2245 } 2264 }
2246 2265
2247 /* This chip is new and not tested yet */
2248 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
2249 pr_info(PFX "%s: is a version of Yukon 2 chipset that has not been tested yet.\n",
2250 pci_name(hw->pdev));
2251 pr_info("Please report success/failure to maintainer <shemminger@osdl.org>\n");
2252 }
2253
2254 /* disable ASF */ 2266 /* disable ASF */
2255 if (hw->chip_id <= CHIP_ID_YUKON_EC) { 2267 if (hw->chip_id <= CHIP_ID_YUKON_EC) {
2256 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET); 2268 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
@@ -3302,7 +3314,10 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
3302 3314
3303 sky2_write32(hw, B0_IMSK, Y2_IS_BASE); 3315 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
3304 3316
3305 setup_timer(&hw->idle_timer, sky2_idle, (unsigned long) dev); 3317 setup_timer(&hw->idle_timer, sky2_idle, (unsigned long) hw);
3318 if (idle_timeout > 0)
3319 mod_timer(&hw->idle_timer,
3320 jiffies + msecs_to_jiffies(idle_timeout));
3306 3321
3307 pci_set_drvdata(pdev, hw); 3322 pci_set_drvdata(pdev, hw);
3308 3323
@@ -3342,6 +3357,8 @@ static void __devexit sky2_remove(struct pci_dev *pdev)
3342 del_timer_sync(&hw->idle_timer); 3357 del_timer_sync(&hw->idle_timer);
3343 3358
3344 sky2_write32(hw, B0_IMSK, 0); 3359 sky2_write32(hw, B0_IMSK, 0);
3360 synchronize_irq(hw->pdev->irq);
3361
3345 dev0 = hw->dev[0]; 3362 dev0 = hw->dev[0];
3346 dev1 = hw->dev[1]; 3363 dev1 = hw->dev[1];
3347 if (dev1) 3364 if (dev1)
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index b026f5653f04..8012994c9b93 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -378,6 +378,9 @@ enum {
378 CHIP_REV_YU_EC_A1 = 0, /* Chip Rev. for Yukon-EC A1/A0 */ 378 CHIP_REV_YU_EC_A1 = 0, /* Chip Rev. for Yukon-EC A1/A0 */
379 CHIP_REV_YU_EC_A2 = 1, /* Chip Rev. for Yukon-EC A2 */ 379 CHIP_REV_YU_EC_A2 = 1, /* Chip Rev. for Yukon-EC A2 */
380 CHIP_REV_YU_EC_A3 = 2, /* Chip Rev. for Yukon-EC A3 */ 380 CHIP_REV_YU_EC_A3 = 2, /* Chip Rev. for Yukon-EC A3 */
381
382 CHIP_REV_YU_EC_U_A0 = 0,
383 CHIP_REV_YU_EC_U_A1 = 1,
381}; 384};
382 385
383/* B2_Y2_CLK_GATE 8 bit Clock Gating (Yukon-2 only) */ 386/* B2_Y2_CLK_GATE 8 bit Clock Gating (Yukon-2 only) */
diff --git a/drivers/net/spider_net.c b/drivers/net/spider_net.c
index 43f5e86fc559..394339d5e87c 100644
--- a/drivers/net/spider_net.c
+++ b/drivers/net/spider_net.c
@@ -1652,6 +1652,8 @@ spider_net_enable_card(struct spider_net_card *card)
1652 { SPIDER_NET_GFTRESTRT, SPIDER_NET_RESTART_VALUE }, 1652 { SPIDER_NET_GFTRESTRT, SPIDER_NET_RESTART_VALUE },
1653 1653
1654 { SPIDER_NET_GMRWOLCTRL, 0 }, 1654 { SPIDER_NET_GMRWOLCTRL, 0 },
1655 { SPIDER_NET_GTESTMD, 0x10000000 },
1656 { SPIDER_NET_GTTQMSK, 0x00400040 },
1655 { SPIDER_NET_GTESTMD, 0 }, 1657 { SPIDER_NET_GTESTMD, 0 },
1656 1658
1657 { SPIDER_NET_GMACINTEN, 0 }, 1659 { SPIDER_NET_GMACINTEN, 0 },
@@ -1792,15 +1794,7 @@ spider_net_setup_phy(struct spider_net_card *card)
1792 if (phy->def->ops->setup_forced) 1794 if (phy->def->ops->setup_forced)
1793 phy->def->ops->setup_forced(phy, SPEED_1000, DUPLEX_FULL); 1795 phy->def->ops->setup_forced(phy, SPEED_1000, DUPLEX_FULL);
1794 1796
1795 /* the following two writes could be moved to sungem_phy.c */ 1797 phy->def->ops->enable_fiber(phy);
1796 /* enable fiber mode */
1797 spider_net_write_phy(card->netdev, 1, MII_NCONFIG, 0x9020);
1798 /* LEDs active in both modes, autosense prio = fiber */
1799 spider_net_write_phy(card->netdev, 1, MII_NCONFIG, 0x945f);
1800
1801 /* switch off fibre autoneg */
1802 spider_net_write_phy(card->netdev, 1, MII_NCONFIG, 0xfc01);
1803 spider_net_write_phy(card->netdev, 1, 0x0b, 0x0004);
1804 1798
1805 phy->def->ops->read_link(phy); 1799 phy->def->ops->read_link(phy);
1806 pr_info("Found %s with %i Mbps, %s-duplex.\n", phy->def->name, 1800 pr_info("Found %s with %i Mbps, %s-duplex.\n", phy->def->name,
diff --git a/drivers/net/spider_net.h b/drivers/net/spider_net.h
index 5922b529a048..3b8d951cf73c 100644
--- a/drivers/net/spider_net.h
+++ b/drivers/net/spider_net.h
@@ -120,6 +120,8 @@ extern char spider_net_driver_name[];
120#define SPIDER_NET_GMRUAFILnR 0x00000500 120#define SPIDER_NET_GMRUAFILnR 0x00000500
121#define SPIDER_NET_GMRUA0FIL15R 0x00000578 121#define SPIDER_NET_GMRUA0FIL15R 0x00000578
122 122
123#define SPIDER_NET_GTTQMSK 0x00000934
124
123/* RX DMA controller registers, all 0x00000a.. are for DMA controller A, 125/* RX DMA controller registers, all 0x00000a.. are for DMA controller A,
124 * 0x00000b.. for DMA controller B, etc. */ 126 * 0x00000b.. for DMA controller B, etc. */
125#define SPIDER_NET_GDADCHA 0x00000a00 127#define SPIDER_NET_GDADCHA 0x00000a00
diff --git a/drivers/net/sungem_phy.c b/drivers/net/sungem_phy.c
index 046371ee5bbe..b2ddd5e79303 100644
--- a/drivers/net/sungem_phy.c
+++ b/drivers/net/sungem_phy.c
@@ -329,6 +329,30 @@ static int bcm5421_init(struct mii_phy* phy)
329 return 0; 329 return 0;
330} 330}
331 331
332static int bcm5421_enable_fiber(struct mii_phy* phy)
333{
334 /* enable fiber mode */
335 phy_write(phy, MII_NCONFIG, 0x9020);
336 /* LEDs active in both modes, autosense prio = fiber */
337 phy_write(phy, MII_NCONFIG, 0x945f);
338
339 /* switch off fibre autoneg */
340 phy_write(phy, MII_NCONFIG, 0xfc01);
341 phy_write(phy, 0x0b, 0x0004);
342
343 return 0;
344}
345
346static int bcm5461_enable_fiber(struct mii_phy* phy)
347{
348 phy_write(phy, MII_NCONFIG, 0xfc0c);
349 phy_write(phy, MII_BMCR, 0x4140);
350 phy_write(phy, MII_NCONFIG, 0xfc0b);
351 phy_write(phy, MII_BMCR, 0x0140);
352
353 return 0;
354}
355
332static int bcm54xx_setup_aneg(struct mii_phy *phy, u32 advertise) 356static int bcm54xx_setup_aneg(struct mii_phy *phy, u32 advertise)
333{ 357{
334 u16 ctl, adv; 358 u16 ctl, adv;
@@ -762,6 +786,7 @@ static struct mii_phy_ops bcm5421_phy_ops = {
762 .setup_forced = bcm54xx_setup_forced, 786 .setup_forced = bcm54xx_setup_forced,
763 .poll_link = genmii_poll_link, 787 .poll_link = genmii_poll_link,
764 .read_link = bcm54xx_read_link, 788 .read_link = bcm54xx_read_link,
789 .enable_fiber = bcm5421_enable_fiber,
765}; 790};
766 791
767static struct mii_phy_def bcm5421_phy_def = { 792static struct mii_phy_def bcm5421_phy_def = {
@@ -792,6 +817,25 @@ static struct mii_phy_def bcm5421k2_phy_def = {
792 .ops = &bcm5421k2_phy_ops 817 .ops = &bcm5421k2_phy_ops
793}; 818};
794 819
820static struct mii_phy_ops bcm5461_phy_ops = {
821 .init = bcm5421_init,
822 .suspend = generic_suspend,
823 .setup_aneg = bcm54xx_setup_aneg,
824 .setup_forced = bcm54xx_setup_forced,
825 .poll_link = genmii_poll_link,
826 .read_link = bcm54xx_read_link,
827 .enable_fiber = bcm5461_enable_fiber,
828};
829
830static struct mii_phy_def bcm5461_phy_def = {
831 .phy_id = 0x002060c0,
832 .phy_id_mask = 0xfffffff0,
833 .name = "BCM5461",
834 .features = MII_GBIT_FEATURES,
835 .magic_aneg = 1,
836 .ops = &bcm5461_phy_ops
837};
838
795/* Broadcom BCM 5462 built-in Vesta */ 839/* Broadcom BCM 5462 built-in Vesta */
796static struct mii_phy_ops bcm5462V_phy_ops = { 840static struct mii_phy_ops bcm5462V_phy_ops = {
797 .init = bcm5421_init, 841 .init = bcm5421_init,
@@ -857,6 +901,7 @@ static struct mii_phy_def* mii_phy_table[] = {
857 &bcm5411_phy_def, 901 &bcm5411_phy_def,
858 &bcm5421_phy_def, 902 &bcm5421_phy_def,
859 &bcm5421k2_phy_def, 903 &bcm5421k2_phy_def,
904 &bcm5461_phy_def,
860 &bcm5462V_phy_def, 905 &bcm5462V_phy_def,
861 &marvell_phy_def, 906 &marvell_phy_def,
862 &genmii_phy_def, 907 &genmii_phy_def,
diff --git a/drivers/net/sungem_phy.h b/drivers/net/sungem_phy.h
index 430544496c52..69e125197fcf 100644
--- a/drivers/net/sungem_phy.h
+++ b/drivers/net/sungem_phy.h
@@ -12,6 +12,7 @@ struct mii_phy_ops
12 int (*setup_forced)(struct mii_phy *phy, int speed, int fd); 12 int (*setup_forced)(struct mii_phy *phy, int speed, int fd);
13 int (*poll_link)(struct mii_phy *phy); 13 int (*poll_link)(struct mii_phy *phy);
14 int (*read_link)(struct mii_phy *phy); 14 int (*read_link)(struct mii_phy *phy);
15 int (*enable_fiber)(struct mii_phy *phy);
15}; 16};
16 17
17/* Structure used to statically define an mii/gii based PHY */ 18/* Structure used to statically define an mii/gii based PHY */
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_main.c b/drivers/net/wireless/bcm43xx/bcm43xx_main.c
index 9a06e61df0a2..e2982a83ae42 100644
--- a/drivers/net/wireless/bcm43xx/bcm43xx_main.c
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_main.c
@@ -939,9 +939,9 @@ static int bcm43xx_sprom_extract(struct bcm43xx_private *bcm)
939 return 0; 939 return 0;
940} 940}
941 941
942static void bcm43xx_geo_init(struct bcm43xx_private *bcm) 942static int bcm43xx_geo_init(struct bcm43xx_private *bcm)
943{ 943{
944 struct ieee80211_geo geo; 944 struct ieee80211_geo *geo;
945 struct ieee80211_channel *chan; 945 struct ieee80211_channel *chan;
946 int have_a = 0, have_bg = 0; 946 int have_a = 0, have_bg = 0;
947 int i; 947 int i;
@@ -949,7 +949,10 @@ static void bcm43xx_geo_init(struct bcm43xx_private *bcm)
949 struct bcm43xx_phyinfo *phy; 949 struct bcm43xx_phyinfo *phy;
950 const char *iso_country; 950 const char *iso_country;
951 951
952 memset(&geo, 0, sizeof(geo)); 952 geo = kzalloc(sizeof(*geo), GFP_KERNEL);
953 if (!geo)
954 return -ENOMEM;
955
953 for (i = 0; i < bcm->nr_80211_available; i++) { 956 for (i = 0; i < bcm->nr_80211_available; i++) {
954 phy = &(bcm->core_80211_ext[i].phy); 957 phy = &(bcm->core_80211_ext[i].phy);
955 switch (phy->type) { 958 switch (phy->type) {
@@ -967,31 +970,36 @@ static void bcm43xx_geo_init(struct bcm43xx_private *bcm)
967 iso_country = bcm43xx_locale_iso(bcm->sprom.locale); 970 iso_country = bcm43xx_locale_iso(bcm->sprom.locale);
968 971
969 if (have_a) { 972 if (have_a) {
970 for (i = 0, channel = 0; channel < 201; channel++) { 973 for (i = 0, channel = IEEE80211_52GHZ_MIN_CHANNEL;
971 chan = &geo.a[i++]; 974 channel <= IEEE80211_52GHZ_MAX_CHANNEL; channel++) {
975 chan = &geo->a[i++];
972 chan->freq = bcm43xx_channel_to_freq_a(channel); 976 chan->freq = bcm43xx_channel_to_freq_a(channel);
973 chan->channel = channel; 977 chan->channel = channel;
974 } 978 }
975 geo.a_channels = i; 979 geo->a_channels = i;
976 } 980 }
977 if (have_bg) { 981 if (have_bg) {
978 for (i = 0, channel = 1; channel < 15; channel++) { 982 for (i = 0, channel = IEEE80211_24GHZ_MIN_CHANNEL;
979 chan = &geo.bg[i++]; 983 channel <= IEEE80211_24GHZ_MAX_CHANNEL; channel++) {
984 chan = &geo->bg[i++];
980 chan->freq = bcm43xx_channel_to_freq_bg(channel); 985 chan->freq = bcm43xx_channel_to_freq_bg(channel);
981 chan->channel = channel; 986 chan->channel = channel;
982 } 987 }
983 geo.bg_channels = i; 988 geo->bg_channels = i;
984 } 989 }
985 memcpy(geo.name, iso_country, 2); 990 memcpy(geo->name, iso_country, 2);
986 if (0 /*TODO: Outdoor use only */) 991 if (0 /*TODO: Outdoor use only */)
987 geo.name[2] = 'O'; 992 geo->name[2] = 'O';
988 else if (0 /*TODO: Indoor use only */) 993 else if (0 /*TODO: Indoor use only */)
989 geo.name[2] = 'I'; 994 geo->name[2] = 'I';
990 else 995 else
991 geo.name[2] = ' '; 996 geo->name[2] = ' ';
992 geo.name[3] = '\0'; 997 geo->name[3] = '\0';
998
999 ieee80211_set_geo(bcm->ieee, geo);
1000 kfree(geo);
993 1001
994 ieee80211_set_geo(bcm->ieee, &geo); 1002 return 0;
995} 1003}
996 1004
997/* DummyTransmission function, as documented on 1005/* DummyTransmission function, as documented on
@@ -3479,16 +3487,17 @@ static int bcm43xx_attach_board(struct bcm43xx_private *bcm)
3479 goto err_80211_unwind; 3487 goto err_80211_unwind;
3480 bcm43xx_wireless_core_disable(bcm); 3488 bcm43xx_wireless_core_disable(bcm);
3481 } 3489 }
3490 err = bcm43xx_geo_init(bcm);
3491 if (err)
3492 goto err_80211_unwind;
3482 bcm43xx_pctl_set_crystal(bcm, 0); 3493 bcm43xx_pctl_set_crystal(bcm, 0);
3483 3494
3484 /* Set the MAC address in the networking subsystem */ 3495 /* Set the MAC address in the networking subsystem */
3485 if (bcm43xx_current_phy(bcm)->type == BCM43xx_PHYTYPE_A) 3496 if (is_valid_ether_addr(bcm->sprom.et1macaddr))
3486 memcpy(bcm->net_dev->dev_addr, bcm->sprom.et1macaddr, 6); 3497 memcpy(bcm->net_dev->dev_addr, bcm->sprom.et1macaddr, 6);
3487 else 3498 else
3488 memcpy(bcm->net_dev->dev_addr, bcm->sprom.il0macaddr, 6); 3499 memcpy(bcm->net_dev->dev_addr, bcm->sprom.il0macaddr, 6);
3489 3500
3490 bcm43xx_geo_init(bcm);
3491
3492 snprintf(bcm->nick, IW_ESSID_MAX_SIZE, 3501 snprintf(bcm->nick, IW_ESSID_MAX_SIZE,
3493 "Broadcom %04X", bcm->chip_id); 3502 "Broadcom %04X", bcm->chip_id);
3494 3503
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_main.h b/drivers/net/wireless/bcm43xx/bcm43xx_main.h
index eca79a38594a..30a202b258b5 100644
--- a/drivers/net/wireless/bcm43xx/bcm43xx_main.h
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_main.h
@@ -118,12 +118,14 @@ int bcm43xx_channel_to_freq(struct bcm43xx_private *bcm,
118static inline 118static inline
119int bcm43xx_is_valid_channel_a(u8 channel) 119int bcm43xx_is_valid_channel_a(u8 channel)
120{ 120{
121 return (channel <= 200); 121 return (channel >= IEEE80211_52GHZ_MIN_CHANNEL
122 && channel <= IEEE80211_52GHZ_MAX_CHANNEL);
122} 123}
123static inline 124static inline
124int bcm43xx_is_valid_channel_bg(u8 channel) 125int bcm43xx_is_valid_channel_bg(u8 channel)
125{ 126{
126 return (channel >= 1 && channel <= 14); 127 return (channel >= IEEE80211_24GHZ_MIN_CHANNEL
128 && channel <= IEEE80211_24GHZ_MAX_CHANNEL);
127} 129}
128static inline 130static inline
129int bcm43xx_is_valid_channel(struct bcm43xx_private *bcm, 131int bcm43xx_is_valid_channel(struct bcm43xx_private *bcm,
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_phy.c b/drivers/net/wireless/bcm43xx/bcm43xx_phy.c
index 33137165727f..b0abac515530 100644
--- a/drivers/net/wireless/bcm43xx/bcm43xx_phy.c
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_phy.c
@@ -1287,7 +1287,7 @@ static void bcm43xx_phy_initg(struct bcm43xx_private *bcm)
1287 if (radio->revision == 8) 1287 if (radio->revision == 8)
1288 bcm43xx_phy_write(bcm, 0x0805, 0x3230); 1288 bcm43xx_phy_write(bcm, 0x0805, 0x3230);
1289 bcm43xx_phy_init_pctl(bcm); 1289 bcm43xx_phy_init_pctl(bcm);
1290 if (bcm->chip_id == 0x4306 && bcm->chip_package != 2) { 1290 if (bcm->chip_id == 0x4306 && bcm->chip_package == 2) {
1291 bcm43xx_phy_write(bcm, 0x0429, 1291 bcm43xx_phy_write(bcm, 0x0429,
1292 bcm43xx_phy_read(bcm, 0x0429) & 0xBFFF); 1292 bcm43xx_phy_read(bcm, 0x0429) & 0xBFFF);
1293 bcm43xx_phy_write(bcm, 0x04C3, 1293 bcm43xx_phy_write(bcm, 0x04C3,
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_wx.c b/drivers/net/wireless/bcm43xx/bcm43xx_wx.c
index 3edbb481a0a0..b45063974ae9 100644
--- a/drivers/net/wireless/bcm43xx/bcm43xx_wx.c
+++ b/drivers/net/wireless/bcm43xx/bcm43xx_wx.c
@@ -182,8 +182,11 @@ static int bcm43xx_wx_set_mode(struct net_device *net_dev,
182 mode = BCM43xx_INITIAL_IWMODE; 182 mode = BCM43xx_INITIAL_IWMODE;
183 183
184 bcm43xx_lock_mmio(bcm, flags); 184 bcm43xx_lock_mmio(bcm, flags);
185 if (bcm->ieee->iw_mode != mode) 185 if (bcm->initialized) {
186 bcm43xx_set_iwmode(bcm, mode); 186 if (bcm->ieee->iw_mode != mode)
187 bcm43xx_set_iwmode(bcm, mode);
188 } else
189 bcm->ieee->iw_mode = mode;
187 bcm43xx_unlock_mmio(bcm, flags); 190 bcm43xx_unlock_mmio(bcm, flags);
188 191
189 return 0; 192 return 0;