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-rw-r--r--drivers/net/sk98lin/h/skaddr.h48
-rw-r--r--drivers/net/sk98lin/h/skcsum.h6
-rw-r--r--drivers/net/sk98lin/h/skgeinit.h56
-rw-r--r--drivers/net/sk98lin/h/skgepnmi.h4
-rw-r--r--drivers/net/sk98lin/h/skgesirq.h1
-rw-r--r--drivers/net/sk98lin/h/ski2c.h3
-rw-r--r--drivers/net/sk98lin/h/skvpd.h15
-rw-r--r--drivers/net/sk98lin/skaddr.c35
-rw-r--r--drivers/net/sk98lin/skgeinit.c148
-rw-r--r--drivers/net/sk98lin/skgemib.c7
-rw-r--r--drivers/net/sk98lin/skgepnmi.c153
-rw-r--r--drivers/net/sk98lin/skgesirq.c24
-rw-r--r--drivers/net/sk98lin/ski2c.c6
-rw-r--r--drivers/net/sk98lin/sklm80.c72
-rw-r--r--drivers/net/sk98lin/skrlmt.c1
-rw-r--r--drivers/net/sk98lin/skvpd.c108
-rw-r--r--drivers/net/sk98lin/skxmac2.c461
17 files changed, 40 insertions, 1108 deletions
diff --git a/drivers/net/sk98lin/h/skaddr.h b/drivers/net/sk98lin/h/skaddr.h
index 3a2ea4a4b539..423ad063d09b 100644
--- a/drivers/net/sk98lin/h/skaddr.h
+++ b/drivers/net/sk98lin/h/skaddr.h
@@ -236,18 +236,6 @@ extern int SkAddrMcClear(
236 SK_U32 PortNumber, 236 SK_U32 PortNumber,
237 int Flags); 237 int Flags);
238 238
239extern int SkAddrXmacMcClear(
240 SK_AC *pAC,
241 SK_IOC IoC,
242 SK_U32 PortNumber,
243 int Flags);
244
245extern int SkAddrGmacMcClear(
246 SK_AC *pAC,
247 SK_IOC IoC,
248 SK_U32 PortNumber,
249 int Flags);
250
251extern int SkAddrMcAdd( 239extern int SkAddrMcAdd(
252 SK_AC *pAC, 240 SK_AC *pAC,
253 SK_IOC IoC, 241 SK_IOC IoC,
@@ -255,35 +243,11 @@ extern int SkAddrMcAdd(
255 SK_MAC_ADDR *pMc, 243 SK_MAC_ADDR *pMc,
256 int Flags); 244 int Flags);
257 245
258extern int SkAddrXmacMcAdd(
259 SK_AC *pAC,
260 SK_IOC IoC,
261 SK_U32 PortNumber,
262 SK_MAC_ADDR *pMc,
263 int Flags);
264
265extern int SkAddrGmacMcAdd(
266 SK_AC *pAC,
267 SK_IOC IoC,
268 SK_U32 PortNumber,
269 SK_MAC_ADDR *pMc,
270 int Flags);
271
272extern int SkAddrMcUpdate( 246extern int SkAddrMcUpdate(
273 SK_AC *pAC, 247 SK_AC *pAC,
274 SK_IOC IoC, 248 SK_IOC IoC,
275 SK_U32 PortNumber); 249 SK_U32 PortNumber);
276 250
277extern int SkAddrXmacMcUpdate(
278 SK_AC *pAC,
279 SK_IOC IoC,
280 SK_U32 PortNumber);
281
282extern int SkAddrGmacMcUpdate(
283 SK_AC *pAC,
284 SK_IOC IoC,
285 SK_U32 PortNumber);
286
287extern int SkAddrOverride( 251extern int SkAddrOverride(
288 SK_AC *pAC, 252 SK_AC *pAC,
289 SK_IOC IoC, 253 SK_IOC IoC,
@@ -297,18 +261,6 @@ extern int SkAddrPromiscuousChange(
297 SK_U32 PortNumber, 261 SK_U32 PortNumber,
298 int NewPromMode); 262 int NewPromMode);
299 263
300extern int SkAddrXmacPromiscuousChange(
301 SK_AC *pAC,
302 SK_IOC IoC,
303 SK_U32 PortNumber,
304 int NewPromMode);
305
306extern int SkAddrGmacPromiscuousChange(
307 SK_AC *pAC,
308 SK_IOC IoC,
309 SK_U32 PortNumber,
310 int NewPromMode);
311
312#ifndef SK_SLIM 264#ifndef SK_SLIM
313extern int SkAddrSwap( 265extern int SkAddrSwap(
314 SK_AC *pAC, 266 SK_AC *pAC,
diff --git a/drivers/net/sk98lin/h/skcsum.h b/drivers/net/sk98lin/h/skcsum.h
index 2b94adb93331..6e256bd9a28c 100644
--- a/drivers/net/sk98lin/h/skcsum.h
+++ b/drivers/net/sk98lin/h/skcsum.h
@@ -203,12 +203,6 @@ extern SKCS_STATUS SkCsGetReceiveInfo(
203 unsigned Checksum2, 203 unsigned Checksum2,
204 int NetNumber); 204 int NetNumber);
205 205
206extern void SkCsGetSendInfo(
207 SK_AC *pAc,
208 void *pIpHeader,
209 SKCS_PACKET_INFO *pPacketInfo,
210 int NetNumber);
211
212extern void SkCsSetReceiveFlags( 206extern void SkCsSetReceiveFlags(
213 SK_AC *pAc, 207 SK_AC *pAc,
214 unsigned ReceiveFlags, 208 unsigned ReceiveFlags,
diff --git a/drivers/net/sk98lin/h/skgeinit.h b/drivers/net/sk98lin/h/skgeinit.h
index 184f47c5a60f..143e635ec24d 100644
--- a/drivers/net/sk98lin/h/skgeinit.h
+++ b/drivers/net/sk98lin/h/skgeinit.h
@@ -464,12 +464,6 @@ typedef struct s_GeInit {
464/* 464/*
465 * public functions in skgeinit.c 465 * public functions in skgeinit.c
466 */ 466 */
467extern void SkGePollRxD(
468 SK_AC *pAC,
469 SK_IOC IoC,
470 int Port,
471 SK_BOOL PollRxD);
472
473extern void SkGePollTxD( 467extern void SkGePollTxD(
474 SK_AC *pAC, 468 SK_AC *pAC,
475 SK_IOC IoC, 469 SK_IOC IoC,
@@ -522,10 +516,6 @@ extern void SkGeXmitLED(
522 int Led, 516 int Led,
523 int Mode); 517 int Mode);
524 518
525extern void SkGeInitRamIface(
526 SK_AC *pAC,
527 SK_IOC IoC);
528
529extern int SkGeInitAssignRamToQueues( 519extern int SkGeInitAssignRamToQueues(
530 SK_AC *pAC, 520 SK_AC *pAC,
531 int ActivePort, 521 int ActivePort,
@@ -549,11 +539,6 @@ extern void SkMacHardRst(
549 SK_IOC IoC, 539 SK_IOC IoC,
550 int Port); 540 int Port);
551 541
552extern void SkMacClearRst(
553 SK_AC *pAC,
554 SK_IOC IoC,
555 int Port);
556
557extern void SkXmInitMac( 542extern void SkXmInitMac(
558 SK_AC *pAC, 543 SK_AC *pAC,
559 SK_IOC IoC, 544 SK_IOC IoC,
@@ -580,11 +565,6 @@ extern void SkMacFlushTxFifo(
580 SK_IOC IoC, 565 SK_IOC IoC,
581 int Port); 566 int Port);
582 567
583extern void SkMacFlushRxFifo(
584 SK_AC *pAC,
585 SK_IOC IoC,
586 int Port);
587
588extern void SkMacIrq( 568extern void SkMacIrq(
589 SK_AC *pAC, 569 SK_AC *pAC,
590 SK_IOC IoC, 570 SK_IOC IoC,
@@ -601,12 +581,6 @@ extern void SkMacAutoNegLipaPhy(
601 int Port, 581 int Port,
602 SK_U16 IStatus); 582 SK_U16 IStatus);
603 583
604extern void SkMacSetRxTxEn(
605 SK_AC *pAC,
606 SK_IOC IoC,
607 int Port,
608 int Para);
609
610extern int SkMacRxTxEnable( 584extern int SkMacRxTxEnable(
611 SK_AC *pAC, 585 SK_AC *pAC,
612 SK_IOC IoC, 586 SK_IOC IoC,
@@ -659,16 +633,6 @@ extern void SkXmClrExactAddr(
659 int StartNum, 633 int StartNum,
660 int StopNum); 634 int StopNum);
661 635
662extern void SkXmInitDupMd(
663 SK_AC *pAC,
664 SK_IOC IoC,
665 int Port);
666
667extern void SkXmInitPauseMd(
668 SK_AC *pAC,
669 SK_IOC IoC,
670 int Port);
671
672extern void SkXmAutoNegLipaXmac( 636extern void SkXmAutoNegLipaXmac(
673 SK_AC *pAC, 637 SK_AC *pAC,
674 SK_IOC IoC, 638 SK_IOC IoC,
@@ -729,17 +693,6 @@ extern int SkGmCableDiagStatus(
729 int Port, 693 int Port,
730 SK_BOOL StartTest); 694 SK_BOOL StartTest);
731 695
732extern int SkGmEnterLowPowerMode(
733 SK_AC *pAC,
734 SK_IOC IoC,
735 int Port,
736 SK_U8 Mode);
737
738extern int SkGmLeaveLowPowerMode(
739 SK_AC *pAC,
740 SK_IOC IoC,
741 int Port);
742
743#ifdef SK_DIAG 696#ifdef SK_DIAG
744extern void SkGePhyRead( 697extern void SkGePhyRead(
745 SK_AC *pAC, 698 SK_AC *pAC,
@@ -782,7 +735,6 @@ extern void SkXmSendCont(
782/* 735/*
783 * public functions in skgeinit.c 736 * public functions in skgeinit.c
784 */ 737 */
785extern void SkGePollRxD();
786extern void SkGePollTxD(); 738extern void SkGePollTxD();
787extern void SkGeYellowLED(); 739extern void SkGeYellowLED();
788extern int SkGeCfgSync(); 740extern int SkGeCfgSync();
@@ -792,7 +744,6 @@ extern int SkGeInit();
792extern void SkGeDeInit(); 744extern void SkGeDeInit();
793extern int SkGeInitPort(); 745extern int SkGeInitPort();
794extern void SkGeXmitLED(); 746extern void SkGeXmitLED();
795extern void SkGeInitRamIface();
796extern int SkGeInitAssignRamToQueues(); 747extern int SkGeInitAssignRamToQueues();
797 748
798/* 749/*
@@ -801,18 +752,15 @@ extern int SkGeInitAssignRamToQueues();
801extern void SkMacRxTxDisable(); 752extern void SkMacRxTxDisable();
802extern void SkMacSoftRst(); 753extern void SkMacSoftRst();
803extern void SkMacHardRst(); 754extern void SkMacHardRst();
804extern void SkMacClearRst();
805extern void SkMacInitPhy(); 755extern void SkMacInitPhy();
806extern int SkMacRxTxEnable(); 756extern int SkMacRxTxEnable();
807extern void SkMacPromiscMode(); 757extern void SkMacPromiscMode();
808extern void SkMacHashing(); 758extern void SkMacHashing();
809extern void SkMacIrqDisable(); 759extern void SkMacIrqDisable();
810extern void SkMacFlushTxFifo(); 760extern void SkMacFlushTxFifo();
811extern void SkMacFlushRxFifo();
812extern void SkMacIrq(); 761extern void SkMacIrq();
813extern int SkMacAutoNegDone(); 762extern int SkMacAutoNegDone();
814extern void SkMacAutoNegLipaPhy(); 763extern void SkMacAutoNegLipaPhy();
815extern void SkMacSetRxTxEn();
816extern void SkXmInitMac(); 764extern void SkXmInitMac();
817extern void SkXmPhyRead(); 765extern void SkXmPhyRead();
818extern void SkXmPhyWrite(); 766extern void SkXmPhyWrite();
@@ -820,8 +768,6 @@ extern void SkGmInitMac();
820extern void SkGmPhyRead(); 768extern void SkGmPhyRead();
821extern void SkGmPhyWrite(); 769extern void SkGmPhyWrite();
822extern void SkXmClrExactAddr(); 770extern void SkXmClrExactAddr();
823extern void SkXmInitDupMd();
824extern void SkXmInitPauseMd();
825extern void SkXmAutoNegLipaXmac(); 771extern void SkXmAutoNegLipaXmac();
826extern int SkXmUpdateStats(); 772extern int SkXmUpdateStats();
827extern int SkGmUpdateStats(); 773extern int SkGmUpdateStats();
@@ -832,8 +778,6 @@ extern int SkGmResetCounter();
832extern int SkXmOverflowStatus(); 778extern int SkXmOverflowStatus();
833extern int SkGmOverflowStatus(); 779extern int SkGmOverflowStatus();
834extern int SkGmCableDiagStatus(); 780extern int SkGmCableDiagStatus();
835extern int SkGmEnterLowPowerMode();
836extern int SkGmLeaveLowPowerMode();
837 781
838#ifdef SK_DIAG 782#ifdef SK_DIAG
839extern void SkGePhyRead(); 783extern void SkGePhyRead();
diff --git a/drivers/net/sk98lin/h/skgepnmi.h b/drivers/net/sk98lin/h/skgepnmi.h
index 3b2773e6f822..1ed214ccb253 100644
--- a/drivers/net/sk98lin/h/skgepnmi.h
+++ b/drivers/net/sk98lin/h/skgepnmi.h
@@ -946,10 +946,6 @@ typedef struct s_PnmiData {
946 * Function prototypes 946 * Function prototypes
947 */ 947 */
948extern int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int Level); 948extern int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int Level);
949extern int SkPnmiGetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf,
950 unsigned int* pLen, SK_U32 Instance, SK_U32 NetIndex);
951extern int SkPnmiPreSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id,
952 void* pBuf, unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
953extern int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf, 949extern int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf,
954 unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex); 950 unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
955extern int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void* pBuf, 951extern int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void* pBuf,
diff --git a/drivers/net/sk98lin/h/skgesirq.h b/drivers/net/sk98lin/h/skgesirq.h
index b486bd9b6628..3eec6274e413 100644
--- a/drivers/net/sk98lin/h/skgesirq.h
+++ b/drivers/net/sk98lin/h/skgesirq.h
@@ -105,7 +105,6 @@
105 105
106extern void SkGeSirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus); 106extern void SkGeSirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus);
107extern int SkGeSirqEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para); 107extern int SkGeSirqEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
108extern void SkHWLinkUp(SK_AC *pAC, SK_IOC IoC, int Port);
109extern void SkHWLinkDown(SK_AC *pAC, SK_IOC IoC, int Port); 108extern void SkHWLinkDown(SK_AC *pAC, SK_IOC IoC, int Port);
110 109
111#endif /* _INC_SKGESIRQ_H_ */ 110#endif /* _INC_SKGESIRQ_H_ */
diff --git a/drivers/net/sk98lin/h/ski2c.h b/drivers/net/sk98lin/h/ski2c.h
index 598bb42ccc3d..6a63f4a15de6 100644
--- a/drivers/net/sk98lin/h/ski2c.h
+++ b/drivers/net/sk98lin/h/ski2c.h
@@ -162,9 +162,6 @@ typedef struct s_I2c {
162} SK_I2C; 162} SK_I2C;
163 163
164extern int SkI2cInit(SK_AC *pAC, SK_IOC IoC, int Level); 164extern int SkI2cInit(SK_AC *pAC, SK_IOC IoC, int Level);
165extern int SkI2cWrite(SK_AC *pAC, SK_IOC IoC, SK_U32 Data, int Dev, int Size,
166 int Reg, int Burst);
167extern int SkI2cReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
168#ifdef SK_DIAG 165#ifdef SK_DIAG
169extern SK_U32 SkI2cRead(SK_AC *pAC, SK_IOC IoC, int Dev, int Size, int Reg, 166extern SK_U32 SkI2cRead(SK_AC *pAC, SK_IOC IoC, int Dev, int Size, int Reg,
170 int Burst); 167 int Burst);
diff --git a/drivers/net/sk98lin/h/skvpd.h b/drivers/net/sk98lin/h/skvpd.h
index daa9a8d154fc..fdd9e48e8040 100644
--- a/drivers/net/sk98lin/h/skvpd.h
+++ b/drivers/net/sk98lin/h/skvpd.h
@@ -183,14 +183,6 @@ extern SK_U32 VpdReadDWord(
183 int addr); 183 int addr);
184#endif /* SKDIAG */ 184#endif /* SKDIAG */
185 185
186extern int VpdSetupPara(
187 SK_AC *pAC,
188 const char *key,
189 const char *buf,
190 int len,
191 int type,
192 int op);
193
194extern SK_VPD_STATUS *VpdStat( 186extern SK_VPD_STATUS *VpdStat(
195 SK_AC *pAC, 187 SK_AC *pAC,
196 SK_IOC IoC); 188 SK_IOC IoC);
@@ -227,11 +219,6 @@ extern int VpdUpdate(
227 SK_AC *pAC, 219 SK_AC *pAC,
228 SK_IOC IoC); 220 SK_IOC IoC);
229 221
230extern void VpdErrLog(
231 SK_AC *pAC,
232 SK_IOC IoC,
233 char *msg);
234
235#ifdef SKDIAG 222#ifdef SKDIAG
236extern int VpdReadBlock( 223extern int VpdReadBlock(
237 SK_AC *pAC, 224 SK_AC *pAC,
@@ -249,7 +236,6 @@ extern int VpdWriteBlock(
249#endif /* SKDIAG */ 236#endif /* SKDIAG */
250#else /* SK_KR_PROTO */ 237#else /* SK_KR_PROTO */
251extern SK_U32 VpdReadDWord(); 238extern SK_U32 VpdReadDWord();
252extern int VpdSetupPara();
253extern SK_VPD_STATUS *VpdStat(); 239extern SK_VPD_STATUS *VpdStat();
254extern int VpdKeys(); 240extern int VpdKeys();
255extern int VpdRead(); 241extern int VpdRead();
@@ -257,7 +243,6 @@ extern SK_BOOL VpdMayWrite();
257extern int VpdWrite(); 243extern int VpdWrite();
258extern int VpdDelete(); 244extern int VpdDelete();
259extern int VpdUpdate(); 245extern int VpdUpdate();
260extern void VpdErrLog();
261#endif /* SK_KR_PROTO */ 246#endif /* SK_KR_PROTO */
262 247
263#endif /* __INC_SKVPD_H_ */ 248#endif /* __INC_SKVPD_H_ */
diff --git a/drivers/net/sk98lin/skaddr.c b/drivers/net/sk98lin/skaddr.c
index a7e25edc7fc4..6e6c56aa6d6f 100644
--- a/drivers/net/sk98lin/skaddr.c
+++ b/drivers/net/sk98lin/skaddr.c
@@ -87,6 +87,21 @@ static const SK_U16 OnesHash[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
87static int Next0[SK_MAX_MACS] = {0}; 87static int Next0[SK_MAX_MACS] = {0};
88#endif /* DEBUG */ 88#endif /* DEBUG */
89 89
90static int SkAddrGmacMcAdd(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
91 SK_MAC_ADDR *pMc, int Flags);
92static int SkAddrGmacMcClear(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
93 int Flags);
94static int SkAddrGmacMcUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber);
95static int SkAddrGmacPromiscuousChange(SK_AC *pAC, SK_IOC IoC,
96 SK_U32 PortNumber, int NewPromMode);
97static int SkAddrXmacMcAdd(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
98 SK_MAC_ADDR *pMc, int Flags);
99static int SkAddrXmacMcClear(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
100 int Flags);
101static int SkAddrXmacMcUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber);
102static int SkAddrXmacPromiscuousChange(SK_AC *pAC, SK_IOC IoC,
103 SK_U32 PortNumber, int NewPromMode);
104
90/* functions ******************************************************************/ 105/* functions ******************************************************************/
91 106
92/****************************************************************************** 107/******************************************************************************
@@ -372,7 +387,7 @@ int Flags) /* permanent/non-perm, sw-only */
372 * SK_ADDR_SUCCESS 387 * SK_ADDR_SUCCESS
373 * SK_ADDR_ILLEGAL_PORT 388 * SK_ADDR_ILLEGAL_PORT
374 */ 389 */
375int SkAddrXmacMcClear( 390static int SkAddrXmacMcClear(
376SK_AC *pAC, /* adapter context */ 391SK_AC *pAC, /* adapter context */
377SK_IOC IoC, /* I/O context */ 392SK_IOC IoC, /* I/O context */
378SK_U32 PortNumber, /* Index of affected port */ 393SK_U32 PortNumber, /* Index of affected port */
@@ -429,7 +444,7 @@ int Flags) /* permanent/non-perm, sw-only */
429 * SK_ADDR_SUCCESS 444 * SK_ADDR_SUCCESS
430 * SK_ADDR_ILLEGAL_PORT 445 * SK_ADDR_ILLEGAL_PORT
431 */ 446 */
432int SkAddrGmacMcClear( 447static int SkAddrGmacMcClear(
433SK_AC *pAC, /* adapter context */ 448SK_AC *pAC, /* adapter context */
434SK_IOC IoC, /* I/O context */ 449SK_IOC IoC, /* I/O context */
435SK_U32 PortNumber, /* Index of affected port */ 450SK_U32 PortNumber, /* Index of affected port */
@@ -519,7 +534,7 @@ int Flags) /* permanent/non-perm, sw-only */
519 * Returns: 534 * Returns:
520 * Hash value of multicast address. 535 * Hash value of multicast address.
521 */ 536 */
522SK_U32 SkXmacMcHash( 537static SK_U32 SkXmacMcHash(
523unsigned char *pMc) /* Multicast address */ 538unsigned char *pMc) /* Multicast address */
524{ 539{
525 SK_U32 Idx; 540 SK_U32 Idx;
@@ -557,7 +572,7 @@ unsigned char *pMc) /* Multicast address */
557 * Returns: 572 * Returns:
558 * Hash value of multicast address. 573 * Hash value of multicast address.
559 */ 574 */
560SK_U32 SkGmacMcHash( 575static SK_U32 SkGmacMcHash(
561unsigned char *pMc) /* Multicast address */ 576unsigned char *pMc) /* Multicast address */
562{ 577{
563 SK_U32 Data; 578 SK_U32 Data;
@@ -672,7 +687,7 @@ int Flags) /* permanent/non-permanent */
672 * SK_MC_ILLEGAL_ADDRESS 687 * SK_MC_ILLEGAL_ADDRESS
673 * SK_MC_RLMT_OVERFLOW 688 * SK_MC_RLMT_OVERFLOW
674 */ 689 */
675int SkAddrXmacMcAdd( 690static int SkAddrXmacMcAdd(
676SK_AC *pAC, /* adapter context */ 691SK_AC *pAC, /* adapter context */
677SK_IOC IoC, /* I/O context */ 692SK_IOC IoC, /* I/O context */
678SK_U32 PortNumber, /* Port Number */ 693SK_U32 PortNumber, /* Port Number */
@@ -778,7 +793,7 @@ int Flags) /* permanent/non-permanent */
778 * SK_MC_FILTERING_INEXACT 793 * SK_MC_FILTERING_INEXACT
779 * SK_MC_ILLEGAL_ADDRESS 794 * SK_MC_ILLEGAL_ADDRESS
780 */ 795 */
781int SkAddrGmacMcAdd( 796static int SkAddrGmacMcAdd(
782SK_AC *pAC, /* adapter context */ 797SK_AC *pAC, /* adapter context */
783SK_IOC IoC, /* I/O context */ 798SK_IOC IoC, /* I/O context */
784SK_U32 PortNumber, /* Port Number */ 799SK_U32 PortNumber, /* Port Number */
@@ -937,7 +952,7 @@ SK_U32 PortNumber) /* Port Number */
937 * SK_MC_FILTERING_INEXACT 952 * SK_MC_FILTERING_INEXACT
938 * SK_ADDR_ILLEGAL_PORT 953 * SK_ADDR_ILLEGAL_PORT
939 */ 954 */
940int SkAddrXmacMcUpdate( 955static int SkAddrXmacMcUpdate(
941SK_AC *pAC, /* adapter context */ 956SK_AC *pAC, /* adapter context */
942SK_IOC IoC, /* I/O context */ 957SK_IOC IoC, /* I/O context */
943SK_U32 PortNumber) /* Port Number */ 958SK_U32 PortNumber) /* Port Number */
@@ -1082,7 +1097,7 @@ SK_U32 PortNumber) /* Port Number */
1082 * SK_MC_FILTERING_INEXACT 1097 * SK_MC_FILTERING_INEXACT
1083 * SK_ADDR_ILLEGAL_PORT 1098 * SK_ADDR_ILLEGAL_PORT
1084 */ 1099 */
1085int SkAddrGmacMcUpdate( 1100static int SkAddrGmacMcUpdate(
1086SK_AC *pAC, /* adapter context */ 1101SK_AC *pAC, /* adapter context */
1087SK_IOC IoC, /* I/O context */ 1102SK_IOC IoC, /* I/O context */
1088SK_U32 PortNumber) /* Port Number */ 1103SK_U32 PortNumber) /* Port Number */
@@ -1468,7 +1483,7 @@ int NewPromMode) /* new promiscuous mode */
1468 * SK_ADDR_SUCCESS 1483 * SK_ADDR_SUCCESS
1469 * SK_ADDR_ILLEGAL_PORT 1484 * SK_ADDR_ILLEGAL_PORT
1470 */ 1485 */
1471int SkAddrXmacPromiscuousChange( 1486static int SkAddrXmacPromiscuousChange(
1472SK_AC *pAC, /* adapter context */ 1487SK_AC *pAC, /* adapter context */
1473SK_IOC IoC, /* I/O context */ 1488SK_IOC IoC, /* I/O context */
1474SK_U32 PortNumber, /* port whose promiscuous mode changes */ 1489SK_U32 PortNumber, /* port whose promiscuous mode changes */
@@ -1585,7 +1600,7 @@ int NewPromMode) /* new promiscuous mode */
1585 * SK_ADDR_SUCCESS 1600 * SK_ADDR_SUCCESS
1586 * SK_ADDR_ILLEGAL_PORT 1601 * SK_ADDR_ILLEGAL_PORT
1587 */ 1602 */
1588int SkAddrGmacPromiscuousChange( 1603static int SkAddrGmacPromiscuousChange(
1589SK_AC *pAC, /* adapter context */ 1604SK_AC *pAC, /* adapter context */
1590SK_IOC IoC, /* I/O context */ 1605SK_IOC IoC, /* I/O context */
1591SK_U32 PortNumber, /* port whose promiscuous mode changes */ 1606SK_U32 PortNumber, /* port whose promiscuous mode changes */
diff --git a/drivers/net/sk98lin/skgeinit.c b/drivers/net/sk98lin/skgeinit.c
index 6cb49dd02251..67f1d6a5c15d 100644
--- a/drivers/net/sk98lin/skgeinit.c
+++ b/drivers/net/sk98lin/skgeinit.c
@@ -59,34 +59,6 @@ static struct s_Config OemConfig = {
59 59
60/****************************************************************************** 60/******************************************************************************
61 * 61 *
62 * SkGePollRxD() - Enable / Disable Descriptor Polling of RxD Ring
63 *
64 * Description:
65 * Enable or disable the descriptor polling of the receive descriptor
66 * ring (RxD) for port 'Port'.
67 * The new configuration is *not* saved over any SkGeStopPort() and
68 * SkGeInitPort() calls.
69 *
70 * Returns:
71 * nothing
72 */
73void SkGePollRxD(
74SK_AC *pAC, /* adapter context */
75SK_IOC IoC, /* IO context */
76int Port, /* Port Index (MAC_1 + n) */
77SK_BOOL PollRxD) /* SK_TRUE (enable pol.), SK_FALSE (disable pol.) */
78{
79 SK_GEPORT *pPrt;
80
81 pPrt = &pAC->GIni.GP[Port];
82
83 SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), (PollRxD) ?
84 CSR_ENA_POL : CSR_DIS_POL);
85} /* SkGePollRxD */
86
87
88/******************************************************************************
89 *
90 * SkGePollTxD() - Enable / Disable Descriptor Polling of TxD Rings 62 * SkGePollTxD() - Enable / Disable Descriptor Polling of TxD Rings
91 * 63 *
92 * Description: 64 * Description:
@@ -952,7 +924,7 @@ int Port) /* Port Index (MAC_1 + n) */
952 * Returns: 924 * Returns:
953 * nothing 925 * nothing
954 */ 926 */
955void SkGeInitRamIface( 927static void SkGeInitRamIface(
956SK_AC *pAC, /* adapter context */ 928SK_AC *pAC, /* adapter context */
957SK_IOC IoC) /* IO context */ 929SK_IOC IoC) /* IO context */
958{ 930{
@@ -1409,83 +1381,6 @@ SK_IOC IoC) /* IO context */
1409 1381
1410} /* SkGeInit0*/ 1382} /* SkGeInit0*/
1411 1383
1412#ifdef SK_PCI_RESET
1413
1414/******************************************************************************
1415 *
1416 * SkGePciReset() - Reset PCI interface
1417 *
1418 * Description:
1419 * o Read PCI configuration.
1420 * o Change power state to 3.
1421 * o Change power state to 0.
1422 * o Restore PCI configuration.
1423 *
1424 * Returns:
1425 * 0: Success.
1426 * 1: Power state could not be changed to 3.
1427 */
1428static int SkGePciReset(
1429SK_AC *pAC, /* adapter context */
1430SK_IOC IoC) /* IO context */
1431{
1432 int i;
1433 SK_U16 PmCtlSts;
1434 SK_U32 Bp1;
1435 SK_U32 Bp2;
1436 SK_U16 PciCmd;
1437 SK_U8 Cls;
1438 SK_U8 Lat;
1439 SK_U8 ConfigSpace[PCI_CFG_SIZE];
1440
1441 /*
1442 * Note: Switching to D3 state is like a software reset.
1443 * Switching from D3 to D0 is a hardware reset.
1444 * We have to save and restore the configuration space.
1445 */
1446 for (i = 0; i < PCI_CFG_SIZE; i++) {
1447 SkPciReadCfgDWord(pAC, i*4, &ConfigSpace[i]);
1448 }
1449
1450 /* We know the RAM Interface Arbiter is enabled. */
1451 SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D3);
1452 SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
1453
1454 if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D3) {
1455 return(1);
1456 }
1457
1458 /* Return to D0 state. */
1459 SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D0);
1460
1461 /* Check for D0 state. */
1462 SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
1463
1464 if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D0) {
1465 return(1);
1466 }
1467
1468 /* Check PCI Config Registers. */
1469 SkPciReadCfgWord(pAC, PCI_COMMAND, &PciCmd);
1470 SkPciReadCfgByte(pAC, PCI_CACHE_LSZ, &Cls);
1471 SkPciReadCfgDWord(pAC, PCI_BASE_1ST, &Bp1);
1472 SkPciReadCfgDWord(pAC, PCI_BASE_2ND, &Bp2);
1473 SkPciReadCfgByte(pAC, PCI_LAT_TIM, &Lat);
1474
1475 if (PciCmd != 0 || Cls != (SK_U8)0 || Lat != (SK_U8)0 ||
1476 (Bp1 & 0xfffffff0L) != 0 || Bp2 != 1) {
1477 return(1);
1478 }
1479
1480 /* Restore PCI Config Space. */
1481 for (i = 0; i < PCI_CFG_SIZE; i++) {
1482 SkPciWriteCfgDWord(pAC, i*4, ConfigSpace[i]);
1483 }
1484
1485 return(0);
1486} /* SkGePciReset */
1487
1488#endif /* SK_PCI_RESET */
1489 1384
1490/****************************************************************************** 1385/******************************************************************************
1491 * 1386 *
@@ -1524,10 +1419,6 @@ SK_IOC IoC) /* IO context */
1524 /* save CLK_RUN bits (YUKON-Lite) */ 1419 /* save CLK_RUN bits (YUKON-Lite) */
1525 SK_IN16(IoC, B0_CTST, &CtrlStat); 1420 SK_IN16(IoC, B0_CTST, &CtrlStat);
1526 1421
1527#ifdef SK_PCI_RESET
1528 (void)SkGePciReset(pAC, IoC);
1529#endif /* SK_PCI_RESET */
1530
1531 /* do the SW-reset */ 1422 /* do the SW-reset */
1532 SK_OUT8(IoC, B0_CTST, CS_RST_SET); 1423 SK_OUT8(IoC, B0_CTST, CS_RST_SET);
1533 1424
@@ -1991,11 +1882,6 @@ SK_IOC IoC) /* IO context */
1991 int i; 1882 int i;
1992 SK_U16 Word; 1883 SK_U16 Word;
1993 1884
1994#ifdef SK_PHY_LP_MODE
1995 SK_U8 Byte;
1996 SK_U16 PmCtlSts;
1997#endif /* SK_PHY_LP_MODE */
1998
1999#if (!defined(SK_SLIM) && !defined(VCPU)) 1885#if (!defined(SK_SLIM) && !defined(VCPU))
2000 /* ensure I2C is ready */ 1886 /* ensure I2C is ready */
2001 SkI2cWaitIrq(pAC, IoC); 1887 SkI2cWaitIrq(pAC, IoC);
@@ -2010,38 +1896,6 @@ SK_IOC IoC) /* IO context */
2010 } 1896 }
2011 } 1897 }
2012 1898
2013#ifdef SK_PHY_LP_MODE
2014 /*
2015 * for power saving purposes within mobile environments
2016 * we set the PHY to coma mode and switch to D3 power state.
2017 */
2018 if (pAC->GIni.GIYukonLite &&
2019 pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
2020
2021 /* for all ports switch PHY to coma mode */
2022 for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
2023
2024 SkGmEnterLowPowerMode(pAC, IoC, i, PHY_PM_DEEP_SLEEP);
2025 }
2026
2027 if (pAC->GIni.GIVauxAvail) {
2028 /* switch power to VAUX */
2029 Byte = PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_ON | PC_VCC_OFF;
2030
2031 SK_OUT8(IoC, B0_POWER_CTRL, Byte);
2032 }
2033
2034 /* switch to D3 state */
2035 SK_IN16(IoC, PCI_C(PCI_PM_CTL_STS), &PmCtlSts);
2036
2037 PmCtlSts |= PCI_PM_STATE_D3;
2038
2039 SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2040
2041 SK_OUT16(IoC, PCI_C(PCI_PM_CTL_STS), PmCtlSts);
2042 }
2043#endif /* SK_PHY_LP_MODE */
2044
2045 /* Reset all bits in the PCI STATUS register */ 1899 /* Reset all bits in the PCI STATUS register */
2046 /* 1900 /*
2047 * Note: PCI Cfg cycles cannot be used, because they are not 1901 * Note: PCI Cfg cycles cannot be used, because they are not
diff --git a/drivers/net/sk98lin/skgemib.c b/drivers/net/sk98lin/skgemib.c
index 2991bc85cf2c..0a6f67a7a395 100644
--- a/drivers/net/sk98lin/skgemib.c
+++ b/drivers/net/sk98lin/skgemib.c
@@ -871,13 +871,6 @@ PNMI_STATIC const SK_PNMI_TAB_ENTRY IdTable[] = {
871 sizeof(SK_PNMI_CONF), 871 sizeof(SK_PNMI_CONF),
872 SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyType), 872 SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyType),
873 SK_PNMI_RO, MacPrivateConf, 0}, 873 SK_PNMI_RO, MacPrivateConf, 0},
874#ifdef SK_PHY_LP_MODE
875 {OID_SKGE_PHY_LP_MODE,
876 SK_PNMI_MAC_ENTRIES,
877 sizeof(SK_PNMI_CONF),
878 SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyMode),
879 SK_PNMI_RW, MacPrivateConf, 0},
880#endif
881 {OID_SKGE_LINK_CAP, 874 {OID_SKGE_LINK_CAP,
882 SK_PNMI_MAC_ENTRIES, 875 SK_PNMI_MAC_ENTRIES,
883 sizeof(SK_PNMI_CONF), 876 sizeof(SK_PNMI_CONF),
diff --git a/drivers/net/sk98lin/skgepnmi.c b/drivers/net/sk98lin/skgepnmi.c
index a386172107e8..b36dd9ac6b29 100644
--- a/drivers/net/sk98lin/skgepnmi.c
+++ b/drivers/net/sk98lin/skgepnmi.c
@@ -56,10 +56,6 @@ static const char SysKonnectFileId[] =
56 * Public Function prototypes 56 * Public Function prototypes
57 */ 57 */
58int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int level); 58int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int level);
59int SkPnmiGetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
60 unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
61int SkPnmiPreSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
62 unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
63int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf, 59int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
64 unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex); 60 unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
65int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf, 61int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf,
@@ -587,7 +583,7 @@ int Level) /* Initialization level */
587 * exist (e.g. port instance 3 on a two port 583 * exist (e.g. port instance 3 on a two port
588 * adapter. 584 * adapter.
589 */ 585 */
590int SkPnmiGetVar( 586static int SkPnmiGetVar(
591SK_AC *pAC, /* Pointer to adapter context */ 587SK_AC *pAC, /* Pointer to adapter context */
592SK_IOC IoC, /* IO context handle */ 588SK_IOC IoC, /* IO context handle */
593SK_U32 Id, /* Object ID that is to be processed */ 589SK_U32 Id, /* Object ID that is to be processed */
@@ -629,7 +625,7 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
629 * exist (e.g. port instance 3 on a two port 625 * exist (e.g. port instance 3 on a two port
630 * adapter. 626 * adapter.
631 */ 627 */
632int SkPnmiPreSetVar( 628static int SkPnmiPreSetVar(
633SK_AC *pAC, /* Pointer to adapter context */ 629SK_AC *pAC, /* Pointer to adapter context */
634SK_IOC IoC, /* IO context handle */ 630SK_IOC IoC, /* IO context handle */
635SK_U32 Id, /* Object ID that is to be processed */ 631SK_U32 Id, /* Object ID that is to be processed */
@@ -5062,9 +5058,6 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
5062 case OID_SKGE_SPEED_CAP: 5058 case OID_SKGE_SPEED_CAP:
5063 case OID_SKGE_SPEED_MODE: 5059 case OID_SKGE_SPEED_MODE:
5064 case OID_SKGE_SPEED_STATUS: 5060 case OID_SKGE_SPEED_STATUS:
5065#ifdef SK_PHY_LP_MODE
5066 case OID_SKGE_PHY_LP_MODE:
5067#endif
5068 if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U8)) { 5061 if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U8)) {
5069 5062
5070 *pLen = (Limit - LogPortIndex) * sizeof(SK_U8); 5063 *pLen = (Limit - LogPortIndex) * sizeof(SK_U8);
@@ -5140,28 +5133,6 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
5140 Offset += sizeof(SK_U32); 5133 Offset += sizeof(SK_U32);
5141 break; 5134 break;
5142 5135
5143#ifdef SK_PHY_LP_MODE
5144 case OID_SKGE_PHY_LP_MODE:
5145 if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
5146 if (LogPortIndex == 0) {
5147 continue;
5148 }
5149 else {
5150 /* Get value for physical ports */
5151 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
5152 Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
5153 *pBufPtr = Val8;
5154 }
5155 }
5156 else { /* DualNetMode */
5157
5158 Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
5159 *pBufPtr = Val8;
5160 }
5161 Offset += sizeof(SK_U8);
5162 break;
5163#endif
5164
5165 case OID_SKGE_LINK_CAP: 5136 case OID_SKGE_LINK_CAP:
5166 if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */ 5137 if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
5167 if (LogPortIndex == 0) { 5138 if (LogPortIndex == 0) {
@@ -5478,16 +5449,6 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
5478 } 5449 }
5479 break; 5450 break;
5480 5451
5481#ifdef SK_PHY_LP_MODE
5482 case OID_SKGE_PHY_LP_MODE:
5483 if (*pLen < Limit - LogPortIndex) {
5484
5485 *pLen = Limit - LogPortIndex;
5486 return (SK_PNMI_ERR_TOO_SHORT);
5487 }
5488 break;
5489#endif
5490
5491 case OID_SKGE_MTU: 5452 case OID_SKGE_MTU:
5492 if (*pLen < sizeof(SK_U32)) { 5453 if (*pLen < sizeof(SK_U32)) {
5493 5454
@@ -5845,116 +5806,6 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
5845 Offset += sizeof(SK_U32); 5806 Offset += sizeof(SK_U32);
5846 break; 5807 break;
5847 5808
5848#ifdef SK_PHY_LP_MODE
5849 case OID_SKGE_PHY_LP_MODE:
5850 /* The preset ends here */
5851 if (Action == SK_PNMI_PRESET) {
5852
5853 return (SK_PNMI_ERR_OK);
5854 }
5855
5856 if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
5857 if (LogPortIndex == 0) {
5858 Offset = 0;
5859 continue;
5860 }
5861 else {
5862 /* Set value for physical ports */
5863 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
5864
5865 switch (*(pBuf + Offset)) {
5866 case 0:
5867 /* If LowPowerMode is active, we can leave it. */
5868 if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
5869
5870 Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
5871
5872 if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3) {
5873
5874 SkDrvInitAdapter(pAC);
5875 }
5876 break;
5877 }
5878 else {
5879 *pLen = 0;
5880 return (SK_PNMI_ERR_GENERAL);
5881 }
5882 case 1:
5883 case 2:
5884 case 3:
5885 case 4:
5886 /* If no LowPowerMode is active, we can enter it. */
5887 if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
5888
5889 if ((*(pBuf + Offset)) < 3) {
5890
5891 SkDrvDeInitAdapter(pAC);
5892 }
5893
5894 Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
5895 break;
5896 }
5897 else {
5898 *pLen = 0;
5899 return (SK_PNMI_ERR_GENERAL);
5900 }
5901 default:
5902 *pLen = 0;
5903 return (SK_PNMI_ERR_BAD_VALUE);
5904 }
5905 }
5906 }
5907 else { /* DualNetMode */
5908
5909 switch (*(pBuf + Offset)) {
5910 case 0:
5911 /* If we are in a LowPowerMode, we can leave it. */
5912 if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
5913
5914 Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
5915
5916 if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3) {
5917
5918 SkDrvInitAdapter(pAC);
5919 }
5920 break;
5921 }
5922 else {
5923 *pLen = 0;
5924 return (SK_PNMI_ERR_GENERAL);
5925 }
5926
5927 case 1:
5928 case 2:
5929 case 3:
5930 case 4:
5931 /* If we are not already in LowPowerMode, we can enter it. */
5932 if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
5933
5934 if ((*(pBuf + Offset)) < 3) {
5935
5936 SkDrvDeInitAdapter(pAC);
5937 }
5938 else {
5939
5940 Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
5941 }
5942 break;
5943 }
5944 else {
5945 *pLen = 0;
5946 return (SK_PNMI_ERR_GENERAL);
5947 }
5948
5949 default:
5950 *pLen = 0;
5951 return (SK_PNMI_ERR_BAD_VALUE);
5952 }
5953 }
5954 Offset += sizeof(SK_U8);
5955 break;
5956#endif
5957
5958 default: 5809 default:
5959 SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR, 5810 SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
5960 ("MacPrivateConf: Unknown OID should be handled before set")); 5811 ("MacPrivateConf: Unknown OID should be handled before set"));
diff --git a/drivers/net/sk98lin/skgesirq.c b/drivers/net/sk98lin/skgesirq.c
index 87520f0057d7..ab66d80a4455 100644
--- a/drivers/net/sk98lin/skgesirq.c
+++ b/drivers/net/sk98lin/skgesirq.c
@@ -265,7 +265,7 @@ int Port) /* Port Index (MAC_1 + n) */
265 * 265 *
266 * Returns: N/A 266 * Returns: N/A
267 */ 267 */
268void SkHWLinkUp( 268static void SkHWLinkUp(
269SK_AC *pAC, /* adapter context */ 269SK_AC *pAC, /* adapter context */
270SK_IOC IoC, /* IO context */ 270SK_IOC IoC, /* IO context */
271int Port) /* Port Index (MAC_1 + n) */ 271int Port) /* Port Index (MAC_1 + n) */
@@ -612,14 +612,6 @@ SK_U32 Istatus) /* Interrupt status word */
612 * we ignore those 612 * we ignore those
613 */ 613 */
614 pPrt->HalfDupTimerActive = SK_TRUE; 614 pPrt->HalfDupTimerActive = SK_TRUE;
615#ifdef XXX
616 Len = sizeof(SK_U64);
617 SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
618 &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 0),
619 pAC->Rlmt.Port[0].Net->NetNumber);
620
621 pPrt->LastOctets = Octets;
622#endif /* XXX */
623 /* Snap statistic counters */ 615 /* Snap statistic counters */
624 (void)SkXmUpdateStats(pAC, IoC, 0); 616 (void)SkXmUpdateStats(pAC, IoC, 0);
625 617
@@ -653,14 +645,6 @@ SK_U32 Istatus) /* Interrupt status word */
653 pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) && 645 pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) &&
654 !pPrt->HalfDupTimerActive) { 646 !pPrt->HalfDupTimerActive) {
655 pPrt->HalfDupTimerActive = SK_TRUE; 647 pPrt->HalfDupTimerActive = SK_TRUE;
656#ifdef XXX
657 Len = sizeof(SK_U64);
658 SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
659 &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 1),
660 pAC->Rlmt.Port[1].Net->NetNumber);
661
662 pPrt->LastOctets = Octets;
663#endif /* XXX */
664 /* Snap statistic counters */ 648 /* Snap statistic counters */
665 (void)SkXmUpdateStats(pAC, IoC, 1); 649 (void)SkXmUpdateStats(pAC, IoC, 1);
666 650
@@ -2085,12 +2069,6 @@ SK_EVPARA Para) /* Event specific Parameter */
2085 pPrt->HalfDupTimerActive = SK_FALSE; 2069 pPrt->HalfDupTimerActive = SK_FALSE;
2086 if (pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF || 2070 if (pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
2087 pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) { 2071 pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) {
2088#ifdef XXX
2089 Len = sizeof(SK_U64);
2090 SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
2091 &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
2092 pAC->Rlmt.Port[Port].Net->NetNumber);
2093#endif /* XXX */
2094 /* Snap statistic counters */ 2072 /* Snap statistic counters */
2095 (void)SkXmUpdateStats(pAC, IoC, Port); 2073 (void)SkXmUpdateStats(pAC, IoC, Port);
2096 2074
diff --git a/drivers/net/sk98lin/ski2c.c b/drivers/net/sk98lin/ski2c.c
index 075a0464e56b..79bf57cb5326 100644
--- a/drivers/net/sk98lin/ski2c.c
+++ b/drivers/net/sk98lin/ski2c.c
@@ -396,7 +396,7 @@ int Rw) /* Read / Write Flag */
396 * 1: error, transfer does not complete, I2C transfer 396 * 1: error, transfer does not complete, I2C transfer
397 * killed, wait loop terminated. 397 * killed, wait loop terminated.
398 */ 398 */
399int SkI2cWait( 399static int SkI2cWait(
400SK_AC *pAC, /* Adapter Context */ 400SK_AC *pAC, /* Adapter Context */
401SK_IOC IoC, /* I/O Context */ 401SK_IOC IoC, /* I/O Context */
402int Event) /* complete event to wait for (I2C_READ or I2C_WRITE) */ 402int Event) /* complete event to wait for (I2C_READ or I2C_WRITE) */
@@ -481,7 +481,7 @@ SK_IOC IoC) /* I/O Context */
481 * returns 0: success 481 * returns 0: success
482 * 1: error 482 * 1: error
483 */ 483 */
484int SkI2cWrite( 484static int SkI2cWrite(
485SK_AC *pAC, /* Adapter Context */ 485SK_AC *pAC, /* Adapter Context */
486SK_IOC IoC, /* I/O Context */ 486SK_IOC IoC, /* I/O Context */
487SK_U32 I2cData, /* I2C Data to write */ 487SK_U32 I2cData, /* I2C Data to write */
@@ -538,7 +538,7 @@ int I2cBurst) /* I2C Burst Flag */
538 * 1 if the read is completed 538 * 1 if the read is completed
539 * 0 if the read must be continued (I2C Bus still allocated) 539 * 0 if the read must be continued (I2C Bus still allocated)
540 */ 540 */
541int SkI2cReadSensor( 541static int SkI2cReadSensor(
542SK_AC *pAC, /* Adapter Context */ 542SK_AC *pAC, /* Adapter Context */
543SK_IOC IoC, /* I/O Context */ 543SK_IOC IoC, /* I/O Context */
544SK_SENSOR *pSen) /* Sensor to be read */ 544SK_SENSOR *pSen) /* Sensor to be read */
diff --git a/drivers/net/sk98lin/sklm80.c b/drivers/net/sk98lin/sklm80.c
index 68292d18175b..a204f5bb55d4 100644
--- a/drivers/net/sk98lin/sklm80.c
+++ b/drivers/net/sk98lin/sklm80.c
@@ -34,79 +34,7 @@ static const char SysKonnectFileId[] =
34#include "h/lm80.h" 34#include "h/lm80.h"
35#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */ 35#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */
36 36
37#ifdef SK_DIAG
38#define BREAK_OR_WAIT(pAC,IoC,Event) SkI2cWait(pAC,IoC,Event)
39#else /* nSK_DIAG */
40#define BREAK_OR_WAIT(pAC,IoC,Event) break 37#define BREAK_OR_WAIT(pAC,IoC,Event) break
41#endif /* nSK_DIAG */
42
43#ifdef SK_DIAG
44/*
45 * read the register 'Reg' from the device 'Dev'
46 *
47 * return read error -1
48 * success the read value
49 */
50int SkLm80RcvReg(
51SK_IOC IoC, /* Adapter Context */
52int Dev, /* I2C device address */
53int Reg) /* register to read */
54{
55 int Val = 0;
56 int TempExt;
57
58 /* Signal device number */
59 if (SkI2cSndDev(IoC, Dev, I2C_WRITE)) {
60 return(-1);
61 }
62
63 if (SkI2cSndByte(IoC, Reg)) {
64 return(-1);
65 }
66
67 /* repeat start */
68 if (SkI2cSndDev(IoC, Dev, I2C_READ)) {
69 return(-1);
70 }
71
72 switch (Reg) {
73 case LM80_TEMP_IN:
74 Val = (int)SkI2cRcvByte(IoC, 1);
75
76 /* First: correct the value: it might be negative */
77 if ((Val & 0x80) != 0) {
78 /* Value is negative */
79 Val = Val - 256;
80 }
81 Val = Val * SK_LM80_TEMP_LSB;
82 SkI2cStop(IoC);
83
84 TempExt = (int)SkLm80RcvReg(IoC, LM80_ADDR, LM80_TEMP_CTRL);
85
86 if (Val > 0) {
87 Val += ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB);
88 }
89 else {
90 Val -= ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB);
91 }
92 return(Val);
93 break;
94 case LM80_VT0_IN:
95 case LM80_VT1_IN:
96 case LM80_VT2_IN:
97 case LM80_VT3_IN:
98 Val = (int)SkI2cRcvByte(IoC, 1) * SK_LM80_VT_LSB;
99 break;
100
101 default:
102 Val = (int)SkI2cRcvByte(IoC, 1);
103 break;
104 }
105
106 SkI2cStop(IoC);
107 return(Val);
108}
109#endif /* SK_DIAG */
110 38
111/* 39/*
112 * read a sensors value (LM80 specific) 40 * read a sensors value (LM80 specific)
diff --git a/drivers/net/sk98lin/skrlmt.c b/drivers/net/sk98lin/skrlmt.c
index 9ea11ab2296a..be8d1ccddf6d 100644
--- a/drivers/net/sk98lin/skrlmt.c
+++ b/drivers/net/sk98lin/skrlmt.c
@@ -282,7 +282,6 @@ typedef struct s_SpTreeRlmtPacket {
282 282
283SK_MAC_ADDR SkRlmtMcAddr = {{0x01, 0x00, 0x5A, 0x52, 0x4C, 0x4D}}; 283SK_MAC_ADDR SkRlmtMcAddr = {{0x01, 0x00, 0x5A, 0x52, 0x4C, 0x4D}};
284SK_MAC_ADDR BridgeMcAddr = {{0x01, 0x80, 0xC2, 0x00, 0x00, 0x00}}; 284SK_MAC_ADDR BridgeMcAddr = {{0x01, 0x80, 0xC2, 0x00, 0x00, 0x00}};
285SK_MAC_ADDR BcAddr = {{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}};
286 285
287/* local variables ************************************************************/ 286/* local variables ************************************************************/
288 287
diff --git a/drivers/net/sk98lin/skvpd.c b/drivers/net/sk98lin/skvpd.c
index eb3c8988ced1..17786056c66a 100644
--- a/drivers/net/sk98lin/skvpd.c
+++ b/drivers/net/sk98lin/skvpd.c
@@ -132,65 +132,6 @@ int addr) /* VPD address */
132 132
133#endif /* SKDIAG */ 133#endif /* SKDIAG */
134 134
135#if 0
136
137/*
138 Write the dword 'data' at address 'addr' into the VPD EEPROM, and
139 verify that the data is written.
140
141 Needed Time:
142
143. MIN MAX
144. -------------------------------------------------------------------
145. write 1.8 ms 3.6 ms
146. internal write cyles 0.7 ms 7.0 ms
147. -------------------------------------------------------------------
148. over all program time 2.5 ms 10.6 ms
149. read 1.3 ms 2.6 ms
150. -------------------------------------------------------------------
151. over all 3.8 ms 13.2 ms
152.
153
154
155 Returns 0: success
156 1: error, I2C transfer does not terminate
157 2: error, data verify error
158
159 */
160static int VpdWriteDWord(
161SK_AC *pAC, /* pAC pointer */
162SK_IOC IoC, /* IO Context */
163int addr, /* VPD address */
164SK_U32 data) /* VPD data to write */
165{
166 /* start VPD write */
167 /* Don't swap here, it's a data stream of bytes */
168 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
169 ("VPD write dword at addr 0x%x, data = 0x%x\n",addr,data));
170 VPD_OUT32(pAC, IoC, PCI_VPD_DAT_REG, (SK_U32)data);
171 /* But do it here */
172 addr |= VPD_WRITE;
173
174 VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, (SK_U16)(addr | VPD_WRITE));
175
176 /* this may take up to 10,6 ms */
177 if (VpdWait(pAC, IoC, VPD_WRITE)) {
178 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
179 ("Write Timed Out\n"));
180 return(1);
181 };
182
183 /* verify data */
184 if (VpdReadDWord(pAC, IoC, addr) != data) {
185 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
186 ("Data Verify Error\n"));
187 return(2);
188 }
189 return(0);
190} /* VpdWriteDWord */
191
192#endif /* 0 */
193
194/* 135/*
195 * Read one Stream of 'len' bytes of VPD data, starting at 'addr' from 136 * Read one Stream of 'len' bytes of VPD data, starting at 'addr' from
196 * or to the I2C EEPROM. 137 * or to the I2C EEPROM.
@@ -728,7 +669,7 @@ char *etp) /* end pointer input position */
728 * 6: fatal VPD error 669 * 6: fatal VPD error
729 * 670 *
730 */ 671 */
731int VpdSetupPara( 672static int VpdSetupPara(
732SK_AC *pAC, /* common data base */ 673SK_AC *pAC, /* common data base */
733const char *key, /* keyword to insert */ 674const char *key, /* keyword to insert */
734const char *buf, /* buffer with the keyword value */ 675const char *buf, /* buffer with the keyword value */
@@ -1148,50 +1089,3 @@ SK_IOC IoC) /* IO Context */
1148 return(0); 1089 return(0);
1149} 1090}
1150 1091
1151
1152
1153/*
1154 * Read the contents of the VPD EEPROM and copy it to the VPD buffer
1155 * if not already done. If the keyword "VF" is not present it will be
1156 * created and the error log message will be stored to this keyword.
1157 * If "VF" is not present the error log message will be stored to the
1158 * keyword "VL". "VL" will created or overwritten if "VF" is present.
1159 * The VPD read/write area is saved to the VPD EEPROM.
1160 *
1161 * returns nothing, errors will be ignored.
1162 */
1163void VpdErrLog(
1164SK_AC *pAC, /* common data base */
1165SK_IOC IoC, /* IO Context */
1166char *msg) /* error log message */
1167{
1168 SK_VPD_PARA *v, vf; /* VF */
1169 int len;
1170
1171 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX,
1172 ("VPD error log msg %s\n", msg));
1173 if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
1174 if (VpdInit(pAC, IoC) != 0) {
1175 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
1176 ("VPD init error\n"));
1177 return;
1178 }
1179 }
1180
1181 len = strlen(msg);
1182 if (len > VPD_MAX_LEN) {
1183 /* cut it */
1184 len = VPD_MAX_LEN;
1185 }
1186 if ((v = vpd_find_para(pAC, VPD_VF, &vf)) != NULL) {
1187 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("overwrite VL\n"));
1188 (void)VpdSetupPara(pAC, VPD_VL, msg, len, VPD_RW_KEY, OWR_KEY);
1189 }
1190 else {
1191 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("write VF\n"));
1192 (void)VpdSetupPara(pAC, VPD_VF, msg, len, VPD_RW_KEY, ADD_KEY);
1193 }
1194
1195 (void)VpdUpdate(pAC, IoC);
1196}
1197
diff --git a/drivers/net/sk98lin/skxmac2.c b/drivers/net/sk98lin/skxmac2.c
index 42d2d963150a..b4e75022a657 100644
--- a/drivers/net/sk98lin/skxmac2.c
+++ b/drivers/net/sk98lin/skxmac2.c
@@ -41,13 +41,13 @@ static const char SysKonnectFileId[] =
41#endif 41#endif
42 42
43#ifdef GENESIS 43#ifdef GENESIS
44BCOM_HACK BcomRegA1Hack[] = { 44static BCOM_HACK BcomRegA1Hack[] = {
45 { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 }, { 0x17, 0x0013 }, 45 { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 }, { 0x17, 0x0013 },
46 { 0x15, 0x0404 }, { 0x17, 0x8006 }, { 0x15, 0x0132 }, { 0x17, 0x8006 }, 46 { 0x15, 0x0404 }, { 0x17, 0x8006 }, { 0x15, 0x0132 }, { 0x17, 0x8006 },
47 { 0x15, 0x0232 }, { 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 }, 47 { 0x15, 0x0232 }, { 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 },
48 { 0, 0 } 48 { 0, 0 }
49}; 49};
50BCOM_HACK BcomRegC0Hack[] = { 50static BCOM_HACK BcomRegC0Hack[] = {
51 { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1204 }, { 0x17, 0x0013 }, 51 { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1204 }, { 0x17, 0x0013 },
52 { 0x15, 0x0A04 }, { 0x18, 0x0420 }, 52 { 0x15, 0x0A04 }, { 0x18, 0x0420 },
53 { 0, 0 } 53 { 0, 0 }
@@ -790,7 +790,7 @@ int Port) /* Port Index (MAC_1 + n) */
790 * Returns: 790 * Returns:
791 * nothing 791 * nothing
792 */ 792 */
793void SkMacFlushRxFifo( 793static void SkMacFlushRxFifo(
794SK_AC *pAC, /* adapter context */ 794SK_AC *pAC, /* adapter context */
795SK_IOC IoC, /* IO context */ 795SK_IOC IoC, /* IO context */
796int Port) /* Port Index (MAC_1 + n) */ 796int Port) /* Port Index (MAC_1 + n) */
@@ -1231,38 +1231,6 @@ int Port) /* Port Index (MAC_1 + n) */
1231} /* SkMacHardRst */ 1231} /* SkMacHardRst */
1232 1232
1233 1233
1234/******************************************************************************
1235 *
1236 * SkMacClearRst() - Clear the MAC reset
1237 *
1238 * Description: calls a clear MAC reset routine dep. on board type
1239 *
1240 * Returns:
1241 * nothing
1242 */
1243void SkMacClearRst(
1244SK_AC *pAC, /* adapter context */
1245SK_IOC IoC, /* IO context */
1246int Port) /* Port Index (MAC_1 + n) */
1247{
1248
1249#ifdef GENESIS
1250 if (pAC->GIni.GIGenesis) {
1251
1252 SkXmClearRst(pAC, IoC, Port);
1253 }
1254#endif /* GENESIS */
1255
1256#ifdef YUKON
1257 if (pAC->GIni.GIYukon) {
1258
1259 SkGmClearRst(pAC, IoC, Port);
1260 }
1261#endif /* YUKON */
1262
1263} /* SkMacClearRst */
1264
1265
1266#ifdef GENESIS 1234#ifdef GENESIS
1267/****************************************************************************** 1235/******************************************************************************
1268 * 1236 *
@@ -1713,7 +1681,7 @@ int Port) /* Port Index (MAC_1 + n) */
1713 * Returns: 1681 * Returns:
1714 * nothing 1682 * nothing
1715 */ 1683 */
1716void SkXmInitDupMd( 1684static void SkXmInitDupMd(
1717SK_AC *pAC, /* adapter context */ 1685SK_AC *pAC, /* adapter context */
1718SK_IOC IoC, /* IO context */ 1686SK_IOC IoC, /* IO context */
1719int Port) /* Port Index (MAC_1 + n) */ 1687int Port) /* Port Index (MAC_1 + n) */
@@ -1761,7 +1729,7 @@ int Port) /* Port Index (MAC_1 + n) */
1761 * Returns: 1729 * Returns:
1762 * nothing 1730 * nothing
1763 */ 1731 */
1764void SkXmInitPauseMd( 1732static void SkXmInitPauseMd(
1765SK_AC *pAC, /* adapter context */ 1733SK_AC *pAC, /* adapter context */
1766SK_IOC IoC, /* IO context */ 1734SK_IOC IoC, /* IO context */
1767int Port) /* Port Index (MAC_1 + n) */ 1735int Port) /* Port Index (MAC_1 + n) */
@@ -2076,283 +2044,7 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
2076} /* SkXmInitPhyBcom */ 2044} /* SkXmInitPhyBcom */
2077#endif /* GENESIS */ 2045#endif /* GENESIS */
2078 2046
2079
2080#ifdef YUKON 2047#ifdef YUKON
2081#ifndef SK_SLIM
2082/******************************************************************************
2083 *
2084 * SkGmEnterLowPowerMode()
2085 *
2086 * Description:
2087 * This function sets the Marvell Alaska PHY to the low power mode
2088 * given by parameter mode.
2089 * The following low power modes are available:
2090 *
2091 * - Coma Mode (Deep Sleep):
2092 * Power consumption: ~15 - 30 mW
2093 * The PHY cannot wake up on its own.
2094 *
2095 * - IEEE 22.2.4.1.5 compatible power down mode
2096 * Power consumption: ~240 mW
2097 * The PHY cannot wake up on its own.
2098 *
2099 * - energy detect mode
2100 * Power consumption: ~160 mW
2101 * The PHY can wake up on its own by detecting activity
2102 * on the CAT 5 cable.
2103 *
2104 * - energy detect plus mode
2105 * Power consumption: ~150 mW
2106 * The PHY can wake up on its own by detecting activity
2107 * on the CAT 5 cable.
2108 * Connected devices can be woken up by sending normal link
2109 * pulses every one second.
2110 *
2111 * Note:
2112 *
2113 * Returns:
2114 * 0: ok
2115 * 1: error
2116 */
2117int SkGmEnterLowPowerMode(
2118SK_AC *pAC, /* adapter context */
2119SK_IOC IoC, /* IO context */
2120int Port, /* Port Index (e.g. MAC_1) */
2121SK_U8 Mode) /* low power mode */
2122{
2123 SK_U16 Word;
2124 SK_U32 DWord;
2125 SK_U8 LastMode;
2126 int Ret = 0;
2127
2128 if (pAC->GIni.GIYukonLite &&
2129 pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
2130
2131 /* save current power mode */
2132 LastMode = pAC->GIni.GP[Port].PPhyPowerState;
2133 pAC->GIni.GP[Port].PPhyPowerState = Mode;
2134
2135 switch (Mode) {
2136 /* coma mode (deep sleep) */
2137 case PHY_PM_DEEP_SLEEP:
2138 /* setup General Purpose Control Register */
2139 GM_OUT16(IoC, 0, GM_GP_CTRL, GM_GPCR_FL_PASS |
2140 GM_GPCR_SPEED_100 | GM_GPCR_AU_ALL_DIS);
2141
2142 /* apply COMA mode workaround */
2143 SkGmPhyWrite(pAC, IoC, Port, 29, 0x001f);
2144 SkGmPhyWrite(pAC, IoC, Port, 30, 0xfff3);
2145
2146 SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord);
2147
2148 SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2149
2150 /* Set PHY to Coma Mode */
2151 SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord | PCI_PHY_COMA);
2152
2153 SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2154
2155 break;
2156
2157 /* IEEE 22.2.4.1.5 compatible power down mode */
2158 case PHY_PM_IEEE_POWER_DOWN:
2159 /*
2160 * - disable MAC 125 MHz clock
2161 * - allow MAC power down
2162 */
2163 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
2164 Word |= PHY_M_PC_DIS_125CLK;
2165 Word &= ~PHY_M_PC_MAC_POW_UP;
2166 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
2167
2168 /*
2169 * register changes must be followed by a software
2170 * reset to take effect
2171 */
2172 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
2173 Word |= PHY_CT_RESET;
2174 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
2175
2176 /* switch IEEE compatible power down mode on */
2177 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
2178 Word |= PHY_CT_PDOWN;
2179 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
2180 break;
2181
2182 /* energy detect and energy detect plus mode */
2183 case PHY_PM_ENERGY_DETECT:
2184 case PHY_PM_ENERGY_DETECT_PLUS:
2185 /*
2186 * - disable MAC 125 MHz clock
2187 */
2188 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
2189 Word |= PHY_M_PC_DIS_125CLK;
2190 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
2191
2192 /* activate energy detect mode 1 */
2193 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
2194
2195 /* energy detect mode */
2196 if (Mode == PHY_PM_ENERGY_DETECT) {
2197 Word |= PHY_M_PC_EN_DET;
2198 }
2199 /* energy detect plus mode */
2200 else {
2201 Word |= PHY_M_PC_EN_DET_PLUS;
2202 }
2203
2204 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
2205
2206 /*
2207 * reinitialize the PHY to force a software reset
2208 * which is necessary after the register settings
2209 * for the energy detect modes.
2210 * Furthermore reinitialisation prevents that the
2211 * PHY is running out of a stable state.
2212 */
2213 SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
2214 break;
2215
2216 /* don't change current power mode */
2217 default:
2218 pAC->GIni.GP[Port].PPhyPowerState = LastMode;
2219 Ret = 1;
2220 break;
2221 }
2222 }
2223 /* low power modes are not supported by this chip */
2224 else {
2225 Ret = 1;
2226 }
2227
2228 return(Ret);
2229
2230} /* SkGmEnterLowPowerMode */
2231
2232/******************************************************************************
2233 *
2234 * SkGmLeaveLowPowerMode()
2235 *
2236 * Description:
2237 * Leave the current low power mode and switch to normal mode
2238 *
2239 * Note:
2240 *
2241 * Returns:
2242 * 0: ok
2243 * 1: error
2244 */
2245int SkGmLeaveLowPowerMode(
2246SK_AC *pAC, /* adapter context */
2247SK_IOC IoC, /* IO context */
2248int Port) /* Port Index (e.g. MAC_1) */
2249{
2250 SK_U32 DWord;
2251 SK_U16 Word;
2252 SK_U8 LastMode;
2253 int Ret = 0;
2254
2255 if (pAC->GIni.GIYukonLite &&
2256 pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
2257
2258 /* save current power mode */
2259 LastMode = pAC->GIni.GP[Port].PPhyPowerState;
2260 pAC->GIni.GP[Port].PPhyPowerState = PHY_PM_OPERATIONAL_MODE;
2261
2262 switch (LastMode) {
2263 /* coma mode (deep sleep) */
2264 case PHY_PM_DEEP_SLEEP:
2265 SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord);
2266
2267 SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2268
2269 /* Release PHY from Coma Mode */
2270 SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord & ~PCI_PHY_COMA);
2271
2272 SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2273
2274 SK_IN32(IoC, B2_GP_IO, &DWord);
2275
2276 /* set to output */
2277 DWord |= (GP_DIR_9 | GP_IO_9);
2278
2279 /* set PHY reset */
2280 SK_OUT32(IoC, B2_GP_IO, DWord);
2281
2282 DWord &= ~GP_IO_9; /* clear PHY reset (active high) */
2283
2284 /* clear PHY reset */
2285 SK_OUT32(IoC, B2_GP_IO, DWord);
2286 break;
2287
2288 /* IEEE 22.2.4.1.5 compatible power down mode */
2289 case PHY_PM_IEEE_POWER_DOWN:
2290 /*
2291 * - enable MAC 125 MHz clock
2292 * - set MAC power up
2293 */
2294 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
2295 Word &= ~PHY_M_PC_DIS_125CLK;
2296 Word |= PHY_M_PC_MAC_POW_UP;
2297 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
2298
2299 /*
2300 * register changes must be followed by a software
2301 * reset to take effect
2302 */
2303 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
2304 Word |= PHY_CT_RESET;
2305 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
2306
2307 /* switch IEEE compatible power down mode off */
2308 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
2309 Word &= ~PHY_CT_PDOWN;
2310 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
2311 break;
2312
2313 /* energy detect and energy detect plus mode */
2314 case PHY_PM_ENERGY_DETECT:
2315 case PHY_PM_ENERGY_DETECT_PLUS:
2316 /*
2317 * - enable MAC 125 MHz clock
2318 */
2319 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
2320 Word &= ~PHY_M_PC_DIS_125CLK;
2321 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
2322
2323 /* disable energy detect mode */
2324 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
2325 Word &= ~PHY_M_PC_EN_DET_MSK;
2326 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
2327
2328 /*
2329 * reinitialize the PHY to force a software reset
2330 * which is necessary after the register settings
2331 * for the energy detect modes.
2332 * Furthermore reinitialisation prevents that the
2333 * PHY is running out of a stable state.
2334 */
2335 SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
2336 break;
2337
2338 /* don't change current power mode */
2339 default:
2340 pAC->GIni.GP[Port].PPhyPowerState = LastMode;
2341 Ret = 1;
2342 break;
2343 }
2344 }
2345 /* low power modes are not supported by this chip */
2346 else {
2347 Ret = 1;
2348 }
2349
2350 return(Ret);
2351
2352} /* SkGmLeaveLowPowerMode */
2353#endif /* !SK_SLIM */
2354
2355
2356/****************************************************************************** 2048/******************************************************************************
2357 * 2049 *
2358 * SkGmInitPhyMarv() - Initialize the Marvell Phy registers 2050 * SkGmInitPhyMarv() - Initialize the Marvell Phy registers
@@ -3420,145 +3112,6 @@ int Port) /* Port Index (MAC_1 + n) */
3420} /* SkMacAutoNegDone */ 3112} /* SkMacAutoNegDone */
3421 3113
3422 3114
3423#ifdef GENESIS
3424/******************************************************************************
3425 *
3426 * SkXmSetRxTxEn() - Special Set Rx/Tx Enable and some features in XMAC
3427 *
3428 * Description:
3429 * sets MAC or PHY LoopBack and Duplex Mode in the MMU Command Reg.
3430 * enables Rx/Tx
3431 *
3432 * Returns: N/A
3433 */
3434static void SkXmSetRxTxEn(
3435SK_AC *pAC, /* Adapter Context */
3436SK_IOC IoC, /* IO context */
3437int Port, /* Port Index (MAC_1 + n) */
3438int Para) /* Parameter to set: MAC or PHY LoopBack, Duplex Mode */
3439{
3440 SK_U16 Word;
3441
3442 XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
3443
3444 switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
3445 case SK_MAC_LOOPB_ON:
3446 Word |= XM_MMU_MAC_LB;
3447 break;
3448 case SK_MAC_LOOPB_OFF:
3449 Word &= ~XM_MMU_MAC_LB;
3450 break;
3451 }
3452
3453 switch (Para & (SK_PHY_LOOPB_ON | SK_PHY_LOOPB_OFF)) {
3454 case SK_PHY_LOOPB_ON:
3455 Word |= XM_MMU_GMII_LOOP;
3456 break;
3457 case SK_PHY_LOOPB_OFF:
3458 Word &= ~XM_MMU_GMII_LOOP;
3459 break;
3460 }
3461
3462 switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
3463 case SK_PHY_FULLD_ON:
3464 Word |= XM_MMU_GMII_FD;
3465 break;
3466 case SK_PHY_FULLD_OFF:
3467 Word &= ~XM_MMU_GMII_FD;
3468 break;
3469 }
3470
3471 XM_OUT16(IoC, Port, XM_MMU_CMD, Word | XM_MMU_ENA_RX | XM_MMU_ENA_TX);
3472
3473 /* dummy read to ensure writing */
3474 XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
3475
3476} /* SkXmSetRxTxEn */
3477#endif /* GENESIS */
3478
3479
3480#ifdef YUKON
3481/******************************************************************************
3482 *
3483 * SkGmSetRxTxEn() - Special Set Rx/Tx Enable and some features in GMAC
3484 *
3485 * Description:
3486 * sets MAC LoopBack and Duplex Mode in the General Purpose Control Reg.
3487 * enables Rx/Tx
3488 *
3489 * Returns: N/A
3490 */
3491static void SkGmSetRxTxEn(
3492SK_AC *pAC, /* Adapter Context */
3493SK_IOC IoC, /* IO context */
3494int Port, /* Port Index (MAC_1 + n) */
3495int Para) /* Parameter to set: MAC LoopBack, Duplex Mode */
3496{
3497 SK_U16 Ctrl;
3498
3499 GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
3500
3501 switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
3502 case SK_MAC_LOOPB_ON:
3503 Ctrl |= GM_GPCR_LOOP_ENA;
3504 break;
3505 case SK_MAC_LOOPB_OFF:
3506 Ctrl &= ~GM_GPCR_LOOP_ENA;
3507 break;
3508 }
3509
3510 switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
3511 case SK_PHY_FULLD_ON:
3512 Ctrl |= GM_GPCR_DUP_FULL;
3513 break;
3514 case SK_PHY_FULLD_OFF:
3515 Ctrl &= ~GM_GPCR_DUP_FULL;
3516 break;
3517 }
3518
3519 GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Ctrl | GM_GPCR_RX_ENA |
3520 GM_GPCR_TX_ENA));
3521
3522 /* dummy read to ensure writing */
3523 GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
3524
3525} /* SkGmSetRxTxEn */
3526#endif /* YUKON */
3527
3528
3529#ifndef SK_SLIM
3530/******************************************************************************
3531 *
3532 * SkMacSetRxTxEn() - Special Set Rx/Tx Enable and parameters
3533 *
3534 * Description: calls the Special Set Rx/Tx Enable routines dep. on board type
3535 *
3536 * Returns: N/A
3537 */
3538void SkMacSetRxTxEn(
3539SK_AC *pAC, /* Adapter Context */
3540SK_IOC IoC, /* IO context */
3541int Port, /* Port Index (MAC_1 + n) */
3542int Para)
3543{
3544#ifdef GENESIS
3545 if (pAC->GIni.GIGenesis) {
3546
3547 SkXmSetRxTxEn(pAC, IoC, Port, Para);
3548 }
3549#endif /* GENESIS */
3550
3551#ifdef YUKON
3552 if (pAC->GIni.GIYukon) {
3553
3554 SkGmSetRxTxEn(pAC, IoC, Port, Para);
3555 }
3556#endif /* YUKON */
3557
3558} /* SkMacSetRxTxEn */
3559#endif /* !SK_SLIM */
3560
3561
3562/****************************************************************************** 3115/******************************************************************************
3563 * 3116 *
3564 * SkMacRxTxEnable() - Enable Rx/Tx activity if port is up 3117 * SkMacRxTxEnable() - Enable Rx/Tx activity if port is up
@@ -3976,7 +3529,7 @@ SK_U16 PhyStat) /* PHY Status word to analyse */
3976 * Returns: 3529 * Returns:
3977 * nothing 3530 * nothing
3978 */ 3531 */
3979void SkXmIrq( 3532static void SkXmIrq(
3980SK_AC *pAC, /* adapter context */ 3533SK_AC *pAC, /* adapter context */
3981SK_IOC IoC, /* IO context */ 3534SK_IOC IoC, /* IO context */
3982int Port) /* Port Index (MAC_1 + n) */ 3535int Port) /* Port Index (MAC_1 + n) */
@@ -4112,7 +3665,7 @@ int Port) /* Port Index (MAC_1 + n) */
4112 * Returns: 3665 * Returns:
4113 * nothing 3666 * nothing
4114 */ 3667 */
4115void SkGmIrq( 3668static void SkGmIrq(
4116SK_AC *pAC, /* adapter context */ 3669SK_AC *pAC, /* adapter context */
4117SK_IOC IoC, /* IO context */ 3670SK_IOC IoC, /* IO context */
4118int Port) /* Port Index (MAC_1 + n) */ 3671int Port) /* Port Index (MAC_1 + n) */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 08:35:21 -0500