128 files changed, 2074 insertions, 1592 deletions

diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c
index a0a178dd189c..1423b0c0cd2e 100644
--- a/drivers/acpi/battery.c
+++ b/drivers/acpi/battery.c
@@ -174,15 +174,6 @@ static int acpi_battery_get_property(struct power_supply *psy,
                 break;
         case POWER_SUPPLY_PROP_CURRENT_NOW:
                 val->intval = battery->current_now * 1000;
-                /* if power units are mW, convert to mA by
-                   dividing by current voltage (mV/1000) */
-                if (!battery->power_unit) {
-                        if (battery->voltage_now) {
-                                val->intval /= battery->voltage_now;
-                                val->intval *= 1000;
-                        } else
-                                val->intval = -1;
-                }
                 break;
         case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
         case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
diff --git a/drivers/acpi/toshiba_acpi.c b/drivers/acpi/toshiba_acpi.c
index 25f531d892de..40e60fc2e596 100644
--- a/drivers/acpi/toshiba_acpi.c
+++ b/drivers/acpi/toshiba_acpi.c
@@ -824,32 +824,36 @@ static int __init toshiba_acpi_init(void)
                         toshiba_acpi_exit();
                         return -ENOMEM;
                 }
-        }
 
-        /* Register input device for kill switch */
-        toshiba_acpi.poll_dev = input_allocate_polled_device();
-        if (!toshiba_acpi.poll_dev) {
-                printk(MY_ERR "unable to allocate kill-switch input device\n");
-                toshiba_acpi_exit();
-                return -ENOMEM;
-        }
-        toshiba_acpi.poll_dev->private = &toshiba_acpi;
-        toshiba_acpi.poll_dev->poll = bt_poll_rfkill;
-        toshiba_acpi.poll_dev->poll_interval = 1000; /* msecs */
-
-        toshiba_acpi.poll_dev->input->name = toshiba_acpi.rfk_name;
-        toshiba_acpi.poll_dev->input->id.bustype = BUS_HOST;
-        toshiba_acpi.poll_dev->input->id.vendor = 0x0930; /* Toshiba USB ID */
-        set_bit(EV_SW, toshiba_acpi.poll_dev->input->evbit);
-        set_bit(SW_RFKILL_ALL, toshiba_acpi.poll_dev->input->swbit);
-        input_report_switch(toshiba_acpi.poll_dev->input, SW_RFKILL_ALL, TRUE);
-        input_sync(toshiba_acpi.poll_dev->input);
-
-        ret = input_register_polled_device(toshiba_acpi.poll_dev);
-        if (ret) {
-                printk(MY_ERR "unable to register kill-switch input device\n");
-                toshiba_acpi_exit();
-                return ret;
+                /* Register input device for kill switch */
+                toshiba_acpi.poll_dev = input_allocate_polled_device();
+                if (!toshiba_acpi.poll_dev) {
+                        printk(MY_ERR
+                               "unable to allocate kill-switch input device\n");
+                        toshiba_acpi_exit();
+                        return -ENOMEM;
+                }
+                toshiba_acpi.poll_dev->private = &toshiba_acpi;
+                toshiba_acpi.poll_dev->poll = bt_poll_rfkill;
+                toshiba_acpi.poll_dev->poll_interval = 1000; /* msecs */
+
+                toshiba_acpi.poll_dev->input->name = toshiba_acpi.rfk_name;
+                toshiba_acpi.poll_dev->input->id.bustype = BUS_HOST;
+                /* Toshiba USB ID */
+                toshiba_acpi.poll_dev->input->id.vendor = 0x0930;
+                set_bit(EV_SW, toshiba_acpi.poll_dev->input->evbit);
+                set_bit(SW_RFKILL_ALL, toshiba_acpi.poll_dev->input->swbit);
+                input_report_switch(toshiba_acpi.poll_dev->input,
+                                    SW_RFKILL_ALL, TRUE);
+                input_sync(toshiba_acpi.poll_dev->input);
+
+                ret = input_register_polled_device(toshiba_acpi.poll_dev);
+                if (ret) {
+                        printk(MY_ERR
+                               "unable to register kill-switch input device\n");
+                        toshiba_acpi_exit();
+                        return ret;
+                }
         }
 
         return 0;
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 78fbec8ceda0..421b7c71e72d 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -153,7 +153,7 @@ config SATA_PROMISE
           If unsure, say N.
 
 config SATA_SX4
-        tristate "Promise SATA SX4 support"
+        tristate "Promise SATA SX4 support (Experimental)"
         depends on PCI && EXPERIMENTAL
         help
           This option enables support for Promise Serial ATA SX4.
@@ -219,8 +219,8 @@ config PATA_ACPI
           otherwise unsupported hardware.
 
 config PATA_ALI
-        tristate "ALi PATA support (Experimental)"
-        depends on PCI && EXPERIMENTAL
+        tristate "ALi PATA support"
+        depends on PCI
         help
           This option enables support for the ALi ATA interfaces
           found on the many ALi chipsets.
@@ -263,7 +263,7 @@ config PATA_ATIIXP
           If unsure, say N.
 
 config PATA_CMD640_PCI
-        tristate "CMD640 PCI PATA support (Very Experimental)"
+        tristate "CMD640 PCI PATA support (Experimental)"
         depends on PCI && EXPERIMENTAL
         help
           This option enables support for the CMD640 PCI IDE
@@ -291,8 +291,8 @@ config PATA_CS5520
           If unsure, say N.
 
 config PATA_CS5530
-        tristate "CS5530 PATA support (Experimental)"
-        depends on PCI && EXPERIMENTAL
+        tristate "CS5530 PATA support"
+        depends on PCI
         help
           This option enables support for the Cyrix/NatSemi/AMD CS5530
           companion chip used with the MediaGX/Geode processor family.
@@ -309,8 +309,8 @@ config PATA_CS5535
           If unsure, say N.
 
 config PATA_CS5536
-        tristate "CS5536 PATA support (Experimental)"
-        depends on PCI && X86 && !X86_64 && EXPERIMENTAL
+        tristate "CS5536 PATA support"
+        depends on PCI && X86 && !X86_64
         help
           This option enables support for the AMD CS5536
           companion chip used with the Geode LX processor family.
@@ -363,7 +363,7 @@ config PATA_HPT37X
           If unsure, say N.
 
 config PATA_HPT3X2N
-        tristate "HPT 372N/302N PATA support (Very Experimental)"
+        tristate "HPT 372N/302N PATA support (Experimental)"
         depends on PCI && EXPERIMENTAL
         help
           This option enables support for the N variant HPT PATA
@@ -389,8 +389,8 @@ config PATA_HPT3X3_DMA
           problems with DMA on this chipset.
 
 config PATA_ISAPNP
-        tristate "ISA Plug and Play PATA support (Experimental)"
-        depends on EXPERIMENTAL && ISAPNP
+        tristate "ISA Plug and Play PATA support"
+        depends on ISAPNP
         help
           This option enables support for ISA plug & play ATA
           controllers such as those found on old soundcards.
@@ -498,8 +498,8 @@ config PATA_NINJA32
           If unsure, say N.
 
 config PATA_NS87410
-        tristate "Nat Semi NS87410 PATA support (Experimental)"
-        depends on PCI && EXPERIMENTAL
+        tristate "Nat Semi NS87410 PATA support"
+        depends on PCI
         help
           This option enables support for the National Semiconductor
           NS87410 PCI-IDE controller.
@@ -507,8 +507,8 @@ config PATA_NS87410
           If unsure, say N.
 
 config PATA_NS87415
-        tristate "Nat Semi NS87415 PATA support (Experimental)"
-        depends on PCI && EXPERIMENTAL
+        tristate "Nat Semi NS87415 PATA support"
+        depends on PCI
         help
           This option enables support for the National Semiconductor
           NS87415 PCI-IDE controller.
@@ -544,8 +544,8 @@ config PATA_PCMCIA
           If unsure, say N.
 
 config PATA_PDC_OLD
-        tristate "Older Promise PATA controller support (Experimental)"
-        depends on PCI && EXPERIMENTAL
+        tristate "Older Promise PATA controller support"
+        depends on PCI
         help
           This option enables support for the Promise 20246, 20262, 20263,
           20265 and 20267 adapters.
@@ -559,7 +559,7 @@ config PATA_QDI
           Support for QDI 6500 and 6580 PATA controllers on VESA local bus.
 
 config PATA_RADISYS
-        tristate "RADISYS 82600 PATA support (Very Experimental)"
+        tristate "RADISYS 82600 PATA support (Experimental)"
         depends on PCI && EXPERIMENTAL
         help
           This option enables support for the RADISYS 82600
@@ -586,8 +586,8 @@ config PATA_RZ1000
           If unsure, say N.
 
 config PATA_SC1200
-        tristate "SC1200 PATA support (Very Experimental)"
-        depends on PCI && EXPERIMENTAL
+        tristate "SC1200 PATA support"
+        depends on PCI
         help
           This option enables support for the NatSemi/AMD SC1200 SoC
           companion chip used with the Geode processor family.
@@ -620,8 +620,8 @@ config PATA_SIL680
           If unsure, say N.
 
 config PATA_SIS
-        tristate "SiS PATA support (Experimental)"
-        depends on PCI && EXPERIMENTAL
+        tristate "SiS PATA support"
+        depends on PCI
         help
           This option enables support for SiS PATA controllers
 
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index d6d97d8f3fa4..c11936e13dd3 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -1072,7 +1072,14 @@ static int piix_broken_suspend(void)
          * matching is necessary because dmi_system_id.matches is
          * limited to four entries.
          */
-        if (!strcmp(dmi_get_system_info(DMI_SYS_VENDOR), "TOSHIBA") &&
+        if (dmi_get_system_info(DMI_SYS_VENDOR) &&
+            dmi_get_system_info(DMI_PRODUCT_NAME) &&
+            dmi_get_system_info(DMI_PRODUCT_VERSION) &&
+            dmi_get_system_info(DMI_PRODUCT_SERIAL) &&
+            dmi_get_system_info(DMI_BOARD_VENDOR) &&
+            dmi_get_system_info(DMI_BOARD_NAME) &&
+            dmi_get_system_info(DMI_BOARD_VERSION) &&
+            !strcmp(dmi_get_system_info(DMI_SYS_VENDOR), "TOSHIBA") &&
             !strcmp(dmi_get_system_info(DMI_PRODUCT_NAME), "000000") &&
             !strcmp(dmi_get_system_info(DMI_PRODUCT_VERSION), "000000") &&
             !strcmp(dmi_get_system_info(DMI_PRODUCT_SERIAL), "000000") &&
diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c
index f2b83eabc7c7..a098ba8eaab6 100644
--- a/drivers/ata/pata_hpt366.c
+++ b/drivers/ata/pata_hpt366.c
@@ -382,10 +382,10 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
         /* PCI clocking determines the ATA timing values to use */
         /* info_hpt366 is safe against re-entry so we can scribble on it */
         switch((reg1 & 0x700) >> 8) {
-                case 5:
+                case 9:
                         hpriv = &hpt366_40;
                         break;
-                case 9:
+                case 5:
                         hpriv = &hpt366_25;
                         break;
                 default:
diff --git a/drivers/ata/pata_ninja32.c b/drivers/ata/pata_ninja32.c
index 4e466eae8b46..4dd9a3b031e4 100644
--- a/drivers/ata/pata_ninja32.c
+++ b/drivers/ata/pata_ninja32.c
@@ -44,7 +44,7 @@
 #include <linux/libata.h>
 
 #define DRV_NAME "pata_ninja32"
-#define DRV_VERSION "0.1.1"
+#define DRV_VERSION "0.1.3"
 
 
 /**
@@ -130,7 +130,8 @@ static int ninja32_init_one(struct pci_dev *dev, const struct pci_device_id *id)
                 return rc;
         pci_set_master(dev);
 
-        /* Set up the register mappings */
+        /* Set up the register mappings. We use the I/O mapping as only the
+           older chips also have MMIO on BAR 1 */
         base = host->iomap[0];
         if (!base)
                 return -ENOMEM;
@@ -167,8 +168,12 @@ static int ninja32_reinit_one(struct pci_dev *pdev)
 #endif
 
 static const struct pci_device_id ninja32[] = {
+        { 0x10FC, 0x0003, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+        { 0x1145, 0x8008, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+        { 0x1145, 0xf008, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
         { 0x1145, 0xf021, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
         { 0x1145, 0xf024, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+        { 0x1145, 0xf02C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
         { },
 };
 
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c
index d34236611752..e4be55e047f6 100644
--- a/drivers/ata/pata_sis.c
+++ b/drivers/ata/pata_sis.c
@@ -56,7 +56,6 @@ static const struct sis_laptop sis_laptop[] = {
         { 0x5513, 0x1043, 0x1107 },     /* ASUS A6K */
         { 0x5513, 0x1734, 0x105F },     /* FSC Amilo A1630 */
         { 0x5513, 0x1071, 0x8640 },     /* EasyNote K5305 */
-        { 0x5513, 0x1039, 0x5513 },     /* Targa Visionary 1000 */
         /* end marker */
         { 0, }
 };
diff --git a/drivers/atm/horizon.c b/drivers/atm/horizon.c
index 615412364e99..6b969f8c684f 100644
--- a/drivers/atm/horizon.c
+++ b/drivers/atm/horizon.c
@@ -2705,7 +2705,7 @@ static int __devinit hrz_probe(struct pci_dev *pci_dev, const struct pci_device_
 
         /* XXX DEV_LABEL is a guess */
         if (!request_region(iobase, HRZ_IO_EXTENT, DEV_LABEL)) {
-                return -EINVAL;
+                err = -EINVAL;
                 goto out_disable;
         }
 
diff --git a/drivers/block/pktcdvd.c b/drivers/block/pktcdvd.c
index f20bf359b84f..dc7a8c352da2 100644
--- a/drivers/block/pktcdvd.c
+++ b/drivers/block/pktcdvd.c
@@ -302,7 +302,7 @@ static struct kobj_type kobj_pkt_type_wqueue = {
 static void pkt_sysfs_dev_new(struct pktcdvd_device *pd)
 {
         if (class_pktcdvd) {
-                pd->dev = device_create(class_pktcdvd, NULL, pd->pkt_dev, NULL,
+                pd->dev = device_create(class_pktcdvd, NULL, MKDEV(0, 0), NULL,
                                         "%s", pd->name);
                 if (IS_ERR(pd->dev))
                         pd->dev = NULL;
@@ -2790,7 +2790,7 @@ static int pkt_new_dev(struct pktcdvd_device *pd, dev_t dev)
         return 0;
 
 out_mem:
-        blkdev_put(bdev, FMODE_READ|FMODE_WRITE);
+        blkdev_put(bdev, FMODE_READ | FMODE_NDELAY);
         /* This is safe: open() is still holding a reference. */
         module_put(THIS_MODULE);
         return ret;
@@ -2975,7 +2975,7 @@ static int pkt_remove_dev(dev_t pkt_dev)
         pkt_debugfs_dev_remove(pd);
         pkt_sysfs_dev_remove(pd);
 
-        blkdev_put(pd->bdev, FMODE_READ|FMODE_WRITE);
+        blkdev_put(pd->bdev, FMODE_READ | FMODE_NDELAY);
 
         remove_proc_entry(pd->name, pkt_proc);
         DPRINTK(DRIVER_NAME": writer %s unmapped\n", pd->name);
diff --git a/drivers/cdrom/cdrom.c b/drivers/cdrom/cdrom.c
index d16b02423d61..7d2e91cccb13 100644
--- a/drivers/cdrom/cdrom.c
+++ b/drivers/cdrom/cdrom.c
@@ -2081,10 +2081,6 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf,
         if (!q)
                 return -ENXIO;
 
-        rq = blk_get_request(q, READ, GFP_KERNEL);
-        if (!rq)
-                return -ENOMEM;
-
         cdi->last_sense = 0;
 
         while (nframes) {
@@ -2096,9 +2092,17 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf,
 
                 len = nr * CD_FRAMESIZE_RAW;
 
+                rq = blk_get_request(q, READ, GFP_KERNEL);
+                if (!rq) {
+                        ret = -ENOMEM;
+                        break;
+                }
+
                 ret = blk_rq_map_user(q, rq, NULL, ubuf, len, GFP_KERNEL);
-                if (ret)
+                if (ret) {
+                        blk_put_request(rq);
                         break;
+                }
 
                 rq->cmd[0] = GPCMD_READ_CD;
                 rq->cmd[1] = 1 << 2;
@@ -2124,6 +2128,7 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf,
 
                 if (blk_rq_unmap_user(bio))
                         ret = -EFAULT;
+                blk_put_request(rq);
 
                 if (ret)
                         break;
@@ -2133,7 +2138,6 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf,
                 ubuf += len;
         }
 
-        blk_put_request(rq);
         return ret;
 }
 
diff --git a/drivers/char/cp437.uni b/drivers/char/cp437.uni
index 1f06889a96b9..bc6163484f62 100644
--- a/drivers/char/cp437.uni
+++ b/drivers/char/cp437.uni
@@ -27,7 +27,7 @@
 0x0c    U+2640
 0x0d    U+266a
 0x0e    U+266b
-0x0f    U+263c
+0x0f    U+263c U+00a4
 0x10    U+25b6 U+25ba
 0x11    U+25c0 U+25c4
 0x12    U+2195
@@ -55,7 +55,7 @@
 0x24    U+0024
 0x25    U+0025
 0x26    U+0026
-0x27    U+0027
+0x27    U+0027 U+00b4
 0x28    U+0028
 0x29    U+0029
 0x2a    U+002a
@@ -84,7 +84,7 @@
 0x41    U+0041 U+00c0 U+00c1 U+00c2 U+00c3
 0x42    U+0042
 0x43    U+0043 U+00a9
-0x44    U+0044
+0x44    U+0044 U+00d0
 0x45    U+0045 U+00c8 U+00ca U+00cb
 0x46    U+0046
 0x47    U+0047
@@ -140,7 +140,7 @@
 0x79    U+0079 U+00fd
 0x7a    U+007a
 0x7b    U+007b
-0x7c    U+007c U+00a5
+0x7c    U+007c U+00a6
 0x7d    U+007d
 0x7e    U+007e
 #
@@ -263,10 +263,10 @@
 0xe8    U+03a6 U+00d8
 0xe9    U+0398
 0xea    U+03a9 U+2126
-0xeb    U+03b4
+0xeb    U+03b4 U+00f0
 0xec    U+221e
 0xed    U+03c6 U+00f8
-0xee    U+03b5
+0xee    U+03b5 U+2208
 0xef    U+2229
 0xf0    U+2261
 0xf1    U+00b1
diff --git a/drivers/char/serial167.c b/drivers/char/serial167.c
index 3b23270eaa65..a8f15e6be594 100644
--- a/drivers/char/serial167.c
+++ b/drivers/char/serial167.c
@@ -418,7 +418,7 @@ static irqreturn_t cd2401_rxerr_interrupt(int irq, void *dev_id)
                                                              TTY_OVERRUN);
                                         /*
                                            If the flip buffer itself is
-                                           overflowing, we still loose
+                                           overflowing, we still lose
                                            the next incoming character.
                                          */
                                         if (tty_buffer_request_room(tty, 1) !=
diff --git a/drivers/char/vt.c b/drivers/char/vt.c
index a5af6072e2b3..008176edbd64 100644
--- a/drivers/char/vt.c
+++ b/drivers/char/vt.c
@@ -2274,7 +2274,7 @@ rescan_last_byte:
                                     continue; /* nothing to display */
                                 }
                                 /* Glyph not found */
-                                if ((!(vc->vc_utf && !vc->vc_disp_ctrl) || c < 128) && !(c & ~charmask)) {
+                                if ((!(vc->vc_utf && !vc->vc_disp_ctrl) && c < 128) && !(c & ~charmask)) {
                                     /* In legacy mode use the glyph we get by a 1:1 mapping.
                                        This would make absolutely no sense with Unicode in mind,
                                        but do this for ASCII characters since a font may lack
diff --git a/drivers/firewire/fw-ohci.c b/drivers/firewire/fw-ohci.c
index 46610b090415..ab9c01e462ef 100644
--- a/drivers/firewire/fw-ohci.c
+++ b/drivers/firewire/fw-ohci.c
@@ -974,6 +974,7 @@ at_context_queue_packet(struct context *ctx, struct fw_packet *packet)
                         packet->ack = RCODE_SEND_ERROR;
                         return -1;
                 }
+                packet->payload_bus = payload_bus;
 
                 d[2].req_count    = cpu_to_le16(packet->payload_length);
                 d[2].data_address = cpu_to_le32(payload_bus);
@@ -1025,7 +1026,6 @@ static int handle_at_packet(struct context *context,
         struct driver_data *driver_data;
         struct fw_packet *packet;
         struct fw_ohci *ohci = context->ohci;
-        dma_addr_t payload_bus;
         int evt;
 
         if (last->transfer_status == 0)
@@ -1038,9 +1038,8 @@ static int handle_at_packet(struct context *context,
                 /* This packet was cancelled, just continue. */
                 return 1;
 
-        payload_bus = le32_to_cpu(last->data_address);
-        if (payload_bus != 0)
-                dma_unmap_single(ohci->card.device, payload_bus,
+        if (packet->payload_bus)
+                dma_unmap_single(ohci->card.device, packet->payload_bus,
                                  packet->payload_length, DMA_TO_DEVICE);
 
         evt = le16_to_cpu(last->transfer_status) & 0x1f;
@@ -1697,6 +1696,10 @@ static int ohci_cancel_packet(struct fw_card *card, struct fw_packet *packet)
         if (packet->ack != 0)
                 goto out;
 
+        if (packet->payload_bus)
+                dma_unmap_single(ohci->card.device, packet->payload_bus,
+                                 packet->payload_length, DMA_TO_DEVICE);
+
         log_ar_at_event('T', packet->speed, packet->header, 0x20);
         driver_data->packet = NULL;
         packet->ack = RCODE_CANCELLED;
diff --git a/drivers/firewire/fw-transaction.c b/drivers/firewire/fw-transaction.c
index 022ac4fabb67..2884f876397b 100644
--- a/drivers/firewire/fw-transaction.c
+++ b/drivers/firewire/fw-transaction.c
@@ -207,6 +207,7 @@ fw_fill_request(struct fw_packet *packet, int tcode, int tlabel,
         packet->speed = speed;
         packet->generation = generation;
         packet->ack = 0;
+        packet->payload_bus = 0;
 }
 
 /**
@@ -581,6 +582,8 @@ fw_fill_response(struct fw_packet *response, u32 *request_header,
                 BUG();
                 return;
         }
+
+        response->payload_bus = 0;
 }
 EXPORT_SYMBOL(fw_fill_response);
 
diff --git a/drivers/firewire/fw-transaction.h b/drivers/firewire/fw-transaction.h
index aed7dbb17cda..839466f0a795 100644
--- a/drivers/firewire/fw-transaction.h
+++ b/drivers/firewire/fw-transaction.h
@@ -27,6 +27,7 @@
 #include <linux/list.h>
 #include <linux/spinlock_types.h>
 #include <linux/timer.h>
+#include <linux/types.h>
 #include <linux/workqueue.h>
 
 #define TCODE_IS_READ_REQUEST(tcode)    (((tcode) & ~1) == 4)
@@ -153,6 +154,7 @@ struct fw_packet {
         size_t header_length;
         void *payload;
         size_t payload_length;
+        dma_addr_t payload_bus;
         u32 timestamp;
 
         /*
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index ba89b42f790a..553dd4bc3075 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -847,9 +847,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
          * and the registers being closely associated.
          *
          * According to chipset errata, on the 965GM, MSI interrupts may
-         * be lost or delayed
+         * be lost or delayed, but we use them anyways to avoid
+         * stuck interrupts on some machines.
          */
-        if (!IS_I945G(dev) && !IS_I945GM(dev) && !IS_I965GM(dev))
+        if (!IS_I945G(dev) && !IS_I945GM(dev))
                 pci_enable_msi(dev->pdev);
 
         intel_opregion_init(dev);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0a4f39b9a0ec..adc972cc6bfc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -244,6 +244,10 @@ typedef struct drm_i915_private {
                  * List of objects currently involved in rendering from the
                  * ringbuffer.
                  *
+                 * Includes buffers having the contents of their GPU caches
+                 * flushed, not necessarily primitives.  last_rendering_seqno
+                 * represents when the rendering involved will be completed.
+                 *
                  * A reference is held on the buffer while on this list.
                  */
                 struct list_head active_list;
@@ -253,6 +257,8 @@ typedef struct drm_i915_private {
                  * still have a write_domain which needs to be flushed before
                  * unbinding.
                  *
+                 * last_rendering_seqno is 0 while an object is in this list.
+                 *
                  * A reference is held on the buffer while on this list.
                  */
                 struct list_head flushing_list;
@@ -261,6 +267,8 @@ typedef struct drm_i915_private {
                  * LRU list of objects which are not in the ringbuffer and
                  * are ready to unbind, but are still in the GTT.
                  *
+                 * last_rendering_seqno is 0 while an object is in this list.
+                 *
                  * A reference is not held on the buffer while on this list,
                  * as merely being GTT-bound shouldn't prevent its being
                  * freed, and we'll pull it off the list in the free path.
@@ -371,8 +379,8 @@ struct drm_i915_gem_object {
         uint32_t agp_type;
 
         /**
-         * Flagging of which individual pages are valid in GEM_DOMAIN_CPU when
-         * GEM_DOMAIN_CPU is not in the object's read domain.
+         * If present, while GEM_DOMAIN_CPU is in the read domain this array
+         * flags which individual pages are valid.
          */
         uint8_t *page_cpu_valid;
 };
@@ -394,9 +402,6 @@ struct drm_i915_gem_request {
         /** Time at which this request was emitted, in jiffies. */
         unsigned long emitted_jiffies;
 
-        /** Cache domains that were flushed at the start of the request. */
-        uint32_t flush_domains;
-
         struct list_head list;
 };
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index d58ddef468f8..ad672d854828 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -33,21 +33,21 @@
 
 #define I915_GEM_GPU_DOMAINS    (~(I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT))
 
-static int
-i915_gem_object_set_domain(struct drm_gem_object *obj,
-                            uint32_t read_domains,
-                            uint32_t write_domain);
-static int
-i915_gem_object_set_domain_range(struct drm_gem_object *obj,
-                                 uint64_t offset,
-                                 uint64_t size,
-                                 uint32_t read_domains,
-                                 uint32_t write_domain);
-static int
-i915_gem_set_domain(struct drm_gem_object *obj,
-                    struct drm_file *file_priv,
-                    uint32_t read_domains,
-                    uint32_t write_domain);
+static void
+i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj,
+                                  uint32_t read_domains,
+                                  uint32_t write_domain);
+static void i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj);
+static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj);
+static void i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj);
+static int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
+                                             int write);
+static int i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj,
+                                             int write);
+static int i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
+                                                     uint64_t offset,
+                                                     uint64_t size);
+static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj);
 static int i915_gem_object_get_page_list(struct drm_gem_object *obj);
 static void i915_gem_object_free_page_list(struct drm_gem_object *obj);
 static int i915_gem_object_wait_rendering(struct drm_gem_object *obj);
@@ -162,8 +162,8 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
 
         mutex_lock(&dev->struct_mutex);
 
-        ret = i915_gem_object_set_domain_range(obj, args->offset, args->size,
-                                               I915_GEM_DOMAIN_CPU, 0);
+        ret = i915_gem_object_set_cpu_read_domain_range(obj, args->offset,
+                                                        args->size);
         if (ret != 0) {
                 drm_gem_object_unreference(obj);
                 mutex_unlock(&dev->struct_mutex);
@@ -260,8 +260,7 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
                 mutex_unlock(&dev->struct_mutex);
                 return ret;
         }
-        ret = i915_gem_set_domain(obj, file_priv,
-                                  I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+        ret = i915_gem_object_set_to_gtt_domain(obj, 1);
         if (ret)
                 goto fail;
 
@@ -320,8 +319,7 @@ i915_gem_shmem_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
 
         mutex_lock(&dev->struct_mutex);
 
-        ret = i915_gem_set_domain(obj, file_priv,
-                                  I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+        ret = i915_gem_object_set_to_cpu_domain(obj, 1);
         if (ret) {
                 mutex_unlock(&dev->struct_mutex);
                 return ret;
@@ -397,7 +395,8 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
 }
 
 /**
- * Called when user space prepares to use an object
+ * Called when user space prepares to use an object with the CPU, either
+ * through the mmap ioctl's mapping or a GTT mapping.
  */
 int
 i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
@@ -405,11 +404,26 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
 {
         struct drm_i915_gem_set_domain *args = data;
         struct drm_gem_object *obj;
+        uint32_t read_domains = args->read_domains;
+        uint32_t write_domain = args->write_domain;
         int ret;
 
         if (!(dev->driver->driver_features & DRIVER_GEM))
                 return -ENODEV;
 
+        /* Only handle setting domains to types used by the CPU. */
+        if (write_domain & ~(I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT))
+                return -EINVAL;
+
+        if (read_domains & ~(I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT))
+                return -EINVAL;
+
+        /* Having something in the write domain implies it's in the read
+         * domain, and only that read domain.  Enforce that in the request.
+         */
+        if (write_domain != 0 && read_domains != write_domain)
+                return -EINVAL;
+
         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
         if (obj == NULL)
                 return -EBADF;
@@ -417,10 +431,21 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
         mutex_lock(&dev->struct_mutex);
 #if WATCH_BUF
         DRM_INFO("set_domain_ioctl %p(%d), %08x %08x\n",
-                 obj, obj->size, args->read_domains, args->write_domain);
+                 obj, obj->size, read_domains, write_domain);
 #endif
-        ret = i915_gem_set_domain(obj, file_priv,
-                                  args->read_domains, args->write_domain);
+        if (read_domains & I915_GEM_DOMAIN_GTT) {
+                ret = i915_gem_object_set_to_gtt_domain(obj, write_domain != 0);
+
+                /* Silently promote "you're not bound, there was nothing to do"
+                 * to success, since the client was just asking us to
+                 * make sure everything was done.
+                 */
+                if (ret == -EINVAL)
+                        ret = 0;
+        } else {
+                ret = i915_gem_object_set_to_cpu_domain(obj, write_domain != 0);
+        }
+
         drm_gem_object_unreference(obj);
         mutex_unlock(&dev->struct_mutex);
         return ret;
@@ -455,10 +480,9 @@ i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
         obj_priv = obj->driver_private;
 
         /* Pinned buffers may be scanout, so flush the cache */
-        if ((obj->write_domain & I915_GEM_DOMAIN_CPU) && obj_priv->pin_count) {
-                i915_gem_clflush_object(obj);
-                drm_agp_chipset_flush(dev);
-        }
+        if (obj_priv->pin_count)
+                i915_gem_object_flush_cpu_write_domain(obj);
+
         drm_gem_object_unreference(obj);
         mutex_unlock(&dev->struct_mutex);
         return ret;
@@ -532,7 +556,7 @@ i915_gem_object_free_page_list(struct drm_gem_object *obj)
 }
 
 static void
-i915_gem_object_move_to_active(struct drm_gem_object *obj)
+i915_gem_object_move_to_active(struct drm_gem_object *obj, uint32_t seqno)
 {
         struct drm_device *dev = obj->dev;
         drm_i915_private_t *dev_priv = dev->dev_private;
@@ -546,8 +570,20 @@ i915_gem_object_move_to_active(struct drm_gem_object *obj)
         /* Move from whatever list we were on to the tail of execution. */
         list_move_tail(&obj_priv->list,
                        &dev_priv->mm.active_list);
+        obj_priv->last_rendering_seqno = seqno;
 }
 
+static void
+i915_gem_object_move_to_flushing(struct drm_gem_object *obj)
+{
+        struct drm_device *dev = obj->dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        struct drm_i915_gem_object *obj_priv = obj->driver_private;
+
+        BUG_ON(!obj_priv->active);
+        list_move_tail(&obj_priv->list, &dev_priv->mm.flushing_list);
+        obj_priv->last_rendering_seqno = 0;
+}
 
 static void
 i915_gem_object_move_to_inactive(struct drm_gem_object *obj)
@@ -562,6 +598,7 @@ i915_gem_object_move_to_inactive(struct drm_gem_object *obj)
         else
                 list_move_tail(&obj_priv->list, &dev_priv->mm.inactive_list);
 
+        obj_priv->last_rendering_seqno = 0;
         if (obj_priv->active) {
                 obj_priv->active = 0;
                 drm_gem_object_unreference(obj);
@@ -610,10 +647,28 @@ i915_add_request(struct drm_device *dev, uint32_t flush_domains)
 
         request->seqno = seqno;
         request->emitted_jiffies = jiffies;
-        request->flush_domains = flush_domains;
         was_empty = list_empty(&dev_priv->mm.request_list);
         list_add_tail(&request->list, &dev_priv->mm.request_list);
 
+        /* Associate any objects on the flushing list matching the write
+         * domain we're flushing with our flush.
+         */
+        if (flush_domains != 0) {
+                struct drm_i915_gem_object *obj_priv, *next;
+
+                list_for_each_entry_safe(obj_priv, next,
+                                         &dev_priv->mm.flushing_list, list) {
+                        struct drm_gem_object *obj = obj_priv->obj;
+
+                        if ((obj->write_domain & flush_domains) ==
+                            obj->write_domain) {
+                                obj->write_domain = 0;
+                                i915_gem_object_move_to_active(obj, seqno);
+                        }
+                }
+
+        }
+
         if (was_empty && !dev_priv->mm.suspended)
                 schedule_delayed_work(&dev_priv->mm.retire_work, HZ);
         return seqno;
@@ -676,30 +731,10 @@ i915_gem_retire_request(struct drm_device *dev,
                          __func__, request->seqno, obj);
 #endif
 
-                if (obj->write_domain != 0) {
-                        list_move_tail(&obj_priv->list,
-                                       &dev_priv->mm.flushing_list);
-                } else {
+                if (obj->write_domain != 0)
+                        i915_gem_object_move_to_flushing(obj);
+                else
                         i915_gem_object_move_to_inactive(obj);
-                }
-        }
-
-        if (request->flush_domains != 0) {
-                struct drm_i915_gem_object *obj_priv, *next;
-
-                /* Clear the write domain and activity from any buffers
-                 * that are just waiting for a flush matching the one retired.
-                 */
-                list_for_each_entry_safe(obj_priv, next,
-                                         &dev_priv->mm.flushing_list, list) {
-                        struct drm_gem_object *obj = obj_priv->obj;
-
-                        if (obj->write_domain & request->flush_domains) {
-                                obj->write_domain = 0;
-                                i915_gem_object_move_to_inactive(obj);
-                        }
-                }
-
         }
 }
 
@@ -892,25 +927,10 @@ i915_gem_object_wait_rendering(struct drm_gem_object *obj)
         struct drm_i915_gem_object *obj_priv = obj->driver_private;
         int ret;
 
-        /* If there are writes queued to the buffer, flush and
-         * create a new seqno to wait for.
+        /* This function only exists to support waiting for existing rendering,
+         * not for emitting required flushes.
          */
-        if (obj->write_domain & ~(I915_GEM_DOMAIN_CPU|I915_GEM_DOMAIN_GTT)) {
-                uint32_t write_domain = obj->write_domain;
-#if WATCH_BUF
-                DRM_INFO("%s: flushing object %p from write domain %08x\n",
-                          __func__, obj, write_domain);
-#endif
-                i915_gem_flush(dev, 0, write_domain);
-
-                i915_gem_object_move_to_active(obj);
-                obj_priv->last_rendering_seqno = i915_add_request(dev,
-                                                                  write_domain);
-                BUG_ON(obj_priv->last_rendering_seqno == 0);
-#if WATCH_LRU
-                DRM_INFO("%s: flush moves to exec list %p\n", __func__, obj);
-#endif
-        }
+        BUG_ON((obj->write_domain & I915_GEM_GPU_DOMAINS) != 0);
 
         /* If there is rendering queued on the buffer being evicted, wait for
          * it.
@@ -950,24 +970,16 @@ i915_gem_object_unbind(struct drm_gem_object *obj)
                 return -EINVAL;
         }
 
-        /* Wait for any rendering to complete
-         */
-        ret = i915_gem_object_wait_rendering(obj);
-        if (ret) {
-                DRM_ERROR("wait_rendering failed: %d\n", ret);
-                return ret;
-        }
-
         /* Move the object to the CPU domain to ensure that
          * any possible CPU writes while it's not in the GTT
          * are flushed when we go to remap it. This will
          * also ensure that all pending GPU writes are finished
          * before we unbind.
          */
-        ret = i915_gem_object_set_domain(obj, I915_GEM_DOMAIN_CPU,
-                                         I915_GEM_DOMAIN_CPU);
+        ret = i915_gem_object_set_to_cpu_domain(obj, 1);
         if (ret) {
-                DRM_ERROR("set_domain failed: %d\n", ret);
+                if (ret != -ERESTARTSYS)
+                        DRM_ERROR("set_domain failed: %d\n", ret);
                 return ret;
         }
 
@@ -1083,6 +1095,21 @@ i915_gem_evict_something(struct drm_device *dev)
 }
 
 static int
+i915_gem_evict_everything(struct drm_device *dev)
+{
+        int ret;
+
+        for (;;) {
+                ret = i915_gem_evict_something(dev);
+                if (ret != 0)
+                        break;
+        }
+        if (ret == -ENOMEM)
+                return 0;
+        return ret;
+}
+
+static int
 i915_gem_object_get_page_list(struct drm_gem_object *obj)
 {
         struct drm_i915_gem_object *obj_priv = obj->driver_private;
@@ -1168,7 +1195,8 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
 
                 ret = i915_gem_evict_something(dev);
                 if (ret != 0) {
-                        DRM_ERROR("Failed to evict a buffer %d\n", ret);
+                        if (ret != -ERESTARTSYS)
+                                DRM_ERROR("Failed to evict a buffer %d\n", ret);
                         return ret;
                 }
                 goto search_free;
@@ -1228,6 +1256,143 @@ i915_gem_clflush_object(struct drm_gem_object *obj)
         drm_clflush_pages(obj_priv->page_list, obj->size / PAGE_SIZE);
 }
 
+/** Flushes any GPU write domain for the object if it's dirty. */
+static void
+i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj)
+{
+        struct drm_device *dev = obj->dev;
+        uint32_t seqno;
+
+        if ((obj->write_domain & I915_GEM_GPU_DOMAINS) == 0)
+                return;
+
+        /* Queue the GPU write cache flushing we need. */
+        i915_gem_flush(dev, 0, obj->write_domain);
+        seqno = i915_add_request(dev, obj->write_domain);
+        obj->write_domain = 0;
+        i915_gem_object_move_to_active(obj, seqno);
+}
+
+/** Flushes the GTT write domain for the object if it's dirty. */
+static void
+i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj)
+{
+        if (obj->write_domain != I915_GEM_DOMAIN_GTT)
+                return;
+
+        /* No actual flushing is required for the GTT write domain.   Writes
+         * to it immediately go to main memory as far as we know, so there's
+         * no chipset flush.  It also doesn't land in render cache.
+         */
+        obj->write_domain = 0;
+}
+
+/** Flushes the CPU write domain for the object if it's dirty. */
+static void
+i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj)
+{
+        struct drm_device *dev = obj->dev;
+
+        if (obj->write_domain != I915_GEM_DOMAIN_CPU)
+                return;
+
+        i915_gem_clflush_object(obj);
+        drm_agp_chipset_flush(dev);
+        obj->write_domain = 0;
+}
+
+/**
+ * Moves a single object to the GTT read, and possibly write domain.
+ *
+ * This function returns when the move is complete, including waiting on
+ * flushes to occur.
+ */
+static int
+i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write)
+{
+        struct drm_i915_gem_object *obj_priv = obj->driver_private;
+        int ret;
+
+        /* Not valid to be called on unbound objects. */
+        if (obj_priv->gtt_space == NULL)
+                return -EINVAL;
+
+        i915_gem_object_flush_gpu_write_domain(obj);
+        /* Wait on any GPU rendering and flushing to occur. */
+        ret = i915_gem_object_wait_rendering(obj);
+        if (ret != 0)
+                return ret;
+
+        /* If we're writing through the GTT domain, then CPU and GPU caches
+         * will need to be invalidated at next use.
+         */
+        if (write)
+                obj->read_domains &= I915_GEM_DOMAIN_GTT;
+
+        i915_gem_object_flush_cpu_write_domain(obj);
+
+        /* It should now be out of any other write domains, and we can update
+         * the domain values for our changes.
+         */
+        BUG_ON((obj->write_domain & ~I915_GEM_DOMAIN_GTT) != 0);
+        obj->read_domains |= I915_GEM_DOMAIN_GTT;
+        if (write) {
+                obj->write_domain = I915_GEM_DOMAIN_GTT;
+                obj_priv->dirty = 1;
+        }
+
+        return 0;
+}
+
+/**
+ * Moves a single object to the CPU read, and possibly write domain.
+ *
+ * This function returns when the move is complete, including waiting on
+ * flushes to occur.
+ */
+static int
+i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write)
+{
+        struct drm_device *dev = obj->dev;
+        int ret;
+
+        i915_gem_object_flush_gpu_write_domain(obj);
+        /* Wait on any GPU rendering and flushing to occur. */
+        ret = i915_gem_object_wait_rendering(obj);
+        if (ret != 0)
+                return ret;
+
+        i915_gem_object_flush_gtt_write_domain(obj);
+
+        /* If we have a partially-valid cache of the object in the CPU,
+         * finish invalidating it and free the per-page flags.
+         */
+        i915_gem_object_set_to_full_cpu_read_domain(obj);
+
+        /* Flush the CPU cache if it's still invalid. */
+        if ((obj->read_domains & I915_GEM_DOMAIN_CPU) == 0) {
+                i915_gem_clflush_object(obj);
+                drm_agp_chipset_flush(dev);
+
+                obj->read_domains |= I915_GEM_DOMAIN_CPU;
+        }
+
+        /* It should now be out of any other write domains, and we can update
+         * the domain values for our changes.
+         */
+        BUG_ON((obj->write_domain & ~I915_GEM_DOMAIN_CPU) != 0);
+
+        /* If we're writing through the CPU, then the GPU read domains will
+         * need to be invalidated at next use.
+         */
+        if (write) {
+                obj->read_domains &= I915_GEM_DOMAIN_CPU;
+                obj->write_domain = I915_GEM_DOMAIN_CPU;
+        }
+
+        return 0;
+}
+
 /*
  * Set the next domain for the specified object. This
  * may not actually perform the necessary flushing/invaliding though,
@@ -1339,16 +1504,18 @@ i915_gem_clflush_object(struct drm_gem_object *obj)
  *              MI_FLUSH
  *              drm_agp_chipset_flush
  */
-static int
-i915_gem_object_set_domain(struct drm_gem_object *obj,
-                            uint32_t read_domains,
-                            uint32_t write_domain)
+static void
+i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj,
+                                  uint32_t read_domains,
+                                  uint32_t write_domain)
 {
         struct drm_device               *dev = obj->dev;
         struct drm_i915_gem_object      *obj_priv = obj->driver_private;
         uint32_t                        invalidate_domains = 0;
         uint32_t                        flush_domains = 0;
-        int                             ret;
+
+        BUG_ON(read_domains & I915_GEM_DOMAIN_CPU);
+        BUG_ON(write_domain == I915_GEM_DOMAIN_CPU);
 
 #if WATCH_BUF
         DRM_INFO("%s: object %p read %08x -> %08x write %08x -> %08x\n",
@@ -1385,34 +1552,11 @@ i915_gem_object_set_domain(struct drm_gem_object *obj,
                 DRM_INFO("%s: CPU domain flush %08x invalidate %08x\n",
                          __func__, flush_domains, invalidate_domains);
 #endif
-                /*
-                 * If we're invaliding the CPU cache and flushing a GPU cache,
-                 * then pause for rendering so that the GPU caches will be
-                 * flushed before the cpu cache is invalidated
-                 */
-                if ((invalidate_domains & I915_GEM_DOMAIN_CPU) &&
-                    (flush_domains & ~(I915_GEM_DOMAIN_CPU |
-                                       I915_GEM_DOMAIN_GTT))) {
-                        ret = i915_gem_object_wait_rendering(obj);
-                        if (ret)
-                                return ret;
-                }
                 i915_gem_clflush_object(obj);
         }
 
         if ((write_domain | flush_domains) != 0)
                 obj->write_domain = write_domain;
-
-        /* If we're invalidating the CPU domain, clear the per-page CPU
-         * domain list as well.
-         */
-        if (obj_priv->page_cpu_valid != NULL &&
-            (write_domain != 0 ||
-             read_domains & I915_GEM_DOMAIN_CPU)) {
-                drm_free(obj_priv->page_cpu_valid, obj->size / PAGE_SIZE,
-                         DRM_MEM_DRIVER);
-                obj_priv->page_cpu_valid = NULL;
-        }
         obj->read_domains = read_domains;
 
         dev->invalidate_domains |= invalidate_domains;
@@ -1423,47 +1567,94 @@ i915_gem_object_set_domain(struct drm_gem_object *obj,
                  obj->read_domains, obj->write_domain,
                  dev->invalidate_domains, dev->flush_domains);
 #endif
-        return 0;
 }
 
 /**
- * Set the read/write domain on a range of the object.
+ * Moves the object from a partially CPU read to a full one.
  *
- * Currently only implemented for CPU reads, otherwise drops to normal
- * i915_gem_object_set_domain().
+ * Note that this only resolves i915_gem_object_set_cpu_read_domain_range(),
+ * and doesn't handle transitioning from !(read_domains & I915_GEM_DOMAIN_CPU).
  */
-static int
-i915_gem_object_set_domain_range(struct drm_gem_object *obj,
-                                 uint64_t offset,
-                                 uint64_t size,
-                                 uint32_t read_domains,
-                                 uint32_t write_domain)
+static void
+i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj)
 {
+        struct drm_device *dev = obj->dev;
         struct drm_i915_gem_object *obj_priv = obj->driver_private;
-        int ret, i;
 
-        if (obj->read_domains & I915_GEM_DOMAIN_CPU)
-                return 0;
+        if (!obj_priv->page_cpu_valid)
+                return;
 
-        if (read_domains != I915_GEM_DOMAIN_CPU ||
-            write_domain != 0)
-                return i915_gem_object_set_domain(obj,
-                                                  read_domains, write_domain);
+        /* If we're partially in the CPU read domain, finish moving it in.
+         */
+        if (obj->read_domains & I915_GEM_DOMAIN_CPU) {
+                int i;
 
-        /* Wait on any GPU rendering to the object to be flushed. */
+                for (i = 0; i <= (obj->size - 1) / PAGE_SIZE; i++) {
+                        if (obj_priv->page_cpu_valid[i])
+                                continue;
+                        drm_clflush_pages(obj_priv->page_list + i, 1);
+                }
+                drm_agp_chipset_flush(dev);
+        }
+
+        /* Free the page_cpu_valid mappings which are now stale, whether
+         * or not we've got I915_GEM_DOMAIN_CPU.
+         */
+        drm_free(obj_priv->page_cpu_valid, obj->size / PAGE_SIZE,
+                 DRM_MEM_DRIVER);
+        obj_priv->page_cpu_valid = NULL;
+}
+
+/**
+ * Set the CPU read domain on a range of the object.
+ *
+ * The object ends up with I915_GEM_DOMAIN_CPU in its read flags although it's
+ * not entirely valid.  The page_cpu_valid member of the object flags which
+ * pages have been flushed, and will be respected by
+ * i915_gem_object_set_to_cpu_domain() if it's called on to get a valid mapping
+ * of the whole object.
+ *
+ * This function returns when the move is complete, including waiting on
+ * flushes to occur.
+ */
+static int
+i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
+                                          uint64_t offset, uint64_t size)
+{
+        struct drm_i915_gem_object *obj_priv = obj->driver_private;
+        int i, ret;
+
+        if (offset == 0 && size == obj->size)
+                return i915_gem_object_set_to_cpu_domain(obj, 0);
+
+        i915_gem_object_flush_gpu_write_domain(obj);
+        /* Wait on any GPU rendering and flushing to occur. */
         ret = i915_gem_object_wait_rendering(obj);
-        if (ret)
+        if (ret != 0)
                 return ret;
+        i915_gem_object_flush_gtt_write_domain(obj);
 
+        /* If we're already fully in the CPU read domain, we're done. */
+        if (obj_priv->page_cpu_valid == NULL &&
+            (obj->read_domains & I915_GEM_DOMAIN_CPU) != 0)
+                return 0;
+
+        /* Otherwise, create/clear the per-page CPU read domain flag if we're
+         * newly adding I915_GEM_DOMAIN_CPU
+         */
         if (obj_priv->page_cpu_valid == NULL) {
                 obj_priv->page_cpu_valid = drm_calloc(1, obj->size / PAGE_SIZE,
                                                       DRM_MEM_DRIVER);
-        }
+                if (obj_priv->page_cpu_valid == NULL)
+                        return -ENOMEM;
+        } else if ((obj->read_domains & I915_GEM_DOMAIN_CPU) == 0)
+                memset(obj_priv->page_cpu_valid, 0, obj->size / PAGE_SIZE);
 
         /* Flush the cache on any pages that are still invalid from the CPU's
          * perspective.
          */
-        for (i = offset / PAGE_SIZE; i <= (offset + size - 1) / PAGE_SIZE; i++) {
+        for (i = offset / PAGE_SIZE; i <= (offset + size - 1) / PAGE_SIZE;
+             i++) {
                 if (obj_priv->page_cpu_valid[i])
                         continue;
 
@@ -1472,39 +1663,14 @@ i915_gem_object_set_domain_range(struct drm_gem_object *obj,
                 obj_priv->page_cpu_valid[i] = 1;
         }
 
-        return 0;
-}
-
-/**
- * Once all of the objects have been set in the proper domain,
- * perform the necessary flush and invalidate operations.
- *
- * Returns the write domains flushed, for use in flush tracking.
- */
-static uint32_t
-i915_gem_dev_set_domain(struct drm_device *dev)
-{
-        uint32_t flush_domains = dev->flush_domains;
-
-        /*
-         * Now that all the buffers are synced to the proper domains,
-         * flush and invalidate the collected domains
+        /* It should now be out of any other write domains, and we can update
+         * the domain values for our changes.
          */
-        if (dev->invalidate_domains | dev->flush_domains) {
-#if WATCH_EXEC
-                DRM_INFO("%s: invalidate_domains %08x flush_domains %08x\n",
-                          __func__,
-                         dev->invalidate_domains,
-                         dev->flush_domains);
-#endif
-                i915_gem_flush(dev,
-                               dev->invalidate_domains,
-                               dev->flush_domains);
-                dev->invalidate_domains = 0;
-                dev->flush_domains = 0;
-        }
+        BUG_ON((obj->write_domain & ~I915_GEM_DOMAIN_CPU) != 0);
 
-        return flush_domains;
+        obj->read_domains |= I915_GEM_DOMAIN_CPU;
+
+        return 0;
 }
 
 /**
@@ -1585,6 +1751,18 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
                         return -EINVAL;
                 }
 
+                if (reloc.write_domain & I915_GEM_DOMAIN_CPU ||
+                    reloc.read_domains & I915_GEM_DOMAIN_CPU) {
+                        DRM_ERROR("reloc with read/write CPU domains: "
+                                  "obj %p target %d offset %d "
+                                  "read %08x write %08x",
+                                  obj, reloc.target_handle,
+                                  (int) reloc.offset,
+                                  reloc.read_domains,
+                                  reloc.write_domain);
+                        return -EINVAL;
+                }
+
                 if (reloc.write_domain && target_obj->pending_write_domain &&
                     reloc.write_domain != target_obj->pending_write_domain) {
                         DRM_ERROR("Write domain conflict: "
@@ -1625,19 +1803,11 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
                         continue;
                 }
 
-                /* Now that we're going to actually write some data in,
-                 * make sure that any rendering using this buffer's contents
-                 * is completed.
-                 */
-                i915_gem_object_wait_rendering(obj);
-
-                /* As we're writing through the gtt, flush
-                 * any CPU writes before we write the relocations
-                 */
-                if (obj->write_domain & I915_GEM_DOMAIN_CPU) {
-                        i915_gem_clflush_object(obj);
-                        drm_agp_chipset_flush(dev);
-                        obj->write_domain = 0;
+                ret = i915_gem_object_set_to_gtt_domain(obj, 1);
+                if (ret != 0) {
+                        drm_gem_object_unreference(target_obj);
+                        i915_gem_object_unpin(obj);
+                        return -EINVAL;
                 }
 
                 /* Map the page containing the relocation we're going to
@@ -1779,6 +1949,7 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
         int ret, i, pinned = 0;
         uint64_t exec_offset;
         uint32_t seqno, flush_domains;
+        int pin_tries;
 
 #if WATCH_EXEC
         DRM_INFO("buffers_ptr %d buffer_count %d len %08x\n",
@@ -1827,14 +1998,7 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
                 return -EBUSY;
         }
 
-        /* Zero the gloabl flush/invalidate flags. These
-         * will be modified as each object is bound to the
-         * gtt
-         */
-        dev->invalidate_domains = 0;
-        dev->flush_domains = 0;
-
-        /* Look up object handles and perform the relocations */
+        /* Look up object handles */
         for (i = 0; i < args->buffer_count; i++) {
                 object_list[i] = drm_gem_object_lookup(dev, file_priv,
                                                        exec_list[i].handle);
@@ -1844,17 +2008,39 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
                         ret = -EBADF;
                         goto err;
                 }
+        }
 
-                object_list[i]->pending_read_domains = 0;
-                object_list[i]->pending_write_domain = 0;
-                ret = i915_gem_object_pin_and_relocate(object_list[i],
-                                                       file_priv,
-                                                       &exec_list[i]);
-                if (ret) {
-                        DRM_ERROR("object bind and relocate failed %d\n", ret);
+        /* Pin and relocate */
+        for (pin_tries = 0; ; pin_tries++) {
+                ret = 0;
+                for (i = 0; i < args->buffer_count; i++) {
+                        object_list[i]->pending_read_domains = 0;
+                        object_list[i]->pending_write_domain = 0;
+                        ret = i915_gem_object_pin_and_relocate(object_list[i],
+                                                               file_priv,
+                                                               &exec_list[i]);
+                        if (ret)
+                                break;
+                        pinned = i + 1;
+                }
+                /* success */
+                if (ret == 0)
+                        break;
+
+                /* error other than GTT full, or we've already tried again */
+                if (ret != -ENOMEM || pin_tries >= 1) {
+                        DRM_ERROR("Failed to pin buffers %d\n", ret);
                         goto err;
                 }
-                pinned = i + 1;
+
+                /* unpin all of our buffers */
+                for (i = 0; i < pinned; i++)
+                        i915_gem_object_unpin(object_list[i]);
+
+                /* evict everyone we can from the aperture */
+                ret = i915_gem_evict_everything(dev);
+                if (ret)
+                        goto err;
         }
 
         /* Set the pending read domains for the batch buffer to COMMAND */
@@ -1864,21 +2050,37 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
 
         i915_verify_inactive(dev, __FILE__, __LINE__);
 
+        /* Zero the global flush/invalidate flags. These
+         * will be modified as new domains are computed
+         * for each object
+         */
+        dev->invalidate_domains = 0;
+        dev->flush_domains = 0;
+
         for (i = 0; i < args->buffer_count; i++) {
                 struct drm_gem_object *obj = object_list[i];
 
-                /* make sure all previous memory operations have passed */
-                ret = i915_gem_object_set_domain(obj,
-                                                 obj->pending_read_domains,
-                                                 obj->pending_write_domain);
-                if (ret)
-                        goto err;
+                /* Compute new gpu domains and update invalidate/flush */
+                i915_gem_object_set_to_gpu_domain(obj,
+                                                  obj->pending_read_domains,
+                                                  obj->pending_write_domain);
         }
 
         i915_verify_inactive(dev, __FILE__, __LINE__);
 
-        /* Flush/invalidate caches and chipset buffer */
-        flush_domains = i915_gem_dev_set_domain(dev);
+        if (dev->invalidate_domains | dev->flush_domains) {
+#if WATCH_EXEC
+                DRM_INFO("%s: invalidate_domains %08x flush_domains %08x\n",
+                          __func__,
+                         dev->invalidate_domains,
+                         dev->flush_domains);
+#endif
+                i915_gem_flush(dev,
+                               dev->invalidate_domains,
+                               dev->flush_domains);
+                if (dev->flush_domains)
+                        (void)i915_add_request(dev, dev->flush_domains);
+        }
 
         i915_verify_inactive(dev, __FILE__, __LINE__);
 
@@ -1898,8 +2100,6 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
                               ~0);
 #endif
 
-        (void)i915_add_request(dev, flush_domains);
-
         /* Exec the batchbuffer */
         ret = i915_dispatch_gem_execbuffer(dev, args, exec_offset);
         if (ret) {
@@ -1927,10 +2127,8 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
         i915_file_priv->mm.last_gem_seqno = seqno;
         for (i = 0; i < args->buffer_count; i++) {
                 struct drm_gem_object *obj = object_list[i];
-                struct drm_i915_gem_object *obj_priv = obj->driver_private;
 
-                i915_gem_object_move_to_active(obj);
-                obj_priv->last_rendering_seqno = seqno;
+                i915_gem_object_move_to_active(obj, seqno);
 #if WATCH_LRU
                 DRM_INFO("%s: move to exec list %p\n", __func__, obj);
 #endif
@@ -2061,11 +2259,7 @@ i915_gem_pin_ioctl(struct drm_device *dev, void *data,
         /* XXX - flush the CPU caches for pinned objects
          * as the X server doesn't manage domains yet
          */
-        if (obj->write_domain & I915_GEM_DOMAIN_CPU) {
-                i915_gem_clflush_object(obj);
-                drm_agp_chipset_flush(dev);
-                obj->write_domain = 0;
-        }
+        i915_gem_object_flush_cpu_write_domain(obj);
         args->offset = obj_priv->gtt_offset;
         drm_gem_object_unreference(obj);
         mutex_unlock(&dev->struct_mutex);
@@ -2167,29 +2361,6 @@ void i915_gem_free_object(struct drm_gem_object *obj)
         drm_free(obj->driver_private, 1, DRM_MEM_DRIVER);
 }
 
-static int
-i915_gem_set_domain(struct drm_gem_object *obj,
-                    struct drm_file *file_priv,
-                    uint32_t read_domains,
-                    uint32_t write_domain)
-{
-        struct drm_device *dev = obj->dev;
-        int ret;
-        uint32_t flush_domains;
-
-        BUG_ON(!mutex_is_locked(&dev->struct_mutex));
-
-        ret = i915_gem_object_set_domain(obj, read_domains, write_domain);
-        if (ret)
-                return ret;
-        flush_domains = i915_gem_dev_set_domain(obj->dev);
-
-        if (flush_domains & ~(I915_GEM_DOMAIN_CPU|I915_GEM_DOMAIN_GTT))
-                (void) i915_add_request(dev, flush_domains);
-
-        return 0;
-}
-
 /** Unbinds all objects that are on the given buffer list. */
 static int
 i915_gem_evict_from_list(struct drm_device *dev, struct list_head *head)
diff --git a/drivers/gpu/drm/i915/i915_gem_proc.c b/drivers/gpu/drm/i915/i915_gem_proc.c
index 93de15b4c9a7..e8d5abe1250e 100644
--- a/drivers/gpu/drm/i915/i915_gem_proc.c
+++ b/drivers/gpu/drm/i915/i915_gem_proc.c
@@ -166,10 +166,9 @@ static int i915_gem_request_info(char *buf, char **start, off_t offset,
         list_for_each_entry(gem_request, &dev_priv->mm.request_list,
                             list)
         {
-                DRM_PROC_PRINT("    %d @ %d %08x\n",
+                DRM_PROC_PRINT("    %d @ %d\n",
                                gem_request->seqno,
-                               (int) (jiffies - gem_request->emitted_jiffies),
-                               gem_request->flush_domains);
+                               (int) (jiffies - gem_request->emitted_jiffies));
         }
         if (len > request + offset)
                 return request;
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index e8b85ac4ca04..a8cb69469c64 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -119,9 +119,10 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
                             dcc & DCC_CHANNEL_XOR_DISABLE) {
                                 swizzle_x = I915_BIT_6_SWIZZLE_9_10;
                                 swizzle_y = I915_BIT_6_SWIZZLE_9;
-                        } else if (IS_I965GM(dev) || IS_GM45(dev)) {
-                                /* GM965 only does bit 11-based channel
-                                 * randomization
+                        } else if ((IS_I965GM(dev) || IS_GM45(dev)) &&
+                                   (dcc & DCC_CHANNEL_XOR_BIT_17) == 0) {
+                                /* GM965/GM45 does either bit 11 or bit 17
+                                 * swizzling.
                                  */
                                 swizzle_x = I915_BIT_6_SWIZZLE_9_10_11;
                                 swizzle_y = I915_BIT_6_SWIZZLE_9_11;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0e476eba36e6..9d24aaeb8a45 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -522,6 +522,7 @@
 #define DCC_ADDRESSING_MODE_DUAL_CHANNEL_INTERLEAVED    (2 << 0)
 #define DCC_ADDRESSING_MODE_MASK                        (3 << 0)
 #define DCC_CHANNEL_XOR_DISABLE                         (1 << 10)
+#define DCC_CHANNEL_XOR_BIT_17                          (1 << 9)
 
 /** 965 MCH register controlling DRAM channel configuration */
 #define C0DRB3                  0x10206
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 7a183789be97..3bbb871b25d5 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -299,7 +299,6 @@ typedef struct drm_radeon_private {
         atomic_t swi_emitted;
         int vblank_crtc;
         uint32_t irq_enable_reg;
-        int irq_enabled;
         uint32_t r500_disp_irq_reg;
 
         struct radeon_surface surfaces[RADEON_MAX_SURFACES];
diff --git a/drivers/gpu/drm/radeon/radeon_irq.c b/drivers/gpu/drm/radeon/radeon_irq.c
index 97c0599fdb1e..99be11418ac2 100644
--- a/drivers/gpu/drm/radeon/radeon_irq.c
+++ b/drivers/gpu/drm/radeon/radeon_irq.c
@@ -44,7 +44,8 @@ void radeon_irq_set_state(struct drm_device *dev, u32 mask, int state)
         else
                 dev_priv->irq_enable_reg &= ~mask;
 
-        RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
+        if (!dev->irq_enabled)
+                RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
 }
 
 static void r500_vbl_irq_set_state(struct drm_device *dev, u32 mask, int state)
@@ -56,7 +57,8 @@ static void r500_vbl_irq_set_state(struct drm_device *dev, u32 mask, int state)
         else
                 dev_priv->r500_disp_irq_reg &= ~mask;
 
-        RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
+        if (!dev->irq_enabled)
+                RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
 }
 
 int radeon_enable_vblank(struct drm_device *dev, int crtc)
@@ -355,8 +357,6 @@ void radeon_driver_irq_uninstall(struct drm_device * dev)
         if (!dev_priv)
                 return;
 
-        dev_priv->irq_enabled = 0;
-
         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
                 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
         /* Disable *all* interrupts */
diff --git a/drivers/i2c/busses/i2c-highlander.c b/drivers/i2c/busses/i2c-highlander.c
index f4d22ae9d294..e5a8dae4a289 100644
--- a/drivers/i2c/busses/i2c-highlander.c
+++ b/drivers/i2c/busses/i2c-highlander.c
@@ -92,7 +92,7 @@ static void highlander_i2c_setup(struct highlander_i2c_dev *dev)
 static void smbus_write_data(u8 *src, u16 *dst, int len)
 {
         for (; len > 1; len -= 2) {
-                *dst++ = be16_to_cpup((u16 *)src);
+                *dst++ = be16_to_cpup((__be16 *)src);
                 src += 2;
         }
 
@@ -103,7 +103,7 @@ static void smbus_write_data(u8 *src, u16 *dst, int len)
 static void smbus_read_data(u16 *src, u8 *dst, int len)
 {
         for (; len > 1; len -= 2) {
-                *(u16 *)dst = cpu_to_be16p(src++);
+                *(__be16 *)dst = cpu_to_be16p(src++);
                 dst += 2;
         }
 
diff --git a/drivers/i2c/busses/i2c-pmcmsp.c b/drivers/i2c/busses/i2c-pmcmsp.c
index dcf2045b5222..0bdb2d7f0570 100644
--- a/drivers/i2c/busses/i2c-pmcmsp.c
+++ b/drivers/i2c/busses/i2c-pmcmsp.c
@@ -486,7 +486,7 @@ static enum pmcmsptwi_xfer_result pmcmsptwi_xfer_cmd(
 
         if (cmd->type == MSP_TWI_CMD_WRITE ||
             cmd->type == MSP_TWI_CMD_WRITE_READ) {
-                __be64 tmp = cpu_to_be64p((u64 *)cmd->write_data);
+                u64 tmp = be64_to_cpup((__be64 *)cmd->write_data);
                 tmp >>= (MSP_MAX_BYTES_PER_RW - cmd->write_len) * 8;
                 dev_dbg(&pmcmsptwi_adapter.dev, "Writing 0x%016llx\n", tmp);
                 pmcmsptwi_writel(tmp & 0x00000000ffffffffLL,
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index 57630402ea67..1a00bb7db872 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -669,10 +669,12 @@ config BLK_DEV_CELLEB
 
 endif
 
+# TODO: BLK_DEV_IDEDMA_PCI -> BLK_DEV_IDEDMA_SFF
 config BLK_DEV_IDE_PMAC
         tristate "PowerMac on-board IDE support"
         depends on PPC_PMAC && IDE=y
         select IDE_TIMINGS
+        select BLK_DEV_IDEDMA_PCI
         help
           This driver provides support for the on-board IDE controller on
           most of the recent Apple Power Macintoshes and PowerBooks.
@@ -689,16 +691,6 @@ config BLK_DEV_IDE_PMAC_ATA100FIRST
           CD-ROM on hda. This option changes this to more natural hda for
           hard disk and hdc for CD-ROM.
 
-config BLK_DEV_IDEDMA_PMAC
-        bool "PowerMac IDE DMA support"
-        depends on BLK_DEV_IDE_PMAC
-        select BLK_DEV_IDEDMA_PCI
-        help
-          This option allows the driver for the on-board IDE controller on
-          Power Macintoshes and PowerBooks to use DMA (direct memory access)
-          to transfer data to and from memory.  Saying Y is safe and improves
-          performance.
-
 config BLK_DEV_IDE_AU1XXX
        bool "IDE for AMD Alchemy Au1200"
        depends on SOC_AU1200
@@ -912,7 +904,7 @@ config BLK_DEV_UMC8672
 endif
 
 config BLK_DEV_IDEDMA
-        def_bool BLK_DEV_IDEDMA_SFF || BLK_DEV_IDEDMA_PMAC || \
+        def_bool BLK_DEV_IDEDMA_SFF || \
                  BLK_DEV_IDEDMA_ICS || BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
 
 endif # IDE
diff --git a/drivers/ide/alim15x3.c b/drivers/ide/alim15x3.c
index e56c7b72f9e2..45d2356bb725 100644
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -591,7 +591,7 @@ static int __init ali15x3_ide_init(void)
 
 static void __exit ali15x3_ide_exit(void)
 {
-        return pci_unregister_driver(&alim15x3_pci_driver);
+        pci_unregister_driver(&alim15x3_pci_driver);
 }
 
 module_init(ali15x3_ide_init);
diff --git a/drivers/ide/amd74xx.c b/drivers/ide/amd74xx.c
index 81ec73134eda..c6bcd3014a29 100644
--- a/drivers/ide/amd74xx.c
+++ b/drivers/ide/amd74xx.c
@@ -3,7 +3,7 @@
  * IDE driver for Linux.
  *
  * Copyright (c) 2000-2002 Vojtech Pavlik
- * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
+ * Copyright (c) 2007-2008 Bartlomiej Zolnierkiewicz
  *
  * Based on the work of:
  *      Andre Hedrick
@@ -263,6 +263,15 @@ static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_
                         d.udma_mask = ATA_UDMA5;
         }
 
+        /*
+         * It seems that on some nVidia controllers using AltStatus
+         * register can be unreliable so default to Status register
+         * if the device is in Compatibility Mode.
+         */
+        if (dev->vendor == PCI_VENDOR_ID_NVIDIA &&
+            ide_pci_is_in_compatibility_mode(dev))
+                d.host_flags |= IDE_HFLAG_BROKEN_ALTSTATUS;
+
         printk(KERN_INFO "%s %s: UDMA%s controller\n",
                 d.name, pci_name(dev), amd_dma[fls(d.udma_mask) - 1]);
 
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
index 7162d67562af..cc35d6dbd410 100644
--- a/drivers/ide/ide-io.c
+++ b/drivers/ide/ide-io.c
@@ -132,10 +132,14 @@ int ide_end_request (ide_drive_t *drive, int uptodate, int nr_sectors)
 }
 EXPORT_SYMBOL(ide_end_request);
 
-static void ide_complete_power_step(ide_drive_t *drive, struct request *rq, u8 stat, u8 error)
+static void ide_complete_power_step(ide_drive_t *drive, struct request *rq)
 {
         struct request_pm_state *pm = rq->data;
 
+#ifdef DEBUG_PM
+        printk(KERN_INFO "%s: complete_power_step(step: %d)\n",
+                drive->name, pm->pm_step);
+#endif
         if (drive->media != ide_disk)
                 return;
 
@@ -172,7 +176,7 @@ static ide_startstop_t ide_start_power_step(ide_drive_t *drive, struct request *
                 /* Not supported? Switch to next step now. */
                 if (ata_id_flush_enabled(drive->id) == 0 ||
                     (drive->dev_flags & IDE_DFLAG_WCACHE) == 0) {
-                        ide_complete_power_step(drive, rq, 0, 0);
+                        ide_complete_power_step(drive, rq);
                         return ide_stopped;
                 }
                 if (ata_id_flush_ext_enabled(drive->id))
@@ -191,7 +195,7 @@ static ide_startstop_t ide_start_power_step(ide_drive_t *drive, struct request *
                 if (drive->media != ide_disk)
                         pm->pm_step = IDE_PM_RESTORE_DMA;
                 else
-                        ide_complete_power_step(drive, rq, 0, 0);
+                        ide_complete_power_step(drive, rq);
                 return ide_stopped;
         case IDE_PM_IDLE:               /* Resume step 2 (idle) */
                 args->tf.command = ATA_CMD_IDLEIMMEDIATE;
@@ -322,11 +326,8 @@ void ide_end_drive_cmd (ide_drive_t *drive, u8 stat, u8 err)
                 }
         } else if (blk_pm_request(rq)) {
                 struct request_pm_state *pm = rq->data;
-#ifdef DEBUG_PM
-                printk("%s: complete_power_step(step: %d, stat: %x, err: %x)\n",
-                        drive->name, rq->pm->pm_step, stat, err);
-#endif
-                ide_complete_power_step(drive, rq, stat, err);
+
+                ide_complete_power_step(drive, rq);
                 if (pm->pm_step == IDE_PM_COMPLETED)
                         ide_complete_pm_request(drive, rq);
                 return;
@@ -804,7 +805,7 @@ static ide_startstop_t start_request (ide_drive_t *drive, struct request *rq)
                         struct request_pm_state *pm = rq->data;
 #ifdef DEBUG_PM
                         printk("%s: start_power_step(step: %d)\n",
-                                drive->name, rq->pm->pm_step);
+                                drive->name, pm->pm_step);
 #endif
                         startstop = ide_start_power_step(drive, rq);
                         if (startstop == ide_stopped &&
@@ -967,14 +968,13 @@ static void ide_do_request (ide_hwgroup_t *hwgroup, int masked_irq)
         ide_startstop_t startstop;
         int             loops = 0;
 
-        /* for atari only: POSSIBLY BROKEN HERE(?) */
-        ide_get_lock(ide_intr, hwgroup);
-
         /* caller must own ide_lock */
         BUG_ON(!irqs_disabled());
 
         while (!hwgroup->busy) {
                 hwgroup->busy = 1;
+                /* for atari only */
+                ide_get_lock(ide_intr, hwgroup);
                 drive = choose_drive(hwgroup);
                 if (drive == NULL) {
                         int sleeping = 0;
diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c
index 5d6ba14e211d..c41c3b9b6f02 100644
--- a/drivers/ide/ide-iops.c
+++ b/drivers/ide/ide-iops.c
@@ -457,18 +457,14 @@ int drive_is_ready (ide_drive_t *drive)
         if (drive->waiting_for_dma)
                 return hwif->dma_ops->dma_test_irq(drive);
 
-#if 0
-        /* need to guarantee 400ns since last command was issued */
-        udelay(1);
-#endif
-
         /*
          * We do a passive status test under shared PCI interrupts on
          * cards that truly share the ATA side interrupt, but may also share
          * an interrupt with another pci card/device.  We make no assumptions
          * about possible isa-pnp and pci-pnp issues yet.
          */
-        if (hwif->io_ports.ctl_addr)
+        if (hwif->io_ports.ctl_addr &&
+            (hwif->host_flags & IDE_HFLAG_BROKEN_ALTSTATUS) == 0)
                 stat = hwif->tp_ops->read_altstatus(hwif);
         else
                 /* Note: this may clear a pending IRQ!! */
@@ -610,6 +606,7 @@ static const struct drive_list_entry ivb_list[] = {
         { "TSSTcorp CDDVDW SH-S202N"    , "SB01"        },
         { "TSSTcorp CDDVDW SH-S202H"    , "SB00"        },
         { "TSSTcorp CDDVDW SH-S202H"    , "SB01"        },
+        { "SAMSUNG SP0822N"             , "WA100-10"    },
         { NULL                          , NULL          }
 };
 
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index 1649ea54f76c..c55bdbd22314 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -266,7 +266,8 @@ static int actual_try_to_identify (ide_drive_t *drive, u8 cmd)
         /* take a deep breath */
         msleep(50);
 
-        if (io_ports->ctl_addr) {
+        if (io_ports->ctl_addr &&
+            (hwif->host_flags & IDE_HFLAG_BROKEN_ALTSTATUS) == 0) {
                 a = tp_ops->read_altstatus(hwif);
                 s = tp_ops->read_status(hwif);
                 if ((a ^ s) & ~ATA_IDX)
diff --git a/drivers/ide/pmac.c b/drivers/ide/pmac.c
index 2e19d6298536..7c481bb56fab 100644
--- a/drivers/ide/pmac.c
+++ b/drivers/ide/pmac.c
@@ -66,7 +66,6 @@ typedef struct pmac_ide_hwif {
         struct macio_dev                *mdev;
         u32                             timings[4];
         volatile u32 __iomem *          *kauai_fcr;
-#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
         /* Those fields are duplicating what is in hwif. We currently
          * can't use the hwif ones because of some assumptions that are
          * beeing done by the generic code about the kind of dma controller
@@ -74,8 +73,6 @@ typedef struct pmac_ide_hwif {
          */
         volatile struct dbdma_regs __iomem *    dma_regs;
         struct dbdma_cmd*               dma_table_cpu;
-#endif
-        
 } pmac_ide_hwif_t;
 
 enum {
@@ -222,8 +219,6 @@ static const char* model_name[] = {
 #define KAUAI_FCR_UATA_RESET_N          0x00000002
 #define KAUAI_FCR_UATA_ENABLE           0x00000001
 
-#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
-
 /* Rounded Multiword DMA timings
  * 
  * I gave up finding a generic formula for all controller
@@ -413,8 +408,6 @@ static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq);
 static void pmac_ide_selectproc(ide_drive_t *drive);
 static void pmac_ide_kauai_selectproc(ide_drive_t *drive);
 
-#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
-
 #define PMAC_IDE_REG(x) \
         ((void __iomem *)((drive)->hwif->io_ports.data_addr + (x)))
 
@@ -584,8 +577,6 @@ pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
         pmac_ide_do_update_timings(drive);
 }
 
-#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
-
 /*
  * Calculate KeyLargo ATA/66 UDMA timings
  */
@@ -786,7 +777,6 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
                 drive->name, speed & 0xf,  *timings);
 #endif  
 }
-#endif /* #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC */
 
 static void pmac_ide_set_dma_mode(ide_drive_t *drive, const u8 speed)
 {
@@ -804,7 +794,6 @@ static void pmac_ide_set_dma_mode(ide_drive_t *drive, const u8 speed)
         tl[0] = *timings;
         tl[1] = *timings2;
 
-#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
         if (speed >= XFER_UDMA_0) {
                 if (pmif->kind == controller_kl_ata4)
                         ret = set_timings_udma_ata4(&tl[0], speed);
@@ -817,7 +806,7 @@ static void pmac_ide_set_dma_mode(ide_drive_t *drive, const u8 speed)
                         ret = -1;
         } else
                 set_timings_mdma(drive, pmif->kind, &tl[0], &tl[1], speed);
-#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
+
         if (ret)
                 return;
 
@@ -1008,9 +997,7 @@ static const struct ide_port_info pmac_port_info = {
         .chipset                = ide_pmac,
         .tp_ops                 = &pmac_tp_ops,
         .port_ops               = &pmac_ide_port_ops,
-#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
         .dma_ops                = &pmac_dma_ops,
-#endif
         .host_flags             = IDE_HFLAG_SET_PIO_MODE_KEEP_DMA |
                                   IDE_HFLAG_POST_SET_MODE |
                                   IDE_HFLAG_MMIO |
@@ -1182,7 +1169,7 @@ pmac_ide_macio_attach(struct macio_dev *mdev, const struct of_device_id *match)
         pmif->regbase = regbase;
         pmif->irq = irq;
         pmif->kauai_fcr = NULL;
-#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
+
         if (macio_resource_count(mdev) >= 2) {
                 if (macio_request_resource(mdev, 1, "ide-pmac (dma)"))
                         printk(KERN_WARNING "ide-pmac: can't request DMA "
@@ -1192,7 +1179,7 @@ pmac_ide_macio_attach(struct macio_dev *mdev, const struct of_device_id *match)
                         pmif->dma_regs = ioremap(macio_resource_start(mdev, 1), 0x1000);
         } else
                 pmif->dma_regs = NULL;
-#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
+
         dev_set_drvdata(&mdev->ofdev.dev, pmif);
 
         memset(&hw, 0, sizeof(hw));
@@ -1300,9 +1287,7 @@ pmac_ide_pci_attach(struct pci_dev *pdev, const struct pci_device_id *id)
 
         base = ioremap(rbase, rlen);
         pmif->regbase = (unsigned long) base + 0x2000;
-#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
         pmif->dma_regs = base + 0x1000;
-#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
         pmif->kauai_fcr = base;
         pmif->irq = pdev->irq;
 
@@ -1434,8 +1419,6 @@ out:
         return error;
 }
 
-#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
-
 /*
  * pmac_ide_build_dmatable builds the DBDMA command list
  * for a transfer and sets the DBDMA channel to point to it.
@@ -1723,13 +1706,6 @@ static int __devinit pmac_ide_init_dma(ide_hwif_t *hwif,
 
         return 0;
 }
-#else
-static int __devinit pmac_ide_init_dma(ide_hwif_t *hwif,
-                                       const struct ide_port_info *d)
-{
-        return -EOPNOTSUPP;
-}
-#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
 
 module_init(pmac_ide_probe);
 
diff --git a/drivers/ide/sgiioc4.c b/drivers/ide/sgiioc4.c
index 7defa0ae2014..a687a7dfea6f 100644
--- a/drivers/ide/sgiioc4.c
+++ b/drivers/ide/sgiioc4.c
@@ -550,7 +550,7 @@ static const struct ide_dma_ops sgiioc4_dma_ops = {
         .dma_timeout            = ide_dma_timeout,
 };
 
-static const struct ide_port_info sgiioc4_port_info __devinitdata = {
+static const struct ide_port_info sgiioc4_port_info __devinitconst = {
         .name                   = DRV_NAME,
         .chipset                = ide_pci,
         .init_dma               = ide_dma_sgiioc4,
@@ -633,7 +633,7 @@ out:
         return ret;
 }
 
-int
+int __devinit
 ioc4_ide_attach_one(struct ioc4_driver_data *idd)
 {
         /* PCI-RT does not bring out IDE connection.
@@ -645,7 +645,7 @@ ioc4_ide_attach_one(struct ioc4_driver_data *idd)
         return pci_init_sgiioc4(idd->idd_pdev);
 }
 
-static struct ioc4_submodule ioc4_ide_submodule = {
+static struct ioc4_submodule __devinitdata ioc4_ide_submodule = {
         .is_name = "IOC4_ide",
         .is_owner = THIS_MODULE,
         .is_probe = ioc4_ide_attach_one,
diff --git a/drivers/ieee1394/nodemgr.c b/drivers/ieee1394/nodemgr.c
index 9e39f73282ee..d333ae22459c 100644
--- a/drivers/ieee1394/nodemgr.c
+++ b/drivers/ieee1394/nodemgr.c
@@ -1685,6 +1685,7 @@ static int nodemgr_host_thread(void *data)
                 g = get_hpsb_generation(host);
                 for (i = 0; i < 4 ; i++) {
                         msleep_interruptible(63);
+                        try_to_freeze();
                         if (kthread_should_stop())
                                 goto exit;
 
@@ -1725,6 +1726,7 @@ static int nodemgr_host_thread(void *data)
                 /* Sleep 3 seconds */
                 for (i = 3000/200; i; i--) {
                         msleep_interruptible(200);
+                        try_to_freeze();
                         if (kthread_should_stop())
                                 goto exit;
 
diff --git a/drivers/input/keyboard/omap-keypad.c b/drivers/input/keyboard/omap-keypad.c
index 69e674ecf19a..db22fd9b4cf2 100644
--- a/drivers/input/keyboard/omap-keypad.c
+++ b/drivers/input/keyboard/omap-keypad.c
@@ -101,7 +101,7 @@ static irqreturn_t omap_kp_interrupt(int irq, void *dev_id)
         if (cpu_is_omap24xx()) {
                 int i;
                 for (i = 0; i < omap_kp->rows; i++)
-                        disable_irq(OMAP_GPIO_IRQ(row_gpios[i]));
+                        disable_irq(gpio_to_irq(row_gpios[i]));
         } else
                 /* disable keyboard interrupt and schedule for handling */
                 omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
@@ -224,7 +224,7 @@ static void omap_kp_tasklet(unsigned long data)
                 if (cpu_is_omap24xx()) {
                         int i;
                         for (i = 0; i < omap_kp_data->rows; i++)
-                                enable_irq(OMAP_GPIO_IRQ(row_gpios[i]));
+                                enable_irq(gpio_to_irq(row_gpios[i]));
                 } else {
                         omap_writew(0, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
                         kp_cur_group = -1;
@@ -397,7 +397,7 @@ static int __init omap_kp_probe(struct platform_device *pdev)
                 omap_writew(0, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
         } else {
                 for (irq_idx = 0; irq_idx < omap_kp->rows; irq_idx++) {
-                        if (request_irq(OMAP_GPIO_IRQ(row_gpios[irq_idx]),
+                        if (request_irq(gpio_to_irq(row_gpios[irq_idx]),
                                         omap_kp_interrupt,
                                         IRQF_TRIGGER_FALLING,
                                         "omap-keypad", omap_kp) < 0)
@@ -438,7 +438,7 @@ static int omap_kp_remove(struct platform_device *pdev)
                         gpio_free(col_gpios[i]);
                 for (i = 0; i < omap_kp->rows; i++) {
                         gpio_free(row_gpios[i]);
-                        free_irq(OMAP_GPIO_IRQ(row_gpios[i]), 0);
+                        free_irq(gpio_to_irq(row_gpios[i]), 0);
                 }
         } else {
                 omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
diff --git a/drivers/isdn/hardware/avm/b1isa.c b/drivers/isdn/hardware/avm/b1isa.c
index 1e288eeb5e2a..6461a32bc838 100644
--- a/drivers/isdn/hardware/avm/b1isa.c
+++ b/drivers/isdn/hardware/avm/b1isa.c
@@ -233,10 +233,8 @@ static void __exit b1isa_exit(void)
         int i;
 
         for (i = 0; i < MAX_CARDS; i++) {
-                if (!io[i])
-                        break;
-
-                b1isa_remove(&isa_dev[i]);
+                if (isa_dev[i].resource[0].start)
+                        b1isa_remove(&isa_dev[i]);
         }
         unregister_capi_driver(&capi_driver_b1isa);
 }
diff --git a/drivers/isdn/hysdn/hysdn_net.c b/drivers/isdn/hysdn/hysdn_net.c
index cfa8fa5e44ab..3f2a0a20c19b 100644
--- a/drivers/isdn/hysdn/hysdn_net.c
+++ b/drivers/isdn/hysdn/hysdn_net.c
@@ -83,12 +83,12 @@ net_open(struct net_device *dev)
 
         /* Fill in the MAC-level header (if not already set) */
         if (!card->mac_addr[0]) {
-                for (i = 0; i < ETH_ALEN - sizeof(unsigned long); i++)
+                for (i = 0; i < ETH_ALEN; i++)
                         dev->dev_addr[i] = 0xfc;
                 if ((in_dev = dev->ip_ptr) != NULL) {
                         struct in_ifaddr *ifa = in_dev->ifa_list;
                         if (ifa != NULL)
-                                memcpy(dev->dev_addr + (ETH_ALEN - sizeof(unsigned long)), &ifa->ifa_local, sizeof(unsigned long));
+                                memcpy(dev->dev_addr + (ETH_ALEN - sizeof(ifa->ifa_local)), &ifa->ifa_local, sizeof(ifa->ifa_local));
                 }
         } else
                 memcpy(dev->dev_addr, card->mac_addr, ETH_ALEN);
diff --git a/drivers/md/dm-table.c b/drivers/md/dm-table.c
index a63161aec487..04e5fd742c2c 100644
--- a/drivers/md/dm-table.c
+++ b/drivers/md/dm-table.c
@@ -668,7 +668,7 @@ static void check_for_valid_limits(struct io_restrictions *rs)
         if (!rs->max_segment_size)
                 rs->max_segment_size = MAX_SEGMENT_SIZE;
         if (!rs->seg_boundary_mask)
-                rs->seg_boundary_mask = -1;
+                rs->seg_boundary_mask = BLK_SEG_BOUNDARY_MASK;
         if (!rs->bounce_pfn)
                 rs->bounce_pfn = -1;
 }
diff --git a/drivers/message/i2o/i2o_block.c b/drivers/message/i2o/i2o_block.c
index 84bdc2ee69e6..a443e136dc41 100644
--- a/drivers/message/i2o/i2o_block.c
+++ b/drivers/message/i2o/i2o_block.c
@@ -354,7 +354,7 @@ static inline void i2o_block_sglist_free(struct i2o_block_request *ireq)
  *      @req: the request to prepare
  *
  *      Allocate the necessary i2o_block_request struct and connect it to
- *      the request. This is needed that we not loose the SG list later on.
+ *      the request. This is needed that we not lose the SG list later on.
  *
  *      Returns BLKPREP_OK on success or BLKPREP_DEFER on failure.
  */
diff --git a/drivers/message/i2o/iop.c b/drivers/message/i2o/iop.c
index be2b5926d26c..6e53a30bfd38 100644
--- a/drivers/message/i2o/iop.c
+++ b/drivers/message/i2o/iop.c
@@ -49,7 +49,6 @@ static int i2o_hrt_get(struct i2o_controller *c);
 /**
  *      i2o_msg_get_wait - obtain an I2O message from the IOP
  *      @c: I2O controller
- *      @msg: pointer to a I2O message pointer
  *      @wait: how long to wait until timeout
  *
  *      This function waits up to wait seconds for a message slot to be
diff --git a/drivers/misc/sgi-gru/grufault.c b/drivers/misc/sgi-gru/grufault.c
index 8c389d606c30..3ee698ad8599 100644
--- a/drivers/misc/sgi-gru/grufault.c
+++ b/drivers/misc/sgi-gru/grufault.c
@@ -254,7 +254,11 @@ static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
                 return 1;
 
         *paddr = pte_pfn(pte) << PAGE_SHIFT;
+#ifdef CONFIG_HUGETLB_PAGE
         *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
+#else
+        *pageshift = PAGE_SHIFT;
+#endif
         return 0;
 
 err:
diff --git a/drivers/misc/sgi-gru/grufile.c b/drivers/misc/sgi-gru/grufile.c
index 5c027b6b4e5a..650983806392 100644
--- a/drivers/misc/sgi-gru/grufile.c
+++ b/drivers/misc/sgi-gru/grufile.c
@@ -481,7 +481,7 @@ struct vm_operations_struct gru_vm_ops = {
         .fault          = gru_fault,
 };
 
-module_init(gru_init);
+fs_initcall(gru_init);
 module_exit(gru_exit);
 
 module_param(gru_options, ulong, 0644);
diff --git a/drivers/mmc/host/imxmmc.c b/drivers/mmc/host/imxmmc.c
index 2f0fcdb869b7..eb29b1d933ac 100644
--- a/drivers/mmc/host/imxmmc.c
+++ b/drivers/mmc/host/imxmmc.c
@@ -10,20 +10,6 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  *
- *  2005-04-17 Pavel Pisa <pisa@cmp.felk.cvut.cz>
- *             Changed to conform redesigned i.MX scatter gather DMA interface
- *
- *  2005-11-04 Pavel Pisa <pisa@cmp.felk.cvut.cz>
- *             Updated for 2.6.14 kernel
- *
- *  2005-12-13 Jay Monkman <jtm@smoothsmoothie.com>
- *             Found and corrected problems in the write path
- *
- *  2005-12-30 Pavel Pisa <pisa@cmp.felk.cvut.cz>
- *             The event handling rewritten right way in softirq.
- *             Added many ugly hacks and delays to overcome SDHC
- *             deficiencies
- *
  */
 
 #include <linux/module.h>
@@ -37,9 +23,9 @@
 #include <linux/mmc/card.h>
 #include <linux/delay.h>
 #include <linux/clk.h>
+#include <linux/io.h>
 
 #include <asm/dma.h>
-#include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/sizes.h>
 #include <mach/mmc.h>
@@ -50,17 +36,16 @@
 #define DRIVER_NAME "imx-mmc"
 
 #define IMXMCI_INT_MASK_DEFAULT (INT_MASK_BUF_READY | INT_MASK_DATA_TRAN | \
-                      INT_MASK_WRITE_OP_DONE | INT_MASK_END_CMD_RES | \
-                      INT_MASK_AUTO_CARD_DETECT | INT_MASK_DAT0_EN | INT_MASK_SDIO)
+                                 INT_MASK_WRITE_OP_DONE | INT_MASK_END_CMD_RES | \
+                                 INT_MASK_AUTO_CARD_DETECT | INT_MASK_DAT0_EN | INT_MASK_SDIO)
 
 struct imxmci_host {
         struct mmc_host         *mmc;
         spinlock_t              lock;
         struct resource         *res;
+        void __iomem            *base;
         int                     irq;
         imx_dmach_t             dma;
-        unsigned int            clkrt;
-        unsigned int            cmdat;
         volatile unsigned int   imask;
         unsigned int            power_mode;
         unsigned int            present;
@@ -74,7 +59,7 @@ struct imxmci_host {
         struct tasklet_struct   tasklet;
         unsigned int            status_reg;
         unsigned long           pending_events;
-        /* Next to fields are there for CPU driven transfers to overcome SDHC deficiencies */
+        /* Next two fields are there for CPU driven transfers to overcome SDHC deficiencies */
         u16                     *data_ptr;
         unsigned int            data_cnt;
         atomic_t                stuck_timeout;
@@ -114,14 +99,22 @@ struct imxmci_host {
 static void imxmci_stop_clock(struct imxmci_host *host)
 {
         int i = 0;
-        MMC_STR_STP_CLK &= ~STR_STP_CLK_START_CLK;
-        while(i < 0x1000) {
-                if(!(i & 0x7f))
-                        MMC_STR_STP_CLK |= STR_STP_CLK_STOP_CLK;
+        u16 reg;
+
+        reg = readw(host->base + MMC_REG_STR_STP_CLK);
+        writew(reg & ~STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK);
+        while (i < 0x1000) {
+                if (!(i & 0x7f)) {
+                        reg = readw(host->base + MMC_REG_STR_STP_CLK);
+                        writew(reg | STR_STP_CLK_STOP_CLK,
+                                        host->base + MMC_REG_STR_STP_CLK);
+                }
 
-                if(!(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN)) {
+                reg = readw(host->base + MMC_REG_STATUS);
+                if (!(reg & STATUS_CARD_BUS_CLK_RUN)) {
                         /* Check twice before cut */
-                        if(!(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN))
+                        reg = readw(host->base + MMC_REG_STATUS);
+                        if (!(reg & STATUS_CARD_BUS_CLK_RUN))
                                 return;
                 }
 
@@ -135,8 +128,10 @@ static int imxmci_start_clock(struct imxmci_host *host)
         unsigned int trials = 0;
         unsigned int delay_limit = 128;
         unsigned long flags;
+        u16 reg;
 
-        MMC_STR_STP_CLK &= ~STR_STP_CLK_STOP_CLK;
+        reg = readw(host->base + MMC_REG_STR_STP_CLK);
+        writew(reg & ~STR_STP_CLK_STOP_CLK, host->base + MMC_REG_STR_STP_CLK);
 
         clear_bit(IMXMCI_PEND_STARTED_b, &host->pending_events);
 
@@ -145,18 +140,21 @@ static int imxmci_start_clock(struct imxmci_host *host)
          * then 6 delay loops, but during card detection (low clockrate)
          * it takes up to 5000 delay loops and sometimes fails for the first time
          */
-        MMC_STR_STP_CLK |= STR_STP_CLK_START_CLK;
+        reg = readw(host->base + MMC_REG_STR_STP_CLK);
+        writew(reg | STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK);
 
         do {
                 unsigned int delay = delay_limit;
 
-                while(delay--){
-                        if(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN)
+                while (delay--) {
+                        reg = readw(host->base + MMC_REG_STATUS);
+                        if (reg & STATUS_CARD_BUS_CLK_RUN)
                                 /* Check twice before cut */
-                                if(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN)
+                                reg = readw(host->base + MMC_REG_STATUS);
+                                if (reg & STATUS_CARD_BUS_CLK_RUN)
                                         return 0;
 
-                        if(test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events))
+                        if (test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events))
                                 return 0;
                 }
 
@@ -167,58 +165,59 @@ static int imxmci_start_clock(struct imxmci_host *host)
                  * IRQ or schedule delays this function execution and the clocks has
                  * been already stopped by other means (response processing, SDHC HW)
                  */
-                if(!test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events))
-                        MMC_STR_STP_CLK |= STR_STP_CLK_START_CLK;
+                if (!test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events)) {
+                        reg = readw(host->base + MMC_REG_STR_STP_CLK);
+                        writew(reg | STR_STP_CLK_START_CLK,
+                                        host->base + MMC_REG_STR_STP_CLK);
+                }
                 local_irq_restore(flags);
 
-        } while(++trials<256);
+        } while (++trials < 256);
 
         dev_err(mmc_dev(host->mmc), "imxmci_start_clock blocked, no luck\n");
 
         return -1;
 }
 
-static void imxmci_softreset(void)
+static void imxmci_softreset(struct imxmci_host *host)
 {
+        int i;
+
         /* reset sequence */
-        MMC_STR_STP_CLK = 0x8;
-        MMC_STR_STP_CLK = 0xD;
-        MMC_STR_STP_CLK = 0x5;
-        MMC_STR_STP_CLK = 0x5;
-        MMC_STR_STP_CLK = 0x5;
-        MMC_STR_STP_CLK = 0x5;
-        MMC_STR_STP_CLK = 0x5;
-        MMC_STR_STP_CLK = 0x5;
-        MMC_STR_STP_CLK = 0x5;
-        MMC_STR_STP_CLK = 0x5;
-
-        MMC_RES_TO = 0xff;
-        MMC_BLK_LEN = 512;
-        MMC_NOB = 1;
+        writew(0x08, host->base + MMC_REG_STR_STP_CLK);
+        writew(0x0D, host->base + MMC_REG_STR_STP_CLK);
+
+        for (i = 0; i < 8; i++)
+                writew(0x05, host->base + MMC_REG_STR_STP_CLK);
+
+        writew(0xff, host->base + MMC_REG_RES_TO);
+        writew(512, host->base + MMC_REG_BLK_LEN);
+        writew(1, host->base + MMC_REG_NOB);
 }
 
 static int imxmci_busy_wait_for_status(struct imxmci_host *host,
-                        unsigned int *pstat, unsigned int stat_mask,
-                        int timeout, const char *where)
+                                       unsigned int *pstat, unsigned int stat_mask,
+                                       int timeout, const char *where)
 {
-        int loops=0;
-        while(!(*pstat & stat_mask)) {
-                loops+=2;
-                if(loops >= timeout) {
+        int loops = 0;
+
+        while (!(*pstat & stat_mask)) {
+                loops += 2;
+                if (loops >= timeout) {
                         dev_dbg(mmc_dev(host->mmc), "busy wait timeout in %s, STATUS = 0x%x (0x%x)\n",
                                 where, *pstat, stat_mask);
                         return -1;
                 }
                 udelay(2);
-                *pstat |= MMC_STATUS;
+                *pstat |= readw(host->base + MMC_REG_STATUS);
         }
-        if(!loops)
+        if (!loops)
                 return 0;
 
         /* The busy-wait is expected there for clock <8MHz due to SDHC hardware flaws */
-        if(!(stat_mask & STATUS_END_CMD_RESP) || (host->mmc->ios.clock>=8000000))
+        if (!(stat_mask & STATUS_END_CMD_RESP) || (host->mmc->ios.clock >= 8000000))
                 dev_info(mmc_dev(host->mmc), "busy wait for %d usec in %s, STATUS = 0x%x (0x%x)\n",
-                        loops, where, *pstat, stat_mask);
+                         loops, where, *pstat, stat_mask);
         return loops;
 }
 
@@ -235,8 +234,8 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
         host->data = data;
         data->bytes_xfered = 0;
 
-        MMC_NOB = nob;
-        MMC_BLK_LEN = blksz;
+        writew(nob, host->base + MMC_REG_NOB);
+        writew(blksz, host->base + MMC_REG_BLK_LEN);
 
         /*
          * DMA cannot be used for small block sizes, we have to use CPU driven transfers otherwise.
@@ -252,14 +251,14 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
                         host->dma_dir = DMA_FROM_DEVICE;
 
                         /* Hack to enable read SCR */
-                        MMC_NOB = 1;
-                        MMC_BLK_LEN = 512;
+                        writew(1, host->base + MMC_REG_NOB);
+                        writew(512, host->base + MMC_REG_BLK_LEN);
                 } else {
                         host->dma_dir = DMA_TO_DEVICE;
                 }
 
                 /* Convert back to virtual address */
-                host->data_ptr = (u16*)sg_virt(data->sg);
+                host->data_ptr = (u16 *)sg_virt(data->sg);
                 host->data_cnt = 0;
 
                 clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events);
@@ -271,10 +270,11 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
         if (data->flags & MMC_DATA_READ) {
                 host->dma_dir = DMA_FROM_DEVICE;
                 host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
-                                                data->sg_len,  host->dma_dir);
+                                             data->sg_len,  host->dma_dir);
 
                 imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz,
-                        host->res->start + MMC_BUFFER_ACCESS_OFS, DMA_MODE_READ);
+                                 host->res->start + MMC_REG_BUFFER_ACCESS,
+                                 DMA_MODE_READ);
 
                 /*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_READ, IMX_DMA_WIDTH_16, CCR_REN);*/
                 CCR(host->dma) = CCR_DMOD_LINEAR | CCR_DSIZ_32 | CCR_SMOD_FIFO | CCR_SSIZ_16 | CCR_REN;
@@ -282,10 +282,11 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
                 host->dma_dir = DMA_TO_DEVICE;
 
                 host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
-                                                data->sg_len,  host->dma_dir);
+                                             data->sg_len,  host->dma_dir);
 
                 imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz,
-                        host->res->start + MMC_BUFFER_ACCESS_OFS, DMA_MODE_WRITE);
+                                 host->res->start + MMC_REG_BUFFER_ACCESS,
+                                 DMA_MODE_WRITE);
 
                 /*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_WRITE, IMX_DMA_WIDTH_16, CCR_REN);*/
                 CCR(host->dma) = CCR_SMOD_LINEAR | CCR_SSIZ_32 | CCR_DMOD_FIFO | CCR_DSIZ_16 | CCR_REN;
@@ -293,12 +294,12 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
 
 #if 1   /* This code is there only for consistency checking and can be disabled in future */
         host->dma_size = 0;
-        for(i=0; i<host->dma_nents; i++)
-                host->dma_size+=data->sg[i].length;
+        for (i = 0; i < host->dma_nents; i++)
+                host->dma_size += data->sg[i].length;
 
         if (datasz > host->dma_size) {
                 dev_err(mmc_dev(host->mmc), "imxmci_setup_data datasz 0x%x > 0x%x dm_size\n",
-                       datasz, host->dma_size);
+                        datasz, host->dma_size);
         }
 #endif
 
@@ -306,7 +307,7 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
 
         wmb();
 
-        if(host->actual_bus_width == MMC_BUS_WIDTH_4)
+        if (host->actual_bus_width == MMC_BUS_WIDTH_4)
                 BLR(host->dma) = 0;     /* burst 64 byte read / 64 bytes write */
         else
                 BLR(host->dma) = 16;    /* burst 16 byte read / 16 bytes write */
@@ -317,9 +318,8 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
         clear_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events);
 
         /* start DMA engine for read, write is delayed after initial response */
-        if (host->dma_dir == DMA_FROM_DEVICE) {
+        if (host->dma_dir == DMA_FROM_DEVICE)
                 imx_dma_enable(host->dma);
-        }
 }
 
 static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd, unsigned int cmdat)
@@ -351,16 +351,16 @@ static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd,
                 break;
         }
 
-        if ( test_and_clear_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events) )
+        if (test_and_clear_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events))
                 cmdat |= CMD_DAT_CONT_INIT; /* This command needs init */
 
-        if ( host->actual_bus_width == MMC_BUS_WIDTH_4 )
+        if (host->actual_bus_width == MMC_BUS_WIDTH_4)
                 cmdat |= CMD_DAT_CONT_BUS_WIDTH_4;
 
-        MMC_CMD = cmd->opcode;
-        MMC_ARGH = cmd->arg >> 16;
-        MMC_ARGL = cmd->arg & 0xffff;
-        MMC_CMD_DAT_CONT = cmdat;
+        writew(cmd->opcode, host->base + MMC_REG_CMD);
+        writew(cmd->arg >> 16, host->base + MMC_REG_ARGH);
+        writew(cmd->arg & 0xffff, host->base + MMC_REG_ARGL);
+        writew(cmdat, host->base + MMC_REG_CMD_DAT_CONT);
 
         atomic_set(&host->stuck_timeout, 0);
         set_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events);
@@ -368,18 +368,18 @@ static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd,
 
         imask = IMXMCI_INT_MASK_DEFAULT;
         imask &= ~INT_MASK_END_CMD_RES;
-        if ( cmdat & CMD_DAT_CONT_DATA_ENABLE ) {
-                /*imask &= ~INT_MASK_BUF_READY;*/
+        if (cmdat & CMD_DAT_CONT_DATA_ENABLE) {
+                /* imask &= ~INT_MASK_BUF_READY; */
                 imask &= ~INT_MASK_DATA_TRAN;
-                if ( cmdat & CMD_DAT_CONT_WRITE )
+                if (cmdat & CMD_DAT_CONT_WRITE)
                         imask &= ~INT_MASK_WRITE_OP_DONE;
-                if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events))
+                if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events))
                         imask &= ~INT_MASK_BUF_READY;
         }
 
         spin_lock_irqsave(&host->lock, flags);
         host->imask = imask;
-        MMC_INT_MASK = host->imask;
+        writew(host->imask, host->base + MMC_REG_INT_MASK);
         spin_unlock_irqrestore(&host->lock, flags);
 
         dev_dbg(mmc_dev(host->mmc), "CMD%02d (0x%02x) mask set to 0x%04x\n",
@@ -395,14 +395,14 @@ static void imxmci_finish_request(struct imxmci_host *host, struct mmc_request *
         spin_lock_irqsave(&host->lock, flags);
 
         host->pending_events &= ~(IMXMCI_PEND_WAIT_RESP_m | IMXMCI_PEND_DMA_END_m |
-                        IMXMCI_PEND_DMA_DATA_m | IMXMCI_PEND_CPU_DATA_m);
+                                  IMXMCI_PEND_DMA_DATA_m | IMXMCI_PEND_CPU_DATA_m);
 
         host->imask = IMXMCI_INT_MASK_DEFAULT;
-        MMC_INT_MASK = host->imask;
+        writew(host->imask, host->base + MMC_REG_INT_MASK);
 
         spin_unlock_irqrestore(&host->lock, flags);
 
-        if(req && req->cmd)
+        if (req && req->cmd)
                 host->prev_cmd_code = req->cmd->opcode;
 
         host->req = NULL;
@@ -416,17 +416,17 @@ static int imxmci_finish_data(struct imxmci_host *host, unsigned int stat)
         struct mmc_data *data = host->data;
         int data_error;
 
-        if(test_and_clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)){
+        if (test_and_clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) {
                 imx_dma_disable(host->dma);
                 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_nents,
                              host->dma_dir);
         }
 
-        if ( stat & STATUS_ERR_MASK ) {
-                dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n",stat);
-                if(stat & (STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR))
+        if (stat & STATUS_ERR_MASK) {
+                dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n", stat);
+                if (stat & (STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR))
                         data->error = -EILSEQ;
-                else if(stat & STATUS_TIME_OUT_READ)
+                else if (stat & STATUS_TIME_OUT_READ)
                         data->error = -ETIMEDOUT;
                 else
                         data->error = -EIO;
@@ -445,7 +445,7 @@ static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat)
 {
         struct mmc_command *cmd = host->cmd;
         int i;
-        u32 a,b,c;
+        u32 a, b, c;
         struct mmc_data *data = host->data;
 
         if (!cmd)
@@ -461,18 +461,18 @@ static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat)
                 cmd->error = -EILSEQ;
         }
 
-        if(cmd->flags & MMC_RSP_PRESENT) {
-                if(cmd->flags & MMC_RSP_136) {
+        if (cmd->flags & MMC_RSP_PRESENT) {
+                if (cmd->flags & MMC_RSP_136) {
                         for (i = 0; i < 4; i++) {
-                                u32 a = MMC_RES_FIFO & 0xffff;
-                                u32 b = MMC_RES_FIFO & 0xffff;
-                                cmd->resp[i] = a<<16 | b;
+                                a = readw(host->base + MMC_REG_RES_FIFO);
+                                b = readw(host->base + MMC_REG_RES_FIFO);
+                                cmd->resp[i] = a << 16 | b;
                         }
                 } else {
-                        a = MMC_RES_FIFO & 0xffff;
-                        b = MMC_RES_FIFO & 0xffff;
-                        c = MMC_RES_FIFO & 0xffff;
-                        cmd->resp[0] = a<<24 | b<<8 | c>>8;
+                        a = readw(host->base + MMC_REG_RES_FIFO);
+                        b = readw(host->base + MMC_REG_RES_FIFO);
+                        c = readw(host->base + MMC_REG_RES_FIFO);
+                        cmd->resp[0] = a << 24 | b << 8 | c >> 8;
                 }
         }
 
@@ -484,36 +484,34 @@ static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat)
 
                         /* Wait for FIFO to be empty before starting DMA write */
 
-                        stat = MMC_STATUS;
-                        if(imxmci_busy_wait_for_status(host, &stat,
-                                STATUS_APPL_BUFF_FE,
-                                40, "imxmci_cmd_done DMA WR") < 0) {
+                        stat = readw(host->base + MMC_REG_STATUS);
+                        if (imxmci_busy_wait_for_status(host, &stat,
+                                                        STATUS_APPL_BUFF_FE,
+                                                        40, "imxmci_cmd_done DMA WR") < 0) {
                                 cmd->error = -EIO;
                                 imxmci_finish_data(host, stat);
-                                if(host->req)
+                                if (host->req)
                                         imxmci_finish_request(host, host->req);
                                 dev_warn(mmc_dev(host->mmc), "STATUS = 0x%04x\n",
-                                       stat);
+                                         stat);
                                 return 0;
                         }
 
-                        if(test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) {
+                        if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events))
                                 imx_dma_enable(host->dma);
-                        }
                 }
         } else {
                 struct mmc_request *req;
                 imxmci_stop_clock(host);
                 req = host->req;
 
-                if(data)
+                if (data)
                         imxmci_finish_data(host, stat);
 
-                if( req ) {
+                if (req)
                         imxmci_finish_request(host, req);
-                } else {
+                else
                         dev_warn(mmc_dev(host->mmc), "imxmci_cmd_done: no request to finish\n");
-                }
         }
 
         return 1;
@@ -535,11 +533,10 @@ static int imxmci_data_done(struct imxmci_host *host, unsigned int stat)
         } else {
                 struct mmc_request *req;
                 req = host->req;
-                if( req ) {
+                if (req)
                         imxmci_finish_request(host, req);
-                } else {
+                else
                         dev_warn(mmc_dev(host->mmc), "imxmci_data_done: no request to finish\n");
-                }
         }
 
         return 1;
@@ -552,7 +549,7 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
         int trans_done = 0;
         unsigned int stat = *pstat;
 
-        if(host->actual_bus_width != MMC_BUS_WIDTH_4)
+        if (host->actual_bus_width != MMC_BUS_WIDTH_4)
                 burst_len = 16;
         else
                 burst_len = 64;
@@ -563,44 +560,44 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
 
         udelay(20);     /* required for clocks < 8MHz*/
 
-        if(host->dma_dir == DMA_FROM_DEVICE) {
+        if (host->dma_dir == DMA_FROM_DEVICE) {
                 imxmci_busy_wait_for_status(host, &stat,
-                                STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE |
-                                STATUS_TIME_OUT_READ,
-                                50, "imxmci_cpu_driven_data read");
+                                            STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE |
+                                            STATUS_TIME_OUT_READ,
+                                            50, "imxmci_cpu_driven_data read");
 
-                while((stat & (STATUS_APPL_BUFF_FF |  STATUS_DATA_TRANS_DONE)) &&
-                      !(stat & STATUS_TIME_OUT_READ) &&
-                      (host->data_cnt < 512)) {
+                while ((stat & (STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE)) &&
+                       !(stat & STATUS_TIME_OUT_READ) &&
+                       (host->data_cnt < 512)) {
 
                         udelay(20);     /* required for clocks < 8MHz*/
 
-                        for(i = burst_len; i>=2 ; i-=2) {
+                        for (i = burst_len; i >= 2 ; i -= 2) {
                                 u16 data;
-                                data = MMC_BUFFER_ACCESS;
+                                data = readw(host->base + MMC_REG_BUFFER_ACCESS);
                                 udelay(10);     /* required for clocks < 8MHz*/
-                                if(host->data_cnt+2 <= host->dma_size) {
+                                if (host->data_cnt+2 <= host->dma_size) {
                                         *(host->data_ptr++) = data;
                                 } else {
-                                        if(host->data_cnt < host->dma_size)
-                                                *(u8*)(host->data_ptr) = data;
+                                        if (host->data_cnt < host->dma_size)
+                                                *(u8 *)(host->data_ptr) = data;
                                 }
                                 host->data_cnt += 2;
                         }
 
-                        stat = MMC_STATUS;
+                        stat = readw(host->base + MMC_REG_STATUS);
 
                         dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read %d burst %d STATUS = 0x%x\n",
                                 host->data_cnt, burst_len, stat);
                 }
 
-                if((stat & STATUS_DATA_TRANS_DONE) && (host->data_cnt >= 512))
+                if ((stat & STATUS_DATA_TRANS_DONE) && (host->data_cnt >= 512))
                         trans_done = 1;
 
-                if(host->dma_size & 0x1ff)
+                if (host->dma_size & 0x1ff)
                         stat &= ~STATUS_CRC_READ_ERR;
 
-                if(stat & STATUS_TIME_OUT_READ) {
+                if (stat & STATUS_TIME_OUT_READ) {
                         dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read timeout STATUS = 0x%x\n",
                                 stat);
                         trans_done = -1;
@@ -608,12 +605,12 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
 
         } else {
                 imxmci_busy_wait_for_status(host, &stat,
-                                STATUS_APPL_BUFF_FE,
-                                20, "imxmci_cpu_driven_data write");
+                                            STATUS_APPL_BUFF_FE,
+                                            20, "imxmci_cpu_driven_data write");
 
-                while((stat & STATUS_APPL_BUFF_FE) &&
-                      (host->data_cnt < host->dma_size)) {
-                        if(burst_len >= host->dma_size - host->data_cnt) {
+                while ((stat & STATUS_APPL_BUFF_FE) &&
+                       (host->data_cnt < host->dma_size)) {
+                        if (burst_len >= host->dma_size - host->data_cnt) {
                                 burst_len = host->dma_size - host->data_cnt;
                                 host->data_cnt = host->dma_size;
                                 trans_done = 1;
@@ -621,10 +618,10 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
                                 host->data_cnt += burst_len;
                         }
 
-                        for(i = burst_len; i>0 ; i-=2)
-                                MMC_BUFFER_ACCESS = *(host->data_ptr++);
+                        for (i = burst_len; i > 0 ; i -= 2)
+                                writew(*(host->data_ptr++), host->base + MMC_REG_BUFFER_ACCESS);
 
-                        stat = MMC_STATUS;
+                        stat = readw(host->base + MMC_REG_STATUS);
 
                         dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data write burst %d STATUS = 0x%x\n",
                                 burst_len, stat);
@@ -639,7 +636,7 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
 static void imxmci_dma_irq(int dma, void *devid)
 {
         struct imxmci_host *host = devid;
-        uint32_t stat = MMC_STATUS;
+        u32 stat = readw(host->base + MMC_REG_STATUS);
 
         atomic_set(&host->stuck_timeout, 0);
         host->status_reg = stat;
@@ -650,10 +647,11 @@ static void imxmci_dma_irq(int dma, void *devid)
 static irqreturn_t imxmci_irq(int irq, void *devid)
 {
         struct imxmci_host *host = devid;
-        uint32_t stat = MMC_STATUS;
+        u32 stat = readw(host->base + MMC_REG_STATUS);
         int handled = 1;
 
-        MMC_INT_MASK = host->imask | INT_MASK_SDIO | INT_MASK_AUTO_CARD_DETECT;
+        writew(host->imask | INT_MASK_SDIO | INT_MASK_AUTO_CARD_DETECT,
+                        host->base + MMC_REG_INT_MASK);
 
         atomic_set(&host->stuck_timeout, 0);
         host->status_reg = stat;
@@ -671,10 +669,10 @@ static void imxmci_tasklet_fnc(unsigned long data)
         unsigned int data_dir_mask = 0; /* STATUS_WR_CRC_ERROR_CODE_MASK */
         int timeout = 0;
 
-        if(atomic_read(&host->stuck_timeout) > 4) {
+        if (atomic_read(&host->stuck_timeout) > 4) {
                 char *what;
                 timeout = 1;
-                stat = MMC_STATUS;
+                stat = readw(host->base + MMC_REG_STATUS);
                 host->status_reg = stat;
                 if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events))
                         if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events))
@@ -683,29 +681,37 @@ static void imxmci_tasklet_fnc(unsigned long data)
                                 what = "RESP";
                 else
                         if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events))
-                                if(test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events))
+                                if (test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events))
                                         what = "DATA";
                                 else
                                         what = "DMA";
                         else
                                 what = "???";
 
-                dev_err(mmc_dev(host->mmc), "%s TIMEOUT, hardware stucked STATUS = 0x%04x IMASK = 0x%04x\n",
-                       what, stat, MMC_INT_MASK);
-                dev_err(mmc_dev(host->mmc), "CMD_DAT_CONT = 0x%04x, MMC_BLK_LEN = 0x%04x, MMC_NOB = 0x%04x, DMA_CCR = 0x%08x\n",
-                       MMC_CMD_DAT_CONT, MMC_BLK_LEN, MMC_NOB, CCR(host->dma));
+                dev_err(mmc_dev(host->mmc),
+                        "%s TIMEOUT, hardware stucked STATUS = 0x%04x IMASK = 0x%04x\n",
+                        what, stat,
+                        readw(host->base + MMC_REG_INT_MASK));
+                dev_err(mmc_dev(host->mmc),
+                        "CMD_DAT_CONT = 0x%04x, MMC_BLK_LEN = 0x%04x, MMC_NOB = 0x%04x, DMA_CCR = 0x%08x\n",
+                        readw(host->base + MMC_REG_CMD_DAT_CONT),
+                        readw(host->base + MMC_REG_BLK_LEN),
+                        readw(host->base + MMC_REG_NOB),
+                        CCR(host->dma));
                 dev_err(mmc_dev(host->mmc), "CMD%d, prevCMD%d, bus %d-bit, dma_size = 0x%x\n",
-                       host->cmd?host->cmd->opcode:0, host->prev_cmd_code, 1<<host->actual_bus_width, host->dma_size);
+                        host->cmd ? host->cmd->opcode : 0,
+                        host->prev_cmd_code,
+                        1 << host->actual_bus_width, host->dma_size);
         }
 
-        if(!host->present || timeout)
+        if (!host->present || timeout)
                 host->status_reg = STATUS_TIME_OUT_RESP | STATUS_TIME_OUT_READ |
-                                    STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR;
+                        STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR;
 
-        if(test_bit(IMXMCI_PEND_IRQ_b, &host->pending_events) || timeout) {
+        if (test_bit(IMXMCI_PEND_IRQ_b, &host->pending_events) || timeout) {
                 clear_bit(IMXMCI_PEND_IRQ_b, &host->pending_events);
 
-                stat = MMC_STATUS;
+                stat = readw(host->base + MMC_REG_STATUS);
                 /*
                  * This is not required in theory, but there is chance to miss some flag
                  * which clears automatically by mask write, FreeScale original code keeps
@@ -713,63 +719,62 @@ static void imxmci_tasklet_fnc(unsigned long data)
                  */
                 stat |= host->status_reg;
 
-                if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events))
+                if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events))
                         stat &= ~STATUS_CRC_READ_ERR;
 
-                if(test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) {
+                if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) {
                         imxmci_busy_wait_for_status(host, &stat,
-                                        STATUS_END_CMD_RESP | STATUS_ERR_MASK,
-                                        20, "imxmci_tasklet_fnc resp (ERRATUM #4)");
+                                                    STATUS_END_CMD_RESP | STATUS_ERR_MASK,
+                                                    20, "imxmci_tasklet_fnc resp (ERRATUM #4)");
                 }
 
-                if(stat & (STATUS_END_CMD_RESP | STATUS_ERR_MASK)) {
-                        if(test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events))
+                if (stat & (STATUS_END_CMD_RESP | STATUS_ERR_MASK)) {
+                        if (test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events))
                                 imxmci_cmd_done(host, stat);
-                        if(host->data && (stat & STATUS_ERR_MASK))
+                        if (host->data && (stat & STATUS_ERR_MASK))
                                 imxmci_data_done(host, stat);
                 }
 
-                if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) {
-                        stat |= MMC_STATUS;
-                        if(imxmci_cpu_driven_data(host, &stat)){
-                                if(test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events))
+                if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) {
+                        stat |= readw(host->base + MMC_REG_STATUS);
+                        if (imxmci_cpu_driven_data(host, &stat)) {
+                                if (test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events))
                                         imxmci_cmd_done(host, stat);
                                 atomic_clear_mask(IMXMCI_PEND_IRQ_m|IMXMCI_PEND_CPU_DATA_m,
-                                                        &host->pending_events);
+                                                  &host->pending_events);
                                 imxmci_data_done(host, stat);
                         }
                 }
         }
 
-        if(test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events) &&
-           !test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) {
+        if (test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events) &&
+            !test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) {
 
-                stat = MMC_STATUS;
+                stat = readw(host->base + MMC_REG_STATUS);
                 /* Same as above */
                 stat |= host->status_reg;
 
-                if(host->dma_dir == DMA_TO_DEVICE) {
+                if (host->dma_dir == DMA_TO_DEVICE)
                         data_dir_mask = STATUS_WRITE_OP_DONE;
-                } else {
+                else
                         data_dir_mask = STATUS_DATA_TRANS_DONE;
-                }
 
-                if(stat & data_dir_mask) {
+                if (stat & data_dir_mask) {
                         clear_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events);
                         imxmci_data_done(host, stat);
                 }
         }
 
-        if(test_and_clear_bit(IMXMCI_PEND_CARD_XCHG_b, &host->pending_events)) {
+        if (test_and_clear_bit(IMXMCI_PEND_CARD_XCHG_b, &host->pending_events)) {
 
-                if(host->cmd)
+                if (host->cmd)
                         imxmci_cmd_done(host, STATUS_TIME_OUT_RESP);
 
-                if(host->data)
+                if (host->data)
                         imxmci_data_done(host, STATUS_TIME_OUT_READ |
                                          STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR);
 
-                if(host->req)
+                if (host->req)
                         imxmci_finish_request(host, host->req);
 
                 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
@@ -796,9 +801,8 @@ static void imxmci_request(struct mmc_host *mmc, struct mmc_request *req)
                 if (req->data->flags & MMC_DATA_WRITE)
                         cmdat |= CMD_DAT_CONT_WRITE;
 
-                if (req->data->flags & MMC_DATA_STREAM) {
+                if (req->data->flags & MMC_DATA_STREAM)
                         cmdat |= CMD_DAT_CONT_STREAM_BLOCK;
-                }
         }
 
         imxmci_start_cmd(host, req->cmd, cmdat);
@@ -811,36 +815,37 @@ static void imxmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
         struct imxmci_host *host = mmc_priv(mmc);
         int prescaler;
 
-        if( ios->bus_width==MMC_BUS_WIDTH_4 ) {
+        if (ios->bus_width == MMC_BUS_WIDTH_4) {
                 host->actual_bus_width = MMC_BUS_WIDTH_4;
                 imx_gpio_mode(PB11_PF_SD_DAT3);
-        }else{
+        } else {
                 host->actual_bus_width = MMC_BUS_WIDTH_1;
                 imx_gpio_mode(GPIO_PORTB | GPIO_IN | GPIO_PUEN | 11);
         }
 
-        if ( host->power_mode != ios->power_mode ) {
+        if (host->power_mode != ios->power_mode) {
                 switch (ios->power_mode) {
                 case MMC_POWER_OFF:
-                        break;
+                        break;
                 case MMC_POWER_UP:
                         set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events);
-                        break;
+                        break;
                 case MMC_POWER_ON:
-                        break;
+                        break;
                 }
                 host->power_mode = ios->power_mode;
         }
 
-        if ( ios->clock ) {
+        if (ios->clock) {
                 unsigned int clk;
+                u16 reg;
 
                 /* The prescaler is 5 for PERCLK2 equal to 96MHz
                  * then 96MHz / 5 = 19.2 MHz
                  */
                 clk = clk_get_rate(host->clk);
-                prescaler=(clk+(CLK_RATE*7)/8)/CLK_RATE;
-                switch(prescaler) {
+                prescaler = (clk + (CLK_RATE * 7) / 8) / CLK_RATE;
+                switch (prescaler) {
                 case 0:
                 case 1: prescaler = 0;
                         break;
@@ -858,24 +863,29 @@ static void imxmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
                 dev_dbg(mmc_dev(host->mmc), "PERCLK2 %d MHz -> prescaler %d\n",
                         clk, prescaler);
 
-                for(clk=0; clk<8; clk++) {
+                for (clk = 0; clk < 8; clk++) {
                         int x;
-                        x = CLK_RATE / (1<<clk);
-                        if( x <= ios->clock)
+                        x = CLK_RATE / (1 << clk);
+                        if (x <= ios->clock)
                                 break;
                 }
 
-                MMC_STR_STP_CLK |= STR_STP_CLK_ENABLE; /* enable controller */
+                /* enable controller */
+                reg = readw(host->base + MMC_REG_STR_STP_CLK);
+                writew(reg | STR_STP_CLK_ENABLE,
+                                host->base + MMC_REG_STR_STP_CLK);
 
                 imxmci_stop_clock(host);
-                MMC_CLK_RATE = (prescaler<<3) | clk;
+                writew((prescaler << 3) | clk, host->base + MMC_REG_CLK_RATE);
                 /*
                  * Under my understanding, clock should not be started there, because it would
                  * initiate SDHC sequencer and send last or random command into card
                  */
-                /*imxmci_start_clock(host);*/
+                /* imxmci_start_clock(host); */
 
-                dev_dbg(mmc_dev(host->mmc), "MMC_CLK_RATE: 0x%08x\n", MMC_CLK_RATE);
+                dev_dbg(mmc_dev(host->mmc),
+                        "MMC_CLK_RATE: 0x%08x\n",
+                        readw(host->base + MMC_REG_CLK_RATE));
         } else {
                 imxmci_stop_clock(host);
         }
@@ -915,10 +925,10 @@ static void imxmci_check_status(unsigned long data)
                 tasklet_schedule(&host->tasklet);
         }
 
-        if(test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events) ||
-           test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) {
+        if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events) ||
+            test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) {
                 atomic_inc(&host->stuck_timeout);
-                if(atomic_read(&host->stuck_timeout) > 4)
+                if (atomic_read(&host->stuck_timeout) > 4)
                         tasklet_schedule(&host->tasklet);
         } else {
                 atomic_set(&host->stuck_timeout, 0);
@@ -934,6 +944,7 @@ static int imxmci_probe(struct platform_device *pdev)
         struct imxmci_host *host = NULL;
         struct resource *r;
         int ret = 0, irq;
+        u16 rev_no;
 
         printk(KERN_INFO "i.MX mmc driver\n");
 
@@ -942,7 +953,8 @@ static int imxmci_probe(struct platform_device *pdev)
         if (!r || irq < 0)
                 return -ENXIO;
 
-        if (!request_mem_region(r->start, 0x100, pdev->name))
+        r = request_mem_region(r->start, resource_size(r), pdev->name);
+        if (!r)
                 return -EBUSY;
 
         mmc = mmc_alloc_host(sizeof(struct imxmci_host), &pdev->dev);
@@ -966,6 +978,12 @@ static int imxmci_probe(struct platform_device *pdev)
         mmc->max_blk_count = 65535;
 
         host = mmc_priv(mmc);
+        host->base = ioremap(r->start, resource_size(r));
+        if (!host->base) {
+                ret = -ENOMEM;
+                goto out;
+        }
+
         host->mmc = mmc;
         host->dma_allocated = 0;
         host->pdata = pdev->dev.platform_data;
@@ -993,18 +1011,20 @@ static int imxmci_probe(struct platform_device *pdev)
         imx_gpio_mode(PB12_PF_SD_CLK);
         imx_gpio_mode(PB13_PF_SD_CMD);
 
-        imxmci_softreset();
+        imxmci_softreset(host);
 
-        if ( MMC_REV_NO != 0x390 ) {
+        rev_no = readw(host->base + MMC_REG_REV_NO);
+        if (rev_no != 0x390) {
                 dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n",
-                        MMC_REV_NO);
+                        readw(host->base + MMC_REG_REV_NO));
                 goto out;
         }
 
-        MMC_READ_TO = 0x2db4; /* recommended in data sheet */
+        /* recommended in data sheet */
+        writew(0x2db4, host->base + MMC_REG_READ_TO);
 
         host->imask = IMXMCI_INT_MASK_DEFAULT;
-        MMC_INT_MASK = host->imask;
+        writew(host->imask, host->base + MMC_REG_INT_MASK);
 
         host->dma = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_LOW);
         if(host->dma < 0) {
@@ -1012,7 +1032,7 @@ static int imxmci_probe(struct platform_device *pdev)
                 ret = -EBUSY;
                 goto out;
         }
-        host->dma_allocated=1;
+        host->dma_allocated = 1;
         imx_dma_setup_handlers(host->dma, imxmci_dma_irq, NULL, host);
 
         tasklet_init(&host->tasklet, imxmci_tasklet_fnc, (unsigned long)host);
@@ -1032,7 +1052,7 @@ static int imxmci_probe(struct platform_device *pdev)
         host->timer.data = (unsigned long)host;
         host->timer.function = imxmci_check_status;
         add_timer(&host->timer);
-        mod_timer(&host->timer, jiffies + (HZ>>1));
+        mod_timer(&host->timer, jiffies + (HZ >> 1));
 
         platform_set_drvdata(pdev, mmc);
 
@@ -1042,18 +1062,20 @@ static int imxmci_probe(struct platform_device *pdev)
 
 out:
         if (host) {
-                if(host->dma_allocated){
+                if (host->dma_allocated) {
                         imx_dma_free(host->dma);
-                        host->dma_allocated=0;
+                        host->dma_allocated = 0;
                 }
                 if (host->clk) {
                         clk_disable(host->clk);
                         clk_put(host->clk);
                 }
+                if (host->base)
+                        iounmap(host->base);
         }
         if (mmc)
                 mmc_free_host(mmc);
-        release_mem_region(r->start, 0x100);
+        release_mem_region(r->start, resource_size(r));
         return ret;
 }
 
@@ -1072,9 +1094,10 @@ static int imxmci_remove(struct platform_device *pdev)
                 mmc_remove_host(mmc);
 
                 free_irq(host->irq, host);
-                if(host->dma_allocated){
+                iounmap(host->base);
+                if (host->dma_allocated) {
                         imx_dma_free(host->dma);
-                        host->dma_allocated=0;
+                        host->dma_allocated = 0;
                 }
 
                 tasklet_kill(&host->tasklet);
@@ -1082,7 +1105,7 @@ static int imxmci_remove(struct platform_device *pdev)
                 clk_disable(host->clk);
                 clk_put(host->clk);
 
-                release_mem_region(host->res->start, 0x100);
+                release_mem_region(host->res->start, resource_size(host->res));
 
                 mmc_free_host(mmc);
         }
@@ -1109,7 +1132,7 @@ static int imxmci_resume(struct platform_device *dev)
 
         if (mmc) {
                 host = mmc_priv(mmc);
-                if(host)
+                if (host)
                         set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events);
                 ret = mmc_resume_host(mmc);
         }
diff --git a/drivers/mmc/host/imxmmc.h b/drivers/mmc/host/imxmmc.h
index e5339e334dbb..09d5d4ee3a77 100644
--- a/drivers/mmc/host/imxmmc.h
+++ b/drivers/mmc/host/imxmmc.h
@@ -1,24 +1,21 @@
+#define MMC_REG_STR_STP_CLK             0x00
+#define MMC_REG_STATUS                  0x04
+#define MMC_REG_CLK_RATE                0x08
+#define MMC_REG_CMD_DAT_CONT            0x0C
+#define MMC_REG_RES_TO                  0x10
+#define MMC_REG_READ_TO                 0x14
+#define MMC_REG_BLK_LEN                 0x18
+#define MMC_REG_NOB                     0x1C
+#define MMC_REG_REV_NO                  0x20
+#define MMC_REG_INT_MASK                0x24
+#define MMC_REG_CMD                     0x28
+#define MMC_REG_ARGH                    0x2C
+#define MMC_REG_ARGL                    0x30
+#define MMC_REG_RES_FIFO                0x34
+#define MMC_REG_BUFFER_ACCESS           0x38
 
-# define __REG16(x)     (*((volatile u16 *)IO_ADDRESS(x)))
-
-#define MMC_STR_STP_CLK  __REG16(IMX_MMC_BASE + 0x00)
-#define MMC_STATUS       __REG16(IMX_MMC_BASE + 0x04)
-#define MMC_CLK_RATE     __REG16(IMX_MMC_BASE + 0x08)
-#define MMC_CMD_DAT_CONT __REG16(IMX_MMC_BASE + 0x0C)
-#define MMC_RES_TO       __REG16(IMX_MMC_BASE + 0x10)
-#define MMC_READ_TO      __REG16(IMX_MMC_BASE + 0x14)
-#define MMC_BLK_LEN      __REG16(IMX_MMC_BASE + 0x18)
-#define MMC_NOB          __REG16(IMX_MMC_BASE + 0x1C)
-#define MMC_REV_NO       __REG16(IMX_MMC_BASE + 0x20)
-#define MMC_INT_MASK     __REG16(IMX_MMC_BASE + 0x24)
-#define MMC_CMD          __REG16(IMX_MMC_BASE + 0x28)
-#define MMC_ARGH         __REG16(IMX_MMC_BASE + 0x2C)
-#define MMC_ARGL         __REG16(IMX_MMC_BASE + 0x30)
-#define MMC_RES_FIFO     __REG16(IMX_MMC_BASE + 0x34)
-#define MMC_BUFFER_ACCESS __REG16(IMX_MMC_BASE + 0x38)
-#define MMC_BUFFER_ACCESS_OFS 0x38
-
-
+#define STR_STP_CLK_IPG_CLK_GATE_DIS    (1<<15)
+#define STR_STP_CLK_IPG_PERCLK_GATE_DIS (1<<14)
 #define STR_STP_CLK_ENDIAN              (1<<5)
 #define STR_STP_CLK_RESET               (1<<3)
 #define STR_STP_CLK_ENABLE              (1<<2)
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index 1b9fc3c6b875..67d7b7fef084 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -1015,7 +1015,7 @@ static int mmc_omap_get_dma_channel(struct mmc_omap_host *host, struct mmc_data
         }
 
         if (is_read) {
-                if (host->id == 1) {
+                if (host->id == 0) {
                         sync_dev = OMAP_DMA_MMC_RX;
                         dma_dev_name = "MMC1 read";
                 } else {
@@ -1023,7 +1023,7 @@ static int mmc_omap_get_dma_channel(struct mmc_omap_host *host, struct mmc_data
                         dma_dev_name = "MMC2 read";
                 }
         } else {
-                if (host->id == 1) {
+                if (host->id == 0) {
                         sync_dev = OMAP_DMA_MMC_TX;
                         dma_dev_name = "MMC1 write";
                 } else {
@@ -1317,7 +1317,7 @@ static int __init mmc_omap_new_slot(struct mmc_omap_host *host, int id)
         host->slots[id] = slot;
 
         mmc->caps = 0;
-        if (host->pdata->conf.wire4)
+        if (host->pdata->slots[id].wires >= 4)
                 mmc->caps |= MMC_CAP_4_BIT_DATA;
 
         mmc->ops = &mmc_omap_ops;
@@ -1451,6 +1451,7 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
         host->irq = irq;
 
         host->use_dma = 1;
+        host->dev->dma_mask = &pdata->dma_mask;
         host->dma_ch = -1;
 
         host->irq = irq;
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 76a76751da36..6659b2275c0c 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -37,9 +37,9 @@
 #define OPCODE_NORM_READ        0x03    /* Read data bytes (low frequency) */
 #define OPCODE_FAST_READ        0x0b    /* Read data bytes (high frequency) */
 #define OPCODE_PP               0x02    /* Page program (up to 256 bytes) */
-#define OPCODE_BE_4K            0x20    /* Erase 4KiB block */
+#define OPCODE_BE_4K            0x20    /* Erase 4KiB block */
 #define OPCODE_BE_32K           0x52    /* Erase 32KiB block */
-#define OPCODE_BE               0xc7    /* Erase whole flash block */
+#define OPCODE_CHIP_ERASE       0xc7    /* Erase whole flash chip */
 #define OPCODE_SE               0xd8    /* Sector erase (usually 64KiB) */
 #define OPCODE_RDID             0x9f    /* Read JEDEC ID */
 
@@ -167,7 +167,7 @@ static int wait_till_ready(struct m25p *flash)
  *
  * Returns 0 if successful, non-zero otherwise.
  */
-static int erase_block(struct m25p *flash)
+static int erase_chip(struct m25p *flash)
 {
         DEBUG(MTD_DEBUG_LEVEL3, "%s: %s %dKiB\n",
                         flash->spi->dev.bus_id, __func__,
@@ -181,7 +181,7 @@ static int erase_block(struct m25p *flash)
         write_enable(flash);
 
         /* Set up command buffer. */
-        flash->command[0] = OPCODE_BE;
+        flash->command[0] = OPCODE_CHIP_ERASE;
 
         spi_write(flash->spi, flash->command, 1);
 
@@ -250,15 +250,18 @@ static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr)
 
         mutex_lock(&flash->lock);
 
-        /* REVISIT in some cases we could speed up erasing large regions
-         * by using OPCODE_SE instead of OPCODE_BE_4K
-         */
-
-        /* now erase those sectors */
-        if (len == flash->mtd.size && erase_block(flash)) {
+        /* whole-chip erase? */
+        if (len == flash->mtd.size && erase_chip(flash)) {
                 instr->state = MTD_ERASE_FAILED;
                 mutex_unlock(&flash->lock);
                 return -EIO;
+
+        /* REVISIT in some cases we could speed up erasing large regions
+         * by using OPCODE_SE instead of OPCODE_BE_4K.  We may have set up
+         * to use "small sector erase", but that's not always optimal.
+         */
+
+        /* "sector"-at-a-time erase */
         } else {
                 while (len) {
                         if (erase_sector(flash, addr)) {
@@ -574,10 +577,11 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
         for (tmp = 0, info = m25p_data;
                         tmp < ARRAY_SIZE(m25p_data);
                         tmp++, info++) {
-                if (info->jedec_id == jedec)
-                        if (ext_jedec != 0 && info->ext_id != ext_jedec)
+                if (info->jedec_id == jedec) {
+                        if (info->ext_id != 0 && info->ext_id != ext_jedec)
                                 continue;
                         return info;
+                }
         }
         dev_err(&spi->dev, "unrecognized JEDEC id %06x\n", jedec);
         return NULL;
diff --git a/drivers/mtd/maps/physmap.c b/drivers/mtd/maps/physmap.c
index 42d844f8f6bf..dfbf3f270cea 100644
--- a/drivers/mtd/maps/physmap.c
+++ b/drivers/mtd/maps/physmap.c
@@ -19,7 +19,7 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
 #include <linux/mtd/concat.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 #define MAX_RESOURCES           4
 
@@ -27,7 +27,6 @@ struct physmap_flash_info {
         struct mtd_info         *mtd[MAX_RESOURCES];
         struct mtd_info         *cmtd;
         struct map_info         map[MAX_RESOURCES];
-        struct resource         *res;
 #ifdef CONFIG_MTD_PARTITIONS
         int                     nr_parts;
         struct mtd_partition    *parts;
@@ -70,16 +69,7 @@ static int physmap_flash_remove(struct platform_device *dev)
 #endif
                         map_destroy(info->mtd[i]);
                 }
-
-                if (info->map[i].virt != NULL)
-                        iounmap(info->map[i].virt);
-        }
-
-        if (info->res != NULL) {
-                release_resource(info->res);
-                kfree(info->res);
         }
-
         return 0;
 }
 
@@ -101,7 +91,8 @@ static int physmap_flash_probe(struct platform_device *dev)
         if (physmap_data == NULL)
                 return -ENODEV;
 
-        info = kzalloc(sizeof(struct physmap_flash_info), GFP_KERNEL);
+        info = devm_kzalloc(&dev->dev, sizeof(struct physmap_flash_info),
+                            GFP_KERNEL);
         if (info == NULL) {
                 err = -ENOMEM;
                 goto err_out;
@@ -114,10 +105,10 @@ static int physmap_flash_probe(struct platform_device *dev)
                        (unsigned long long)(dev->resource[i].end - dev->resource[i].start + 1),
                        (unsigned long long)dev->resource[i].start);
 
-                info->res = request_mem_region(dev->resource[i].start,
-                                               dev->resource[i].end - dev->resource[i].start + 1,
-                                               dev->dev.bus_id);
-                if (info->res == NULL) {
+                if (!devm_request_mem_region(&dev->dev,
+                        dev->resource[i].start,
+                        dev->resource[i].end - dev->resource[i].start + 1,
+                        dev->dev.bus_id)) {
                         dev_err(&dev->dev, "Could not reserve memory region\n");
                         err = -ENOMEM;
                         goto err_out;
@@ -129,7 +120,8 @@ static int physmap_flash_probe(struct platform_device *dev)
                 info->map[i].bankwidth = physmap_data->width;
                 info->map[i].set_vpp = physmap_data->set_vpp;
 
-                info->map[i].virt = ioremap(info->map[i].phys, info->map[i].size);
+                info->map[i].virt = devm_ioremap(&dev->dev, info->map[i].phys,
+                                                 info->map[i].size);
                 if (info->map[i].virt == NULL) {
                         dev_err(&dev->dev, "Failed to ioremap flash region\n");
                         err = EIO;
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 1c2e9450d663..f8ae0400c49c 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -408,7 +408,7 @@ config MTD_NAND_FSL_UPM
 
 config MTD_NAND_MXC
         tristate "MXC NAND support"
-        depends on ARCH_MX2
+        depends on ARCH_MX2 || ARCH_MX3
         help
           This enables the driver for the NAND flash controller on the
           MXC processors.
diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
index 024e3fffd4bb..a83192f80eba 100644
--- a/drivers/mtd/nand/fsl_upm.c
+++ b/drivers/mtd/nand/fsl_upm.c
@@ -163,9 +163,11 @@ static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
         ret = parse_mtd_partitions(&fun->mtd, part_types, &fun->parts, 0);
 
 #ifdef CONFIG_MTD_OF_PARTS
-        if (ret == 0)
-                ret = of_mtd_parse_partitions(fun->dev, &fun->mtd,
-                                              flash_np, &fun->parts);
+        if (ret == 0) {
+                ret = of_mtd_parse_partitions(fun->dev, flash_np, &fun->parts);
+                if (ret < 0)
+                        goto err;
+        }
 #endif
         if (ret > 0)
                 ret = add_mtd_partitions(&fun->mtd, fun->parts, ret);
diff --git a/drivers/mtd/nand/pasemi_nand.c b/drivers/mtd/nand/pasemi_nand.c
index 75c899039023..9bd6c9ac8443 100644
--- a/drivers/mtd/nand/pasemi_nand.c
+++ b/drivers/mtd/nand/pasemi_nand.c
@@ -141,6 +141,7 @@ static int __devinit pasemi_nand_probe(struct of_device *ofdev,
         }
 
         lpcctl = pci_resource_start(pdev, 0);
+        pci_dev_put(pdev);
 
         if (!request_region(lpcctl, 4, driver_name)) {
                 err = -EBUSY;
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index ce5752ab579d..fc4144495610 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -269,6 +269,7 @@ static struct pxa3xx_nand_timing stm2GbX16_timing = {
 
 static struct pxa3xx_nand_flash stm2GbX16 = {
         .timing = &stm2GbX16_timing,
+        .cmdset = &largepage_cmdset,
         .page_per_block = 64,
         .page_size = 2048,
         .flash_width = 16,
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index e39b21d3e168..d1e0b8e7224b 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -32,19 +32,18 @@
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
 #include <linux/delay.h>
+#include <linux/dma-mapping.h>
+#include <linux/io.h>
 
-#include <asm/io.h>
 #include <asm/mach/flash.h>
-#include <asm/arch/gpmc.h>
-#include <asm/arch/onenand.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/pm.h>
+#include <mach/gpmc.h>
+#include <mach/onenand.h>
+#include <mach/gpio.h>
+#include <mach/pm.h>
 
-#include <linux/dma-mapping.h>
-#include <asm/dma-mapping.h>
-#include <asm/arch/dma.h>
+#include <mach/dma.h>
 
-#include <asm/arch/board.h>
+#include <mach/board.h>
 
 #define DRIVER_NAME "omap2-onenand"
 
@@ -150,7 +149,7 @@ static int omap2_onenand_wait(struct mtd_info *mtd, int state)
 
                 INIT_COMPLETION(c->irq_done);
                 if (c->gpio_irq) {
-                        result = omap_get_gpio_datain(c->gpio_irq);
+                        result = gpio_get_value(c->gpio_irq);
                         if (result == -1) {
                                 ctrl = read_reg(c, ONENAND_REG_CTRL_STATUS);
                                 intr = read_reg(c, ONENAND_REG_INTERRUPT);
@@ -635,9 +634,9 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
                                 "OneNAND\n", c->gpio_irq);
                         goto err_iounmap;
         }
-        omap_set_gpio_direction(c->gpio_irq, 1);
+        gpio_direction_input(c->gpio_irq);
 
-        if ((r = request_irq(OMAP_GPIO_IRQ(c->gpio_irq),
+        if ((r = request_irq(gpio_to_irq(c->gpio_irq),
                              omap2_onenand_interrupt, IRQF_TRIGGER_RISING,
                              pdev->dev.driver->name, c)) < 0)
                 goto err_release_gpio;
@@ -724,7 +723,7 @@ err_release_dma:
         if (c->dma_channel != -1)
                 omap_free_dma(c->dma_channel);
         if (c->gpio_irq)
-                free_irq(OMAP_GPIO_IRQ(c->gpio_irq), c);
+                free_irq(gpio_to_irq(c->gpio_irq), c);
 err_release_gpio:
         if (c->gpio_irq)
                 omap_free_gpio(c->gpio_irq);
@@ -761,7 +760,7 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev)
         omap2_onenand_shutdown(pdev);
         platform_set_drvdata(pdev, NULL);
         if (c->gpio_irq) {
-                free_irq(OMAP_GPIO_IRQ(c->gpio_irq), c);
+                free_irq(gpio_to_irq(c->gpio_irq), c);
                 omap_free_gpio(c->gpio_irq);
         }
         iounmap(c->onenand.base);
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index f19acf8b9220..017383ad5ec6 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -114,7 +114,7 @@ obj-$(CONFIG_EL2) += 3c503.o 8390p.o
 obj-$(CONFIG_NE2000) += ne.o 8390p.o
 obj-$(CONFIG_NE2_MCA) += ne2.o 8390p.o
 obj-$(CONFIG_HPLAN) += hp.o 8390p.o
-obj-$(CONFIG_HPLAN_PLUS) += hp-plus.o 8390.o
+obj-$(CONFIG_HPLAN_PLUS) += hp-plus.o 8390p.o
 obj-$(CONFIG_ULTRA) += smc-ultra.o 8390.o
 obj-$(CONFIG_ULTRAMCA) += smc-mca.o 8390.o
 obj-$(CONFIG_ULTRA32) += smc-ultra32.o 8390.o
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index d07e3f148951..a1a3d0e5d2b4 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -3144,6 +3144,28 @@ bnx2_has_work(struct bnx2_napi *bnapi)
         return 0;
 }
 
+static void
+bnx2_chk_missed_msi(struct bnx2 *bp)
+{
+        struct bnx2_napi *bnapi = &bp->bnx2_napi[0];
+        u32 msi_ctrl;
+
+        if (bnx2_has_work(bnapi)) {
+                msi_ctrl = REG_RD(bp, BNX2_PCICFG_MSI_CONTROL);
+                if (!(msi_ctrl & BNX2_PCICFG_MSI_CONTROL_ENABLE))
+                        return;
+
+                if (bnapi->last_status_idx == bp->idle_chk_status_idx) {
+                        REG_WR(bp, BNX2_PCICFG_MSI_CONTROL, msi_ctrl &
+                               ~BNX2_PCICFG_MSI_CONTROL_ENABLE);
+                        REG_WR(bp, BNX2_PCICFG_MSI_CONTROL, msi_ctrl);
+                        bnx2_msi(bp->irq_tbl[0].vector, bnapi);
+                }
+        }
+
+        bp->idle_chk_status_idx = bnapi->last_status_idx;
+}
+
 static void bnx2_poll_link(struct bnx2 *bp, struct bnx2_napi *bnapi)
 {
         struct status_block *sblk = bnapi->status_blk.msi;
@@ -3218,14 +3240,15 @@ static int bnx2_poll(struct napi_struct *napi, int budget)
 
                 work_done = bnx2_poll_work(bp, bnapi, work_done, budget);
 
-                if (unlikely(work_done >= budget))
-                        break;
-
                 /* bnapi->last_status_idx is used below to tell the hw how
                  * much work has been processed, so we must read it before
                  * checking for more work.
                  */
                 bnapi->last_status_idx = sblk->status_idx;
+
+                if (unlikely(work_done >= budget))
+                        break;
+
                 rmb();
                 if (likely(!bnx2_has_work(bnapi))) {
                         netif_rx_complete(bp->dev, napi);
@@ -4570,6 +4593,8 @@ bnx2_init_chip(struct bnx2 *bp)
         for (i = 0; i < BNX2_MAX_MSIX_VEC; i++)
                 bp->bnx2_napi[i].last_status_idx = 0;
 
+        bp->idle_chk_status_idx = 0xffff;
+
         bp->rx_mode = BNX2_EMAC_RX_MODE_SORT_MODE;
 
         /* Set up how to generate a link change interrupt. */
@@ -5718,6 +5743,10 @@ bnx2_timer(unsigned long data)
         if (atomic_read(&bp->intr_sem) != 0)
                 goto bnx2_restart_timer;
 
+        if ((bp->flags & (BNX2_FLAG_USING_MSI | BNX2_FLAG_ONE_SHOT_MSI)) ==
+             BNX2_FLAG_USING_MSI)
+                bnx2_chk_missed_msi(bp);
+
         bnx2_send_heart_beat(bp);
 
         bp->stats_blk->stat_FwRxDrop =
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index 617d95340160..0b032c3c7b61 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -378,6 +378,9 @@ struct l2_fhdr {
  *  pci_config_l definition
  *  offset: 0000
  */
+#define BNX2_PCICFG_MSI_CONTROL                         0x00000058
+#define BNX2_PCICFG_MSI_CONTROL_ENABLE                   (1L<<16)
+
 #define BNX2_PCICFG_MISC_CONFIG                         0x00000068
 #define BNX2_PCICFG_MISC_CONFIG_TARGET_BYTE_SWAP         (1L<<2)
 #define BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP      (1L<<3)
@@ -6863,6 +6866,9 @@ struct bnx2 {
 
         u8                      num_tx_rings;
         u8                      num_rx_rings;
+
+        u32                     idle_chk_status_idx;
+
 };
 
 #define REG_RD(bp, offset)                                      \
diff --git a/drivers/net/chelsio/sge.c b/drivers/net/chelsio/sge.c
index d6c7d2aa761b..7092df50ff78 100644
--- a/drivers/net/chelsio/sge.c
+++ b/drivers/net/chelsio/sge.c
@@ -1035,10 +1035,6 @@ MODULE_PARM_DESC(copybreak, "Receive copy threshold");
  *      @pdev: the PCI device that received the packet
  *      @fl: the SGE free list holding the packet
  *      @len: the actual packet length, excluding any SGE padding
- *      @dma_pad: padding at beginning of buffer left by SGE DMA
- *      @skb_pad: padding to be used if the packet is copied
- *      @copy_thres: length threshold under which a packet should be copied
- *      @drop_thres: # of remaining buffers before we start dropping packets
  *
  *      Get the next packet from a free list and complete setup of the
  *      sk_buff.  If the packet is small we make a copy and recycle the
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index 523b9716a543..d115a6d30f29 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -1893,12 +1893,17 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
                 ctrl |= E1000_CTRL_PHY_RST;
         }
         ret_val = e1000_acquire_swflag_ich8lan(hw);
+        /* Whether or not the swflag was acquired, we need to reset the part */
         hw_dbg(hw, "Issuing a global reset to ich8lan");
         ew32(CTRL, (ctrl | E1000_CTRL_RST));
         msleep(20);
 
-        /* release the swflag because it is not reset by hardware reset */
-        e1000_release_swflag_ich8lan(hw);
+        if (!ret_val) {
+                /* release the swflag because it is not reset by
+                 * hardware reset
+                 */
+                e1000_release_swflag_ich8lan(hw);
+        }
 
         ret_val = e1000e_get_auto_rd_done(hw);
         if (ret_val) {
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index 91795f78c3e4..122539a0e1fe 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -345,7 +345,6 @@ no_buffers:
 /**
  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
  * @adapter: address of board private structure
- * @rx_ring: pointer to receive ring structure
  * @cleaned_count: number of buffers to allocate this pass
  **/
 
diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c
index e1b441effbbe..c414554ac321 100644
--- a/drivers/net/enc28j60.c
+++ b/drivers/net/enc28j60.c
@@ -568,6 +568,17 @@ static u16 erxrdpt_workaround(u16 next_packet_ptr, u16 start, u16 end)
         return erxrdpt;
 }
 
+/*
+ * Calculate wrap around when reading beyond the end of the RX buffer
+ */
+static u16 rx_packet_start(u16 ptr)
+{
+        if (ptr + RSV_SIZE > RXEND_INIT)
+                return (ptr + RSV_SIZE) - (RXEND_INIT - RXSTART_INIT + 1);
+        else
+                return ptr + RSV_SIZE;
+}
+
 static void nolock_rxfifo_init(struct enc28j60_net *priv, u16 start, u16 end)
 {
         u16 erxrdpt;
@@ -938,8 +949,9 @@ static void enc28j60_hw_rx(struct net_device *ndev)
                         skb->dev = ndev;
                         skb_reserve(skb, NET_IP_ALIGN);
                         /* copy the packet from the receive buffer */
-                        enc28j60_mem_read(priv, priv->next_pk_ptr + sizeof(rsv),
-                                        len, skb_put(skb, len));
+                        enc28j60_mem_read(priv,
+                                rx_packet_start(priv->next_pk_ptr),
+                                len, skb_put(skb, len));
                         if (netif_msg_pktdata(priv))
                                 dump_packet(__func__, skb->len, skb->data);
                         skb->protocol = eth_type_trans(skb, ndev);
diff --git a/drivers/net/hp-plus.c b/drivers/net/hp-plus.c
index fbbd3e660c27..c01e290d09d2 100644
--- a/drivers/net/hp-plus.c
+++ b/drivers/net/hp-plus.c
@@ -230,7 +230,7 @@ static int __init hpp_probe1(struct net_device *dev, int ioaddr)
         dev->open = &hpp_open;
         dev->stop = &hpp_close;
 #ifdef CONFIG_NET_POLL_CONTROLLER
-        dev->poll_controller = ei_poll;
+        dev->poll_controller = eip_poll;
 #endif
 
         ei_status.name = name;
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index 1cbae85b1426..20d27e622ec1 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -1980,7 +1980,6 @@ static void igb_configure_rx(struct igb_adapter *adapter)
 
 /**
  * igb_free_tx_resources - Free Tx Resources per Queue
- * @adapter: board private structure
  * @tx_ring: Tx descriptor ring for a specific queue
  *
  * Free all transmit software resources
@@ -2033,7 +2032,6 @@ static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
 
 /**
  * igb_clean_tx_ring - Free Tx Buffers
- * @adapter: board private structure
  * @tx_ring: ring to be cleaned
  **/
 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
@@ -2080,7 +2078,6 @@ static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
 
 /**
  * igb_free_rx_resources - Free Rx Resources
- * @adapter: board private structure
  * @rx_ring: ring to clean the resources from
  *
  * Free all receive software resources
@@ -2120,7 +2117,6 @@ static void igb_free_all_rx_resources(struct igb_adapter *adapter)
 
 /**
  * igb_clean_rx_ring - Free Rx Buffers per Queue
- * @adapter: board private structure
  * @rx_ring: ring to free buffers from
  **/
 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 8ed823ae639e..5236f633ee36 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -1320,7 +1320,6 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
  * ixgbe_intr - legacy mode Interrupt Handler
  * @irq: interrupt number
  * @data: pointer to a network interface device structure
- * @pt_regs: CPU registers structure
  **/
 static irqreturn_t ixgbe_intr(int irq, void *data)
 {
diff --git a/drivers/net/macvlan.c b/drivers/net/macvlan.c
index 42394505bb50..590039cbb146 100644
--- a/drivers/net/macvlan.c
+++ b/drivers/net/macvlan.c
@@ -70,6 +70,9 @@ static void macvlan_broadcast(struct sk_buff *skb,
         struct sk_buff *nskb;
         unsigned int i;
 
+        if (skb->protocol == htons(ETH_P_PAUSE))
+                return;
+
         for (i = 0; i < MACVLAN_HASH_SIZE; i++) {
                 hlist_for_each_entry_rcu(vlan, n, &port->vlan_hash[i], hlist) {
                         dev = vlan->dev;
diff --git a/drivers/net/netx-eth.c b/drivers/net/netx-eth.c
index b9bed82e1d21..b289a0a2b945 100644
--- a/drivers/net/netx-eth.c
+++ b/drivers/net/netx-eth.c
@@ -401,6 +401,8 @@ static int netx_eth_drv_probe(struct platform_device *pdev)
         priv->xmac_base = priv->xc->xmac_base;
         priv->sram_base = priv->xc->sram_base;
 
+        spin_lock_init(&priv->lock);
+
         ret = pfifo_request(PFIFO_MASK(priv->id));
         if (ret) {
                 printk("unable to request PFIFO\n");
diff --git a/drivers/net/pcmcia/axnet_cs.c b/drivers/net/pcmcia/axnet_cs.c
index b37a498939ae..0418045166c3 100644
--- a/drivers/net/pcmcia/axnet_cs.c
+++ b/drivers/net/pcmcia/axnet_cs.c
@@ -779,6 +779,7 @@ static struct pcmcia_device_id axnet_ids[] = {
         PCMCIA_DEVICE_PROD_ID12("IO DATA", "ETXPCM", 0x547e66dc, 0x233adac2),
         PCMCIA_DEVICE_PROD_ID12("Linksys", "EtherFast 10/100 PC Card (PCMPC100 V3)", 0x0733cc81, 0x232019a8),
         PCMCIA_DEVICE_PROD_ID12("MELCO", "LPC3-TX", 0x481e0094, 0xf91af609),
+        PCMCIA_DEVICE_PROD_ID12("NETGEAR", "FA411", 0x9aa79dc3, 0x40fad875),
         PCMCIA_DEVICE_PROD_ID12("PCMCIA", "100BASE", 0x281f1c5d, 0x7c2add04),
         PCMCIA_DEVICE_PROD_ID12("PCMCIA", "FastEtherCard", 0x281f1c5d, 0x7ef26116),
         PCMCIA_DEVICE_PROD_ID12("PCMCIA", "FEP501", 0x281f1c5d, 0x2e272058),
@@ -1174,7 +1175,6 @@ static int ei_start_xmit(struct sk_buff *skb, struct net_device *dev)
  * ax_interrupt - handle the interrupts from an 8390
  * @irq: interrupt number
  * @dev_id: a pointer to the net_device
- * @regs: unused
  *
  * Handle the ether interface interrupts. We pull packets from
  * the 8390 via the card specific functions and fire them at the networking
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c
index e40d6301aa7a..ce486f094492 100644
--- a/drivers/net/pcmcia/pcnet_cs.c
+++ b/drivers/net/pcmcia/pcnet_cs.c
@@ -1693,7 +1693,6 @@ static struct pcmcia_device_id pcnet_ids[] = {
         PCMCIA_DEVICE_PROD_ID12("National Semiconductor", "InfoMover NE4100", 0x36e1191f, 0xa6617ec8),
         PCMCIA_DEVICE_PROD_ID12("NEC", "PC-9801N-J12", 0x18df0ba0, 0xbc912d76),
         PCMCIA_DEVICE_PROD_ID12("NETGEAR", "FA410TX", 0x9aa79dc3, 0x60e5bc0e),
-        PCMCIA_DEVICE_PROD_ID12("NETGEAR", "FA411", 0x9aa79dc3, 0x40fad875),
         PCMCIA_DEVICE_PROD_ID12("Network Everywhere", "Fast Ethernet 10/100 PC Card", 0x820a67b6, 0x31ed1a5f),
         PCMCIA_DEVICE_PROD_ID12("NextCom K.K.", "Next Hawk", 0xaedaec74, 0xad050ef1),
         PCMCIA_DEVICE_PROD_ID12("PCMCIA", "10/100Mbps Ethernet Card", 0x281f1c5d, 0x6e41773b),
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index 55bc24b234e3..25acbbde4a60 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -227,8 +227,17 @@ struct phy_device * get_phy_device(struct mii_bus *bus, int addr)
         if (r)
                 return ERR_PTR(r);
 
-        /* If the phy_id is all Fs or all 0s, there is no device there */
-        if ((0xffff == phy_id) || (0x00 == phy_id))
+        /* If the phy_id is mostly Fs, there is no device there */
+        if ((phy_id & 0x1fffffff) == 0x1fffffff)
+                return NULL;
+
+        /*
+         * Broken hardware is sometimes missing the pull down resistor on the
+         * MDIO line, which results in reads to non-existent devices returning
+         * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
+         * device as well.
+         */
+        if (phy_id == 0)
                 return NULL;
 
         dev = phy_device_create(bus, addr, phy_id);
diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c
index 8874497b6bbf..dd3b2447e85a 100644
--- a/drivers/net/phy/vitesse.c
+++ b/drivers/net/phy/vitesse.c
@@ -34,6 +34,8 @@
 #define MII_VSC8244_IMASK_DUPLEX        0x1000
 #define MII_VSC8244_IMASK_MASK          0xf000
 
+#define MII_VSC8221_IMASK_MASK          0xa000
+
 /* Vitesse Interrupt Status Register */
 #define MII_VSC8244_ISTAT               0x1a
 #define MII_VSC8244_ISTAT_STATUS        0x8000
@@ -49,6 +51,12 @@
 #define MII_VSC8244_AUXCONSTAT_GBIT     0x0010
 #define MII_VSC8244_AUXCONSTAT_100      0x0008
 
+#define MII_VSC8221_AUXCONSTAT_INIT     0x0004 /* need to set this bit? */
+#define MII_VSC8221_AUXCONSTAT_RESERVED 0x0004
+
+#define PHY_ID_VSC8244                  0x000fc6c0
+#define PHY_ID_VSC8221                  0x000fc550
+
 MODULE_DESCRIPTION("Vitesse PHY driver");
 MODULE_AUTHOR("Kriston Carson");
 MODULE_LICENSE("GPL");
@@ -95,13 +103,15 @@ static int vsc824x_ack_interrupt(struct phy_device *phydev)
         return (err < 0) ? err : 0;
 }
 
-static int vsc824x_config_intr(struct phy_device *phydev)
+static int vsc82xx_config_intr(struct phy_device *phydev)
 {
         int err;
 
         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
                 err = phy_write(phydev, MII_VSC8244_IMASK,
-                                MII_VSC8244_IMASK_MASK);
+                        phydev->drv->phy_id == PHY_ID_VSC8244 ?
+                                MII_VSC8244_IMASK_MASK :
+                                MII_VSC8221_IMASK_MASK);
         else {
                 /*
                  * The Vitesse PHY cannot clear the interrupt
@@ -120,7 +130,7 @@ static int vsc824x_config_intr(struct phy_device *phydev)
 
 /* Vitesse 824x */
 static struct phy_driver vsc8244_driver = {
-        .phy_id         = 0x000fc6c0,
+        .phy_id         = PHY_ID_VSC8244,
         .name           = "Vitesse VSC8244",
         .phy_id_mask    = 0x000fffc0,
         .features       = PHY_GBIT_FEATURES,
@@ -129,19 +139,55 @@ static struct phy_driver vsc8244_driver = {
         .config_aneg    = &genphy_config_aneg,
         .read_status    = &genphy_read_status,
         .ack_interrupt  = &vsc824x_ack_interrupt,
-        .config_intr    = &vsc824x_config_intr,
+        .config_intr    = &vsc82xx_config_intr,
         .driver         = { .owner = THIS_MODULE,},
 };
 
-static int __init vsc8244_init(void)
+static int vsc8221_config_init(struct phy_device *phydev)
 {
-        return phy_driver_register(&vsc8244_driver);
+        int err;
+
+        err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
+                        MII_VSC8221_AUXCONSTAT_INIT);
+        return err;
+
+        /* Perhaps we should set EXT_CON1 based on the interface?
+           Options are 802.3Z SerDes or SGMII */
+}
+
+/* Vitesse 8221 */
+static struct phy_driver vsc8221_driver = {
+        .phy_id         = PHY_ID_VSC8221,
+        .phy_id_mask    = 0x000ffff0,
+        .name           = "Vitesse VSC8221",
+        .features       = PHY_GBIT_FEATURES,
+        .flags          = PHY_HAS_INTERRUPT,
+        .config_init    = &vsc8221_config_init,
+        .config_aneg    = &genphy_config_aneg,
+        .read_status    = &genphy_read_status,
+        .ack_interrupt  = &vsc824x_ack_interrupt,
+        .config_intr    = &vsc82xx_config_intr,
+        .driver         = { .owner = THIS_MODULE,},
+};
+
+static int __init vsc82xx_init(void)
+{
+        int err;
+
+        err = phy_driver_register(&vsc8244_driver);
+        if (err < 0)
+                return err;
+        err = phy_driver_register(&vsc8221_driver);
+        if (err < 0)
+                phy_driver_unregister(&vsc8244_driver);
+        return err;
 }
 
-static void __exit vsc8244_exit(void)
+static void __exit vsc82xx_exit(void)
 {
         phy_driver_unregister(&vsc8244_driver);
+        phy_driver_unregister(&vsc8221_driver);
 }
 
-module_init(vsc8244_init);
-module_exit(vsc8244_exit);
+module_init(vsc82xx_init);
+module_exit(vsc82xx_exit);
diff --git a/drivers/net/pppol2tp.c b/drivers/net/pppol2tp.c
index 185b1dff10a8..e98d9773158d 100644
--- a/drivers/net/pppol2tp.c
+++ b/drivers/net/pppol2tp.c
@@ -1353,6 +1353,7 @@ static int pppol2tp_release(struct socket *sock)
                         kfree_skb(skb);
                         sock_put(sk);
                 }
+                sock_put(sk);
         }
 
         release_sock(sk);
diff --git a/drivers/net/sis900.c b/drivers/net/sis900.c
index fa3a460f8e2f..8e8337e8b072 100644
--- a/drivers/net/sis900.c
+++ b/drivers/net/sis900.c
@@ -1630,7 +1630,6 @@ sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
  *      sis900_interrupt - sis900 interrupt handler
  *      @irq: the irq number
  *      @dev_instance: the client data object
- *      @regs: snapshot of processor context
  *
  *      The interrupt handler does all of the Rx thread work,
  *      and cleans up after the Tx thread
diff --git a/drivers/net/spider_net.c b/drivers/net/spider_net.c
index b6435d0d71f9..07599b492359 100644
--- a/drivers/net/spider_net.c
+++ b/drivers/net/spider_net.c
@@ -672,7 +672,6 @@ write_hash:
 /**
  * spider_net_prepare_tx_descr - fill tx descriptor with skb data
  * @card: card structure
- * @descr: descriptor structure to fill out
  * @skb: packet to use
  *
  * returns 0 on success, <0 on failure.
@@ -867,7 +866,6 @@ spider_net_release_tx_chain(struct spider_net_card *card, int brutal)
 /**
  * spider_net_kick_tx_dma - enables TX DMA processing
  * @card: card structure
- * @descr: descriptor address to enable TX processing at
  *
  * This routine will start the transmit DMA running if
  * it is not already running. This routine ned only be
@@ -1637,7 +1635,6 @@ spider_net_handle_error_irq(struct spider_net_card *card, u32 status_reg,
  * spider_net_interrupt - interrupt handler for spider_net
  * @irq: interrupt number
  * @ptr: pointer to net_device
- * @regs: PU registers
  *
  * returns IRQ_HANDLED, if interrupt was for driver, or IRQ_NONE, if no
  * interrupt found raised by card.
@@ -2419,7 +2416,6 @@ spider_net_undo_pci_setup(struct spider_net_card *card)
 
 /**
  * spider_net_setup_pci_dev - sets up the device in terms of PCI operations
- * @card: card structure
  * @pdev: PCI device
  *
  * Returns the card structure or NULL if any errors occur
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c
index 4291458955ef..fed7eba65ead 100644
--- a/drivers/net/sungem.c
+++ b/drivers/net/sungem.c
@@ -1142,6 +1142,70 @@ static int gem_start_xmit(struct sk_buff *skb, struct net_device *dev)
         return NETDEV_TX_OK;
 }
 
+static void gem_pcs_reset(struct gem *gp)
+{
+        int limit;
+        u32 val;
+
+        /* Reset PCS unit. */
+        val = readl(gp->regs + PCS_MIICTRL);
+        val |= PCS_MIICTRL_RST;
+        writel(val, gp->regs + PCS_MIICTRL);
+
+        limit = 32;
+        while (readl(gp->regs + PCS_MIICTRL) & PCS_MIICTRL_RST) {
+                udelay(100);
+                if (limit-- <= 0)
+                        break;
+        }
+        if (limit <= 0)
+                printk(KERN_WARNING "%s: PCS reset bit would not clear.\n",
+                       gp->dev->name);
+}
+
+static void gem_pcs_reinit_adv(struct gem *gp)
+{
+        u32 val;
+
+        /* Make sure PCS is disabled while changing advertisement
+         * configuration.
+         */
+        val = readl(gp->regs + PCS_CFG);
+        val &= ~(PCS_CFG_ENABLE | PCS_CFG_TO);
+        writel(val, gp->regs + PCS_CFG);
+
+        /* Advertise all capabilities except assymetric
+         * pause.
+         */
+        val = readl(gp->regs + PCS_MIIADV);
+        val |= (PCS_MIIADV_FD | PCS_MIIADV_HD |
+                PCS_MIIADV_SP | PCS_MIIADV_AP);
+        writel(val, gp->regs + PCS_MIIADV);
+
+        /* Enable and restart auto-negotiation, disable wrapback/loopback,
+         * and re-enable PCS.
+         */
+        val = readl(gp->regs + PCS_MIICTRL);
+        val |= (PCS_MIICTRL_RAN | PCS_MIICTRL_ANE);
+        val &= ~PCS_MIICTRL_WB;
+        writel(val, gp->regs + PCS_MIICTRL);
+
+        val = readl(gp->regs + PCS_CFG);
+        val |= PCS_CFG_ENABLE;
+        writel(val, gp->regs + PCS_CFG);
+
+        /* Make sure serialink loopback is off.  The meaning
+         * of this bit is logically inverted based upon whether
+         * you are in Serialink or SERDES mode.
+         */
+        val = readl(gp->regs + PCS_SCTRL);
+        if (gp->phy_type == phy_serialink)
+                val &= ~PCS_SCTRL_LOOP;
+        else
+                val |= PCS_SCTRL_LOOP;
+        writel(val, gp->regs + PCS_SCTRL);
+}
+
 #define STOP_TRIES 32
 
 /* Must be invoked under gp->lock and gp->tx_lock. */
@@ -1168,6 +1232,9 @@ static void gem_reset(struct gem *gp)
 
         if (limit <= 0)
                 printk(KERN_ERR "%s: SW reset is ghetto.\n", gp->dev->name);
+
+        if (gp->phy_type == phy_serialink || gp->phy_type == phy_serdes)
+                gem_pcs_reinit_adv(gp);
 }
 
 /* Must be invoked under gp->lock and gp->tx_lock. */
@@ -1324,7 +1391,7 @@ static int gem_set_link_modes(struct gem *gp)
                    gp->phy_type == phy_serdes) {
                 u32 pcs_lpa = readl(gp->regs + PCS_MIILP);
 
-                if (pcs_lpa & PCS_MIIADV_FD)
+                if ((pcs_lpa & PCS_MIIADV_FD) || gp->phy_type == phy_serdes)
                         full_duplex = 1;
                 speed = SPEED_1000;
         }
@@ -1488,6 +1555,9 @@ static void gem_link_timer(unsigned long data)
                         val = readl(gp->regs + PCS_MIISTAT);
 
                 if ((val & PCS_MIISTAT_LS) != 0) {
+                        if (gp->lstate == link_up)
+                                goto restart;
+
                         gp->lstate = link_up;
                         netif_carrier_on(gp->dev);
                         (void)gem_set_link_modes(gp);
@@ -1708,61 +1778,8 @@ static void gem_init_phy(struct gem *gp)
                 if (gp->phy_mii.def && gp->phy_mii.def->ops->init)
                         gp->phy_mii.def->ops->init(&gp->phy_mii);
         } else {
-                u32 val;
-                int limit;
-
-                /* Reset PCS unit. */
-                val = readl(gp->regs + PCS_MIICTRL);
-                val |= PCS_MIICTRL_RST;
-                writeb(val, gp->regs + PCS_MIICTRL);
-
-                limit = 32;
-                while (readl(gp->regs + PCS_MIICTRL) & PCS_MIICTRL_RST) {
-                        udelay(100);
-                        if (limit-- <= 0)
-                                break;
-                }
-                if (limit <= 0)
-                        printk(KERN_WARNING "%s: PCS reset bit would not clear.\n",
-                               gp->dev->name);
-
-                /* Make sure PCS is disabled while changing advertisement
-                 * configuration.
-                 */
-                val = readl(gp->regs + PCS_CFG);
-                val &= ~(PCS_CFG_ENABLE | PCS_CFG_TO);
-                writel(val, gp->regs + PCS_CFG);
-
-                /* Advertise all capabilities except assymetric
-                 * pause.
-                 */
-                val = readl(gp->regs + PCS_MIIADV);
-                val |= (PCS_MIIADV_FD | PCS_MIIADV_HD |
-                        PCS_MIIADV_SP | PCS_MIIADV_AP);
-                writel(val, gp->regs + PCS_MIIADV);
-
-                /* Enable and restart auto-negotiation, disable wrapback/loopback,
-                 * and re-enable PCS.
-                 */
-                val = readl(gp->regs + PCS_MIICTRL);
-                val |= (PCS_MIICTRL_RAN | PCS_MIICTRL_ANE);
-                val &= ~PCS_MIICTRL_WB;
-                writel(val, gp->regs + PCS_MIICTRL);
-
-                val = readl(gp->regs + PCS_CFG);
-                val |= PCS_CFG_ENABLE;
-                writel(val, gp->regs + PCS_CFG);
-
-                /* Make sure serialink loopback is off.  The meaning
-                 * of this bit is logically inverted based upon whether
-                 * you are in Serialink or SERDES mode.
-                 */
-                val = readl(gp->regs + PCS_SCTRL);
-                if (gp->phy_type == phy_serialink)
-                        val &= ~PCS_SCTRL_LOOP;
-                else
-                        val |= PCS_SCTRL_LOOP;
-                writel(val, gp->regs + PCS_SCTRL);
+                gem_pcs_reset(gp);
+                gem_pcs_reinit_adv(gp);
         }
 
         /* Default aneg parameters */
@@ -2680,6 +2697,21 @@ static int gem_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
                 cmd->speed = 0;
                 cmd->duplex = cmd->port = cmd->phy_address =
                         cmd->transceiver = cmd->autoneg = 0;
+
+                /* serdes means usually a Fibre connector, with most fixed */
+                if (gp->phy_type == phy_serdes) {
+                        cmd->port = PORT_FIBRE;
+                        cmd->supported = (SUPPORTED_1000baseT_Half |
+                                SUPPORTED_1000baseT_Full |
+                                SUPPORTED_FIBRE | SUPPORTED_Autoneg |
+                                SUPPORTED_Pause | SUPPORTED_Asym_Pause);
+                        cmd->advertising = cmd->supported;
+                        cmd->transceiver = XCVR_INTERNAL;
+                        if (gp->lstate == link_up)
+                                cmd->speed = SPEED_1000;
+                        cmd->duplex = DUPLEX_FULL;
+                        cmd->autoneg = 1;
+                }
         }
         cmd->maxtxpkt = cmd->maxrxpkt = 0;
 
diff --git a/drivers/net/wireless/ath5k/base.c b/drivers/net/wireless/ath5k/base.c
index cfd4d052d666..2d14255eb103 100644
--- a/drivers/net/wireless/ath5k/base.c
+++ b/drivers/net/wireless/ath5k/base.c
@@ -240,6 +240,10 @@ static u64 ath5k_get_tsf(struct ieee80211_hw *hw);
 static void ath5k_reset_tsf(struct ieee80211_hw *hw);
 static int ath5k_beacon_update(struct ieee80211_hw *hw,
                 struct sk_buff *skb);
+static void ath5k_bss_info_changed(struct ieee80211_hw *hw,
+                struct ieee80211_vif *vif,
+                struct ieee80211_bss_conf *bss_conf,
+                u32 changes);
 
 static struct ieee80211_ops ath5k_hw_ops = {
         .tx             = ath5k_tx,
@@ -256,6 +260,7 @@ static struct ieee80211_ops ath5k_hw_ops = {
         .get_tx_stats   = ath5k_get_tx_stats,
         .get_tsf        = ath5k_get_tsf,
         .reset_tsf      = ath5k_reset_tsf,
+        .bss_info_changed = ath5k_bss_info_changed,
 };
 
 /*
@@ -2942,7 +2947,7 @@ static void ath5k_configure_filter(struct ieee80211_hw *hw,
                 sc->opmode != NL80211_IFTYPE_MESH_POINT &&
                 test_bit(ATH_STAT_PROMISC, sc->status))
                 rfilt |= AR5K_RX_FILTER_PROM;
-        if (sc->opmode == NL80211_IFTYPE_STATION ||
+        if ((sc->opmode == NL80211_IFTYPE_STATION && sc->assoc) ||
                 sc->opmode == NL80211_IFTYPE_ADHOC) {
                 rfilt |= AR5K_RX_FILTER_BEACON;
         }
@@ -3083,4 +3088,32 @@ ath5k_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
 end:
         return ret;
 }
+static void
+set_beacon_filter(struct ieee80211_hw *hw, bool enable)
+{
+        struct ath5k_softc *sc = hw->priv;
+        struct ath5k_hw *ah = sc->ah;
+        u32 rfilt;
+        rfilt = ath5k_hw_get_rx_filter(ah);
+        if (enable)
+                rfilt |= AR5K_RX_FILTER_BEACON;
+        else
+                rfilt &= ~AR5K_RX_FILTER_BEACON;
+        ath5k_hw_set_rx_filter(ah, rfilt);
+        sc->filter_flags = rfilt;
+}
 
+static void ath5k_bss_info_changed(struct ieee80211_hw *hw,
+                                    struct ieee80211_vif *vif,
+                                    struct ieee80211_bss_conf *bss_conf,
+                                    u32 changes)
+{
+        struct ath5k_softc *sc = hw->priv;
+        if (changes & BSS_CHANGED_ASSOC) {
+                mutex_lock(&sc->lock);
+                sc->assoc = bss_conf->assoc;
+                if (sc->opmode == NL80211_IFTYPE_STATION)
+                        set_beacon_filter(hw, sc->assoc);
+                mutex_unlock(&sc->lock);
+        }
+}
diff --git a/drivers/net/wireless/ath5k/base.h b/drivers/net/wireless/ath5k/base.h
index 06d1054ca94b..facc60ddada2 100644
--- a/drivers/net/wireless/ath5k/base.h
+++ b/drivers/net/wireless/ath5k/base.h
@@ -179,6 +179,7 @@ struct ath5k_softc {
 
         struct timer_list       calib_tim;      /* calibration timer */
         int                     power_level;    /* Requested tx power in dbm */
+        bool                    assoc;          /* assocate state */
 };
 
 #define ath5k_hw_hasbssidmask(_ah) \
diff --git a/drivers/net/wireless/ath5k/debug.c b/drivers/net/wireless/ath5k/debug.c
index 19980cbd5d5f..ccaeb5c219d2 100644
--- a/drivers/net/wireless/ath5k/debug.c
+++ b/drivers/net/wireless/ath5k/debug.c
@@ -417,19 +417,19 @@ ath5k_debug_init_device(struct ath5k_softc *sc)
         sc->debug.debugfs_phydir = debugfs_create_dir(wiphy_name(sc->hw->wiphy),
                                 ath5k_global_debugfs);
 
-        sc->debug.debugfs_debug = debugfs_create_file("debug", 0666,
+        sc->debug.debugfs_debug = debugfs_create_file("debug", S_IWUSR | S_IRUGO,
                                 sc->debug.debugfs_phydir, sc, &fops_debug);
 
-        sc->debug.debugfs_registers = debugfs_create_file("registers", 0444,
+        sc->debug.debugfs_registers = debugfs_create_file("registers", S_IRUGO,
                                 sc->debug.debugfs_phydir, sc, &fops_registers);
 
-        sc->debug.debugfs_tsf = debugfs_create_file("tsf", 0666,
+        sc->debug.debugfs_tsf = debugfs_create_file("tsf", S_IWUSR | S_IRUGO,
                                 sc->debug.debugfs_phydir, sc, &fops_tsf);
 
-        sc->debug.debugfs_beacon = debugfs_create_file("beacon", 0666,
+        sc->debug.debugfs_beacon = debugfs_create_file("beacon", S_IWUSR | S_IRUGO,
                                 sc->debug.debugfs_phydir, sc, &fops_beacon);
 
-        sc->debug.debugfs_reset = debugfs_create_file("reset", 0222,
+        sc->debug.debugfs_reset = debugfs_create_file("reset", S_IWUSR,
                                 sc->debug.debugfs_phydir, sc, &fops_reset);
 }
 
diff --git a/drivers/net/wireless/ath9k/beacon.c b/drivers/net/wireless/ath9k/beacon.c
index 9e15c30bbc06..4dd1c1bda0fb 100644
--- a/drivers/net/wireless/ath9k/beacon.c
+++ b/drivers/net/wireless/ath9k/beacon.c
@@ -170,7 +170,7 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
         skb = (struct sk_buff *)bf->bf_mpdu;
         if (skb) {
                 pci_unmap_single(sc->pdev, bf->bf_dmacontext,
-                                 skb_end_pointer(skb) - skb->head,
+                                 skb->len,
                                  PCI_DMA_TODEVICE);
         }
 
@@ -193,7 +193,7 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
 
         bf->bf_buf_addr = bf->bf_dmacontext =
                 pci_map_single(sc->pdev, skb->data,
-                               skb_end_pointer(skb) - skb->head,
+                               skb->len,
                                PCI_DMA_TODEVICE);
 
         skb = ieee80211_get_buffered_bc(sc->hw, avp->av_if_data);
@@ -352,7 +352,7 @@ int ath_beacon_alloc(struct ath_softc *sc, int if_id)
         if (bf->bf_mpdu != NULL) {
                 skb = (struct sk_buff *)bf->bf_mpdu;
                 pci_unmap_single(sc->pdev, bf->bf_dmacontext,
-                                 skb_end_pointer(skb) - skb->head,
+                                 skb->len,
                                  PCI_DMA_TODEVICE);
                 dev_kfree_skb_any(skb);
                 bf->bf_mpdu = NULL;
@@ -412,7 +412,7 @@ int ath_beacon_alloc(struct ath_softc *sc, int if_id)
 
         bf->bf_buf_addr = bf->bf_dmacontext =
                 pci_map_single(sc->pdev, skb->data,
-                               skb_end_pointer(skb) - skb->head,
+                               skb->len,
                                PCI_DMA_TODEVICE);
         bf->bf_mpdu = skb;
 
@@ -439,7 +439,7 @@ void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp)
                 if (bf->bf_mpdu != NULL) {
                         struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
                         pci_unmap_single(sc->pdev, bf->bf_dmacontext,
-                                         skb_end_pointer(skb) - skb->head,
+                                         skb->len,
                                          PCI_DMA_TODEVICE);
                         dev_kfree_skb_any(skb);
                         bf->bf_mpdu = NULL;
diff --git a/drivers/net/wireless/ath9k/recv.c b/drivers/net/wireless/ath9k/recv.c
index 4983402af559..504a0444d89f 100644
--- a/drivers/net/wireless/ath9k/recv.c
+++ b/drivers/net/wireless/ath9k/recv.c
@@ -49,10 +49,12 @@ static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
         ASSERT(skb != NULL);
         ds->ds_vdata = skb->data;
 
-        /* setup rx descriptors */
+        /* setup rx descriptors. The sc_rxbufsize here tells the harware
+         * how much data it can DMA to us and that we are prepared
+         * to process */
         ath9k_hw_setuprxdesc(ah,
                              ds,
-                             skb_tailroom(skb),   /* buffer size */
+                             sc->sc_rxbufsize,
                              0);
 
         if (sc->sc_rxlink == NULL)
@@ -398,6 +400,13 @@ static struct sk_buff *ath_rxbuf_alloc(struct ath_softc *sc,
          * in rx'd frames.
          */
 
+        /* Note: the kernel can allocate a value greater than
+         * what we ask it to give us. We really only need 4 KB as that
+         * is this hardware supports and in fact we need at least 3849
+         * as that is the MAX AMSDU size this hardware supports.
+         * Unfortunately this means we may get 8 KB here from the
+         * kernel... and that is actually what is observed on some
+         * systems :( */
         skb = dev_alloc_skb(len + sc->sc_cachelsz - 1);
         if (skb != NULL) {
                 off = ((unsigned long) skb->data) % sc->sc_cachelsz;
@@ -456,7 +465,7 @@ static int ath_rx_indicate(struct ath_softc *sc,
         if (nskb != NULL) {
                 bf->bf_mpdu = nskb;
                 bf->bf_buf_addr = pci_map_single(sc->pdev, nskb->data,
-                                         skb_end_pointer(nskb) - nskb->head,
+                                         sc->sc_rxbufsize,
                                          PCI_DMA_FROMDEVICE);
                 bf->bf_dmacontext = bf->bf_buf_addr;
                 ATH_RX_CONTEXT(nskb)->ctx_rxbuf = bf;
@@ -542,7 +551,7 @@ int ath_rx_init(struct ath_softc *sc, int nbufs)
 
                         bf->bf_mpdu = skb;
                         bf->bf_buf_addr = pci_map_single(sc->pdev, skb->data,
-                                         skb_end_pointer(skb) - skb->head,
+                                         sc->sc_rxbufsize,
                                          PCI_DMA_FROMDEVICE);
                         bf->bf_dmacontext = bf->bf_buf_addr;
                         ATH_RX_CONTEXT(skb)->ctx_rxbuf = bf;
@@ -1007,7 +1016,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
 
                 pci_dma_sync_single_for_cpu(sc->pdev,
                                             bf->bf_buf_addr,
-                                            skb_tailroom(skb),
+                                            sc->sc_rxbufsize,
                                             PCI_DMA_FROMDEVICE);
                 pci_unmap_single(sc->pdev,
                                  bf->bf_buf_addr,
diff --git a/drivers/net/wireless/ipw2200.c b/drivers/net/wireless/ipw2200.c
index dcce3542d5a7..7a9f901d4ff6 100644
--- a/drivers/net/wireless/ipw2200.c
+++ b/drivers/net/wireless/ipw2200.c
@@ -3897,6 +3897,7 @@ static int ipw_disassociate(void *data)
         if (!(priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)))
                 return 0;
         ipw_send_disassociate(data, 0);
+        netif_carrier_off(priv->net_dev);
         return 1;
 }
 
@@ -10190,6 +10191,9 @@ static int ipw_tx_skb(struct ipw_priv *priv, struct ieee80211_txb *txb,
         u16 remaining_bytes;
         int fc;
 
+        if (!(priv->status & STATUS_ASSOCIATED))
+                goto drop;
+
         hdr_len = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
         switch (priv->ieee->iw_mode) {
         case IW_MODE_ADHOC:
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index 444c5cc05f03..c4c0371c763b 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -1384,9 +1384,11 @@ void iwl_rx_handle(struct iwl_priv *priv)
 
                 rxq->queue[i] = NULL;
 
-                pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->aligned_dma_addr,
-                                            priv->hw_params.rx_buf_size,
-                                            PCI_DMA_FROMDEVICE);
+                dma_sync_single_range_for_cpu(
+                                &priv->pci_dev->dev, rxb->real_dma_addr,
+                                rxb->aligned_dma_addr - rxb->real_dma_addr,
+                                priv->hw_params.rx_buf_size,
+                                PCI_DMA_FROMDEVICE);
                 pkt = (struct iwl_rx_packet *)rxb->skb->data;
 
                 /* Reclaim a command buffer only if this packet is a response
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c
index 4c312c55f90c..01a845851338 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.c
+++ b/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -290,6 +290,9 @@ void iwl_clear_stations_table(struct iwl_priv *priv)
         priv->num_stations = 0;
         memset(priv->stations, 0, sizeof(priv->stations));
 
+        /* clean ucode key table bit map */
+        priv->ucode_key_table = 0;
+
         spin_unlock_irqrestore(&priv->sta_lock, flags);
 }
 EXPORT_SYMBOL(iwl_clear_stations_table);
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c
index 61797f3f8d5c..26f7084d3011 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.c
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.c
@@ -475,7 +475,7 @@ static int iwl_get_free_ucode_key_index(struct iwl_priv *priv)
                 if (!test_and_set_bit(i, &priv->ucode_key_table))
                         return i;
 
-        return -1;
+        return WEP_INVALID_OFFSET;
 }
 
 int iwl_send_static_wepkey_cmd(struct iwl_priv *priv, u8 send_if_empty)
@@ -620,6 +620,9 @@ static int iwl_set_wep_dynamic_key_info(struct iwl_priv *priv,
         /* else, we are overriding an existing key => no need to allocated room
          * in uCode. */
 
+        WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
+                "no space for new kew");
+
         priv->stations[sta_id].sta.key.key_flags = key_flags;
         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
@@ -637,6 +640,7 @@ static int iwl_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
 {
         unsigned long flags;
         __le16 key_flags = 0;
+        int ret;
 
         key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
         key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
@@ -664,14 +668,18 @@ static int iwl_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
         /* else, we are overriding an existing key => no need to allocated room
          * in uCode. */
 
+        WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
+                "no space for new kew");
+
         priv->stations[sta_id].sta.key.key_flags = key_flags;
         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
 
+        ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
+
         spin_unlock_irqrestore(&priv->sta_lock, flags);
 
-        IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
-        return iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
+        return ret;
 }
 
 static int iwl_set_tkip_dynamic_key_info(struct iwl_priv *priv,
@@ -696,6 +704,9 @@ static int iwl_set_tkip_dynamic_key_info(struct iwl_priv *priv,
         /* else, we are overriding an existing key => no need to allocated room
          * in uCode. */
 
+        WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
+                "no space for new kew");
+
         /* This copy is acutally not needed: we get the key with each TX */
         memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16);
 
@@ -734,6 +745,13 @@ int iwl_remove_dynamic_key(struct iwl_priv *priv,
                 return 0;
         }
 
+        if (priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET) {
+                IWL_WARNING("Removing wrong key %d 0x%x\n",
+                            keyconf->keyidx, key_flags);
+                spin_unlock_irqrestore(&priv->sta_lock, flags);
+                return 0;
+        }
+
         if (!test_and_clear_bit(priv->stations[sta_id].sta.key.key_offset,
                 &priv->ucode_key_table))
                 IWL_ERROR("index %d not used in uCode key table.\n",
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.c b/drivers/net/wireless/zd1211rw/zd_mac.c
index fe1867b25ff7..cac732f4047f 100644
--- a/drivers/net/wireless/zd1211rw/zd_mac.c
+++ b/drivers/net/wireless/zd1211rw/zd_mac.c
@@ -615,7 +615,7 @@ static int filter_ack(struct ieee80211_hw *hw, struct ieee80211_hdr *rx_hdr,
                 struct ieee80211_hdr *tx_hdr;
 
                 tx_hdr = (struct ieee80211_hdr *)skb->data;
-                if (likely(!compare_ether_addr(tx_hdr->addr2, rx_hdr->addr1)))
+                if (likely(!memcmp(tx_hdr->addr2, rx_hdr->addr1, ETH_ALEN)))
                 {
                         __skb_unlink(skb, q);
                         tx_status(hw, skb, IEEE80211_TX_STAT_ACK, stats->signal, 1);
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 8f63f4c6b85f..9aad608bcf3f 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -16,6 +16,7 @@
 #include <linux/pm.h>
 #include <linux/init.h>
 #include <linux/slab.h>
+#include <linux/jiffies.h>
 #include <linux/pci-aspm.h>
 #include "../pci.h"
 
@@ -161,11 +162,12 @@ static void pcie_check_clock_pm(struct pci_dev *pdev)
  */
 static void pcie_aspm_configure_common_clock(struct pci_dev *pdev)
 {
-        int pos, child_pos;
+        int pos, child_pos, i = 0;
         u16 reg16 = 0;
         struct pci_dev *child_dev;
         int same_clock = 1;
-
+        unsigned long start_jiffies;
+        u16 child_regs[8], parent_reg;
         /*
          * all functions of a slot should have the same Slot Clock
          * Configuration, so just check one function
@@ -191,16 +193,19 @@ static void pcie_aspm_configure_common_clock(struct pci_dev *pdev)
                 child_pos = pci_find_capability(child_dev, PCI_CAP_ID_EXP);
                 pci_read_config_word(child_dev, child_pos + PCI_EXP_LNKCTL,
                         &reg16);
+                child_regs[i] = reg16;
                 if (same_clock)
                         reg16 |= PCI_EXP_LNKCTL_CCC;
                 else
                         reg16 &= ~PCI_EXP_LNKCTL_CCC;
                 pci_write_config_word(child_dev, child_pos + PCI_EXP_LNKCTL,
                         reg16);
+                i++;
         }
 
         /* Configure upstream component */
         pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
+        parent_reg = reg16;
         if (same_clock)
                 reg16 |= PCI_EXP_LNKCTL_CCC;
         else
@@ -212,12 +217,30 @@ static void pcie_aspm_configure_common_clock(struct pci_dev *pdev)
         pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
 
         /* Wait for link training end */
-        while (1) {
+        /* break out after waiting for 1 second */
+        start_jiffies = jiffies;
+        while ((jiffies - start_jiffies) < HZ) {
                 pci_read_config_word(pdev, pos + PCI_EXP_LNKSTA, &reg16);
                 if (!(reg16 & PCI_EXP_LNKSTA_LT))
                         break;
                 cpu_relax();
         }
+        /* training failed -> recover */
+        if ((jiffies - start_jiffies) >= HZ) {
+                dev_printk (KERN_ERR, &pdev->dev, "ASPM: Could not configure"
+                            " common clock\n");
+                i = 0;
+                list_for_each_entry(child_dev, &pdev->subordinate->devices,
+                                    bus_list) {
+                        child_pos = pci_find_capability(child_dev,
+                                                        PCI_CAP_ID_EXP);
+                        pci_write_config_word(child_dev,
+                                              child_pos + PCI_EXP_LNKCTL,
+                                              child_regs[i]);
+                        i++;
+                }
+                pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, parent_reg);
+        }
 }
 
 /*
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 5049a47030ac..5f4f85f56cb7 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -22,6 +22,7 @@
 #include <linux/delay.h>
 #include <linux/acpi.h>
 #include <linux/kallsyms.h>
+#include <linux/dmi.h>
 #include "pci.h"
 
 int isa_dma_bridge_buggy;
@@ -1828,6 +1829,22 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS,
                          PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB,
                          ht_enable_msi_mapping);
 
+/* The P5N32-SLI Premium motherboard from Asus has a problem with msi
+ * for the MCP55 NIC. It is not yet determined whether the msi problem
+ * also affects other devices. As for now, turn off msi for this device.
+ */
+static void __devinit nvenet_msi_disable(struct pci_dev *dev)
+{
+        if (dmi_name_in_vendors("P5N32-SLI PREMIUM")) {
+                dev_info(&dev->dev,
+                         "Disabling msi for MCP55 NIC on P5N32-SLI Premium\n");
+                dev->no_msi = 1;
+        }
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
+                        PCI_DEVICE_ID_NVIDIA_NVENET_15,
+                        nvenet_msi_disable);
+
 static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev)
 {
         struct pci_dev *host_bridge;
diff --git a/drivers/pci/slot.c b/drivers/pci/slot.c
index 4dd1c3e157ae..5a8ccb4f604d 100644
--- a/drivers/pci/slot.c
+++ b/drivers/pci/slot.c
@@ -253,6 +253,7 @@ placeholder:
                  __func__, pci_domain_nr(parent), parent->number, slot_nr);
 
 out:
+        kfree(slot_name);
         up_write(&pci_bus_sem);
         return slot;
 err:
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index 222904411a13..276473543982 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -217,7 +217,7 @@ config PCMCIA_PXA2XX
         depends on ARM && ARCH_PXA && PCMCIA
         depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \
                     || MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \
-                    || ARCH_VIPER)
+                    || ARCH_VIPER || ARCH_PXA_ESERIES)
         help
           Say Y here to include support for the PXA2xx PCMCIA controller
 
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
index 238629ad7f7c..bbac46327227 100644
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -72,5 +72,6 @@ pxa2xx-obj-$(CONFIG_ARCH_VIPER)			+= pxa2xx_viper.o
 pxa2xx-obj-$(CONFIG_TRIZEPS_PCMCIA)             += pxa2xx_trizeps4.o
 pxa2xx-obj-$(CONFIG_MACH_PALMTX)                += pxa2xx_palmtx.o
 pxa2xx-obj-$(CONFIG_MACH_PALMLD)                += pxa2xx_palmld.o
+pxa2xx-obj-$(CONFIG_MACH_E740)                  += pxa2xx_e740.o
 
 obj-$(CONFIG_PCMCIA_PXA2XX)                     += pxa2xx_core.o $(pxa2xx-obj-y)
diff --git a/drivers/pcmcia/bfin_cf_pcmcia.c b/drivers/pcmcia/bfin_cf_pcmcia.c
index bb7338863fb9..b59d4115d20f 100644
--- a/drivers/pcmcia/bfin_cf_pcmcia.c
+++ b/drivers/pcmcia/bfin_cf_pcmcia.c
@@ -334,6 +334,6 @@ static void __exit bfin_cf_exit(void)
 module_init(bfin_cf_init);
 module_exit(bfin_cf_exit);
 
-MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>")
+MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
 MODULE_DESCRIPTION("BFIN CF/PCMCIA Driver");
 MODULE_LICENSE("GPL");
diff --git a/drivers/pcmcia/pxa2xx_e740.c b/drivers/pcmcia/pxa2xx_e740.c
new file mode 100644
index 000000000000..f663a011bf4a
--- /dev/null
+++ b/drivers/pcmcia/pxa2xx_e740.c
@@ -0,0 +1,176 @@
+/*
+ * Toshiba e740 PCMCIA specific routines.
+ *
+ * (c) 2004 Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
+#include <mach/eseries-gpio.h>
+
+#include <asm/irq.h>
+#include <asm/mach-types.h>
+
+#include "soc_common.h"
+
+static struct pcmcia_irqs cd_irqs[] = {
+        {
+                .sock = 0,
+                .irq  = IRQ_GPIO(GPIO_E740_PCMCIA_CD0),
+                .str  = "CF card detect"
+        },
+        {
+                .sock = 1,
+                .irq  = IRQ_GPIO(GPIO_E740_PCMCIA_CD1),
+                .str  = "Wifi switch"
+        },
+};
+
+static int e740_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
+{
+        skt->irq = skt->nr == 0 ? IRQ_GPIO(GPIO_E740_PCMCIA_RDY0) :
+                                IRQ_GPIO(GPIO_E740_PCMCIA_RDY1);
+
+        return soc_pcmcia_request_irqs(skt, &cd_irqs[skt->nr], 1);
+}
+
+/*
+ * Release all resources.
+ */
+static void e740_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
+{
+        soc_pcmcia_free_irqs(skt, &cd_irqs[skt->nr], 1);
+}
+
+static void e740_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
+                                        struct pcmcia_state *state)
+{
+        if (skt->nr == 0) {
+                state->detect = gpio_get_value(GPIO_E740_PCMCIA_CD0) ? 0 : 1;
+                state->ready  = gpio_get_value(GPIO_E740_PCMCIA_RDY0) ? 1 : 0;
+        } else {
+                state->detect = gpio_get_value(GPIO_E740_PCMCIA_CD1) ? 0 : 1;
+                state->ready  = gpio_get_value(GPIO_E740_PCMCIA_RDY1) ? 1 : 0;
+        }
+
+        state->vs_3v  = 1;
+        state->bvd1   = 1;
+        state->bvd2   = 1;
+        state->wrprot = 0;
+        state->vs_Xv  = 0;
+}
+
+static int e740_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
+                                        const socket_state_t *state)
+{
+        if (state->flags & SS_RESET) {
+                if (skt->nr == 0)
+                        gpio_set_value(GPIO_E740_PCMCIA_RST0, 1);
+                else
+                        gpio_set_value(GPIO_E740_PCMCIA_RST1, 1);
+        } else {
+                if (skt->nr == 0)
+                        gpio_set_value(GPIO_E740_PCMCIA_RST0, 0);
+                else
+                        gpio_set_value(GPIO_E740_PCMCIA_RST1, 0);
+        }
+
+        switch (state->Vcc) {
+        case 0: /* Socket off */
+                if (skt->nr == 0)
+                        gpio_set_value(GPIO_E740_PCMCIA_PWR0, 0);
+                else
+                        gpio_set_value(GPIO_E740_PCMCIA_PWR1, 1);
+                break;
+        case 50:
+        case 33: /* socket on */
+                if (skt->nr == 0)
+                        gpio_set_value(GPIO_E740_PCMCIA_PWR0, 1);
+                else
+                        gpio_set_value(GPIO_E740_PCMCIA_PWR1, 0);
+                break;
+        default:
+                printk(KERN_ERR "e740_cs: Unsupported Vcc: %d\n", state->Vcc);
+        }
+
+        return 0;
+}
+
+/*
+ * Enable card status IRQs on (re-)initialisation.  This can
+ * be called at initialisation, power management event, or
+ * pcmcia event.
+ */
+static void e740_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
+{
+        soc_pcmcia_enable_irqs(skt, cd_irqs, ARRAY_SIZE(cd_irqs));
+}
+
+/*
+ * Disable card status IRQs on suspend.
+ */
+static void e740_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
+{
+        soc_pcmcia_disable_irqs(skt, cd_irqs, ARRAY_SIZE(cd_irqs));
+}
+
+static struct pcmcia_low_level e740_pcmcia_ops = {
+        .owner            = THIS_MODULE,
+        .hw_init          = e740_pcmcia_hw_init,
+        .hw_shutdown      = e740_pcmcia_hw_shutdown,
+        .socket_state     = e740_pcmcia_socket_state,
+        .configure_socket = e740_pcmcia_configure_socket,
+        .socket_init      = e740_pcmcia_socket_init,
+        .socket_suspend   = e740_pcmcia_socket_suspend,
+        .nr               = 2,
+};
+
+static struct platform_device *e740_pcmcia_device;
+
+static int __init e740_pcmcia_init(void)
+{
+        int ret;
+
+        if (!machine_is_e740())
+                return -ENODEV;
+
+        e740_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
+        if (!e740_pcmcia_device)
+                return -ENOMEM;
+
+        ret = platform_device_add_data(e740_pcmcia_device, &e740_pcmcia_ops,
+                                        sizeof(e740_pcmcia_ops));
+
+        if (!ret)
+                ret = platform_device_add(e740_pcmcia_device);
+
+        if (ret)
+                platform_device_put(e740_pcmcia_device);
+
+        return ret;
+}
+
+static void __exit e740_pcmcia_exit(void)
+{
+        platform_device_unregister(e740_pcmcia_device);
+}
+
+module_init(e740_pcmcia_init);
+module_exit(e740_pcmcia_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_ALIAS("platform:pxa2xx-pcmcia");
+MODULE_DESCRIPTION("e740 PCMCIA platform support");
diff --git a/drivers/rtc/rtc-ds1672.c b/drivers/rtc/rtc-ds1672.c
index 341d7a5b45a2..4e91419e8911 100644
--- a/drivers/rtc/rtc-ds1672.c
+++ b/drivers/rtc/rtc-ds1672.c
@@ -209,12 +209,18 @@ static int ds1672_probe(struct i2c_client *client,
         return err;
 }
 
+static struct i2c_device_id ds1672_id[] = {
+        { "ds1672", 0 },
+        { }
+};
+
 static struct i2c_driver ds1672_driver = {
         .driver = {
                    .name = "rtc-ds1672",
                    },
         .probe = &ds1672_probe,
         .remove = &ds1672_remove,
+        .id_table = ds1672_id,
 };
 
 static int __init ds1672_init(void)
diff --git a/drivers/rtc/rtc-max6900.c b/drivers/rtc/rtc-max6900.c
index 80782798763f..a4f6665ab3c5 100644
--- a/drivers/rtc/rtc-max6900.c
+++ b/drivers/rtc/rtc-max6900.c
@@ -247,12 +247,18 @@ max6900_probe(struct i2c_client *client, const struct i2c_device_id *id)
         return 0;
 }
 
+static struct i2c_device_id max6900_id[] = {
+        { "max6900", 0 },
+        { }
+};
+
 static struct i2c_driver max6900_driver = {
         .driver = {
                    .name = "rtc-max6900",
                    },
         .probe = max6900_probe,
         .remove = max6900_remove,
+        .id_table = max6900_id,
 };
 
 static int __init max6900_init(void)
diff --git a/drivers/rtc/rtc-starfire.c b/drivers/rtc/rtc-starfire.c
index 7ccb0dd700af..5be98bfd7ed3 100644
--- a/drivers/rtc/rtc-starfire.c
+++ b/drivers/rtc/rtc-starfire.c
@@ -6,7 +6,6 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/time.h>
 #include <linux/rtc.h>
 #include <linux/platform_device.h>
 
@@ -16,11 +15,6 @@ MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
 MODULE_DESCRIPTION("Starfire RTC driver");
 MODULE_LICENSE("GPL");
 
-struct starfire_rtc {
-        struct rtc_device       *rtc;
-        spinlock_t              lock;
-};
-
 static u32 starfire_get_time(void)
 {
         static char obp_gettod[32];
@@ -35,64 +29,31 @@ static u32 starfire_get_time(void)
 
 static int starfire_read_time(struct device *dev, struct rtc_time *tm)
 {
-        struct starfire_rtc *p = dev_get_drvdata(dev);
-        unsigned long flags, secs;
-
-        spin_lock_irqsave(&p->lock, flags);
-        secs = starfire_get_time();
-        spin_unlock_irqrestore(&p->lock, flags);
-
-        rtc_time_to_tm(secs, tm);
-
-        return 0;
-}
-
-static int starfire_set_time(struct device *dev, struct rtc_time *tm)
-{
-        unsigned long secs;
-        int err;
-
-        err = rtc_tm_to_time(tm, &secs);
-        if (err)
-                return err;
-
-        /* Do nothing, time is set using the service processor
-         * console on this platform.
-         */
-        return 0;
+        rtc_time_to_tm(starfire_get_time(), tm);
+        return rtc_valid_tm(tm);
 }
 
 static const struct rtc_class_ops starfire_rtc_ops = {
         .read_time      = starfire_read_time,
-        .set_time       = starfire_set_time,
 };
 
-static int __devinit starfire_rtc_probe(struct platform_device *pdev)
+static int __init starfire_rtc_probe(struct platform_device *pdev)
 {
-        struct starfire_rtc *p = kzalloc(sizeof(*p), GFP_KERNEL);
-
-        if (!p)
-                return -ENOMEM;
+        struct rtc_device *rtc = rtc_device_register("starfire", &pdev->dev,
+                                     &starfire_rtc_ops, THIS_MODULE);
+        if (IS_ERR(rtc))
+                return PTR_ERR(rtc);
 
-        spin_lock_init(&p->lock);
+        platform_set_drvdata(pdev, rtc);
 
-        p->rtc = rtc_device_register("starfire", &pdev->dev,
-                                     &starfire_rtc_ops, THIS_MODULE);
-        if (IS_ERR(p->rtc)) {
-                int err = PTR_ERR(p->rtc);
-                kfree(p);
-                return err;
-        }
-        platform_set_drvdata(pdev, p);
         return 0;
 }
 
-static int __devexit starfire_rtc_remove(struct platform_device *pdev)
+static int __exit starfire_rtc_remove(struct platform_device *pdev)
 {
-        struct starfire_rtc *p = platform_get_drvdata(pdev);
+        struct rtc_device *rtc = platform_get_drvdata(pdev);
 
-        rtc_device_unregister(p->rtc);
-        kfree(p);
+        rtc_device_unregister(rtc);
 
         return 0;
 }
@@ -102,13 +63,12 @@ static struct platform_driver starfire_rtc_driver = {
                 .name   = "rtc-starfire",
                 .owner  = THIS_MODULE,
         },
-        .probe          = starfire_rtc_probe,
-        .remove         = __devexit_p(starfire_rtc_remove),
+        .remove         = __exit_p(starfire_rtc_remove),
 };
 
 static int __init starfire_rtc_init(void)
 {
-        return platform_driver_register(&starfire_rtc_driver);
+        return platform_driver_probe(&starfire_rtc_driver, starfire_rtc_probe);
 }
 
 static void __exit starfire_rtc_exit(void)
diff --git a/drivers/rtc/rtc-twl4030.c b/drivers/rtc/rtc-twl4030.c
index abe87a4d2665..01d8da9afdc8 100644
--- a/drivers/rtc/rtc-twl4030.c
+++ b/drivers/rtc/rtc-twl4030.c
@@ -337,7 +337,7 @@ static int twl4030_rtc_ioctl(struct device *dev, unsigned int cmd,
 }
 
 #else
-#define omap_rtc_ioctl  NULL
+#define twl4030_rtc_ioctl       NULL
 #endif
 
 static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc)
diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c
index 35364f64da7f..c557ba34e1aa 100644
--- a/drivers/s390/scsi/zfcp_erp.c
+++ b/drivers/s390/scsi/zfcp_erp.c
@@ -720,7 +720,6 @@ static int zfcp_erp_adapter_strategy_generic(struct zfcp_erp_action *act,
                 goto failed_openfcp;
 
         atomic_set_mask(ZFCP_STATUS_COMMON_OPEN, &act->adapter->status);
-        schedule_work(&act->adapter->scan_work);
 
         return ZFCP_ERP_SUCCEEDED;
 
@@ -1186,7 +1185,9 @@ static void zfcp_erp_scsi_scan(struct work_struct *work)
                 container_of(work, struct zfcp_erp_add_work, work);
         struct zfcp_unit *unit = p->unit;
         struct fc_rport *rport = unit->port->rport;
-        scsi_scan_target(&rport->dev, 0, rport->scsi_target_id,
+
+        if (rport && rport->port_state == FC_PORTSTATE_ONLINE)
+                scsi_scan_target(&rport->dev, 0, rport->scsi_target_id,
                          scsilun_to_int((struct scsi_lun *)&unit->fcp_lun), 0);
         atomic_clear_mask(ZFCP_STATUS_UNIT_SCSI_WORK_PENDING, &unit->status);
         zfcp_unit_put(unit);
@@ -1282,6 +1283,8 @@ static void zfcp_erp_action_cleanup(struct zfcp_erp_action *act, int result)
         case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
                 if (result != ZFCP_ERP_SUCCEEDED)
                         zfcp_erp_rports_del(adapter);
+                else
+                        schedule_work(&adapter->scan_work);
                 zfcp_adapter_put(adapter);
                 break;
         }
diff --git a/drivers/s390/scsi/zfcp_fc.c b/drivers/s390/scsi/zfcp_fc.c
index 1a7c80a77ff5..8aab3091a7b1 100644
--- a/drivers/s390/scsi/zfcp_fc.c
+++ b/drivers/s390/scsi/zfcp_fc.c
@@ -50,7 +50,8 @@ static int zfcp_wka_port_get(struct zfcp_wka_port *wka_port)
         if (mutex_lock_interruptible(&wka_port->mutex))
                 return -ERESTARTSYS;
 
-        if (wka_port->status != ZFCP_WKA_PORT_ONLINE) {
+        if (wka_port->status == ZFCP_WKA_PORT_OFFLINE ||
+            wka_port->status == ZFCP_WKA_PORT_CLOSING) {
                 wka_port->status = ZFCP_WKA_PORT_OPENING;
                 if (zfcp_fsf_open_wka_port(wka_port))
                         wka_port->status = ZFCP_WKA_PORT_OFFLINE;
@@ -125,8 +126,7 @@ static void _zfcp_fc_incoming_rscn(struct zfcp_fsf_req *fsf_req, u32 range,
 
         read_lock_irqsave(&zfcp_data.config_lock, flags);
         list_for_each_entry(port, &fsf_req->adapter->port_list_head, list) {
-                /* FIXME: ZFCP_STATUS_PORT_DID_DID check is racy */
-                if (!(atomic_read(&port->status) & ZFCP_STATUS_PORT_DID_DID))
+                if (!(atomic_read(&port->status) & ZFCP_STATUS_PORT_PHYS_OPEN))
                         /* Try to connect to unused ports anyway. */
                         zfcp_erp_port_reopen(port,
                                              ZFCP_STATUS_COMMON_ERP_FAILED,
@@ -610,7 +610,6 @@ int zfcp_scan_ports(struct zfcp_adapter *adapter)
         int ret, i;
         struct zfcp_gpn_ft *gpn_ft;
 
-        zfcp_erp_wait(adapter); /* wait until adapter is finished with ERP */
         if (fc_host_port_type(adapter->scsi_host) != FC_PORTTYPE_NPORT)
                 return 0;
 
diff --git a/drivers/s390/scsi/zfcp_fsf.c b/drivers/s390/scsi/zfcp_fsf.c
index d024442ee128..dc0367690405 100644
--- a/drivers/s390/scsi/zfcp_fsf.c
+++ b/drivers/s390/scsi/zfcp_fsf.c
@@ -930,8 +930,10 @@ struct zfcp_fsf_req *zfcp_fsf_abort_fcp_command(unsigned long old_req_id,
                 goto out;
         req = zfcp_fsf_req_create(adapter, FSF_QTCB_ABORT_FCP_CMND,
                                   req_flags, adapter->pool.fsf_req_abort);
-        if (IS_ERR(req))
+        if (IS_ERR(req)) {
+                req = NULL;
                 goto out;
+        }
 
         if (unlikely(!(atomic_read(&unit->status) &
                        ZFCP_STATUS_COMMON_UNBLOCKED)))
@@ -1584,6 +1586,7 @@ static void zfcp_fsf_open_wka_port_handler(struct zfcp_fsf_req *req)
                 wka_port->status = ZFCP_WKA_PORT_OFFLINE;
                 break;
         case FSF_PORT_ALREADY_OPEN:
+                break;
         case FSF_GOOD:
                 wka_port->handle = header->port_handle;
                 wka_port->status = ZFCP_WKA_PORT_ONLINE;
@@ -2113,18 +2116,21 @@ static inline void zfcp_fsf_trace_latency(struct zfcp_fsf_req *fsf_req)
 
 static void zfcp_fsf_send_fcp_command_task_handler(struct zfcp_fsf_req *req)
 {
-        struct scsi_cmnd *scpnt = req->data;
+        struct scsi_cmnd *scpnt;
         struct fcp_rsp_iu *fcp_rsp_iu = (struct fcp_rsp_iu *)
             &(req->qtcb->bottom.io.fcp_rsp);
         u32 sns_len;
         char *fcp_rsp_info = (unsigned char *) &fcp_rsp_iu[1];
         unsigned long flags;
 
-        if (unlikely(!scpnt))
-                return;
-
         read_lock_irqsave(&req->adapter->abort_lock, flags);
 
+        scpnt = req->data;
+        if (unlikely(!scpnt)) {
+                read_unlock_irqrestore(&req->adapter->abort_lock, flags);
+                return;
+        }
+
         if (unlikely(req->status & ZFCP_STATUS_FSFREQ_ABORTED)) {
                 set_host_byte(scpnt, DID_SOFT_ERROR);
                 set_driver_byte(scpnt, SUGGEST_RETRY);
@@ -2442,8 +2448,10 @@ struct zfcp_fsf_req *zfcp_fsf_send_fcp_ctm(struct zfcp_adapter *adapter,
                 goto out;
         req = zfcp_fsf_req_create(adapter, FSF_QTCB_FCP_CMND, req_flags,
                                   adapter->pool.fsf_req_scsi);
-        if (IS_ERR(req))
+        if (IS_ERR(req)) {
+                req = NULL;
                 goto out;
+        }
 
         req->status |= ZFCP_STATUS_FSFREQ_TASK_MANAGEMENT;
         req->data = unit;
diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c
index e46fd3e9f68f..468c880f8b6d 100644
--- a/drivers/s390/scsi/zfcp_scsi.c
+++ b/drivers/s390/scsi/zfcp_scsi.c
@@ -88,7 +88,7 @@ static int zfcp_scsi_queuecommand(struct scsi_cmnd *scpnt,
         ret = zfcp_fsf_send_fcp_command_task(adapter, unit, scpnt, 0,
                                              ZFCP_REQ_AUTO_CLEANUP);
         if (unlikely(ret == -EBUSY))
-                zfcp_scsi_command_fail(scpnt, DID_NO_CONNECT);
+                return SCSI_MLQUEUE_DEVICE_BUSY;
         else if (unlikely(ret < 0))
                 return SCSI_MLQUEUE_HOST_BUSY;
 
diff --git a/drivers/scsi/aacraid/linit.c b/drivers/scsi/aacraid/linit.c
index 9aa301c1ed07..162cd927d94b 100644
--- a/drivers/scsi/aacraid/linit.c
+++ b/drivers/scsi/aacraid/linit.c
@@ -427,8 +427,8 @@ static int aac_slave_configure(struct scsi_device *sdev)
                  * Firmware has an individual device recovery time typically
                  * of 35 seconds, give us a margin.
                  */
-                if (sdev->timeout < (45 * HZ))
-                        sdev->timeout = 45 * HZ;
+                if (sdev->request_queue->rq_timeout < (45 * HZ))
+                        blk_queue_rq_timeout(sdev->request_queue, 45*HZ);
                 for (cid = 0; cid < aac->maximum_num_containers; ++cid)
                         if (aac->fsa_dev[cid].valid)
                                 ++num_lsu;
diff --git a/drivers/scsi/device_handler/scsi_dh_hp_sw.c b/drivers/scsi/device_handler/scsi_dh_hp_sw.c
index 9aec4ca64e56..f7da7530875e 100644
--- a/drivers/scsi/device_handler/scsi_dh_hp_sw.c
+++ b/drivers/scsi/device_handler/scsi_dh_hp_sw.c
@@ -107,6 +107,7 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h)
         struct request *req;
         int ret;
 
+retry:
         req = blk_get_request(sdev->request_queue, WRITE, GFP_NOIO);
         if (!req)
                 return SCSI_DH_RES_TEMP_UNAVAIL;
@@ -121,7 +122,6 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h)
         memset(req->sense, 0, SCSI_SENSE_BUFFERSIZE);
         req->sense_len = 0;
 
-retry:
         ret = blk_execute_rq(req->q, NULL, req, 1);
         if (ret == -EIO) {
                 if (req->sense_len > 0) {
@@ -136,8 +136,10 @@ retry:
                 h->path_state = HP_SW_PATH_ACTIVE;
                 ret = SCSI_DH_OK;
         }
-        if (ret == SCSI_DH_IMM_RETRY)
+        if (ret == SCSI_DH_IMM_RETRY) {
+                blk_put_request(req);
                 goto retry;
+        }
         if (ret == SCSI_DH_DEV_OFFLINED) {
                 h->path_state = HP_SW_PATH_PASSIVE;
                 ret = SCSI_DH_OK;
@@ -200,6 +202,7 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h)
         struct request *req;
         int ret, retry;
 
+retry:
         req = blk_get_request(sdev->request_queue, WRITE, GFP_NOIO);
         if (!req)
                 return SCSI_DH_RES_TEMP_UNAVAIL;
@@ -216,7 +219,6 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h)
         req->sense_len = 0;
         retry = h->retries;
 
-retry:
         ret = blk_execute_rq(req->q, NULL, req, 1);
         if (ret == -EIO) {
                 if (req->sense_len > 0) {
@@ -231,8 +233,10 @@ retry:
                 ret = SCSI_DH_OK;
 
         if (ret == SCSI_DH_RETRY) {
-                if (--retry)
+                if (--retry) {
+                        blk_put_request(req);
                         goto retry;
+                }
                 ret = SCSI_DH_IO;
         }
 
diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index 87e09f35d3d4..6cad1758243a 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -1442,7 +1442,7 @@ static int ibmvscsi_slave_configure(struct scsi_device *sdev)
         spin_lock_irqsave(shost->host_lock, lock_flags);
         if (sdev->type == TYPE_DISK) {
                 sdev->allow_restart = 1;
-                sdev->timeout = 60 * HZ;
+                blk_queue_rq_timeout(sdev->request_queue, 60 * HZ);
         }
         scsi_adjust_queue_depth(sdev, 0, shost->cmd_per_lun);
         spin_unlock_irqrestore(shost->host_lock, lock_flags);
diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c
index a454f94623d7..17ce7abe17ee 100644
--- a/drivers/scsi/megaraid/megaraid_sas.c
+++ b/drivers/scsi/megaraid/megaraid_sas.c
@@ -1016,7 +1016,8 @@ static int megasas_slave_configure(struct scsi_device *sdev)
          * The RAID firmware may require extended timeouts.
          */
         if (sdev->channel >= MEGASAS_MAX_PD_CHANNELS)
-                sdev->timeout = MEGASAS_DEFAULT_CMD_TIMEOUT * HZ;
+                blk_queue_rq_timeout(sdev->request_queue,
+                                     MEGASAS_DEFAULT_CMD_TIMEOUT * HZ);
         return 0;
 }
 
diff --git a/drivers/scsi/scsi_error.c b/drivers/scsi/scsi_error.c
index 386361778ebb..edfaf241c5ba 100644
--- a/drivers/scsi/scsi_error.c
+++ b/drivers/scsi/scsi_error.c
@@ -932,8 +932,7 @@ static int scsi_eh_try_stu(struct scsi_cmnd *scmd)
                 int i, rtn = NEEDS_RETRY;
 
                 for (i = 0; rtn == NEEDS_RETRY && i < 2; i++)
-                        rtn = scsi_send_eh_cmnd(scmd, stu_command, 6,
-                                                scmd->device->timeout, 0);
+                        rtn = scsi_send_eh_cmnd(scmd, stu_command, 6, scmd->device->request_queue->rq_timeout, 0);
 
                 if (rtn == SUCCESS)
                         return 0;
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index f5d3b96890dc..fa45a1a66867 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -567,15 +567,18 @@ static inline int scsi_host_is_busy(struct Scsi_Host *shost)
  */
 static void scsi_run_queue(struct request_queue *q)
 {
-        struct scsi_device *starved_head = NULL, *sdev = q->queuedata;
+        struct scsi_device *sdev = q->queuedata;
         struct Scsi_Host *shost = sdev->host;
+        LIST_HEAD(starved_list);
         unsigned long flags;
 
         if (scsi_target(sdev)->single_lun)
                 scsi_single_lun_run(sdev);
 
         spin_lock_irqsave(shost->host_lock, flags);
-        while (!list_empty(&shost->starved_list) && !scsi_host_is_busy(shost)) {
+        list_splice_init(&shost->starved_list, &starved_list);
+
+        while (!list_empty(&starved_list)) {
                 int flagset;
 
                 /*
@@ -588,24 +591,18 @@ static void scsi_run_queue(struct request_queue *q)
                  * scsi_request_fn must get the host_lock before checking
                  * or modifying starved_list or starved_entry.
                  */
-                sdev = list_entry(shost->starved_list.next,
-                                          struct scsi_device, starved_entry);
-                /*
-                 * The *queue_ready functions can add a device back onto the
-                 * starved list's tail, so we must check for a infinite loop.
-                 */
-                if (sdev == starved_head)
+                if (scsi_host_is_busy(shost))
                         break;
-                if (!starved_head)
-                        starved_head = sdev;
 
+                sdev = list_entry(starved_list.next,
+                                  struct scsi_device, starved_entry);
+                list_del_init(&sdev->starved_entry);
                 if (scsi_target_is_busy(scsi_target(sdev))) {
                         list_move_tail(&sdev->starved_entry,
                                        &shost->starved_list);
                         continue;
                 }
 
-                list_del_init(&sdev->starved_entry);
                 spin_unlock(shost->host_lock);
 
                 spin_lock(sdev->request_queue->queue_lock);
@@ -621,6 +618,8 @@ static void scsi_run_queue(struct request_queue *q)
 
                 spin_lock(shost->host_lock);
         }
+        /* put any unprocessed entries back */
+        list_splice(&starved_list, &shost->starved_list);
         spin_unlock_irqrestore(shost->host_lock, flags);
 
         blk_run_queue(q);
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index c9e1242eaf25..5081b3981d3c 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -757,7 +757,7 @@ static int sd_ioctl(struct block_device *bdev, fmode_t mode,
          * access to the device is prohibited.
          */
         error = scsi_nonblockable_ioctl(sdp, cmd, p,
-                                        (mode & FMODE_NDELAY_NOW) != 0);
+                                        (mode & FMODE_NDELAY) != 0);
         if (!scsi_block_when_processing_errors(sdp) || !error)
                 return error;
 
diff --git a/drivers/scsi/sr.c b/drivers/scsi/sr.c
index 62b6633e3a97..45b66b98a516 100644
--- a/drivers/scsi/sr.c
+++ b/drivers/scsi/sr.c
@@ -521,7 +521,7 @@ static int sr_block_ioctl(struct block_device *bdev, fmode_t mode, unsigned cmd,
          * if it doesn't recognise the ioctl
          */
         ret = scsi_nonblockable_ioctl(sdev, cmd, argp,
-                                        (mode & FMODE_NDELAY_NOW) != 0);
+                                        (mode & FMODE_NDELAY) != 0);
         if (ret != -ENODEV)
                 return ret;
         return scsi_ioctl(sdev, cmd, argp);
diff --git a/drivers/scsi/stex.c b/drivers/scsi/stex.c
index 3790906a77d1..2fa830c0be27 100644
--- a/drivers/scsi/stex.c
+++ b/drivers/scsi/stex.c
@@ -477,7 +477,7 @@ stex_slave_config(struct scsi_device *sdev)
 {
         sdev->use_10_for_rw = 1;
         sdev->use_10_for_ms = 1;
-        sdev->timeout = 60 * HZ;
+        blk_queue_rq_timeout(sdev->request_queue, 60 * HZ);
         sdev->tagged_supported = 1;
 
         return 0;
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index 3f90f1bbbbcd..73dea88cceb3 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -66,7 +66,7 @@
 #define ONEMS 0xb0 /* One Millisecond register */
 #define UTS   0xb4 /* UART Test Register */
 #endif
-#ifdef CONFIG_ARCH_IMX
+#if defined(CONFIG_ARCH_IMX) || defined(CONFIG_ARCH_MX1)
 #define BIPR1 0xb0 /* Incremental Preset Register 1 */
 #define BIPR2 0xb4 /* Incremental Preset Register 2 */
 #define BIPR3 0xb8 /* Incremental Preset Register 3 */
@@ -96,7 +96,7 @@
 #define  UCR1_RTSDEN     (1<<5)  /* RTS delta interrupt enable */
 #define  UCR1_SNDBRK     (1<<4)  /* Send break */
 #define  UCR1_TDMAEN     (1<<3)  /* Transmitter ready DMA enable */
-#ifdef CONFIG_ARCH_IMX
+#if defined(CONFIG_ARCH_IMX) || defined(CONFIG_ARCH_MX1)
 #define  UCR1_UARTCLKEN  (1<<2)  /* UART clock enabled */
 #endif
 #if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2
@@ -187,7 +187,7 @@
 #define MAX_INTERNAL_IRQ        IMX_IRQS
 #endif
 
-#if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2
+#ifdef CONFIG_ARCH_MXC
 #define SERIAL_IMX_MAJOR        207
 #define MINOR_START             16
 #define DEV_NAME                "ttymxc"
diff --git a/drivers/serial/ioc3_serial.c b/drivers/serial/ioc3_serial.c
index 6dd98f9fb89c..ae3699d77dd0 100644
--- a/drivers/serial/ioc3_serial.c
+++ b/drivers/serial/ioc3_serial.c
@@ -2149,7 +2149,7 @@ out4:
         return ret;
 }
 
-static struct ioc3_submodule ioc3uart_submodule = {
+static struct ioc3_submodule ioc3uart_ops = {
         .name = "IOC3uart",
         .probe = ioc3uart_probe,
         .remove = ioc3uart_remove,
@@ -2173,7 +2173,7 @@ static int __devinit ioc3uart_init(void)
                        __func__);
                 return ret;
         }
-        ret = ioc3_register_submodule(&ioc3uart_submodule);
+        ret = ioc3_register_submodule(&ioc3uart_ops);
         if (ret)
                 uart_unregister_driver(&ioc3_uart);
         return ret;
@@ -2181,7 +2181,7 @@ static int __devinit ioc3uart_init(void)
 
 static void __devexit ioc3uart_exit(void)
 {
-        ioc3_unregister_submodule(&ioc3uart_submodule);
+        ioc3_unregister_submodule(&ioc3uart_ops);
         uart_unregister_driver(&ioc3_uart);
 }
 
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 6117d3db0b66..28c00c3d58f5 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -591,8 +591,8 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
         /* Update the per-port timeout */
         uart_update_timeout(port, new->c_cflag, baud);
 
-        /* Do our best to flush TX & RX, so we don't loose anything */
-        /* But we don't wait indefinitly ! */
+        /* Do our best to flush TX & RX, so we don't lose anything */
+        /* But we don't wait indefinitely ! */
         j = 5000000;    /* Maximum wait */
         /* FIXME Can't receive chars since set_termios might be called at early
          * boot for the console, all stuff is not yet ready to receive at that
diff --git a/drivers/serial/s3c2440.c b/drivers/serial/s3c2440.c
index 317d239ab740..29cbb0afef8e 100644
--- a/drivers/serial/s3c2440.c
+++ b/drivers/serial/s3c2440.c
@@ -177,5 +177,5 @@ module_exit(s3c2440_serial_exit);
 
 MODULE_DESCRIPTION("Samsung S3C2440,S3C2442 SoC Serial port driver");
 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
-MODULE_LICENSE("GPLi v2");
+MODULE_LICENSE("GPL v2");
 MODULE_ALIAS("platform:s3c2440-uart");
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index 91697bdb399f..4bbddb73abd9 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -18,6 +18,7 @@
 #include <linux/jiffies.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
+#include <linux/gpio.h>
 
 #include <mach/hardware.h>
 #include <asm/io.h>
@@ -25,7 +26,6 @@
 
 #include <mach/mux.h>
 #include <mach/irqs.h>
-#include <mach/gpio.h>
 #include <mach/fpga.h>
 #include <mach/usb.h>
 
@@ -254,8 +254,8 @@ static int ohci_omap_init(struct usb_hcd *hcd)
 
                         /* gpio9 for overcurrent detction */
                         omap_cfg_reg(W8_1610_GPIO9);
-                        omap_request_gpio(9);
-                        omap_set_gpio_direction(9, 1 /* IN */);
+                        gpio_request(9, "OHCI overcurrent");
+                        gpio_direction_input(9);
 
                         /* for paranoia's sake:  disable USB.PUEN */
                         omap_cfg_reg(W4_USB_HIGHZ);
@@ -407,7 +407,7 @@ usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev)
                 put_device(ohci->transceiver->dev);
         }
         if (machine_is_omap_osk())
-                omap_free_gpio(9);
+                gpio_free(9);
         iounmap(hcd->regs);
         release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
         usb_put_hcd(hcd);
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 51d7bdea2869..aad1359a3eb1 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -1498,7 +1498,7 @@ static int ftdi_open(struct tty_struct *tty,
                         priv->interface, buf, 0, WDR_TIMEOUT);
 
         /* Termios defaults are set by usb_serial_init. We don't change
-           port->tty->termios - this would loose speed settings, etc.
+           port->tty->termios - this would lose speed settings, etc.
            This is same behaviour as serial.c/rs_open() - Kuba */
 
         /* ftdi_set_termios  will send usb control messages */
diff --git a/drivers/video/aty/radeon_accel.c b/drivers/video/aty/radeon_accel.c
index a547e5d4c8bf..a469a3d6edcb 100644
--- a/drivers/video/aty/radeon_accel.c
+++ b/drivers/video/aty/radeon_accel.c
@@ -5,61 +5,61 @@
  * --dte
  */
 
-#define FLUSH_CACHE_WORKAROUND  1
-
-void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries)
+static void radeon_fixup_offset(struct radeonfb_info *rinfo)
 {
-        int i;
+        u32 local_base;
+
+        /* *** Ugly workaround *** */
+        /*
+         * On some platforms, the video memory is mapped at 0 in radeon chip space
+         * (like PPCs) by the firmware. X will always move it up so that it's seen
+         * by the chip to be at the same address as the PCI BAR.
+         * That means that when switching back from X, there is a mismatch between
+         * the offsets programmed into the engine. This means that potentially,
+         * accel operations done before radeonfb has a chance to re-init the engine
+         * will have incorrect offsets, and potentially trash system memory !
+         *
+         * The correct fix is for fbcon to never call any accel op before the engine
+         * has properly been re-initialized (by a call to set_var), but this is a
+         * complex fix. This workaround in the meantime, called before every accel
+         * operation, makes sure the offsets are in sync.
+         */
 
-        for (i=0; i<2000000; i++) {
-                rinfo->fifo_free = INREG(RBBM_STATUS) & 0x7f;
-                if (rinfo->fifo_free >= entries)
-                        return;
-                udelay(10);
-        }
-        printk(KERN_ERR "radeonfb: FIFO Timeout !\n");
-        /* XXX Todo: attempt to reset the engine */
-}
+        radeon_fifo_wait (1);
+        local_base = INREG(MC_FB_LOCATION) << 16;
+        if (local_base == rinfo->fb_local_base)
+                return;
 
-static inline void radeon_fifo_wait(struct radeonfb_info *rinfo, int entries)
-{
-        if (entries <= rinfo->fifo_free)
-                rinfo->fifo_free -= entries;
-        else
-                radeon_fifo_update_and_wait(rinfo, entries);
-}
+        rinfo->fb_local_base = local_base;
 
-static inline void radeonfb_set_creg(struct radeonfb_info *rinfo, u32 reg,
-                                     u32 *cache, u32 new_val)
-{
-        if (new_val == *cache)
-                return;
-        *cache = new_val;
-        radeon_fifo_wait(rinfo, 1);
-        OUTREG(reg, new_val);
+        radeon_fifo_wait (3);
+        OUTREG(DEFAULT_PITCH_OFFSET, (rinfo->pitch << 0x16) |
+                                     (rinfo->fb_local_base >> 10));
+        OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
+        OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
 }
 
 static void radeonfb_prim_fillrect(struct radeonfb_info *rinfo, 
                                    const struct fb_fillrect *region)
 {
-        radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache,
-                          rinfo->dp_gui_mc_base | GMC_BRUSH_SOLID_COLOR | ROP3_P);
-        radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache,
-                          DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM);
-        radeonfb_set_creg(rinfo, DP_BRUSH_FRGD_CLR, &rinfo->dp_brush_fg_cache,
-                          region->color);
-
-        /* Ensure the dst cache is flushed and the engine idle before
-         * issuing the operation.
-         *
-         * This works around engine lockups on some cards
-         */
-#if FLUSH_CACHE_WORKAROUND
-        radeon_fifo_wait(rinfo, 2);
+        radeon_fifo_wait(4);  
+  
+        OUTREG(DP_GUI_MASTER_CNTL,  
+                rinfo->dp_gui_master_cntl  /* contains, like GMC_DST_32BPP */
+                | GMC_BRUSH_SOLID_COLOR
+                | ROP3_P);
+        if (radeon_get_dstbpp(rinfo->depth) != DST_8BPP)
+                OUTREG(DP_BRUSH_FRGD_CLR, rinfo->pseudo_palette[region->color]);
+        else
+                OUTREG(DP_BRUSH_FRGD_CLR, region->color);
+        OUTREG(DP_WRITE_MSK, 0xffffffff);
+        OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM));
+
+        radeon_fifo_wait(2);
         OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL);
         OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE));
-#endif
-        radeon_fifo_wait(rinfo, 2);
+
+        radeon_fifo_wait(2);  
         OUTREG(DST_Y_X, (region->dy << 16) | region->dx);
         OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height);
 }
@@ -70,14 +70,15 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region)
         struct fb_fillrect modded;
         int vxres, vyres;
   
-        WARN_ON(rinfo->gfx_mode);
-        if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode)
+        if (info->state != FBINFO_STATE_RUNNING)
                 return;
         if (info->flags & FBINFO_HWACCEL_DISABLED) {
                 cfb_fillrect(info, region);
                 return;
         }
 
+        radeon_fixup_offset(rinfo);
+
         vxres = info->var.xres_virtual;
         vyres = info->var.yres_virtual;
 
@@ -90,10 +91,6 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region)
         if(modded.dx + modded.width  > vxres) modded.width  = vxres - modded.dx;
         if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy;
 
-        if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
-            info->fix.visual == FB_VISUAL_DIRECTCOLOR )
-                modded.color = ((u32 *) (info->pseudo_palette))[region->color];
-
         radeonfb_prim_fillrect(rinfo, &modded);
 }
 
@@ -112,22 +109,22 @@ static void radeonfb_prim_copyarea(struct radeonfb_info *rinfo,
         if ( xdir < 0 ) { sx += w-1; dx += w-1; }
         if ( ydir < 0 ) { sy += h-1; dy += h-1; }
 
-        radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache,
-                          rinfo->dp_gui_mc_base |
-                          GMC_BRUSH_NONE |
-                          GMC_SRC_DATATYPE_COLOR |
-                          ROP3_S |
-                          DP_SRC_SOURCE_MEMORY);
-        radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache,
-                          (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0) |
-                          (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0));
-
-#if FLUSH_CACHE_WORKAROUND
-        radeon_fifo_wait(rinfo, 2);
+        radeon_fifo_wait(3);
+        OUTREG(DP_GUI_MASTER_CNTL,
+                rinfo->dp_gui_master_cntl /* i.e. GMC_DST_32BPP */
+                | GMC_BRUSH_NONE
+                | GMC_SRC_DSTCOLOR
+                | ROP3_S 
+                | DP_SRC_SOURCE_MEMORY );
+        OUTREG(DP_WRITE_MSK, 0xffffffff);
+        OUTREG(DP_CNTL, (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0)
+                        | (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0));
+
+        radeon_fifo_wait(2);
         OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL);
         OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE));
-#endif
-        radeon_fifo_wait(rinfo, 3);
+
+        radeon_fifo_wait(3);
         OUTREG(SRC_Y_X, (sy << 16) | sx);
         OUTREG(DST_Y_X, (dy << 16) | dx);
         OUTREG(DST_HEIGHT_WIDTH, (h << 16) | w);
@@ -146,14 +143,15 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
         modded.width  = area->width;
         modded.height = area->height;
   
-        WARN_ON(rinfo->gfx_mode);
-        if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode)
+        if (info->state != FBINFO_STATE_RUNNING)
                 return;
         if (info->flags & FBINFO_HWACCEL_DISABLED) {
                 cfb_copyarea(info, area);
                 return;
         }
 
+        radeon_fixup_offset(rinfo);
+
         vxres = info->var.xres_virtual;
         vyres = info->var.yres_virtual;
 
@@ -170,115 +168,13 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
         radeonfb_prim_copyarea(rinfo, &modded);
 }
 
-static void radeonfb_prim_imageblit(struct radeonfb_info *rinfo,
-                                    const struct fb_image *image,
-                                    u32 fg, u32 bg)
-{
-        unsigned int dwords;
-        u32 *bits;
-
-        radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache,
-                          rinfo->dp_gui_mc_base |
-                          GMC_BRUSH_NONE | GMC_DST_CLIP_LEAVE |
-                          GMC_SRC_DATATYPE_MONO_FG_BG |
-                          ROP3_S |
-                          GMC_BYTE_ORDER_MSB_TO_LSB |
-                          DP_SRC_SOURCE_HOST_DATA);
-        radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache,
-                          DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM);
-        radeonfb_set_creg(rinfo, DP_SRC_FRGD_CLR, &rinfo->dp_src_fg_cache, fg);
-        radeonfb_set_creg(rinfo, DP_SRC_BKGD_CLR, &rinfo->dp_src_bg_cache, bg);
-
-        /* Ensure the dst cache is flushed and the engine idle before
-         * issuing the operation.
-         *
-         * This works around engine lockups on some cards
-         */
-#if FLUSH_CACHE_WORKAROUND
-        radeon_fifo_wait(rinfo, 2);
-        OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL);
-        OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE));
-#endif
-
-        /* X here pads width to a multiple of 32 and uses the clipper to
-         * adjust the result. Is that really necessary ? Things seem to
-         * work ok for me without that and the doco doesn't seem to imply]
-         * there is such a restriction.
-         */
-        radeon_fifo_wait(rinfo, 4);
-        OUTREG(SC_TOP_LEFT, (image->dy << 16) | image->dx);
-        OUTREG(SC_BOTTOM_RIGHT, ((image->dy + image->height) << 16) |
-               (image->dx + image->width));
-        OUTREG(DST_Y_X, (image->dy << 16) | image->dx);
-
-        OUTREG(DST_HEIGHT_WIDTH, (image->height << 16) | ((image->width + 31) & ~31));
-
-        dwords = (image->width + 31) >> 5;
-        dwords *= image->height;
-        bits = (u32*)(image->data);
-
-        while(dwords >= 8) {
-                radeon_fifo_wait(rinfo, 8);
-#if BITS_PER_LONG == 64
-                __raw_writeq(*((u64 *)(bits)), rinfo->mmio_base + HOST_DATA0);
-                __raw_writeq(*((u64 *)(bits+2)), rinfo->mmio_base + HOST_DATA2);
-                __raw_writeq(*((u64 *)(bits+4)), rinfo->mmio_base + HOST_DATA4);
-                __raw_writeq(*((u64 *)(bits+6)), rinfo->mmio_base + HOST_DATA6);
-                bits += 8;
-#else
-                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA0);
-                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA1);
-                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA2);
-                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA3);
-                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA4);
-                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA5);
-                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA6);
-                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA7);
-#endif
-                dwords -= 8;
-        }
-        while(dwords--) {
-                radeon_fifo_wait(rinfo, 1);
-                __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA0);
-        }
-}
-
 void radeonfb_imageblit(struct fb_info *info, const struct fb_image *image)
 {
         struct radeonfb_info *rinfo = info->par;
-        u32 fg, bg;
-
-        WARN_ON(rinfo->gfx_mode);
-        if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode)
-                return;
 
-        if (!image->width || !image->height)
+        if (info->state != FBINFO_STATE_RUNNING)
                 return;
-
-        /* We only do 1 bpp color expansion for now */
-        if (info->flags & FBINFO_HWACCEL_DISABLED || image->depth != 1)
-                goto fallback;
-
-        /* Fallback if running out of the screen. We may do clipping
-         * in the future */
-        if ((image->dx + image->width) > info->var.xres_virtual ||
-            (image->dy + image->height) > info->var.yres_virtual)
-                goto fallback;
-
-        if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
-            info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
-                fg = ((u32*)(info->pseudo_palette))[image->fg_color];
-                bg = ((u32*)(info->pseudo_palette))[image->bg_color];
-        } else {
-                fg = image->fg_color;
-                bg = image->bg_color;
-        }
-
-        radeonfb_prim_imageblit(rinfo, image, fg, bg);
-        return;
-
- fallback:
-        radeon_engine_idle(rinfo);
+        radeon_engine_idle();
 
         cfb_imageblit(info, image);
 }
@@ -289,8 +185,7 @@ int radeonfb_sync(struct fb_info *info)
 
         if (info->state != FBINFO_STATE_RUNNING)
                 return 0;
-
-        radeon_engine_idle(rinfo);
+        radeon_engine_idle();
 
         return 0;
 }
@@ -366,10 +261,9 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo)
         /* disable 3D engine */
         OUTREG(RB3D_CNTL, 0);
 
-        rinfo->fifo_free = 0;
         radeonfb_engine_reset(rinfo);
 
-        radeon_fifo_wait(rinfo, 1);
+        radeon_fifo_wait (1);
         if (IS_R300_VARIANT(rinfo)) {
                 OUTREG(RB2D_DSTCACHE_MODE, INREG(RB2D_DSTCACHE_MODE) |
                        RB2D_DC_AUTOFLUSH_ENABLE |
@@ -383,7 +277,7 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo)
                 OUTREG(RB2D_DSTCACHE_MODE, 0);
         }
 
-        radeon_fifo_wait(rinfo, 3);
+        radeon_fifo_wait (3);
         /* We re-read MC_FB_LOCATION from card as it can have been
          * modified by XFree drivers (ouch !)
          */
@@ -394,57 +288,41 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo)
         OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
         OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
 
-        radeon_fifo_wait(rinfo, 1);
-#ifdef __BIG_ENDIAN
+        radeon_fifo_wait (1);
+#if defined(__BIG_ENDIAN)
         OUTREGP(DP_DATATYPE, HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN);
 #else
         OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN);
 #endif
-        radeon_fifo_wait(rinfo, 2);
+        radeon_fifo_wait (2);
         OUTREG(DEFAULT_SC_TOP_LEFT, 0);
         OUTREG(DEFAULT_SC_BOTTOM_RIGHT, (DEFAULT_SC_RIGHT_MAX |
                                          DEFAULT_SC_BOTTOM_MAX));
 
-        /* set default DP_GUI_MASTER_CNTL */
         temp = radeon_get_dstbpp(rinfo->depth);
-        rinfo->dp_gui_mc_base = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS);
+        rinfo->dp_gui_master_cntl = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS);
 
-        rinfo->dp_gui_mc_cache = rinfo->dp_gui_mc_base |
-                GMC_BRUSH_SOLID_COLOR |
-                GMC_SRC_DATATYPE_COLOR;
-        radeon_fifo_wait(rinfo, 1);
-        OUTREG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_mc_cache);
+        radeon_fifo_wait (1);
+        OUTREG(DP_GUI_MASTER_CNTL, (rinfo->dp_gui_master_cntl |
+                                    GMC_BRUSH_SOLID_COLOR |
+                                    GMC_SRC_DATATYPE_COLOR));
 
+        radeon_fifo_wait (7);
 
         /* clear line drawing regs */
-        radeon_fifo_wait(rinfo, 2);
         OUTREG(DST_LINE_START, 0);
         OUTREG(DST_LINE_END, 0);
 
-        /* set brush and source color regs */
-        rinfo->dp_brush_fg_cache = 0xffffffff;
-        rinfo->dp_brush_bg_cache = 0x00000000;
-        rinfo->dp_src_fg_cache = 0xffffffff;
-        rinfo->dp_src_bg_cache = 0x00000000;
-        radeon_fifo_wait(rinfo, 4);
-        OUTREG(DP_BRUSH_FRGD_CLR, rinfo->dp_brush_fg_cache);
-        OUTREG(DP_BRUSH_BKGD_CLR, rinfo->dp_brush_bg_cache);
-        OUTREG(DP_SRC_FRGD_CLR, rinfo->dp_src_fg_cache);
-        OUTREG(DP_SRC_BKGD_CLR, rinfo->dp_src_bg_cache);
-
-        /* Default direction */
-        rinfo->dp_cntl_cache = DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM;
-        radeon_fifo_wait(rinfo, 1);
-        OUTREG(DP_CNTL, rinfo->dp_cntl_cache);
+        /* set brush color regs */
+        OUTREG(DP_BRUSH_FRGD_CLR, 0xffffffff);
+        OUTREG(DP_BRUSH_BKGD_CLR, 0x00000000);
+
+        /* set source color regs */
+        OUTREG(DP_SRC_FRGD_CLR, 0xffffffff);
+        OUTREG(DP_SRC_BKGD_CLR, 0x00000000);
 
         /* default write mask */
-        radeon_fifo_wait(rinfo, 1);
         OUTREG(DP_WRITE_MSK, 0xffffffff);
 
-        /* Default to no swapping of host data */
-        radeon_fifo_wait(rinfo, 1);
-        OUTREG(RBBM_GUICNTL, RBBM_GUICNTL_HOST_DATA_SWAP_NONE);
-
-        /* Make sure it's settled */
-        radeon_engine_idle(rinfo);
+        radeon_engine_idle ();
 }
diff --git a/drivers/video/aty/radeon_backlight.c b/drivers/video/aty/radeon_backlight.c
index f343ba83f0ae..1a056adb61c8 100644
--- a/drivers/video/aty/radeon_backlight.c
+++ b/drivers/video/aty/radeon_backlight.c
@@ -66,7 +66,7 @@ static int radeon_bl_update_status(struct backlight_device *bd)
                 level = bd->props.brightness;
 
         del_timer_sync(&rinfo->lvds_timer);
-        radeon_engine_idle(rinfo);
+        radeon_engine_idle();
 
         lvds_gen_cntl = INREG(LVDS_GEN_CNTL);
         if (level > 0) {
diff --git a/drivers/video/aty/radeon_base.c b/drivers/video/aty/radeon_base.c
index b3ffe8205d2b..d0f1a7fc2c9d 100644
--- a/drivers/video/aty/radeon_base.c
+++ b/drivers/video/aty/radeon_base.c
@@ -852,6 +852,7 @@ static int radeonfb_pan_display (struct fb_var_screeninfo *var,
         if (rinfo->asleep)
                 return 0;
 
+        radeon_fifo_wait(2);
         OUTREG(CRTC_OFFSET, ((var->yoffset * var->xres_virtual + var->xoffset)
                              * var->bits_per_pixel / 8) & ~7);
         return 0;
@@ -881,6 +882,7 @@ static int radeonfb_ioctl (struct fb_info *info, unsigned int cmd,
                         if (rc)
                                 return rc;
 
+                        radeon_fifo_wait(2);
                         if (value & 0x01) {
                                 tmp = INREG(LVDS_GEN_CNTL);
 
@@ -938,7 +940,7 @@ int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch)
         if (rinfo->lock_blank)
                 return 0;
 
-        radeon_engine_idle(rinfo);
+        radeon_engine_idle();
 
         val = INREG(CRTC_EXT_CNTL);
         val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS |
@@ -1046,7 +1048,7 @@ static int radeonfb_blank (int blank, struct fb_info *info)
 
         if (rinfo->asleep)
                 return 0;
-
+                
         return radeon_screen_blank(rinfo, blank, 0);
 }
 
@@ -1072,6 +1074,8 @@ static int radeon_setcolreg (unsigned regno, unsigned red, unsigned green,
         pindex = regno;
 
         if (!rinfo->asleep) {
+                radeon_fifo_wait(9);
+
                 if (rinfo->bpp == 16) {
                         pindex = regno * 8;
 
@@ -1240,6 +1244,8 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg
 {
         int i;
 
+        radeon_fifo_wait(20);
+
         /* Workaround from XFree */
         if (rinfo->is_mobility) {
                 /* A temporal workaround for the occational blanking on certain laptop
@@ -1335,7 +1341,7 @@ static void radeon_lvds_timer_func(unsigned long data)
 {
         struct radeonfb_info *rinfo = (struct radeonfb_info *)data;
 
-        radeon_engine_idle(rinfo);
+        radeon_engine_idle();
 
         OUTREG(LVDS_GEN_CNTL, rinfo->pending_lvds_gen_cntl);
 }
@@ -1353,11 +1359,10 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode,
         if (nomodeset)
                 return;
 
-        radeon_engine_idle(rinfo);
-
         if (!regs_only)
                 radeon_screen_blank(rinfo, FB_BLANK_NORMAL, 0);
 
+        radeon_fifo_wait(31);
         for (i=0; i<10; i++)
                 OUTREG(common_regs[i].reg, common_regs[i].val);
 
@@ -1385,6 +1390,7 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode,
         radeon_write_pll_regs(rinfo, mode);
 
         if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) {
+                radeon_fifo_wait(10);
                 OUTREG(FP_CRTC_H_TOTAL_DISP, mode->fp_crtc_h_total_disp);
                 OUTREG(FP_CRTC_V_TOTAL_DISP, mode->fp_crtc_v_total_disp);
                 OUTREG(FP_H_SYNC_STRT_WID, mode->fp_h_sync_strt_wid);
@@ -1399,6 +1405,7 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode,
         if (!regs_only)
                 radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 0);
 
+        radeon_fifo_wait(2);
         OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl);
         
         return;
@@ -1549,7 +1556,7 @@ static int radeonfb_set_par(struct fb_info *info)
         /* We always want engine to be idle on a mode switch, even
          * if we won't actually change the mode
          */
-        radeon_engine_idle(rinfo);
+        radeon_engine_idle();
 
         hSyncStart = mode->xres + mode->right_margin;
         hSyncEnd = hSyncStart + mode->hsync_len;
@@ -1844,6 +1851,7 @@ static int radeonfb_set_par(struct fb_info *info)
         return 0;
 }
 
+
 static struct fb_ops radeonfb_ops = {
         .owner                  = THIS_MODULE,
         .fb_check_var           = radeonfb_check_var,
@@ -1867,7 +1875,6 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo)
         info->par = rinfo;
         info->pseudo_palette = rinfo->pseudo_palette;
         info->flags = FBINFO_DEFAULT
-                    | FBINFO_HWACCEL_IMAGEBLIT
                     | FBINFO_HWACCEL_COPYAREA
                     | FBINFO_HWACCEL_FILLRECT
                     | FBINFO_HWACCEL_XPAN
@@ -1875,7 +1882,6 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo)
         info->fbops = &radeonfb_ops;
         info->screen_base = rinfo->fb_base;
         info->screen_size = rinfo->mapped_vram;
-
         /* Fill fix common fields */
         strlcpy(info->fix.id, rinfo->name, sizeof(info->fix.id));
         info->fix.smem_start = rinfo->fb_base_phys;
@@ -1890,25 +1896,8 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo)
         info->fix.mmio_len = RADEON_REGSIZE;
         info->fix.accel = FB_ACCEL_ATI_RADEON;
 
-        /* Allocate colormap */
         fb_alloc_cmap(&info->cmap, 256, 0);
 
-        /* Setup pixmap used for acceleration */
-#define PIXMAP_SIZE     (2048 * 4)
-
-        info->pixmap.addr = kmalloc(PIXMAP_SIZE, GFP_KERNEL);
-        if (!info->pixmap.addr) {
-                printk(KERN_ERR "radeonfb: Failed to allocate pixmap !\n");
-                noaccel = 1;
-                goto bail;
-        }
-        info->pixmap.size = PIXMAP_SIZE;
-        info->pixmap.flags = FB_PIXMAP_SYSTEM;
-        info->pixmap.scan_align = 4;
-        info->pixmap.buf_align = 4;
-        info->pixmap.access_align = 32;
-
-bail:
         if (noaccel)
                 info->flags |= FBINFO_HWACCEL_DISABLED;
 
@@ -2017,6 +2006,7 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
           u32 tom = INREG(NB_TOM);
           tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024);
 
+                radeon_fifo_wait(6);
           OUTREG(MC_FB_LOCATION, tom);
           OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
           OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/aty/radeon_pm.c
index 3df5015f1d13..675abdafc2d8 100644
--- a/drivers/video/aty/radeon_pm.c
+++ b/drivers/video/aty/radeon_pm.c
@@ -2653,9 +2653,9 @@ int radeonfb_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
 
         if (!(info->flags & FBINFO_HWACCEL_DISABLED)) {
                 /* Make sure engine is reset */
-                radeon_engine_idle(rinfo);
+                radeon_engine_idle();
                 radeonfb_engine_reset(rinfo);
-                radeon_engine_idle(rinfo);
+                radeon_engine_idle();
         }
 
         /* Blank display and LCD */
@@ -2767,7 +2767,7 @@ int radeonfb_pci_resume(struct pci_dev *pdev)
 
                 rinfo->asleep = 0;
         } else
-                radeon_engine_idle(rinfo);
+                radeon_engine_idle();
 
         /* Restore display & engine */
         radeon_write_mode (rinfo, &rinfo->state, 1);
diff --git a/drivers/video/aty/radeonfb.h b/drivers/video/aty/radeonfb.h
index ea0b5b47acaf..3ea1b00fdd22 100644
--- a/drivers/video/aty/radeonfb.h
+++ b/drivers/video/aty/radeonfb.h
@@ -336,15 +336,7 @@ struct radeonfb_info {
         int                     mon2_type;
         u8                      *mon2_EDID;
 
-        /* accel bits */
-        u32                     dp_gui_mc_base;
-        u32                     dp_gui_mc_cache;
-        u32                     dp_cntl_cache;
-        u32                     dp_brush_fg_cache;
-        u32                     dp_brush_bg_cache;
-        u32                     dp_src_fg_cache;
-        u32                     dp_src_bg_cache;
-        u32                     fifo_free;
+        u32                     dp_gui_master_cntl;
 
         struct pll_info         pll;
 
@@ -356,7 +348,6 @@ struct radeonfb_info {
         int                     lock_blank;
         int                     dynclk;
         int                     no_schedule;
-        int                     gfx_mode;
         enum radeon_pm_mode     pm_mode;
         reinit_function_ptr     reinit_func;
 
@@ -401,14 +392,8 @@ static inline void _radeon_msleep(struct radeonfb_info *rinfo, unsigned long ms)
 #define OUTREG8(addr,val)       writeb(val, (rinfo->mmio_base)+addr)
 #define INREG16(addr)           readw((rinfo->mmio_base)+addr)
 #define OUTREG16(addr,val)      writew(val, (rinfo->mmio_base)+addr)
-
-#ifdef CONFIG_PPC
-#define INREG(addr)             ({ eieio(); ld_le32(rinfo->mmio_base+(addr)); })
-#define OUTREG(addr,val)        do { eieio(); st_le32(rinfo->mmio_base+(addr),(val)); } while(0)
-#else
 #define INREG(addr)             readl((rinfo->mmio_base)+addr)
 #define OUTREG(addr,val)        writel(val, (rinfo->mmio_base)+addr)
-#endif
 
 static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr,
                        u32 val, u32 mask)
@@ -550,7 +535,17 @@ static inline u32 radeon_get_dstbpp(u16 depth)
  * 2D Engine helper routines
  */
 
-extern void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries);
+static inline void _radeon_fifo_wait(struct radeonfb_info *rinfo, int entries)
+{
+        int i;
+
+        for (i=0; i<2000000; i++) {
+                if ((INREG(RBBM_STATUS) & 0x7f) >= entries)
+                        return;
+                udelay(1);
+        }
+        printk(KERN_ERR "radeonfb: FIFO Timeout !\n");
+}
 
 static inline void radeon_engine_flush (struct radeonfb_info *rinfo)
 {
@@ -563,7 +558,7 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo)
         /* Ensure FIFO is empty, ie, make sure the flush commands
          * has reached the cache
          */
-        radeon_fifo_update_and_wait(rinfo, 64);
+        _radeon_fifo_wait (rinfo, 64);
 
         /* Wait for the flush to complete */
         for (i=0; i < 2000000; i++) {
@@ -575,12 +570,12 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo)
 }
 
 
-static inline void radeon_engine_idle(struct radeonfb_info *rinfo)
+static inline void _radeon_engine_idle(struct radeonfb_info *rinfo)
 {
         int i;
 
         /* ensure FIFO is empty before waiting for idle */
-        radeon_fifo_update_and_wait (rinfo, 64);
+        _radeon_fifo_wait (rinfo, 64);
 
         for (i=0; i<2000000; i++) {
                 if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) {
@@ -593,6 +588,8 @@ static inline void radeon_engine_idle(struct radeonfb_info *rinfo)
 }
 
 
+#define radeon_engine_idle()            _radeon_engine_idle(rinfo)
+#define radeon_fifo_wait(entries)       _radeon_fifo_wait(rinfo,entries)
 #define radeon_msleep(ms)               _radeon_msleep(rinfo,ms)
 
 
@@ -622,7 +619,6 @@ extern void radeonfb_imageblit(struct fb_info *p, const struct fb_image *image);
 extern int radeonfb_sync(struct fb_info *info);
 extern void radeonfb_engine_init (struct radeonfb_info *rinfo);
 extern void radeonfb_engine_reset(struct radeonfb_info *rinfo);
-extern void radeon_fixup_mem_offset(struct radeonfb_info *rinfo);
 
 /* Other functions */
 extern int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch);
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c
index 67ff370d80af..0b2adefe9e3d 100644
--- a/drivers/video/console/fbcon.c
+++ b/drivers/video/console/fbcon.c
@@ -3531,12 +3531,18 @@ static void fbcon_exit(void)
         softback_buf = 0UL;
 
         for (i = 0; i < FB_MAX; i++) {
+                int pending;
+
                 mapped = 0;
                 info = registered_fb[i];
 
                 if (info == NULL)
                         continue;
 
+                pending = cancel_work_sync(&info->queue);
+                DPRINTK("fbcon: %s pending work\n", (pending ? "canceled" :
+                        "no"));
+
                 for (j = first_fb_vc; j <= last_fb_vc; j++) {
                         if (con2fb_map[j] == i)
                                 mapped = 1;
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c
index ccd986140c95..d58c68cd456e 100644
--- a/drivers/video/imxfb.c
+++ b/drivers/video/imxfb.c
@@ -1,6 +1,4 @@
 /*
- *  linux/drivers/video/imxfb.c
- *
  *  Freescale i.MX Frame Buffer device driver
  *
  *  Copyright (C) 2004 Sascha Hauer, Pengutronix
@@ -16,7 +14,6 @@
  *      linux-arm-kernel@lists.arm.linux.org.uk
  */
 
-//#define DEBUG 1
 
 #include <linux/module.h>
 #include <linux/kernel.h>
@@ -32,9 +29,8 @@
 #include <linux/cpufreq.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/io.h>
 
-#include <mach/hardware.h>
-#include <asm/io.h>
 #include <mach/imxfb.h>
 
 /*
@@ -42,23 +38,150 @@
  */
 #define DEBUG_VAR 1
 
-#include "imxfb.h"
+#define DRIVER_NAME "imx-fb"
+
+#define LCDC_SSA        0x00
+
+#define LCDC_SIZE       0x04
+#define SIZE_XMAX(x)    ((((x) >> 4) & 0x3f) << 20)
+#define SIZE_YMAX(y)    ((y) & 0x1ff)
+
+#define LCDC_VPW        0x08
+#define VPW_VPW(x)      ((x) & 0x3ff)
+
+#define LCDC_CPOS       0x0C
+#define CPOS_CC1        (1<<31)
+#define CPOS_CC0        (1<<30)
+#define CPOS_OP         (1<<28)
+#define CPOS_CXP(x)     (((x) & 3ff) << 16)
+#define CPOS_CYP(y)     ((y) & 0x1ff)
+
+#define LCDC_LCWHB      0x10
+#define LCWHB_BK_EN     (1<<31)
+#define LCWHB_CW(w)     (((w) & 0x1f) << 24)
+#define LCWHB_CH(h)     (((h) & 0x1f) << 16)
+#define LCWHB_BD(x)     ((x) & 0xff)
+
+#define LCDC_LCHCC      0x14
+#define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11)
+#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5)
+#define LCHCC_CUR_COL_B(b) ((b) & 0x1f)
+
+#define LCDC_PCR        0x18
+
+#define LCDC_HCR        0x1C
+#define HCR_H_WIDTH(x)  (((x) & 0x3f) << 26)
+#define HCR_H_WAIT_1(x) (((x) & 0xff) << 8)
+#define HCR_H_WAIT_2(x) ((x) & 0xff)
+
+#define LCDC_VCR        0x20
+#define VCR_V_WIDTH(x)  (((x) & 0x3f) << 26)
+#define VCR_V_WAIT_1(x) (((x) & 0xff) << 8)
+#define VCR_V_WAIT_2(x) ((x) & 0xff)
+
+#define LCDC_POS        0x24
+#define POS_POS(x)      ((x) & 1f)
+
+#define LCDC_LSCR1      0x28
+/* bit fields in imxfb.h */
+
+#define LCDC_PWMR       0x2C
+/* bit fields in imxfb.h */
+
+#define LCDC_DMACR      0x30
+/* bit fields in imxfb.h */
+
+#define LCDC_RMCR       0x34
+#define RMCR_LCDC_EN    (1<<1)
+#define RMCR_SELF_REF   (1<<0)
+
+#define LCDC_LCDICR     0x38
+#define LCDICR_INT_SYN  (1<<2)
+#define LCDICR_INT_CON  (1)
+
+#define LCDC_LCDISR     0x40
+#define LCDISR_UDR_ERR  (1<<3)
+#define LCDISR_ERR_RES  (1<<2)
+#define LCDISR_EOF      (1<<1)
+#define LCDISR_BOF      (1<<0)
+
+/*
+ * These are the bitfields for each
+ * display depth that we support.
+ */
+struct imxfb_rgb {
+        struct fb_bitfield      red;
+        struct fb_bitfield      green;
+        struct fb_bitfield      blue;
+        struct fb_bitfield      transp;
+};
+
+struct imxfb_info {
+        struct platform_device  *pdev;
+        void __iomem            *regs;
 
-static struct imxfb_rgb def_rgb_16 = {
-        .red    = { .offset = 8,  .length = 4, },
-        .green  = { .offset = 4,  .length = 4, },
-        .blue   = { .offset = 0,  .length = 4, },
-        .transp = { .offset = 0,  .length = 0, },
+        u_int                   max_bpp;
+        u_int                   max_xres;
+        u_int                   max_yres;
+
+        /*
+         * These are the addresses we mapped
+         * the framebuffer memory region to.
+         */
+        dma_addr_t              map_dma;
+        u_char                  *map_cpu;
+        u_int                   map_size;
+
+        u_char                  *screen_cpu;
+        dma_addr_t              screen_dma;
+        u_int                   palette_size;
+
+        dma_addr_t              dbar1;
+        dma_addr_t              dbar2;
+
+        u_int                   pcr;
+        u_int                   pwmr;
+        u_int                   lscr1;
+        u_int                   dmacr;
+        u_int                   cmap_inverse:1,
+                                cmap_static:1,
+                                unused:30;
+
+        void (*lcd_power)(int);
+        void (*backlight_power)(int);
+};
+
+#define IMX_NAME        "IMX"
+
+/*
+ * Minimum X and Y resolutions
+ */
+#define MIN_XRES        64
+#define MIN_YRES        64
+
+static struct imxfb_rgb def_rgb_16_tft = {
+        .red    = {.offset = 11, .length = 5,},
+        .green  = {.offset = 5, .length = 6,},
+        .blue   = {.offset = 0, .length = 5,},
+        .transp = {.offset = 0, .length = 0,},
+};
+
+static struct imxfb_rgb def_rgb_16_stn = {
+        .red    = {.offset = 8, .length = 4,},
+        .green  = {.offset = 4, .length = 4,},
+        .blue   = {.offset = 0, .length = 4,},
+        .transp = {.offset = 0, .length = 0,},
 };
 
 static struct imxfb_rgb def_rgb_8 = {
-        .red    = { .offset = 0,  .length = 8, },
-        .green  = { .offset = 0,  .length = 8, },
-        .blue   = { .offset = 0,  .length = 8, },
-        .transp = { .offset = 0,  .length = 0, },
+        .red    = {.offset = 0, .length = 8,},
+        .green  = {.offset = 0, .length = 8,},
+        .blue   = {.offset = 0, .length = 8,},
+        .transp = {.offset = 0, .length = 0,},
 };
 
-static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info);
+static int imxfb_activate_var(struct fb_var_screeninfo *var,
+                struct fb_info *info);
 
 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
 {
@@ -67,10 +190,8 @@ static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
         return chan << bf->offset;
 }
 
-#define LCDC_PALETTE(x) __REG2(IMX_LCDC_BASE+0x800, (x)<<2)
-static int
-imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
-                       u_int trans, struct fb_info *info)
+static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
+                u_int trans, struct fb_info *info)
 {
         struct imxfb_info *fbi = info->par;
         u_int val, ret = 1;
@@ -81,14 +202,13 @@ imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
                       (CNVT_TOHW(green,4) << 4) |
                       CNVT_TOHW(blue,  4);
 
-                LCDC_PALETTE(regno) = val;
+                writel(val, fbi->regs + 0x800 + (regno << 2));
                 ret = 0;
         }
         return ret;
 }
 
-static int
-imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
+static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
                    u_int trans, struct fb_info *info)
 {
         struct imxfb_info *fbi = info->par;
@@ -148,11 +268,10 @@ imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  *    yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
  *    bitfields, horizontal timing, vertical timing.
  */
-static int
-imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
+static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 {
         struct imxfb_info *fbi = info->par;
-        int rgbidx;
+        struct imxfb_rgb *rgb;
 
         if (var->xres < MIN_XRES)
                 var->xres = MIN_XRES;
@@ -168,23 +287,25 @@ imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
         pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel);
         switch (var->bits_per_pixel) {
         case 16:
-                rgbidx = RGB_16;
+        default:
+                if (readl(fbi->regs + LCDC_PCR) & PCR_TFT)
+                        rgb = &def_rgb_16_tft;
+                else
+                        rgb = &def_rgb_16_stn;
                 break;
         case 8:
-                rgbidx = RGB_8;
+                rgb = &def_rgb_8;
                 break;
-        default:
-                rgbidx = RGB_16;
         }
 
         /*
          * Copy the RGB parameters for this display
          * from the machine specific parameters.
          */
-        var->red    = fbi->rgb[rgbidx]->red;
-        var->green  = fbi->rgb[rgbidx]->green;
-        var->blue   = fbi->rgb[rgbidx]->blue;
-        var->transp = fbi->rgb[rgbidx]->transp;
+        var->red    = rgb->red;
+        var->green  = rgb->green;
+        var->blue   = rgb->blue;
+        var->transp = rgb->transp;
 
         pr_debug("RGBT length = %d:%d:%d:%d\n",
                 var->red.length, var->green.length, var->blue.length,
@@ -221,8 +342,7 @@ static int imxfb_set_par(struct fb_info *info)
                 info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
         }
 
-        info->fix.line_length = var->xres_virtual *
-                                  var->bits_per_pixel / 8;
+        info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
         fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
 
         imxfb_activate_var(var, info);
@@ -235,22 +355,27 @@ static void imxfb_enable_controller(struct imxfb_info *fbi)
         pr_debug("Enabling LCD controller\n");
 
         /* initialize LCDC */
-        LCDC_RMCR &= ~RMCR_LCDC_EN;             /* just to be safe... */
+        writel(readl(fbi->regs + LCDC_RMCR) & ~RMCR_LCDC_EN,
+                fbi->regs + LCDC_RMCR); /* just to be safe... */
+
+        writel(fbi->screen_dma, fbi->regs + LCDC_SSA);
 
-        LCDC_SSA        = fbi->screen_dma;
         /* physical screen start address            */
-        LCDC_VPW        = VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4);
+        writel(VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4),
+                fbi->regs + LCDC_VPW);
 
-        LCDC_POS        = 0x00000000;   /* panning offset 0 (0 pixel offset)        */
+        /* panning offset 0 (0 pixel offset)        */
+        writel(0x00000000, fbi->regs + LCDC_POS);
 
         /* disable hardware cursor */
-        LCDC_CPOS       &= ~(CPOS_CC0 | CPOS_CC1);
+        writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
+                fbi->regs + LCDC_CPOS);
 
-        LCDC_RMCR = RMCR_LCDC_EN;
+        writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR);
 
-        if(fbi->backlight_power)
+        if (fbi->backlight_power)
                 fbi->backlight_power(1);
-        if(fbi->lcd_power)
+        if (fbi->lcd_power)
                 fbi->lcd_power(1);
 }
 
@@ -258,12 +383,12 @@ static void imxfb_disable_controller(struct imxfb_info *fbi)
 {
         pr_debug("Disabling LCD controller\n");
 
-        if(fbi->backlight_power)
+        if (fbi->backlight_power)
                 fbi->backlight_power(0);
-        if(fbi->lcd_power)
+        if (fbi->lcd_power)
                 fbi->lcd_power(0);
 
-        LCDC_RMCR = 0;
+        writel(0, fbi->regs + LCDC_RMCR);
 }
 
 static int imxfb_blank(int blank, struct fb_info *info)
@@ -340,74 +465,26 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf
                         info->fix.id, var->lower_margin);
 #endif
 
-        LCDC_HCR        = HCR_H_WIDTH(var->hsync_len) |
-                          HCR_H_WAIT_1(var->left_margin) |
-                          HCR_H_WAIT_2(var->right_margin);
+        writel(HCR_H_WIDTH(var->hsync_len) |
+                HCR_H_WAIT_1(var->right_margin) |
+                HCR_H_WAIT_2(var->left_margin),
+                fbi->regs + LCDC_HCR);
 
-        LCDC_VCR        = VCR_V_WIDTH(var->vsync_len) |
-                          VCR_V_WAIT_1(var->upper_margin) |
-                          VCR_V_WAIT_2(var->lower_margin);
+        writel(VCR_V_WIDTH(var->vsync_len) |
+                VCR_V_WAIT_1(var->lower_margin) |
+                VCR_V_WAIT_2(var->upper_margin),
+                fbi->regs + LCDC_VCR);
 
-        LCDC_SIZE       = SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres);
-        LCDC_PCR        = fbi->pcr;
-        LCDC_PWMR       = fbi->pwmr;
-        LCDC_LSCR1      = fbi->lscr1;
-        LCDC_DMACR      = fbi->dmacr;
+        writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres),
+                        fbi->regs + LCDC_SIZE);
+        writel(fbi->pcr, fbi->regs + LCDC_PCR);
+        writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
+        writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
+        writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
 
         return 0;
 }
 
-static void imxfb_setup_gpio(struct imxfb_info *fbi)
-{
-        int width;
-
-        LCDC_RMCR       &= ~(RMCR_LCDC_EN | RMCR_SELF_REF);
-
-        if( fbi->pcr & PCR_TFT )
-                width = 16;
-        else
-                width = 1 << ((fbi->pcr >> 28) & 0x3);
-
-        switch(width) {
-        case 16:
-                imx_gpio_mode(PD30_PF_LD15);
-                imx_gpio_mode(PD29_PF_LD14);
-                imx_gpio_mode(PD28_PF_LD13);
-                imx_gpio_mode(PD27_PF_LD12);
-                imx_gpio_mode(PD26_PF_LD11);
-                imx_gpio_mode(PD25_PF_LD10);
-                imx_gpio_mode(PD24_PF_LD9);
-                imx_gpio_mode(PD23_PF_LD8);
-        case 8:
-                imx_gpio_mode(PD22_PF_LD7);
-                imx_gpio_mode(PD21_PF_LD6);
-                imx_gpio_mode(PD20_PF_LD5);
-                imx_gpio_mode(PD19_PF_LD4);
-        case 4:
-                imx_gpio_mode(PD18_PF_LD3);
-                imx_gpio_mode(PD17_PF_LD2);
-        case 2:
-                imx_gpio_mode(PD16_PF_LD1);
-        case 1:
-                imx_gpio_mode(PD15_PF_LD0);
-        }
-
-        /* initialize GPIOs */
-        imx_gpio_mode(PD6_PF_LSCLK);
-        imx_gpio_mode(PD11_PF_CONTRAST);
-        imx_gpio_mode(PD14_PF_FLM_VSYNC);
-        imx_gpio_mode(PD13_PF_LP_HSYNC);
-        imx_gpio_mode(PD12_PF_ACD_OE);
-
-        /* These are only needed for Sharp HR TFT displays */
-        if (fbi->pcr & PCR_SHARP) {
-                imx_gpio_mode(PD7_PF_REV);
-                imx_gpio_mode(PD8_PF_CLS);
-                imx_gpio_mode(PD9_PF_PS);
-                imx_gpio_mode(PD10_PF_SPL_SPR);
-        }
-}
-
 #ifdef CONFIG_PM
 /*
  * Power management hooks.  Note that we won't be called from IRQ context,
@@ -416,7 +493,8 @@ static void imxfb_setup_gpio(struct imxfb_info *fbi)
 static int imxfb_suspend(struct platform_device *dev, pm_message_t state)
 {
         struct imxfb_info *fbi = platform_get_drvdata(dev);
-        pr_debug("%s\n",__func__);
+
+        pr_debug("%s\n", __func__);
 
         imxfb_disable_controller(fbi);
         return 0;
@@ -425,7 +503,8 @@ static int imxfb_suspend(struct platform_device *dev, pm_message_t state)
 static int imxfb_resume(struct platform_device *dev)
 {
         struct imxfb_info *fbi = platform_get_drvdata(dev);
-        pr_debug("%s\n",__func__);
+
+        pr_debug("%s\n", __func__);
 
         imxfb_enable_controller(fbi);
         return 0;
@@ -435,149 +514,136 @@ static int imxfb_resume(struct platform_device *dev)
 #define imxfb_resume    NULL
 #endif
 
-static int __init imxfb_init_fbinfo(struct device *dev)
+static int __init imxfb_init_fbinfo(struct platform_device *pdev)
 {
-        struct imxfb_mach_info *inf = dev->platform_data;
-        struct fb_info *info = dev_get_drvdata(dev);
+        struct imx_fb_platform_data *pdata = pdev->dev.platform_data;
+        struct fb_info *info = dev_get_drvdata(&pdev->dev);
         struct imxfb_info *fbi = info->par;
 
         pr_debug("%s\n",__func__);
 
-        info->pseudo_palette = kmalloc( sizeof(u32) * 16, GFP_KERNEL);
+        info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
         if (!info->pseudo_palette)
                 return -ENOMEM;
 
         memset(fbi, 0, sizeof(struct imxfb_info));
-        fbi->dev = dev;
 
         strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id));
 
-        info->fix.type  = FB_TYPE_PACKED_PIXELS;
+        info->fix.type                  = FB_TYPE_PACKED_PIXELS;
         info->fix.type_aux              = 0;
         info->fix.xpanstep              = 0;
         info->fix.ypanstep              = 0;
         info->fix.ywrapstep             = 0;
-        info->fix.accel = FB_ACCEL_NONE;
+        info->fix.accel                 = FB_ACCEL_NONE;
 
         info->var.nonstd                = 0;
         info->var.activate              = FB_ACTIVATE_NOW;
         info->var.height                = -1;
         info->var.width = -1;
         info->var.accel_flags           = 0;
-        info->var.vmode = FB_VMODE_NONINTERLACED;
+        info->var.vmode                 = FB_VMODE_NONINTERLACED;
 
         info->fbops                     = &imxfb_ops;
-        info->flags                     = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST;
-
-        fbi->rgb[RGB_16]                = &def_rgb_16;
-        fbi->rgb[RGB_8]                 = &def_rgb_8;
-
-        fbi->max_xres                   = inf->xres;
-        info->var.xres                  = inf->xres;
-        info->var.xres_virtual          = inf->xres;
-        fbi->max_yres                   = inf->yres;
-        info->var.yres                  = inf->yres;
-        info->var.yres_virtual          = inf->yres;
-        fbi->max_bpp                    = inf->bpp;
-        info->var.bits_per_pixel        = inf->bpp;
-        info->var.nonstd                = inf->nonstd;
-        info->var.pixclock              = inf->pixclock;
-        info->var.hsync_len             = inf->hsync_len;
-        info->var.left_margin           = inf->left_margin;
-        info->var.right_margin          = inf->right_margin;
-        info->var.vsync_len             = inf->vsync_len;
-        info->var.upper_margin          = inf->upper_margin;
-        info->var.lower_margin          = inf->lower_margin;
-        info->var.sync                  = inf->sync;
-        info->var.grayscale             = inf->cmap_greyscale;
-        fbi->cmap_inverse               = inf->cmap_inverse;
-        fbi->cmap_static                = inf->cmap_static;
-        fbi->pcr                        = inf->pcr;
-        fbi->lscr1                      = inf->lscr1;
-        fbi->dmacr                      = inf->dmacr;
-        fbi->pwmr                       = inf->pwmr;
-        fbi->lcd_power                  = inf->lcd_power;
-        fbi->backlight_power            = inf->backlight_power;
+        info->flags                     = FBINFO_FLAG_DEFAULT |
+                                          FBINFO_READS_FAST;
+
+        fbi->max_xres                   = pdata->xres;
+        info->var.xres                  = pdata->xres;
+        info->var.xres_virtual          = pdata->xres;
+        fbi->max_yres                   = pdata->yres;
+        info->var.yres                  = pdata->yres;
+        info->var.yres_virtual          = pdata->yres;
+        fbi->max_bpp                    = pdata->bpp;
+        info->var.bits_per_pixel        = pdata->bpp;
+        info->var.nonstd                = pdata->nonstd;
+        info->var.pixclock              = pdata->pixclock;
+        info->var.hsync_len             = pdata->hsync_len;
+        info->var.left_margin           = pdata->left_margin;
+        info->var.right_margin          = pdata->right_margin;
+        info->var.vsync_len             = pdata->vsync_len;
+        info->var.upper_margin          = pdata->upper_margin;
+        info->var.lower_margin          = pdata->lower_margin;
+        info->var.sync                  = pdata->sync;
+        info->var.grayscale             = pdata->cmap_greyscale;
+        fbi->cmap_inverse               = pdata->cmap_inverse;
+        fbi->cmap_static                = pdata->cmap_static;
+        fbi->pcr                        = pdata->pcr;
+        fbi->lscr1                      = pdata->lscr1;
+        fbi->dmacr                      = pdata->dmacr;
+        fbi->pwmr                       = pdata->pwmr;
+        fbi->lcd_power                  = pdata->lcd_power;
+        fbi->backlight_power            = pdata->backlight_power;
         info->fix.smem_len              = fbi->max_xres * fbi->max_yres *
                                           fbi->max_bpp / 8;
 
         return 0;
 }
 
-/*
- *      Allocates the DRAM memory for the frame buffer.  This buffer is
- *      remapped into a non-cached, non-buffered, memory region to
- *      allow pixel writes to occur without flushing the cache.
- *      Once this area is remapped, all virtual memory access to the
- *      video memory should occur at the new region.
- */
-static int __init imxfb_map_video_memory(struct fb_info *info)
-{
-        struct imxfb_info *fbi = info->par;
-
-        fbi->map_size = PAGE_ALIGN(info->fix.smem_len);
-        fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size,
-                                        &fbi->map_dma,GFP_KERNEL);
-
-        if (fbi->map_cpu) {
-                info->screen_base = fbi->map_cpu;
-                fbi->screen_cpu = fbi->map_cpu;
-                fbi->screen_dma = fbi->map_dma;
-                info->fix.smem_start = fbi->screen_dma;
-        }
-
-        return fbi->map_cpu ? 0 : -ENOMEM;
-}
-
 static int __init imxfb_probe(struct platform_device *pdev)
 {
         struct imxfb_info *fbi;
         struct fb_info *info;
-        struct imxfb_mach_info *inf;
+        struct imx_fb_platform_data *pdata;
         struct resource *res;
         int ret;
 
         printk("i.MX Framebuffer driver\n");
 
         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        if(!res)
+        if (!res)
                 return -ENODEV;
 
-        inf = pdev->dev.platform_data;
-        if(!inf) {
+        pdata = pdev->dev.platform_data;
+        if (!pdata) {
                 dev_err(&pdev->dev,"No platform_data available\n");
                 return -ENOMEM;
         }
 
         info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev);
-        if(!info)
+        if (!info)
                 return -ENOMEM;
 
         fbi = info->par;
 
         platform_set_drvdata(pdev, info);
 
-        ret = imxfb_init_fbinfo(&pdev->dev);
-        if( ret < 0 )
+        ret = imxfb_init_fbinfo(pdev);
+        if (ret < 0)
                 goto failed_init;
 
-        res = request_mem_region(res->start, res->end - res->start + 1, "IMXFB");
+        res = request_mem_region(res->start, resource_size(res),
+                                DRIVER_NAME);
         if (!res) {
                 ret = -EBUSY;
-                goto failed_regs;
+                goto failed_req;
+        }
+
+        fbi->regs = ioremap(res->start, resource_size(res));
+        if (fbi->regs == NULL) {
+                printk(KERN_ERR"Cannot map frame buffer registers\n");
+                goto failed_ioremap;
         }
 
-        if (!inf->fixed_screen_cpu) {
-                ret = imxfb_map_video_memory(info);
-                if (ret) {
+        if (!pdata->fixed_screen_cpu) {
+                fbi->map_size = PAGE_ALIGN(info->fix.smem_len);
+                fbi->map_cpu = dma_alloc_writecombine(&pdev->dev,
+                                fbi->map_size, &fbi->map_dma, GFP_KERNEL);
+
+                if (!fbi->map_cpu) {
                         dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret);
                         ret = -ENOMEM;
                         goto failed_map;
                 }
+
+                info->screen_base = fbi->map_cpu;
+                fbi->screen_cpu = fbi->map_cpu;
+                fbi->screen_dma = fbi->map_dma;
+                info->fix.smem_start = fbi->screen_dma;
         } else {
                 /* Fixed framebuffer mapping enables location of the screen in eSRAM */
-                fbi->map_cpu = inf->fixed_screen_cpu;
-                fbi->map_dma = inf->fixed_screen_dma;
+                fbi->map_cpu = pdata->fixed_screen_cpu;
+                fbi->map_dma = pdata->fixed_screen_dma;
                 info->screen_base = fbi->map_cpu;
                 fbi->screen_cpu = fbi->map_cpu;
                 fbi->screen_dma = fbi->map_dma;
@@ -590,12 +656,10 @@ static int __init imxfb_probe(struct platform_device *pdev)
          */
         imxfb_check_var(&info->var, info);
 
-        ret = fb_alloc_cmap(&info->cmap, 1<<info->var.bits_per_pixel, 0);
+        ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0);
         if (ret < 0)
                 goto failed_cmap;
 
-        imxfb_setup_gpio(fbi);
-
         imxfb_set_par(info);
         ret = register_framebuffer(info);
         if (ret < 0) {
@@ -610,20 +674,22 @@ static int __init imxfb_probe(struct platform_device *pdev)
 failed_register:
         fb_dealloc_cmap(&info->cmap);
 failed_cmap:
-        if (!inf->fixed_screen_cpu)
+        if (!pdata->fixed_screen_cpu)
                 dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu,
-                           fbi->map_dma);
+                        fbi->map_dma);
 failed_map:
-        kfree(info->pseudo_palette);
-failed_regs:
+        iounmap(fbi->regs);
+failed_ioremap:
         release_mem_region(res->start, res->end - res->start);
+failed_req:
+        kfree(info->pseudo_palette);
 failed_init:
         platform_set_drvdata(pdev, NULL);
         framebuffer_release(info);
         return ret;
 }
 
-static int imxfb_remove(struct platform_device *pdev)
+static int __devexit imxfb_remove(struct platform_device *pdev)
 {
         struct fb_info *info = platform_get_drvdata(pdev);
         struct imxfb_info *fbi = info->par;
@@ -639,6 +705,7 @@ static int imxfb_remove(struct platform_device *pdev)
         kfree(info->pseudo_palette);
         framebuffer_release(info);
 
+        iounmap(fbi->regs);
         release_mem_region(res->start, res->end - res->start + 1);
         platform_set_drvdata(pdev, NULL);
 
@@ -653,19 +720,18 @@ void  imxfb_shutdown(struct platform_device * dev)
 }
 
 static struct platform_driver imxfb_driver = {
-        .probe          = imxfb_probe,
         .suspend        = imxfb_suspend,
         .resume         = imxfb_resume,
-        .remove         = imxfb_remove,
+        .remove         = __devexit_p(imxfb_remove),
         .shutdown       = imxfb_shutdown,
         .driver         = {
-                .name   = "imx-fb",
+                .name   = DRIVER_NAME,
         },
 };
 
 int __init imxfb_init(void)
 {
-        return platform_driver_register(&imxfb_driver);
+        return platform_driver_probe(&imxfb_driver, imxfb_probe);
 }
 
 static void __exit imxfb_cleanup(void)
diff --git a/drivers/video/imxfb.h b/drivers/video/imxfb.h
deleted file mode 100644
index e837a8b48eb8..000000000000
--- a/drivers/video/imxfb.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * linux/drivers/video/imxfb.h
- *
- *  Freescale i.MX Frame Buffer device driver
- *
- *  Copyright (C) 2004 S.Hauer, Pengutronix
- *
- *  Copyright (C) 1999 Eric A. Thomas
- *   Based on acornfb.c Copyright (C) Russell King.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-/*
- * These are the bitfields for each
- * display depth that we support.
- */
-struct imxfb_rgb {
-        struct fb_bitfield      red;
-        struct fb_bitfield      green;
-        struct fb_bitfield      blue;
-        struct fb_bitfield      transp;
-};
-
-#define RGB_16  (0)
-#define RGB_8   (1)
-#define NR_RGB  2
-
-struct imxfb_info {
-        struct device           *dev;
-        struct imxfb_rgb        *rgb[NR_RGB];
-
-        u_int                   max_bpp;
-        u_int                   max_xres;
-        u_int                   max_yres;
-
-        /*
-         * These are the addresses we mapped
-         * the framebuffer memory region to.
-         */
-        dma_addr_t              map_dma;
-        u_char *                map_cpu;
-        u_int                   map_size;
-
-        u_char *                screen_cpu;
-        dma_addr_t              screen_dma;
-        u_int                   palette_size;
-
-        dma_addr_t              dbar1;
-        dma_addr_t              dbar2;
-
-        u_int                   pcr;
-        u_int                   pwmr;
-        u_int                   lscr1;
-        u_int                   dmacr;
-        u_int                   cmap_inverse:1,
-                                cmap_static:1,
-                                unused:30;
-
-        void (*lcd_power)(int);
-        void (*backlight_power)(int);
-};
-
-#define IMX_NAME        "IMX"
-
-/*
- * Minimum X and Y resolutions
- */
-#define MIN_XRES        64
-#define MIN_YRES        64
-
diff --git a/drivers/video/macfb.c b/drivers/video/macfb.c
index b790ddff76f9..ee380d5f3410 100644
--- a/drivers/video/macfb.c
+++ b/drivers/video/macfb.c
@@ -164,7 +164,6 @@ static struct fb_var_screeninfo macfb_defined = {
 };
 
 static struct fb_fix_screeninfo macfb_fix = {
-        .id     = "Macintosh ",
         .type   = FB_TYPE_PACKED_PIXELS,
         .accel  = FB_ACCEL_NONE,
 };
@@ -760,22 +759,22 @@ static int __init macfb_init(void)
 
                 switch(ndev->dr_hw) {
                 case NUBUS_DRHW_APPLE_MDC:
-                        strcat( macfb_fix.id, "Display Card" );
+                        strcpy(macfb_fix.id, "Mac Disp. Card");
                         macfb_setpalette = mdc_setpalette;
                         macfb_defined.activate = FB_ACTIVATE_NOW;
                         break;
                 case NUBUS_DRHW_APPLE_TFB:
-                        strcat( macfb_fix.id, "Toby" );
+                        strcpy(macfb_fix.id, "Toby");
                         macfb_setpalette = toby_setpalette;
                         macfb_defined.activate = FB_ACTIVATE_NOW;
                         break;
                 case NUBUS_DRHW_APPLE_JET:
-                        strcat( macfb_fix.id, "Jet");
+                        strcpy(macfb_fix.id, "Jet");
                         macfb_setpalette = jet_setpalette;
                         macfb_defined.activate = FB_ACTIVATE_NOW;
                         break;                  
                 default:
-                        strcat( macfb_fix.id, "Generic NuBus" );
+                        strcpy(macfb_fix.id, "Generic NuBus");
                         break;
                 }
         }
@@ -786,21 +785,11 @@ static int __init macfb_init(void)
         if (!video_is_nubus)
                 switch( mac_bi_data.id )
                 {
-                        /* These don't have onboard video.  Eventually, we may
-                           be able to write separate framebuffer drivers for
-                           them (tobyfb.c, hiresfb.c, etc, etc) */
-                case MAC_MODEL_II:
-                case MAC_MODEL_IIX:
-                case MAC_MODEL_IICX:
-                case MAC_MODEL_IIFX:
-                        strcat( macfb_fix.id, "Generic NuBus" );
-                        break;
-
                         /* Valkyrie Quadras */
                 case MAC_MODEL_Q630:
                         /* I'm not sure about this one */
                 case MAC_MODEL_P588:
-                        strcat( macfb_fix.id, "Valkyrie built-in" );
+                        strcpy(macfb_fix.id, "Valkyrie");
                         macfb_setpalette = valkyrie_setpalette;
                         macfb_defined.activate = FB_ACTIVATE_NOW;
                         valkyrie_cmap_regs = ioremap(DAC_BASE, 0x1000);
@@ -823,7 +812,7 @@ static int __init macfb_init(void)
                 case MAC_MODEL_Q700:
                 case MAC_MODEL_Q900:
                 case MAC_MODEL_Q950:
-                        strcat( macfb_fix.id, "DAFB built-in" );
+                        strcpy(macfb_fix.id, "DAFB");
                         macfb_setpalette = dafb_setpalette;
                         macfb_defined.activate = FB_ACTIVATE_NOW;
                         dafb_cmap_regs = ioremap(DAFB_BASE, 0x1000);
@@ -831,7 +820,7 @@ static int __init macfb_init(void)
 
                         /* LC II uses the V8 framebuffer */
                 case MAC_MODEL_LCII:
-                        strcat( macfb_fix.id, "V8 built-in" );
+                        strcpy(macfb_fix.id, "V8");
                         macfb_setpalette = v8_brazil_setpalette;
                         macfb_defined.activate = FB_ACTIVATE_NOW;
                         v8_brazil_cmap_regs = ioremap(DAC_BASE, 0x1000);
@@ -843,7 +832,7 @@ static int __init macfb_init(void)
                 case MAC_MODEL_IIVI:
                 case MAC_MODEL_IIVX:
                 case MAC_MODEL_P600:
-                        strcat( macfb_fix.id, "Brazil built-in" );
+                        strcpy(macfb_fix.id, "Brazil");
                         macfb_setpalette = v8_brazil_setpalette;
                         macfb_defined.activate = FB_ACTIVATE_NOW;
                         v8_brazil_cmap_regs = ioremap(DAC_BASE, 0x1000);
@@ -860,7 +849,7 @@ static int __init macfb_init(void)
                 case MAC_MODEL_P460:
                         macfb_setpalette = v8_brazil_setpalette;
                         macfb_defined.activate = FB_ACTIVATE_NOW;
-                        strcat( macfb_fix.id, "Sonora built-in" );
+                        strcpy(macfb_fix.id, "Sonora");
                         v8_brazil_cmap_regs = ioremap(DAC_BASE, 0x1000);
                         break;
 
@@ -871,7 +860,7 @@ static int __init macfb_init(void)
                 case MAC_MODEL_IISI:
                         macfb_setpalette = rbv_setpalette;
                         macfb_defined.activate = FB_ACTIVATE_NOW;
-                        strcat( macfb_fix.id, "RBV built-in" );
+                        strcpy(macfb_fix.id, "RBV");
                         rbv_cmap_regs = ioremap(DAC_BASE, 0x1000);
                         break;
 
@@ -880,7 +869,7 @@ static int __init macfb_init(void)
                 case MAC_MODEL_C660:
                         macfb_setpalette = civic_setpalette;
                         macfb_defined.activate = FB_ACTIVATE_NOW;
-                        strcat( macfb_fix.id, "Civic built-in" );
+                        strcpy(macfb_fix.id, "Civic");
                         civic_cmap_regs = ioremap(CIVIC_BASE, 0x1000);
                         break;
 
@@ -901,7 +890,7 @@ static int __init macfb_init(void)
                                 v8_brazil_cmap_regs =
                                         ioremap(DAC_BASE, 0x1000);
                         }
-                        strcat( macfb_fix.id, "LC built-in" );
+                        strcpy(macfb_fix.id, "LC");
                         break;
                         /* We think this may be like the LC II */
                 case MAC_MODEL_CCL:
@@ -911,18 +900,18 @@ static int __init macfb_init(void)
                                 v8_brazil_cmap_regs =
                                         ioremap(DAC_BASE, 0x1000);
                         }
-                        strcat( macfb_fix.id, "Color Classic built-in" );
+                        strcpy(macfb_fix.id, "Color Classic");
                         break;
 
                         /* And we *do* mean "weirdos" */
                 case MAC_MODEL_TV:
-                        strcat( macfb_fix.id, "Mac TV built-in" );
+                        strcpy(macfb_fix.id, "Mac TV");
                         break;
 
                         /* These don't have colour, so no need to worry */
                 case MAC_MODEL_SE30:
                 case MAC_MODEL_CLII:
-                        strcat( macfb_fix.id, "Monochrome built-in" );
+                        strcpy(macfb_fix.id, "Monochrome");
                         break;
 
                         /* Powerbooks are particularly difficult.  Many of
@@ -935,7 +924,7 @@ static int __init macfb_init(void)
                 case MAC_MODEL_PB140:
                 case MAC_MODEL_PB145:
                 case MAC_MODEL_PB170:
-                        strcat( macfb_fix.id, "DDC built-in" );
+                        strcpy(macfb_fix.id, "DDC");
                         break;
 
                         /* Internal is GSC, External (if present) is ViSC */
@@ -945,13 +934,13 @@ static int __init macfb_init(void)
                 case MAC_MODEL_PB180:
                 case MAC_MODEL_PB210:
                 case MAC_MODEL_PB230:
-                        strcat( macfb_fix.id, "GSC built-in" );
+                        strcpy(macfb_fix.id, "GSC");
                         break;
 
                         /* Internal is TIM, External is ViSC */
                 case MAC_MODEL_PB165C:
                 case MAC_MODEL_PB180C:
-                        strcat( macfb_fix.id, "TIM built-in" );
+                        strcpy(macfb_fix.id, "TIM");
                         break;
 
                         /* Internal is CSC, External is Keystone+Ariel. */
@@ -963,12 +952,12 @@ static int __init macfb_init(void)
                 case MAC_MODEL_PB280C:
                         macfb_setpalette = csc_setpalette;
                         macfb_defined.activate = FB_ACTIVATE_NOW;
-                        strcat( macfb_fix.id, "CSC built-in" );
+                        strcpy(macfb_fix.id, "CSC");
                         csc_cmap_regs = ioremap(CSC_BASE, 0x1000);
                         break;
                 
                 default:
-                        strcat( macfb_fix.id, "Unknown/Unsupported built-in" );
+                        strcpy(macfb_fix.id, "Unknown");
                         break;
                 }
 
@@ -978,16 +967,23 @@ static int __init macfb_init(void)
         fb_info.pseudo_palette  = pseudo_palette;
         fb_info.flags           = FBINFO_DEFAULT;
 
-        fb_alloc_cmap(&fb_info.cmap, video_cmap_len, 0);
+        err = fb_alloc_cmap(&fb_info.cmap, video_cmap_len, 0);
+        if (err)
+                goto fail_unmap;
         
         err = register_framebuffer(&fb_info);
-        if (!err)
-                printk("fb%d: %s frame buffer device\n",
-                       fb_info.node, fb_info.fix.id);
-        else {
-                iounmap(fb_info.screen_base);
-                iounmap_macfb();
-        }
+        if (err)
+                goto fail_dealloc;
+
+        printk("fb%d: %s frame buffer device\n",
+               fb_info.node, fb_info.fix.id);
+        return 0;
+
+fail_dealloc:
+        fb_dealloc_cmap(&fb_info.cmap);
+fail_unmap:
+        iounmap(fb_info.screen_base);
+        iounmap_macfb();
         return err;
 }
 
diff --git a/drivers/video/mb862xx/mb862xxfb.c b/drivers/video/mb862xx/mb862xxfb.c
index 38718d95fbb9..fb64234a3825 100644
--- a/drivers/video/mb862xx/mb862xxfb.c
+++ b/drivers/video/mb862xx/mb862xxfb.c
@@ -927,9 +927,9 @@ static int __devinit mb862xx_pci_probe(struct pci_dev *pdev,
         }
 
         dev_dbg(dev, "fb phys 0x%llx 0x%lx\n",
-                (u64)par->fb_base_phys, (ulong)par->mapped_vram);
+                (unsigned long long)par->fb_base_phys, (ulong)par->mapped_vram);
         dev_dbg(dev, "mmio phys 0x%llx 0x%lx\n",
-                (u64)par->mmio_base_phys, (ulong)par->mmio_len);
+                (unsigned long long)par->mmio_base_phys, (ulong)par->mmio_len);
 
         if (mb862xx_pci_gdc_init(par))
                 goto io_unmap;
diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c
index 5a5e407dc45f..1a49519dafa4 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -392,7 +392,7 @@ static void set_fb_fix(struct fb_info *fbi)
         int bpp;
 
         rg = &plane->fbdev->mem_desc.region[plane->idx];
-        fbi->screen_base        = (char __iomem *)rg->vaddr;
+        fbi->screen_base        = rg->vaddr;
         fix->smem_start         = rg->paddr;
         fix->smem_len           = rg->size;
 
diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c
index a3765e0be4a8..763c1ea5dce5 100644
--- a/drivers/watchdog/hpwdt.c
+++ b/drivers/watchdog/hpwdt.c
@@ -40,6 +40,7 @@
 #include <linux/bootmem.h>
 #include <linux/slab.h>
 #include <asm/desc.h>
+#include <asm/cacheflush.h>
 
 #define PCI_BIOS32_SD_VALUE             0x5F32335F      /* "_32_" */
 #define CRU_BIOS_SIGNATURE_VALUE        0x55524324
@@ -394,6 +395,8 @@ static void __devinit dmi_find_cru(const struct dmi_header *dm)
                                 smbios_cru64_ptr->double_offset;
                         cru_rom_addr = ioremap(cru_physical_address,
                                 smbios_cru64_ptr->double_length);
+                        set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
+                                smbios_cru64_ptr->double_length >> PAGE_SHIFT);
                 }
         }
 }
@@ -482,7 +485,7 @@ static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
                         "Management Log for details.\n");
         }
 
-        return NOTIFY_STOP;
+        return NOTIFY_OK;
 }
 
 /*
diff --git a/drivers/watchdog/iTCO_vendor_support.c b/drivers/watchdog/iTCO_vendor_support.c
index ca344a85eb95..2474ebca88f6 100644
--- a/drivers/watchdog/iTCO_vendor_support.c
+++ b/drivers/watchdog/iTCO_vendor_support.c
@@ -1,7 +1,7 @@
 /*
  *      intel TCO vendor specific watchdog driver support
  *
- *      (c) Copyright 2006 Wim Van Sebroeck <wim@iguana.be>.
+ *      (c) Copyright 2006-2008 Wim Van Sebroeck <wim@iguana.be>.
  *
  *      This program is free software; you can redistribute it and/or
  *      modify it under the terms of the GNU General Public License
@@ -19,8 +19,7 @@
 
 /* Module and version information */
 #define DRV_NAME        "iTCO_vendor_support"
-#define DRV_VERSION     "1.01"
-#define DRV_RELDATE     "11-Nov-2006"
+#define DRV_VERSION     "1.02"
 #define PFX             DRV_NAME ": "
 
 /* Includes */
@@ -78,24 +77,6 @@ MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default=0 (n
  *          20.6 seconds.
  */
 
-static void supermicro_old_pre_start(unsigned long acpibase)
-{
-        unsigned long val32;
-
-        val32 = inl(SMI_EN);
-        val32 &= 0xffffdfff;    /* Turn off SMI clearing watchdog */
-        outl(val32, SMI_EN);    /* Needed to activate watchdog */
-}
-
-static void supermicro_old_pre_stop(unsigned long acpibase)
-{
-        unsigned long val32;
-
-        val32 = inl(SMI_EN);
-        val32 &= 0x00002000;    /* Turn on SMI clearing watchdog */
-        outl(val32, SMI_EN);    /* Needed to deactivate watchdog */
-}
-
 static void supermicro_old_pre_keepalive(unsigned long acpibase)
 {
         /* Reload TCO Timer (done in iTCO_wdt_keepalive) + */
@@ -247,18 +228,14 @@ static void supermicro_new_pre_set_heartbeat(unsigned int heartbeat)
 void iTCO_vendor_pre_start(unsigned long acpibase,
                            unsigned int heartbeat)
 {
-        if (vendorsupport == SUPERMICRO_OLD_BOARD)
-                supermicro_old_pre_start(acpibase);
-        else if (vendorsupport == SUPERMICRO_NEW_BOARD)
+        if (vendorsupport == SUPERMICRO_NEW_BOARD)
                 supermicro_new_pre_start(heartbeat);
 }
 EXPORT_SYMBOL(iTCO_vendor_pre_start);
 
 void iTCO_vendor_pre_stop(unsigned long acpibase)
 {
-        if (vendorsupport == SUPERMICRO_OLD_BOARD)
-                supermicro_old_pre_stop(acpibase);
-        else if (vendorsupport == SUPERMICRO_NEW_BOARD)
+        if (vendorsupport == SUPERMICRO_NEW_BOARD)
                 supermicro_new_pre_stop();
 }
 EXPORT_SYMBOL(iTCO_vendor_pre_stop);
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c
index bfb93bc2ca9f..5b395a4ddfdf 100644
--- a/drivers/watchdog/iTCO_wdt.c
+++ b/drivers/watchdog/iTCO_wdt.c
@@ -1,7 +1,7 @@
 /*
  *      intel TCO Watchdog Driver (Used in i82801 and i6300ESB chipsets)
  *
- *      (c) Copyright 2006-2007 Wim Van Sebroeck <wim@iguana.be>.
+ *      (c) Copyright 2006-2008 Wim Van Sebroeck <wim@iguana.be>.
  *
  *      This program is free software; you can redistribute it and/or
  *      modify it under the terms of the GNU General Public License
@@ -20,34 +20,41 @@
  *      82801BAM (ICH2-M)    : document number 290687-002, 298242-027,
  *      82801CA  (ICH3-S)    : document number 290733-003, 290739-013,
  *      82801CAM (ICH3-M)    : document number 290716-001, 290718-007,
- *      82801DB  (ICH4)      : document number 290744-001, 290745-020,
- *      82801DBM (ICH4-M)    : document number 252337-001, 252663-005,
+ *      82801DB  (ICH4)      : document number 290744-001, 290745-025,
+ *      82801DBM (ICH4-M)    : document number 252337-001, 252663-008,
  *      82801E   (C-ICH)     : document number 273599-001, 273645-002,
- *      82801EB  (ICH5)      : document number 252516-001, 252517-003,
- *      82801ER  (ICH5R)     : document number 252516-001, 252517-003,
- *      82801FB  (ICH6)      : document number 301473-002, 301474-007,
- *      82801FR  (ICH6R)     : document number 301473-002, 301474-007,
- *      82801FBM (ICH6-M)    : document number 301473-002, 301474-007,
- *      82801FW  (ICH6W)     : document number 301473-001, 301474-007,
- *      82801FRW (ICH6RW)    : document number 301473-001, 301474-007,
- *      82801GB  (ICH7)      : document number 307013-002, 307014-009,
- *      82801GR  (ICH7R)     : document number 307013-002, 307014-009,
- *      82801GDH (ICH7DH)    : document number 307013-002, 307014-009,
- *      82801GBM (ICH7-M)    : document number 307013-002, 307014-009,
- *      82801GHM (ICH7-M DH) : document number 307013-002, 307014-009,
- *      82801HB  (ICH8)      : document number 313056-003, 313057-009,
- *      82801HR  (ICH8R)     : document number 313056-003, 313057-009,
- *      82801HBM (ICH8M)     : document number 313056-003, 313057-009,
- *      82801HH  (ICH8DH)    : document number 313056-003, 313057-009,
- *      82801HO  (ICH8DO)    : document number 313056-003, 313057-009,
- *      82801HEM (ICH8M-E)   : document number 313056-003, 313057-009,
- *      82801IB  (ICH9)      : document number 316972-001, 316973-006,
- *      82801IR  (ICH9R)     : document number 316972-001, 316973-006,
- *      82801IH  (ICH9DH)    : document number 316972-001, 316973-006,
- *      82801IO  (ICH9DO)    : document number 316972-001, 316973-006,
- *      6300ESB  (6300ESB)   : document number 300641-003, 300884-010,
- *      631xESB  (631xESB)   : document number 313082-001, 313075-005,
- *      632xESB  (632xESB)   : document number 313082-001, 313075-005
+ *      82801EB  (ICH5)      : document number 252516-001, 252517-028,
+ *      82801ER  (ICH5R)     : document number 252516-001, 252517-028,
+ *      6300ESB  (6300ESB)   : document number 300641-004, 300884-013,
+ *      82801FB  (ICH6)      : document number 301473-002, 301474-026,
+ *      82801FR  (ICH6R)     : document number 301473-002, 301474-026,
+ *      82801FBM (ICH6-M)    : document number 301473-002, 301474-026,
+ *      82801FW  (ICH6W)     : document number 301473-001, 301474-026,
+ *      82801FRW (ICH6RW)    : document number 301473-001, 301474-026,
+ *      631xESB  (631xESB)   : document number 313082-001, 313075-006,
+ *      632xESB  (632xESB)   : document number 313082-001, 313075-006,
+ *      82801GB  (ICH7)      : document number 307013-003, 307014-024,
+ *      82801GR  (ICH7R)     : document number 307013-003, 307014-024,
+ *      82801GDH (ICH7DH)    : document number 307013-003, 307014-024,
+ *      82801GBM (ICH7-M)    : document number 307013-003, 307014-024,
+ *      82801GHM (ICH7-M DH) : document number 307013-003, 307014-024,
+ *      82801GU  (ICH7-U)    : document number 307013-003, 307014-024,
+ *      82801HB  (ICH8)      : document number 313056-003, 313057-017,
+ *      82801HR  (ICH8R)     : document number 313056-003, 313057-017,
+ *      82801HBM (ICH8M)     : document number 313056-003, 313057-017,
+ *      82801HH  (ICH8DH)    : document number 313056-003, 313057-017,
+ *      82801HO  (ICH8DO)    : document number 313056-003, 313057-017,
+ *      82801HEM (ICH8M-E)   : document number 313056-003, 313057-017,
+ *      82801IB  (ICH9)      : document number 316972-004, 316973-012,
+ *      82801IR  (ICH9R)     : document number 316972-004, 316973-012,
+ *      82801IH  (ICH9DH)    : document number 316972-004, 316973-012,
+ *      82801IO  (ICH9DO)    : document number 316972-004, 316973-012,
+ *      82801IBM (ICH9M)     : document number 316972-004, 316973-012,
+ *      82801IEM (ICH9M-E)   : document number 316972-004, 316973-012,
+ *      82801JIB (ICH10)     : document number 319973-002, 319974-002,
+ *      82801JIR (ICH10R)    : document number 319973-002, 319974-002,
+ *      82801JD  (ICH10D)    : document number 319973-002, 319974-002,
+ *      82801JDO (ICH10DO)   : document number 319973-002, 319974-002
  */
 
 /*
@@ -56,8 +63,7 @@
 
 /* Module and version information */
 #define DRV_NAME        "iTCO_wdt"
-#define DRV_VERSION     "1.03"
-#define DRV_RELDATE     "30-Apr-2008"
+#define DRV_VERSION     "1.04"
 #define PFX             DRV_NAME ": "
 
 /* Includes */
@@ -96,19 +102,26 @@ enum iTCO_chipsets {
         TCO_ICH6,       /* ICH6 & ICH6R */
         TCO_ICH6M,      /* ICH6-M */
         TCO_ICH6W,      /* ICH6W & ICH6RW */
+        TCO_631XESB,    /* 631xESB/632xESB */
         TCO_ICH7,       /* ICH7 & ICH7R */
-        TCO_ICH7M,      /* ICH7-M */
+        TCO_ICH7DH,     /* ICH7DH */
+        TCO_ICH7M,      /* ICH7-M & ICH7-U */
         TCO_ICH7MDH,    /* ICH7-M DH */
         TCO_ICH8,       /* ICH8 & ICH8R */
-        TCO_ICH8ME,     /* ICH8M-E */
         TCO_ICH8DH,     /* ICH8DH */
         TCO_ICH8DO,     /* ICH8DO */
         TCO_ICH8M,      /* ICH8M */
+        TCO_ICH8ME,     /* ICH8M-E */
         TCO_ICH9,       /* ICH9 */
         TCO_ICH9R,      /* ICH9R */
         TCO_ICH9DH,     /* ICH9DH */
         TCO_ICH9DO,     /* ICH9DO */
-        TCO_631XESB,    /* 631xESB/632xESB */
+        TCO_ICH9M,      /* ICH9M */
+        TCO_ICH9ME,     /* ICH9M-E */
+        TCO_ICH10,      /* ICH10 */
+        TCO_ICH10R,     /* ICH10R */
+        TCO_ICH10D,     /* ICH10D */
+        TCO_ICH10DO,    /* ICH10DO */
 };
 
 static struct {
@@ -129,19 +142,26 @@ static struct {
         {"ICH6 or ICH6R", 2},
         {"ICH6-M", 2},
         {"ICH6W or ICH6RW", 2},
+        {"631xESB/632xESB", 2},
         {"ICH7 or ICH7R", 2},
-        {"ICH7-M", 2},
+        {"ICH7DH", 2},
+        {"ICH7-M or ICH7-U", 2},
         {"ICH7-M DH", 2},
         {"ICH8 or ICH8R", 2},
-        {"ICH8M-E", 2},
         {"ICH8DH", 2},
         {"ICH8DO", 2},
         {"ICH8M", 2},
+        {"ICH8M-E", 2},
         {"ICH9", 2},
         {"ICH9R", 2},
         {"ICH9DH", 2},
         {"ICH9DO", 2},
-        {"631xESB/632xESB", 2},
+        {"ICH9M", 2},
+        {"ICH9M-E", 2},
+        {"ICH10", 2},
+        {"ICH10R", 2},
+        {"ICH10D", 2},
+        {"ICH10DO", 2},
         {NULL, 0}
 };
 
@@ -175,18 +195,6 @@ static struct pci_device_id iTCO_wdt_pci_tbl[] = {
         { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_0,           TCO_ICH6)},
         { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_1,           TCO_ICH6M)},
         { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_2,           TCO_ICH6W)},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_0,           TCO_ICH7)},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_1,           TCO_ICH7M)},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_31,          TCO_ICH7MDH)},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_0,           TCO_ICH8)},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_1,           TCO_ICH8ME)},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_2,           TCO_ICH8DH)},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_3,           TCO_ICH8DO)},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_4,           TCO_ICH8M)},
-        { ITCO_PCI_DEVICE(0x2918,                               TCO_ICH9)},
-        { ITCO_PCI_DEVICE(0x2916,                               TCO_ICH9R)},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_2,           TCO_ICH9DH)},
-        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_4,           TCO_ICH9DO)},
         { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ESB2_0,           TCO_631XESB)},
         { ITCO_PCI_DEVICE(0x2671,                               TCO_631XESB)},
         { ITCO_PCI_DEVICE(0x2672,                               TCO_631XESB)},
@@ -203,6 +211,25 @@ static struct pci_device_id iTCO_wdt_pci_tbl[] = {
         { ITCO_PCI_DEVICE(0x267d,                               TCO_631XESB)},
         { ITCO_PCI_DEVICE(0x267e,                               TCO_631XESB)},
         { ITCO_PCI_DEVICE(0x267f,                               TCO_631XESB)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_0,           TCO_ICH7)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_30,          TCO_ICH7DH)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_1,           TCO_ICH7M)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_31,          TCO_ICH7MDH)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_0,           TCO_ICH8)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_2,           TCO_ICH8DH)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_3,           TCO_ICH8DO)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_4,           TCO_ICH8M)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_1,           TCO_ICH8ME)},
+        { ITCO_PCI_DEVICE(0x2918,                               TCO_ICH9)},
+        { ITCO_PCI_DEVICE(0x2916,                               TCO_ICH9R)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_2,           TCO_ICH9DH)},
+        { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_4,           TCO_ICH9DO)},
+        { ITCO_PCI_DEVICE(0x2919,                               TCO_ICH9M)},
+        { ITCO_PCI_DEVICE(0x2917,                               TCO_ICH9ME)},
+        { ITCO_PCI_DEVICE(0x3a18,                               TCO_ICH10)},
+        { ITCO_PCI_DEVICE(0x3a16,                               TCO_ICH10R)},
+        { ITCO_PCI_DEVICE(0x3a1a,                               TCO_ICH10D)},
+        { ITCO_PCI_DEVICE(0x3a14,                               TCO_ICH10DO)},
         { 0, },                 /* End of list */
 };
 MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl);
@@ -311,6 +338,7 @@ static int iTCO_wdt_unset_NO_REBOOT_bit(void)
 static int iTCO_wdt_start(void)
 {
         unsigned int val;
+        unsigned long val32;
 
         spin_lock(&iTCO_wdt_private.io_lock);
 
@@ -323,6 +351,18 @@ static int iTCO_wdt_start(void)
                 return -EIO;
         }
 
+        /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */
+        val32 = inl(SMI_EN);
+        val32 &= 0xffffdfff;    /* Turn off SMI clearing watchdog */
+        outl(val32, SMI_EN);
+
+        /* Force the timer to its reload value by writing to the TCO_RLD
+           register */
+        if (iTCO_wdt_private.iTCO_version == 2)
+                outw(0x01, TCO_RLD);
+        else if (iTCO_wdt_private.iTCO_version == 1)
+                outb(0x01, TCO_RLD);
+
         /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
         val = inw(TCO1_CNT);
         val &= 0xf7ff;
@@ -338,6 +378,7 @@ static int iTCO_wdt_start(void)
 static int iTCO_wdt_stop(void)
 {
         unsigned int val;
+        unsigned long val32;
 
         spin_lock(&iTCO_wdt_private.io_lock);
 
@@ -349,6 +390,11 @@ static int iTCO_wdt_stop(void)
         outw(val, TCO1_CNT);
         val = inw(TCO1_CNT);
 
+        /* Bit 13: TCO_EN -> 1 = Enables the TCO logic to generate SMI# */
+        val32 = inl(SMI_EN);
+        val32 |= 0x00002000;
+        outl(val32, SMI_EN);
+
         /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
         iTCO_wdt_set_NO_REBOOT_bit();
 
@@ -459,7 +505,6 @@ static int iTCO_wdt_open(struct inode *inode, struct file *file)
         /*
          *      Reload and activate timer
          */
-        iTCO_wdt_keepalive();
         iTCO_wdt_start();
         return nonseekable_open(inode, file);
 }
@@ -604,7 +649,6 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
         int ret;
         u32 base_address;
         unsigned long RCBA;
-        unsigned long val32;
 
         /*
          *      Find the ACPI/PM base I/O address which is the base
@@ -644,17 +688,13 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
         /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
         iTCO_wdt_set_NO_REBOOT_bit();
 
-        /* Set the TCO_EN bit in SMI_EN register */
+        /* The TCO logic uses the TCO_EN bit in the SMI_EN register */
         if (!request_region(SMI_EN, 4, "iTCO_wdt")) {
                 printk(KERN_ERR PFX
                         "I/O address 0x%04lx already in use\n", SMI_EN);
                 ret = -EIO;
                 goto out;
         }
-        val32 = inl(SMI_EN);
-        val32 &= 0xffffdfff;    /* Turn off SMI clearing watchdog */
-        outl(val32, SMI_EN);
-        release_region(SMI_EN, 4);
 
         /* The TCO I/O registers reside in a 32-byte range pointed to
            by the TCOBASE value */
@@ -662,7 +702,7 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
                 printk(KERN_ERR PFX "I/O address 0x%04lx already in use\n",
                         TCOBASE);
                 ret = -EIO;
-                goto out;
+                goto unreg_smi_en;
         }
 
         printk(KERN_INFO PFX
@@ -672,8 +712,9 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
                         TCOBASE);
 
         /* Clear out the (probably old) status */
-        outb(0, TCO1_STS);
-        outb(3, TCO2_STS);
+        outb(8, TCO1_STS);      /* Clear the Time Out Status bit */
+        outb(2, TCO2_STS);      /* Clear SECOND_TO_STS bit */
+        outb(4, TCO2_STS);      /* Clear BOOT_STS bit */
 
         /* Make sure the watchdog is not running */
         iTCO_wdt_stop();
@@ -701,6 +742,8 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
 
 unreg_region:
         release_region(TCOBASE, 0x20);
+unreg_smi_en:
+        release_region(SMI_EN, 4);
 out:
         if (iTCO_wdt_private.iTCO_version == 2)
                 iounmap(iTCO_wdt_private.gcs);
@@ -718,6 +761,7 @@ static void __devexit iTCO_wdt_cleanup(void)
         /* Deregister */
         misc_deregister(&iTCO_wdt_miscdev);
         release_region(TCOBASE, 0x20);
+        release_region(SMI_EN, 4);
         if (iTCO_wdt_private.iTCO_version == 2)
                 iounmap(iTCO_wdt_private.gcs);
         pci_dev_put(iTCO_wdt_private.pdev);
@@ -782,8 +826,8 @@ static int __init iTCO_wdt_init_module(void)
 {
         int err;
 
-        printk(KERN_INFO PFX "Intel TCO WatchDog Timer Driver v%s (%s)\n",
-                DRV_VERSION, DRV_RELDATE);
+        printk(KERN_INFO PFX "Intel TCO WatchDog Timer Driver v%s\n",
+                DRV_VERSION);
 
         err = platform_driver_register(&iTCO_wdt_driver);
         if (err)
diff --git a/drivers/watchdog/mtx-1_wdt.c b/drivers/watchdog/mtx-1_wdt.c
index b4b7b0a4c119..3acce623f209 100644
--- a/drivers/watchdog/mtx-1_wdt.c
+++ b/drivers/watchdog/mtx-1_wdt.c
@@ -98,6 +98,8 @@ static void mtx1_wdt_reset(void)
 
 static void mtx1_wdt_start(void)
 {
+        unsigned long flags;
+
         spin_lock_irqsave(&mtx1_wdt_device.lock, flags);
         if (!mtx1_wdt_device.queue) {
                 mtx1_wdt_device.queue = 1;
@@ -110,6 +112,8 @@ static void mtx1_wdt_start(void)
 
 static int mtx1_wdt_stop(void)
 {
+        unsigned long flags;
+
         spin_lock_irqsave(&mtx1_wdt_device.lock, flags);
         if (mtx1_wdt_device.queue) {
                 mtx1_wdt_device.queue = 0;